Repository: wuxx/icesugar-pro Branch: master Commit: 087e48d9e0b0 Files: 89 Total size: 44.5 MB Directory structure: gitextract_1pgxlb8x/ ├── README.md ├── demo/ │ ├── README.md │ ├── blink.svf │ ├── blink_100.bit │ ├── blink_1000.bit │ ├── blink_blue.bit │ ├── blink_blue.svf │ ├── blink_flash.svf │ ├── blink_green.bit │ ├── blink_green.svf │ ├── blink_red.bit │ ├── blink_red.svf │ ├── blink_sram.svf │ ├── colorlight_5a_75b_flash.svf │ ├── hdmi_test_pattern.bit │ ├── linux-with-litex.bit │ ├── litex_no_dram.bit │ ├── litex_with_dram.bit │ ├── litex_with_dram.svf │ ├── litex_with_dram_flash.svf │ ├── uart_tx_9600.bit │ ├── uart_tx_9600_flash.svf │ └── uart_tx_flash.svf ├── doc/ │ ├── ECP5U25Pinout.csv │ └── LFE5U-25F-5BG256-Pinout.csv ├── firmware/ │ └── README.md ├── linux/ │ ├── Image │ ├── README.md │ ├── boot.json │ ├── rootfs.cpio │ └── rv32.dtb ├── schematic/ │ └── README.md ├── src/ │ ├── blink/ │ │ ├── Makefile │ │ ├── blink.bit │ │ ├── blink.json │ │ ├── blink.lpf │ │ ├── blink.svf │ │ ├── blink.v │ │ ├── blink_out.config │ │ └── rst_gen.v │ ├── hdmi_test_pattern/ │ │ ├── Makefile │ │ ├── Makefile.sim │ │ ├── OBUFDS.v │ │ ├── README.md │ │ ├── TMDS_encoder.v │ │ ├── ULX3S_25F.json │ │ ├── ULX3S_25F.v │ │ ├── ULX3S_25F.ys │ │ ├── clock.v │ │ ├── icesugar_pro.lpf │ │ ├── llhdmi.v │ │ ├── llhdmi_tb.cpp │ │ ├── pattern.v │ │ ├── pattern_tb.cpp │ │ ├── testb.h │ │ ├── ulx3s_25f_ULX3S_25F.bit │ │ ├── ulx3s_25f_ULX3S_25F.config │ │ ├── ulx3s_v20_segpdi.lpf │ │ ├── vgatestsrc.v │ │ └── ysgen.sh │ ├── litex_linux/ │ │ ├── README.md │ │ ├── build_top.sh │ │ ├── mem.init │ │ ├── mem_1.init │ │ ├── mem_2.init │ │ ├── top.bit │ │ ├── top.config │ │ ├── top.json │ │ ├── top.rpt │ │ ├── top.svf │ │ ├── top.v │ │ ├── top.ys │ │ └── top_bg256.lpf │ └── uart_tx/ │ ├── .gitignore │ ├── .top.lpf.swp │ ├── Makefile │ ├── rst_gen.v │ ├── top.lpf │ ├── top.v │ ├── uart_tx.v │ └── uart_tx_out.config └── tools/ ├── README.md ├── cmsisdap.cfg ├── dapprog ├── env.sh ├── ujprog.bit2svf ├── ujprog.bit2svf.arm ├── ujprog.bit2svf.x64 └── ujprog.patch ================================================ FILE CONTENTS ================================================ ================================================ FILE: README.md ================================================ iCESugar-pro ----------- * [iCESugar-pro](#iCESugar-pro) * [Hardware](#hardware) * [ECP5](#ecp5) * [SDRAM](#sdram) * [SPI-Flash](#spi-flash) * [Clock](#clock) * [Peripheral](#peripheral) * [JTAG](#jtag) * [iCELink](#icelink) * [Virtual machine image](#virtual-machine-image) * [How to setup](#how-to-setup-env) * [How to buy](#how-to-buy) * [Copyright Statement](#copyright-statement) * [Reference](#reference) # iCESugar-pro iCESugar-pro is a FPGA development board based on Lattice LFE5U-25F-6BG256C, which is fully supported by the open source toolchain (yosys & nextpnr), the board is designed in DDR2 SODIMM form factor with 106 usable IOs, with on-board 32MB SDRAM, it can run RISC-V Linux. The on-board iCELink debugger (base on ARM Mbed DAPLink) supports drag-and-drop programming, you can just drag the FPGA bitstream into the virtual disk to program, and with a additional USB CDC serial port direct connect to FPGA, so you can only use one Type C cable to develop and test.
# Hardware ### ECP5 LFE5U-25F-6BG256C (BGA256 0.8mm pitch) 1. LUTs: 24K 2. sysMEM Blocks: 18Kb x 56 3. Embedded Memory: 1008Kb 4. Distributed RAM bits: 194Kb 5. 18 x 18 Multipliers: 28 6. PLL x 1 ### SDRAM SDRAM uses IS42S16160B (32MB) ### SPI-Flash SPI Flash uses W25Q256JV (32MB) ### Clock A 25MHz crystal is connect to P6 ### Peripheral 2. a RGB LED is connected to {A11, A12, B11} 3. a SDCARD slot, support SPI/SDIO 4. 106 usable IOs out with SODIMM-DDR2-200P, broken out with the ext-board. ### JTAG The native JTAG of ECP5 is connect to the on-board iCELink, you can flash bitstream with this JTAG interface (called JTAG1). There is also another JTAG interface (actually, just some GPIOs of ECP5) connected to the iCELink too (called JTAG2), if you design a SoC with a JTAG interface support, then you can use the JTAG2 to debug your SoC. Only one JTAG works at once. So use the icesprog tool with command `icesprog -j 1 or 2` to switch between these two JTAG interface. ``` $icesprog -j 1 JTAG --> [JTAG-1] [JTAG-1] TCK: iCELink-PB6 -- ECP5-JTAG-TCK (25F-BG256-T10) TMS: iCELink-PB4 -- ECP5-JTAG-TMS (25F-BG256-T11) TDI: iCELink-PB5 -- ECP5-JTAG-TDI (25F-BG256-R11) TDO: iCELink-PB3 -- ECP5-JTAG-TDO (25F-BG256-M10) [JTAG-2] TCK: iCELink-PA14 -- ECP5-IO-PL8D (25F-BG256-F5) TMS: iCELink-PA13 -- ECP5-IO-PL17A (25F-BG256-H5) TDI: iCELink-PA0 -- ECP5-IO-PL38A (25F-BG256-N4) TDO: iCELink-PA1 -- ECP5-IO-PL17D (25F-BG256-J5) done ``` ### iCELink iCESugar-pro has a on-board debugger named iCELink (base on APM32F1)，only needing one USB wire to program the FPGA and debug it: 1. Drag and drop programming, just drop the bitstream into the virtual USB drive named iCELink then wait a few seconds while the iCELink firmware programs it for you. 2. USB CDC serial port, it can use to communicate with FPGA 3. 2 JTAG interfaces for flashing the ECP5 or debugging your SoC on ECP5 4. use the command tool `icesprog` to flash or do more config, here is the help info ``` $icesprog -h usage: /home/pi/oss/icesugar/tools/icesprog.arm [OPTION] [FILE] -w | --write write spi-flash or gpio -r | --read read spi-flash or gpio -e | --erase erase spi-flash -p | --probe probe spi-flash -o | --offset spi-flash offset -l | --len len of write/read -g | --gpio icelink gpio write/read -m | --mode icelink gpio mode -j | --jtag-sel jtag interface select (1 or 2) -c | --clk-sel clk source select (1 to 4) -h | --help display help info -- version 1.1a -- ``` #### Tips cause the iCELink connect some GPIOs to the ECP5, you can control this GPIOs with `icesprog` to do some self defined behavior, for example, to control the iCELink-PA14 -- ECP5-F5 line out low, type these command. ``` $icesprog -g PA14 -m out $icesprog -g PA14 -w 0 ``` #### How To Program There are multiple ways to program the bitstream. 1. Drag and drop programming, this is the fastest and simplest way to flash. 2. Using the command `icesprog xxx.bit`, this can provide more configable parameters. 3. Using the command `dapprog xxx.bit (program to flash) or dapprog xxx.svf (program to SRAM)` the `icesprog` binary and source code is in [icesugar](https://github.com/wuxx/icesugar/tree/master/tools) repo, and the `dapprog` is a bash wrapper of openocd command, click [here](https://github.com/wuxx/icesugar-pro/tree/master/tools) to check how to setup. # Virtual machine image link：https://pan.baidu.com/s/1vV2ckFpOuyd600Y47Tl1sw verify code：i3en `user: ubuntu` `passwd: ubuntu` The env include yosys, nextpnr, icestorm, gcc, sbt. # How to setup enviroment ## Linux It is reccomended that you use the virtual machine image, it simple and convenient.\ Alternatively, you can download the toolchain for programming the FPGA unit by following the instructions in the "Installing Toolkits" section below and the RISC-V compiler for running your code has a tutorial linked in the "Other tools" section. ## Windows If you don't want to use the virtual machine image you need to use the Windows Subsystem For Linux 2 (WSL2) as not all components of the toolchain has native windows versions.\ Install WSL using [this tutorial.](https://learn.microsoft.com/en-us/windows/wsl/install) By default it uses ubuntu, which this section is written for. Once WSL is installed and configured you can open it by searching for 'WSL' from the start menu.\ Once in the WSL desktop you will need to preform the following commands to install the needed toolkits. ## Installing Toolkits (Windows and Linux) The easiest way to get all needed tools is using the [YosysHQ oss-cad-suite](https://github.com/YosysHQ/oss-cad-suite-build). All you need to do is download and extract the repository to a location on your machine such as the home folder. After you extract it you'll need to update your PATH variable so your terminal can use the programs.\ Do this by editing your `.bashrc` file on your home folder using `sudo nano .bashrc` from there. Scrolll to the end of the file and in a new line add `export PATH="$PATH:/home/YOUR_ACCOUNT_NAME_HERE/oss-cad-suite/bin"` ### Other tools Dapprog is included in the tools folder and can be executed from there. ecpprog is included in the install for nextpnr and the RISC-V gcc toolchain used for code compilation can be installed using [this tutorial](https://github.com/riscv-collab/riscv-gnu-toolchain) ## Building demo files If you want to use the demo files as is you just need to program the bitstream provided in the [`demo`](./demo) folder. If you want to change how the demos behave you will need to rebuild them. For the blink, hdmi and uart tests you just need to run `make` in the same folder to update them with your changes. For the litex_linux demo you will need to have the [litex repository](https://github.com/litex-hub/linux-on-litex-vexriscv) downloaded locally and will need to modify the `top.ys` file where it lists `INSTALL_DIR` with the location you put the repo. # How to buy You can buy iCESugar-pro and PMOD peripherals from our offcial aliexpress shop [Muse Lab Factory Store](https://miusecn-muselab-tech.aliexpress.com/) or [Tindie Store](https://www.tindie.com/products/johnnywu/icesugar-pro-fpga-development-board/) # Copyright Statement The HDMI test verilog source code is from [github.com/DoctorWkt/ULX3S-Blinky](https://github.com/DoctorWkt/ULX3S-Blinky) The Litex on Linux project is from [github.com/litex-hub/linux-on-litex-vexriscv](https://github.com/litex-hub/linux-on-litex-vexriscv) For hobby and personal usage, you are free to use the iCESugar-pro, you can also make the board yourself using the documentation & firmware in this repo. For the commercial usage, if you get iCESugar-pro Board from our official shop and use in other commercial product, that's no problem, otherwise, please contact us in advance. # Reference ### Colorlight-FPGA-Projects https://github.com/wuxx/Colorlight-FPGA-Projects ### icestorm toolchain http://www.clifford.at/icestorm/ ### riscv gcc toolchain https://xpack.github.io/riscv-none-embed-gcc/install/ https://www.sifive.com/software ### iCESugar https://github.com/wuxx/icesugar ### iCESugar-nano https://github.com/wuxx/icesugar-nano ### Examples https://github.com/damdoy/ice40_ultraplus_examples https://github.com/icebreaker-fpga/icebreaker-examples ### SpinalHDL https://spinalhdl.github.io/SpinalDoc-RTD/SpinalHDL/Getting%20Started/index.html ================================================ FILE: demo/README.md ================================================ ## litex_no_dram `$picocom -b 115200 /dev/ttyACM0` `$dapprog litex_no_dram.bit` ## litex_with_dram `$picocom -b 38400 /dev/ttyACM0` `$dapprog litex_with_dram.bit` ================================================ FILE: demo/blink.svf ================================================ HDR 0; HIR 0; TDR 0; TIR 0; ENDDR DRPAUSE; ENDIR IRPAUSE; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (0E); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); SIR 8 TDI (46); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (7A); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2B8D00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000051B88941000000620000000200000044C20888820000004700 0000DCFFFFFFFFCDBDFFFFFF006CAC4C82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF91DE0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000040000 0000FFBDCB0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000001FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000400FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF91DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000400000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFC58A000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000001000000000FFA212000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000800000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFA23C000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000200FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFC5D6000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 48390000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000001800000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF4CDE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000010000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE6B800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000008000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FFCA03000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000006000000FFAD 81000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000020000006000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF8F9F0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000040000000000000FF858E0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000004000000000000000FF858E0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000004000000000000000FF47050000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006000000000000000FF47050000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000006000000000000000FF88380000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000006001000000000000FF7D090000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0001006000840000008000FFD0AA0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000100 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF579B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004000001); SDR 8000 TDI (FF769E00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000004000000004000000FF9E11 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000022C000000004000000FFCA8C000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000002000000042000000FF5E38000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000680000000080000000FFEAB9000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800000000206000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF02FF000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000818000001040000000FFBE55000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000046000000806000000FFCD9D000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006000000006000000FFD8C3000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00512000000506000000FFE091000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000008020 00000006000000FF5A32000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000010000000000 06000000FFCA03000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000060000); SDR 8000 TDI (04C30000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000002000002000040000FF9A8600 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000001000001001000000000FF122C00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000001002001003000000000FF5BED00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000004000006000000000FF421100000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000004000800000000000FFC83100000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000002000002000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFA88200000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000800000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF870400000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000800000000000FF67BF00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000800001 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF3C0700000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000002000800002000000); SDR 8000 TDI (FE000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000002000000062A0000000FF7C710000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000006800000000FFBCDF0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000510001006550000000FF074A0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000002AE0000062A8000000FF08270000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000046000006000000000FF0CD50000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000002240008062A0000000FF8FBC0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000014000006000000000FF9F4F0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000084000006008000000FF5BED0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000004000006000000000FF5BED0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 4000006000000000FF971F0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000400000 6000040000FF9EF80000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000600000 0000FF9EF80000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000006000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000040006000000000FF9EF8000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000006000000000FF54D1000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000008000006000000000FF7DD9000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000002A00002AE000000000FF9EF8000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000006000000000FFB7F0000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000002A80002AE000000000FFD290000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000548000556000000000FF9EF8000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000006000000000FFF7F9000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 002000002AE000000000FFC58A000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000001100 00004000000000FF7659000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000200000060 00000000FF89DC000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000100000050100000 00FFCABB000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000140000006000000000FFE6); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000002AA000000000FF36C600000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000024000000000FF018200000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000288000000000FF7CE700000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000026000000000FF9EF800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000006000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF9EF800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006000000000FF9EF800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000006000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF271900000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000020000000 000000FF9EF800000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000006000000000 FF9EF800000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000006000000000FF51FC); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000001004002002000FF87040000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000800000000000FF07370000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000002002802000FFE0E80000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000004006006000FFCABB0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000004000800000FF19550000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000002002002000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFC58A0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000001000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFC4A60000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004 0000000000FF4BA30000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000028A00000 0000FFD4D90000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000004000000000FF 56EB0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000514000000000FFA9BC00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000846006000000FF1460000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006006000000FF1460000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000006006000000FFDB5D000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000001006006000000FF1460000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000006006000000FF053E000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000001000006000000FFCA03000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000006000000FF6DE8000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006004000000FF3DFE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00006066000000FFCA03000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 06000000FF3913000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000020000 00FF9EF8000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000006000000000FFA8 BF000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000006800004000FF080B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000001006000000000FF9EF800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000006000000000FF9EF800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006000000000FF9EF800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000006000000000FF9EF800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006000000000FF9EF800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000006000000000FF9EF800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006000000000FF126700000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000001846000000000FF317600000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 806806000000FF905D00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000046006 000000FF905D00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000046006000000 FFF6E900000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000006806000000FF1460 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000006006000000FF57C2000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000010020C1312000FFCDD40000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000200B0CB00C00000FF2AFC0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000002000FFA0AB0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006488126000FFA5A60000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000096040010000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF876C0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000200800008800000FFDCCB0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000516300040000FF9EF80000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 6000000000FF8FA60000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000100000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 59670000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000806000000000FF596700 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000806000000000FF51C500000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000003012202002000FFC260000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000006004006006000FF09B8000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000844880800000FF2B38000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000002002452002000FFF01A000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000002880002A8000FF11E9000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000020480000000FF074B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000002A84882A8000FF0B58000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000008 00D10840D50000FF0767000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000010010 41000000FFFC5F000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000002880102A80 00FFF3A8000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000800802A00802000FF38 F7000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000844948800000FF822D0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000008C200006000FF07710000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000007556006556000FFDADF00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000062AE0062AE000FF884100000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000006006006006000FFE6A300000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000062880062AE000FF158000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000006840006006000FF563800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004006006006000FF6A0500000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000006046006026000FFB43D00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000006 020006006000FF44E200000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000006410006 006000FF830400000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000016000040000 FF108F00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000406004006000FFB206 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000240C002002000FF84CB000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000001400200000000FF11BC000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000006006006000FF3F230000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000075828E2AE2AE000FF0D9A0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000120006007006000FFEC750000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000002AE2AE2AE000FFB23B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000210556556D56000FFAAC90000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000006006006000FFB7910000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 002228E2AE2AE000FF5A0F0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000040602 6006006000FFCDB50000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000010E00600600 6000FFCBE30000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000006846006006000FF BD040000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000006006006006004FF0D8500 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000628E0062AE004FF477C00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000007006006006000FFE24000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000288842002000FF4A19000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000026446D06000FF736D000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000006108028000FFFC36000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000001004804000FFD231000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000040007806000FFAAC9000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006006006000FF367E000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00106016006000FFF097000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000400 06006000FFD5C5000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000D00081468060 00FFF135000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000001000160B6006000FF96 0D000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000006007006000FFC6FE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000028106007806000FF7BC70000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000140026006006000FFAAC90000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000002000000000FFD4D900000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000004000000000FF1BE400000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000001004000000000FF0ABA00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000002000000000FF8FA600000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000001000000000000FF8FA600000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000001000000000000FF279500000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 021000000000FF5EF900000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 800000FFBDF600000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000028A2AA2AA000 FF5C4300000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000005209050000FFCA27 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000555557D56000FFA605000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000002AA082282000FF51C8000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000005000000000FFC1F0000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000006000000000FF51C50000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000001006000000000FF9EF80000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006000000000FF6D2F0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000001000800000000FF9B3A0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000A0000080000000FF7CE70000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000026000000000FF3C1C0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004 6900000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF738A0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000140000000000000FF 9EF80000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000006000000000FF9EF800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000006000000000FFD4D900000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000004000000000FF8FA600000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000001000000000000FF0ABA00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000006006000000FF1460000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000006006000000FF1460000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006006000000FFDB5D000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000001006006000000FF1460000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006006000000FF1460000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00006006000000FF51C5000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000010060 00000000FF9EF8000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000060000000 00FF9EF8000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000006000000000FFFD 7A000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000016500200000FF4FF60000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000016000000000FF91C90000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000006000400000FF8BED0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000006500000000FF9EF80000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000004002000000FF9EF800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006000000000FF666800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000296000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF2B4500000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000800906000000FF965200000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 516006000000FF146000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000006006 000000FF053E00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001000006000000 FF053E00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000001000006000000FF1460 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000006006000000FF1460000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000006006000000FF1460000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006006000000FF1460000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000006006000000FF1460000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000844000000000FF0ABA0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000002000000000FF01820000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000288000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE39D0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00002A8000000000FF810B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000D5 0000000000FF8FA60000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000100000000 0000FF01820000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000288000000000FF 30900000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000842002000000FF134600 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000804000000000FF7EBF00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000008C006000000FF391E00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000001003002000000FF1D5900000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000908080000000FFAD5100000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000006080000000FF7F2A000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000002E8020000000FF91DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000400000000FFF095000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006090000000FF4FBD000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00006400000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF565B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000006200000000FF5D 36000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000406000000000FFD4D90000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000004000000000FF1DF70000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000001480600000000FFC5870000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000001002000000000FF442B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000104000000000FF977B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006000000000FF3DFE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000002AE000000000FF98F700000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000556000000000FF9EF800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000006000000000FFDFE100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 28E000000000FF7CE700000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000026000 000000FF9EF800000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000006000000000 FFC5D000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000846020000000FF2D95 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000006480000000FF79C2000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000028E008000000FF02A2000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000001006148000000FFF71B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000556428000000FF0EA4000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000028E400000000FFFCD0000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF9EF80000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006000000000FF9EF80000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 6000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 9EF80000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000006000000000FF545600 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000060E000000000FF4FF600000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000016000000000FF7CE700000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000026000000000FF9EF800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006000000000FFDFE100000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000028E000000000FF9EF800000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000004000000000FF7332000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000002002000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFA284000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000200 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFEBA2800000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000028A000000000FFD4 D9000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000004000000000FFD2D60000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000554000000000FFA9BC0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000002AA000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF95C00000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000028C000000000FF7CE70000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000026000000000FF9EF80000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000006006000000FFCA0300000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000006000000FFF21D00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000080040086000000FF146000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 006006000000FF35EA00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000246106 000000FFCA0300000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000006000000 FFF5D800000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000100400006000000FF9EF8 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000006000000000FF9EF8000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000006000000000FF3913000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000002000000FF1BE4000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000001004000000000FFBC0F000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000001002002000000FF5E41000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000004006000000FFD4D9000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000006000000000FF9EF80000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000006000000000FF9EF80000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006000000000FF51C50000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000100 6000000000FF14600000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000600600 0000FFD3FF0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000806006000000FF 14600000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000006006000000FFBEEB00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000006286000000FF146000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000006006000000FFD03000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000006106000000FFC52500000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006406000000FF146000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000006006000000FF146000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006006000000FF146000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000096000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8704000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00800000000000FF0A5B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000D060 00000000FF9EF8000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000060000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF9EF80000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000006000000000FF59670000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000806000000000FF9EF80000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000006000000000FF9EF80000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000006000000000FF9EF80000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006000000000FF9EF80000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006000000000FF9EF80000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000002882A8000000FFA28400000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000020000000000FFF7BF00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 2A82A8000000FF2D7200000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000D10550 000000FF8FA600000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001000000000000 FFF7BF00000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000002A82A8000000FFCD25 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000802000000000FFF1CF000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000804800000000FFF427000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000008C000000000FFC587000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000001002000000000FF00DA000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000B04800000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF9EF8000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006000000000FF078F000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000044000000000FF9EF80000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006000000000FFDBFF0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 2400000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFD4D90000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000004000000000FF 565B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000006200000000FF0E0A00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000106000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF8B1600000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000001104000000000FFC58700000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000001002000000000FFD4D900000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000004000000000FF977B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000844000000000FF0ABA00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000002000000000FF15A000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000550000000000FFD4D9000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00004000000000FFDFE1000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000028E0 00000000FFE8A5000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000220000000 00FF9EF8000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000006000000000FF8E 87000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000042000000000FF9EF80000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000006000000000FF849E0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000128A000000000FF9EF80000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000006000000000FF0CB50000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000552000000000FF3DFE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000002AE000000000FFCD250000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000802000000000FF01820000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000288000000000FF50E40000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000004000000000FF1C7A00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 004200000000FFD4D900000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000004000 000000FFD4D900000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000004000000000 FFD4D900000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000004000000000FFD4D9 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000004000000000FFD4D9000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000004000000000FFD4D9000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000004000000000FF36C6000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000024000000000FFD4D9000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000004000000000FF95C0000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000028C000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF77DF000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000002AC000000000FF4694000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF217C0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000020000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 685A8000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000AA000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF5B3900000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000156000000000FFA9BC00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000002AA000000000FF217C00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000200000000000FFA9BC00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000002AA000000000FFD4D900000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000004000000000FF9EF800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000006000000000FF1C7A00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000004200000000FFD4D900000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF7F6C00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000002000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE09A800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000004FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF368D00000000000000000000000000000000000000080000000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF368D00000000000000000000000000000000000000080000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF368D000000000000000000000000000000000000000800000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF36 8D000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000002000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF423B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 02000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF423B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000020000000000 00000000000000000000FF477B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000060000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF423B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004000000000000000000000000000000FF45DB00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004000000000000000000000000000000FF45DB00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004000000000000000000000000000000FF45DB00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004 000000000000000000000000000000FF45DB00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000FF45DB00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004000000000000 000000000000000000FF45DB00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004000000000000000000 000000000000FF45DB00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004000000000000000000000000 000000FF45DB00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004000000000000000000000000000000 FF45DB00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004000000000000000000000000000000FF45DB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004000000000000000000000000000000FF45DB000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004000000000000000000000000000000FF45DB000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004000000000000000000000000000000FF45DB000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF45DB00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004000000000000000000000000000000FF45DB00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004000000000000000000000000000000FF45DB00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFC083000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000800000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFC083000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE81D00000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000002A8000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE81D 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000002A8000000000000000000000000000000FF5194000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000550000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFE81D000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000002A8000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFBDCB00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000001FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000001FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000002000000000000000000 000000000000000000000000000000000000000000000000000000FFA6FF00000000000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF93BA00000000000000); SDR 8000 TDI (00000000000000000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF097A000000000000000000000000000000 00000000080000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF097A000000000000000000000000000000000000000800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF09 7A000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF097A000000000000 00000000000000000000000000080000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF097A000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000001000000000 0000000010000000000000000200FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF607A000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF60 7A000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000080000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA23C0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000200FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF7C4A0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0008000000000000000010000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFDE8A0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF9C86000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 10000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF9C86000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000100000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF23FF00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000008000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF23FF000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000008000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF99690000000080000000080000000080000000080000000020000000020000 00002000000002000000002000000002000000002000000002000000002000000002000000002000 0000020000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF68590000004000000004000000004000000004000000001000000001000000001000000001 000000001000000001000000001000000001000000001000000001000000001000000001000100FF 91C90000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000100FFE75600 00000200000000200000000200000000200000000080000000080000000080000000080000000080 000000080000000080000000080000000080000000080000000080000000080000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF9A860000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000001000001001000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF997C0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000080000FF7EFF0000001000000001000000001000000001000000000400 00000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF7EFF00000010000000010000000010000000010000000004000000004000000004000000 00400000000400000000400000000400000000400000000400000000400000000400000000400000 FF997C00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000080000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 2952 TDI (FFFFFFFF0000007A11 110000000000000143FFFFFFFFFFFFFFFFFFFFFFFFFFE75600000002000000002000000002000000 00200000000080000000080000000080000000080000000080000000080000000080000000080000 000080000000080000000080000000080000FF558E00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000C0000FF60EC00000040000000040000000040000000040000000010 00000001000000001000000001000000001000000001000000001000000001000000001000000001 000000001000000001080000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF996900000000800000000800000000800000000800000000200000000200); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK 1.00E-02 SEC; SIR 8 TDI (C0); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SDR 32 TDI (00000000) TDO (00000000) MASK (FFFFFFFF); SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-01 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000100) MASK (00002100); ================================================ FILE: demo/blink_blue.svf ================================================ HDR 0; HIR 0; TDR 0; TIR 0; ENDDR DRPAUSE; ENDIR IRPAUSE; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (0E); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); SIR 8 TDI (46); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (7A); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2B8D00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000051B88941000000620000000200000044C20888820000004700 0000DCFFFFFFFFCDBDFFFFFF006CAC4C82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFE0 9A800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF097A00000000000000000000000000 00000000000008000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40B000040080000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF80CA00000100000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF80CA 00000100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80B2000000 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE09A800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF80CA00000100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80CA00000100000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF80CA00000100000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF80CA00000100000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF80CA00000100000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF80CA00000100000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF809900040000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF80B200000080000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF80990004000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF80990004000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF591B000078 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFD09A000100000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF519B000050000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8099000400000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8099000400000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 218A0002050000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF80B200 00008000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFA01A0000A800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF803A00000200000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF60BB0000AA00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFA19B00035000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF809900040000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFA89A00008000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF41D800040400000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF919900045000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFA01A0000A800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF209A00020000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF80B20000008000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF80B20000008000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF40E30000018000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF40E30000018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF80990004000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40B00004008000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF80CA0000010000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF4ACB 00002100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF60C30000AB 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF148B000115000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF40E3000001800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF6A63000089800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF94E2000041800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF81A2000005800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF40E3000001800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF80CA000001000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF80CA000001000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF40E300000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF40E300000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF40E300000180000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF40E300000180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF40E300000180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF40E300000180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF40E300000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF40E300000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF51E300005180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF804200000380000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA8E200008180000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF68CB0000 81000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF80B20000008000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF00938000AA8000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF00A30001558000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFA0920000AA8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFA0920000AA8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF85E2000011 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE598000010080000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF55A3000045800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF40E3000001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF40E3000001800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF80CA000001000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF10B3000100800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF80 CA000001000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF40E300000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF40E300000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF4FE000040180400000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF10E300020184000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF20E200020180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF3F6300000182200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80E100040180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF40E300000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF40E300000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40E300000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF05A600014590000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFA8E2 00008180000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FFA3A20000A58000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF209A0002000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF05A00005458000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF40E30000018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF80990004000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF80990004000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF40E30000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80E10004018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FFA23A0000A2000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF60BB0000AA000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF60DA000354000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF8099000400000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFA23A0000A2000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF25B2000210800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFE0CB000201000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8A6A000023000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF40B0000400800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF343A000242000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF80 CA000001000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF40E30000 01800000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF209A00020000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF40E300000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF80E700000190000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF20E100000188000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF40E300000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF80CA00000100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF403800040200000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40B000040080000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF418B00000500000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF25CA 00021100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80B2000000 80000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF00A30001558000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF40E30000018000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA2420000A38000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF82620000098000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF40E30000018000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFE5E30002118000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFA2420000A38000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF60A20003558000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF C2430002A38000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFA5BA0000BA00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF40E3000001800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF40E3000001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF40E3000001800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF40E3000001800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8262000009800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA2 420000A3800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF40E30000 01800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF60C30000AB8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF821A00000800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF62130000A280000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80CA00000100000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFC08A00015500000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFA0920000AA80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF80CA00000100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA23A0000A200000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF8262 00000980000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF40E3000001 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF40E30000018000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF40E30000018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF80CA0000010000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80B20000008000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF80CA00 00010000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF80CA00000100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80B200000080000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF53C3000051801800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFE0E0000601800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF8262000229878000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF40E3000001800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF40E3000001800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF40E3000001800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF20E2000201800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFD1 A7000105900000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF68430000 83800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF40E30000018000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF809F0000001000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FFFCB400020030980000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF388200014584580000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF42C300000180180000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF82B900040000180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF42BB00000000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF82C100040180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF42C300000180180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF42C300000180180000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF42C300000180180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF42C3 00000180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF42C3000001 80180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF42C3000001801800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF42C3000001801800000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF60BB0000AA0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF65D00003442000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF808B000C004000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF623D0008A20000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE159000200A008000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF25CA0002110000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF884A0000230018000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF8E45000400C048000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF DC3B0002C20000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF412B00 00010008000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF2E6300000182 E0000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF2BA100002588000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF42BB00000000180000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF42C3000001801800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF42BB000000001800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF82BF000000101800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF9222000051801000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF812F000001100800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5138000452000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8151000400800800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF43 AB000005001800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE5C10002 11200000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF41530000008008 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA23A0000A20000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF821A0000080000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF61E10000A38AB80000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF804200000980180000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF42C300000180180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF3FC300001182180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF194200020181380000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFC0600000A388180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF4DC600000190580000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF4B000001558CB80000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFC4E1 0004AB82980000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF42C3000001 80180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFA01A0000A2001800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFB7BB000010041800000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF3B4100000188B800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF13230001018010000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF42BB0000000018000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF8A9A00002A0018000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF42C30000018018000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF92820000558018000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFD2C20001018018000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF80420000098018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 42C30000018018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF61E100 00A38AB8000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF42C300000180 18000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFA3600000AB8AB80000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF018B00115595580000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF42C300000180180000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF821A000008000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF808E000000400000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFC4648800A2CAA800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF70C0000001240000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF01AF000155155800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFB8E60000AAC0A800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8C9A100000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA3 850000A3300800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFD0410000 098C1800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFD3E28000018140 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF82B00000002018000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF42BB0000000018000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF42C30000018018000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF4AE300001180400000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFD09A00010000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF40E300000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF40E300000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF80CA00000100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF80B2 00000080000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80CA000001 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF80CA000001000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF40A7000000C00000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF8090000000200000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FFF4E30002418000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF40E30000018000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF94E20000418000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFE0E30004018800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF40E30000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80E70000019000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF81A200 00058000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF40E300000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF871A00000000200000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFAB2200008D80000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF42C3000001801800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF42BB000000001800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF42BB000000001800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF22C2000201801800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF22C2000201801800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF80E1000401800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 E3000001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75A60000 01800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF40E30000018000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF40E30000018000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF40E30000018000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF40E30000018000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFE0E00006018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF809900040000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFA23A0000A200000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE45300021080080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF230A00020100100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF79AA00002304100000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF829400040090180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF7DDB 00024806100000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF2129000001 08080000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF80E7000001900000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF63B70000A5C00000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF42BB000000001800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF2030000208201800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF96C7000341941800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF80CA0000010000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF80CA0000010000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF408C0004004000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80A5000400C000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF80CA00 00010000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF25CA00021100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80B200000080000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA23A0000A200000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF60BB0000AA00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF60DA00035400000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFBFF7000010804000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF20E2000201800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF91410000A2CA8000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF03 F7000154954000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFC6C10002 B38AA000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF80B20000008000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA4380000A20A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF4ADF0000114040000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF40E30000018000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF80B20000008000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF80CA00000100000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF10CB00010100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF68CB00008100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF80CA00000100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF424B00000900000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFB58F 00000100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF626B0000A3 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FFA0EA0000AB000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF00DB000154000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF80CA000001000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA2420000A3800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF4233000008800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FFE89280002A8000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF90A20000558000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFA0920000AA8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF A89A0000800000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFA09200 00AA8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF80CA00000100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF40CE00000110000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF80CA00000100000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF80CA00000100000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF80CA00000100000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF40CE00000110000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF808E0000004000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF80900000002000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFA89A0000800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFE5DF00010000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FFD09A 00010000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFC89B000000060000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF40E30000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75A600000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75A600000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF40E300000180000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF40E300000180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF40E300000180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF8158000000A00800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF1383000105801800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFCD C0000428D30800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF41530000008008 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF075E0000001310000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF55DB0000440000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF90010001318C88000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF98EC000201B200000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF34E20002218080000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF20E20002018000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF835A00000000100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF817A00000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF817A 00000000080000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF42BB000000 00180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE091000200200000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF817A000000000800000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF8090000000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF408C000400400000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF947D0000AA0AA0000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF F89A0000000200000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFC3DE00 01541540000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF19390000AA08 A0000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF60BB0000AA00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF049B00000003000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF471E00000010200000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF42C3000001801800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8696000015C01800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF42 C3000001801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF77860000 01801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF83400000018AB8 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF77860000018018000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF83400000018AB8000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF81C60000019558000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF42C30000018018000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF81180000000AA0000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF1093000105D5580000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF06510000A888280000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF918E 00005040000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF8146000000 C0080000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF66BF000040141800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFC5DA00011400C000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF434F000000401000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF42C3000001801800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF42C3000001801800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFD2C2000101801800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF82C8000001A01800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF4683000015801800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFAAC2000081801800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF688F00008040000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF90DA00005400000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF20D18000008AA80000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8C2F00000245000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000004FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000800000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF81DF0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000001000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF2039000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000004000000000000FFBC6A00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004000000000000FFBC6A00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004000000000000FFBC6A00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FFBC6A0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004000000000000FFBC6A0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004000000000000FFBC6A0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004000000000000FFBC6A0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004000000000000FFBC6A0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000FFBC6A0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004000000000000FFBC6A0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004000000000000FFBC6A0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000FFBC6A0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000FFBC6A0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000400 0000000000FFBC6A0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000400000000 0000FFBC6A0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004000000000000FF BC6A0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF26A3000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000002AA000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF5292000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000556000000000000FF26A3000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000002 AA000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF26A3000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000002AA0000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF368D00000000000000000000000000000000000000080000000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF368D00000000000000000000000000000000000000080000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF368D000000000000000000000000000000000000000800000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF36 8D000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000002000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFBDCB00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000001FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000001FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000002000000000000000000 000000000000000000000000000000000000000000000000000000FFA6FF00000000000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF93BA00000000000000); SDR 8000 TDI (00000000000000000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF097A000000000000000000000000000000 00000000080000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF097A000000000000000000000000000000000000000800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF09 7A000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF097A000000000000 00000000000000000000000000080000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF097A000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000004000000000 0000000010000000000000000200FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF607A000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000800000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF01 59000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000100000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA23C0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000200FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFBCE30000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0020000000000000000010000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF1FDB0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF9C86000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 10000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF9C86000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000100000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF23FF00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000008000000000000000000000000000000000000000000000000000000FF23FF00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000008000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF99690000000080000000080000000080000000080000000020000000020000 00002000000002000000002000000002000000002000000002000000002000000002000000002000 0000020000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFB90B0000004000000004000000004000000004000000001000000001000000001000000001 000000001000000001000000001000000001000000001000000001000000001000000001000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFE75600 00000200000000200000000200000000200000000080000000080000000080000000080000000080 000000080000000080000000080000000080000000080000000080000000080000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF408C0004004000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF7EFF0000001000000001000000001000000001000000000400 00000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF7EFF00000010000000010000000010000000010000000004000000004000000004000000 00400000000400000000400000000400000000400000000400000000400000000400000000400000 FF997C00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000080000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 2952 TDI (FFFFFFFF0000007A11 110000000000000143FFFFFFFFFFFFFFFFFFFFFFFFFFE75600000002000000002000000002000000 00200000000080000000080000000080000000080000000080000000080000000080000000080000 000080000000080000000080000000080000FF558E00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000C0000FF60EC00000040000000040000000040000000040000000010 00000001000000001000000001000000001000000001000000001000000001000000001000000001 000000001000000001080000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF996900000000800000000800000000800000000800000000200000000200); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK 1.00E-02 SEC; SIR 8 TDI (C0); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SDR 32 TDI (00000000) TDO (00000000) MASK (FFFFFFFF); SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-01 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000100) MASK (00002100); ================================================ FILE: demo/blink_flash.svf ================================================ //ULX2S / ULX3S JTAG programmer v 3.0.92 (built Sep 19 2020 14:37:22) //START STATE IDLE; STATE RESET; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK; SIR 8 TDI (0e); SDR 8 TDI (01); RUNTEST IDLE 32 TCK 1.00E-01 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); STATE RESET; STATE IDLE; SIR 8 TDI(FF); RUNTEST IDLE 32 TCK; SIR 8 TDI(3A); SDR 16 TDI(68FE); RUNTEST IDLE 32 TCK; SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000001B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000801B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000401B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000c01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000201B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000a01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000601B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000e01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000101B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(20); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF2B8D000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000051B889410000006200000002000000 44C208888200000047000000DCFFFFFFFFCDBDFFFFFF008C1CCC82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF00000040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000800040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000400040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000200040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000a00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000e00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000100040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000900040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000500040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000d00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000300040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000700040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF91DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000400000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000880040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000400000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000480040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF91 DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000280040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000a80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000680040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000e80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000180040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000980040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000001FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000580040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB00000000d80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000380040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000b80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000780040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF277100000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000600FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF2703000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000001800000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000040040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000840040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000440040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000c40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000240040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000640040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000e40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000140040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000940040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000540040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000040000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF718F0000000000000000000000000000000000000000000000000000000000000000000000000000000000340040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF84CB00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000100000000FF581100000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0020000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000b40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF84CB0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000100000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000740040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8FA600000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000001000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000f40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF C58A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000001000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000001000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF658D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000800800000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFC58A000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 000000FFC58A0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000cc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000800000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000800000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFA2120000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFA212000000000000000000000000000000000000000000006c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FFD4D90000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000004000000000FF9EF800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9EF800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006000000000FF9EF8000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FFD4D9 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000004000000000FF9EF80000000000000000000000000000000000000000000000009c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000006006000000FF14600000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF9EF80000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000006000000000FF9EF800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF005c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000006006000000FFFDFF00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006006008000FF1460000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF1460 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006006008000FF14600000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF14600000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000006006000000FF146000000000000000000000000000000000000000000000000000003c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000004000000FF6E7000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000002AA2B2000000FF9EF800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006000000000FF38DB000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000006008000000FFFDFF00bc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004000000FF43A3000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000556554000000FF62350000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000002AA2A2000000FFB38B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFE6B800000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000008000000FF623500000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000002AA2A2000000FFB38B00000000000000000000000000000000000000000000000000000000fc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000004000000000FF91BB000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000002802000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF8FA60000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000FF409B000000020040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF91BB0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000002802000000FF5E4100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000004006000000FFD4D900000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000820040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000006000000000FF51C5000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000001006000000000FFAD51000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000004002000000FF409B000000000000000000000000000000000000000000000000000000000000420040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000006002000000FFB2180000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000006186000000FFCA030000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000006000000FFB38B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004000000FF9EF80000000000c20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000407006000000FFABE400000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000200006000000FFCA03000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000006000000FFE770000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000220040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006806000000FF14600000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000006006000000FF14600000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006006000000FF52BF0000000000000000000000000000000000000000000000000000000000000000a20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000600E000000FFF6E900000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000006806000000FFFE4B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000001806806000000FFDB5D000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000001006006000000FFF6E900000000000000620040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000006816000000FFF67F000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000026006000000FF14600000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000006006000000FFB2430000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006006000000FF5E4C00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000001007006000000FF905D00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000046006000000FFFAAC00000000000000000000000000000000000000000000000000000000000000000000120040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0001006006000000FF1460000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000006006000000FFF6E9000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006806000000FF14600000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000006006000000FF1460000000000000000000920040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000001000006000000FF31760000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000806806000000FF146000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000006006000000FFDB5D00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000520040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000506006000000FF1460000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000006006000000FF053E000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000001000006000000FF053E000000000000000000000000000000000000000000000000000000000000000000000000d20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00E60C000000FF078F0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000096000000000FFB38B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004000000FF618F00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000810A4E000000FF475C0000000000000000000000320040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000001003402000000FFDC0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000B04920000000FF3913000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000002000000FFBAAA000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 842902000000FFF1CF0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000804800000000FFBAEF0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000008C106000000FFE85B0000000000000000000000000000000000000000000000000000000000000000000000000000720040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000002A85 28000000FFF3C600000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000D10B20000000FF0AB700000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0001001000000000FF7BCD000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000288238000000FF164900000000000000000000000000f20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000002492000000FF0182000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 288000000000FFC4A60000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000040000000000FF48210000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010420 02000000FF619A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000100404006000000FF6D7800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000844820000000FFCC1A000000000000000000000000000000000000000000000000000000000000000000000000000000008a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000600008 0000FFA123000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000080416004000000FFDB0C000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 020002000000FFCAEA0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000001014000000000FF38320000000000000000000000000000004a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000006000100000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF471F00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028815000 0000FFF9F7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000040050000000FF8BED000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 006500000000FF6D350000000000000000000000000000000000000000000000000000000000000000000000000000000000002a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000000 FF7F8E0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000001556550000000FFF55D0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002AE2 00000000FF596700000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000806000000000FFF8830000000000000000000000000000000000aa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000046000000000FFABBD00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600000 0004FF3919000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000A8E2A8000004FF51C5000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001006a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028E2A8000000 FF7CE70000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000026000000000FF9EF80000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060 00000000FF1AC50000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06000000FFA3 4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000002AE2AE000000FF3A2B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055655600 0000FF1460000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000006006000000FFCBC3000000000000000000000000000000000000001a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000026006000000FF1460000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000 FF415B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000028E2AE000000FF14600000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060009a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FFD7 AE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000406006000000FF85BE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014700600 0000FFF67F000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFC36100 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000546006000000FFCA03000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006000000 FF4F120000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000001006000000FF1460000000000000000000000000000000000000000000da0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000006010000000FF51020000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000804000000FFCA 0300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000006000000FF146000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600600003a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000020800000000FF3FD500 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000028C842000000FFD27E000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026546000000 FF92BD000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF5478000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000004880000000FF71260000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000515556000000FFBE B400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000002AA20A000000FF400D00000000000000000000000000000000000000000000007a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000001000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF41B700 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000041000000000FF2609000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028A2AA00000000fa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000004000000000FF5E86000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000001002802000000FF658D0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000800800000000FF8F A60000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A60000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001000000000000FF733200000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000002002000000FF5E4100 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000004006000000FFD4D900000000000000000000000000000000000000000000000000860040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000096000000FF9EF8000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF9EF8000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000006000000000FFAD510000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000004002000000FF8F00460040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF5FD60000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000060E6000000FF288A00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000806000000FFA46E00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000001006006000000FF288A000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000806000000FFC646000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000016000000FF1460000000000000000000000000000000000000000000000000000000260040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000806186000000FF14600000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF14600000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000006006000000FFDB5D00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000001006006000000FFDB5D0000a60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000006006000000FF905D00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000046006000000FF905D000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000046006000000FF7587000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000660040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000001006000000000FF965A0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000001806000000000FFF6E90000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000006806000000FF14600000000000000000000000000000000000000000000000000000000000e60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000006000000000FF9EF800000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000006000000000FF7C7100000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006800000000FF9EF8000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF51C500000000160040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000006000000000FF9EF8000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000006000000000FF9EF80000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF9EF80000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000960040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF51C500000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001006000000000FF9EF800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006000000000FF9EF800000000000000000000000000000000000000000000000000000000000000560040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000800020000000FFCE40000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000D16500000000FF9EF8000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000006000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000d60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000063E0000000FF078F0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000096000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF9F8E00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000360040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000001002020000000FFFC1F000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000B08800000000FFD4D9000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000004000000000FFD9BD000000000000000000000000000000000000000000000000000000000000000000b60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000288020000000FF9C9A0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000802D08000000FF75F20000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000844800000000FF960F00000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000008C080000000FFDD0D0000000000000000760040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000002A8028000000FF9D4600000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000D10928000000FF689F000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000001001080000000FF1908000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000002202000000FFB2EF0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000288480000000FF73C10000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000020400000000FF5D3400000000000000000000000000000000000000000000000000000000000000000000000e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 01508000000000FF383200000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000001042002000000FF738A00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000050014006000000FFE2C5000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000844848000000FFBB91000000000000000000008e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000006000080000FF5194000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000028026004000000FF84CF0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000284002000000FFB41D0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00006006100000FFCA0300000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000006000000FFCA0300000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000006000000FF471F00000000000000000000000000000000000000000000000000000000000000000000000000ce0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 6006000000FF8B1A000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000288006000000FF4E3E000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000040006000000FF14600000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000006006000000FFE7AD0000000000000000000000002e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000006006000000FF126F0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00556006000000FF785B00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000012AE006000000FF146000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004 6006000000FF1460000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000006006000000FF92E6000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000A8E006000000FF14600000000000000000000000000000000000000000000000000000000000000000000000000000006e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006006 000000FF415B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000028E2AE000000FFF67F0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00026006000000FF146000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000006006000000FF905D0000000000000000000000000000ee0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000006006000000FFA34400000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A E2AE000000FF3A2B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000556556000000FF1460000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026006 000000FF14600000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000006006000000FF415B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0028E2AE000000FF146000000000000000000000000000000000000000000000000000000000000000000000000000000000009e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000060000 00FF146000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006006000000FF146000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 6006000000FFD7AE000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000406006000000FFF67F000000000000000000000000000000005e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000006006000000FFD7AE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000406006 000000FFCA030000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000006000000FFCA030000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061000000 00FF510200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000804000000FFCA0300000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0006000000FF1460000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A212000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFFB85000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028C942 000000FF33F50000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000026436000000FF5AA8000000000000000000000000000000000000be0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000028A2AA000000FF51C80000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050000000 00FF179200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000555D56000000FF14D200000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A007e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF A284000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000020000000000FFA212000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800 000000FF8608800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000FFD4D9 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000004000000000FF0ABA0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000 00FFD3A600000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000010000FF409B0000000000000000000000000000000000000000010040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000004000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 0ABA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000002000000000FF3D46000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400000810040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000400000000000FF9EF8 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006000000000FF9EF80000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060000000 00FFD4D90000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000410040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFF9F60000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000027000000000FF7B2200000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000246000000000FF 888E000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000110000000FF835500000000000000000000000000000000000000000000c10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000006000000000FF1BE9000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000007000000000FFA212 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000800000000FF84900000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088000000210040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000806400000000FF89350000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000006940000000FF9EF800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF 9EF800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9EF800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006000000000FF2CF9000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000062A0000000FF9EF8 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006000000000FF8822000000000000000000000000000000000000000000000000610040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000006006000000FF5E4C0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000001007006000000FF59670000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000806000000000FFBBEE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000806800000000FF00e10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000006004000000FF146000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006006000000FF1460000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF1460 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000110040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006000000000FF9EF80000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF6DE80000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000006004000000FF6DE80000000000000000000000000000000000000000000000000000910040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000001000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9EF800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006000000000FF5967000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000806000000000FF9EF800510040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000800006000000FFAD1C000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000506512000000FFE7700000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000006002000000FF8FA60000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006000000000FF4F6000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000096818000000FFFB1700000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000046000000FF0D9C00000000000000000000000000000000000000000000000000000000310040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000008C2AC000000FFBC0F000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000001002002000000FF5DCD000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000B04780000000FFA2120000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000800000000FF9EF8000000b10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000288000000000FF56B20000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000822002000000FFE05600000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000804004000000FF131500000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000710040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000002A8000000000FF0536000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000D10000000000FFE83E000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000001001800000000FF0182000000000000000000000000000000000000000000000000000000000000f10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000844804000000FF73320000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000002002000000FF01820000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000288000000000FF400D00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000020800000000FFE39D0000000000090040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000001405000000000FF391E00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000001003002000000FF27C9000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000004004000000FF86E2000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000890040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006000000000FF5D360000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000406000000000FF39130000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000002000000FF5D3B0000000000000000000000000000000000000000000000000000000000000000490040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000006084000000FFF9AA00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000002004000000FFB38B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004000000FF27C9000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000004004000000FF9EF800000000000000c90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000802006000000FF22BB000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000288224000000FFAFB10000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000044014000000FF0FC00000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000290040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006000000000FFE36E00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000D52550000000FF64DB00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000AAE2AE000000FF47BD00000000000000000000000000000000000000000000000000000000000000000000a90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000006020000000FF9A48000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000042030000000FF5AA8000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006100000000FF449F0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000A8A200000000FF9EF8000000000000000000690040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000004006000000FF17420000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000028E200000000FF20B000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000022110000000FF867200000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000006000000FFE965000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000002AC2AE000000FFE448000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000550556000000FF5E41000000000000000000000000000000000000000000000000000000000000000000000000190040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 114006000000FFBC5E0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000024006000000FFF8620000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000400E000000FFAD5900000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000028C2A6000000FFCA030000000000000000000000990040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000004006000000FF5E4100000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000004006000000FF5E41000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000004006000000FF1FBD000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000590040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 004006000000FF1FBD0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000114006000000FF5E410000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000004006000000FF5E410000000000000000000000000000000000000000000000000000000000000000000000000000d90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000040 00000000FF9EF800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000006000000000FF5E4100000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000004006000000FF5E41000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000004006000000FF5E4100000000000000000000000000390040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000002AA2AA000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFC4160000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000002AA2AA000000FFD4D90000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA2 AA000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF980200000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000356556000000FFC41600000000000000000000000000000000000000000000000000000000000000000000000000000000790040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF83550000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000400000000000FF05F0800000000000000000000000000000f90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000850040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000450040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000250040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFA2 8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000020000000000FFC4A600000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000a50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000650040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000150040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000950040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000550040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000d50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000350040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000750040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000f50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000008d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00004d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000002d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000ad0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000ed0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000001d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000005d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000dd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000bd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000007d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000030040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000830040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000430040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000c30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000230040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000630040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000e30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000130040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000930040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000530040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000330040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000b30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000730040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000cb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF002b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000006b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00eb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000009b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000005b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000003b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000bb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000fb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000070040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000870040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000470040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000c70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000270040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000a70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000670040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000170040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000970040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000570040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000d70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000370040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000770040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000f70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000008f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000004f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000af0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ef0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000001f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000df0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40003f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000007f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000ff0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000808040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000408040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000208040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000a08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000608040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000e08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000108040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000908040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000508040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000d08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000308040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000b08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000708040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000088040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000888040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000488040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000c88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000288040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000688040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000e88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000188040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000988040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000588040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000388040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000b88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000788040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000048040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00848040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000448040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000c48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00248040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000648040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000e48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000148040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000948040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000548040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000348040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000b48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000748040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000f48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000004c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000cc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000ac8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000006c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000001c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000009c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000003c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000fc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000828040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000428040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000228040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000a28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000628040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000128040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000928040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000528040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000d28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000328040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000728040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000f28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000008a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000004a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000002a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000aa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000ea8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000001a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000005a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000da8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000ba8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000007a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000068040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000868040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000468040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000c68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000268040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000668040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000e68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000168040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000968040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000568040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000368040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000b68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00768040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B008e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000ce8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000002e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000006e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000ee8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000009e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000005e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000003e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000be8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000fe8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000018040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000002000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000818040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF7F6C0000000000000000000000000000000000000000000000000000000000000000000000000000418040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000c18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000218040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000a18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000618040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000118040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000918040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000518040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000318040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000718040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000f18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000898040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000498040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000298040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000a98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000698040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000198040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000998040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000598040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000d98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000398040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000798040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000f98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000858040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000458040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000258040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000a58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000658040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000e58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000158040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000958040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000558040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000d58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000358040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000b58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000758040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000008d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000002d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000ed8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000005d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00dd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000bd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A007d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000038040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000838040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000438040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000c38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000238040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000638040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000e38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000138040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000938040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000538040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000338040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000b38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000738040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000f38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000004b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000cb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000006b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000001b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000009b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000003b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000fb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000878040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000478040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000c78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000278040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000a78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000678040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000178040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000978040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000578040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000d78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000378040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000778040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000f78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000008f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000004f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000002f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000af8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000ef8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000001f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000005f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000df8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000007f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000804040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000404040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000204040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000604040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000e04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00104040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000904040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000504040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00d04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000304040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000b04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000704040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000084040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000884040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000484040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000c84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000284040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000684040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000e84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000184040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000984040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000584040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000384040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000b84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000784040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000f84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000044040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000844040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000444040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000c44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000244040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000644040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000144040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000944040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000544040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000344040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000744040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000f44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40000c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000004c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000cc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000ac4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000006c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000001c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000009c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000dc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000003c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000007c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000fc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000824040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000424040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000224040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000a24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000624040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000e24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000124040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000924040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000524040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000d24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000324040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000724040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000008a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000002a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF00aa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000ea4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE001a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000005a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000da4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000ba4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000007a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000064040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000864040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000464040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000c64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000264040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000664040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000e64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000164040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000964040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000564040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000364040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000b64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000764040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000f64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000ce4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000006e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000009e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000003e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000be4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000fe4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000014040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000814040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000414040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000c14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000214040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000a14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000614040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000114040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000914040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000514040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000d14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000314040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000714040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000f14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000894040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000494040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000294040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000a94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000694040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000e94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000194040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000994040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000594040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000d94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000394040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000794040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000854040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00454040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000254040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00a54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000654040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000e54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000154040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000954040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000554040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000d54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000354040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000b54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000754040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000008d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000cd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000002d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000006d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000ed4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000009d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000005d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000003d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000bd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000034040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000834040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000434040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000c34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000234040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000634040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400e34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000134040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000934040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000534040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000334040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000b34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000734040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000f34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000004b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000cb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000ab4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000006b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000001b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000009b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000db4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000003b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000007b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000fb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000874040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000474040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000274040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000004FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000a74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000674040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000174040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000974040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000574040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000d74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000374040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000774040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00f74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000008f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B004f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000002f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000af4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000ef4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000001f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000005f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000df4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000bf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000007f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000080c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000c0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000020c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000060c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000e0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000090c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000050c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000b0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000008c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000c8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040028c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000068c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF7500e8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000098c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000058c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000038c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000b8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000f8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000004c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000044c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000c4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000a4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000064c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000014c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000094c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000d4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000034c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000074c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000f4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000008cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000004cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ccc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000acc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ecc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000001cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000dcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF003cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000007cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00fcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000082c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000042c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000022c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000a2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000e2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000012c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000052c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000d2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000b2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000072c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000008ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000cac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000002ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000006ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000eac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000005ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000bac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000006c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000c6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF750026c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000066c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000e6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000096c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000056c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000036c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000b6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000f6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000004ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000cec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000aec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000006ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000001ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000009ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000dec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000003ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000fec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000041c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04FF75DE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000a1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000011c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0091c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000d1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0031c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000071c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000f1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000089c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000049c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000029c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000a9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000e9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000019c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000059c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000d9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000b9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000079c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000005c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000085c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000c5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000025c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000e5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000055c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000b5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40008dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000cdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00002dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000adc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000006dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000edc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000009dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000005dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ddc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000003dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000bdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000fdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000003c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000043c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000c3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000a3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000063c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000013c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000093c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000d3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000033c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000f3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000004bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000abc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF006bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ebc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000001bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B009bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000dbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000003bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000007bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000fbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000087c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000047c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000027c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000a7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000e7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000017c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000057c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000d7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000b7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000077c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000008fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000002fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000afc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000efc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000005fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000bfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40007fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000002040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000802040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000402040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000c02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000202040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000602040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000e02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000102040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000902040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000502040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000302040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000b02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000702040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000f02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000082040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000882040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000482040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000c82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000282040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000a82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000682040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000182040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000982040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000582040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000382040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000782040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000f82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000842040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000442040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00c42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000242040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000a42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00642040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000142040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000942040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000542040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000d42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000342040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000742040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000f42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000008c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000004c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000002c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000ac2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000ec2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000001c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000005c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000dc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000007c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000822040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000422040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000222040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000622040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000e22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000122040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000922040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000522040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000d22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000322040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000b22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000722040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000008a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000ca2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000002a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000006a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000ea2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000009a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000005a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000003a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000ba2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000fa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000062040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000862040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000462040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000c62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000262040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000a62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000662040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000162040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000962040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000562040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000362040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000762040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000f62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF000e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000004e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00ce2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000ae2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000006e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000001e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000009e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000de2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000003e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000be2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000007e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000fe2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000812040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000412040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000212040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000a12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000612040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000e12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000112040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000912040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000512040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000d12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000312040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000712040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000892040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000492040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000292040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000692040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000e92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000192040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000992040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000592040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000d92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000392040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000b92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000792040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000052040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000852040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000452040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000c52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000252040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000652040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000e52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000152040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000952040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000552040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000352040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000b52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000752040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000f52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000cd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000006d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000009d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000003d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00bd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000fd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00032040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000832040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000432040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000c32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000232040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000a32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000632040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000132040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000932040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000532040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000d32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000332040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000732040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000f32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000008b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000004b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000002b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000ab2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000001b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000005b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000db2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000007b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000872040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000472040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000272040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000a72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000672040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000e72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000172040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000972040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000572040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000d72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000372040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000b72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000772040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000008f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000cf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000002f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000af2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000006f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000ef2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0800000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000009f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF368D0000000000000000000000000000000000000008000000000000000000000000000000000000000000000000 000000000000000000000002000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF368D00000000000000000000000000005f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000003f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000bf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000c0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000060a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000090a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0050a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000030a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00b0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000f0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000008a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000048a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000c8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000a8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000068a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000018a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF368D000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000002000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000098a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF368D0000000000000000000000000000 0000000000080000000000000000000000000000000000000000000000000000000000000000000000020000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000d8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000038a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000078a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000f8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000084a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000044a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000024a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000a4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000014a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000d4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000074a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000008ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40004ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000002ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000aca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000eca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000001ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000005ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000dca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000bca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000007ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000002a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000082a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000c2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000022a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000062a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000e2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000092a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000052a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000032a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000b2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000caa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000006aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00eaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000009aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B005aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000daa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000003aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000baa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000faa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000006a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000046a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000c6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000a6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000066a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000016a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000096a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000d6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000036a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000076a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000f6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000008ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000004ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000aea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000001ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000dea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000007ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000fea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000081a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000041a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000021a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000a1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000e1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000011a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000051a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000d1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000b1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000071a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000009a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000089a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000c9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000029a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000069a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000e9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000099a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000059a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000b9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000005a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000c5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0025a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000065a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00e5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000095a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000055a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000035a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000b5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000f5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000004da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000cda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000ada040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000006da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000001da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000009da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000dda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000003da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000007da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000fda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000043a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000a3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000013a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000d3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400033a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000073a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000f3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000008ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000004ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000002ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000aba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000eba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000001ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000005ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000dba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000bba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000007ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000007a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000087a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000c7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000027a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000067a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000e7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000057a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000b7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF008fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000cfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B002fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000afa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000006fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000efa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000009fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000005fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000003fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000bfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000ffa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000006040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000806040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000406040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000c06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000206040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000a06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000606040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000106040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000906040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000506040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000d06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000306040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000706040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000f06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000886040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000486040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000286040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000a86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000686040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000186040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000986040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000586040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000d86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000386040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000786040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000f86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000846040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000446040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000246040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000a46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000646040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000e46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000146040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000946040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000546040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000d46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000346040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000b46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000746040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000008c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000002c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000ec6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000005c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000bc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF007c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000026040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00826040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000426040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000c26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000226040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000626040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000e26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000126040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000926040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000526040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000326040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000b26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000726040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000f26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000004a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000ca6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000aa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000006a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000001a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000009a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000003a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000fa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000866040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000466040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000266040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000a66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000666040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000166040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000966040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000566040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000d66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000366040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000766040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000f66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000008e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000004e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000002e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000ae6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000ee6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000001e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000005e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000de6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000be6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000007e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000016040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000816040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000416040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000216040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000616040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000e16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000116040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000916040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000516040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00d16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000316040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000b16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00716040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000096040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000896040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000496040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000c96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000296040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000696040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000e96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000196040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000996040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000596040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000396040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000b96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000796040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000f96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000056040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000856040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000456040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000c56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000256040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000a56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000656040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000156040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000956040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000556040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000356040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000756040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000f56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000004d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000cd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000ad6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00006d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000001d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000009d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000dd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000003d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000007d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000fd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000836040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000436040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000236040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000a36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000636040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000e36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000136040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000936040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000536040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000d36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000336040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000b36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000736040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000008b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000002b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000eb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF001b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000005b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00db6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000bb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000007b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000076040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000876040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000476040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000c76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000276040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000676040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000e76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000176040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000976040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000576040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000376040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000b76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000776040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000f76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000004f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000cf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000af6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000006f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ef6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000009f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000003f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000ff6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400000e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000040e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000c0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000a0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000060e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000010e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000090e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000d0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000030e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000070e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000f0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000088e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000048e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000028e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000a8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000e8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000018e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000058e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000d8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000078e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000084e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000024e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00a4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000e4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0014e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000054e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000d4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000b4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000074e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000008ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000cce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000002ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ace040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000006ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000ece040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000009ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000005ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000003ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000bce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000fce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000002e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000c2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000062e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000092e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000032e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000b2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000f2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000004ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000cae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000aae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000006ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000001ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000009ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000dae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000003ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000007ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000fae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000086e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000046e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000026e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000a6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000016e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000d6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000076e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000008ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF004ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000002ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00aee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000eee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000001ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000005ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000dee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000bee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000007ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000001e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000081e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000c1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000021e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000061e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000e1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000091e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000051e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000031e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000b1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000009e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000c9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000069e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000099e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400059e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000039e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000b9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000f9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000005e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000045e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000c5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000a5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000065e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000015e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000095e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000d5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000035e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000075e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000f5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000008de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000004de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000002de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000ade040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ede040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000001de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000dde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000007de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00fde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000083e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0043e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000023e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000a3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000e3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000013e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000053e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000d3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000b3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000073e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000008be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000cbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000002be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000abe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000006be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000ebe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000009be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000005be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000003be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000bbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000007e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000c7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000067e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000e7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000097e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000057e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000037e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000b7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000f7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000004fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000cfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000afe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000006fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000efe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000001fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000009fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000dfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000003fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000007fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 04FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000ffe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000801040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000401040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000201040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000a01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000601040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF D15B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000101040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000901040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 087B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000501040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000d01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00301040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000701040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00f01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000004000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000 00000000000000000000000000000000FFA4BE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000 0000000000000000000000000000000000000000FFA4BE00000000000000000000000000000000000000000000000000000000881040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FFA4BE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000 000000000000000000000000000000000000FFA4BE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE000000481040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000 00000000000000000000000000000000FFA4BE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000c81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000000 0000000000000000000000000000FFA4BE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000 000000000000000000000000000000000000FFA4BE000000000000000000000000000000000000000000000000000000000000281040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFA4BE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000 00000000000000000000000000000000FFA4BE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE0000000000a81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000002AA000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFAD55000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000002AA000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000681040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000002AA000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF09170000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000005560000000000000000000000000 00000000000000000000000000000000FFAD550000000000000000000000000000000000000000000000000000000000000000e81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0D5480000000000000181040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000981040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000581040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000d81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000381040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000b81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000781040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000041040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000841040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000441040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000c41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000241040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000641040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000e41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000141040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000941040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000541040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000341040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000b41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000741040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000cc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40002c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000006c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000ec1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000009c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000005c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000003c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000bc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000fc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000021040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000821040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000421040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000c21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000221040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000a21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000621040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000121040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000921040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000521040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000d21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000321040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000721040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000f21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000004a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000aa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000001a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF009a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000001FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000da1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB003a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000007a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000001FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000fa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000861040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000461040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000261040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000a61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000661040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000001FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000001FF409B00000000000000000000000000000000000000000000000000000000000000000000e61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000000000161040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000961040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000561040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000d61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000361040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000b61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000761040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000008e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000002e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000ee1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000005e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000be1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000011040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000811040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000411040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000c11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000211040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000611040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000e11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000111040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000911040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000511040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000311040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000b11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000020000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000711040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF93BA0000000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000 00000000000000000000000000FFA6FF0000000000000000000000000000000000000000000000000000000000000000000000f11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000091040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000891040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000491040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000c91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000000000000000000 0000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF097A00000000000000000000000000 000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000291040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000a91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000000000000000000 0000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000691040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF097A000000000000000000000000000000000000000800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF097A000000000000000000000000000000 000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000191040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000991040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000591040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000d91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000391040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000791040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000f91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000851040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000451040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000251040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000a51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00651040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000151040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00951040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000551040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000d51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000351040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000751040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000f51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000008d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000004d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000002d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000ad1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000ed1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000001d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000005d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000dd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000bd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000007d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000031040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000200 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000831040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF2D3000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000040000000000000000040000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFCF97000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000040000000000431040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA23C0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000200FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000231040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000631040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF8E940000000000000000000000000000000000000000000000000000000000000000000000000000000000000008000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000e31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9C 8600000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000131040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000931040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000531040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFB6D200000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000080000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB6 D20000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000331040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000b31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000731040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00008b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000cb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000002b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000006b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000000008 0000000080000000080000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000eb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF68590000004000000004000000 0040000000040000000010000000010000000010000000010000000010000000010000000010000000010000000010000000 01000000001000000001000100FF91C900000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000100FFE75600000002000000 0020000000020000000020000000008000000008000000008000000008000000008000000008000000008000000008000000001b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000010 0000000100000000040000000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF9969000000008000000008 0000000080000000080000000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000000020000000020000FF409B0000000000000000000000000000000000000000000000000000000000000000009b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF997C00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000080000FF7EFF00000010000000005b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000001001000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF0AB700000000000000000000000000000000000000000000000000000000000000000000003b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000bb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000fb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF7EFF000000100000000100000000100000000100000000040000000040000000040000000040000000040000 0000400000000400000000400000000400000000400000000400000000400000FF997C000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000080000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000071040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000000001 000000001000000001000000001000000001000000001000000001080000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF996900000000800000000800000000800000000800000000200000000200000000200000000200000000 20000000020000000020000000020000000020000000020000000020000000020000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000871040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 1832 TDI (FFFFFFFF0000007A11110000000000000143FFFFFFFFFFFFFF FFFFFFFFFFFFE756000000020000000020000000020000000020000000008000000008000000008000000008000000008000 0000080000000080000000080000000080000000080000000080000000080000FF558E000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000C0000FF60EC000000400000000400000000400000000400000000100000000100000000100000000100000000471040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK; SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-03 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (79); SDR 24 TDI (000000); RUNTEST IDLE 2 TCK 1.00E-01 SEC; //END ================================================ FILE: demo/blink_green.svf ================================================ HDR 0; HIR 0; TDR 0; TIR 0; ENDDR DRPAUSE; ENDIR IRPAUSE; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (0E); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); SIR 8 TDI (46); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (7A); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2B8D00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000051B88941000000620000000200000044C20888820000004700 0000DCFFFFFFFFCDBDFFFFFF006CAC4C82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFE0 9A800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF097A00000000000000000000000000 00000000000008000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40B000040080000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF80CA00000100000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF80CA 00000100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80B2000000 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE09A800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF80CA00000100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80CA00000100000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF80CA00000100000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF80CA00000100000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF80CA00000100000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF80CA00000100000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF809900040000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF80B200000080000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF80990004000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF80990004000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF591B000078 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFD09A000100000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF519B000050000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8099000400000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8099000400000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 218A0002050000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF80B200 00008000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFA01A0000A800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF803A00000200000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF60BB0000AA00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFA19B00035000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF809900040000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFA89A00008000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF41D800040400000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF919900045000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFA01A0000A800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF209A00020000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF80B20000008000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF80B20000008000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF40E30000018000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF40E30000018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF80990004000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40B00004008000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF80CA0000010000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF4ACB 00002100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF60C30000AB 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF148B000115000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF40E3000001800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF6A63000089800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF94E2000041800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF81A2000005800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF40E3000001800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF80CA000001000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF80CA000001000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF40E300000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF40E300000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF40E300000180000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF40E300000180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF40E300000180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF40E300000180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF40E300000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF40E300000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF51E300005180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF804200000380000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA8E200008180000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF68CB0000 81000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF80B20000008000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF00938000AA8000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF00A30001558000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFA0920000AA8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFA0920000AA8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF85E2000011 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE598000010080000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF55A3000045800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF40E3000001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF40E3000001800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF80CA000001000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF10B3000100800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF80 CA000001000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF40E300000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF40E300000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF4FE000040180400000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF80E200030184000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFC8E300028180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF3F6300000182200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80E100040180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF40E300000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF40E300000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40E300000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF95A700004590000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF40E3 00000180000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FFA3A20000A58000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF209A0002000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF05A00005458000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF40E30000018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF80990004000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF80990004000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF40E30000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80E10004018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FFA23A0000A2000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF60BB0000AA000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF60DA000354000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF8099000400000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFA23A0000A2000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF25B2000210800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFE0CB000201000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8A6A000023000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF40B0000400800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFF46B000243000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF40E30000 01800000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF40E300000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF80E700000190000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF20E100000188000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF40E300000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF80CA00000100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF403800040200000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40B000040080000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF418B00000500000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF25CA 00021100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80B2000000 80000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF00A30001558000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF40E30000018000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA2420000A38000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF82620000098000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF40E30000018000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF85E20000118000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF20E20002018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFA2420000A38000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF80E10004018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC0A10005558000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF A2420000A38000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFC5BB0002BA00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF40E3000001800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF40E3000001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF40E3000001800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF40E3000001800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8262000009800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA2 420000A3800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF40E30000 01800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF60C30000AB8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF821A00000800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF62130000A280000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80CA00000100000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFC08A00015500000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFA0920000AA80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF80CA00000100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA23A0000A200000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF8262 00000980000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF40E3000001 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF40E30000018000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF40E30000018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF80CA0000010000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80B20000008000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF80CA00 00010000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF80CA00000100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80B200000080000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF53C3000051801800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFE0E0000601800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF8262000229878000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF40E3000001800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF40E3000001800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF40E3000001800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF2762000219800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFD1 A7000105900000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF68430000 83800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF40E30000018000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF809F0000001000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FFFCB400020030980000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF388200014584580000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF42C300000180180000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF82B900040000180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF42BB00000000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF82C100040180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF42C300000180180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF42C300000180180000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF42C300000180180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF42C3 00000180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF42C3000001 80180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF42C3000001801800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF42C3000001801800000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF60BB0000AA0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF65D00003442000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF408C0004004000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFA23A0000A20000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE159000200A008000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF25CA0002110000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF884A0000230018000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF8E45000400C048000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 1C6A0002C30000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF817A00 00000008000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF2E6300000182 E0000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF2BA100002588000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF42BB00000000180000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF42C3000001801800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFBEBA000000011800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF42BB000000001800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF9222000051801000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF7D7B000000010800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF9169000453000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8151000400800800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF43 AB000005001800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE5C10002 11200000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF41530000008008 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA23A0000A20000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF821A0000080000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF61E10000A38AB80000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF804200000980180000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF42C300000180180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF3FC300001182180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF194200020181380000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFC0600000A388180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF8DC400040190580000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF8B020005558CB80000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF04E3 0000AB82980000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF42C3000001 80180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFC01B0002A2001800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFB7BB000010041800000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF3B4100000188B800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF13230001018010000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF42BB0000000018000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF8A9A00002A0018000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF42C30000018018000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF92820000558018000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFD2C20001018018000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF80420000098018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 42C30000018018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF61E100 00A38AB8000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF42C300000180 18000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFA3600000AB8AB80000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFC18600015595580000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF42C300000180180000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF821A000008000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF808E000000400000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF02658000A2CAA800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF70C0000001240000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF01AF000155155800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFB8E60000AAC0A800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA3 850000A3300800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFD0410000 098C1800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF73E30000018140 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF82B00000002018000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF42BB0000000018000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF42C30000018018000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF4AE300001180400000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF40E300000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF40E300000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF80CA00000100000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF80B2 00000080000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80CA000001 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF80CA000001000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF80B2000000800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FFF4E30002418000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF40E30000018000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF94E20000418000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFE0E30004018800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF47630000198000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80E70000019000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF81A200 00058000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF40E300000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF871A00000000200000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF432300000D80000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF42C3000001801800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF42BB000000001800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF42BB000000001800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF22C2000201801800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF22C2000201801800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF80E1000401800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 E3000001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75A60000 01800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF40E30000018000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF40E30000018000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF40E30000018000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF40E30000018000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFE0E00006018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409E000C0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF623D0008A200000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE45300021080080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF230A00020100100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFDAA90400230C100000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF429000040080180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBF5A 00024006100000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF2129000001 08080000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF43E6040001900000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF63B70000A5C00000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF42BB000000001800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFE2B1000200201800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF96C7000341941800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FFB0CB0000010400000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF70E20000018400000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFA89A0000800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF80DD0004014000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80A5000400C000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF10CB00 01010000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF25CA00021100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80B200000080000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA23A0000A200000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF60BB0000AA00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF60DA00035400000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFBFF7000010804000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF20E2000201800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF91410000A2CA8000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF03 F7000154954000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF66C20004 B38AA000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF40B00004008000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFC4390002A20A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF4ADF0000114040000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF40E30000018000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF80B20000008000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF629B0000000180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF80CA00000100000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF80CA00000100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF80CA00000100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF80CA00000100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF424B00000900000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFB58F 00000100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF626B0000A3 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FFA0EA0000AB000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFC0D6001154000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF80CA000001000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA2420000A3800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF4233000008800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FFE89280002A8000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF5CA31000558000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFA0920000AA8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF A89A0000800000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFA09200 00AA8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF80CA00000100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFE0E280000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF80CA00000100000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF80CA00000100000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF80CA00000100000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF80CA00000100000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF80CA00000100000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FFD09A000100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF649B1000800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF19DE00010001000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FFEC90 00010021000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF808E000000400000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFA89A000080000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFC89B000000060000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF40E30000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40E300 00018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75A600000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75A600000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF40E300000180000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF40E300000180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF40E300000180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF8158000000A00800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF1383000105801800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFCD C0000428D30800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF41530000008008 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF075E0000001310000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF55DB0000440000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF90010001318C88000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF98EC000201B200000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF34E20002218080000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF20E20002018000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF835A00000000100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF817A00000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF817A 00000000080000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF42BB000000 00180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE091000200200000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF817A000000000800000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF8090000000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF408C000400400000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF947D0000AA0AA0000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF F89A0000000200000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFC3DE00 01541540000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF19390000AA08 A0000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF60BB0000AA00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF049B00000003000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF471E00000010200000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF42C3000001801800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8696000015C01800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF42 C3000001801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF77860000 01801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF83400000018AB8 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF77860000018018000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF83400000018AB8000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF81C60000019558000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF42C30000018018000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF81180000000AA0000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF1093000105D5580000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF06510000A888280000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF918E 00005040000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF8146000000 C0080000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF66BF000040141800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFC5DA00011400C000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF434F000000401000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF42C3000001801800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF42C3000001801800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFD2C2000101801800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF82C8000001A01800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF4683000015801800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFAAC2000081801800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF688F00008040000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF90DA00005400000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF20D18000008AA80000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8C2F00000245000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000004FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000800000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF81DF0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000001000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF2039000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000004000000000000FFBC6A00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004000000000000FFBC6A00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004000000000000FFBC6A00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FFBC6A0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004000000000000FFBC6A0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004000000000000FFBC6A0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004000000000000FFBC6A0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004000000000000FFBC6A0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000FFBC6A0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004000000000000FFBC6A0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004000000000000FFBC6A0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000FFBC6A0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000FFBC6A0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000400 0000000000FFBC6A0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000400000000 0000FFBC6A0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004000000000000FF BC6A0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF26A3000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000002AA000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF5292000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000556000000000000FF26A3000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000002 AA000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF26A3000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000002AA0000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF368D00000000000000000000000000000000000000080000000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF368D00000000000000000000000000000000000000080000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF368D000000000000000000000000000000000000000800000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF36 8D000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000002000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFBDCB00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000001FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000001FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000002000000000000000000 000000000000000000000000000000000000000000000000000000FFA6FF00000000000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF93BA00000000000000); SDR 8000 TDI (00000000000000000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF097A000000000000000000000000000000 00000000080000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF097A000000000000000000000000000000000000000800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF09 7A000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF097A000000000000 00000000000000000000000000080000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF097A000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000004000000000 0000000010000000000000000200FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF607A000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000800000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF01 59000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000100000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA23C0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000200FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFBCE30000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0020000000000000000010000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF1FDB0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF9C86000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 10000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF9C86000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000100000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF23FF00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000008000000000000000000000000000000000000000000000000000000FF23FF00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000008000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF99690000000080000000080000000080000000080000000020000000020000 00002000000002000000002000000002000000002000000002000000002000000002000000002000 0000020000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFB90B0000004000000004000000004000000004000000001000000001000000001000000001 000000001000000001000000001000000001000000001000000001000000001000000001000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFE75600 00000200000000200000000200000000200000000080000000080000000080000000080000000080 000000080000000080000000080000000080000000080000000080000000080000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF408C0004004000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF7EFF0000001000000001000000001000000001000000000400 00000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF7EFF00000010000000010000000010000000010000000004000000004000000004000000 00400000000400000000400000000400000000400000000400000000400000000400000000400000 FF997C00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000080000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 2952 TDI (FFFFFFFF0000007A11 110000000000000143FFFFFFFFFFFFFFFFFFFFFFFFFFE75600000002000000002000000002000000 00200000000080000000080000000080000000080000000080000000080000000080000000080000 000080000000080000000080000000080000FF558E00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000C0000FF60EC00000040000000040000000040000000040000000010 00000001000000001000000001000000001000000001000000001000000001000000001000000001 000000001000000001080000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF996900000000800000000800000000800000000800000000200000000200); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK 1.00E-02 SEC; SIR 8 TDI (C0); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SDR 32 TDI (00000000) TDO (00000000) MASK (FFFFFFFF); SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-01 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000100) MASK (00002100); ================================================ FILE: demo/blink_red.svf ================================================ HDR 0; HIR 0; TDR 0; TIR 0; ENDDR DRPAUSE; ENDIR IRPAUSE; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (0E); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); SIR 8 TDI (46); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (7A); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2B8D00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000051B88941000000620000000200000044C20888820000004700 0000DCFFFFFFFFCDBDFFFFFF006CAC4C82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFE0 9A800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF097A00000000000000000000000000 00000000000008000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE09A800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF80CA000001000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8099000400000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF80B2000000800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF40B00004 00800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF80CA0000010000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF80CA0000010000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF80B20000008000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFB5DC00040000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF40E3000001800000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF40E3000001800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF80CA000001000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF80CA000001000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF80CA000001000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF80CA000001000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF80CA000001000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF80990004000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 80990004000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF809900040000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF41D8000404000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF9199000450000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFA01A0000A8000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF209A0002 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF591B0000780000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFD09A0001000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF519B0000500000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF809900040000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF40B0 00040080000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80CA000001 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF218A000205000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF80B2000000800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFA01A0000A8000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF803A000002000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF60BB0000AA000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFA19B000350000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF8099000400000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFA89A000080000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000004FF80CA0000010000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFB58F0000010000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF80B200000080000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF80B200000080000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF40E300000180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF40E300000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF40E3000001800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF51 E3000051800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFB5070000 03800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FFA8E20000818000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF7F8E0000210000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF60C30000AB8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF148B0001150000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF40E30000018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF6A630000898000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF94E20000418000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF81A20000058000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF75A60000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF00A300015580000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA0920000AA80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFA0920000AA 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF40E3000001800000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF40E3000001800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF40E3000001800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF40E3000001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF40E3000001800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF40E3000001800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF40E3000001800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF40E3000001800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF40E30000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF80CA00 00010000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF10B300010080 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80CA00000100000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF68CB00008100000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF80B200000080000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF00938000AA80000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (04FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75 A6000001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF40E30000 01800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF95A70000459000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF40E30000018000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF85E20000118000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE5980000100800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF55A30000458000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF40E30000018000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF40E300000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF40E3 00000180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF40E3000001 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFB5A4000401800000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF40E3000001800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75A6000001800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF40E3000001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF81A2000005800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF80E1000401800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF4043000303840000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFC8E3000281800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFF8E2000001820000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFB5A4000401800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (8A6A0000230000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF40B000 04008000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF343A00024200 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80CA00000100000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF40E300000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFA3A20000A580000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF209A00020000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF05A000054580000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF40E300000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF809900040000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF809900040000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40E300000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (C8000401000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF40B00004 00800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF80CA0000010000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF25CA0002110000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF80B20000008000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA23A0000A20000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF60BB0000AA0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF60DA0003540000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF80990004000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFA23A0000A20000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF25B20002108000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFE0CB0002010000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF60A2000355 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFC2430002A3800000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF40E3000001800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFA5BA0000BA000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF209A000200000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF40E3000001800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF80E7000001900000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF20E1000001880000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF40E3000001800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00098000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75A600000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FFA2420000A380000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75A600000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF60C30000AB80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF00A300015580000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF40E300000180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFA2420000A380000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF826200000980000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF40E300000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD0A600021180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF40E300000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF97070000A380000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF40E3); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF626B0000A30000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF82620000098000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF40E30000018000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF40E30000018000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF40E30000018000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF40E30000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF826200); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF80B2000000800000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF80CA000001000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF80CA000001000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF80B2000000800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF821A000008000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFC2128000A2800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF80CA000001000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFC08A000155000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA0 920000AA800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF8DA500070591000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF684300008380000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF40E300000180000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF7C9E00000011000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF40E300000180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF40E300000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40E300000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF40E300000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF80CA 00000100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF77860000018018000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF42C30000018018000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF77860000018018000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF42C30000018018000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF53C30000518018000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFE0E00006018000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFA0620002298600000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF40E30000018000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75A60000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF15A700 02018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF40E300000180); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF412B000001000800000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF2E6300000182E000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF2BA1000025880000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF42BB000000001800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFFCB4000200309800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF3882000145845800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF42C3000001801800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF82B9000400001800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF42BB000000001800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF82C1000401801800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF42 C3000001801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF42C30000 01801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF42C30000018018); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE5C100021120000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF415300000080080000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFA23A0000A200000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF821A00000800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF60BB0000AA00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF65D000034420000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF408C00040040000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFA23A0000A200000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF23D8000208A0080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFE0CB00020100000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF884A 00002300180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF8E45000400 C0480000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFDC3B0002C2000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF42C30000018018000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA01A0000A20018000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFB7BB0000100418000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF3B4100000188B8000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF42C30000018018000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF42BB0000000018000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF42BB0000000018000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF92E20080538010000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 412B0000010008000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF919900 04500000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF401000040480 08000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF422B01000100180000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF7786000001801800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FFA3600000AB8AB800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFC186000155955800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF42C3000001801800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF61E10000A38AB800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8042000009801800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF42C3000001801800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFC587000011825800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FFDEC3000201811800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFF5 250000A3881800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF4DC60000 01905800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF43800001558CD8 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFC4E10004AB8298000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF4FE600000190400000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF82B000000020180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF42BB00000000180000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF42C300000180180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF132300010180100000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF42BB00000000180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8A9A00002A00180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF42C300000180180000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF928200005580180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFD2C2 00010180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF8042000009 80180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF7786000001801800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF61E10000A38AB800000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF80CA0000010000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF80B20000008000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF821A0000080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF808E0000004000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF02658000A2CAA8000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFAEC10000012480000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 01AF0001551558000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF66E700 00AAC028000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF7D840000A330880000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFB04300000984180000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF40E3000001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFE718000000082000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF7CE30000C1800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF4FE6000001904000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFD09A000100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 E3000001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF80CA0000010000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF80B20000008000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF80CA0000010000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75A600000180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF40E300000180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF40E300000180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFE0E000060180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE1A300020580000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF40E300000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF81A200000580000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFB5A400040180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF40E3 00000180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFB727000009 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF85E2000011800000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF94E2000041800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF40E3000001800000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF63B70000A5C000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF42BB0000000018000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF20300002082018000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF96C70003419418000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF42C30000018018000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF42BB0000000018000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF42BB0000000018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 22C20002018018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF22C200 02018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF80E100040180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF40E300000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75A600000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF40E300000180000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA23A0000A2000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF60BB0000AA000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF60DA000354000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409E000C00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF623D0008A2000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE453000210800800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF23 0A000201001000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFEAA80400 23081000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFFA910004008218 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFBD8A0002490610000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE1780000000808000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF43E60400019000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF4ADF00001140400000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF40E300000180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80B200000080000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFB0CB00000104000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF70E200000184000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF40E300000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFA89A 00008000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80DD000401 40000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF80A5000400C00000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF10CB000101000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF25CA000211000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF80B2000000800000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFC0D60011540000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF80CA0000010000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFA2420000A38000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF42330000088000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF40E30000018000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFBFF70000108040000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 40E30000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF914100 00A2CA80000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF40E300000180 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF63F600035495400000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA6C00000B38AA00000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF80B200000080000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFC4390002A20A800000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF80CA000001000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF80CA000001000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF80CA000001000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF40CE000001100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF80CA000001000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF80CA000001000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF80 CA000001000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF80CA0000 01000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF424B0000090000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFB58F0000010000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF626B0000A30000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FFA0EA0000AB0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF809000000020000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFD09A00010000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8C9A10000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE89280002A80000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF5CA3 10005580000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFA0920000AA 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFA89A000080000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFA0920000AA800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF80CA000001000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFE0E2800001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF40CE000001100000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF389B0001800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF808E00000040000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF40E3000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF40E3000001800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF45 DF000000040000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF709A0000000400000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFDCEC000201B1000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFDAE200022184000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF20E200020180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF40E300000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF40E300000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF40E3 00000180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF40E3000001 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF40E3000001800000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF40E3000001800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75A6000001800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75A6000001800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75A6000001800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75A6000001800000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF80900000002000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF408C0004004000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 8158000000A008000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFD8C200014180 98000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF3B6100040AD2080000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF415300000080080000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF075E00000013100000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF55DB00004400000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF90010001318C880000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF83 5A000000001000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF817A0000 00000800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF46FB00001E0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF817A0000000008000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF42BB0000000018000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE0910002002000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF817A0000000008000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF81180000000AA00000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF947D0000AA 0AA00000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FFF89A000000020000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFC3DE000154154000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF19390000AA08A000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF60BB0000AA000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF049B000000030000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF471E000000102000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFD2C20001018018000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF82C8000001A018000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF42C30000018018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF AAC20000818018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF42C300 00018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF82D6000001C0 18000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF42C300000180180000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF778600000180180000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF83400000018AB80000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF778600000180180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FFB6050000018AB80000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF81C600000195580000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF42C300000180180000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF688F000080400000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF90DA000054000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF20D18000008AA800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF8C 2F000002450000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF10930001 05D55800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF06510000A88828 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF918E0000504000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF5F47000000C088000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF66BF0000401418000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF1BDB0001140040000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF434F0000004010000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF42C30000018018000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF42C30000018018000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000004FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF097A000000000000000000 00000000000000000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000800000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF81DF0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000001000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF2039000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000004000000000000FFBC6A00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004000000000000FFBC6A00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004000000000000FFBC6A00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FFBC6A0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004000000000000FFBC6A0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004000000000000FFBC6A0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004000000000000FFBC6A0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004000000000000FFBC6A0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000FFBC6A0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004000000000000FFBC6A0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004000000000000FFBC6A0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000FFBC6A0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000FFBC6A0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000400 0000000000FFBC6A0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000400000000 0000FFBC6A0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004000000000000FF BC6A0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF26A3000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000002AA000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF5292000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000556000000000000FF26A3000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000002 AA000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF26A3000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000002AA0000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF368D00000000000000000000000000000000000000080000000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF368D00000000000000000000000000000000000000080000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF368D000000000000000000000000000000000000000800000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF36 8D000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000002000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFBDCB00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000001FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000001FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000002000000000000000000 000000000000000000000000000000000000000000000000000000FFA6FF00000000000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF93BA00000000000000); SDR 8000 TDI (00000000000000000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF097A000000000000000000000000000000 00000000080000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF097A000000000000000000000000000000000000000800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF09 7A000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF097A000000000000 00000000000000000000000000080000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF097A000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000001000000000 0000000010000000000000000200FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF607A000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF60 7A000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000080000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA23C0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000200FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF7C4A0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0008000000000000000010000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFDE8A0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF9C86000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 10000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF9C86000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000100000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF23FF00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000008000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF23FF000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000008000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF99690000000080000000080000000080000000080000000020000000020000 00002000000002000000002000000002000000002000000002000000002000000002000000002000 0000020000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFB90B0000004000000004000000004000000004000000001000000001000000001000000001 000000001000000001000000001000000001000000001000000001000000001000000001000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFE75600 00000200000000200000000200000000200000000080000000080000000080000000080000000080 000000080000000080000000080000000080000000080000000080000000080000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF408C000400400000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF80990004000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF7EFF0000001000000001000000001000000001000000000400 00000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF7EFF00000010000000010000000010000000010000000004000000004000000004000000 00400000000400000000400000000400000000400000000400000000400000000400000000400000 FF997C00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000080000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 2952 TDI (FFFFFFFF0000007A11 110000000000000143FFFFFFFFFFFFFFFFFFFFFFFFFFE75600000002000000002000000002000000 00200000000080000000080000000080000000080000000080000000080000000080000000080000 000080000000080000000080000000080000FF558E00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000C0000FF60EC00000040000000040000000040000000040000000010 00000001000000001000000001000000001000000001000000001000000001000000001000000001 000000001000000001080000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF996900000000800000000800000000800000000800000000200000000200); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK 1.00E-02 SEC; SIR 8 TDI (C0); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SDR 32 TDI (00000000) TDO (00000000) MASK (FFFFFFFF); SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-01 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000100) MASK (00002100); ================================================ FILE: demo/blink_sram.svf ================================================ //ULX2S / ULX3S JTAG programmer v 3.0.92 (built Sep 19 2020 14:37:22) //START STATE IDLE; STATE RESET; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK; SIR 8 TDI (0e); SDR 8 TDI (01); RUNTEST IDLE 32 TCK 1.00E-01 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); SIR 8 TDI (46); SDR 8 TDI (01); RUNTEST IDLE 2 TCK; SIR 8 TDI (7A); RUNTEST IDLE 2 TCK; SDR 64000 TDI (00000600FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000001FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF91DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000400000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF91DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000400000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF2B8D000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000051B889410000006200000002000000 44C208888200000047000000DCFFFFFFFFCDBDFFFFFF008C1CCC82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000002AA2A2000000FFB38B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000000 FF6E700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000002AA2B2000000FF9EF80000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060 00000000FF38DB00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000006008000000FFFDFF00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006006008000FF1460000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000006006000000FF1460000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006006000000FF14600000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000006006000000FFFDFF0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006006008000FF146000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF146000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006006000000FF1460000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF9EF8 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006000000000FF9EF80000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060000000 00FF9EF800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006000000000FF9EF800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 6000000000FFD4D9000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000004000000000FF9EF8000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000006000000000FFD4D90000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000004000000000FF9EF80000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000006000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFA212000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000800000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFA2120000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000800000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFC58A000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 000000FFC58A0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000001000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF658D00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000800800000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFC58A000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000001000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF8FA600000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF84CB0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF84CB00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000100000000FF5811000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000020000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF718F00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000040000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF270300000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000001800000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF27710000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000028C842000000FFD27E0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000026546000000FF92BD0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000006010000000FF510200000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000804000000FFCA0300 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000006000000FF1460000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000 FFC3610000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000546006000000FFCA030000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 06000000FF4F1200000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000001006000000FF146000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006006000000FFD7AE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000406006000000FF85BE000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000147006000000FFF67F0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000026006000000FF14600000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006006000000FF415B00000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000028E2AE000000FF146000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006006000000FFA344000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000002AE2AE000000FF3A2B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000556556000000FF14600000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060060000 00FFCBC300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000028E2A8000000FF7CE700000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002 6000000000FF9EF8000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000006000000000FF1AC5000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000046000000000FFABBD0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000006000000004FF39190000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000A8E2A8000004FF51C500000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001006000000000FF7F8E00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000001556550000000FFF55D000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000002AE200000000FF5967000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000806000000000FFF8830000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000288150000000FFF9 F700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000040050000000FF8BED00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000650000 0000FF6D35000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000006000100000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF471F0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006000080000FFA12300000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000080416004000000FFDB0C00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000020002000000FFCAEA000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000001014000000000FF3832000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000001042002000000FF619A0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000100404006000000FF6D780000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000844820000000FFCC1A00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000002492000000FF 0182000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000288000000000FFC4A6000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040000 000000FF48210000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000002A8528000000FFF3C60000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00D10B20000000FF0AB700000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000001001000000000FF7BCD00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000288238000000FF1649000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000842902000000FFF1CF000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000804800000000FFBAEF0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000008C106000000FFE85B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000001003402000000FFDC0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000B04920000000FF391300 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000002000000FFBAAA000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E60C000000 FF078F0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000096000000000FFB38B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04000000FF618F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000810A4E000000FF475C00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000506006000000FF1460000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000006006000000FF053E000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000001000006000000FF053E0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000001000006000000FF31760000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000806806000000FF146000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000006006000000FFDB5D00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000001006006000000FF1460000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FFF6E9 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006806000000FF14600000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060060000 00FF146000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006006000000FF5E4C00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 7006000000FF905D000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000046006000000FFFAAC000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000006816000000FFF67F0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000026006000000FF14600000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000006006000000FFB24300000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000600E000000FFF6E900000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006806000000FFFE4B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000001806806000000FFDB5D000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000001006006000000FFF6E90000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000006806000000FF14 6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000006006000000FF146000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600600 0000FF52BF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000407006000000FFABE4000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 200006000000FFCA030000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000006000000FFE7700000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006002000000FFB21800000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000006186000000FFCA0300000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000006000000FFB38B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004000000FF9EF8000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006000000000FF51C50000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000001006000000000FFAD510000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000004002000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 91BB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000002802000000FF5E41000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004006 000000FFD4D90000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000004000000000FF91BB0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00002802000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF8FA600000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000001000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFE6B8000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000008000000FF62350000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000002AA2A2000000FFB38B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004000000FF43A300000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000556554000000FF623500); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00006100000000FF510200000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000804000000FFCA0300000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000006000000FF1460000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000006006000000FFD7AE000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000406006000000FFCA030000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000006000000FFCA030000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000006000000FF146000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF146000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000006006000000FFD7AE000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000406006000000 FFF67F0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000026006000000FF14600000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060 06000000FF415B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000028E2AE000000FF146000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006006000000FFA344000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000002AE2AE000000FF3A2B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000556556000000FF14600000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000006006000000FF415B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000028E2AE000000FFF67F00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000026006000000FF146000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006006000000FF905D000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000046006000000FF1460 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006006000000FF92E60000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8E0060000 00FF146000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006006000000FF126F00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055 6006000000FF785B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000012AE006000000FF1460000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000006006000000FF8B1A0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000288006000000FF4E3E0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000040006000000FF146000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000006006000000FFE7AD00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006006100000FFCA03000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000006000000FFCA03000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000006000000FF471F0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000006000080000FF51 9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000028026004000000FF84CF00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028400200 0000FFB41D000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000001508000000000FF3832000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 042002000000FF738A0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000050014006000000FFE2C50000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000844848000000FFBB9100000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000002202000000FFB2EF00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000288480000000FF73C1000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000020400000000FF5D34000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000002A8028000000FF9D460000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000D10928000000FF689F0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000001001080000000FF190800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000288020000000FF 9C9A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000802D08000000FF75F2000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000844800 000000FF960F0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000008C080000000FFDD0D0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 01002020000000FFFC1F00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000B08800000000FFD4D900000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000004000000000FFD9BD000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000063E0000000FF078F000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000096000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9F8E0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000800020000000FFCE4000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000D16500000000FF9EF800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000006000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF51C50000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010060 00000000FF9EF800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000006000000000FF9EF800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006000000000FF9EF8000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000006000000000FF9EF8000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006000000000FF9EF80000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000006000000000FF9EF80000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006000000000FF7C7100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000006800000000FF9EF800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006000000000FF51C5000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000001006000000000FF965A 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000001806000000000FFF6E90000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068060000 00FF146000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006006000000FF905D00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004 6006000000FF905D000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000046006000000FF7587000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000806186000000FF14600000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000006006000000FF14600000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000006006000000FFDB5D00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001006006000000FFDB5D00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000001006006000000FF288A000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000806000000FFC646000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000016000000FF14600000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000006006000000FF5F D600000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000060E6000000FF288A00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080600 0000FFA46E000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000096000000FF9EF8000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 006000000000FF9EF80000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000006000000000FFAD510000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000004002000000FF8FA600000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000001000000000000FF733200000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000002002000000FF5E41000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000004006000000FFD4D9000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000004000000000FF5E860000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000001002802000000FF658D0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800800000000FF8FA600000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF41B7000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041000 000000FF26090000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000028A2AA000000FF54780000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00004880000000FF712600000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000515556000000FFBEB400000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000002AA20A000000FF400D000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000020800000000FF3FD5000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000000000004006000000FF 5E41000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000004006000000FF1FBD000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000114006 000000FF5E410000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000004006000000FF5E410000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00004006000000FF5E4100000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000004006000000FF5E4100000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000004006000000FF1FBD000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000114006000000FFBC5E000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000024006000000FFF8620000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000400E000000FFAD590000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000028C2A6000000FFCA0300000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000006000000FFE96500 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000002AC2AE000000FFE448000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000550556000000 FF5E410000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000004006000000FF17420000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028E2 00000000FF20B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000022110000000FF867200000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006020000000FF9A48000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000042030000000FF5AA8000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006100000000FF449F0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000A8A200000000FF9EF80000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006000000000FFE36E00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000D52550000000FF64DB00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000AAE2AE000000FF47BD000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000802006000000FF22BB 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000288224000000FFAFB10000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000440140000 00FF0FC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006084000000FFF9AA00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 2004000000FFB38B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004000000FF27C9000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000004004000000FF9EF80000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000006000000000FF5D360000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000406000000000FF391300000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000002000000FF5D3B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000001405000000000FF391E000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000001003002000000FF27C9000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000004004000000FF86E20000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000844804000000FF73 3200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000002002000000FF018200000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028800000 0000FF400D000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000020800000000FFE39D000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 2A8000000000FF05360000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000D10000000000FFE83E0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000001001800000000FF018200000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000288000000000FF56B200000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000822002000000FFE056000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000804004000000FF1315000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000008C2AC000000FFBC0F0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000001002002000000FF5DCD0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000B04780000000FFA21200000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800000000FF 9EF8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000006000000000FF4F60000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096818 000000FFFB170000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000046000000FF0D9C0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00800006000000FFAD1C00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000506512000000FFE77000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000006002000000FF8FA6000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000001000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF9EF80000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF59670000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000806000000000FF9EF800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF9EF800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000006000000000FF6DE8000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006004000000 FF6DE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000006004000000FF14600000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060 06000000FF146000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000006006000000FF146000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006006000000FF5E4C000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000001007006000000FF5967000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000806000000000FFBBEE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000806800000000FF9EF80000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000006000000000FF2CF900000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000062A0000000FF9EF800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000006000000000FF8822000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000806400000000FF8935 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000006940000000FF9EF80000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060000000 00FF9EF800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000006000000000FF1BE900000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 7000000000FFA212000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000800000000FF8490000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000088000000FFF9F60000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000027000000000FF7B220000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000246000000000FF888E00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000110000000FF835500000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000400000000000FF9EF8000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF9EF8000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000006000000000FFD4D90000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF0ABA00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000200000 0000FF3D46000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000004000008000FFD4D9000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 004000000000FF0ABA0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000002000000000FFD3A60000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000010000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFA28400000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000020000000000FFA212000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000800000000FF8608800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000028A2AA000000FF51C80000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000005000000000FF17920000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000555D56000000FF14D200000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000002AA212000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFFB85000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028C942 000000FF33F50000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000026436000000FF5AA80000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFA284000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000020000000000FFC4A6000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000040000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF8355000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000400000000000FF05F0800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0AA2AA000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF98020000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000356556000000FFC41600000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000002AA2AA000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFC416000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000002AA2AA000000FFD4D9000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000004000000000FF9EF80000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000006000000000FF5E410000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000004006000000FF5E4100000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7F6C000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000002000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75 DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004 FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF368D0000000000000000000000000000000000000008000000000000000000000000000000000000 000000000000000000000000000000000002000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF368D00000000000000 0000000000000000000000000800000000000000000000000000000000000000000000000000000000000000000000000200 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF368D 0000000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000000000 000000000002000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF368D00000000000000000000000000000000000000 0800000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF087B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000008000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFD15B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000001000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF0D548000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000002AA000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF091700000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000556000000000000000000000000000000000000000000000000000000000FFAD5500000000000000 000000000000000000000000000000000000000000000000000000000000000000000000002AA00000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAD55000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000002AA000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFA4BE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000 0000FFA4BE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 4000000000000000000000000000000000000000000000000000000000FFA4BE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000004000000000000000000000000000000000000000000000 000000000000FFA4BE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000004000000000000000000000000000000000000000000000000000000000FFA4BE0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000000 00000000000000000000FFA4BE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000000 0000000000000000000000000000FFA4BE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000 000000000000000000000000000000000000FFA4BE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000004000000000000000000000000000000000000000000000000000000000FFA4BE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000040000000000000 00000000000000000000000000000000000000000000FFA4BE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000004000000000000000000000000000000000000000000000000000000000FF A4BE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400000 0000000000000000000000000000000000000000000000000000FFA4BE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000004000000000000000000000000000000000000000000000000000 000000FFA4BE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 004000000000000000000000000000000000000000000000000000000000FFA4BE0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFBDCB0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000001FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBDCB00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000001FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFBDCB0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000001FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFBDCB00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000001FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF097A000000000000000000000000000000000000000800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF097A000000000000000000 0000000000000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF097A0000000000 0000000000000000000000000000080000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF097A00000000000000000000000000000000000000080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF097A000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF93BA00000000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000000 0000000000000000000000000000000000FFA6FF000000000000000000000000000000000000000000000000000000000000 0000000000000002000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 64000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF9C8600000000000000000000000000000000000000000000000000000000000000000000000000 00000000000010000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF8E940000000000000000000000000000000000000000000000000000000000 000000000000000000000000000008000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA23C00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000200FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF2D30000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000400000000000000000400000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFCF970000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004000000000000000004000000000000 00000200FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 50952 TDI (FFFFFFFF0000007A11110000000000000143FF FFFFFFFFFFFFFFFFFFFFFFFFE756000000020000000020000000020000000020000000008000000008000000008000000008 0000000080000000080000000080000000080000000080000000080000000080000000080000FF558E000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000C0000FF60EC0000004000000004000000004000000004000000001000000001000000001000 000001000000001000000001000000001000000001000000001000000001000000001000000001080000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF996900000000800000000800000000800000000800000000200000000200 00000020000000020000000020000000020000000020000000020000000020000000020000000020000000020000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF7EFF000000100000000100000000100000000100000000040000 0000400000000400000000400000000400000000400000000400000000400000000400000000400000000400000000400000 FF997C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000080000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF0AB7000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000001001000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF997C000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000080000FF7EFF000000 1000000001000000001000000001000000000400000000400000000400000000400000000400000000400000000400000000 400000000400000000400000000400000000400000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF99 6900000000800000000800000000800000000800000000200000000200000000200000000200000000200000000200000000 20000000020000000020000000020000000020000000020000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF6859000000400000000400000000400000000400000000100000000100000000100000000100000000100000000100 0000001000000001000000001000000001000000001000000001000100FF91C9000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000100FFE7560000000200000000200000000200000000200000000080000000080000000080000000080000000080 000000080000000080000000080000000080000000080000000080000000080000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFB6D20000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000 00000000000000000000000000FFB6D200000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000080000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK; SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-03 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000100) MASK (00002100); //END ================================================ FILE: demo/colorlight_5a_75b_flash.svf ================================================ //ULX2S / ULX3S JTAG programmer v 3.0.92 (built Sep 19 2020 14:37:22) //START STATE IDLE; STATE RESET; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK; SIR 8 TDI (0e); SDR 8 TDI (01); RUNTEST IDLE 32 TCK 1.00E-01 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); STATE RESET; STATE IDLE; SIR 8 TDI(FF); RUNTEST IDLE 32 TCK; SIR 8 TDI(3A); SDR 16 TDI(68FE); RUNTEST IDLE 32 TCK; SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000001B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000801B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000401B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000c01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000201B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000a01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000601B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000e01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000101B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000901B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000501B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(20); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFAF26000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000051B889410000006200000802000000 44C208888200000047000000DCFFFFFFFFCDBDFFFFFF008C1CCC82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF00000040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000800040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000400040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000200040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000a00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000e00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF4A910000000000000000000000000000001800100040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000900040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000500040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000d00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000300040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000700040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000880040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000480040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000280040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000a80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000680040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000e80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFD3590000000000000000000000000000000000000010000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000180040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000980040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000580040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF8C9600000000000000 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFC495000000000000000000000000040000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8C9600000000d80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC4950000000000 000000000000000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000380040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000b80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000780040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF835F00000000000000000000000000000000000010000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2179000000000000000000000000000000000000080000000000000000000000000000040040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000840040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000440040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000200000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000c40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF20E4000000000000000000000000200000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF20E400000000000000000000240040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000640040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000e40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000140040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000940040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000540040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000340040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000b40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000740040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000f40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000cc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000006c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000009c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF005c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000003c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00bc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000fc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000020040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF211A00000000 000000000000000000000002000000000000000000000000000000000000000000000000000000000000000000000000000000820040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF211A000000000000 0000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000420040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000c20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000220040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000a20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000620040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000120040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000920040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000520040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000d20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000320040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000720040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000f20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000008a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000004a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000002a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000aa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000001a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000da0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000007a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000860040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000460040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000260040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000a60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000400000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000660040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF80ED0000000000000000000000000000000000000000000000000000000000e60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80ED00000000160040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000960040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000560040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000d60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000360040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000b60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000760040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000008e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8DC200000000000000000000000000000000000000000000000000000000000000000000000000000002 00000000000000000000000000000000000000000000000000000000000000000000FF8DC200000000000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000ce0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000002e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000006e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000ee0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000009e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000005e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000be0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000010040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000810040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000410040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000c10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000210040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000610040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00e10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000110040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000910040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00510040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000310040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000b10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000710040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000f10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000090040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000890040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000490040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000c90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000290040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000a90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000690040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000190040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000990040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000590040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000d90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000390040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000790040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000f90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000850040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000450040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000250040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000a50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000650040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA6DA000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000 FFA6DA0000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000 000000000000000000000000000000000000000000000000000000FFA6DA000000000000000000000000000000000000000000150040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFA6DA0000000000000000000000000000000000000000000000000000 000000000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000FFA6 DA00000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000 00000000000000000000000000000000000000000000000000FFA6DA00000000000000000000000000000000000000000000 000000000000000000000000000000040000000000000000000000000000000000000000000000000000000000000000000000950040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000550040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000d50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000350040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF807400000000000000000000000000000000000000000000000000000000 00000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000750040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8074000000 0000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000 000000000000000000000000000000000000000000FF81460000000000000000000000000000000000000000000000000000 000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000FF4000f50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000800000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000 0000000000000000000000000000000000FF3647000000000000000000000000000000000000000000000000000000000000 0000000000041000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF80740000000000000000000000000000000000000000000000000000008d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFBB1A00000000000000000000000000000000000000000000000000000000 00000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000FF814600004d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE04F0000000000 000000000000000000000000000000000000000000000000000000000000000A000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000002d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF060E00000000000000000000000000000000000000000000000000000000000000000000 00000A04000000000000000000000000000000000000000000000000000000000000000000000000FFC6E100000000000000 0000000000000000000000000000000000000000000000000000000000020400000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000ad0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0406000000000000000000000000000000000000000000000000000000000000000000000000FF6635000000000000000000 0000000000000000000000000000000000000000000000000000000804000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF073C0000000000 0000000000000000000000000000000000000000000000000000000000000012040000000000000000000000000000000000006d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA00000000000000 0000000000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000000 0000000000000000000000000000000000FFB58D00000000000000000000000000000000000000000000000000000000000000ed0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFC6E1000000000000000000000000000000000000000000000000000000000000000000000000 0204000000000000000000000000000000000000000000000000000000000000000000000000FF66AC000000000000000000 0000000000000000000000000000000000000000000000000000000404000000000000000000000000000000000000000000 000000000000000000000000000000FF75FB0000000000000000000000000000000000000000000000000000000000000000 000000000006000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000001d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000004 000000000000000000000000000000000000000000000000000000000000000000000000FF66AC0000000000000000000000 0000000000000000000000000000000000000000000000000004040000000000000000000000000000000000000000000000 00000000000000000000000000FFA6DA00000000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFA6DA0000000000000000000000000000000000000000000000000000000000000000005d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF93BA00000000000000000000000000000000000000000000000000000000000000000000 00000002000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000dd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF80ED0000000000000000000000000000000000000000000000000000000000000000000000000400 000000000000000000000000000000000000000000000000000000000000000000000000FF80ED0000000000000000000000 0000000000000000000000000000000000000000000000000004000000000000000000000000000000000000000000000000 00000000000000000000000000FF20A00000000000000000000000000000000000000000000000000000000000000000000000bd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000007d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF93BA000000000000000000000000000000 0000000000000000000000000000000000000000000002000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF20A00000000000000000000000 000000000000000000000000000000000000000000000000000200000000000000000000000000000000000000000000000000fd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000030040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFF23B000000000000000000000000000000020000000000000000000000000000000000000000000200000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF211A0000000000000000000000000000000200000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF93BA000000000000000000000000830040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000430040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF20A0000000000000000000000000000000 0000000000000000000000000000000000000000000200000000000000000000000000000000000000000000000000000000 000000000000000000FF20A0000000000000000000000000000000000000000000000000000000000000000000000000020000c30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000230040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FFA6DA00000000000000000000000000000000000000 0000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000000000000 0000000000FF20A0000000000000000000000000000000000000000000000000000000000000000000000000020000000000 0000000000000000000000000000000000000000000000000000000000000000FFA6DA000000000000000000000000000000 000000000000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000000a30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000040004000000000000000000000000000000000000000000000000000000000000000000 000000FF75FB0000000000000000000000000000000000000000000000000000000000000000000000000006000000000000 000000000000000000000000000000000000000000000000000000000000FFC6E10000000000000000000000000000000000 0000000000000000000000000000000000000002040000000000000000000000000000000000000000000000000000000000 00000000000000FF5D5B0000000000000000000000000000000000000000000000000000000000000000000000020004000000630040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF727100000000000000000000000000000000180000000000000000000000000000000000000000060000000000000000 00000000000000000000000000000000000000000000000000000000FF471100000000000000000000000000000000180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF11DB00000000000000000000000000000000e30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF7271000000000000000000000000000000001800000000 0000000000000000000000000000000006000000000000000000000000000000000000000000000000000000000000000000 000000FFA1500000000000000000000000000000000018000000000000000000000000000000000000000004000000000000 000000000000000000000000000000000000000000000000000000000000FFA1500000000000000000000000000000000018 000000000000000000000000000000000000000004000000000000000000000000000000000000000000000000000000000000130040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000080800000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFA15000000000000000000000000000000000180000000000000000000000000000000000000000040000000000000000 00000000000000000000000000000000000000000000000000000000FF124A00000000000000000000000000000000180000 0000020002000000000000000000000000000400000000000000000000000000000000000000000000000000000000000000 0000000000FF840E00000000000000000000000000000000180000000004000400000000000000100800000000040000000000930040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 4711000000000000000000000000000000001800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF4711000000000000000000000000000000001800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF47110000000000000000000000000000000018000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFE474000000000000000000000000000000001800530040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF5FE70000000000000000000000000000002018000000000000 0000000000000000000000000008000000000000000000000000000000000000000000000000000000000000000000000000 00FFD70D00000000000000000000000000000000180000000000000000000000000000000000000001000000000000000000 00000000000000000000000000000000000000000000000000000000FF943000000000000000000000000000000000180000 000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000d30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 0895000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF4711000000000000000000000000000000001800000000000000000000000000000000000000000000000000000000330040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF4711 0000000000000000000000000000000018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFB3F00000000000000000000000000000004008000000000000 0000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 00FF807400000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000 00000000000000000000000000000000000000000000000000000000FF821C0000000000000000000000000000000008000000b30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FFD08700000000000000000000000000000000000000000000000000 00000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000FF 42F3000000000000000000000000000000000800000000000000000000000000000000000000080000000000000000000000 0000000000000000000000000000000000000000000000000000FFDE56000000000000000000000000000000001000000000 000000000000000000000000000000088200000000000000000000000000000000000000000000000000000000000000000000730040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80ED 0000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000 000000000000000000000000000000000000000000000000FF80740000000000000000000000000000000000000000000000 0000000000000000000000000008000000000000000000000000000000000000000000000000000000000000000000000000 00FF81460000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000f30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF53550000 0000000000000000000000000000000000000000000000000000000000000000000008020000000000000000000000000000 00000000000000000000000000000000000000000000FF20A000000000000000000000000000000000000000000000000000 00000000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FFB0AA000000000000000000000000000000400000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7045 0000000000000000000000000000004000000000000000000000000000000000000000000800000000000000000000000000 000000000000000000000000000000000000000000000000FF8E7A0000000000000000000000000000000000000000000000 0000000000000000000000000080000000000000000000000000000000000000000000000000000000000000000000000000008b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8E7A00000000000000000000000000000000000000000000000000 00000000000000000000008000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF8146000000000000000000000000000000000000000000000000cb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF80ED0000000000000000000000000000000000000000000000000000000000 000000000000000400000000000000000000000000000000000000000000000000000000000000000000000000FF16440000 000000000000000000000000000AA00000000000000000000000000000000000000000020000000000000000000000000000 00000000000000000000000000000000000000000000FF807400000000000000000000000000000000000000000000000000 00000000000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000FF002b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000001004000000000000000000000000000000000000000000000000000000000000000000000000FF807400000000 0000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000000000000 0000000000000000000000000000000000000000FFED25000000000000000000000000000000154000000000000000000000 0000000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000FFC565 0000000000000000000000000000000AA000000000000000000000000000000000000000000000000000000000000000000000ab0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000000 000000000000000000000000000000000000FFA6430000000000000000000000000000000000000000000000000000000000 000000000000000C04000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA0000 0000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000 00000000000000000000000000000000000000000000FFE2F90000000000000000000000000000000AA00000000000000000006b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF93BA00000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFEED4000000000000000000000000000000000000000000000000000000 0000000000000000000084000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA00eb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000004000000000000000000000000000000000000000000000000000000000000000000000000FF36C6000000000000 0000000000000000000000000000000000000000000000000000000000000104000000000000000000000000000000000000 000000000000000000000000000000000000FFC6E10000000000000000000000000000000000000000000000000000000000 000000000000000204000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA0000 0000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000001b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000002000040000000000000000000000000000000000000000 00000000000000000000000000000000FF93BA00000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000000000000000000000000000000000000000000FF66AC00000000 0000000000000000000000000000000000000000000000000000000000000000040400000000000000000000000000000000 0000000000000000000000000000000000000000FFA6DA000000000000000000000000000000000000000000000000000000009b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF2086000000000000000000000000000000200000000000000000000000000000000000 0000200000000000000000000000000000000000000000000000000000000000000000000000000000FFB0AA000000000000 0000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF43230000000000000000000000000000000000000000000000000000000000 000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000FF1EDE0000005b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000008000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000003b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFD08700000000000000000000000000000000000000000000000000000000000000 00000000000100000000000000000000000000000000000000000000000000000000000000000000000000FF08950000000000bb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF20A0000000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000000007b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000002000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF20A00000000000000000 0000000000000000000000000000000000000000000000000000000002000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000fb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FFC0DA00000000000000000000000000400000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFC0DA000000000000000000000000004000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF93BA00000000000000070040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF68AE000000000000000000000000 0000000000000000000000000000000000000000000000000280000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF68AE0000000000000000 000000000000000000000000000000000000000000000000000000000280000000000000000000000000000000000000000000870040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000FF80ED00000000000000000000000000000000000000000000000000000000000000000000000004 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000470040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF81F2000000000000000000000000000000000000000000000000000000000000000000000800000000 0000000000000000000000000000000000000000000000000000000000000000000000FF20A0000000000000000000000000 0000000000000000000000000000000000000000000000000200000000000000000000000000000000000000000000000000 000000000000000000000000FF93BA0000000000000000000000000000000000000000000000000000000000000000000000 000002000000000000000000000000000000000000000000000000000000000000000000000000FF81F2000000000000000000c70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000006000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000270040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000048000000000000000000000000000000000000000000000000000000000 0000000000000000FF75FB000000000000000000000000000000000000000000000000000000000000000000000000000600 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF75FB000000000000000000000000000000000000000000000000000000000000000000000000a70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFA6CD0080000000000000000000000000000000000000000000000000000000000000000000000404000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFE5E700000000000000000000000000000000000000000000000000000000000000000000000001 06000000000000000000000000000000000000000000000000000000000000000000000000FFC8E30000000000000000000000670040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF66BB00800000000000000000000000000000 0000000000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000010000000000000000000000006000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFA6DA0000000000000000000000000000 0000000000000000000000000000000000000000000000040000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000170040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFA6DA00000000000000000000000000000000 0000000000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF8A6F00000000000000000000000000970040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FFBF0F000000000000000000000000000000000000 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000570040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF807400000000000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000d70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF93BA000000000000000000000000000000000000 0000000000000000000000000000000000000002000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000370040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF814600000000000000000000000000000000000000000000000000000000000000000000000010000000000000 00000000000000000000000000000000000000000000000000000000000000FF807400000000000000000000000000000000 000000000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000000000b70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000100000000000000000000000000000000000100000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF5D20000000000000000000000000000000000000 0000000000000000000000000000000000000800000000000000000000000000000000000800000000000000000000000000 000000000000FF8074000000000000000000000000000000000000000000000000000000000000000000000000080000000000770040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5D2000000000000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000800000000000000000000000000000000000000FF7BED0000000000000000000000000000000000f70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000 0000000000000000000000000000080000000000000000000000000000000000080000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF5D200000000000000000000000000000000000000000 0000000000000000000000000000000008000000000000000000000000000000000008000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000008f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF7B ED00000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000001000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000004f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000800000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF80740000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000 000000000000000000000000000000000000000000000000000000FF81460000000000000000000000000000000000000000 000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000cf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5D20000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000002f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFE24200 0000000000000000000000000000000000000000000000000000000000000000000000100400000000000000000000000000 0000001004000000000000000000000000000000000000FF8074000000000000000000000000000000000000000000000000 0000000000000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000 FFD9340000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000 000000000000000004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000af0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000004000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF19 DB00000000000000000000000000000000000000000000000000000000000000000000000008040000000000000000000000 00000000000004000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFD934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000ef0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000000000000000 000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFD93400000000000000000000000000000000000000000000001f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFD934000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000009f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFDA9A0000000000000000000000000000000000000000000000000000 000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000000000FFDA 9A00000000000000000000000000000000000000000000000000000000000000000002000000000000000000000000000000005f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000df0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40003f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000007f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFAC4D0000000000000000000000000000000000000000000000000000000000000000 000000000002000000000000000000000000000000000002000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D0000ff0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF41A9000000000000000000000000000000000000000000000000000000000000 0000000000001800000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9DCF0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000808040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF243500000000000000000000000000000000000000000000000000000000000000000000 00000482000000000000000000000000000000000002000000000000000000000000000000000000FF211A00000000000000 0000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9DCF00000000408040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0200000000000000000000000000000000000000000000000000000000000000000000000000FF73BE000000000000000000 0000000000000400000000000000000000000000000000000000000300000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000840000000000000000000000000000000000040000000000 00000000000000000000000000FFC8E300000000000000000000000000000000000000000000000000000000000000000000 00000480000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF20A000000000000000000000000000000000000000000000000000000000000000208040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFB90F000000000000000000000000000000000000000000000000000000000000000000000000 0204000000000000000000000000000000000004000000000000000000000000000000000000FF0126000000000000000000 0000000000000000000000000000000000000000000000000000000184000000000000000000000000000000000004000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF913A000000000000a08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD9340000000000000000000000 0000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000000000 00000000000000000000000000FFEE7F00000060000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000204000000000000000000000000000000000000FFB90F00000000000000 000000000000000000000000000000000000000000000000000000000002040000000000000000000000000000000000040000608040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000000000000000000000000004000000000000000000000000000000000000FF9B18000000000000000000 0000000000000000000000000000000000000000000000000000000002000000000000000000000000000000000202000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000e08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FFB3050000000000000000000000000000000000000000000000100000000500000000100000000506 000000100000000110000000000000000006000000000000000000000000000000000000FFD9340000000000000000000000 0000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000000000 00000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000004000000000000000000000000000000000000FFD9340000000000000000108040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE90B00000000000000000000000000 0000000000000000000000000000000000000008000000028000000008000000008800000000000000000000000000000000 0000000000000000000000FF35E2000000000000000000000000000000000000000000000000000000000000000000000000 0006000000000000000000000000000000000006000000000000000000000000000000000000FFEA79000000000000000000 000000000000000000000000000008000000020000000000000000000000000000000000000000000000000000000000000000908040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFC0980000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000508040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF625500000000000000000000000000 0000000000000000000000000000000000000000000000080000000000000000000000000000000000082000000000000000 0000000000000000000000FF649C000000000000000000000000000000000000000000000000000000000000000000000000 0040000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000d08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000000 0000000000000000000000000800000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFCDEC0000000000000000000000000000000000000000000000000000000000000000000000000020 000000000000000000000000000000000020000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000308040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000009000000000000000000000000000000000009000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF7BED00000000000000000000000000 0000000000000000000000000000000000000000000000100000000000000000000000000000000000100000000000000000 0000000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000000000000000b08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF7BED000000000000000000000000000000000000000000000000000000000000000000000000100000000000 0000000000000000000000001000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFB1F60000000000000000000000000000000000000000000000000000000000000000000000000802 000000000000000000000000000000000802000000000000000000000000000000000000FF7697000000000000000000000000708040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000002000000000000000000000000000000000000FF6B2C0000000000000000000000000000000000 0000000000000000000000000000000000000001000000000000000000000000000000000001000000000000000000000000 00000000000000FF17F500000000000000000000000000000000000000000000000000000000000000000000000002000000 00000000000000000000000000000200000000000000000000000000000000000000FF5D2000000000000000000000000000 000000000000000000000000000000000000000000000008000000000000000000000000000000000008000000000000000000f08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000020000020000000000000000000000000000000000001000000000000000000000000000000 0000000000FF1F2A0000000000000000000000000000000000000000000000000000000000000000000000000C0200000000 0000000000000000000000000C02000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF7F6C000000000000000000000000000000000000000000000000000000000000000000000000000000088040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF80030000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 000000000000000000000000000000000000000000000000000000000000FFC3E90000000000000000000000000000000000 0000000000000000000000000000000000002010000000000000000000000000000000000010000000000000000000000000 00000000000000FF7BED00000000000000000000000000000000000000000000000000000000000000000000000010000000 00000000000000000000000000001000000000000000000000000000000000000000FF9FBA0000000000000000000000000000888040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000002000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFCEC8000000000000000000000000000000 000000000000000000000000000000000040000000000000000000000000000000000000000000800000000000000000000000488040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000900000000000000000000000000000000000800000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFAC4D0000000000000000000000000000000000 0000000000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FF7B3D0000000000000000000000000000000000000000000000000000000000000000000000000002100600c88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF17F500000000000000000000000000000000000000 0000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000000000 0000000000FFBD4F000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000080000000000000000000000000000000000000FFCD3C00000000000000000000000000000000288040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000200000000000000000000000000000000000000FF0E94000000000000000000000000000000000000000000 0000000000000000000000000000001006000000000000000000000000000000001006000000000000000000000000000000 000000FF76970000000000000000000000000000000000000000000000000000000000000000000000000900000000000000 000000000000000000000900000000000000000000000000000000000000FFD9340000000000000000000000000000000000 000000000000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000a88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFC48F00000000000000000000000000000000000000 0000000000000000000000000000000000080400000000000000000000000000000000080400000000000000000000000000 0000000000FF17F500000000000000000000000000000000000000000000000000000000000000000000000002000000000000688040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF D934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000 0000000000000004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFD934000000000000000000000000000000000000e88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000004000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000000000 0000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000000000 00FF35E200000000000000000000000000000000000000000000000000000000000000000000000000060000000000000000 00000000000000000006000000000000000000000000000000000000FFD93400000000000000000000000000000000000000 000000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000188040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000000000FF 4FDF000000000000000000000000000000000000000000000000000000000000000000000020000400000000000000000000 0000080000000004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000988040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFD1F90000000000000000000000000000000000000000000000 0000000000000000000000002000000000000000000000000000000000004000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF69FD0000000000000000000000000000000000000000588040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF1D45000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000d88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000100000000000000000000000000000000000100000000000000000000000000000000000000FF1997 0000000000000000000000000000000000000000000000000000000000000000000000000082000000000000000000000000 000000000082000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000388040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF B7B8000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000 0000000000000200000000000000000000000000000000000000FF6B2C00000000000000000000000000000000000000000000b88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0400000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80A1 8000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000788040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000440000000080000000000000000000000000000000000000000000000000000000000000000000FFAC4D0000 0000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000 00000002000000000000000000000000000000000000FFFCCC00000000000000000000000000000000000000000000000000 00000000000000000000000050000000000000000000000000000000000050000000000000000000000000000000000000FF 2E3100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFC791000000000000000000000000000000000000000000000000000000 0000000000000000440000000000000000000000000000000000000000000000000000000000000000000000000000FF8636 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000000000000000000000000000000000000FF04C6000000000000000000000000000000000000000000000000048040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF80740000000000000000000000000000000000000000000000000000000000 000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000FFBEB10000 0000000000000000000000000000000000000000000000000000000000000000000000280000000000000000000000000000 00000028000000000000000000000000000000000000FF6CA200000000000000000000000000000000000000000000000000 00000000000000000000000802000000000000000000000000000000000002000000000000000000000000000000000000FF00848040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF2E31000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000448040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF77CE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000200000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000c48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002000000 00000000000000000000000000000000FF17D500000000000000000000000000000000000000000000000000000000000000 00000000008004000000000000000000000000000000000004000000000000000000000000000000000000FF8E7A00000000 0000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00248040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000204000200000000000000000000000000000204000000000000000000000000000000000000FF3FDA000000000000 0000000000000000000000000000000000000000000000000000000000000104000200000000000000000000000000000104 000000000000000000000000000000000000FFDEEC0000000000000000000000000000000000000000000000000000000000 0000000000000000A4000000000000000000000000000000000084000000000000000000000000000000000000FFA5F70000 000000000000000000000000000000000000000000000000000000000000000000000220000000000000000000000000000000a48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000000000FFD93400000000 0000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000000000 0004000000000000000000000000000000000000FF430300000000000000000000000000000000000000000000000000000000648040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000400000000 0000000000000000000000000000FF0460000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000000000000000000000000804000000000000000000000000000000000000FF35E2000000000000 0000000000000000000000000000000000000000000000000000000000000006000000000000000000000000000000000006 000000000000000000000000000000000000FF9DCF0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000800000000000000000000000000000000000000FF409B000000e48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000000 000004000000000000000000000000000000000004000000000000000000000000000000000000FF5DEA0000000000000000 00000000000000000000000000050004000000001000051008000000000C0005081000000000200004001000000000040000 00000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000000000FFD93400000000 000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000148040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFE7C2000000000000000000000000000000000000000000000000000000000000008808 0000000008000288080000000020000200080000000000000000000000000000000000000000000000FFD934000000000000 0000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000004 000000000000000000000000000000000000FF707D000000000000000000000000000000000000000000008000000000000800948040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF66AC0000000000000000 0000000000000000000000000004000400000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000548040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF152E000000000000000000000000000000000000000000000000000000000000000000 0000000880000000000000000000000000000000000800000000000000000000000000000000000000FF2C83000000000000 000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000003200d48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000800000000000000000000000000000000000820000000000000 000000000000000000000000FFF54C0000000000000000000000000000000000000000000000000000000000000000000000 000012000000000000000000000000000000000002000000000000000000000000000000000000FFD34E0000000000000000 0000000000000000000000000000000000000000000000000000000000C00000000000000000000000000000000000080000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000348040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF0A5D00000000000000000000000000000000000000000000000000000000000000000000000008 02000000000000000000000000000000000902000000000000000000000000000000000000FFAC4D00000000000000000000 0000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200000000 0000000000000000000000000000FFD36B000000000000000000000000000000000000000000000000000000000000000000 0000001048000000000000000000000000000000001000000000000000000000000000000000000000FF625500000000000000b48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000080000 0000000000000000000000000000000900000000000000000000000000000000000000FFD540000800000000000000000000 0000000000000000000000000000000000000000000000001000000000000000000000000000000000001400000000000000 000000000000000000000000FF809C0008000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF152E0000000000000000 000000000000000000000000000000000000000000000000000000000880000000000000000000000000000000000800000000748040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFC89200080000000000000000000000000000000000000000000000000000000000000000000000 80000000000000000000000000000000000000000000000000000000000000000000000000FF20A000000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000 0000000000000000000000000000FFE68B00000000000000000000000000000000000000000000000000000000000000000000f48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFD1A0000000000000000000000000000000000000000000000000000000000000008000000000000200 0000000000000000000020000000000002000000000000000000000000000000000000FF3D1B000000000000000000000000 0000000000000000000000000000000000000000000000000A00000000000000000000000000000000000800000000000000 000000000000000000000000FF77CE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000200000000000000000000000000000000000000FF409B0000000000000000000c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000040000000100000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFEADA40080000000000000000000000000000000000000000000000000000000000000000800000 00000000000000000000000000000080000000000000000000000000000000000000000000FFA6BE40000000000000000000 0000000000000000000000000000000000000000000000010000080000000000000000000000000000008010080000000000008c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000018000000000000000000000000000000000000000000000000000000 0000000000000000FF7BED000000000000000000000000000000000000000000000000000000000000000000000000100000 0000000000000000000000000000001000000000000000000000000000000000000000FF1962000800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000000 000000000000000000000000FF11190000000000000000000000000000000000000000000000000000000000000100000000004c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF5D200000000000000000000000000000000000000000000000000000000000000000000000000800000000 000000000000000000000000000800000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF196100000010000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000080000000000000000000000000000000000FF404A0008000800000000000000cc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 00000000000000000000000404000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF744C200000000000000000000000000000000000000000000000000000000000000000000000000200 0000000000000000000000000000000002000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000 000000000000FF12434000000000000000000000000000000000000000000000000000000000000000000000001004000000 000000000000000000000000001004000000000000000000000000000000000000FF9D270008000000000000000000000000 0000000000000000000000000000000000000000000008000000000000000000000000000000000008000000000000000000 00000000000000000000FFD7A50000000000000000000000000000000000000000000000000000000000000000000000000200ac8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000000000 0000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000000000 0000000000000000FF33AC0000000000000000000000000000000000000000000000000000000000000000000000000C0400 0000000000000000000000000000000A04000000000000000000000000000000000000FFD934000000000000000000000000006c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000004000000000000000000000000000000000000FF1939001000000000000000000000000000000000 0000000000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000 000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFF5410000000000000000000000000000 000000000000000000000000000000000000000000000080000000000000000000000000000000000080000000000000000000ec8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000004040000000000000000000000000000000002040000000000000000000000000000 00000000FFB79E00000000000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000404000000000000000000000000000000000000FF6CEE00000000000000000000000000000000 0000000000000000000000000000000000000000008400000000000000000000000000000000008400000000000000000000 0000000000000000FFB90F000000000000000000000000000000000000000000000000000000000000000000000000020400001c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF33CC800000000000000000000000000000000000000000000000000000000000000000000002800000000000000000 0000000000000400000000000000000000000000000000000000000000FFAFA2000000000000000000000000000000000000 0000000000000000000000000000000000000004000000000000000000000080000000000004000000000000000000000000 000000000000FF809C0008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF2E170000000000000000000000000000009c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000100000000000000000000000000000000000000000000000000FF99690000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000804000000000000000000000000 00000000FF06AC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000400000000000000000000000000000000000000000000FFD5FA80000000000000000000000000000000 0000000000000000000000000000000000000002800000000000000000000000000000000000000000000000000000000000005c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF3364000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 000000000000FFADB7000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF6B2C0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000100000000000000000000000000000000000000FFD0870000000000000000000000000000000000000000 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 00000000FF1D4E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000080000000000000000000000000000000000000FF609D00000000000000000000000000000000003c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF80ED00000000000000000000000000000000000000000000 0000000000000000000000000000040000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE230100000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000bc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000400000000000000000000000000000000000200000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF269B8800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF809C00080000000000000000000000000000000000000000000000000000000000000000000000000000000000007c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF3F 5100000000000000000000000000000000000000000000000000080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFB7B800000000000000000000000000000000000000fc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFBF0F0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000828040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF6B2C0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000100000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000428040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF54100000000000000000000000000000000000000000000 000000000000000000000000000000800000000000000000000000000000000000800000000000000000000000000000000000c28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000080000000000000000000000000000000000000000000000000000000000000000000000FFD93400 0000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000228040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFAE4F000000 0000000000000000000000000000000000000000000000000000000000000000000084000000000000000000000000000000 000024000000000000000000000000000000000000FFAE4F0000000000000000000000000000000000000000000000000000 000000000000000000000084000000000000000000000000000000000024000000000000000000000000000000000000FFD7 D200000000000000000000000000000000000000000000000000000000000000000000000000040800000000000000000000 00000000000404000000000000000000000000000000000000FF20D70000000000000000000000000000000000000000000000a28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000004 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3B0400 0000000000000000000000000000000000000000000000000000000000000000000000000608000000000000000000000000 0000000406000000000000000000000000000000000000FF6860000000000000000000000000000000000000000000000000 180000000000000000000000000400000000000000000000000000000000040400000000000000000000000000000000000000628040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF35E2000000 0000000000000000000000000000000000000000000000000000000000000000000006000000000000000000000000000000 000006000000000000000000000000000000000000FFB9780000000000000000000000000000000000000000000000000000 000000000000000000000004080000000000000000000000000000000004000000000000000000000000000000000000FF2E 310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFD85C00000000000000000000000000000000000000000000000000000002 00000100000100000404000100000100000010000100000000000004000000000000000000000000000000000000FFD93400 0000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000004000000000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000128040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96E1000000 0000000000000000000000000000000000000000000000000200000000000000000200000080000080000008000080000000 000000000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000000000000000 000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF4000928040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D0000000000 0000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000 02000000000000000000000000000000000000FF6D0B00000000000000000000000000000000000000000000000000000000 00000100000100000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000528040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000800 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2E7D000000 0000000000000000000000000000000000000000000000000000000000000000000808000000000000000000000000000000 000808000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000d28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000000000 000000000000000000000000000000FF5D200000000000000000000000000000000000000000000000000000000000000000 000000000800000000000000000000000000000000000800000000000000000000000000000000000000FFD0870000000000 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF33C60000328040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000800000000000000000000000000000000000800000000000000000000000000000000000000FFE8FA00000000000000 0000000000000000000000000000000000000000000000000000000000088000000000000000000000000000000000088000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEBF1000000 000000000000000000000000000000000000000000000000000000000000000000110000000000000000000000000000000000b28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000800000000 000000000000000000000000000000FF973B0000000000000000000000000000000000000000000000000000000000000000 000000001002000000000000000000000000000000001002000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF5D200000000000000000000000000000000000000000000000000000000000728040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B2C00000000000000 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000010000 0000000000000000000000000000000000FF4E0A000000000000000000000000000000000000000000000000000000000000 0000000000000200000000000000000000000000000000000400000000000000000000000000000000000000FF5D2000000000f28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 1002000000000000000000000000000000001002000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFB1F60000000000000000000000000000000000000000000000000000000000000000 000000000802000000000000000000000000000000000802000000000000000000000000000000000000FFB7B80000000000 0000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000002000a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF009700000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000400000000000000000000000000000000FF7BED00000000000000 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000100000 0000000000000000000000000000000000FF973B000000000000000000000000000000000000000000000000000000000000008a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000004a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF5D200000000000000000000000 0000000000000000000000000000000000000000000000000008000000000000000000000000000000000008000000000000 00000000000000000000000000FFF54100000000000000000000000000000000000000000000000000000000000000000000 00000080000000000000000000000000000000000080000000000000000000000000000000000000FF609D00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFF541000000000000000000000000000000000000000000000000000000000000000000000000 0080000000000000000000000000000000000080000000000000000000000000000000000000FF17F5000000000000000000 0000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000002a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF17F50000000000000000000000000000000000000000000000000000000000000000000000000200 000000000000000000000000000000000200000000000000000000000000000000000000FFE2420000000000000000000000 0000000000000000000000000000000000000000000000000010040000000000000000000000000000000010040000000000 00000000000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000000000 00000800000000000000000000000000000000000800000000000000000000000000000000000000FFD9340000000000000000aa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000020000 00000000000000000000000000000002000000000000000000000000000000000000FFD93400000000000000000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FF7F6C000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000002000000000000000000000000000000000000FF17AE000000000000000000 0000000000000000000000000000000000000000000000000000000806000000000000000000000000000000000804000000006a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000004000000000000000000000000000000000004000000000000000000 000000000000000000FFD9340000000000000000000000000000000000000000000000000000000000000000000000000004 000000000000000000000000000000000004000000000000000000000000000000000000FF7F6C0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000 00000000000000000000000000FFAC4D0000000000000000000000000000000000000000000000000000000000000000000000ea8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000 00000000000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000000000000000000000000004000000000000000000000000000000000000FFD934000000000000000000001a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FFF230000000000000000000000000000000 0000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF43730000000000000000000000000000000000000000000000000000000000000000000080000004 000000000000000000000000000080000004000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000020000000000000000000000000001000000020000000000000000000000 00000000000000FF035D00000000000000000000000000000000000000000000000000000000000000000000000000000001 10000000000000000000000000000000000010000000000000000000000000000000FF961A00000000000000000000000000 0000000000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFF230000000000000000000000000000000000000000000000000020000000000000000000000005a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF035D000000000000000000000000000000 0000000000000000000000000000000000000000000000000110000000000000000000000000000000000010000000000000 000000000000000000FF7F6C0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000002000000000000000000000000000000000000FF35C1000000000000000000000000da8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000400000000000000000000000000000000000000FFFB300000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 00000000000000FFBD4F00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000080000000000000000000000000000000000000FFD08700000000000000000000000000 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000003a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000008200000000000000000000000000000000000200000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFEE47000000000000000000000000000000000000000000000000000000000000000000000000040000ba8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF2E310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000400000000000000000000000000000000000000FF20A00000000000000000000000000000000000 0000000000000000000000000000000000000002000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE44300000000000000000000000000007a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF789C00000000000000000000000000000000000000 0000000000000000010000000000000020000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF805A010000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF7E700100000000000000000000000000000000000000000000000000000000000000000000000028000000000000 000000000000000000000028000000000000000000000000000000000000FF1C450000000000000000000000000000000000 0000000000000000000001000000000000004000020000000000000000000000000000000000020000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000068040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBEB1000000000000000000000000000000000000000000000000000000000000000000000000002800000000 0000000000000000000000000028000000000000000000000000000000000000FF409B00000000000000000000000000000000868040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000468040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000020000000000000000000000000000000000020000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000c68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 17F5000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000 0000000000000200000000000000000000000000000000000000FFD934000000000000000000000000000000000000000000 0000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFAC4D000000000000000000000000000000000000268040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000004000000000000000000000000000000000000FFAA230000000000000000000000000000000000000000000000 00000000000000000000000000020C0000000000000000000000000000000802840000000000000000000000000000000000 00FFFD4D000000000000000000000000000000000000000000000000000000000000000000000000000C0000000000000000 00000000000000080084000000000000000000000000000000000000FFD93400000000000000000000000000000000000000 000000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000a68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000800000000000000000000000000000000000800000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFD934000000000000000000000000000000000000000000 0000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000668040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFD934 0000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000 000000000004000000000000000000000000000000000000FFC48F0000000000000000000000000000000000000000000000 0000000000000000000000000008040000000000000000000000000000000008040000000000000000000000000000000000 00FF35E200000000000000000000000000000000000000000000000000000000000000000000000000060000000000000000 00000000000000000006000000000000000000000000000000000000FF5D200000000000000000000000000000000000000000e68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000004000000000000000000000000000000000000FFB5E600000000000000000000000000000000000000000000000000 00000020000000000000200006000000000000000000000000000000000006000000000000000000000000000000000000FF 4613000000000000000000000000000000000000000000000010000000044000000010008040044400000010010040044000 0000100000000004000000000000000000000000000000000000FFE761000000000000000000000000000000000000000000 000000004000000000000000000000000400000000000000000000000000000000000400000000000000000000000000000000168040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF982F0000000000000000000000000000000000000000000000 0000000000000000000800800002200000000800802002200000000800000000000000000000000000000000000000000000 00FFD9340000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000968040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 6B09000000000000000000000000000000000000000000000010004000040000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000568040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FFDF7C000000000000000000000000000000000000000000000000000000 0000000000000000000200000000000000000000000000000000000008000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF38CB0000000000000000000000000000000000000000000000 000000000000000000000000000AA0000000000000000000000000000000000808000000000000000000000000000000000000d68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000001100000000000000000000000000000000001100000000000000000000000000000000000000FF757B0000 0000000000000000000000000000000000000000000000000000000000000000000009500000000000000000000000000000 00000940000000000000000000000000000000000000FF80AA00400000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF BA9700000000000000000000000000000000000000000000000000000000000000000000000000A00000000000000000000000368040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (CD3C00000000 0000000000000000000000000000000000000000000000000000000000000000090000000000000000000000000000000000 0800000000000000000000000000000000000000FFA0F4000000000000000000000000000000000000000000000000000000 0000000000000000000800000000000000000000000000000000000880000000000000000000000000000000000000FF8346 0040000000000000000000000000000000000000000000000000000000000000000000000050000000000000000000000000 000000000040000000000000000000000000000000000000FF505A000000000000000000000000000000000000000000000000b68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000200 000000000000000000000000000000000000FF76970000000000000000000000000000000000000000000000000000000000 000000000000000900000000000000000000000000000000000900000000000000000000000000000000000000FFBBEA0008 0000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 00001000000000000000000000000000000000000000FF809C00080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00768040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000400000000000000000000000000000000000400000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF6C4A000800000000000000000000000000000000000000000000000000 0000000000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FF17F5 000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000f68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 0000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000800 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5D200000 0000000000000000000000000000000000000000000000000000000000000000000008000000000000000000000000000000 00000800000000000000000000000000000000000000FFEE4700000000000000000000000000000000000000000000000000000e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF709D400800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAD21008e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFACD2000800000000 0000000000000000000000000000000000000000000000000000000000000002100000000000000000000000000000000002 000000000000000000000000000000000000FF7BED0000000000000000000000000000000000000000000000000000000000 000000000000001000000000000000000000000000000000001000000000000000000000000000000000000000FFE0D00008 0000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000004e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000 00000000000800000000000000000000000000000000000800000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000ce8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080200000000 0000000000000000000000000000FF2E17000000000000000000000000000000000000000000000000000000000000000000 0000000404000000000000000000000000000000000204000000000000000000000000000000000000FFAC4D000000000000 0000000000000000000000000000000000000000000000000000000000000002000000000000000000000000000000000002 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF989A2000002e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000C04000000000000000000000000000000000A04000000000000000000000000000000000000FFD9340000000000000000 0000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000 00000000000000000000000000000000FFFE9540000000000000000000000000000000000000000000000000000000000000 00000000001006000000000000000000000000000000001006000000000000000000000000000000000000FF71F100080000 000000000000000000000000000000000000000000000000000000000000000008020000000000000000000000000000000000ae8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000008000000000000000000000000000000000000000000000 0000000000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000000000000000000000000004000000000000000000000000000000000000FF629F000000000000 0000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000104 000000000000000000000000000000000000FF33AC0000000000000000000000000000000000000000000000000000000000006e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFB90F0000000000000000000000000000000000000000000000000000000000000000000000 000204000000000000000000000000000000000004000000000000000000000000000000000000FFD9340000000000000000 0000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000 00000000000000000000000000000000FF8E3080000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000400000000000000000000000000000000000000FF08950000000000ee8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF2E1700000000000000000000 0000000000000000000000000000000000000000000000000000040400000000000000000000000000000000020400000000 0000000000000000000000000000FF35E2000000000000000000000000000000000000000000000000000000000000000000 0000000006000000000000000000000000000000000006000000000000000000000000000000000000FFACE9000800000000 0000000000000000000000000000000000000000000000000000000000000084000000000000000000000000000000000084001e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000210000000000000000000000000000000000000000000000000000 000000000000000000000000FF54708008000000000000000000000000000000000000000000000000000000000000000000 208000000000000000000000000000000000660000000000000000000000000000000000000000FF50530000000000000000 0000000000000000000000000000000000000000000000000000200000040000000000000000000000000000800000040000 00000000000000000000000000000000FF809C00080000000000000000000000000000000000000000000000000000000000009e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF125600000000000000000000000000000000000000000000000000000000000000000000400000 00000000000000000000000000000100000000000000000000000000000000000000000000FFDC2980001000000000000000 0000000000000000000000000000000000000000000000000000000008000000000000000000000000000000000008000000 0000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF855F800000000000005e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000008000 0000000000000000000000000000000100000000000000000000000000000000000000FF859A000010000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFF3FC0000000000000000 000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000100000de8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D00000000000000000000 0000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200000000 0000000000000000000000000000FF133F800000000000000000000000000000000000000000000000000000000000000000003e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF209D800800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFDBB8900000000000000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000200000000000000 000000000000000000000000FFF5410000000000000000000000000000000000000000000000000000000000000000000000 000080000000000000000000000000000000000080000000000000000000000000000000000000FF80FA008000000000000000be8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFB1D80880000000000000000000000000 0000000000000000000000000000000000000000000004000000000000000000000000000000000002000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000002 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF7C7E000000000000000000000000000000000000000000020002000000000000000000000000000000 0000000000000000000000000000000000400000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000fe8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF211A0000000000000000000000000000000200000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFE95300000000000000000000000000000000000000000004000400000000000000000000000000 00000000000000000000000000000000000000400000000000000000000000000000000000FF81190006000000000000000000018040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000002000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000818040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF7B8D0000000000000000000000000000 0000000000000000000000000000000000000000000000480000880000000000000000000000002203200000080000000000 00000000000000000000FF368D0000000000000000000000000000000000000008000000000000000000000000000000000000418040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF3209000000000000000000000000000000000000000000000000000000000000000000000000002800 0088000000000000000000000000420420000008000000000000000000000000000000FFBD4F00000000000000000000000000c18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000404000000000000000000000000000000000000FF20A0000000000000000000000000000000000000 0000000000000000000000000000000000000200000000000000000000000000000000000000000000000000000000000000 000000000000FFD9340000000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000000004000000000000000000000000000000000000FF06E40000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000180000000000000000000218040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FFB90F00000000000000000000000000000000000000000000000000000000000000000000000002040000000000 00000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000000000 0000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000000000 0000000000000000FFB79E00000000000000000000000000000000000000000000000000000000000000000000000000040000a18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFB79E0000000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000000404000000000000000000000000000000000000FFD934000000000000000000000000000000618040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 000000000000000004000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000 0000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000000000 000000000000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000e18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000400000000000000000000000000000000000400000000000000000000000000000000 0000FF52A3000000000000000000000000000000000000000000020002000000000000000000000000000000000000000002 0000000000000000000000000000000000000000000000000000000000FF189C000000000000000000000000000000000000 000000050004000000001000051008000000000C000508000000040020000508400000000004000000000000000000000000 000000000000FFA675000000000000000000000000000000000000000000000000000000000000000000000000000400000000118040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF632600000000000000000000000000000000000000000000000000000000000000880800000000080002882000 00000020000288200000000000000000000000000000000000000000000000FFD9340000000000000000000000000000000000918040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000810000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF520A000000000000000000000000000000000000 000000010000000000001000040000000000000000000000000000000000000000000000000000000000000000000000000000518040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFE29B0000000000000000000000000000000000000000000000000000000000000000000000000800000000000000d18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF7B ED00000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000001000000000000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000 0000000000000000000000000000080000000000000000000000000000000000080000000000000000000000000000000000 0000FFBF47000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000008000000000000000000000000000000000000FF409B00000000000000000000000000000000000000318040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000002000000000000000000000000000000000000FF5D20000000000000000000000000000000000000000000000000 0000000000000000000000000800000000000000000000000000000000000800000000000000000000000000000000000000 FF76970000000000000000000000000000000000000000000000000000000000000000000000000900000000000000000000 000000000000000900000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000400000000000000000000000000000000000400000000000000000000000000000000000000FF5D 2000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000000000 00000000000800000000000000000000000000000000000000FF7BED00000000000000000000000000000000000000000000 0000000000000000000000000000100000000000000000000000000000000000100000000000000000000000000000000000 0000FFAC4D00000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000718040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF77CE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000200000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF19970000000000000000000000000000000000000000000000000000000000000000000000000082000000000000000000 000000000000000082000000000000000000000000000000000000FFEE47000000000000000000000000000000000000000000f18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 001000000000000000000000000000000000000000FF7BED0000000000000000000000000000000000000000000000000000 000000000000000000001000000000000000000000000000000000001000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF9D5600000000000000000000000000000000000000000000 00000000000000000000000000000C000000000000000000000000000000000008000000000000000000000000000000000000098040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000080000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF0097000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000000000 FF7BED000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000898040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFA3CA000000 0000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000200000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAC 4D00000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000 00000000000002000000000000000000000000000000000000FF83CC0000000000000000000000000000000000000000000000498040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000002 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5D2000 0000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000000 0000000800000000000000000000000000000000000000FF2D53000000000000000000000000000000000000000000000000 000000000000000000000000010000000000000000000000000000000000008000000000000000000000000000000000000000c98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000800000000000000000000000000000000000800000000000000000000000000000000000000FFD934000000 0000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000 000004000000000000000000000000000000000000FF2D530000000000000000000000000000000000000000000000000000 000000000000000000000100000000000000000000000000000000000080000000000000000000000000000000000000FF17 F50000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000298040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (250000000000 000000000000000000000000000000000000000000000000000000000000000804000000000000000000000000000000000C 04000000000000000000000000000000000000FF20A000000000000000000000000000000000000000000000000000000000 00000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FFE24200 0000000000000000000000000000000000000000000000000000000000000000000000100400000000000000000000000000 0000001004000000000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000000000a98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFAC4D000000000000000000000000000000000000000000000000000000000000 0000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FFD934000000 0000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000 000004000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAA00698040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000006000000000000000000000000000000000006000000000000000000000000000000000000FFD9340000000000 0000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000 04000000000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200 0000000000000000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000 0000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FFD934000000 0000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000 000004000000000000000000000000000000000000FF35E2000000000000000000000000000000000000000000000000000000198040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF51AE00000000000000000000000000000000000000000000000000000000 00000000000000020004000000000000000000000000000200000004000000000000000000000000000000000000FFAC4D0000998040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFD96500000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008 0000000000000000000000000000000000FFE89B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000080000000000000000000000000000000FFC801000000 000000000000000000000000000000000000000000000000000000000000000002000000000000000000000000000000020000598040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000 000000000000000000000000000000FFE89B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000080000000000000000000000000000000FFD9650000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00080000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000d98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF80ED00000000000000000000000000000000000000000000000000000000000000000000 00000400000000000000000000000000000000000000000000000000000000000000000000000000FF089500000000000000 0000000000000000000000000000000000000000000000000000000000008000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBD4F00000000398040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0002000000000000000000000000000000000402000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B2C0000000000 000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000100b98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000 00000000000000000000000000FF77CE00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000200000000000000000000000000000000000000FF20A000000000000000 0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000 0000000000000000000000000000000000FF62E680000000000000000000000000000000000000000000000000000000000000798040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFAC21000000000000000000000000000000000000000000000000000000000000000000000000 0208000000000000000000000000000000000000000000000000000000000000000000000000FF62FA004000000000000000 0000000040000000000000000000000000000000000100000480000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7F6C000000000000f98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF0C6C0000000000000000000000 0000000000000000000000000000000000000000000000000004080000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFB5AC00400000000000 000000000000400000000000000000000000000000000001000005000000020000000000000000000000000000000000020000058040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000010000000000000000000000000000000000010000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000858040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FFF5410000000000000000000000000000000000000000000000000000000000000000000000000080 000000000000000000000000000000000080000000000000000000000000000000000000FF5B010020000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000002020000000000 00000000000000000000000000FFEE2800200000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000400000000000000000000000000000000000000FF6B2C0000000000000000458040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000404000000000000000000000000000000000004000000000000000000 000000000000000000FF80FA0080000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD9340000000000000000000000 0000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000258040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000 00000000000000000000000000000004000000000000000000000000000000000000FF194200000000000000000000000000 0000000000000000000000000000000000000000000000040400000000000000000000000000000000000400000000000000 0000000000000000000000FF35E2000000000000000000000000000000000000000000000000000000000000000000000000 0006000000000000000000000000000000000006000000000000000000000000000000000000FFD92300800000000000000000a58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000400000000 0000000000000000000000000004000000000000000000000000000000000000FFD087000000000000000000000000000000 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF515B0080000000000000000000 000000000000000000000000000000000000000000000000000084000000000000000000000000000000000004000000000000658040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000060000000000000000000000000000000000060000000000000000000000 00000000000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000 00000000000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FF195500800000000000000000000000000000000000000000000000000000000000000000000000e58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000000400000000 0000000000000000000000000004000000000000000000000000000000000000FFCFA6000000000000000000000000000000 0000000000000000000000000000000020000080000004000000000000000000000000000000000004000000000000000000 000000000000000000FF1D530000000000000000000000000000000000000000000000000400000000000040000110000004 000040000120000000000080000000000004000000000000000000000000000000000000FF35E2000000000000000000000000158040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF4F6900000000000000000000000000 000000000000000000000000000000000000000000080000000000200000A00000000000800000000000000000000000000000958040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000008D000000000000000000000000000000000080000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF65CE000000000000000000000000000000000000000000000000040000000000000000000000000000558040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF08950000000000000000000000000000000000000000000000000000000000000000000000000080000000000000 000000000000000000000000000000000000000000000000000000000000FFAC4D0000000000000000000000000000000000 0000000000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF68280000000000000000000000000000d58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF843100000000000000000000000000000000000000 0000000000000000000000000000000000100000000000000000000000000000000000100800000000000000000000000000 0000000000FFEF22000000000000000000000000000000000000000000000000000000000000000000000000082000000000 0000000000000000000000000800000000000000000000000000000000000000FF73A1000000000000000000000000000000 000000000000000000000000000000000000000000000800000000000000000000000000000000001000000000000000000000358040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000180000000000000000000000000000000 000000FF5D200000000000000000000000000000000000000000000000000000000000000000000000000800000000000000 000000000000000000000800000000000000000000000000000000000000FF152E0000000000000000000000000000000000 0000000000000000000000000000000000000008800000000000000000000000000000000008000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000b58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF20A000000000000000000000000000000000000000000000000000000000000000000000000002000000000000000000 00000000000000000000000000000000000000000000000000000000FF5D2000000000000000000000000000000000000000 0000000000000000000000000000000000080000000000000000000000000000000000080000000000000000000000000000 0000000000FF7BED000000000000000000000000000000000000000000000000000000000000000000000000100000000000 0000000000000000000000001000000000000000000000000000000000000000FF06E400000000000000000000000000000000758040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000C00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF2E310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000400000000000000000000000000000000000000FF3C510000000000000000000000000000000000 000000000000000000000000000000000000000102000000000000000000000000000000000002000000000000000000000000f58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF9B6000000000000000000000000000000000000000000000000000000000000000000000000008020000000000000000 00000000000000040802000000000000000000000000000000000000FF6C5700000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000 0000000000FFF3FC0000000000000000000000000000000000000000000000000000000000000000000000000C0000000000000d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 20D7000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000 0000000000000000000000000000000000000000000000000000FF1903000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000 000000FFCF6D0000000000000000000000000000000000000000000000000000000000000000000000000000000400000000 000000000000000000020000000400000000000000000000000000000000FF409B0000000000000000000000000000000000008d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF00D10000000000000000000000000000000000000000000000 0000000000000000000000000000000800000000000000000000000000000000000002000000000000000000000000000000 00FF9A2A00000000000000000000000000000000000000000000000000000000000000000000000000000004000000000000 00000000000000000000000000000000000000000000000000000000FF7BED00000000000000000000000000000000000000 0000000000000000000000000000000000100000000000000000000000000000000000100000000000000000000000000000004d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF5D20000000000000000000000000000000000000000000 0000000000000000000000000000000800000000000000000000000000000000000800000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF5D20 0000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000 000000000800000000000000000000000000000000000000FF2E170000000000000000000000000000000000000000000000 0000000000000000000000000004040000000000000000000000000000000002040000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000002d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000104000000000000000000000000000000000000FFA4B400000000000000000000000000000000000000000000000000 00000000000000000000000A04000000000000000000000000000000000804000000000000000000000000000000000000FF D934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000 0000000000000004000000000000000000000000000000000000FFD517000000000000000000000000000000000000000000 000000000000000000000000000000100400000000000000000000000000000000120400000000000000000000000000000000ad8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0895 0000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000000000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000000000 0000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000000000 00FF629F00000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000006d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF913A0000 0000000000000000000000000000000000000000000000000000000000000000000000840000000000000000000000000000 00000004000000000000000000000000000000000000FFD7A500000000000000000000000000000000000000000000000000 00000000000000000000000204000000000000000000000000000000000404000000000000000000000000000000000000FF C836000000000000000000000000000000000000000000000000000000000000000000000000000600000000000000000000 0000000000000086000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000ed8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000008000 0004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF1942 0000000000000000000000000000000000000000000000000000000000000000000000000404000000000000000000000000 000000000004000000000000000000000000000000000000FFEE610000000000000000000000000000000000000000000000 0000000000000000000000000000040000000000000000000000000000000002040000000000000000000000000000000000001d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF961A0000 0000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000 00000000000000000000000000000000000000000000FFADED00000000000000000000000000000000000000000000000000 00000000000000000080010000000000000000000000000000000400000000000000000000000000000000000000000000FF 95F2000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000009d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A8AF00000000 0000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000 0000000000000000000000000000000000000000FF0E36000000000000000000000000000000000000000000000000000000 0000000000000000010002000000000000000000000000000500000002000000000000000000000000000000000000FF9C86 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000005d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FFBD4F0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000080000000000000000000000000000000000000FF8E940000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000 00000000000000000000000000000000000000000000FFA8AF00000000000000000000000000000000000000000000000000 00000000000000000000000000000008000000000000000000000000000000000000000000000000000000000000000000FF00dd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000100000000000000000000000000000000000080000000000000000000000000000000000000FF80ED00000000 0000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000 0000000000000000000000000000000000000000FFAC4D000000000000000000000000000000000000000000000000000000 0000000000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FF0895 0000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000003d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000400 000000000000000000000000000000000000FFAC4D0000000000000000000000000000000000000000000000000000000000 000000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FFAC4D0000 0000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000 00000002000000000000000000000000000000000000FF2D530000000000000000000000000000000000000000000000000000bd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF058600000000000000000000000000000000000000000000000000000000000000 00000000000100000000000000000000000000000000000500000000000000000000000000000000000000FF77CE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0200000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEE0B007d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 0000000100000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF027A0000000800000000000000000000000000000000000000080000000400 000000000000000080000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000002800000 00000000000000000000000000000000FFC09100000000000000000000000000000000000000000000000000000004000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEC4800000000 0000000000000000000000000000000000000000000000020000000000000000000200000000000000000000000000000000 0002000000000000000000000000000000000000FF054400000010000000000000000000000000000000000000001000000000038040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020800000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC214000000838040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0004A0000000000000000000000000000000000208000000000000000000000000000000000000FF8C4B0000000000000000 0000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF122500000000 000000000000000000000000000000000000000000000000000000000000000002A00000000000000000000000000000000000438040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000088008000000000000000000000000000000000000000000 0000000000000000000000000000FFA140000000000000000000000000000000000000000000010000000000000000000000 0000001002000000000000000000000000000000000002000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFB268000000000000000000000000000000000000000000000000000000000000c38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFD7A50000000000000000000000000000000000000000000000000000000000000000000000 000204000000000000000000000000000000000404000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFF17600000000000000000000000000000000000000000000000000000000000000 00000000000084080000000000000000000000000000000004000000000000000000000000000000000000FFA8360000000000238040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 04080000000000000000000000000000000004000000000008000000000000000000000000FF7CD400000000000000000000 0000000000000000000000010000000000000000000000000000000000000180000000000000000180000000000000000000 0000000000000000000000000000FFFB2A000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000000000000000000000020204000000000000000000000000000000000000FF95A6000000000000 000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000002000000a38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000100000080000000000000000000000004000000000000000000000000000000000004000000000008 000000000000000000000000FF80030000000000000000000000000000000000000000000000000000000000000000000000 000000100000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF8DD50000000000000000000000000000000000000000000000000080000000000000638040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF16EF00000000000000000000000000000000000000000000000000000000000000004000000004 00000000400000000400000000000000000000000000000000000000000000000000000000FFD93400000000000000000000 0000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000 0000000000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000000000000000000000000004000000000000000000000000000000000000FF214900000000000000e38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000068000 0000200000008208000000000000000000000000000000000000000000000000000000FF1E35000000000000000000000000 0000000000000000000000000000000000800000000000000004000000000000000000000000000000000004000000000800 000000000000000000000000FF14D20000000000000000000000000000000000000000000000080000000080800000000000 000004000000000000000000000000000000000004000000000800000000000000000000000000FF94670000000000000000 000000000000000000000000000000100000000140000000100000400084000000000000010010000000000000000004000000138040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000400000000000004000000000000000000000000000000000000000000000000000000000 00000000000000000000FF20A000000000000000000000000000000000000000000000000000000000000000000000000002 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFCB9500000000000000000000000000000000000000000000000000000000000000002800938040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF23CA000000000000000000000000000000000000000000000000000000000000000000000000080000 0000000000000000000000000000000840000000000000000000000000000000000000FF0D45000000000000000000000000 0000000000000000000000000000000000000000000000000020000000000000000000000000000000000008000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF0090000000000000000000538040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFCE440400000000000000000000000000 0000000000000000000000000000000000000000000000200000000000000000000000000000000000080000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF8639000000000000000000000000000000000000000000000000000000000000000000000000100000 0000000000000000000000000000001080000000000000000000000000000000000000FFD9FE000000000000000000000000 0000000000000000000000000000000000000000000000000800000000000000000000000000000000000920000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000338040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF809C0008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF5D200000000000000000000000000000 0000000000000000000000000000000000000000000008000000000000000000000000000000000008000000000000000000 00000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000000000000008 00000000000000000000000000000000000800000000000000000000000000000000000000FF839A0400000000000000000000b38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF5D20000000000000000000000000000000000000000000000000000000000000000000000000080000 0000000000000000000000000000000800000000000000000000000000000000000000FFBBEA000800000000000000000000 000000000000000000000000000000000000000000000000100000000000000000000000000000000000100000000000000000738040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000800000000000000000000000000000000000800000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF809C0008000000000000000000000000000000000000000000000000000000000000000000000000f38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF5F5840080000000000000000000000000000000000000000000000000000000000000000000010000000000000 00000000000000000000201000000000000000000000000000000000000000FFF80640000000000000000000000000000000 0000000000000000000000000000000000040004100000000000000000000000000000010040100000000000000000000000 0000000000000000FF5E7F000000000000000000000000000000000000000000000000000000000000000000000040000000 0000000000000000000000080000000000000000000000000000000000000000000000FF5D20000000000000000000000000000b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000000 0000000000000000000000000000000000000000000000000000000000FFB09D000800040000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFA5410000000000000000000000000000000000000000000000000000000000000000000000200000000000 000000000000000000100000000000000000000000000000000000000000000000FFAB700000000000000000000000000000 0000000000000000000000000000000000000002000200000001000000000000000000000000800000000000000000000000008b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000004000000000000000000000000000000000002000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09400080000000000800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF5E3F000000020000008000000000000000000000000000000000000000000000000000000000000000004b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF85212000000000000000000000000000000000000000000000000000000000000000000000000800000000 000000000000000000000000000800000000000000000000000000000000000000FFB7B8000000000000000000000000000000cb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000001004000000000000000000000000000000000000FF04880008000000000000000000000000000000000000 0000000000000000000000000000000008040000000000000000000000000000000008040000000000000000000000000000 00000000FF27A440000000000000000000000000000000000000000000000000000000000000000000000002040000000000 00000000000000000000000404000000000000000000000000000000000000FF17F500000000000000000000000000000000 0000000000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000002b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000040600000000000000000000000000000000000600000000000000000000000000000000 0000FFAA25000000000000000000000000000000000000000000000000000000000000000000000000080400000000000000 0000000000000000000C04000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8279000000000000000000000000000000000000000000000000000000000000000000000000120400000000ab8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFEE6100000000000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000204000000000000000000000000000000000000FFF59400000000000000000000000000000000006b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF8E5A00000000000000000000000000000000000000000000 0000000000000000000000000000020400000000000000000000000000000000020400000000000000000000000000000000 0000FF77E8000000000000000000000000000000000000000000000000000000000000000000000000040400000000000000 0000000000000000000404000000000000000000000000000000000000FFF5EF001000000000000000000000000000000000 000000000000000000000000000000000000000600000000000000000000000000000000000600000000000000000000000000eb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000 FF77990008000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000 000000000000000404000000000000000000000000000000000000FFB90F0000000000000000000000000000000000000000 0000000000000000000000000000000002040000000000000000000000000000000000040000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000001b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFE0 9A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFD934000000000000000000000000000000000000009b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFAC4D0000000000000000000000000000000000000000 0000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000000000005b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FF8E 3080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000400000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFEE470000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000 000000000000000400000000000000000000000000000000000000FF20A00000000000000000000000000000000000000000003b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000400000000000000000000000000000000000000FF80A18000000000000000000000000000000000000000000000000000 000000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FF80 9C00080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF820B10000000000000000000000000000000000000000000 000000000000000000000000000002000000000000000000000000000000000004000000000000000000000000000000000000bb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D00 0000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000 0000000002000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFE2301000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFFA1D000000 00000000000000000000000000000000000001000000000000100004000000000D0002000000000000000000000000000000 000002000000000000000000000000000000000000FF522E0000000000000000000000000000000000000000000000000000 000000000000000000000038000400000000000000000000020400000088000100000000000000000000000000000000FF78 3000000000000000000000000000000000000000000000800000000000080004000000000B00080002000000000000000000 00000200000000000080000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000fb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFAC4D00000000000000000000000000000000000000000000000000000000 00000000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FF6F6700 0000000000000000000000000000000000000000000000000000000000000000000000083000000000000000000000000000 0000000110000000000000000000000000000000000000FFF7ED000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004000000000000000000000000000000000000000000000000078040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000210000000000000000000000000000000000200000000000000000000000000000000000000FFD6BF002000 0000000000000000000000000000000000000000000000000000000000000000008000000000000000000000000000000400 000040000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80 740000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000878040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (310000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004 00000000000000000000000000000000000000FF64B900200000400400000000000000000000000000000008400001000100 00000000000000158000000800000000000000000000000200000020000000000000000000000000000000000000FFFFC900 0000000000000000000000000000000000000000080000000000000000000000000000020800080000000000000000000000 0000000000000000000000000000000000000000000000FF4EF400000000000000000000000000000000000000000000000000478040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800000400 0020000000000000000000000000000000FF9D90000000000000000000000000080000000000000020000024000000000000 0000000180140000198A98000000000000000000000008000180000020000000000000000000000000000000FF3797000000 0040040000000000000000000000000000000040000100008000000020000000010000001000000000000000000000000000 000000000000000000000000000000000000000000FF009E0000000000000000000000000000000000000000000000028000 000000000020000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2E00c78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00040002008400020000000000000000000000008000008C000000000000000000000000000000000000FF2D9F0000000000 0000000000000000000000000000000000000000000000000000000002000000040000000000000000000000000000000004 04000000000000000000000000000000000000FF20A000000000000000000000000000000000000000000000000000000000 00000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FF050A00 000000000000000000000008000000000000002000002100000000000000000000000000040002800000000000000000000000278040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000002080002000000008000000000000024000400002008800000000000000000000000008600 0000080080000000000000000000000000FFB81A00000000010000000000000000000200000000000000004800C000000000 0000000000000547941C00000000000000000000000000000004000000000000000000000000000000000000FF5A43000000 0000000000000000000000000000000000000000000000000000000000000000000284000200000000000000000000000080 00050C000000000000000000000000000000000000FF9D2D000000000000000000000000000000000000000000000000000000a78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004000000 000000000000000000000000000000FF558C0000000001000000000000000000000000000000020006420040000000000000 000000000006100020088000000000000000000000000086000000080000000000000000000000000000FF3B9C0000000000 0000000000000000000400000000000010060001000001000000000000004005400402000000000000000000000000000000 02000000000000000000000000000000000000FF15AB00000000000000000000000000000000000000000000001000000000 00000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000FF6C370000678040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100005100C00 0000000C000020080000000020400480000000000004000000000000000000000000000000000000FFAFD500000000000000 0000000000000000000000000000002E00000000000000000000008000000400040000040000000000000040000000000600 0000000000000000000000000000000000FF539F000000000000000000000000000000000000000000000600000000000000 0000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF539F000000 000000000000000000000000000000000000000600000000000000000000000000000400000000000000000000000000000000e78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000060000000000000002080A0080000008200220080200000020200280200000000000000000 000000000000000000000000000000FFF5160000000000000000000000000000000000000000000806000000000000000000 000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF79300000000000 00000000000000000000000000000000088E0000000002080000800000000000044000000000000000000000000000000000 04000000000000000000000000000000000000FFCA6D0000000000000000000000000000000000000000000506040000000400178040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000000000 00000000000000000000000000FF1FDC00000000000000000000000000000000000000000004460400000000000000000000 00000800000000000000000000000000000000000000000000000000000000000000000000000000FF0BED00000000000000 0000000000000000000000000000000600000000000000000000000000100000000000000000000000000000000000000000 0000000000000000000000000000000000FFCA30000000000000000000000000000000000000000000000600000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFFD1000000000978040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFBA5E000000000000000000 00000000000000000000000010160000000000000000000000000008C0000000000000000000000000000000000800000000 000000000000000000000000000000FFF5C70000000000000000000000000000000000000000000006000000000000000000 000000000000000000000000000000000000000000000002000000000000000000000000000000000000FF26E60000000000 000000000000000000000000000000000006000000000000000000000000000002000000000000000000000000000000000000578040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000A0000000000000000000000000000200000000000000000000000000000000000000000000000 00000000000000000000000000FF089500000000000000000000000000000000000000000000000000000000000000000000 00000080000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFCA3000000000000000000000000000000000000000000000060000000000000000d78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFCA30000000000000000000000000000000000000000000000600000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFD6C6000000000000000000 0000000000000000000000001202000000000000000000000000001000000000000000000000000000000000001000000000 000000000000000000000000000000FFAE650000000000000000000000000000000000000000000400000000000000000000 000000000800000000000000000000000000000000000800000000000000000000000000000000000000FF2D67000000000000378040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001000 000000000000000000000000000000001000000000000000000000000000000000000000FF9DBE0008000000000000000000 0000000000000000000008000000000000000000000000000000000000000000000000000000000000000001000000000000 00000000000000000000000000FF6CB700000000000000000000000000000000000000000000020000000000000000000000 00000880000000000000000000000000000000000800000000000000000000000000000000000000FFBF1000000000000000 000000000000000000000000000000040000000000000000000000000008020000000000000000000000000000000008820000b78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000080000000000000000000000000000008000000000000000000000000000000000000000000000000000 0000000000000000000000FF8629000000000000000000000000000000000000000000080000000000000000000000000000 0200000000000000000000000000000000000000000000000000000000000000000000000000FF5D20000000000000000000 0000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000800000000 000000000000000000000000000000FF7B1B000800000400000000000000000000000000000000000000000000000000000000778040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF42CB0000000002000000000000000000000000000000000004000000000000000000000000000C02 000000000000000000000000000000000802000000000000000000000000000000000000FF9F8B0000000000000000000000 0000000000000000000008020000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF196400000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000600000000000000000000000000000000000000FF6E1B0008000000000000f78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000140000000000000000000000000000000000FF7D8C40080000000000000000000000 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFD36F400000000000000000000000002000000000000000100208000000000000000000000000 0800000000000000000000000000000000000800000000000000000000000000000000000000FF0B11000000000000000000 0000000000000000000000000006000000000000000200000000000000000000000000000000000000000000000000000000000f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000060000000000000000000000000010000000A0000000000000000000000000001000000000000000000000 000000000000000000FF8DB30008000000000000000000000000000000000000000000000000000000000000000000000400 000200000000000000000000000000000000000000000000000000000000000000000000FF82DA0000000000000000000000 0000000000000000000000000000000000000004000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF0CC400000000000000000000000000200000000000000000020800000000000000000000008f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFCA3000000000000000000000000000000000000000000000060000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF354500000000000000000000000000 0000000000000000000600000000000010000000000000020000020004000000000000000000000000000008000000000000 0000000000000000000000FFC8BE000880000000000000000000000000000000000000000600000000000008000000000000 00000000A0020000000000000000000000000000040000000000000000000000000000000000FFBAC5000080000000000000004f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FFBCED200000000000000000000000000000 0000000000000006000000000000000000000000000400000000000000000000000000000000000400000000000000000000 000000000000000000FF26D000000000000000000000000000000000000000000002AE000000000000000000000000000002 000000000000000000000000000000000002000000000000000000000000000000000000FFD78B0000000000000000000000 000000000000000000000006000000000000000000000000000800000000000000000000000000000000000800000000000000cf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000002AE0000000000000000000000000010040000000000000000000000000000000010040000000000000000000000 00000000000000FF178C00080000000000000000000000000000000000000000060000000000000000000000000008000000 00000000000000000000000000000800000000000000000000000000000000000000FF53F300000000000000000000000000 0000000000000000055600000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFCA0600000000000000000000000000000000000000000002AE00000000000000000000000000002f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFAE4B000000000000000000000000000000000000000000000600000000000000000000000000000400000000 0000000000000000000000000084000000000000000000000000000000000000FFE0F8000000000000000000000000000000 0000000000000006000000000000000000000000000C04000000000000000000000000000000000C04000000000000000000 000000000000000000FF539F0000000000000000000000000000000000000000000006000000000000000000000000000004 000000000000000000000000000000000004000000000000000000000000000000000000FF98DE400000000000000000000000af8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000004000000000000000000000000000000000000FF9F678000000000018000000000000000000000 0000000000060000000000000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FF5A1A00000000000000000000000000000000000000000002AE0000000000000000000000000001000000 00000000000000000000000000000000000000000000000000000000000000000000FF1B9100000000000000000000000000 0000000000000000000600000000000000000000000000008400000000000000000000000000000000000400000000000000006f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000002AE00000000000000000000000000000400000000000000000000000000000000040400000000000000000000000000 0000000000FF7F4A000000000001000000000000000000000000000000000600000000000000000000000000000400000000 0000000000000000000000000084000000000000000000000000000000000000FF2A12000000000001800000000000000000 00000000000002AE000000000000000000000000000204000000000000000000000000000000000004000000000000000000 000000000000000000FF42FF001000000001000000000000000000000000000000055600000000000000000000000000000400ef8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF6DE00000000000018000000000000000000000000000000006000000000000000000000000000004000000000000 000000000220000000000004000000000000000000000000000000000000FFFF610008000000018000000000000000000000 0000000000060000000000000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FFBD3C00000000000180000000000000000000000000000000060000000000000000000000000004040000 00000000000000000000000000000204000000000000000000000000000000000000FF248300000000000180000000000000001f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000080400000000000000000000000000000000FF55D280000000000180000000000000000000000000 0000000600000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000 0000000000FF25FC800000000001800000000000000000000000000000184600000000000000000000000000800000000000 0000000000000000000000000000000000000000000000000000000000000000FFEE67800000000001800000000000000000 0000000000000006000000000000000000000000008000000000000000000000000000000058000000000000000000000000009f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0006000000000000000000000000080000020108008000000000000000000000000000000000000000000000000000000000 000000FFFDB10000000000018000000000000000000000000000000006000000000000000000000000080000000000000000 000000000000000000000000000000000000000000000000000000000000FF3E230000000000018000000000000000000000 0000000000460000000000000000000000000000000200080080000000000004400000000000000000000000000000000000 00000000000000FFCD4400000000000180000000000000000000000000000000060000000000000000000000000000003001005f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFC90700000000000180000000000000000000000000000000000000000000000000000000000001000000000000000000 00000000000000000000000000000000000000000000000000000000FFF91A80000000000180000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF68B5000000000001800000000000000000000000000000000600000000000000000000000000000050000000 0000000000000000000000000000080200000000000000000000000000000000FFAA4500000000000180000000000000000000df8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FFF6BC0000000000AA800000000000000000000000000000 12AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF880B0800000000000000000000000000000000000000000000000000000000000000000000000200000000000000 000000000000000000000400000000000000000000000000000000000000FF2DCE0000000000AA8000000000000000000000 0000000002AA0000000000000000000000000001000000000000000000000000000000000001800000000000000000000000003f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF36358800000000AA8000000000000000000000000000001AAA0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFD52700080000000000000000000000000000000000 0000080400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFC7EC00000000015580000000000000000000000000000005560000000000000000000000000000000000000000bf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 8029000000000000000000000000000200000000000000000080000000000000000000000000000200000000000000000000 0000000000000002000000000000000000000000000000000000FFDD16000400000000000200000000040000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF17F50000000000000000000000000000000000000000000000000000000000000000000000000200000000000000 000000000000000000000200000000000000000000000000000000000000FF409B0000000000000000000000000000000000007f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000280000000000000000000000000000000000000FF8B120000018018018004010000000010018000000000000006 0074060000000000000000000060004000000000000000000000000000000000000000000000000000000000000000000000 00FF046400000000120000000100000000100100000000000018040000040000000000000000000000000000200000000000 00000000000000000000000000000000000000000000000000000000FFDB97000000800800800000800000000C0080000000 000000030032020000000000000000000020004000000000000000000000000000000000000000000000000000000000000000ff8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000804000000000000000000000000000000000000000000000000000000000000000000000000000FF 8557000200800000800000000000020000000000000000000A00200200000000000000000000228080000000000000000000 0000000000000280000000000000000000000000000000000000FFCE88000000601000000001000000001001000000000000 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF3CA3000000800A00800400800000400800800000000000100A00200200000000000000000100228106004000000000004040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF997C 000001C01A000004000000000018010000000000000006006006000000000000000000800001000000000000000000000000 000008000000000000000000000000000000000000000000FF37E10000018018010000000000000018018000000000000006 0060060000000000000000000040000000000000000000000000000000000004000000000000000000000000000000000000 00FF596300000180000180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFCDFB0000018000018004000000004000000000000000804040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000200000A0000000000000000000000000000000FF6CD0000001A01C0080000000000000120000000000000000060040 06000000000000000001004000000000000000000000000000000008000000000000000000000000000000000000000000FF 5A4D000101A01800010014004000111801800000000010010650680604010004000000001001004001000000000000000040 0100100010100200000000040400000000000000000000000000FF5F56000001801801000000000000001801000000000000 000600680600000000000000000000400200000000000000000000000000000000000200000000000000000000000000000000404040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (990600400640 00002080000000800A4006240088080000000020000020000000000006000000080000000000000000000000000000FFB65B 002001C01803810000020000001000800000000010800642C006000018288200180080000140220088080000000020478120 000010000000980000280400000000000000000000000000FFE15C00210180580080001400400000104C0000000000000006 14C0060401000A02000000100140000100000000000000000000001000000800410000A04400000000000000000000000000 00FFEB0000000181580180000000000000104C8000000000000006004006200000000000000000146100800000000000000000c04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFDE060000 018010018000018000000006008000000000000A060040060000000000000000000065000000000000000000000000000000 00000400000000000000000000000000000000000000FF580000000180100080040180000060000000000000000000060048 06000000000000000000004286000000000000000000000000000000000206000000000000000000000000000000000000FF 4427000001801001800401000000000200800000000000000600400600000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF157500000181100280000102000011000000000000000000204040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF961E000001001820800000000000400801800000000000040608700602 8000000000000000024204000020000000000000000080000000000084028000000000000000000000000000000000FF3126 0000018018118000528100000009418000100001800406216006100040328000000100016000900000040400000000010030 010100000000201C00420400100000000000000000000000FF6091000001401A008000008000000008010000000000001006 006006000000000000000000004006000000000000000000000000000000000006000000000000000000000000000000000000a04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006000000 000000000000002000006000000000000000000000000000000000000000000000000000000000000000000000FFFB480000 0080183000004001000180045180000000000000060060061008002000000000000020040040000400000000000000100101 00000104028000000400000000000000000000000000FF8951000001801801800004000001C0020080001000000002061160 06050840140000000100052400104000000200000000010140000000000000200200240000080000000000000000000000FF D5E7000001A01A0180001000000000090900000000000000064060060000000100000000001860008000400000000000000000604040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3E9E000400C0 1010000000000001800400000000000000000600744600000000004000011000000600408000000800010010014000000000 0006000400000000000000000000000000000000FF5328000001801001800000000001800001000000000000000600608600 0000000000000000000000004000000400000000000000000000000400000000000000000000000000000000000000FFF1E5 0000008018000000000000018000018000000000000006006006000000000000000000002004006000000000000000000000 000000000004000000000000000000000000000000000000FF429A000001801801800400000001800001800000000000000600e04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500000000000 000000000000000000000000000000000000FFCE780000018018018000000040018000018000000001001006007006000000 000000000008006000004080000208000000000000100000000200000000000000000000000000000000000000FF3BB70002 00A01000000000000001C0000000000000010010060060060000000004000100000060541004004108000000081000802000 00000004000800000000000000000000000000000000FF9C8800000180120980000020000180000000000000000000060062 A6000000000000000000806000006000000800000000080020000000000000000A00800000000000000000000000000000FF00104040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000004000004000000000000000000000000000000000000000000000000000000000000000000000FF49C700000080 1800000000002001800001000000000000000680600600000000004000010000000000600000000000010000010000000000 0000000000000000000000000000000000000000FF141B000001C01801800000000001800001800000000000180600600600 0000000000000000000000000400400000000000100000000000000000000000000000000000000000000000000000FF655F 000000801A00000000000001800001800000000000000600600600000000040001000080602810400001000000001000010000904040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001001801 8000840000018000C08000000000000886006006000000000000000000004000140000000000000000000000000000000000 000000000000000000000000000000000000FFFA00000200201A000000840002518002D0000000000040008740E226000000 0000000000008C4800848000000000000000000000000000000800000000000000000000000000000000000000FFAB3B0002 41201809800040408001D4040400000000000002261060860000000000000000000040002040000000000000000000000000 00000000000001020000000000000000000000000000FF48120002000018000000000000018000000000000000000006807800504040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000008000000 00410000000000000000000000000000FFE1E100000180500080000000800080000180000000000010020031020000000000 00000000182000612000000000000000000000000000000000000000000000000000000000000000000000FF836900000184 0001800020000020200401000000000000000048020000000000000000000000000200400000000000000000000000000000 0002000000020000000000000000000000000000FF701B0000019000018000100000001E040000000000000000002088A000 0000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000FF2DF400d04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000828800000000000000000000000000000000000800000000000000000000000000000000000000FFD171000001085801 80000A0000118A00210000000000000806206106000000000000000000046000026000000000000000000000000000000000 000000008000000000000000000000000000FFA4A4000400C40C02800200000402A10080800000000000000300280A000000 00000000000130300148A000000000000000000000000000001000000000200000000000000000000000000000FFA6C50002 2020020C00040200001C01012A0000000000201220801010000000000000000000C40800028000000000000000000000000000304040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004004000000 0000040020000400000000000000010000000000000000000000000010010000000000000000000000000000000010000000 01000000000000000000000000000000FF91100000AA0880AA0000800000000880000000000000800AA82282A80000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF71CD00020020 4A008002502002008400908000000000000002902802000000000000000000B0280080200000000000000000000000000000 0800000000800000000000000000000000000000FFBDC700020122120000000400000000422500000000000000048040040000b04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF10A8000000002000000010000000400010000000000080000001100000000000000000 0000340000000000000000000000000000000000000000000000000000000000000000000000000000FFE7F90000AA0AA12A 0000AA0000000AA08800000000000012A82A82A8000000000000000000148000000000000000000000000000000000000000 000000000000000000000000000000000000FFA33A0003543303540003242002001541440000000000001550CC0550000000 000000000000810800800000000000000000000000000000000800000000800000000000000000000000000000FFBC69000400704040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000280 006000006000000000000000020200000280000000200020006000000000000000000000000000FFD9AD0002002013000000 0500020000524200000000000040048008040000000000000000000288008000000000000000000000000000000008000000 01000000000000000000000000000000FF344500000080080080002080080080080000000000000028020020020000000000 00000000302000002000000000000000000000000000000000000000002000000000000000000000000000FFDE730000AA0A A02A0000880000008A84C800000000000002A82A92A80000000000000000004000000000000000000000000000000000000000f04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080000100 0C00901000000000000000220200200200002000000000000000200000201001000000000000000000000000000000000000 2000000000000000000000000000FFBF2F000420401000000400000000400400000000000100100900100000000000000000 0000000000000000000000000000000000000200000000000001000000000000000000000000000000FF6843000400C00800 800400800800C00C000000000001003203003002000020000000000000002800002000000000000000000000000000000800 000001002000000000000000000000000000FFA61E004041801801802001801801801800000000000000601600600600000000084040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000004008 000000000000000000000000FF0EF6000001801800800000801001801800000000000000600600C086000000000000000000 005000008010010000000000000000008000001000000000004010000000000000000000000000FFD9390000018000018000 0000800000000200800000000400000401401100081000200000000000C02100000800000000000000001000000800000000 00000000000000000000000000000000FF993000200180000180200000000000000000000000000000000040000000000000 00000300000000000000000000000000020400000100000000200020000000000000000000000000000000FFC5BB0000009000884040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001048 00000000000000000000000000000000000800000000006000000000000000000000000000FF778700000000590000000080 1951801000000000000000600600600600000000000000000003400032000000000000000000000000000000000000000000 4000000000000000000000000000FF8393000001901801800000809C01901002008000000000600604200600002820002008 0000004800200040080000000000000000000000080800000000004000000000000000000000000000FF5D4A000000001801 000000801001807800000000000004600600E0461100203000000800000051400001A000000000000000000010800000100000484040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000801CA1 80181200000000000062AE2AA2AE00000000000000000034E000046000000000000000000000000000000000000000006000 000000000000000000000000FF336F00000040188000000080184D8018100000000000006006006006000000000000000000 03600024E000000000000000000000000000000000000000006000000000000000000000000000FFF5E60000ABAA982A8000 00801815A0100000000000000062AE2AC2AE0000000000000000002040004180000000000000000000000000000000000000 00006000000000000000000000000000FF3A170000000018010004008018038015540000000000006006006006000000000000c84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060000000 00000000000000000000FF8DEE00002A0AB02A000601801809801C0000000000000062AE2AE2AE0000000000000000002050 04308000000000000000000000000000001004000000006000000000000000000000000000FF336600040182500180040100 1801C01340000000000000600600600600000000000000000000680008600000000000000000000000000000080000000000 6000000000000000000000000000FF327B000154155054000001001901C010C4000000000000655655655600000000000000 0000506004006000000000000000000000000000000004000000006000000000000000000000000000FF57CF0000ABC898AB00284040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000015600400 6000000000000000000000000000000004000000006000000000000000000000000000FF75C5000081801801800000045901 80100000000000000060062860060000000000000000000060000D6000000000000000000000000000000000000000086000 000000000000000000000000FF80F1000000001900000000001B218014000000000000006006006006000000000000000000 10E804126000000000000000000000000000000804000000006000000000000000000000000000FF7E2C000301A010018000 01001805A019340000000000006006006006000000000000000000024000000000000000000000000000000000000000000000a84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (121041019540 0000000000005505564865560000000000000000004500045460000000000000000000000000000000040000005460000000 00000000000000000000FF6F7C00000180180100000400000180000000000000000000061060060000000000000000000000 00006000000000000000000000000000000000000000006000000000000000000000000000FF4AE200002B88982B80000288 180388180000000000002AE2AE0262AE00000000000000000020600020600000000000000000000000000000000000000022 E000000000000000000000000000FFC25A00000004590000014880982984D800000000000000600600E0060000000000000000684040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000000 0000000000000000FF49A30001AB8AB92B00008A0AA0578AA00080000000002A82AE0762AE0000000000000000002A800024 00000000000000000000000000000000000000002AE000000000000000000000000000FFEE7F0000800019000000A002802B 800000800000000000000602E00600000000000000000008000401600000000000000000000000000000000400000000E000 000000000000000000000000FF9F3600002B8AB82B0000A80AA0818AA00080000000002A82AE2062AE000000000000000000 2A800028E0000000000000000000000000000000000000002AE000000000000000000000000000FF904E000054133854000000e84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000006000 000000000000000000000000000000200000006000000000000000000000000000FF9F0D0000020018010000000000018000 0000000000000001070078060000000000000000000000040060000000000000000000000002000000040000000060000000 00000000000000000000FF306700000180180100004000010180000000000000000000062860060000000000000000010000 00136000000000000000000000000000000000000000006000000000000000000000000000FFD1EF00000000188100000000 0029800000800000000000080600E0060000000000000000000000040000000000000000000000000000000000040000000000184040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180020B00 0000000000100700680600000000000000000000000000010020000000000000005040000000000000010000600000040000 0000000000000000FF66EA00002580080100000000000180000100000000000A000600600600000000000000000000000000 0000000000000000000000000000000000000000006000000000000000000000000000FFA68C000040000801000000000001 8404018000000000141406026006000000000000000000000001806000000000000000000000000000000000200000006000 000000000000000000000000FF8B7F000001800001000000000001800001800000000000108602700600000000000000000000984040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000000 000000000000FF0D6C0000000018010000000000018000018000000000000006086006200000208000000080000000200000 000000000000000010080080000008000000006000000000000000000000000000FFC4D90000018818010000000080018000 0500000000000000060060062000000080000000000000003880400000000000000000000000000000000000000060000000 00000000000000000000FF948D00000000180100000000000184000100000000000004060860060000002000000080800000 00000020000000000000000000080480000008000000006000000000000000000000000000FFC16B0000000008010000000000584040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002020000000 000000000000000000000000000000002AA000000000000000000000000000FF87A000008191400100000000002800004800 000000000000010060000000000000000000000000000A000000000000000000000000000000000000000000000000000000 0000000000000000FF7261000001800001800000000080000004000000000000000000000000000000000000000000000000 8000000000000000000000000000000000000000000000000000000000000000000000FFF646000001901801000000008001 800009800000000000000700600600000000000000800000000000810020000000000000004040000000000000008000600000d84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800155000000 0000001557556556000000000000000000000000446000000000000000000000000000000000000001556000000000000000 000000000000FF0D3400002A8888AA8000000000808000AA80000000000002AA2AA2AA00000000000000000000000020A000 0000000000000000000000000000000000002AA000000000000000000000000000FFB59400000000100000000000002A0000 0000000000010010008010000000000000000000000000000880000000000000000000000000000000000000000000000000 00000000000000000000FF0BF200012A8248AA80000000005680008100000000000002AA2AA2AA000000000000000000000000384040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFC43000010000400000000000002800000200000000000008000000000000000000000000000000021400000000 00000000000000000000000002000000800000000000000000000000000000FFE00600002A88882A8000000000028000A880 000000000002AA2AB2AA00000000000000000000000020A0000000000000000000000000000000000000002AA00000000000 0000000000000000FFA547000000041000000000000000000001000000000100100500100400000000000000000000000014 0000000000000000000000000000000000000000004000000000000000000000000000FF67700000D595315580000000010100b84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280200200200 0002000002002002002000002003003002002000000000000000000000FFEA5D000000200200000000200000000000000000 0000000000000000000000000000000800000002800000000000000000000000000000000002000000800000000000000000 000000000000FFD6150004000002000002000000000000001000040000000000000000000800000000000801000000000000 000000000000000800800400000100000000000000000000000000000000000000FFBFB20000000200800000000001000000 000000000000000000801000000000000000000000000000000000000000000000000000000000000000000000000000000000784040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008188048000 0020030020028020020000000010020020000030020020020000020000030020020020010020020020020020000000000000 00000000FFE913000001801001801A0180180180180180180180000060060060060060460000000000064060008070060060 06000006000007006006006000006006007006006000000000000000000000FF456C0086002010010010012000010A900000 100000000018018000040010000000000000000000A000000180000400000400100400400400402800400400400400400000 0000000000000000FFFB1900000080080080080080080080080080080080000020020020028020220000000000022020008000f84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF92AC000201800000000000001000000000000001000000000400000000000000000000000400000000000000000000 0000000000800800000000800000800000000000000000000000000000FF3733000000801800001001000800801A00880800 8000002002802002002002000000000802802000802802002002000002000806002202002100002002002002002000000000 000000000000FFE9F70080000000010004006000014000000000000000000000000000000000000000000000000140000000 000000000000000800004800000030000000800004000000000000000000000000FFC110000000800800800A00800860D50C00044040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800006000006 000806806806006400006006006006006000000000000000000000FF06F3000000001D010014028018018018318018018000 0060070040068028040000000000008044A28408040000060000060000060060060060020060060060060060000000000000 00000000FF73DD000001881801001000800809801801801801800000602E0000060000000000000000040440000000840000 06000006000006006006006000006006006006006000000000000000000000FF40E300000180000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000844040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (181180000160 0640700685600020000000812E80622180080480200E00000600020E00604600630020600E04640600600000000000000000 0000FF7D67000000001801201200800C01801C01801801800000600600600600600200000000000484632004000400200600 0006000006006006006200006006006006006000000000000000000000FFDA6E000400081881001100811C09801845801805 800020643E814046002006000000000000004100100084000006000106000806906C16106000016006006016006000000000 000000000000FFD105000001801801001002A61801A01A29801801000040600600400600000200000000080400400000000400444040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF8C9800010008080100110104000190180D8018098000A2400622600E04C0044800000000CC1040040060AE80C106008106 00000780E00690640401605622FC0600E000000000000000000000FF45E9000001881801401400C318018E1C008018058001 2361E60B600E00600208000018000009C50081E0AE80C09600800603818610E00700610006662620E00600E0000000000000 00000000FFEB0A000000001801005040C00841815840801800800000640E0820460040020000000110048040401060060040 06000006040416006236006000206006006016006000000000000000000000FFD7E0000101C01801005240A01821815C118000c44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000060000 07006006006224026006406006006000000000000000000000FFD86500010180090500120180184180580100180100000042 4680601600400400000000000680600400008400200600000600000600600600602402600600600780600000000000000000 0000FF975D00041000080340100101981B809881801801800000402600600E00400080000000000444600400000400200600 0006000806006006006004006006406806006000000000000000000000FF8EC7000401A00C11001001800003C09901801801 800000400600A80600500400000000180000400000600600400600000600000600600600620000600600600600600000000000244040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000680600 000601818000000000018600600018E2A6006006000006000016196007106000006006006006006000000000000000000000 FFB94E000000001811801800200403C21801801801800108640608480E02182200000000000C42600400680E806226000006 00108702608600600420E00E007086006000000000000000000000FF51CD000001E01C11C558244140498058058018158000 00680640400600240500000012000600E00C00600602600610000651001600E006106004126487A860060060000000000000 00000000FFD94C000090001C81C01C00400221C058018018018001006007014006003006000000000005026004006106006000a44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF70 D2000001801800C01001C0140180180000000080000060060060060070060040000000020068040070070040000000060000 06000006006004804006006004000000000000000000000000FFB760000000401800845140801001C1182400000580000060 0608601602604600600014000200C00400E00E00640010000600088600400600600400E10E40608400000000000000000000 0000FF3FB8000401A01010811604814A15A01000000011800010600620700600620600400000001204680A0064C604604000 0006308806044107006002D26206086004000000000000000000000000FFCFD20000018010018018808000419CD82180180000644040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100624000620 4007006000806006006004000000000000000000000000FF417B000000401C01001400801001801000000001800000600610 6006004146000000100000404006000001500028400016408006516806006006006006006006000000000000000000000000 FF7EA40000018018010010008018018018000000018000006006006046004006000000000010006404000000006000000006 000006004006006004006006006004000000000000000000000000FF75BB0000000018008010018000018018000000018000 006006006006006006006000000002004004006006004000000006000006000006006004004006006004000000000000000000e44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806006006006 005006802000081006804000006006406000001806000006000004806000004806006004000000000000000000000000FF81 0A000001C01A00001000201401001800000001800000600600600600400600200008100E00020080E80658002820000E0280 0608D004006000006046006004000000000000000000000000FFFCE2000000001801201200C0040080180000000180010060 0600600680400600000010000600400600E02684400080000600000600600600600680700E00600600000000000000000000 0000FFECDF000001801801401001800800C0180000000500000060060060268040268000000008072000000160062040008000144040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFCD7600 0200001800401800801001E01800000001800000600600780600600400600000000400000000000000000000000600080600 4004006000006007806004000000000000000000000000FF1C3A000200001C00001400201001801800000004800000600610 6006005106002000000800004000808020084000000006001006002004806000004006006006000000000000000000000000 FF92C0000001801800401C008010018010000000018000006006006006004006000001800000006000000800044000000006 00000600600500600000602E006006000000000000000000000000FF37F4000000001800001800001001201800000001800000944040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000818010011 800000040080480040100000000000000000000000FF3E400000018819820010400150000710840000010000A2604680E006 00E5040040000000C400C0000483900040000000060000060060061060000A6406106006000000000000000000000000FF68 51000200201A92551A408A5211225810000223800020680611602E896A14824000000894A489408B0900914000000C060004 4EB2E806206C30CA7107006806000000000000000000000000FF1D98000041911C0000510441114280190400000180000360 0E00620642612628600000000408400040024040000000090E0000060062141260000164265362264800000000000000000000544040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08881228C00A 48020000000800890880800800888C00000280001020101208220A48C08820041100480000000000000000000000FFD4D200 000180085900820114101280084000012280000024120130023020024020000004132020202A24620020000010020013064A 2002002000002002002022000000000000000000000000FF8CD90000018014004C0080000080404000000015800000000610 00100D00840000000000081040000000006040000008480000012080008C0020200201228211200000000000000000000000 FF798A00000180840001001660802400000A000000000100800040080002003038000000000002000050000004000000000000d44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFD2F2000281 3002412412212150000002402002020000894800814004908AA00000000008088B4900920800809000000004000004800800 004801000004004000800000000000000000000000FF751F00000100183180B8AB12B811A0B842000015800001641600E006 04E21620600000022E08400042630E206000000006000006106006006000406806C06006400000000000000000000000FF7D FF000400C00880CC0800800E44C40800000520800000304330280B50312310200000100200B0010830230222000008220008 8B2130129430210234030C3952080000000000000000000000FF0E000002202000001273202A24480022002002400000810800344040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (505515505508 80550D50D50550550000000000000000000000FF841000040044240040044464460020000240040000000010010018010092 11000000001140001001111001088000000000001800000800001001801000000801000000000000000000000000FFA95500 002A00008808A0080A00AA0AA0000AA0880000A202A83202A80604080000000000202000003082003002A80002A80002A82A 82A82A80022A82A82A82A82A8000000000000000000000FF36CE000200234A04A00A82800800800B0C000220800000280288 2002C02802802000000D028028028029528C200000000200000280200280288000300280200200000000000000000000000000b44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0AA822000000 00000006312A84002402A82002A80002A80002A92A8AA92A80022A82A92A8AA82A8000000000000000000000FF67FD000080 0304004004000080002004800000D00001010000000000410808000000000408100002008080000000000000000001000001 000002800000000800000000000000000000000000FF873F00002A0880AA0AA0880800AA2AA0A80AA05200012A82A82202A8 2A00A00000000000002A80002002A82202A8000AA80002A82A92A82A82002A82A82A8AA82A8000000000000000000000FFE9 5300025430215415214A52255415402A1542040000540D50C50D509001208000000008A0C50900C40C50C50550000550001500744040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880000018018 0190181100180180100100000180000060064060560060060060000000060060000064460060200000000000061060060060 00006006106006000000000000000000000000FF16380002012252014012013152010010412002820000004800920004888A 94800000000808800800820800800000000800000804804004804C03005004000005000000000000000000000000FF3D4000 0000800800800842800800800812800020800000200240A0020020420020000001020022001120020CA00000000000000200 2002002000002002802002000000000000000000000000FF5F050001AA0880AA0AA0880300AA2AA0800AA1080000AA82A81100f44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000000024 0040000040000000000000000000000000FFEAC7000002000021010030010001801805800000808000210A00232200200204 2000040092002000002232002000080000000002106012002000102182082002000000000000000000000000FFAFBF000401 4014404014074014004004004000000001000001001508001200000000000041001000000000001100001000001005001011 001001001001001005000000000000000000000000FF53FA000402400C00C14C40C10C04C00C00C00000808100200B003002 0534020020004001030030000020020030001010000010030030030030014430C3003043000000000000000000000000FF70000c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006046000 0400001802B20100A000C00002000000000600600610648200620E086006000000000000000000000000FFF89E0000008118 0102100080000B91500080000181000261040000060020060860080000000205400000D001400002000000000E1060460061 00106206026006010000000000000000000000FF46890000018100000400020000B40B402000010000800000200400000000 00108010000000450010410200300000000000000010200020100400000000240000010000000000000000000000FF4AE900 0001800000094010010004000000000001800000000620010005400000400040002000000000000000014000000000000008008c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000105180548 10C2840401840800800021800000600400600608E41600E00000010030E8000000262A4000000000000006C1608600690005 6006006486000000000000000000000000FF14B700010010384102D01081003188C800800093800000600400600600604630 6000000008000100028010014000000000000006126016006000306006004046000000000000000000000000FF5CD6000001 801801011004800141840844800001800011602402600600600601600000000820800220040028400000000000000640600E 006000006116306006000000000000000000000000FF260900000100180100101081000180100080016180006AE004004106004c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (556404556556 556556000000000000000000000000FF4CA900002B8418A90A3084848889ACDA008000CB80002AE2AC2AE2AE22620E086000 00021614000020E20000E0000002A80002AEA2E2462AE0802A62AE2AD426000000000000000000000000FF8118000000001A 010010128A4891A0180080004180000060040060060020060060000000261400000160002A60000000000008061160060060 00006006005806000000000000000000000000FF7EDA00032AB01889011250A820C780000080000180002AE2AC2AA2AE3361 C60260000003200260003803865440000002A80002AE0063362AE0000162AE2AE00E000000000000000000000000FF70920000cc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (061060000000 1030E4001101462A4000000000000006086006006000006006004006000000000000000000000000FFFD2E00042A0AB0894A BC29C01C05AAA80080000180002AE2AE2AA2AE2AE2AE2260000003204270062002060040000002A8000AAE0062AE2AF0062A E2AE2AEAAE000000000000000000000000FFB327000201C15205201A00B05201800000800001800000600600600600200645 6000000046210900046028006000000000001006106006006800006006004096000000000000000000000000FF0D42000154 555535155920809041B5480000011580005565565565565525565560000004160084045464D0016000000550001556C46556002c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (041801801000 050001911802800001800000600611600600200600600000002600600400E02600E000000000000006006006006004006006 414006000000000000000000000000FFE3100000018058458450430028018230A88000018000006016026006006006006000 0000860AE000006096106000000000000006006006006000006006144006000000000000000000000000FF345F0000000018 03C01001040C43801A00800093800000600600600600600601600000010600680404600E016000000000000006C2E006006A 04006006004006000000000000000000000000FF3228000301A01241001B05A938898008008000218000006006006006006000ac4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (042AE2AE2AE2 AE006000000000000000000000FF658600005413195195415592015590A93000155580005575444425565565505560000005 064120044044064A6000000006000554556556556004556556516556006000000000000000000000FF03A700000100180080 0011804001004954001001800000600605000641400000200000001600600000601600600000000600000400600600600000 6006006006006000000000000000000000FFCB6400002B88D88D8890880840AB8418018000AB80002AE2A63022AE2AA2AE2A E00000020E3060002A62462260000000000002AE2AE2AE2AE0002AE2AE0042AE000000000000000000000000FFEF18000100006c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000081610 2004044010006000000006001005006006806004007007006006806000000000000000000000FF4E5600012B0AB0AB8AA081 8890AB0C0000001CAB80002AF2AE4002AE2422AE2AE0000002663580042002002AE0000000060002AC2AE2AE2AE0042AE2AE 2AE2AE006000000000000000000000FFC8F4000080001801800001808001800804001001800000600C00E006006002006000 0000360220060AC08E00E000000006000004006006006006006006046006006000000000000000000000FF8CB100002B0AB8 AB8AA0A38A88AB0888000010AB80002AE2AE0862AE0842AA2AE0000002862060042AE3262AE0000000060002AC2AE2AE2AE000ec4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01800000A202 05A01000201C0180004068A61850C64040040060100810022064000060060088000609060011FD0068074060008070470170 07006000000000000000000000FFC7CF00000540104180000104880100000000140180000061450029161030020060000800 01002004004006000800001006000006086026006004007007006806006000000000000000000000FF8E3F00000100100180 002B242A0121004400180180000068060200061400020020000001020460001160C600000000080600000600680600600100 6006006006006000000000000000000000FFF3EB000081001001800001801001044088201201800000600430A00600A00400001c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (606601600600 6000000000000000000000FFCDFC000001411801908880800005841020001201808000600401700601400000620000010600 202800C00028E08000100600081600600600600810700E406026106000000000000000000000FF9C6302004100184180A800 8108010410000010018001406007006006085044006000000006800000000000006000000006008004006007406000006006 806006006000000000000000000000FFB4470400410018018140448000018210000018418001007804001006004020002000 000000202000004007808000000006011006006007006000006006006006006000000000000000000000FF675A0000030018009c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020100002010 00440002000000000600001600600600600000600E206026006000000000000000000000FFBF920000010018018010018018 15005800001E0180000060041440062A42060A64000000021001401500001000000200060000060860264860200260460060 06006000000000000000000000FF961A000001011801911901801009851808001801800028E8040A00060062040860000000 00002080024198430100000006000006006026286030106006006006106000000000000000000000FF06B800000100180180 184580100580B80000184180000060060040566A600602603002000208040008020000000002010600000418604600600002005c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (50828809008E 80001F48AA80002AA0120022AA0024232AA0000006526221002423922020000002AA0007022AE2AA2AA1002AA2AA2AA2AE2A A000000000000000000000FF390100000100000100C030049102004000002201800000004628000011001000600000003000 4002084008148000000000000090000000000002000000000000000000000000000000000000FFCDB1000001824000020000 0020500000000100000000001A88050000240500000000000080090080048040000000000000000020000000000100000000 000000000000000000000000000000FFAC62000001001801801001801001001828001201810031700401000601400100204000dc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005004004000 000000000000000000FFA54A0000D5955C01951153D41955955000155D55800155655600E5564CE11648E000000446124201 016516526000001556000D56557557556400557D56557D57556000000000000000000000FFB8C00000AA8888AA8A88809228 2C8888000008AA80002AA8820022AA2AA08A2AA00000008208200050A22222A0000002AA00004AAAB2AA2AA0002AA2AA2AA2 AA2AA000000000000000000000FF7AF30000000000AC00200000A20000100000020000010000000810010012208200000000 90200000520020008000000000000000000001000000800000000000000000000000000000000000FFC66C0000AA8890AA88003c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200900008480 D0100000000800000000801000000400000800001001000000000000000000000000FFFDB300000000000000404002400000 2000000000000080000022000000820040000000000900020008000000800000000000000000000080000080000000000000 0000000000000000000000FFAD4080002A8AA8028888888888AA8A88000AA8AA80002ABAAA4C3AAA22200300200000028323 20002022022220000002AA0002AB2AA2AA2AA0012AA2ABAAA2AA2AA000000000000000000000FF2B29000000023000001054 0102000050000004000001004C4035100500084080000000000004C00000000008000000000400100080480500400100500400bc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800800800C00 8008008000003402022002002002002000002002802000002902002002022002002802002002002000102002002002002000 000000000000000000FFDA2D0000000006000000000000000002000000000000000800800000000000000000000000800002 000800000000000000000800000000000002000800000000000000000000000000000000FFD2220100001000000000004000 0020000400400000000100000000000100000000000100000000504000004400400404000010010000400000500008000000 00040000000000000000000000FF1F8E00010000054802000220000000000000020000000000000100000800B09300000000007c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFA785010000000800A00E18A0080281080480480080000120020620020120020020006328626020004020 020020020030022FA00200A243002000002002042002042000000000000000000000FFA942000040001A01A01801801801A0 1A01801801800000640604600600600600600000600680600180690680680604600600400600600600600010600400600600 6000000000000000000000FF4833000000001000000000200001408000000000000000000480180400000000000000080000 0000800000004004004005804000004000004000004004020004004000000000000000000000FFD767000020000800A00A0000fc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF1B24000000000001000001200000000000 0010010000005000004000004000000000000004800800001001001000001000000000000001000800001000004000000000 000000000000000000FFEB8A000000001000800A00800800C00C008008008000002002002002002002002000002002002028 80200222202202220208280280A002002028002002002002002000000000000000000000FF3F7C0000001004004000000000 050000000000000000000800000000000000000000040000000802000000000000000000200000000400004802000800000000024040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01A05A018012 01800000600600600680680400400000680410000080080001E0060060060020A288680E0062008060020060060060000000 00000000000000FF05E8000100001800001C40840009809801811001800000700E9060060064560040008000010440800C40 5000600602600600288A106016006208006022006806006000000000000000000000FF370200000000180002180180200180 1001821001800002E00600408604600000000000600400000000C00010600600640600202600600600610020600204600620 6000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000824040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000000 0000000000FF4A71004000041800243015841C01941145802000800008080E00E006006004006000808806D0402011690100 600680604714002400600602600900E042A27006006000000000000000000000FF6574000000105800001021821811E15801 85000000000000161040060062440020000060040C010114680808600604640600200F006002006011007022047006006000 000000000000000000FFF60C0000803119B4401A49819801815811801241800002E10600608613600E104000140000004000 048420016007046006010000116014006080207113114006306000000000000000000000FFBC96000000505940021811A13800424040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008006106006 006006803006007204006000806000004806006000000000000000000000FF7A9C0000004010002010158008018818038048 03800040080E004006020006002000006014896004810006086806006A06003C0E0068868060040069400060461260000000 00000000000000FF0D70018000001800400041841181C05811181043808020006601600602600400400015620900E200844D 0708718E00F25E60438C1070B5186800187002004026026000000000000000000000FFB62000200055191402440181100182 994100100180801000860040061160059000000064042064400840020160160560060B60260160400470080160125540060000c24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1C0180280180 0000001600D20608082600200100682509640420280631720600600600510408630100600400702400400710600000000000 0000000000FFC98D000100001600001001801841E01A01801801800020000680680600004600400080010680400440281004 E006087806000884006084026044006826004006806000000000000000000000FFBABC000000029000001221880901801001 80584180002000062164060102040860010070C500040400A004406406006006000004106006006024006007806006106000 000000000000000000FF29E0000000051000081241D09A01801C01800801800000081740400710140610000000600009600000224040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF687C0000001818018A100320180190D001801820800000021600500600080400000000680604E200866006006006 00610610500440608400E00000E006004006006000000000000000000000FF451D000000021801801001003B418A38018018 48800000000600400601080480208000E0240260040060162C72A61060060040042A600504600408608400408E0060000000 00000000000000FF41130000040038528094312018918018018048050000000016804087800007A13800006006006024A120 C784600611610E554554016000446005A46007005806006000000000000000000000FFC37D0000800018009010010118018000a24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060060 06006004006006006004006004006002006000000000000000000000FF952400000000000000080100180000180080180180 0000000600600600080600600080000600000400600600600600680700600600600600600400680400600200600000000000 0000000000FF60E8000000002854130053805B01829800001801800000080600600600000480408000480680C0064140060C 6486016006056D040060860560060C6004806112006000000000000000000000FF962D000004040800600001801810001E00 00582D8000000C0600510600000041400000C0420044200060C640602608680EA0605614E00640600040E90400600200600000624040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001A03000000 0286024006000026806200000000064804000802006007006006086810006006806004006022006002806000000000000000 000000FF4D54000000001201811C01C01801001900801844804000150604600600001000450008600200604C804535100116 00604E006143016806006005006804006006006000000000000000000004FF7FDA0000000010018018018018010018008018 0080000000060042860000420060100004820040040060044002060061060860024060060060040060240060020060000000 00000000000000FFE1800000000000000000010018018018008018018000000006006006000006006000004006000004004000e24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF9615000000200001400001A01800C0180180180180000000060040060070041040204400041000008841320460068060 06146516046806006000007802006003006000000000000000000000FFB79800000000000100081180180080180180180180 000110060040860160000040084842848000280002AA20608E00702E1465B720E01600600000600000600200600000000000 0000000000FF3A26000000400801E00281801801401800001A018000000006046006000026506040046000106804504B5284 6026107006006800026006806004886002006206806000000000000000000000FFFF0C000000000801801819801800001A8000124040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020612600600 EC4A30E0060060220262420A6346236000000000000000000000FF7BCF000000401001001801801801801801001801800000 0806004006006002006000000004004000000000000006007806806002006006006000006000006002006000000000000000 000000FF659B000000001001410889801800C01801001841804000900600640600E834004100003006002000004A04100426 00610680601200600E006000007002806206006000000000000000000000FFD1A1000000401001000C01C018000018010018 018000000006046006006001C04000003006802000407004000006106006007002006006006000086001006006806000000000924040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100000100000 2A0010020000000000008C00000010000100000888880881000028111A00000001410108A800000000000000000000000000 00FFE5ED100000010001120811901820081955881800000000040640488600600072000000214C2460000040500002260060 0600E042006006006000A462E2106024046000000000000000000000FF25690000004084A9201A01891AA0341885A91AA080 00C010C6C4409684692A82600090229530C8309008008880AE00608EC468828264B723680030689240E81710600000000000 0000000000FF5CE7000000003405054AA1A41805C15C4100180180000280060842460062014040002100440460022143204000524040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF A9870000002432A024420022008224A2203002C00000818820841208900A00810000A00A10D80808B00A00400500010C40B0 0810080C094388200A0800808500708000000000000000000000FFC1BD000000100901C19000A01900800C0101C824800006 204200300200251A00200110208002A00245A4221C280282301240268280205220600200201282205A082000000000000000 000000FFDE1704000000800800000409C20000008004180180006060801140204060E0000000480020010020084081219040 840008020000A281A0000001000400441281020000000000000000000000FF65E90000000000160021E0200050124202000000d24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002802C0B08A 802C02002800802C0AC12802802000000000000000000000FF76060000002432012452002110003082032042820000801004 8200048108C880000080CC34804902848800800004005004904C248048140049020049248C40008040000000000000000000 00FFF9F60400000B108B0951038818A190188B15580180000460264868064060D649600000402E04C00202E0360060260060 0610644C1060AE0060028364CC286946126000000000000000000000FF860F100000400C00820C50812E10C42820C00C4C80 0128B20303200B083403002000503483503009303283332A8282A23240300200A203A0B00020300202320B4020000000000000324040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00C40D508315 50D40900A10000840CB0C00900D50C20550551551550B00C40D50A90550900D50C40908D50D50000000000000000000000FF AD5D00080040040844054A420000000000400400000100100100080100108044800000114110900100150100100080000100 1501001010801001000101000001000000000000000000000000FFAF4300080028808A0880880A20AA0000A00A8008000022 82A80802A82A00002200000800002A0000200200AA82A82A82A80300002A80A02A80002A80000402A82A8000000000000000 000000FFC147000000000C40C00A44A00A00A42A10A00A208000903002C12002802A0289200124290280A8008828AA00280200b24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF48F8 0000000AA0800800000282AA4AA8AA0D00C000003382A82A82A82B00102A00001800000200002000002A82A8AA8AA8208000 AA8221AA86002A82102A92A82A8000000000000000000000FF735A0008000000020000000240004000080020300000088000 4800000082280A00005080000A80000001110010000000000200880000410000000000884000000000000000000000000000 00FF4DDF0000000AA0A20920001122AA0AA2AA08208A00002202A82A92A82A02401000004282084402003300282A82A92A8A A82B00302A84C02A80002A92202A82A82A8000000000000000000000FFEEB40000003543503543523103541343223503040000724040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (031530030030 03002801003143413043002000000000000000000000FFA230000000001821003005801801801003801901800001620E0860 5620601600620004401600600200E20600600604600620610609602600620254600C086006006000000000000000000000FF 114D0000002012052032522020002002002222120000800804800004810910010000015430810A0088081080480400400482 0844000888004800800044800001000000000000000000000000FF0367000000000848830880880800801800808820800010 200200280200244200200024210230200005234200200200200210251200200200200000291200280200200000000000000000f24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (630830404020 6210000400440000000008008240220000020000008100080040000400480110080040000000000000000000000000FFD9C6 000000041844000800800800C060028008048000042112002002002002002080002102102000002402012002012002282000 01A102006000022462002002002000000000000000000000FF319F4008004004214010004004000004000000000000001100 0010080000200000010010090000100000014410010090010210010010010000010016012090010000000000000000000000 00FF97F2400000400C00C00800C00C00804C0080080080000030024030020024220020814030030028000020430030030130000a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFA5710008 800018008008418090009E580180100980404862260C401E00E0002045A800C00C1044406100380862461860260066600060 0018E418046082224016382000000000000000000000FFD0E600008004184480000180001401180180102182000463160040 0600600000C00000600000D10800002001620600602600600202E002007040406002406006006000000000000000000000FF DB3300080000000002004000002A01009000004004404080000400000400000104000000000304D001008040004040000020 00002C0028000420220000088210000200000000000000000000FFB05F000000000000003005000000000000001901800001008a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C5162AE2AEAA E0002AE1922AC0042AC000000000000000000000FFEC48000000001840AC0011801A41801854800121800000400641400600 60460860000060C4402800444036086006006006004206002006006800002402004086006000000000000000000000FFA2C7 0000000358048088438010958CD80180100B800000200614400601640E44E00034C0140B600009010000E006006006004128 00400200600000404A00642C000000000000000000000000FFE2FA00000000180082000181102140190980100B800008E046 08400603600640602800E08804600000028050600620E0062040003060AA01600000632214E2064024000000000000000000004a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (552556540436 4C600000A4225142045424B0446556556556556506556550D56204556488556106556000000000000000000000FF56D60000 004A98888C088B8AB8AB903C908AB09380002A82AE42C2AE2A61342140002142A60AE0002B220828E2AE2AE2AE2AC0062AC2 AEAAE0002AC0222AE28C2AC000000000000000000000FFB3A8000000603800820001801809081C0080102180000000060040 0600E08400C0004C608A02600201200008E00600600600402600000600600200002200622E006000000000000000000000FF D03F200000081A888068810AB801851A848AA04180002AC2AE0042AE2B64821060000442040020000042062262AE2AE2AE2A00ca4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D45100000000 1A21902801A01931235A00001821800000000600600600010621600004008410000444403600600600600600611400400680 6004004106006004004000000000000000000000FFE35000000028388D8000AB8AB8010018A88AB88180002AC2AE2AE2AE2A 00260860000000042010040042062062AE2AE2AE2AE2142AE2AE2AF0042AE2262AE02C2AC000000000000000000004FFD7CD 000800003C42410841C01C0140184080080180000000061060060000060260000820164048000020C0046006006006006044 004000006800004400006046006000000000000000000000FF6BB3400000151D50514155955CA50359549549158000554556002a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1040162AE000 004046006404184000000000000000000000FFF2A4000000001849050895843841001843803801800008000600600600002E 02600005400608000404600E00600600600609601640450600600440440C2D6314404000000000000000000000FF2BC60000 000018058848418018938B5891800801800000000601600601010608E00030404602A1041060C60060060060060065241300 320061040A8126006024034000000000000000000000FF6348000000031804A50001801A0590180580080B80000000060060 0601041604600029443604AC040961060AE006006006006044000002006C0400000C006284004000000000000000000004FF00aa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE2A01262A80 0022009020620434628A2AE2AE2AE2AE2AE22602E28C2AE0042862AC2AC2AE286000000000000000000000FF6EC500000015 51119038B59159058CB951B51D5580014C05565565575425325100004104444060044CE54855655655655640E4A444624455 608400600E054156406000000000000000000000FF5030800000001003801001801803815801801801800000000610600600 0012000000110444056000016022006006006006006006206004006000016006004006056000000000000000000000FFC7F3 0000000AB8840000018898010018018A98AB80002282AE2A62AE2A020624600010428E20000020E2062AE2AE2AE2AE226006006a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001041 800A00840A49801801C11C018001080005406006002052000000000000096004008026002002806806002106096104806204 50E044005006006000000000000000000004FFBF750000000AB0408AA8AB91588390188D8E1AAB80001182AC0162AF2B0482 2A80002202203060042802022A82AA2AE2AE2AA33E3062442AE4040462042AC2AE026000000000000000000000FF0D460008 00001021850801841849801805A03801800000800600600600A0060000000200900D608400600000600600600614601400E1 040060044B6304504006036000000000000000000004FF95350000000AB0898AA8AB8218A98218A988B8AB8000A202AE226200ea4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070160400860 06006006006000000000000000000000FFDC28800900101C00801C41801581801801C01C0180010088008070072040020002 08018A4460000010E003017004907006046403506004846021006007405007006000000000000000000000FFD16200000000 1221800810C00801821801C01C01800100121502680780200C00000000000200000500608810601500608750202080F08600 6005806007806017806000000000000000000000FF25AE00080000110D80080188B80193584580580180002410040B600601 220600000010890A02020002611300700400600600200002603600600002609400600630E000000000000000000000FF5696001a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (401600008048 000002000010000211829000E0060062C2006100256200004002484006026000000000000000000000FFE982800000101800 805881801881833909D05D01800100081100E00600600628042820000600600008840604200A10600601001242700E886111 0460048160A7106200000040000000000000FF94DE8000800018A0821831A018018318018018018000000210026006804006 00000000002400600100008A0008029060872A040248E00400600010600400400E006000000000000000000000FF57F78000 00001900841801801001811801801801800001010000780640600200020840020600000000E0060070040078060060038060009a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018008018 00000003841801D05A09800100400702600688600600028020000E00800009022E04200010600601210A02600E0860800460 02116096006200000020000000000000FFE311000008001800815800000021891951811D0582804840060860070240065100 001000841202A8040002000290006006080202506002426410014120406006046040000000000000000000FF81A200000010 1800801901801933885801801C09828029407609600702600600805000008A0882A80201AE01200001600608600208600202 600000C0A220604E106020000000000000000000FFE0E2000008101800809801801809801821A09803800100C10602600608005a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (440000008000 0000000000000000000000000000FF88B10000000A90AB9008808888AB9000AAAAA8AA80012AA2322AA2AA00244200000000 004220210020200A10A3022AA2AA1020122AA1022AA1000221885022AA2AA000000000000000000000FF88FD000000004001 050008000000000000001C01800000600000600148E4C80000000000000B01000082245401080000000400A00004D0000100 000000420000000000000000000000000000FFA25A8000000000000840440220001340004000000001000108800000040000 0000000003480000000A0080000020000000490210000000000000308420088000000000000000000000000000FFA9B4000000da4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000094 0200000105510010010050042300A4004041004000008004020004004000000000000000000000FF012B9100001559151518 43845D558CB555D55D558001556D4E557557D465060000000004044160004172AE456D5655655650640D5561265560005564 56557557556000000000000000000000FF97010000000A80AA850CA08D48AA8208AA8AA8AA80002AA2222AA2AA20200A0000 0000020230A0002C20024322322AB2AA0022022AA40A2AA0002C225200A2AA2AA000000000000000000000FFC02E00000020 002020409011000000000140040000010000008008000080100000000001280C04000800008800008000000300C000020900003a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (050802412002 24000B4400400400000109010080100001008800000000002803000014008012804800080000000100034000000000000800 0800000000000000000000000000FFFAE0110000000042008004100000000000000000000000000000000080000000000000 0000100000011220000101000000110010000008000000000100000000800000000000000000000000FF5A9D8000000AAC00 8808088088AA8018AA8AA8AA800022222B2AA2AA2A226200000000028220220024200A2022032AB2AA2222A22AA003AAA200 2AA2222AA2AA2AA000000000000000000000FF54E580080020500140420A00000101400140040000010010808010050B010000ba4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (104805800004 004004000000000000000000FF89D9004000400800800800A04C00802A008028008000002002002002002042002028002102 80200010280240200300208200A002102002002000802002002002002002000000000000000000FF94D60000000002000000 0020000000020020000000008000000018000000000000000000000000000008000000000000000000000000002000008000 08000800000000000000000000000000FFAE6501000040020000810000400000000820000400008000000100000000000000 00100110000000400000040000440040000890000000000001080000050800000000000000000000000000FF3E1400000000007a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000002 30000040000000000800000000000000000000000000000800000000800000000000000000FFFE04010000000C0680690080 0800C00C06860A04800006200201208200300240200010311300202041A02204308208200200391200300300200000300205 2003002002000000000000000000FFAA32004000001001809801805E01805809205801800000600600600600604600605000 4105006000106806C0600700600701600690600640600000700C006006006006000000000000000000FFF246000000401001 000600000000000001000200000000000000000400180020000180400400020800000180000400590480418400000580000000fa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF00080000004004000000000002002000002000010000004000004000004800000000000800 804000000000800000000800000800001000000000800000001001000000800000000000000000FFF25F0000000000018008 0080080080080180080080008020028020820020020020000020020020000028020028822A20220020008020028020000008 02002002002002000000000000000000FFA11C0000000010000000000040000004000000000000800000800000000000000000064040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20844DA68F60 06000000000000000000FF3ECC000000201A01829800D00011805818881801800080623E00204E4160060040010480060260 00800002880006886006E0622C10E00E31600004000280D047146006000000000000000000FFE4CF000000001811801A0580 0103941920C838058000016826016016804C5680400009304454451000280004010600608608694CA1600F00620000090204 E006006006000000000000000000FF1C1B00000000180182D900000001000005811801800000220000600600400400C00800 2016006040100000080006106006006206006006406000102022006106006006000000000000000000FF409B00000000000000864040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004600602000 608282600701642600710600600720700040600204408602E006000000000000000000FFEC13000002420E03A0DA81801001 C10801800001820040280204200600680680600880B100004021C03124080006006006106A0200600640E0000060C0001017 007006000000000000000000FF220F000000000801801885A01315803844A00005800101600601200620E22E00600000300A 286008080004800086006086106087C06006086201907082020006006006000000000000000000FF19B1000010215819D438 01AD04058A10C1A0B901800001604600202600600604C0080A00340442A010200282004680614681610018700694E001420000464040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00009C151218 05801800000001600602000F144004006080020806004000087048006006006106086484005816004000804022006846C068 06000000000000000000FFB01C000002005003813800801801803A00801800000040600602200600600600E0018060060402 04246000006006007807907406004806004004036C2A006006106006000000000000000000FF0D04000010410801841907DD 1585B93D81800019800001601E00200600400600E01018413400438092684212604680E31E01606310606695698002EB0800 4416686006000000000000000000FFBC2D000000040811900801001001001820A0010184000060460020060040040260000100c64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680600600600 0000000000000000FFFB87000000001009C55801801009841802805800000001700604040E8AE00600400000510010600410 601680648608E026006010504207004025005055002446286006000000000000000004FFC928000000000001A01803E01C01 A018018098000000906806000286006406026000200085084000002004200086116426006020A86006006024824804A06806 006006000000000000000000FFAECD00840826000184101980D80189EA0080D84000008020021800860162061A6080826015 01800440062500040680628608629080750E71E414104015006406106006000000000000000004FFAC89008008005209815800264040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000008060C6 20608628610648E446104086106C20046016406806006000000000000000000000FFE26F00010011F4018068050014010008 40B61A00000000200200000600400400400100548008C1000160A680608600600620610208600608600001F00C00602601E0 06000000000000000000FF2D89008008605001A0880F807005A09C2100184000009868060808070060260840014852180000 8640E0064260070060260060E2004106104416146004402006026006000000000000000000FFC13900008414164980180180 94C1A01811A81A40000004600600040610600600400000000100400000601641620648610609620000610F0064240440042000a64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180000 1800000000400600000600600400000000000600400400600400600600600600400400400400200400400400600600600000 0000000000000004FF73E7000001800401200001801801A01801801800000100400600000600400400000100000680400280 6004004006006006006006004006006806007006006806006000000000000000000000FF434B008008400841808801811B01 801801001840000008400600040600600400000000000E088004006016836406006026004004004814002004004004806026 046000000000000000000000FFDB96000404040811801809805841811810801800000004500610100610404408000010110600664040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000000 000000000000FF215E000001018801007801841801801801A01A84002000600600000680400E220020060000000000802004 02600E00E006804004804814000000100030006002006000000000000000000000FF8DB8000001400C11C00001A018018018 0000190000400068060004465061244400401014065003244848829461060070560061060060068044048170468070000060 00000000000000000004FFD99C000001000801801901801801801801801800000000600600000600600E0000000001060020 0800600200604E10E506206006004026004004006006006000006000000000000000000000FFC8740000018000010000018000e64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000464020040 06006006007006002006004000002002007006006200000000000000000000FF8858000001000800A00801C0580180060000 18018000006806003006004006420000028400006020C12806156406006017206106541C0680601000300200600600600000 0000000000000000FFE06D000001401800801801901C01800001D4180580000060060020072040260000000000802862A82C 20870840860072BE0061C7D00026006201802002006006006400000000000000000000FFD4BA000001000A01003801803C01 801C0200B800000000600600000E006004450000050C00000044412404156406006006C0400402620400001400080000680200164040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (881A00001C01 800000400600288600E086000000000000006000020048246326006106ACA00E00222204400031288344E8CA14E000000000 000000000000FFE96A000001600001201801801801A018018018018000004006002007806006000000000800806002002000 804006006006003006000003804002002002006000006000000000000000000000FFDA87000001000011402101CC18018000 020AB80780000060060024461041040000001004060060000040028060461060064060270028160040009120120060060060 00000000000000000000FF9C9F600001000401000001801801A00001801801800180600600200E004004008000000806806000964040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF55B70000105A40100C00020800000102A400004200000004504210A00800000000000B04000002000A00802888 90818000080210000148020000108100010009800000000000000000000000FF42ED000001000801009A0991981188180090 1081800002412600280E00400400000000028002200000000001600620600640204640600210400004244234600602600000 0000000000000000FFCF6A000401200B01201929A89B05A49949281A85800084544692A036CA4A46000000548A908B2A00B0 2D00916016316A0E802C06A46912A04A40842A42886C06206400000000000000000000FF181A0000011442418B3805C2183100564040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (340330380280 A803C8309300385330300140308231312A10A000000000000000000000FFB6D5000040013280203261200220304449280200 0000D40800880800D10860C00000808800C08800A00C00D00009081080008C08A00290810820E008108007810D9200000000 000000000000FF87EC000101840120C20C00800808848D10800800800000220201200200A00200000020004A0D200000220A 022203003002302002162022400100022022822012002000000000000000000000FFB26F0000004000001010800201820200 01005101800000000000E000220280000000400000000010440020001020400318870100001000240200080280488864700000d64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40A00A008000 802C028820028220020100004414C2A02A00A82802932802002802802802C228028129008020428028028020000000000000 00000000FF8CAD0000012014002012092002422000152002040000800914C30004C088888000010910089008008088B08000 04004004001048810000C04801154D0C94C800004800000000000000000000FF14380000A90238818C102189188994384D00 390180001060C600680610600600000021040600E00840600601601640608E02E42634610602E10012442C046406A4600000 0000000000000000FF58C4000400888C10800800C00C00C08B00D00C20800122320B4120032130424000000010232230010400364040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF7B7B0002003523542145503302C43002C43303520000D50CA0C48D50800230450000310A09008880910C40D08D5155 1550D508B0A00550C30900800900CB0D50D50550000000000000000000FF7DBA000800410400440004420400000442440404 00010290010210000000000000010A1000011003001121120001800000001481001001001003101109440001000000000000 000000000000FF3BC60008000AA0AA0402020A80000640000AA0A800002A8030000AA81802203A0000000000028080020210 2402A82A82A82A82800802A80A00002408002002A82A82A8000000000000000000FF4CEA000200C00A00AB4940C04D08B14D00b64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A2002002002 8022C200200200240010210200A002002000000000000000000000FF2EB60000000800AA0000F00888AA8101000A80A80000 0000402102A92A9AA82A8000000210528400200200201AA82A92A82A80102A82A82A8000230208110AA82A82A80000000000 00000000FFC53E00080000000008000200200800800800200000000000000800002300800000000401402C02002400800000 000000000002000A9000100000308248000000000000000000000000000000FF798A0000000A20AA09210008A0AA4C400808 A0A800003002902802A82A82A82A80002102C10400803302082082A82A82A92A80202A82A82A8200220240000AA82A82A80000764040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080080000030 0200300300300000002120905301308200210200300350311321300310300310311310300344300300300000000000000000 0000FF32B5020151801001809805805001001803801801800000E00600E20605600000800000010400600040644608620601 602608600E206226206000404226006286006000000000000000000000FF4FDF000001215200324009444400080241200204 0000850A208A00048000000000014008CC904A0294080081000100480400080880480480480280C844D20000800000000000 000000000000FFFC03000000840800810804801801A4C892804800800048211200A8020020000000000B000220210001213200f64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFFF220000A8001001000000002080004004000001800000C000006210004000000000000080010000204204080404088140 080208400000500010200220440080000000000000000000000000FF344F0200000038A0808803C004001048058009008000 00200200A10222200000822020000204000000252200200200224A6020020005404000800824000020120820000400000000 00000000FF298D400C0141C54040640008000040040000000000006010000010114090000004010090290010800000800010 01201401009401081221001001001001001201101000000000000000000000FF9075400400C00C00C00C00880900C04C0080000e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020060062001 0642402420020008220024200E006000020000000000000000FFA68A00088100102104082194D80182982181B92191000860 0622600601E00004808002008265E00000040622400611604600269001451C16010000A08800008600600000000000000000 0000FF9FD700008100182100180180981589012180380B802008400400E10600400008800002010208600802410022400200 600600000200400600800800A0AA102106086100000000000000000000FF7E0A00080000000C022000142094000090000014 11404101500100000002001400000000001004104500100100800900000000102280001103100800402A0000100080000000008e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80002262AA2A 02AE40C0100000000002620000002262040062AE2AE2AE0300004141E62040004224062AC0042AE000000000000000000000 FF9CEC2000310400110B420184180580194580000180000060020000062264C000000000008A020B00084004036002006006 41040020C0060D4800002106004516006000000000000000000000FF5BDB00000101500500080180B8A18038119038058000 11600601000608600800000000000048A0000100B63040060060060820D612020C0001005124300020440060000000000000 00000000FFA552000001001815004841C01C81843813801841800020E0AE42000600640000008000000000220020C0100141004e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF2F 65200113295903014155905905915AC395595200005545545505565545500000000005264860044045105505525565565565 5240C45600400440048E5524B6554000000000000000000000FF5A3E0000D12A380300B4AB821915A8DA219100A980002A62 AA2A02AE0D63200000000002842884804C03042902A82AE2AE2860B60824062A608008E08E2AE00C2AE00000000000000000 0000FFB830000041220031280401831829821809800001800000400000000600600000000000001004028012C00400000200 600600600608208634E20004E026006006006000000000000000000000FFBFD40002830818A11000AB8818498E921186C0A900ce4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600610600609 2014026806004014002024004000000000000000000004FFF1360002210310030B4001A01801A01B45801800000000600600 000600600000000000010010E20000602600600600600601600202010428C200112104006114006000000000000000000000 FF62F4000483201A814400AB8098098A90018AB8A800002AE2AE2A82AE2AC2A800000000022623700422C2462AE2AA2AE2AE 2262AA2442240050043222242AE2042AE000000000000000000004FF4FF6000A050112D1820001C8BA018019058018040000 00C00401000600600000000000000802680001004804000000600604640202001400C8000200440025460040000000000000002e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00440C2002AE 2040000000000000042060001061142224002AE2AE006416202096206000186106006004016000000000000000000000FFA7 7C000005840041052801803803809801803802000000412404800604600000000000044C08E00434C0A40122820060064160 5613200602E00400C0860C6204404000000000000000000000FF5A120000418818810010018298C984580182180000004CE4 0608000608C0000000000001000400020064140820280060060A648600245410600022624C2120AC13600000000000000000 0000FF97BE000011903829001201943CC5805811801804000000600600000600600000000000000C0009061041140020020000ae4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004FF229100 00AA0458AB88B8AA01190182B8AB8A98A880002AE3262202AE2AE0060000000004442A000002600622602E2AE2AE2262C600 42AE2A40042A22A628E2A82AA000000000000000000000FF0B300001540810A39019540018018C1955953D5000002C608CCC 05561560060000000000044160040440205360565565565160265244A6434004402044016112142000000000000000000000 FFC710800000101801841800003823901801801802800000600010000600600600000000001400E0020860CE016406006006 08600604C006004002012006006002002000000000000000000000FFC9E800008980B81B0848AB8858458810AB8898AC0000006e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006084214806 1100001461000A6004002000000000000000000000FFB679000000041C0002D800003803849800805C028000006102848006 8060060000000040048C600434C0A40552860060060A600404600600200401200E016801007000000000000000000004FFD2 CA0000AA09B0AA0018AA1C18118018AA88DAA800002AE23E2102AE2AE00600000000418C2060004164043841062AE2AE21E2 3C5842AE2300042022362462A82AA000000000000000000000FF859100080004D8018498000B190981380180180080000160 2680800620600600000000033414000620C20000608600600602610600C00608400402A2142C62202020000000000000000000ee4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070000060160 2600008000602600004000400600600780790608600600404414440008608BC16007800000000000000000000000FF048280 0800001C008A98000018018098008004010440806006800C0744602600002010402701002040000611290684708F68640610 48360840004C248A00E903001000000000000000000000FFAB920000100008024A9C00001801801800C01C00800000530400 900600600600804000628600600402410400720690600E006024006006002004016040007046004000000000000000000000 FF74DF0008000000000818000298C9903800821800800100400408080600600600000000622601600000041400202E007007001e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFB289000010 0050018230000238238098A00A1C0904404020070084064060260880000244060B008246808439010610E0060060A020C00A 0000022C2442004100000000000000000000000000FF284F800000001000A01880101801841C0AC00501808000600EA80806 0160060004000020840000282840400048A60062460060041222C01420280062A208EC2E0A4400000000000000000000FF27 06800080081804801A000018018018008000018000006A8600800602E0060081000800840000000060800042060260060064 2408201202220040A002206042004000000000000000000000FF2C53800100105000801800001801809C0080000100004060009e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001402103001 00000300048030010000000000000000000000FF95C5000000001801808000101841811804803C918000082006A0000600E0 261000000260861061402940440040C60160460060040460C01120104062A2086446044200000000000000000000FFCB9800 00000010018000000038838A38A08C1841810040601700804600601605040000400600640002000440801600640600E08030 A0100020000A6002404004004000000000000000000000FFA6D600000000181984D100041881883810803821000029E00610 002600600E02000000600605821200410410C00E00600600E04000640204A042026002214014104000000000000000000000005e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080000000 00000100000004012012002800008008000002000800000084001200A8000200200000000000000000000000FF40A1000000 0038888E88001C00100AB81C88CC0680002522432AA2AA2AA2AA0000005422022081004024023122AA2AA2AA2AA310042162 0021002AA102002000020000000000000000000000FFCA3400000004000200200000A0020001220020018000040054006000 0000000000004400100002002C40A4150000000000000130410080050000004048300480500000000000000000000000FFBA 0D8000000880400000000200C80000000204C800001081000000000000000000000881400C0100008410000000000000000000de4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5B8008002014 0000040000A02200122000044000008000090010050040040000000040100044028010C80010050050040040440000000040 0200000C20010C024000000000000000000000FFB0C2808000109113921800001001555951951D53800010E107556D575575 5600000052455654E101157026036D575575575560262564564A40002164045561360C6000000000000000000000FF993300 00004CC8AA88A8000009008AA8808A890880002822822AA2AA2AA2AA00000000A2A22D20000AA0022222AA2AA2AA2AA20248 A20A34A0002AA2220AA22228A000000000000000000000FF70EC0800000222200124000B0108000200000400000084024080003e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000000 0000000000000000000000000000000000FF473F0100000140200000000280C00000400204040000448D2080000000000000 00000C80001000800084101100010010010000100880080080012880100000900C8000000000000000000000FF22E3000000 04000204C0000020024000020000000000100010001000800800000000000000050200AC08A04200000000000001202200A0 120200040120000440400000000000000000000000FF011088000008088888080008584D8AA88C88E8A880004030122AB2AA 2AA2AA0000002022AA202000002112003AAA2AA2AA2AA3120023022020010022022AA002012000000000000000000000FFB000be4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00400C000000 00000000430000500000400C201800004004005004000281804015800004004000000000000000000000FFEC0A000000B008 00A00C00800800800840800200800000200A082C02002082022000000002002080002002C82002002002802802C020020020 0000280A082042002000000000000000000000FF2B2E00000000000000020040000000000000000000008008000000000000 00000000000000000000000000000000000000000000000000000000000000001800000000000000000000000000FF554600 01004003000024000000002000000000000000000800011000000000000000400000000050081C0004044010000000100000007e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001040040 0000040000000001000000000000000000010040100810000020000000040080000000000008000000000000000000028000 0001000004000000000000000000000000FFFDEF000008808B02A00800820800808800800740800000200201289B20206308 200006000200200000240200200240200227A002002002002029003003002002002000000000000000000000FFBC83000001 401A01A01801801801801A410000018000006816106406006906046000000006004000104007506006806007005005C04004 006002007006106046006000000000000000000000FF108A0000011000010040004000004000016000A0000080000000000000fe4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000016086 00400E106000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF51400000000000 0000100000000000000000000000000010040048000000008040000000000000008008000000000000000040010000000000 01000000000000000000000000000000000000FF96B7000089A00803000A00800800808C0080020080000020020020028020 0200200000000200202800200202242B002002402802002002002028002802002002006000000000000000000000FFA7510000014040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (260060010011 0640C0004C81000060060160061442020030880C200120628E04406E006000000000000000000000FF226100000088490001 08018018014938508002818000086406002006C0600E00E00000000700600001420011610608400600402208220216A00040 641760404608E000000000000000000000FF5175000000A00A00002000841041801A00852000800114600610700410600E00 E000000006114080102A0080600E0840060010035520028120A8006006104486036400000000000000000000FF9950000000 880800000001001001083080800080000000600600604000604600400000000600600000600040600600400640022200228A00814040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001C51414009 801841815C3480000180000160060020040060160060000001040000A214248621744600C00890E10E10640704608200E006 046026006000000000000000000000FF7162000004241A01800113041801A0B054840000000000C00600280200700E004000 0014448820A0000800216206206234212882113A0000608000E007807006006000000000000000000000FF4A470000000018 01804001841A01A11C40820001000000500608200228600600600100100410208000600149610E0048042020034320020060 A9016006086306026400000000000000000000FF0FB80000018028D061880080187580188880A0018000827206002026106000414040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0441E85608E4 B6806000000000000000000004FF7D4C00000185180190000090181100594081040080000420061100070068060060000000 0408420400612604601604600E0040004008234063000060060C68A6006000000000000000000000FF3ED1000004A21801C0 0085801001081C001442400000002804002802106006006000000436106204006007826007C060C6A0080082800A00400482 680600600E006000000000000000000000FF1E2A000021401C01002001841C15C81800882221800000500600298400600600 660000100C4002004982661A6826006C8004706F02600C80600102700700600E006000000000000000000000FF958D00002100c14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600008005400 02040C42062A6486086856004006107C24804004006127C06006406000000000000000000000FF063C000201811401C00801 C01C01C11824808001000094710608800244600600600000000708020500C446216016824006014004214004004284086096 22720E006000000000000000000004FFD4B4000001E01801000801801801811C0080000080004028C600080622E006006000 20180400400001401180610680680400400202A40000600408608641600608E000000000000000000000FF34E9000000821C 01084801091069801484804000000010300600000200E006004000200004416004404480436806004008190C5A80213825C000214040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80200001C018 31A01801805A3080200020060000060211460040000A0855004804144816D0650649724CC8C0061062061260008370060040 06206000000000000000000000FF954400060180B2410118016018298110218181A800009860060000020060060040000200 05064001E0400600600600720428C00600610C03E000026046006006006000000000000000000000FF3E7D0000018210A100 5881811C81C0D80A806001002040604600002200680600600020000541400440001E00F10620C000005C4584C5858C608448 F8468070A7116000000000000000000000FF09B61000A9801009C48800809801801C0080000400000060060108022461260000a14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600200400600 6000000000000000000000FF1ED3000000001801000801001801801801801800800000600600000600000600600000000400 4004004006006006006006006006006006004004006004004006006000000000000000000004FF020A000000001C01000801 001801801801801C008000006806000006000006004000001004004805005006806006006007006806806006806004806006 804006006000000000000000000000FF28AD100230001810240101811881C01A4B8018048000006006010026200006006000 40000400420400440604E00600600000000600E04E0040860861044040A6006000000000000000000000FFD5F300010004B800614040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000006A46004 006206887006006006006802802006804104006008003006006020000000000000000000FFBCB7000004000800C01001001C 81C01800801A0180002020062A080A000086004000A00084A8600601484680600608600E096052802006E240060260000020 06006000000000000000000000FFF8600000002002018018008019018018000018008000C16116540013006146C0E4005405 0E504104406014344006006940121202103006046005146442004006006000000000000000000004FFC7AD00000000000180 1800801801801800001901800000600600000200600600600000000400402400400400400608600C2040020020060060040000e14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180180180 B880801800000080700600004400600600400000000600400100600400400700600400400200200600600100680200000600 6000000000000000000000FF5AD8000000000800800000801801801A01821801820080200600180500100600400000000404 6000004007107806047801001006006406006080806006002806006040000000000000000000FF51DD000000000800900000 841841811B41801801800000E00600000400600620C00008010C0140A010D02E2A60060460A0028226087406006000086826 000006006000000000000000000000FF9CDE000000000800A01081001A01A03C00849800840000600600004A80002600600000114040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0A2C6206000 000000000000000000FF516A000084682D10A080400018218B5802081E018000026A4E10044E846807086001010084114000 20603480C206216406026A08080B0E242020026002102006026000000000000000000000FFF74E000200000800A00000001E 01801800001A0180008060060000060060060060000000040040000040040040060060060060000008060020000060028000 06006000000000000000000000FF2A89000204000800880081821821801A20809900800000611600100C0000660044000404 8620E000C8620400500680700540401200200600600080640B002006006000000000000000000000FF3ADB000000400E008000914040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000814000 010092000000002E0028040280120101000000210010200000000000000000000000FF942200008018621209600004007000 40C000000000000000000000000811000280000080001800000001001204008081C0500240001000018021000028408A0003 0000000000000000000000FF547F000014060804868071001801829821041002000000280602648621000E00400000000620 614031620400410E10640600601008080600201032E082002006806000000000000000000000FF7025000010250824CC4205 353A11A01CC1213B4B8000C8E106826886A96A0EC2C000400A06C06880904C04CC50B6086956C8E840A40006812800A1694A00514040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C10CB0CC0C00 C44C10800100200B42300309211308A00000111305312992302300320228340B2A302300A103303020083443202852812000 000000000000000000FFB6F900420020010030020622830835201601E2900000820808840809008200BC0000210F90C48810 040C00200020A00828808800B00D18C008400014408810C1004000000000000000000000FFFBC200000A0094210010018028 008809018808488000002AB240210212200200200000000201200008207A4820834922120024024320022020000020020430 27002000000000000000000000FFDFD8000000000488000100190000000400001020000038C040086220001010010000100000d14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A82A80000000 00000000000000FF626F000200220A30A00A30808D10B02B24A00A228000CA2002802842802802CC200080040344AC00AC28 3300280290200300210AA02C02812800802802012002002000000000000000000000FF70D900022420100124D28534224224 80090002100000810A44C308808008048080000008C9100800010900800804A048A1010C2494C8D4D4090080480488400400 4000000000000000000000FFAD6D00000200520B003053141801815AAD011821800008604600630600600604600009040648 600040E5165061060161460062142C4416016110006004034006006000000000000000000000FFCAC70020104A0880D50C8000314040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8200520280AA 82A82A80200C02082083202202002A82A82A92A82A8000000000000000000000FFD3DE00031035034034030024C24C0D4300 2002000000D300A8C00400D50D50830000001240C00C00010D30D51550108CC8C51140948B30AB0900550D51450550550000 000000000000000000FF1433000C044004004085024004000004004004000001001001001001001001000001000001001001 011010001001001411209801001011111001001001000800000000000000000000000000FF220200088808A0820940002000 0000000400008400000008880902082A82A80000000008000000000002002A82A8028A082A00000000000000002A82A8A20200b14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018019008008 40800000200210202200200200200000280208240002A04A00200200200200A01201210A0824000020020020020000000000 00000000000000FF5AF60000000CC0CC0E00900AA8AACAA95800000400003B02A83786402A82A82A80000002A83400002002 402A82A82A81000003403C02002200002A82A82A8AA82A8000000000000000000000FFF9B300084200201200002A08008040 00280001280000000A001210A80000004800010000880D00032C000000000142000008020820000000000300000008080000 0000000000000000000000FF97E10000B00880880820200AA0AA0AA00200012800002202A82000902A82A82A80000012A82000714040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF5180400400C00C00C30C00800810800C00800800840000300244310300300240200100301302300108240311 3003143443003003013002002881003003003003000000000000000000000000FF9ED5080001909895801001801001141001 801801800009600610600603600600610000C0040041000060A600608640601640402600640600E00050E00E016006000000 000000000000000000FF784E00024422422320542A00040020042420030C000081080480089480080080000080400504C800 884880804805005354CA48C4840840808800804800804004000000000000000000000000FFC7A3000090800800808800A01800f14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (490000080000 000010200100010108120030000088000108000000000000000000000000FF1BAC0000000800820000000000100A00000010 0004000140004861000082040040000100080000800000200101202804002040000104000080000080080000000000000000 00000000000000FFE299080000800808029800C00410440000800800840010201A0220420220023021800020020020000002 0208200202208A002450002002002080282042602042110000000000000000000000FF27AD400C0040840140040000000000 040000000000000810100010010014000000010010010210010800810010410011210010210010000000010010014090050000094040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180184490 0000601604240610C00604600000600604000030600010600600600620400C04201014200004612E10601608800000000000 0000000000FF907A000801811000821003819805893801961802846001E7E600204606405E1066000040041A600001608022 E08618E21601800402032200808202600609E106000080000000000000000000FFEA8000000192100080D0258058119258D4 001800008054600600210600000600610000600600605000610022E1060162060004C60082200090C8006006406046000080 000000000000000000FF23D0000800148040012040004004008154080040090022000002048011002004000000000000005000894040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFEAD0000000881888AB1A8391184180188700799A80002AE2AE37A22E0062AE00600000041010000050230221E2AE 2AE3CE34A2362322A84120002AE0340062AE2A8000000000000000000000FF97EB2002008458008018498918019258418018 01800000600610208648600620C00000222202A8002C20220460060060060020860080001088000064024CE0060000000000 00000000000000FF279B00000181104281200084592D809810929820800000600600200604C00614600000410C3000000161 0810600600602614400C08200224200000610C006006000000000000000000000000FF9BA8000001801020840001401C01C000494040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (440860060060 1600C084086006026802006546046006000000000000000000000000FF8CC5400401D35D491551058D190189594B95594180 0010655640044600655655600000655655600455455455655655614E0A041645655644E20455648640655655000000000000 0000000000FF42870000008A18A88828818038018CBC8982984480002AE2AE2022A64342AE10600000010021080204E20C22 62AE2AE2062062262262AE0860022AE0043172AF2A8000000000000000000000FF73E9000000A01A0080080180584B801E01 801813800022E0060AA10E4B400600200000200200200000600400600600620640E0C61040060040000060320D780780000000c94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801843800010 600600000604E00600600000000000000400000600600600645641404402600610EA04006048046006000000000000000000 000004FF686C000001843821A20A2080194B811821801908800000600610010E404006006000004004004000002002006006 006106104094116006006004006104006006000000000000000000000000FF4512000001A89A8DC88CD1003A01841A8B0AB8 00800022E2AE2282260862AE2AE0000042AC2AD8002AA2AA2AE2AE2AE0060202042062AE3270062AE20428EAAEAA80000000 00000000000004FFF398000C01C0DC0324124DA21A8DC01821881801800000600600001610400624E000006026026000004000294040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFBA7E0000890898808818008038298058190AB80080002AE2AE2B02AE0042AE0020000240040040002002062AE2AE2AE2 AE2340060860860860002AE0042AE2AE000000000000000000000000FFEEC300000500184800988504190180390180184580 0000600600000600600600600000445444C40400002600600600600608403640600600E00400644400600600000000000000 0000000000FF278500002102580202504891180395184380190980000060060100062CE00634C0003080801001400D008E00 6006006006014504056256226104006108006006000000000000000000000000FFD94500020100180200300D531801B4380100a94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600400600400 60B428E10A2B400400600E004006000000000000000000000004FF23020000890AB0AB8820058258D58418888AB90180002A E2AAAA82AE1462AE0AE0002842082882002AE28E2AE2AC2AE2AC2262AE2AE22622E0042AE2062AE2AE000000000000000000 000000FF92010011531150949488458C990188980495588D80005565515405565165545560004941544004A4504536556556 5565544C6404046222004104556346554556000000000000000000000000FF19848000050000008508219118019138008018 01800000600000000600E00640600001400400010000604600600600600400E006006086006400006056006006000000000000694040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (050000006000 00000601680614C0000B404E0CC10010E0868060040060054C200410E0060940008063060000060000000000000000000000 00FF5FCA0000018018008058818419018038040018280000006004800004D060050060000060040064040460300060000060 0000A0060260B6026204006046003006000000000000000000000004FFA43E0000E98AB88888911B8038238018440AB8D400 002AE2AC2A82AE4262AE2020002443C42440002062002AE2A82AE2AC1022AE2062163060062AE10E2AA2AE00000000000000 0000000000FF2E5E00000182102180408980585584194080182180000060020000060260040060000442000B000402C0060000e94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF A536804041801101800811801801805821011801000180700000000640700000600000400210400000402611600182641605 6106404084006100006046007006000000000000000000000000FFBB3D802001903081A00909801811801821001801006000 70C701000700680280600000400009C40000642680700641E28F10668600E08406600080702601F047000000000000000000 000000FFCCBA00000180B820801001801801801800401801040000E9010000A6116004006000006086006004204006007804 006080002044017006004005086886200007800000000000000000000000FF9096000803801843A410219118099518A8001800194040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20600C044002 012006082220000488202516000000000000000000000000FFB5C00000009018030208018018118038018038008000206047 0B000610600200E00000402408C02040640030E00600E0041040420A20062020003022020AA00E0800000000000000000000 00FF29240000018010218008818018018D18210A1801030000E8028000064960200C60000060020020005261100468840060 024322D640904200E101120000002287028000000400000000000000FF461980002181182180088180180180380120980102 0000E0060000A621680200600000608000240000600001600444600202A0062020000060800000802030460000000000000000994040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001083510000 081000481480001081001003000400400002280001103280A02301080A00802004400A0000000000000000000000000000FF C80B000000801820040803805801805815C05022800100E0010002062808208C400000600621604050E11000600400600020 249220004600A000020100012006100000000200000000000000FF49B0000000801805002801891801821841801810850040 60261400060120000160002060441440080460002460042160080100420A00062824A0502012522006050000000000000000 000000FF4F5000000080180000290388B80191180B94182A800006403C00021E00600000200020400622600800E00001610000594040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF653C 00000104108202100100405404000040000000010012808000001410080000000000A00A0000000108000880000000000000 000240000200110089028004000000000000000000000000FF1F8B0001C00008899400AA8020220000890408C88000552003 2AA0420122D22020004224025020022823022AA1822AA22244220219250201200048A08240A2AA0000000000000000000000 00FF2E9000002000404114800004010000200011580000012460000063442508068060004002304280000080880000040000 04000008000440208002020008400000000000000000000000000000FF97B580000A0D00040020001100081500422200440000d94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1222A3A22020 2222200028A20222A2AA000000000000000000000000FF477800080104100300100111000011200551000000010010110014 00081001400000100024024000028001004A0100480D080508420010200001148411015004000000000000000000000000FF DF7F1001518134011159558C9101089155555955800155604F557D56417547B56000556404404500556427D570575574A4CA E4564D6116556000C46446505D56000000000000000000000000FF579B00000A08A8A880A8AA8248D48408A880288A800000 22A22AA08A2425020AA00004A10A01228050224A2AA02B2AAAA200A0220020221220800021220A22AA00000000000000000000394040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000080000 0010000000000000000100230400468100000800040400841000000001000040000000000000000000000000000000FF4432 08004010021004220011000215000040005400010000A8800800011010148000000050040300000010800228800350080010 008080080200000000100800000000000000000000000000FF1AF40000020540A00000000401000020020000000000000400 0000001000008000000000000880000000A00010000008000000000A04100100000201280000000000000000000000000000 00FFB73480008C900852888CAA8038298058A88AA88080002AA0022AA2AA2222A22020002AA2922120002AA2022AA4822AA000b94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFF1776004 490002410010010001002000000000000000C00404040004800000000000000004000228005800894200000000041C040418 00004088000005805800000000000000000000000000FFB349002000800800A80800A00A80848A00800A0080400520A22020 0200221280290240200203000100248A00200200200280200250A02B082200002042422080002200000000000000000000FF B0F300000000022000800020000010000000020000004002080300001000008008000000000000008800005000000008808A 0288820000800000000000000000000000000000000000000000FFECC201022000000000020000000000000000412000000000794040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (228A0A288200 0000802042000000002000000000000000000000FF7404000200000000200100200400000210000000004000100000100000 0000100000000110000031000800000080A00820000004000000000090000800000800000000000000000000000000FFF8E6 010016800800A08880800E00E00A08804D00802000200206300280201208300200208A60000009259A95A41A2AA02208208A 08208200200007A00301A000002000000000000000000000FFE871004001001801889C018018019518018018218041837956 40F006106416006106206004030000CA45164C600600608608608C516056106400006046446100006400000000000000000000f94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006206016006 00800000650600800050211400E0000840140061082AA00A00400054600600C080006000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF6B7300000000100000000000000000040100120000008000000000 00004004000000004000000000001000000000805004000004000000000000000800801000000000000000000000000000FF 67CD000401800801409001A00800A00800800800800000200200200200200200280200200200030008200220200212A0020A00054040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (EB4000004000 7851938001899A458604050280098200204216006206006016226200006004028000C280010068060840E44067B82FA12B54 0400C85226108080004000000000000000000000FF9C31080000001A19850001901C01848807800801800098C08E02700622 600600E00000600600000000060410E004000140107400002042000000006486004000006000000000000000000000FF3CC4 100005005801A00005821809810801831A55820021449692600622605642540041685454000105280040708000C404856044 802D021200810060C6104000006000000000000000000000FFA6B1000001001803800001811801000011101881804004400600854040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00680E106C00 81490E120021104000000000000000000000FFD3D80000008091154028A3803421A01811C00A01800000788600600600600F 88604780E40200000020280E00608100082020030E036096427008405006008008004000000000000000000000FF03F30004 11C41883A0000980100000080180030980008040060058060060060028A600F8480003110108088062060270060048069068 0680400801288600C010086000000000000000000000FF3ADE000005801A03800005841010A01A098808C580200260071040 0601604E00600640E5523000002821143068820164160AC002006A86924080242006904000006000000000000000000000FF00454040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1601E18E0824 060002741D0014A04096806080542002280EB82A60B609407C006016017008006000000000000000000004FFE14E00222100 1E01001001801895811C018000018020106446004806046006006006000C060002004421060065060060072861044AC0A490 4200004006842008004000000000000000000000FF38FF000001021801501001811C15801801800B01000010E00600400600 400600600610004790000401680681600004600608600008400400400480600E024020806000000000000000000000FF360D 000050A0D8410128B3803009840C0DA00011800008C09600600600618608611E08639008051106400700EC868000180E000600c54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000421021891 2808038058118818018240018000106006004006006426006015D0010000028008040800688682E31604610408FAB6006404 084406082440004000000000000000000000FF2FEB002031201881010801901C80C01805820A01800048E036804006022006 40600400100100820414480410640004692600E00100400C006205000017053000004000000000000000000004FFB33C0004 008018010319018018018828058A00A18001A3589682614600400E28600600010480000010020608600680612600C0408062 06204004805A06202A00004000000000000000000000FFE968000010C01B014018E191180100A8418808398020024286026000254040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0600602410E0 0710C846026000000000000000000000FF8EC9200400803832100821805A05201811884000A0801020060070060062062000 0854110502408088E00600611601689443100010852E006400006406806286006000000000000000000000FFB8C9000441A1 1F21208029801A13300C098800008000605006006006002006002004000624020400004816106426486C0600C00000600660 6000005006062080004000000000000000000000FF68D600000380B803040001A11814921841808F01808080600600695608 6006A0642402191C8C001500CC17087A0870600628180801440441602400840740A400024000000000000000000000FF488600a54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (608644000000 008000004000600400E2344060440A044800400600A004006006006006006000000000000000000000FFCBD7000000801000 0008018018010018018000008000002006004006006006006000000000004004006006006006006004000000000006006004 006006004006006000000000000000000004FF9075000000801000C00801A018014018018000008000003006004006006006 002000000000000001007006006002006804004004004006006004007006006006006000000000000000000000FF7C992000 02A21A0001080D801C01021A01848200A0008020060060061060468060200000340840040064060068260C6004100108000000654040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008018008819 01A03A01009801800085804004644602408640E146452D204000020060454C650450608C80601088088108008600A0048060 06804806006000000000000000000000FF749E000180A01A009E9B01C03C01801A03800001800008600600C0860362060008 A0000000082000006404026804B0200488480400C006082000806006804806006000000000000000000000FFEDD100000080 1841401801805801045845800201802010612645600640640E00254848020251450C04715052600405631000008010C00690 2004007006006006006000000000000000000004FFF62A00000080180100980180180180180180008180000064160060860400e54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00000600600 6006006000000000000000000000FF38B8000001801A0080080180B801009809800C01000000600600408620600600200000 60070000004860044070010060130A6A870A6886002000106006006006006000000000000000000000FFCFCC000200801810 200901801C01C01801800A03802004744602600600E0C6254540406004002021846D42086006004006006006803006006000 006006006006006000000000000000000000FF354E000000801A10000C818118018018118048C1802000622E00600620A09E A2420829628400C2A80260EA28E2260882AE046EAE0C200600E000107006006006006000000000000000000000FF2C55000400154040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80000092712F 22A800106A44C16CA08505494C5335204826A00801036086A0F046A06000000000000000000000FFC9FE0000C3E01C0D0088 05803805955C31800A30800008204608E22600600644C050006200880200A361020870161040048080008002870500082864 1604600608E000000000000000000000FF6C91000201A0180120080180180180180180080080018020060078060040060040 00006000000000006006006002000004000000000006800000006006006006006000000000000000000000FF583F00040180 1840280801801C014458418028A1800000710644400600200E80600000E00640200000640400689C8460020420020020070000954040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000104401000 00021A801A08181000000000200010081461161000081060105000000100010001004A442424430C40400002800000938002 0100000000000000000000000000FF48BF00008402010001A100040050000184000020000000100000102008000000000006 0400000000888601608040000000130000101600000000000808248041200000000000000000000000FF3298000013019881 08080998180100182191880000000908860260060044860004304062060820000460840160A41048C0008040200026000000 016006106006106000000000000000000000FF23EE000209AA9AA1B044A9AC1A81A01A83A88A848000A0848684680EB1688600554040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (406806056096 10E000000000000000000000FFC840000540CD2CC0C10C80D40C20C28D10D10D44800141200300A08302B40300243142344B 403000A5302220335350202B33320304200310300104B083503222402000000000000000000000FFD82400036038424E4002 432222002042002002460000C00C00890700A008008088008009E0010A01600800180E00800A088048B4804980A00800CC00 00810430C90000000000000000000000FF5CD30000018008309008A0800880852800800988800020A20200A00201A0022320 4008200A22A00102217200201A00A81248240204200250200822200240200200A000000000000000000000FF14730000080400d54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (202A00000000 02000A082A80202002002A02280400402800020802A8008000000000000000000000000000FFD3AE000000B44A20A00A00A0 4A10C00A14A00A208000923002043002842802852810803442002B0051200280290280A833002803402C02012800A0280282 2802002000000000000000000000FFF37400025520820A04A4012202822CA2A034A3040000C11004810804A9080090090080 910C004800024940804A1092088480D0848AC8AC824880834004B00004AB4000000000000000000000FF3C1800000B00180B AA5829801809903803801811800000640600640608608E11600008610408C00000648E10E00600640400415430450620400000354040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0880AA0AA028 0004AA0B000000002A82A82A82A82202A82002202A03200004800300002A82A80A00882003002302200A04002102A8848000 2A8000000000000000000000FF17EE00014024431430A35415401035254424030C0000900D50410D50C40D50D00C50D40A00 000B01290D48D50810D48D10CB0D40C008004509008005505488004D0000000000000000000000FF6A21000A004000000404 0000000444200040054800000000010000010010010411090010090010018810410010012114011090490010814010010800 00401001000000000000000000000000FF3AFD0008800000C00800AA08802000000000004800000102A8B802A80002A8200200b54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0400C8010000 00000000000000000000FF7681000040800800A2280080191084580180084280008028020020020420020021120020020003 0000A00200204200A03250241208A08A50000002A802CC2002000000000000000000000000FF70EA0002860AA2AA48C0AA4A AD001188AA88C08400012A92A82A92A81102A81302202B02000000004007182A80000000400400803202300100000C12A810 00002A8000000000000000000000FF22C8000A121080000200004004C2000010092000000022000102000008800005008000 80C80000020200000004A0000020000008110288080002349001000000000000000000000000000000FF18220002A80AA2AA00754040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100900100100 10111102A9001221201001101001501001001001081001000000000000000000000000FFAE2B400400800C40C00C00920C10 884820910800800141320308300200210210200200301300100100300300234315345350340B00B283011001043403003003 000000000000000000000000FFEBAE000001001901811801801001001001001801800000600604620640640600628E106104 0000000C40A642600E406106004106224006020080106106086006000000000000000000000000FFB5810000092000000004 002002235002002422100000000004804804A90800B108008088B5000800B448A4800B11320C80855040804800830C00C00000f54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (301480C80840 820000880D200100003000000000104100000000005401085400A01201502160300800000500080A03081200001000801000 00000000000000000000FFAD730000000000A000000000000C000000001801000001000002000040E4061044000060000000 000A00D022000001600C0045004C40004201000C0080000000000000000000000000000000FF8B820000008C0810800800C0 000141043018884080002022120920820C208200200A0924C200000000201208A0022A208208614A00E3C209800000264201 2002040000000000000000000000FFCCCA400C011004004684000A0584082000000000000100100100130011000000008000000d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00200000000 0000000000000000FF07A6000000004943041841C81803C11D55880025900002608640600600600008E20220620220000004 612E0261140060200800021000020C04000A6206046082420000000000000000000000FFBA06000800042080013002813913 801821801913844003608601600600601008638238600614000000400610404649619420434E2D461221000000E006126200 208000000000000000000000FF09DB00000010181000500D025821905801801801808000201608600602600020400200E046 00009230600600000608600420020E20014220009200E04600E206110000000000000000000000FF22B00008000800240280008d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000004086 002022146000007203206006000400006006006006000000000000000000000000FF3821000058090991A012AB0019C10419 018A800180002002AE3062AE1162AE02C0002B61140100002AA2062A83022062A6A2EA38A262AE3380002AE2AE0062AC2A80 00000000000000000000FF32A5200144044A0590100189184502180B80401580001440060060060460060040040064444408 0000200600004200E00600200210A006080800006006546004000000000000000000000000FFCD7B00000000805103380084 58099139418000A1800001600613600629600048600200E10A0903000040CE00608C14601408008000000200010000600600004d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180030181580 00018000114006006006006006036006000400400D0000400600400401611700400601400400090000400644600600000000 0000000000000000FF5BB1200124954111D55555801B54025835954115800045055655655644655600400654054A15028455 623655029440E22F4B00B60A0554450004554556556556550000000000000000000000FF35300000820A340380B0AB913A15 00BC418AC0D380002442AE22E2AE2262AE4860002A60440C00002AC32E2AA24A2A62203373212A62AE2200002AE2AE0962AE 2A8000000000000000000000FFC711000210000C4380180182DA01009901800041800010400600600608E00620E00400E00400cd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF3D43000003001A01841001D09800D25A238000038000116006006006296006004006008022310B040000C6 0020462043160401540480040C0804004006006006000000000000000000000004FF9E67000051800055A05A018458000098 91800001800000400600600604600628E00200010004000000421600401410E006C88A049000060102000060060060060000 00000000000000000000FF78000006818AA0818890AB101AAA1018018AA0A980002202AE2AE2AE0062AE1640022A02080010 042AE0062AC2840261220000042102AE3010042AE2AE2AE2AE2A8000000000000000000004FF7DC5000A00800041D41400A4002d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000A0060060 06006204444090044006006000006006006404006000000000000000000000FF261700008C0200A989102110188892180188 20AB80002222AE2AE2AE2AE2260842222A00040000020002AE2862CE2AE2062A02042A02060000027E62AE2AE20600000000 0000000000000000FF55A20000241020058010018018048018D1840001800011600600600600600643400E00000400000414 000600600600402600000C00802400000400C00600608E000000000000000000000000FF2E2D000001009801853092935840 915805808001800000200600600600608E0041060085500000002080060320460060960140A400409600000000600600604600ad4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021951C0A001 800001600600600600600E4A60160122040000060A200409610C0000A6084048104504006006002006004204006000000000 000000000004FF3F9F0000A10818C18AB0C18018AB0019518A00AB80000262AE2AE2AE2AE2262AE0562B22440000002822AC 30E2342AE02E0842040942AE0060042AA2AE2AC124006000000000000000000000FFF2F50001110159150C591580195380B8 03B4015480005465565565575574C601654354015400000441255644640655041045430044C03400600400E5565560D40060 00000000000000000000FF3CAA80000302980400180188180189580580000080001060060060060061060040020000940000006d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF6D5F00082181184180190193580111580580800180002B600600600700608E00440200A13600400212600624A1 040074B64C600434400E006002002806004124006000000000000000000000FF26B7000015921005000A038018038018D1C4 000080000068060060060068060060AE00000400600401200090400600000000C0B000610600600400600600440600600000 0000000000000004FF5AB20000918078980AB83D8558A98618018960AB80004162AE2AE2AEAAEA362AE506AA020400400024 22AA04632E2AE10401424040C2260060042AE2AE2AC01C006000000000000000000000FFA8D700082114184080104182B80100ed4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200710608690 100402009608A00622210010E20604480E006000000000000000000000FF137C900041000001011001801841801811808001 80200060060078070260044040032042062840200062013021230400312034172100064040800C6016006084006000000000 000000000000FF3E008028014001E0001401841807801C01C080018220007006006806807006086006A060540C40104062C7 020002F0E9A80C124620000600600003680E006094006000000000000000000000FF49DB002001A09C02840C01801891035A 01C00001820000700608E80611700608622A82A0060060050861040422008090060868800870260A60050032060470070060001d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4BA000599280 02600E0260068A60080160460060062860A80A640207000C0000060020080020060CA0000800260020162160000000000000 00000000FFBA900000010018800010238438D1001831820023800020E0863160060070224AE246AD40140240002060464084 4404E00648826002804E12208002000622200C006200000000000000000000FFDAFB800009101810840401801801025881C0 0000882008740610401600680400602601610601200000222C006006006235003103202A46000020C0740600400710E00000 0000000000000000FF5440880041011A0585100180190104B80180000080000060060040070CE00600620E806444442050C8009d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFBBC580000004400004200013404013400460000000000000000100018012284D000011055021050001021000003004 60D02A0008020006040100490000000508000000000000000000000000FF82B8000009001812050825803801851815C00202 80405264963060070070200A4202A8E08604E00050402C002000016226016110406206000140402206006006286000000000 000000000000FF0D830000000A194000380180995380180182000184800160060460160C60100060070060045040C8044004 0020140000160862240360560900000A0026420006006200000000000000000000FFE26800000102182200B00180982B00D9005d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00A2320AA202 02222B0022AA0020002C22AA84A0C22AA000000000000000000000FF3F6F00804200A04300300002A0010201104004B00000 0008000000008008090004008100000A04800A90280000080010810204100400001000000008000300000000000000000000 00000000FFBDCF0000C90148968800AB8540800400000AA8AA80002AA2AA2022AA2AB0124422AA8024020D21002020220022 0228825211A2A648A2AA4521000222AA4A04022AA000000000000000000000FF87FB00004210905000800000000C0000D000 1A0180000000000C00000060860000042460000400000A00802A80800060000000042000064880000000002080400000000000dd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A8208001AAA2 AA2AA2AA2AA2222AA0122A22AA2820002820222120A268A0122A32022022AA2820022032AA0022AA2AA00000000000000000 0000FF583D80080100000100100108000509400440040000000048048C100500110100800140000000400011108032008040 5081200104950000100000009004884008004000000000000000000000FF6F61880101D419010D1D5580115580B023555C05 8000557556557D575574C65571475465564140004062864C64A615444648E12448E5564562004D6556306557556000000000 000000000000FFCA3500008A8A08C08AA8AA8008A88009508AA8AA80002AA2AAA0A2AA2AA2421022AA0AA0AA30240024224A003d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFCC5401010020000040000000022000440000400000000000000000000000008000000000000000004100C8E804A0000001 000000401100000000000000000800000000000000000000000000FF81220080100440900280001340001340044005100000 0000000010008008880000B00080000205000100880800100404500009400C00000102000A80002480010000000000000000 00000000FFCC210801002080400002000000000000B00000040000000800000000000000000A010000000100020204000484 00000100010008010000020000001000100000000000000000000000000000FFD8BE8000328808128828AA9018AA9018018A00bd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (470040062850 860CD106806110C16D37107406006000000000000000000000FFB4BF00000100100000100000040000000000000200000000 04000044004005004000020028000001884B0152010000C050004840404820000089845A2480000480400000000000000000 0000FFE87600000080088AC00800840800800A0080080080004122030C221210308220A00200120200000050200200200300 203220202202210280208822A28A102402002000000000000000000000FFD4CF000000200600200000000000000000000000 0000021880C098A1800808000000080880000002000000000400000000080080290000000000000040000000000000000000007d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000200200 20020020020020028000AA1102A840200200200202000280208228E802002000806002802002002000000000000000000000 FF915C0000000004000050000002000000000000001200000000000540000150800000880000000000800000800800300880 000008000001000088000000000020000000000000000000000000FFB3A7010106000800802800800800804A008048048A00 01B0020022A20020AA0020020C00820882A81125DA5DA4022B208200208A08A14280200000244307A0228020000000000000 00000000FF879C000001801B15801801841841801801801801800045650634E49610610E416006080286000002505016006200fd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF9E CB000000805140801800801009000800801801008010410610E10600600E0060060001040000000060244042444260040804 8E090000006000286006026006006000000000000000000000FF6BF800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000600000000000000600000000000000000000000000000000000000 0000FF0730000000000001000001001000001200001001000000100000000000000080000400000400000100000080100000 7004004000004006000000001000000000000000000000000000000000FFDC5A000001001000A00800800A0080080080080000034040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (692E00200244 A100022000016026806026406000000000000000000000FF4A05000101808201A0980180B083881821881801000022F40680 EC0F10E1970860069016060100021006842402AA8268042D4E284800062000022C601722E20F906040000000000000000000 FF88750000039000B985380182110D9218C180180100008862A6806A0600600E40640601048401008300ED08024106A00A00 02C88280081F00A082006006416416006000000000000000000000FF84CD000012A11401C058008552018208819019050000 44E4460464160161060D61070000040001000920140C00100082D445004624410044E100016026006046206000000000000000834040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (007486006006 00631608603600100411040056808E81600E00E8103164880262060888808CF0B712704F026000000000000000000000FF7F 450000090000858018158414018018018000010000006006006406086406006006140504200010002A8A026C07C10280C460 0224700E043000006006006017086020000000000000000000FF624E00004000300280180182020100380183000000000078 06004006806006006016020904480409A0002610A20020048F0820000068A882000100600608704600600000000000000000 0000FF8FA200001190300082180180000180180180010400810060061241060060072362860080040080001040469060040100434040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFF8B100 0021011000E1581B801801051801990015840010668600620600618699708608000600020400400210700560044200070C08 808640C00420600648EC06006000000000000000000004FF184C00004040300900180180081188180100000080000060B600 4026016006806006000006010004A074444040041060160C401700CC8600E00040600710C006006000000000000000000000 FFD732000000803200001801800C01803801048040800000608600400600600688602600080600000400E844084814000006 00010E000347896084096946024006026000000000000000000000FF162400014800048180180B801061801801800021000000c34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C0C164C80807 404004046406805086126000000000000000000000FF8D130005502408000498018008018018458100008000047806005806 0064161060060005204084942042AC800002406206084314245C1631400584F817A26436006000000000000000000000FF2F FD000000884A10003801800C01849801800002800002600611402610E00600600600080000800524444448400702014E0B50 05000417104004106006204206006000000000000000000004FFBDB800040110100180180580380180188180000180002460 0629650610600644608608000600040202410280E20482608620C844D0000E0840060C62060060060860000000000000000000234040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060170460060 0600680600600600004420084680608001000000C041200006306004006014002080042000000000000000000000FF253700 00938440318018118018018018458100018000026006006006006C8E50600610734629028C89040E02E41720630610488802 020E84E00004E844432A48002000000000000000000000FF139D000000000A08185801801A01001801800001800000600600 600600608600600608080008000000C1061AE28604E04600440410000602400100662600E007006000000000000000000000 FFD29B000002612A22413809805811901B018120118400506056C0E92600600765600600080000002508090681640E1204A600a34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFA320000001 800001800801801801801801800001802000611600600600600600610605608608040440000200200E416026204004000006 006006006004002000000000000000000000000000FF88180000018018008010018018018018018000018000006006004006 006006006006006006000000000004004000000000004000000006006004004004002000002000000000000000000004FF06 A3000001C01800801001801801801A0180000180000060068060060068060060060060060000048000040048060060070048 04005006806005005004803001002000000000000000000000FF4DCA000041800402A498018018018018018020018000006000634040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AA44E0060060 200660C0000000002000000000000000000000FFCCE1000001C01A00801005801C0380180380000380000160070068070064 070168068064A6400804D00C04554001800006C0008808820608600400C002804000004000000000000000000000FF41F400 0001001809801229A01809801849A04201800020E2A6006806006086036806006886020804200C2419440602E00E04400500 4006006004206004864000000000000000000000000000FFC17F000001800410C00851811811801A118001518100C964460C 610655654E4462571060064480C080004AA060000C05110008B400880680604444448600200000400000000000000000000400e34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010640644700 6116046026000000800C07006400006840C0200280220000600082F423004000004000000000000000000000FF3486000001 80140080180180180B801801800001800000600602000600600600600780608600002910140600280600100720288708F000 086001006003000000004000000000000000000000FF6250000001A01000200803801801801803800003800080F006000007 0074078160060062062002804000034CF00000000000680AC46006806000006000004000002000000000000000000000FF43 E200000180100000080180181180190180402980A008600F0C00070AE00E20E22608F0062887F000000E20E00E286286026800134040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2300020D4318 82AB1300A09A81A44A01A88341800082609692700688600E0C680E087246000C404808448C0808028800020AA5294C089468 10A5294AB04200A04000000000000000000000FF2FFA000121900030000423C05C15801CA1C204038000286A0621622EA26A 4621620600610E00001003031121420640023000C00802188620604008220204C090084000000000000000000000FF6F2D00 0001A00000800001801801801801800001800000600600600600600600600600600600000000000400000600600600400000 0006006000002800000000000000000000000000000000FFAA840000014014000018018118018018C180610180000060060400934040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600204204000 2002040400000000000000000000000000FF701700000002010044800194B800033900011841800000000000422018002009 850659020000050804000000000031600000440447400E080020800000100208880000000000000000000000FFDAF3000080 0800640101A00000420040000201800001600008008000000E08800050800408000002488400090100006000831020080197 220012400410288000100000000000000000000000FFFC7C000027051A1A0010008018018008019C003180000B6886026006 02604600600600602600002022008404464080E54040020020800000600038200A404000004000000000000000000000FFC500534040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08602608E086 08640E00021040000E00E146804106004154204116026010406054026400546000000000000000000000FF6A15000430C0AD 20D48C42D40C00C04C08D04C3080002022032A3002003C0280322A40B002001100031223043202093422B4A4030AB0021030 218C3C0330A001002000000000000000000000FF079F0402102092811842002042882002B020C2020000800A00A808092008 01320A08000890000810810840A00801020821148904900A009008080692E0830880640000000000000000000000FF89DD00 01489048000218468008008408008008008000102C0255640300200300200300200200020000023A02A00B00020B0020DA0000d34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08800880A00A A0AA0A80040AA08008A0A80000000AA82002A82A82A82A82A8000080000000040200200280888B803B00202302A88400002A 82A83802A82A8000000000000000000000FF4292000204A44A04A00A00A02A44A00A20A00A02800081200280300280280280 2802802C0200080140080210A84204202280A80A90A802402800802802803000802000000000000000000000FFECDD000228 20120920120020030820020A2402000000B450048AD004804004004800004834000C010D08C8820810204808004D05004800 954880000004835000804000000000000000000000FF79F90400858C100D005101805841851881851901800010E00601440600334040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800002000000 220000000000000000000000000000FFC9D00000080880000AA0AC0A00AA0A40020880A800002A8AA82A8AA82A82A82A82A8 0002200002002C84A02080014A82483402C04802A82000002A82A82A82A82A8000000000000000000000FFD1910002143503 083543543501303543403523500000CD0550CD0D50550D51550D50800A88000C00A90D50520C81350410C40A88C40D302909 00D50D50810D50D50000000000000000000000FF6180000C0444050040040040000040043044440200010000010000000010 01001001001110001001001009941520001081009001029001101401001000001000000000000000000000000000FF13890000b34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008048008010 10000A0142CB00C0CA40004C0CD308810C0800884800800800004804000000000000000000000000FF5D87000032810B0480 0840800801814808820840800000280200280200200200200200200200000010204A08208AC4202200203201204201200000 2002802002002000000000000000000000FFBAD20001400860740AA0800944AA89010088A08200002A82A82A82A92A82A82A 82A80002A00000000000000200100880800002102002882702002A82A92A82A82A8000000000000000000000FF93A30008C0 002022000000004400000014000002000000080000000100000000000000002000000000000100804800104000004008000000734040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (504420400000 00001400002000400000010010010050010010890004C1241000001001200021018641041001421141000001000001001001 189001000000000000000000000000FF6585400400C00C00C00840800800900800808800800100322300300300300B082103 01302A541003302343002113003523143403402003442803123003043003002000000000000000000000FF1B7D0000018018 45801801801801001821801801800000E00600411648650620E00620620600002001401654600610C00400E00E0060460061 0000E22620E006006000000000000000000000FFAB8800030024000820020A2522002202C22002080000800004804004805000f34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (102284000880 06406000000000000000000000FFF87F0008000080800CC01008801000000002000000800201001004080000000004000001 001100000000000001300161000402804404460A04880502003202A0028000000000000000000000FF7AED00000100000400 0021801800081800003801800000C0000041100002004082260042040A00400901082800080563043000A000000600000008 8440220000000000000000000000000000FF91D6000000882854800800800C0A000C00808840800000262200200228200208 210212A02A2001001426020620A208042200A20A312022222080022142000002002000100000000000000000FF6385400C00000b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600400 000000000A00602640604C086088100026006000402012040006056000000000000000000000FF6AA8000001805101113041 849401801C01801805000000600600621600600600608400E0040000801302060060A2000304016212102006146100000100 400546016000080000000000000000FFB83D00080001380180103082100180882184B8CB010000600620E006006206086466 00C00410000000E00001E01400000028E10E40648000E400202042048006246000000000000000000000FFDD3D0000010010 4D821000901011810841815911000004450630E00600620008600610410400800000600404600000E0004A60060361200170008b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01C0A8058010 8180B88180100100000040060000060060060060060040040000100062060162440002061000022020060060001062460240 06046000000000000000000000FF6724200241A818018808AB8AA1918AB9418AA0AA00002AE2AE9002AE2AE2AC2AE2AE2AC2 AE000000004204216002088012324A30B202882AE00002018021C006206000000000000000000000FF019E000001851091A4 08018000438018B180100000000060060900060060060060060040040008400061440CE30804630200C00200A00000680010 8440104006106000000000000000000000FF558700013580502500D001801009801805800801000000600644600600600200004b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600602600600 6000000000000000000004FF45A9000C11841C40841801800A05801A01801000800000400601600600600600600600200600 100000210000645200620400E00600E006006800916446144006104000000000000000000000FF40A0000555325490941951 95480B94180D9551548000554556D4E556556556556556552556000004002044406108550140426C8688E516556404456096 514006294000000000000000000000FF5D3D000083A8B093C8C8AB8AB0218AB80B8AA0AB00002AE2AEC202AE2AE2AE2AE2AC 2AC2AC00002000424A3460862AE0A6220320A202AE2AE00044600E20400622E000000000000000000000FF287B400001809200cb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002112000320 00802600622200600C08E10440C04600610405601602E006136000000000000000000000FF03DA000001804841A0180B8008 45823811800000800000600600600600600600600600200200001000010644E2C020004C316054244026006C040162064860 06104000000000000000000004FF2BC3000201A4108C849841801889811A8580000180000060069160060060060060060060 0400080000004C00600E046104004504804006006004106136016006456000000000000000000000FF64280000AB88924488 38818ABA418818618AA0AB80002AE2AE2262AE2AE2AC2AE2AA2AE2AC0010000003141C60040882100300540CC2CE2AF004A2002b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180B80 182B822001800000600600600600600E00040605601000011005401600601624602400401611004600640001600400600600 0000000000000000000000FF85480000038040C38A98AB8A98358AB85588C0A980000042AE00E2AE2AE0042AE00222200000 000001420E2AE0462AE2A431400402428E2AE0000C60262062AE006000000000000000000000FF5AB1000001812821803801 8018018018A1820005800040400608400600602600601611242000000454410600610C00000402024C084006006004406486 106006404000000000000000000000FF2EF20000D18A080980180180489580181580200080000CE00644600600630E00632600ab4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2242AE2A8000 000000000000000000FF9C67000902089001001C00803941A0088180000380000B600648E0060060CE004026006022000000 32000E00620000000E0044040000060040040040C0084006228000000000000000000004FF52610001200880CB88D8AB8AD9 418C9801A880A380002AE2AE2242AE2AE0C62A808A2862200002002004062AE2A608E1064342A622428E2AE00422622C2AC2 AE2A8000000000000000000000FF2129000048041912935B54D51801B54801D30351800020655604655655640655531652E4 880004A60045265561083304C04240CC4A8556554106294210456556100000000000000000000000FF60F180001004180004006b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860B00042060 3408843040820600F41714000700000404400E056006000000000000000000000000FF7C990008D284002580080920B89581 101584200980000060060060060061360023260060140003100541240044460060CF04E1270D402600040011500C10400600 0000000000000000000000FF1D9E000001000400045A44041801A020A1D10445800000680608700600620680101611308400 0000086214004108001200304016000006002005026126014807000000000000000000000004FF915E00000508F088888881 2818218A510180049180002AE2AE33E2AE2AE4062AB0462223240000003041402AC0062AE41410420620028E2AA00430630400eb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (803801803801 800001804080600600080600602EB0000400641000841003222840425610000424000600602080220004600A04C004000000 000000000000000000FFF5A7800001905048801801E01801805801880401800000600700000600601600E086006014000208 140406002000020101022086006056006400006084006006000000000000000000000000FF422380080080040AC01D41A058 01C01801C80201804000705E000C1F00760710F286066C0460000001000644218612680140820E82600E0060010068C40070 07000000000000000000000000FF29F0000002800002201C00001801C00001C00001800100700600710790784740120B0030001b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000000 00000000000000FFDCC100000180C00C819841C01821AA9829801311800040640600620600E00E00E08E0040060002002160 C6006044100606002006200006022200012006002002180000000000000000000000FFBF7700000180204080148980180B80 180188B0A980802062460065061060862860162AC30634000050C0021FE00669E58608030612020600200208A0C402220A00 0000000000000000000000FF7CDB800001801082881A21803801A03883C40405800000E8C680800680700600522680702000 000000203420402204600500B0CE90A15010210002602220C004000040000000000000000000FF692F8000048820008008A1009b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008050000000 048840604004000600C006400000108080008288000000000000000000000000FF5623800020040010000024000094642014 00060000000000002000000000000003200002400000000280C8030020006008400006080026088080020228000020000000 000000000000000000FFE851000000808008801310A03815C048A1B05441800001200600E006006006200A052AC406400000 0060842C000041610600E08600805008208002202640E006000020000000000000000000FF9F79000000800100900C01C018 418C9815E3100381000061460064060160960938D60060460004004040100140000200061062565243000424000820860204005b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408C88008AA8 AA80002AAAAA222AAA2AA2AA2020AA0222220004001222A222242228AA220222AA2222AB1120800A213200A02A0000000000 00000000000000FF335901042909000804804000014022A0804002000000A000008800010000010110008800000004000084 208400000000C002800040C000040000080208211280000000000000000000000000FFF88000008009098191CC888AA82008 C9008AA8AA80002AA2AA1062AA2AA2AA0F2002B0219A0002624022123920020A828259A2AA32228A4220026024022A040200 0000000000000000000000FF6C4000000C00D0440C4001C018000018A020180180000040000CC0000000004088161560000000db4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF1DD1800000C0088482AC00EAA8358008548888AA80010022AA2322AB2AA2AA18200320221200020020208200 A4220AA4022022AA04228A22200022202200A202000000000000000000000000FFF0BE800A0B04001100020420000A40002A 400400000080080500C805004005081400C1100400010000C00100009004489000000000C0010440020100004C5080000000 000000000000000000FF5A179001038458C1103913955801501801D55D5580000D755744555655755644735624ECC4000110 52408E48E12E53400E5065571045565142024561260A602E000000000000000000000000FFF59A0000A0082822820CA8AAA9003b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200801800000 000000200B00200010000000000000000000000000000000000000000000FF16750000000000200000000100000000000002 000000000020000080000400800000C00000000110801EA86888004010000001000002000405000000010000000000000000 00000000000000FFD3440100004C00401000A400009422A01440020000001490008010000000000293208000300000000C00 302404002002501500014D00401080000003000200C8000000000000000000000000FFA2D610013201401400041000000010 00A004400000014000000880010008004000101500800001100082000801080001000000000000000002000900084800000000bb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5801801C0180 4001615632605654E0C712640604650640000100624600700603400690451701500E050001046D4541640601600000000000 0000000000FF83DB008000000040002000001001001001002001000044580400590000400000400508028000022040411053 800C084001C04800584C00000028004004804000004000000000000000000000FFAB2D000030100800A00C00800810C02800 800800802000A1120820322C204208240204348240000000200200200205200208201308A00203000102234220A402012000 000000000000000000FF500F0000000000002002000000000000000000000000420000440000008080040000000800000000007b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF9A4B000000000800800820808820800820800802800000A00200200200200200280A08208201008000284280200A 22800300A00200A802020280002002000802002000000000000000000000FFEA400080000000000000001000000000000024 0000000400000000100000000000000400200004288000000008000000800000000000010008300000010000000040000000 00000000000000FFA6B8000000000800804820880820800820800C02800002B00200200A00241A00300A42243A0080000025 BB5D200212A08200B10210B183000003002002003062002000000000000000000000FF406E000050101A01801801801811C000fb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000011171100 444C002001120000040115608204420402E000000000000000000000FF551E00000000900100100101580188980180800180 0024620610600E00620400600600000000000000602400400600601400008610000000001000602200410640600000000000 0000000000FF2796000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006000000006000006000000000000000000000000000000000000000000FFF72D000000001200000000000000000000 001000000000100000000000000400000000000000000080000000080000680400480600400600080080080000000000000000074040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (810001808012 601710600610608402700602700C20040800600600F08E00700E3020460A200000020108E002024306036000000000000000 000000FFABD100000400D024001901841A018818418040098000206A6600E08C00E20420E006C87006100800906880000046 08E12442C086404026040008066823801006216000000000000000000000FFB6470A0080001041203801801A018018218000 01810010685601610411610441600694400600080080612461400600080001400104C2468000000068820040060060000000 00000000000000FFEE5C120490001200005801821801801821800011800000600700680600600404700600600A200408007000874040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF1D8400000000100D801941DC381980199B800403800000600610E0260AE00C08E00E027106A0050A1473AE4061D71860 604060465CE886458000806023248002006000000000000000000000FF091E00008402508180981000180180180380400180 000060C601600605601413600640C00510801000600600600700110008600081610600000304680340000200E00000000000 0000000000FF4059000308040301811849801801801801800401800000608708680600600602600610F10A00828002700221 200E200006102020822C00C00000007002124807006000000000000000000000FFC25000001000000180180085580181180100474040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (208600E03601 4A0600C0062284082A6006402506006000000000000000000004FF7763000010011801891801B01A01847C51801801800010 604610E01640E00441641E08484200024400F00600681700000260891060080600020480E51620E086006000000000000000 000004FF26DE000020020800D01801001801801801801805800000600680E006016406006046004000000000016024014807 046C0600402610400600000000E004010006816000000000000000000000FF6470000008000809801E01A05801801E418018 05800000780600602608600600600E0A401220000000622C00C806400006000000800C06000004006040094006006000000000c74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (838000107446 00683700600041602E80480E008045286206C0711604005600450080C0262D8005D0E90408200201E0000000000000000000 00FF3C6500004221080480180080182980DE95803801800000E026006086206002246006456421A0000080E84024C02F4162 9612404E20520E04000010784F842012006000000000000000000004FF3952000030020801809800881901851941801C0380 0000F00650680720620210622601614640000012604402C00701020600404809400620000C02620C00220200600000000000 0000000004FF9464000000001E01801801801881E09881801A018000016207A0680600600410600610C8822004000C6007C200274040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000004FF B067000003801801821801801801811A15A09801800001604600600680600620600081240620000409080684600400001610 400120000600C00500F044082006008000000000000000000000FFEF0B000041851835801C01801841805841A01C85810000 6006806146A060168560403400C601080042042E2068C701650603482E03444E526C8010601680200E000000000000000000 000000FFA02A0000002019A9801C0100181180190180DC01808000600600600600600800F01608409000000002698E016096 40600600C006024006000280006006042002006000000000000000000000FFB303000000031A01821801C01C01801831801800a74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (50004E000148 800206046004046016006006000000000000000000000004FF52D10000018018018018010018018018098019018000426006 42640648610604610C00404644004C20602E00E0C604E0060CC0060000060060000062060020060000000000000000000000 04FF939E00000180180180180180180180180180180180000060060060060060060060020020060000040000040040040000 06004000006006004004004004002006000000000000000000000004FFC221000001801A0180180180180180180180180180 000060068068060060068070020010060008000000000008060060060050060060060068040040070020060000000000000000674040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002A622626E1 CE2AE0A62CE02C2A42A620842820C02E0468AF2860A882600F004006046000006006800006000000000000000000000000FF B5DA000201801801809C01001A01C01A01901801900008600700E006106406006006A0680E04000400600400400504000600 0000006006004004806804004006800000000000000000000000FFAF390002018018C1A01829001801809A21889821800000 640608700600600E0268868448060B000401600418C00600E10208C08600600660400482680C800006800000000000000000 000000FFD234000001801B01801851001D51851941911851804009605611609605603650E02449651610000400700680601400e74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF84EF 000001801841801A80801951C41801800001804081701600648700700602680401481E000000004006026005046006002047 004400046000004406004806000000000000000000000000FF6ED60000018018018118008018018018019000018001086006 0260260060060070060040060002008040020028060008068028000040000260000060060040060000000000000000000000 00FF7DED000001801801901A00801801801801800401900000600680E8060874060068044060060400000048060060040400 04007001000006006000004006800006000000000000000000000000FFC6B7000001801801D01900801801C018898000898000174040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4C9080060060 0800200008E00601C0C6000000000000000000000000FF716F000431A25A81C918B592D8C9AC1C81A0A411800085710E8065 168870B708ECD490D40E000800804800C2884C4208081488008A6800A2288088E80E824206200000000000000000000000FF 2080020005801C2904580180180180182D880341800020600642E0060462062260040441260001002CC34510420600822420 40C001608E10A00022624680C12E120000000000000000000000FF5C71000001801801001A01E01801A01801800001800000 680600600680600780600400480600000080600180000680680000400600600780200000600600080600000000000000000000974040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200282208B00 200200200208200200000000234210212A40000304200208209200A000002002040806010000000000000000000000FF4A89 00010000182012400200010040000A001DA00001000000A000005A02A06010840244580000805240200404010260046A4027 0004064C0000220628020238880000000000000000000000FFCC8A00000E0020080003142002204000600000000001000080 009200000418088028400000000400298010008001206400000196578006230000000100100C000200000000000000000000 00FF733A00002184180589982982188588198188A009800000E0060068060060061060040140860001000040840B400490E100574040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFBC3C0001 21805805833815001881901801901A81800090640600600608640610600600600E00040081608E0AE406804426A0400604E0 1640601000608650E00E010000000000000000000000FFC9CD000402D40D00D00900E00A14840D40C40C0080000030020022 0240300B41382B51344200110950304340310A4830820A30CB303203153001A0B413042242820000000000000000000000FF 9AD10000403043802422802824001002003400000000100C08000C01000800830250908A20000811000800E00A10000A2100 0840000800100891410810C00800240000000000000000000000FF7BB1020001820800801C01808C1886080080080080002200d74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100100100080 1001001211011020800000000000000000000000FF8F3B0008000A80880800000AA0AA0AA0AA0A80AA00002A8AA82A82002A 81102A82A80001800000002A8A082002A8888280220088A282880000002A80802482102A8000000000000000000000FFAF5E 000400A00800A30D10A00A00C00A00A04C00800080200280308300320280280281300200081080210288280200282A802802 002802002801002C2A902802000000000000000000000000FFE2890000012022442032250010012014012000010000005004 80482C804935004000B20C2C00080000084084900022480008CC40880840000800000800844954000000000000000000000000374040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800080000000 0000000000100010100008081000010000B0000001100001000000000080010000000000000000000000000000FF01680000 000880000AA12A2AA0AA0AA0AA0AA0AA00002A82A8AA82A82A82A02A8AA82002080000082A80084802A80A80103284A83202 A80000002A80000802882A8000000000000000000000FF03030002003501522322841543543543543543540000550550550C 28D50A20D50D50CD0A40000000D504C0C50D50350C00D50D50448D50000800D50C28C80B41550000000000000000000000FF 917F000C0042040040040000040000040040040000000000000000000010090000011290C00010000010010510002010010000b74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A86900020121 04004004412012002014002004010000804004804004804915000000808A0C000810000A8D088800224801128A4154482080 48010051008C4800004000000000000000000000FFB569000000820808000814800800800800804800800000280200280200 200200200234200200000000202202200280202A40200200A00200200000222200A132002000000000000000000000FFABE3 0000000861F60AA0800AA0AA4AA0AA0A80AA00012A92A82A92A92A82202A8AA80000A00000002A85402002A90887C0000088 0102890000002A81486402002A8000000000000000000000FFDC60000800004000100050200000000000000000000100100000774040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (63220222E000 00A482468002116000000000000000000000FFA632400C010004004005804404004404000004020001001001001201021001 509010031028001009021021001401230021208401040001401001001021001001000000000000000000000000FF9DCD4004 04800C10400C00C80C82C00D00814C04800100B24300B0430230030134424430524410090432030030034224434020C32020 1304B00100B4C3043013002000000000000000000000FF973400000180180402180180180180180188180180000060062863 062060260260060064060884202860340B604608401600E006006406004040306006016006006000000000000000000000FF00f74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2602600E0040 0408C00602000000400600008420600E08620E016040000000406080088406006000000000000000000000FFD01100080000 0120024004008080004000040008004000040000014008800000000001000000000800020008000000623002000600030602 02D0200048010120000080000000000000000000FFF04D000000001810000000100001040100003800000000000020012040 002012404C00820031004050400814822009620000004600000E00402028020000000C000000000000000000000000FF4725 000002800802020801820886810810888940800000A22208A00200200220220274201212020000224201240240000A012282000f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001801008 000803801801801801000801800000600600600600600600635601600600000008604600E4864060060880460AE0260B0000 0260A2008004006000000000000000000000FF627F0000018010000418018118518018058848018000006006106006116006 00400422601608800000402650E20400000602200000609602048000621244004608E080000000000000000000FF25610008 0180304000880D80382D81581308A80780C000640608600602600E0040060040060280101844062040840604460963884064 280040500060C0080306066000000000000000000000FFEB400000018050800130118058818018018308A981000060060061008f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AF0B64002060 A62042AD006000000000000000000000FFC62440000180100000180180180180180100100180000060060060060060060040 0610400600030000429449200420001010200008E027006200006004084007006000000000000000000000FFB2020002AB8A A0862AB0898AB8AB8AB8AB0A90AB80002AE2AE2AE2AE2AE2AE2AC4040042AE00000000421C2840660883C422028830628860 60000D66122742AC006000000000000000000000FF57FF200001800040001841801801801801005001800000600600600600 60060040064A400600080025410404400C04602C002006006000802A00416008104006806000000000000000000000FFB4C4004f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E2AE2AE23423 62AE00100422600E2242AC0C800020408820628E3210042AE2AE0062AC006000000000000000000004FF4F6C000A01800800 40084180180180180180180180000060060060060060060060CE0AC00600080010600610420E006006106006006006004804 086006105006006000000000000000000000FF883B0001559549545559539559559559559559558000556556556556556556 5565464465560000044D6046020556110546256350226516448004556556234556006000000000000000000000FFF6A40000 AB8AB0A80ABA8B8AB8AB8AB8AB0AB0AB80002AE2AE2AE2AE2AE2AE2AC0042042AE00000042C32424A0862AE2102284AE22E200cf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018048000D08 0180180180189182180180000060060060060060060C80A602C0060000820C80820C64CE0460D648444600600610C2060060 160B62C4006000000000000000000000FF8622000001800800001A0580180180180180180180000060060060060060060001 1611600600080408028210E00440048610C440026046888804006006106004806000000000000000000004FF2A2D00020180 1800201821801801801801004801800000600600600600600600600600600600048001604600400602604C04400609600600 0200006006456804006000000000000000000000FFE00A0004AB8AB8AA0AB0898AB8AB8AB8AB0A88AB80002AE2AE2AE2AE2A002f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620655602651 4126550000000000000000000000FFB4D8800001021801881801801801801801811801800000600600600600600001600600 4006000000008146006006206206056006006046026000006006006006000000000000000000000000FFC8390000AB8A9800 0030AB8AB8AB8AB82308B8AB80002AE2AE2AE2AE2AE2AE00010C0842AE00000001022E20600648E34404C08E2AE28E220000 2AE2862460042AE000000000000000000000FF27290000018018000018018018018018010018018000006006006006006006 20040640600600040420000601600420000002400000604600000400604600600C006000000000000000000000FF4810000000af4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2262AE2AE2AE 0000002202A45462AE0EE25620608E2AE2AE0060002AE2062262AE2A8000000000000000000000FF94260000018038018018 01801800801823842801800000600600600600600000620613600600020440000E0160000000040860000060060060040063 0E004416000000000000000000000004FF53380000AB88B8018258AB8AB8AA8AB8AB8A28AB80002AE2AE2AE2AE2AE2A82A62 AE2AE2AE0004802A020E00E2AE08E0863064AE2AE28E28E2042AE32E32E2AE2A8000000000000000000004FF0BA9001155D5 1801953955955955955911B11955800055655655655655655034E04E20455600010614054654635015040C20E55055653655006f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1881C0180180 1C21801C01A00601800100608600632680700700602610700600000D000024016CC84304060060800260AE206004C0644604 4006000000000000000000000000FF6C8B000800209801829801801801801801802001800080680600600600680608E00600 600600000008801414E00620614E006247006006436004006016104006000000000000000000000000FF5FE4000001825801 885801A01A01401C0185100180000060068060060060070070060040060003048000042060000008048D6000006006106404 0060A6016007000000000000000000000004FF18AD0000AAC818018118AB8AB8AB8AB8ABC810AB80002AE2AE2AE2AE2AE2AE00ef4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (14E006006086 040020000400000000000000FFB94C8000108019418018018018008018018008018000806806006487006504086006084884 01010880820412E4460082174561000262C00060900A6406006006000000000000000000000000FF0CC58000016018218018 01E01801C01801E01801800000F00792F80748E2B410780723600600840009000604600000100D2AE0204062060061000060 0E207806000000000000000000000000FF84DF800001A01801801801C01A21C01C01C01C01800080E806E2E01F08E82D61F0 0602E15E50036108050650700620680708662701E00600601134602E226007000000000000000000000000FF0D4B00041180001f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060460460100 001004000464A028002405600000601040614800622E006004000240000000000000000000FF06B600000180188180180D80 1805021881801021848010600E00600600600400600600608600000000020200600600000440600000650620600801620600 6504000200000000000000000000FFC5B8000001C0180988982380980B801809A21003800008610618604640600600604640 606658800000014242E1B60C602608608642609640602000602E00E204000000000000000000000000FFB246000301803801 A45801801D00D13A01909A01820000600600600600680480600F024006000102100004106400406C9422E04620622800E082009f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000021 8000000518000000000000000000000224000000400414000200000000000028246050000206000006000000000000400510 000000000000000000000000FF0F7680002800000000000000011200000040200000000000000000000000900000001500C0 000080000148000280006480000046000026000400000000108040000000000000000000000000FFE0D80001012058018D58 41811D10011809D20801800000601600600600600400600E0041041000800000001160000064941061464460200160001260 06016006020000000200000000000000FFEBF7000000C0191180181180180092590181084580800060061060060060040060005f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (565565568000 00000000000000000000FF21F50000A8AAA8AA8AAAAA8AA8888AA8AAAA08AA80002AAAAA2AA2AA2AA0922AA2AA20A0220000 008002222AA14208A02A2AA0AB2AA2CB2AA0002AA2AA082002000000000000000000000000FF379F08000200000000100000 0012400000042400000100000100080080100000080000100000008000008000052800000000000000000000400100000000 1000000000000000000000000000FFBBA0000006CAA8AA8AA8AB8AAC448AA8AAA848AA80002AA2AA2AA2AA2AA0022AA2AA04 25020005000003022AA4120885022AA08A2AA28A2AA4002AA2AA422542000000000000000000000000FFDC8E00010000180000df4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000008000 0008800028440000800000000041000000000000000000000000000000000000000000FF6EFC800040EAA8AA8AA8AA8AA880 8AA8AA800CAA80012AA2AA2AA2AB2AB233AAB2AA2AB2AA0002000002222AA00208A2AA2AA08BAAA28A2AA001AAA2AA2AA2AA 000000000000000000000000FFA5FB000C002000010012014014002010012104010001004805005005005421005004101010 000000800010004000444000004400804000804001004004050811000000000000000000000000FFE624000289955D55D55D 55F55F21D55D55C919558000557557557556556546D5655655655600020000044F5560063545575565565565575564005575003f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006002003002 006000020000050200000000220000400000001800000000000200008100000020800010820100C000000004000004004000 00000000000000000000FFE74F00000000022C20001000001000020000011000000000005000800000001008008400008004 02028468691200000C40000100040240020002000800000040000000000000000000000000FFF2C108011200020000020040 004A200000042000000080080000100100009000080000080000000000008000028000000000024000000000020000100000 0000000000000000000000000000FF83FB00002000000020000000020000020031020000000000008000000010000000000000bf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200200200000 0000000000000000FF13E8000450001E09601801801801945941801A13800000610444600600600620740E00640740600252 602E20628604541640735610690622C002457206006406C46000000000000000000000FF949E008000081041001001009021 0090010000010000054C04004101C4400180400D2002800440E0214C0C11008000404C3288008406000040A1804004004004 024000000000000000000000FF9BFA000248000800800800800C00C249208008108000002102222002002002002212002202 24202050200280200204240AA8232210200280A000452002002002042000000000000000000000FF469F0000000000000000007f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000800006000000006000806000000000000000000000000000000000000000000FFF107000000000C00800810800808A008 00800C88800000200280200200200200210200208200240200280A04A4022282220020020220020020020028060020260020 00000000000000000000FFA3C700800000000140000000000020000000000000400101044808000000100C0840A500000401 40040A000001400800084300A8000200000140000000000001020000000000000000000000FF93F600000010080480080081 0840810800800800802000B88300200200300A03A0B200A40202200043A842DA22222AA00200202A00205A0020000030020000ff4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5821881C01B0 0013800004600651680E00600440600680600C00E4B00060064800022004C6B460008C60210024A1006146106C2600600000 0000000000000000FFE9C9000002005809801801801801809801800001800010602600620600600401640600444400600020 602600004204600600642640E000042010006006046006006000000000000000000000FF2796000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000006000000006000006000000000000000000 000000000000000000000000FF8ACB00000000000000000000000000000000100000000008040008000008040008008040040000c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000000 000000000000FF5EAD000000401800C01801843801811801801001800008600008600E00600400720602420C016348407007 A460020060462044062140000022C0006006007006006000000000000000000000FF66CC008212005808C01945C818058A18 3188504F800012601651602640600420F0060460240060004060A64400260268060B60260360068321082060AE2860060060 00000000000000000000FF83AD0002000038008838018018218418418010018000006626A0E2460060040060060460048060 00006F1E8C0002200A860060180861A601A000406016426226006000000000000000000000FFEBA4010000401801905801920080c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8400E0060142 440001060064000068060A000404608600610788E000000000000000000000FFB37C018010485907C03945C4B86980781181 141D80600069914071048060441060269C6004CAE02082E1275862363E605E5600464040660A60000260C610600608E00000 0000000000000000FFC77300010000184181380180B901E0180182104180000D600001600520600402610700628508E04134 684E046086408206010000030806216080806006006006006000000000000000000000FFD988000082001920809C09E41881 881E43850001800003744000688600603612608600448EA0628008709600E08A0104A62844204240002020018060470860860040c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801A01801801 8000906047A07807806004007A16006144027808086C26806C0484688620480610000E002004236006006006046000000000 000000000004FFC2D0000020001819019801A01841821A0181182580000160271461060060048661460040A4006504016006 A0627C0206260010A801800680206400E1B6026066026000000000000000000004FF31E1000042003801001A05801801821A 09C00821800000640700620600604600600740600600600400610650400000602708E2CF0060060402000060468260060060 00000000000000000000FFEF39000004301801201809801813881845802A018000006446906806006016006026006016046400c0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF2C77000000001881829805C01841C09811C01801880010622608E8060060810060872048A100640438696620E8 A6200006DA022192100780400440E007207007026000000000000000000000FF6F7B000000003E4180581184584994594592 0E21800045600E00600650602200600602621290640C00E816144802016B3600600608E00610600F40608E00600609600000 0000000000000004FF79A4000002403801801C01805801C01801C0880580010164065264860060220062B6A0680202610C01 6206104003000086016A0100681604420502600E807007006000000000000000000004FF26B1000000201801601A01805E010020c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600300400680 6806004006804006006804006001004004806000000000000000000004FF8080200001A03800001805801809841800841825 800040600682600600600280608680720608000680685608E846000107046800124026006004006000004000056000000000 000000000000FF5B0F200001A0184004D81184380190D94190180188010D64061060063060C0800806C2404E02044C516006 C26306A0E80E10E446414007086808236110804004906000000000000000000000FF6A5A000000001D01801803801841C018 1D801803800108605403600600600000600600490003E02100600600620600644600C186204026006000026006406006006000a0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4D9458459001 5460CE0B691614E103090512046D0402600401704D5160448000460224009050060060040470010060060060000000000000 00000004FF804B00000000181000180180180180190180180180400064060064460060242000422060240062342862040060 0032E10208A006024006046004206000004004006000000000000000000004FF529800000180180000180180180180180080 1801800000600600600600600600600600600600000400600600400600000600400000400600600400600000400000600000 0000000000000004FF712C000001801C00001801801801C018018018018000006006006806006006002806006006000004000060c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF400C000000801C000018118018018018098C1821882100629E0AE16629F4202AE02F2A520602D23804F2AE0AE02684 60A40A6A0F080846076008024010004004046000000000000000000000FFE4A2000001001800209801811801811801D05881 814000630600620600610E00A10F0060048072A480612C4CC00491000604081044680608600402400088E006006000000000 000000000000FF177F00000120184A281821881801C2B8238038018000026826006286426884042284104004816004886104 044004006006008816006006006014006000004004006000000000000000000000FF629C000000001C04101841905801855800e0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800002006000 004006000006006002004000004004006000000000000000000000FFD3150000010018400018018058018019008418058000 50620E006897006A0280E00600694480400042682C40E00455680680280604280002E00140400800E0020060000000000000 00000000FF88AC00000100180060180180180180180090180180000060860070260070020000060060050040280071008060 00021003002001400000086001004000006002026000000000000000000000FF7318000000801800011809809801A09801A4 590180A0007006006C0600E109807116005006004500006006D46006088004046008022026006000024800104005006000000010c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (980180000460 0C00640608600010810000414421C0408160040180940065042200464061008A600002400800602E12600000000000000000 0000FFA4AC000241281908501C8980B889D03A2BC21B218000346D0D1074172D6D048C0822C0CAA4CB4800006A088208800B 0940A10840CD680028682080C108806A06086000000000000000000000FFAC24020080C2182402180180180381188190B80B 800001780642E106006040216A0E02601600443203608609002680000C0C409080210E04E0100242003560AE836000000000 000000000000FFA38100000080180000180180180180180180180180000060060060068060040060060060060060020060020090c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF8147000000A80800000808A0880A80088885080080008220020022020021C220240200A08202202000A14210200280802A 40A102102002302000040080322012402000000000000000000000FF5C6B0000004004822800402104001080010802280000 2080C0E080C06000208A121C520209004208000000080040C9600409048E0504860080084000010800000080000000000000 00000000FFD4D600000000000402000020260000000010040000008000000900000280000000000400201804100200004600 209460901000062A8006400020000000448301800000000000000000000000FF98FB0000A1001800001981801811801901820050c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10405000890C 208B0800814902004000800001004000000000000000000000FF998B00002100180200182181180190180181180180000064 262162260060C600600620610601641080E8A60AE14600C00654610610610652604082601040609650600000000000000000 0000FF4C2E000400A00820500D00800A10C00D12D40840800044300300300340320BAA3B13143423503021003003203012D4 334B00B423453403003011402C010A3802002000000000000000000000FF4B7F0200410200681004000000802822362020C2 0000C80E00020808800E10440020A00C00400800800A8880090002084084082080080884085100961000088088000000000000d0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100100000 1001001001000001801001001201001001009048C21001101021041000101401001000001001000000000000000000000000 FF03190008000AA08C0AA0AA0AA0AA0AA0AA0A80AA00002A80002A82002A84802A82A80800002A80002A82A8B002300A82A8 2000C82002A80200002A82A82A8AA82A8000000000000000000000FF7980000000A00A42400C00800800C00C00C00A008001 0028B2803103002A02802802002C0280280080280202A802003002842802802802B028008028010020028020000000000000 00000000FF9E030000010012002012012010014014002032010001004C0080482D004850000000C30948800C0200400090090030c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF52 9500080000000000000020040000000000020000000002D00000000000880000005200400002000000000000008200000080 01028000208000000000001001000000000000000000000000FFA1FA0000000AA0D24AA0AA2AA2AA4AA0AA0202AA00002A82 30AA82A82A83202A82A82A82282A80002A82A82A04008882A84104883002A82080002A82A92A82A82A800000000000000000 0000FF59C00000003543303543541541543543543541540000D50800D50D30D50840D51550809490D50800D50D50C28CC051 0D50D40D10500D30920900D50D50D50550550000000000000000000000FFFBCD00080000040000000020020000040000000000b0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400620640E48 400601600000E106026006006000000000000000000000FF84E000000000022520120120100120120124B201000100480080 100500491080080480508C800802800800894A40404804008820C0C840810802800800004804004000000000000000000000 FFA0D70000000008108008008008008008008808008000002092002002002002002002002002002200002002002002022002 B02402102002122000002002802002802000000000000000000000FF5DA20000006AA0800AA4AA0AA2AA0AA0AA5140AA0000 2A83202A82A82A82302A92A82A83202A80002A82A82201888882A80600880302892402002A82A82A82A82A800000000000000070c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02202211200A 28200212240248208200242801259204060214800210250204221200A000082012082002002000110000000000000000FF3E 68400C0040040440040040048040040040040002010016010210010000090011890090210290810092711480292010611800 61004001000001001001001105000000000000000000000000FFA1F3400400400C00C00C00C00D00C00C88C08C0082010030 0310300B28241342305344B1235530C100B00320A40342340B00200300A40314280110301310300300200000000000000000 0000FFB3EB00000004180102182180180580180180180180801460260364060260A611640608600E00621004630600602E0100f0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF499600 0000001801115831821811801821815821880013600640E00600608400402610620E00C30000000000441210612600640620 0090003040020014006006026000000000000000000000FF65090008001000220000001480080040400000C000000A804024 04080880080080400000082300000000000880000160402280260001060000200101002001104400A0000000000000000000 FF093200000000000200000000000200000000000001001000001082000205444942202400105044000200084C0000046210 40040E514006120000008110020080000000000000000000000000FF87AA00000002080182086080080080088880C80480000008c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (012006422000 0008000200060C6286006000000000000000000000FF62C4000014001000001801801801801801801801800000608E002006 00630E4064262C60861040000020C00460124061260A042608804600600030A000206026006000000000000000000000FFC2 1F00000008104402180180B801829801881809800000602600211615600600620621600604400000A2881460020200062020 40020406006000000004216116006140088000000000000000FFBAB20008000018010AB80990380182D80188990D88000060 0614648602609611618608E20640408000000001400A0106861561182042000000181B210418E006586000000000000000000088c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B62AC2AE2AE0 AE00602E0AE2860840002AE22622624648E32620808E20628E2AE00040E0022360462AE000000000000000000000FFCC2040 0000001A0080180180180180180980180180000068060040060062362B40260060060040000062260060160400AE00240088 E006006000006002006CA6006000000000000000000000FF99B80002800AB8018AB8AB8AB8AB8AB8AB8AB8AB80002AE2042A C2AE2AE4044FE5860062764660022AC2062062860A82163004880062C82A800210000600E40E2AE000000000000000000000 FFD485200040001801801801801801801801801801800000604400400600604400401601600E20C80000401608E04200600E0048c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF1C890000D0 0AB8008AB8AB8AB8AB8AB8058AB8AB80002AE2AE2AA2AE2AE0040062062AE2AE2250002AC2062242280880A63240C820028E 2AB0042AE0062AEA262AE000000000000000000004FF0CBB000804001A010018018018018018018018018000006006002006 006006104006206006016800004114094090046006046026154006002800027000107096006000000000000000000000FF17 60000504155C011559559559559558A19559558000556D5655255655610400649655655654E0045541145543245104064361 10C2055655240455600455700E556000000000000000000000FF9BE00000A80AB8008AB8AB8AB8AB8AB8AB8AB8AB80002AE200c8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001080262C60 0430E002006006006000000000000000000000FF4A7800000004182500180180180180180180180180000060060960060063 140140060060060820400A60040201160060060040060040060160840260A8006006006000000000000000000004FF3D0000 0004001C01001801801801801809801801800000600600600600651402E0C600600610300000601409010624000E00402000 0046006A04006000006086006000000000000000000004FF85AF000028001800801801801801801923801801800000600600 200600602628601600600600C0000041260040000064060942060D000600200400680200600E0060000000000000000000040028c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (65565562062D 655655455014810444E4A4506546110556414510544516242104104402556554556000000000000000000000FF318B800000 001801801801801801801800801801800000600410600600600400600600400001000010610C00E21604600600440600C006 0C200200600E006004006000000000000000000000FF9DC10000000858818AB8AB8AB8AB8AB8AB8AB8AB80002AE28E2262AE 2AE0040042AE2AE2AE00000020622E20823608E2AE0A40EE22028E0160000063122AE2AE2AE000000000000000000000FF9B 1400000000B811801801801801801801801801800000604600600600602434600600600624830400E086100006220006414400a8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE0000000AB8 968AB8AB8AB8AB8AB8AB8AB8AB80002AE2AC2462AE2AE2AE2AE2AE2AE2AC22601023422022610808E2AC30428E78428E2100 043861062AC2AC2AE000000000000000000004FF09BA000000001809001801801801801800801801800000609600E0060060 B600600600600020042008600C04C0062400060A400001404608000422C042004004006000000000000000000004FF6D6F00 00000AB8C10AB8AB8AB8AB8AB8AA8AB8AB80002AE2AC20E2AE2AE2AE2AE2AE2AE2AE3202802262242A402628E2AE24C0AE04 42AE2002042364262AC2AC2AE000000000000000000004FF9B790010001299459559559559559559541559558000556446540068c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (061600241900 7087006805006000000000000000000000FFBF41000000401801421E03A01C01881801803C01802100600508728700600600 7806806225026044814000044254409304400200026026206004904046806007806000000000000000000000FFA6E2000800 001801001801801A01801801801801800000600480E00600600400600600600408628A114108104020026804034046046006 14C402004316004006006000000000000000000000FFC6AF000000201848A01801801801A01A01C01C018001006804146006 80700680600600480500E00000500000E28040000408000001404600000402F046004804006000000000000000000004FFCE00e8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006006406 0044011042210B40260CE0022462C40B20561220800060401460420042A2A06210000000000000000000FF5E838000000018 01801803801A0180180180380181208060C680642681640E03740650C22640C0201140260B64560088844520000000102021 00086042004000006000000000000000000000FFA871800000001800801801E01801E01E01E01801808000602600E00602E0 2430E20624C006204001486406306086000006026130002007806080006086006006006000000000000000000000FF801580 0000401800C21C01C01A01A81C01A01C018001007104C0E047626C372471E7105016814019206A4601600626681E0160AE400018c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800180110 B8018018819118C5801901830000E00610600620600204600650650401408020010604000210004400010000600000401000 A024200002006000000000000000000000FFDB570000000018000439058018C5801803801811828000662404610600600600 60060840044440C0002086000182000006144000042106004000002004202006016400000000000000000000FF0BB2000008 00180002980380382388988182982980000060045A610620600612400624609426E008202006400102086406004486440266 02040800A0840A200400E000000000000000000000FF2F0E000000201809B01C81801801841841883B01800000E0060068960098c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04000040211A 0000022AA000000000000000000000FF3E7D00000000004000000000000000000200000000000004000000000000884B4000 10049420C000008200148000446010004046220026200080200500228480000000000000000000000000FFB0F38000000000 1400000000000000012000000000000001300000000002400000004480200A01200201280001100061001084060800060B00 00130020080050000000000000000000000000FFBED900000000181100180180380184180194B841800000602600600E0060 000042060040040842100A802408800222628401004E1064400260200C21061464C6206008000000000000000000FF53DA000058c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (565565565578 0444E0904C654E55605653455640C15652E55640620044624E486956556000000000000000000000FF9F850000000AA8828A A8AA8AA8AA8AA8808AAAAA8000AAA0822AB2AAAAB2022822AA28A4420220803225223023222AB28A2A22AA08228A10A00002 202200A3232AA000000000000000000000FFA4C0100000000029200200000400400400200000000000000000000000000100 10008005488804000080000000800000000A0201000000110000090100848200000000000000000000000000FF9763000000 0AA8C08AA8AA8AA8AA8AA8588AA8AA80002AA0522AA2AA2AA1420022AA00201250224028201224222208826222208A00A28A00d8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000A000000 0000002000000002000000000000000000000130000000000410008000000008000210000001000200010000020200000508 000020000000000000000000000000FF2BFA8800000AA8808AA8AAEAAEAA8AA8888AA8AA80002AA2AA2ABAAA2AA203AABAAA 2AA08322200022A2222224020AA2AB00208A22228A0CA00022200200A003AAA000000000000000000000FFD5580008000010 1120120140140140140240120100008044000048048050090510048410850104000100000100080048000140014300402041 000884012A5009004000000000000000000000FF086E000000555903555D55B55955D55955D55D55800155655755655755650038c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000A2B4A00A0 02002002000000000000000000FFB9350000000000000000000000000000000000000000800000000080000090010C008000 00000002020020800008000888020000220400900002000800080000000000000000000000000000FF742B00000040000400 200010000010000400400000000001000000100000000000000005000000004100002C840051000050001004044040000100 0040000000000000000000000000000000FFAC7C000000400020400400000000000024400000000080000080000100000000 00000010210805101001000900C02000002C8020100020400000090040540488000000000000000000000000FF22BE00000000b8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (30020E3D1A24 234058342A4DA0400020820032F24025D3002280003002002002002002000000000000000000FFE559004045805901805841 815004115941911901804024600604E10640615645625688C146004000046006057010114096D54507214206104000146554 916006006006000000000000000000FF9E330200000002080080010010002030000080010000804004005800004404004000 A048200A44A8000240700820004000005800244008004001800004088004000000000000000000000000FF48400020448048 808008208128021128C0908880802044200205200240222224302A11212200220000200282200010A80251228301200280200078c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010014002010 0020000100100000008000000000040010008000000040000040000040040000008068000040068040068000000000008000 00000000000000000000000000FF1772000000A00802800800880A0008080280280080000020020020020020020020020828 0250220000204A002000288082D06802026002002280802002002002002002000000000000000000FFFACA04000000001001 0000000200000000000000110050008044010040091080100140004000000800900010020080080000028080000020000000 1020110000000000000000000000000000FF9824000000800A00800C00C00800604800810800888128200222209220208A0000f8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280310002600 6004000000000000000000FF1858000001001001801101801800151801800001800002640E88E10600615600600620600600 44480840844064800A081613420010C30001002010210200014680E006000000000000000000FFDFCE088021001001081001 801800001809820001800008608600600E4060064060061000A62140000040240040000060060000C640001000001000202A 002406006006000000000000000000FF27960000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006000000006000006000000000000000000000000000000000000000000FFD2FD00000100100004c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (140080020040 00C84404E08048020C02700040649020A001006482806006816004000000000000000000FF2B550000000000012000018018 00421801840401800000600600E00620624602708420110009004800C00400612000680480A0264922A10020200060028062 86016004000000000000000000FFFB5E0880210010058810818110040958598044D580009D63868D600E006086A072260160 3621410010413420221081610E8808C691084E1000080828EA480146006004000000000000000000FFB33300000100100100 1001801000209801200101800082600E00608600640E8465460808061042000948840060408A0006820A00800846808002000084c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0811B0092000 18008018018A2042680640E0000060060060040420C08C4206007A0020C94000040E00800010040604200600440811200780 D006000000000000000000FF29AC0000010210059A7007893094235853824191800110706F24601600701E40608411602129 03003043042060308161003CEA0680601653200018710F08E206026004000000000000000000FF8EC8000001001001A21001 A03000041883820045800000E10E00600610600600612400600840602040E02C026801300800C064214178C6002000807026 4064C6047004000000000000000000FFE3FB0000000000010000118018304019018000018A2140600700600F0870072060450044c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002016004006 000000000000000004FF5FD6000001801800801A01800A00609882883E03800000780600600080604EC06004012010004000 004046800040406804000A2E000216006400016003806006106006000000000000000004FFFA410000098418608218418008 4202583288184180006061868C60000061062261A4102008D845C04071200814800082181B008051810EBB620638E0C20862 16086006000000000000000004FF624E020008800808840801800802021820C0180180000060060860008064068A60248021 4000400002420610408000F406024086004006422010404500082506004006000000000000000000FF93A70000008408008000c4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0E0064000008 0800400804601400033E400806016000087007006006047606000000000000000000FF9DF40000018098138A1889C0804000 180082B803800120608708600008600E1060070320870AE4A404200080000042080000808088800789600400C08408610602 4006000000000000000000FFE46B000000800851010841882A2810584CE018818480096206016000C460260C629600380640 6200120D46024141C1620F8A4807A2489622E000007806012006006006000000000000000004FF1850020000840801000C41 A0080001591080582580008060060460000065370060070820A620002040228680442000100601025048028600600E0044240024c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00001200000 0018018000006006006000806806806806804806006800802801006002806006800006004806806000007000006004006004 000000000000000004FFC6B300000180184980184180500100104C0208438100012D060060000C40260460160440040D0004 080106006906209006016200804006204004116082892000006000000000000000000000FFD1B20000018119018519098090 48114000010809840012284608E000C00804906B0690480C20092082025604602E8064068C60460D488E1260000060020060 04007004000000000000000000FFDC1E000001801885901C01D008004098008059298000426026006000006016006006082100a4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060000000 00000000000000FF681E000001801840001911C15C51805854002D518280850326086500516055406526004C040244084048 508164840008460060A0004A07026006146010846004006006000000000000000004FFA5A700000180180000180180180082 180000080180404000164260400064041360064040B408C0400343000860442D600604600600604600600000600000600400 6004000000000000000004FFCEC0000001801801801801800001001000001801800000600600600000200600600600400600 0000002006006002000006000000004006004004006000002000006000000000000000000004FFAF63000001801801801C010064c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600840401205 6006080016006200156806046000007806046006046004000000000000000000FF0489000001801800001801801801800821 84040D8AA060322E2B652708E2002A606662F2AE62E43828420A10E20600602E4868AF406227826000006003506004006004 000000000000000000FF6B14000001801880001C01A00A01801800000901A24080B04634604100443650600E934154004084 48681685600410080E00040114C00604C004806006022096026002000000000000000000FF82E00000058018200018898088 01820A022028A1B000002006006000004006006286854004C8400010600008600028601612001600600600400082680C002000e4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008008018000 0180000020078060060060040060060060060040008040028068060060060000060020060060008060008040048060040000 00000000000000FF2B29000005801800001801804851A05811800201800005610620450740605601680E0210068004000541 4708614285600600680700000100E0009068062C6083006006000000000000000000FFFF86000001801800001E01A00E0180 0801E0040180002060460064060060158870062000CF20628010600000600300000720600120000000600000600280601000 6006000000000000000000FF0599000001801900001A01801801C01801820083842000E00612C0A7007422C0604708F004000014c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000000000 0000000000FF854A000161867800001801841835A0188180020180000060062042860062081262060203044040002240B600 6582016006200006210608406000006806006006006006000000000000000000FF1B76000285A83AA0229901A8CAA1922A81 A540958000843096B04A8680EA4028688E81690702C80884CC88C0E83200102ECB0820A0AA00C068002A630CC04C462B68C6 000000000000000000FFA79D000021821800001849821801809C01C00001800051640602600E04680C046406B2024D004000 B040220A6A824A03068000880C000E02600000604405411600600E000000000000000000FFB788000001801800001801A0180094c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (910E00820249 480A201C090010C800860800884800E0042890C840000000000000000000FFA60500008080080080080082088080A800818C 00800042200202200A04241280200228208204200044200304A0030000020220020200020020010620800422428021220000 00000000000000FFA22F0000038018259098280100010000018018800000280280000116D350000D048940406002440008C0 4C4800202260C080849F0400063000021006381388902B0408000000000000000000FFC05E0000000000000146900820005E 40100620400000010408090000000140A01101000408008008000100200010906408400067080006000000E10100000000840054c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (130420200100 00000004800800800000004804804811404820AA0900D54000004814000A00904800908800C248C4880000CD488000000000 0000000000FF348D000101805841811A01841801805001911A018000A16C0600610E0AE28604E10624440642420000653604 6006104406C0604E12600620600014608604E00600E226000000000000000000FF69B1000420D20D02D42848F08C148A0D08 C20820800100300310B00340382A9024020831331030012B30022034B2A130430A350200B20314300040B40B503A320A3082 000000000000000000FFC4CE0002003803C026044030800020030030040A000100880110080000802100080014881090080000d4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF87D30004104104204504004044004004044000000000801000001001801801001001101801101001010841001001 841101281001001001101001001101101800001000000000000000000000FF2AE40000A80A80100A80AA1400000AA1340A80 AA00002A8AA82A82A02A82A82A82308A02200800001000080000006A82202280A83202E82200000000002002A80102080000 00000000000000FFAC4E000200A04C08A00A00A10A00A00C08C00A00800000200280280A00200280290A40A10283280080A2 2280280200288290280280A802802800912C0A852002802842000000000000000000FF12E50002022002C4202001142000400034c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (081000000880 380000880402882100003B02682002A8AA82A8000000000000000000FFC22500000400012000000001000000004000040000 010000010000110010000010002488800480010004100C80010000A001000100800000800022080028800042104000000000 0000000000FFB29F0000A20A20880820AA0A80000AA0A80AA4AA00002A82A82A82B02A82A82A82A80402A824000822149025 00002882400282A83082A82200002202102482A8AA82A8000000000000000000FF90A3000350352204354354204200354200 3541540000550D50550D40550550D504C1080450C80840449120C00800130C10D40B30440D10D4080089052884155090050800b4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (803801850000 E00E01600642602E0060060840442060000A608404600640E50600E22E00401608E000206006006006006006000000000000 000000FFFDFA00023422C2032102002002004002012030010000005004004800804804800804804814C00800884104810800 C04400CA0C20AC48008048008110048A5004000804000000000000000000FF70FE000000800820824800800800800804800A 00800000200200200A00200200200240A10203201000A2222A200204290200A00200A04214A0000021020120020020020000 00000000000000FF73ED00008008008C0800AA0AA0000AA0A80A80AA0001AA82A9AA82A02A82A82A82A84B022009000032080074c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFE243000000800800002880800800800800020000808002208A00218220201206202210200202250044A5220020426000 6200208250620200000050201A088492002002010000000000000000FFBF7000000000040000C40040000040040040040000 2100110110840900910108128906110D1080A120104100066100100170810108000100000100150106101108100000000000 0000000000FF78B5000000800C00800D00C00800C00C00C40C00802104300340210B0134030A34D320B21304A94941300340 2003003053042003142403002811043013093103483002000000000000000000FF548100000580190182984184180180180100f4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000244805400 82A813403810100000E08600044660E006000000000000000000FF61F5000001001008021020009810001921810003800000 E0060860CE00600600405600400200502008600200010209600409021602000400500012E08E000016016006000000000000 000000FFA38000000000002804002002A0220900080800040000008300000010050100488028020200080000000000008080 0C62085200060080061202A00400002880C0000020000000000000000000FF7E6E0000038018818218210210010000018038 0002000100004802060204D00000005144C05000080C008022400001629012022E02400E0880084203000000104040000000000cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000046006 40600E00640600600600800420480020E00400200240600600E0060C20041048008020964140070064060000000000000000 00FF83BF000001001002001000043804005801802001800008E0060B600600E0260060062242A60AE0000A64CE0000960260 0602020621004601000000422610030600414E000000000000000000FFB27800000100100000100000584410B81180200180 0000621600600605610E336006284006286C00226206008022000206220140200022020CC020600630810600604600800000 0000000000FF9F020000010010400010001C18080030A190A019800000610E08602600600600418624440220512008610200008cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 1C7C0000AB0AB0880AB0AB88988B8898A98AA0AB80002262AE2262B620E1162AE2AE04008640C00040650C2AC22E28E2AEA0 608F14628E1440002AC4360042862AC086000000000000000000FF8EB8000001001002001001881901801801800001800000 600600601608600600600604E0064240100065040044C240000602600189600200400000000610C0AE004086000000000000 000000FFB0D00000AA0AA08C0AA0AB8898C98C90A98A80AB80002062AE1062A62A608E2AC2AE09080C0440600460042AA326 0882AE3C64A84162C86240002AE10616406E2AE056000000000000000000FF84CD0000000000200000018018418210058000004cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (44600680E406 1480060060000044A640602E004416000000000000000000FFB4090000AB8AB8C80AB8AB8898818008A80818AB80000062AE 2AE2A00062062AC2AE4842AC0070043260002AE0A20882AE206088A0028A2AF0042AE0460060872AE0860000000000000000 04FFB4B200000080082000080184580180400400180180000960060160001464260040063044301068000960400040040460 0601002600400600C800004006414016804406000000000000000000FFDCA200015495491015495584D83593415215595580 004D65565565404564D6554556084D5009600444E03055400C1505564885504405325540055562962444065562360000000000ccc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060060060 080060064860061560320140040061020060124000060562000880021060044C4006036006414006000000000000000000FF 500C00000080480180084180402180D000005801800000600600600000600605400600608010600000600E04A08604614E08 00460040060260000100060060060A4006000000000000000004FF50AF00000080080380080182402B815000055801800022 600600600052E0A60060062200000AE8140064CE0022100000061200200000220068040000160B6207004026000000000000 000004FF185E0000018018200018018018018C0804001801800009600600600800601600400600C00420600008E000006004002cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF3A9E 000551D51B15D51951914111815B503559558000556556556D4055255600655212251241600455244E416112350414454110 4C453052E00443655640C5560D6556000000000000000000FFCD260000098018218518018010018438020018018000006006 00600200200400400204A0280060000000160060060040040040060040040460000CE0061040060060060000000000000000 00FFB5830000AD8AD8C98AB88B88808B8818AC0A98AB80002AE2AE2AE2A02AE2AE0042AE2162022640002AE22228622608E2 0630608E2202AE20E0001042AE2862AE0042AE000000000000000000FFA4580000038018258018018400018218020018018000acc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008560404060 4408600404E006116006006004000000000000000004FF235D0004A1CE188828188B8C988E8898A84A98AB80002AE2AE2AEA A02AE2AE2AC2AA0063042AC0002AC22420600408C2AC20408E0C408C6160000862AE2242AE2AE2AC000000000000000004FF 2A0C000001801A018058058210438C180000080180000060060060120060064CE0062060220840040020801422400000A400 444000C0000060040060060A4006406006000000000000000004FF427A0000C388B88B8838AC88B0C9889AA80AB8AB80002A E2AE2AE2B22AE2AE2AE2AE2862002AC0002A82C62AA2CE4AC2AC2AC2AE3142AC1060004062AE22C2AE2AE2AE000000000000006cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F04710F004D6 48476AC636C22544C061C091500020470420C047060496800714406000046006090916206006000000000000000000FF0E1E 000401C01C00409C00821800801C00001C01800000700680700200628704700308600600400500701402C02400C210206020 B0600400600528648E102407406004000000000000000000FFDDED000011809800005840C058208018002058018001006006 006002006804006002C0601480400000400410C23400400410440605420402E0004060060010060060040000000000000000 00FF0616000405C05C24231C01841801C43C02001C01800000680600680B0020070040021560A600400480690C046100444000ecc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF87930004 01C01C20281A00801881805CA182404180200271061068060001268068270021140062008149501085000144023024062422 14000029000486102446C06000000000040000000000FF037A000081803880011800801C0180180181020180000060060062 063100AE0041161024D4006020034108000104104B2A0024002020140000002C0486012416006004000000000000000000FF A3DA000001801800003801805C21801801E03003822000E00600E40580C0141160A204200F88E000046087C040022A508600 0080000024046000006006020026006002000000000000000000FF2E8B000501C05D00401C61C23821C11C01A12401982080001cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620600611400 0050080096002226406200000000020000000000FFA75E000401C01C48641800083900003801D00009904000600642601601 600650C00600200440E4A000401448005030C04800E0884C600420A100002206302016016000080000000000000000FF1CF9 000401C01808001901063800011A41800009880001610602610404E10628400208600400C000004004012008084004102008 00244400808009800E00200E00621C080000000000000000FFE0FB000001801C8002D8AB08180001980BC88007840020E046 3068AC02640600C00E4060047140A010420425206424402C4080D61801E464200000201624014600E0040000000000000000009cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA882222022 4022AA10200A22200000A0122426622AA23220A08A0222AA40200014A2AA4022AA2AE210000000000000000000FF426A0004 01C01825A01801C4180180000380180000000000000000061104000540040484441100000444040040800040040804460080 042C80004A0000400000000080000000000000000000FF395200000000000000004000422000060000400000000000000012 280001104800005001000000004800A8128008006088020006500006000000000000130000000050000000000000000000FF E84A000201A01B00291C52401C00001C93A2C045800024600610702600204400404A10009400600000C4A400048000420020005cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7C06000555D5 5D15D55E0BC4584D955D519219558001556557D57546A0655755712645644E556001C4704551651615644440E1164D615655 6000547556415556D56406000000000000000000FF45990000AA8AA88A8AA8AC88A8C88AA8A8AAAAAA80002AAAAA2AA22A2A A2CA10AAAA04242234A00022232228A0022AA22241228A4822AA0420002022AA0A22AA2AA2C2000000000000000000FFAC7C 00040040040020004040848000040001200000008000000008101290000002108800800000000803088000404001080A0200 8002000000000090000C08000008A8000000000000000000FF9B820000AA8AAC888AAA8A8C888E8AA8A8CA88AA80002AA2AA00dcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030200100000 100000051000000440000000000000000000FF89230000000000240002080540100000021000000000800000000008400000 800540020000000002000000000100001000010400000000030002028800000001000088000000000000000000FFB6BE0000 AA8AA8C88AA920900C80EAA8ACE00EAA80002AB2AA2AA2A20022AA2AA00220322A2AA0002BA0022420020AB0022A20CA2820 AA2020002022AA2822AB2AA002000000000000000000FFC02600040040042040040040020000140220020100010048050051 0080100004080120809000000108800500009000008412004083000008800000900400D005005004000000000000000000FF003cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0200209300A0 0A20301344200000200202A00200294300200282240A44220000210302280B002200000000000000000000FFAA3400000000 00000000000000000000000002000000000A004001088000008208000088808802120000208000002008009004000800C000 80024A0800D00400880020000000000000000000FF027A010000000000000000000000000010000040000000080081080000 0000000840001400110100000401B80800000040008070040801800000000810000000000000000000000000000000FF6996 00040040040020010250042200040005200000000008010008000B00000010080911000000010012A89284284004A800004000bcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000800 800C00800800C0080282CC40800102200226200B202082002202C9200B40220808204A55A1820030020021D380A502002000 003012003603002000000000000000000000FF443A000000001801901801801951941F558418018020416407545916006116 056006C0C0944C4410006004056007406146894446147336256400506106C47416086400000000000000000000FF26060000 08000008000000000000000001002000000000001000408480C008084010A0C004224021A000647210088800000040000002 8D000228044000100004004040000000000000000000FFBCD80000000008008808008008B08C0AD2820A00802040A00A0A20007cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF061D00000000100100120100100120000000120000008000040000008000040010 00004805004000000804000000000800004806000000000000000001004800000000000000000000000000FFA5F600000000 0800800800800800800A08A00800800002200200481200200200204308220A04200840220280200A08200200200202A00A80 2000002002002002802000000000000000000000FF0FC3000008000010000000000000000004250000000000000041008040 8110080C000000000904A0080808000000000021000801000000000430001000000000000000000000000000000000FF42A800fcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60A640640400 410C08420080608408E01407E40600400800208E80200000E00622660E006050000000000000000000FFAE52000000000040 040021801801811801901A04800102600680600710E156016807509201280302006084916804800106040110917116106003 416106D5685644E000000000000000000000FFFA88000000000001080001801809881821811888900000600600600E046006 006000040050000000106404424526480026210006226246006200006006006006006000000000000000000000FF0CF50000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600000002c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018080006 01845815801891811A5180000060050000060A600690E0C710F0A34160A01060118260070060140825008028461401008065 0700648700F000000000000000000000FF3F0500000000184000000180180180180180980388000060074002178160160072 0720752700600010740020634C40600404208608200600200040608608F02620E028000000000000000000FF092800000001 01012B08218018498CD8258018080000C044544440060A600720E0044A80042000804070040368061962A621C01672822688 0210106004004007026000000000000000000000FF657D000000000201200201801801801A01A818800000026806404406000082c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000600100 4487806080000000000000000000FF03CE000000009880800001801801801081800241000000200600000604600601600402 214241200400410404000400600600008080600604600400700A007C06206000000000000000000000FFBE52000000001811 010A21809851805865863A0381808EC44444260610618E10604E52280A082B4016C0A0806804936080A3646700005E100100 70610D00400E207000000000000000000000FFD913000000001801000021E2B803841E0980B80B800131400E003806806016 00609600E01610740040C04E0130040461094C601028000600200800720400409600E000000000000000000000FFEC1A00000042c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3062440A6142 246A04006000800A26546256C04D010042368CC004096888084447206008000000000000000004FF5F9F0000000018018008 8088180180130182020000002200C400209600620600600400A0062021201042048248040063042040068042060840040068 0C10C02E506000000000000000000004FFC39B0000000018018004808818038010818000020000002004002086006006D061 4494214708208449C2040A40440060D00E050010E056204004956106466086086090000000000000000004FFAC7500000000 1C00800001801803841401C0009300000010069000060060060064068020028A240100400410440732600608400600C0064500c2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200380100080 188D801829811809800102C00400600600600600600400A04210A48020401628400E04F02400420600401680440000600400 4017806000000000000000000000FF69FE000000000001821081803803801801809801820000402410620608648700610503 20A2002044C8C08E00000602620000500010C006004085046008414016086000000000000000000000FF31C6000040000100 E01001881841803805945841800030400400402601600E006086207C0A2C72100064060042063060870C40060058960D4244 096404105D16006000000000000000000004FF5302000000000000801001801801821C01841B11800044412400400E0060060022c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006004006006 006000000000000000000004FF0B4F000000000001801A000018018018018018018000806006006006006806006004004806 806000806806006002006006806806007000006804006006006006006000000000000000000004FF42460000200000018218 01001A098058000458410000002002806006016106006086C06082042004006000A0600600200010600000E0000140840064 0C106506806000000000000000000000FF14FA000000002105801881105AC180184B101809040053204680624608280E0060 04854A0A20A08A50ED00906216517544826A06006880126822096006006006106000000000000000000000FFD0FE0000000000a2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2E2860008000 0800684601600480420E80604680608000C000006000806006006000000000000000000000FF46CA00000000180181040180 19518455041240011140CD21544144325064CE08E494C56A0833002E12E50142410E05280000680000E00101602604600600 6007006000000000000000000004FF985B00000000180180000181180180104100000300000024040C410201600644604608 610000008000601600420640454C406016006100006004006006006006006000000000000000000004FF8A18000000000001 80180000180180180080180180000060060060060060060060060000060060040060060060020000060060000060000040040062c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001801801 809800809A01950094480391688A8124AE8460061260040044C8047804D5400408A40102E800006000886200806002007006 046000000000000000000000FF116F000000001800000001801801811C000218410000280A060A60B200E2EE2AE68646C68C 62C0F00EE6BC05C20C22602005602E54E000056420006002006006406000000000000000000000FF11720000000018018002 00801901A01000110001150014300451454201651654600410614080028600604050400CD1440600610080E0001040070060 00806206826000000000000000000000FFDD5E000000001801808000809821A03021082243088002A0AC80D20AA82007006000e2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1204680C2860 00000000000000000000FFE629000000000001800001801801801801001A0000000020060040058040060060060000060060 00806004006002006006006006806000002000006802006005806000000000000000000000FF49E800000000180000000180 1911841904881861804000480640200200600680620600000490400100600CC4410801210440688700600082E00004700200 6206006000000000000000000000FF48C6000600001800000000801901801E00E01A018001804006403A4200600728600520 42C520400000624500600040600400700052F801006000006002006006206000000000000000000000FFA1F10000000018000012c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010121002080 0600008210100100410106820088230000A08008B00200820000000000000000000000FFFE35000000100145802002801801 905A60845816800000602654608420000610600482000208201000E00400602002240602E006486400402200526002406004 016000000000000000000000FF10A6000000200215A4A320A81A81A518A0201A2C0000812C4E90E90694E90642E80E029512 D22820416C24A34A208AAA2F106910086140D12A00206C4228EC44046400000000000000000000FF117700000000C0018000 0380180188380980980080004A6102C0421620600608628790100600E000006884004002203107C360400362080220500D610092c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (202802C02000 842102000000910E108008009B08802809890006C8528C00801000900800C88A200008008009209408108909C08988090002 40000000000000000000FF9025000000000800800800800804800A0080092080006A280200A00204210280200200A0020020 00702182452442212082002003002210082001042633066423202000000000000000000000FF66EB00000004380981198001 1811868318001808000000018C0906000084168402500C5010840000000064220004040058A800BE01804000802800000000 0000480000000000000000000000FFDFB90000000000020000000000000820000080000000048000200008400000828000400052c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (300280200000 0000000000000000FFDA9C00000022220232420020020022200120020A000080880C809001000800004AB090C004894B0082 4320940A48950840014820925000950801004904885000004000000000000000000000FFE8FF000000121901901881801841 84194900190B8000406494006006006206046116044004424000006826106016126126C0600E01601022600001630C006206 216000000000000000000000FF733E020000410C44C08C00C08C14D04A04C4CC00800114A0034B340352B08A903023403D52 09340928330325324320B40B01310220254110B0103430422CB002802020000000000000000000FFFF96040000218200328200d2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D50C80C81280 800C08D10C88D40D10900550830900D50B09110D50D50000000000000000000000FFBB310008004004204025104004004004 0040044400010110010000010010000011210000290894010015010290010211111490410518000010010015418010010008 00000000000000000000FFE5850008000880A80100AA0AA0AA0882AA08A08000000400302002A82A82A82A80002202282200 002408002101002402802300886102A80000022A80000002A82A8000000000000000000000FFDB8A000000200A00A08A00A0 0A00A00800A20A208000CA2A8294300280280280280280288280300091201280A90280300A902C0300A000C02900802C32430032c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0AA0AA0AA0C A09000003A02A82202A82A82A8AA80000209800400002A80500082A82104000000882002A92400022A80102A82A82A800000 0000000000000000FF3DD8000800002004020000000000002200024032000000002000000000000000010801001000000201 0028320020000020000020040800280002000040420000000800000000000000000000FF69540000000A81120880000AA0AA 0AA0AA08C08000002202A82A92A82A82A8AA82104C8C004001002A80002802A82800202002882802A82882002A80002A82A8 2A8000000000000000000000FF6D810000003503503043543543543501543103000000C90A80CD0D50D50D50D50C40D40CC000b2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (003002000000 000000000000FFB4FC00002000980192B811801881811801001801900028602600621600620600630E216286206000006244 22608608600400600608611613600000C00408600600E006000000000000000000FF286F0000002222002042102002002002 0120040A0001010800808805000800000800088010D50C00800B24940800941414D10C210B4804800C008049448050048040 04000000000000000000FFBCF7000000000824840884800800800800820840800000200208200200200200234AA022220020 8000201220200200A14202200200200215200000240A002002002002000000000000000000FF6A5100000008C0880C80640A0072c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000A05204001 40140044400086100108050000008000090000008000000000000000000000FFC90B00002000080082280080080480880090 0900880018200200210220202A00A18A08212A00210801211202200200220206200203201209208004202200264200000200 0000000000000000FFCA29400800008000008180000000000400000480000100900100108940020100002100120128100100 9000008208009081018001001001201001081001005001001000000000000000000000FFB831400000000800800800800800 800C00800C80800101300315308304204B45202314305308300915308200A43202B34344210302300340308108304301340300f2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8000C4021801 93201082AE28610620608400C1042A442013E06208607213E20678260010602809601600000214A022036006000086000000 000000000000FF17B6000000000100005800005815800000105901800000045604600648C104000004244016406000106102 2262A600201000604E086006002080002402006446000086000000000000000000FFA13E0008000000000000400000000000 4200204C10800000000204001100200400000004083002080004005000C00000883000860202803005000802800100002000 00000000000000000000FF4E2C00000000180190180900188180100000180000004040200CC4000200064402004281040000000ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF9AF020000000080004180100080184284402080580000000160061064560040002060941061168000020441020 1224200A00402600600602C800002402806006004006000000000000000000FFF76000000002280200582080180180011180 183180001080060D620610600400604C2260120062000060962360C610A1240060060060062020800020B000610E00000600 0000000000000000FF8EDF0000000008000018D4801801800081821853844001008648640600604403200408612202629000 E20600600600208422610002628650A2000120C2046006400006000000000000000000FF71E900080000008006388A803809008ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60A85564B650 4548556510556006542004550492556556554006000000000000000000FFEEFC0000000A88CC0898C98AB8AB8A802388D821 00002B022CAA62060262AC2A802C00422A22C0002AA00422220A02E2462A808E2AE0061160802AA2012AE2A62AC006000000 000000000000FF46A700000000204402181380180180000202584100002000040860060060040000040AC10200C000006204 006006006006000000006006016200002041006006004006000000000000000000FFA4B600000008C0A80C988B8AA8AB8888 018CA98580002202A621617E4142AC2A84861542202264802AA6040022025062022AC6C82AE0064840002AA1122AE2362AC0004ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C08210008000 0305520001064860060060040960100142000060400060160000040040060060060060000061140060060060060000000000 00000004FF1A250000000898A988D8218AB8AB8AB10088B0A88000200012A002261042AE2AA2AE4062903854062AE2002AE2 260500002A80C82AE0062270062AE2262AE2AE2AE006000000000000000004FFBD0200080000100180380580180180291080 1010800000010600000610600600410420610010488000615010E12600009400600600600604280000404000600600400600 0000000000000000FFBEA520000015111191192115595595403091111480001284C64284CE4565565565560064464441045500cac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF700200000000180180188180080180000080101500000860160080064160064B208600C48602400414C08210C04C00 60040880000060060C600410401400600614E006000000000000000000FFFB9B0000000310058018430008018348B5801021 000000E14600000600600600401614605010E00000401600450410E094026026006006012000246344006006006006000000 000000000004FFCD4400000002300380588D00080180001480100500000860060D001602E006006006226026026904002096 0020823564D4006220006006112C04004004806006006006000000000000000004FF019F0000000018018418018018018010002ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (082016026224 0102AC2AE2AE20000422E2862AC2AE22E2A8000000000000000004FF8FB5000000410555D55903D54D558558C35501428000 44E44C5425560175444362A642200E5100041164D013601444A44448E1305565540820044065165505564445500000000000 00000000FFCA19800000000001801801813801801801800023800001611400000600600600600400209400000400604E0460 C640E10C4260040060060B2000106016004006006000000000000000000000FF9F620000000838A98AB8498AA8AB8800118A B08100002263062A02AE1A42BE00022420410624400024422222400422623420428E2AE2AE21600005E0042AE2AE2162AE0000aac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400080000861 1400B0060068044460048004860040000068B022608804800008640400600600000500600400500708600000000000000000 0004FF206C0000000A9AA98AB8C9889AAB8A19478B008980002262442B02AE2AEAAE1D62AC2A80462AC00401420241640218 400430608C2AE2AE2000040062442AC2AE3262A8000000000000000004FFBA810008000A4001801811800801881800804010 800010000400A006226004106016116420002002206006202524102104020400006004220006106026000006084000000000 000000000004FFA7DF0000002AA0ABAAB88BAC18AB8CB808AC208980003202042A02AE2AE2AE2062AE2AE4042AA000326306006ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFDE80800800409A00201C01C01C01881C00C218008040447194015016C06C16C260155148052444004250500D408200E306 E86244027006002001056087025106802000000000000000000000FFA68C000000609801801801C0DC01901A01E020248000 1008262A220602600508E40700028E90602500500600500000400904048410680444600520610C8064070000000000000000 00000000FF05FD000800001A05A018038018018058C1808045800000802600000680600680E0060010560060002CC00210C4 424045348480240060040D40005560AC006006008000000000000000000000FFA2E7000000005801801A41C43C018118090000eac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (966461340A00 4400E00A288000502000224086002000000000000000000000FF73F9800000001844001801C00C0180181088180002200040 2630E00E1069140860160044102140011050A6203008032092A1632424600600610080829508203613224000000000000000 0000FF551E800000201800001809813801809820A03844824010702C0B4106526056A0E3154D40040C641021421002204208 602204608508600644200005000C000486802000000000000000000000FFAEB3800000001E00605811801801811840941810 040000500600608608702404608602400640C00804E20010412832A246086005046006006000106007026006002000000000001ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0080A0000708 620628682400E0080024002D414040610600042C4221002400C403600240600000010000604602A020000000000000000000 FF7123000000000400001800405885801891E218200C4002804644C02E02F10C006004142010004400144052480104012030 10840400601201412000240014E116102000000000000000000000FFC0C1000000000008001980003A918998C71218B58800 02850600602600E02410E00400610000422000400808002600200400000440600210402001001040E0060024000000000000 00000000FFA9A400000040040040582220980B00182110B81B80806402844266162274061060000A65900B40C02260420102009ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF39 5E00000048C8A8CAACC8AAA8408AA90C8AA80480006004030022AA2AB0222AA14232208A06214046A00A3C24022222A229A2 AA2AA0120480000822001422AA412000000000000000000000FFE4E9000000041A01801841801831C0182120188800009060 3444600000010E00000010040420C00208044401402000000400000400040022000244810841000002800000000000000000 0000FF092B80000040200440000200068200008400002200000482800880000002000002A800802008014040010004031008 80100200060000C8080100000040120000280000000000000000000000FFCAB300000040024C401C24209C01A81801A13880005ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100C14000080 4800414080550085400804145000000000000000000000FFD256900000731955955915C09D55D55D09F51855000144E55754 755755755755624E4450C444E080557547416446016084526157D564D6446400446456326556444000000000000000000000 FF56C7000000088AAAAAAC8A8AA8808AA8108AC80080000220924922AA2AA2822AA20A2322325020001122A220A08A2A2322 2022AA2AAAA208200000224A00AAAA002000000000000000000000FFCA460000000020000000204C04002000220040800001 000000808800000800000080008810080008000000100088520820008000000000088000088001000000089000000000000000dac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (048000800800 0000010000400010210800000011010000100A09100C0000800108420200080108100800050000000000000000000000FFBE 601000002400000004400C200000000020000800001000000080008010000005081502000080800004400B00804102000002 00000000008000028000400000100000000000000000000000FFABEF810000088EA8EAAC888048AA8AA8A08AA8008000303A AA2A22AA2AA2AA2AA00230248B2220082AA01A24222200343220A4AA2AA22208200020232203B2AA20200000000000000000 0000FF5F65800800440200200200400414400040400131000109404104080400505000400000490401000000000800004001003ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF3D6E0A 00080008002008028028008A080285284480A008204200A80200240A0020D220228220A000002502112002A421028A22822A 2C422024080020820A20A2002200000000000000000000FF2C8F000000000000200000000000008080000000000001010020 04100081000000008000200804018A0020000000080C20200808008009800002000010000000208000000000000000000000 FF89FD0100002000000000046106000000004001000000200400000400000010800000841100100140000000640000008D00 000430800080580050860400008000000000000000000000000000FF198D01000000200400000240840020020C000144000100bac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008208010800 000882000404000000000000000000000000000000FFE4F4010000018802000800820800800810A00B00800100200A00A4B2 A022030220A304210360B4000AA00245308282B00A40A00300A00210200004200360200260A000000000000000000000FFD6 4D140010401000001805805801951905855845814051412641741600E51700614E0074044960000C7D075160064D6305544D 5655751620400080608615694600E200000000000000000000FF02C902000800100000800040040000000820020308000040 04004008884000205800404B6D800608200AE888820828004420480100424010449104581400580040400000000000000000007ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF295500 0000000000000001200001001400001000000080400000000400000480080500000080500080080000480000080400400080 0004000800000000801000000000000000000000000000FFF332000000000802000802828A00800800A00800080000220A00 A80208200200200200281610A0A008A00200210284A00200300200340220202880200200200200E000000000000000000000 FFFC260400080010000080000000000002000000020000000000000940400408440940000440000012C204D0100210A8029000fac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFEEBF000000 0002002E1001003A21200000A01800000002008708608692608624600600661C60248020601400082D20800401400A416026 20200042600E106006416000000000000000000000FF9C1B000000001000001805801843801C01011D00000004030E0B6106 046A16216116087020820130A254249004B42902202408C612704691000102610F006A06006420000000000000000000FF7B 2000000000100008100100380180984480180000000080260060040060860060042261000060001060060280060201000800 160061162004000160460260C6006000000000000000000000FF409B000000000000000000000000000000000000000000000006c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8230600E2060 0000E2060870060D7000000000000000000000FF3A880000000018002018810010048019428B0CA3800000202E8262068060 D62062CE027AC61281000160A608204EA800222022C181604B8060000062060068350A6000000000000000000000FFA47400 0000001800001005001200801A228109010000002416016006106C1600610E0A60A704622002620C09208408054340B10212 E106116001016046006446006040000000000000000000FF277E040004000010001801805A03108201001200000010A02642 614401600602E006216004002408D84C26420A060640050B402160680A4122002161969A608421E2000000000000000000000086c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601600710610 600440604244000420600784400610211414400ED06006906000006016406042006000000000000000000000FFCCFE000002 0010000011008018018018A10498C3000010001604780600600C0060048860528062048068040240148248A0810006026006 006004007817A07052006000000000000000000000FFA0B7040000001810003801801800902001100A00000060A28640E546 0161060069460D610F64216906500C52C6C491C0861E68400B6042016000066106206005006E00000000000000000000FF8F 35000000000800003801802A02802205800800000000BAC780E00600682620720C806A0608A01030E2B5015904204806C0740046c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8C0400000010 000018010818408018418358018001004006216086006CB6006106206012B2708003690600220608A005024C050070030060 0408F04E406020206020000000000000000004FF4DE802000000880060180080180188180100300300000020062162061160 1600E50610790600888004654401650580600420C024806002826004086827856214206080000000000000000004FF3AB100 0000028800041420941801052049041C61000000800602610E08E44688E0060860361000600160244270C44166C008940C29 E00209200401600600618C116040000000000000000004FF0B9A000000021400001820801841C0380B40900100000100060200c6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6206016D0845 402E006006006080000000000000000000FF3AD50000000018080218018A78019401E52218010000007006306006406C0600 600480600360641100400701602612E104004434016202006001006006006004006000000000000000000000FFBDBB000000 001800041821841801170605001805002120408E80648680E00600640C2061820960054AE40E41E046C86055EA424C2A7022 0520050AE0060D6400116100000000000000000000FFA37C100000001000001E01011840883A0BA01855800010C04790E446 28620508602681644B0002ACA07547803C0640255401508401600200E48CA062AE006014006100000000000000000004FF0C0026c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006006006 002006006000006006006006006006006004006002006004004006006006006000000000000000000004FFA2130000000018 00001801800001801801801C0180000020060060040060060060068008068060040068060060060068060068040060020068 04004006006006006000000000000000000004FFA71F000000001A0020120183100020220920180180009080460160070060 0690685600201400280624A0128068062060010B0104086042006006884306106016006000000000000000000000FF284610 0000001A08221841900040A000012418558020A0510F206544114006806806C10B24102925082CC2006227036C2C4040244400a6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000180200 18000000038298A1201025882020600EB06A04204A06002006004006602004802822C2EC0608600600610480200A106004AC 4006E26006006000000000000000000000FF72470000002018001018002012018145510050C110414121064564A451641600 AA1620E8C610240000203208C004007130000C4E003006806104407006046006006000000000000000000004FF5847000000 001804001800000003841801009001000014421600600C0460C64A21260C42060020AC00228204401408E404204004002016 006004104006006006006000000000000000000004FF753000000000180000180180100180180180180180000060060060060066c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00E001016006 00600620C000000000000000000000FFA82B00000040180000100020180180020890C849802180A03601680E10500E1500B7 2B6C04106110886C0E04E2040072A00A09410A7082C06048004107006006006040000000000000000000FFB3190000004018 0000180000180180000100EA0580004A608608E4AE0A60A62A82B62AC9841862B80422CA28620C84F2A81402A81461024060 91045006017806406040000000000000000000FF849C0000000018000018000010018058110910498040016456C16054106C 56152546556456203344502492C54C0401653640652E812806016044016086A0700600E000000000000000000000FF14600000e6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1640F31600C0 0434722000400408000422604E20624201005400600A04200E114026006000000000000000000000FFA32E00000000100000 1800200801801001000001000000200600600200600680600600400400600080000000200600600600600000000000600000 0006004006006000000000000000000000FFC1DA0000002018001018002018000058108009078000A1640604620601601600 0017004CC6A06020806806806804027004404002802802106000866006A0E806004000000000000000000000FF058A000000 001800601800000E00803C01800A018000003C06407825806C46801C0600402F007A004270A740700681601420420A00A0020016c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010084040140 70000602000001003000000880088000380808000008104080190000010B0800000001450400000400188000828040000820 100400080000000000000000000000FF8D080000001010480018080418018118288E08010000206006006280024106006206 0840242E0040A0001000A4968061065062A6040016006100106016004A06026000000000000000000000FF3B510000003150 00301A2A020AA1A21A202D0A490000C93096206A84936026806006884A4C808800320308A148D40969068AE886B4090024E8 00C12126A04206CD4000000000000000000000FFADA200000000109000300010BC13909213C00101000002624602E03600630096c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2914280322B3 03002000000000000000000000FF96D900000020400020222022024020020620830C0000C10000A08800500C900089090400 00810920800948890800800810000900610940800800009001618900A00000000000000000000000FF826E01000000A80000 0800814880800810800800800000220242200200B02260340200210210A202102A0200210A30208228201200248A20201264 3086002002002000000000000000000000FF69E200000008000008101788B13918D94000188000000614A000000100420910 00800052000004000040847040200A80690680008200201000088200080C0020408000000000000000000000FFEE660000000056c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2C43002002A4 2C0080202A90280290200300288A803002842800802002802532002000000000000000000000FF15910000002000003102CC 23520224221023254C0001000005004A00800C24000894800080814840CC4904848B28C05090110A4080480088C882000004 800805000000000000000000000000FF855701000001380000185180B00D901849851911800040680640600E006006886116 44680E004540014004016216006106D06406534106006002A06016086006206000000000000000000000FF47DC0000005008 42420C828C0D40C12D04C00C04800103340300300348230B4022030030820AB00010215350308252B24B023113003433083100d6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000480341042 A82002B421024C0000808D505504C0D50D00D50C00D50C48820821400000C48C40900548D40A20D50D50540900D50550D503 10D50000000000000000000000FFB6A000080042800040042055200048041040440200010000010000000000010010010018 080C9010001801051000301290448081000010501401000801001C31800000000000000000000000FF62E000080008200010 02000900880C808008010000002E02A8AA88082A80002A81002A8328190000008610200100428A202300002A82A82000002A 82A82A80002A8000000000000000000000FF90D1000000048A00042800A00A40A00A24A00A00800100B002002142802912800036c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200200240200 2000000000000000000000FFF8B00000001044000AA0A800048408C1400880E000002212A82A82A92A8AA82A82A82A8B0108 04002A82A83002A88000010002102A90C10502002A8AA82A81202A8000000000000000000000FF851F000800012000002480 4400020920000A200000005000010008100000300000480000004004000C8940080008049000000090000001008000001000 001020000000000000000000000000FFDF260000000000000AA08A0000A80300020A809000003282A82A8AA82A92A82A82A8 2A82404000012A82A82002A8848020080A202A83000000002A92A82A80002A8000000000000000000000FF414A000000120200b6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (453443403111 02B402002013403443403003243003042889103003003403002000000000000000000000FF67D00000000000138000D18150 01813821801801840008402620621620610610608E0840141562400040842260861560060061260841161062020263160160 06026000000000000000000000FF43FB0000002C0200200201291052242202202200000088C0050040048000008010008041 44810800004804848800510934434000804A248C4800800004800895004000000000000000000000FFBA1600000000C00080 0004842A00800928840812800000280200280200200200200200200A2422088020020820020222029028D2002012412000000076c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000190300000 380000980002000800403100C00400084440885100802404000944844441002080400000C00000100A040008049001000002 0000000000000000000000FFCDD800000000004A8000A8008900808820900888800020220202200200A00218A02200201208 20205025120020120226020420022E20D2012000002022012202006000510000000000000000FF6A314008004004004E0400 40041800000000051000010010010113092810A100100102132D009089121000000009081001201001001061000089021045 001001000000000000000000000000FFAD5A400000420400C80400D00C00800800808C0080014032031430430CB03325302300f6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006086000 288000000000000000FFF8C40008000000C9868000140869800009103830020010E04E0AE40609402A00E30E0060121EC220 0581001004E60844C62462262822061A60180124962E4216036200000000000000000000FF8FD30000000801118020000018 9182405502D84000A00460060060061240C000200400620200650800004000810E0040863062265422562071000221263163 06026400000000000000000000FF339600080010000000200015000004202204800800C00A04200002000485000000C00004 200000880400201302002080400800000101004000800B0450000108090000000000000000000000FFC9CB00000004000000000ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (262060603A62 260820062AA20632610222204E2AE0001EEAAE2242AE866000000000000000000000FFF1E900000000200188000400580180 00A5801809800032600600644629600600600448610600680000600601202E0000CE00E8AA10250600680020600610400650 6000000000000000000000FF0AE60000000000018540000008AB043808033842000001600600600E04400210600602C0160A C00001009024028200400610640000A04600600000600600E006016000000000000000000000FFD834000000000001810000 011801001800001800020000E2160B600600420810E22E00404600E02028420C02000228C006006002012106036000106006008ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C3143040004 953955800028E5565564C65565544D65564515504160040C20024145565520C62CEC0E4882A65562040D4D56556557556000 000000000000000000FFC8A50000002C8001C0008A0AA831011912889893800008A2AE2AE11600E2AE2262AE20E296204000 22A2AA34C4422AA2062060102A62162AE000416AAE2B62AE086000000000000000000000FFE8864000000000018000000098 118938A980180180000020060060160060040020040868061260082163561440060022060060200260160060022060060060 06006000000000000000000000FFE9892000002A80018000A80A890198C0018C588180000062AE2AE0C64462AE33E2AE0462004ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060000000 00000000000004FFB6DC000000200001A0000408100100182880180180002420060061460060001160060000040060002022 4201600400000610608410210E006204556806006006806000000000000000000004FF227F0000000AA0018AA0E800B08108 B8008A98AB800004A2AE2AE00E2AE2A82262AE2A0AAC2A700800A08A0862AA2A829620632620A2062AF0040062AE2AE2AE2A E000000000000000000004FF0C610008000040018B202000000502184080182180002460060064061060040020040810400D 680000200200411600014E04E22401008600680000400600600740E000000000000000000000FF10BF00000035400195411400cec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408022222238 60044062AE2AE2040062AE2AE0000262AE4362AE2AE000000000000000000000FF9EAF000000000001000005805081911801 801801800000000600600600440400600600A00200620400200201650C0060060060B400400600600408C00610E006006000 000000000000000000FFAD6600000000002300002180003304002480182380000940060060060940C60062940820B034E020 09608E0220464D60060060042D6006006084206006406006006000000000000000000004FF63DD0000000000010000018210 2B840103803801800010400600620600400600600600A0000170001460062420060060560560140440260068040040060060002ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB8880832AB8 8900002262AE2AE2AE2AE2864262AE2A02082AE48808612620E04E2AE2AE2AC2282A62AC2AE20420C2AE2AC2AE2AE0000000 00000000000004FFEBE8000000001914801D559518CCB11951555955000055655655655645644655640640E44A1162A444E4 44454514156556554200454556556104014556124556556000000000000000000000FF2DD580000000180080180180580182 1851001805000011600600600600600600600600604200600001601402400400600600408001600600600008400600400600 6000000000000000000000FF009F0000000000890000898A800104388C8AB88980002202AE2AE2AE32400C2AA0642222024000aec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000000 0000000000FF7D36000000000800000004084000C11821801805800103480680680600612640600600001500400420C20289 20021060040000C0816004006004004006800006806000000000000000000004FFCE220000000008AA0000881410AB807801 8AB8C980002002AE2AE2AE2AE25611E2AE2B03242AC00044440C3267042262AC2AC2042062AC2AE0042442AE2A82AE2AE000 000000000000000004FF8F78000800001040801801803800C02001001801000000600600600600608E00610E126100040004 1000960060260060060040A8084004006004344006004006006000000000000000000004FF020C0000000010AA801AAB8098006ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (120006006087 816406006016006207006000007106017004006000000000000000000000FFC279800800001801800C00003C00C01829A018 118000C07026E0742E99F116E074C6C220768180004806E2C1201A00F307146186C0680610660080480700C0050060000000 00000000000000FF4060000000001000841600440000C00101801823800000F00712600702620602700601608002401500D0 8F0060060A600400020008400E006004006806002004006000000000000000000000FF20ED00080000100080102004940194 188DC0184180001060060060068070168C70068081000045100A40C60060D60170070040141248040064010D60060020040000eec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9801C8180308 000362261CE22620642604642E23200614C60000C09A40200210600A08C4141820080860200041060A00A008600000000000 0000000000FFC94A8000080018098010200128004020A0803901804000700700600601640620E8860064560000A12410460D 608E2860260022CA0560464061000062A600A00400E000400000000000000000FF52018000000018018212002A1C00080100 C81835800020610600650702615611604F48029640000845000700E10602608612200220640F106000005006001004006000 000000000000000000FF1D41800000000801600808105C00909849D0180180000061260060AE00782608E117142406300200001ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF01B3000008001001801202000844211048A89805100004422608E20620E02700602E00642A10C140024036006116 20602200800001201250608000E506002000006000200000000000000000FFEAC100000002101180140800D800E25101C058 A1012040401600604600648609640600008220440000C10623600608640C0802CC0420C000E4400C60060AA0801160000000 00000000000000FFD222000000020001018840000801021808809821008020200E0060060060864863064420862840005840 0230206200620000400010208000E2000AE046002058006000000000000000000000FF6FCE000000000001000C1A00182381009ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (294282C00008 400000A4000880000000000800028000004000000000000000000000FF0CDE000000081820891C888C8806806888CAA8C880 002622AA2AA2AA2AA2AA2AA2AA0422560022001221022425422AA0022222224020202AA1000022AE0023002AA00000000000 0000000000FFB515000000000011034005800020211802001820000008C00000000000000100600040404802408001410808 8108000004084014500090000100410000400150000000000000000000000000FF597580000002A082000020022110140040 00000400000000000000000000000000001300802900002802200404400003500080800484000000001200000A8000000000005ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400004000000 9004805004004005000004408004204500A3484100000000500090C004000934804000401004005014804000000000000000 000000FF31D790000014315510973584995551190BF559558000106D57556D5755655755755620641411450120C086106017 5565174254044C6457556400556556504C57556000000000000000000000FFDC1C0000000AA8848C288AC8A8008888888AA8 8880002822AAAAA2AA2AA2AA2AA2AA1023020CA00100320A28A00A2AA2CAA222AA0B22032AA0000AA2AA2AA222AAA0000000 00000000000000FF363C00800000800000400000000040202000000000002400000000000000010000001200A0040000080200dec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFA23A1080001004040040201501005400100000000000000000000000800001001000930110290000280288000040000B 50D08A80100010000000000000148080000000000000000000000000FFE80100000004400002020400204C01012420000000 000A800080080000100000000040000002050101002012809100000002001000810080040000000000001080000000000000 0000000000FF9C8F800000008CA88C88889048008428008AA8AA8001A13AAA2AB2AA2AB2AA2AA2AB012223C0200006200220 22022AB0021120322322222AA0002ABAAA2023222AA000000000000000000000FFE1CB8008000010490014404000A9420044003ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C0880E860420 4820801404008708500500005801004000000000000000000000FF8BCD000040000800900850A00828802AD094A800800024 204200322A2020134CA10200283200200034324300228201208250A2C254288310850000200232230A002000000000000000 000000FF707F00000060060000000020000000000000000000000882880509000500A08018200001008A0480008800040000 0A0208820000000240800000009800000000040000000000000000000000FF465B00000000019811011040A0000001000000 000000000800480000040000000040001000300020C100804000000000408000080400412200007C07C0800010840000000000bec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800200001 000C48000550910110110540100B00248510048A080884000008008000000004100480000008080000000000000000000000 00FF7F3900000000087080082282EC008008089EA800800020280300A12304208A08A08A08A00A4020500820421823220020 8240280200278221000050B543782002002000000000000000000000FFE15700004000180108185180385180555195580180 0024624612E52E036156256106006154506341D4C34702630611610E4D45574A60A64D000080E00754651604400000000000 0000000000FF6C8D020088001111001001010000001000000000080191413400428C4042201000400012A4A482A80242AC02007ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE07D000000000000000000000200001001001000000000 0000001000000000000000004804004800000000001000000000005005000000000000800800800800000000000000000000 000000FF406D000000001C808888AAA28800A0080880C800800000004020A00280200280202200200A012000902002202042 0420A2006042042022C00000002002002002022000000000000000000000FF32D1040090000201000000000000201080000000fec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4260064043A0 02E10701022000E020026022B42000000000000000000000FF0886000000001A008018118218018018011810018000806006 10600600E2A44860841829008260000260065162030840C6820002016846010000006A00E060060020000000000000000000 00FFFCBB000000001800101801800810C01901811901800024D0440260A610E2D404600C00600602E4112420A704634E0D50 06044A86CA6316140140A46040006C0D082000000000000000000000FFCB5A08000000180000180182180080181180184000 0000400420600E046000106104026048406100082206006006006116100026006006000400016200026024402000000000000001c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A004E026507C 060070260262460024A70034010044A600F0060550C62CE30A0040062080280000069061024A2100000000000000000000FF A538080000001800801801810881800000C0288080808C401400681604604A02641601628642200882411689600682628608 A428A07C06A800B0510087A86406012100000000000000000000FF1A29080000001C00901809800810C000888108C18000C3 48040C61261460132260060470092124105045260C610E00D03610200250653614810044080600620E102000000000000000 000000FF373E000000001800801801801801841911041001800000652674744E00600500604C0020F000618000604624E4220081c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF4242 0000000018008038018808210018018098010000425004046006006106000016204114284000090126306086006007485026 00641601000920704640F002200000000000000000000000FF73A8080000001C00801801C0C8010418018018018000004004 00612600600780080E0158140440044A08161262062040060000064464060000842860060078068000000000000000000000 00FF9E55000000001861819809823801808110BCC907802110F53605E0961C6816007006062006C1AB10A8520600680200CC 26026040026906100000071166406483212000000000000000000000FF9974000000001C01801809C21900E08000810601000041c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D61008164068 06000005406106886002326200000000000000000004FF2767000000401C01C03801B0002180180880084180000070070360 A6446B2C30A14428880D00C40420682E20E00611613720000730640700000D226806426022224000000000000000000004FF 50E0000000201A00A21801801801001801801801800008C0040068A6006A4E42C02611404404812180040E01601610C4A680 45068B494604000402600684624A007800000000000000000004FFE3C2000000001800821801801A01001857009840800008 414401680654600612410E8044840A04844082860C6C6240421608020640402612800400602600E00684600000000000000000c1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (484E10413600 684E216106CB0AC1552A1040C82489600600688E10081620E40C0060002269261060040C6006000000000000000000FFE66C 000000021C01801801A07001801001DC3800000000620600600700600C00200428080400000400200600E1040060060009A6 0071CE060000126A27606002006000000000000000000000FFDF840000002018018018218212018A1841009201800045616F A0600E38600480A084008465C800EE18A20E046F14C0E00620014605C33710000608600E006CB30040200000000000000000 00FF0A21000040011801801801800501801804820F1188005571060AE14600E24430241502049424C40022712792708434600021c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04FF747E0000 0000180180180180100180180100180180000060060060060060060060060000040000040040040020060060060000060060 06006004002006006000006006000000000000000004FFB432000000001C01001801801A01801A01A01801A0000040060060 07006806806006800804000802004804002806006806004006006806006006006806806004006006000000000000000004FF 8025000000051801001801C018018018010018011000057506C5400650E2061064160000100020A412450C8464072D604640 0826006006006004002216007140206246000000000000000000FF9295000040401801001821A2190192120280DD09A0004800a1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002604600E00 2004010046AA680A886006000000000000000000FF614E00000000199120180182F80180388098A803840102422C50648640 600680680600480000081080420C024000006006094806006F86002000000916986800006006000000000000000000FFBC5C 000000001A01001911C01801C019010149158080006454004146056206546046A004214B410411549502608040E2160040B6 006016006004904426006007006006000000000000000004FF6E7A00000000180100180182980180580080080188002AE084 05600E10615600E41601009000444020404400640004614628400600600600600442400600600400600600000000000000000061c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00500F107016 04702600280600600000EC0900204900600728680180700200200000C00400600E086006000000000000000000FF75DC0000 00001B01001801A00009801800001A08028004C01600600600600650E406486082806088D068264A40008170060220C222E8 0200200080600404E004006006000000000000000000FF8D5D0000000019010018018002018018014019880A802169862A72 0E2BE22EA0F26E20F7EAAA63B800E0C710428021F22E40A9A841600A002000106524016044006006000000000000000000FF 104D000000001801201801801811A01E01480C1195408462340070161060B6D5640648400000080450C48C44C0510070061400e1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C29800000004 5811009803881921001808A510A3800028600631612610E10621600708600644E00802004810010600600681108200E10641 04000150042A254E056006000000000000000000FF636A000000001E01801801801801001801A01201800000600600600600 6006006006006806006002800806000006006006000000006006800002004004002004006006000000000000000000FF0AAC 000000001811801911800201801801081A80000011500481484680E9A6946806002226816000D000C080A000847106402002 00680B0020005C47B4286026006006000000000000000000FFE52F00000000180160180180000180180100180010200062A50011c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0410A0440200 088020600180000000000000000000000000FF7EA10000000200002022800800000842C80000020000201410169108010000 800888120120000020140840130000800020000108908218000000410008180070318B08000000000000000000FF08100000 000019F00018018438B100180000100D80000A48040048060064944062160060068822000000A0000286086006C000060061 0608000020471600200EC26006000000000000000000FF9437000000211B20885931A03A012AB903281209800082E3048264 0E826A260062B6C4ED46102C40C96286A40A4E0CF2CE4A4A0E426A2E880800B04CD680080628640E000000000000000000FF0091c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1200B1520420 2340354215308008309301320205340248310200BD5314308142B003C13112013082000000000000000000FFF25800000020 820D4804043052002022002002000000500000E002100A8840A08820CC80C0800900808408000C08870A810F4A10A3044001 0900840880820800880000000000000000000000FFA6F8000000001800C08C02800804830C00118821800001228000200280 222280340220260294E04100211200212280A00B00200300600230A000000002012202842002000000000000000000FF7D8B 0000000020000040280010401491160E00C1000100D0000850A0D001040400400048042300082A4A04A8400000040030C0C40051c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000A12 A00800A40A00AB0A00CA8A828000902043002002802802103002803222002800902802002802103002802812D02802802800 0028028028CAA42002000000000000000000FFFC320000002012410010012032042022CD2022510000828014000004804810 80480480080080CD00004804800CB0A4500410CB2082400000490088C808000800904004000000000000000000FF33B10000 0000188B0058018010218D18C58918410000406C16C461062862062064161460060040408444441060860060068540361460 0641400000628E106026326006000000000000000000FF5D04000000400C40A00A04D42C12C04808C20C04800108A003082800d1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A80002002A03 282A8020228000000000000000000000FF0E090000001543001541543523102142222022220000500450D50550D50CC04C0C 48D40A00550200CC0D51550C10440D50C50820D20550800800450440D50C48800000000000000000000000FFBE2800000040 002000020043440440000444440200000000010010000010408000010004210A100210800180140080100100904900100100 1002000000001001100000000000000000000000FF46B80000000AA0800AA0AA0880AC0001000500000000200A802A8AA82A 82A02283A82A80C8AA00002282A82A81000182A82200100182A8000100A203A02A8300008000000000000000000000FF71CA0031c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (201201200204 2A2202A00001200200204A002002032012002002002400812012002492152000000000000000000000FF17B70000000AA280 0AA6AA00A0500C809808010000012A92A82A82A9AA8000B00AA8280098210001A012A82A8000AA82A84803002A82A8000001 2312212A8D10201000000000000000000000FF28260000000000542004000000200A00081000880001049080001000000008 8080000081088010800080000000209000000804800010000000010810080000002B0000000000000000000000FF2CDB0000 000AA28A0AA0AA08008008A2A009002800002A82A82A82A82A8308A292A83289002000802202A82A80A8AA82A81402002A8200b1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00400400C00C 40C00800D08C54C20C00904100B4330234430A24035130420B30C30130030232030024033030932420030330030030130230 4B103103003000000000000000000000FF52B900004010400180191184983180180190102184004060863060160160460062 0440620400428000600E00602600624610622600620602C080086486016026004000000000000000000000FF9C1B00000020 00240010012C02A42022444012340000804004004804000AA00A4004808004884882140800804C80005004C0092080080480 4802084904800024804800000000000000000000FFF2AF00000000001080080080081082080082C8808000002802802002000071c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001030040000 8400010000000000000000000000FF7FC30000000840000000280200010B1001101021104020000030830800044C00000420 60240805000043100000064000084A0040010400050100000030000040000000000000000000000000FFB1F1000020000000 80488080880A800908824800820040868800216203201208A0221C215A052500112042502022182022102302022012112000 0023000E2100002000500000000000000000FFAEE70000004004004004004001A44404224004000001001021031101088011 20120002929170D0010211011982010012810000010010010010090A1081049081001000000000000000000000FF8DBA000000f1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10600C006108 0262800200020060060B6046102006082036482000286000000004002000280000000000000000FFC5030000000000010418 0180190780D8398000019DC000C0842B60165140260060C804604628201830215601601E40641E20621E0C81A62620900060 60082018092000000000000000000000FFB27300000000000100384580182180192190202980000244240061060000060161 00106000312000416006526086006006206506210006012100006306128300102000000000000000000000FF935D00000000 00400280220041400020000C00D204200A0040010010300280090040006000000000020088050106428220000000220000000009c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A2108AB8AB85 1089A2488188810580005042440062AE2AE0C62AE2AA2BE2B62060000420662162262AE2AEA223262AA41622200020621C03 000C2AA2A8000000000000000000FFDDE600000000004C801801B03001804841820003800020C02400600600600600600600 600095680002600600608600600610208E000006002900096006000000002000000000000000000000FF8471000000000101 80180184982509181580515180001260962CE00600644E00600400600800650028A28A0CE0160060060080020024AE092000 0261205124A4002000000000000000000000FF3469000000000021811801805801009801820105800050E0862C60260062CE0089c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006046446114 000000000000000000000000FFCB70000000354128155955B10954B5582D9141518000554554556556556556556552546404 C8010440E10650644E5565568864345564CE550004126556456404550550000000000000000000FFDE020000002AA4828AB8 ABA010CB0889298AD029800002620E32E2AE2AC20E2AE2AA2A62A6AD62003024823063262AE2AEAA840AAAE0A622E0802AE3 040862262AA2A8000000000000000000FFD21300000000040280180182100100090182000380000060060060060000060060 0600603605640012042600E10600600643008200400600620020E0040860CA002000000000000000000000FFFA630000002A0049c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021540040808 0428E28E12E00400600604C00200609604C80404600408640E004000000000000000000004FF73B500000020021080180180 28000018CD801203800000400400600600600600600600608C82410002000400608600600690408880600610220030600601 6044006000000000000000000004FFF2260000000AA0A00AB8AB88C8AA0AB80188808980002AC2AC2AE2AE2AE2AE2AE2AE21 632420D20400003224622E2AE2AE2062242AE22620300400E2AE2260842AE2A8000000000000000004FFFDCF000000000040 801801902800841805800201800001410400600600208600600200600400090001000E04601600600600404000600610080000c9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8AB8AB88B8C9 8818AB8AD8AB80002C62862AE2AE2222AE2AE2222AE55421A0020064042AE2AE2AE2AE28C23200E2AE0160022AE00608E206 006000000000000000000000FF671500000000010D001801821841845801802801800000601600600600E00600600A00422C 0C20042A030C0060040060060040020C600630C00400642E006086014000000000000000000000FFDE5A0000000000418018 01801803809001801801800005602600600608600600610200610400000001602600600600600604410A2060060460020060 844260562A6000000000000000000004FF292B000000000005001801A41801801001843841800000600600600600600600600029c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0630E0061260 06000000000000000004FFBC3E0000000018880AA0AB8898A90898AB9130AB00002AE2AE2AE2AA2AE2AE2AE2062AE0042840 000060162AA2AE2AE2AE3242822262AE24E0042AE20E2262062AE006000000000000000004FFEE1000000000180D15415591 190D131955911155000049644655655653655655654E55600648000422A15255655055655624454040655410600455652E04 654E416006000000000000000000FF90EA00000000180500000180580500380184180100000060060060000060060060A600 62AC00800045204200600600600601403000600600600000604600E046006006000000000000000000FF775000000000000100a9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (71060A400001 620200400600600680408200E00400E00000621610E406136006000000000000000000FF6400000000001845400001841000 241C01C14001000000400400680650600600640680622F0080042A68230060000060060CF41402700612600400614682600E 006006000000000000000004FF0E3C0000000018C88AA0AB8C90880C98AB8208AB80002AC2AC2AE2AC0062AE2AE0362AE006 24000410258A2AE2AE2AE2AE2040203962AE3060042AE1063061B6206006000000000000000004FFD22F0000000018A18000 01823801005801841001000000608E00600600600600600600600002400608600600200000600608C0020D600422600600600069c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (41E11081C808 018010018001826127006009406107007A4784E2060021004020060042200078063200114060060060004060060261060060 06000000000000000000FFA2CF000004201801C04221803089A08C2FC0180581E021601700744080608C41612702E80C9124 9025302300C01E0570168815A001F08E00600001600F0AE016006006000000000000000000FF437800000040180000040180 3008049851900401020040400490700610F43600600E4070B622400500722B01400120690700F04600635441600408629651 6007007006000000000000000000FF66C0000000201800800201805042003801880001800000400400600085600600608E0000e9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601601400E00 0000000000000000FF01AC000000001800804009808881903803083805848008E21632620411624603E01E02602050600200 041000822641E01643049200442A09400200610E026106004026000000000000000000FFF36B000000001801800201881021 C00809801C01000000415480600A8471050060A64091000424300230A6B0208612652E88304CCA640602820802620608E00E 897006100010000000000000FF53D9000002481801800001811001840801901801000004C0C4006A522062062064862004A4 05241085200600244082608604200420604640000028E406406016006006000000000000000000FF663900000010180160000019c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080100100 0400060000002200A81082300A0100000000000000088000000000000000000000FF3435000000001800800001889C01C05C 35801401010008421444620000710600E20E22014002624014001000000635628E0060560442420200102260B60060060040 06080008000000000000FF399D0000000018018200018019018018019011038A2000410400612004E40E0860060104001060 9000030048831000600613628620401230410008640612600610404E000000000000000000FFC24500000000180182001180 684180182180509B8A200160460060B400E00E0C634600620008608008424C00004820604600A2061040022104822860A6010099c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000022000020 040000000000008012000008010010000000000082001000009000000010001200000008002A840000000000000000000000 0000000000000000FF4DF30000000AA8930000AA8C92A8CAA89000009880002002102AA4022AA0022AA2AA28A0022A200022 222220208A2AA2AA19A2022220422021002AA2AA2AA2AA2222AA000000000000000000FF4AE0000000000010000000004001 80182189040180001000D000041000044600000004640401400001400C094246000000000000000100008000000000000000 000000000000000000000000FF3B0000000000002000000002000200021202202400000500000000A00008900000000061300059c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2ABAAA000000 000000000000FFAFC9000000001101400401001204400201441304000000410500500000505100500400105400010300400C 8C0000805004020110001008010002804004004004110004000000000000000000FF497700000055588120055594D953D119 559359558000556557556156557556557556557D2D44610123502541655655755640E52E5565560060015575575575565565 56000000000000000000FFC7560000000AA8248000AA88ACA88AAB2491282080002AA2222AA0AA2AA3022AA2AA2CA2822AA0 012AA2A220A2AAAAA2AA2022222B24822A20012AA2AA2AA2AA2222AA000000000000000000FF397C00000000104A0004000000d9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E04400000110 48000000000441041000820000020C08000000000000000000000000000000FF405700000020008000000000004220200000 440000000000010000A08008000000000009308201010C01508000210008000200C000011000020080100100080000000000 0000000000000000FF6837000000000002000200044400040000020000000000000000041000000100080004040000800001 0800110400000000090410000000450000000000000000000000000000000000000000FF19148000000AA8288000AA888C88 88CEAA888CAA80002AA2AA2AA0032AA2AB2AA2AA28A00238220020271226208B2AA2AA2020022AA2220820002AA2AA2AA2AA0039c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001101029000 00000909440448204048440142346A82E800580840C6EDEB0300021080005000010C05210280001004004184044000000000 000000000000FF8BC9000052048908880830800B528D0A249108209000C4200340212304200A10A08234A80228200104300A 2522A2912A22402D42B0A00201000008202220008202A000000000000000000000FF31B00000000000000000000000000000 0800400000008102A80A8008488820000008000080800008C88AA00000000400001000108003000000000002000000018000 00000000000000000000FFED1D0000000501000001100001000005C02040000020001010100100000210010800000020D48400b9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF50FF0400001000000001000020102100010102040440901500010840820100821840AA80500808080200C82C80 20000050000200020001000280800020004100800000000000000000000000FF79370000000D682281280080080A868B0E84 08028220002A8270A902623092222802003D0201A08009240200240298212A0031C200A00306002806243A00200200200000 0000000000000000FF4155000054051911901851801B55951855D15821884024620F48C14F0CE414086106156086D0E1528A E09484644E956C465045565070860200020A642E40480600E000000000000000000000FF1A130200006000010090010024010079c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00001600608 6086090126146126000000046004108006006000000000000000000000FF4409000000000000000000000000000000000000 0000000000000000000000000000006000000000000000000006000000000000000000000000000000000000000000000000 000000000000FFD0D50000000000000000000010000000000004010000000000000000000800000001006804000800000004 000006000800004800000000000001000000000000800000000000000000000000FF2F570000000008A2802808800C82A00A 280028008000802008002802802002C104000020032222A1302002802802822002002002812802400028002000003002002000f9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021C5B818000 40E09600624204603EC10A000A690A9260808277C0806A668C6806A4C12006E20E90041104618190A4070060000000000000 00000000FF617E00800000388580180180106180180002180180A0A370470250CB0061451008001060928060008060040060 0080680480001B206C3603800001E11C002806006040000000000000000000FF87FC0100000058C18018018009018018038A 1A1181205460042A208A116C0A004004800886006400106500C274482460244454064160070A008040700440000610600000 0000000000000000FF97110000000098018038018218018418118019010000006084000400046000004404040026046080040005c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF894D000000001001801805801801821881A018010001A0602602685730600641604683604251641200602604010008 002482A301106007208002444106400206006000000000000000000000FF696D000000001801801805800803C05801401C03 8200907805A30C8EA8F00010200292820604600003701600000809022E416C02896086250000206801402006006000000000 000000000000FFE039000000001843805801801901C21A0900181180000860243000260B750088280280004600620008F006 44800E2400A40C2302086086100081444004500006106020000000000000000000FF71AD000000409801801841861101C1180085c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200660224 54582E04E86E22009C28680004611E206000000000000000000004FF3909008000409815801801822001A01AA90019010000 104404902106016C02A0000008688C88600C20E80200008E880026000414085106C004005460148070074060000000000000 00000000FF93870000000018018018418090038018010018010220000004202A060160120840044068848060040060820000 0082000C80001600409604000408E844143886016000000000000000000000FF728900000000100180180184990183588194 5B058020107636016106846006066FA630642224E3880564120200D601058440600965600E10041008F02202208600E000000045c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3801F0002230 162064460860278240040062918D621490F0170C680641600624D08442610604040C4045030B690604600000000000000000 0004FFF18C000000401801841C019008018C181110188190009070072060A600F40625124020600800600824688E90613000 600E444204084106000205044002126086006000000000000000000004FFE171000000001801821A01881001F01801803805 8880404024A438220C600208A002406004447C00126202080C2600040D80412400E016020104806021086006006000000000 000000000004FF3E3600800000986BA01801C21005847A2190181380000650340020028060020C644601E60409638008E15200c5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF9BAA1000002A0001800005841811821343A01C91080080400601614CB0713700688643710AC9084D02AC4200640612E846 12C024342106040508406316016006006000000000000000000000FF1ED7080000201805801801801801D81A09905C010000 80600606E08620700E01E08702E00020612100620210720602602640413C00F02600000000680A0069060060000000000000 00000000FF81A20000000A1801C018818058058219A38058B9010040649694680F14F0868030023069004560850264E20060 2098608E9841048C5006000084006052806006086000000000000000000000FF7ABF0000000018058018058408118018016A0025c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (562160442041 44000004000004106006006006006000000000000000000004FF328000000000000180000180180080180180180180000040 0600600600600600600000600600400000600600600000200600600400200200000400600600600600400000000000000000 0004FF6C95000000000001800001801800C01801001801800000400600600600600600600080600680480400680600680680 2806006804002802000004006006806006006000000000000000000004FF0F64000000400001800081A01801801C09A21841 8000C4489740740680E00604680600640202020410210A04604020611700000501202600000600600614600614400000000000a5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800022255448 A45690A912556CB0016B4004AA1511002000004004400C01680680404480040480600E00400600C000000000000000000000 FF647800000000000180000180000983050D20380B04C0386AE4A6AA6E40280202E80880680080300600000000002680C016 00680480000406000600601E806806804800000000000000000000FF48D2000000000001800001800011840800911C058800 40610451241504A546456006026020002510020CC00200000069040004060041051100054070060060060060000000000000 00000004FF673B000000000001800001800001800850803931810000E2040020860820160062B65160902A204400000001050065c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF12 5F000000000601800001801801800A010038018000A108852A94240082024062A700190400E2914252040400010030060548 0280400700000100600604400600E000000000000000000000FF706A000000000001800001801C01800001801A0100000040 2E0068160060920D601680E24C84202008C02400845004400400000008A0C202042800680600402600640000000000000000 0000FF90AD000000000001800001801C018083038018218A2001C8060460862AE62A2062A62AE0BC0A23E946463487069E20 50A4040A20112186040050306006044047007400000000000000000000FFEABA0000004000018000018004008A0A01A0380100e5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080482680688 4916140890856906CA502E80E000000000000000000000FFBBAA0000004100058000058A8009901883811815800000500720 490610C40408E48000608E0260201378460260418A004C48E2B220C244000020A0624F015206346290000000000000000000 FF7799000000000001800001800001801801A018018000804006006006006804006800006006002000006006006006000007 806000800004000000006006004007806000000000000000000000FFCE0D000000000001800001801C018A09C15119018000 02020490000608090200700680000440600080410C81000600281C40410200400291000018600E00400600600000000000000015c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000002C 3710890101000061208444405800600000360040014000000800200001A0240420028000018390000000000000000000FFD2 7100000004000000810000208010C00250200000001F0020E00000808420CA0010407C081201018000081006060180480100 300001400800090290502105400A0000000000000000000000FFD44C0400000000A982008185D82180108188989100000081 D40000D400000000600000020240600800AA120060060A002602660624C00640001000618608402600600000000000000000 0000FFB71C0000000004B1830521A05B23A15241B45B01800112893408AA562428A8446810880422C9291020240AC16C80810095c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFC33A00 0000020500900500CAAC00CA0C0C884C4C800133210BC030328AB323482003312343C8310001280B08340B02302341303340 34025010080224AB01108300A010000000000000000000FF97460000002183002002003A0440040230004200000080100080 0A00880150209608810840080821001000E28800800800100800800E88120800900A08C40A08B00008000000000000000000 FF2D7100000000000080000080080A802804840804800040500808A00300220210308018208220A080232802042082142002 28A0CA400002000000402002004002402000000000000000000000FF2EA000000000000210002200180148010142004A00000055c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2202200202A8 0000000402001102A82A8000000000000000000000FFE040000000204400800000A30A00A00A00C00B008000902802442912 802D0A802852842812002A0000200280A802882842802812C02802800800933102C12802802800000000000000000000FF77 ED000000250401400401202200200232201232000080C84C084C400048008D490480080400084000410C900C00810C881109 00895000000900C048548C4004000000000000000000000000FFDE3404000000800180000180184180390184180180000060 4600400600400E01648C006004046440B04024426006096006906206046126000100506006426C26B060800000000000000000d5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A83212802A82 080880282A82402A80082A83003204A82282A82803282A82A80002002A80282A02A92A9000000000000000000000FFF54000 00001423541541543141541543423543040000C49440B48B48550308C40450D30D405508405504D0C40D10C40900C408A8A3 0550000900100CC0A00550D50800000000000000000000FF0E58000800000400400600404000400404400400000110000180 0049001080420501001090801001801021011001001001041001000001001001001001001000000000000000000000000000 FFED2A0008000800AA0AA0AA0800AA0AA0800AA00000002202800080002A80202002002882A02A84002A8A202200A82300000035c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF1C55000000 000800800000884800800800800800800000200200A0020028024122020020A200221000200A002442082002402152002002 002400002002102002802002000000000000000000FF72D70000004AA0AA0AA0AA1000AA0AA0902AA0AA00004002A8A10200 AA82410210802882012A8400AA80302200883202A80102002A82A80000002A85800102A82A8800000000000000000000FFFE B700080040800000040002040040000800003000001000880000010010200910800000108000030008001080200802500882 00101001000003208008041000000000000000000000000000FF81370000000AA0AA0AA0AA0284AA0AA0A00AA0AA0000029200b5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010010010600 01001001001029001000000000000000000000FF105D400000400C00C00400800C00C02D10C40C10812101310300B1435430 CB50308251330320B2814530A2222312402013402433403003002801003123083003103002000000000000000000FF257500 0000021801800001801849801823805805020004602408420E00600400E22402600E02601000401409600600612610610610 648600600040600600E0AE006006000000000000000000FFDEBF0000002014014004012502014012320012010000AC880414 4928004154880834840808804800004C84910800810801150801000004804800804C34C290040040000000000000000000000075c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (041010015030 00003161000080000202000202C60A00C04900C0110020148108040400208108000100000000000000000000FFC38A000000 020000000000001820040110082005020002C42812001020000010840002E02C4504002140A8130006400040280040200100 000000000100008080080004000000000000000000FF6E6B0000000010008240048228088008208000008480002440102022 0324820024782422920824481B224210200A00209A00249A0C2300006000312162082000410002000040000000000000FF1C C74008004004004404000444004424025204090021181491649281081629201090081041101081101400200280000001000200f5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (CC0000000018 0182000180400384380008108980000064060040040162040040C049600201604000C40600220008200A20408242A0440560 0004608600E00C20C006000020000000000000FF80160008000018018180018038038018130410CD84400061D010A0040061 5240408004060668658004008A146000246304104456202004006202006406404004004006000000000000000000FFDA9B00 000000180180400580180180180300100190805260000102141060000844080000960860000800B200612640642600C00608 6106087490116026004106004086000000000000000000FFACDA00080000000002000000000004201012004409404A000800000dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408E00600000 6006000006006006000000000000000000FF7DB30000000000AB8000AB8C18AB841A018AAA0000002263124084060262202A E3662883A622600022622423608821640420644220E20A0060002AE2AE8362AA018004000000000000000000FFFB7F000000 200001800001831801901821800828000000E04220020640600000611600000E006840106104006426006044006212146106 006800006006114006004806000000000000000000FF79BA00000000180180000180200182D90C001883800010608E0A60B4 11610E00400002600211600001001610A00612A50A1340C00000400060000060064060004A0004000000000000000000FFE7008dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (14E002006000 00600C097040102108006026006086114014114134006802006007006004104006000000000000000000FF55280000004011 5580015591400B953900955555800024655248255643654255643051643404600452242844611050655611440E2264060064 04556557556556555006000000000000000000FFA3210000000010AB8000AB88B8AB809C098AA88400002A62060860A62062 AE2AE20E2AE22222600222A22432228E2A204A2260802242028060022AE2AE2C22AA242004000000000000000000FF628460 00000010018000018218A1801C49800000000001600602E00608600E00608604600250601000600410622002E00602610009004dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000020180180 000180382182182D801001800002E0060260040CE0360040A00260100960100A604610600008E00601400412404000680400 6006002000002004000000000000000004FFA57D000000001001800001830095801A00801801800000600208A00600610200 601600602444600000A10800C02602400630612440C500806404006006806000000004000000000000000004FF08C9000000 0010AB8000AB88000188B8848AB0AB8000B862AA2022AE2062022AE20628E3840178002123002322882022AA42624E006048 0070062AE2AE2AE2A82A8004000000000000000004FF4896000800401001800001800001903922801031800101604205201600cdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000006006 004106006006000000000000000000FF94C20000000898AB8000AB8818AB8AB8A985192180002AE20604623C2AE00622C286 28E2A02AE10022222220408E0042AE3260040041422AE0802AE2AE002002212184000000000000000000FF0C440000000018 01800001831801801803801005800000602E00610400614E00400E00600000608401208200C00000C00608E42400C0220060 0400600640A022102054000000000000000000FF235800000004580180000180580180180195309100000060864AE0040064 0608402004601000644008600E1462265460060041143442880060040060060C2308052204000000000000000004FF082600002dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860880840060 000020000860062064000862CC00E02400601000208400200422400E006046000000000000000004FF4DB60000000A30AB80 18AB88B8AB8AB8C18AB88C80002AE2A62162AE2AE3062AC30428E2882AA4081263162CE08E0565042AE2C40562082AA2042A A2AE32C20E08E2AE000000000000000004FF6039001000115155801955D1595595591088580180005564A620E44655604E44 244E5565485524444524D615613043600042649452E4005560045565541144A6546416000000000000000000FFDE36800000 001001801801801801801812801800800000401604600600605600605604604000200041204600644608604800601400604000adc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (041001801A01 A04001801829025C0000000060C208200200210E0000C40061040024100000462360064C00AD006144006408006200006004 10C4AE8AE006000000000000000000FFD98D000000015401801801830001801803201805000000601201200300200600600E 00601080210024890C1044000104060060163260A0006004006006046006406006000000000000000004FF955B0000000910 AB8018ABAC00AB8AB8810898E900002AE2023222AA2AA2262AA2062AE2202AA1000802040040AE4000002AE20450E1002AE0 062AE2AE2040464462AE000000000000000004FFFE2700000002100180180182180180184380182D800000400E1061060062006dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00806A060029 0E006006000000000000000000FF02A3800000001801805801E05E01849801C0180A850008640612448408E0060A600E28E0 278060800440040A4011000006006404006000002000403006006096006006000000000000000000FFEA2E800000001C81C0 3A01A01C01C01841D83D08804024E1362060570860060AE406067117046441004C0400400604846F40620C01F00000600000 E006083006816006000000000000000000FF9966000000001481A01C01800201A01D05043821080020E04241300220222741 4024006A0420200480008C40C02021001402608E00680000E005016224105806006006000000000000000000FF2DAE00080000edc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (012400E10E28 020066661442400000641604620200600000400010401E002106446006000000000000000000FFDA4F000000000801801801 800001801941041821808020600E02E2364060064002440164060200880CE51601E05E6460860A610000E000034000484046 202026236006000000000000000000FFF274000000001A01881C21801801821D05095804800004E2C008000009028E10A08E 5000820100000040AC30430704024C00610602649020A090002406006086116046500000000000000000FFF2CB8000000018 018018018038018318054019448AA01265100CB34201024680220E3000D22263400040064A60000002042460060060000060001dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000040 0000004400002200005201100880801300000D00400460104000000000300082460000400003500000001080000105403200 00000000000000000000000000FF0916000000001801801801A0180182180100180080014464280500401101060A42545080 0600000000200613620640604400608203600800C008004202006006016046280000000000000000FF94CA00000000180180 1821E0180180380310B8048D200960024005100422060040040000162AE30811214400409004610408640200628042410000 4002206046106006000000000000000000FF05510000000008019018018000018039610018418A2008610430608E02401603009dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (208A00A2AA2A A2AA000000000000000000FF959C00000000900000000002040040002400000800010000000300000800002A000000000008 0201030000000000080080000080000000C88000201000004000000804000000000000000000FFFB110000000A80AA8AA8AA 8C08AA8AA8810AA8888000C0A4024225124022AA24020028A2A218A2A032A4924E208A32A3022AA0022AA000222000222442 1402AA2AA2AA000000000000000000FF9C870000000000000000002318000000100000000000006420400428400000000088 006004044000100200200006080114000000000000000082100008008000000000000000000000000000FFC0728000000040005dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (28BB8348A000 2022AA2AA08A222213AAA23A2AA00000A0000022020132AA2AA2AA000000000000000000FFD24D0008000012010012012004 01401001001440000085012403404514C0040041340410112144C10140000004200084480041400040010080808010004040 04005004000000000000000000FF25FC100000145D55D55D55915D55955911955B45800055654C50452CC44556016556556C 5684C08850455655655645722655644755600004640012E556546557557556000000000000000000FF4EAB0000000AAAAA8A AAAAA8A8AA8AA8AC8AA88A800008200A1020020022AA29220228A2A202200022212210A08A2220022AA20A2AA000322000AB00ddc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000008 420000011400006000003008400000404004898000105612885014000402000006A000186008000000000008001000040100 8040000000000000000000FF78C600000004000020020000420040001000002A0001000120020128128000108000000008C0 05100B00000002000000400000000000000002001000D04C0800801000000000000000000000FFB5C3100000014200000000 03000000002000010000000000101100000000004200000400400400000000000000400909100000810000002C0000430000 010000000000000000000000000000FF73B38000000808AA8AA8AAE808AACAA882EAA80080012AA202202202213AAA0022AA003dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (096006507006 000000000000000000FFA0AD008080000000080000021001080001000600200000C28500400401800D824830029000D04888 44C06DA010007A040800140800420C0400A080C084000000814044000000000000000000FFF67B00000A0001120900209008 0082C90CA00884840102A0228AA50324B44A00A24200280200200008200200280201280250220204200A4820000128820120 02483002000000000000000000FF188C00000000000000000000000000002020202000008000000000400808804800008004 A0300001A30420130000540008000000008000020000800000080000800020000000000000000000FF56BA0000000000000000bdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020028402022 02002802003022802802002002802000002002002002802026000000000000000000FF4FAB00800000000000000000000000 000000000010008500C00001004000B02408300308102A41008900204008005408082082100050108004A000000000000000 0000000000000000000000FF4E8E00000000000011800080081890480680090088000220220028DA29208200248A00200200 203000201205A00201ADA220A3C201A462002201012112002402002002000000000000000000FF28F3000014000114310041 901801955F55805945E200456044556347CC62D65175460064C704549010C2040CE2060560D6D0602614E816306000097104007dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801841801881 88A001010840600400020411614441420604020609210008008800600E40C036046426006016006002006002046006026006 000000000000000000FFEAFE0000000000000000000000000000000000000000000000000000000000000000006000000000 000000000006000000006000000000000000000000000000000000000000000000000000FFDDE50000000000004000010000 0000140000000040008000040000000000000000008060040000008048040000060000000060000000000000008000000000 04000000000000000000000000FFC7F500008000000000000084080080080080080C8000202402080004882000001082002800fdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (470860060000 00000000000000FF8E98000000028100302205801805811C298CA80D0443246086000443080EF8E187965060660C60000080 1061600688481600680008605E006000A06282006002006046000000000000000000FF1F5800000005000020020180180180 9851801A0320000069000061860294010C000EA060068060208040044060A080520600E003006906006000D8642A20600602 6006000000000000000000FFFBFF000000000040000001901801809801801815000000601400400002600C0849164010C622 34300500010168C014450611700610E006026000006932D06026906006000000000000000000FF97170000000000000020010003c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600889220219 491604200025625871601708E09160E60F006002016046000000000000000000FF6F9A000000000002122001825801801801 901008808204E08E08E00004245700FA06106082226231326836C4502008320200648000600602C000006086244103006006 000000000000000000FFC3C2000000000000000001CC5811841A018818508003006124124004A2600208200685090A284A20 C360A68248A82C25040360A3896007026009007883C26106056006000000000000000000FF1E220000000000400000018818 41801881801C00808300600C804204806002022006020C82A545100C689601400E2501480C644200E10602400000600214400083c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01841801801C 19808200608021561221180E0A608B006308894040022432665040010006156C8E46E5060C60040060120464874068060000 00000000000000FF7F69000000000002000001801803801909911001C102017084C0400442684800100A4060451004800820 82004016200006006024817006106000006800006102006006000000000000000000FF070800000000000000000180181180 1841801A2180000868040040004068045040AA24E01400000400230280400040310E40600600602610608401600800780702 6006000000000000000000FF2B56000000000162022005D018058519A1841A0484C168F64E04E440800187006026006842900043c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (700600000000 0000000000FF4EAD000000004100000033803841801901901941E003826504214442206144444A0620654C08042008E08710 714690610710705494E02E294021846146005802816006000000000000000000FF8C7D0000000000000000058C18818218D1 88984180020060148080430360208100062461040082A000600E806930516840814404206307004004006004004202206006 000000000000000000FF3CC9000000000000008001801801801825801E4188220060080040268022020CA082026410224000 0220420140860A042E006114806006806000006203806002006006000000000000000000FF05E5000000000002008405B41B00c3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100004086110 0868464000D6006946006045046144006006802004000000000000000000FF6D5C0000000001000A00118018038419019059 418000336907416010D441022160042C680E884A28C0804404E026A262860868060AE81621600000741601600600A0440000 00000000000000FF1DA8000000000000000045805841821801843001800120E000802006006856806C140860400020000431 2202E006A3E22604608500600616600078620E04E002806026000000000000000000FF710C0000000000002A0001C01C0780 3A05821801904209600682601E0A240A88A8AC02604146A00C322502016008047C16364044006086046004806C14066002000023c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180190180181 0001620614650400420004240610620602444000240E00040640000600600600608600600000600200600600200400000000 0000000000FF0EAC000000000000000001801801801801801801800000600600600000400600000000600600600000400600 6000006004000006006006006004006004006006002004000000000000000000FF920E000000000000400001801801801C01 8018018003006806006800004806004804006807006000805006006806806006007006806006006000006006006006002004 000000000000000000FFDA58000000004000000201801801803801801A0180020064060464408040031220A680648603680400a3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF4281000000000000000001C01801801803941841AC0092640642E204104500D04456956D46B46A3400A90E250130 0104A600004600600E046104006040006826206206000000000000000000FFDD0E0000000000000A0001821803AA3881821D 018480AA601603600422400800883681680600680000220E4008060001060060060060860060000060000060068060040000 00000000000000FF65B1000000000000100101921A01905D11A45805C040547127406034D54128C960C6446156A9000000A9 460B0129130A120010C6006006006004446042006806002006000000000000000000FF944D000000000000040001801805850063c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06808006A00D 0400010200000E80600044600200600620E206000000000000000000FF003C000000000000000001801801E01E0180180180 038460464061070014440030040000C680000030E24E00084011142400600080200600600000422200604600200600000000 0000000000FF6E5A000000000000000001A01801801A01945A419400106C0600620290608452E2570A620622009100308444 0891800086028842024246046080006106106007026044000000000000000000FF0B98000000000000000001801C01801801 807803822000E0EEA0EBAA0062E48F638C2AE2AE2883205024E42A8AAE7A800805602084644600600000652610600605204400e3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (CD18018002A0 F216CA6856256422C4C848D104A68A0C00A32824906908906806810D269404068C6C00842A2A286A0E826826000000000000 000000FF8921000000000000000001821801401841C0588D8000026107816A0208008E90130000600E208088106484006200 22752A02600A40A0AE00600040210200E027A86316000000000000000000FFA6F90000000000000000018018010018018018 0180000060060060020070060000000060068000000020048060060060020000000020068060000020020060060020040000 00000000000000FFB61C000000000000000101901801811813901901800200640612E0069100044028808080020C022101700013c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFACB9000000000000000091820040101820020000000280100800090C41500100011400E0040040414050000100064006 700060042C10000000012000200103010E02D0000000000000000000FF110800000000000000000000000003028208260200 01420001200001A88801408000016BA00106003301100000060A0100056000408820060010000001A8800850000000000000 0000000000FF83AA04000000000004000190590300180980998180002062060B60660005020040C010004E2081900860040C 620E20608600660E00020E08600000201A106006204506000000000000000000FF958D000000000000000281C81A832519130093c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601610601600 630E41602600600008640C006486006106000000000000000000FF3BA3040000000000040400F02C80C00E00C00828800084 329208B842402D0A0822430822C324352994330341310341352302B0038C2912123009203102492003543252000000000000 000000FF3F090000000000000002004002902002002442500000140480C00000820290300A00A808014808080404A0C00980 910808808901110010800800400A80C00820000828000000000000000000FFACE30000000000000000008808008088009008 08800200A11210A21200302A0B142A002C0206200000A2020020120020020220B20231C2902200122502002C0200200200000053c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8800022A8008 0002900802482003802A82A0200420A20A202200880200002A83202A82A80200022A80280002A82A82A80000000000000000 00FFD6C7000000000000000200C00A00A00A00D00C00800080288200284B02282290281280280202228000201280AC02C02C 02802802802802C02900802C03022802802002000000000000000000FF20AE00000000000000020000140020000124D22300 00004A25354000A0C08483484480081409080010890090084091094880091000000490CA00800904A9480480100000000000 0000000000FFF775000000000000000011801831911801923901800050600640609600C00441610C01600480E00021600E0400d3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 7E6B0000000000000000AA4AA0AA0AA0AA08028800002A82400400400A00880A02A02A82502880880501102A82882200202A 82292A82A82A80802A82082A82A02A92A8000000000000000000FF46C4000000000000000354354354354354332330000055 0C08110C40C00400D20C40D10540411020450550C40950D10A50D50828D50D51510B00550B08D30550D50550000000000000 000000FF06F10008000000004004000004004004004420440003001011491481000001010011001101821800200201001021 111111001100001001001400000120001001000800000000000000000000FF45200008000000000000AA0AA0AA0AA0AA00000033c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9114A8800840 800800804A00804140805025000004000000000000000000FFB3FD000000000000000000800800800800842A008000002082 448202012202002102042002012100A02A0200200200200200211200200200210000281200250A0020020000000000000000 00FFA1F80000000000000000AA2AA0AA0AA0AA0100AA00002A81080800304114406092202882002206011010C82A80882204 002A82002A82A82A80012A92012A80102A8AA8000000000000000000FFD70000080000000000000000000000000000000200 030000C02400801291100080080210091401031010000884000400800004000000000400030000400008000008000000000000b3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010092112010 81109611001280221021001291001000048268231018200011011001001001001001101041009004000000000000000000FF 6402400000000000002000C00C00800C00C54C00800110312321148345314348300214304340314100300A00240212300250 200300300300304100B00300B003013002000000000000000000FFFC390000000000000000818D1841803801801801080043 62060C000E00600603632E20E50E02420024C4A420E00E206086006546206016006000106006206206006006000000000000 000000FF9EB30000000000002002000012002002004890010001004A208008893448D51208088008D488480812C024800A200073c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF073C 000840000008000092000010042000022080024040004040028804052040603040608040001021048001040614003020E010 0C0000100410540280308080000288000000000000000000FFE21B00000000000000000181004100180002200010002000C0 0800040C002804E04810E2084400084443284040060081041062000080080000400000002802000000000000000000000000 00FFBD970000000000000020808A080080280090880080000A200A02820A2120802C20021420C000602014A0124220024921 021020AA21241201200008A00200A432002002000000000000000000FF49744008000000000000004004000004004004000000f3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020004002280 04006000156140006006084356000000000000000000FFB3310000000000000000008018058018038C584080002860060400 444062242064540A60042C640008420E00004010204021620210A24C00E00031610404E216004516000000000000000000FF 431100080000000000012580188380180380992009C00862C60200343C610C18E2840187040A22200540020004B800601400 42160460A412641000E004026006024006000000000000000000FFCA3F000020000008000048801909825801811800140000 650420050401601405608420004400204A40408220810642E102082006006104046002026406506106044006000000000000000bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600002604 E0060060A604604632608028600408402001620E0000010C8006006400006002006006026806000000000000000000FFC7DD 2000000000000000AB8AB88A0AA0AB8AB8AB00002AE2AC2A82A40062262161C22882AE4CE0402B63443322882261060AA402 0022AE2AE0000460062AE2AE516106000000000000000000FFEFC40000000000000000008018010010018018010000006004 00000620610E006042000007026C8000002C00204600E44E404152882006006A8020640E00600642E0060000000000000000 00FFA18700000000000000000180182080080180180080000060060000141360040D621402600420604000C0861100060821008bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF5F9E0008 00000000000001801805001001001801800000600600101450611404640800600480810000400000400610E4160061140440 06006900316092006006046806000000000000000000FF5FA600000000000000015595595515515515595500005565545504 842864A434E00051628400041404C5504445104C60A45504CE4065565560844D64D6556556296556000000000000000000FF 5A4F0000000000000000AB8AB8A80AA0AB8AB8AB80002AE2AE2A82A404E2263060062CE2AE1062003262142244AE2220464A E0205102AE2AE4000062222AE2AE00622E000000000000000000FF5974400000000000000000801801001001801801800000004bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (63542CC00E00 600000628200600610E006000000000000000000FF9A8B000000000000000000801800000001801801800000600400000212 601412421000600D2002004A000610222008610E400004084006006804086002006006016006000000000000000000FF1FB1 000000000000000001801800000001001801800000600600002420E00640604400612602409000400001600600E224006154 044006006280016152006006486006000000000000000000FFDE280000000000000000AA8AB8AA0AA0AB0AB8AB80002AE2AC 2A8A9E0062B600E4942AE21709D00000C2A82360882220040A820620E2AE2AF0042262062AE2AE027AAE000000000000000000cbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000006006 0060260060000240044860C4046226516046004116050006006000006406006006004006000000000000000000FF281D0000 000000000000AB8AB88A0CA0898AB80980002AE0140000A02AE2062AE2A428E24620200230022222608E2440060AE1040042 262AE0022AE00A2AE2AE2262AE000000000000000000FF11B600000000000000000080180000004180180180000065040000 020060A600400C00610600204408000200600000C416000004004106006004006022006006006006000000000000000000FF A6D70000000000000000018018200200038018C5800000603400020800601400600002603413000005609610A2460C614620002bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (66CA00000000 0000001800001802004043801801800200602600621200614000608800600400600200000000A00000650600000600008200 4006006046006006004006000000000000000000FF6582000000000000001A018AB8822C00AB8AB8CB80002AE2AE0062282A E2AC2AE2842AE2AC20600C02E20428208E00650E2AC2462802AA2AC0002AE1062AE2AE2AC2AE000000000000000000FF9E4C 001000000000001D5415593051011195594D80005564860060A255641255644255649054C02425654E52635051603655044E 4D045255600455650E556556554556000000000000000000FF764480000000000000190980181000C001801801800200600400abc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00080602E004 8361070278A6824006000000000000000000FF96F00008000000000018318018A00040018018418001006806006004006000 0061100468041260060540560CC0260C414640414F104006006002006006006006004006000000000000000000FFFEA80000 00000000001D02201C04100401801805800200600400601600600600600600600000E0110849060060004024120040060300 0200600400648E006006005006000000000000000000FF1D960000000000000018458AB8480280AB8AB88980022AE2AC0063 A42AE2AA2AE23228E2A831600420421621628E04A0060AC2062042AE2AE0002AE0762AE2AE2AC2AE000000000000000000FF006bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (342462120080 5244804AC8620000000C42A1000B208404C846002002226008026016526AA6046006000000000000000000FF2A2980000000 00400008804418000000418018018001A2E00600708602644E007A4E2264A200440180602608C08002C00601411600F80300 4010506016206006006006000000000000000000FF4CE4800000000020000C81C01C205084018059059800A2E9540B649459 E026216206106A8206408100120400401E70400204428E80700240600128E006106C0701F006000000000000000000FF73C1 000000000000011C01801820608481C01C0180000072070A40450060044A608400F00D30608400440E42420000432600524600ebc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 001120001803009001883803800040600400602408628008602010620604428000413008000800030A084000008008126400 136006016006006016000000000000000000FF80FB000000000000001281861809501003001801888020E5C4086684206008 14638018E0262240280042403004262204C202408001420009E02000E30600600608600E000000000000000000FFBFAD0000 00000000041C00001800020201A09C81844000744F22601702602224000A04090200600025008803250608A00400C0061020 834043081060072AE506006006400040000000000000FF9084800000000000011801C018002000C180590580000060140170001bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801000000000 00000000000000000000000000000000FF749580000000000000003000020040000A00000000000000300A02080000100061 000260100880000001100080460200D0006080010048048480000000000000010000000000000000000000FF170200000000 0000040200041C01441003009801854000E08C10210C0060244000140501264042A02344000000A64B000E00C08008048621 60C00060060A6086106006200020000000000000FF33FE00000000000000042180180B01100188390588000064442424444C 62940C03440004060040080040404B0210000406124000014014046010026206406406006006000000000000000000FF29F0009bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A28A28A2222A A2A220200002204228208A3022CA2AA2A22AA0221320802AA2AA2AA2AA2A22AA000000000000000000FF3EF5000000000000 00842220022000000040000000010000000410010003200000A00001000000008800C08082200092200000100A4240800001 000001000000001004000000000000000000FF18E90000000000000CEA448AA8AACAA9208AA8AA80002AA2421020A22AA240 2C820028A2B227200050A30223248A29A2002AA23A2220026024002AA2AA2AA2AA2A02AA000000000000000000FF28CB0000 0000000004010380000180190100000000000001042080040001400460480060040000202C40241042060040000040001042005bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000888 108AACA88888AA8AACAA80002AA2AA212223AAA00228A00228A2022AA00000A0122622AA24A00A0AA2AB0120022AA0032AB2 AB2AB2AA2AA2AA000000000000000000FFF4AF00080000000000050840120040000040100100010045084009408040040041 0C00000008004101440D04004002100400000000431080000100400500480400D004000000000000000000FFC4C610000000 0000125C81D55915F33D55D55955800155755650755655601655441655744E55600924D20550611750608E5564C620411655 6300556556556D56557556000000000000000000FFE1A50000000000000888008AA8AA8AA84C8AA8AA80002AA0020322122A00dbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000040 0000020000000000000000000000FFEC5200000000000000000404005008001A000300200000080188080025014000004100 08900C00000103D1800010018010000000400400000012000628C40400000000000000000000000000FF6F72000000000000 02043040020004400000000000000000000B0080000088040350041000000000A01110888001020040200000500120000280 801000800000000000000000000000000000FFFB551000000000000041020000042002002004000000801000000810000420 0000000001480000080C0220000000100480000001050210000000000000000800000800000000000000000000FF5DDE8000003bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04454E006507 C8E22A40E4C6204406C260060D430EA9681043400014702F444006006000000000000000000000FFB61C0800000000210010 0020000020522510B0004220A800046340D4A04605D94A002E00C0880B881202010EC020090011CA5A000240880040018044 00004804044000000000000000000000FF825B1080320048C0C8095090C9108408808308D0952010A08220208A08352200A3 02822422402000493002002802A2300202A48240A008A02000123002020002002000000000000000000000FF255700000000 000020000020004020400010220000000000000080400000004C084880080001052B8008404202000000082800081000008500bbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080080080080 0808800829000900A00000280200B01001408000080204200200200082201200600280200A082083222000002AA800200228 6202000000000000000000000000FFB1501000000000400000000004000000040102002420400001220884200C3000081050 0111040548010AA0110820080540800408000310800800000000000000000000000000000000000000FF173C000000000800 818804858C40800A02804800800090300200A80A04280A10244A00200211B821182002642992812AA204208A0020000022A0 00247A0C2802002000000000000000000000FF757D1100540059419019519159518C1B0984D95192C01171071041075040C6007bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (046947006007 08E080000000000000000000FF0D1008000008180180180180100100180300B80400A022401600A40C228004000006000054 2061000062061021062260020804A620600010200020E006120006004000000000000000000000FF72090000000000000000 0000000000000000000000000000000000000000000060000060000000000000000000060000000000000000000000000000 00000000000000000000000000000000FFF5D300000000100000000100000000040000040000000000000000000008000060 00806004004800004800800806000004804000001001000000000000004000000000000000000000000000FF52410000000000fbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A408004C4123 2008650651600E0008A400234200E00108A2000060A5100006114100000000000000000000FF9754000000081821A4184180 1001B5180510B815A0800641060CF00A26E09400600E206014076008B3A106804086287202184408A0600054200232E40402 0016104000000000000000000000FFCA4D000000201801801805A01001A05A63001801A02000600620602690740C00E81600 600408600200002E00600002604000C002886000012002006000000006004000000000000000000000FFF0F7010000001841 C01801801209001801021811100008680648202000015441014748080492F430D528CEA1081010650400880E0960010024000007c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (809800023A21 851A251458750000042446401600A406070A7484A0E144106868142006004146A18CCC2560B8146700146001506004006087 126000000000000000000000FF340B0000000018018098C8221809901821801E01200180280E909001401086026004246204 C4F29000188600E208000114506000206000206048006304286056004000200000000000000000FFBEF30000000038018019 10201B11803801425801848000243730800C0108A6000425820344282A80042C4600CAB004044602A0032C61010020284069 0548E026006000200000000000000000FF3787090000001801801802001811805A0104180BA80048300E00020510022640100087c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (160040060000 00000000000000000000FF91A8000000001801809804021861821A10081809A0801025260040028A630F0868350160400002 911102070A4000000416710026116000202004A07086984037000000000000000000000000FF172200000040180180980000 1801821D04201809810000200608540408040C086426047B0720C14400029400A006081006005054846200C0000440608684 4047012000000000000000000000FF45EA000000003E01841800205AC1805800001801828000288602400800904C8868C601 680880400400E426002000A200060002A6006000000004806006014086842000000000000000000000FFAF870000000018010047c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (64A043000560 104E030088DC680611CC1410E82010400D00601702400700E020000000000000000000FFA822000000081801841822201881 85181174180180002078560164420274342262B6C47A06A00000886B2531122740652FC240942A740041640410602E004006 342100000000000000000000FF3F61000000001801C01802001A11801815011A41800410630701704220F0C4056216046146 0200300AE094800A08807416044104036A0000400410680602400F012000000000000000000000FF3134000000001801A018 00221A09801800089821A20020202600C02622E0264568840060068404064400260C4416440006025B04006001902002086000c7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00201A018418 01041A012000106006806406045002006082846440024004484012A0C1015042144100063162060060140060060061060060 40000000000000000000FF1039000000205804241880081B0591585050580504402060A8896906C0681720F032406916C8C2 1400852200443600408602108604704648E40409612E2060060A6080000000000000000000FFB17A00000000380181984401 1811801A01803A03802005600688284600644604640400600808820C00E00614000600684600401400600108600000E88624 4086416000000000000000000000FFF12C00000000180380188028980B883921201A01A6004AE08610248720600640E905010027c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600000 0000000000000000FF67C5000000001800001800001801880101809811815040603400E08E01604A2264042263004144C000 20A4004406000086000006006406006004106006206006006000000000000000000000FF80E5000000001800001800001801 8018018018010000006006006002004000006000006006004000004000004000006004000006006006004000006006006006 006000000000000000000000FF70340000000018004018000018018018018018010010006002006802806004006000006806 804000800000004006007004000006006006804004006806006007006000000000000000000000FF9D3C000000301800001800a7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A66B906A296 01626685628C0873AE0C6006206540806486786006006000000000000000000000FF17F10000000018802018002010018142 0181184115008564461469201261541564109165063148A500AC20B46A0828224601140741600600600C02610E8060060860 08000000000000000000FFA60B000000001828019A224014418202118038091CA0116202B27024106B0020686000684880C8 04202000926006A020061000060062060060050A601E906006006000000000000000000000FFF959000000001C4A40184408 1811840003905943800104650444644342640608E09480E0100A400822AC1422504040A41700032E086006406000447486000067c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C7190180510 1901040069E8021060048060028080068000060802A282605770422E29A20480600600700680400040660E00600600600000 0000000000000000FF47D6000000001800001800000801801801001E01930000701000E8054068430C085700008200600100 A84600400084200500FC06406007006028807106206006086008000000000000000000FFC0AC000000001900001800000A01 80D80000982000000462420A614812789600640632E200A0E00800640F0AE000006024806106836006004280826806086006 006000000000000000000000FF930F000000001C0000180400084180188800982280005A60B801E2986AE0AE0AF2CE66F2A200e7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806000000000 000000000000FF90730200002A192052BA40245D15A09A0BC01AA080001068A000632080F025100242810C0350EC008D6402 C268C8822806432286006A86C568004060564A680E206100000000000000000000FFE868000000001800001C001018019038 418C1809800020601521601748609000E01620612882011020200600600100E2A600402E08600E08604008EB060162860860 00000000000000000000FFE6B2000000001800001800001A01E01801E0180180000060058068020060000068060078028000 00002806006006006006004006006806006000006007807806006000000000000000000000FF9BE1000000001804001802100017c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000836060024 620020A204290308300255A010082042007003082080000000000000000000FFD6A800000004190010205598001018211102 002400000804014081084060600160404060A404C08821404104000601040110C0A000000828002000818002810000000000 0000000000000000FF20790000000000000000000260000000000800000000840100200A0028618050640000600800020006 0010330096400241000800800000000402000000080000200000000000000000000000FF894B000000121800015800001981 801821801818000020600080605400E00408882220020633000000680240600616A006A3260E016086026000806A06B060060097c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (881909901889 800008629600600652604600405400604600440040E48C896006006116D342060160061161108060A6106486006000000000 000000000000FFE7EE000000482880414C14C10C00C00C40C00C248000023002542D5300348B29250320340B4B31290C2023 44342B2CB44200212220200324340100320B002002202000000000000000000000FF65040200002042A02A022021020A2082 083002C000009008381414A0900C1880081C800C00880C50D08900000808800910400840C00200800900A00C38800E88C000 00000000000000000000FF5B21000000080800008800800800800842800900800080208300300404200000130200A05240210057c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF41B20008000AA0AA0AA0880880A00AA0042AA0A000000002A82302402202002E83802C82402A0000208D288A80 883200402200102A80001100002A82204102A8810000000000000000000000FF9895000000200800200A40A00C10C0088480 0A10800091280310200290B04300282282288280282108208240280280B002912802002002C0280080288280A8022A200000 0000000000000000FF71B00000002004004012022242034004504012020000A450008140CD00109500480C80083081480084 0C04000C40880D48004CD5004004950C00004814CA5004814000000000000000000000FF388200000004180010182190589100d7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80410D000001 0200001000000000000000001040020000220000000000000000000000FF92170000000AA0AA0AA08C0AA0AA0AA0880AA090 00003202A92400882282A82892A82A80082200001202A8300088A20008088A092A80002282002A82C90802A8341000000000 000000000000FFEEB700000035415435431033433435409015430C0000A40D50CC0400CB0C10D10C00D10890D50820A41008 400D50C40890D50520550000A40C00D50510900D51100000000000000000000000FF85530008004004004004004004004006 420004400001001000100C211010010400010011210890104010010490200811212000A000100110100100100020800101000037c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (430012000000 80100000410C8090050040008010308A091004480492C800880D4CB20104000800800C00000C44CA080080C8000000000000 00000000FF694C000000000800000840A00800800800A008D080001020028122221420020028020420820020008820020020 0200200201203200000015200080211200A002042000000000000000000000FF52090000000AA0AA0AA0C80AA0AA0AA0884A A00600002382A82B18002002A82A82A82886002081012182A82006A8238400040A00AA80002000002A80000412A828000000 0000000000000000FF167500080000000000002400000000022040002000000880000010900001400000280002000000001000b7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF35D240080000040040804858048040040140403000C108108100128942122111168000100124132900100504421100 1001001001001001009001009019001001001000000000000000000000FFFA76400000000C00450800C42C84C14C00C00820 80810C353300300302343302314214B31310343300320300240300320300302301100150300308B003103023013000000000 000000000000FF6F2D00008000980000380980181190190D001801820020600610E4AE09608620400620600620E00034C084 51400608E00600E10608000800E00000608600E006006000000000000000000000FF90D700000020040020020200040140120077c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (14220E40E006 0862064800000D640002C046104004006000000000000000000000FF9C4A0008000000000200540C00000480000001100CC0 0504A00A00001562001061203060C00204480102000080A61000300001200200000900A04500201082000000000000000000 00000000FF555300000000180002102184500209209000400804004404101080403061083160242CE10C00C0804945005080 061104000000A009001000400010008010C040008000000000000000000000FF19C400008000880000680080080C80090680 0800802000203201040440A1400204120026021B200002200202240A05210001A0020001002C20000024020020020020000100f7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (182C80000040 8600408A00001004600800633620604000605602E20644208600E00600000010200000600600600400600000000000000000 0000FF9A9200000000100002180184388D813903809880090002420644E08620420002600010630E0CE00000021600E14000 200A00E00602008000610000620600E404006040008000000000000000FF2DE100080000100200180580388988382882F810 800039400420008001001C33810000800E20601000618A0A2008346742086346298000006240404006006184006020000000 000000000000FF7D8000000000000400382990180192185084180002202041500802040A4144200450210026406220008002000fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFD763400000000000001801001801803E01001801000000608000380200228600788002609230A08001682E006200144000 054006000000006008004007806006006000000000000000000000FFD1BB0000000AB0000AB8AA0C38AB88F8810AB9408000 2AE14E2AC3142AE2222882002E81024B24002202062160881840042042AE2A82A86620002AC2AE2AE2AE2AE0000000000000 00000000FFB83D20000000000000180101180180184500190180000062420040240020820000C000000200AA001080868860 260144500C400600000000E820004006006006006000000000000000000000FFCD8100000000100000180082180182181180008fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (882002AA3242 AE2A82A82AB0002AE2AEAAC2AE2AE000000000000000000000FF379100080000180000000100400180182380180300040064 1200404400608000600E00604404400001291110002600C4160A600600000001600000400600200600700000000000000000 0000FFD857000000154800154155114155951949955945000055644A55435055200C51644E51642402401414250155015040 C552406556550550556004554556550556556000000000000000000000FF19FC0000000AB0000AB8AA4918AB8A9C890AB808 80002AE0042AB2032AE24E2AE34028E2121020402A622622628E4201202142AE2A82A80828402AC2AF2AE2AE2AE000000000004fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800010610243 40420060040065560260040140204821200080060960860460060000000020C000E00614E00E006000000000000000000000 FF55620000000008000000000000018418C180184980040062D200410A80202000603600633420410814202080002008E006 00E006000000002810006006006006006800000000000000000000FF92770000000018000000000240018018058018040004 0060060044440062020260040260000080000021140042060440020840060000000020000060060060060060000000000000 00000000FFE1390000000AA8000AA0AA2C80AB88BA0D8AB89000002AE0062AC8002AA0CE2CE28028E0000A100060BA042AC000cfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF9F C2800000021801800150001801801821801883000000411608E00600644600610202604C00C00040400E0062060160360040 06006006006000006006006006004006000000000000000000FFD89D0000000AB8000A80A80A80AB8AB88F8AB98000002262 320863062AE2862AE00428E2A02A000002220A22208E2262262C42AE0000002AA2002262AE0063262AE00000000000000000 0000FF63B1000000000800000000000001801821801821000000E00A00608E00203200600600601000030400A00210222000 600E014006000000002004086006406086006000000000000000000000FFFAED000000001800002002004001801801801813002fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E4062AC2AE00 600644A2102AE2AE3562AE2AC006000000000000000000FF844C00000000380180482400280180182180180180000160260C 60020001000060000060040080000480060244000061160860060060060044400A600628E006004006000000000000000000 FF12890000000898018AC0040A88AB8AB8958AB85180002AE2262060920AE0882AE22828E3042C45080C428630C0AE2A6086 2AE2AE0060060964802AE2AE2062AE2AC006000000000000000000FF4396001000551801950B101519559559119558350000 4C648640E44E5504365364D253654C5463403064C8516130556446408556006006554106416556046456554006000000000000afc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006887006050 20000000621442728C82E00080640600600000600E00F10F006006000004006407807007006006000000000000000000FFFB AE00080000380180200200400180182A801825800200623608E00440649002655400702414600C4860201340064060CE0060 0600600608008000600610E806004006000000000000000000FFCB97000000531C01800B00000801C01800C0181100000040 0604652000000600600400610C00E08000E108006240126C0680000680600644200880600604600600600600000000000000 0000FFCD420000002058018A82280AD8AB8AB8808AB88180002AE08624644C4AE02628E0042AE20420620003624024608E00006fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFE23980 0000001821815004001A01801C01011885008001408608643405031644844A2312C600802028C24200601000640600C00600 6000002000006206006006006006000000000000000000FFF58F800000001881803C00001841801901109801004000E04614 600200040E026006006027200101A9610813610824E045800006007806406001847006006106004006000000000000000000 FF1167800000403C01C01204001801C0182140780100201E742661E5021561665161C60170072000C08040C20060E63A7424 80008E80660620600113E007046886004006000000000000000000FFBC9C000000403841E10800000401805C20C01883810300efc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (21612E406092 2020002A6002086506106106000000000000000000FF4D9F000002001801839A030018238418C5801801082002602601608E 00E00000602600608820000800001000E02001600000E00E206088202040006000006216086006000000000000000000FFDB D60000000099818018010A18C1825923901800820008E60626E3025200A83060062A603004022020029215608621E01A0062 060060020A20001A600204600E004086000000000000000000FF7362000000401803C03A000038118018012D593500810060 0F00602450600614000A00020100010005004E4C60061065444050C691600000242040682690E88680600610000000000000001fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000804060 1000610004604C0140002040C40000060005140100000004800100C0000000000000504000000000000000000000FF61A080 000000000011060022C000000000000012000000000000002802612004602800630028023015041034840600004002000000 00485404000004C8000000010000000000000000000000FFBAA1000000201801A01C01405891801801801810050008402642 64043080100000125200200002880004062AE0061061320064060960000C220000602200E006006006080000000000000000 FF26540000046098858450050A1843801881953945882004E2160060C80461202C002200030E200040448142006140406404009fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF3C28000000 0AA8AAA8C8AA8C8AAACAA8888AA90880003022AA2AA2222AA2AA2AA2222AA28220A0200A23024C228A2AA10A2022AA2AA12B 0AA0202AACC22AA2AA0822AA000000000000000000FF184900000040000000420045200000004240002C0002000000000014 02008000100C0010290A0001200128000240000300021000000100088080000001004000800000000000000000000000FF2D 090000000AA8AA8628AA8850AA8AA88E8AA80480020A22AA2AA31008A20028820228A0521620004020520020AA2AA4022C22 AA2AA0024021022AA0122AA2AA4622AE000000000000000000FF1F4B00000020180020180180180000002000012000004080005fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000201100 91000008000800000000000000000000000000FFF3DC9000000AA8AAEA8888808CAACAA8888AA80A80022AA2ABAAA00A2AA2 8228A30A28A0030220000020022AA08BAAA0420222AB2AA2922024002AA2232AB2AA2AA2AA000000000000000000FF7D2100 0800400001200400401201201020401040000205000400400400000400511400100500020881400000804000402009080400 4400804200004801004004810004000000000000000000FFB86F000000555D55951D55D01955955911D55881800055755655 654631643455444455750441644914D40655611655701651755655644644401155654E55655755755600000000000000000000dfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000001A0020 10000404088902400808000301001080A0000040A08000000000000000000040020200000000000000000000FF0499010000 0000000040040040003B81862802002040400460008000001440010009008480060000500840240140A21300280010420000 180100000300120200000400000000000000000000FFD0EA0000004002000022204A42004000022000800000000800000040 000040020000020300280048150410000400000040300800000010020400000100800001000800000000000000000000FF03 5308000000000000000400000000002000004000080000000005000000100000C00008488104012010C0000040000D100100003fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F10000000818 0191580180194594D135CD581188825168CE15641650655784401641650E49600010680640E01645710E28442602D2000162 00006257026226006006000000000000000000FFFDE702002000002000000002021840100108140102800CC00402C0848480 8C685281B4886C2486690200002C050938844008400040480010422808002402408C44C404000000000000000000FFB03500 000010080091280080094280481082480080004020030C340A3220CB02200230202320200080200280221200281280240280 240081240000204A802002202002000000000000000000FF1F3F00000000000000000000001000064000801031001318880000bfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000080 0000000000001000000000000000000000FF41BA000000000800800800800810A2888480080084000522AA00500080200140 080210A20210200080308302201210A80208200220A000080080002084084102012206000000000000000000FF54CB040040 00014010000000000020000010020000405000000308840082B008821020004C048A30B00000A90000800000000008804800 004230820000000008000000000000000000000000FF3B47010000000880884804844A00920C00C18818810202208A802803 80200200310A08298248200005A0C280A74246211B80200206A00086200012204205A602003002000000000000000000FF57007fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (826104200886 00005711644032408A04E05080604304600600420080028800688CC06806006006000000000000000000FF8AE10000000018 0180180180380190180180182180001062960441240000240304464002060061000120060064060061020060A60000000020 0024E244004206006006000000000000000000FF61C900000000000000000000000000000000000000000000000000000060 00006000006000000002000000000006000000000000000000000000000000000000000000000000000000000000FFA98300 000000100100100100100100020020040000000010000000000068000060008060000048000040040000070000008040010000ffc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000188180 1840801800281801C158498000006046C04A0400688220088840000611240128701602840EA0100700214400040000629004 594BA05406006106000000000000000000FFC19300000004180188100080330B219811801C01A0000A63C7826CB22B082042 E2260862860068A800A0028060B61872E23860060D1100600000A1E050082006406016000000000000000000FF77B6000000 001901801A00801A01407861985891800100700E40F00E51F00000601610692E00681082088100610056641A526006960000 400000806200106186006106000000000000000000FFD319000000001801901841801815811801A09901C00002602601420800002040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000806006 046506007916000000000000000000FF95160000000410218611AA001000281AB3881D0180024062166CE0020460860768C8 81619644280800601A2C008680028626340C206E28406003016102801006406046000000000000000000FFD3810000000018 238018080019200898C1C01803808212E3261060228000062064082062060820CAA06080B0832000010E5021410071118260 2000405200600602E006000000000000000000FF4505000000001005801800003842001C01801E858321CD68160240248200 02008A20310C2ED420C24061220482408000170024A400400084602000610204148602E0A6000000000000000000FF96400000802040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0200640410E4 2E2A0408084000010C06040446044000012080204101806202082086026006000000000000000000FF1E1900000000480180 0D04820801C00809805809C00000611618400002023F00E0440CE90600024005C1A0000040C38216804240D0208008468418 71F6002006486006000000000000000000FFBC46000000000801800C00800801800911A11809800088680680C824406CC040 E004006806014082206848000006000002C86407807000084050006806006406086006000000000000000000FF1DFF000000 000801800844804805800805881801842800680601440880808400608490684600480080484680000808042200681622A04000402040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004803880900 0800A382088380D921C80000608E01E03620800A40682700646E38000074680101E00808F2070CE04020200000E084027006 100186006006000000000000000000FF36FB100000244A01840210604801809C29821E01A130027C062270020070040B7C86 44708600DB0002E12E086C27006032206227016480004230004002001046106116000080000000000000FF7C660000000008 01800802000841A01D41811841800008610F0064A240108000644682610EA4C0AA00601700622040702A506006492000A040 28004C16000C06226006000000000000000000FF9775000000000001800800820821A018218018C18010006006005514046000c02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000068070020 07006006000000000000000000FFA6CE000000000001800210200001809840829A0180020464870260064100020061062060 9050200440100600621000604200E04680680000E004006206006106006016000000000000000000FF308F0800000440058C 0020204045841885803B21910300600EA9604E007897517416056C208425008B008C88E046936006D06D0EC16C008864A845 6016802026906006000080000000000000FF9059000000200201800220100101801011D83881864100700688600E00608624 604E00E20683000008604600600602641400608C062100E8600020E20A60001E006106000000000000000000FF58C500000000202040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (625632692010 42045008268400201442B140480704E040C56004816006003006006006000000000000000000FF7CDB000000000001800800 000811805801811885835008642648401455640200E10601621004C00000000641049620600200C00E006000006000446406 002006006006000000000000000000FF46E30000000008018000000000018018000018018000006006006006000000006000 006004000004004000006000006002002006006000004004006006006006006006000000000000000000FF61AB0000000008 01800000000001A01801201801A010007006006006006004006000006804800000804004806006806002802806006000804000a02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000088000 00101821C11091822102E2CE6CE02E2AE22E2AE8EE4A702E02E7680A244C23009E2842AD2060064680202066000060038030 46006406000000000000000000FF8FC6000000000801800800040A01A11AD08C1A059101286416114494C5055492ED001165 5235000C42410EC400C00CE09201000680E04000E014006007026206087006000000000000000000FF403E00000000080180 0A10000A01D0380198BA0BB88029601600440400604080720080608260005024403600002682600200800E00600010E40022 6006006006006006000000000000000000FFA56A000000000041800800000805851B40A05851800042608605512500010E3400602040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000200 6006000000000000000000FF2A5F0000000000418008008008141D1901A81841A00000604604450480610B001006C1040490 6A00A23028810C8E806086806006A0A00094C000016402022206006006000000000000000000FF321F000000600001E00800 840800611881801C09800048645600400540080302010748028D007089002084021000016002016007000020006200006002 002026086206000000000000000000FF3EA9000000000001800000800000001831C49003910000600632E2960304A608E446 00E04634E0400022064080410A6017006806022000804010806002002006006806000000000000000000FFCB1B000000000000e02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000A802000 0068000861064160260020A62060002A6400326024004000806006000000000000000000FFCAB7000000280B41A80A8CA82A C1851D05A95A939400826CAE224CA482F025300A00808C4A082C30A86540906800806912A92A2ECC60008C6A80D06B348049 30227246000000000000000000FF5A0C000000000801800400808009081829801A01C00250600601780608628800E0810860 8220E00002F0002460492C402400210600A22040601002600092020209600E000000000000000000FF279200000000080180 0000800001001801801801A0060060060068060008000060000078020060000068008060060040000020060000008060000000102040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08808008408C 0808088C00920010310B0000C000202010010000200204224040200200200208218220210210204000210008249205240A00 2426000000000000000000FF351B0000000018018019418C1801800280004000000028000040101017E11000E40008EC0021 81000E4484000066060400080000C640008000080002005A1200400040000000000000000000FF0F50000000000000000010 00812060803400208400014002308112000066482072000060E000040810123001000E000008449208088020410281010100 0000001A8000000000000000000000FF59E60000000009A584080E802881801900841909800000604622400400008449008000902040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00000804004 000000000000000000FFF09F000000001801801885821801851801803801804080644640641610650E004004106006004400 43600440613642600640600608602040600000E106226A16086826000000000000000000FF20BE000000440C84C44C50C00C A0A04D0CF209048C0028208A80A14322B02328A2C3203A230330A908240B03300300B503022083A5221110B48008340B10B0 03403202000000000000000000FFF75A0000002C02002842002002084340025004020C4082148100C524C80800800840D002 00884830A18800E60810A008008008000106101008008008088000B1200A08000000000000000000FF8F200000000008008000502040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010910012411 41001401101080000C20101001001008001429021001001800000000000000000000FF16C40008000180AA16004000008220 00AA0AA0AA00062A82A82102104882082882302882A82A08204800A8220088220128200210200000100000190220160AA8AA 82A8000000000000000000FFA53E000000322A00A00B20A00A48900800A00A00800080280204A80AA0284304280A80280280 2010A0300300AC0288300294208280280000280880290290A002002002000000000000000000FF6EDC00000020020031420A 34C20004D2010002010000004804104944841105004884820000814800848A04900820810C81010854128000AB0800A3481000d02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04200820A200 0000000001001000001040000050001000000000000020110408010400000030050040088000000001040001009000000800 000000000000000000FFB27F0000000A80AA0A80C00A80A80002AA4AA0AA00002A82A92A80B00880082A82202A8AA8240030 1104002A00A8230210A310010200002B00002A80001082A82A82A8000000000000000000FF0C910000003003542003103103 420C01545545540000550551540500950D00D504C0D50D50D510108208A0D40930CD0A00D00C80C40800430808400D504005 50D50550000000000000000000FFD01F0008004004004044104004040102000004000003001000800401200421000101000000302040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060000 00000000000000FF647A0000002022002002222002401012012012010005005004004844C008090449148400009408308492 05114820810804090004A00804800810804810A44804805004000000000000000000FF03CD00000000080080480080080082 2800800800800000200200250A00240200200200200200A000202002002202082012002CB21220021080000024A211200200 2002000000000000000000FF2F5E0000000AC0AA0A808C0AE08A74C0AA0AA0AA00002A82A8AA90000E91A0289230288AA820 00000800B82300882202E0B201104180002200012A81004002A82A82A8000000000000000000FF594E00080004200000A00200b02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A04008210208 20820C202242204200200001000040200211A002002006000000000000000000FF4696400800000000000040000000400440 400400008108108102D2C84094A1001020021081381028201009620010001001201081001001001001001601005001001000 000000000000000000FFF58C400000020800800800800904D00C80C40C40810110B5034031020131334934324CB10B403028 40340B0820420032134030C300300308900100308B003483043002000000000000000000FFD85D0800000038019038018458 0180380590D801942040604405620E12600604408600622603600011604404430611612404600E0060C6200000406046016000702040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000418258018 0980000060040040045084860485040044445460400140400802060060401040060163144884080060861060064060060800 00000000000000FF482000080000000000000008008000C00210200210402002800000000361160264402060002000882400 005102A62100900080802082201002100C8010240000200000000000000000000000FF504200000004180180180184580388 01420A00000C200004244000002C641651629051643004400001422400442E01048800004800012051000040013400048002 0000000000000000000000FF4A8408000000280088286084088084284080A830800020A0420001645024420200000120020400f02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680600000000 0000000000FFDACD00000000180101580004580000184584180180A000600008600240011600609000604C04200000410610 64460464800160064020003000800060060960A6006006000000000000000000FF3C98000000001801043800001840001801 90380580002062000060CE006006006000402004000280004000026020134410206126006044000000086016246006006006 000000000000000000FF584700080000180102380190182001580180186190400061440046080460567880C4190224082210 44C13E43211848432009400640608C2000004560E601601E006006080000000000000000FF3DAD000000001800001841841900082040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2B40062A428E 08C28422E2AF4000020002002AE228B2E2A62AE2AE000000000000000000FF48880000000018000018000018000018038018 01C0200060070068020002860060A600282C88810000420600C00000402C106007080006000000006080A0E0060060060000 00000000000000FF82BE00000008D8AB0B58A80858820AB8898898AB80402AE2ACA043040A82062A82022A82862826002A44 2822608860600C3242AE184000C000002AE3A02262162AE2AE000000000000000000FF916620000002380000180200984800 1801803801A00400600404C12C00604600004200400601690001420000C006114026084006834004048C0000601200600E0000882040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B8018AB8AB80 002AE2A82ACAA828808628E22228AA0624100438002C2266882AC40628C2AE2940002A94042AEA108462262AEAAE00000000 0000000000FFE230000800009801821802011815801831815801800000600400C04C00608602600002712604080000615400 E04604604E00400604A0040C8880007000006006006806000000000000000000FFA7F7200000155954955954155913955951 9559558102556554554D50350056556414533506C064044480AC54615055408444C556426004D501045564428864D6557556 000000000000000000FFDDFD0000000C18AB0818A80C18A00AB8838A18ABC0802AE2A9346A022CE22E28E34E28E21431208000482040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFB497000000001803801824001801801801801801805000650C00608220600600610000608E52E08010E0A444E026 0CE006006006092112000202006228006006006006000000000000000000FF358700000000180080180000180180184B8018 01A14000600400600204002C026094002126136C0402610410604000640E006006802002000A0400614220E0060060060000 00000000000000FF0345000000001801801800001821801881801801801000600680400400620600600602601600010000E2 04016006004146044006030000000100006010126096006006000000000000000000FF3B830000000AB8AA8AB8AA0AB8CB8A00c82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (044061501120 0640E5544125540044065562C6552556552556000000000000000000FF1BAA8000000018C380180000180580100180180180 0000605400640620600600604640400200040000200408600400200600600428A02600408000610600200600200600000000 0000000000FF65A40000000AB8A98AB8800AB8AB8AB8AB8AB8AB80022AE0062162160CE2AE2AE20628E2040060000000040C 408E2061062A62AE3602020000002AE0002AE2AE2AE2AE000000000000000000FF567D000000001800801810001801801801 801801810200602614E04E02000400604A04202400020444040C0044000064AE01600600004200008400608000600600600600282040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8AA8AB81102A E1062A801808E2AE28E78608C2AC40000000205421208C2AA3BC2AE2AC0025860040002AE2362AA2AC2AA2AE000000000000 000000FF4114000800001801801C00001801801001801001804200608400610200000600600C00004820420001202C08E400 2262520A600400200400408400600E002006002006000000000000000000FFB96D0000000AB8098AB8AA0AB8A98AB0AB8AB8 AB80502AE2042AE0A60AE2AE2AE00C0AC2A80AC0802B22842262CC2AE2222AE2AC02600E0044002AE2262AA2AE2AA2AE0000 00000000000000FFEBD1000000355B55D55B54355D53955155955155810055642C526446510556536546550482150086540500a82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF8CCC000000401809C01C08401821C00005905244810588780801014009001600604C12C09000000120E08C45202C0061 0E08703101202C406005006506106106027006000000000000000000FFEA1F000800001905801824001C01800001A0000081 0000640800012420600604602C044000D2808010E0A412A44400600600600431600C00650000600E00700600680600000000 0000000000FFF543000000401C11C01C1040180180020180080180200060A6000200040006006006204804000205442C0C00 2004006004806000042426004004006086002005002006000000000000000000FF3FEC0000004ABA21AAB8804ABCAB8AA0AB00682040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000C41400000 601302A10E2020AA00600601652610C046240000000000000000FF4D96800000001801801810001C00001801905C05908005 60444884001004A010002640421600E0C08028000304842440D000682200E40E000000C06406082087000806000000000000 000000FFBD1D800000001C01841800001C02001009821D018000026084406402040206126006004046082000005446002304 004006416106004006006000256006006007004006000000000000000000FFFDB5800800401A09C21C00401A22001A09A01C 01900109704416608242E14E03E186485426892159104A2620200444404720E006004406004000006086602C07000806000000e82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (811000006016 01004051654010040400400240610822652610441450600010610000610E00E0500860044065062060464000000000000000 00FF8A7D000000401849841ACC0018A004000180989008000060000060060862060060040041061460883160900840840660 00006044012006002000486004266046144006000000000000000000FFF9C5000000081821821822201A0200880D86194902 800061960060EE60808E0060940FC10E0860005BE1162042740860001A61B400206640C00025600400240426000600000000 0000000000FF6AF9800000401C01C01C005218104430838018018003486C140084040060200802460043062360020024500300182040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF DEC6000000401A01A01801801801914000054000008000000400808802600604600800410000421010800C08000400000C00 000C0284002001000000C4220004008000000000000000000000FF8806800000000000000600400400040000100042002000 00A81200004060060060C00060280081000002800500061100C00000801000900800000004081000C00A0000000000000000 000000FFA89D000000201A01A01C08501C0401590D851800030048628000048C0000100000C415421201600000600022C0C4 016000046008042046202100006006014006016006020000000000000000FF3122000000481E11E018800418A8001801801800982040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00F4365572C4 4D4556526401556D56B07D56557D56000000000000000000FFD05B0000000AA8AA8AA8AA8AA8A8C22AAA832A8A80202AA0CA 22220228A28A28A2422AA28A2A2488C0A4C22222AA2AA3122AA2222020821120802AA08200202222A2AA0000000000000000 00FF8ECB10800040020040040040020000000052002000408010401203480200000000002000800085100804490902002800 80001008000000008100800000048001000004000000000000000000FFC9730000000AA8AA8AA8AAAAAAAA8100AA90008881 002AA2022043240CA2E82883102AA2462B20002620323002AA2222422AA23220642202A6002AA04255A60A2022AA0000000000582040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000484 000000000000000000010000081100081000000900100000080B0000500480000000410000500000000000000000000000FF 5FD48000000AA8AA8AA8AA8AA8AA8C28AA80680080032ABE0229208A0AA28A28A2AA0AA24322A0002020222220AA042203AA A0020022AA0220002AB2AA0022AA0022AA000000000000000000FFFC0F800800400400400400400404501201401220000300 4A0408C02C00000404400400000480000088100501400000000000508412C028440001005211001111101004000000000000 000000FF5826800000555D55D55D55D55D53913D55811913808055611440400651655455455615640CCA600043790444615600d82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFD446 0000000000000000002002000002A400022010484800800204080000080000204B0020100000000010030010040800280000 000000000000000880000000010020000000000000000000FF412901000000400000401000000203830048A0102000040000 4000000019400000001102001014020200A0200080040AA8038000000020000012A000003E10B00000000000000000000000 00FFC93809000040020040040040020005040008008001210000A80000202000200200002001301003000212800082004409 20000D20200000008001001000121000051000000000000000000000FF20E80000000000000000000000000000000280520000382040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A2A128020220 83002020002082142192002002000000000000000000FF4ACD140010101801801D11901801901831C898258902A8F0CE4243 4655754400411634E506C8400281614640F4960C6116CA62AE2A60A6006002844087C060A600E006000000000000000000FF ABDA0A000802800200820202100505010522601240618042080B929800821C42C2682202F822D028668230A60A6069044881 08042040000CC2814A400C340000004040000000000000000000FFBF130A0010080800800888D00C00B00808800A14808000 B03220E8C2AB22C220290F00310AC02800412002002422C9200200255254210202200004300280200200200200000000000000b82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000400080 7006006000000004004001004004004000004005004000000001000000800800800000000004000000000000000000FF3BF1 000000000800800800802800800880A30A08800102A0C2B42802002050080308402002002202082802002002002002002802 40200200202A002082002802002002000000000000000000FF656B1400080400040080040400000400000002020000000210 810D100082818280201104A13490284484214204502800502008000401000885001248082000000000000000000000000000 00FF4EAD010000014800804810C02800A3080098C800C64200B0A200200380200208288284281280200008300399A00A85A100782040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF30490100 00001801015A01801C41805C0184100521000062060404AE80640042801400E04694601082E024CD48060404060848861068 06016228000456804116006804000000000000000000FFCC8A00000000180100180180180188980590908108200060060000 064000000000A408648E01004010640400420E10014600C006006006086000086106124006006106000000000000000000FF B2FA000000000000000000000000000000000000000000000000000000600600600000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF0AF700000000100100100140000000000000000020000000f82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500600600410 600020F0364D209608E006000000000000000000FF8414000000001800001801803C41C01801901801090000700022548848 608084080300011629081009200450201014020701600600600211644800708F80600E006006000000000000000000FF2E85 008000001805003801A419018A3A27A2128180204062070010661083062DE0A9406A2641083000620C53C3066100E3084886 1A6004046010041326082024006106000000000000000000FF6703000000001801009801A05801A49841A092038000006986 40000611610610700008E8064208000261B4004066C000020060060460060060008800066260C6006086000000000000000000042040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000881006 116004100000034094084A082B404000E006806006056806006004806106446152106004000000000000000000FF8D3E0000 00001005003021803909841845A252073D204669000200004067074C60BE4C07024060C0082225026C0000640160401E32F7 84046091007046813024016006000000000000000000FFBCB00000000018010838218418118098018A15414020087001B240 408210060062A600180380640002A94400708040602400400640600208610024E016087004006086000000000000000000FF 2DEC000000001000121003C018018338C1C8D8A1050010E140284000A40000200C020401060264200320950024208002060000842040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FB3C00000000 000180000180188180C001A03801811012E400012D1014780600600E0C01148041040108860C0800000806804887A1620400 6040002026002804006016000000000000000000FF9059000000000C07800801821A1D868069A01821808080600000200140 0216C07B020000849042901004100201880804120160161063042061240A210641A087106006000000000000000000FF76EE 000000002800800C01A21801800009829849C000006111002000006406106C00200041004A0500400740542834E146104806 0070064060050A20060C6090007004000000000000000000FF77B5000000000800840803003E01804081811801800000E02000442040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006014006000 4060266421C4086016000000000000000000FF80BC000000000883822CA1089D85C0D88180341100212A760608200F400807 00E00228601010422420090100000622E03688420622E304006105207807902000106006000000000000000000FF8E300000 00004800810A01821803A01835901855C4900068D783644690614E026281816408484085924226000086086C060040860071 485160068521068A2834446016000000000000000000FFA1F5000000002800800801001801801801835C01A0000B6116016A 960A000E2860944C682000400808D20F300C46A36327115116496800006004003126442008006016000000000000000000FF00c42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060060 06006006806000005004006006806006006004000006006004006006007006006006000000000000000000FFCCC600000000 0201820201889A03801841801801A0C008600200740690004700608640F2062064465460440060064C60061068848000C630 600600F106806006D46006000000000000000000FF449A00000000C085814081801B0189180DA81A51A4002404B209684600 710EC4F40E1068168C608400C48D28E006816407406C04C4840601600602602610680E006006000000000000000000FFD5E3 000000008001800447841801881901805005000000600604201600600620680E00680002400400808928810680604620400600242040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000001 900040845805911C41D00015C000100414956457340526126556086006826000806884316201054214004209100106006005 006006807004006006000000000000000000FFDD130000000000018000018018418218958089218850230024406086016016 40E00643654E516500486414026088004004414004200006006006026006002004006006000000000000000000FF040A0000 0000080180080180180180180180100180000040000060060000060060060060060060000000040060060060060060040000 06006004006006006006006006000000000000000000FF00AE000000000801800801801801801801C014018010004000006000a42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (065260000060 0680700640E006000000000000000000FF774B000000000001800011C01C01831C09889881A82048E2260AEEA62AE22E32E7 262A66A64AE2D071467E6C878840200A00A0072A0086006041106446146006016006000000000000000000FF768500000000 0801800801C01801C43821A950219000854150416156C50D564168365561561563048460841080001422421014D002001654 600C00608E206884286006000000000000000000FFD533000000000801800A01803A01809823864823850080410020600600 688708680E00E00E006004086044800000002002A0000404001E006004026006106004006006000000000000000000FFBE1E00642040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600700780 6006006002000006000806000000806004000006006003006806806005806006000000000000000000FF2AA4000000000001 900048841845901D01A85C1185014441170068160070000001060268266A60008209A1046000254405002C12000006006800 0870063A6084006006000000000000000000FFE39C000000000001800001801801829821C01821B000005806006007C00048 48900600710E00602100500000640080440410350204000E0070290062AE806804086006000000000000000000FF11AD0000 00000001800200801801A03C01815C01A00143615740E3360494868064D648E20701648828E20FAA8081942022802856000000e42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001808838809 4A8019418218059C1801840008C112486006200000000006006606206010000A300000064404000081080006060060401464 06014000906886000000000000000000FF8B660000002A0A83A90A91C31CC9A21805B01C318401004442846A068CED09490C 96D0E8070A68080002268808068088410290000410A6816A0082F056904A8C42E086000000000000000000FFCCA600000000 084180082288380181188182588380802A8005286006206006006046026287A062800C90882308264002085060CC10040600 600008628640E024106236000000000000000000FFE6FF00000000080180080180180180180180180180000060040060060000142040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880001080888 0800800C00000000000000000000FF33A2000000000800800810800800808C00800120824000340200220208259000000218 208200264904350262210200200222201200000200210000600230A400203002000000000000000000FF98D6000000001821 9018850020A010440200200810002140200200001470060974A04280010300000240440C400021C2240010E4080020000010 CA02A0400058038228000000000000000000FF23DB0000000000040400200200004402804200040008120A0020000002700E 60E2482000005001008800800180201001084000000201110002010080000003A0480000000000000000000000FF40FA000000942040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004800880808 28480280481488890883088890C004000904004802525004890835004904000000000000000000FF1EAA0000000118018C18 03801901881805901905900000440450600601600410C00650600610600001414400610610E046404134800416806000D064 0608E426006406000000000000000000FF0F78000000480C42C00CB0D00C4082C820820C008241B0A1130232A30A2A8B2034 C3003403A134B002240B44B023443303083A020011020830D004B00320309350A002000000000000000000FFA36A00000023 02402082003882082100402002820081400804940D408182009001008008000808808188088008408008409804008008811000542040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040440040040 040040240000040000010018110D10014000010014410010D101100100901100100100104100000000150000100005100102 9408000000000000000000000000FFCCF00008001200A801A0240AA0AA2AC0AA0C209400402A82202A03204A82A828820022 82A00000002A88802202302902008302A82A80282A80004002A82001002A8000000000000000000000FF175C000000280A00 A00A04C00A00802A00A08C40808100200A80288280280302294A80280284A840802243002802802822202802000402002A00 813002822D02802C52000000000000000000FF457400000020C2042C03084014012012012412150028004885010810A0000500d42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F082A8500101 2A82A8000000000000000000FFADCC00080003000008400000000004040040C0000100001100000010020840000030010009 3000000083000080000800A0B000000000400000000200000A0050000200000000000000000000FF7E3B0000000AA0A80A80 AA0AA0AA0C80AA0AA0AA01402A82A00002B00A8AA82A80082302001200102801202C02A03285082A8AA82A80402A82010002 A80000202A92A8000000000000000000FF679D0000002043542403303543545101541003400000D50448D50C40910510D30D 00D40D40048840D41048D40D40C40C10020D50550308550A00910D50C10A00D51130000000000000000000FF68C70008004000342040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1400400420E1 080064A400C00620600608403602000000050005640608E006096006000000000000000000FF8AB900000020023420020040 14002212012012010040004804A40810820825044948900800A848028C0814814910920B08804000000800000A0000100481 0888800004000000000000000000FFD85B000000004800800800800800802800800800810000210A08E10600200200240600 600604A00800A2421420020120220020028002000000000A20024A2442002802000000000000000000FF90080000000A8080 0AE0AA0AA0AA0880AA4AA0AA0000AA822040222228828828810232A2AA4000002404802102302000002A8AA92A80B82A800000b42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (82C8008008A6 840814868082802056241701106010200010149102128004200000221A2420020022420020120000C0008000002102002412 00A002000000000000000000FF834740080000010000000040040040242040050C08010090080000C00012C9200200088029 0010210010014000B0380491021109001021031001001100029221001000000000000000000000FF668B4000000008008028 00C40C84C04C52C20C48800101345240208205310B4C24C24D22D314344124B0131221220421034430031111410410514030 12423223003002000000000000000000FFD74A00000008380183180188182180110190D801884004400414401408640400C000742040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (264020C22060 86080000000000000000FFD653000000001805055842811803821835951801880014420800620E0A00300100860264360C60 D000610040202608802414C10600044030002000E046016014486106080000000000000000FF5CC100080000001000002402 800009000011400000000000404A021025604E2061000400C00801500A83200100885104100B00002080002004A002840040 80200A0000008000000000000000FF3F3E0000000018018058010C000000008A082020000000444034001014E02615603040 000054829042C1440B000804400C3001401480000002A8230310480000080000000000000000000000FF1F1100000008288000f42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60C600680022 602004000800401604A00E000000000800002006016102006006000000000000000000FFE99B00000000D801043800801800 00180190D80181002480460B60A644002604609622E0160060400123161141060281401040860000000000000020060C4052 004006000000000000000000FF43FB0000000018010018118418080818018018238000200085007006216006407227007086 00E0000A821002010600020000420E010000000200046086006302046006008000000000000000FF7E570008000018130298 098078098118218058238E000040C055604600660016803619E20E60E0000020462140364000160042865802000801000004000c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB8AB8AA8AB0 AB8058AB8000121236D1701608E2AE2AF0C700602E2AF02040A0C624C2A022A2A82422360002A82A80012AA2AE2AC20A2AC2 AE000000000000000000FF7A12400000001801001801801801801001801801804010700400620600000600642E20E00E0060 8042024E05000008201600201400000000000000200642E002006006000000000000000000FFFA1A2000000E18AA0898AB8A B8AB8AB8AB9018AB8120004A842067060C82882884361D66062AE6020C24103042303842062122260002A82A8002AAA2AE20 42422AC2AE000000000000000000FF97D0000000001800001801801801801801821801800008400C00600E00600000020600008c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C00600400600 0000000000000000FF178E0000000AB8AB8AB8258AB8AA0AA8AB8880AB80004002544861A608828E28E00E0060862AF00808 000420222029C2002061440002A82A90002AE2AE08400E2AC2AE000000000000000000FF06D2000800001800809801801800 0008018480018040214100046026206006006006206906006000100004006000002006082086000000000800004006006086 006006000000000000000000FF69A30000001559549558B19559541549558CD155810004C5000D60365505565561061462A6 55600C09610448255044254455620600055055000555455608654E556556000000000000000000FFAF5E0000000938AB0A58004c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006004080004 01201610E4260024040000000002040CA00620408E404006000000000000000000FFA7F00000000018028018018018408258 01805801805022C0120860462060460064260160060060A04164C42C610602608E1120D60000000001400060060CC0060B40 06000000000000000000FF1A5D00000000180080191180180180180182180180A024C15220E20E400006006B263164560068 0001631408A10E02614E0C21260000000000000060060044A6004006000000000000000000FF0B4400000000180180180580 1800001801804801801008680684680604604604600684680600608022002404200000400600E20C0000000008008020064400cc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (590190595580 1155812042E2200161161105165161065061265500042205485064565462264D454600600600014420655611400A51655600 0000000000000000FF0287800000001805801801801841821001941801800005600600600600604600600600E04600000844 80104C6096006446084006006006000208006006004202006006000000000000000000FF895D0000000AB8A98AB8AB8AB884 8818AB8018AB800000602202600608E28E2CE00E0160262AE60003600C0063262060062260160000000004003122AE404626 0042AE000000000000000000FF4795000000001801801801801813810801929001810208628021631602000602610652630E002c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806006000000 000000000000FFE5E90000000ABAF1CAB80F8AB9218058AA0208AB001000627006600608E28E28E45E0464362A8008020008 0062202141040022AE0060060000001142AE4760422AE2AE000000000000000000FF5AA60008000018038018010018298298 018B5801000210611652644622002600622E02620E0040C01040000360060160960060060060040000000240060260A20460 06000000000000000000FF781A0000002AB8818AB8B18AB80B8898AB80B8AB00B030630650E4CE2AE28E2AE0862860862AC2 801042A000E2262A60162542AE0060040000802442AE08608A2AE2AE000000000000000000FF355E000000555D51D559551500ac2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0108302E8000 0080289760510720608280000005E866006402806806000000000000000000FFAFA0000000401C01C03801411E01C0180008 141514000060A604600604000600600E00E40FA2403480D22C01034100B00400380EA0708C00800500740614600700700600 0000000000000000FF98AB00080000180D801901A01813945A00082001014022E08108604642602602642601600600430241 54C52D010802288E01200600600400010A294806016206007006000000000000000000FFF052000000401C01C01A41801901 8118000080010000886008216316000006006106526B0E00000008000000600090C425542006006007000200024006286132006c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A01881811A83 000004612E006486316500000216246546D0A010202C5200E04910508610642650680200800080611624620708F206040000 000000000000FF1886800000001801803809801801841C41921909034142E1120163364201004104060060CE022408C02003 0360A010441600510E006042100000006A06346302006006000000000000000000FFC8A3800000001801811C01801851801C 41841801808124620020600E0002C60460460C60A608A0013021070400002823060040060060239002001060962160960060 06000000000000000000FFAF70800800401C01C09C11A49C059C1B818079638841016012B3654650623E436526086A0700A400ec2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF4456000000401E0388B80190180182193580583180484461022060A611642801002E44E51604E0002364044405 1604000410431601600450000002C316006416016006040000000000000000FF54F300000000180388B8038C180182182399 3805802001640020602600602600612600E00E1260C002E01402020601810001404600600020000012C20640E00610640600 0000000000000000FFC2C3000000401801A018018438DD881809801829880020E64210600E12000E20E19605600650626009 658420048663000202C08E00E0900904001C411609601A006006000000000000000000FF54D4800008401C01C41C09C21A01001c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A2BA28A23220 200211A2AA2AA2020000A000C2AA2A22022AA2AA000000000000000000FFC900000000001A01801805000000002000000000 0020000144210310406006006100520308014040004004004000114004500000000050000000040000010010000000000000 000000000000FF4B438000000000004001200000000A804013402C0108000208080040006046026420010000000300000000 020108020550020000000080000400480000000120000000000000000000000000FF6B88000008201A01C418138059119018 0180188188080060560062162401002002060060264063080860A400802648000204600630610400800000600614E0040060009c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (118B5B558001 D5610E01411435655451410450412450608950652E5464475462864C65575564B60000105575565560065575560000000000 00000000FF1A1D0000000AA8AA8AA8208AA8AA92088880C8A880802AA48250A4CA2CA2AA2AA0822820832A23202A23223322 222AA8022222AA2AA28A0004003122AA2120922AAAAA000000000000000000FF69C800800040040040040000000000044000 000000C800042052044000000002022802020800040080100001000900000001000000000000040000100000028000000000 0000000000000000FFE2C00000004AA8AAAAA8088AA8AA8148CA80008480082AA0420600000AA2882884580404302A20002B005c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF5E1A080000000000000400000400000000008000000000114021031020004000010052030900800080814000001010 0A000080000000C0000000000000000000000000000000000000000000FF93F68000000AA8AA8AACAA8AACAA8AA88E8208AA 80202AB00202600608A28A28A00E016027252200273A0320232221B0522A3AAA2AA2020001802AA2AA2AA253AAA2AA000000 000000000000FF38BE8008004004004004924010010004021214000041004010000000000004004000008041010000800800 000081000D280000040040400000C0045004120440004804000000000000000000FFDB3B880000555D55D55955F55955955900dc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80220200A003 502A02002802202000A02800002802002000000000000000000000FF0D1D0000000000000000000003280800020800800000 810128420010800080000020021D201404900400001001000008800508A8C88000000002080A400100018000000000000000 00000000FFA51D00000000000019000410000040008000E0060200000851801000000040010C006081003010000400602280 40440800000441811000010400000000A303A0000000000000000000000000FFD52000800040040040000020000000004008 200000810002080800400400000404200100000A00881000089301010201500000008000080004080008000000D000080000003c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4820C4A04880 C201208200300210280A80200202A00800204A80204245228200200A20200201208000200207316228200000000000000000 0000FFA996000010001801889815801921801C13249803840013040F424516016094D14046436136CA63282150D642F50781 6887286C8C28E006A0600008602522F2A6006000000000000000000000FFE1860200A00000A00000A00030191011A17A5181 0A00A2114422D02C809A8C2E40A01A86290102A11C4E8018088C88802405404400102000002968468C284000000000000000 000000000000FF753600000800080081080A800C00800C10840800800012040200328201201233200708200A80A040D0A30A00bc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF70130000000010010010010000000000000002002000000800000000006006006000000805004000004004004800004000 000000000800000800001000000801004000000000000000000000FFE23A000000000800802810900828A00A0080092480A0 85008A0000040120002088100B210200A00802200A00208300200200322E8020028022800020060020020020000000000000 00000000FFADF00200C00000A00001200040800000C04C020008009008012451480012B1040B40400C481415401002801008 10101520000000408020000848280D08280000A80000000000000000000000FF60EF00000000080097280C8188A0800C0080007c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (462080060368 10C4200200620080E00299EE46006000000000000000000000FFA4F3000000001801210801A01C4195194191183180000004 17500440007210140504B0620C826500B56A3244C006B010462460C401000090E20000F03004608C10622000000000000000 0000FF3A87080000009801001801831801803811005801832031000600000C45004000000C01610401600800000208409602 8106006000000080006000506080006006006000000000000000000000FFB2FA000000000000000000000000000000000000 000000000000000000600600600000000000000000000000000000000000000000000000000000000000000000000000000000fc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (840080004E09 02140804000000A2A2E2CD00E2C900114000310622E8060A729485200200600031690304E81630E000000000000000000000 FF0A8D080000001A00401801801821801E890138A380A0200216A0102582F00802828A08E14C0060805200080AA086086026 207088028100114000886129046116106440000000000000000000FF2CD9000000001801118941A29805B43805BC18018208 45010608600A20002611702000680490E00850E6A200402E02058600E0202024129161002460025065278040000000000000 00000000FF0B36000000009801001801801801AA9A2120190D8000888006006A06806206096040206A44026200000102204000022040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF65 8C000000001800E008148018058418008D184D802000000E04140000000600600402400620000610400600400E4003060060 02106A06206006006002296046106000000000000000000000FFEC1A0000000018C1000943419801901BE1803A0984200401 467361A2B0700E30625E184C04A0311140640C80662E0D0806F4611609618631610004686604603740460000000000000000 0000FF1AA7000000001A81111801801E41801803C03C01E001A0800600704A40120FC0E4864150AE11342000692D0060C610 1007006206024814004000D0F08480628700C000000000000000000000FF67EE000000001840001809401A4180180181182300822040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00610E282A0 688600410028650E026C46804200000000000000000000FF6031000000001801800800201825903811A13801B00180040640 052400600620605630C00D8040C000C08A80005602680600E002906086006080417202816926004000000000000000000000 FF9E9C000000001801800800905813811860021B018D606009670610108600AF9969020444A74A4408444202008006416E7E B0652208600611E0009060126CE006006000000000000000000000FFFDEB000000021800800800801801801800A218038000 08000F80000400654E0472000040C4148009085406114807080006406846406006006001026102106206004200000000000000422040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (011006006806 00640600F80F005220100000AC4006000006CA604600600204E00662600010E02610E122A04000000000000000000000FFFC 41000000001801820800983C41E81810A11E01A1801A931E286596000C2748662229400208840402418E2082566060A70260 0200682610E005056806806B86004000000000000000000000FFC1F5000000041848C05890841885A21C0182182B92002001 2702E24B01620E246100017090021C880040060A10260164063061062A751600404054750692600601420000000000000000 0000FF18BA000000021800A01800C05C11895C01C05905A2020002074070220000060360D44C6C12410120D3400F0808069200c22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFFB3F00 0000001801A01800801801C01201801801000000200500680200600700600600600680600080680600600680600680000480 4806806001006006006806002000000000000000000000FF54B1000000001811801808101A0182100D221031A2008C0D2E10 604601105620604620608601608408600604602600E3060C0900000406004004206A26806426400200000000000000000000 FFD07800000004384194592004DA0590120180D4858900C020064362960060060CF30F10F456046408C0688E516406946006 C00800A8815683602084E106056006008000000000000000000000FFECAE000000003801C8082000991980180B80B881800200222040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000044004206 004000016026846006002000000000000000000000FFCE52000000001811800844109851805A414011503401454008144849 0A0D0E03654648684608713124ED2634E08602600E4000808012064160004C72A6287006004000000000000000000000FFD4 1000000000180180080002188180100381100381001062A640C28441602650601604E48E40E40008600E0064064062060002 10008006006000006006006006000000000000000000000000FF28B500000000180180180080180180100180180100000020 040060020000060060060060060060000060060060060060060000000000060040000060040060060020000000000000000000a22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (870D6012D000 8600E25604E08E00020880622E0C790E00600E506006446806006001006846842006002000000000000000000000FF261800 00000019018019000018018011089830020A200AE20822EA8A2AE2AE2EE0A609E0AE2884E862E2F61A62D626620E2064E600 E00620E100606046C62006002000000000000000000000FF84D1000000001801800000801C018018018081011000324D4435 4C10510D46316556546D56D100941162864460860860D6510088CC0006004214086006006807806000000000000000000000 FF3939000000001801B800008A7821A0103396588900C020488408402400600600600600620686020008600E00700600600600622040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFDD7F000000 0018018008008018018012008010000000006000006002001006006007806006806000006006006006006006804000000002 802000006006006002000000000000000000000000FF03ED0000000018118018440119118058008180410000220044004004 006020000416446806280000206006416026026807006EBA082000806000156506506006806000000000000000000000FF65 3E000000001801E01800601801801A80A8000100021000244044058114002C00865072468100A008E107C068061070A60170 06006000006288287006A07007006000000000000000000000FF8AD4000000001901A01880001A01E01200E015019002804200e22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (092004603000 10940160728000100000000000000000000000FFD08F0000000059058818008018038098459040811C003000040040040000 1000000600650604000005600600600600600602A94004000000200000601E00431002C050000000000000000000FFBCD000 0000209AC1A24A10B09895A21821A43C21010040088CD44920C860101089168CE826D00800346C0EAB724620E88E4C20B494 4812B2A80000E8AEB16C4084C200000000000000000000FFD204000000001801888820821821B0990B08128A480010424080 EA0604600620622620620E05700000704600610610622600C2002004A000200090680602680210401000000000000000000000122040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4160B9010161 9408808A70810800200818C80580AC0000C00004800890810801080880000800844208000000000000000000FF826E000000 000800800800C28C00800A000408008009002802140004002409000022482002382000022A02012002C03002002492016202 04A003402002092002000400000000000000000000FF9472000000001801848001C000000814B0021461404001016D2A1280 0670061060400400000280108801603208201090A00850241A40084A0000018004840460490100000000000000000000FF50 3900000000000010202004420803420A4020026000C00201009010007806886380220008000101900001008200810649A01200922040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000002002 0420024820100140031500100100800040048D4844820824044820810B0081084044C90C88480488400400402CC04C90C108 40004830000920894000000000000000000000FFC3BF000000001801941801845801815801801101004800C90C4060260060 0401400604611610600808601641640651684600491401440621600008609608E00E256130000000000000000000FFE0B800 0000402D02C00C40800A04D40932AA2E40AC0830204214210B0AA292D032A320344302B08084A142103102022202C0224214 302B0C3010C4B023C23543082400000000000000000000FFDB3B0000002082A02202480802A434010048010800880848904000522040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0900810800D5 0C50D50890A00800000000000000000000FF5B4D00000040040203040040060040060240040000C800000000000100000180 10210010811010010000C9000001129001000120001000001011000101001411001000000000000000000000FFB1B9000000 0AA0A80AA0000AA0AA0AA0000AA0AA00080002A82002100882882C83002004082A00008802202382A8260AA82A8A00010400 4000402A80802A8040100000000000000000000000FFDD2F000000200A00A00B04A00800A00820C00A00A04080280280290A C0280200288A8C284280280000280280280280A0030020828CA8228A2800802C02802A12A22800000000000000000000FFEC00d22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C82A8288402 2AA23A2B0010590A002012A82282A82A90002502002A80082A82002A82082A8000000000000000000000FFA6380000000000 0000000840000000050800000041480010010210804408000000280900080000202880000000000810000010505000281400 00000080000400048000000000000000000000FFA9B50000000AA0900820A80AA0AA0AA1000AA0AA00010002A83480C8288A C82A80882A82202400000212002A82A82002A82A84092803482A80002A92482A80C02A8000000000000000000000FFE51700 00003543543543421545543540423543540000800550510420910551510C00C20940D50801040CD0D40D50C08550D504808200322040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000010180180 180180180188190D0C1801840828600C40641608600408602429411408600048609608620608620620611401600610608000 6446006006006006000000000000000000FF849600000020020C0442022012012004814012002008800804894814C2080482 4D48800880008808C4C088920001000804804244948888000800800020800800801000000000000000000000FF12E3000000 00080090880080080080082A80080080C8002002042102002002002006006006802000002022012802082002002912002042 00200000290A002142002002000000000000000000FFE1430000000AA0E06000AC0AA0AA0AA0500AA0AA40080012A920162000b22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080100110130 010000004000000000000000000000FFD21C0000000008008008208408408C080081000882200820100004C001A440001101 00100801211059200A2124020021120120C201A062002000002202382102202042050000000000000000FF6F3A0000000000 0058000240241841840048445001010011210C52242010A12282082200210080010010014012890011010C10052000000080 01121001560799021000000000000000000000FF33BB000000000802C00842C04C00C00C00C00C0090490434430930C240B1 5343250A02242301284100322300308B0230031030034024C201280103310B012003443002000000000000000000FF93D90000722040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8818021E0664 067470004463321865803081065260040A430028309001E0060246060026C2000080000000000000FFC99900000000000102 1901901903940805821809800A00400200400420831000430630608E00F04000E04203600821040600E00005402050310008 622608C00E08A106000100000000000000FF16FF0000000000001240C40040000901240A200002020D04000000004A600600 E0002803100C0040020108246008080200500090000090030210080240010010110010000000000000000000FFAFCD000000 08180380100180000000008A042021108244050825001010600E0861401083001040204004A41060040A448022001400048000f22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000011805 80180194884084992080024A600684480C0460200442060A600602280000600000600400600602610210600004E800006806 0CE0060C6006000000000000000000FF1F14000000001001022849801801805903805811812000432A116126400006006156 40E44E08604000600200600000000608600801429208202000653620604E002000000000000000000000FFC1CA0000000010 010818018458418018C1111881802000402223622E04604600B00700700600690808620220600000000E0460B008440A02AA 0000600604608600000A028000000000000000FF88DA0000000010010048458818838108010058E984221545B222C1881060000a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04556D5654E4 C6A48006000000000000000000FF6F0A0000000AB0AB0A88A18AB8AB8230A1023888800B30420E2AE2A20AE28E2AE12F20E0 2E2420202AE2AC2AE2AA2A82AE2A6AAF2A60C60A60202AE8242A6226A04004000000000000000000FF2C5A00000000000111 1801801801800020081800800B8CC00400600200000602222E03600689200000600400600200000604610788600400600000 6006006016804004000000000000000000FFAA0B0000000AB0AA0818918AB8AB901818181802804A05E0062042000882C828 800600618630A0002AE2A82AE2AC2AE2AE20EA262264322060002AE40601628624E006000000000000000000FF0703000000008a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6126136C0602 0000006002006004006006046A28326046106000006006006106402004000000000000000000FF5D610000000AA8AB8408AB 8AB8AB8AB8110900020012A061422AC04048828E28A80E0060062090082AE2AA2AE2AC2AE2AE20E0D084E30622D0142AE2AE 20E226900006000000000000000000FF0AB400000000180080480580180181180300804500800060A300500C406006007206 12740600C800006006006002000006016004016006416800006116006114092004000000000000000000FF57CB0000001549 54802955955955955885045133012040641355531015055651210650634EC2400C55655655655255055650EA0020E45654C0004a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018008018018 0181184008900000020040221060060000260421061260060100040060060040160160060060100062060160044864461161 06050014000000000000000000FFC217000000005802801801801801803915005801002012E29202600624600600622640E2 4600402000610E0060460A6006006004096046124000056116002026300324000000000000000000FFEADC00000000080090 180180180180183500581100D808E32A806812240026002206A060AE08480000600600400600600608600000610E00480C00 680614600E0C8004000000000000000000FF39E700000000180183280180180180188184892000020460020043200060060400ca2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C2AC00620222 2086000000000000000000FFF43A000000355B51955B55955955903801880150004049003250642631051655030610620655 00445504D655043651655655445054000E35000444608E52624254A4D6000000000000000000FF6CD2000000011803801801 8018009018038858018000002112006026006006004406006406040000000044006046026006004000000006000000006006 15601200244E000000000000000000FFFE740000000A98A98AA8AB8AB8AB8A18010218AE000224400220E2AE08E28E28E00E 00618E2A00002AE2262AE2862462AE2AE2A022608E20600000400622631A000004000000000000000000FFCD1A0000000008002a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (126106004009 00003100000600600400400000002610000400600428613280E00E000000000000000000FF06070000001458919C58AB8AB0 AA8558118018C000002AE2242AC4A808E28E08C00E01604E20C0002AE3842AE38E2862AC2AC3782A83862200002AE2AC4061 423B6226000000000000000000FFD18A000000401C03801C0180180182992D82B801800000228603608A02004600005644E0 3600000000600600008600600200610000834600000408C44400E002002006000000000000000000FFFEFC0000000018A180 98AB8AB8AA80092184989580802AA2262AE1162AE2AE2CC0D64C60962900102AE2162AE2163162AA2AE4042AC22E2A80002A00aa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9C03C00C02C9 900BB05A009502406B004066224A661E1D4286006806A8C01116C88502700E817067004006006006060000816036C0208300 4006000000000000000000FF1883000000001C01809C01E05205A41823800401804202100400415005008600400600E0D602 608501102E040847007816B16000000096000104027046026206006006000000000000000000FF7C84000000083805C23801 801001801825CC4222000000100C00440442600604422640F24692600000680600604682E006006084004016010000806005 02E406006106000000000000000000FFDBE8000000429C49811A018010018AB8898080080100004084004000000046404106006a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (506002084006 000000000000000000FF486B000000401C01811A8BA009408018018A5C0181001248402A450400649008C406026116202000 11434008700F486800014C028C20880202008A408E00600E222006400500040000000000FFA2B60000000018018018018248 20C258218A9844912024C14004C1104080C044C0564C652E020051004A10A8012603608080400E04620A20028004EA0E04E4 02002006000000000000000000FFEE8F000000401841801805820E40D03009E51832000009422014E00208002620432E3262 0648E020004507281096046087005117026204200401404406112106004006000000000000000000FF2D7F000000201C21A000ea2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860821400940 0041641600604000E21010005002000002600200600420E006200280020000000000FFDC39000000601F0180DC0D90180902 59018A3890820015004244400010614040404640E25643020800433004000648600800600402428008000808608040C00412 41060C0000000000000000FFBC990000000018018018018C104812380580980002000040061060266B600600408600620602 620000400010000600600800600001820208040801601026E61600E0860A0000000000000000FF4DB6000000001883803C21 8210000898AB805898840010E28E50E00E00802620402629E02608C1A810404C22E20600603051610800012200000040E000001a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (88888A8948AA 814040800254622220C31C2CA2882AA0080100C840200000210208A2AA2AA20220222222208A0000000120486522124062AA 000000000000000000FF7344000000201A018000018020000000000880090002230000040020006026004100120000000000 404284006000000104080014004000000000248020020028430000000000000000000000FFF5E90000000000000000000200 4004C0000240C401221000881001000260060062204082404C80200A80502460000000500480801102400000001005000880 80080000000000000000000000FF81D5000000201A05801AC1801901009829811801808000029201454C0204100944861460009a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4104C0040000 00000000000000FF7487000000155D55B55955931811949955885A898042444404556406156514556304104204494000D064 24517557556516556405404556000000556446446096C0D556000000000000000000FF0E300000000AA8AA8AACAA8B28888A 08AA900800810200A2AA29224208A28A2AA0D24C20120CA0002D28122AA2AAAAB28220A2AA2A23220000000A221208220208 22AA000000000000000000FF0C2D000000400400000000400420002000048020008208810800011040004000005044803100 40100500900210000000408008AC00C0000000000000840002200A0000000000000000000000FF6A760000000AA8AA8AACAA005a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00100A805020 0800800108000200C00010000000000000040250011000000000000000000000FF6ACD000000000000400400020000100000 0402080000050080000000000000400100120000000001400C80040000000000000090128120000002000108010100100000 000000000000000000FF9CD20000004AA8AACAACAA88C904800EAA880C04800220224A2AA06A08A28A0AA00E00618E242001 00300208A2AA2ABA222AB8221422020000002AA2323920022222AA000000000000000000FF59780000002004004012004004 240000010415120042004004044004200044000400000480804041000C440010048050490A1004014010000000400084000100da2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10100808B10A 42CA00C0248650A2A20CA402C0E28322ED0600200084A08200244214200208281040300A8220008020020030020020000000 00000000000000FF96AB00000000002010000002022202A0A20040080100008001800010000140020800000849C282AA0004 00000810000230010080120800A00002888008000000800000000000000000000000FF8C0B01000000400020000440000001 000003014404600805001204004008000800680004004800004010018A8C400080000000300000000000012004C0A8818080 0000000000000000000000FFDD890000004004000000000041520340000120C400C20800200004804400200002204082400B003a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF71FD01000000480016480088000A082810E80A08C8402A204A30282A08221280204200214202200900210200 245A81A42A002000002022002028202403782102002000000000000000000000FF70DB004094055830501845950332323833 953855CCA0516B06556554957C04D5611704E52C506B0004740400E80E10E40610E12828680680400008E10E216006006000 000000000000000000FF35AC0800000A800208300000200003178B02200000810080200288840081EC2A8EC46A80A8051AF1 014BA53C84408402D4001000040010464280400009101100004000000000000000000000FFB96000411204C808000842890500ba2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006000 000000000000000000000000000000000000000000000000000000000000FF62FE0000000010000000010000000000002010 0100000000000010008060060000000008008000000008040060040000000000000010010000000000048000000000000000 00000000000000FFDFAA000000000800000802A0041200A800908B42AA00953312C020041020010814000002020420008020 02C02002002002802800002002002028802022002002002000000000000000000000FF561710000015000400000010400054 00820442100100A00000848B504094C02289042B0810C0155040044008900000015080080800002002028020001000000000007a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (58A980088080 0200E006044466B070AE400427084006426000306008A008A200600600606805000200A00000A00680659610600000000000 0000000000FFF1EA000000001840001801920040001951C01909C2800AE106C1491040E4881048080C482E80E002A2E81624 8231146046087108802812012402882406001044436000020000000000000000FF6E2000000000188000B809800002009801 813841804000640E10400004004000C0A440C2860460A000650000608000410605600010000202200005210E000004006000 000000000000000000FF0C1B000000000000000000000000000000000000000000000000000000600600000000000000000000fa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF74D1000000001808103821808000003801851825C0420C410ECAE2A1928C904A20C428700A047480006040C00084 82703600A00000080712200010702B156846006200000000000000000000FF14A50000000019000158118400004018018018 5180221044065078080A6C0028201000652A00E08000E280037A140C60A60121000800070424000C729700624E52E0000200 00000000000000FF8C4600000000184000181194006250B845A0A800A68242708E02C286008006008292A3C946B060308A60 060060021044065E694082A14B002100053102006406016010000000000000000000FFA0060000000018200018018800000000062040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0402600004E8 0610600000600C00000100E00640E242206200000000000000000000FF84A700000000180810184000030020180380B00102 0000400630440000802700400400414400408400680400020004600600600000680400000580640609600214640000000000 0000000000FF4A9F0000000018000059919024C0505899882858A0C001C22604600E90703645F15616600014C0002E618682 6B0000645605000002F0070068080053420060062A6000000000000000000000FF2B110000006018400018018520000018C1 F208028081B444D600E9360204871070022160080142083060272400000860062800A004E1260A70900D601682642640E00800862040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D1004000C101 750E4143468C0416000202A1400600624880610408008602410608645000F02C00402510609221622A20E200000000000000 000000FF1E09000000001800001800000600043E01A8160161100442C6006000126206403010417000445000546084486086 806086202020086C4700210090795280700600E000000000000000000000FFC0120000000018180018404400002318698110 5100402940360179090181769864401E63E02940500268652000060060062105100961060020C50460228460168060000000 00000000000000FF66190000000218000018000000200018098050010000505006204450006006041004004C04104C00007800462040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF1A670000000018024098020000C00418458000100401806026216666806206C0600E00F00000C20804600400E01E0040 0608200000E02E10E00008E413716026016000000000000000000000FF4EFB00000004182008388000006048DAA18060B008 002C70060070062001264E2056086208854004D2700404120603600601032080670400408407680206E00308600000000000 0000000000FF8EA800000000190004184003400C04581384000A054004E50E02C08E00F8964150C320502652710109612584 6826C97807C2610012600748622000624A087006236020000000000000000000FFED0B00000000180000184004000000980100c62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600600600 6000000004004004006004002006006006000000000000000000FF9F40000000001801C00800000001801801801001800200 6006006004006006806802006006806000006006806006006806806000801004006000806006802006806006000000000000 000000FF1120000000001881849840250011A01C89A01003C80200E806246806C0884612600610640620601400E000000206 236006006800100005404404007024022006006006000000000000000000FFE1F2000000001825904904004105B0D801A430 C1A121546D36006096006B1680E92E20F04E13650308612004E046104806B46CA0028C3480E1220CE006002026D26026000000262040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (098A01227206 00E06402E20600601430600600600800680682600604600600600800060601401108E0801160040060060000000000000000 00FF1093000000001C41C05800000081809C0990900990004365460D68169402A602610044F116A170320A62802A804EC8C0 565072085100048A600600680F002804007006000000000000000000FF68860000000018018018000000238A392184112584 C010601640630641601649622000622604640040600E0065060060860260000000042060000AE08600200400600600000000 0000000000FF74DB00000000180180180000000180180180100180000060060060040000060060020060060060000060060000a62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 9869000000001801800801808101A21801801001B04080622E08605605002615608A0AE22E04E250206AAD0A000680600E02 6840200003006028807002006806806006000000000000000000FF3B49000000001801880809800081841D01C8902384A008 E49E207A8E2068AF6AE26E8FF2E60367202A674C0C66EE2EF0FE2860000C0000086058047042012006006006000000000000 000000FF0E08000000001A01A01800010081801803C01001D040006847536354CD054715651410640ED46056546010900006 0072064C604820000280400608E008A06005006806000000000000000000FF4B1E000000001821900A10000023C2B8A5801000662040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02E216456000 00800A20600003614228600808E02E000000000000000000FFDCBE000000001A01A01001800001801E01801801A000006006 8060040000060060020060060060018060040060060068060060000000000060008060028020000060060000000000000000 00FF0EF0000000001C01804801800001901815A41101820000604694E206906000806121006816E96000006104C16A260070 06046408430002C56000847012B1F004806006000000000000000000FF898E000000001801A00801E00001801883C01601A0 018078062261075003014062040070070061001270040010060444464860000000000060000AE02A0030050060060000000000e62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001004003 000060060010680000A0028001A80240006420018220880010000208300010808008080500800800000000000000000000FF A22F000000001A21804031804003801881894005800008608600600420000000600420620600602000658C00600642000620 60004401E240600000640242400000600E000000000000000000FFA2E40000002118A1A00201800501D21D21A822C180408A 6A86C86844B1680884EA40B26A2E82E940016A04809346A070261060002A0CA288E800286A0A856C00426006000000000000 000000FFF3750200000018038B342188000381180D821805930000E017006C0400688628600E00608610700030690C00000E00162040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF5F50 0000002401830422041000002003482032001420961400800000810098000010080940C40D10509000858900800808808000 880800888800D80A80808A00280120000000000000000000FF964B020000008800810800800100820820C009008200402002 282002002C4012A10410200200204000200200220200200250200002801205200104200224200882B0060000000000000000 00FFFEC50000000018002080018000800880020200C0088000820801102018E9072C12014204180900810000144060882404 40020000300400000000230030110000840010000000000000000000FFD7D00000000044500A00000800001000001000220000962040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (022A20008888 22C12800C12002912002002002000000000000000000FF44A200000020000120020000000140140120120000808080009008 0082080492092C9409009008C0004A88A2084C89100480C000820914920A009048048208AC004004000000000000000000FF F005000000001841801801800001901801909021800000690640610601640412611640624E00614040604620650642602600 60100802340960004CE014226106026086000000000000000000FF2EA7000000442908C54C14904500C00D20804C84940154 340300B00310214B00202308310324B41090348B05300301340330200042110324301000340311320280201200000000000000562040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0D50C00C00B1 0510C80D08C00C08D21440D50908910C40B08550300000048A30C10C00CA8D50CA0C00550000000000000000000000FFED90 0008004004004006000004004004006404000081001001001001000801080501001041001801001011041021000000001000 001011121000101801000001801000000000000000000000FF73EC0008000AA0000AA0A80000000AA0AA0A80A800202202A8 3602A02882E82082403002082000002A8020088300020AA88000002003001000820202A8210A002A80000000000000000000 00FF50DB000000200A00A00804A00000C00A00804A04800088280280A80A80200280280280A82284A400802802802882A02000d62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFB20B0000 000AA0000AA0A80000000AA0AA0A208680002AA2AA2AA3000C8A884030E02AA2022AA2002A84004882102A8AA82180002002 202001822208202414102A8000000000000000000000FF4ADF00080000000000020400000000000020000000200000000080 B00208000480000280A00081000002402400100408010480012800000400800000000000A8800000000000000000000000FF 1F990000000AA0000AA0AC0000000AA0AA08C0C800202A82A82A8230288AA80280082A83082A84902A80C00882802A8AA932 00002C83202082012282C82880A02A8000000000000000000000FF89EC0000003542003541502000003543541523540100CD00362040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (210904301300 305141300200B023013000000000000000000000FF79D50000000019098018018418000038CB921001028020422400400600 608400C12621441420C308406006506206006046404000414086424400004016086006006000000000000000000000FF72E2 0000002002002002010004004014002012280140800800800800800044D08C088008C8800903000AA8A20850800004144800 10C800844A008042048C0A84804800000000000000000000FFDC730000000008008008048008000008008108018000006006 00614A42200204600200600600600800200200210200200280200004209210A000112112012032002000000000000000000000b62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1080400A6126 10834000840855009012448C2062C4020010004088404090040250208008100240008000000000000000000000FF77A70000 0000088880080102080410690A822C0008010010012303020020511601034611410500002120020E210208223220200012A4 02202000112002002412002100040000000000000000FF137540080000040040040000040040040040102012200002880110 88349208201408280020001221009100009008041001000001005001001001001000009401001000000000000000000000FF DCA5400000000C00C00C00800D08440C00C02930804011210A5434D241344A5430120C20421430410D340A02B0AA1034130000762040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (690700080000 10418079058A8900001805828007840015E2CE0A641C19648004600201600660601211615A2880401060064001804044FA20 A10200200E226086046000000000000000000000FF1CF4000000000081809021909842081951024011800000600631610400 014049610222600608E00002600645600000400610000000800249200000A146424306006080000000000000000000FF54DA 0008000000C000812400012000004A002010042054002040022040E406208010008000100008120140006220120000480000 208000100100020120000000040000000000000000000000FFCDF9000000001801000001800088020120100090008051004000f62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006096402500 2AA0462022462AE2A8000000000000000000FFCE19200000000001841805800800001801001921802000600E20E08E406000 02E00400600600688000230600600608E006002001002406022A0000240E032116006000000000000000000000FFA8090000 0000100180580180180000180100D00D80004D61460260240200460860CA4A625632E42000600A2260004260060040000000 2A510100002146106026006000000000000000000000FF705E00000000100180180182180000580180940180212072970260 2420601700600B0071270260020060000804800460160040000801020020000A2016004016006000020000000000000000FF000e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5415053652E2 9434E54E44E2845541165105504C65565500000001545520045504260C44CE556550000000000000000000FF1F640000000A B0AB8A9CAD8018AA0AB8AB093489810280F447026A064AE2AE50620505602F4060402AA08A2AE2A83362AE2AE00000602610 80002AE29650220E2AF2A8000000000000000000FF0A2F400000000401811805801800001801431021802000624E22E00640 000600602400600608601000220002000000E00600600000620600028000600E40A006006000000000000000000000FF355F 0000000AB2AB8890A98008AA0AB8ABAE18418080546306086206088288206A4400E1860061002AA4220882AE0042AE2AA000008e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001801 081A058018000018010012038034206206306806046006426C0404600608E200000300026006336006004000000006004200 002096046116006000000000000000000000FFFE6C0000000AA8AB0010A98018AA0AB8AB8A110180000460060062AE08828E 8070840060060070022A80600882AE0042AE2A80010000062AF0062AA30608E2262AEAA8000000000000000000FFDC530008 00001801003801000800001801001003802000601651613400600702E894306A06156C000040200060000060060040000045 04040800000006056086006000000000000000000000FF80C200000015495514395100095415595510500B810030E1061065004e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0E0040000462 AE01E2AE2AE000000000000000000000FF1551000000004801801829041000001925041025808013611654600E4000460060 0E13610E10600401002000009604E006004000100204404004004006526006006000000000000000000000FF23D700000000 18438C5883804000001811009001805200602600600402600644610640642640E02000440E4260460060060840000140A612 C000336006006006006000000000000000000000FF768C00000000080183380100000000180101514981009368B683600420 002611602ED17336A2691000400E2000060060060040000002CC004904004046406006006000000000000000000000FF797C00ce2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C2AE01632408 609628600020604028E2062AE2AE0A600200032C24E0002062AE22E2AC2A8004000000000000000000FF0F27000000355955 04DA28150001955905951025804011611612642E5105162064D610630E50602455600E51041604655644E0005402A6146004 516556006556554004000000000000000000FF23D98000000118018010000080018018018030498080026006206006004006 4A600E00640602E00808E2960460360040060160020A0006006000046006106006000004000000000000000000FFA6280000 000A988980910188D0000AB841087099800024620640E2A608E28E1CE2260060060760002A058608E2467842AE22C0002300002e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00001801201A 00008001A01C01809C25808013711650600602400600608413610610600002E0220400060040063060041080041060001260 06104007004004000000000000000000FF4DC40000005E58AB8AB8AA0800018AB8AB893889807020660605E2AE08C28E08E2 2445604E0260002C608208E30E2AE2AE40E00661022630600031E2AE2242AE2A8004000000000000000000FF760100080000 1801901A04000001801811801901808040624600E10402002601600422E02600600200604004008600A00610600000000C21 6000006006326004004004000000000000000000FFB9D50000000018AB8AB8AA1220018AB8AB8C1903801048E0CE0862AC2C00ae2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408040601640 6002100006000000000000000000FF84A0800800401943A01D01800003C81C39A694319A2004710618641612400645E62610 600E00E04090F0060972A06028660460420E000606400004690620600B090004000000000000000000FF4494000000601802 001C00000001C09C01889901804020E24E01610400C05600608600600602621400748200084004600600600600002C004025 006C4600E015005006000000000000000000FF076000080000B800801000022001801801A218018000006026026004204026 44601640642640E00880740820614000680604600604010E02C000006006016004000006000000000000000000FF9D4A0000006e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60619E09600E 10662800610603600800600602602E0000520080C8286006016000010004000000000000000000FF6567800000001821811A 0180000B94188188B821850040608E2164060140000AE4444060464560012D6D4E2863460220062065041400060040008264 16026082B2E02E200000000000000000FFC13F8000082018A1801881800001A09A01801881800044612E44E2165045281460 042C62A602604814624E0000160210160460420000062041002262B6006002006804000000000000000000FFA5DF80001000 1E01001001800603881845805041850000600622604624428608604E4362AE09600103602E081D0800700F8060001000064000ee2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1A0180124180 2109941841801001880000602E4862040140800C60CC00602600641010E22604614004400600622C02008A00011040620E00 2004084026200000000000000000FF8CCE000000601825811C01808001805901915005840028E50604600402444020600410 E0163560404260162800002860CE0061061000024D0000156006042084410006000000000000000000FF4FAE000000001801 181C0190A005801821801041810008E00603607452400601640640E0060860000061060004102860AE44600400008A2A0000 00E006606000044016000000000000000000FFDAE3000000001803801821880081803805905013890001662608614C2942A6001e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000008A0 088000000000000000000000FF9B200000000AAC009808A88000AA8AA8AA88488800002006000182022AA288088204450048 0204002AA02208A30240A2AA2AA1420002023001C02AA2AA2022C039200A000000000000000000FF1DF10000002018458044 0180000000000000402400201301105400080040060000001301001001420000100460044400000000100000201100020000 00010000024400000000000000000000FF96A580000000011003000200000000000002800001000000200000A00060264400 A84004204084000004804060C81000000005400001100202400000000C00480080A0000000000000000000FFD20800000020009e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040004000280 01005440001020111005004001000500014400004804000915020110000000000000000000FFD033800000755D4D95595180 0555955955955825014015411412455615655420455610430450410955644E537C0613755755630600055644E20155655652 6416A06556000000000000000000FFB6080000000AA8B282A8AC8000AA8AA8AA880902814048A0CA0823022AA2AA0122AA08 20922820C02AB08A2AA2120422AA2AA41200004A2220002AB2AA2AA202202222000000000000000000FFD5ED108000000200 0004040000004000000001000000400240008000400000010000228030000401000100000088001001000030800000100080005e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000402000400 2000000000000020020020000000200000440000400420408510800000400040148000000080000008000201000000120108 008000000000000000000000FFDC3900000020004C0000000000000000000000240100110110540000000040000000130100 1000000000D0020808200800800020000100088000000000010040220000000000000000000000FFAA3D8000000AA8808AAC A88000AACAAEAA8AA899800020620640E2AA0AA28A1CE2AA00600E0760002AA20208A2C24022AA2AA20A0002222220982ABA AA2122038C22AA000000000000000000FF5D0E80080040040000020000000140100105004800000200002400500000044A0000de2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080100045800 00040000000000000000FFD555000088000052814902800808400D44800912800042AC320A30CA02700288E8860028020260 80D0320200300202A80204200A01220200A080012282802202282000020000000000000000FF72E100000000000000002002 00000AA0102840203200080000200000010D10200000000C2909003003010080000000000000000000100000000080001000 0000000000000000000000000000FF0A6600000000008038400020000210001012C05040000000008400416C013001062982 0081040000000000288000000000080000C00000080000660000628800000000000000000000000000FF9B15110000000200003e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004044051220 0808A01910020530000048400000000022A00010000004000000000000000000000000FF6352000000000000904804800800 0248008008008560022C13642002402002802C0240200220200000200221208A00228A7A2003002002802280003E03462002 102000000000000000000000FF4849000110000155A0B8A5821A10623F55A539558C0053685734515600C4D4516956026126 14C1488C70060060060160060A600700EA0680E00023628F227206006000000000000000000000FF5D8C0200000000015080 2240200E11B0033210002A81A086880840805C82240A04A12884390002A961450CD1900006102400003C005000904120800800be2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000060000000000000000000000000060060000000000000000000000000000000000000000 00000000000000000000FFB76D00000000000040000100000000020000000120000000048000000000060000000000008040 00000800006006000000000000800800000000800800800000000000000000000000000000FFB32000000000000080882080 2C044C080C242850800082300200200202210081100080200A00204100200280200200200204200200200280428002200200 2002002000000000000000000000FF73530400000000000000000000080100010800000800A100800840A1091C4892014011007e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00610400000 0000000000000000FFBB93000000000001A01801A0180000582020180180002240A2E0440640044742004624411690808084 600660001600600600614600600641400069E802E06126006000000000000000000000FFFABA010000000503841A81801900 249A40103B21A2C2AAE31600300E800000024B0508404640628840E506100106B060471060174170460240A0806420002026 206000000000000000000000FF4A4800000000000988000100180008189202180B900200604611200601010811400C214006 05004008600E016006000006044006046006006000086000152206002000000000000000000000FF687F000000000000000000fe2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (206021807406 00103620402603602628E016006080420006207006346000000000000000000000FF4C35000000080009801805881832001A 04801800A000C060879008858032308A20014CE4AE20720828600602804600609642601690780E0060890268274460062040 00000000000000000000FF7979000000000509D41A018011000458088238228C4000E40E10020C20A540002D000A600ED404 1130E29608E00E50602604603644E0260460C0002427046486206000000000000000000000FF092E0080000000079010C180 08002899828818C984800D404240E04600010E29816E80C0A68000200261064078864060468845C641600624C0009040020800012040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000B801E9 3C41200400E00C80441488080600100653445400280C20651600600700400608628600604410400401410601620604604000 0000000000000000FF208300000008024D801805801E00001801A51801000184600411411401004600408603404C10220C00 6106021006006206206306006004006004006006046006006800000000000000000000FFFFFF0180000024219218C9867800 18991D8ABA9A988058620A40E64C20A10620684AC06004886020506A0641600E00631600E016007006046611304046984806 025000000000000000000000FF34C1000000002001841B0910184C609801903CC2C48001654A00580420240FCD600A08628400812040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (304080000000 000000000000FFBED5000000000005801C018018000018218A99310805127108A09406826006044014CCC20E88320020E00E 80040C00628600482602E00C004200000106026206004020000000000000000000FF836D000000000605801A01841E00041F 0080189448820A648484E0040423164461468060044D200404600600640E08E28640600604640E02400080480600788E0040 00000000000000000000FFDF56000000000001801801C2181822B85084380000C200620542406D0820EEA038B600602522A5 488362860601060060062060469960268A446000600604E006124000000000000000000000FF818A000000000001803C014800412040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C4807106A064 0601422E00608629440FA2A04408681680E006084106000000000000000000FF222200000002044188590100180850581980 98105C20147A0008289692600680682426600402280408600620620600420620400628680E80E00000460E40E00640400000 0000000000000000FFCFF7000000000021A0780192B820483933E21A0400410B600800020E08660600200408680C08236500 680600010411600610650700E404006004814006206116104000000000000000000000FF216F0000400000058118C5801804 021801A0395545044160C022802641788E22829400DA4700209402628700600600E14E0070C6046C0624402488890600610600c12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001801001801 8000006006002006006006006006004006006000006006000000006006004006006004004000006006004006004006000000 000000000000FF3322000000000001A01801A01801401C010018018010006006002806806006006807004006806000806006 806006006006004006006006004005007007004006004006000000000000000000FFF28A0000200000058818058418010418 0120352380208061068864060461160460D620700610600C1462060000000060864060460400040020060161060061060040 06000000000000000000FFBDEE000000040401810041815E34001A43029001C100A1724E44E8A641620640E406896456046200212040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF60EF000000000009904021831AA34218192C18098A40846C061868208068868060060040060860040060060060 0602400660400E006080700004006406086806806006000000000000000000FF3A15000000000001A01C01A01841001AA110 B203C0000061568160105060B632620E88E0568462A00062B612842088E406008006040806800000C0700688600600400600 0000000000000000FF4B260000000000118018218218830298050011518B1030E00622654002E40600E12624630611600045 600640608624609604002E000086000004126006006006004006000000000000000000FFAD9000000000000180180180180100a12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601600040000 7007005006805113806288026006006007014006000000000000000000FF3872000000000401800201A01A01603883011145 90025265361032300A64A609644604624620E29008E0262000204082A6006006008002402040806806006006806026000000 000000000000FF8857000000000001801801809801015EA712F0E180822EE2A720A2886AE20EAAEAAF3BE22E02E2E023E2C6 6862A72DA6C602E006015003002510246807016046414046000000000000000000FF6147000000000001A018818118010218 810083159000C86D56326D5094ED56D5734E244556257B144C6016028220406106086006006110402044006006006006006000612040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (03C230D1C800 00600629600650630E28F94620400700600024642E00000820611608630622614210C02821240214708600E0160000000000 00000000FFADA1000000000001801A01A01A01801801A01001E0000060068060060060060060068040060060000060060078 06006006006006806002004000002002806806004006000000000000000000FFC889000000000001905C01C0180141180140 20058042806016243000A06049006006A8E90680600080605607E006026816880846044802106000146C0680F026A0600600 0000000000000000FFA634000000000001E01901809A01029801080611800300600682208100E0002460960071170260412400e12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF693D000000000002080280202220002140042080100220801800800008900E2582004800101000100005200078961A 0208200000420000020100010000519000478000000000000000000000FFE97E000000000201800011801841181801134003 8AC01460060840AE60600008608634418603600030600608E006040806082C060060022060200047400A208E006406000000 000000000000FF0559000000000141A0582982B951411B09311A058480D36B36824AD680E800846A06904936A2ED00917006 8881008A2426A54056916A0AA24800824888A0AA4EAA7206000000000000000000FF57EC0200000002038C9881801803883A00112040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (34203324A002 00A0034430024030110031234D21130A3202000000000000000000FF7EE902000000048020026124000C2004840002000002 820880240940800010100400800829000841408000D40848C000A0C25280A18AE8404800B20880800000A000000000000000 00000000FFD833000000000400940A0CD0980200081AC80800800209202211400214230000205200200220210300200A0020 0000300290900A00240280000A40A002002016002006000000000000000000FF5CE000000000002002E00002408000800020 902800020002014202000010870211200004404482800F12000160062109000100200C00108880500000082413201842080000912040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A0080028228 0AC0280A812802842802902802822800802802A0200283200288300200282A842800C0290280A80280200200000000000000 0000FF28530000000000013003412C100140104200120000429088008948808C0804808950840948488800804804800804C8 0804814005000C84C94C20910848C40804A30004000000000000000000FFBCD30000000002018A180180584190194D801001 804805600600E10644600414600644621610600014600600E004106106486C0601642C00612030E20600600640E006000000 000000000000FF1F5F000000000000C048548C0C04C00E00B2AC00880910300B34304310210B00B533103123A5313020B48300512040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF109500000000055433420220420035448C5543520040C10D40288448D50510C40C90D40CB0800800D50550911550891550 AA8D50550C088D0C41500C90C50D50410000000000000000000000FFE25900080000000040840054A0004006106004000101 0011000010010810011010010010012010100010012008010900010000010010000010090910010480010400000000000000 00000000FFF9620008000002AA0001480000000AA0C00AA0AA00882402A00602202002E82802002082004000602A82A84A82 A8440AA82202A82A80404000000302001802A8180000000000000000000000FF8BB3000000000000A54A02A14A00C008088000d12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (023320020028 0200000200200020211211200220A000000000000000000000FF90C80000000000AA0460AA0002000AA0880AA08080802AA2 92B182A82322884023222A82AA002000AA82A80C8AA80012A82A92A82A82A82A80000E03202012A818000000000000000000 0000FF5275000800000000000010150000000000000000010008000900108000100010802000800015000000100002000000 0000000000000080000000020020000001020000000000000000000000FF04360000000004AA1000AA0004000AA0A20AA0D2 00202A82412202A82202A80482282A82A8150000AA82A80892A82202A82A82A82A82A82A82004002282802A820800000000000312040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (840220A14B08 B20248314210200200A4420031091434022B348A20320302308B08900B04341100200208B003003000000000000000000000 FFE8560000001120018218018218018018B1941881082202420424401403440E4042840A600428420000609600600400E046 006206000204206000116046006006086000000000000000000000FF7A790000000000013082002D00004012212012240000 8008100C4804880844CC8908800800C88810001004820004800804800004800804000C088148008208008440000000000000 00000000FF57470000000002008208008028008008048008118040006046002002016002006006002006026000002002202000b12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF7C 1600000009002400000400000014800008000415400C00101000100500B60105301202104D048010450054E1162042000244 88110008440200008020110000100000000000000000000000FF57D70000000020008208208208508008AA80248000012010 0022E10528020130100041312100000006204240201000206200210200000200A00828200200200210200000000040000000 0000FF0BBD40080000040400040040040040040142002C01001082A100138000100009005060801005100900100800120000 9001001001001201011001400000001001001000000000000000000000FF6644400000000440800C44C00C00D50C04C0482800712040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200620608604 040A046000106004004006006410080000200000000000FF27EE0008000000018018050018830238098A38898A0034E20E2A A00811640802628600440608E01009608E1C84001461C602000610008A106060036444096182106048010000000000000000 FF727B00000000000180000104985580980180381184000062260024A00060B442E55608C006146140126116416126006016 0C600600010200E480026014306002006000000000000000000000FFCAE70008000000000000220300000100820000000000 1400C0000240130546208028140408020330010200026346320010300000120200130300110428408000000220090000000000f12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006A482A0 04628846640623E11640E2002AA2AE0880880062AE4002AE24800A80602028624622A2AE0462A8000000000000000000FF3B 7F200000000001911801801805801803820801C02240E3061000080060440060C60063060068000020062464260400070100 06000402056800026106003006056000000000000000000000FFDF4600000000000180480100182180183190B8B580820A60 360460062CE00631641608404E3460200060060060063120065460061200C048600000E05408400628600000000000000000 0000FFFACC0000000000018018410019018439158A1D01880320F10E2AC00F04600308700622509700E4000064260000104000092040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFC89400 0000000155843B559558CD955B5588904B80000C602740454820651200644655454E50600C5545565105304065564AE55610 8482C040044364CE496556556550000000000000000000FFCAA50000000000AB9018ABCAB8B18AB8C980489180C8AA68AE28 722600E2AE90E1263060261364202AA2AE08E28E0AE2AE0A62AE2802908AE00230620E2822AE20E2A8000000000000000000 FFBF6D400000000001901801801801801801824801802801600E02C00608E02209608E006006046100002006020000008006 006006220048046008086006042006006000000000000000000000FF65E90000000000AB821AAB8AB88D8ABA81841801800200892040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (148006208144 094810006086027006007000000000000000000000FF37D40000000000019018018018C90018018218098080A46A06816008 286026AA6006006406006000000006006426090006406006120014846000016016116006006000000000000000000000FFFD 020000000000AB8138AB8AB8018AB8AB801901C10048658632422004628A4460062AE8060170082A82AE0880883662AF0062 AE0002063170002A62262072AE2AE2A8000000000000000000FF508E000800000001835801801801001805911225A00000E4 07014090D0600600700E04520700680000400624604640000601200601004020502005610602E8060868000000000000000000492040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A60822066A62 8E41600E2060060461602A02AE08E08E2822AE0062AE0000041060002AE3262060442AE000000000000000000000FF18B900 00000000019218050218A1801801881001800A01601604004E01602208E14605613610628401000600040000200632600600 000440C08400601600E406006000000000000000000000FF6C0E00000000000180580111381100180182D801804800600621 01060060064262061042064360000040064460260300060140060004AC1462400061061460CE006000000000000000000000 FF899300000000000183180120180580180190A4C3C04000E02E10090702E00200ECAE00412EB4F08000400624000000000600c92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFFA1B000000 0000AB8138AB8AB8AB8AB8AB812055804054E01628220000E28C0264962AC0962862902A62AE2AE28E4062AE0842AC006206 2A80102A82AC2A62062AC000000000000000000000FF10420010000001558219158918119559558020018052016006452502 0165100C612655632650E204556556550530086556326554006536008044550454556506554000000000000000000000FF18 02800000000001880001001801801801800081810200600604A10020604430E0060064460360000160060060061040064460 0400610E00000000000400E126004000000000000000000000FF07170000000000AB8198A90410070AB8AB8019AB808A2A6200292040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001340002 08000006096016002000000000000000000000FF6FD6000000000001844001801801801801921001801801601600204E0160 0408E10600613710640410E006400000006806326005004004000084002006006126004000000000000000000000FFF1F500 00000000AB8C18AB8AB8AB8AB8AB9410AB80002A67E62022543E608C00606E2AE0060060002062AE08E0EE2D62AE0162AC00 42442A85002A82AE2262162AC000000000000000000000FF229F0000000000019038210038A18018018A805581105462B610 204A0A604000641600401600600400600600000042C00600E00400600642028400000600600E00400000000000000000000000a92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (208650642400 64060063060A630000E30620810010E206487322056006000100102002403897007800000000000000000000FF8A7E800000 020281801C2B801903C99910C04A09800050E94602225429E33458E006196087006000D068960260B6067116206806C0E016 00008008220625300E044000000000000000000000FF30A5000000020481801823801811C81821E8920D801000620608A404 00600403602622404E00E005007006040240007006000010000084208004432426106806002000000000000000000000FFE3 C0000800000201809C01801001C0180181300180C0006806152104006244426206004206436110826806026206036006013000692040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0F0000081000 018018810018098A19039AE8C9840000600E1940440A60A400644608403601E0802064060064063042060260940061006900 0027600E00E3A6004000000000000000000000FF3501000000000201801801809821C09800201805830448E0060222AC0060 0C20622600628E5264100C60B602605602712620700250622C000290010406306007016228100000000000000000FFEBCD80 0000008005840401801909801852049803904034633640210C0061142260064564260A6480A8F0162100100163161064C642 601400000040004614E006044000000000000000000000FF0215800000110005821C11E018038018048208418A2003600E2400e92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000004802A 8110300000480000000000000000000000FF0B6F000000000001800081001841841801909895850049601604410420600420 608600410621600004610E00E016024006820000280020000000456006416446006000080000000000000000FF39F6000008 000001801821955883805881825841880004630610402C11633408624611405608604050E046020300486026406104004208 548080004496104106412410000000000000000000FFE5B90000000000018018218A38939138858008218800026286004406 24E20408608666C40604653000E0060082C0086506186000006000028410006086006006206040000000000000000000FF0A00192040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A0000000410 000010000001000000400020000000008A80080000000000008000010001000000000000000000000000FF1EEB0000000000 AA8108008308AA8AA8D08A88AA00002A07E02344023E02AA0000682020000000002AA2AA08A0C80222AA0123222223000000 001021021022AE46A000000000000000000000FF05A100000000000000A00110000000002800500000000100100000840100 04088100090130100000000000446006010000B26004004128000000000240028000000000000000000000000000FFF49D80 000000000012013200C00000000200000000000000000904280000064202000202004305000000000064264800000100880900992040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08000004010A 410010000140120100408000020000000840402000003080000C0440030501005004400404801004C4100401004400000100 0410030005100000000000000000000000FF114A000000000155911955955D55B55B5111580100000140044464D60145560C 412455632450C481557D56136514556D5732705544E5460005005460D64C6556356000000000000000000000FF376F000000 0000AA80082A8428AA8AA8828A8854800054A01222211200A2AA02249220A0922820002AA2AA0AA08B2CA2AA88222A2C220A 00028142A0224022AA012000000000000000000000FF986708000000040002400000000000000304005400005402B000800000592040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8000012A8000 000000000000000000000000000000FF3BF30000000004000B20000000000000420000000002000000090008000200420200 000200430080801000040440000000010228C30000000480090028000000110000000000000000000000FF14ED0800000000 0000040000020000000001400000060100100000000100000881400001301004000000000000000000013208800801080000 00000000130800420000000000000000000000FF040B8000000004AA800CAA8AA8AAEAA888EA09AB80022A62A6323AA26A60 AA41600E2AA0060460002AA2AA28A08A2ABAAA0020020022320000002226822032AA002000000000000000000000FFB6A90000d92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C85007282802 0904C2E910C40D1010C54002888010040040040042A0004064084804404004000000000000000000FF37290280C408C0A090 4D088ACC42810890944A28AD00822D0A4360CF00340282280A206486822000882002842842A0200204280200A20220200000 2803002082002002000000000000000000FFF2C20000006000080002000000081220242000040040400040000000A808C081 0900000000000040000200000000000000800541801800830100000C20020001A00000000000000000000000FF40F9010000 0002000000620000501000042080D40140088440C00C0012840038032001010878800000000008000000000028000020000000392040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000221000004 1501000003140000820202200D04940840280A10401230280110810B11010008000880000508000000001000800340000040 880020800000000000000000000000FF5667010000000180800840808800824800800E00800300288201200202A00236B103 02240200204100200207A002002003782003003002002000182002002022002002000000000000000000FFD4A00501441145 41905B11155C45A33955B45853F5044D65554550D489450684E0564065164960000060060460040060062A62A621620642C0 804AEA05027886006006000000000000000000FF65460020000000310010470A00901036A80101800A412280040A8020644000b92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001060000060 04406006000000000000000000FF6CFF00000000000000000000000000000000000000000000000000000000000000000000 00000000000000006006000000000000000000000000000000000000000000000000000000000000FFC3C100000000040000 0400001000000000200200000080400000000000400080000100000000000000000000680600000080000080000080000080 0000001000800000000000000000000000FFAFAE000000000000800800800848CA0A20800850A8A004A842A02A0304A90200 A00202A002B02800002002002000002002002002002002002000005003006004006002000000000000000000FF67C900200000792040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (210403604626 E200216006026806006006226006017416822000C044A0586018006406000000000000000000FF0DDA000000000201803800 801A01801824801801042000208400220600040EC8232404700F01602008600608002080E04680604680E117012000064940 506011006006000000000000000000FFE1FB100000010151C05C018018118119202012918142C0E090CD2D03400886042C24 08603600643031620614083003600644E40608600600200901400800688400E006000000000000000000FF0DBB0000000000 01889800081801801808815001800210604000200A0C803608200400600644600000600600E00620400008411600E006342000f92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0B8018B5B050 41843D25800881880000201420584102C400C5400514610E10E2010C608600000000400D10790604620E4320001060020060 1408E206000000000000000000FF1FC6080000002201D01C098D1A218C9803011A01B20400F50881084012422000CC04006A 8E8862A010708611100000E02E4440A6506006022000107003006044897006000000000000000000FF3694100000010141C1 1800801801801901A0BA09820148604849010009410002408408604600600800E40601600E2260271164AF08709631201089 600A207104216006000000000000000000FF85E20000000000098D1A0588580D80981A041881C0C000A00606201EA202266000052040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (401600600001 6806000000000000000000FFE328020000000001801800881801801820C230A1A010404904004044403A0102200200604610 6408046026086007204004846106406306100000801002806880006806000000000000000000FF07EE08008000200184D800 A41B05891800815801A02004C20582408C002800802A1240600600612C00E006108001816046446046506006800004056202 286800006006000000000000000000FF015600008000000BB03CA1811A81803AB13C2CFF85801A21063946809081C002490C AB644604E00882760600760600600608600603600720A00042F182006046006006000000000000000000FFC263000000000000852040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0279478C60C0 20E106016406086006827086056106526000055056006114047046000000000000000000FFA736020000000001829800A81C 21C01C41D138048000C210422860064D6C160128A50060260A622400708650000021602E246A8E40E02E00400C00480F4068 04006006000000000000000000FF737B000000000001801820821841201A0020180980501340170018040921409129021060 0600602040EA062060060860168060160D6056006148800006A06008006006000000000000000000FF32A6100000000201A5 1A2080198180181D931AADB4000850445401BC8420100A204208700604600CA2E3060000780161464044060260068860A5C000452040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C3003584994 9A09C818A3B15208221104E546D5222211401625714E48414008EC8600680608680480620604809755400002E10701610E12 6020000000000000000000FF0811000000000181D01C01A2182180190102188282336D00435060B200303600244430E00620 E00400600602640600400478410600700600600000200702E865096006000000000000000000FF0EB2100000208221C01C29 A49C01A0980DA81A08D4420193B8266003022346AA280508600E80600708624E00000090E10600620698650F80C086602086 00611401E006000000000000000000FF50C00000000004018838008038139418A5003C20909102000308E21649700E80A35400c52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (026006006000 000000000000000000FF52520000000000018008000018010018018018018000002002006006006006004006006006000004 006006000000006004006006006006004004002002006004006000000000000000000000FF23CC0000000004018008000018 01801801801A0180100020000060068068068040060060060040020068060068068068070060060030060040020020020060 07006000000000000000000000FF019A000000400000202800A01805401A23825811A2028009020060060020024451060060 0682E00420600E028000016006046007106006004104C0602E046006006000000000000000000000FF102E0000000100200000252040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D64364145560 C6B50420006106232006317406002004226102006007006800000000000000000000FF437C0000000001A080784480990480 38058538038A102AE80420640600D20C88100600600E806000006086016006086046E1AA0600000608A0001E200200E80600 6000000000000000000000FFFE23000000000440000A00801801151931C01D4CC30051654E506106A344B450C056A0649620 604432628E9204200A6C0600200EA8E00E80C00480280F40E006007000000000000000000000FFD329000000000008000900 009801803801805800885004600400E04E08400404448609604615649000600640600E00E0060024060000C610400000200600a52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A01601801801 A01A41C02240212500E00620014000C427026036A00401047026000041006006802207802C06000000006205006884006000 000000000000000000FF010D000000000301001802801809401B0D801B0190800200062460D6050A1094401650F487028088 48E48613040000E10E012106092806802080006804A26004806000000000000000000000FFACCE000000000000200C05A01C 93401829A098A980808032AC48EBAEAA008022C3AE28E2A62883A822640E0AEA0E03FA3700350F08888E0001010064046461 04006000000000000000000000FF5370000000000080801800801C00405D15A0194191244460D515605645455434CC56D56400652040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (064560000000 00000000000000FF9942000000000101885808882824001B0188900168002A808708620704604601610600E4070A02880063 060000801264C640804614A34E2CA000000128017122086080000000000000000000FFA9D400000000000080080080080000 1A01801A01000000200400600600600780600600600600000200600600600600600480000600000600000280080100680200 6000000000000000000000FF23C5000000000011801144801001553905841001804280200C88700680004020408680700604 0000906C06607046806806222006602046002000A27094046004006000000000000000000000FF919B000000000601A0000100e52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (401800808808 621E0200101410002401A8000000300004208120808000000000000000000000FFB44B0000000800021A0080000006000028 0000000000080010000000401B084000001804400200014006206064066004C8400B400808100400000F8090490200A20080 000000000000000000FF644A00000000000181B900802828101811A11081910252A20404630600A02206440600E006080400 806006146006806224000426026206382018806020006096446000000000000000000000FF77E9020000100234A49B45A48A 084A3C31805A838002802A3482E82EA8A412C44806946826A0880001702ECA941020E816800406A060068028103488012C6A00152040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40C00D44C84D 4090034838A32238D222A413223403103A0328340000300335350300320B1124C300204B40300125300300B342A020080000 00000000000000FFA98502000001051040040A3883004002003042020000801008500068810800A088100210301108008008 00838880890800818000819040828800804908820C40085010000000000000000000FF28F5040000000088804C048208008A 280080191488002121E20A201288200210200200200200A28000200200210000A00220280200280241200040204200600280 2000000000000000000000FF8C5D0000000000200400700400410001C40CB04000000004048094003604100100810402016000952040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (82A800000000 0000000000FFB0AF000000000000A00AB0A20C02C00AB0B00C80800280240290A90280280A102802802802803081003002A4 32028CA83280280280280312288084288A802802802000000000000000000000FF516C000000000000000203310310001205 2092220142810088800009014884808910800000800C01005004801044A04880C88804000804C04A0020C805004850004800 000000000000000000FFDC34000000000201921821021803B0181182900B810200E216106206104104096016026056016008 40640600601441604644600683608614C0109040CC40600E026000000000000000000000FF4259040000010510E0C914D00D00552040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A82A82884A8 2A82202A82A92A82A82004000082502A8200AA82A8000000000000000000FFF8EF0000000005543540042802103542103082 CC0080D41230CC0CC8D48C40540C50D50D50D50800D50D50950B30A48B30890D50D50D50820C00840C49550890D505500000 00000000000000FF2D9200080000040040050000040040040044040400010818A10010801200099111090010000010020010 01001001001101000000000001101003400101001150001000000000000000000000FFF81F0008000002AA0AA0000521240A A00402200800002A01202302202A02302202202A82A82A80002A82A80880880002000602A82A82A80081000802202A82802A00d52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08C880084081 0000A0A208600608210A10210600600600200080200240220200205200200200200211220040290200214200200000000000 0000000000FF8A5A0000002000AA0AA0004AA0AA0AA0500A008A00002502003022830012202282222AA2AAAA80012A82A80E 80882A80102A82A8AA92A82501001412082A8200AA82A8000000000000000000FF32430008000000000004B00040200000C0 0420000048010000000000000100810100000000000480000000400000100000200000000000308000488080000220000000 000000000000000000FFFA4D0000002000AA0AA02A0AA0AA0AA0820920C800A02002082482484082A02202202A82A92A808000352040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF78DC400000400440C40C02C20C00C02C04CCCC008A0040B04205230300B08B4420821421031130031434D2503423 122002003003143503003023103503003003083000000000000000000000FFBD5C0000000000018119210018019118098018 2B814002620420402C28620608E0444042440061004160060160144164060863464160340160000160140560060060000000 00000000000000FFBACA00000000020120024920020140120421220100208A0814850848A508008048088008000008820050 04801025000D00800000000804844902928044804808000800000000000000000000FFAC8D0000000000008008848008008000b52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200062462200 A00001404002001001081400100000A0200000000000000000000000FFD52000000000004000808404000000002200204000 0023400844855050440043002002040031008030015002E0060402081004004A014001000008000001000010000000000000 0000000000FFFEBB00000000000982082080080488A88883880E092010228300140002200200108168104040200003200278 210821A01200202204A21201200000A38A572402142000010000000000000000FFAFE5400800400410400400400400400540 48040102800011340000010490890800000000A140100100920004122108007066108100100960102100100100500100100000752040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A1001842009 028500710604412210524731700600202000E0460C01004260A600600640600A04E000446082206244004000008000000000 000000FFAF4F0008000000098039A09950018AD80180704500002022B20464B612023660422E08618E00A128226006020008 016616182006000402026060206032006004404180180000000000000000FF88980000000000018010000018298418030110 01090040602200E04600A4060140960060362900102C60064064560040040041260200020860900860420AE1041440000000 00000000000000FF553400080008000000000001405000200A1400401220008008048010108090110100008000100080100000f52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF055D0000000000818DC8408810458AB8AB001891800072202040601623622620650E45E57E4861002AE2AE0A80882AE0 5E32E2AC0402AA006500C062AA2AE322AAE000000000000000000000FF9DA620000000021180290383180980180101380180 800970080060861061160060060260060368000060060060460064060060040AA002046A0009600300600600600000000000 0000000000FFFD040000000000438210488048A380180112102B80400024864D623601200215452650630620230000600640 62060040C410600640200250E10024600000610A004000000000000000000000FFFAC7000000080009805840801805911811000d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600610600 E006092004086800084010806C24006000000000000000000000FF85A600000000004190180091191195595515590180024C E54431635644443602421621630601250455655651011055655655655650E5504D6484944442556494D56000000000000000 000000FF00290000000004B18818898958918AB8AB08D8A3C00000A3570B732622622A22603708680614E4002AE2AE28E4AE 2AE2062262AC2022AA24E00082E2A02AE00AAAE000000000000000000000FF52E54000000004138138AB823823801801801E 05814000001400600610E00609604602602E34400000600600024000600600600000600200600040E0080060260060000000008d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (058100016110 126146006086024026C2ED0E20680400600620042000400400600622A004056B042840D50070120060000000000000000000 00FFB2410000000000C98B1804801801801801200841A0100000062162160D400E50E2960860260325000060060060060060 0610E000106006106000856004006002806000000000000000000000FFEE8A0000000001018438208A98818AB8AB0AA8D980 222A12248468062063224069061060060830042AE2AE0E80882AE2AE2262A80462AE2070040063072AE2A22AE00000000000 0000000000FF9CFD000800000005801804841001801801C4080180A204000400600610410610C80600600600080000600604004d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 0DE80000000000AB8018088018AB8AB8030888A5802000E08242644622E2043260960160460000002AE2AE28E08E30407442 E3041020A62AE00213600C2AE002226000000000000000000000FFF8570000000000019138A08C3801801801043803810000 024020E0A600608C00600630612608A0040060060004000060865060A040640400600440C40400601210E000000000000000 000000FF4B7C0000000000018418048110018018B100081180122A600810640E08604611423605640E246000006006046026 0B640E00600E0CA00E0060001061240062A2006000000000000000000000FF8B0900000000020580188880502B801801001800cd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006086002000 22628600600400200E00620000E006000000000000000000FF884C0000000018AB8830010A10AA8AB8AA80D8AB80500D428E 08600E4860362AC00610628E2560002AE2AE0AE4CE2AE2AE2220880862C62AE0002AA2162AE0882AE0060000000000000000 00FFF95300000000195595380B90515595585095591181203000401060961024124100062265165160045565561105102564 0612A43000E036556004226546552130546006000000000000000000FFDB5880000000180184180181300080180084180180 0040004620612604240000000E44E02608600200600640600600600410A24001601600600200602600242000600600000000002d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (102A40001060 0E0840A000423685740E02E001006006006046006004207011126086004000002147004210006006000000000000000000FF B3DF000000001C0101584584500180180088180080000000B020E2A604420000200630612680600400600644000000600612 2300016416006004002016002127006806000000000000000000FF0AD20000000018AB09195D8010AB0AB8AA9018AA813000 820007640621C1082AA5C60060062860042AE2AE08E28E2AE2AE00A0206460262AE0002AA3062AA0062AE006000000000000 000000FF084E0008000018018010A1051000801882801821800005430E02E00642E1460242A610600604600600600642002000ad2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFFE51 800000041810801009801001D05925E09811000248380010624E04020620022604620E006001906136480089806004002100 00F806004020004007844002006006000000000000000000FFAC58800800003A00C01801C41081AFB8038C180D12C120A542 4E6006C281C6008006D2682764641080748625644601601601283082700601C0180140468140070070060000000000000000 00FFC024000000003841249801A01484801C00901820830080C01600600680C00815400E00E12700E0040078060000000860 C62A304024680E0A4004003006284003006006000000000000000000FF0E8E000800001801021881889000A0180182D80081006d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (061000200060 26008022186006000006246064080000000000000000FF16AD0000000018898818B1802001889841808083800022E6220862 2608E21844E4B639630607600A00E046146116106106540010406016160002016286190006086004000000000000000000FF B2628000000C18008080048010038058338A380108020020862360964200864C220E0260873160201468463260064065360C 228800641600400041602E234002826006000000040000000000FF47D5800000021828850000841A05A01A81829843084010 215240643620042610204640641600641010621600844001603600B08001600600404000682622400600600600000000000000ed2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (042010040800 03300A82300504080000800000004062460002900900000000000C81000000000C0428000080000000000000000000FF20C2 0000000C181190190180508594980980808180A02265260CE04625250000E02E0160060C60000A6006106516406024000300 00620E040000016556124002106004000000020000000000FFA9740000040018818098219490098018019040018400106002 40640E1020004C630614648641604041604622002004651604002800604600802020600620C0064060040800000000000000 00FF08E10000020018018018058A808982584584001D92A009600000610600601000600640E0060060122060060002A80260001d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF89440000 0000000202004002000040008000000401010000200280000001000202A01000000002800000000000200000000800000000 001002000000009242C0000000000000000000000000FF03370000000AA88C8408C081000C8AA8AA88888881602A204A0700 003224022025C00000002AA0002AA2AA0AA0C82AA0222220002AA2AA2002003D22AA2101022AE222000000000000000000FF 9FF200000000004208500002800000000100200000800041042080A010800400000030012000000000000000600600000000 0000000000000000050000008100000010000000000000000000FF73ED80000000000004802A1020A4000000040022000001009d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20002AB2AA22 210021BAAA22228BAAA2AA000000000000000000FFFDEA800800001200004000041200401000040000000100051020032100 C044004008448020004002804804020004004088000000004004844302000005024210004000000000000000000000FF6C59 908000555951D0B903915835D5584B913911800045628E104094D4C434504004224515556000557556556515556556236001 55655644E00054655641600E556556000000000000000000FFDD6D0000000AAAA8888892902CD08AA8AA88A8AA80002B2002 08200A22210A2B200210228A2AA0812AAAAA28A28A2AA2422B20002AA2AAA8A0002022AA2800422AA2B20000000000000000005d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100018400421 400000890000210010000000050000000000820000800000208440208000000000800000000000000000000000FF58390100 004000404480100120002004C80400420080140C201004081201300002300504080000810010002400008000000C00008008 000800000C0000090000000000000000000000000000FF81EF10000000000000400202000C00000000400000000101002080 A0010000120000300120800200000000000420000000010000000000008280000000000040000000000000000000000000FF 28138000000AA88A8808B08809A08AAC028C88C88061B0300A426446203A0221A0960160462AA0012AA2AA08A08A2AA2AA2000dd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (520308802000 008000D00802815302C0980811204180A4472C0282000208AC0AC2A87000A842022004420460118480000000400001C40001 0008400485000005400040400000000000000000FF6BC2040000080000940A00A00802810804A42800A0005020821060A242 250B002C02006402812008242002A0288202300200280200A20202200080220A802002202002200000000000000000FF56DC 00000000000000000010022800200000002001400008400282000808008A01002000900A0400000000000008000000000100 200000000000000000000000000020000000000000000000FF4BEF0000000000040020004022800000080C408A0000030B08003d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0020020022A1 002082002800002002000000000000000000FFD08C10802000010801001003240000809008024020814004A80114005000C0 010408A10128041240000400440150000550000000010000000808000000800200000000000000000000000000FF4DAB0000 00000008C20E00802C00840C00E088189A218920020430020C201210280200220288308000200281202B0022AA0028020020 02002080802002003202002002000000000000000000FFB854040000100001941801D05805A0980594584B80405048541545 56546D3412430700448E0D641240600600600D04700702608720600622600080E00E006006806006000000000000000000FF00bd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (460524100400 0040200641010000E00600600600C00408600600604601600000000612601400E004000000000000000000FF6CFF00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000600600000000000000000000 0000000000000000000000000000000000000000FF93FB000000000001400201200000400000000001000000500400400000 4004804004000000004000000000006006800000000000000000004800004000800001000000000000000000000000FF769F 000000000002820800800802000A00A4B400A22010200210200A003202222123002402092088002002002000002002002002007d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000200005 891A00245801A414B9089809A040402004040004822A0011000828791528808000600690600650411400F00600620420E189 840086006444804004000000000000000000FF5C63000000200003901800861801429001200A01880000200C04000C804808 238880006000040040026006000200004004016006006004C0600000012688690C004004000000000000000000FFD9E40000 00000005801A40405801831001001811A94080700E40400E1001005004901423121000080260068402400040444060160564 0604611008044E006045004004000000000000000000FFFDE70000000000018418040010050010A91158218000090100104200fd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070260000400 0E8C6005006006000000000000000000FF8EAD000000002001805800801800805811001000880028AA1400FA140168058165 11A0001401040200600600000120220200600400600704608200A00610EA84006006000000000000000000FFE07900000011 0001801840001C00801B4100109095000014000043160060AC2460404000028004000070060310A000220200683640602600 600040802704C085106006000000000000000000FF622E000000000001821824205804801801205420A0C088910052424611 688410720002030A02003001600602604601202230600C02E0460260001024170450C4016006000000000000000000FF68D000032040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E0426C00A008 41E4026800826206080140802602086006046084006408002816007204012006000000000000000000FFE7E4000000000000 0019540018058210417430410013006406104006004402100046104002046004046806206006002022006006006107006004 A00206006006006016000000000000000000FF247F0000001081000018000038451012210011010540000000104006004152 28004600408210600408E0060C8000082012046506006846000004C00056006846106006000000000000000000FFA7370000 0000208581385EA59BA28C3D07001010A00288A00C6C81647EE00004628800060008800008E0060071468021020262D4407000832040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002044000439 01891800815002C032290010436306145124A06406A0602600E2062440940060260070261060261060030062068020049440 2600714A30A02E000000000000000000FF1577000000000200001834211C003010A400114100835068270843040064460268 0602700610051011700E00110000600600680103620600222000620F00E802092806080000000000000000FFCA6100000000 0004003A00281801A01713400080323022210400708600C00280050582480048628810EC0E10600680208210E00601620402 E05000208600E486082886080000000000000000FF9364000000000002063A808F18015014090B800069201122446184060000432040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600414680211 0086000006000000000000000000FFCAC900004000D802201911803405811821C219000092810550206916A48C8F406848A2 740604E50508702600604690684690680680620600600400600200102E10D046000000000000000000FF09B9000020200042 001800822C408410B0029000089004280524644402600A1C090C233006004A21087006007006006006066802006002C06000 606046806003402016000000000000000000FF5EF3000000008020009808801C27861008285480040105292D00620D00E082 82248608200EC0E00500E086E000C00061460160A200680425600540790688E102002916000000000000000000FF2D42000000c32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (406444416426 42605440E04E10600600240600E026006084004004004002002004004006000000000000000000FF6C470000000018000018 0180000180080180180000000040000060060000060020020060060060000060060000000060060060060060040060000040 02000004000006000000000000000000FF6D4D000000001800001801800001801A0180180000100040010068060008060028 00806006006004006006807006806807007006806806006004004002800004804006000000000000000000FF5DCD00000000 1800233801930001A0588390D8502800C0080610600680000600000208601720604C0161064001000060060061460060040000232040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000180100 0411A05800809A0564800444801460A6C00148916D5515651654654C156526250120002046926106404154006A2482680620 200400200E000000000000000000FFB25F010000001804001801000819C01908AB3931001000502602E2060000411060840C 6206106006206106A0600600200600E4068440C463400661C002602004002006000000000000000000FF803C000000001800 001C01400001805201945A45080005004F0C6A072A401004709610710E80F50008620625052021200F12700E10A0048A4801 004806802804804006000000000000000000FF994F000000001800001801800801841049801801053010030641614E00C48000a32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (026027206026 807006000000000000000000FFD21D000000001801801801A01C01601C00C09A01808004240500710700601024308C007096 0062080170060000208020260060060040560052A040600600600700400E000000000000000000FFDD22000000001801801A 01A0101100380000180284000028CE14682640A1400884070B6C062C61201465068D030002208E0868864240870040080060 02806006806006000000000000000000FF3D67000000001801801801A01401001C00009A80A8000B22DD2860AE2BAAA86C62 2C22E0AE28F02808E2AE12E68624A31E0A640F8E8026004110406042006846004006000000000000000000FF687A0000000000632040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (349070428869 0000F10E8A82888040860A62B621420D094D004848A68B28A2A46006000000000000000000FFD88B00000000100180180904 5252803B2C521800A00090680600E00608600602828723648920601022600600000008404E20600600000300400084421620 780208E4B6000000000000000000FFE19D000000001001801801001800801800C01800800880680500600600600600100400 6000806000006006006006804006006806000000004000804002806002004806000000000000000000FF05E9010000001805 801801801801045940801015854801A000006806806800042025006807046500006826306046002006026E4700400491480000e32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A000A0120000 046180090049000908500C0080086850900140050080900001080000000060064001A0800029000708040000000A000280A0 000608000000000000000000FF7A4C00000000000800010808C0821100201201000100010200010720038040208200340401 410400A10008006806000001F410D1050810408000280100400040051020000000000000000000FFA7C50040000010018118 0100382180185080888580082261000860060061064C005C0A624A00601000640608E09E004C0E006C0680C004084050C760 84202102286806000000000000000000FF0E15000000201291C81B41311A81A81A00A0AA958808C2ECACB26C4EC368C7280800132040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0640428E0060 06000000000000000000FF7D82004000420D54F48C20C12E04C08C34850CC28A8181348B08328300B22B00B12B0230322135 0881300315290301200208245202A48322302004B8A30130230B2402000000000000000000FFCCDD0000000402440C024021 020028020B2422000C000080212008008000209208A0000820B00801028880861200810800080A00200804800A8080000881 0810828880000000000000000000FF131B00000000090090080484090C800804C05802900800249252200200240200210200 2100082081002002113100082802022002101002014001004462082402102006000000000000000000FF01FE00000000009100932040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02000800002A 82A80A8088320A202A8808AA80282000002202A8200000020A20000000000000000000FF30F4000000200800A00C00B40840 820A10800A00802020A802812822A22802802802902012012A0000300280240280200A8023220024808A2800902802932A32 08A012000000000000000000FFE37000000000020200135020C11420230520320001000A0B308C090080081054CAC08088C4 A24840005004C00024890904004804804804814A4080C000804900A00904000000000000000000FF0FAF0000000018018019 039418819259011030018000006006416006406106D24006106504106000006406006014206506C4600610601400E010406200532040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C0020140AA0 C84002A400202802480082A80102103095002001091082092A82A82A94A82202282A82292A8020000001220AA82A82202482 A8000000000000000000FF1B860000002001543542102D45041102841343500080100C10890D00A20D50930808CC14490108 01550D50D31510C50540D513085503008A8800900D50CB0D20328550000000000000000000FF86DE00080000040000042049 06C040040031000841010080011010014401410400310A984080100080100100080101010000100000051115100800000100 1011900000000000000000000000FFE0AA0008000002A80AA0420000402C80600A80AA00008100002002080882A00000482200d32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (48048B400400 0000000000000000FFF4A1000000000800800800804940800800920A4A800000A00201600622200288200200622201200000 200200204200A1120020020024480A2000802802002092002802000000000000000000FFA8EE0000000000A80AA102040000 0AA08E24608000000411006422AA1898002008082A2480CC0000AA82A80888883212212A8320AA80806004003302A82A8320 2012A8000000000000000000FFF4A70008000002000000840000084020104000040020C200C0220028090000200500010080 320422000000000040000810000021000028200222428000000008801000000000000000000000FFDD180000000000AA0AA000332040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A10A1001000 0010000A10A9009021009009001041019001011001025000000000000000000000FF2DEC400000000C00D00C44820C52C54C 00C20C50902311301221213243314349350A04335344B0A10034020C30021030CB00312301314900B0010032030434030430 02000000000000000000FFF54200000200980180180180180180185380380184022444060442040864160060062040060862 002C612600642C22600648E00C046000406000126006006006086006000000000000000000FF2EDB00000000020300035133 020D20122000900040A2AA4B308C08008004C80482C080880C224A10004804A4040488080480088C004000810A080880008000b32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200004401 2008010201003025020002810854002001010003041024810000E3161003100000100084A800021010043003022000002000 0000000000000000FF391F00000000000180002404004C008021040020000203048440040004401020000400030041040052 01200C625640000000408C020000008020020200000400100000000000000000000000FFDD00000006008801084800004800 88210280B008820234202312918030A6020226030600321020000026020020404120427820020000A0302000092002428100 002006100000000000000000FF8A2E40080000040040040000040052140859040008230811480000280810A10C908820100900732040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4CE006000000 000000000000FF8E24000000001801801009801911815821800901000030000100700604001221200B4062060C6200006006 00020008440608400011434000602000802C012406106056080000000000000000FF2B7C0008040018018010490758ED8EB9 058258B309082502C204642E01206614E0CE3862260160300160060100000640060000942840106060200005824400040860 0E000000000000000000FF884C000000001821805001001801900801851843100200051648E15608648600630602E0CE0060 4022628600612E414156400100404000106208086006000144006006000000000000000000FFD14B0008000000400000200100f32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060060000 2000200600200222588000400000402E036106046006000000000000000000FFCF0C0000000898A98AB80F8018C9880811A0 08AAA0402B62020963062A22264060CE4462062AE0002AE2AE4880882222AE2AA2AE30000001400091C106326204806AAE00 0000000000000000FFD177000000021800801821829801832945950800000000E00E00608600600610622600600600680000 600604602600200600200208044003480022444E1060D4006006000000000000000000FF2720000000005803801101903825 80180980280181200000C245605601210A2520024D614E00604000600640640610C00600400404C090486020100084012006000b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801901B02401 C01200403008702600000600600400601600600000600604640600A006006000048409046841046000000004016806000000 000000000000FFF2DE000000155955155955833925A03B01940105C02250410E10E15645645615645411644E55600C556556 55051045255655655010845055200D55650050044D48F556000000000000000000FF8D88000000089AAB8AB881888889AAB8 238308AD81002A64832264162AA32A0AAD130962A62AF0422AE2AE08E0CE3222AE2AA2AE2040A048400240425622E2D62A62 AE000000000000000000FF324C600000001801801801880811B49A2380284900800164000060061000062061020261060060008b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF0875000000001003001801891001801801830A3180821040C68A60460A608E256810C2E10E0060100060062402 200960060060044320C000600800630E10400A557006000000000000000000FF2CAD000000001A010018018458358C180DA0 2005A03202400820E31601000610610410600600600000600600600600200600600410601080280080602401400400600600 0000000000000000FFCD090000000AB8A90AB8AB801881A0B0B1C90081800224C240446C062003220022244062262AF8002A E2AE0880883222AE2AE2AC0062002AB0002AE0042242A40062AE000000000000000000FFB260000800023801001831845803004b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600640400600 6006144124006000446300006006000006006006000000000000000000FF36CD0000000A90A90898A18C58AB841803088801 801022404600E2160162043842A00462AE2AE2002AE2AE0EE28E2262AE32622421E0002A65E00263262642022AE2AE000000 000000000000FF5DCD0000000050010458058118018A3911800811808210C30022602E08808C00C010086006006004006006 00004000E00600E00408600000E00400608E00C14A006006000000000000000000FF57D20000000010030018118250018098 41822945803200404E086086226046046000456006006120006006406006086006086094042000006400296006104002006000cb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (890408888100 08020630E0862061260260140060060060000060060004000060060081060C600010200022204E00A1020060060000000000 00000000FFCE530000000AA0220AA0AA0810AB8298AB0888A8813222800610600608401615428C00E2AE2AE2882AE2AE08C2 8E2262AE20420E28600009200820A0AE3022AA2AE2AE000000000000000000FF985F00000011435411410C90915591584391 2825804244808C0262261264124165442965565562A455655651013054E55644445040600045600410E40648045655655600 0000000000000000FF790480000000000000000082D001901801800805801200013404644E04E28240604452600600600000002b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF1AEA0008000000D0400001841801040801020A33809200D04E08608722702D02290E45600600620080680400400601 20061062569060002C240843220600A102006006000000000000000000FF1C9900000000040400040180D80111000100A801 804288430522602E08E28400004608600680611000600442442000200682E080006000816080883136040012006006000000 000000000000FFA88A0000000AA1100AA0AB8818AB0070AB0C4881801032440441E3064060442882060062AE2AE0002AE2AC 0CC0CE3B22AE21600027E0000060001424062D02222AE2AE000000000000000000FF9B7B000800020200020040001001801800ab2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (41401028204F 2B20043064000B2000106206416002002006000000000000000000FFD6DB8000000004018000510058018C1003848C0D8002 20A20451622600E121A0320609620D00E00101700E04C0082822260020100060401040000864060020020060060000000000 00000000FF0078800800002201A60409002803809041826AA1800286284D0C6006C0548100284600E1011060009068264040 0606201745200CC061010440010070060801D6406006000000000000000000FF29FB00000000A00040000180180300C89110 08C1852310509000601714600C0A808E20602622632C00604408400000B00710302614E40020E00400600650A00200700600006b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5805800024A2 840060260460C61A60260A60042060800860060045402F429608600602650020404804204640600A01804E41000000000000 0000FF79500000000004018000210018088830E2811837860042242C48E00E4166360560DE4060C814667810600616400601 442600604605614040400000202E286052400026000000000000000000FFA024800000000401D441131218058510018A2A01 008090600022648752600800A00441642112E00040F0A400C4C600A80E0029142962A00540C053628604E202002806208000 000000000000FFE08A8000000100018000210018018A508D90080100C210F0C005644E0A402050350410651021608101601400eb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF00AB80000000040200002000000000802801002800000005102800801300102100004500080002000000C0006006010000 1080900000004A84C01000000B00C0108000000000000000000000FFE3340000000004018001018418118010248400418100 00602801620E0060920060D400E21010645000600404400620428610208600E04000C11048C3060460000000160000000000 00000000FFA4CC0000000000018A204388B803849100900001840050E3065261264864020560042A61464360802961240140 0010404600600E54600022000000201610E208000006000000000000000000FF819100000000000180001100B80090501880001b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A222AAA2AA2 B22AA0002022A05022AA0B22222322AA000000000000000000FFD76E0000000004000000220104000A000100100000C00104 A0108080000000080000000221000008001000200200010000508A0800000028000840C00003000900100400000000000000 0000FF35430000000004A880009E8A88888C108008008100602BA1020183006123321902040004422AA0802AA2022AA6E83B 22AA2222022AA00010200224A2AA4022022222AA000000000000000000FF8C4C000000000001800000002042044004024002 00800040440200280001000200B0080544000020000008004006000000000040000000000000040000204010000000000000009b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (808134A02200 E2162AA2022322AA0479022AA6002AA2AA2AA0EA2232AA00200B2AA0000020080022AA20210221BAAA000000000000000000 FFF64880080000020000000000240200340100101100800010040404490000040050045208808044C1004810000004000805 00480000400002800000C00400010D080804000000000000000000FF6F8F90000000015580011194391380DB3313590B8002 407014424224D5654C446D56294017556081D565561561145465568440A655600004E5001255575064445465560000000000 00000000FF01720000000000AA8000A08C88C88888AA8CA8A280022A342A3020021222222422CA00B00A2AA0002AA3222AA0005b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF7A 3D0001000000044000806060002043080802000400020208000000800008020880010000A000000000000000008000000008 00000000000000A08000000000A00000000000000000000000FFD49F09000000040200002212C04801000204402200201415 1028009000008001000045000900000100000000040000080048012000000010048000100109020008000000000000000000 0000FF7E72000000000000000000000004104000010000000100000002002000005008000008054000008800000000000010 80000484010000002280003280000400B0020000000000000000000000FFE6B88100000004A88000888008C08208A88808C800db2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680780700600 6020006000A0E006006206006006000000000000000000FFFB2A0A802112000810820A00400102141900B40B08A0A88208E8 CB00000830C243040A180C0243A86A44888445740040A09040040450000042A8000080004800404004400000000000000000 FFB7370A00049008008008008C08408908C4C50940828010282220200A2B24C210243221215208A400212212002002002802 002002022800002000002003002202002002200000000000000000FF74860000000000001002102000000400000020040040 4000000001008000004000001004008001118800000402A88408000800000000400000008000008000008000000000000000003b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (003002802002 08280280000280A802002000042002002000002002000002002000002001002002002002000002000000000000000000FF68 530AC04103001001000C0400000220004104080200110210C094008008408440008C0008820140D001080000400011510008 00000000000428000080000800000004000000000000000000FFE938002000808800800800824C00E00C008048008100C028 0210200208280200246200200219A41000200200200200200A00200200200000210000200200280200200200000000000000 0000FF3BDD140005801801801A899418419519457533430540546A57005816556547147C54496D2E5164101160170060040400bb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF877A00 0001800000000021841011801883809905080005600600800600602400401240408600640000600002600622648404E04600 6000106500006006086084040006000000000000000000FFE41E000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000006000000000000000000000000000000000000000000000000000000000000 FFDDB80000000010010010000002000004010000000000004004004004804004001000004000800000800000000006000000 000800000000000000000004001000000000000000000000000000FFAD62000080800802A00A00A008002000898008049040007b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (054016026000 006240106016107106800006000000000000000000FF20B80000058000040240018A100583D911903C830020442022084062 89240280600620480691620048600420602E00610400402620600008608054412211F503004026000000000000000000FF30 59000001800000300001A1120181180B801029000018204800C8021008A844F00600600608600800688400620080E0F40060 0640600000600001C006016006024046000000000000000000FF8013000001800010020301905001C41809A0502905204075 128C644681228C8944820C54268D604810612048625001600400400E0460010060210840560060060000060000000000000000fb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (830AC0420025 A40AF340084A8E606160006002207006A1E042024046006000806008C47712206012004006000000000000000000FF9F3700 0001801845000001E41C0100141180D001E02022A12032C2020208260D600880752612600021600240F02000608204600600 6001006001006006406406080006000000000000000000FF4FD8000009801820020601013901241801A454358080106A4320 020E2420142058B000402604610009680400E02182602200404600600080600080601200600A084006000000000000000000 FF62DD00000180181008012140B811201901811C018C8024E30604120600EA062A42908A43460360200060440C600644641200072040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF6CEC000001 841821880461841049C03B4101E004100001C2C0404024200C668D60A40866260263100662027A660000618200E0A6186000 22620012E02A20610302E106000000000000000000FF5247000001801808C000010016118058098402010220004801016D44 4A108650600404400611600000640C8060062C6012016146006000006000216056506007804006000000000000000000FFAE E1000009801810842001009081831801AA00418000084A0600081420E00E40640410401600E0000878048060004460020060 06006000006008086806096086004006000000000000000000FF807D000185867989000201825805205D01C09015812000A000872040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0600610000E0 0188600210600300E046000000000000000000FFB993000001849B30A20485041801908801801049800000000EC971202060 0E15402E10001700620005600210620600600E204086006020046400816523016402A46006000000000000000000FFD61F00 0001801808800401001A00C40811C2150D8A2028004E426B0112E506054007022806A9610808702300602105601700400700 6020006000506102836082006086000000000000000000FF894D000001801821880001801801821801A81891010048449094 4004808806007B4408404624640008602282604600E0028060068060C044640004608202F80205602600000000000000000000472040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (810440600600 E14008600E40600002600600600000600630600600600002800000E40600E206000006000000000000000000FF4B89000000 245B15880009800009805852C05881844048040C48080C94643614700E006C460A620020EA0608620700600E816006006020 0002001060A6007026226006000000000000000000FFA613000001801A43A4814181DB08B008AB91305082202C1207004048 0262268050028000270A600120620600600700600600E106006000006000006002007022016006000000000000000000FF13 D5000001843801882029AC38C3802F41B884808900020020114000080006404482003206206000007016006001506006086000c72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (EA0000000018 018000018000318038C08018C18C0040201440E24402600648E09000402420620840603208600600200600600E0060004000 00004026006006006006000000000000000000FF7D0500000000180080000180000180180080180180000000040060060040 06006006006006006000006002006000006006006006006000000000004006006006000006000000000000000000FFED2F00 0000000800800001A00001C01800801801800000000500680680400600600600680700600100680200600600600680600600 6000000001004006006007006006000000000000000000FF6073000000209A0180C203140003809B0080180188000048440000272040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (608000001000 601E00E817006000000000000000000000FF7C67000000000800800285001401851694C21C0584004424545411403440D645 7446556A44C5655115604400612800042611601700E040000100036006006006000006000000000000000000FFCD2F000000 0048008821812009019A1090801821808000228602600680C80600600080400402610004640401600600000700600E006000 000000E04006006806000006000000000000000000FF56FD000000001801882201020001C4980192D80D80A11565448C010C 50834E844220156B0D0D60401061020464A950A00650600603608008000008400E00E006806006000000000000000000FFD800a72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004006806806 116303004801406805006846800006406006016000500000126046006006006002000000000000000000FF5D87000000000E 00601000A01A01A01081821801800000620D00582000484401720200E84220748000E00400702900040600680600E0000000 8100E006006806806000000000000000000000FFF44F00000000180100900380380101180BC01A059200C4604654C0842A6A 97C4605052600B04E05032602228E08002A0A688E00F00602000000800600E00600E006002000000000000000000FF6B6300 0000001801011001A05E81001829D89883980022202C29D2AD2A0EAC2AD2BA02623A28C2A94A62AA5BE28F2DA1060868070200672040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000023429221 12ADA15A41A825098C9B018000C2280682C057244CA484E82AA04926C160012C6808046A08CA401608608703600024000002 488E086006C8EC2E000000000000000000FFF49F000020001021003201C41883C29805A03851800008E0A720430408800850 440102041602600000E32430608000408604E056906000100001A0C4460170CE046102000000000000000000FF7C6B000000 001000001201801801A018018018018000002004004004000002004002002806006000806804806006004006006006006000 000000004006006006806000000000000000000000FF1F5D0000000048000010808418518350018C5811844011600480400000e72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500000000002 002902012002000000000000000000FFCF9700000000180580185404400008000A52002800000440208040140042242A0A04 004240024000A000A10101061100000200B00A8000A800000082290080A0008124000000000000000000FF94730000201080 000000020001220781400404900000100480400E083100480005680004100100000880093806DE2810090C08004400000400 00061001080C00560080000000000000000000FF57A40000000000A810F00190185180209128190180000A20042440000841 8400E0161040AE00600000600080600602480680600E016000020000E0644680601608600E000000000000000000FF335D0000172040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (461465064060 A601600000600E88E0C408600600E00E40600004000004650E00650630E006000000000000000000FF4D75000000400C44C1 28C0D40D14D48C80822812800122300B00201354B50340B83314340BA02001C4300200241301208284240384A00050000140 202280202B043282000000000000000000FFF5BB0002002403422103082022802004010022400000A00800108840C08C00D1 0000820801608000060A10001001000980810801000000000000804994000848A00E00000000000000000000FF1777000000 026800800CA003880490080020C804800040A0120230A206200204200264210200200040200202300000200200B40200200000972040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0880AC0AA082 08808800400000400200002A00008002A00000002202200B02A82A80002A8A002A80882A82200402A82A80002A80000002A8 AA82482002A8000000000000000000FFDE1E000000204800A00A00A02C40D00B10C20950800080280240200294288290210A A02802002000002042802A22802002A0A802002000000000902002002882912002000000000000000000FFAB990002002202 0420023124040242A0453154010000810CA80D080CC0CC310080008110000000000048880048048008941250040040008000 00C34804004844841000000000000000000000FFC02100000014590190180D815841801A319019418000106406D46444004000572040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002308010002 10008000000000000000000000FF51610000AA0A80CC0AA0AA0AA0280AC0AA0A812200003002402802A00302002A82082202 A82A8000AA82002A82A82A8228AA82A82A80002A80002A8A282A84882402A8000000000000000000FF0B7600015435215035 43502423122C82B02404B00000D40C00529548AC0C88C804C1020D51550000550528D50110550540900D5055000055000090 0550550900CC0550000000000000000000FF2F20000000404600400400400402400400404608000103100105181150115100 08C1011001800000800001000001001900001001800001000001000800001001090000000000000000000000FF5AEC0000AA00d72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080490480080 4000004104800204804914000000004000800000000224004A94C04000000000000000000000FFD327000000004804800800 800902840800810800800000A00240210214208200210A00200200200000282A002042002002002802002000000000802012 0020020CA000000000000000000000FFD1A50000AA0880800AA0AA0AA1000880AA00000800002801100002080002002A9220 3282A82A8000AA93502A98882A8220AA82A8AA80002A80002A89802A80600002A8000000000000000000FF38820000000004 0000000208802000000208800400000080C8800000010020028808280000000000801000001441001010208000800000000000372040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010005000004 0042044840240008000810810092D10102A90D92812050010084092010094210410014010010014000010A00016011053010 81001000000000000000000000FF4AA5000410002C00840C00800C10C54C00D24C1095003431031130834C20CB1035334334 5300A00951301308300300300308B0030024110C0001043003003003103000000000000000000000FF31BD00000001180188 98058219431019098018A1800000624602420400620640600408608610600004644602608410600640600E02600000000000 6016236114006000000000000000000000FFDC710000002202312002002002312052004A32C300008414A88D4824C088308000b72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (608605620020 4000000000000000000000FF92780000000000020500820520000440A000005000000002001101204202402102A024048024 8000120020000106010100000100000000000080000400000400080100000000000000000000FF197E000000003801829804 0000B000C0200C0040048002044412402424C00000402C148544000200030240300126000200090010020210000000020080 040000080000000000000000000000FFA750000008008800080880820812890084900988804020210200200A092102322002 10001A18240008200200200048240231200220200010000000210A08A00A400000100000000000000000FFC931000400000400772040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02610A406000 00613600404608E006004006006000000000100006006000128140000000000000000000FF1F1C00000000000100800980D8 2182090184182180000040120040042040240C60400464000060000060061040000062060840060060000800000002060060 00104100080000000000000000FF544E0000000000010878098419A3805800821903884018C00E00600604041803400C40C0 6445600010E2460A03000061060040060060800000001820061AE180064018000000000000000000FF2FEF00000000000512 190580180B80982288180D900000C2860880A000A08420429409409408620002E40604040640E00600C1060061000001000000f72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002982580180 9211801801800004400210401408610280600712E00E00600000600600200008600600200000600000000080500600600602 8000000000000000000000FF5049000000089AA80AB9018218E08B98918AB8AB800022640E00020010E0C2054004E942340F 60002AE2062AC2C82162AE2AA2AC2AE0000000004042AE2AE2AE144000000000000000000000FF6061000000005800001801 90D810801801801801800001428642000008600220408400C006016000006006004006046006002004006000000000234806 006006404C08000000000000000000FF8BE300000002000500014B80180580282B801801800010604210C14C242430154448000f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AE2AA086200 000000000000000000FFEC0F00000000580280000185580004194180180180000060944064C64340124040D4006006006000 006006004206106006002006006000000001026006006002400010000000000000000000FF45CE0002000C1B009519019099 541258A1955955800051655425022020C42E55442C40654655600055652E55453044E5565525565560000000015565565565 52485548000000000000000000FF6DF90000000A98A90AA04B88188D885C038AB8AB80002AE04212C0140063020842001462 A43060002AE2AE2AA08E2462AE2AA2AC2AE00000000008D2AE2AE2AE0102A0000000000000000000FF7EDB00020001184D00008f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C60060000060 0605200600600608E0360060000000000C60060060120A2000000000000000000000FF28F400000004588080185588080080 3801001801800044E00010E14E24603200244C00410E00600000608E00220010E00600600600600000000000680600600242 A140000000000000000000FF712E000000009805802001845001049909801801800010600442400408400600408600E00600 6000006046002006006006002000006000000000006006006002002008000000000000000000FF76930000000858298AD885 8090AB081E278AB8AB80000062AC00430404E2872AE1002A62262AE0002AE2062AA0A82262AE2AA2A82AE000000000AAE2AE004f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (805805001841 001801000000005400408602000600005600410600000000600602E0460060060060D4006000004000006006000016006000 000000000000000000FFFD100000000898AD8000018908898A98890AB8AB80001062A000410424622612000E34400E2AE000 2AE2AE38608E2AE2AE2262842AE0000000002162AE2AE332242000000000000000000000FFBBF000000000180184200100C8 03805825001801800001600020404402601248210611420600600000600600644000600600600000600000000000E0060060 82012000000000000000000000FF09080000000258048898D384084080180100180180003260080B650E096102010224044000cf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A241E0000000 00000000000000FFF73B000000001A0081090180180502182100180000002040162A401620000640610600600A0060000060 06002000002006006044006000004000122006000004006000000000000000000000FF197C0000000AB882AB08AB08988988 388B0AB8AB00002AC20602C23608800E2AE3062AE2022AE0002AE2AE28228E2AA2AE2364042AE0000040002022AE2A82260A 6000000000000000000000FF9D25000000555B51D4203592595188D915155955000003054401444011055602842E4144C255 200055655645655055655654E48C55600000400040655655044450E000000000000000000000FFC0FB000000001811804001002f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20090A648704 400804400A007281106000100000007006001000005000000000000000000000FFDD66000000025802888001001831805A25 001801000000402609650809400C08E2220070820000000060060844060040020161448060000000004A2006000000104800 000000000000000000FF4ED9000200201A01842801805805831809001801800080080D246040821546000102002045002001 006006802000802002106C1000600080400000B006800012446000000000000000000000FFC9CD0000004898E98000AB8E98 C18D18810AB8AB80002A838450600060054422600A2AE25E2AA0002AE2AE22A0AE2AA2AA3260042AE0000040001522AE2A8300af2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (218018910419 01914050A20128740320210E0440262464430D6140C8650614408842400A04F00280612000208010C0060A88864040000000 00000000000000FFFF85000000003C0100114484010582580D4918018409A2202432522104F88608420002603300C0200060 0648A0000130438160460060004020022060078A0086004000000000000000000000FFFC74000400401A014310A00200CB88 3A43089829934911303501C80B02680624411948340904610140605E80210740A02204702688614120210211680701000640 4800000000000000000000FF3AEF000000401800E20801801811881901021CC9000000420100680E40421640902388E10608006f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (014000000000 0000000000FFE244000000080001041000989949801801801801808000600409401008600022408204A01C40A00820608620 44804240040260040060000040002020A6000052000020000000000000000000FFF73E000000200403481004801883863061 8A1881880004E0940442C2236682114702032120082030046266494206004004086504006020104000482206000022008280 000000000000000000FF976D000000201A4002380A801821801883205A03800004241000E03600202E11502F086282246200 02E0070040062149120060020064000020000050164B0092005000100040000000000000FF1271000000003800209800001800ef2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000028006 080010000084000000004002440000000010010000000000000000000000FFDF280000004244040880280200800D40040000 0000000102881080300003085400000005400000000000001000260081000000100000000080000080000004C00A00000000 00000000000000FFC87F00000040044228580580180D84394592588188000362080061062464940044101060061000400264 0610010601008C026000006200000000506486008002000400080020000000000000FF7B8100000010000140180900980180 180180180380880060861064421060244CC12000E4C203241040E14620000004000410600000604000000200004E2A008201001f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C8888AAC8280 082A2302242402AAA0328AB2922AA0A292A0002AA2AA34208A20322A2AA22A2AA00022A0021022AB0000CA2AA00000000000 0000000000FF848000000020022000000000000000000020000C00000D010100040003003000005023108008800080100000 0001020088000000800000000000200000000288100000000000000000000000FF465B000000288CA8C008068808369008E8 8AA88880002B20022020022A20020022422020022020002AA2AA2122882322222AA2222AA0003A20000D62AE000402200000 000000000000000000FFA33100000000180184388001200800100000002200080040240403040140440141480C8008148000009f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF3C44000000088C208AC8808848AACAA8AA8AA86080012830022AA113202203402202002082242001AAB2AA38208A 2022222AB9032AA0002020000422AA0000022A2000000000000000000000FFE9F90000004002024041100000000200044014 4800080008548910C8800500A01004001408C000010050040002451411000041050040000000024050048000040040000000 00000000000000FF24F6000000555915F51955949955955955D558818000406C2C55782650748615650410644E4060005565 5645633451644755623455600155600008DD56000044456000000000000000000000FF6C150000000AA8A88B08408AA8C080005f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00800290040C 00800080000000000000000800040000000000000000000000000000FF182F00000000000000000000062820800810000000 00500000000000000420C60400008200200000800C0080000008802800000000000000000000000020000000000000000000 0000000000FFA3F600000022421200000405400040000000010A0000010A880008301089485400A834023004800000000005 0200090090800410800000100000081000000008008000000000000000000000FFD204000000000100202048000000000000 20000000088200200003008200010100000080001000000010000000200400000000A000000085000223000000034000000000df2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (955913840105 492690754491692DAAD10C81680E5564514860068060042AE206006084000000200000006004426006006000000000000000 000000FF73920200800000A80822030224424003C16030816940C0CC882848140400AC004CA42004298042A800442C004534 000058000404000000000028004004005004004000000000000000000000FFC2D40000100C08008008908808008A08049049 0882C00223020020C2093002002012002012022200082002002002A028028022020000002000000030020028020020000000 00000000000000FF689A0000000000000000000400000043200480040000208040100410040888508280000000108030400A003f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFFE33000000000800800800800800800801080800A0002020020000420832032422020028020128280422020020000020 02002002000000000000002002002000002000000000000000000000FF507E0201000040A008220410000200008000010028 000880903000050000C8000000200028800A8000004900004000000800000000000000002800000080080000000000000000 0000000000FF5CA1000000002C108008008C4800800800804C00800000280200202208200200214200200200A00102200200 2003802002002002000000000000002002002003002000000000000000000000FFA614000010141801801D11941809B5581500bf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (65010040CC20 400C000100200000446142007014356300000000000000000000FF33FD000000001831800081801801801021801801822002 440E1060080024024021120120004060A005601604604600400404400010002000000010600200E004006000000000000000 000000FFE41E0000000000000000000000000000000000000000000000000000000000000000000000000000000000000006 000000000000000000000000000000000000000000000000000000000000FF62890000000012000014000012002000000004 0000000050050000000040000000010040008000010000000000068000000000040000000000000000010010010000000000007f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (05800003440E 10600800614354000315412609640008603610610600202220200200004040000010600201600E5464800000000000000000 00FF96E1000100011841810029827811829001AA1A518220240802A06A4658221700F30D0428122460E006E0460262268940 040A40040A00C00000002270B282632504E000000000000000000000FF68410000000019A180025180080580100180182980 8009082240E0243041060060A420400300600000608600600010408C10500804000000000000600304644400600000000000 0000000000FFAE04000000041A01800001AC5800831005B51A4D8080504046816C2020004214A4225408C00964001061460800ff2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 7CC0000000031841911061801801883C01C21A1181000C008A18608614601229086360C09404600100600600600600200300 200600004000018001E0020A6006006000000000000000000000FF91CC000000025813E01001808801883C01D21C21882190 6932806145C0604200040204F02400602804684E00E000002002082002000000000000006082306406026000000000000000 000000FF0F3900000000390C880401811801801881881801914000C2460072000470A3050A0300442680600900600E016000 002002082806000000000000007103206406006000000000000000000000FFA19D000000041C08800481D0180380184380980000a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08208A202004 0000000000400060068060C6106008000000000000000000FF3931000002000001003801812059029F210558258000310014 097084256CCE00420600E82225654808E0268161C001A00201A00408000000002040E0068060260260000000000000000000 00FF2B7300000A000021000B058010810518410018218080024004104824504906A1442E0260C200600010E0460460060020 0200200010000000000009782CC8720D246200000000000000000000FF266000008000010100080180300900190100180180 0000CA04804404004086524906007302006000006806006000013802802000000000000000006008046084006000000000000080a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (808862004040 4024724B01A043046002026200007037026040006106006004000000000020506044107516406010000000000000000000FF 4EED000000101901802C11A01905C008014818419000404010044003926086546096C2F12608E01000600600601600600600 6005000000000001407106516104006000000000000000000000FFA37E000008001A41C00B0580180188080522DD11808013 4D1005480209620754600E20610E03632000720604E000086016206004800000000000806814406805106200000000000000 000000FF3D07000000000001003801A03001501805001889880040628442690600400E0A400640E01240601000620E0060060040a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF7D77 000000015801A00809A01901801000C034218000A00000802000242022022016203006016008006006006000006006006006 00000000000020200428C006006000000000000000000000FF8ACD00000010190BA01801A218058210109110118940116212 0400869003125021008D0924146B0080682700600E8060060060060000000000400120060042862060000000000000000000 00FFF525000000001A63A05801804801800B01009809802000F8010040820070200130020860030060800060070460060060 0600700400000000000000E106006206A06000000000000000000000FF112500000000BA09801801832941820989203E059000c0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060164060000 000000002C6A26AA4006006000000000000000000000FFD66100000000000180180180184481188400182D84003500464940 80008404002000004086236000222202006006102006026006400000000000002006004006006000000000000000000000FF E0D8000000001801800801801800001000800001800000600200200600600600600400200600600000200200600000600600 6006000000000000002004004004006000000000000000000000FF86BF000000001A01801801801800001400801001800000 68020008068068060070048000070068008028020060068060060070060000000000000020060040040060000000000000000020a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A2AE22C8EA23 E2082E92CEAA50862D60B13AA0B21AE057482106006656208000000110023102004006006000000000000000000000FF5C23 0000000002018008012158000C5E04151801B140806554814516400414492284CC45575062A140C14504E001003417006106 000000000000006000806005006000000000000000000000FFB879000000200181A018210118009238A00018818A40020004 80400000008480200485480600E04001410404600600200600E0060100000000008020240068040060000000000000000000 00FFC2BB000000000401800C21A01A00223820483881A80100028C0260305200B454B2C830604408650010202250E000002000a0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF154C0000 00001800800001011A441110051058058000006000904806107040084844814046846400004C04C070068028060460060000 00000000506C03546806006000000000000000000000FF699E0000000018018010010018000010032018018120802C810040 0300600000D00450408D147D00805005046008003406006006000000000000007002004006006000000000000000000000FF A98B00000000180000200100BA000A500113180190010000540164C840A408C242A6046246C0E02828A14A88E02020288E80 632E000000000088802083006006006000000000000000000000FFCA86000000001801005401000A000010014018298020280060a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (602600000000 000006640200E00C006000000000000000000000FF5918000000245B02A81229201B02B0120123181380008C3050C34C2303 0C02800804D04B0F0AE000D20A804C6080884306037246000000000000C26902D27204906000000000000000000000FFE05F 000000481840C242018B30286211450838C18000210304086110B0008E3280A0026026206000004024006000024006106016 00000000000010E20200F00D226000000000000000000000FF8AD7000000001801800201801800A010012018018000002806 004002000806000006004006006000804004006806804006006006000000000001802002004804006000000000000000000000e0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01244A002003 003002042022402000002282803000102103002002000000000000002042402000802000000000000000000000FF40770000 00081800113A00012001000420080020000124400000C2844C5048E044C42842040A80000201708800060400000805400000 00000000A04010840200880000000000000000000000FF4E8500000002600006000000018804000000A60400000204200C00 00101000030100110448000000500400A50006081080100208000000000000080180280140220000000000000000000000FF B8C80000001019A08840111A98360B10010218C9800040E200404036030002040004004094006000000000026806004E06860010a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002A00000000 590180580182B8018C18A9801805800044600400E00621410401415440640600600044E00E00680410600E406A8600000000 000000632C02600E026000000000000000000000FFC49D000000510C40D28C14C80C92C10C00E20AC08001903343AC352B14 2022A2220313305340200110334285200B0424A2123042000000000001843003C13522002000000000000000000000FF3CC2 0000002002002000002002002001822404020000000984B20900A08380089030C20800A00000AD0800001090820850C09000 000000000000008A00030C10040000000000000000000000FF0DC100000001084280082C844800900851000100800018204A0090a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 001041001001000000000000000000000000FFD97600000008A0A80A80AA0880CC0A80A82AA0AA00000002A8210000018000 A202000202002A80002A82A82A8AC8A20220A202A0000000000000AA80002A83402A8000000000000000000000FF1C900000 00240A00800A00A04A02A00A00800A008000152802822C02822C0A10A8D228288300200100200200200210A91201200A0000 00000000002C82802802802000000000000000000000FF9AA800000020020420220024024020220300100100004008040891 28C848C4004804810849004001001000004024800804884004000000000000000834001154804000000000000000000000FF0050a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000100100 C0AC0000000000000800800000090080000888000000000001000028000000000000000000000000000000FFA9A300000008 C0A00C00AA05200C0A80AA2AA0AA00002202202A8280280200B002080482282A80002A82A82A80882292282200C000000000 0000AA82882A82A82A8000000000000000000000FF6C290000003503141543543303103143501541540000440D40C00A30D2 0AC0CC0C10010D28D50000D50550551311440C50D48440000000000000550A80D50C08D50000000000000000000000FF7F59 00000042041260C40050048040400000040000018011010010510480D004914180110100000100180180124110000101080000d0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000200234 2012002023084022002014010000C048308008C0C8088804484881500900400100480480482480C108804B44000000000000 004825004800804000000000000000000000FF91EC00000000080080C8008808248408008008008000152002002012022022 11210228204200200000200200200200280208200A000000000000002512002002002000000000000000000000FFC6D30000 000AA0800A00AA0280400884AA0AA0AA00001102902A8200009200A002005202802A80002A82A82A82882A03203294100000 00000000AA80002A82A82A8000000000000000000000FF4F62000000004020400000004000040002400400000088801012010030a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000000424 000C2012000000110000000000000000FFEC1100000000002040140A00000040E40040452002A10012910311A10092012090 21241081080109009241031009001001001000000000000001011001001001000000000000000000000000FFDC8D00000000 0800D00C00800810C00D10C00C0894C142B00304343334331340B14300B4834D241100341344301301300B50300200004000 0001003023103003002000000000000000000000FF568E00A00005582184180B801801831845941841800008430648600600 E02608420E3040360060000D6006006006006086004006000000400000006006004006006000000000000000000000FFFA1E00b0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (640612031624 24022D642000600E00600200604400200600000000000000602400000E444000000000000000000000FF7317000000000100 00408A05008C0840218000880040040040200048500010110208000040100140020008000006100000300000000000000000 000020200020040000000000000000000000FFBF090000000218010A18000000090010899240101000034008004404544148 080484008454230280120030010006010108284000000020000000010020004000000000000000000000000000FFE92A00A0 0000A80080000080084087082680488484002821023CA00A00200204204A5E600240200000200220200044201204241201000070a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018108050 0188484B80180384580180005340042B240E0420160024024842B20060000560A600604600E0040040060000000000000060 10130090004000000000000000000000FF1C250000000018018A100580480310380180590580000042040083062220062060 000160440060000060860060002260044A420E008000000000026004420044004000088000000000000000FFA60800000000 18008A1011852910041849809811844000E24450A2861262762120C210821802E30004608600600410603400200600000000 0000006404180006204000000000000000000000FFCC65000000001881803081800820009013811801800003008402602E0000f0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00002AE00202 C2802AE000000000000000000000FF7FBA0000000048888410008C880000180180180180000558A600001200200400A4C000 600600600000602600620000600200600600000000000008E00E004004006000000000000000000000FFCD6B0000000AA081 8A80899118000898898CD8AB80000000BE1028260062362B01A01081462AE0002862162AE6CC2A62AA2AE2AE000000000000 2AE0101042602AE000000000000000000000FF4E27000000000025C00043848900243841801801800000040600610628E106 00A00E04200600600000600E0060020060020060060000000000000062A4404004006000000000000000000000FF72FB00000008a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0440A022C2AE 2AE00020620E2AE0A83A62AA2A82AE0000000000000660402AE2AA2AC000000000000000000000FFCECB0000000218200028 5180500184380180180180005060C60505405041040020020060040060001060860060061060020000060000000000000065 44402016006000000000000000000000FF30FE000000151822012955805955D559558D195580002804165572A02D452C3020 1654E5545560004D648E556130456552550556000000000000406504552556556000000000000000000000FFF34000000008 C08A8A90820208AA089CAB8898AB800005420620201202A2242A2448A5420E2AE00022E2262AE08E22E2AA2AE2AE000000000088a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000285180 1801801801801801800029600640601000800C10A0860C008600600000600600622600610610800600000000000000615200 A00202E000000000000000000000FF987B0000000000000108018A184B801A01011801800053600E09640804008C4AA40690 000600600002E08600640001600600000600000000000010E002002002006000000000000000000000FF1C970000000418A8 00580180D001801805943801800000410400010428C00600600A004004006000106026006006006002000006000000000000 406530006002006000000000000000000000FF2A6000000008B8025A18AB8010818AB8A98058AB80000042242200240042260048a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5565445524B4 034000000000000000000000FF115F00000000B80180B8098000030010018018018000214006010080004002502056002454 006000006006006006006016004006000000000000006006002106004000000000000000000000FF6CA100000003D8A80AD8 118438078098AB8AB8AB80004043040062A02A02A400400E0080062AE0002AE2AE2AE08E2AE2262402AE0000000000002AE2 122A6282106000000000000000000000FF014B0000000038020019038C98B194580100180180000440D41480000000044464 2040022E00600000600600600000601604000600000000000000600200604A484000000000000000000000FF98830000000800c8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (082060042AE0 002AE2AA2AA0AE2AA22E2042AE0000000000002AE58637A4022AC000000000000000000000FFA268000000040003C0080180 209102080180180180000840260800020081260A60802C800600600000600200240000608601600600000000000000600400 0004204000000000000000000000FF96690000000C00538C18818320B10AA8AB8AB8AB80000242AE2A02202A82AE0262002B 40862AE0002AE2AA2AA2AE2AE2A62D62AE0000000000002AE02E20002E2AC000000000000000000000FF8802000000501951 B5094590804110D155955955800004C41644854A54441241242E00232C5560005565565561505564565045560000000000000028a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800A05800C01 803009801C01800100E08700531410614520500620E087006200406455104120003027006006000000000001006004004011 804000000000000000000000FF569D0000004018ABA21803A2C001801001A01801800129600648403512E004524080056086 80600000600400400600208610E006000000000000806024804148004000000000000000000000FF8B690000000038018008 09800031801001801A01800004680604C08600400400442708622E0060010068030024000020060250060000000000000064 16102402004000000000000000000000FFE4780000004A990188B8E59800838AB0AB8AB8AB80001062AE0042142042AC01C100a8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B64864828260 00140400000000000000FF9543000000401901801005800C0180100802182584210A400048E24C5004B0890C420C04161461 28446444CC408604200692400600000000000088610600A006086000000000000000000000FF7E2C000000405801E0000180 084180100382190390A810602020200700A0000A001312120E1360D013600220200010200608580600000000000248610604 E026006000000000000000000000FFFD5B000000203801A01401A00821803001A01C418C09446E001120454424100105CB00 004680E00108F0030520060C2006044806000000000002A0600682200F106000000000000000000000FF3E890000000019010068a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (628E44E41052 62004000364B4006006006000000000002086106084082404010000000000000000000FF2E9D000000201801801041842801 889001851801800000628441204640E00E00602A02604610600008620420422008409600600600000000000000604604400A 244008000000000000000000FFEF8D000000001801C0102102080380300580990183004361440021240560064CE28241E166 20640000601409404600C246026006000000000000086006020042004000000000000000000000FFA1C70000000010018A80 11808931801008021D21800001402132EC8CB002A0400002D00D0E8B641023600400401022300E004006050000100040006400e8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2214304000A0 1180000000081100040040A40001001000140540800000000000400100060000001100000000000000020004800000100000 00000000000000000000FFD9B800000068000040408001000404000180000000000201080104080300100084A00804300000 000001080C0006088000040000000000000000000010110320108000000000000000000000FFA11F000000401A01D0001080 1905885008001841800002400600648408600210208200600600600000E00010040000448604600602800008004000641620 44120040000A0200000000000000FF2693000000001801829000815829811000001901840800C5260C600C01655221244A4D0018a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620455600000 0000000000000000FF9B990000000C08AAAA88928888A88880AA8AA8AA800832A20A2A200221222223208A2A24022AA0002A A34B2A20AA2222AA2AA2AA0000000000022AA0022422822A2000000000000000000000FF3325000000240400040022008400 20900000000000008000010010808000080802002200010000000000800A00000800010010000000000000010000002B0090 000000000000000000000000FF007D000000028AAACA88088008888800A38AA8AA80002022222B24022C2332322402202100 2AA0002AA2022026AA2222AA2022AA0000000000002AA472220052220000000000000000000000FFCBA900000000380180180098a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000090 140200010000001000000000000002000000408120000000000000000000000000FFCC980000000BCCAAE068B0CC08AA8C08 A28AAEAA80002AA3A23422223022022130030022AA2AA0012AA24220A0AA2222AA2AB2AA0000000000012AA2AA0220422AA0 00000000000000000000FFCC4500000040A20020204004440422500140140100090001208011510800040048400110550040 0100500081000110800480100400000000000300410108C004014000000000000000000000FF653500000050195591190190 3955903955755B55800055745741745642E52444493610ED57556000D56C1640E356C57556556556000000000000556556800058a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (204008804A04 00000000000000108040088040000080C20020000C00000810000400000200080000000000000000808C0800800000000000 0000000000000000FFA65901000000400000000000000204028020228000000008280002D0040200208C0000800800051080 0000288000008000000000010000000040800000000000000000000000000000000000FF3F300000002004000B0002002000 04000820000000000000081000000401280004A04C0000000001000020000000100800000000000000000001000000080408 000000000000000000000000FFA8B200000000200000000843000001200000000000080008008308901100000D081101000000d8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000000000 000000000000FFA3DB004102015C51801911905AC1A55D15155F159400515557556046556546B57084A06156006341016006 00610684600628604000000000080000620E006006006000000000000000000000FF9EA00A00000A80000800030092057810 4B483001000100402C0255008002210200048500844008300040145504000146A4004000000000000A880140800150000040 00000000000000000000FFAEF100210400CA28800C9090090084480090880C8A00D0A5032228024420831420020020832020 C8013002022082022002402040000000000000003003002802002000000000000000000000FF2F4D000000000000000200000038a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000008000 06000000000000000000000000000000000000000000000000000000000000FF6175000000002828A00800800C00C0080100 080080A089280290280200200A00220200200200280080200200200200200200200000000000100000000200200200200000 0000000000000000FF29DB0C00000A80002100040140001200121044000000C0082882082802024000000010088000004080 0000000001000540000000010000000508001100001000004000000000000000000000FF4933010000000C28908800802A00 800800C0080080A028A00208200280200A64200208200280351000200300200200200200200000000000084000300280300200b8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (843840023801 A04021655653640A0D4312D42012056007221010146006042546016046206000000000000000104800106006006000000000 000000000000FFCD0A00000000200080180180180180180200180B8400046006006082004026006502486106000000006026 00200040601600600000000000000000400A006086006000000000000000000000FF44BE0000000000000000000000000000 0180000000000000000000000000000000000000000000000000000000060000000000000000000000000000000000000000 00000000000000000000FF8BFA000000001200001000000000000001A00000000000000000000000400500400100480000000078a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF673500000000200480000181180180180004180D844005210600650004404E0864041560062240082071060040 80406016216000000000000001906016006106006000000000000000000000FFD784000000000001801801801D0393182384 9805B10020622E28E02208418202A08A2020860040401260060B222608E0B600600000055000000042800608602200600000 0000000000000000FF0A50000000000000801821801805803801813801800000600702604A00F200210802802E0600400048 6926102000166106016000000000000000854006006846006000000000000000000000FF3A1400000000000480184181180100f8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600C00080 6016006000000000000000007804006006006000000000000000000000FF642A00000000112180200183390191394B805811 81000062C6C2684C004822182030A02106602000006006004806006806006000000550000000402007106002006000000000 000000000000FF4341000020005000800001821801843805A498038C0000628702709400700004824140A006002200106006 00500000700600600000000001010000200702E006006000000000000000000000FFF9B0000040022105800001811C018419 200158898221202026A060A000480222B21480F906804C0000600600400600600600600000000000810000680612E80200600004a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01A01881A010 506926006204005800200814044246202001A0E00E0040060260460060000000000008008020060068000060000000000000 00000000FF55C9000400001885800201819927821C01803847800007E0069C614412650008004C53413F0021000060264240 50006006896010000000000004014246006000006000000000000000000000FFFF06000000008809800001801E4984D81184 5801822080401620600C4440210A988000480600400000614604440680E00610600000000800000088240409600400600000 0000000000000000FF0DD1000000040845804001E05801801809A0190180302058060060040040C6406000004006004024000084a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF6C8C000000003A95809C03C81811815801841D2984504062174EE91C9021000503C632190600600480680E40600004 604700600000001008000410104610608A006000000000000000000000FFFA8A0000000908210018A180381595584DA01803 8001826006206100000007106017008206002500407006006406006006006000000410010810A02006006002006000000000 000000000000FFAAB2000000008A01001801C01901801809801C41C0000870C6006441202426A06806A1120620288020E88E 00622801600600E008000000000000013006016802006000000000000000000000FF0059000000001B0180000180180180180044a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002007006006 006000000000000000006007002000000000000000000000000000FFC8DC00020000982880180184180182182BA008018000 00600640681080681600440E20500680608500600E0060000060060160000000000000410060060000880000000000000000 00000000FF02BE000000001C018A98438858159118018018A1E0400D6C0E056100006006104800024206006A004070060062 06006006006000000410110010C06006002000000000000000000000000000FF2C960000001059090A1901821801805801C0 1895802108E00E10600480106E60610601000600680000600600600700600600E0000000000000200020070060020060000000c4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D82988804262 062A611450E2A64CC9504060D000F10040602643240800600600608004800000000000600600600200000000000000000000 0000FF9F0B000000003809900001801841801923841883842000E0D600E0440400080044000B620000604000601600200600 6006006000000000000000006006002000000000000000000000000000FF11E1000000000800801801801801801801801801 8000006006006000000000004004004006006000006006002000006006006000000000000000006006000000000000000000 000000000000FF8D4B000000000800801801801801801C0180180180010068060060000060000048040040060068000060060024a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF50E5000200001001A02001901A0180988988B089C8000063AE2AF23A0AC2A320C2060B468640E1A828616E32225E016006 006080028000000010806006002000000000000000000000000000FFE746000000000800800005C01A25801801835815C540 40604E417545250456214D554C0150154A2C40640604C1000060460160000080400010012060060060220000000000000000 00000000FFEAC6000000200868804001801A21801801921803808010F00600640400080880400C20600056401010600600C0 06006006006000000000000000006006002000000000000000000000000000FFB60B000000021A0080000380180180B8118000a4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060060 00000000000000002006802004000000000000000000000000FF1653000000044001100005801801C05C44000C4184415460 0700E106C0100234414401405050CA0000600600400000600680600000080000000120600600402200000000000000000000 0000FFD64D000200000001200001881A21801C002208018000006046007C8702400200401408404090505000600600400600 6007006000001000000000006006804002000000000000000000000000FFBE55000000001000800003A0180580180181200B 82C140691640604A20F44A015546A4C28F2260812062A60AA0A800E0260160000080400000080060060020010000000000000064a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800082600600 600E210082804004000000004000006006040040006086006000000000000000406C26414206000000000000000000000000 FF178B000000228028B41A11933A31A35800021911824012744600EA46C2CD0A004884046C80824A00A2EC0E88884744F2A6 A06000000000000880828326C8482E000000000000000000000000FF6C6808000040360280D8818018038819418838038880 21611652608B10702228C85030001611401080600684400800601610600000000000100128200604E306A000000000000000 00000000FF4615000000000201801801801801A01801A01A018000006006806002004002004006000006004000007806804000e4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFA7 9F080000000C01810A00C20B00820801250892920800200300200206224200047A042042002101002B0208200200A0030020 00000000000000082806020002000000000000000000000000FFE7DA00000002180000780808800C00000192000040212080 8862001418400C001004484A084F8208300050430106000A000000000000000004D00000111C05A400000000000000000000 0000FF6B180000001120000800002040005000218806000C811804208882A040001150918093008010000002800000800E00 0060000000000000000100220080208008200000000000000000000000FFC2D700004000023A86988180180388BA0020180D0014a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400480400000 0000000910800B04004810000000000000000000000000FFF616000000011809001801805901941A210A1001800200600641 604E0C640E10601400C10600600008600E206086006006006000000000000308426416116206800000000000000000000000 FF26A5000040480840C34A04A00842804C00810A94B40008320A8034032130222022C35238234B308000232304B043303A42 002000000000001021002003C23082000000000000000000000000FF82E70000002082402004044022602442C02025000008 000A11010C40808C20A84000A00100800801000C08800820F20409280000000000000800848A0000080100000000000000000094a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008001001821 008011481021900801021400000001011001001000000000000000001201400041001440000000000000000000000000FF7D 090008000A80800A80AA0AA2AA0AA2A20AA0AA0008A802A82A82200400203802202A02A83008002A82A82A00A82A82A8AA80 000000000004100108082A80002A8000000000000000000000FF0529000200402A24A00800800800A00810A00800800A04B0 0300208B00B00A812912012002842400802802812802803002002000000000000A00ACA0428034C200000000000000000000 0000FF04210000002002092020010014014010012010010108805004004800AA0C808248048040009108C0805004800C01000054a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF921700 0800000082000000000000400010000200000104800000108808802000000880880081082300000000040000000100000000 0000000082080808000008000000000000000000000000FFDBBD00000008048208A0AA4AA0AA4AA0AA0AA0AA00202A12A82A 8208220A80028288210AA83081102A8AA82202A82A82A82A8000000000000010150B082A80802A8000000000000000000000 FF9B8B0002003522303341545545541543443541540100480D50D50440C00D08A50CC0540550420500550D50CD0950D50D50 550000000000000800C40540D50D40550000000000000000000000FF508C000800430030440000200400000400400600000000d4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (016000000008 250000046006016006000000000000000000000000FF606D000000203104202000001401001211200401004014C00500480C 8044848210D0834004904900804000888C0080100400400000000000091080C004804D04000000000000000000000000FF95 CB000000828A28800800000800800800800800800080200200208200200A0120020820020120080020020020020020028020 0000000000020042285200204A000000000000000000000000FFC8B50000000840000A80AA2AA0AA2AA0A20AA0AA0003200A A82A83203A8860280200240AA82202012A8AA83200A82A82A92A80000000000001000802802A80102A8000000000000000000034a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (320820820501 220021820020020E000008200200200244201A00A000080000028000010402008016100000000000000000000000FF205A40 080050040000040040240040042040040200A108900100100109D5812410090011116010A13110480E800100100100000000 0020081601021005001001000000000000000000000000FF16AA400000C00C008C0C00404C00C00C80C12C10892104B00B22 B03308305310B2830430430030C1003002092003003103002010100420101001003103503003000000000000000000000000 FFF6C3000081801845801814001801801845801905840050644610608640600420602E50C00614E00022621600600600601600b4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF71CA000001 84100100180801183480392B001801814002622600600E00448A116014082006020102496000204028004006006000000000 00040201408E204006010000000000000000000000FF082C0008800000000500100080C210A0AD84000000804200A0400030 2000104200101000001100800800200000560000800100000000000005100000802802C0000020000000000000000000FF9E 960000000818220C180800000000000180D00808002402104300502002100B42202B01500080000504200000060001000000 10000408200000000080280000000000000000000000000000FFE42F0000808010008008020008000008830108C0820001240074a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000000A A0100006206006000000000000000000000000FF259A000001801044003800001801801801855801804000600600600E0962 900024A455601608E04000600408C00600400600600000000000000825000612A0B6000000000000000000000000FFED1500 00818010000810040418018118008C180380002860860060A60C600020010240614600600000602400400022410E00600040 0000000090000206016056100040000000000000000000FF6EC40008018210010D7802021908901800091843862009601640 60864942620CA0062020A611006020E00020418600406601600020000000000000200E10C50600800000000000000000000000f4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E2A600E0082A A0044402062084002AE2AA28E4AE2AA2AE2AE0000000000001482022AE20240E000000000000000000000000FF9CE3000001 8030088008000018008018008C980180200060060060072060810002004C0006000400006002006000002006006000000000 000308008006006086000000000000000000000000FF8D880000018A80908A80AA0AB8AB8AB8A20858AB81802AE2AE2AE2A6 E04106AAA40A1002C62461002AE2AC2062AE2AA2AE2AE000000000000400042AAE042246800000000000000000000000FF84 02400001802008800000001800801811001801C000006006006006044026006000000046046A800060040460000020060060000ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (22400001A41B 058A80AA0AB8AB0ABAA28018ABC0802AE2AE2AE2262460022A805A0042062A90102AE2AA3060A82AA2AE2AE0000000000010 6074C2AE000226000000000000000000000000FFEE3E000801A04A45841800001801001801820801A0200060060060161264 4200012801411608602000600404600600200600600000000000000011700610D106000000000000000000000000FF571B00 0001908821935954155955155954804955808055655655653609623255608000C54E55610455655443655055255655600000 0000000000007556354457000000000000000000000000FF11010000018A908088A0AA0AB8AB8ABCAB8898AB80002AE2AE2A008ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000002040 6006020006000000000000000000000000FF08FF00002100084184C000001891001801801801801000600600600600C03404 E10008E006080000006002016206006006006000000000000008136006110006000000000000000000000000FF75B9000001 002811802000001801801810901001C0200060060060860942940064A05560D6000408006002096200006006006000000000 0000080460060D0096000000000000000000000000FF99570000019298C580000000180180180184D8018010006006006016 046022000004004006000100006002026006002006006000000000000280104806400806000000000000000000000000FF33004ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4104C2450102 5405564160045564964D6350456556556000000000000020416556510556000000000000000000000000FF14318000000338 0400180000180D80180100D80180820060060060060001080004120060060860140060460060060060060060000000000000 08006006010006000000000000000000000000FF55EA0000890A98898018000AB8018AB8A392B8AB80802AE2AE2AE2AE3242 040060142222AE3060222AE2862260AE2A62AE2AE0000000000000020062AE2002AE000000000000000000000000FF68A900 000500380590180000182580180888180180400060060060061040845004280020060360040060361060000160060060000000cca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00AA08188008 00000AB90B8AB8A30830AB80122AE2AE2AE2AA2AC2C61000023002AE20200C2AE2162AA0AE3222AE2AE00000000000000845 62AE4002AE000000000000000000000000FFC408000820000801C00000001829801800031001808200600600600604001608 044401600604204200602600200008600600600000000000000A0A6006020006000000000000000000000000FF261D0000AA 2808B00AA0000AB8218AB8B30A18AB80502AE2AE2AE2AE2A820622812422E2AE2320042AE2862AA2AE22E2AE2AE000000000 0000200862AE0A02AE000000000000000000000000FF43C8000114553935B558001559059559540039558040556556556556002ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (11800008200F 000007000000000000000000000000FFE027000000600800C01C00201E09C21805011001810200604F08703210421612400F 20E206004005007A86104001003006006000280008040000004006006006000000000000000000000000FF34DB0008000008 4884D800001821801801041001810200600680600300505604C5260000061340068060AE00440680A8060060000000000000 0220C00602E006000000000000000000000000FF925700000002B802C00400001901A01811209C0180220070060060020040 06D0000F150806002000006006002000102007006000000000000040126007300007000000000000000000000000FF29E70000aca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A50210482E4 2E0044000470565042C8442016106020000000000510108206006484000000000000000000000000FF6BB880000020000300 1A00001A11A018410A1AA180A044612604743028610A09242404A1165040289260A630440682280700600008000052001002 2806200004000000000000000000000000FFF0D3800104001005801800601803801821001C898A01A87C0640600505308240 7A40000096282000116006402240042007006000000000200008141096217806000000000000000000000000FF1BD3800882 401000401C00401C01C21803549C418040047106AC6404C0A862A1618514304605A05084E846002026802807006000000000006ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (441001520002 00582184985309180580005464060D62A00062920CE0A602A24E00020004601620020600400600600000000000000010004E 406304080000000000000000000000FF9059000000401100890012001823821801081803800008600608E00440208602E026 00000600400000600600400000408600604000000000017000048E24E016410000000000000000000000FF98FA0000000010 A04000080098058038890098119C0012643620600C06240604601E5824C626C02008640600C00600C0060260004000100000 000021260B000E288000000000000000000000FFB9B8800000020001C29000023801809843043801808040620F0464A0A16C00eca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006802AE1020 C2000000000000000000000000FF2FDD000000403804101800000000000001080000000000000000000400448001400814C0 00000000000000000206000000000000000000000010000000490448000000000000000000000000FFB95E80000000000804 C00000000000000182A00000C00000000000080100480000404000001300200000000900061100000000000000000002C002 8000020000000000000000000000000000FFDAC6000000200041A00800049803805881045801890000602E40601003600240 60161060864500201060260900B023410E0C600000000000040000C08610E002000000000000000000000000FFA55C000000001ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (621520655644 60005565564265564575575560000000000004C0427556126086000000000000000000000000FFD8850000000A88008AA800 0AA8AA8AA8AA9088AA80A02AA2AA2AA2A22AA10A2A23020422AA32A0002AA2AA2820AA2222AA2AA0000000000002480022AA 40A40A000000000000000000000000FF7FF20880000000D04000002000004001004000000021000800001000000000148100 049000110011000000008000080800800000000000000010010800408A48000000000000000000000000FF87F60000000A88 F54008000AA8AA8AA8AA8048AA80002AA2AA2AA2B22A24022B22920122AA2020402AA2AA2224AA3222AA2AA0000000000000009ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000000000 00000080000000010000080000081001013002000094800010800000000000040001000000000000000000000A0C00004405 00000000000000000000000000FF88BB88000004480C8808000AA8AAEAA82A8AAEAA80202AA2AA2AA203A223532020421032 AA2020012ABAAA30A0AA2A22AA2AA0000000000000021022AA00200A000000000000000000000000FFD66B80080040410140 000040100140100044040100008050050050000000448000444810040000010040040480000110048040000000000001000B 4804020900000000000000000000000000FFA4AA800000691801D55800555D55955855955B558101557557D5754E536404C0005ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800100200200 0000000000000000000000FFBD1600000000000000000000002009231000004000008001080100004400C8C4034800188004 01000A0000000010000A08000000000000000002000000800000000000000000000000000000FF6577000200000000000000 00000010002203800800002A00000000408002000C8000048000840002000000000000800000000000000000000100000000 000000000000000000000000000000FF3FFE01000008808444C00040020000000000000000010000008000C01000010882B0 4008000400088000000A00000010008000000000000002C0408800110040000000000000000000000000FFC4AB000000222000dca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04208A603808 002002082002003082000000000000000D08020000002002000000000000000000000000FFC10F000511001B158038818018 3581388570D0B5880081604F046C17A443160570AE0161070360C00C600600600F00600E0000000000000000000000000068 06000000000000000000000000FF27430800010002010000020020011090510416000800548D0411014400C86058040C1046 0410480000400000420840462C400000210020000A20010000000000000000000000000000000000FF9FE700010880091280 490080080C800A00B0490490008122428C24B200200300300208220208A04000200200200220300220000000800000000000003ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100100100000 0000200001000000000000400000400000000000000080080000080000080600000000000000000000000080000000000000 0000000000000000000000FF5703000000800800000800800820A82800808800800080208A80202000200202280280248A02 2008002002082002002002000000000040000008040000003002000000000000000000000000FFE2FC100001000000000004 0040002080050400006800008000801001408480000008000000800000000800000C10001548000000200000000020800000 000000000000000000000000000000FFCA30000000800A00800800800820802802826800800000288A002002202AC210300300bca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005016000000 000000000000000000FF6F46010001001811801800041809825801D4D005A040104206012147016406C45406156406006821 006004006046227046000000000000010001080000004006000000000000000000000000FFC2300000010018018018000018 018018118010A0000020C02E2822062C004600410E4061260060104061040160101060160400280000000001000000400140 06000000000000000000000000FFE41E00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000006000000000000000000000000000000000000000000000000000000000000FF4EA500000000140000007ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06006A000060 04006006006006000000000000001008000008006806000000000000000000000000FFBAA900000180000100180004000180 58088028A020400374164028874504840075060C620609600000600400600004702602005000000000008010002000E00E00 0000000000000000000000FF4CE5008001001808801815801A49835815009000A00008407608E32E10203632404620E83614 601AA0610604643E006016000050000500000040860001004004040000000000000000000000FFC38C000001001800001801 801A018018010A1803800024480600601608210618400E00688611662200608600E00028600E00000000000000800204000000fca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801E05809803 825800000080600680200400010484602600600E00600C006004006000006006000000000000000004000000006006000000 000000000000000000FF4ACD180001800506001834000199905820A11980800080601601A1060024C4706C8686600615E400 606006006006006006000850000118E0039020060080E004000000000000000000000000FFE9A6000001800001001E2060A0 41801850800821800000E04600600610200C807107006006007000006106046410006016001000000201000C204400090160 04040000000000000000000000FF6CB9000001880111031880014003901800E4C840000001700600200600024482620600600002a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C0200000000 00000000000000FFCEDE000000800000001801801801801801885E04E200A560C61060A40020448860178B610620E02E1060 0400630601612E000000080000000002000820106884020000000000000000000000FF2DBF000000800010001801C0182180 1801A198A0020030229741241535293483E12620E2668461000060440060800064061200000000010004000407804C607600 0000000000000000000000FF23640000000000000038000018418218018018A1A800006C0680280420620424644640640600 680400621400600620600604000000000000000408000100E004000000000000000000000000FF77EC0000000802080298810082a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E04D00700700 600601E006000000000000000904000001006004000000000000000000000000FF5C990000818018A10058018A1C018C1821 D04804120001209710240E01A1265AE006A0680FC07024006206086000006436000000000000000081148040016904000000 000000000000000000FF300E000601009E0004594A211945835889801800000010681630BC27007106407536086086106900 006006006006006006000000000550200028C00001006004100500000000000000000000FF71CA000001001809001801801C 018018018018000004942026C0A15694640E006C8E0C608604E0B008622E00620020E126080000080000001404001000A2680042a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018004018 0180000048068040068060068020060060060048010060070068060060060000000000000008000060060060000000000000 00000000000000FFB975000000209821A45891AC1803A93840020101C0000040264060160060060400CE4270168060840064 0610600000602600000000000040000000C006807000100500000000000000000000FFF3CC000080201901A01840011949A4 1890201841A200104C8E10E406016506D1640711600610E81400700600680600600600000000055100082C20600600600000 0000000000000000000000FFD98F0000018018000018042018098018018218A08000006A2600204600224600600602E1066000c2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF8DEF000000000003883803801B0188184C502829C00021000728CC4632614C13140534682640281128E05611 6001006016010408140080000000206006006000000000000000000000000000FFA0D7000000000121801801801801829880 01190392C00404B604608E00E0042000D400E0160A2500006086426046106006400000200000008000006006006000000000 000000000000000000FF8BC20000000018018018018018018018000008018000004006006006006006002006006006004000 006006006000006006000000000000000000004006006000000000000000000000000000FF587500000000180180180000180022a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0680E006000 026426080000000000001A80026006006000000000000000000000000000FFFBC9000000000001801A0000000183980A083C 09C0002AE2261263863AE2A42EF7AD23E0AE0E62A868E0F620E0260C60663080082800800085000460060060000000000000 00000000000000FFCB96000000000001801905801A41905840113CC58500154556814C56416554110054106D56210CAC0060 06806000806406000000000000000000006007006000000000000000000000000000FFF63900000000008380180200188180 1800069803822090408608800F0064048000040861062000440070068060060060460000000000000008040060060060000000a2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000180100 0080200600600600600680600600680600400000780600600600600600000000000000000000780780600000000000000000 0000000000FF47E30000000000419058000018019019400031419100002016C03046806814082004007006A0A08200601614 6000806016000400040000000802406006006000000000000000000000000000FF8432000000000001801A84001801F03800 001101E00090388F016407007004822204086137022020006046006007006006000000000000000000006006006000000000 000000000000000000FFBBE8000000000001801800000041809840309043848004E4260870CEC8E34C8100CC00E2060064080062a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF6E860000000119238019180018018419142C580100000028C600201602600642610604E046000010006006006010 03620600000000000000001000601EC06200000000000000000000000000FFECB2000040221901A23A88211911A9180A0C1A 3315008D212EA0A42604E906D56AA6A86C068908308160A750E80603724E00000000000000080082600E0060800000000000 00000000000000FF6F7608000000B84D801805803803803800005901000120200612601628600E00600E00E1164042000062 060061000061060000000000000002001161072A6200000000000000000000000000FF4872000000001801801801801E018000e2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008808010008 20000000000000000E00108000B00880000000000000000000000000FF04AE00000000080094080080480080080000020A04 00213032183002202002A0A00300200200A60100A20200200300A00200000000000000000000300200200000000000000000 0000000000FF3D63000000001A0400384785180C4000024000A000004A5000620C40488480004808F00A007C014000018060 00C60004800000000000000100000860800A0400000000000000000000000000FF28C80000000282D803000000A68048A048 52200002C00000080088218100080400000810880000000008200080068000080000000000000000400268000400000000000012a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02B255004090 0804800114304810894000004004800800804885004800005004000000000000000A00000004804828000000000000000000 000000FFF68F000100001803801821821901801842221801800015611600644640E206004816086106486520006006206006 006406000000000000000000006016146200000000000000000000000000FF3B69000000414CA8D34D0CC14804820A881149 0085212022432C2812803002443102A428230430100030830030528130020000000000000114511020034020000000000000 00000000000000FF0AC608032020600020428020030200040001030009009485008402088008008802B000010100082900080092a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF2E3900084040050040050040260000004004040000000000010090010010010000010008000010010000010010010010 00000000000000001001000001001000001000000000000000000000FF44510008800880000AA00808C0AA0AA0A000028000 802202A82A8B200083A02202A82A82A82A80002A82002A82A82A82A800000000000000006000000022000000000000000000 0000000000FF840400004C204A04A00B04A42800A00A04500800800081280280200304280280280280200300282080284B00 2802803002000000000000800800802002912500000000000000000000000000FF97BD0002002202B12002202004012010080052a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80A82A82A800 00000000000000E00008002A82A8000000000000000000000000FF2231000810004000000010020000400000048108008010 00000000000900008810010008000000200000C8000000000000000000000000000200000000000400000000000000000000 000000FFA5D700008C0AC0120AA0320880AA0AA08C00812200402A12A84802A82302A82A82A82A82A82A80102A82A82A82A8 2A82A80000000000000001000010002A82A8000000000000000000000000FFE5DE0001243503523542C43105541543343044 440020C50D50D51448C40C50450550550550D50800D51400D50B50D50D50000000000000800800800000CD0128000000000000d2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (818840006006 00E02614620E1060042060060060002062062160060060860000200200000060000160004060000000000000000000000000 00FF7ECF0000422202022002202004012010001414550080840000841005304800804005004804804888800805004A008010 04000000000000004800800000005000000800000000000000000000FFA1A4000000004920800904842800800840A1280080 2030280250200204200200280200200200200000200200200200200200000000000000200000200080200000000000000000 0000000000FF84F70000880880480AA0080C80AA4AA08A50409001010182A80482A81082A82A92A82A92A92A81002A92A82A0032a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF B5BB0000200088008208008808008008A0808900862200210210204202200221200211010200200013211200200200240204 040000000002000068A220340000040000000000000000000000FF53BC400C0000040000000000044040C4005904C00D032A 12880293010882810010312010A9089281149281240001009000000000000081001011101441001000000000000000000000 000000FFFBC0400440002C00800800908C00C10C40C00C0280013234922C341321210344B4A311355313350300B103002003 01300208000000048144300340300100B000000000000000000000000000FF1D60000000009801821841803801801901801800b2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006016008000 000000004000406618000200000000000000000000000000FF4A6600008000182102380084404184990080B80B8100506316 00604610600E08E08000614644601010E2460060000260060000000000000045000060002404000000000000000000000000 00FFBE100009000000541440400801200900A004C034008004820022041000050810048822041020044020640000000604E0 1000000000000000055002E000400000080000000000000000000000FFB79300000000580000184181384000400000002201 000000004840C84000080C828C108200040000486000028006006100080020040400400008006000008000000000000000000072a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000062860 0600600411600A002006086840006006006000006006000000000000004800006000006000000000000000000000000000FF 2E200000000208000018208000018018008C9845802000600204C00600609644610000600604E20000600600620600600600 0000000000004008006000004000000000000000000000000000FFCBC0000000000814001900810001901840801801802000 E0020C4206006006006000086006006300206086006000016206028200000000004050036000084000120000000000000000 000000FF80260008000018011018D892A10182180084194184202C600E40601609E5666064104564360260C800603600600600f2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFC9B0 0000000AC0AB8AB8320900AB8AB800889889A1202B02AA0242AE2AE2AC08E2A62AE2AE30E2202AE2AE2AE4AE2AE2AE000000 0000000040482AE2A82AF000000000000000000000000000FF7CEA000400004001801810050001801E009118018120140006 4260060060040260000060060060800060060060000060060000000000000040C00060000060000000000000000000000000 00FF93FE0000000890AB8AB8080880AB8AB80000188980802A82AE4142AE2AE2240462222AA2AE2060002AE2AE2AE0AE2AE2 AE000000000000004620AAE2A82AE000000000000000000000000000FF8F4B40020000500180190402200180180080380180000aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00006000006000006000000000000000000000000000FFF81B4000000880AA8AB80988D8AB8AB8018838AB80002062A80042 AE2AE2AC4062AE2AA2AE2C70002AE2AE2AE0A82AE2AE0000000000000070182AE2A82AE000000000000000000000000000FF 4CD1000800001000801901843801801801843825800600600410400600600420601600600602600000600600600600600600 0000000000006000006000006000000000000000000000000000FF8C120000001511549558C5901955955801823955800240 E55409455655655411655655655649600C556556556550556556000000000000006000D56550556000000000000000000000008aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00613200600 610600640000800600608400400600600000400600000000000000C040006000006000000000000000000000000000FF05CF 0000000018058018058058018018148018018080006116200006006006006122080006006040006006006206006006000000 000000084088006000116000000000000000000000000000FFD4CB000000020801801821821801801800811801A0C4086006 04A0060060064460020000060560880040060060000040060000000000000041200060000068000000000000000000000000 00FF4EF300000000400080190580380180180184180180040360045040060060041160060020060060000060060064060060004aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF8F620010 00511914D55B3455595595581415595580404D25461065565565465564464565565560405565565563505565560000000000 005482C055000654E006000004000000000000000000FFCF31800000001800801800003801801804001801800000A0160060 06006006004006006006006000006006006004006006000000000000000500006006006006000006000000000000000000FF F2120000000AA8A98AB8A98A98AB8AB8A18AB8AB80002262260002AE2AE22E2AE00E3202AE2AE7002AE2AE2AE0AE2AE2AE00 00000000002242002AE000226000000000000000000000000000FF66AE00000000180180180180180180180180180180400800caa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0020000006006006000006000000000000000000FF5D6C0000000140812AA0A82A98AB8AB8800AB0AB80022204062262AE2A E2AC2AE00E3462AE2AE0002AE2AE2AE0AC2AE2AE0000000000002A82102AE006286006000006000000000000000000FF0B56 000000023820801A00001801801920001801810000200E456006006016004116006006006000006006006000006006000000 000000000010000006006006000004000000000000000000FFE3B70000002A18CA8AB8AA0A98AB8AB8A80AB8AB80A02A20A6 3282AE2AE2AE2AE3362162AE2AE3102AE2AE2AE2AC2AE2AE0000000000002A80402AE00632E0060000060000000000000000002aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (206347106104 117106C1761690600082602E8061048070060000000000781F8000006006106006000006000000000000000000FFBCBA0000 2060C401401400009C01A01810001821800100284640A00602600C00602F0070A640600020708700E0050070060000000000 00000000000007406006000006000000000000000000FFAD4B000800034035000004201A0180184200180180C01004860920 060060040061268B600680650C80600680640480600600000000000000008C00600604E006000006000000000000000000FF 4BB0000000100001201400003801801808001C01800201404E8020068060040074060070060060000060060060040068060000aaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A4C700000000 0401A01C008C2409801800001885802020420E0200860060840062074D6C1600640020111704600404004600000000000000 84904C6516006006010006000000000000000000FF3C2E800000210041801800800041C4180A0038C3800094452600011623 6444D4E40630E016556400910006546104840806000000000200000000010006A86006000006000000000000000000FF5BB4 802000000001805800E04021D4580400110D9300025A96101C0FA0E2252262060860060362010AE0362A6004026006000000 000400400000009806006006000006000000000000000000FF89DE800020402041C01C10A0A301C83800005C0988C010500F006aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000040 28620E006006008006000000000000000000FF6D7800000840184184200082580992580002090D840048440604A156006306 00622E48E04E006000050356006004000006000000000048010100050106206006000006000000000000000000FF86940000 00401807023A00B018018A38000AE009800009C00600A00E50E2060060060460260060980260060060040060060000000000 28000430000006006006000006000000000000000000FF842400408800182140D8328099038098000000018EC00240A61962 663A611600C1FE0061C602602048E32601E00400600600000000000040000000E006206006000006000000000000000000FF00eaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AA2AA22A0122 AA2AA2AA2AA0082CA2AA2AA2AA2CA2AA00000000000000000048A2AA2AA2AE0002AA000000000000000000FFFCA100000040 1814001805843800000000022000000228800004800000000000400000000000002000600000000400600000000000000000 0000006000000000000006000000000000000000FF5D0980000000002044C600600000000000090000012202000050000000 0080530000000000000200026000000006046000000000000000000228446000000000000006000000000000000000FFC4EB 000100201801C11442C1180380980011080188C00440B60822060360060141060063060264A0280006036004020026000000001aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000711911 D53D55951D55D558003119558100307556007557556557556557556557556250517556556356516556000000000000000428 555557556556000556000000000000000000FF6EDD0000000888CC8A88AAAC8AAAAAA80008CAAA81200222AA8022AB2AA333 0A2AAA2AA2AA2AA25028A2AA2AA2AA28A2AA0000000000000002080AA2AA2AA2AA0002AA000000000000000000FF410E0800 0002202220040000000000000004200000400480000910000000000000000010008000000208008000000210000000000000 00000000004000000000000000000000000000000000FF3CA80000000EE880C808A88888AA8AA8000400AA80005002AA0522009aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002080208 00800000000000000000000000000000FF75F500000020000000000000220000000000020000004200000A88008000008010 00000000000040020800800200020000000000000000000000400000000800000000000000000000000000FF04178800000A A88A8008AAE8C8AA8AA800088CAA80200022AA6422AA2AA2AA2AB2AA2ABAAA2AA00028A2AB2AA0AA28BAAA00000000000000 002008A2AA2AB2AA0002AA000000000000000000FF5EC6000800400000404400202201201000201201000000C004C8100500 4000C00804004804804000001005004000001004000000000000000040004004004004000000000000000000000000FF5D95005aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200200202220 200200282008202200A002002002000000200000200000002002802002802002000000000000000000FF9707000000000000 0000000000002000402003040480000250800200000488100200000430400C10000000200000000000000000000000000001 800000000000000000000000000000000000FF6AAD0000000020300000400400000101000120100100088081420420400020 668000400080111000001111000010001800000000000000040400000000000400000000000000000000000000FF428B0000 000000202CC4000200004000000220000100090800000000000000000000800001000410000000000000000000000000000000daa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004608808 08880C00800B00C00800880000200200208210202200A04201A00211200060220200A2030022220080000000088004584020 2208A082802002000000000000000000FF538F0501141105018C583185581180B92D8D595593404A608E5174961164C64A7A 0600620E206208006027016006007004000000400000400800004006006006006006000000000000000000FFE04202800000 404000000310B1012830010000010200011C4406084D0A581C094A60404148000260100004C05804000084000000000020A0 00A0284005004004001800000000000000000000FF046F02810A088500922848932910814D14B50A509020422002D0A10A91003aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200600000 0000000006000000000000000000FF1838000000000000001000000000000000200200000000000000000000000000080000 0000000801007000000000806000800000000000000800006800000000000006000000000000000000FFC59C000000000208 8808202A02008088000088082080002002802A8220302224A00300200200204000228C80A20C002022010000000028240000 084000088286002002000000000000000000FF77D905000000000000001520B0000820000002003200000000220808040814 080400A00010000200800000000000001484800000000000000080000820004001800000000000000000000000FF16CF000000baa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006856406082 026000006924106006046806000000000000100010008004104046000806000000000000000000FFCE38000000000001201A 01801841801A00A11200B0408960170A0436906106C3610400690604601082000C0060060000260000000000080281004881 04004006800002000000000000000000FFF55B00002000A02100182180188180384090383080002240860080064264160860 00156446116540110444006406000006000000000040000040006024004006000002000000000000000000FFC4F200000000 0000000000000000000000000000000000000000000000000000000000000000000200600000000000600000000000000000007aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000182384100 1005801A129010208142826806846016207106006807A460060440020000860062040000020000000004D00400D340021400 6006802402000000000000000000FFA4F400000000A041801801001141805A21D01040824221611609622E4C600752E00E12 604600682802000E0862040200220000000000080C80084860C4006006002002000000000000000000FF0C550040A0000001 001A25855901815841803888B800186616026446846AEE0060B720E20208C28048EE840070061069060004000000201000A0 046044094036004006000000000000000000FF0277000100000001001801801A018018018691008400026C0600000600704600faa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0600E406006 007006000000000000000000FFE649022000000001800843021043801800001801100002680604680E80600640604E046806 04600008600600600600610E000000000000020828008016806806806426000000000000000000FF3A0F0000000000018C58 008050298119D18218018048006006E074461C604621F02700680618400088640660600480600A00040019805071810040E0 47077007006026000000000000000000FF8A9D000000000001881800809091803805F21041E100106C170000062060860070 06206006006003406106006205106002000000000280000802040406006016006006000000000000000000FF50A7020000000006a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2600600000C0 0204600600600602708600000800020000028B000205006007002006000000000000000000FF810E00002000000180180900 1801801881813040A00008E00600600620628600604604785200448800600E0060060061060000080000000202A810620680 6006006006000000000000000000FF1C6D080020000001801E08011801A0585314100000400CEC1E4BE0E605E866E8620662 602A024A6004600600780604700600000000000000080006000E206807006006000000000000000000FF1ADA080000002021 C20001101483801A02001403001020600612610E8068161264060070060D68030060060070060060060000000004000000020086a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801801803811 C21A81811401801A01600E00E006046006016007106000004280A1600600680600621400000000000800012000600600601E 006006000000000000000000FFC190000000000049801800931B89C05B41521427A06A08FC072070160274072C6806086820 10511002E0160060060060260000000200002600C9D00206087007026026000000000000000000FF4DA1000000000045801C 01101445801844809009080000604604695710641603644602640000400080600604614600700E0000000001400092000079 04406046002006400000000000000000FF5BEF000000002001841801001203801C10C55441C000226006A06006A2611600600046a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040060060040 06000000000000000000FF317100000000000080120180140180180100080180000040060030060060068030050060068060 00006806000007006006000000000800800000006806006006006006000000000000000000FFC75E00000000004080180190 1821801AA1001831C001004806C0214608500600620400602600600422600604004600642600000000000003000000000400 6046004026000000000000000000FF3B21000000000004001801845885C41805021C03883890405284A816004A16D2604004 7206806500006806001106807006000000040950C00251006D06506007046006400000000000000000FFC88800000000001100c6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600604600000 7006A01206006006000000001000000000006007006806002006000000000000000000FFFB64000000000009C01A03821811 8D1301901005800020455724640704434E304D0E05642611612500611650808E80E906080148108000020004000006106006 000806000000000000000000FF3B48000000000001001821801801801011801101894004400601615628C00602C046286016 00621004E026000246026226000000000000000000006006006006002006000000000000000000FF5EF80000000000000010 01801001801800000001800000600600200600600600200400600600600400600600000600600600000000000000000000000026a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0B001081A00A 85801B138000000016C4200601454ED2400A20E2060464A9D0600E0200A4806A8C280000000880000A200000068070070040 06000000000000000000FFC84E000000000001801085001701880801821AC380000088EA02B24E2CC80E2ACBAE6F632E0AE3 A802E0BE0C89AC02E6B4580088088000020440806006086007006006000000000000000000FFDF9A00000000002120101180 1001801905089515E040906016546506C16557540C5400641654644C516806000C2604610600000000010000100400000600 6827000006000000000000000000FF572F000000000209901101801201A218C90DE84180193940061868860060060000020000a6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (693644100600 0000000000000000FF8EA7000000000000001801801801800201801801800400600600400600600600200680680680600000 6004000006006006000000000000000000006006006006002006000000000000000000FFA74F000000000001501045841011 810A41889A419142042426486066045546004804016887286000000006000004001004000040800000000000006006006007 000000000000000000000000FF5D73000000000001C01001C01201800801C018218022080801007C8644400600432602600E 006000810006000404021004000001000000000000000006006026002000000000000000000000FFB94000000000004100120066a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (820000007000 081000006008000000000200000440006407008001110006000000000000000000FF88D00200000400120218018018158888 01A418A1800004600640400660601650200000620620600040880404094620000600000000000000000000E006A068062060 00000000000000000000FFB9EB020000040294889A51885801A0A2418C58258200816A06834406A8620600280680602E4568 08C08424200406A01016000000000400000820908806216406884C00000000000000000000FFC61F00000000042084388324 18B38C0885A1189180004A602E80400600E0C600222EA365060862A0006015080806006146000000000000000090C000061400e6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106000400228 20080200880C0080100080080080082C200800800880800604A00600900820000000000000000880B80900804144800E0000 0000000000000000FFA5460000000000A0802000A00200800800A14002800061220200B6020030060021400228021DA47830 202000000400200400000000000000000000404200280A004002000000000000000000FFA9D200000000410110C4093B240A 42144110841000001280241700100807A00006010484E00002000070084010004065800000000000000000280160060A0AA0 4A0006000000000000000000FFDF910000000000086000762002801120A402074000000000480009000088018000015008080016a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (912802000000 000000000000FFF3000000000002242012020230010001222B52290122840000C8800500100500480C804894A44840800085 00000C801404000000000000000840A048A8814004804800000000000000000000FF6E1E0000000040018C1805891A21901A 05801901800020E80610601600640E004006006206016440106C06220C0600608600000000000000040001432600680600C0 06000000000000000000FFA437000000040550804C30A0080AE14C2094C828800112324344AD034020825035222C20230C30 11202002000143503202000000000000001021103002002142283202000000000000000000FF00070000000202402C1080000096a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10D50450D505 40D10C80000000000000800830910C10450550450D50000000000000000000FF754900080000040042045440040040035000 0640000000000104100100100000151000180100100100000100000104100800000000100000100904100000000100100100 0000000000000000FFABEE0008000000881480A408C0AA0AA00000008200041802A80202A82A82A82A82802A822008800028 8B202A8A202880080000000000000000000A82002A02A82202A8000000000000000000FFAC47000000200400AA4A10A00A00 C00808C008008002C128028028028028028028430020028028108420128001028231420000000000008008108028020000020056a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0AA0200AA082 0000AA82A80202A82A82A92A80012A82402A80402C92A8AA92A82883200000000000000000000A82A9AA8AA80402C8000000 000000000000FF293E0008000000000100000100000004920002880140000000400000001001000020000808090020001000 0010080200500000000000000000002200A0100001100000000000000000000000FFDED40000000000AA0920800AA0AA0AA2 022AA08C00C12A82A82882A82A82A82A80402A82882A80102882A82A82A82882200000000000000000202882A82A8AA82882 88000000000000000000FF8C6F0000002003342043303203543540202AC0420000C50D50930D50D50550550C90D50540C40800d6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000000000 00000000FFDE6000000010590900192580180180189180191580000060260864360A60C644440600E2862060000060160060 4E00600600000000000000E40000420E000400004006000000000000000000FFBA7C0000000002012002A220020020100500 14110144000000908800800804804A0880505480082080000400000480100C000000000800000820804800000000A1480080 0000000000000000FF95D4000000200800824808800800800B08A00840800000200240200200200200214200210200200802 2802002802042082000000000000002008402002000000122022000000000000000000FFE11A0000004000AA0880000AA0AA0036a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620000041000 6000000000000020408200006406408200000006000000000000000000FF1B310000000828C98548A29C080080088002088A 810002214200201210202424202211A00200200004204C00A000002000000000008108082450000002000000414002000000 400000000000FF544E40080040040240040050044040040044040009012810082010816090011012C9021201221008189081 0110A4199004000000001040021001005009411001000000000000000000000000FF7ED8400100410C04C04C00C00C04C04C 00C00C0094012D351245308300B413013113543053043108013503003502003002000000011010523001003003001001002000b6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2888381B8540 00620A00624602601600214E00628E00609018000400200601018600810000000000610006013E4400484060200000000000 00000000FFA3B30000000018A18258048C102100985304182180000C612208600600E04204A2160060260060200004040020 06000046010000000020006400016006010010016024000000000000000000FFB57A00080400000400002A0000A00B010202 00C012401200005500202164502102A000002000002800648000000014E04000010000004000008000E3064500C00A000600 0000000000000000FF6B3E00008000800000300100104200400800000003000104A01482500C65100D0004280148000100000076a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF7265200000001080C09811401001889803809801800408E08600600004600400C00600600600680000001600410400 0084000000000000006880046007001000254044000000000000000000FFC3630000000018458258C080B8018258300A5801 800044644E00600609600410254E00600600450004608400200E046016000000000000006200006006000000106006000000 000000000000FFF05B000000001805801800801901841881103903880000640A23620E54620440200609628E0061000260C4 0020060A60060000000000800060500004460000800C6002000000200000000000FF8D81000804001881811850801807101800f6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002556557556 000000000000004200510556550550500512000000000000000000FF882E0000000018208A30910818AB8018C01318AB8000 20600E3262A822F2AE2240262AE2AE2AC2802AEAAE0052AC2AE22C0000000000000061014AE2AE2A82A92C42AE0000000000 00000000FF65094000000010208010010010018018C9043801800000628602E0000078060158460060060060000260060058 0400680400000000000000615184000600000004C022000000000000000000FFFB42000000001808881A470F18AB94588180 18AB80001565022AE2A83062AC2244062AE2AE2AC000288A260042242883240000000000000060002882AE2A82A801428800000ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180001060 861260040060060044060060060041000068060000060460060000000000000040200460060000008D004600000000000000 0000FF1E140000000018894ABCAA4AB8AB8A98040038AB8000A2E0062002AC2AEAAE3440162AE2AE2AD6042AE2AE000AAE28 E2AE0000000000000052808882AF2A92A820028A000000000000000000FF94E3000800001314008800003001809812005801 800100604601400600600409010E006006006800006006002006007006000000000000004400006006800800000006000000 000000000000FFB3DF000000001112154954155155955800111955800054E036484556556554400306556556556104516D56008ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF793A00000008104100200010904080180200180180000040844000CC00402600628600600600448404610602A116046086 000000000000004000420006000000012042000000000000000000FF06A70000000318008500240250148018290018018002 08C03608600600600C08202E00600634C00200600E10000600600E00000000000000C1000060060000000820060000000000 00000000FF01F4000000001422800000001000803841021801800200444E0120060040041520D60060060048040060060000 06006806000000000000004010200007001000002002000000000000000000FF6BD200000000180100180000180180188A09004ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE28E2AE0000 000000062A804808E2AE0060002AE28C006000000000000000FF11D200100005190293011190991195584D95515580004CA4 9030E4545564CC4460065505565544065564D640655655644E00000000000654820A55055000600644E55000400000000000 0000FF4A65800000001810814041801805801803801801800000201022600400610005600400000600400000600601600604 6006000000000006000100206006006006006004006000000000000000FF257000000000388B0800880010808AB8800AB8AB 800022420406E3042AE28622E0042AE2AE00400028E22620222628E2260000000000002A426808E2AE00000022228E00000000cea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000431013 300400701602400600200600400400600680600604600600000000000600000004000000680400C004006000000000000000 FFE5230000000AB8E88CA0888AB8898AB0618AB8AB00002AC04010222C2AE64630C2AE2AA2AE2AC0002EE2AE22E2AE28E2AE 0000000000062A84000CE2AE0060042A42CC006000000000000000FF0E2F0000001038308020230238430018818000018000 00202000600400600408A2D60000060040840060060AE0060060860000000000060001000000000060000860000040000000 00000000FF8C5C0000000AB88288008D0AB8A90AB8898AA8AB80022AA4800163342AE00C2022AE2A82AE2AC28028E2AE2A62002ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF5C 13800000121922C01009869C01C038098218219602312A9042D084D3F6068042B69D64966440400860470060040060040000 10000006440000006006007006004004006000000000000000FFA7BB000000001803A20408001C0061140980544101044250 A002E0AC02702420000720702710E20400600600600600E20E00000000000E10000000000000701400400400600000000000 0000FF314200080000180184004000182200109580000100100048402061068060C308000680600600628000600610600600 6006000000000006000550406006006004004044006000000000000000FFFFA0000000001804800002801A0180100180180100aea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (641E00000000 001E440000086006006006004004006000000000000000FF14F8000000001800801001101C01203C05801C25808030B00001 652C12A14C0240063321460860025400860060040001440200000000060005020060062060A6014084006000000000000000 FF71F880000008588084120110180181188380380190C011205050525440310608C016A028068C4048000046006484010004 000050000046080000080000006816004004006000000000000000FF8665800000045E488030039138018059058218818022 00220008520600609212C4C60061060060101060060065040060040000200000260000000800018060060040040060000000006ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002108036404 0C210004240608E0860060803000040160060000560000000000160000500060064060A6114004006000000000000000FF4D 5F0000000018008048008818C000582580185188402924000060060022160820B602602610600002010C0062260000060000 0000048600000008014000E006004004006000000000000000FF0C140000000018018228018018808010019C188D88000422 000061560162460822A64060160064000060040060261061060400000002860005280000A000E0060E410400600000000000 0000FFDAF100000000181080480D8258208810A1829901802006208802600410605644200E05645E01468000600C00E2060800eea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF2B6D00 00000AA8AACCC8D4CAA9408808AA81808C00002240000021022AA30033A1922202AA18200028A2202AA2382CA32000000000 02AA00051008848A2AE2143222AA2AA000000000000000FF5051000000000001003809801845002000000004000000800034 0408006000080044008000008000046000000100006090000000000000000200026046000080080004006000000000000000 FF2A2380000000000004022400008802800014402000001000000080A0006150000408100000240500006088000000026000 000000000000000150206206000030008006006000000000000000FF217A000000001801A20C08C418001018818118818080001ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000004 000000004000004084000000000000000000000000FF1404000000555921D55911955D01955955A45B55800254600050E556 53600E40DD56436556556200556557556556516556000000001556000500134517556436556356556000000000000000FF26 F70000000AA8AA888880AAA8088A88AA9208C880023220002122022AA02A2224232AA2AA22228028A22A2AA2A228A22A0000 000002AA0000202AA0AA2AA22022A2AA2AA000000000000000FF77AF10000000000C20042400001040000008800000000000 000400000002A40A000010080000008000000400000404000400000000000000002040402000010000000000000000000000009ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000000 300010000C8000000280020001000000020000000000001000000500040040000080000000000000000000000000FFDC2208 000000002A004022000204000000004000000000800011000004048008000000100000000000000000000000000000000000 0000000000000400800050000200000000000000000000FF01038000000AAC00888C80EAA8EC8AACAA8808AA800023200020 22AA28A00222A2AA2032AA2AA00028A2AA2AA2AA28A2AA0000000002AA00003828A08A2AA2022AA0AA2AA000000000000000 FF2079000800001000400200200004404001405401000000C0000A0050000204005001004804010000040104004004000004005ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF4438010040 084000830800C0090080080CC10A0080020C300204301280A8A280280200210A01200028A08A002082022002000000000022 08200000A002002003003002002000000000000000FF74C30000000000000000002000000001400400500000400CA00008A0 100800020928488020040400800000800000000000000000100000001000000000000000000800000000000000000000FF4B C80000000000000000000000400003100961100000100008000100320248000400000800100002000000000800000C000000 00000000440512800000000800000001000000000000000000FF57EB0000002003002204100000000002000280000000100000dea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00008001800004004000000000000000000000FF3D6300000000040080082080080A80080080082084000624020022020020 0209200200200A02202004230326294300A00200000000010208255080A062052803202002002000000000000000FFB52701 0040104001851801801881801C554CB84980001468C604602E4D654400608C28F10605600208E08E00400600780400000008 0006006802004006006005004006006000000000000000FF902E0A00800000A9000000021001028101020401020240863C02 410500009504C0E4004054204400C200848841A40400AC0000280002E810502001400002C004004004000000000000000000003ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000600000 0000000000000000006000000000006000000000000000000000006006000000000000006000000000000000FF705E000000 0002000010010000000010014000000001004000000000806000000000000000000000006000000000806800000000000000 001000006006000000800000806000000000000000FF89160000000000008008008008282008888088A8A000002000000A80 0028220822020020020A402200220040000401220200005000022A2A2002004002000000202004002000000000000000FFE6 800C01000000D000004002000524800122400020008890480408048808800001400000104000000018051040000000CC000000bea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (510000000082 01A00043841813801801901819808088680E80C00400E0220060031060460040008060049020060060060000000010040060 00800000004006602444004000000000000000FFCC87000000048001841803C018C3815801C51C0591400264560148060C88 4200609201600640C290108114000407088006000000000006206090100140045006006004000000000000000000FF4B9900 0000000001800009803801801909803881840011600600404400030255642220600E00404000044400004600000600000000 0004006400026006004016002004004000000000000000FF4818000000000000000000000000000000000000000000000000007ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040610612000 0000046004454006802000000000000000FF7DF4000000000023821811811805001821C01003800000600E80C04648100000 612680600600601000000780228400000A008000020826037040200000224005454006006000000000000000FFFB06000000 04000184181184582101391181340582410464260048260800002060C65060162162880084CE100A44090002000000000007 20608810612600580C004C46002000000000000000FFCC29000000000001A05821B01989801801BA1891980000E906004006 036A920EE21A00E026004020986004512006806146000400010415106300826406024007802014000000000000000000FF4000fea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (306CC4026212 006006006204006006810806046006000000010006206904006006006880004804006000000000000000FFCDA90000000006 45800001801803001801003009810000400400400000600400604A0260060060040060065101068060260000000008440460 10800000006000000004802000000000000000FF6570000000000001845811967819019801B03181808002E8160042869060 1404680602600618602080600600040480701200000019101661600946641E586184804016006000000000000000FFF76E00 0000000001E00001E09901001840801003880005308780C347216004007086007806006029106006002004007102008200040001a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000002980 1809801801000201001011C22050420620604E28644280600228E2870A732C0AE20608500602700600000100920F2862A022 00080070028A2C44002000000000000000FF819D000000000011800011801A038018000010498400044004204A3004780400 60C64060860260A000F21608600680608600000080080E006201A2600E004000000446006000000000000000FF9E3F000010 0000418201E1801A61C818F0007081800141458412C00002600418608E11640610601414600E864007007006000000000406 106840000000004000140006002000000000000000FF699900000000040184200180180110190102110180300840040558020081a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (807804016306 456046007814006000000000000000FF2DA9000000000001800003801801800248001015D01000024600620460608708608D 08600600E80003600610450600680400000000020E0E640510E006007003842802006000000000000000FF8C540000100000 89884021809805800230041069808005800610E40488610604E44600680620620E00E0070958060061060000000000070060 8A000800007122002006002000000000000000FF193D000000012045841801841953034001041005D0004441360068060560 5300600200780702600400701642628680611600001052004620F40228630645600A026014006000000000000000FF5B59000041a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020060060060 06006004006006004006006006000000006006006004000000006006002004000000000000000000FFFA9B00000000000100 1801801800000400001801800000600600600200680300600600600680600400600700400600600600080000600680600100 6006007007002004006000000000000000FF48A20000002022058400018418432140080018018100C4600E00600484E00E00 600600700622600C026016420006806006000000506206516110200800006016006004000000000000000000FFE253000000 210351880025811909820000041821C01001650600FC0410692610E10F08600681620400600680500400708E00081002605600c1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080001802001 801828101A204A180780904960060C702E0060044060060060D690600400600666600680600600000000680E00680480605E 006006803002006000000000000000FFC0E8000000080003A0C201A21801021882149831CC810C620708213428600414E40E 11640600680491605700F4464C6086508340006107006000000800005006002002000000000000000000FFAA550000000000 8180000380182980184800180180200060D621620403649400614620608642E02400610600600600600600000000600E0060 00006006004006002002006000000000000000FF4354000000000001001801801800800000001801800000600600200200600021a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000010040 17002006006000000000000000FF599F000000000001000011801800011808041811842080E03602E0821268140060060864 4E0064880062160072AA00654C0000008060060062A8000080006006804002000000000000000000FFA8F4000000000001A0 1801801A00081C02001C01CA0062E2AE22E292AAE28C26E2AE28603E2BE53000EDAE80E3732A60840882A000600700755000 6006007816004002006000000000000000FFAA3C000000000001A00211A01800811810249D359440016556032D4455751400 E5560D6546906804226016006C06007D56000401006006006004800080006006002802000000000000000000FFF85F00000000a1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (628600600600 420380604582E05600600600000000740620E002401080004C2E516144046000000000000000FFD1D3000000000001801801 801801801800201001C002006006002002006002006806006006004002006004006006006006000000807806806002006007 004007006804000000000000000000FFC83C0000000001050118058418008419102198538042206806006802A08800107006 81640700E000101006007002001004400001006107006000006046004006003006000000000000000000FF74640000000000 01A01801801800E01800001921D00100748600743200148184E2CF05610708780144008600600200100400040000600600600061a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020460400102 8A00000205020000000082000000000060604080008602800001000070000000080060480000000000000000000160A60292 00010220006000000000000000FFF76C000000000001800001A41825079840001015800240649641624000008230685E0060 0600440020080444600660000600000000600E206130006216004806942100006000000000000000FF3B4E040000000201A1 5A8190D81121188022B105800340F086842A02A010C301604E426A8F234910C00004807006A0101600000090680E8868288D 0C48A54006003400800000000000000000FF92FF000000000003800001801AA3821812001001800094640721610800640A3200e1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (301300280380 3483042000000000000000FF692D0000000004042003002084002005042000000000AC100104880C810C19021080201000F4 C800800040820D44800800000000000900808C00A20808800028208880800000000000000000FFE231000000000100800800 800D01800808022C80800002200200219000210200302280300203020000200401A00200200400000000200200200008C502 200006004004002000000000000000FFA63D0000000000000198819820400018900084420000010000224400706200080200 800008000088007420100020006500000000080200080008146006441000880400066000000000000000FF41B602000000000011a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002002802A00 802002203002803552000000002C82802C00802802012112883102802000000000000000FFCAE900000000000030A2000010 112020002242010000814014008A4C80100480422C00480510C80280010C01110482100400000000483480482AA44C009240 04015034800000000000000000FF22E9000000000001845841A1180100190000180180000060160162A42960440068060060 0600640000680682648400600600000000608600600012C5062260060AE004006000000000000000FF4AE4000000000704C1 0D00D20B44C28A2C428854800144BA03A4301300350B2820528220034D310100242350B023403342000001003003003309000091a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (435435433233 01541501540000D40CD14D0D50D50C48551410550550D50A00D10550CA0D40D10A88000000000848D50C00930D10510540D4 0D00D50000000000000000FF3DD7000800000400400400400000440644000400000100000080110104102100000080000100 1401000001041001000010000000001001001049001001000000001401400000000000000000FF5A4C0008000000AA0200AA 0AA0A20A80A80880AA00002A02A02A00002882A02A88802A8AA82200002A8A208A02282880000000000000002A80000880A8 200A202202002A8000000000000000FFD23D000000000200A00C00A00A00A00802200A00800880280200288084300A8020020051a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000100C2442 002000000000000000FF22F70000000000AA0200AA0AA6AA0A80024AA0AA00005402A9AA82202882002A8200AA82A82A8000 2892A82002A82883200000000002A82A81800886C82A82B11180002A8000000000000000FF28C60008000000000400000000 0000440020240000000080000000000000810001208008000000000210000080100400400000000003000000482000200408 08008028000000000000000000FFE5FB0000000000AA0CA0AA0AA0AA08C0900AA0AA00000082A82A82282882882A92C8AA8A A82A80002A82A82882A82A82200000000002A82A80002C80882A82A02400C80A8000000000000000FF0E550000000003543100d1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (530030002030 03003442003002000401441013043041002203001013003002002000000000000000FFCC4F00000004000184180180180580 18010019098C4220600614E40600610420600630620600E1000064160440040060060000000000A620640000402600054600 4046006000000000000000FF9DB800000000040030A20120000020222100120100008200000048008410D500409400400500 080080000488C804800084000000000800804828804820800004A05114800000000000000000FFD4EC000000000000800800 800800800910A00800800028A00200211200200200282200280200220004280202200204200A0000000000020020004420020031a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80300B001800 02805401002000002300002960004800880000404080280062080200000060000000000401000002000060060002A8000400 006000000000000000FF4335000000000000920800000800820831800880800000200A0C0082422182002202082082002090 002400006622002444000200300022032040000002540002006004002010000000000000FF1AA74008000004000004004204 000404005804040A210E92A10012284410291290012292094010502190056010040010000000010010092010210042210010 05001420000000000000000000FF2FED400000000400800C00C42C10800C40C48C4080811134B340315210B04B03348B04B100b1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (460844860060 08000000000000FF43B20008000000019080298A58318D590182584B934000422E01603614020A00628600E0060062200000 1C0064060084061000000000060060006686601480A6060006004000000000000000FF0FC200000000000180800190184180 180984180380000864C610610600450A10E4060B60AE00E04000004400600610000600000000000C10601001600600000641 0006002000000000000000FF8EFC0008000000080000000041100540A011402011401001000905081260001100000C054800 800020E0C0000020086080100000000010100012086006000200510300006000000000000000FFF0850000000200000018010071a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40022882A622 60022883240000002A82AE2AE620888288220AAE2142360AA000000000000000FF9134200000000023000001800811001801 801801800000600400710400400800600600600608680000000608E502040004000000000006006800046046100006944086 004000000000000000FF19E200000000000990A0018010C1803800841801800000600400624E02610200600600600600C000 02600C00604E00608E00000000000400600020600600800600C016400000000000000000FF48AD0000000000098000298211 01881840891811820200600C04624620200200608600620600641040E48400404601614600000008000400E040080000410500f1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (03931C019559 5580005525564044365325145565565565565560045165560AAD465175560000005505545560009305105505574344441500 00000000000000FFA8450000000001018CA0AB8AA28888D8018A98AB80002AE2AE2AE0342AE2A42AE2AE2AE2AE22C0002CF2 2F2AE92A28E22C0000002A82AE2AE0008AE4AE2C82AE2242262AE000000000000000FF7FD140000000000104000180002080 5A018018018000006006136084002044006006006006006000007807A028120268040000000000060060A040004000000600 408E400000000000000000FF21E70000000000958200AB8AAA430A980188B8AB80002AE2AC2AE4042882202AE2AE2AE2AEA20009a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (685400000000 0000000000FF5DE5000000000001801001801209801800801801800200200614483400600400600600600680400000600600 2016026006000000000006006000806406000806084104406000000000000000FF92300000000000AB8210AB8AB0938A9A00 8AB8AB80002AA2AE00520428A2042AE2AE2AE2AF2AD0002EEAAEA82A2628EAAE0000002A82AE2AF0000A80A82A92AE324204 0A8000000000000000FFD99E000800000021801001801805841C018058018012002006005086006014006006006006886800 006106002406047006000000000006006040206006000807105084006000000000000000FFC95D000000000155915155955D0089a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (28E226002014 2EE2A60000000000162AE00008E08E0002AE2262A40AE000000000000000FF37240000000000A38010018308159410000018 01800020A08E10600404200E00600600600600C5040061161421460060160000000004860062400200400000060160040000 00000000000000FFA04600000000000900100180590100204500180180000860460160960060820060060060063440000460 06212216006006000000000056006110206206000006086014206000000000000000FF435E00000000000110B00180184180 200100180180000060062160860220AA00600600600600500000600602A1060060060000000000060060A0200000000006810049a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (90A88AB8AA80 002042A82AE2AE2AC28A2AE2AE2AE2AE2AE28028E2AE0C822628E2A80000000002AE2AE4402AE0AE0062A82422AC2AC00000 0000000000FFB273001000000001B55355910815509930954155000001440855642855044E5565565565564C650451654600 44065164500000000000465560D0550530006550554556350000000000000000FFA675800000000001801001800881001800 80180180100D4000006000004026006006006006006000026006000106046000000000000006006100006406006000096006 004000000000000000FFF5940000000000418AB0AB8C09208098880AB8AB801006220622622428E2262AE2AE2AE2AE00406000c9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (404000000000 000000FFA1DB000000000001A0040184501584184B80000100000D6000006000004034006007007006006500006006406086 0060000000000000060062084000000040000C4006004000000000000000FF3CC50000000000ABCAA0AB8910218C58858AB8 AB80002062A82AE2A828C2042AE2AE2AE2AE2AE01828E2AE40623E2AE2A80000000002AE2AE03008E08E0042A820E2AE0AC0 00000000000000FF8D2600000000010B801001802841023002801801800028412000608600010200600600600600E0000260 0E2A8146006080000000000306006400000000006000000004000000000000000000FFF0940000000000AB8AD2AB8A284B280029a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060460062 00000000001007046000000000007800004406004000000000000000FF7A8680000000040BA09C01A40004C0DC01843A2991 0102400055E0024041A503600700740600600011600600640600600000018000051E99600040600600600000600600400000 0000000000FF532A00000000000D800401C01001E01A8188045300008A710100650403440CA060260260A620608440608640 4006096000000001000006204400020400006000200044004000000000000000FFB756000800000401800001A09101813801 80040100100060000060060440840060060060060060020260060D400600600000000000000680610602624600600000200400a9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (083807800010 228010641E00C29260604604614E40C00000608400600600600800000000008645400000600E024000082044004000000000 000000FFF071000000000001A31C01C00082801881821C00944040F041006022004028046C0E24E086026100200446206206 000240200000C0080600E43050E406204430028086004010000000000000FFB0C4800000000001801881820000A038018A18 0088A000E08042614252C200016116916C061560805102864062261104000000000004870064002204000040004024060040 00000000000000FFD5D2800000000041C11901800000811801805800802180C00000604A08402584708F08F0060CE00000640069a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF860D000000000001C01D01C02011A31801083843904001200000604C2241224060060460160140100084440060040000 4000000020010600440020621620412042E004004008000000000000FFE1D300000000000192D801140123C8180900180184 8020654800620608400202651620E0A60442C040010400600600020001000000000601600011002008C40010400400400000 0000000000FFF354000000000001803801820001C8190F05982180800020080062042B441200608600602600422800E00440 64060060104080000000060040500000200CC090200104604000000000000000FFF500000000000041A81A8188202D82990100e9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000800200224000000000014000000000000000000000FFABF50000000000AAAA8A8088C8880CC888870150800020 20002AA4042AA2A22AA2AA2AA2AA2203002EA2342021822CA0000000000002AA54200008808A2000006002142AA000000000 000000FFBA0900000000000000585182184244180010812800001000000001080040080000000000000000800061100C8240 006000000000000000480000026046090000110140004000000000000000FF970B8000000000004004022040000020420040 02000004800000024000600000000000000008802000600000000802600000000000000002822840620602000002001000600019a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 0040840001150050050050040042000001040000200000000000000000050000000040001050001040440000000000000000 00FFC036000000000155911D55F15911F5593184593180005060005564CE156515557556D565565560105365560165565560 000000000015565560201143565568004C4556356000000000000000FFA2530000000000AA8AC9108888CA8808AA900A0080 0032A0002AA02A2AA2222AA2AA2AA2AA2AA02028A2222AA21228A0000000000002AA00A2302AA2CA2320000323022AA00000 0000000000FF8F3F0000000000002444000202010000022900020000000000000000200020801000000800004080000000320099a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF A16410000000000022040000004400000404010000003280008000300000C900000080000000000000000004000000000000 0000001000000408000000000000020000000000000000000000FFDDB800000000000000400020400020002010400A000000 0000000000200000000800000000000090040000310000040000000000000000000000040240000000110000200000000000 000000FF2A429000000006AAC888AA8A88CC8AA88880882080000520012AA2820AA2022AA2AB2ABAAA2AA60028A2AA0022AA 28A0000000000002AA2AA03028A08A2AA0002022AA0AA000000000000000FFB25A00080000000120044242020141000040320059a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00029C000610 0600A40C4A08104000000000000004000000000000000000FFEF9D0A0002000000800800900810C028AC8008400500082202 0222420021220420AB202082122100AA200A00280200300B00020802300202208808A0020060060060020000000000000000 00FFC6A800000000000000000000000008000002801000010200000000008280000000000080402000020080000000000008 00800001800000000800000000000000000000000000000000000000FF8C6700000000401000000000820012431008201000 010000E0800000AC08080008000000001000000019010800004000000100001004008400400000000000008004000000000000d9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200402000082 00000100000000420000000040001000000020840555000000900000004200020000020000804200800000000000000000FF 23E3000000004010800800800800A04800802800000020305B00208A00A41208300300A00A20202001234A1834020220236F 00000421020420C0022002022002002002000000000000000000FFD2B1140004000001801801909C09825D5582585004800A 602700604611610604614600E024506100016004087006006006000000007007006088014806006005004004000000000000 000000FF52BC02A022000003001000000001109001110000602102070404C6244412D80050156241040440015490358002240039a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF8F67 0000000000000000000000000000000000000000000000000000000000000000000000000000006000000000006000000000 000000000000006006000000000000000000000000000000FF52B70000000000000000010010000000000000000002804800 0000000000000008008000000000000060008008010060000000008000000000000068060000008000008000000000000000 00FFBA6B00000000000000080080080089088080280800002020048060CE03200208200200A00E28400000220E0020044020 00080400002242082090004002000000000004000000000000000000FF9B6D02A0220000040000000000000000080000000000b9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (064100100045 86806010126006004000102006000000000000000000FFF5F4000000000001041800805A41A01A09C0108000008061050061 060122060060860160020040000A606002C606006006000100004006006000000000004020000006000000000000000000FF 9D09000000000201481801C8180180185380030021404160240064070030C601652620608202C020B2108000D00600000600 000080610F2A6B2800800000404008C016000000000000000000FFC22300000000000100180180180180190190A002000010 64044160061002060060060464120044000000000440060000060000000040060060000460060040000060060000000000000079a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00400602600 61060878060061050060001060070C0034006024200000037006006480050008017017084004000000000000000000FFBA90 000000000243A01804021A01811801A8080000020060058064460048260AE2060AF4060060208814C600A22C200525000000 9360060264C00080502140B6002004000000000000000000FFFD9F00000000000180180000182180194589480001234162C4 4074861160C600E24641610602E0404000860020040008040000800060162A734880E00600400608880C0000000000000000 00FFE6980000000400010A1800A97811845801801202200009401410F006842016006006026308004200016801904106017000f9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF8ED30000 00000001843801800801C01C2182000000020844061260160024140060260068840060000068460234060478060000000060 06206100826006006004402800000000000000000000FF5AE7000000000041801801822801E019018022C0000328400C0878 06002005806006096206006006026047012406826416000000004006507800000120006144000000000000000000000000FF 7F1D0000000000058198180118E78458A182BCA000022860050064061C60D6656466646004806040036506020104C3610D01 0010106D062DE050126086406806806004000000000000000000FF51340000000400018018020018898098419298006003000005a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (044000600642 620800E90624E084202002000000000000000000FFB212200000000001801810001801801801C25000008001420504710680 240C04E04600602500704802604E4464460260070012012060062A6881200020006024020002000000000000000000FF9DBA 000000000021801801C00641803805A00800014200480E80690680600401630604602408610804600E402046007006800A00 20600602E420006026004056026000000000000000000000FF8C8A100000580025831816C00011801A1181C8762022614804 08606E6040440460861A608601E0C000680600300700600600000000680690621042040000480E18500000000000000000000085a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00600E80E40E 926914144140806010096D060000840068548A6C46896106A16911016457006086206000000000000000000000FFD5FC0000 00008001801809880181801801821808208140400701700E00410602600E0060240464008860462166B640642E0100006C66 06006840006007457807116002000000000000000000FF462F10000802000583588280085B805C5780181000021048B62060 8600604E00E48602608412600400628600600E00E28600000102F0A701E0F1801E2800600648C002000000000000000000FF 0792400000000005889841451821E018C18817400003B0400400E20600A28408600789600500721081704600E006247006150045a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (63DB00000000 0000001801801800801801801801800000200400400000600400600600400000600000600600200400600600600600600600 6000000000006006006000000000000000000000FFF059000000000000001801A01800801801801801800000100400500080 6004806006004000006000007006002004806006806806806006806000007006007007007000000000000000000000FFC837 000008248000001849809801801805841801800080200440628600600601680601400100600400600620084404F086006006 006026046A00000100006006006000000000000000000000FF3FFD0000000000041319038C184D8018C188195180801000C500c5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (204804005000 000000006C06006000000000000000000000FFA9DE000000000002021801819800B800118C3881800000420E200080086004 046426006020006100806006004614806407004006106006016260006806007006006000000000000000000000FF55D10200 00000209001809D4390181008591390D9080A8649643214281621428E0C60B6000417000007246D360040860860840B60370 06906000008080006007006000000000000000000000FF7DD7000000002023029801801801800041801821844004E0461022 104A60C400600E2062A014604802E08E00608444E00E00C0060064A6006400006006006006006000000000000000000000FF0025a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0600E087287A 96106310004050801006006005001002002407007806027001001001006206006040000000000000000000FF95A300000000 0200801801A018018058C3901805840050200690B13700644E00602600E02028428100648E81600E0060A280200620600600 60AA000880006006006000000000000000000000FFDE8A000000000000801801821801C01901801825882122A8A60A322E20 E2AF6AE68E2AE0801AD5F802E3BE2A68862AE28A08A0AF0AE2870C715000E186006007806040000000000000000000FFB5F0 000000000000001801801800804045901811F440536457111550016335086156116550406004806C2601400C0070C600440700a5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000009 0C5801821883803811823801800040E8A652C00344EAAE04602E08621040608000E844444807007006006006124004094288 1108402060D6906500000000000000000000FF6B050000000000010018018018018018018018018001006006004000006806 006007806001806000006004804004007006006806004004005000006007006006006000000000000000000000FF93940400 0000405181181190590001015585181585001020070110070460068060060064004040000000268160168000020030068060 46016001006006006006006000000000000000000000FF85EB000000000001801801801800000001801809F02102A43700020065a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (510002020162 A6001080080010000000000000000000FFF97F00000001004A48000000A08204A00000040000030201280000008100200001 110800408000000070004106800064400800000000203801D228610E210028050280000000000000000000FFB2E700000000 0091101841A91841800283801801800080600640E2BE02600650622682630000600010080400600600000600600600420400 C40800600600E006006000000000000000000000FF596B0000000002A5209AA988DA48AD0085D01A038000142A16806AB400 680708EB0644604010E800B00004806D06A09027086886A06C26A06820A40A9084E806A06000000000000000000000FF359000e5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B20B4830C200 294088300141240220304301344348300300300308331302329344B543002810000000000000000000FF0A39000000000500 20832C2200002A404030004000088D0801231104800C00800048000009304800E90004A61040A00800004000A00800000800 868810800551201000000000000000000000FF8B3A000000040020800880C00808800A108408008008200002004002C0620A 0C200200002100800200A00100400201A006002002002002002020004402462002002000000000000000000000FFC6F00000 0000000107200194442410040C0A200200025086801804043480900290812008000904800074200001100060205100800A000015a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00200202800A 00A00A00800A00A22A008002C0AC02802802B1282A802802002C50802800802002842902803083002002C028028028128028 430C304AA42100000000000000000000FF63F100000000024040122822B20040020121100100028A49100040048048010048 0000410009484082011490C80880100C004004930800000800A24A00808880808010000000000000000000FFE7A500000000 000181180190B801801801801801800A22620640429408600604601680600001620010680603648E00600400C00600604E80 6040014006006016056000000000000000000000FF94450000000284A8940CC4840C24CA4854D40840800A08B083893802440095a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80282A80882A 82A03402A8000000000000000000FFDEC30000000003503543002241541543541000000000B10D30550D50900C10550D5055 0B48D50840D50540D40D50D10CD0800000900D50D50830930950C48D08C00550000000000000000000FFF90C000000000000 6004000400000000004000000009001000000001049000001000000000001001000100000001001001000001001001001001 001401001011000000000000000000000000FFD1570000000000880AA0820800AA2AA0AA080000000A0000202A82A8020380 2A82A8AA8000220000288A202002202A82200000000102A82A8020088088200200080220000000000000000000FF19AB00000055a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002002002002 00200000281209200200200200200000200200200000200200600E042000000000000000000000FF20F70000000000AA0AA0 024804AA4AA0AA0C400000082A82A8AA8AA82002A92A82A82A93A12A80002E92B03212A82A82A80000002A82A82A80000880 C82AA2222122A0000000000000000000FFE90200000040000200002C08840040000043240000080200010000002480210000 01000000000000001008010000020000000000420000000000200400080040148000000000000000000000FFDA4700000000 02AA0AA0CC08A0AA0AA2AA08800000002A82A92A92A82802A82A82A92A82282A80102882212282A82C82A80000002A82A82A00d5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4C04C00802C0 0C20C04D02C02C08810100310300344B00220B08B0230034C30528000030030430020030134030010C311345280140240200 2002003000000000000000000000FF2F720000000018898018098C18018C180180180194400160065441042AC02604428622 600E20622043635610602602E00602421020620600420000400E404114006000000000000000000000FF4A83000000001000 201330022201201000431001000000080000400488C800804800804808800808800004800800801005004000804804804828 C44C21001100888010000000000000000000FF7BD5000000000A00800800A10800800A0080280080008020020020020420020035a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A6246450220 2A8028008000000000000000FFEA0704000004402300000380000408010000000000A00000040200000504C0004508420016 00E4402462A8080020046008040408430020100400006016200088000000000000000000000000FF91FA0000000000888009 08880800862002802820984000A0020062862C610A02204210230200200000A41070A00200240020200000208A2264100142 13001101002000000000000000000000FF4D3E00000040044040000042042440040040044802017810F92810290001010890 310010A1220000001005431000189005005001091241108019200000000000001000000000000000000000FFD1C00200004400b5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06346286106A 4000600C016006106406406000006206002C000C04090072B70AE140010000000000000000FFBA8100000000108080194198 B97990200002D813848029002605800A01620620020600603E4D72802000045060060000060060000060AE0030A001004044 600E006080000000000000000000FF40F400000008108180180382500182802C00184580002C000600400402248E04044E00 604600710848840400600600004600600000615608315000600600E006406010000000000000000000FF9A80000000080000 00802404010210805400405004000482800C02A04080300200084204064360280960000080000860202000000004001000000075a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8AB8AA8AB0B1 8C08AA8AB8AB80000002263004462AC2862AE066226006A2602028823620E826288004A322A845E14649E0002E80880364A6 C16000000000000000000000FF64F400000000184080180080100182080080180180004020060C10B200004E00600E006006 10680004001604620604054C10200040608640680000600600E20614E000000000000000000000FF8EA10000000010008018 0180180B80D001001801800015411601240600600600030611600601600000608410609600600601600012644E0420500064 26306016206000000000000000000000FF1D0200000000100180980180900380300104980188A00044A610254A206046400000f5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070470460068 00000000000000000000FF165D000000001935955954155911944954155955800044455455244A5525545505565560075560 14516D56D555565564CF4D4550556556556040110110006007086000000000000000000000FF98CD0000000018AC8AB8AA8A B88188B8AB8AB8AB80000A02A62280062AC22E2AE2862AE0062AE0002AEA26AB600E2AE0542222A808600E02602848E2AE28 610F0A6000000000000000000000FFB886000000001800801800801803801801801801800009200600000200400600600600 680600600000680680600600680400200000600680601024004014E55622E000000000000000000000FFF81000000000188A000da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600400480402 600600C00602600E01600000600600682100042088E8AE82E000000000000000000000FF530C000000001814801800001901 8408008018018000456004082096004004004006006006806010006006104804006086804000006006004008046006206006 106000000000000000000000FF24F60000000018808AB8AA0AB8418908AA8AB8AB8000006AACA23302AAC2AC2AC2AE2AF806 2AF0042CEAAEA202AC28FA262A42A82AE2AFAAF004288488426206206800000000000000000000FF01E00000000018018018 000018238008000018018000415014802896806084006016006807006820006106005546006D071040000064069068008060008da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A81018AB8CB8 818AB8AB800002644421809E32021601C0142AE2AE2AE00028E22602420628E2262260002AE2AE1E600008E08E0060560060 00000000000000000000FF222F00000000180080180009580180180980180180005161261404420000560240060060040040 0400611648E006006086106000006006006004020440006026026000000000000000000000FF250800000004380080180202 1801821825001801800000440C00000610A0843064D60060060060000460060040AE04601601600000600620E0084060064C E49648E000000000000000000000FFEBAF00000000184080180000184D80D801001801800008400401104200200400000600004da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00600600000 0000000000000000FF574D0000000AA0AD8AA0AD8AB8AB8858A38AB8AA000024A2AE00602602A2AC4862AE2AE2AE2AE0002A E2AE0D42AE28E2AE2A60002AE2AE23600848E2CE286286286000000000000000000000FF3691000000150155954551855955 91194595595400000261164460C640E54210452655655655600455654C0B44CE5164D6446000556556416010150550526506 52E000000000000000000000FFF664000000000001800001801801851809801800000008200601610E50600200C004006006 00600000600640400600600600E00000600610600000600604602E056000000000000000000000FFBEED00000008D8AA8AB800cda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000026006 49400600600608400000700600E0100062464C649648E000000000000000000000FF2CB5000000000001801401801801809C 0180180000010020040464462060048250070060060060040060060440060060060040000060069060000400000060260260 00000000000000000000FF01EF0000000AA0038AB4898AB0AB8A18818AB8AA00002822AC74E48E0062AC04C2AE2AE2AE2AE0 0028E2AE0042AE2EE2AE22C0002AE2AE2260002CE08E01E006006000000000000000000000FFAD5C00000000000180000380 1001805811801800000030A00608620602200442000600600600600400600620400602600608E00000600600600040000000002da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3851801C09E2 3E20004010604600789748E14200E2060A642600600000600600604410620400200000600604640000000000600600600000 0000000000000000FFCB2C002000002061A80C23B41C21C01C0180391200A081210681740E206482C6702700600600640000 60061160040860040124001E704682600005E00600600E006000000000000000000000FF6C12000000002401840441C01201 A03801801802050022200C10682602201508002E0060864260044D6006024406416006005000006094004000000480006016 00E000000000000000000000FF0D8F0000000000D1A00023A0100180584D801800000003200488600615200430600600600600ada040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (506510010000 000000000000FFA0EB00000000000184120980182B8078898C1828060051206200608E04020230001620610640E000006002 04600602E0060060000063042040080C602600602E29E020000000000000000000FF4254000000000201801C838948018218 05805882000000440C53600680600682644E0064000A041020004600E10408004400280000602E00610000E3164AE2060265 08008000000000000000FFBED7000000000001C01801B22809801C098018C8000004610C09654609642E4162061462400204 0055000608E42441040400A20000602E006200000500006006006000000000000000000000FFDCC6004000000001D0080580006da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000463200100 080060001100000002084C00004060064C8490488000000000000000000000FF61DC00000000000180148381182580395390 1902020000403028601600020640005640640000010000041244608600010611600000600440420000628602E20600604000 0000000000000000FF8B310000000000018010099059018A9801841810000000400000610600208604040604E01013000820 0102006006000006006000016016106000000050106106056000000000000000000000FF5423000000000001801001801891 889821825840000000240205600600208200000602E00E0064801862CA2360061560C608E00000E4440843101100004060D600eda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000400000 0000010100000004000080220000800004020000000000004004000000000001000000000030000420008000000000000000 000000000000FFFEAC0000000000AA8C8AAA9C00AA8AA8AA8AA80000000003222AE2AA01A2024CA00A2AA28828C00028A446 2A02302CA2243360002AA10240203808C08A010000002000000000000000000000FFC8250000000000000210018000000000 0000000000000400080000001200080240000000260260000060080001000260900000000000C00080000264260000200200 00000000000000000000FF83CB00000000000000240003400000000000000000002881000000002000A04002C00000060060001da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF52B1000000000201400400003401001001401200000001500000400404000088C3108040040040000000840040 04000104004001005000088040004000040028050000000000000000000000FFB786000000000155D43D5594595595595595 5800000042644755755648E4570045565565545140005564CC556556556556554001556D5655600055411652450452E00000 0000000000000000FFAAA90000000000AA88A8AA8088AA8AA8AA8AAC00000032324A2AA2AA2822AA8020222AA2AA2AA0002A A0122AA2A228A2322220002AA24A0220002AA2CA282282282000000000000000000000FF0273000000000400208400008400009da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000004000 0000050000040810111D00000001000000000040000000000000000000FFAB82000000000200044400020000000000000000 00004400100008000001504000010000200000000000000000000200000800008000000000102200204C0490488000000000 000000000000FF78300000000000002080000140000000004000000000080000800000100000820000000000000002040110 000000000000010000000000000020000000000020020000000000000000000000FF86A50000000004AA8808AA880EAAEAAE AACAA800000010A2B22AA2AA26A20219A2AB2AA28A2AA00028A2222AA2AA28A2AA2220002AA2AA2AA00008A28A00E0560020005da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800820080021 00D40400C10414432C00500501C00C1442402404040000040000040900600010000410283040000044444040000000000000 00000000FF512200000A108200800B02D008008008000548008400042A1300208A2A208200280222A0020A20800220020000 02803002008020002002022000082002002002002000000000000000000000FF4A6C00000000000000000020000800000400 00D00140000040020000000840000000000000000442001A000000008008000000000000000000020000000002A020000000 0000000000000000FFC9BE0000000000000100000004001A800001000000019004010004000088000000408008400000000000dda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF9279100000000102000200000000000090284000002009000000800000043000080000C81000420000000400000400 0001000000040000001010000001280000004020000000000000000000FF803A000000000260810800800808800808000800 800000200200200200200200200200280200200040200200100B0020EB1100000020127625400A2002282002002000000000 000000000000FF8227000014110001801D059018098B1C04053B2984A0044037046016414824004004244004004280006004 000006006806000000006006006000004006006086006000000000000000000000FFC5E20800000000820000000010010012003da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040006040006 000000100000010000006006004446006000000000000000000000FF8B410000000000000000000000000000000000000000 0000000000000000000000000000060060000060000000000060000000000000000000000060060000000000000000000000 00000000FFCA9400000000000000000000020000000020020000000000010000000040040040040000060060000060000008 00006000000000000000000000006006000000000000000000000000000000FF7697000000000000800A0080080908080000 8810800080220600020200300200282200282400000000200A00002880308C0200200020020120005440020000060020000000bda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010104000A40 062862969884804004201138E603E00004602000001680610608001008201340A14001E04600400E00E00000000000000000 0000FF66A6000000200001801801809801821800020009800004410600E50680000000000010200600600000704000000680 6006108000004000004000000020004006016000000000000000000000FF0DE4000000000001801C00809C01821A40200109 84009004060040061000403200008420000100021000100010060000060100000220464C30020D0D20004016006000000000 000000000000FFC5110000000020210018028018038118000200418100000026514006008100000240002140040000000000007da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFB7D5000000010040849209821801811D42001901E001802106047886006000006136016006506009406006000815026084 0010008064062860204010204C6006006000000000000000000000FFBDB30000000000038218018038818098002038010040 80A0A60041260040800441168050015000081008060002040200040000800462070960100C00002B40062060000000000000 00000000FF2AF7000000004040801005801805809C0000194184800023260040060000203204060A400000000010000E0200 040200040000000240253240000C7506004246006000000000000000000000FF3CFA000000010041801A15851A158419600000fda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (460060060400 0000400500540000100011464607E000000000000000000000FF4AD300000040004180188188183180180004000580004000 0610C00E20600000600600680688600000600610940604640600000000600620700002600600600600600000000000000000 0000FF59E2000000000001001A01E03801841810000001800004800600401610688029620000604601600400605601080600 6806000040D00100000010800400006946806000000000000000000000FFC22600000006000580F805811975807A0A005801 04401A20460260460654640CC026106006006000B4602E6084049870040009302C6097016701356B860176A74060000000000003a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000020404640 788600C302085C0624604780600804600600044782E006030200006107B571290A604604E206086000000000000000000000 FF9E21000000000000051101821840025800020041000040C01600400600040200002008722E026024806806000406026006 22100002480422400102020002F006006000000000000000000000FF76980000000000038A1805001801805E00001E210000 00E08E00640600604000600C00682E00640000600600180600600620080182608E0270200062060440060060000000000000 00000000FFD5EB0000000001A1091C018C1809C4180000780100018060860CE246006C0004604C1074070C624400600608800083a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF3F 230000000000048000498D5810951A81C0140C000120605180608000522410688404604600600A0A60060568160060260080 0601615604643213600692600E086006000000000000000000FFA3F2000000200001861801801808001800401C0900001160 0E00600608402A22400518600600E04088716600000605652600000002682E41600100610601600F00600000000000000000 0000FF741A0000000000050018AD809800009880001807000108E2860C405E40784204608400600608602400708602804E80 668600000880C914004640008280187046006000000000000000000000FF99F70000002080028010018C39001438400100010043a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600444040600 6006446048006006004006006006000000000000000000FF0E21000000000000800001801800801000801000000000400000 6000000004006006006006006004006006006006002006000006004004004000000000006006006004000000000000000000 FF6D1A0000000000008002018018008012018010000000006000006000006004006805007007006000007006006806006006 000006006006806001006006006007006004000000000000000000FF2E28000000008000800101801900A038418090000000 00628028601011411444420640600609600400600600644680200604020F024804104900000C41006406006006000000000000c3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004540D0D550 916556154550546557046A4E01600650E456002205000006200A01000002000000006026006006000000000000000000FFFB D100000000800190600002181980008B8EA00A00808A6000A0408100708600400480622E0260008060060060060066040000 070068060067A8006806007006006006000000000000000000FFBE82020000000020A11000041801C4091590115004C03440 002D4100526507105000116006006806006926427006D2B0140880860D400401400200000000400600600600000000000000 0000FF391101000001200880100000182190480181500210000042C000423000E05404608C24642E32E20013600610E026000023a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF0FE100 0000000000801801801801800801D508206020A060000264010364060179480040C104180880800600644200000200000600 7806007000000001004246206004000000000000000000FF8509000000000000A00803C01C01845C0080080C0A0100634049 70B00848B602640652421600E2A0006A2E50F01200220A000006806006006020000800006816006006000000000000000000 FFD4E7000000000000880801801801C0180500080002004062A00CF22806C22F0A708E08400629E30002E4F602E00222E01B 2A828698E10700E040006006006416406006000000000000000000FFA0C1000000000001800004001801844020950052144000a3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4A0C06942922 D02A00848900A04307086824000000000000000000FFA56F00000000013180D041021881003003001000000108600040E000 00824208408708E5175160090061021030570131060000062142048340A8480228044026006004000000000000000000FF65 3900000000020080100100180100100100160000000060000060000000020040060060060060008068020020060078060000 06002002802000006006004006006004000000000000000000FF5776050000004250811801C01A41944A22C0014010404060 00047000D00006086000456000800000101004505042104002000006AC4284444800006007004006006004000000000000000063a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002080092350 088890A40350070061104064200000C040F0000900000004000500E00060C6061000400420000000000000000000FF66EE00 0000040002000000100184040002000000000050000010001180920080101800119709600000610002040800620042000028 0300288110236036001000000000000000000000000000FFFE76000000010051821089A3982100A004800000000002600040 640010013610410000600080000820080200202400411600000610002002000800E106204A86006004000000000000000000 FFB0DD000000000204B21295809A29248281B280A0000082E0210A60084A090A034C28C46800000800A0022284AB06B0140600e3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFBB0E000000 028554C84C50C88F08C82C10D420800001032841402208D0A8A2D220CB0D2082003129202102003223413C0A00100320310B 02B02910310B442003403402000000000000000000FF7CE00000001002243842402004081040102413000000008020880800 4804C042024110820830C84084128408CA00880480000200C38890C00A00884800800030884000000000000000000000FF23 2700000000000080893080084081090093002000000020400200000020028400022C20040000001030030020022120062000 0200200210240010020A410006002000000000000000000000FFD7F800000000018900300200001042008008C0C000010D080013a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006082007000 02488288288AA82A8000000000000000000000FF3C40000000400482AA8B50800A24A00A00A02A00000100A0004020008028 8288A002842842042800802002003012842883000002902912842B22A42802802002002002000000000000000000FFD7C300 00000002302022020010002000002313080000840001025000094014404CA409080400488082008400510080001400000482 0840910808804840824005004004000000000000000000FFBA8B000000100001801881A01825851883809820000050600010 600000440C00600480600C88C000146C0400400600610440800610E40648650000C0460168160060060000000000000000000093a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (82A8488000A0 01003202A82A81002C92200002A82A82A80000002880080001082C80882A92A82A8000000000000000000000FF4811000000 20025420A2A01543543542003002A00000C80550441551130CD0481208C90510510A00D11440000C40D10C40800000900B00 800B08950950C08550550000000000000000000000FF6A7D0008000004044004026000004000004404000001000000800800 040040120C110100000014010001100010010010000000010413414C1401001001000000001000000000000000000000FF10 8F0008000001000000000AA0880AA0000C002200002802A80882A8220220060008200288A88202288A2800032028833000000053a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E80000000008 02800802800800800A0080A000000005200000200200200208A0020020028020000228120000020020020020000220524020 00442002002002000000000000000000000000FF5FE60000000000400AA0800AA28C0AA4000B40AA00002102A9AA82A92215 108310482A12892882002882A00002A82882A80000000000800902400884C82A8AA82A8000000000000000000000FF3E0600 08000000000C001220000000000000A00A000002800111000040000100812004104104010204009000001002000000000002 8028048040000200141000000000000000000000000000FFBC210000000000880AA0B00AA4A80AA0000800AA00002C02A82A00d3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000900930100 4281001001001000000000000000000000FF1A26400000400CC0900808C00C00C02C04D00C20804148304111353310B49352 301300301304B00002302300108200300300301105254B05300100220B003003001000000000000000000000FF702B000000 08D80180182380182180184182301510800062902260062040260160862AE2A4004000016006000004006036044000206006 206400004086006006000000000000000000000000FF04D20000000013492002484010444000002012010000884000004004 894B50404CA4810844044880800004001004841000004000B10C0082C94A804A20804004000800000000000000000000FF740033a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108048048008 020046036040446000200248096028088000000000100000006016200028308028000000000000000000FF83A30000000001 000810310400010000200C502100000805000402C80140D00801101505260060000060000000000060240200002004002001 00006016000000000000000000000000000000FFFC1F00000008202081080284082084680280180E8E800000080820020020 0200A10210201822400000A0E400018600200A00620800A0A2022000440102140106040000000000000000000000FFF14D40 080040840000000044040040040040040104212010212090012812012210012010054090000211010010000010010014010200b3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000010018A 1800081821001009900100000020442000600602000401600604600E00601000204440008E00002E40600000400600610000 0008204036028028000000000000000000FF485E0008000010018308040918998051088C4004114000032000E2160340940C 600600600025020A00000403800601000631600000608C306282488300044606400000000000000000000000FFEBF7000000 001001801800045901841000800010020000800041642608012410608E086020400440224004040424106006006000004094 406400156406104086100000000000000000000000FFD9AE00080000000010000200A04000008002408810C04100802000480073a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0064C0000000 007007000000000000000000000000FF6F742000000018AB88C8818AB889881805B022010000002000226006200444446696 146288A886002A80060000022882260022A8206206206130CC80A8204AAE2A8200000000000000000000FFF40B0000000018 01800841801A21801851810000000002200000600605033420600E80E84004080000441640082A00690E0020000961460168 00226006104006800040000000000000000000FF639D00000000100184281200180504B0850C0000000049400010E0060840 041360465260060060800060C40A848602600400600002401414648800640602C006000110000000000000000000FF47CF0000f3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (061160460070 060068000060861400160071060040002C6506206040006006006006000048000000000000000000FFACEC00000000180190 5913955D30915825900400000055000055600635254655602755751655600455254F5484D655144E0045505240C4446014D3 0550556556550550000000000000000000FFF2BC0000000018AB8A88A38AB88B0A38A1C2800100005060002A60060AC00E00 610620E2AF2AE0802CF22E2113222AE2370022A800E04E0AE20088E2CE2CF2AE2A8280000000000000000000FF035E400000 0018AB830821801803021881C48001000000600000600600001600630E00602700630000380680100200000600200000620E000ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0018C9800805 801A4484B881804000000000480000600608203200624600680604680400210610088E20080E806000316046206034220200 006006000000000000000000000000FFF11E00000000180380C84180180080184D201200000000200000600605630200600E 00602680608004601600800604608600400000620604E200806046004806000000000000000000000000FFABBF0000000018 018A08898AB8888818118AD00000002AA0002AE0062020062AE0862AC28E28F20628AA262202260883260042A803608E1970 820880882AC2AE2A82A8000000000000000000FFC26F000800001801801811801C4081181180540000000310000160064061008ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000044060060 06000006000000000000000000FF1CFE0000000898AB8AA88B8AB9008E98110AA0AA000021E0002AE2AE2AE2022AE2AE00E2 8E28E00028E23600000E08E00E2260005460062AE00008E08E2062AE000000000000000000000000FFFC3000000000580180 080180180000380D800000000000600000600600200200600608602602600400210E00000600040610600021620600600042 0000046006000000000000000000000000FF154F00000004180180084180195280192180000000000A400000600600615200 60062260060060000460060003464460C600E0000C60B600602000624608E006000000000000000000000000FF9099000000004ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000600 60000000040000AE22008E080000006226004000000000004006000004000000000000000000FF06FE0000000AA0AA0D5889 8AB8AA0AB88182100C000022E0002AE2A804640C2AE2AC2A82AE2AE0002AC2AC0002260AC2AE2A80002AE2AE2AE0004AC0CE 2AC2AE000004000000000000000000FF40D0001000154154155910955854111943955154000048600055655054450C554556 4C85565560045504C400040611044645000001611655404055035054E556000006000000000000000000FF4A898000000000 00001801801800001843881000000000600000600040E086006004000006006000004004000096004006000000006006006000cba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000098418018 0000184394588100000360000068011140100040060000260260000040060001160040040900000060060060004240060060 07000006000000000000000000FF093E00000000000112380180180420181180103100001060000060004443208070060060 06006000044004000006444004000000006006004020004220007006000006000000000000000000FFCFC50000000AA0AB00 18CF8AB8A80AB89181D14300003040002AE2A81060402AE2AE2A828E28E00028C2AC00022648C2AC2200002AE2AE2AE04008 C08E2AE2AE000006000000000000000000FFC8DC000000000000001822801800005801801000000004600000600001602400002ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (405000480600 0004000000000000000000FF4931800000100000800001801803801801801814010000610001610002E20228E02602004E42 600808400E01000200400208050004E006006500004000006407400006000000000000000000FF03B4800000002044800001 C81881C1188380900A068004508014EC8092690308701C1100061060400444040400020C4002000000126226386000604006 007006A00006000000000000000000FF1CEE000000002400401880E818800038838098000040486808006029004820005087 00600600E08440C00640040650400C009000006424200000004050007006000006000000000000000000FF561B000800000000aba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (446086406000 04400209000602C00E1500000064040040400040084AC2CE000224000000000000000000FFC9A70000001000450810230238 0B88D8018A108A0A2012C0900066501040480063C00100265363A800400000040600402609000000600402A0880042060044 06208004000000000000000000FF2693000080000021C00000A0188184180580980001002060000061280A60C00140002AE4 1050000002400E4484821040822310000062160040203541064040268A000C000000000000000000FFC50180000000040180 010180180380980180100000204440000C600081628021480514603004005052C41444800044400A10030011600600630200006ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A04000000000 00000A000000001480000000004803502202201400060064C00060A80000080060000000000000A842042000642601000000 0040000000000000000000FF5C77000000000001081C22003C15809805881802000002E0000064000040D000430001642010 005000400A3204860A404E0000000060140501104841060040164B044C000000000000000000FF51A900008000002100B001 0098019058098318200B4000448044E0C048C4000C400010610802030000400200000600C106400000006006002000054408 154286000004000000000000000000FF792000000000000100B001049901843809801930000040620022E01024C2000B600000eba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2CA2AA000282 000000000000000000FFA4240800000004082002004004010000002002200000000001000801000088800000520004000000 000000000000201014000000000000200280400000000804000000000000000000000000FF7B2E000000000088800CCE8AA8 A80AA8AA9008AB80000020002AA00002011200048A00228828C0002AA4060005D62AA3220000002AA0120424802AA08A2002 AA000240000000000000000000FF199800000000000502100180040580000001400100002000000000000080041080042100 26026002004400000440004108000000000400108010004006120000000108000000000000000000FF25E880000000004008001ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A28A0000AA2 320003220AA2220000012AA2AA0020002AA08A2AB2A80002AA000000000000000000FF99C900080000040024440020120100 10014004010000208001004800A14044C1491402000400404000012400000400100400000000414080008000000000500400 000C000000000000000000FFAD2B000000000145953C95955955955955955C0D00005560015560005564445574CC01655455 45105564C400045415654400000055655694E048156536556556000556000000000000000000FF17600000000000AA888888 8AA8AA8AA8AA82A8AA80000A20002AA0000C24020A302248A2AA2AA2802AA00A0000022AA2320000002AA2023120282AA2CA009ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000210022200 2802100000020020000000080000240400000001000001000400000000D009000000008000C0040000801000000020000000 000000000000000000FFBD420800000000244222084004000004000005000000000000800000000110000C20348020020480 4001000000080000800000008000000D0110000200000000000000000000000000000000FF75FA0000000002000000440000 0400000000004C00000000000000000000000000000000000000100000080000802000100000000000004002400000400010 00000000000000000000000000FF1EA8800000000488C888C0CAACA8EAACAA8AA90000002AA0002AA0002ABA222AA08A0022005ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0408E0000000 00000000000000FF73D70A800048B200000008001400264000403410000024001808000001002414C084001C250CC1001404 04081880000228420811000000004020024040004844044000000000000000000000FFB8E210004021280C80090280081081 082003082210005020100000000230820A240A4123020220880B232301208202600620000A00200200280000282200200200 2000000000000000000000FF84FD00000000002000000004000000020A000008040000010044000000804001000000000100 0200000000880000000000000000000000000800A208002002000A8000000000000000000000FF9D7600000000000000000000dba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000220608 200220200202000200202204A000820002000000006000000000000000000000FF68650A800030A200000010200000220200 202400000020100000000000002000880000000040480200000000080000442C0000000000000048020000002A0001000800 000000000000000000FFF16B000000000A00806800800810800800000C0000000030E000000000300A0021020220C2312000 00200200216210210200080200260200A0590020022A2003002000000000000000000000FF3408100040015835801905841A 11C1185415104414005060A02400008C7144416416C161040042100161440961070450040000060061060040004260062072003ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010800081108 08040000C0000000000060000062060040000001001360020060420060060000000000800080400040460040281060000000 00000000000000FF435D00000000000000000000000000000000000000000000000000000000000000000000060060000000 00000000000000000000000000000000000006000000000000000000000000000000FFFB3500000000000100000100000120 0200000000000000000000000100500400080000000700600080400400080000000000000000000000480000080600000000 0800000000000000000000FFE14F000000200A00800800A00200800800200808000000208808000000200A0222028220840000bba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (602000000000 0000000000FFBC2800000010580108583180100102124008488C062002E0100000000068000261060E010602600103400000 40062860060000060428A220A070000807104000016000000000000000000000FFE7DD080000001A21001001801001003202 000A00000004600000000080660800600610402604608008E000006006406006000404004844400800044800004228006040 000000000000000000FFF102080000001831101A41200005242004402880002000600000000010694804608E844021400000 006000016906146006000006042002880488404208044400006000000000000000000000FF00410000000818018018018020007ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (68000000C024 0A20820000660063161EB00081209E01600E006000000000000000000000FF0036000000021800001401821801E098000040 14420010440000000000228000600E04200E01700000A88031408400A00200000684600601108900210110601600E0000000 00000000000000FF6843080000001800001801A4080481280020080800000960C000001000254000600EB070000100000001 004C690701200200000200615600210000C400014006006000000000000000000000FF40BC000000101C08001801804802D0 081001200000000060000000010860A000648E00600120000100200000E12602200200020082400508029044424E0240060800fba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280011E95000 0000E00000018000204471E01611602700600000000800280680480C0000144155ED00287052600000604600600000000000 0000000000FFF9BC000000023821841E81800801000004000C00000000400000000000200400680600284600600401200800 4006804814000006006006021004042407006400006000000000000000000000FFC422080000093801801801800801040000 08080000000160480000001078041069060860860460149028000460260A4904001800000240000040006401007800006000 000000000000000000FFC66200000002980000519181980582584008080020000063001800100E204208600640206E0268090007a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFF5B2000000401E0180180380D8405050800094080000046010208020000405006106203406406404100140084224 11600600000600682600251010008628500020E000000000000000000000FF412A0000002018018018918018084811121001 1000014060001000010250350A600E80200F0A702002000008C00400600600001490C2040220000082200042000060000000 00000000000000FF9A8D000000001801881809800810084888001C00000041600008000002241402600680300E8A60218200 0030C806A0400400000608681600220000A046007007806000000000000000000000FF38900000000018258A1001C00800000087a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060064060 26000004804006806000106820026086206000000000000000000000FF493B000001C019000090018A0049A21CC0011C1010 01804806208821805406086000907806206C040040C0086C2601600688001600602623634D80608648B00600E00000000000 0000000000FFD9D2000000001801801801891806001C20001C00000080400000000080100408600600200608600146001060 400410602608004E80600610200400203600E006006000000000000000000000FF0E5B000000265885809801821808021808 022840080000600000000000140400600619200E007004210208404004607006000024C040042AB4305028080268C60060000047a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001010014004 41062304C025420E0061404800D604641440C20040642600E006100506006006006020006206002006006000000000000000 000000FF43950000018018000010018000010018000008000000004006000000004006004000006006006000004002006006 006006000004004006004000004000004000006000000000000000000000FF5A5E000001801800001001C00001A018000008 0000000048060008000040060060008060070060048040020068060060068000060068060040000040060000000060000000 00000000000000FFE2E4000001841800001005802001105808045800000004400E00000000400600410040640E106806104400c7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF8A8D000001A01D000018018010010448441540801540011556510450A00556104150D1354F107124006D564D6546C061 3600020020010200400000600800690008E000000000000000000000FF5CD500002180390401300196118197E80818010E04 0038000E108000201087044000A0000650600404400600680690600600000604600602478400600680680000600000000000 0000000000FF029A080001A2182808580180000020082C2130001000C0C4360000110841262972100324060060C000714A88 601600748E030054214006026808006088006006006000000000000000000000FF2B0A00002188B8000010018000018008000027a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600E00602680 0A80284006006840004006000087006000000000000000000000FFC479000001801901001E01C00801C00A002C1000002000 2086480400209014305B100060410010000064C640622600608700100200788620700000400000040608E000000000000000 000000FF4ED9000001801A01401001801800823844215C800D0081344E010030002CA680604048E50E0063280040160B6106 40600E00000600E004006208006010802006006000000000000000000000FF7D7B000001801803001001801800C01A220098 800AA00032A62A00A88BA22E6AF6880AF2AF2A669822C2AE28723E08F28E0A83AE33E00440641880628E802C06006000000000a7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000850106 000000A48A0444C300C260008208002328A6280806D06806000A168128A2D14C00934C288A40502260000000000000000000 00FFBE01000001821800101829B23042901084010040000020445600000008414408600010A5165172880022170002AE02E3 260001040A400E025080C04080A00900006000000000000000000000FF698C00000180180000100180100180100020000000 0000400600000000600400600000180600600000000600000600600600000600200200400000400600000080600000000000 0000000000FF533A100001951950311801900801B00800005C000000051006000400800804004040006001080840006006000067a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 06950000000000A114000040B0400E0002128020000004022000000029082100010020480702638000852C00000802108000 0000040040008040200006001140250100000000000000000000FF26D8000200400000016020154080000080000084000000 0810000000020000800000100A971960118400009004000000200002000200080A0200018106001880C00000000000000000 000000FFB68F010085801808081B0988102B30001000414000002000060000000080842AC2000260000000080122066500A6 45E51600008018800201400008402E204028026000000000000000000000FF70D1040081A01B2C255801A09309854000224100e7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (50600600008E 02654640604011610600602442E080000000000000000000FFB9F0010004800C22D00888C84C409008104008A0000140022A 0000012098A20A210108A84208310010300214330302BCAA00140330300310B0090430435029028020000000000000000000 00FF8B0D00000044030422821002020021A10021200000008044C8000000C40240040800C0814C208C00B24880884900B800 40000818C00D20E008908608C0C20001004000000000000000000000FF9537020400820843800C00800800C0000000081800 004290020000000045029004C0092800004002002013002202002202000502002082102000100202180000802000000000000017a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000008000000 002200402A82A82382882880202001000002002202200002006000080000002002882082002A8000000000000000000000FF C9D2000000800A0A200A80804A00A20A00200C00000090A00200000080B002002000802042842C00022C4A80A88290A90200 0902822842A02A0080282280280A002000000000000000000000FF6C0400000100120120C2452202422130003240000000C2 400400000088455080500088000480480088C880B24829000010000850910D009508488AC8009440C4004000000000000000 000000FF2F43000001A4190103580185180183190011380A000004600600000004640600642040608C00C4100543162140060097a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF350A 0000000AA08C0AA0AA09408008A00008000000002A80000000002282A0AA82A84C8AA82A80092282A85302302282A0000300 0280002A80002502882A82002A8000000000000000000000FF71150000001542A020C2C25543523142002222000000D41000 000000D48B00550550CC0550510A21110A20A00D08CC0CC0000A48900C80810840D10B10D48D485500000000000000000000 00FFDE8D00080000040040040060040040040045000000010010000000010000108010010008000014008810010011010810 100010091014D1001011001041000151801000000000000000000000FF02740008002AA0A00A0008088088080000108000000057a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000A308308 34800848C2C800804141004800000000000000000000FF3F3300000000080280080081084080080080480080000020020000 0000200200200021200200240000200204240A00200200000240200200200008244200200A002000000000000000000000FF C1CE0000004AA0C80AA0AA0E00DC0E000002440000002A80000000001012A0AA82A8000A89288000A202A80080022A222A00 00C04802802A81C01000882A9A002A8000000000000000000000FFC61C00080040000C120010000000020000010000000000 80000000000000108000000008010400002400080B00200080080000800300502A041002004000000080000000000000000000d7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (92600000210A D001201201001009021089001009000000108000001000441009081489000201001021001000000000000000000000FF89E8 420400410C20800C10C10854C04D4AC10D1490012B10020401512A948350300104310B14311144B10B10A00A012002041402 103053103089042003003003083000000000000000000000FF14420000000058018218418218018218010218410000006206 01000000600601620800622420440008400642600600600600004E00628440604000630604602E0060000000000000000000 00FFA25400000020122020020020520220A2012882010000805004000000CAC80C0048008A004484481010C800A808A080890037a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFB3CA0008 000020001000100000901020A000200810000003300000104800204802802000860C60000400800904000000100004000004 08010210100526500200220400000000000000000000FFDF7804000000A00002100904C00D0040C002304000004400000000 804002800000100044465060004B0004054010000000020208000104000422000006000008100000000000000000000000FF C4B500000000082084080080080082080881880A800010400202800800010208A01006248440420010648228315309340240 00222A2326242000460092020102006040000100000000000000FF9CA6400C0040040000042040402040040240448008010800b7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004400C0D208 62000C040614C082006000000000000000000000FF8453000000001800881000881900841108801809020028400612010000 43062060004004060860000A200600722700F08E0102040040080260002A4028204002226020000080000000000000FF379C 00080800980180101689981692400E86198612002005460A0690500246006500000060058000602126006116386086488006 0060022940A001C40000442208E400000000000000000000FFF4E800001001380104180080180180004080D000000000000E 00000000000608600804010040000000224610E00640620610000400428028435000408608412211600000000000000000000077a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000004A006 00600004000602600810C0860060060864260001262260020060820060200A6026006000000000000000000000FF90A20000 AA0AB8AB9000AB88989188A8000790008000DF22AE000000C22286046000020288A8800080E1862260668968060002062062 52A044082000882042062AE000000000000000000000FF75EC2000000018018A200180180984080000300080002000060000 0011004600600090084004080048601690E00601620600010E14600203484201404600404E806000000000000000000000FF 669900000000180181100082382480100088180100000140060000004040164B60004100060060200204460065162460B60000f7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F76100080000 180180980080188080200080100000008000060000008001062060000100060068004CC81611408612630E0005163068008A 4008006006056114006000000000000000000000FF600F000154155833155955905881904000905800000040055600000040 0556556000D08D56D16004C4642F4462AE40611600041409425055402A55651020650CD56000000000000000000000FF6960 0000AA0ABAAA8440AA8CB8228A980088580080000022AE0000000CA24E08E0002C0ACEAAE022804246226A0EA07026000026 05628220E0202B22AE286246AAE000000000000000000000FFC9884000000018808000008298488298008310008000042006000fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2060A00CE208 0D0246044006006000000000000000000000FF9154000000001A1100180184D81080300004B8010000004006000000004006 00600001084604700000502600600634680E00022604E44800608000004048C106806000000000000000000000FF2B1A0000 000018C380180080182280880180180180008C400600000084C00600600010000680600088401600C3268063060000164060 0280402200240600602C006000000000000000000000FF0EE30000AA0AB8000AB8AB8818848A0800881001800131C2AE0000 013842AE2AE00022028E28F00822E2863B480F05F0260000860869812AD0082AA0880362042AE000000000000000000000FF008fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000160060060 0200000600601010C006006446026006000006006006002440052004006006006006000000000000000000FFBBA40000000A B8058018AA8AB8AA88180996188180004042AE0000000242AE2AE0002A828E28E0000042AE00600604600600000640610A24 60F021208E2062262AE000000000000000000000FF93A1000000001815005801801800841800011803800004400600000001 400600600000002602610449400630E1260063560000060D640200600000200010E096006000000000000000000000FFF690 0000000018A18D180180180080D0C5905849000030C00600000048400600600000000600624004400604620E34E00600032E004fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001808 00080180100180810900002380000160060000002B60060060020000060060042A400620E00608640600002610642E000300 004040004100006006000000000000000000FFC06D0000000AB8880A88258AB04388A0098AA0C380002162AE0000002862AE 2AE0022A82AE2AE2802242AE2AE08E20E0AE0002AE2AE2AE2AA0900040CC2AC3202AE006000000000000000000FF6D9C0010 00155940152955955155945823815911800014655600000000655655600255055655654401455614633641615600048E0560 0651000452251054E456556006000000000000000000FF8A668000000018000049018010018019058018018000084006000000cfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (248000080860 2C006001806004000000000000000000FF8349000800001841020CCB80109003414100002200000040000000000860060060 0600002602620010600400600E14E0060000060060040000A4046424006010006004000000000000000000FF081F00000020 1D12004801801A2400181580181080000CE00600000084680600680600000600610D00C80600632640615600000600600400 0204086004006086006004000000000000000000FFFD8E0000000AB8440888118AB9100C18418AB89080002462AE00000024 E2AE2AE0062A828E28E0002242AE2AE0061066060002AE2AE2AC2AA00870A48C2AE2362AE004000000000000000000FF61C5002fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04060A604680 00083105284D444630E00600600620002E2060144C21100000040A4046006004000000000000000000FF9CCE800040481801 8008418258120418230159010A000850400001000C020604600302010600609022F80C09600600E04641000605600E102100 002104056006006006000000000000000000FFFCA6800000413BE188CD81803A081019838038810000006000040421000807 106E4262048651640100544E40602610602600818642E00744200000208410E047006006000000000000000000FFC4440004 00003C01089C01C010200000018C000000000460800080202060A680600E082056046044086004006046006086000036084000afa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018010008 0180180B8AA009008089920004620620020000025600600600008E20650010220400E0260061060000060042060421004042 04214120146024000000000000000000FF3D040000000018010008C18AB8C59000831F000184803661C600000058016E0062 9E38066604600000002608620611E10600000610404600220010007C08408800E004000000000000000000FFE69900040040 1C00813A01801800001841801842080008600001008000608602602600000002052008610400610E34611600000624600432 20A835010404C207126004000000000000000000FFAB5D800020089800805801A41800021841801800100000700004848002006fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000412 00080000B0000000000000000000FF118980000000000400000002C0020240CA02805400001101300000000C00000002402A 00060061004A02003400081480000000004400001000100C8006008120000000000000000000000000FF19FA000000001801 001C018CB801800101040002008020408000800008600600648D48042002000000300400C0064C6006000006244004100410 0840D4004000006046000000000000000000FF277800000000180101490180190D95404B9100D00400106200400300006506 04604600011040002000254410653601600E000006006204400020050404544450016006000000000000000000FF6077000000efa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA02B0822AA 2AA00010220A08208A22A0AA0002AA10222200A0002A22AA2CA2022AA22A000000000000000000FF1FEB0000000000080804 0040002202800021201000000010800000004280010000400040040042800010008000000802000000000008000000100800 00000020004000000000000000000000FF99070000000AA8E88AACAA8808E888080089688000000422020000000022AA2AA5 02C0028828870041712205A0021026020002AA4022123462102102AA2002002AA300000000000000000000FFE71000000000 0001001001800000008001000000000042400000000041000000011000E0260260000080960003204001500000000880C803001fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (ACC0800CAA8A A8AA880CAA8C288080012AA2820000000022AB2AA2222AA28A28A2002332AA2AA0020022020002AA2AA2ABAAA0000020AA2A A2022AA2AA000000000000000000FFC203000800201004200200444400040000440021000001100C00000043100500400102 C0040040000248414004400000000000040490804044000040000040D5004004000000000000000000FF52A8100000355905 C3595595591190595590194380005564540000001075565565175565545540004C4556556336456156001556556556554400 25655655650DD56556000000000000000000FF1AD70000000AA888CAA8AA890C8A89292A88088A80005022A20000000832AA009fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020400228488 228000000000000000000000FFE3DE01000000000050000000000000000000A0A00000000018018000000000000000010000 840000000800000000801009500000400400440000000800400000000000000000000000000000FFC68A10000000022C5244 0000000000C00003004000008000500000000B10000001088000200201000010000002083480000010000000000004005484 00000121000000000000000000000000FFCA0400000020000001000000000004040000001200000000000000004000010000 00000000000000088000000120000150000000000000000008000000000008000000000000000000000000FFD0228000004A005fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5611600C4840 100040C400600E000010006001006006004000446006226A8E00E000000000000000000000FF075500200008100000000100 10800020010052110000024A9401401002C0250A40258000E42CC00004440405000000000800400000402000422810440401 4004444000000000000000000000FF64E00001280008A400488288090CA50804840800800001244200220800300280205211 30224A200002202202A002000000002001002002002000282002002002000000000000000000000000FF9202000000000000 00000000000000000060000A0001800000080080000800000000000810000008000B0000001080000000000000000000000000dfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200800A00800 800800800800000002A20200200000208000200200A04002400000200208200200080008400020200220E000400000000006 002000000000000000000000FFA76C0020000000000000002001000040000004000000000080800000048000021040000004 208800004804000000000000000000000020000028800820209000004000000000000000000000FF85360100001008601008 00800800A00800800E00800000A8120120000020C21030020021029020000020020820020000104020000025821CB58021A8 2200A002002000000000000000000000FFCBD300015000194400590590191585180504914380000164460864800060060060003fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (140140060060 00000000000000000000FF982200000000188400188180388180D0C089080500000060060060000460040062062000000000 0000200200600600001000601000600800014012C044104016016000000000000000000000FF44BD00000000000000000000 0000000000000000000000000000000000000000000000000600600000000000000000000000000000000000000000000000 0000000000000000000000000000FF0111000000000000001000000000001000000000000000000080000000000000000000 0006006800000800004004000001000000000004005000800800000000000000000000000000000000FFE27200000000080000bfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680008020010 4026026206810008402081226A005022884AC015015006006000000000000000000000FF22B8000000029880210AC5811811 80F8A6888801908021601600610000E0C41068962CC00602608022240208400439001000640111602C82243000020408510E 016000000000000000000000FF2128000000051800201801801809A018008028038000C16106806001016004006006114006 0460005020020460061000004060084470C680201080402480400600E000000000000000000000FFF282000000001840150A 01841851801C02A22A2100800060060064003061140069070040000805008420221062064080000060800065044A02004044007fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (019E78301818 80828847020110600608600800708640E4160461C730650060E0060040060000000024000661940034209022AEF070461860 00000000000000000000FF460E000000001800410823811B20241220E30801020100600610611000600E1160062864064260 0001620E224006888208002010086806022049006D5700610600E000000000000000000000FF5F9300000000180000088180 188004124020222900000C624621600080600E406406C8622014028180600E24608600040000201000680C04210050000408 5026006000000000000000000000FF31610000000018421508018258C0601000020021000000E1060064003260160062060000ffa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600000 0000000000000000FF3F3000000000184814E80582981400900483090980004DE44E02E20000604406600E0970A600E10409 680400E004818000004000E26060348560202116006826006000000000000000000000FF7BC3000000001812209809801800 013000820849000110600F00E00000640C00600E006806006000A0600481400600000000400004600C008001206046006046 006100000000000000000000FF0D32000000001800001801801A00003A82802E11080002E22E416000006944006006006006 807804006006806086000000004000016000000880406806006006006000000000000000000000FF02FE018000001800060900006040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80600E0E7216 10408600004000400100600610040004A1B6087006806000000000000000000000FFDB06000000001E00604F01801841801F 2194DC1180000064C6C0601000714600644650610720600000604680440F001800004000296034412A880800042040060060 00000000000000000000FF791A000000001802120801801A0982180000844180012462060060100062060860062370070061 0421608640400608000800500008620E040088091424024006006080000000000000000000FF5C2300000000190000080182 9800621801E01803800000780604620820F00608600652612600E00014609430400408003000480008620440200812A4060400806040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108180080194 1A03800003640650610E00610600603000404600601414000600200000600600000600080641600000614220600600600000 0000000000000000FF97BF000000001800845951901049829D41805A11A000486146816006006046486400D0400700E80080 02468024208A6806800806280894825508816012046007006000000000000000000000FFFFF6000000401800000C21C01A81 821C01C11801800022E01680E0800060062C600E00690640E0000061868041360A00000040000160C402380010280E126006 006000000000000000000000FF37A600000000194002881D88180D80D804000107800108604E08600041605402600600602600406040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000000 000000000000FFB8980000000D1804821823801011821903841822800001600611600600608E4460000A4306046140000006 01220000640600000620004C204010006002004006006000000000000000000000FF84FA0000000018008018018010010000 0100180180000040060060060060060060000040060060040000060020000060060000060000000000000060000060060060 00000000000000000000FF9F4C000000401800801C01C01001801001C01801A0000040068060060060060060008050060068 02800006802000806806800806000004804002806000006006006000000000000000000000FFD3360000000018008098018000c06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A82A01253A0E A80666F618828E088024204000C0600A806106446000000000000000000000FF85D7000000001A01801801811A01A40801A8 1800154011655700650608655708641000754600645400200600205000600600010680000000080082408612602E00600000 0000000000000000FF559B0000000838408218238D122128888101301A00008260860A601720600600604000620700600010 084600A00000600600000600020C045100006006006006006000000000000000000000FFE637000000003C00801801901841 914811A05300804034653644634654F24610E310C0C03640E014222516D4214802712615054F09020600600080601200400600206040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (804011811100 000000501600E106006046906000006000000000802D96002800026006041047400806046110006804084006006000000000 000000000000FF3108000000001801801801801801C00801E0100000000044160061062A64072063280040C1200101003004 002050006006080006001004004800047000044106226000000000000000000000FF3A1A000000001800801801C110010204 011011010CC01160A78064068060B6886000806406826448000004080200006A2E0011070000060070004061060060560060 00000000000000000000FF62B4000000001820801801821009820803821F21002028E22621E22E4EE28E62E3E82AD0AE66E100a06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF77FA040000511200909929B13A05A24A23B25A400000324C0612E0062C754600611084E000800820896B0E80A0 0092688600080E0A08CCCCCD00C349149040B7116000000000000000000000FF9453000000021080805801841A01288A1100 9B0D800100E10680602600700E016000486516516000247026202010206246400026010000000020806024A0400620600000 0000000000000000FF435C000000001000801801801201000801001801800000680600600780600600600000580700600200 4006000000006006000006000004004002004000005806006000000000000000000000FF9784000000051805801801A1180100606040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200260200000 200200000200000204A000002000100802006000000000000000000000FFA2AD00000040000100210C4B0001000011021222 00000005C000800100085100800040400700600102428C00840800002100002001811C024170408018090080C00000000000 000000000000FF967600000012800020C00000200400006009800400003402101300218202A0800100028097296020008000 0401403801007000000204A0090400020000000408208000000000000000000000FFCA2E000000041001801A4180190304E9 0B00110800008A400684680630610E046088206800100000086126006000006406000006080000000080144424004806006000e06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C18218038000 A962CE00E00600644600640028688C00C0000068064043001061062000060000064161002064160060068060000000000000 00000000FFC6FF000000400C00C40C44C48D02C20C08D14950800104200394300290388A0C2081002002083001A0B5430420 210034020810020095330434310C3003092403402000000000000000000000FFA9080200000000C02C04A00082002A020030 40100000C01000880000000400100C0088130C00C800610C40804800020280000008800840E00A00A00880A0082408000000 0000000000000000FFFF95000000080000800800840800900800842AC000000190020020020820028020001030000000000000106040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF56610008000AA0000AA0AA0AA0CA00804409008000002A82A82A80002A80402A82A8220A882882800000201A008800 00002A00002A8080000050250220208AA82A8000000000000000000000FF3495000000000800A00A00A00A00B22A20A08A00 8000003002802002802502003000802042842800C12802812020802802010802800802A3288088A892882003002000000000 000000000000FF418C00000020100020120120024020129424424B00000048040040040040548050008900048048000C0508 A04C00000000800004800A28880A48820804845004004000000000000000000000FFBBE3000000141841805881801801885000906040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040288000000 000000000080000500100120140800000000000000000000000000FF58B80000000AA0000A00AA2AA0880AA0020800AA0001 2A82A82A80002A8AA82A82A80212A82A82002202202A82A80000002A00002A82282A80203502A82A8AA8AA80000000000000 00000000FFB2450000001540003543543543103202102441540001550D50550000550510550D50CD1510550880B10910A100 40800800550800D50C50AB0800C00C10C08550D50000000000000000000000FF0D0800080000040040040000042440052041 400000008000010000000008000000013000000010831011090010010010000090010010010014130010010000000000000000506040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C20100000048 048040008040040008048AC044844C82908890800800800800000804805228800892D2880480400400400000000000000000 0000FFC253000000000000000A00800800800904900800800000200200200000200200000220280200200000200200200000 2002108002002002002240002002002800800000000000000000000000FFB34E0000000AA0000140AA0AA0880AA0300404AA 0000AA92A82A80012A8AA82A92A80102892880002302202A82A80020022200002A81802A81000002A82A82A82A8000000000 000000000000FF9D3F00080000000000000000000200A100080400000000000100000100080000000000004100020002022000d06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF7EA04008004400004A040240005840042044240000010010210012210810012010810054412C10291E9101280000000001 001091101089091041001001001005004000000000000000000000FFECDE400000400020450C00D08804C42D40C02C048001 0030930034411030034010830030135034530134030824C048200300140300B0931032030030030030030020000000000000 00000000FF90CE00000008000008180380580188180900180108002AC0240840100061260882260860040140002060062060 00006206008126206226206100006106006006006000000000000000000000FF917A0000000002002AA0002002442002114400306040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100160160000 06006004000000544004004016116000000000000000000000FF11A70008000000000000040220A192014802001004A00901 104000205000000800200003062860000000000803404000A808000000020002804820808840001001000000000000000000 0000FF1E9B00000000000000800100102580001002000008002B001008000000004011004008000604E20040408000050030 040000805009040020C240000000000000000000000000000000000000FF817F0000001A002000080088A8008B6884800806 90000024C20020080020C000020200023C0040000422124020311130020002022020220024801024C010014200200000000000b06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000600600 600000600600000640400604608049000022000010604600000600600E02C450284024050006006000000000000000000000 FF40B10000000000000018010010018838008800A5094008620600602800E00600000600400600640000000C004001047506 10000600640604040800C00C284126406000000000000000000000FF159A00080010000006182104D0438019408C00A00000 27000048000840E18400008600402010022004208450614052624660000600601C0140400245440046062860000000000000 00000000FF4FEB00000000000000182300988382981480000802002000A81000001060241001260062D0400040002104006400706040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFAD 5D40000000004000100180000180800080182280000000000040000060060000070050070463018080032480002062260000 060064460260D0006346007007006000000000000000000000FF06860000000880AA0AB8AA8460B581800418108080002002 A82A82A82AE2AC2A8006984A88AC8400030906C4C00022E00E0002AE0062A40C40D0106204200AAEAAE00000000000000000 0000FFA9EB20000004000000180082000188000002B81080000C8000000000006004000006034040000A000002D608400000 628600000600600440680005608C084006006000000000000000000000FF1F7100000000400000100110900D8258AC80004500f06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60260002AE00 6BA41870002AE0262A82AE2AE000000000000000000000FFBA9800080000000000100101184188003084C010000008000000 000000600400000643400600688024040A10A000CD629700000600608508410000401608E006006000000000000000000000 FF04990000001540921559551559558C415495410800005505505505505565545500065545565160045415560060000C6116 000556006014410400554016556556556000000000000000000000FFC51C0000000AA0AA0AB0AB8801018221008018A28000 2302A82AC2A82AE2AE2A80060052AF28E0000800220000000068260002AE00744E20C20022E3262232AF2AE000000000000000086040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00E136126000 00621600000610400600600213000202200015601600000600604E0840020C4014052006006000000000000000000000FF84 CC000000000002001000001801009800000801000000600600600000600400000600404600680611000202200114E0160000 0600600E028002004314002006006000000000000000000000FF22790000000000900010000018018C400180102980000060 06002000006006000006004806846080000002312000406B06800006006004C0452800600600080680600000000000000000 0000FFD9F90000000AA0200AB8AA0AB8AB8000AA8AB08380002AE2AE2AA2A82AE2AE2A80062AC28E28F2042202AE1060000100886040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF512480 0000000001001805825801825801813801800008600611400000600600000600000600600200000041000600600600000600 6006042008004006046006006000000000000000000000FF248B0000000000000010880018AB8C98C5801883800028620620 E0002AE0860002AE00428E28E0002002222820000060060002AE2AE30600C0102062262822AE2AE000000000000000000000 FFB1A200000000000012100400D801005800009841800004600600600000602400000645402602600400008A00A000406346 000006006086446028016086002006006000000000000000000000FF8CA100000000000000B0200C18018418558C2809000000486040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0002AE2AE2AE 00A0082AC2AE0062AE2AE000000000000000000000FFFC7100080000000112900180980000000100900100000A200E014000 0065260000063020060060040820080C200600620E00000600600E010026088144104006006000000000000000000000FFA1 7D0000000000010AB0A98898AB8888238A1083000022E20E2060002AE2AE0002AE2A82AE2AE0002AA22808200632E0A60002 AE2AE2AE2920202AC2AC28C2AE2AE000000000000000000000FF6B4D000000000001005955943954115091945953800040E5 465400005560140005560525565560044284C24100064B614600055655644652000044641644E5565560000000000000000000c86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070050000060 040800860960860064C5003406000006006006201306C2502E20044400028E04E007006000000000000000000000FF00CE00 0800000001401809821801A44845020022000015500F12600000600500080600602602600000210751080605601600000600 70068800400040060AE006006000000000000000000000FF8E30000000000001801A43C05800000911811811800000204600 0000806004000006006006006004000456020006506146000006006006440000006006406807006000000000000000000000 FF73DC0000000000010AB8818898AB8899118838D180002023C624C0002AE2AE0002AE2AE28E28E0002A810604000600661600286040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF8DBD800000 120001B01A3180D802000001A288408A004942A680684000E50608048F0064403482200C7306002406006406000896206907 022440104004024406006000000000000000000000FFE7678000000004030C3049815E50048C8D0108A0904000C116000281 02F88780000724224622600010C026102206006206000046106007142110006046007A06006000000000000000000000FF0B B2800800440001423C81C0180DAA888380089884214048468042C1026406800C162080161160000441070008060060062000 370B7706A9A008104026007007006000000000000000000000FFCDFC000000300001C01C81801800080821C200040000881200a86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060044260900 88004484544006006100000000000000000000FFC19F00000000000180182180380200C82900908100800060060060400062 8408010E0060060460021060262060C640616E00800600622600A2020802942241160D6000000000000000000000FF8EB300 00080000050018018A98E98828D300102D02200062360040080060042082061C61B602610201404610422E02600600040601 4056002102004514094086006080000000000000000000FF63AA800000000401801089801801840401800804800008080600 412100600600010602620810002088648604200628628600000611600610210843604C00445743600000000000000000000000686040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 000030402602608080612C0044485001400000004080002040400040800C8000000000000000000000000000FFB29A800000 00000800000000000982C04C02000800001000000D00000002D00000000300060062003100001081000500100000000A0000 0283004A0030000000000000000000000000000000FF4A050000000000018018098B18218A080500000A0400080226004090 00600441040608602000002080600604640414620E00000608C0060004004A8024004226306000000000000000000000FFF0 BD00000800000180192180390A0108D18101200140004006000000006304080016026308080000006526404116006006008000e86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9D0000000001 128028AA8AA82292280888088080002222AA4220002AA08A0002AA00A2AA2AA10000250204A2A230A0A20002AA0A22AA00A2 A02023223022AAAAA000000000000000000000FF2BC010800000000000040020000008000005202800000000004880010000 00000800020000004281000100080000100208000800800001000500088000000000000000000000000000000000FF3D5800 00000000608A08AA8AA8328808848928A2800020A2AA3120002AA4000002AA04228C2880001222022220120026120002AA40 22AE08600011A2002002AE2AE000000000000000000000FFC00400000000010400C00000008180000101000000000440000000186040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080002100 0000000000000000000000000000000000FFB5908800000000AA8AA8AACAA822810CAA88088880018122ABA020002AA2AA00 12AA30228A28A0002ABA23A222AA002202001AAA2AA2AA2AA20104A2AA2AA2AA2AA000000000000000000000FFE0E2800800 0000000D0401401080011140043035000008C004000001004024001004480004004203450050500000040000000805008004 B24002020014055004804000000000000000000000FFA9F0800000000155955D559559558231559011030000345556046001 55655600055741655455400154E44E456556436146000556557557554020406556557D57556000000000000000000000FFF700986040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000080 8000800000000800000000008000000000000000001000008002400000280A0000000000000000000000FFB23E0000000000 0000000004000040011000420000000010008002000000000000000000000000000000010000004000000001000000008010 000C8040400400400000000000000000000000FFA9DC00800000000000020040008008840002402400003410000D00000000 000010010300200200010000001080000500100000000008000001004A0000000800800000000000000000000000FFD4E400 000000000000000000001004400000800000000080000000008000000000001000000003000001080000005001400000000000586040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (015011004194 18B194580184194594590D8C4010648651420651010600608001601400480109600600654000605000000640600749600000 C22610400E086150000000000000000000FF9265028000000001611001008004000611030041080008C0052440000C800420 400800010C084020000018C0C00010000000002014000000428010C005004040040000000000000000000000FFC0F60500D0 1104208C0950B42804840944CC488482400823022B280233008200200080A00A00200101200A2024C08820500000024A2002 412001002002902002002128000000000000000000FFF5B1000000000200008000000000000010010228100000180000080000d86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800800000 004004004000000000000000000000FF4DCC000000000001800800800A00A00B000028110000002802002802000002002000 00200400000010200200000008200000000200200200210000400020E002002000000000000000000000FFF5710280000000 0000100005020008020824004010404000000008204880004000080000000850200000100140000000000008000400000000 00008000000000000000000000000000000000FFE7AF000000000400800800A00800880800A0082800203120624026222000 0200200100201200200108200280200048200000014202201A00240104204200A402402000000000000000000000FF38E20500386040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (168161002040 804000001468B550640100401000000601620540F029520104002C04504000000000000000000000FF3FEB02000000000180 18018010018010C1005028000004600602000000002600620000620800000000E00400608808600000000000400400600200 0044120000000000000000000000000000FF46BF000000000000000000000001800000000000000000000000000000000000 0000000006006000000000000000000000000000000000000000000000000000000000000000000000000000FF0C28000000 000400000000001001801000401000000000000000000000000000000080000600600080000100000000000000080000000000b86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000481C01801 855005881101445030020004600600000400140600E40000610020000012604E08640000200000000000640400E248106484 023406006080000000000000000000FFE3BD00000000002B8898C5801881813C4BC0904110400D68060AE04204102E806400 082A0E42640040E35000608080490000000610C006A06800300004082114284000000000000000000000FF196B0000000000 11811901801A00005831810201042000E00E8068060000060060803068060460000064842068080868080000040040060064 00038424000000000100000000000000000000FFE7A6000000000543C81801C4D8842818030210000040117016108006000400786040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08D060060000 00000000000000000000000000FFD1CA080000000401C01845807889803C4B421041904104604E1002C60083060860080022 8602640040411200602000010000010602E00601E848016016903004784000000000000000000000FFAC7300000000000180 1801EA1008001013040401800010E09600050E0080060060100020265060020050428060002A200000000408600E08700080 620700208F006000000000000000000000FFE66E000000000001C01881B4120000160140020080010861260C001400008600 60000070411080000068060060004C2000000082006054106140A0E40C083004004000000000000000000000FF9AE202000000f86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600050200E08 6000256002014280004000000487806024006C08006006442104004000000000000000000000FFDAD50000000000E3843801 831020121031811020000086680680600400012618600008700600640002E0D6A4C010064620440206166014047041806026 200206006000000000000000000000FF9D1D000000000105801803881043E011250010420000006007001006000006006000 012806806004086B03405820004020000006006004006004106046000404804000000000000000000000FF96050800000002 0180188180190020D801001400000000600602000402040610620000648602E004006006804820004000000000054024006100046040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (09841A8590B8 A0621805911115008129780780680C0C018E00600000208602E024104462064040224A0048030400F0968260C10060860023 0F006000000000000000000000FF0541000008000001801809801E01811955814431100000E0860070040400060570080038 2730600484400A005A1180613000005620640711641048E004010104084000000000000000000000FF3F3A00000000000180 180180980448BD11C050010000006006026804000006006800A1200F10720020400A004488006000020004086846846A0810 6004020001000000000000000000000000FF17B4000000040001E03801821801835A01883488000000E0060260060200460000846040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400400400480 6000000000000000000000FFF28700000000000180000B801800209A01800001010041602620600E00600800E80620614612 680400405200200642211600005600400684C0A8206106006406006000000000000000000000FF416D000000010009800501 D2D921821B4DC12651100004710E01700602600004680E004406A06824024800040416002046100007016D0610700400E006 48E09688E000000000000000000000FF99DD000010000001801803CA1807801801E01001000012602E26E604100106006000 A0220601680081C00280400000440000040740600600642410600628200400C000000000000000000000FFFBF5000000048000446040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A42262160A0 0B611254E04623289604011602684E046100006006006006006000000000000000000000FF97E00000000000098040838050 01800029800003130004E00640604604E00001621640E00E08640C00420000620600202648800608E00620600048E1060060 06006000000000000000000000FF849100000000000180000180180000180100000100000060060060060060000060060060 06006000004002000006002006000006004006004000004004004004006000000000000000000000FF4F3C00000000000180 000180180180180100000100000060068060060060000060060070068060040048000000060030060000060068060060008000c46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2001A0180198 200080A2E29A8002F0880AE0A86AE6B946E28EAEE2262BE7A80AC2880BE226A2A2BE2A900E0AE0A6027180A0608605614600 6000000000000000000000FF746D000000000221800001F010002041441120900440556500C56D1008600008E0A6C1755740 600C00604AC06106C0092600100420015420100100400600400C006020000000000000000000FFEF62000000080001800003 983049808024090008002008606000650000700000602680600604600600480080600680040600000600610680664600C006 004004006000000000000000000000FFCDDB000000100201C80031841208294301B040B1004048688E95701650654952614600246040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004004006000 000000000000000000FF45B80000000000119001518410418003148002000001406801406400006000506006027011000000 80600240600680002E000106A00816E05040906004026006006000000000000000000000FF74DC600000000001800001B014 00400022D000A882004171000060000862000AE0868055280002880060400060860028060000070030070070000060040060 2E006000000000000000000000FF283500000000004180000180180008430080C00090400A620024E31020680820604640E8 0640E00000480A40E00640110600000600494E00408080600600E086006040000000000000000000FF3FA7000000000001C000a46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108000006020 0624E26600042600008440000410002000043404400400E000000000000000000000FF6C240000000004A18221158352222D 5C08050230000094E0008C6C31006020006086806000020808A22A068AE846820CAE000A06A26886C0E8B085080488CC240A E000000000000000000000FF86AA000000000001800001801E00201903604101000020623621600600620828600E4A650750 608011200A206286480006000114014205080200100424424084406000000000000000000000FFBA85000000000001800001 801801801A01000001000080600680600600600000600600600680600080000000600600200600180400600400200000000400646040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800002810940 800040000010280206244200200000200600200000401002600A01210200220200060210200200200044600020A023006000 000000000000000000FFD86600000000000000000000600582641802200000010810006003000008010000800700060260C0 0004040A40802A4000000100008280088600000200520080240000000000000000000000FF075F0000000000000002C26400 4194008400C08000012001311910080000418010081000862865090080004000000400000000180400100401501000000000 00810000000000000000000000FFA640000800000121800009839021889800000008000000E800006020406200086806284C00e46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2082C0000000 00000000000000FF1B95000000000001A0004185380590580B102051800000600C24E0140060000060061068849045000042 06A4604600400600028E2C601604620010C406006016036000000000000000000000FFB197000000000500800680900C20C2 8CA08105040000082282082343402020C0200305340B00304830302301308324350A0010030030033030C92230334A344200 2000000000000000000000FFE1110000000002014203003002002000023103350000020608808810000028600000800B0490 0800980A41000000C04198000800A20800E008888B8840880E508A0000000000000000000000FFC23800000000008080200000146040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (101100100000 1001011000001009001001001049001001000041000000000000000000000000FF8ED00008000000AA2AA0AA10002A080088 0AA00400002A8AA82000880002A82A8000420288A880603082202A00002200000000800402002A8060220200000A00A00000 000000000000000000FF40D8000000000400800200A84A00A04C00C002808000802003032842002001002002802042042A00 882892812802882802000C12C02842802800802892812112102000000000000000000000FF2E880000000004010000012312 802302232002530000804805104A04004800004004A900040048008448000000008140000008408C8888800C0888C824D20800946040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100040020001 0000010008000281000008000000000310400002030300080000004000000000804000880002001000A02212012100000000 00000000000000FF3E970000000000AA4AA0AA0AA0A20AA0AA03208A00002A8AA8220020000AA82A80000102A82A80002A80 C02A80002A00000002802A82A82A81002A82A82A90880B0000000000000000000000FFF3C60000000003545543542502442D 03483542280000550550D00A28000550D50000880510D50800400D40D50800928800000C50910C40D50810C50C1089013014 0000000000000000000000FF220800080000000000000040041040040050040000000000011015080008010000015418010000546040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000000 0000000000FF59960000000000010012002012802012012212440000804005044800000005004000C0084484480080480000 0800908800000A0480480080082088880080002482C000000000000000000000FFD496000000000000A00800800808800800 892810800000280200A15200000200200014A00200220800210200200200200200012A002002002008002002002912102000 000000000000000000FFB7780008000000AA0AA4AA0AA0220AA0AA0000C000012A82A8290200000AA82A8000000288288400 2A86382A80022200020000402A82A82A80802202A82A8600600000000000000000000000FF9C63000000000000000000004100d46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002002203222 003022200122022022002400002002012012002100400400000000000000FF0C0800000000040042040058418050A4005014 02000102904100108100128122120000128524500100C0010080010000000010010D02112812B91610090010050040000000 00000000000000FF7326400000000420C20C10C00810C2CC20C00C14800112B5134035230011030430402030D350300104A0 03212093002022501103482103103021003013003003002000000000000000000000FFDE1600000000800180180380900180 1109029081810000600415400622020628630008620600E0A02040960062262262060202460062462463002062060060260000346040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (485000100190 A000600001008000000E00608800200400444000204614608613222E00000620E00C1044C820002003012600600000000000 0000000000FF994600080000000004400008000180808400000C010012040000002021041000009000001620644000022002 05400402004480000100480080B0480448040040010010000000000000000000FFA867400000000040000009002011840048 05011100800005202C84204400001000C010002610E14042010C000088444400140500210108020000504404004040000000 000000000000000000FF8263000000008011801802808840980880880000840008214A00200204000240200020254802001000b46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFD0FC00000000000180180180091184283300110100000061160061040000060060000D200604600000224E24E006 30802600024644613400444005402401402E006000000000000000000000FF59D00000000000018018018208820208050250 A9020020E0AE0860442000A620600002208220201000200600700600110621008602600400C00009601000000E0060802002 00000000000000FFD3E10000000000018C18019208C20329280238A5082034E4080880800504A60060000264500180000024 0608644608A0AE04000622604608600000C404184086076070000000000000000000FF92240008000000098858010008019000746040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0648E0060212 2600030652E106546420B2C225204AAEAAE000000000000000000000FF0097000000000001A01801000800002842C0103200 0000603000000000000600600000600202200008E0A680600600002600000642E00600600000600000600600600000000000 0000000000FFD1620000000000AB8018AB0A402208809080115800002AE2002A82022A80062AE2A8216A88AC800086E14604 619E81010E000016006456016008204314214A06AAE000000000000000000000FF41D5000000000401801801012001800000 A01224000000604000004A00000600600000604400484048408610622604048600008E0962062D680010008E0A610600600000f46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80188380002A E2062AE2062A80062AE2A82AE28A28B0182262062240472A88260002AE0062AE0070002202AE2AE2AE2AE000000000000000 000000FFACD6000800000201C01801040901824804000C03800000600800001000000600600040700600604010E016006C46 50000E0000260060060060080040040C4006006000000000000000000000FF0CFC000000000155C019559549441109100005 018000556500550556550006556550557552D12004C4640F55651655050E000556106554534130550550550D56D560000000 00000000000000FF732F0000000000AB8018AB89082B8888C080100000002AE2C02A83402A80062AF2A81262AEA8F002A062000c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF47B400000000000180188385588990984B00812180000060B61360220000060060000AE0060064403260062D65460002 CE000006006126106208004484404006006000000000000000000000FF0A2000000000040180180180000004004100022180 0000603600612E00000600680000604202280000E04E00F55600049600000600E00600E15090600680000600600000000000 0000000000FF5FC6000000000001801801801909801815801011800000610600600400000600600000680680600088608610 6006000006000006526006526000014004004806806000000000000000000000FF7BFE0000000004ABA018AB0AA8320CA881008c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (051652205600 055655640645642008E406412556556000000000000000000000FF03E1000000000000001801805801845805900801000000 600614602400000600600001000400400000600600002600000600000600600400645011600E082006006000000000000000 000000FF68590008000000AB8AB92188183380188182500180002AE2062062C80002AE2AE00000428E28E0000062AE006046 2000060002AE2AE00600612020403C1242AE2AE000000000000000000000FF11DC0000000000018018118000000240018848 0D800000600600600600000600600020602202210400E00600601612800600000600640E4560800AE0060960060060000000004c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8900002AE25C 22C0860002AE2AE0001E028C28C0102262AE2A80062A85060002AE2AE2AC2AE00064606E0622AE2AE0000000000000000000 00FFD1FF000000000000001805881080041801800829000000608E0161160000060060000A800000000008E00642000600A2 8600000600612E106010226124022006004000000000000000000000FFB6880000000000AA0AB8AB8218A38098C180A8AB00 002AE2862163160002AE2AE0002002AC2AC2802AE2AE2A828E2A802E0002AE2AE2AC2AE08000630420A2AE2AC00000000000 0000000000FF16970010000001541558318538441159538B090500005564465462060005565560002005505505444265561100cc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 7785000000000480001809A0180804400000380000010264A124040610008700602020208408C0040060052002A700200E00 0086206000044300084006000006004000000000000000000000FFE42B00080000040040180180908180202000D840000000 604008022C00080700600040000404440000600600054600028E0000060060048064B4004486401007004000000000000000 000000FFA697000000000000001C019458005500082C18050000806904004006000006006000012044004108116004000016 0020460000060060000060000AE007092006006000000000000000000000FF1C6C0000000000AA0AB8AB91183B9000920418002c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00E406028106 006208456408014034010316006148110000000000000000FFC27680000000000000180188182200000000180080400164C0 4C040600009600E40000201400405010E28C0000870040060000160961444B60504145044020070060000000000000000000 00FFE37A800000084000001E0188100408008000980880201160020020050000060078000002040040280070860000060060 0608000E016026106050014286200007006000000000000000000000FF3087800000082480401C09C01849C220E020980080 01086802102004090816856418000214044000116416040026004006000006106104C160024040068028070060000000000000ac6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400060A05002 8440043640E20000E02C00400000420424010E05611650800608604410E008000204520216434220000000000000000000FF 073B0008200000000218018010081A595981180900800066A606621E20020610E0000060244044000060041000664260062C 00060064060841000820040A00062A4010000000000000000000FF66E1000000000020001801821083903803805811000004 E00600E0220100860460C040418415408800608664040620409E1001064860A400458010220420200600C200000000000000 000000FF30C800000000020000180D8098418000A00358240A41086011300087000036B0620000A01440C200006A048C0096006c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFF484 0000000000000000000010018000000840920000000000100040000000000000004004004000534006000010526040000000 00000C240202000000204000000000000000000000000000FF18108000000000000000000CA09184000204800000000000B0 0302800000000000002C80060064A00004880005408082880000000002801000280900301300001280000000000000000000 00FF473A00000000000000181182104B80180380102200001160100080200000860061000061040140900071040000070064 0600008600610844420210804C008086104080088000000000000000FFCC050000400000200218058099000218018438081500ec6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (56000556D564 06556048444556555556556000000000000000000000FF080F0000000004000AA8AA88893288C8888349480000AAA22A32A1 220002AA2AA0004AA2AA2AA4A000220200028A48202A0012AA2AA31213204B28220A02A2AA292000000000000000000000FF 5FA102000000000020000000000000000002000800000000000200A800000100000000000000040000080000000080828000 0000000110000200011001000800800000000000000000000000FF3C210000000000000AB8AA80482288A8AC90082100002A A20220200A0002AA2AA0000022AA2AA0021031220000020125020002AA2AA02200A0002263C04062AE242000000000000000001c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (011000001000 0001000000880000200000000000000010000040000001000008000240008001000000000000000000000000000000FFF52A 9000000000004AACAA8AA82A8C888888888080002AA26223A4220002AA2AA0003220AA4AA0002AB2AA0000422A20020012AB 2AB0622AA0023A22AB2AA2AA2AA000000000000000000000FF83A80000000004004014010400000200400004050000804104 00441000100500400000000000000043084800002104000000100500402040040104D0051050050000000000000000000000 00FFCFB3000000000000155B55D558CD915935913B43800155650C484006001D575560014565561561095565560005175460009c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF55530000 0000000000000000000000000008008400000000080001000000000000000000000000000108000000000000000008204000 00000000000008000800088000000000000000000000FFBB050000000000000001000000000000080220000000800C109180 00000020040000001200000000000400040040000840000000000400500010420400C00020400000000000000000000000FF 4052120000000000200000000000044044000024000000000008030000100000000000820000048900080000054081028800 0800000A80000008000000000800000000000000000000000000FF11F0000000000000000400200100000000024010000080005c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006208200216 2820D82D82402182402000000000000000000000FF99CC004010105800145A01001041C01003C0110B800091601600611600 042600600602120604600028E00600600600700600002620602680600005601600682608E000000000000000000000FF974F 0020800010220000010010002010101650A90001025001014000400104004004000041410040000804084000080084000800 004001000080800801000000000000000000000000000000FFCDB20020101028002A2800800820800804A00810800008A002 00280A200482002002040822C2A02028200200200200200200000200204280280000A002002802002000000000000000000000dc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800004800000 000000000804000000004800000000000000000000000001001000804004005000004000000000000000000000FF5C930000 00000000000900800800800800800800A0004420021428020008020220020000028020000822020220020020220000020020 02402128002002002002002000000000000000000000FF1FA20020800000220000100040440400000400C820010000008008 00800800000000000000000000000000500000000100000000100200000800800000000000000000000000000000000000FF 570E000000000800200808802C3A820800C00800800020341203280200006200200200000300200009B00220205A10200200003c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (174300000030 1000001800C00900000801924051800002684600600600000680600E01000690400094612644600700610E00080600E02600 648A92C104C05404004000000000000000000000FFDAE6000000001000001000800801800821000101800801610E00601400 0006006006100016004000006206006006006006000004006088400002000000030014010000000000000000000000FF4299 0000000000000000000000018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF4079000000000000000200000201800001200000000000080000bc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02600A007410 404504024804004000000000000000000000FF654E00000010180000080040010180020108092180000360B6006006000006 00600E0800061060001424C6026006006096000006006110000088108000040004020000000000000000000000FF06460000 0010110014184085084984083995111580001164060061D600040680602600800E02610000011630600400481610080400E1 26206240804084B0C20E004000000000000000000000FF0A46000000001000001800800A10000811A2300980080060060061 0E00000600604600000604600000200600600601E80600000400600400400002600600606604E000000000000000000000FF007c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060C00160060 46000006006004006006106246106006200005C06000080224000000000004800000000000000000000000FFA75300000010 18001418C0840A09882A01D129758100B2608480690600054E6063260008060261400001160062244E418720000621E10608 618048440C00C807004000000000000000000000FF9641000000001900000880E10848420953402801800145610604E05401 000600640F8003060A600000000602E00400601610000602600C0008101070960B7006006000000000000000000000FFE6F6 0000002018000018000022800000A500080180800060170370060A814600609600148490602000200702E006A0400700000600fc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001800 001801801801801809C81E01800010680681600E00000600600640000E00622104602600600408C006001046006006026220 004004004004044020000000000000000000FFF1A20000004018000A1200A00800200805081851800088641602E006000006 60600600002600A19C13618660600640400E0001060060870261181005E0500004020000000000000000000000FFF6770000 00101800141880804803A00801450001800002F00604600400000E00600600004600E00120600688620400609620000E0465 0E20600002C80C004004004000000000000000000000FF78A0000000001800001000804B00104801820001800000620E006000026040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060069800048 0400C006004000000000000000000000FF650B0000000018000A1520000228689015819801800009E88A0070860000160060 060000268060040070661074049B418600001EA06014604045146416506006006040000000000000000000FFE76D10000000 1900000905C21903800A35C051058841006026B0E00E04804600F50604020C2B621100608E11644400580601100602600788 6A40A94004084006204000000000000000000000FF48C00000001018000000000022040000018210318000046C1600700E00 000600680620000C0062243170060068042040062000C6026204004480016806006006006000000000000000000000FF460600826040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600680600 0002000800800806006004806000000006006006806000804804004804006000000000000000000000FF88BA080000001080 040A81801902201A00801801800000604600411600004600620600084280020400002610604408608000000D024804506044 016006006006206000000000000000000000FFD5F8000000001800100A45841829889A4584590588208AE106504007048106 016816040A0A44880800088E016404006001008006406806006200D04804094804006000000000000000000000FFD7DA0000 00001800001801801A01801A11C31C01800002601207600500008600610E000006106001006006006004044007000006006000426040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00001808000C 09A20828200212D40A098000006816A060362001060265264201068820840110464A6006007110008126015006A060000000 00016000006000000000000000000000FFC05300000000180400084180580180000180480582001060060060860300062060 16010012050400000016006104006400020416406416026140004104004004006000000000000000000000FF9D7500000000 1000000801000000001800001801800000600600600600000600600600000200000400000600600400600000000400600400 6000006006000006006000000000000000000000FF1E16000000401800000801800401801801401C0180010068060060060000c26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (604100600601 6006006000000000000000000000FF6E13400000001820000801C0080181040E82109182000060812520E826050E7662AE2A 004A4802800090262CE2840172C800812602EBEF027001004084014044006000000000000000000000FFEDA1000000001000 001801800A00240000A143459540556CD000651040005700E306000516802434002355086536026100000228200A1000502D 00000008000800E000000000000000000000FF4ABE200000001040041829000A018000008981038000096560016600008076 006006100E0200000000278C01645C006000000A06046146006000004004004004006000000000000000000000FF0257000000226040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006000002 004000000803806804006000001006006006004000004004004004006000000000000000000000FFFD2F0000000010140408 01844051800000004033800001641401A00000010600600601092685200000220604684602E0000403B8600AA04069490000 00096008006000000000000000000000FF37D8000000001800000A01800800600000A00001E800007224003C5022020622E0 060010070024080000060A640600602000100600600200700000400400502400E000000000000000000000FF3F8C00000000 1000000A01000000028004013109854154E0900220800000D6886306000D0A2000400021568060B400608000000100000C0000a26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180003580510 8821901890804081800000685000688000000622624600012440600014600220640600600000043000028024440024002832 0000026000000000000000000000FF20F70400002098002C0B2DA48A2C221B308C2281800080600080625021142700744600 0AA48D68008D280AC8E826B16000080CB6806B16A36A28A14804A04924006000000000000000000000FF8E9F000000003800 00980120080000980281184380008B6A1223608600009622600620801640600040282200650E026020001004824024004080 0C602E0C0A0E0D6000000000000000000000FF8302000000001800000A01200801801800A01801800000600200600600000600626040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (900C50810810 804000000000000000000000FFD88A020000008800080808800800800802800000800000260200200200840200200200000A 05200040A40300204208210000004A04214A00A008022002002002002000000000000000000000FF2FFB0400000000000010 0300000384010400A42200010A00000600001008600008000482403840002300081883A00210000800000200100302300840 0400402C008000000000000000000000FF22EA0000000000000001B006404182800866040000010110003112280102000004 00200000020000080020000000040020000000000000000100008000480380980000000000000000000000FFFE520000000000e26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04000A008109 00D0C000804950880800000C40800CA0A00A0080094890891084C000000000000000000000FFEECC04000000180000190388 10018A188D001801800000E0A408E48401004600640602000642E000024A060860C600600000040600608E40600010600600 6016006000000000000000000000FFF9ED00000050080040AC08C22C24C00C208CC820800028220B422002101C0340382200 10A310300150B0020034030C210000115302322303348904342B313083082000000000000000000000FF8646000000302000 20820020020C2002603900400000508908C08D00200088C00020000880808800805001000808B08000000B80800C20C0088000126040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000404400500 4A00002000000001000130001000000801000000001001009001001000001001000000001001001051351101111001109001 010000000000000000000000FF131F00080008C0000840C00080AA0200480800AA00002A84202A80200002A82A82A80000B8 200202400AA82A80000002A80000002A80000000A0200200010200680000000000000000000000FF3D6E000000000800204A 10A02A00B00A20810A008001002D02803082800003002002800802922800822002802A02A4A80080088A8028129528008D28 02C42842800000000000000000000000FF1F1F0000004420002482242C1200214305445201000080480D000A14000005004000926040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400002A8B800 00000000000000000000FF78960008000000000000840B409002C49021040000000000408000880008000000000004800002 820A00010000880090000004800000A0148142400220000040080000000000000000000000FF2F840000000AA0000820A010 202A00A0AA2800AA00002A8200AA82A80002A82A82A80002A80A00002082A82A82A82A82A80002A82A848000000042008822 02A8420000000000000000000000FFAF790000001500002C82102002443000021441540000D50890550A20800550D5055080 0820D30800811550550A40B40550800848D50C08C00C008C8910CC0D08848000000000000000000000FFD84300080000000000526040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00641600000 6006046026206406206006016006086000004006026086006000000000000000000000FFD9870000000000000842C0208210 3100010512010001004140805004004005004000000800880900928804804800800004004800800810820890804948908804 048000000000000000000000FFC3370000000000000288089448808048008048008000002802002002000802002000002002 04200000200200200200200200200200250208A2000D2002442002002000000000000000000000FF23510000000AA0000500 120500220200AA2D44AA00002A92082A82A80012A82A82A80002A86087003402A92A82A82AA2A80002A82A8020200410200600d26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (208008048208 040A0000800000200220A02218601240248028240220A00001A00209A60340200200200240200200200000A0520020420020 10000000040000000000FF22354008004000000824004200004804004004A400010216A10010010010090010004006A00210 51001181110000001081201061448080001681014080111001000000000000000000000000FF9474400000420010002C00C0 0840D00C20C84D0080015030234132431030131030001020C20C300101300320240200308310340300249200B14100208200 3003002000000000000000000000FF9F760000000820000C1821845801821881821841804002C0860040060040060064A00200326040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400620418004 0000000000000000FFA145000000040000001001009001881800001003802010008E40002600010E00630000620400600202 610600610640E206006004416102046222000004004006084000000000000000000000FF2446000800000000000100010011 8B00B000011200C04281100005500105000281000000002104300C04002A0000000008000000000400008228208280120280 080000040000000000000000FF4657000000040008021001003021800120002004002029000000020000400010024004C004 1040280000004400444002000802002204100900200000000A8100000000000000000000000000FFF1C70000000C2000000800b26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (116800036046 0063120860060060360C6112036800056004504046004000000000000000000000FF27D40000000C20000010858499118019 25801801800000615604E15600000600600000405640648028401600604025600600610441444450430008012E02E0960060 00000000000000000000FF31490000000000000010098238A800B94180380180002460060064060000063060400060060262 0050E02634E20300601600600400620A0160004003260262A6406008000000020000000000FFC15900080000000000110982 38A404381400317181000900063E01161104060D60200060064360502064A600608600E20600600600E0EE0260100100141000726040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D8AB8C803308 10AB80002A822628822E0002AE2AE2A800028E28A4008142462AE0A8C0E0060064860841242044004C60162060CF2AE00000 0000000000000000FFB8A74000000000000A08010A3000042003003001800000000600800600000600600000020608648004 60860060000A6006006B0648C080004001446236086047806000000000000000000000FF9F2F0000000000000AB821041022 08C1080E10AB80002A83062003060002AE2AE2A8002244066100D042962AE002006006006216406416106120A06644104206 2AC000000000000000000000FF820020000000800000180908300182200000B001800000000610000600000600600000210600f26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000000000 000000000000FFBF290000000AA0000810AB0910320880408818AB80002AE3062262060042AE2AE2A800207C2A7004084226 2AE2AE0060060060860AE4A22AF000206304054206AAC000000000000000000000FFCDC40008000100000000551010018000 0000B001800000000C0400070040060060000000060068000461060064060C600600604603400405402001408402C4060040 00000000000000000000FFA4F3000000154000014155801944110090131155800055044E4C04CE0005565565500020864560 04C8E45655655621600600703402603255650810C004404316554000000000000000000000FFA15B0000000A40000AA90180000a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040040060060 1601600600608600C1081040200160C6006006006000000000000000000000FF73E800000000000004004590D81180582583 380180001360841260060000060060001482B60060000AC0060064C654600600602E4C424424C0100240160AE00604E00000 0000000000000000FF367C000000000000004001831888003821805801800000609600610E800006006000000006006C8400 408600600654E00600600600421400409008412E02E096006000000000000000000000FFDF98000000000000031001805801 8201148518018000006046116046004006006000000506016000C4C016006006806006006256404004004400056004504046008a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (111954151955 80004461064465565505565560001100005560040C455255648E21655055005640650650401040E44E4C655644E000000000 000000000000FF825680000000000000A001801909801800001801800000601610600600000600600008000008E000000000 006116406000000006006006006020006006006006006000000000000000000000FF661400000000000008A0819219238898 818818AB80002164202162AE2A82AE2AE0002400442AE0026042AE2AE0060062AE2AE6060040140040022863062162AE2860 00000000000000000000FF9CC9000000000000000011801880021811801801800000621000E0060000060060000000060060004a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF63F30000000000000C00AB8AA0238880840AB8AB80002463462062AE0002AE2AE0002202A80060002AC2AE2AE2 061462A82A82AE2AE4162AE0003262AE2AC2AE2AE000000000000000000000FFEFB200080000000000400185180004380000 5801800008603608600600000600600020029000600600C0020060260A60000000860AE02602E0220C400400600608600000 0000000000000000FF06030000000000000800AB8AB8238CB8B00AB8AB800030E20622E2AE2C82AE2AE0002282A82260002A C2A82AE24600E2A82A82AE2AE0A62AE00822C2AC2AE2AE2AE000000000000000000000FF32140000000000001500D380384C00ca6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (50015A621010 680000018C85645E54614150700F006113006000000000000000000000FFC7F8000000000082402481802004000080001449 82400C004080008620100000702000800B04600400482F046006006000000002406004000001815005805006806000000000 000000000000FF459F000800000000020001000111804254001001800111002015000628000000600000880242E002804006 006086547000000007006506006022005004004006006000000000000000000000FF4D4C00000000000000A0010000000200 00001C0180000261160070060310070070000800001060040040068060360160000000060060360040101160060040060060002a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080052218801 020100030006000810006200000002A0600008C3070965220060481401001060062003084865260442924460000000000000 00000000FF4AB58200000000804000010140000000C000102180204080201402060004010068080500000261000941060060 020860100000242064060520A128710700508B006000000000000000000000FF395582000000000000000100800004004004 1001800101000002020600021102600000044241608010408200620000600800005000600600C00800609620600300600000 0000000000000000FFF54D8008000000020020818000038202000015018001420001500806301009127010040B202060608100aa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFB2480000000001000800018018D401184000502195404401000004060000A010640000001611400000425622608600 6040120006006096016240004004024104006000000000000000000000FF98BF00000000000006000180188A1C7830001801 82202060061860060000B600600000000E40440001402E12604200E01000000600608C404000004004006004006000000000 000000000000FF66870000000000000800218A9821809880041919848010E20640630610000618606800011409C220004056 60601800600000000605E06450E030014004686004006000000000000000000000FF7EE58000000001000002010000018200006a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA00A142000 0002A02AA10A10200020220A2023222AE000000000000000000000FF0F150000000000000000810241018200000000000000 00800800000000000000000000042C0002804904240000040100000000100000201481200100001001100000000000000000 00000000FFBB4080000000000000004C00000180000002C00000001200201300000000B00000000001001000000001080005 205400000000000003002002081400A0028000000000000000000000000000FF1C9D0000000000000000210A980180190000 1009800000840004800600000000602800000600002008608600E20E00E0000000820960240001084842A450440C2260000000ea6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5955800044C5 044AD556000484D56000001446296000056C0E557C0621680000010755655611600055655655655655600000000000000000 0000FFCE9E00000000000000002888A8328CC8000A8CAA8000222222232AAA00122A2AA00080128322250004A0022AA33200 A00000022A2AA2122024C82A22A22C222A2AA000000000000000000000FFF33C000000000000400200220000040000000000 00001000480000010000080000000000080405002000808001500A0000800254000000000548000000000800000000000000 000000000000FFE84D0000000000000000008C882A88A8000800AA80003123923022AA0003022AA00000001222A000524102001a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF7F5D1000000000000000000200000200000000000000000140008800000000000000000888010282240020000800010000 00022880000020000A000000000000000000000000000000000000FF60048100000000000000AA88882288C8000AAEAA8000 2022022222AA00026B2AA000000322082002183A43AAA2020020000000022AA2AA4620022AA2AA2AA223AA80000000000000 00000000FFEA208008000000002004844001000000000032010000004004004805000805004000800840888000004C308050 00401001000084004020028000010010008800004000000000000000000000FF080B90000000000000055591594D91180015009a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020022020220 2200280A082000002802802002000000000000000000000000FF50EB00000000000000000000020008010820208004000000 0000020800000001000000000000002202080080000084080000000000000000004002084080000000000000000000000000 0000FF8F250100000002000000000000401423760884100100288000001010C008200001A100040000000000038088000080 1800000000800000001400208040040400000000000000000000000000FFF9BB010000000000000200004088004000000000 0000150008100000000081000000000000240000008108000148540000000100000000108540000000000088000000000000005a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800100300204 A00200206200216200200280200006011A0020020020028020A200308A0025D100A5C21C241A000000000000000000000000 FFF741140104000441801809021001A01523033C8D828001640600720500522600E024406204026002020006004006046206 80700600600E00704100C026006006000000000000000000000000FF170E0024000000010010014012001050111010000000 700018424994004004104104200004000040000510105800000000860845001000100828C442000000000000000000000000 00000000FF4B91140302000020800810C40800800800A40C12810000220A20208200240208200240220282200000080A002000da6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF61 1E00000000000000000000000180020020020100008008008000000000000000000040040040000008000000050000010000 00000800001000801000000004000000000000000000000000FFC5C5000000000000A10A00800800C8088882008C81000020 0200008A20200200200280220200300000000200200200280200200200211200200000A00200200200000000000000000000 0000FF8FBE004000000000200200000040004000200000000020001081100400000000000020000400080000080000400080 0000020140000000000000004800000000000000000000000000000000FFD3D501000000000080880080081885AC449B8882003a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00600610600 4006804042A18004004000000000000000000000000000FF2B15000000000001801804820C10000044000001884090410404 6D4C80804E10610010E04102E4C00008483240060C6A07006006426ACE50708810004400400C000000000000000000000000 FFCB09000000000001801800800821808080044001810000421410E00400000600600000600010600010008000401600E006 006206004006054400202004004000000000000000000000000000FF42990000000000000000000000018000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D04086086812 A42106006400006080A02000000006006002404A0E40408602682E00602802C086007004000000000000000000000000FFF2 64000000000001801804000011810922A0040188C0804C2E096AC200A0460A60800060200D22A000011612608A0064060065 0642632E1172D0884026006016000000000000000000000000FF71BB00000030001184180080080190304112B81180000844 D607654C01400E01603614600001404008006080600080404481400600410422410050000440410400000000000000000000 0000FF4AC1000000200001801C00820820005001211A61800060404600600400400604604608E002006002000000A061628A007a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF0E8B00 000000000188180080080A08400801000382400C600600435600A00780620000600090202422048E20A00620600620620600 4006004000104104004000000000000000000000000000FF60750000001000018C38208028A1A50840C61C01000083C45604 70020C20260A608010E0680802802202CEBAE06002441400430E0860440A6010814626806904800000000000000000000000 FF3A280000000000098038420346A0000800901D11800020688611600228392612E108036090A08280000007046000046044 01601612608C1470A0224047206007000000000000000000000000FFBDAE000000000001801A04828A0C432808808103822000fa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00508609602C 3072A044C02C004000000000000000000000000000FF2784000000000201801801801821801C01A00111800084408614C487 04600600782600620000000A03080608220611400408480610E02408680A004006006084000000000000000000000000FFC7 F2000000002001851810840830059959994049800002600E8042A600700600600610E05808200420000E0031060CC0060042 06006586046040814016006006000000000000000000000000FFE7EE000000002001801800800801802000400001800028C4 1240404610208600600000E0000A000450101600200E00600400650600600D406B054240440040040000800000000000000000066040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (029060260160 0700600600700000000010000600200610400400440600600400602400C006006004000000000000000000000000FF48C600 0000000001E3189986083800D943A1184B8000A3288280600612710600600630604008000C0402262A220606520C18420E00 6404046090A04006006106000100000000000000000000FF4C8310001000000580384000920380155100590185200108522C 701700E4160060060160014100040A000780A047C8488440C00600603420E211124024114004000000000000000000000000 FF4828000000000401C218000000004410014059018000D022864AF00602700600602600620084000810880608229600400400866040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF5E8A000001 800001801C01401801801C018010008000006806006006806007006800004002004805002007006006006006806806806804 806001006004004004000000000000000000000000FF23D1080049800403801800801A04005813C0180280A048622E20684A 006A0600600000680008400402040602684602640E20600E00400C415020406046106006000000000000000000000000FF87 A4000001800201C258C9831A29809B41825D08840105608704680684600E00680020E00040C80C800046B0E40620610690E8 06806824806B1415600400C006000000000000000000000000FF6488000020000001801C01D81B81A03801821C018000080A00466040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE12E8240060 85006004004004000000000000000000000000FF61CE008001800003801A00801040040002A01804804094EC060169025462 0E04E01014E52A116048481047026C565470A62CF4068044068040A000E000806006000000000000000000000000FF1ABC04 000180000180392180100588208882580080004060060A620601608620610020600044400402040630E00600601600614E45 614C086400406004004006000000000000000000000000FFECD1000001800001801800001800001801801000800000600600 600600600600600000600200400000200600600600600600600600600400600000600600000400000000000000000000000000c66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (184A03612602 420003684650402000000E48622E4A62AE006006884004820201806006006006000000000000000000000000FF8309400001 800001821C0280180180001320483082007018300C004608728E03C0882CE2A622C038080AB792E26E2E65F70AF20638628C 0C762004E044004006000000000000000000000000FF9A400000018000018018008012000002001306259500050440300493 0571462244400165565162C402080640641650680600600620000E201008006080800004000000000000000000000000FFAB 772000018000018438249812018022000221D9840000825062021E00E066204060024806804004038106006006006006806000266040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A0000018000 01801800A0180180180180100000008060028020060060060068000000060040000000060060060060060078060060040068 00006004004004000000000000000000000000FF13F6050001800405801900001045940110000A0580C0BC08152149824460 0600480000601610E800422006506006806016C0600620080E2048034060A0006006000000000000000000000000FF6F3C00 0001800001801800801000000608020C4A800000020404440700700641402000431600728800280680600700600700600600 3006006008026004004006000000000000000000000000FFAD860000018004018018000018000000013128018C000500480800a66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000021000 0000100000000000000000000000000000FF11DA0000018000018819429050018098001080498000D0082022000800680600 400000660612604000610640E00602602650E106480066080000244010000534000000000000000000000000FFD457040201 800201C8BB50889200201A404A034B8000208541020D0700E026824008A0CA2E806800A0494688E826D06D26CAEA0E886C46 906A80826C84814804000000000000000000000000FF0F9D000001800011801802A018200D5913A15001800114600A41202B 906A1608E1000020870CE0A808220E00721604600E00604620500620800848E00E0C0154000000000000000000000000FF5800666040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (088028420000 A48810C00800200800800A00A00B80A80808A50800B50808830840880800000000000000000000000000FF51F60000018004 08808828800000800AA8000910000000204200200010200280000040208200200010221A00210A1820020420021021120020 C040A00202A002000000000000000000000000FF34E40000000001041000000000019C415040002400002A00010080A08512 0108100000610C0840B849402018006040005802002000060040810018078C404088000000000000000000000000FF083500 00000000000420806000218200060B008000010012905400404011500184880000600481020000800000000000000002000000e66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100000140 124530129045443500B2CB0000C0480C88C80480C0040040D08008008B08000009090908209408408488048C088083080889 08B0890CC0000000000000000000000000FFA3E00000018000038018810838018A394B82102D80000840AC00453612680E80 E400046006506100206006306106106126046106006006416000436046006106000000000000000000000000FF3FAA000400 800320D20C40808D40C00800F10D00800040A2035430034121422028014032B302305110B10B0030234030135030034B34D3 0A3151083313503412000000000000000000000000FFAB340200000004402002002983402022000422030000818D08000F1400166040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C50850900C50 C90940000000000000000000000000FF07EF0008000000004000204104004000344404000000011009001001000001000041 000001001011001111001011001001001001001001001049101001001008000000000000000000000000FF408E0008000000 AA0AA0001100220840802B004000000C0A402202202202A8AA82002A80000000000002202002800000000102A80502000800 00000200200010000000000000000000000000FF6B53000000800400A00A90A4AA00A00C00800A0080008320A280290A9028 02002000802D52C02A00002802822812A12B12B02802C0A84AC02A40A4280284280A000000000000000000000000FF70560000966040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A82A9B002A82 A82200080002222B23C22AA2AA2AA2A82A82A82A80082202A82A8000000000000000000000000000FF826400080000000040 040200200040004202210C00012810010080008008010000000002C80404000000080A028020023022000040029010020043 0100020400000000000000000000000000FF58120000000000AA0AA00A0821320840800820AA00002204802A82A0220AA82A 82082A82A83284000002202A02002A82A82A82A82A82A82A80802282A82A84A0000000000000000000000000FFEE30000000 0003541540D02402D41303085002000000010510540D484D0550550548D50800D10800000D40C08848930880880D5088082000566040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000023801809 8118A180B80900188104000060140064461060040860100860060162000A000600E00602632620600642612E246410004006 016006000000000000000000000000FF5D8A00000000020140134928820044924140520100009148A500480514C805004100 8000008908008008108008408008008008008008008008A090C800800CC0000000000000000000000000FFD2050000000000 0080080480490080480C84880080000020020020920020020020500020020022000001020120120020020020020020020020 0000200200200A000000000000000000000000FF09180000000004AA0AA50006002A0D04800900AA00013202482A8230310200d66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (081080044C40 00000000000000000000000000FF1B3D00000000000280080880C8A088800080000980000A248200220009000200201800A0 0211A140001222942E828828829423A220A04210225015240211A052000000000000000000000000FF2085400C0000040044 040042000450040040041000016116010810050010010092600010A008100100000110800000000000140000020009102110 4000000000000000000000000000000000FF07FA400400024400D00C00C40800C00C00C00C00904114310308300300B00300 B30000B4B21030130002230022820820020131420924020830C300A002522002000000000000000000000000FF793A00000000366040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000601006 400000011600609E3FE01E206112006206066000402184014004408000000000000000000000FF630F000000000001803801 809085801148001003914021640804E20401401000E000006000214000000406206086206006206002006404006450000020 080004010000000000000000000000FF5FB700080000000000400801010188001002014200A05081300102300402C0130000 0880102002004A0288200000000000000208000008000400200048000000200000000000000000000000FFC9EF0000000440 200C00000010038020080001010A2001001000004000800010010010620C0004080C0000100000020220408000140148448100b66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018818310 09821002801109800004600C14608400400200E00052680600680040842600E00E02E2AE0060060D61440B68210862C60000 06000000000000000000000000FF07B300000000000180184580588180182103382380000960C200E42000600412600000E4 AE52800002011644644640600610600200400E00420045200C2A4094000000000000000000000000FFE57600000000000180 180980383000380104988100000A60C20060400063440460081160040843403410071272070070070A64020060360860000A A20800602C000000000000000000000000FF2F7600080000000180180186182A1630A00090418E000260006261946440081000766040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (604848055400 0000000000000000000000FF1AC30000AA0000AB8AB8218818238890A088B2A380002C62202472122AC2AE2260004860A610 3040A002064061060160068862AE0840960A425022E024204286000000000000000000000000FF444E4000000000018018B3 80108802300882B04B8000086020026AAA0040060060000070260020000880069061060361060A60064840040C4008006206 006006000000000000000000000000FFE46F0000AA0000AB8AB80D8811220CF088881201800021630430600C2AC2AA306000 0060060460201D00461D608618604622E2AE61660621600800640400C226000000000000000000000000FFBB84200000000000f66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106006002000 00800E0860868860860060044840062840000062C4004006000000000000000000000000FF60BC0002AA0000AB8AB8098AB0 2A08988188180380002062A63060222AE2AA2AE0002362362AF000A80017C260664068064862AC0262AE0170412AE1060582 AE000000000000000000000000FFEC12000A00000001801891855011801012041009800000600801612000400201600004E4 0C21200000088F00742EC2730E45600402404640400010609412C04C000000000000000000000000FFDE4500015400015595 5801955844111144101281800045649041700455455255600052650455601444054603621608643601655402E55420610055000e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180980000 180180380180000060060060220560060060000062160020040000164160964060061060060140C610401000625601600600 0000000000000000000000FFA49F00000000000180180194589182B8290298AB80000060AE00601610608E00600000614611 22800002A602642604E44E44E0864A40064241202C6104324094000000000000000000000000FFFF82000000000001801821 80190000180B04982180000360160CE88E00600600600000E08E0028080212A6216A0E25642EA360060140060340B0006008 2A6004000000000000000000000000FF3E68000000000001801905801801823841805B118000086006006202006002006000008e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20C2AC000000 000000000000000000FF4EDF0000000001559559558418CC11591390381180005564565564C640E556556007556110546506 0025560160160560565564CE4540485040D0046156496526000000000000000000000000FF8F258000000000018018018019 01801841801801800000608600600E00614600600600600040E0000020060060060060060061060040040040800160061060 04000000000000000000000000FF2A180000000000AB8AB8AB91582388188388180180002AE2062AE2822062262AE0002AE4 0622206000000618600608608600622E00470E04C20001E004004236000000000000000000000000FFE53B00000000000180004e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (508860100020 1649608640600610601600600200600800C254016006000000000000000000000000FF116C0000000000AB8AB8AB8AA0238A B8900AB8AB80002AE2062AE00E2AC2862AE0072AE20004E0000020065061464861860062262AC2AC2AC0202245040462AC00 0000000000000000000000FFA7BB00080000000180180180180002102183112380000060860060160A600600600600604000 E0000020062464A630648600600610400400C400286206024000000000000000000000000000FF05B40000000000AB8AB8AB 8AB82B8AB0838AB0AB80002AE22E2AE2A62AE20E2AE0062AE2A81062880022CE04E40E12E42E2AE22E2AC2AC2AC4502A602E00ce6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880001962801 800C010100046206404206006801006008886A8090000002200E64700624E2060074065047D442400008E206007004000000 000000000000000000FFBF28000400000601A0180591000000A000000001800028640401404610400088E208447001026005 002006006C060064460078B60260020C600001500D004000000000000000000000000000FF4C050008000000018018018001 0180002400000180000060160044C60040100060008071002262800022C602642E04E44E44E0860040040044840840843250 04000000000000000000000000FFE89E000000000001801801800010001810001C0180000060C60060060050260060060060002e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 00000000000000FFA7C380000800000190180194011181080014288D008021640E2AC1560AE10000624000E1004021010022 0624611610600600700E00600A20608012C44C406136100100000000000000000000FF900C80040000022180380181000408 880C000801008053600648408E0471200062802268015020000020060462060C602600E04E3160560960A802500500600400 0000000000000000000000FFEEE0800000040041E05801800042000813800801000001608610448F8270C000610188652020 800002200E00600630E00E08E00600C00000C128326406006006000000000000000000000000FF4D6A800800100581C0190100ae6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (641000400E02 610610620E00600E00600200608008022C2040C8080080000000000000000000FFDDAF000000000001081801905890002050 102009820008648E0041021560C040E40000E00000612021424610603602600600620610600608E000400104104004000000 000000000000000000FFAAEC0000000000010018018018040630A980114183000860C604624000602600E006806000002028 20800E40602600600600600600601248E618052086004000000000000000000000000000FF9F910000001400010019058038 4388100180102188200261260160401060063160060062600F820000002608600602621E1067060C40044040006020160840006e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (328A08800C08 8880002AA5622C02042202122AA2422AA00040218222C0024821424821820022AA0020020022083122422020020000000000 00000000000000FF20E500000000002000000000010980002A04004400000001080400280100000000480060003140001000 10410090400000100000100010080000048000040054000000000000000000000000FF032C80000000000000000000400180 C00000A00000000004000081000801280000818000000202400002C00204200482484280004484A02280401000C809048000 0000000000000000000000FFA329000008000001001801821801890100020003904044E00651440A0060000060210062C02B00ee6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF252F800000000355F5595591194590511390D1558001D56556D5654E55643555640C55600150621045655601 60160560565565565560565562204CC556D57156000000000000000000000000FF61960000000000C88AA8AA8CA822888880 88ACAA80002AA00220A22A2AA2A2AAA202AAA0000820002A22CA04A40A12A22A2AA2AA2AA28A20A0202232823224AA000000 000000000000000000FFBB360080000000000002004440000280200000000000000000000000000080000080001000040080 0800002404A0300480000000000280000010004000000400000000000000000000000000FF825600000000008E0AA8AA8A88001e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0002A0020420 048448428000000210000030100000000480000000000000000000000000FF82A80000000000000000000001000100000000 0000000000000001100000100000000000009300000300104100904000001000000000A00000000000000008500000000000 00000000000000FF6C599000000000AA8AACAA8A883A8808A08C08AA80002AA2AA2AA2222AA2022AA24BAAA0002120802820 02182002082082003AAA2AA0022AA20022A2AA2AA002000000000000000000000000FF4B2280080000040140140140010002 304D001400000100401108410400400480409480100004844001400008000000000000000400004012020800501101000000009e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080084084080 80A0220200228308210308000200000240200000000802220240A80200208280280280200080200280200200000000000000 0000000000FF3EA200008000000000000002000000868208A6121400020088440000C50000C00200020000080200000000C0 0100000000000040800800000000400000000000000000000000000000000000FF47D50100000000000000A0000000004148 04050400000D9100008000000000000400050000031000000010800000000000000800010228220800000040000000000000 000000000000000000FFCCAD10800000000040020000200004401202C0000001000000000000000120800120000000000210005e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF6B8C010000002000800800980812A2084AB42840822041266266AA22602062001182010002802000000010002003 80200200200200200280306000305B01A01A000000000000000000000000FFC4070001100500018018B18218018098030350 090B0149700E2268042AE1063000040200064A6000000010A474864160060060460062262270010060060060060000000000 00000000000000FF060B0000000000AA0010000010282001113810650080244D04014D0400420C0004040000008004000000 00080800801000001100000010000200400205004000000000000000000000000000FF94D40000080280008008108008008000de6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000002000000000000000000000000000000000000FF874100000000000100000100000180000000040000 0000100000000000000000000000000480500080000080000400500400400000000000080080080100080000000000000000 0000000000FFDEB4000000000000800800800220804A82C00882044002210100C04000000200020200000200200000000010 2002802002002002002002002000002402002002000000000000000000000000FF73AC0000000040B4000000000204040210 2040010100000004801404000210001000020000808000800000000000000800000000008000000400800000000800000000003e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (389011800004 648284619E00600600000400000600640000004000680204240200240203E006806800004006906006000000000000000000 000000FFD025000000000000801B0580520002181200008000000070C220400688C10614008002009714E0000000000C604F 30612714701288680608E2A8012026006004000000000000000000000000FF0DF402000000008180180100110180580004A0 00000050E00200C4060040464000000000064060000100002061060060064060020265564060004800060060040000000000 00000000000000FF7D6E0000000000000000000000018000000000000000000000000000000000000000000000000000000000be6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFA19C020000000040901801021048510080C00C2582804062120120848040060082000302061460000002000060C02000 0209280620E006286532217007006004000000000000000000000000FFB40A020000000100801805401081802000C0291180 01296022A3680410C1262200800201060162000000200860AA2022C20C200610600609635030C02608600400000000000000 0000000000FF650A0000000000008018818118018618191615118001036B424462461060460C010600014EEA600040904022 40028A2450E0020A0063EE216000002116106406000000000000000000000000FF2DDA000000200001801801A03800001803007e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500E01620600 614D009131001412016807806004000000000000000000000000FF6170020000000021801801821050100000002130000004 6806404100014006010100008426086000000010046006046086006004400000001888000006006084000000000000000000 000000FFDA8C00000000000080786380180384612090AA0181214A70421C224400E246800802180006046002800008024140 020080510006016846006400016006106086180000000000000000000000FFB757000000000000881803009E022100308488 03822108E28A01240408620702120202010620600120024000400020023000000600708630E02240408E006406000000000000fe6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3002000B6812 20400300700720000400000680630020008013412E0962460061060AE40E00620A0040960060060000000000000000000000 00FFE6EA000000000000E01821825201800005801E0180001560058020000A4806A0000700000642600021008000C4060C68 2600600400020002084000608E106004000000000000000000000000FF51D8000000000000801C01211004006401811C5180 0080701500230020400608080600000600650480804010634642681F40602474008070192100E64688600400000000000000 0000000000FFB821000000400021801C0100140982000020040002000064C7C00C002040060800000000060060000810000400016040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 20A6000000200002811801A01809801801981807800040E40220300200600600118E00000620200000088026402608748600 710602E006006010806006006006000000000000000000000000FFF57C0000000802408098018DB8040C18058038A0002122 754200010B9660060010060000074420041000410848064060064060168060469461080042C7806086000000000000000000 000000FF4DCC000000204440841831821841C53C1143101180000864D2042522316006080045050086042001310808804406 006206086086086286246080926026107806040000000000000000000000FFCA7F000000000200801841803A08201A01211000816040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006006006 006004004000006004006000000000000000000000000000FFEED10000000000018000010010018018018018018000006804 8070000060060068060000068000000000008070060060068060060060048050008068040060000000000000000000000000 00FF2C69000000100001800001801800025801A5182100001060840064812468060060060100060000040000000864060068 86006806886004404104086506086080040000000000000000000000FFCE680000000044258404498CD829891C11A03C9100 4002E034446050116806086034040106A20000310088A060461060061060060562840240000448270060000000000000000000416040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000086406660 4208202608618E0408060024000000008064064068069866A496C004004000006004006800000000000000000000000000FF 9622080000100081801004A01A00300500412801800004900B00F48220604610E85648831755201400010014F03614E42E00 E02C00400E08EA05004006006000000000000000000000000000FFA5C0000000002011801000801801802042080843800050 00820860020CE406206206000006002000100008406106006106406104014024004000106006006000000000000000000000 000000FF50A7000000000001800001001000001801801801800000600400600000600600600600000600000400000000600600c16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF2847 000000000041C00801A00800002040003801824108685208600000202610E08612820613424001000008E006096026840006 0260042A4828007006006000000000000000000000000000FF7B6F000000000041880809800E01880000103801800002690A 09EAA022A54624E44689828E0847080800C000E00E0AE28E24000F0C602C5CC4501064060060000000000000000000000000 00FF82810000000002018000000000000042402041058440110050D26B5248200E11690614044695204411000010E8065160 46406004004006006000806004006800000000000000000000000000FF0EAC0000000002019040120400118020A20602138000216040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0644A0020222 260260480A6C0400E400000000000000000000000000FFE600000000000601801001201001801801A00E0180000060028060 00005806006006000006006000000000006006006006000002002004804000006004006000000000000000000000000000FF AD4E100000104111805800C408118000001118518000D0014200E200002406006C46440006C56000800830546546C0604601 2006806006806400186006006000000800000000000000000000FFBE07000000000001801800800A00000000080885800000 808242615048230E02722680002700608108100000600740600640380700600600640000420600600000100000000000000000a16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020800028008 00800001800000902300004004400E02806402180102A00000004400980E0000120000000000000000000000000000FF86BA 02000008024180110220000D801911808881800000000004680400052E406206008006C0640000000000E026006006046002 00200620620000401400E200000000000000000000000000FF4A9E020000100021A8D28002424A351A01AAAAA38000801000 884040AC1157046B26408B064268000402808468A6906836806AA2C82886A86B00A06904A260280000000000000000000000 00FF8535000000000081A21013091100401955A00C01800034EC4A84ED0000C2060060020010061160C840000108E20E20F200616040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFE0DB0000 000042A05082000C026033C0041C020400000001001310000008100210402008409C4848030200800808980800808800BC0A 00800800800880800800000000000000000000000000FF9AED0000000000008E6888C3C802840840810902800000802608A4 26B0A00200240200000280A180000080002002002002002002402022022000302042002000000000000000000000000000FF E65900000000010000100040008180048A42002000014A144140001146020000002040020600002024000010010000816032 41400204C0180460400300200028000000000000000000000000FFA6F300000000040000005010200188002000205000013500e16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280A80280280 28408D2802802040000000000000000000000000FF137F00000000020120022C02530024021420440C0000804084AC801488 5004004900000800804800000000800808A00890890900910910908808C00800804808000000000000000000000000FF8F47 00000000400182584183100194380980982D800050E0C430600402440E4060862000160D4140000040106006506036126086 546206086010046016006000000000000000000000000000FF41C0000000000140C80D08A84C44C10D42D40C808000023C03 02BC0A303103003242001042203200450201023083023103013043003023243241503143102000000000000000000000000000116040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D08D50C00D50 800C50800D50D50810800800880A00890800D28CC0CD0C50CD0850C00D50D50420000000000000000000000000FFA9C80008 0020040000040040040000000041442000008010014910000000000000D10010015090010000010010491010090111011010 01101011011001001000000000000000000000000000FFBEFE0008000000AA0AA08008402208A2E00A806000002A82000402 202102A80008000002A82A80000000000002104402100002202202202200000002A82A8280000000000000000000000000FF 45FE000000000200A00A00A10A10A00800A00B00800000285280290282B003002452800802802810800800B2A9428D2822C400916040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (765700000000 001C6AA0AA0AA03248848008002000012A82200882A12A92A80002200002A82000000000002AA38220234220022022032022 00202402A82A82A8000000000000000000000000FF85320008000000000000A0000080004004020000000080000000000012 00000000800000000000000000002281400004A00000080000800000000C8000000088000000000000000000000000FFBFE1 0000000000C00AA0AA0AA0A20AA0B20A008A00002A82A80202A82A82A80002000002A80200100000002A82002482002C0228 2282282300404802A82A82A8000000000000000000000000FF14E400000040055435421234825435051030C30C0000550D5000516040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002482503000 003003002000000000000000000000000000FFE7D51000000018018218258098018819018319018140044056246026004006 28600608600600E0400062860060060061060060A640602E00E540006006006000000000000000000000000000FF97720000 0000140500020120020024424302A28500008048048408108048040041150008008008008000048008288208B08B09089009 00900808828800800800000000000000000000000000FF7191000000000920800800800908800810A0081080000021124020 0200200200200200200213201000200200200211200200200201201200A000102002002000000000000000000000000000FF00d16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005040001000 00108046010020004280400100040000200040200428508000000004000000000000000000000000000000FF7C7A0A000000 200082082010880288080213090700201220300020020122021020020120122420004020009A2C02B02AAA18208A50211200 26800AA402402010000000000000000000000000FF624F44080040040440040240000C40044C400424000120960D0A102140 1401201201000001001000001004040000400050000010000080001020151001000000000000000000000000000000FF5BEE 400000404C20C04C00C00808C30C10C00C40900140B10308300310300300320301202340300000300248210204220250200200316040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000804001001 9C192701184406B8C0007041844000808600201462040600600600400600401000002641645E606006106042002406006020 16605C004000010000000000000000000000FF0AB60000000010018030410C10098918020A908800800A000E002084006126 40E00E00400600408020000600600600602600600200200600644000C080504000000000000000000000000000FF80FB0008 0400008002208004803590004202005005200400002D01500003402100080400800001080000002080400080204080400004 20000100108120120020010000200000000000000000FF14520000000000240020000010018280C00081001080000080400000b16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (160160087142 8C2AC000000000000000000000000000FF125520000000180180480200100980000402080180000CA0840AC08E1040060060 0600200611680000080600620602E086106006006006106800006006004000000000000000000000000000FF78D700000000 1001821809033901841821813831800000404E40200600800600630E00400604450000000222E0CE40645602C10210A0CC24 C48014E044006000000000000000000000000000FF1DE7000000001081801801001800003881801803800000C10653204602 800608600604C08E02400000004708700709700620E0022820CE006100006200046028000000400000000000000000FF428400716040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (455655641700 65565564040020044060362060364164D44D4556556010556550554000000000000000000000000000FF25C10000000018AB 8AB89508B8A38A80AB0C5881800022222D20EAA622C2AE2AE0860022AE32E28000000321608610645612C236226104084500 0263042AE000000000000000000000000000FF53BD4000000018018028050010000000010138018000002005006046054006 0060C68020060061000010020B6286036286146006006004004280006006006000000000000000000000000000FF9DE90000 000018AB8898A008102208E088090AC78000212A04804A362242AE2AE0260022AEA060000000061C601649600660422E226200f16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018018218 03845901A00000891A01800010690E806C4E04E0060064460060040064800000000860860860861040040040040042100060 04004000000000000000000000000000FFF7890000000018AB8830B109102208C08C8018AA80002662262AE1862062AE2AE0 060062AD2A30040000040260261060262042242242AE2AF0842AC2AE2AC000000000000000000000000000FF077500080000 1801801821021011C00000001C0980000810820C2006104006006436006006006800002000006A2682688600610410C24444 4010006054004000000000000000000000000000FF2EFD00000000195593112114594C150150121D54800048954A552A0E5000096040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400008C20421 E000000000000000000000000000FF25C100000000180180D102121800041801823820800000608E02400612400600600610 6046006084040102096096016006004006016004504404246016146000000000000000000000000000FFCF7A000000003801 84082980B88980384B811901800013400601205640C00600600600608611620211000A42644644625612411610654C054088 006124006000000000000000000000000000FF40EC0000000018018080080118100458258258008000014006002006104006 00608E006006016804000002C1721723720E02C11610E004004000006000006000000000000000000000000000FF3914000000896040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A82A82262AE 48E4002A809020E10E22602E2AC22E22E2AC2AC3002AE0AC2AC004000000000000000000000000FFA79D0000001141558058 0C92284C15592990580900004564524064A61165565505504C6D2E4564065525504360364CE45600C4D64D64345245022461 56406006000000000000000000000000FFC88C80000000000188180180180100580182982580000560020560040260060000 00016006006000000040046046116006004106106004004008006004004004000000000000000000000000FF98F30000000E 98AB88180180182388988188180B80002062262942960442AE2AE2AE22E20E32600020022200600608608630C2262260040000496040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0201821C2080 080104000182880B800011600600600612600600000001400400620400242001609601700600400400400600608000601000 6000000000000000000000000000FFE81E0000000AA0AB8558498AB82308808188080180002263062062AE4062AE2A82A832 4AAC2461002A84001064060865862AC2242242AC2AC0082AE6042AC004000000000000000000000000FFB7E7000800000001 8A98C00101000018030498A380000860840A600620600600000000E00600608400200010630600608644400600610400C008 08E206120006000000000000000000000000FF0E730000000AA0AB8018950AB0AB0A98AB083891800028622E3062AE08E2AE00c96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006106006 000000000000000000000000FFEB2D800800180481C11C048008010218A48A30099000A26036006002006802500400046806 B0E0000040102A70469868C700400602E0040E4040106845404004000000000000000000000000FFFE73000000000401E058 00800801120000000003800044642600E0060070020400000840064120240020004468862062078862AC4040060062082040 01800000000000000000000000000000FF313800080000000191390280088900404A00214180008060D60B600640E8020000 000850068CE0800021104A6446C4645600610C114004004200007124004004000000000000000000000000FF44260000000000296040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005060060260 4000404002614648600600C01200200C084538404004024004000000000000000000000000FF1414800000000441A0190415 0081085810848093880000600608608211641214814004E08600E2C210601000632602628E04600644E0060061020CE21108 6140000100100000000000000000FF6EDD80000000000180380280C8010918008000019100016516056002106822CA020002 700610600000408800600600E22E8A4546406056006020086044504004000000000000000000000000FF4C6E800000000101 801800014001009940943009808000E08622600210604300000040700600600000614008600601608E02600604E02C10408000a96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (803900810843 001800004081820010600600E0A602E4800B00A002710601402080600004622610600E00600222A01600615000C400140120 000100080000000000000000FF2FB800010000000180180494481108D80800802D814000E006142406086020000000016006 04440010400800610E046486256002002006106000046114004004100000000000000000000000FF7CFC0000800000018038 008009010699E504182190A004E44600400600601400000000680600610000600000600E0060062060020020060060001040 86000006080000000000000000000000FF7C8200000000000181180080282B00180700380582000A622642C2260260A4000000696040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004802000000 00000000000000000000FFD8780000000000AA8AA8408248AA88D08088807080002AA0422007022AA2220000002202622520 008020001024020821C2202222222002002008402602102402000000000000000000000000FF1ED300000000000000013000 000100002800008300000000801280C80000000000000000060084000460000100900100001000100000004002A000801451 4004000000000000000000000000FF94DF80000000000000000208A001822004044008000000023000000000008800000010 99081201003100004A04404402500281001085500D0000340140020530000000000000000000000000FF5E0500000000004100e96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500000000100 00000400401100000001001000C0040110011080000100000000000000000000000000FF565E800000000555D5580D005055 95112915195500015565344A44465564448000005575560165015460004360364CE0165564CE4C65565562105570560570D6 000000000000000000000000FFF0C90000000000AA8AA88C8D08AA8A88C488280080002AA5022AA02A2AA2AA00000032A30A 2823002AA00020A10A22220A54A22A22A20A30A4400A302A42A02A000000000000000000000000FFA9AE0900000004000001 0028008000200200200100000000040040808011080010000048002A00010080000803000002A00000000080000000A0000200196040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4C04C0800420 2004200000008001504000080000D00000000008004485010080004A04404404500001101000000001300011400215300000 00000000000000000000FF0D4200000000000000010010000000001001000000000000000881000000000000000000000000 00000000010090010000000000000000000200000011510000000000000000000000000000FF26608000000000AA8AA84085 082A888882880EAA80002AA202032233AAA2020000002AA2AA0820002A20000020020820822AA22222A2AA2AA0002AA30300 2002000000000000000000000000FF26BB80080000040100100120100000101105108300000040140040010048050008000000996040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (011400000000 0000000000000000FF0E2C000008084802800800A00800804C00840C00800000200200300202200200000200002290200000 A04A08A122122002002002002402402800082012003003000000000000000000000000FFA6B0040000000008000000200002 00002000022804000A80000000000000000002801001000004000C0000000000000000000000000010000900000140800400 800000000000000000000000FFE3900100000000801022A00000000044820C20800000200018000000000980000001828000 00000200000000000010180000008000008008800A0000008090A8000000000000000000000000FF2B66090000000400400000596040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800800804008 000800080000000000000100000000000000800004000000000000000000000000FF180601000000088890088A800C008008 50D9E81000000080130128020021020000424880020020000020030020028020028020020020030030000020020621830000 00000000000000000000FFE9FB04001010591580180180180580504188102182000260060060040478040000861201461060 02046056006146146006006086006C0620608208680600F224000000000000000000000000FFDF5D0800800AB00100C54000 102008152C64511900007140300080040041040084252300010004001158081118008010008000000001901100100001500000d96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF917B000000000000001400000001000000200000000000000480000000000000000000080500480100 0000805004000000004000001000801000000800800000800000000000000000000000FF1CB3000080000080000800800000 A00A008210000000000002002802001006000006808002002002000002002002002802002002002002002002002002002802 000000000000000000000000FF6A761000000CD00901028A00044030200000000100002140200008040000018100000A080000396040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFE7C6000000001A11801A01881001B10A00001801000080400700621200600000000699800200600000E006 00208200620621A20600400602E04820408601E400000000000000000000000000FF709C0000000018058289104145518409 002141040000080206106106006004000106400806B260A004E00648710E486C074468070061062573103021070048000010 00000000000000000000FF7F96000000083801801840080001000840100000000000000624620630600C0200060000220060 00006026006206036046006206540006106000010004004000000000000000000000000000FF409B0000000000000000000000b96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (810060061081 01004046000206104086126000204017006404000000000000000000000000FF0911000000005001400A20200B45220932C0 18220000002306A0D09630640800048E52010200610801640401280200681400020600210400484040E004A55A04000A0000 0000000000000000FF4F48000000105005000950200A1104010091390400010820060A60862060100400064000420C602000 600608200A29600600200600000648624010C006004204000000000000000000000000FF0B61000000001A5982C90580B0B1 998820301811940011420620604A0C6100110086000002206080066024300300024024822006AA608404408004201600610000796040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008C00B04000 000000002605600604400200000700100332600400400E01600600404600F00008E00604600440E00E204004000000000000 000000000000FFD36F0000001018118218000508018009009001020001000006C06006005202008006100212006014004006 00620600608E00602000000600784002000642C005800400000000000000000000FF73F5000000085007024849829B519028 448638C1858030200707495614600600040600020A0068008564040002009840A40600260860040840000160068071040000 00000000000000000000FFCEA2000000001021200893801803652010803809880140848600400640710E10010E220082007000f96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF002C000000001801828801C01801820000B00009000100408682701620600400008600008A2072840040044CE0 16C5408401600608E11404520001600E006007000000000000000000000000FFA815000000401801800C0200081184180080 1800000001400680680E40500200008680000200420800400422610EA0C004086080006004004A4812600600C00600000000 0000000000000000FFE90A000000001BE1950860140809208C04803C70000100C10600618682400200000680011209610500 460C106086046124006018004514004020205804004806000000000000000000000000FFD43500000000380180180020080100056040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800E1040062C 610608E2B60060868058A6006006007005006806000000000000000000FF1DBB000020001A03848801AC18018098BB9C1803 0200A840C653700480600E00050601800201E8000040040070070A401400602600600400408C00600417F146540000000000 000000000000FFC155000008085801900805941829C00C05C00081000000404629E2060068860002060200220D6016004804 00608600402410610E0044040040101C4006417027800000000000000000000000FFC569000000455801820C558238818232 00851851004004402E0061064D7024010106101C93A0620400C00C10600620410C0963060061040040222070060861062A0000856040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018010000 0000060020060060000060060000000000040000060040060060060060060060060040000060060060060060040000000000 00000000FF9047000000000001800401801801801801801C0100010000060010060068000068068000008000050010060040 06006006006006006006004000006006006004007006000000000000000000FFB73E00000814A201810011B01900003A0180 1890000004000602440650600000600610004030080400000600490680604600600600600680400A28480600600600600400 0000000000000000FF8D84000020000203800223A038518498C5811844022030009600408405612800E806840290800A040000456040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF620B00000002000102200710102080909920080000000BC01602882E0069202060063880188810048002064C642600 60064066C405E206006804006806006004004006000000000000000000FF5D920280004CA001045001201040851205002802 100002402708C40602603054E0A60300401020444003060840A7007496006004006306004021104006006000006006000000 000000000000FFFCAB0000000000010010018010018019011008000040484506044056006000006006400000000406000006 004006406006086114106016014002006006006004006006000000000000000000FFD171000000000001800001801800001800c56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40400E006006 007006007004205020806006006004004006000000000000000000FF1E8A000000000001800801001A00805001A3180A0500 000016004086006100526246010050000D08110006006446C06B2E50600600620600E9100040060060078040060000000000 00000000FF2DEC000000000001800801C01A00821C01883812082000024600420602600808E4A60200200003202000C60040 862066CE08600E12648E01C110907006006004014006000000000000000000FFE43D00000000000100000180140080581105 09040540080516802D4F10E9505560D6410150102434D10006406456406116506004004024406220A000060060012240060000256040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (220000000000 060120B3506108404086008211416102000AC68AE22E00620624E8020244060060020C4A0680611611011600000000000000 0000FFA149000000000001A01001801800801801800000000000000600200200600000400600000080400200000600400600 6006006002004006004002002806807804000006000000000000000000FFBB4D050000114001801801101000001005001800 000040015610600E006100046006000000002000000006446406006006406046186824006A4038400600600122C006000000 000000000000FF2F65000000000001A01801001200401011000D010041881AC600442608F85000E09620210090202020104700a56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF3A3F02000018004000400205800000041004400000000000114982015002800010002200000000004000000A0000200200 000000228040058050280290080101000006000000000000000000FF7F9E0000000000119010011010109071411221200000 018406022026A2E00002680601008010600000012620602606610E5060020841140860000404060062900100060000000000 00000000FFAF89040000004401B092B1A81290AA3A9120833200008D0826D42C06056200856026AC0080846800200806A068 06CA6956806CA2C968A6A96920A12956D46A24A00806000000000000000000FF5DED000000480003843005849840A118419200656040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030230830C34 8300350302301108B403003892513012000000000000000000FFCA6B0000004003022902084842082C02000002410000C048 00844D808C00402040A4000800800810300C00800808880800A48E20800880A00980800800C0100800C00000000000000000 0000FF60F40000000000010008C0C00180800804080802800000202200200600210800800200200802200000029211A10200 20A200200241260200200010206A062002182002000000000000000000FFE80900000004200002B0310200600390A8218089 00001A40463000580010000010004CC64025C08100000040020040004002018010002000002003800020042460009E00000000e56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00008A0802A3 2A42802108002002802800A02C00800802852842912B028528028D280280AC008D2A428C2022802802000000000000000000 FFD2C80000002204432002080412253042010143250000C1480090490508C840004004000800908802808B48D00D08C40848 C009008008C0AC080AC00888810110004000000000000000000000FFB6610000000200119018498058C10838819018010000 0140560440A400602000680602640012E0000001162061062060264060062960560161400460564464060040060000000000 00000000FF4F29000000100520C0CC00B28C10C5082CE2AD40800130320231340A4A210100200340A02100300828120308B000156040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFA7 1000000015431435453031028C2443502A22400000C00D50100A00540540000550800D50910A00D40D00850900C808B0A90C 48910808C00C08900840CD0490000800000000000000000000FF994D00080000000040401041040040000044440200010090 000010000000110000010014090014010010010C104900100114108105100100104140900100081000100000000000000000 0000FF58AC0008000880880AA0820CE08010008A03011000000002A84001082302000002A80002A84200002A000050001000 00000C0328240248050020400000200200000000000000000000000000FF5476000000004400A00A20A00A08A48A40B00A0800956040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200211200A10 A002002000042002002092002002000000000000000000FFD6610000004AA0AA0102A20EE0AA01048002008000002002A92A 8200AA92400002A80000002A80002A82AA2002022AA2AA2022300202A82A81200002AA2ABB21000000000000000000000000 FFE8BC0008000000200000040000200080040000020000128001048051000008000000000000020000008048000240030400 000000200300100020028290001021000000000000000000000000FF4B390000000AA0AA0A02C40800AA0A20D20880D00000 2C02A82A82C8AA82800002A80000A02A80002A82A82082802A82A82082202802A82A80100A02A82A8220000000000000000000556040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000043003003 003001001001002142083001402202402402202542002102142082023000002002003003002002000000000000000000FF16 D81000000000138219498019250958458A5801010030E20E4A400601600000802042600E0160000060AE0060460860060164 2641624620E230006026046004104006000000000000000000FF599C0000002000014CC0092012012C820020C20500008848 00804804004848800000800A48800800800800940928800800820900A00800800910D1080080000480480000000000000000 0000FF58B400000000000080080080080080482C900850000004A0020021520020800000000021020024000020020120020000d56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF43FE00 004000A01002008401203203102001400500801000260400000080000900400400840000004040A00044202802800000804D 0040008050000040020000010006000000000000000000FFCAEA080000020023000868800080800846820885800000C20A28 201400000000000060200201A410012902302812902C1AC8A202012002102400403403402186042402400000000000000000 FFB2EC40080040040040A4005804004824004805000021200001005001001001101001198028081001000208000000060030 100020000280221200000000001101094000000000000000000000FF02F340004044A440C12C02C0CC08C40C00C10C02804100356040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00600E00E006 00650008720700608002000E200000000000000000FF3CF30009000000219818018C70E290D9818010A00B60240106222046 02C22825000000603E0160002A601600609610641640618618602E04609040200618E000010002000000000000000000FFDE CC00000000000180102180100C8410458010000C000800361020961541000800000060260C61001461062A60060060260060 06006056086000000006416000000402000000000000000000FF12F60009000000000200000400100A200002000001001200 C808052008008015000004008012008000000824004000802000000800000002000A0800000000000100160000000000000000b56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE030C062AC0 00200AA809C0060060020066A648241618606641622648402410602804418631E0042042AA000000000000000000FFC1C620 00000000010409018080480010008058000000002006C0222600400004000044400610680080601601208641640E08601622 6006106C000A6006006CC4844002000000000000000000FF389100000000002180383384500489384B841000000000400608 E10C00600011000000600624E00000600642024E04610645610601450C254000416236126008090006000000000000000000 FFD9470000000000418218018811008098018410C4000020400642620400642840000022610400621040F00600312700F00700756040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFB26A000000 0001559111559550C495595581300200004085565024C6555001550D5055600644E0048062C65565260A604E406456556556 55600035651651684CC54556000000000000000000FF3FDA0000000000A90A98C98A30208018A58ABCAA00012AA2AF00108E 2AC0002A0AA82040060A500000710E02010724E28604622E04C48C20C24008222E006D24A4C2AE000000000000000000FFC0 254000000000010028018010108010018A1C4800018A000702900600480080000000400600600000600600000E40E2860AE0 060060060040C8002046046504104006000000000000000000FF97A700000020028F28D8058900800250808892AA00002AA200f56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100040040041 4055654654680E886006000000000000000000FF1F17000000200201811801801905801801A812000000C0400612C8060060 000008000060060068000060860061068868860060060040040040080068168164C6016006000000000000000000FF622400 00004004ABCC30AB8AB0088AB0AB80310200000842AE2042162AE8002A82A82AE0063270000060162AE02600600608E3262A C2AC2AF0000040060060062262AE000000000000000000FF3E9A000800200201801801801114949011A0100100000000064A 00460050000080010C600641600000604611704600700E906086086026024008217007446014104006000000000000000000000d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (421620600000 00002360060840002AE0064860460260660863200440440C45000040060062262862AE000000000000000000FF21F5000000 000005905001942000045800081800000004C006000026046000000000016346204484006086056296086006006000004514 00400000E01600E10E04E006000000000000000000FFB3CB00000000000184080180188D901803043801000000400628C096 10E00000000010600E02E02000644E40604640E28E4561082D40444542B0326546546006006006000000000000000000FF40 E300000000000182000180004000180004995100000540068020D600600000000080600610E000006A56006A1625624F2261008d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F50000000018 AA0018AB8CD8498AB8818AB851000028C2AE0B42AE2AE0020060002AE2AE2AC3002AE00E20400E20E40E32E22E2AE2AE2AC0 082062C62C62AE22E2AE000000000000000000FF2E9100000000191414B95584580380C1318859550000044D565205464960 020040004C605624444455603602C216436416456446416514404040006506506436496556000000000000000000FF4C2480 0000001800141801801805801803801885000000400600400600600200600000600600401000604605442604602600608600 6006004100056006006006106006000000000000000000FFCF9E0000000000A98098AB8099219098A90098AA00002842AE02004d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600425608 654654600410C026000000000000000000FFB256000000001800009000801D45000809000021000005400604C00200600000 680000600600648000600681429600600600600000000400608001601600E116006006000000000000000000FF246F000000 0018AA0350AA8239018AB8710AA0030000244AAE4042AA2AE0000060002AE2AE2AC0002AE5063841061061260862202A82AE 2AC44032601601622622628E000000000000000000FF92900008000018200018018890298200038318010000494006012006 02600200400000628609410000628608408608608610600E08600608C0084AE04E04E106026006000000000000000000FF9200cd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106004007100 04600701400804650640604630608E026006006214084008106406006004014006000000000000000000FFFE2D8008000031 88483883801C2590A80182188005200B308E4000260060040474180269648040000262072048160064468164064760066140 0008620610622C004006000000000000000000FFF9A3000000003810141482801821C0A881020405800000180E0020070060 0000600100600E006004006006006206006006286010080080026000004006207454004006000000000000000000FFAC0F00 0800001800503000911011000903000111800008000650000200600000600000680680400A00654E04704652E48F45611000002d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000180008 180300300182288180800302202072260160062860A600620808611E00408000000608400610E0860A622611611209421000 4226206000000006000000000000000000FF3968800000001000001C0092182348002104194980000A008600220600620420 6100406006A060082860C640620612601600600640600420E05030E00600E084004100108000000000000000FF056C880000 001000021800821813120103002204028081080648000688600402728080600600E0100060860042362062D62B6416206406 126000006006506804014000000000000000000000FFF01D880000001000605801841009040805803900804114010609004600ad6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (548400320540 540120020026000000000000000000FFF9B10000000018001018001030050028090000038420401446012006486046006480 02200E20210900002620620602E0060064062060001060C0084006416100020100080000000000000000FF65FB0000000018 000059440418919109410A2031910014808C1025360165160460404800260060004100060260060860961460260161060160 000064C6086000000000000000000000000000FF050B0000000018000038A10010C9848809892101888000E00E08E0AE00E0 0E42603002602600600010810612600600600600600600E080406490414086086060020006010000000000000000FFAB8A00006d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 004C0289080280000080080480080000008408000440000048048084000000000000000000000000FFF1B60000000A900008 C0AE008812820884140800800048101242E2AA2AA2282AA00005E2724125C133A5020021021221020A222222210210202000 A01201220228628A000000000000000000FFDECD000000000000002000023001000002080044000000000640000400000000 600004000C288000006000500290000000000010010140000008000010008008008006000000000000000000FF6FED800000 0020000400001000C811203005211000002294B00800000001000060003001000402400805480300405084A841010010020800ed6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000021441 04408440D001000480000004D000044000004014000000004C000C0001000040900420040020040080080020020040010000 000104104000000000000000000000FFC2EE800000155800155925D55D558131558058A3800052FD563042CF556554556000 55455600E00144E036556216436016436456446026556008556506506454554556000000000000000000FF74280000000CA8 00088C888908208C08A880A82A80001002C20922AA2AA2A22AA00028308200200022200B22A00A20A40A30A22A22A20A20A2 102A22C22C222A22A2AA000000000000000000FF43060880000000000010080000004800000A840000000040000100000000001d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000008004 28000000000000000000000000FFFF0A01000000000000000440040004800015211000000800005201408000000000000280 000002110084480000404284A8530108110500000208000540540100088040000000000000000000FF670500000000000000 0030000000104000000024000000080000800800000800000010100015000000008000029008000000000000000800002000 0010008010000000000000000000000000FF09978800000AA8000AA8808AA8AA8408AA800810800022A2AA043A022AA2A22A A0002032AA2020802A20022AA0420020420023223221222AA0002AA00200222222228A000000000000000000FF372C800800009d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001587000412 0000000040A008000000000000008002982B0800800124004010000800000000000000000000FFF4B2000000000080904900 8028128A0C00D008C88000102202002802A8200200224250000208200040200000200201230A00200A00280200200000302A 002002002002000000000000000000FF4DDB0000400000220000040800200002020080020041020088048020040000000000 020000000082000020000000000000000000000010000880000880000000000000000000000000000000FF51260000080001 0400020034000010A08010200000004581200407801008810000080080000100000000000000000000000000000000200A80005d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002043000100 0020120021024001004001400140000000000010008400008408000000004000000000000000000002882C00000000240008 00000000000000000000000000FF1C1D000020050204802880C489A081881A90C8208081092002842D029228020030020000 02002000002000802802002002002002002803003000803003802402003802000000000000000000FF88A000005000012388 3881C0303594B083C8B92B802010E48E02400442688400644450000600608040600080600601651600601700604612608020 602E006026806006000000000000000000FF8B2700200002820100040510100060100102260B000104406081C5441040040000dd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600200600400 4000000000000000000000FFD638000000000000000000000000000000000000000000000000000000000000600000000000 0000000000000000000000000000000000000000000000000000000006000000000000000000FFD61A000000000000001000 2000014002000000000000800000000000001000006000800000804800004000800004004004004000000000800800000800 001004004806000000000000000000FFCEA1000000000080A00A00080820880802240A128000120002002002040004802006 00000200A000002000002002002002002002002002002000002000804002802002000000000000000000FF79B30040400000003d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000A6000008 00350080490A830220400006006006386808085000006006006006000000000000000000FF65B60000000000218118010010 09000985A80A0B800000600E80620000004680600088000602000000220000600280200A0028060268860061000060104060 06006006000000000000000000FFB2B0010000000041882A14014211800A010409158000C5400E422A400440860000081001 461402A01023110174A654E00E4B6246A0E086106820926222086104006800000000000000000000FF40D300000000008180 18000A000102280108880180000040260020000040060800420000060000100020004060160062260060060260064164100000bd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2C83800E0900 96018018B180014472042A000600600608608620880620004100252000409000800002000604600E08700100610600600600 4006000000000000000000FF24A1000000000041840A0C880811821011002001800002420454882200400690001621001621 00200020200360000020020220A680680E016400804102006406006800000000000000000000FF6962000000000001808804 892801805C03029201800000C00602200200400610004F00000608032008309040E3423120022AB44641600600E2C004744A D06102006000000000000000000000FFB099008000404081882809025001120841A108918040A260362061200258A6006100007d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (044124006006 000000000000000000FF2974000000420021B01810810401000101084C81880000C28500050600600E006004000206040000 10200000408602600E086096006408006000046040814044004006000000000000000000FF7BC1000000000201A21C088880 03800801000801800000400E802806806006006026000C8600000600200000E0062060260060060060000062002060000058 00006006000000000000000000FF529601800000444180288180C9839491D1875CA18040A1E80501114681E0060060360002 960100189820181C4008380020418146026006017000A04006006406006006000000000000000000FF52610000000000018000fd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (163100000020 4008D826406286427B01008006004020144203804002006006000000000000000000FFF554000000420001904811C0342100 8905901881882020700604B0030840100060040000060002080060802040060060A600E0088802064B4000044A420AD00200 6006000000000000000000FF0961000000000603800800803A41A01041400E11800002400582C00608600200628400000E01 030000200010440E00600640E00648610004E43000400A084004006006000000000000000000FFEBF3000040000021874A04 80980181123D0708098040C0401C00428607E80200600400080662809008270049628612614F287087006040506B8801440200036040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (845C51A03809 B2B953A00000E840884806886006006086800C0E00800000684008E026206504040206008000004040805002006004006006 000000000000000000FFAC65000000002011800A93D83801801781801883800080E824084686087804606084000006040000 00200000401E006006006000000006004800004860004086004006000000000000000000FF482B00004002000D810A05801A 0180902183FA2180000565040010060060040065040214160200040020000340169860060860204009568040400148100051 06006006000000000000000000FF5B9B000000408101800849C41051A0400DD018118080106404044003014008006004010200836040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060000 00000000000000FF38A700000000180180180180180100080080180180000040000020060060040060060000060000000060 00006006006004000006000000004000004002004006004006000000000000000000FFA50C000000001801801801C0180140 0800A01801800000400080000680700600600680100600000000600000600700600480000680080080400080400200600600 6006000000000000000000FFE81E0000000318818018C3801801811A25801C01A080106C0002510600E00C00600603000628 0004006800026006086004280946000000004000124402004086004006000000000000000000FFF5BE000000003801801C0100436040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030400608000 6006006106000946006006806000006002007006006006000000000000000000FFA314000000001805878B0F97E8141B00C2 8700E180000240000000025048140060A6A28812C00000086000006C06406C5E02061E056066016000006002006004006006 000000000000000000FFED9C008000001801800801C00801C4121000450D8C808CE009424D06036444B4E8CE410002108000 14613104601610E004221086206006824880005002006006006006000000000000000000FF58CE0000000018018008118008 41801103100001800000604000C0060061060060060C0402000000006000206006006004100006006006404000004002006000c36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20C010008003 4000010060040C42030970068000360202560002010060000060070060040000068070070042000050240060060060000000 00000000000000FF8B94000000001001801901C0180088980894580A01208C684D0048B22048330270060010060001000060 808060060060860000A6006006006022006006007004006006000000000000000000FFCF9D000000001001801A01C8180080 1C20889A0A0A8008E82427C68232C2AA2EE00E0C020E2800000060A022700E08E02408088602E00622C4C000405600700600 6006000000000000000000FF72CD000000001801800B0180082029008894434B8140127050B02152214036006856000C528000236040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6A8000000000 0000000000FF2192000000001881901001801001322804808085000080E128C0212629430F006C950408A208020044400000 E2062070060800441262860070000274540860A6096006000000000000000000FFD187000000001801801001801401000A00 8000010000006000002806004006006004000002000000004000006006006004000004806006004000004004006006006006 000000000000000000FF59B1010000001005800901C00854811290805800000000701020F003107006000006000006010000 846010006406C0640640080640680680600000680C007006006000000000000000000000FF5E1F000000001601E00A01800C00a36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108000080000 1080004805204A001010021250000094640418E106000000000000000000FFEFF20000003000002440242224540440640001 0400004100305209000801000061102001C02804000100000100004400080000001001800804020002084863200462860000 00000000000000FF13C500000000190180220380000808008080000980000066000CA2806248024004040202061000004E42 0000602602608600000400624645E00006604400600C006000000000000000000000FFB708000000001C1182A0D58D220A21 0350B422510000946A0114A202824002800824400A0AA10808894400CA692692E916020C04A06826B16A80806884806C0E8000636040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (ACA0C10D0280 012030CB44220220300340B0020012230034010CA0010030032A34A200108320344333341344AC039030830C300200000000 0000000000FF5DD40000000412802A04900402025300022A0000000080080081080084080C810A00000400800800800400D6 8D00A80D40800A00800C00A00800811484000810800850000000000000000000FF803B000000400000A00440C90000808900 80280080001C200E00700280000000200C0100020020022020002022820020020200022020220020C0003032002082002002 000000000000000000FFE33D00000000404801810850C1000024081182A300000281C42004701082800060A010102C01E20800e36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF399E000000000A00A00A00C30A8AB00A04A008008000002A28C4210281291280288A000802802800803000902842 C52D52090802802812802842802052812042C02802000000000000000000FF222F0000000014012010432032410082492282 00000103090500C8148C4004800A24000000800820800000A20A80900800C409009088008108088A00840009008288400000 00000000000000FFFA5D000000001841805885801955321805081801800012E20408C14C12688600628E0888861160004064 0055650600600620020610610E00604008602C2262160060D6000000000000000000FFE0650000000C4D00828A30954800C000136040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002A82002803 002482A02A82282A80082A82A82A90302A82A8000000000000000000FFBDAD00000040035435431030428832034C31015400 00CB0800C50450CC0CC0D10C41000D50D50840D508008C0A80D08C20450D40D40CD0C508508A1550D51440810D5000000000 0000000000FFAC8B00000020040048000041040040A000454200000100100100080010900100100180100100100128000100 1149031000001011001101001041001801000C81001000000000000000000000FFB54C0000000000AA0AA08C080000022080 0820AA0000A801500802202102202A80100002A82A80002A80000080580400000002282202A03A00002082002A021818028800936040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (88C000800000 200220A08220A09200201200200200201008200200210201211209000A002002002010002042002012002042000000000000 000000FF2D400000000000AA0002900800AA0C00AA0002AA00002A82A80103510402502C82200002A82A80000000002AA20A 2022503002202202A02A80002A82002A88802A8288000000000000000000FFBBB000000000000000004005004200C0000424 0000000002001008800000080400800000000000000000002080000001080800100080000000002080000001002200000000 00000000000000FFB0250000000000AA0324A20A20AA0802AA0804AA00002A82A84C12002002802882A80002A82A8008028000536040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF66F2000000410C20C40C00D20C12D00C00C50C02800108B10113310308301240340300B0A31028000830020020821420 2231000A112022002888403003003002502002000000000000000000FFE34E00000002180D89581381182180188B8810218B 4042444600604604600601612C00400600E00000630608600620E10600030600620642600010611454600400600600000000 0000000000FFFC3F0000000014002C405225520021420022100100010048050C482C920840840904804800804800A4800480 0820920820020900910810800820800894800444800800000000000000000000FFBCE900000000080080880080080084080000d36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000020012008 000000001000028800000008E000106106000000000000000000FFE42200000000800000300008A0B00010910C1024048012 00000200800040040162500000040160000002800800003000002884000000C0440110280088526000286006000000000000 000000FF424700000002106288880A80090088886291080000602022A045405200240A00208220A002084100082002802D82 9224A20000C2092002002000102006002006002002000000000000000000FFED6F0000004004084204004245024104404094 0008010090050890210B90002010054050A1000000001004000000008618000008008318000000001061019180000000000000336040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018800004004 20210E00C500012006426006000B0009624710700720602608002600E006006C400860061040000860820000000000000000 00FFB2FF0000000018011A10A180984008F00980010506001002000064060440E40C000600401602100000621640646601E0 1E0000060060960271300060A6000000006000000000000000000000FF845800000000180100100102188410182115002100 A002841002E04628400810440600400604100000600600610610648600000600610604700000614601400000000400000000 0000000000FF729D0000000000000000000400420201000200C211000A801000048052800804E4002400080004001100284800b36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 41B20000002890AB8898AB8898A1A8C0852000010000002AAA08A01E2041D42C82240062AE2A80003268060661067C640400 03AE22E2AC01C020644A062AE0042A8288000000000000000000FF333700000000500180180080381580400310C015000000 2000C4250604C21002481480600600084000E00621644600620E000006006006106800026046002414006004000000000000 000000FFE2D10000000418010430018218000410498201218000534004002046084044006086006006000000084006086096 0560C400000610600424401011408E0000C0000026000000000000000000FF23FD0000000018410210A1809800049109800000736040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006036000016 016116006840016010006504006046000000000000000000FF602B00000055595591015510594A149943B221550000551310 52650655551251255300243255000C55700613608600655600055654E4D65560445565405525545505320000000000000000 00FF8C3A0000000CB0AB8CC8AB8A9895880089A800CB00000422AB1220862A420028F22C0062AF2A8020226006D0EA3600E0 840002262A62242A40080852A72AF02C2AE28E000000000000000000FFF0B200000000100180280080980180201100000100 0000204300A02E00482002300400600600000000600640621650E00600000600600600601000700E0020040000020000000000f36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000042849241 56004052002806006310800814006006216206246004000000108014004824004002002006000002000000000000000000FF B75100000020180183300180180180D8D5B05005800000681400600600010604600200202000000000600690688608600400 0006006004004008004800806806006006000000000000000000FF0E040000000AB8AB8C10AB0E1889C8180101108980002A E02420E2062ACA0228A2AA0021002A90042AE00602606E84E2AC0002AE2262A42AD0042AC2A82AA2AE2A82AA000000000000 000000FF988A000000401801800001805840031841055001000051100041642601500600608200200200080000E006006007000b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF4F96 0000000898A98880198AB8D38018918AA08D80002060042242AE0062A628E2362062402A80000062AE186006086044000220 22000400400000C2222AE3060CE28E000000000000000000FFC57000000000580584214500182181180B8000018000006404 00400615401604201611600000000405600601611604630400010011000410400404408200204E0200020000000000000000 00FF5B8600000004180180000080181012382180004580000B40D409400640400600608604615000000028600642644640E0 4C0000080004D424C000484012006106406046000000000000000000FF699A00000000180180000001384202180183004180008b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 8000C004004086000026000000000000000000000000FFEDD50000000AA0AB8C088D8AB8918CB8AB0090AB00002062103202 AE31600608C22622E2A02A80002AA2A810E0CE22E2AE0002A02A02A82AC0002AC2AE2AE22E2CE2AC000000000000000000FF E67300000011411591114595590010D84195510980004D650044455640654E55054243650AD500045525504363164D600E00 055055045054400454C44E550416510550000000000000000000FF3E4200000000000180580180180180180188100180000D 6100014006002156044106006010000000002000246406106006000010008000004000004006006006006004000000000000004b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000400400440 400E40400608C0160000000020000A644640E00600000600E006006000006002006894806024000000000000000000FF9C65 00000000000182103080000102080183020180000B00C40AC00615250204410E004007000005002000217116047006800106 10600600400400400A400006440004000000000000000000FFF6E50000000AA0AB8918408AA0C78888AB8440AB800020024C 2042AE04642648C2363242A42A80002AA2A80060060862AE00022E2262AE2AC0002AC2A20AE32608E28C0000000000000000 00FF14FA0000000400218240018018020218830010410000006028092006136002000006086003000004002000006046006300cb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFDA0C0000 00000081810C2180184100B800831608804040614802408C2540100040060431061400000820400460060062000100060060 8600E010006000011014000004000000000000000000FFC2480000000104C9C41905827A21041890801D00940015E4801040 0420C00000440618301700000108202003E80690EA10808106006016444488104280006824806004000000000000000000FF 94C40000020006098010008400011000C41000400080001000006004004082204006004A070000840060082862868560860A 0206456406006104006502040044400004000000000000000000FF7F1E000000000001C0D882800249002000102000000000002b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600602644 6000006086406020006184000000000000000000FFEBA8000000010021841801021803045811081871052000623008211400 410400C0860004068401280020081060A600E2B014000E006186484280104006010000000004000000000000000000FF4AAB 000010000401802C08800020020830840082808000109002A3262AE2080040260000870A0400012300016206006002140006 206006226030006010210804086204000000000000000000FFDC890000020000218098C28000000908229480808820340220 14000604200C404406022896080000002008206286146102000506456416054400004000046014200004000000000000000000ab6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (290080000000 0060000401512200000000002A0440408130000000008080480000480100006100006006000000000000000000FFCC5D0000 100000018030000000010008400C0020004000044024200410000001408600080700200000A11000E2060062460A00062061 2610650000600E006020100004000000000000000000FFAB760000000000418018020500431448880001000D000881081020 C442C5540040260001160A00000024000060D615608620000E006006006048006086010000006404000000000000000000FF 1AE800000000000180181300980109B8810018050A0008E0002124040040A000400600000E00045000200000600E0A600220006b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (169A00000000 000000A00000000800022840800000000080C40950000B10000000A000100100000020100010004000000000001000800000 0000000080000000000000000000000000000000FF48CF0000000000AA82888A0EE90008088090309080002202AA02220028 02A22AA2AA2428028020002AA0000020020820020002222222320320000422220AA2262AA2AA000000000000000000FF777B 000000000000104000000112048004088010000009000400005004801400400408C406116000004000010110040404000110 100008008000030010406008006004000000000000000000FF80DE000000000000000020000020004028040022000000000000eb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (22A2222AA000 2AA2220AA22208A0AA000000000000000000FFA16100000000000121204321000120844140D0430000044004154905095000 0000005090310000000010000404001000480000000000000400001000100000C4220000000000000000000000FF46140000 0000015592192D9258C195390312190B0000547414424556C074AE55740F54754F55600104E0004363164D75460005465465 565560005564563564D4536556000000000000000000FF7A650000000000AAAC0888C8082ACA288C820080800030A2AA2022 2A2222AA2AA2AA0022823320002AA00030A0CA22A2820002AA2AA2A228200020A2A22AA20A08A2AA000000000000000000FF001b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000008 20C30400800000000000040800000001000000000008020000400001000008000000000000000000000000FF1CAB00000000 020009200A03205403004000204800001284A00280005010202011000010110000002400002A044040891000000000008800 0000000010200110020400000000000000000000FFCAF4000000000000000000000080004014010004000000081000000004 0508000420810100000002810000010110040040000110100000000002000100000000400000000000000000000000FFCF74 0000000004AA8208A08908048808808A48C080002020002822AA00A0020AA00A2B22222AA000182000002002082212000222009b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01C010001081 01100116800100010155153900000008005558084500050000010000000440000040040404102C48000008000A0850880000 020480028218208000000000000000000000FFF2F3094094140840840800810800800C0CA04C400120800200002522229143 00000028220240200000B4832020CA20A21610200211000211200000A006842002002240000000000000000000FFAB040002 000000001086040000800102A00C808004000000000880000008000008000001100280020000008A0C000200400400018008 40000412000200800000000000000000000000000000FF8DD40002000020000000000A010004010015400A00000800002200005b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020020000020 02802002802000000000000000000000FF73CD00800000000400400000800000000020020000000000004008080000000008 00000000000000004801000001280000000000120000000000020100048208208000000000000000000000FF05E900000600 0922802800840800800C22844852800100080020020200100200006041240200200000200208300200280200280200000290 200041B002003003002000000000000000000000FF2F231001041438418C1803811901009833003043032108020000634600 0144000020D2648F40E00000F506C86146C1643612600611000615620800E006046006006440000000000000000000FF3C9400db6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000620000010 60A60060000060560161060B6026206406010006006400100006006084000030000000000000000000FF4803000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000006000006000000000000000000000FF02390000000000000000000000000014000000010000800000000804001000 001001004004000000000800004000000000004004000000000000005000006804006000000000000000000000FF944E0000 000008208008008008808408A2A88C0580000000000042020000020000000020020020000020060A28020020028020020000003b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04001801809A 29809941081901201020004080004008610208182380800031600E0460000168070002850A60262102020000062062104044 46220006200028000000000000000000FF34C8000000001801801A11A11A21201A0120100000000000201060020000420401 008860B6006000006E06022C4600628E002002008C06066000000106006086006000000000000000000000FFCB4E04000000 1C21811821822020101840100000000090805000202E10000601000042600602600244E00652600600748E14700600000740 E05280444EC4040E406000000000000000000000FFA7F800000000180180180180001000100004005000000000000000060000bb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600040404664 6006806000000000000000000000FF7E20000000101E21805801801CA0801000C0A801000100104100490000100E00000001 6047046080006006000006006006110000000106806008086406008805000000000000000000000000FFBD28000000081813 885C85A00000E01408900885000000000000A0000004120000100061060060810460A7882405006806002880000006886000 084006036006000000000000000000000000FF6FDB040000001C41801801824410801020940A100000108008000050000002 44008004600604600045602E5120270160060A2002001206016029086556000416006000000000000000000000FF8B1D0000007b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010909006206 1861044060C60064440A610E006806020507010054256086000106000000000000000000000000FF121B0002000018058018 0180000002D620000000020000800000000C00000600005100640600600080628601700682624E1060060400060000000049 07006004006000000000000000000000FF2C2C000200001813801901808000005800400000002000000005080C0002060000 00006086106004046046006226006006006106000006800004000806000806000000000000000000000000FFC65900000400 1821901C05809C00C6391090AD0500011988008260080010060600101066268860000161071000241861860806000000861000fb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (188590182180 18491418233094004000400010024104001016021000106306007001C06046086044006006C07106000040C0621000400600 6006007C00000000000000000000FFE898000040001801D01C41801801289C01001000200001042100C10400000E0480A080 600600608400620710608C2163460860060800000160240C8006001006000000000000000000000000FFBE9D0000000018C1 889A01800001881883A01C00000000020001008000000604000000400400F00000600610611431600620600608000E000000 504006006006006000000000000000000000FF64280000400118B980D84180001580309B971860020010014106000000085600076040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006800004 000028000000000000000000FF66DC0000C02D1131811A49801A01901A41885911280004681012600404100684E00054E200 4044022020460C482601600640640600080640024A106006007006006200000000000000000000FFC9AD0000000818058098 09801841A01A01C13800000000000088500000100400006082E00E00620001F00600600400F0060060060000000060200840 06047004006000000000000000000000FFBBE940000003182DE25801821815841841911AA808001201002040300200660080 002060062160044060478364C40060A7C26206000511006094006006821106000028000000000000000000FFAB3B2081420100876040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060002140 0001610608000608600E006016000000406000114006006004006000000000000000000000FFB07200000000000180180180 1801801001001801000000600000200400000600600000600000400400600600400600600600600600000600000400600600 0006000000000000000000000000FF89B7000000001001801801801801801801201801200000600100200600000600600080 6000004000007007005006006007006006001006800000006006006002006000000000000000000000FF50D0010002200001 D21A01821C09841A05801A2100002068004068A400003700600000611000400400200600408600692604610600002600010400476040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (811801801801 21182A104B120000A00010446934400D4E004440116250006116A4640F002916006D568168060000500062AE804806000002 000800000000000000000000FFB9350000000A00018238018891C320119A020AA80000800000002806000006004060006010 08700080E00648090600680642600600051800600008C006006006006800000000000000000000FFFBB00200005418058058 41885201041A01C2C8201400082410056054101356114408C4EC2010402612700604A4464260870D70060480000962068048 06000006000000000000000000000000FFDEC30000000010018A180184981510182388088A0000452000006504000006004000c76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000040060 00000000000000000000FFFB16000000001801E01E018050812018A2D008000000000000C8E4264004820060008860400040 0000640600600600600600600600004E006028005006806006000000000000000000000000FF4E2400000000001180980180 14018096108038AB800020400802609400802800643100E40808693102480E00C08E20754E00E08700000600650000E00600 0006000000000000000000000000FFD3A0000000001001801801805D01A21920C098418A0028420013EE2C09028A88E21842 E22810C0600A608703C2A66A608E086106028A0628E000016006806006006000000000000000000000FF48D500000020081300276040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60A0C3680082 6C94C16AC7086896C06836200886806800C04A86800A84886000000000000000000000FFA4D9000090005909901809801A01 8092052C8009000040E01000601400011408600140F2080060009060240C6006006A4614E2860000060C620004E806106036 026000000000000000000000FF86560000000012018018018018018010010000010000006000806004000806006000006000 004000006004804007806006006006000006806000006006000006000000000000000000000000FF8438040000000C079018 418450511018009058040000050010006904001041006000606000406000206007406006006006416017000906806400004000a76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400494020430 20000012000020010861C1000008000800003B00404001010000800000801001A00A00000001901300100180000867880760 00000000000000000000FFFEFC0000000426002080001000080082080A410000014000000200000001984000000003A82280 00000100008000400200300000000000000000000780006010086000000000000000000000FF6BBF00001010184380190D80 51411051941008080000150000046000000C2600600000E4000060000060041262060060060461C600000600600062400604 6026100000000000000000000000FF873B0000402C9825829C81AC9C95205928202AA40000800000A2EA400000248060008A00676040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620E00E00000 0000000000000000FF57AC000008704A54A22E22C14C12D00E8ACC0D48000009208943310200040320200011224140B00100 3003113103203A0330B08200108310B0090032531031030A2000000000000000000000FFD68C000028400404000280290090 20024240A2250000000000800E00000000004000804800800C00001220810900880C00C18820200800880A00800800800800 800000000000000000000000FF321A0000800A4828C608008208040008008508C0000000801010206C000800000001042000 0120000A200A68202200200A00221A000002002000002052102002002000000000000000000000FFCEEC000000008090484000e76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A80002A8AA8 0800002A82A80881400002A83A00020202A84A80200A8000000000000000000000FF2512000000000A00A00800A20A00B00C 00800A008000802800A0A802000412802000902800002A80802002852D0300280280284A8008028028808128028024128020 00000000000000000000FF131800000000000100100120822322A04503420100000040008A080C0000A40040008548D10008 00000000C04849004000C40C80000800810C00A80800C00880C00000000000000000000000FF226E00000002180180190192 194184582120B805800042600010644600088C00600002610000650080688620400608608604605600000E0060004161060400176040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40C00AA4820A 202200000000002402800002200000002A82A82A80002A82A82282A82A82A82202400002282300002882A80A82A828800000 0000000000000000FF457F00000055415415455410032030034C5523540000800800810C500002D0800000910910D50800D5 15508108C8D50D50A00800800CC0C50800D30D50950110D30000000000000000000000FFA628000C00600400000200440410 4000080104900001001001091050001101001001001001801001001001001000001001001101001101081001041001401801 020000000000000000000000FFBD700008000AA0AA0AA0AA0920880000882800AA00000000004002A000080000000020020000976040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00000000000 000000000000FF868A0000000008008008008108048008008408048000002002042002000102002000002002002280002002 05200200200204212A002002002080012002002002022000000000000000000000FF14430000000AA0AA4AA4AA0900840AA2 C068800000000000002802080002100000002A82A82A85022A82A83802AB2A82AA39A2120002A02A85000002AA2A82A80880 00000000000000000000FF089C00080000040040000044400A03400000000000000000001401000008000000004402400002 820000004A04000000000A8408000008000280000000001220000000000000000000000000FF197C0000000AA0AA0AA0AA0800576040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (090010050000 00000000008081008048641020000028781474000000000000000000000000FFBE98400400408C20C00C40C00C08C04C20C0 0C20100130250B00900201100B0820010030031530090034032020C304201251200301201211304800200200300200200000 0000000000000000FF8D910000200058098218018018A193110984100182C004600610600600004401610000E00E40600000 600608400630634600648608628600640000602E046004006000000000000000000000FF991A000200201201201201223248 2010530033490000800800814940000854804800801001004802800804804800804800800800804810800C02AA080080080400d76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080090008084 00200400401000000D0408288420000100400000006000408040000000080010000000100000000410406000016000000000 000000000000FFED4B0000000100400000000000810C20800000400000220200010004008004080080000010080000006400 480020C40200300000100520130410000000006008006000000000000000000000FF12E00000200029188608028008248008 0012081012A010A08208010200002A00800000240236A5000021020028821928AA802E024020020020005431020227021021 00400000000000000000FFBCC7400C005804004004244004084084284004010801090009005000001001004061009001001000376040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFA73100000000182180980180180114484382103100000860160060220000005060100102044062A00060860070 1610700700700E2060060065000A5006006286086080200000000000000000FFB75A00080000182184982180198182293312 0124028024600E16202E2004B00064880080040060220060064161CE0262263065860060060062A200441640C00421600000 0000000000000000FF7C630000000018898018418038030008010080000CC040602600008E4A812201612000008412600000 6006006006036226206006006006086020404086012004400000000000000000000000FF844B00080000000000000000400000b76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600608C00600 62062A630600600E016200006506400012000000000000000000000000FF3F5D2000000018AB8AB8AB91D8859000A10988C4 80003040042AA8100000142360002AE0061162808863A64461D62AE1661064160062AE2A64003664760AAC42088000000000 000000000000FFADB2000000049801801801801853880001000C22000004E006000448000304806000006006406800416806 01602600608E2AE22600600600690008610E404142006000000000000000000000FF73AF00000008380180180194380104A8 15845011000010600600610200005210E0000000040AE0000460162C441600620600608E006006016200014206000416240000776040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (410002080000 050005001504000106084000006006406D001270060048060068060469460061100968000050060060064060000000000000 00000000FFED6A40000010595595595595595595490310414C00004CE007429404000546554000556006556284C075564464 0E5560B600E04E0064C0446104554056151246330000000000000000000000FF70080000000A58AB8AB8AB8218B182C88B8A 488180002040042AA0400002262260002AE80602600021622E0944062AE2174160060062262260802160862AE08A0AE00000 0000000000000000FF4AA700000002980180180180180100082980080180000040048800D000000F0060008060060060000A00f76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFA9D90000000C1801801801801801000041821435000003600648400400001600600000600600680401480608141600 7236286206006006000A04004AA60004C6000000000000000000000000FFF55F00000000D80180180180180180180B08D800 00001000040048000000860040000060060060000C6006004086006086806156006008006100006016406014046000000000 000000000000FFFBDB0000000018AB8AB8AB8AB8AB8AA881051C80000020000482C2A80002262AC0012AE8062AF2862162AE 22E1662AE00602E8060062A03AF0062AE0060A8104288000000000000000000000FF39070008000118018018018018010008000f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006206006026 006116006000006000004006004004004000000000000000000000FFF0B30000000AB8AB8AB8AB8AB8038418B18A58490000 30400440422000000622E0002262262AE0002AE2AE1004062AE0C600608E2AE2262200003C60064AE20608E0000000000000 00000000FF5E470000000018018018018018018000038018A300000440342541000005061060000060160060040040064400 160060260D600600600600000400601600004E400000000000000000000000FFD1810000000018018018018019298CD80980 B001000008C28408401400003600600009610600600000600610852600641620624600608E0900000544A620610604600000008f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (189500000040 0410600400028E10E00600E0060060000000022360260064861060060060080060000160460000B402000000000000000000 0000FF9A410000008AB0AB0AB8AB8AA8AB8098AB09588100002862AE2862860002262AE0062A62AE2AE0002AE2AA2AE10E2A E40E22E2262AE2A82AE0002AC2CE2AC2AC2CC000000000000000000000FF7679000000954154155955955128100101931801 000025453404E5540000464460065465565560045505500060965560164564CE556540556004406516150404510000000000 000000000000FF3DBD8000008010010018018018018458018218510000056006016054000006006006016006006000006000004f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF802E000800000A0080180180100114100002900A000032E006082126000016004004906006806000006000086427006456 486446006086080000004526405094404000000000000000000000FF67D5000000801001001C01801001415001801C400000 00600604300400000600400400F0060060008000008160960070060560060060160100000008160040040240000000000000 00000000FF4ED00000008AB0AB0AB8AB8AB8AB9018AB88388400000062AE24A20C0003B62AC0042262AE2AE0002AE2A82260 462AE18610608E2AE2262200002AC0060AC22408C000000000000000000000FF141D0008008000000018018000040120230000cf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0600E0AE0060 0600E49608E04020400E084226004000000000000000000000FF7571800001100800901801900031431020895021000020E2 4708600001000601629600C0260060C000008200000700621600640600600604642040601615440600400000000000000000 0000FF7F8F800881C89281401C8D80110130B0A084330590800660160C740000000600E00EC0500680600081F080880006C1 6A4701F20600601612600100502602D006004000000000000000000000FF1253000080208C80E01CC9C55001005080001000 00A000608600600400000600402504640600600410080011600608608680688600E48601000C800046004054004000000000002f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880028608600 60A008800E00630E00600600600000600610204601600600600600600600600000600600422E004000000000000000000000 FFE0CA0000018010030218458070C91610090419C782400063162864080200A628658600628E2060A8100004238086506086 006106086006006430024006224016004208000000000000000000FF5893800001800C20815809C0800440008093504000A0 02600E02600020000600604600400610600000040208203754E00E1260B622604600E2000100060040061040000000000000 00000000FFEDC6800001801001281A018A91080000009090009000416427046002008004006026A54246006120006002002000af6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF3F 7C80011202405400000002002802004A04003200000060060000200000200001001000000001004060A84905200004102004 400000900902C0208520006008006000000000000000000000FF99CB00000100180384180180101100104811112405000462 0640601424012620604200208630612000640600610648610E08601620602600600000800600400608400000000000000000 0000FF1E7500000100180181581581102300908200300088402861161460A011001610641200221600601000000422E01604 600604614614600601642004400624422E004208000000000000000000FF9074000001061841801803805121049023041801006f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A42A30A2222A A2A22AA24020A2CA2AA2AA2AA000000000000000000000FF0E541000002282A820000028A40000200000000A000000000002 1124000000004008008001000080200080080020800080100000800000010000080040000000000000000000000000000000 FF15520000000409008AA8AA90010010008088800100002AA2AA2AA70000050223822A2222AE2AA3004AA0021420422AA182 02208A2AA2322220001A20022AA2A22AA000000000000000000000FF70500000201101000000001121021120000041000000 006006004090000510100000010000000042006404024010000040090000000000000002004010004000004000000000000000ef6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA2AB0024A2 0002AA2AA30A2022AA2AA2000ABA232024032AA08200200A2AA2222220090A20020AA2AA0AA000000000000000000000FF34 C080082140440840140140120104100502900500000000000010040010100041100800050044000008A00003010040000401 10804000000100040000000000000000000000000000000000FF70F0808155901801D55B5584190580992D15594180005565 5651600E000D56556446547557556210156C564560965564564564CF55655654648843651655655635600000000000000000 0000FF26E600008A8908228AA8AA82A82A80A8C88828B000002AA2AA2AA02A0000222A222222A2AA2AA0200AA20A40A00A2A001f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF243800 00000A00000000000000800000200200000000000000000040500C0006000000000060000011000000000080000000000000 0000280000080001000000000000000000000000000000FFA01F01000404404040000015210C144032000042000000000012 80000000000001001480000001002000890D0520000010440341000080088280208520000000200000000000000000000000 FF7AC308000010010A0004000000200080000000100000000001400210000000000020000800800010000000000010800440 090000000010000001000010400000000000000000000000000000FF30A48000A880C8048AACAA8008509408808AA8808000009f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (506046000000 006001004000000000006000000000000000000000FF3A0D18000410002260100000151000020044A0090000500808024204 005020044004004004404151020004C04404044404800000200000D41150D0120800008020C000000000000000000000FF68 09100004000800900800800A20800804A80A00800028200200200200200200300280200282200080220A0020022020022820 42000000002800006800000000002000000000000000000000FFA20300000000000002000060000800000000020000000008 000002000000800000000000000000A80018002002000203080000000000008200A820000000180000000000000000000000005f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020002060060 02002002806006002000002006002002002002002002000000002000002000000000006000000000000000000000FF0E6300 0040000024200000200000000240000001000000000804400000102000480400000100400204080000400000000010000040 0000000002004401000080208000000000000000000000FF4D7D100020000800800800800800800820814800800000200318 2042502402042002003002C02000112002002003002002083002000000002000002010060000002000000000000000000000 FF8565000000021801921801801841801C259018010000006006006A0480488600700780400684400080641500400740608F00df6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF3FC1000000 001801821801011829001801801028800010200C0AC406002002106006000006026100006100002116106016006006000000 006000086000000000006000000000000000000000FFDAD50000000000000000000000000000000000000000006006000000 000000000000000000000000006000000000000000000000000000000000000000000000000000000000000000000000FF1D 9700000000000040000100000100100000000000000060068008008000000008000048000000010068040040010000000008 04000000000000000000000000000000000000000000000000FF1C94000000000800800800A00800800A0080080880000020003f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021000480064 20022000040080026000000000000000000000FFA88C000030049021025805001A41288A01A0140084000860000040860064 46106106800106022088820504420027486006024812100000706000516010000300406000000000000000000000FFE42C00 0000001801801801101A01123C0980100A80000060040043060060060060068008860020002464048C008600600E85680200 0000406040086000018500046000000000000000000000FF75B3000040049841C01841001801432851C01084820002200000 480600681200600610808E80020950800050004600600620600608004800620082600002000000600000000000000000000000bf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (640682F00616 684629E4260020000069065E1086026006004000200018C06080452400008000066000000000000000000000FF000B000000 000804085802A0BE00808801401801000000600A00780701620600700E006106802000000206000006206006004008200001 106000002010010000006000000000000000000000FF29D2000000003083901801C958099009258030400080042016006206 00480700604E000C16102000407000000006806006006000000280006000822200040000006000000000000000000000FF12 32000000040A00C01821889851800821001D40820002281295700600480E10600611000E80240008830020000E00600640E0007f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (530000000110 1184B80100188500090D819221000100600A70715200600600600600080600200000080200010608649621E2160000000000 00906000000040806000000000000000000000FF3246000000000800001820001808081811A41005000008600E8040020040 06806006006007002204006003840006086107104106000000400214006000000100006000000000000000000000FF106F00 0010604800821800001800005821823201800000620200400202402600610630602E08200440000280090782600600600608 0280000084086000040080206000000000000000000000FFF4540000000415610218009619D096A905821C41050005EA060000ff6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020011600400 4018000241006088000000000000000000FF3C2F000450741401601800001800042801053820000000700E0448001048444A 794681600600200480610400008628620608C006000000556415405420200000006000000000000000000000FF1FB2010000 010010021C4000180005080104190480000068020AC0C80040040060060060060222801000042412A600620E08408E100010 406288084800000080006000000000000000000000FFD98C00840000140108B8010418810288018010A1000000608604E002 00600600600600000602A080886042400C46006006404406080008088080006008000000006000000000000000000000FF130000e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100006140140 0328060860060000060C6026006006046404000800000006006006000400000000000000000000000000FF980C000011B010 15845840809A11A41A43A104030000016886842506000046400200802006406804006004806007487006286844000200D504 0C446446C00000000000000000000000000000FF8D5F00000000108B101820001808000801805D8100000060060028800060 04006206106066282000006106000107007406014006001000006000024010000000006110000000000000000000FF31C400 02000000001A3C00049814100927801C03000010E1820062208070040060070A78060120040010460A0026006006A24226000080e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100100180 180082180000000D901121084000650602200608820200005054610603600441640641640604608600600400000000600400 6006000000000000000000000000000000FFDB14000001800001801800801801801801800000800000600000200600000200 0000002006000000000006006006006006006004000000000000006006000000000000000000000000000000FFEBE0000401 801001801800801C018018018000000000006806002006800002000001002006000804006006806006006006806804000001 000004006007000000000000000000000000000000FF69FF000021A40101801800801801A05A01A4002100008060110028460040e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (166030506006 400000000000000000000000000000FFB1D900000100080180380180184001020181404184409465500C3556440500000510 00E556116414000146006117507516806806000501006284006006000080000000000000000000000000FF354E0000010020 018018018219E8074209806021000000608E70200600000000000000600640E0042070060062460060860064441000000060 04806006000000000000000000000000000000FF7AD0000001203A01841840801814100001801001000080E02800A2360008 3043050000E00690640004004602600E10E427027006440000046040006006000000000000000000000000000000FF0AFC0000c0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (024300000461 06400000800006017056806046006446000000006000006007000000000000000000000000000000FF538900000180180100 1E00801800000000001C24722011004E00208640000200044880602600040100682600600740600600600600028000628000 6006000000000000000000000000000000FFA4C0000001E0020140180080182180980000A881000004648002A23602030700 008000E30E116110000886006116886D0E0060240000000A6010286007200080000000000000000000000000FF828F000001 801101001800801801801800080985182001E2260BB22E08822E0602E828E0060A630002EA262260060AE2060260442A00010020e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B038CBB15A48 C23A0A20A34120D0488000A008A0802004200C02100108A06C26CC880092888EA8E40E80E886C4EC06000220B0E880D0E846 000400240000000000000000000000FF0B8B0000038298018418838898C188180B0812828000006006234314101106C28000 04C109000088006006026006286206886086000000826229006006000020000000000000000000000000FF11320000018010 0180180080180180180100100080000060000040040008060000008040020000000000060068060060068060040000008060 00006006001800000000000000000000000000FF0AB6000001C008814438408018041140040018008000000000082006001000a0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021920020000 20020000000000000000000000FF200E0000400100C000A0010400A414000510128000000060068300000000046080804000 00004180006008009409008480680000000200660000008000000200000000000000000000000000FFC54200000208020058 0014000040000002000344000000600620088828024002000000064804800002E000101B010011001002000004000885A000 0060040000010000000000000000000000FF7970000001821839801883881900000121847008800010006600260400040208 000806603640000008600620601650600601E086000000006040206506100000200000000000000000000000FF61370004010060e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080002604600 4000006006106006006006106446000000006000556146020000000000000000000000000000FF56E7000400C04C30AA0C08 C40C00D20C4CCA8A10800151304303220200100200800120BA134C308110340B00248A2824832530120004012432A1803202 100000810000000000000000000000FF87CB0001002082034602004002082082D02980210000800880008800800984810800 A19000A20808900C908A0000281200860C50000020800A08C40000000001000000000000000000000000FF431D0000010468 0000482892A802882808800A128000612002442854000002000000002082186002002002002002002002002002000000002000e0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000AA0880AA0 8C0AA04000000000002A82A82202202102202A8AA82482A84000400A83180882A82A82A80000000000002200002200008000 002A8000000000000000000000FFCBD6000400A20B00800804A00C00A00A209028A080008028028020021009128000009228 02A02A00C02802C42803002802B4281200080080284088A802000000000000000000000000000000FFB3C100000128A24B00 1220201242200294230015000080080090888C84880480000080000094C8408008C0800804804804808D40000000908C0000 0000000000000000000000000000000000FFE6ED000121851801805805901943801901805925000000600620602E0002A4200010e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF20980000004301320AA4804AA0821284AA0AA0B000002A80A88C82A00402082A82A82802A80C 00102A82402A82A82A82A82A82000000002A82002200000010002A8000000000000000000000FF221600020000C084554130 3543503543000C20100000D50D50521540540D48D50D50D00D50930A00950C20808D50D50550AC08C0000800D50C40D40801 000000550000000000000000000000FF4DDA00040000000060024A0004004000004006000001001000401800009140000001 031000401401001101000000001001001080000001001001001001000000000000000000000000000000FFB6C700000000000090e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (810800030800 C00940800000805004800800000000914C10808800804800000000000000000000000000FFB5B90000008088088008288008 00840A0080005080000420024420120000120020021220025022000020020020020020020020B20000020020000020020020 00000000000000000000000000FF42160000003044800AA2800AA0D00040AA0AA08400002884A80002B05202002A82A82002 A80100080A82182AA2A92A82A82AA2500000002200103B20020000002A8000000000000000000000FF35660000002A043000 020400000000000A0082C40000000000808008000000000000010000000000200000520000001000008208000000000000010050e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (050044048000 0400000400000060060100100500100120104100102100100000110100000000008010008020028110100008000101D00100 0000000000000000000000FFBC90020440C20C00C00C22C00C40800C1082040080000120AB40310300124340300300322300 3000013403103003213402002002000113003100002203003001000000000000000000000000FF4F63000001801801801809 805881881841800001000000600615600414000600610E00E08E5061000260460062061261064164862102460060000C6006 004000000000000000000000000000FFAA480004010A322520100520022D28C0002002030000800A0088C8042908A400000400d0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (486300000000 000000000000000000FFE42800000000000800004C10000005000410008200002064160402D00A8488208320000148500400 1060000000900202000000080000000002004882A8080200000000000000000000000000FF29310400000000200000440410 0000004100000000000160D608808002042000409001011000008004E020080C04C48C000080040000340801000002000000 00000000000000000000000000FF4FB800802000080001488880282188080882004184400021026240024800041020265022 02282100002382802042082002A82202048002002101063002400000000000000000000000000000FFB0C8010401420441400030e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860160000003 0C0AE0000060060860AA00000210602000654E006000000000000000000000000000FFED5400000180180180185180180382 1801000000880040202640400611012450640610400400635008608700610204600700600A02000000630108F2A600600000 0040000000000000000000FF133B00000180181189580192086381006512A0488CC008052400414244042401414600614610 E0280002060A601609E006006786000000006000406006006080000020000000000000000000FF511C000001801801881803 841801800001054092810010400A04440A00000800600640601621600000620614604610620600600600000000600004601600b0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80080B821A00 80400500000020008060000000860070060020468860002000068060000060060A600000000000E001806007802000000000 000000000000000000FFF53C0000CD00188D8AB8AB8AA8858C806188804000002A80AA20622000002600680622220E326000 2AE0542462AA2AE2AE44E00000000222E000506006002000000000000000000000000000FF137F000001101A038018018008 2182008B82032080000040040C6800000D030060060020460868400008260060020060062262020000000068004B60060030 00000000000000000000000000FF6CB400004385582180180180081580580100200A800000640001409600001400600609400070e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFEFD3000401901C01001801801C21814008024501000000600611500100101600600702630E8460000070 86806006006006116506000006016041026846006000800000000000000000000000FF716C0005558C1D5515588595592191 25541505518000552550CD555400144A0060064D64064360041515570B65565565564065560000045460142D653600600000 0000000000000000000000FF3F6000008902B8A98AB8AB8AA88988190288801500002CE2AEA262A80002C600700629284620 F0424AE2045162A82AE2AF0060280000022A700200E28E002000000000000000000000000000FF1C7A00020101180180182900f0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620000644C14 628E00600640641600030600630000E546004000000000000000000000000000FF0902000001821A01801905800A25835840 010010800002200002480680085200600680E09608681000080529600600600649600600000410E80022E546004001000000 000000000000000000FFF52E00000190B8010018298008098000030402410000006406016004000102006806106022016000 206004006006006006806006000006006010086016006000000000000000000000000000FF6F130002AB8058AB0AB8018AA8 81880089082083000028A0A8A862AC000203006006226B17A270100A82AC4262AE2AE2AE0362AE00000422700080680600700008e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018158048018 2100000040040041460000160000000060040001000060060260000060060460040000000000000060460020060000000000 00000000000000FF5F220000898AB8A98AB8AB8AA8AB8A18A800000100002AE0AE3462A200022E0062AE2060420040E00AE4 840460662AE2AE00608600000E2AE0600A60063A4000000000000000000000000000FFF8A300000180180180180180080181 1804000121000000200000600E0001060460060461120160044000044160060060060D604600004400600440601600C00000 0000000000000000000000FF128C00002380180580180180080180580000000C00000064060AC00200000628E0061162262A0088e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFDE1A0000218018018000018018010210210018C1000004000000810600008E00800009601412000400014448 60000060060862540002000000040A6006002006000000000000000000000000FFA0950000AB8AB8AB8AB0AB8898AB0810C8 00188D00002AC0AC2A820E0002262A82A82AE22C2A82082AE2AC40E2A82AE2AE20E3340002A82A828820E28E22A006000000 000000000000000000FFC5E10001139559359541559559559139148018150000510550404456000446540550446304410484 55000E0163105565564560840000C8550504416536452006000000000000000000000000FF7F3800000180180180100180180048e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000082806000 02F016026006000020006024216006014006800000000000000000000000FFA64E000001801801800001813A0184D8228000 0380000042040022A800045400000109621400020020600214608800600620601400001000630000E5460040060000000000 00000000000000FF689E000001801801C01801D0180180181080081100000440040060000000060008000069260000140008 024168408068060B7146000000006014406016094006000000000000000000000000FFA9F90000AB8AB8AB8AB0AB8658AB8C 18808008A1000028C4AC2AE0000001862A82A82261042A80800AE2AA1062002AE2AE1062040002A02AE0001E60063240060000c8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5C2008482000 001240A410E04024912E10010804610750008010E00002600100E00610E00614000000602021600601600600000000000000 0000000000FF13E9002100001801024705811809001000C01828800024441420A0204300A608004021600610000001020E02 7001406006086004000010006000006006006006000000000000000000000000FF12FC0000000118014234A1C85B01C5D800 905800000000424C20200000000700111080E90640011816720F706981207006017404140008606100006006006007000000 000000000000000000FFAFA9008001901801C00A21C81801B01C4180000180000841040C200000100C8000001460010080040028e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF7E110000008258318019018018818438830028418A000042040CC2000A00560802200240861002A010E10C00E000 10600600600600000020E08008608600A046000000000000000000000000FF80CA0000008038018230018158038C18210A88 91000062408424402000020E00004850402E01000808010438602806E01604640C0000400061000060060020060000000000 00000000000000FFC024000000001809400889801841021011401835800008C04C0460880001460200001060061000002001 00006B00507006006126010000006020206046206026200020000000000000000000FF02EC00A100111801001805A018919000a8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (044100000000 00090310000000100000400010010000000000000000000000000000FF110400002000002205000000008401404A04410800 000060060881080000000000000905400000004060A014000000000024000000000000810000854010000000000000000000 0000000000FFA0C70000018018018018118018059018C10A8905800044408C01013000020600001012400600050040E01010 6490206006006126008000006000086026202006000020000000000000000000FFB18D00000184182182580180194180580B 0048098A001142244804001400860A042000412E00003000000021602005600600600E0000004160A02060860120062000000068e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A280880002A A2AA22222A0002020008002AA0AA0000000AA2C240A800AAA2AA22A002000000AAA00020A28A2A22AA000000000000000000 000000FFC92800004A4000000904000004000002D10800000000000000008000000000800000000200000080000084480000 0008000810000010000000800A0000000004000000000000000000000000FF585B0000C90AA8C91448AA8AA8588A48840989 0680002AA2AA2342220003220000002224020003004AA20A1020002AA2AA1020720000002223001E20022222AA0000000000 00000000000000FF39790000040000001020000000200000000000200000004004000000000108000000000008000080006000e8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF4211800080CAA8AA8008AA8AA8AA8AA82080080080000AA0AA2022320002AA0000002AA0020002000AA2120420002AA2 AA0022AA00000022A6000A20022222AA000000000000000000000000FF99C900000140100120040120140204841100002000 0000000010410000005100080000000000040000001402080080500400150000100080020000004001000400000000000000 0000000000FF5E3C000101955955845D55D559559558058538B380005563564A45460005560000005560D600020055744401 600155755643655600000054E00041653654F556000000000000000000000000FF502300008A8AA88AA088AAAAA8809008A00018e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004003000 0800000000000000000000000000000000000000000000000000FF62F40000A0002200056000000000000000026008000004 82000000400000008000008E0000000000800000000000000000000800000000910000100001000000000000000000000000 000000FF299800000200000001440040000000000A02009000000002000A8000000000000000000048000000000910140001 001000200000000000000100008540100000000000000000000000000000FF36260000304000001400000000000001001120 2400004000000001100000000000000003000000804000404100000000000B000000000010000040001001080000000000000098e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (110000001206 0060060060060060070860064060004471174165045568541004260000008060000060000060000000000000000000000000 00FF05E004014000100100400000111100000004110100000100040040000440250012840440040040010200848018040000 04400020400001000001800001008220000000000000000000000000FFB895040002810840A80800400800800850A0080000 0000080200200202200000280200200220200022308A21228231200230042220000000200000200080200000000000000000 0000000000FF411F0080000002002000002000880000000000800000000000000000000000000000000000000000000000000058e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 7592000000A00801800800200800800800801801800000000600000200600200200600600600600080200200200200308200 0002010000002000002000812000000000000000000000000000FFF1EB000000200000200000200000000000002000000080 0000004000000024000500000000000000000084800804200005000020000000000000000000000240000000000000000000 000000FF652000000080080085480000080080080080080080000407826020420020020020021C2002002001042002002002 202083000002008000112000102000002000000000000000000000000000FFAA41010005813841101800001801801851C03000d8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04622822040E 000000A06080427000006000000000000000000000000000FFDEDD00008000180184A80000180190184500808A000000002E 10640600600600600600610604E00002600630E00820600000002600000000405000C0000060000000000000000000000000 00FF7E1800000000000000000000000000000000000000000000000000000000000000000000000000000060000000000000 00000000000000000000000000000000000000000000000000000000FF4B6900000000000040000000000000000100000100 01000000000000000000004000000000000000006000800804004004000000000001000000000000004000000000000000000038e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000010164060 4600600700200704604600601040000E006040006004421006000001404080016000002000000000000000000000000000FF 3A570000D1065864000802011823809AEB0032080400000026086207116026154406006A06A26000020816B8C20CA0C00040 0704010000506028306900002100000000000000000000000000FFA1D8000001201A0080A800021801881A00A61822000100 0806406006006046806A0608648600E00000688680648403622800082E000000006000026000002000000000000000000000 000000FFEBEF000040041840A0080242184D855891802220000000000600604600600600420712704740600840008E0060A100b8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFE408 0000C09DDA8008784042181182504301D019040100000600E00611620605008610670608E06000700640441682D007400404 080600506000006500600000000000000000000000000000FF0BB2000013801922A09804031801821005001001080100004E 00F80600640610248600600601600020002610C0070540460000060900000060A02A60010001000000000000000000000000 00FF2DCF004004A01C00251822401889803000803081080080002E00600780610600380609610600600024702620F2080070 240000040000800240C0426400000000000000000000000000000000FFAA86000021801800A41800401811843800409100000078e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8F8802840000 0000E008024000006000000000000000000000000000FF438E18002185181800505804184980100830989000000090078040 0400600601000600600608618C6000E608600278E406450044000000686005104000186008020000000000000000000000FF 9C920000A0801C0082100000180382102900192400000001060040268060060008060060060060000061060A480200400200 0006000000106200004000806008040000000000000000000000FFC3CE0020808018008C1000001901801800801900000000 000780400600610600000600E00610600402001600600200600280008600010002600400400000600000000000000000000000f8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001600424600 62060A000601608680608E80040600518E00492600064C008000016006066080006008200000000000000000000000FF75E3 000002801840201800015841B15009009C48008050090604400610610640209693600610602080602608C204004110001804 000309834088007040047140000000000000000000000000FF0188000500841804045800001801801800801A140000000086 20400600600680A00600740600E00400000F0450040452102A810400000000420C0868000068000000000000000000000000 00FFE5C7000201801802001000001811801000009800000001000E20400780600600000680EA0610E010807A1680408203480004e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF023B0000 8108104000900180180180180180000100800068060460060160020060168060060060140000060060140010460068068001 000160048061060840C8400006000000000000000000FF9D7B00205501109102104192D8458B5A0990104100015460060044 07086480B4600615690700692000684684F30480000E006A168082000260A8006046044000000026000000000000000000FF 7FDB000020849888009800001801801040011810000002090680400700F00680010700600610600060600612500600410600 0004000010006020046000086000000020000000000000000000FF6CFA0020888B18004218600E1847C610615818400000800084e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (684610010800 6005406006004000000006000000000000000000FF2ACA040001001089003001801801801881801001008000620600640600 E400400206004506306420006046006004000006006406000000006000006006004000000006000000000000000000FFFFBB 0000010010000010018018018000018010018000000006006006006002006006006000006004000006006004000006006006 000000004004006006004000000006000000000000000000FF00170000010010010010018018018004018018010000000007 00600600700080600600680000680300680680600480000600600600000000400200600600400000000600000000000000000044e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A62BE22E08E 22E3CF4876AE2AE3A000E1BE0A64AC8096A6026226080001006000006146144000000006000000000000000000FF53E20000 00801820801841811801803C0194021194402062D640E4C708650600200A09610201680400000620604600800600E0060000 40004004806006006000000006000000000000000000FF6ABC2200000010022638018A189F805801803001000080680700C0 06006206002002806012016800026206206204020006006006000080804000006006006000000006000000000000000000FF F8AB002201801A038090018A1881B298338CA2090C404CE1524AE0B624612A03014E0D7026026084C485165265560495460200c4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (68EE004000C0 1930A31C01801801956245911A1180000402060060060060460070420D600400600040100600600680000680680680001000 6000406006006000000006000000000000000000FFF999000001801801801001E01801800401901009002020002E01624600 620600601600600400600000600600620600820700F007000040006000006806004000000006000000000000000000FF965F 000200401200601821809801A01A01C214031400046086C0408E8861060070A221628600E10080008E206044000006006806 0000000060000070A60A6000000006000000000000000000FFFA9E4000010010010410018018018018898210050AA02CF2AE0024e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000004000 00600600600000030E000000000000000000FF78BF000210A2BA8BAA2C29A11B218A0109A052118000480D2488603632EC2E 8CE8C28A6AD0126810890C0E0068AE0A00A6286906000000D168A08C6D46896000000826000000000000000000FFB6C60020 A3881801800801823803800001A910A3800100000C25610600610620221620E0002060000460864B620620020E0162460000 0000621021600E22600000020E000000000000000000FF1E6900000100100100020180180180000180180180000000040060 06006006000007806000006002000806006004000006006006000000006002006006004000000006000000000000000000FF00a4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070020522222 021420028420000021030020020010168060E2000000042000082012602000000002000000000000000000FFE5FD00000000 3008080000500060100000008020000020122000008108812C50C0248A4E248201501270005187A04A04E800820000000039 84B80081C8050000000000000000000000000000FF7A0F0000200401000000004000000006000421020000400010000860A0 00800401000101008000000072888A0010200A008C0000000000000000020200088000000000000000000000000000FFD7A5 000082809847870829829801A80009890801800090004C40400600600600608220E05020600000E40620604E0000062064060064e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000101021911 8099018018218A1051821801800004C0360060868060B652690601608442602804600640E286210006006106000000156000 0160A6226000000006000000000000000000FFA491000420D00C42CA0C00920800800900C10CA4800050310340204A013803 003003943C4A803101082C9210303210043202342200000100341148300B00A000001102000000000000000000FF5BD80022 092A02102000000424822413402002C800000501808A891803520088100800008C4848088C00148048009108000009000000 00800A00F10020820000000020000000000000000000FF1841000140900880902900800C00A200908008048001084002203000e4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010014030010 01000000001000000000000000000000FFD4610008A80AA0000880000AA0AA0200000000AA00000002A82A8008AA82A8000A A82A82A82A80000A82A8000240000208000408000000020000088000020000000000000000000000000000FF1CC4000004A0 0A08A00C00C00A00B00A22B20A008000802802802C22000802A82002802802802800C02802A93002500042002A2200000090 2800C02802A12000000802000000000000000000FF22350002014002A222400120120120D309212200000000480100090400 4000848000000004004B008000048448C8848904004900000000A10A80840000880000000000000000000000000000FF3AAA0014e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000800000 0000000080000000290000020848800000000000450000208000400000000000000000000000000000FFE0340000480AA000 08A0000AA0AA0AA1000900D200010002A82A82A82A82A82212A82A82A82A82802A82A82A82482A8A488002A80000002A8080 2A8000228000000000000000000000000000FF8B3C00011415434C3542003541543002023243540000800D50D40D20550D50 AA1550D50D50D50A00D50D50840C90508500000928000000880B008C0800930000000800000000000000000000FFE5B90008 00400448440400400400400404400400000000000100100000100110000100100100100300100100110100080080100000000094e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (502012012004 01401201200308248248000000000080080000480090C004800800800882C010048009148000840048000000008008028008 00880000000800000000000000000000FF434700000400094484480080080080082280090480008020020020028020020028 02002002002400002002002042000852002002000000002300002002052000000002000000000000000000FF30BE0001040A A10C0880000AA0AA0AA0500C600000000002A82A82A92A82A82302A82A82A82A80000A82A82A82002A83008002AA0000002A 80002AA002300000000002000000000000000000FF6B9B00082020000000000000040002C1280080000000000000008009000054e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200104340200 2000041002100000000000000000FFEEFB400D80418400400412400408400400400400020100100100900100500100108100 1409021300001301019121001115124000000000001088008138000000000000000000000000000000FFB2204024004C0C40 C00C00C40C88C00D00C00C02820100300300300300300B00348B01300B053002003403103033411403032002000210003092 042002202000000002000000000000000000FF33A300000400180100180580184180184B81380180000060060560060860C6 0060260A600608620002602C20640600002600600600004008600008E426006000000006000000000000000000FFD6E8000100d4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (406046016006 00E00000E00000600600000600600600000000628024E1460060A0000006000000000000000000FFC82F0008000240001140 200CA14002002000012800A001008012E0D60800500880000202004D004008E4002A02800802000800002000200003001100 A0088030000200000000000000000000FF36B7002002140000000000000100000113003003000000000000600608014C0002 080C42040840800061542003104100A00080000000100800000C0480200000000000000000000000000000FFB61C00000000 0821800808820820804820908800840010200202200240200240402641A10200A10002200608200640020A082842000220000034e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (580801000180 1801811801951053000001201640E00600608E0540060160AE00608020000000000600000600600E00000008000028648641 0000000286000000000000000000FFC20B00000002180080A003883801809820023889000000A02E2365060A610601400624 648604608010624032630620020600702640804000400100700608C000001206080000000000000000FF0E7000098000D898 86080381194180800E03B841080020612E2062460262D21047A6186066506640000020006006100186106006008000006000 306406006090040006000000000000000000FF9568000000011901880841821801822008081801954050600608600E40620200b4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08F286208000 000286000000000000000000FF2890200242001908841801801801C03800089000000080004B00600680688204C116007886 006000000806806006000806006026000000006000016226004000000036000000000000000000FFCE1E0000460158420018 AB8AB8AB8800AA80018400002002220162AE2AE1042142AE6262062AE2000AE2AC2A8C560002AEAAE08600000003A0004060 06080000000006000000000000000000FFAFCA0000100C19408A5801801801A4200000200000001401028C60060064401050 069060068068000000040062CE000006006246000000206D0003603602400000002E000000000000000000FF364A000140010074e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0E2AEA0E2AF0 840A9AAF2A82AE801AAE2AE1060000002A90041060062AA000000006000000000000000000FFDA19000800081A0490180180 1801804001204A018000803000006806806043124806006106006C0000680200710600080700650E00000024480004605612 600000082E000000000000000000FF3CE2400410155822913955955955948154823955800054A480556556556432484446D5 644ED56284550552557556000557556216000000554304446116556000000306000000000000000000FFCD35000088021910 42B8AB8AB8AB8A98AA13083000002C82B33262AE2AE20E4002AE8CF236AAE0802AE2AE2A80070002AE2AF02600000010228100f4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02B801801801 84D901910021800000208200600600602E00400602E0060160020060A025000600000600640600000002200008E126002000 000446000000000000000000FF0909000050001C4022180180180180B800C93401800002201280400400608E835246806026 806A04000000000006000006006A46000000002B04436A2E002000001356000000000000000000FF7A4C00008400190A0038 01801801840000041001800010A5200060060060461041060040860060004060060008060000068060960000000000008861 06002000000006000000000000000000FF6A620001000AB8000898AB8AB8AB8800AB8010AB8001A028002AEAAFAAF2062050000ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (564920000000 16000000000000000000FF4EF6800000001005004801801801812805805001800000401000600600600E0440060060060060 00006086004000000006006146000000002002006006032000000006000000000000000000FFEC430000000AB8000818AB8A B8AB8C580000011B800022A2222AE2AE2AE2D60042AE2862AE2240024AE2060802AE0002AE2AE02600000020A00200600628 2000000006000000000000000000FFBF9D000000001894001801801801801833822081800010200A0040040060062D400600 600610600420001600000600000600611600000008200422621602A000000096000000000000000000FF2803000000001820008ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C2AE2AE0000A E2D64042A80002AE2AE026000000110000746006002000000006000000000000000000FFB716000800000031032801801801 80082115180380001120100060000060862240060260060260060000360A40020000060060060000000820064A6506022000 000546000000000000000000FFCAA80000000AB0490A88AB8AB8AB8A088915188980002A82A02AE2AE2AE24628C2AE2AE2AE 2AE0002AE2060B42AA0002AE2AE20E00000042200000E52E48200000054E000000000000000000FFAEA50000001540851009 55955955908912003841800044454055655055640611455628E5563160041505064145500005565564B600000044A0040160004ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (05C11A82001C 230018018000006C00206201106826027226C8BA0320620408000600E410A0210702600600002800C0040160060060000000 06000000000000000000FF2FDA000800000805044801801800005900111A03800010410000600600622E4360060020020060 0040602E44480000200600640600000014400008E12610E000000446000000000000000000FFFED7000000201131800801A0 1800040A32023801800003400800600100600690480600400700600400080610E000001006006116000000208004026216A2 2000000096000000000000000000FF6AF40000000AB1010888AB8AB8AA0888410018ED80002042202AE2AE2AE1860042AE2A00cce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C48000000640 0000000000000000FF8D3A800000281001800009A0D852000A419018880080100400040430C0600600408E0C805600605048 6316C4641201000600600600000000A000016006000000020006000000000000000000FFFEC58400A0100811000011805E49 840800001088004008400004784020700780608780210A00610824190F204002003006006006000000006000006016004000 000006000000000000000000FF6E79800880407009020101C61A81820A0290120001204050400061970071870048172432C6 9662C0027406044901011086006006000000662000066006800000040006000000000000000000FF2A6E000000400801820C002ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10420000000E 00600410200600601600040040604052E3464C6210000006400000000000000000FF80340000000018018700218238018018 00001811088020240808608600600608E0C658C0220F420008600E04600600200601600600000000400222E0060040000000 06000000000000000000FFB1AF04004000102300818D8018098AA88980382100004022C04262081260C604446600408650C0 02000006014104480006046006000050000022006036200008000006000000000000000000FF282E80000000091190420581 1800000821131808022008A000210006006C560068162408034060C004048623600A00308701600E4002004060000863060C00ace040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000103390 5085000050000002600600000640000001400600040000600000C41454000000011000000010030042021002800000009000 0000000000000000FF9D0D80000000200A00200000003200010001002000000280000060260000000C80000C000008008020 60001400C0000000000400000000050000088120080000000440000000000000000000FF5AAC000000001945905809801808 08DD01005821804008208044021000724600600E0091024041200A648640E00E00610600600620000000600000600600E080 000006000000000000000000FFDD050000000018118008A582D8000408489298010C8021201008810604609610E106020042006ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000016000000 000000000000FF54E00000002D4840882CAAAAA8888AA88888484080000820002AA48AAAA2AA10A2AAA8A2AA2222800AA2AA 00248A082AAA2AA20A00000022208020A50A28A00000054A000000000000000000FF73EA1000000080000A00000004020204 2000002000000CC0000000000010000000040A51008001000010000000802000008000000000004000005205004080000005 40000000000000000000FF356E0000000008B08A18AA8AA8848AAA40820808800040200028C28A2AEAAA0422AA2432AA22A0 000AA2AE21200200E2AE2AE022000000312000142002242000000002000000000000000000FF44450000001300010080000000ece040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000000000 10410000000110000000200000220210320000000090000000000000000000FF32EC81000000A8AA8188AA8AA8D2D20800EA A8A8800020A00028A08A2A82AA2AB2AB2030822AA0000ABAAA2AA2220022ABAAA02200000000208000200204200000000200 0000000000000000FFE0BC80080020010404920120144000040444828C000005400000404080500040100480480110800240 1004541020454805004140000000000402000040000000000000000000000000000000FFC16B800000123D55803555D55901 80BD13B55F138000404000554557557556556D5640C456556400356557557C5614D5565564B6000000156480016036086000001ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000280200000 0000000000000000C00000000040000000000000000800000800000008000000000000000000000800000000000000000000 000000000000FF07020001000284082000060020200002000000081000200000C00100000820180808000000001000000000 000000000000000000001000100000400800000F00000000000000000000000000FF4C271000000400000000000000084125 0000020000000200000204408010000000011110280004800000010010800C08000004000000001282001081200100000004 40000000000000000000FF12710080001002000C420020002008003200000400000800000000000000000008000204000000009ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800000000 00000000FFEE2D00000182100D801801C01801801801005E898080206016804006206026007027406007106000006406546C 06504114010006416106006000006806006946000000000000000000000000FFE1F90000180114210210452040400001AB00 020000000A028C024000205085D0021C80000000400000080000400400400400000000000000000080008002040000000000 0000000000000000FFAE37000410A00C04800800800800800800A04880810000201000200300000020200240200308200000 22024A320228208200800240A082002000002002002126000000000000000000000000FFE19E000000200000200020000000005ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000100 4004000004000001000000004800005000000000000000000000000000FF7299000000803800000800000A00A00A00800800 900000200220C002006002002006002002006000002002002006002806000002002802002000002002002080040000000000 000000000000FF066F00000000004120020008020020028D000000000002050D040101200104000C08000000001000000000 005000004800000000000100800000000100040004000000080000000000000000FFBCDA00031080280085E87C8868008008 40806800800011A00280A003002062102002002002002000002002002003002002000002002082102000C02002002C02020000dce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01051004A000 0460168000860064060461060C60164861084200060460060000000002860068062360800120464860060400400000000000 00000000FF95F1000101801801801801001021023041000901800000610600000002610601600600E0020460000060060860 06040000000006006006100020546006006016000000000000000000000000FF41F300000000000000000000000000000000 0000000000000000600600000000000000000000000000600000000000000000000000000000000000000000000000000000 0000000000000000FFF957000000000400400400001000001000000401000000000000600600000000080000400400000000003ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF4B09400140820801009801905800855841001900800004600600000E0061060100070160220060084400060270070A 000400030200600652C00015202440A004000020000000000000000000FFA48D000001000218A0580112100180501582180A A000C04116C060001262060264860040060260000000272870070040000000280440068160B021241000241C020040000000 000000000000FFBDA920000980A8018078210010A1801019809811800080408E0060960060068068068A604A286080006046 40600611C000000052806006804000002804092804000000000000000000000000FFF1A000004984CA11C118210A5101809000bce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0060060028C2 000086006006000004006006006408040000000000000000000000FF189C000201058000015A238028919248010093A08000 49E01600E04602E7D60248061042072060000160070060060272A6000600F540860161000124000000064000000000000000 00000000FFFCD7000000000600001823882900820805601800800188780640780000780621500602DC064070020000060062 0604640600000100788480400A022010010006000040000000000000000000FFE9E6000001842801409C0180180990190100 54008000006046000221206036A0C0560AE00300600041604780720600000400010211480700610004200400800442000000007ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (980082000861 06006027A0600600600603500608EC0002600648600600228600000600400400620034600200600200000000000000000000 0000FF80A5002221818841B018018190011991D4A09822820000600682601800680660600600616288620000000680625600 200604000680400F09400081E006047842000000000000000000000000FFC0A8000100100008A358018000018000008008C5 802000E006046006806006007286884006006004006006016C0600200200000702600E102084007002007000000000000000 000000000000FF3E5B000200802809801801800001000088814021800000612781640033600602622E80600200700420002600fce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF1B5208000000005288980186C00108E055801082804083610780600000E807A0E50601408781608C020087007066007006 0000060442240961A414200208606E000028000000000000000000FF5B520000050001108218018020008000118B28209000 107006416246047116107C960950061060040160260860160040000000074041060220054020320170042200000000000000 00000000FF439E000100080200935801800004000001801080800010680600602040600700600614410600700004000628F0 0E005500020006004006000200402002046004000000000000000000000000FF9D71002221000000A01801825003805000A00002e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060040060000 00006006806004006006007006006006000000000000000000FF25E9200001200009821A8B040A0000120081180188000060 1600640015610650220600E10210600400080600604600400600000000680600600400680E0160C600604600000000000000 0000FF8373280005A05083811A0100AA10091A10841125800012600701604600600200814E10600300681404E12488710E10 4006010000406336346144406446506016046016000000000000000000FF004D00000100220090788B800009804001905800 800060600E40600608601600602600400600610000700400708608600600800600500C2060000032022660864000000000000082e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80000AE04633 60804A602688828E106306106420408486006006145486408000016006007000006806007006006006000000000000000000 FF123C040001881001801809000801011804810111804000601600601601640E400046416042046004046006486006004006 000480006006006004006006006006006006000000000000000000FF6E0B0000010000018018018008000000008008010000 0060060060000060060020060060020000000000060000060040060000000060060060000060060060060060060000000000 00000000FF7967000001801001801801800800000800800001000080600600600600700680000600600200080400600680000042e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF45 4700000180100101180420080083380280918F80201A64A608E08E2AE46E3884AF88608202626020F2C62860064A52862082 80008006806401006006406916006106000000000000000000FF69BA00000100080180180103190000113181005185402561 57456550C561160081564425565123140400060425460165560000000561560060AC00600602E00600600600000000000000 0000FF91EE000001000801A01AED0018141818819060018000606106006006806A0600080684220200300698680700200600 6006000800006006006006806006006106006006000000000000000000FF1D2A0080018410818019010008012452A080080300c2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (580600000000 2006006000006006006006006006000000000000000000FFC7A1050001140901409806A20815818A6090088100002B601664 080602600488340665204638480004002600500600E006000000002006006800806006206106006006000000000000000000 FFDC48000601801601001E00800801801810811821820000E40F00100040600700A12E806886005220026006004406204406 0000000000D68072A9006006006086006006000000000000000000FFE0B2000001000801001A00810900800B0080080B0120 0060A60562B0016ACE80220604225200E8900000068260A60060B600000004800600600000600602E00E00610600000000000022e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (284236000000 22600600640601200E0000000064022000060A600600038040601628600000620660618608600E000000000000000000FFED 170202D5A41D09921A00334B05289A48A083438000AAC4B68008A6AAEC26CA60969328B6880A808888AEC004C68460C60002 80A0692EC8E84084ED0EA46A16AA680E000000000000000000FF0778000001891821C1180880184144388584400980000040 0741601600609601524620220224000900640609000E28E0160010000AA00602748850704608F94600E32600000000000000 0000FFFF34000001801001A01801000801001A0080080180000040070060000060060048060068038000000000078008060000a2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFAF7F00 00C28308010088008108608B09A8802900800000300600400200600210300250220200201001A0A20868A65028020000001A A00212A00010A0A2022002022202000000000000000000FF01EE000020000048020100025003140003029018000050108800 601F00030868402828413422438010634100C1482080080000000140A8000210280540100228500080000000000000000000 FF6DEB00010008012044000014811000000010000000000008000160270004200009000280C0190008006010510A100408E0 0000000000000100A8000000000000000020000000000000000000FFD7CD000009809801A8581488388100901581002180000062e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000A80940C80 B00A208008C0A90830000000000000000000000000FF535500014994192182190D841901841905801909800020610608C00E 00650650681650E0060940000062D60144162460060000002160561060080060B6006106286006000000000000000000FF90 21000402C14C00A14E40C92C32C90C10D48C40800110201300308208380B00A52300314B2035091530034821430820220001 010A330300B001083403483203003002000000000000000000FF4CF60202143442804104482002042022002402C200008281 00B08980189090838AD4800800C04C008C0808000C00800804000800A40D40800800820818888C002080000000000000000000e2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010010000018 008410010010110010010010010010010088100000010010010A1001341009001011001000000000000000000000FF178900 08200000880AA08C0880A00CA0AC0200AA00002002A82880882A82A82282A81002A82A82000A8000AA82A824020000000000 80281080002A8200000200000000000000000000000000FF8DC0000400A00800A00A00A00A08A20A00A00A00800000280282 2C02800002002802A9280300280080280A003002802042000850A02802842800802812842882802802000000000000000000 FF9C7300031234A4450010422222042002023142000000930804804820804000900004840801004840C00B408050048C888C0012e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF8DB000082C 00802000002000213000400008A0000000000000000001001000090000220000000202200489000000000828000328310220 0402220000482A00A0000000000000000000000000FF37030000880000CC0AA4AA0820900A008810002A00002A82A82880A8 2A82A92002A82A81402A80002A82A82A82A8280A800003202A82A82100080104A02C82A0000000000000000000000000FF6C AC0003002A41123543103502043103282203540000550D50D30D30550551440D50810D50D50820950840550D515104800008 00840908C08800D50C80810C10800800000000000000000000FF2715000C004C2400400000428440402440452480000100000092e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (164860260060 00006016006006006006000000000000000000FF07E800045120422020000021228420C20031024A0000800800844A208048 04004800800D008048008008008048049041040000C0800800C10A10D00950890800800800000000000000000000FFE84400 010094091000080080083084082484480080000000020020020000004B000200202200200040200200200202204A00001200 200202200003220202210A002002000000000000000000FF34010000460180020AA2AA0A000409008C00008000002A92A82C 84892A82A89102A82A84082A86180A82A82A82A8248A400002102A82AA0824000020022022220020020000000000000000000052e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200600620 640214A1022121000024421025860860060000021DB02300200906360B00332310B002010000000000000000FF1643400C01 400400400400000008000400460000000000100135400120100108101800120100D0000B8081005001001200000000000008 001020000000200000400000000000000000000000FF6F87402400C00C00400C048C0848904D00C108008040001003002023 503403403082143403003040122083113513003002000002012512053050142422402522012002000000000000000000FF1E 7501000184180004380181180184185580180190000000064040060060060C6006016046496000206026026006106226000400d2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D80000098208 0A04180000100A001801004049080000000C40812800E00E00640400210802602800600600604E0060060000060065060064 8008602E02608E08E006010000000000000000FF864500080004002A0100C4108004002014100108088000041045604E0000 300000900004500200000A60100000100100200000000002900905001100304200402100A8000000000000000000FF8ACD00 C00002000002000413002002314D011001080000000015604608020002008014002410002040604014820800002000021020 0280030000100020000100200000000000000000000000FFC8A20000101009000028008008008809008048408060000042100032e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400E24680024 60B61462160460AE000000000000000000FF96F30000C180504200111200180380080113414B000000000600640000600620 600400200004E00020030C08600624600600000420052610E04008E20640E046016406000000000000000000FF0DCD000001 80184000190A0918A180D8210A088500002000260060064260260061044A200000E30015622608E306006036400006005017 5160010372070070074070AE000000000000000000FF10AC0008019069000318480018A81889350388030140200406140086 22E60619E07420244000622800801600E02601600E20000675600620607860618640664E006006180000000000000000FF8C00b2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AF09720E2AE 2AF2A92B60422AE2A430F2AF4A72AE0000042082270260020260070A702702EA06000000000000000000FFF20F4002010050 0000088982480B808810AAA80080000010048060000071460060064060010060000001061260070070060000061440060060 000CE22614EACE00E00E000000000000000000FF375B0000430408C80AB0118AB8880C4AAB95510180002A0AAE2880A82AE4 0E1262AA2AE2A8A060200AE0042462AE80EAAE0000040E0006006040106006016086786006000000000000000000FF8F4F20 0011128A0000082180084002C8018018018000010006040006006B26097002006000106800000046856006106006000006010072e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06AB8428AA0A B0099010800008010008AB00002A82AFA8E0882AE0062272AE1060003870000A80042862AE2AE2AE00000420202617701080 6806026006006026000000000000000000FF8AC3000A01A04404000805801800101800001000000010000480604680602604 68060060000068000060170060060160060000061070963168012175364062960060CE000000000000000000FF4C49000155 910D541548258091400C3D4240095400005505565565305564164D655605635044E0145504574165565565560000064164B6 406004406116207006526526000000000000000000FF265700008D0910880AB0A18AB8AB8108AA80003280002292AE2AE28E00f2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (016024436296 0560460D60A6000000000000000000FF63890000418050000D5001840811800804114000000000008E006206006006006006 0940000062C00065000060060060060000CC14230630628008602608629620640E000000000000000000FF60AC000001C492 000000C188402984488C1348000000000006046001006806807006154D080570100000008168060060060000040C208E0070 0003622E296296316896000000000000000000FFC2E700000190000000100583180208884100080100000008060064460062 D6116006406040806000406334046006806806000004012C06C8E008486106806846846406000000000000000000FF599400000ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (545564C25325 505565441504365565565565560000404520564165240160562D6056056016000000000000000000FF752C80000080000183 180580084D845801800841800000200600620600600400601210000000600840600400600600600600000000200600600000 6006506086006006000000000000000000FFEAD400008980100000108B8018818AA8C8020088000000020428E0AE2AE2AE2A E2262062A82AE0000AE1002AE2AE2AE2AE000204202006026000006006206106006006000000000000000000FFF6A8000003 8B100000002190D043800820001844000000004602600000600600609602600000600420002800600600600600000400A056008ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (890001981889 8008800200C797408180000062AE28E08E2AE2AE2AE2022202A82AE0000AE2262AE2AA2A82AE0002A841A506346000106506 206006506546000000000000000000FF4D8D0008208C20010818058008018018008AA8000000006306006200006004006012 0060000000002000060000040060060002880822860A60004C62860064062862A6000000000000000000FF9BD90000AA8A20 018038A98AC88188988880088B00000062AE2AE0AE2AE2AC2AE2A222E2A82A82800AE32E2A82AC2AE2AE0002A80C202E40E2 8844E02E02E42E02E00E000000000000000000FF9B6A00011281000105593192A95395591580095580000060365561305565004ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8100E1E70260 06006006000000000000000000FF15C300000180000145180B821834094481C20000000000700640E00020610F00602F10A1 0808A504440007003202003006000001106006006004816016806006046006000000000000000000FF4A5B00080080000104 B843915830114009914422000000680602602600680600614710A0000022882060870028020008060000000C630610629010 612608629620640E000000000000000000FF36C900000184C001A01801C40802400041800011800000600600620080600600 680A0008008060000000160060028020060010002020560360004362160560460D60A6000000000000000000FFBB8F0000AA00cae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620620300100 44802000070050A012E90E12000014C00612635032602E006446306026000000000000000000FF79808080010C00A9809901 800814014511014901840001682E04000000600EC1688314200200428044602610401000E006000000900086006000006016 006006026006000000000000000000FFCE2780804012008B005881C08C01801820012801820000644604600181604620F086 021001006000000046086016006006000000404016006000426006046006006006000000000000000000FFF58C8008000000 41C2380BC20821A81811020D018000016A1600640714E8260076234008810660001860068668070168060010002181066061002ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB8008050108 0002400188182111204462D633044600602620604A10A10800000040003640040001600600000004641654610041610E3564 C6016406400000000000000000FF1C1E000005800021800109001801803801000821808022602E00602601613620640E0880 8808840008E02E28834C14210604000000426E20E45004604628E08E40E006000000000000000000FF86EE00004080000582 00010108018898C100A8898A2000600641640056630600603241003011000800000600040400000600000020001600600044 E086026006026206200000000000000000FF92C380000300010B291883C52C20040000280805800000628632848E2161121000aae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (250220200250 2542000000000000000000FF0B0C00000002110002000400102200204C0000420000004000026006000000000004024D3600 40C00060200040145040000000000080500100004302D00500400D00A0000000000000000000FFB24880004008403400C040 00001000800004400000000000000060260000900000004900000880004062800A00A0050000000000040300100120000000 080290200408000000000000000000FFA1D200000180080195080902584010810180A88D0200006006000108246206106006 20284011008808E00611001000600E08000051600600E00010600600600E146026000000000000000000FF6DC80000018000006ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (516556CAC280 55655742C4145065560000001560560160800160562D6056056016000000000000000000FF94E900008890280A89088A8AA8 9088C8A088A88080002AA2AA2AA08A2AB22B2AA2AA08AA022920202AA212A8228B0822AA00000024A02A40A44044A02A02A4 2A02A00A000000000000000000FFC73E10800000000002000001402020423020128200000300040040000002800000000200 000000100000000810A00088040000002002804A00004C02800004002802A0000000000000000000FF25590000CB00984088 08C80AA8C08A08808880DC80002AA2AA28868A2AE2222AE2AA0020042262020AA04A20E2464122AA0000003825023622021800eae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000024000204 202009408800004A00000000000000300001000000000000800000000011401010000000002000500300004302D00500400D 00A0000000000000000000FF64FC888000CAA8AA88C8AA80888089880080082080000022A828A4CB2A80822A9003A03AAB22 22080AA2AA2832032432AA000000002002202618002002202102002002000000000000000000FFC87E800805049100044001 00000442041242140000000000040040410049008040002208B504450000008084D005020804000000000000000100000000 500080000000000000000000000000FFFB2B80014B955155911955D4190B9419038D58298001487556554116D56057556356001ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002002002022 000000000000000000FF0F0C00020A0000000000000000202000002000000000001808800000000000000000808080000000 000001800000000000000000000000000000800210000000000000000000000000000000FF423C0080000200020020202000 1028800002000000000000000400000000480080100804000000010000000000000008000000001000010000004100012000 00000000500000000000000000FF5A0300013040000000400008403000011404000400010088000204210004010014300B00 01090000200001030010850000000000148300100100080000080290200408000000000000000000FFCB9900000400000004009ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030020000028 0200280200200200080210200200208101200200201221A062000000000000000000FF91F3000003925901841801C0182580 D801801801840000001640404604604640400600ED5654410004655600454605510600004600610700615044600F40600600 6046000000000000000000FFE4940100110A800560404000100110A0012C200000000082AC08400080109003C80010000000 4000000808004800004004000800000000800000004504824008001800000000000000000000FF03BB000400904880820A00 800804804800800A00820000000120202204282240200280224A34208004254A0024C204A1020000420020820020A9242082005ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001000 2002010000000000006006000004000800000000804000006004004800004800000000000000800001000001000004000000 000000000000000000FF1F260000000008008008008008088008010008008000000202228102002802006002003002002000 802002006002002002000002002002002000202002000002002002000000000000000000FFD7190000010B00000000000000 0001260010400000000111540040000008800508080002000040000000100008000048040000000000000001000000000200 00200000280000000000000000FF3AE6000000800800800A00800800800800C00E00800018100230A082802642002802002000dae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (022060068000 00000000000000FF74C30800018458498010D58018418054010059218800400136000006006006102416C423050C00004010 4600008440848600000610630710E041106007416416816416000000000000000000FF20F20000B188188180100100980581 1911101009800000020600000000620E0060C608200420000010610604022402000E00008E01002642610000E04602600620 6046200000000000000000FF41F3000000000000000000000000000000000000000000000000600600000000000000000000 0000006000000000000000000000000000000000000000000000000000000000000000000000FF9F9A000000000000001000003ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C08010E00F00 008710000640030632602880000000620E082010C06424200000000000000000FF014300003184290180092CA01805814009 A89093800040000600000600600208242614608612400080014602010601002600100600612420400100610E834002016024 000000000000000000FFC7F4000081881021809001811825A11001303C100C40100E9E0360000442000030C2303014A00000 2808000C402402400E0000CE08E1041881A018E126A1250A01620EA00000000000000000FFD9AA080401801C09811001A098 01A01081211825000000082604600600680A86200E0022040000000060021042042042C6000806806A04024000066916006200bae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018018814 01800000180F8160008064060C20068042460020040000020020063020060004062A002E00E024906516106016206A860000 00000000000000FFE4BA000409A41001C03821C35865820001C6980784410100060060071441000A21871170360160008060 0600680720600640814600670016812101E02661000003489E800000000000000000FF6478000101800005883A0084180185 0001809411E00050040600600000780000A04E20600600608008800E04708600600600800580600180580000604600628004 4047200000000000000000FF7873000681C51A05900801803801800001801A01800120800600000008448301280EC0FC0600007ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (602600000000 0000000000FF86BD000001205001880011A01E218858418018018000000806006086004407B022268048060060000060C081 208E34A00E0000042060420020408060060000068C6046000000000000000000FFA57D00400501B8018000010618078E3819 869049804004000600600008410600218640400600600440001A00A00600308600002621060246200C6A680780298601E106 080000000000000000FF1FC5000021140043801001C01801809D0180990B800000002E50600610700F80A006004106402000 0060008020060021060000270470120060080A7516C8E206006006080000000000000000FF5CCC000011010801A01241001800fae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (206016006007 00600600040C006002002000006436C9802E006006000000000000000000FFC89400404180002D9080030018298019438234 0980400608D6406100885C064A2C0680608600E00400014E806917446006200084A302A24022048A69864020061061060800 00000000000000FFB501000001A450058440D0921803891841801845808000025600600600450600A02610601794002000E0 0620400648400600022611600249201001720E403106506127800000000000000000FFD6E30000038C004180001040184180 9801C012A5800000100708600000491609202540688640000420000700400708C01600000604003600202500620E112206820006e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080180000180 0000600700600600600000480600600600600000600000680100600600100700600700600000700600600600600600000000 0000000000FF71E1000001801041033088901801808841A01001810000600E00680000620001400720600600600400000100 60000068060000460160060860040B600680612E006046080000000000000000FFF006000005845003001020A238518C0E01 823855800005714600680700F0800440260A610F03602040E000206000306006200896346546C16209006146106006506106 000000000000000000FFF3C1000003801011980005803805821805E00801800000840780600610C0061000062260077060000086e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF1FF20880018A9001001800801C01800C31809A01820040502E1462408071001468CE80640604600C8A0083016801 006006000906026006806004007006006006006006000000000000000000FFC8990400018010010010008018018008018018 01800000600620600600640000400642600E0060004060100060000060060000060060060060002862060060060060060000 00000000000000FF118800000180100100100080180180080180180180000060060060000060000040060060060060040000 00006000006006000006006006006004006006006006006006000000000000000000FFB633000001801001001000A01801800046e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010069400001 06000806006086806041837006006086006046410000000000000000FFB460400001801001440000801C01800801A01C0182 000170068A60260060921041AE2462060060182A608100E00100000600008702610600610040740610651615610600000000 0000000000FF1512000001801801801801801803825B059041059400006557406540156B40856C0600614600632402050200 61400061060000060060460064450D6006406006006826208000000000000000FF83C42A0001801801A01001811801801809 80080180010060060062060060108B400610610E62600000600000600000600600000680600600600008600680600600680600c6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001C00000000 6006006000806000804006006806004000000000006000001806000006006006006000006006006006006006000000000000 000000FF6D23010401951801800800811801820C41C1180180014060564000060A6618096007147106006000000013006000 8020060000060060060060004064060062060AE086000000000000000000FF8F4B000001801001600E00801801800C01881D 01880000654620004000E0808163060060460060100062820060010020078018078060260065002862062860160060060000 00000000000000FFA700000001801C01840000801805804905805803820180E01680630080604204400782610700654082000026e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFC1150002038008818418418098418A18031448280000046036000000A0618404ED061160060840000060062060020060 0600029600648600600000600608602602644E000000000000000000FF6213080005B00A41C95B00C01C01ACAA132B3A8200 00D2615680088E336D20C364470B7206C2489088080A426C00A46036000C8EC96C0E8CE810D268A68C6B2683680E00000000 0000000000FF3543000001832A938018018919138019010018300000016206D160068060081060160060D688400000E34208 E05009210600000602614620600080EA1700E0164862A6000000000000000000FFA7A100020180000100100080180180080100a6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A0087918400 0D00A20A00900808A90C00910900880A80000000000000000000FFEE40040005800800901800880800800801008810800010 300200400310E01600202A00200200200800200E82E13620280A00000200202208A00046A012002002002012000000000000 000000FFA97200000018014F00810135008800100001004000000252000061960200000A42404006201200C000E3E014040C 5040000000085C0008030000000128028688758000000000000000000000FF0C190004000080000140040001001100080820 84000020080809600E090408201010088080250000006000C00000080C600000000081002000400002C000000000002000000066e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (130000000804 824A00934B2C820914914904900C80800A0C80488C920804000D00900890840800804800D109089109500000000000000000 00FF278B000005901805925015951901901801805801000000600608C00E1164C401611628640E08E00000602410600C04E4 060000065461061060004164060062064C6016000000000000000000FFBF23040300C00F40C08D40C00C50C48D00D48C5280 0114211300310200300B04244303300304302110311244350330214200149300340301304104313311308301344200000000 0000000000FF7BD808050022242028229000021224A3802202030000088184B08800800A6081080486481C8008009808108800e6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 03E40008004500004004002002004044004244C8000000080100124100104140101010100108100100110000100000000000 1001009001101001001001501109001000000000000000000000FFF232000A882400AA08A0040AA0AA0A00C8000090000000 02A82884A8110400080000220A202080020A80002002202002A80000280002202880022A82A8020110200200000000000000 000000FFF160000004840A00A40A0C800800A0AA00A28A208000802000802802C02802C0AA2280200A842800C029228B2802 812802000802A52802802A80802802802A42822802000000000000000000FF8BA700002130C0002012C020140120024328220016e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (240AA80002AA 00214A0424002A82AA0922C22AA2AA000000000000000000FF2C2F000C000100000420282002000A80020000040001001000 0200000000001282280010890D02020000208C00010000000002304000800203020000004A02000000000000000000000000 00FF183F0000AA1022AA0A00920AA0AA0A80AA0080040000000AA82A80882A82881302C02302A82480804A82083082A9288A A80002A84A02102081002A82A80402002A82A8000000000000000000FF6B9300013430235431030015415420231034C32000 00000550D10930C40950A00900CD0440400900D50C90410D48550D50000880928C30C88800D50D50810820D30D30000000000096e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060460040 0600600600620620410600602002E00600608608600600000620610E00600010600E006006006006000000000000000000FF 65C30000012D12002404022012012002002213120000804804844800800908A40A8081480480CC80A008088B480008C00000 0800950C40C30800800800810848800800000000000000000000FF9A6C00020080480080A920800800842800892820800000 000200224200204210A0521020020C2000002122002002822002000002202082102280002002422002002002000000000000 000000FF909D0004AA0000AA0940484AA4AA0880AA10000000010002A82880882A82000000012202A82004000A82412402A80056e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFF5F0 002000801038808800800020940804808000800000200600040200200A00234241201610600000200A012002106002001003 20300300200002300350B483043002400100000000000000FF6323400D014804004004004024000004004014000001005001 4540090010110010010850012014003810112050010010000000000002080010080804082800000000000000000000000000 00FFB7DA400440C88C50C10C00D10C00810C00D40C00810100300B00210B0030430230030830435030004030035030030030 02010002002202003011043003512142402002000000000000000000FF3F320140018018018418018058418018058118018000d6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000064964 8654E0000360660064A644630E0A0000000000000000FF697200000180180991100100004180902000004180001060260A04 0800C20200210654000608601200210610632600600600000600604600604210408610610608624E0A0000000000000000FF 761A000800004080084002008000008048000040054008013014E1560900500082000A012002050800654008054002800808 00002102205404A8510300000008500120000000000000000000FF7F27008140008000040001110000011003140000010000 00284561060000400200002040C0100240056000080100100000008000000080000000800A008000202000000000000000000036e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600604000600 600400400600000610EC0000400600610E80680600004E00E0AE0A6800006046206006306006000000000000000000FFFBED 0000018058318138010010018010238A5005800022E0060062200040520C20040040060060802002940064242A6004000486 22620640E1000065060C613602E336000000000000000000FFE30E0000018058018448210A10018A3000011009800000E406 0060061460AA01203600C05604620010620604E0060B601610100708708700E30822740740704F0070062000800000000000 00FF8EA30008018019018298250B01A180301406918F854000E31601014602628206240E000106006100084046626006006000b6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFE8B80000 AB8238838018AB8AB8AB8ABAA8103888800020E2AE2AE28EAAE2048842ACAAF2AE2A62000AE20CAAE224A56AAC0008A7206A 070064002AF1360269168A6836000000000000000000FF68CF0002018418010208A180180180180008180380008068060062 0000610C00400600780600608020000C00600401600600004E02640E20600000600601600E206006000000000000000000FF EBAD0000AB8998118058AA8AA8AB8AA88CA018ED80001C62AEA880882AE28421CAACAA82AEA361004AA066AAE01600E2AC00 00060860060062002AE00E01E646006506000000000000000000FF2AAC400001821905121800800801800800011C018000000076e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600600690 6000006006006426006006000000000000000000FF7B764006ABA890AB8880900AA8AB8100AA821C898001AAEAAE28E2882A E0062AF2AC2AAAAE2AF0042A81062AE2AE20E2AC00042E9268060070042AEC0680E04E006026000000000000000000FF3D8F 000A01A81041349A01000801801001051A0180008070070060460070D644600600200700680000710400710410600600040E 0CE156356900004206D06006216006000000000000000000FF252A000155913155113005154955943154A2D9518000557557 556150556446556556D52557556404150426D56556CC6D560000862160C614E484554156346506136336000000000000000000f6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02640048E006 00650C006006006004000094006404006514000116106046016004046486106056056046000000000000000000FFC1050000 0182182192180202180180400A801801800000600600600602608610E00412C00600600020620400600400604400022624E2 8E28600048400E00E00620620E000000000000000000FF607000000182380104300A0018018C2000911C2180000060060460 408041460060040040060068840008440068048A6804000A8628E2D6236B0400432E326906ACEA8E000000000000000000FF 82D7000001801001A00A200008018082008038058000006006806006006C0E80600480200680640000630C80600400600400000ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (308B00015591 200D90C93191395595308095108D800055655655653040E4465521025465565540045500965562805565160003560D605641 600444E42E286056056056000000000000000000FFFD8B800001801001800851813801841900841801800000600600600600 610610000200600600400000400400600000600600040610600600600000601652E206006006000000000000000000FFAF66 0000AB8C98018098AC0C98AB88802188B88900002AE2AE28E0AE04422E2260242062AE2AE0020AE0242AE0BC2AE044000006 00600602600200E026276686086086000000000000000000FFC09900000180390D0050000038018401008418258000006006008ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106046016004 0074C6107056016046000000000000000000FF89AA0000AB8AB0AB89088D8C18AB88183110481180002AE2AE28E28E2AE226 2322AA2562A82AC0000AC2AE2AE2A82AE2AE0000060064061660002AE1062262861E6486000000000000000000FFB71D0008 018000A184080180180180004D002021800000600600600008609400222A00E0060040060004260060200060060000064063 060A6006104086006106486306000000000000000000FF603A0000AB8AB0AB9428818818AB88A8440100A380002AE2AE2AE4 AE2AE2362222AA2862AE2AC0002AC2AE2AE2A82AE2AE0000AE42E12E20E0002AC22600612E40E12E000000000000000000FF004ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860008060120 1A6FE09C81C0000150274061D90068262082460860CE006020A02846067016066006000000000000000000FFD05500000382 2C83829C01C21E01C0B001021001802100700600E00100644600300210722010600448400608600700602620801600608E00 6025104006006006006006000000000000000000FFB3BD000801800001A3380380980184180A10B045800000600602602600 700E00A00209600000600200400600600400680600022624E28E28600280400E00E00620620E000000000000000000FFB49F 000001801C01800841A23801A15100040309800000700600600000608608200204600100400440500700600280600600011600cee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800411800801 8A880104BC218509000280C1808100610E40820600208708300A10E80610621000C5268562B74069163400062060A6006000 10212E006106406006440000000000000000FFDE1A800001801A01828C0B201801C2980A00280180000070065482209004A6 00A00200600240400041400640684200600600005601600600600880204600608E006006000000000000000000FF00008444 21800021900813001845840800084001900000600654604008208702200380610420600000404700740400700608040610E0 0600601021210E006086006006000000000000000000FFEBFB8028039A3483A80801201C01A038140A020188200071660065002ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060000440 56006006006206200000000000000000FFBD21000011901805800931845821801824104003084004640E0881264260CE2020 4240E21200600000400E0060064160060000060060064165200060064C628620E026048000000000000000FF23300000018A 180391188181180180182280300301200263064864A602242624A0A600600C04604000400E00650600614640000640614620 E08051210608621606E206000000000000000000FFF1A20400418010418028298418478018008810090A0008E10602600020 020E06220220666412402010400610640000E02610000600604600622033A11622600E006026008000000000000000FFF37A00aee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20224062AA2A E2020021002AA1A22AE0422AA2AE000002002402762100182102202282182482000000000000000000FF9E5A000000020000 00100200000002C411901000000000000002620602C1000080040000040000000044000004A0000000000110140040010080 008480100010050040000000000000000000FF876180000000A00000002000000010000200A0220000000000006026200208 4C00000001282C8500006010000008000000000240208288080400440028028020200208000000000000000000FF57870000 01821801823801801803849300050949040008E00602000000600610E28A10602610640800C54603602E00600E0A00060060006ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (558099559259 55D559558A3C819259558001557D5655411748655600C136556C0CD56400156556556516D575560003560D60560164005164 4E2C6056016056000000000000000000FFFF510002AA82A8AA8AA88C8AAAAA8808CC8088A880002AA2AA2AA08A2422CA0822 AA2AA32A22A2002AA04AAAA4122AA2AA0000AA42A12A00A20022A22202212A42A12A000000000000000000FFF58E01000014 200001040000000020844C01000000008000000002000480000C02010001240000800000000000400040000000004003002A 00800200800001004A0300000000000000000000FF91B40000AB8808AA8AA8890AA8AA8508A086488900002AE2AE28C08A0900eee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04000A802802 8020200208000000000000000000FFF2A4108000100000000000000000080100444000000080000000000002800023103100 0000000000000000000500800800000110140040010082000480100010010040000000000000000000FFAD218004AA800EAA C208AA8AAEAA820820C808AA80002A82A828A0EA2822AA4030032AB0222AA0006AA2ABAAA0032AA2AA000002002002222000 2020022126820A2082000000000000000000FF700C800A011000010004410012014024001000050001005004004440100000 034000805005100000000400804100804004000400100000000000000010508200000000000000000000000000FF77AC9001001ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000088002122 022000C8208280240340A10240020A002002A08000002002002002002002000000000000000000FFC9520000000000000000 0800028220008000800000000000000000000018000008204100004000808000008098888002280000000000000000002000 00220000000000000000000000000000FFA58C0002000000000000000684400B000800202200000A08410000000000004002 009A0000000002000800080000080000000000000000000000000040019880000080000000000000000000FFE08A00040003 200028A00040000001240A008000000000080002020100000008050000130800050000000000002800000000024020828808009ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0860800D8084 08489F6800880D80800008221A222002002002003002102003002000002002002002002002000902A2B80200000110280381 2002802002000000000000000000FF9356000401881881801809C09801081881809801800012602600400600680600632EA2 E14620608250780480EC8E51610E400416806006200000006006024106006006000000000000000000FF0C7D000001001001 0000010C3185040438004544000002148409D2006200040048051000040E4000000104100004004444000880800801010000 484800C15000800100000000000000000000FF73FB000000900900800800C00A00A00C00800A80800000224000A802202002005ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF24150000000000000002002000000000010012000001000001006006000000000800800000 000000000004000000000000000001004000000001001001000801000000000000000000000000FF520E0000008008008008 00800001A0080080080080000820262240020220060020060020060068000020070030060060020000020028020000000020 42002002002002000000000000000000FF397600000000000000000028251020065010000000008205001102004010002040 00000001120800001000000000000000000000450000000000000800000000800000000000000000000000FFC64E0000008000dee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (262D63564062 0200600010414600E006000206102006010002006006AB6844024204000000000000000000FFAEE2000001805C11A4585180 0100411040800B01800008630600004622600601680F00620684630000600000520E046106000207426456100491406D4650 6406046006000000000000000000FF890B00000D88180180188184C000001111801843000000600600020008402600624630 6006116000006000004006016006000006006006440000116006026006006306000000000000000000FF7F70000000000000 0000000000000000000000000000000000006006000000000000000000000000000000000000000000000000000000000000003ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (803101822841 831100800C01800014ECC701004000500600704680F00600600000680020E03700610608009700002601000000680C840084 000006000000000000000000FFC18B400041CC5C498089118528018290C880090480000864860804A654220710F01602E096 24610000600100722E02608600000640202630000940E20680F424004106000000000000000000FF2D3B004001C01801A030 61811408A0164488883180008050361065000060067066960020368CE5020110010840861064060000048A270C5286C05C64 A4414410000114000000000000000000FFC29420004B8418418318018010908410019118018000806046106106006426D06100bee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060164020060 06000000000000000000FF5E50002009901801E04941C40821C09201801809000004601610608180608E0060060060478060 0400600681600620600600002E006206090004006106006306046806000000000000000000FF8D1300002188181180100180 1809803144866C818000E0404702644600608E06618603202608E9000001870060162061060006243A89444204D80460E400 4000020E06000000000000000000FF1B31000621801801800801C15809C45200E00900800110C30603600000600648644E04 200E12F200008006206026106206080104A2900404190030620EC52008004116000000000000000000FF4704000011801811007ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (24AE00600C00 0041086036106106000084006884009404006004044A02882006000000000000000000FFA0F9000001821821A01043800805 841100928A8980000048060060061060068062060822060160020018268860479061060000040AE804008282006024044082 802106000000000000000000FFAEE80000018318218250338609318390008208EB00000460069E600000C0BE876856006956 02E01400601E2068060260260001060AE106040004026684808006102486000000000000000000FF6AF60000019059098C88 01800C41803001801C05802000400600600601694600680605080604600401000640600E846026000004006004000004146100fee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7BA19A018618 00800801880000C01684E00628400614F00E10A00700600000010600600600600600001C00621C0200005071240C400205A0 06000000000000000000FF8857000001825811A10011A01A1780580091080100402E400E82620180608601602719302600E0 040100060070060260060000040260050401053860C5020902022486000000000000000000FF69A7100005801C1588110184 3801C05808802B448221004146006006026216127006022006006514230100086006006006000284086144D1100C84620C00 5402102016080000000000000000FF79FB000001911B01D02001A01C81A01900800800000080500600600108600600642F020001e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600600 0000000000000000FF5CEE000000001801001C01801800001800800001800000600600600600600600400700600400280400 0800806000006006000006006006006005006006006806006006000000000000000000FFCEFF000000001210001801821A00 203801804081A04002684600600108630600402600604400200420000600600602600600040690610622600C006C07006006 106016000000000000000000FF1CDA10400C021A03501B05C03804201E09800025B40049688701640622600E01500E82E005 00AC8C028806886006006006000106826446116004846036886406006106080000000000000000FF3F3A00200980180180100081e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004080002 20600200680600000640600600600401E007004006806006000000000000000000FF16B5010000001803001A01901C212010 0508100580C100F03640E4800364460372A70B600602400094001680610604E00608141680720750E0010068060050060070 06000000000000000000FFBBD110400000180100180180180300108100100180004062061260060060860040060060C42100 04000406406006006006000006006006006004206006004006006006000000000000000000FF45F100000000100000180180 18000018008000008000006006006000006006004006006004002000000000006000006006000006006006006000006006000041e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1A2080180440 080994208260272062080B648EA0500400710C02209000100680612609605600000600600622640100600600280600600600 0000000000000000FF456B000000001801001C01801A4080188110081188A024700E20660600E2A602D0A420E2AC04A04002 020E00608606E00608020E20600644E401406006412007006106000000000000000000FF1DDE000000001000801881801910 28168D00000195400061574061101565564062D6826116416314100002046152116C560008060069168070AC046806826006 046806000000000000000000FF3FA808800000100080198188780018100100018390000660060060060060068042064A641400c1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106406000000 000000000000FF49980000000018010018000018010008018010010000806006006000006006004002806004802000000000 006000006006000006006006006000006007002006006006000000000000000000FFEEB5004000001004801881801C45881C 04181A01800081644715010684680600720482700644E00000100480600400600600080600640650600040600600A0060260 86800000000000000000FF8CFB000000001E01001801E01889801C91201C010080006096000101007026006154006006A062 2008000502600C0264060010078060960060A8246007222006006007000000000000000000FF06F9000000001000801801800021e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (22028001C002 300810000000401A00481000021C0000200180600000000000000000000000FFDCBC080000081801885860301803000A1188 B0418000786416000000A0680640620203E01E00600000200004600000600600008620618600600021628604620608620E00 0000000000000000FF7E390800902A1B098C9A50013A89200943A4D32D000120605680088624E0268B6D02B4E8AEC16820A2 0840106AA10A68060008AEA56C96906800B068C6886D26A4E82E000000000000000000FFA58F000000009825801900121805 10081188100180000C650751601610628E20602200640610608110848820E01021650600000708602640702884E20625201600a1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200200300208 0000811028B08810C002242C8090845000040880C00814800844204900000828840820400860800800980800800800000000 000000000000FF1B17000000020840C08880C00988880903040984800000700600400200600A0221020824020020100161C2 08E08200200200000200200200200800206200A022032022000000000000000000FFFBB700008C1042800000100000051040 E8025010000002028000658E0C910110540000026138004028462C20050D5286800005004082002901100285000340081480 00000000000000000000FFFC0A0000000000062001000A4000050400010022000004090009600603108001002170008040810061e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000000000 00000000FFAE900000000002002014000452242202012002100000A54004804A00A8C004000800D14000800A008B49248050 04005004000C00A80808000C00800C109008288108C0000000000000000000FF8F7100000410580580180990580384182193 3851800011600608C00600E90614630600600600610040400C0060C48062060002C620610611604811608602610601600600 0000000000000000FFD372040200600C40844CC0A00C80D0C910C00D048001422C9300330B242003C0B01252BA3332304901 35422434133020820010030C30234030810234231130032C3002000000000000000000FF272204040040802826020840A20000e1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8550450D5155 0D50000C808908A0800C00D50880D00CC8D30C00000000000000000000FF247100080000040010C000004440000450420440 00010018010010010200010010010110000010010000018010000000000010011010010010010010010010C1121000000000 000000000000FF22CC0008AA0AA0AA0000AA08829008A0AA0AA10000000002A82884A88002A82A8AA80002A82A8000200200 2202A82A82A80000284400200000002A8030010200220258000000000000000000FF7AEF000200400A00B54800C00808A00A 00A00AA28000880000822802042800802002842803002800802812092802803002000902852D02802800802902C2A90290280011e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (820260300000 2A82A82884880012A82A82A81402A92A80002512002A82A92A92A80002AA2022AA0020002AA2AA4600A20222AA0000000000 00000000FF498400080000040041400000002004400000002000000A10000200000400000000008000000000002C08010800 00000000000028000408000000000220020000000080000000000000000000FFD1220002AA0AA0AA0402AA4A808A2AA00410 810200002A82A82A80A82882A82A82A84002A82A82004802A82A82A82A82A80002A82482A80002002A82A81084102082A800 0000000000000000FF68B50003543541540C01543343023103543542140000C10550D10930C90D50D51550348D50D50C00800091e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFBB790000218018258018140AB811805809801821100004643600400604600610608610600400600002400608610600 600608002608640600E00000E006006106406006000000000000000000FF938D000200001201253000021201000200290303 0000800804844C2000480080080484C804804A0088492C804800804804000800800800800C00800800D10800808800000000 000000000000FF307F0000008008009008000128448008508008088000002000002002B3000200200228200200200002A002 002002002002000002152002002000002002002412502002000000000000000000FF7FAD0000AA0AA0AA4002AA2800882AA10051e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500004000800 2000C8200020110200800008900210000000000000000000000000FF5BEA0000208008A28008000EA8200008108008008040 06A00A14008200600200A10200E0020020400C241211601A23E0020810031832030020014832022031832030020000000000 00000000FFC98D400C0040040040040040040152040040440100010110055440090010214110050D16050051491050050010 91000000000200000080001000108410500400000000000000000000000000FF94E3400400C00D00C10C00400C40C20C04C0 8C00800100300300230B00302304324320301300B01300300340300322B0024003124020A210340300200300200A0020020000d1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (98028E400162 460083B600620638E2460160C820600801006600608600602600000641620610E08004E0CE29662627619630000000000000 0000FF51A00000010018039058140018818420010010A1900028600E01004000600620E30E00610008E01010201621600600 6006000006106426426130086016102086006206000000000000000000FFED140008001000040400400000900220440200C8 00002880B0206016400020000050110040110080110000420220000000000000210040340248140020050000010410080200 000000000000FF085D00000000000000800A00000808201501204008000042205462060200002A44A042000C0080A00440000031e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF98A140000192184180180000180482004180280480000020060400060060060D28160064C0086800450006006022006006 00000600E046346800306046206006006126000000000000000000FF206700000101188B8018240018218038010219208000 00000600602000600420010600601420E04000012600608C00600600034E44650600E0000465060B61364262160000000000 00000000FFBF7700000102180982184002180188182D029812800002228632620620622600200608600C2061400202060C65 4C01602600100700700700E201217106427047407006400400000000000000FF12BE00081912198988380A0018718800010000b1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08D565560000 964161560260043561164D204648E126000000000000000000FF771C0000018C18A98AB88A0ABCCD88DC8C88D83000002A92 AF2AE08E2AF2AC3292AF2AF00700E8202212A72AF280AAE2AE0012074070B70270008974360A680742610600000000000000 0000FFA472000001801843801800001C0280180CA48A02800000300700620080700500108700700712600080108F00712200 60060002460A6406316000006046006286006206000000000000000000FF1FC30000018038058AB8880ABA8988808B8C9908 80002A8AAEA882882AEAAE802226AAE940826000190A0EAAEA42AAE2AE00004609640E40606000E10E00675609E4560000000071e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800080680680 6046006804006006806802C4680000090680682080600600000600600688680080600604A84E08640E000000000000000000 FF5BF14000018AB8118AB8880AB8A108800308100080002AE2AE28E088AAE2AE2AE22E2AE2AA007001AA820E2AE2082AE2AE 000026826006027010006406202096846036000000000000000000FF70BA00080180D8018018400018010400400018048001 0060060062470060040060060064122A600080001600601000600600011612600611600022600640A0061068060000000000 00000000FFDC720000019559019559521559311541205032A8800055655655613155655655644E556552216014550446556400f1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFC3 F200000380180180180000180502384404500280002160060260000060240160060060460062245100060064120060060002 D60060061060244561061040060C60A6000000000000000000FF5D770000018018018018000018000098000008C080000260 0600640600620C5060060060840061000000060060C000600600000624E50622628008645604E4C620E21600000000000000 0000FF59B40000018018818018020018020018000280A4800000600604620000600400688600600411601000002600610200 6006000A8E48EACE2160102AEB2E086206457086000000000000000000FFD90900000180182B801840001A110443490038080009e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E2AE00002E02 E01602608024612631003602600E000000000000000000FF825A00011395415515580195595291195084D88A000000E55655 61305564064B25565524C25561061265565561065565560002D60D628634630640E2464422462460B6000000000000000000 FFA3C58000018000018018018018048498008418000000016000006406006006100006002000006000004006006006006006 000506106506406410016406002486406146000000000000000000FFAD840000A98AB8AB8AB8000AB8A90818880898088000 0862AE28E0AE2AE0840262AE2AE20E2AE0000202AE2AE0002AE2AE00000608602E00E04000600621410E00600600000000000089e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (016804006440 0068060110060061400062000068060028120068060000D6006006006008C561060020060C6086000000000000000000FF31 F20000AB8AA0AB8AB8018AA9F08A488280504100003862AE28E08E2AE2AE2402AE2AA2402AE0102AE2AE2AA2222AE2AE0000 0648606E11E00018601606200E116406000000000000000000FF313400082180000100180180180082380490184000004C60 060064000060CE00200600201200642040E00600443400600600000620603600E0000C610E08201608E20600000000000000 0000FFF53E0000AB8AA0AB8AB8018AB8008818AC88990A00002462AE2AE0AE2AE2AE2082AE2AA2882AE4802AE2AE2AC2B42A0049e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF445B80 0C09C00401805C01809840801C20A118008000025006006186007006C8100602280080600020F4160077068870061B000682 6406006040A16086042506006006000000000000000000FF7F37000209A00001401A01C10C95800843C01000000108700600 605000710E8A000E32E21040600500702720B04310700602000602600608E004426117006026006006000000000000000000 FF2C08000801800001001801800811808C41D010480000026002026006006006140006000808806108006006002102806006 000406A4E5062A628000645648C4C620E256000000000000000000FFFCE5000001800201801801800804802810853105000000c9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000016286006 016040006086000206206006028000000000000000FF701B8000018000010258018808308048208218318000281086000006 08E006A0201610600203628000ED07108090C068060000060262AE0160B014642610609614E006200200000000000000FF9B 8D808001808041A03801A02B0A800900A8380180008040045500291068064020C648611242604100600E5008A00060060080 0620628648600004E0170C22C6006006000000000000000000FFF2D681000180802102180180580080190090580080000240 424D6001106007002347802082026020436006086006006006000016406086206000006006106006006006000000000000000029e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0041000040E0 0640604C20600604E2D000628609000820604600000630600600600000620624E406486206000000000000000000FF565300 002180000180180308002480410A8058B5100020608612000E0C63160063040864B600600000604E20014010601600000604 64D649654044E026004016046016450000000000000000FF157200002180001980586300101380108B801883080010E0060A 600E00608E0142842162AC00602807600E20402400600600000600600628621030E10632E10601620E000400000000000000 FFA1A80000018000018C180102104082100481380100A010624620E00022631604C43401A40400600004646601400408602E00a9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFA4AB0000AA 8001008AA8C808A0AA8880AA8880AE800022259228808A2AA2AE0222300020022AA0420422AE2022062AA2AA00000248206A 11A002102012450002112402000000000000000000FFE28A0000000001200000040000010040010000010000000400026006 00000040401000044400008000800000410C0000000002D00000004004004502400000000800A0000000000000000000FF38 3680000000001400004004000002000002200000000900280062260000000900802A81100002404A00001480400000000000 002485000C01200801105484C8228210000000000000000000FF2AFD0000018000018C180102000182002184180100A000E20069e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001005000000 00010500004480400140000000000000000000FF263A900555800155D5595590990B909D05955D1580001568565545575575 574D65564C7456556000D5755644C4155575560002D60D628654650040E2C648E2462460B6000000000000000000FFC86500 00AA8004428AA88A8888AA88AAAA8AA8C880003220222AA28A2AA2AA48A2A20D348A2AA4004832AB2A22432AA2AA00002A02 A0122222A024202210203202200A000000000000000000FFBEF6008000400000200000424020022030001040000140030000 40008040010010048081010044080000001050A00050000000002000300080080C000802001008820000000000000000000000e9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000100089 00004008100002000010001200810010000004002485000401000005101004C0220210000000000000000000FF449D108000 00000020000002001400212000021000000300D00004008000000000000480010000880000008108500000000000D0000000 5004084500404480000800A0000000000000000000FFFB1A8000AA8000AA8AA8AA88AE208888008AA880800000200228A08A 2A82A82222AA0822A32AA1002AA2AB2032022AA2AA00000208202A00A00008200200210A00A002000000000000000000FF2D 4C800801400208401001245000041200001000000100900000404100400482100540084100408100900500D10C80500400050019e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B2100100840A 10812800804800800810844A88884004100210215240204A002002803203082000202082A422820A214A10000204A00204A2 B0002002412002002452000000000000000000FFAA4600002209000008000040000000800000000000000000000000000000 008000008000000000800A0408008030210000400000000000000000000000800000000000000000000000000000FF058D00 0400000000004002188000004420200000000000000114000000000000000028000000000080000000000000020002000080 0000000000000000801000000080000000000000000000FF525400040000000000000000008002040C0000220000500200020099e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0800000000000000000000000000000000FF9AD5000000820C06804800800800840802A00800800100301200A00206200200 3802013002002200002002003003002022000002002002002000002002002402002002000000000000000000FFBDB9400023 85100989580188D801811C09845D119040027006084156406056006006A0740790600028650EC4E506156156500006856007 056550806006416006006456000000000000000000FFABE63001031014000000054010830202E80AB028000000420C204008 000000804820108004004101040001284054604400040001000000800000000000000200000100000000000000000000FF2C0059e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF24180000000010 0000000000000000020000000100000010000060060000050008048008000000000000040010010000040000048000040000 01001000004000000000000000000000000000FF5136000201A21A00A00800800000200800801000A0000064060A80020020 02006002002002006000002003002006002002000002002002002000002002002802002002000000000000000000FFC91A00 00042000002000001000822020B40AC02820010000012040100000008000200000050002000000005040004000200000000000d9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000380000388 1009819101001801801869000080602E0060060C6086006C0600110640600020600680702690602200082280688000402020 6004802086004A06000000000000000000FF707B00000D800005941841A40210001809911C05000000602600008640644750 6106040206006001006C4640632644602E100446006120004240D06414007487406004028000000000000000FFFDCE020001 800801801809800000001881003889000005649620040011408602E046408006006050206006006006006206000006006200 40400000608444600E00620C000000000000000000FF7F7000000000000000000000000000000000000000000000000060060039e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (30D900107004 01104C014006000000000000000000FF086B000401840401801801800A0080180B923A21900120600E4400000860AC00600D 146C0608600190500402688600600A00000A4A5206414080004484008056804006000000000000000000FFE2720200018000 00820821E40888801090909885800002E0062000060164270071262361062060000064470060060A60121004020062202062 0010610D422416004006050000000000000000FF6A5000000990040110100180104100180181381100008062860062802264 046AE344410206006028044404306286F06240000000014014144000D0420440280421480E000000000000000000FFA2BE0000b9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C60560064964 0604601000704600600600600E00100700F020204000006004046004026026000000000000000000FF8356000001800000A0 0001800800815803001000000040680780600022E80600780634E40600600000600608680620600600000610634000400021 6006046006006006000000000000000000FF7C9700000194022330902180180780B831955810800018718600620632F55442 6304806006106003645464E072060060100000900140B404400200CD1E421004004006000000000000000000FFB8AE000001 800022008841801841801020801840E800006016427A000040060464560078060060001060070262861060200000802468000079e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (808002000C01 D21C018012020C182800000260070060004462240060448464861460A904400400E006006006000006004020006028004006 007404806006000000000000000000FF67550006218000A5001001800A008018018030010280886006006086027804206824 0278461060A082400400F846406106000806404804006128004004006404006106000000000000000000FF5BF60180218000 A180101FC1081084B829001041000088602602609000609C12E00420E12600600401C02414600630608E0018060048068040 840140048260061860A6000000000000000000FF7CD5000209810400008001AA082080D84B9410100000846026046006204200f9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (105464060060 06042106000000000000000000FF1ADA000001C020111012A5981805841801801920000003602711600600400400608C8860 0600600000400500E00608E10610002620C2E41260000A4206426004606086000000000000000000FF95AA40A00180008809 2803C11A51841801005C82050008E08608E01000680450E00490620E08600400C004146846926006000006C1400E48420401 4004206804066026000000000000000000FF7E0B200001800043009001841945831510805A10020040600702650790614400 680422E1260060004040A448620E206086080216004007414010204005007405006006000000000000000000FFC7940000090005e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200400600600 0004004004006006006006000006006006004004006006006004002006000000000000000000FF36B8000001800001001801 A018018018000000008000000007006006006006002006806006800800004004806006007006000807006006004000006006 006804002006000000000000000000FF86C6000001A00000005A01801C21801808202008820000200604608000600600000E 0C689608600400E10420700612600600000600E086204404006006026406002026000000000000000000FF7D3F0140018020 C5011B4184190181188020002280004C012600640610712601008620EA2680680040602409621721680600025640621603400085e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00001C118669 43BF428001400180008A000700600600600600080E0067060868000030060060060060060008060060060060000060068070 04802006000000000000000000FF6CA8010041800201801801A0880580012320101580C00C854E32E0A804E44E4004AF0C60 461160040025448360A600704E000486806006804004806006006016006006000000000000000000FFF63F00000180200100 1881900811800001001021900040000600600640600600000641600E2060A800201400600600640600000600600600400000 6006006046002006000000000000000000FF98FA0000018000000018018018018018000000008000002006006000006006000045e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680600608600 4006000000000000000000FF5E9E000001800200005201B01891809AB2800808912080230F5360A902633620222A00834701 655000680600E126A068B600000600E107806000A0F006036006800016000000000000000000FF6BB4000001800101101001 801B21801944800A3888A02082AE2AE0A622E22E201AE23A04AE20E0A80062AC00E0A640622E001286006006004550416106 406006100106000000000000000000FF6C18000001800020805801900811A1201030A0019140040356D5655004655644050E A56156016D4C00200681654700655600000681651600600400600602E90400600E000000000000000000FFAC17008001802000c5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (406004890000 00440E12E00600602E00000628628620E00002628724640440C026000000000000000000FF0FD6000001800001001A018010 01801C0100100180000040060060000060060040060060040000000040058060060060060000060060060040000060060060 04000006000000000000000000FF1BB10000418000A0881511910911816045817A050000002006000017006006002006A900 06000000000006044806006006000006006006806000006086206056084086000000000000000000FF705800060180000180 1001E00801800401F11801E00004204600020000600604288302181600000000000400540600640780000600640E0042D0000025e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060A22240000 010E0000000000408820296007008A0806846002008812009020000028000110000000010000020040000060000010808000 0418000000000000000000FF4DAA02032180880188185180C1718800810D1029800000621602000011608600609609602604 000008808604640628600640000638658638E40014E01E006014006186000000000000000000FFEEA40200B1B12309D29821 84A341A4C28D3232918000C260AE82080EAAE126944826946AB6C40890B288A6C06AB6C86A86040AA680684E886890D16856 88E904806B16000000000000000000FF5E6100000580002380380B901209901841009023800010C206D1610600620E00E30600a5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (11304310350A 000000000000000000FF74100004492C021A2050005C000022024020A2D60000801080908840884804000A00801000A84840 800C00908889000A00000A80800808810800880AE0800A44800800000000000000000000FFE82E00048080196494A000C000 0885E810900800800000300600400A00302210200220220200200801622A00300600241A0000220020020020080020022020 00002022000000000000000000FFCD5200000210108002042000028010002102510000002A40080061962200108841001404 0040C1001641000202200001E00304000000600400900201000B0400308200000000000000000000FFEB64000004002000000065e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02802800A22A 028030020028D2800832942A02B12810832882C02882912812000000000000000000FF4D0700000120123228D00102104123 02C02042220001000004804820824C0C0009409000010048088148B0001004804A00000A00C08948840800A80C20800A0C84 08C0000000000000000000FFB0C6000243901101943801905801801815905881800000600608C04600600E00651608EA0608 40C00A400682600610603640020600600604600810600600620E006006000000000000000000FFC83D000100C20C34C00A28 A20B28D34D40C30C4C800120281300311208A00394302302300342301100B2831024020033020110830832C350B40122312B00e5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (152110314208 3143300000550550D50930021080D50890D48550550800881050D50D50550810800840AC8808890810940A00800A20D08C50 000000000000000000FF081F0008004004104122000124044004204004000001000801001041000001001001100001001001 001001001000001000001001001011001001001001141001001000000000000000000000FF3E3B0008AA0800000200AA0880 8C00000008808800002A82A82882886000002A8000220AA82A80000900002A82A82A80400000800000000000000001480E81 20240300000000000000000000FFF40A000200A54C80A00800A02A02B04A0CA40A00800080200284280288A8C2802C1280A00015e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020020020000 00000000000000FF052B0000AA0AA0460484AA2C00900AA0180AA0CC00002A9AA82884882A82A82A82A82202A82A80182A82 A82A82A82A82020003822AA5422A80082AA2AA28A2A82A82AA000000000000000000FF8561000C000B41400A420040042002 012204000400008010000002010882280002200010008000084205000000000003000002900002A024000041000829000800 0000000000000000000000FFF66F0004AA0AA0800800AA4800A00AA0820AA09000002A82A82A80882A92A82A82A82292A82A 80002A82A82A82A82A83280002302A80002A80102A82A82102A82A82A8000000000000000000FFAF7A0001542002142101540095e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (311105300300 3483550002002002002082413000012412103082002002000000000000000000FF7A4712004100380D801801901801803801 8A1801810000601640400600E51643620641628600604040400620E006000006406036006206006200006006406046006006 000000000000000000FF6A540000012002114402010294092002002002000000804004844800804804800800800804804800 804804801004000800000800800948800800800800840800800800000000000000000000FFCD450002008009209028008028 42800924800842800000200000224200200200200210A0020020000020020020020000D200205200220200200000200200200055e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000090800 00000000000004600600809024C5000A840000028800C000410400D400000040400004002140000002080808800060000000 00000000000000FF306B02000180280B0008000C4980822820830840848001210A0480024066020021022020860021203220 0209208210880220300B043402002201203103202422003002000000000000000000FF90ED400C0040040040040041050008 04C2402000002100500524400900102500102800102908540100500510100400000000000000008000100040800000000000 0000000000000000000000FF6D6E400400C00C80C00C00C40C20940D14C04800802100300301200B0030230030D20C30330800d5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (700600000000 0000000000FFE0F20008039E38098A78420098038C20A08E0045884030610620020604640E1180020764160062006105EE11 600602000E00600600E00608623000E20609E00E0162A6100000000000000000FF6A8500000980191194180C029801900009 88800903000060060A800040608E00012A08608600620000001624610600000608600601620610E080486406106216006326 000000000000000000FF476F00080800008001003000000002800A00010C00A0080000096006028100080048090490208000 00840032010820000010000020000801010834005002000008E000080000000000000000FFD5FA08002000110000000002800035e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (244846A06AAE 2A808600241649600600A000006486146B12216006000000000000000000FF86DC2000002258090210008018018020008058 10800002E00600000680600600012408E03600E801004416006006000006002006036026042C0004640608E0460160060000 00000000000000FF3AF30000010090A480580102580180182080002180000860060462000060064D00120060861462801501 260D400600023600054E40628E48008031602E4461100C62B6000000000000000000FF8D0E00000300380181180100388580 D8C3800081880040E00620620600E0060000020060064161000800060060164C10160030072270160022210370B70460041000b5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (213190013100 00C46D56D56550556D564C28C6556D574CE28440AD56556D5655042E0060060060465562040161161075540064C600000000 0000000000FF99210000AA3032C028B8AB8AD8AB8818A8C8B8098000806AAEA8E08F2AEAAF000004226A0E22628028E80F22 4AAE2A880E00084604680E1302010AE006C162222A6AA6000000000000000000FFECE5400200001020001001801801809802 82B80480000060060060010060060004040060068060000A60070040060000860004CE2AE28E00010022644622600608E006 000000000000000000FFBEF90000AA0818052C98AA8898AB8E808A8E81C78000B06AAEAC84A82AEAAE540F04226A062060000075e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF4CE2000001801220A01800833801802000A00041800080E80680600600680600020610E80600E200006806800806 0008860068860868CE0060008860061060000060C6000000000000000000FF7E6F0002AB8AB8078AB8AA8858AB8800A088A0 8300003362AE28E0882AE2AE2B009E2262AEA0700522E2AE2AA2AE2A802E0060268260062AF0041060268362A84668160000 00000000000000FF5FE2000C0183101080100080180180C205800001800044E00600604600600600A03609614710E8008025 0611000600052600608690634640690040694E006004006016000000000000000000FF1A0F000555B55909B551549319559400f5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE0B42AE0000 0640650608E50E00600021650601620A2AE146000000000000000000FF892900004182102280102180180180B80080188500 0000600602640000600600000E4060060060040160064040060000160162D600604645608404E20600604200409600000000 0000000000FF78DE00000B81300094D80180180184180092B820800000600600600600600614808613400600610202000600 C0060004C64A600624650608640208612E2AE082006246000000000000000000FFA099000001A01090801001801801849C0A 8218100000106006046240806006810046006006146905100006004006000206006216216206006C8422F30E21600228C416000de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (88A88C80002A C2AE2AE0AE2AE2AE2A83201142AE2AE2802282AC2C42AE00020E22002E5360262843000260262263042AE00E000000000000 000000FF8D8500015583411200B11195595594295591482200005545565565305565564825485445565560064C0556406556 0004160C005604604650C00604604E4C6546556016000000000000000000FF8AB780000580000100102180180182C8018208 20000000400600600600400600001020400600600000000600600600000610028600628605400000E29610E0560060A60000 00000000000000FF42D000008198108880188B8AB8AB8818AA84181980002AE2AE28E0AE2AE2AE2402260022AE2AE2002862008de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFBFDF000201A0010900101180080180294100081000008048060060000060060030900848070064040930020030068000 160508D600600601408404E0060065060060B6000000000000000000FFC5650000E98AA1570AB0958AA8AB88881100082200 002AC2AE28E68E2AE2AE2A82202442AE2AE0003002AA01A2AE00014621000608E01E2040007060060060062AE40600000000 0000000000FF6FA00008018000200A1823801801808801800880800000400600600000400600A00000C00600628400800414 40060000A600800651600E04428428600600600C006206000000000000000000FFA09E0000898AA0010AB8818AB8AB8808C3004de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (780600010600 000600E006006000106116006206026006000000000000000000FF15DB804C89A00035060201809881828803804C00080100 52060060C6006A06C0500001120700640001100F6074470788060090862A690601454048E08F026106006006000000000000 000000FF44BF000001800020803401848D01841803021A00080030640641648002601708200000414F046004006002022007 08000E00814632600600600401600684600C006006000000000000000000FF14EF0008038000208012238008018218151338 80000000600602602600700680200002C0060060800240033420060014C6080406246D460C620008652E2AE034006206000000cde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0100205A422E 6360002042B61040980840B60062080000042446061803060000060061060B40A00860A62264242C600E2000000000000000 00FF525A800001800100854A0180080388080188890A820000688608000600600604600020000681402208600003012F0100 060C00060AE00600E00A02600E106106042106000000000000000000FF9B8C822401800009002881820A01800C01C2280080 00004026140220336006A040400080A602421000A0000000260000160000260160060044A020600600608E00200600000000 0000000000FF6DD2840511E00000800901801801810C29C008008001807046146001C8FC0600602800040600600980401600002de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 4BA300000180090180184188000582180180388184400062362300000040270261120260C600E04800600000820610800600 00060060060C608010E146106004442306400000000000000000FFB30F0000818000418AD0118020018008818C8851090011 61061000464463161044002062060062000062000200160002061400060D64464160500464160160C4002006000000000000 000000FF4F9D000081800019881805803001905885801825888004E00600E02602600E086200124206006000106204404146 00000600000600622620600000E20644E004106216000000000000000000FF65D200000180002500102B881001822853822800ade040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000A0000000 510008000280080000000004020200000000000000000000FF7AFB0000AA9C49148518AA8880AA8AA8890AA80080001C22AA 28C48A4022AE8120522022AE24208007A2D62062AA00014200000208A01A0020001020020022102AA4020000000000000000 00FF36D000000000508000800000000000100200100300000040000260062000000060440280000004004000240C40000000 100000D0000040010000448400400020006090000000000000000000FFD8AD8000000280320A200002400000004000013000 004500000062260A80003483100800001500001000100100000004C00004002405005203000801480C811000624000000000006de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (012090040040 41001004B204040B1005000100800884145004000001000280000280C000000080901080040000A0000000000000000000FF 55D5800555F5500D913555949D55D13955C339538000556556554516D5755654755445655655640020643445455600041680 005604604655600044644E4C6556516016000000000000000000FF381C0000AA8008208828AA88A8AA8AACA88AA8A8800000 22AA2AA08A0AA2AA0020822022AB28A200C8320220A2AA00020A00002A5320230AA3002222222222A22AA00A000000000000 000000FF2A960880010010A0020000204200020000100000000100100400000000100101000408100000008015008008080400ede040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF56CD 08000000011200000001020048C00000804000008000000204200008010008000000000004000089008C80000002C0000000 2405400001000801280C8000000240000000000000000000FF490F0002004000200202000400000000002004020000000000 0000000000000100000900000000800000100008000000100002D00000000002004484004000000200900000000000000000 00FF10C58080AA8AA80088A8AA8828AA8208AA8A2C8880012ABAA828A0CA2AA2AB2A22AA223AAA2AA0002A32232032AA0000 0200050208A50A2AA0000121020122AA28A142000000000000000000FF68CB80080141100000100142140100040300000400001de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (014008010008 01000140000801005044800000000000000000000000FF68BE000000A00A0080080080082180080580080080000000202120 0200000200000009200000200080220A00200220000200200A002002002080002002003002002000000000000000000000FF 618100000008020012800000000A00800824000000002002000000000218018002002000C800000001008020002805000000 0000000000000020000001000000800000000000000000000000FF2DCE000004000000000000000100000000080000000000 0000500000000000000008000000020002000000000800000000A80000800000800002000001000020000000000000000000009de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (480002420800 4024004001004800000000000000800004000800000000000000000000800000000004000000000000000000000000FF37FF 000004A008008008008009008008008008008001002002002002002002002003002000002000002002002002000002002002 002802002000002002003002002000000000000000000000FF99DA0000018818018A1801A0182B8098058A1A018000006026 C1400600600600700600E0A802600200EC9600780E4280060870160060060060020078060060048060000000000000000000 00FF1D7F000001001000011001001000009010221000000042440402C209844024004C145040000040010040044040440000005de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF57680000 0000000000000000000000000000000000000000000060060000000000000000000000000000000000000000000000000000 00000000000000000000006000000000000000000000FFC73900000000000000000000000000000000040100000000000060 06000000000000000800000000000000800000001000004000004004004000000801000800806000000000000000000000FF 9655000000801000800800C00800011000A00800800004280728800200200200200600200000200200700600700200000200 2002002002002002802002004000002000000000000000000000FF3FA600000000000000100000000000000024000000010000dde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (220491803204 20200060502469C0226800040000000000000000FF9D7D000001A01841921811801881041831C01801800000600604602600 6486406136006000046000406106006046000806002006002082802000026044027008406000000000000000000000FFDFCE 000001901805801801901A20003841931851000050600600002600700614702609610050602002621640600F000046006517 0060460164A0D06006D26144841000000000000000000000FF55CD0000498419118418018018800018018019018000026106 00040020610600600600604000610010600610610605000600600621608600600002420600600C0080000000000000000000003de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A6000006006 206407006200207000086106006406080006000084100000000000006000084202806000020000000000000000FF767E0004 01801001801905809B08821821E01800800101614614008980600600620640620000600000F08600600601028C0005060020 80400000806104904416400000000000000000000000FFFEEF000049D4111508180990184080180980988880000060860002 0600700632700E09610032602104648E08610E05102600210E402002012280486424104847010000000000000000000000FF 2BD20000018008218018418018411378018A593100006E64060260013063064060860060204060813C60062064269000040000bde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (091A00020188 0801001841801800801001801800000010600600E00680603600600614640008600420685641600601000600600400608700 E004004002004804046000000000000000000000FFAE7E0000018018016018018118809010C1803800000000610780622030 680780780640600000600401620600600600011600E40E00610610600400400642414CC06000000000000000000000FFC34D 000001800001801845801801805899A81910000101644600633620710600600680600000680004620600600601040400800C 0100704D800000615020400201E000000000000000000000FF75A3000001800001001881801831E29801881E00E000246006007de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (816006006004 007002C06400006000000000000000000000FF75AA000001810D15449C21841801801805C018008000806087006001206007 1064060261000060042A62264060060000040060840060868162040060A208E000026000000000000000000000FF3B6C0000 0180088DA41A0180180083140582381000200060060060064160060061064061000060101478860060060000040060041064 06406310004002015802006000000000000000000000FFC69A000001AD1861815801841D0082940183B986002068690700E6 0010E02611640608620000678C80640610618600810400610608601610608C004D46104042006000000000000000000000FF00fde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (069160C60000 0E80700E00080E1060460060068C69060068040D4006146004286046445806006006000000000000000000FF3960400009A0 080182180180D801801801C01820000044600EA961060860060068A60070000060000060076170060200040060048A7006CA 60002060021264CE006000000000000000000000FFD112000001840C0920D8A1803901881801C03810000128E20600E02112 E03781610640600010600788619611E00600010C006004806416706006086423086066806020000000000000000000FF01FA 000001810801801811801809831D45881910800002710604608600610603680E0060080060140160461060061001040060140003e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001801 8018018018018018018010000000006006006000006006002006006006000004006006006006006006006004004006006004 006006004004006006000000000000000000FF93C3000000001801801801801C018018018010000000006007006007006006 002006806006000804006006807006807006007007004006006004006006004000806006000000000000000000FF897C2000 00001801841831801811A81881801020000000E00644602004600684812600600600000501608610600600600E0060160048 06006006006006004112006026000000000000000000FF827B000008011811C09881811801A49C45D05110000008650C08600083e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1600602CC160 0600680400E006000000000000000000FF626B0100000218018218038018019E0001981A1880000060250060468068860008 06186106000004006A86006006806806006006064006006004006806005020806006000000000000000000FFEBF500000002 1801801C0180180180040180180000000045264A62100064A610050640601624015400650600600600608600600480700700 6005006006006002006006000000000000000000FF48D500000000180182180B801801800091801800080000600400600600 6006000006056026000004006006016406006406006004004006006004006006004026006006000000000000000000FF853D0043e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600620230E02 421600000800600600E00600600600000400700E007029806006007002000006000000000000000000FF2D5C000000001001 C09821C01805801801C05B5080010064088C62302872A60220070050460000A080600600602600604E000006004006806000 40E00600400200E046410000000000000000FF44F1000000001001801C01801A05811C81801800080000629038642E506206 44028624408E0000A8006006006206006286000005004006006000046006004006006046410000000000000000FFBEDC0000 000018018118418018018000018859508000006546046150846B4600050E00645600014D00680600E046006056006004006800c3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40015883A8B8 8B843841801801B0A8800000816404516016006C0642700EA0A24601000202642608C08F20724620A40C2064062062020A71 16446005206406000000000000000000FF295B000000001A0180180180180180180180080000000060048060000060060048 06002006000003806006004806006006002004004006006002006006005000006006000000000000000000FF5A8701000000 1401801811C01C01808011881801800000600704040600604610300605504644000000600601700600600600200400680600 6800026006006006000006000000000000000000FFDA5C000000001001801E01801801E0000180180160000060C6000100040023e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000016802 0040706200000000000000000000FF110400202010000600A14002000000000004001000000000000960062C008848028020 8600118001000060020008200000000000600440000200000000000020046030000000000000000000FF1ACA000084081801 A8180B8018018000018029808000206098000040C0680602E80600200600000002600600400641608604661C02E006036000 3A62864CE204000506000000000000000000FFCA24000080321A31821C01A01B03AAA2B5A40A488000B268A8800886526156 88C526802816000C00A86886A4542690E89684688485682E8B6800A0EA4688EAA08008B6000000000000000000FFAA61002000a3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (812003002002 00100894204300300301300340324320320300B211083003003003323512000000000000000000FF2CBD0004004112204012 8020211036814010C2040000008000B0C800001001011024000000800810284000A08880048C508208C0800800800C408108 00800804800080000000000000000000FF27AD000000442280C20800C008828028A28A084080000225020000828070260030 0250300E00020010288640200600200220200200212A08201000A00220208000200A000000000000000000FFB30F00000002 80580000001402600802084000290000880A2000611E820200204009000020000400840A0008062008022841C100140200600063e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4A10800400A0 0800A04A00A00A208000002802842802002000002800803002800C000020030030028028028D280A8128C28A280085280280 2912842802000000000000000000FF48AB0000002012830014014010242202000002080000000000804A0000400400000480 0004800802004805001004000D48C00C80CA0A08A08802C008D0890824800000000000000000000000FFA38F000000009843 A018019218418419018059158000806B1608C00680680640680628640608840000600620620644645602E116146146406040 0160A6446024006006000000000000000000FF8B03000202140810800CA0800E90D00C20EC0C40800100300300315224200300e3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A80202A8200 288000000000000000000000FFEC7A0003543141145543541541143345541542200000550D50D10930551550550D51550800 D50A00550550D50D50800828CB0908C00A108C0800C00C10CD0D20D50800000000000000000000FF56450008000000000000 0000020440000000040000000010010012010000008000000010010014008008010010010010010010010211211410010011 010010C9041000000000000000000000FF761A0008AA0A80202AA0AA0AA0C80880AA0AA0820000AA82A82880A8AA8AA82A82 A82A80002A80002A82A82A82A8000400000420000140000200080240220210288000000000000000000000FFFF1A000200200013e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000020024 00002002002002002002012002012102102000002142002012002002000000000000000000FF9FEB0000AA1104AA0AA4AA4A A6808AA0AAAAA0CA00002A82A82880882A82A82A82A82A80002A80012A82A82A82A80022AA2402A83102022026002AA4122A 82002A8002000000000000000000FFFFDA00080002044000000040040000000040008C000080000004020080000100000000 00000000008008000000000001000000200A8000410200130080000000000000000000000000000000FF8CB60000AA4220AA 4AA0AA0AA0B00AA4AA4AA08C0000AA82A82A80A82A92A92A92A92A80002A80002A8AA82A82A80002A82882A82002082100000093e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C00C00C00840 D50800C44800800104300300A003043043003003003013003001013003003042402002002402002012403000002103003002 082002000000000000000000FFF8051040458018118018259438010038D1009801800010604604400600608600600E206006 20600024600620620614E10608E006046486006000126406046006046006000000000000000000FF60040000002142010012 0120100420020000122000000048008448208040040040008050048048008048050050048008008C08008C0848848800800A 108008A4800800000000000000000000FF5CDB0000008C0800A00800800851800801800800800080200200220200080280080053e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001302460 80000000000000000000FF87E508014400100800000210402000102000000100001200245060060001200000004000080000 004000004002002C0100000204000100000000000100C04800106000000000000000000000FFB96300200880080080182082 8C8008AC88008800800004204250C00200600200600200600600200002240200206690284208A1820632436124410A320241 2200023002400000000000000000FFB231400C10400400400400410100420000422000000100500152000102100500100918 100120100100D005005000008018000100000008001000000018420404000000000000000000000000FF8DAF400500C00C0000d3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600610010 62060061170872360060820250070060410D700600A02A023106000000000000000000FF2EE40008018518118098A1801801 88287F8638A90A0054E28610850E42600600610A00600600608020608600600600600601E60641618E586000206426426200 480026080000000000000000FFFBF6000001801803841941801801801901801803152001632E410000026086026002016086 0060404060860060460060060060060060560363104060C6046482104026300000000000000000FFDEBA00080005000C0400 0200200000008000000200C02800100064864000880C00800101000000400800000000880004080000002080000400880B030033e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB8AB8298A08 05889907800011E0062884882AE2AE8462AE2262AE0060022AE2AE2262AE0062060042121840660060020064160903042880 06000000000000000000FFA2E400000100180180180180190180281580182180000C64268400068060064168068160060068 0000600600E00628608600610204400620680004E0AE22285604402E000000000000000000FF733900000180300180180180 18038088A182589100002061160064200060060C60020860060060000060060860060360364AC04840849612E00050640601 2080006506000000000000000000FF676C000001801801809805803C01883C018058B1000000600600600E0060160860120000b3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600C0468CE00 0000000000000000FFC0C240000115595595595595580194988995592000005564575561505565574D655545655600600455 6556556556496516496556556146136004286016556226552456000000000000000000FFE0ED000001C890ABCAB8AB8AB901 8C0A898A9808800122740E2AE08F2AF2AE08F2AE2362AE0070012AF2AF2A72AF41600622C420028016806000036946000246 28E206000000000000000000FF9B5A200001601801E0180180194380084380180A8001806086006001007806007006006006 00600180780780780602604602600000041620600004E4A6001084002006000000000000000000FF5B440000018E90AB8AB80073e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000006006 00600608708604C00600234629700020620E006046043236000000000000000000FFCAED000001801001801801801801842A 418458210000006816006006006006916004096006006800006006006006C164160040060020068060000868860063160060 86000000000000000000FF17FE000001AAB0ABAAB8AB8ABAB188C8838898830000AAE20628E4882AEAAE2262AC3262AE0070 00AAEAAEAAEAAE0260262842AE2AE80E02700082E026AAE01428A106000000000000000000FFF13A00080100580180180180 1C35C1384180584000000060A7006046006007406005106806006000006006016006146D361061062034864CE8014860075200f3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B8018AA8018A B88A00002AE2AE28E08E2AE2AE2AE2262AE2AE2AE0002AE2AE2AE2AE0066064341062421060062002061061060062CE40600 0000000000000000FF4BDB000109021001801801801835800895801800000000600602600000600600608600600600624400 600600600600600600404600A04E00E02400628604604C0020D6000000000000000000FF9F47000001805001801801801901 800841801840000000600600622600600600600E00600600610000600600600652E13630C50E0C23064A60800D604E48E484 026406000000000000000000FF5ED600000100100180180180180DA0080980181000000060A6846440806006006806807006000be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000006000000 000000000000FF9EE40000AA0AA8AB8AB8AB8AB80B88980B8AB88080002AE2AE2AE2AE2AE2AE2AE2262AE2AE2AE1102AE2AE 2AE2AE22E20E2AC20A02602602600002602628C2282AC02E000000000000000000FF04C90001020089559559559558159558 15955953000055655655613055655655645655655655604455655655655645603600441241204E2CE28404E24E4564125100 D6000000000000000000FFAEEA80000000080180180180180182380180185180000060060060060040060060060060060060 0000600600600600604600408228E096516510016496026006004306000000000000000000FF0CA20000339C90AB8AB8AB8A008be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030060060060 0652E53600612AC0430648608A0D604E04C110004406000000000000000000FF99A5000400001801A01C0180183590129580 1A0100010060020064000060070060860060060042080068070068060060070040060C104F04E0000062861060020440D600 0000000000000000FFC7670000AA0AA8AB8AB8AB8AB9418011418AB88580002AE2AE28E08E2AE2AE2AE3362AE2AE2AC4002A E2AE2AE2AE1061062AC24200C40600620070600620632628C006000000000000000000FFA89C0008200048018018018018A1 8018A180180000000060060062000060060061060060060063000060060060060860860C40421022060060202860060040C4004be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801801801800 800000640650628100C02600704E00780600400000E20600600600600600600014650600E10010601644640A004006000000 000000000000FFBFF6880C02008001C01DA1A039099A5C09A09C018000A07206006007006827007027006046804040807207 10761650600F00C0108BF2871860A0016406006286004006000000000000000000FF7F26100042009C018018458018058210 09909C01000020680205600080700700680600630610400500700620700603621700E0060000064060240060060041040040 06000000000000000000FFED44000800000801801801A01901853041C01855800000600602602600480600600F006006804100cbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF3BC1000000000801883801801825805881881821820002E28605E18020608E02601E00640600E00000600E4060 0604600600400002E28600E0081A648600C01002400E000000000000000000FFAAB2800000001001821803A0180181180382 B80A88A008600208022602600600688650E0060040501064061462160060970060042060062C612000E21622608E00C02640 8000000000000000FFC795800020001201801803841901801801901A0180000060025004008168068060060060C608404080 E80608681649640600400C00600621600000E00E226002004006000000000000000000FFC076800000000001E01E01C45811002be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000052 83302000200803004803000D0528080000006200000000000000000000FF95D40000000018018A38038018418019018D1821 00C01370824001000040960461062860060160000861060A600E00600E0060060D200604E02004E10601430C0C4026008000 000000000000FF25CB0000000018018018018058018898458038819200406202090426046006006006016086006100006426 0064260060060060062061064062880060164C404001400E200000000000000000FFE8DD0000000018018018018038018818 2180189580002060022060064060060060160060860060D00060B600602600610600600408641E106200106406084224084000abe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A02004040000 0011100000000008008040000048000004008000040010040800800008082102000000080800000003040000000000000000 00000000FF62750000000A80AA8AB8AA8AA9400891400AA9A880002AEAAA28C4AA0022AE2AA2AE2AA2AE2220402AE2AA2AE2 AA1021020AA24232240200200070200231C3802AA482000000000000000000FFDDBB00000000000000000000003404009400 0004000000000602620604000000000000000001000000000000000000000000010801004804804000000002003000405000 0000000000000000FFC61280000000400000000000010000404000000000000000000060064880000000000000000802C000006be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF4C8280080020140140140120100024100040142A000100500000404090100480400480480480000100480500500400 004030900000009051000001049100400C000100000000000000000000FF0D28808000125955D55B55D55815155815555949 8001D57046554516557557556557557556556111557557D5655645643655612608604E2CE50044E24ED560245560D6000000 000000000000FF22870000002CA8AA8AA8AAAAA80AA8A80A8AA80080002AA2AA2AA08B22A2AA2AA2AAAAA2AB2AA4802AB2AA 2AA2AA22A20A04228A22A0220222A00220222222222AA02A000000000000000000FFF0AF0000000092004000000000A0000000ebe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800280820000 000000100480880000080800000220000000000000000000000000FF35CF0000001400000000002001000000400000820000 8014A00204000010008000010000000002890010008000005283300004800003004803002D04280000004004000000000000 00000000FF133A08800000400020000000003400009420004000000000080000000000000000000008000000000000000000 000000000000204300480480080000800004100000D0000000000000000000FFAAAD900000008EAA8AAEAA8AA8018AA8018A A80880002AA40228A0EA2AA2AA2ABAA82A82AA2AA0002AA2AA2ABAAA0020022AA40A0C21020020000021022AA0B20AA40200001be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000040 0538400000002410020C08400000054040100040410000480004000000010050450090100080000000400400000000000000 0000FF81AC000000C00800880800C00801800800800C10800000240300200200A000002800002000200020022A8200280240 2002020482003002002000002002002002002002000000000000000000FF6851000000202008000100000000020008100200 0000000028080000000088000001800000000282C00008A08810008000000000000800200282000000000000000000000000 000000000000FF7CDD0002801002000402000000000002220000000000800001000000000000080200400000000000800000009be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF0630000000000000004001000000000001000000200000050100400000002400040C080000000000000000000001000000 000000000000004800800000000000000000000000000000000000FFFD9D000000900800840800800800800A008008008000 00228252200200200200218200200000000000260300300200280200001A1634030020000020030020020020020000000000 00000000FF5D53000481803C01881C81C01801841A4B081809800100624E004006016096007A06006000200000046D160142 17C36006000506806007004001006007006446006006000000000000000000FF20F900000100001100200100100000000100005be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040060064000 2000010400610020600E406024006006000000000000000000FF7F7000000000000000000000000000000000000000000000 0000600600000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC4F9000000000000000000000000000400000001000000000000600600000000000000000000000000080100080000 0000000005000801000800800000800004000000000000000000000000FF4980000001800800800800800800800800000800 A00000600602000200200200280220600000000000200200200200200200000200200200200000200200200200200200000000dbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000140610651 6240406007004006006000000228804004805007106084240014116004016000046204004004006006000000000000000000 FF9D69000181A08801841881801801801931807001800000600600E00600600602700600600000000000620600401602E826 10000400408484600020E00E017006006006000000000000000000FFDE7D0002019098018818018039058C40019010150000 00641601040600600602600600600000000100640702600453653602080100E00408E0290164060060860060060000000000 00000000FF507B00000180190380390184180180004180100180000060060000000040060061060060000004500060060064003be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFA8 72000001801803809001821821811801001800920000610E0160004540060060060060000000000840064000060860061201 04016006026020446006104016006006000000000000000000FFA708000001801041801801801C0180040301180088000060 16040000007006805806006000000000106004300487806004000080C0601604602090200400681600700600000000000000 0000FFD9F8000401801801925001845903944501101804800100621600000600600600610600600000000000600602121630 740E0C004000C0020AE0A800200640E0C6006006000000000000000000FF01EB0000019C0087841901811841811C0984500900bbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (609C00000000 000600210100411C406006006046000000000000000000FF15D4000001D01901805001801A01800254001800000000600600 6006004006006306116000000000414406006206086306001000026003B02000004006804006006806000000000000000000 FF25160006018008018010018018018000000098400001806407A06020006106006006006000000006026A86006D06006006 200000200812802006884006806006006006000000000000000000FFA3810000019410418499018318018018050458200200 46626614600602F086604F86006000000000625284160807066004280014107006016000A020040840060060060000000000007be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006046006006 80E006005406246000000008805C0414600610608401020650610A848000016004044016006006000000000000000000FF2D D4000001800041803001805801805D008898208001006006006000016006084A1608610000000800400400EC860464040082 06800082208280006084404004006046000000000000000000FF0E450000018000418018018058118001002A184000008078 8780600601600600400E00600000040800400400E80620600400820000610680A22800400401400600600600000000000000 0000FFA306000001880081801981A0194195C4002118000000186086006600006E0614408600610000020020E2148061668400fbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF534A00 0001901805801C0084182D809801809903A00000610D206006006006406826006006000008C06A0404690690600640821040 6006016000006006404004006006000000000000000000FF6C7E00000180100380181B80180BC01800901802000004668600 600684400600402F406000000000A04004106006006104000006006016000000006004004015006006000000000000000000 FF3046000001801201801201C21951941C548C9800000002600EA06080027006244006016000000004004015806287506804 20000F840006100054006804214006006006000000000000000000FFFEB200000188100180180180184181180080190080200007e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006002 000000006006004006006006000000000000000000FF62850000018018018018008018018018010018018000006006006000 006006006006006006000000006004006006006006000000004004006000006006002006006006000000000000000000FFE2 86000001801801801800801801801C0180180180000060060060060060060060070060060000000068048068070070060000 00806006006000007006002007006006000000000000000000FF425B000001801C01801804801801A01801001801A0200060 4600610000E006006A16046006000004806004006406006006000000104104046004816006026006006006000000000000000087e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (068CE1500465 56806287006106020494806800006007006D06000000804002000284806006002006006006000000000000000000FF956000 218100180380188000180195C140981001800000600504E006086006006606006016020000A2608080604601600600000000 6102100000006006000806007006000000000000000000FFD1D4000001001805821800001801800000001501800000608E50 E54080632700690E0B612602054054710C0360060A754E0080B1054800000001006006006004006006000000000000000000 FF14B0004001001801901884001881800000829001840002620600600E0860060060264060060100080164244064060060060047e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF8E60000001 801801C010010018018000008010018000007006008050006486007026006086020480806026006004006006020000006002 001280006006006004006006000000000000000000FF66E9000001801801801001001801801A0101180184000264050C6100 8460360060060A6006000011006083006007806506000000006002004000006006004007006806000000000000000000FFC9 59000001801C018010010018818018A1829A01820004708E2A62AE0062860070EF3CE0AE0082A800E36E22E2260AE2AE0480 A882E002004000006006004806006006000000000000000000FFC0A2000001001C01801E000018018004000112018400007400c7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80CB6216810D 0088E956B0C806816816000000000000000000FF303A0000058C18098018C5841801A21A42091009800000E00ED060060160 8E00601020600600000028600380601682E2060000080070C6324000206006045496306306000000000000000000FFF16700 0001801801801801A01801A01A00A01001800000600600600000780600600000600600000000600600600600600600000000 6806004000006006804006006006000000000000000000FFE71E000001801801D41005401801944000201B018000046C0600 0006006046006A860460060000001060020060040060060000008071001008000060068068070060060000000000000000000027e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601E22802000 8029000000000000008228720408800070000000020440004280000400260000000000000000000000000000FFB3C9000002 2006080001440000000024F00804200001008008296047180001000201010200200000000480000000920108008000008808 2C8400408020580108000000000000000000000000FF85ED0000019018438018018198A98201019013018000806284000100 816286886002B8600600000001600200600604E0060000002142A600000024618E000014006006000000000000000000FF58 74000211805805C09C09C0DAA9A8430920112580000C6A8682088E2C6A2628EC22096C06210800816B52D26906106836010200a7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7F0004008208 30D00E90C10C40C14880C00880800000300300313201200200B00201200200100150B40332B0028230020005010C30034834 01233003003493003002000000000000000000FF58F90002082A60102010BA20204031400A20028800000840009248808050 0CB1480000C004008800FC0804890800000A00000E80800804D20800880800800C80A88880000000000000000000FF5B2600 0000A4080080800100080080080100880180000020020000020030020020020030020000020020120421828820020001081C 200200200201200200A24200220A000000000000000000FF01E60000000104001004001205000C04000000060001021000000067e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (022022000022 00004000002A82A8000000000000000000FFD8C3000200A028008A0A00800A00A00840A00A208000002002842802D02800D4 2002000002000800B02D42913002002902800000902912902840802932A22C0A802802000000000000000000FFAF6F000200 2B120120500140120021420524030B0000004000804A2080480480400080400400084085080C8408C8004C40000910A28805 008800888A00888920804804000000000000000000FFF67100000188B801801843081901921849101805800080680608C006 10600610680610600600000004600C00630610612E000000016224046000006306526026006006000000000000000000FF9F00e7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A92A82A82A8 2A80000000002A82A82282A82A82A80003280882082A80082082A82A82A82A82A8000000000000000000FF448B0003543501 540281545543543085343102100000550550D50930D01550840D515500000008008808A0C90C40550A88800450908CC0CC88 40D488A88B0C80D50D50000000000000000000FFAD0400040004220000000000040044240040040000000000010010000000 01001000800001001011001001000001801000001001041001001001081001001001001000000000000000000000FF58E400 00AA0000AA1080AA2AA0AA0A428808E0400000AA8AA82880880382A8008AA82A80000000004400002002002A8048000220000017e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000084280080 0000800800800A00800840800080080200200280200000280080000000000000200200200200200200211002230200201020 2002002002002002000000000000000000FF2F870000AA1802AA0AA2AA2AA0AA8B00A80AA08800012A92A82886892A82A82A 82A92A80000000002AA2A83222A82A82AA0002006001402A00000622AA2A82A82A82A8000000000000000000FF2260000000 0022000024000000000400000400840001001000000200020000488000000000000020010208020088800000000080420010 000000000200000048000000000000000000000000FFC2310000AA2102AA0AA2AA2AA0AA0800AA0AA0AC00002A82A82A80A80097e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000320 000004000000000000000000000000FF0D0D000410C00D00C00504C00842800C00800C008001003083002403003113093203 0030110008082132C3403003042003002100023003002800302202003003003002000000000000000000FFD49B0000018018 0180004181180182581100180180000060465440061160060060061062400000000060041061060060060060004060061060 00006026006004006006000000000000000000FF7DF500020120800100000100120021400520020200000040048448200008 04800004004000800808800804890004804800004820890850810800910800800804804804000000000000000000FF21F7000057e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (084001081000 080004100000800901100C0280000080000440310220300200100000030000000000000000000000FF849900000800000000 010000800C004000000001000000008000608611008010C20000000000000001000420008085000000000004080088000048 0080004800800800000000000000000000FF1C3A000001800890844003800D6082091C000840800040602648000200200600 20060860200000008022B6882042082802112480212002002001003052052402402012000000000000000000FFE613000580 400400400420400010180401000400000100100122430100100900100100120900000820100100100411000100000000001800d7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801001810001 801C01801914081021808000600640640630600E04620600600000080100608900E02604708608E28000600404480141702E 102202306016000000000000000000FFEBBA0000018018018080418A181190600108300982C010E006048006086606426316 0260900010000062622063161060060060000061C612700810E006606006086006000000000000000000FF8AB90000018218 11844001941921810041825011840021628601000004400600600614610000140800620050640600620600600001420620F4 50006406056004056006000000000000000000FF233B000000040000000020000008088040040000004008028004620622000037e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000461260C00 02006006000000000000000000FF2A0900028F8AB8ABA8E2C98AB8718802009818AB8000AAE826A884A8AAEAAEAAEAC6AAEA A80000007062A2316B162AE00E006000606004230060306756060C022AE2AE000000000000000000FF6EB900004180180182 0021801909810090005801800000630602020600600600602600600000080000681208600600648600600009650400C80000 6026112406006006000000000000000000FF45C7000001801001800005801805825824831001800000600E00600000600600 60160060000000200AE0020360CE00602600600004604810000012E10E2020D0006006000000000000000000FFE04C00000100b7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (610E00600080 0841006800C0600600608E006000136452006800807006117042006006000000000000000000FF8178000555955155B54355 95580191014415595580005565565561305565565564CE55655000000449650012E55655608600600055554744601421640E 207556556556000000000000000000FF772D0000898AB8AB88828B8ABA838A9CB38038AB80012AF0C6A8E08F2AF2AE2AF207 2AE2A800000002E2AA0262262AEC260060000060802A000043600620010E2AE2AE000000000000000000FF366B0000018018 01800001801941821C11001801800100700700600100500700700700700000000802700A40700600625600600000681080C00077e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000058018 09815804001A0180000060060460000060060060060060010008140073293060060062060060000040020C281520E4162960 06006006000000000000000000FF8672000201801001800201801A0182023180180180008068068062468068060069168060 0000000049600200600600688600600000609200A000086086006806006006000000000000000000FFC3570000AB8AB0AB8A A0A98AB8B78840810AB8AB80002AE2AE28E4882AE2AE2AE2262AE2A800100482604002E2AE2AE02E0060002AC22630300412 68260362AA2AE2AE000000000000000000FF6B6D000441801001840001801801802000829C0180000064160460460040060000f7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E11611625400 6006000000000000000000FF90B20000AB8818AB8000AB8AB82188D8218898AB80002AE2AE28E08E0042AE2AE2AE2AE00000 00000860221062AE2AE0062AE0002062022420000160060C60262AE2AE000000000000000000FF683E000001841801800001 801811801811001801800000600602640002600600600600600000000421620201600600600600600008C10A10A004046446 036012006006000000000000000000FF774C0000018138018000018018838459028258018000006006006026296006006006 0060000000000260884A60060064CE00600002602204200049610E206302006006000000000000000000FFD2FC0000018018000fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000006004 4A634A006000006086000006200100106004486006206026006006000000000000000000FF7B8D0000AB8AB8AB8000AA0AB9 4B8A18C50AB8AB80002AE2AE2AE4AE2AE2AE2AE2AE2AE00000600040E2AA20E2A82AE22E2A80062AA0260060004262262260 822AE2AE000000000000000000FFC61700015595395580015495581594990193595580005565565565305365565565565560 000060040160024365505564565500060CC4344160040464CE08E50A556556000000000000000000FF78AE00000180180180 000000180180B80180180100000060060060060060060060060060000060000060020C600000600600000600648642600000008fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000188380 4003801001800000600602642600600600680680600000400002E0004A60000064CE00000000630648600049610E04601200 6006000000000000000000FF7257000001801801800400001C11840011801001800100700600600000680600200600600000 6004206004016000806006001004000040026004046446097320806806000000000000000000FF4FCA0000AB8AB8AB8000AA 0AB8218880B18AB0AB80002AE2AE28E08E2AE2AE2AE2AE2AE0000060001C62A80062A82AE1062A80042AA01E11E000106006 2060062AE2AE000000000000000000FF5FEC00000180180180000080194180184D0018018000006006006000006006006006004fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006006 000000000000000000FFB13C000001801881800101801801815841800801800040604600600000608781600704610000C000 006002006001906006000100322103000000016026000002007806000000000000000000FFA3EF000405801A01800209461A 1180B823840C018000B868060064664070064068068260005C64000465C2006000C1600600148009200600014000E00E0010 07006806000000000000000000FF455C000101C01C01800010605801840003801601800100608655600100700600200600F2 28004004086004006400006006000000004200306004086016006007006006000000000000000000FF1080000401801A018000cfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000040000060 0C10E00002C00600000420C402082200006006002002006416000000000000000000FF969000000580180188000108180980 1821029801880000618677620000E0060060062164500060000062C00060807140060000044F64061200C000624602A00A00 6006000000000000000000FF383C000001C01801828001A51801820015100A018100C0E20E000006D0702604234690700000 400000604608625008604654020000431220A00009608E50220730620E000000000000000000FF4AF3000101801B01800101 803811840001040801800000602600040040610620A0060061002564000C6206006400006006000200006106A02100106006002fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00008202400C 00208000000000000060060000000000000000005200000280804A00000404A8000088410110508000490108010080000000 000000000000000000FF8A32000001801801800001801809800125029C018800206096420000316007022006406000004000 0060060063404060062A0200000010206100006016546014086006000000000000000000FF39700000018019018280219319 01850009085805854008622600041604643600224608600000400000635601601015604600000035210614E2000965060164 06406006000000000000000000FF908A000001801881900021001881809880003803822009602600600E02620E002106006000afe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D2AAA2AA0000 00000000000000FF0A750000010000000004010001400000A00400000000004804020000000000A400010040000000004A02 00000000000080000020080280000000480001000080001000000000000000000000FFF5490000AA8AA8AA8000408AA82089 08C10C880680002AA2AA28C0AA2AE2AEAAA2AE2AA00041C0001C221A00200028210200033208220200200010200210240E2A A2AA000000000000000000FF90AC000000000000000002000010008040020451800000000002640600000000600000000000 00002000400100000100000000040400200240000404404C4440000000000000000000000000FFBF050000000000000000C8006fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00008224A10 20002AA0020002022820133420000120022020C32AA2AA000000000000000000FF66B7000401001201000403201000022011 00024000008050040040400048050010050040000840000010400C08010000008000000200200C0000008111000004805004 000000000000000000FF7854000355D55D558001555558159518159159558001556556514516557557107D57556000556000 01608E436000D564560015164560464160000464CF55620C557556000000000000000000FFF2A50000AA8AAAAA800088AAA9 4A88088288AC888000AAA2AA2AA28A2AAAAA2AA2AA2AA00002200040B28220A80032A22A80022230A48A20A00042222222A000efe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020020000020 200000000008000000020000000200C800000000004002000A1A01280000201C408004010080000000400008200000000000 00000000000000FF93C300000040000000000000008203400200400000000000000004200000008810008000000000000280 404A00000004A8001040000010148000490109050050800800000000000000000000FF824B00000000020000000240001000 00B0000400000080000004000000080044800000000000000220010001000000000000011003032100000204044010020000 0000000000000000000000FF56110006AA8AA8AA8000A88AA8208848008A8CAA80002ABAA828A0CBAAA2AA0122A82AA0002A001fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680600000000 0000000000FFD1BB000000000405001101000205004000005000000000023022C00080400404440810400000000000440010 140050080040000410400D014000804004800010004004000000000000000000FF47F1000020000200800800800800C00800 840A0080400028020020020020000000020020000000000020020020020020820020002800A0802000002002000000002002 000000000000000000FF296600000000004200400000000000000800020200000088000000000000000A000000000008002A 000000000000000000000800800000000022000000800808000000000000000000000000FF74370000000000000000800000009fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (202002002802 802002002A06002A02000000802002000000002002000000000000000000FFE67400000000000000000100000C0004102000 000000100C400440000040000040100040000000000040000000000000000000010040040040000040000000000010000000 00000000000000FF07C8000000000000800800800A0AA00C0880080080000820024120020020020020028020000080000020 0200200200280200204300301201800101A043001000002002000000000000000000FF7BF100004000002180380180180180 1811821823802000E0068040070260060860060040001000280060060260060060860060042040A400602100400600002000005fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408480180180 000060002000001060060860060040100100000060060060020060060061420020C402000000410600000000601600000000 0000000000FF7F70000000000000000000000000000000000000000000000000600600000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF4903000000000000000000000000000000 2000000000000800006006000000000004000000000000000004000000000004004004004001000000000000800800000000 000000000000000000FF703C000000000000800800000800800800801800800000200300000200200600200220000000800000dfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF21F8000100000001A518015C1011889A200019090000044826446410A86226106854286008400000006410126002 40E482402902012103004010094046800040006086500000000000000000FF27BF2000000000018018010438018018028018 81800040600600600606600600601610600020800002600284E00609210200308412481202600080460601880000E0060000 00000000000000FFBEBB000000000001A05801081901B0024184190980000C754700044F406246446C064544004803520462 8609640708000600600502400400000210400F00000000E106000000000000000000FFE7DA00000800200180182180580181003fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060020060 10400101080008020011006006001000006007000000000000000000FF9328000000000001811A41101009801C04C0180A08 0000600208E42001600610603540200020000000601010600240620000002001114084048021704E0012A000600620000000 0000000000FF3D4F00000000002180180100380180804190180380200141061080410C600700600650020000000000600240 6002806008000040A0004208028020600E000D00006007000000000000000000FF5D66400010002001805A41421B01802081 821801800034630620042E00600634640E0484001004D000630308640600400200202010012B80200000608E00000000601600bfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (841801800000 401610600000621601602700000000000428600611E002206C064060820020002140040150066800D0C06006000000000000 000000FF10CA0000100100C18018C3021001C0000580180100000460030060068064068064C4000000000000106406006802 406806006002003102204001006806800000006006000000000000000000FF67C00000800000018018010018018100218118 018020006006C46000047806007906100000000004006006202800006806006004D050121060048040068000000060060800 00000000000000FFE0AA000000000041841821045401801B82B09908080005416700601610E0060060850024000000000064007fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 04FFD8AA000000000001805801041011A01809801A02000004400700622E8060162060050060000800000060068022000072 060072C0480C04124120902006001400026006000000000000000000FFA8DC00000800000180180140100180994180180800 0002400680620000700600F405006000000004006A461020000062060060010003051140040020A600080028600600000000 0000000000FFBE05000080080005801801201021810000801809000000400600620600680610600400000000000840602680 6002006006007084004C00144000004146100100107806000000000000000000FF26210000000844218018A1001A1986414200ffe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (220600680600 648490040801240400C804006206006006000000000000000004FF4E1D0100002A0001C21A01001C01843901801801800042 000411644610608604E0C400200010000200410600201691640E007040C40002922102884004007107047006000000000000 000004FFCFAD000000020001C21800001001821880C01E00000000404300E01688608650E0B4006000000000006C86440000 08700E00600001018A00404000A006001080007006000000000000000004FF4728008100094105801804041641E078008418 0000002040361860000060169A710C006000000014206206A2080800E00640680102880304E205012006000051806006000000001040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000000004 2060060060060064044040004000005140060460060060060060020000060200000040060060060060060000000000000000 04FF48BB00000000000180180100180180180180180180000000040060000060060060040060000000040040060020060060 06006000002000000004004006006000006006000000000000000004FF3BA4000000000001801801001801C01801C0180180 0000000500600600600600600500600000000000400680280700600600600000480300000100400600600400600600000000 0000000004FFD518000000400201803A01041811801811801A03800000000400600000600F0060040060000000044040060000801040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF EFBA000000000001801801901801840421801809940020414780E100026516006026004000000516006006002006006C5600 780480400480644E000206006004006006000000000000000004FFA26F000000000021823801001A019DA051AAB809800080 000600600E0660060060041040000000000040063060060064061C6000002006006000040006006800006006000000000000 000004FF5892000000000001809803A01801802083889A09800002495415644828708608614E8484A0110106006016A0E546 40F10640600B000C05000007000006006206006006000000000000000004FFA92E0000000000A18A3801001801800001823800401040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006406042005 004004A42000044206002406006006000000000000000000FF2009600000000001801801801E01A00401801801E000A04004 0081000060060060060000000000000060060048060060060000000028070024080050060028060062060000000000000000 00FFB0AB000000000001801803301801821A2180180992008080AE02600000752E08622C8060000004890040068050060064 4E001001000006000021004086026002006116000000000000000000FFE991000000000001801805001C0180182980180180 008100BC0EE2260870461864BC22E2A020808020480E00C2A620E086200008001A064000010041060468060065160000000000c01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00A24C468308 4E0262360B68A68240000288408868AE8268C6896A1684E4CAA04812050801000A0689680CA06846040000000000000000FF BD5500000000001180190188D841801921D01CC1800010D09650608640E10600620E416000000200A3620648420E4268C650 2804150320486080AC894E245204106106000000000000000000FF4B2B000000000001801801001801A01801801801000000 0005806000006006006004006000000000004006804006006806002000000002006000000006004000006006000000000000 000000FF1970000000000101911805801801840305801801800004400640000642710600640610400010000011680694400600201040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF354D 0000000084000000221004600400201800210000080000006016A088C88680000000000002000884900400C02001202AC200 944000080010684588020040480080000000000000000000FF02F30000001800000000800002000002102000000000000048 09E00E8008008800081000000000006002001A02001C02800108004880802000000000004000000000000000000000000000 00FF81D10400000000099218118398898121C980591180002562260000204062060060060000000080000060260060060060 06006012002018808000030026316004006006020000000000000000FFB170000000108401CA1A2BC2190BB2A00D80DA018000a01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (165264440542 06AB40004A404600E106206006000000000000000000FFEF5C0400000C44A0D20C08C30844C50830A14CC080014034030030 9280280282300340200000150120312B0A314B04310300A910303852003009013503303243003002000000000000000000FF F54000000004414024020C2C20043A82024032440000D2CD80B24880020000004B80A20000020900820940800918818C18D0 14E8215061134880908A40000704A00820000000000000000000FFD37D000000000000880900800C12800A00C18880800000 001200010284682680202240C00000042000200A20202202200204310482260344200004600208A00800200200000000000000601040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00202880A82A 82A82A80A02000000000022A80002100007801C01800200A02100000000002A80000002A82A8000000000000000000FFAED8 000000400000A00B0493280080CAA4A002028000A02A12802802802000002402852000000D0080283280AC42802852852A08 808892830A02D02802002802802802800000000000000000FFD2D600000000020140123020100122020900129000008CC900 824C00004004004810904000000800000B00940910848A00A00104C0404048490102C8000000048048040000000000000000 00FF4907000000000001801885881A11901901881815800014E14E08C006426026006106086000000000806406006006116400e01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFE4150000 000000AA0AA0AA2AA0AA0AA0080AA08400002A84002A82882A8AA8AA82A82200000002802A82082400280282082080400082 882204002A02A80000002A82A8000000000000000000FF7BD10000002001541542C41101541040143543000000940B10D50D 30D50550550490C10000000D00D50850CC0AB0850810C30808010C40CB0800C10D51000800D50D50800000000000000000FF F71D000800400000000000200600400042000410000100100100104100080080080100000000100000100110150128114114 0011000001011001011001801001001000000000000000000000FFC4AC0008000002AA0AA0000000AA2900000AA02000000000101040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0100C0414080 4900800800804804800804004000000000000000FFCBB9000000000800800810800A00804812800810800000202200244200 200200200001200000050000201220200200211201220A00800A0D220010A002002002002002002000000000000000FF7172 0000000000AA4AA0802AA0AA0805806AA0C000002A81582880882A8AA8AA9AA83300018000022A83420B8282282202201D20 5E1A403001022202A80000002A82A8000000000000000000FF661500080000040040000824440044054000002A0000410020 0000000008008010200C00000000000002800000000002000002C0AA01000004820A0000000000000000000000000000000000901040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (440001061005 00100500000100100102801000004000800000000001C000061000108700005241010001000000000000000000FFB82A4000 00400C00C00D00C00C50C00C90C14C00800100300300204301300B00300300200100100101200201200214204A0031030030 4300300100B003001003003003002000000000000000FF09EC00000000180180180181580580180190180180200060041140 0600600601600600612020008802600604601620E10600601654420E00C480006006006414006006006000000000000000FF 1DB90000004010012010440010012312210002420000800A848448008000040040048800000008020009208008488488208C00501040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (95D200084000 000000200200000401004808C01004200080005062161201280000082160000000000000004000082000000000000000C024 00901202B0208200016000000000000000000000FF86F700000000000000000002802800000010C000002000000044600601 0008010000006140200000000000054008540110004810AC0C5080820080090080004000E800000000000000000000FF869B 00001000101000088084280010000C800802800002204208C02200200200600210200001018800280A002822912C22042082 40200210608009200204010C002002002000000000000000FF6314400800400400400400440402400480400404000104100500d01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04012A046100 004080106024006006006000000000000000FF37600000000018010018018018010010018098020800006082206006406406 00600E08600000800000700600300F407006022006202000026000024554446014016016006000000000000000FF7CCF0008 0000180102198185F8080060059058030C400062820000862062060260A640600000000A00600600678610640E00600019E6 5A01E07200400400200C00602E006000000000000000FFBAA2000028001809043803801814088029801009000000E4460805 081400CE04614600E000000090006006206006016016006000000100306100114004008284006046006000000000000000FF00301040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060060060 0611600000008080400601000E40620608000402080682410000600510A94A006006006000000000000000FFC51A20000020 10AB8AB9F18AB8AA8E08ABAAB90580000D6432A88088AAEAAEAAE846A0600080010000600620244616621604031804861620 E000AAE20621A3822AE2AE006000000000000000FFF9510000000010018018118018008048018018D58000436C0204000600 600600642E0560000008000562060820AE08E00E023041506004086C00006056822012006006006000000000000000FF16F2 000000001801001803001801009001801801000000010A0064200040060061060860000004805040AE0484064060C628A10600b01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800001801 8018010018008108018018418000A820020062460060060065060060000008001148060860068065060068061110C700A801 006004045040006006006000000000000004FF5D1840000020195595595595595494C955955B558000106552D56110D56D56 D56D56A4600080040555644E1264C604604E4564D648F555512405336554425200556556006000000000000004FFB8AB0000 002010AB8AB8050AB8AB8838ABAAB8118000000142AAE08EAAEAAEAAE816AAE0000002002244B62289162170464882442020 063243002AE32C30220A2AE2AE006000000000000000FF3BC5000000001001801E01001801801801C01A018000A21002006400701040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A0860000120 4630C08C006006006000000000000000FFCBF100000000180180180100180184180180180180001120020460200040060060 06154000000C8400400604640705684602F45204000011290442E006104094004006006000000000000000FF55CB00000020 1801801801001800814801A018018000242002806006806806806806C060000000000044D650E0C608608608610650211604 6400906002026442006006006000000000000004FF409B0000000018AB8AB8AB8AB8AA8808AB8AB8AB80018162AA28E2C82A E2AE2AE2AE0060000010062AE90640680E31630E207007008A24A070060062AE20E8022AE2AE006000000000000004FF30B000f01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00600600600 6000006000000106006006006006104014512114006000402000106016006006000000000000000000FF6A2A0000000A98A9 8AB8210AB8C98A98AB805889800001210028E0AE03C2AE2AE2AE2AE00000000001400600600600600644631608802220E000 2262140062062AE2AE2AE000000000000000FF212F0000000058018018030018058058018138218000122082026400106006 00600600400000000444C01654601600E00601604E002480042004106110046026004006006000000000000000FFED3E0000 000018058019090018418018018C1803800020A22A0060062060060060060060000000001044C6016346346356326106226000081040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000418200018 22001801801801801840000000000400600002600600600600600000600040002610212612E12600C00208008C12A0000920 04086086006006000000000000000000FF06F70000000AB8AA0AB8AA0AB8A38838AB8AB82200003302A42AE0AE1062AE2AE2 AE2AE0000060002A820E34A30E30630E24440000222005600008220C22E2262AE2AE2A8000000000000000FF9A5400000011 5912155910155915935955951915000032042C5565303065565565565560000060040C049643241640641608442444A22040 60044424C0456456556556550000000000000000FF90A680000000180000180000181181180180191100000000040060060000881040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400520200400 6007006806000000000000000000FFB2550008000010000018000018458120018018C000004C00D402602680600600600600 60000060000004C601634634635602521424E00400400008A914116006006006000000000000000000FF8642000000001000 401800001A01800001C01804000000820600620032F00680700600600000600080001614601600F006116123084114404000 002424026116806006000000000000000000FFC8DA0000000AB0AA0AB8AA0AB8898E00AB8AB809000000001428E48E4462AE 2AE2AE2AE0000060002A80462060460560462141400462205AC0002721442063262AE2AE2A8000000000000000FF2F98000800481040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00600E402010 0060104000060060264A6096806404046004092000D00002206006002006000000000000000000FFB3678000000038004039 04021831801821C01C05000001050454630000F80780600E00600800600800000600400624600600440300401400E0001040 02442002007006000000000000000000FFFBC9800800021C20401882029D2D803801D018011000060004006086806A068070 06006000106001109006274006117007004910A06000006400004802022007007006000000000000000000FF626200010002 1620021840411C01802401801800000040000601600100620600600640600000600441080640604600610F80600442C0000800c81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000180008 9801809821811800008008000602624606400E00E2160262000060000000064C608601600602600400022200E1000824140B 6014006016100000000000000000FFB8780000000018200018000218018A1801903805080000020009600000420600600620 60003062001880062360060162260041140120160A640802200400600C00E006000000000000000000FF2A85800000001802 001800003C41804083B29801020020000E2100A720608602601601201004600000045600620610E006006004CD4100002080 20028A00E0071428AE080000000000000000FFF2E7800080003A00425820201905800221801C01080020828654040001600600281040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008008030008 006000000000000000000000FF9E0380000002200000000000000000A00000000000000C0108006026008000000000006000 0001000004C00003403403500484205001000004800A0100100100006000000000000000000000FF92000000000018000018 0002184192C045925800080000240610000040428602600640201002620011002E0060060862260060023301061020001041 040040001320C6000000000000000000FF6D0B000000001824001800093801800081801801048050000E44828600400E0162 0604A2004060000004061064860060060460000024220520102440040C4004002006000000000000000000FFBD5E0000000000a81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AA2AA0002AA1 2000020220A30A30230A22A2A022A2A032208022A2AA30A2AA2AA2AA000000000000000000FF627C00800000100020000000 00000002000010010000000030020200000804800000020000004308000020A301201281200000B40800080402000900B010 02A0000800000000000000000000FFE7D90000000880000AA8000AA8AA8A08AA8AA8AA800000602228C28A3A22AA2AE2AE2A A0002AA40000004A2420420520420820100022342BA4202022222022222AA2AA000000000000000000FF2089000000000000 000000000000000000000001000021440002600600000000000000600000024200000014801000800040011005001000000200681040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0AA8000AAEAA 888CAACAA48080002AA00228A08A2AA2A82AB2AA28A001AAA0000000020020020020022AA2022A220200200020222A202002 28A2AA000000000000000000FF4B268008000010004010002010010204010010010000214040004040001004804804000000 004000000110880000000001100004100004000020080000040000000805000000000000000000FFC1BA9000001558005558 0055595594D9559558D30001554286514156557557556556516000556000000496086416406416D5640645632650E1084464 06436016557556800000000000000000FFE1730000000AA8000AA8002AA8AA8928AA8AA8AA80000C248A2AA48A2322AA2AAA00e81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 A0208000000000000000FF856700000000000002000000800600000000000000008000010000000000000A00000000000000 00008000000800680000000800000000808000140000000000000000000000000000000000FF29A700000000000040000020 000004220020021000010005400202200010008008000000000001100004C00483403403500000900100104A048804808010 0000000800000000000000000000FF58B7100000000000000000000000000000000042000000000800000000000000000004 00000002000000105000100080000000400000C00080000800000304B0040000000000000000000000FFB6768080000AA80000181040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6C1441608001 02B600605651405600688E00410700C0A020C006800006007825A00000000000000000FF0B3C000000101101040001001225 0080100010010000004A00084800000684424000000804044440000000001100040800801001004000004400005004000014 000904010000000000000000FF7E6D000100000800A00C00400800800800D040009000002002002002002052000002002002 0021000002A280200282600200208A800802000040413002000012002002800000000000000000FFAE6E0000000A40800002 440000000020080000020300000410400040008280200080000208228220000010000150810028000000000900000280000000981040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018008018008 0080180080000020020000020020020060020028000020000000020020020020020020020020020060000020040000020020 04000000000000000000FF329C00000000000000000000100060000040000100000044000040000005040410000000040000 02000000000000804000000000804000880002824001000000000001000000000000000000FF5A7F000000000800A0080080 0DC4810800C00800800000200210200200200200200300280300200000000280200240280280200200300208200010200200 0002002002000000000000000000FFD9F9000080025801801823C09C01805801C838058C8100741640504600E0AE1269060000581040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010680001400 0000000000000000FFE3DB000000005801800801801811808000041805800008600400000000200600610608000400600000 000604640620220630620450014400E000202004000016000104000000000000000000FFF77F000000000000000000000000 0000000000000000000000006006000000000000006000000000000000000000000000000000000000000000000000000000 006000000000000000000000FF714E0000000000000000000002000000000000000000000005006006004000000000806000 800000000000004000800000001001000801000000800000000000006800000000000000000000FF31C7000000000800800800d81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006010000046 04240E12E02E00600635702A0004804340460001060000C2000000000000000000FF8357000002001801800009A01841A518 01001805800000604E106000016046846804006016006000840A541000A48028040850B61020000400280020040801060068 0C000000000000000000FF1327000000003801800001809A01881803023A1381000070A64062060060060960A60860066060 000180860020063022062062068128900E800000208400000E007044000000000000000000FF1A0A000002001C11800815C0 9801A8000410384180000261560002060060071070260008040060090014A700614F02B0560061440440051022A882A1241000381040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3801A0380180 180580000060060060060170074070040060022060000001041000040040044041E501118E0820000241462A000600600200 0000000000000000FFB877000000001901801801841A21C53801801801800000610620600002600614600400600220600002 002C0000040040040040040004470460000054065400A6006002000000000000000000FFA3C10000000018819418018A1C03 800000801801800000688E4000000430064970060008000060000001068420060060864168062522228100008044A6000046 800002000000000000000000FFE57A000000001C09801803801809810000901C4980800C600640000600600601600600080000b81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (007842000000 000000000000FF557D000000001941821801901A01900028801A858000E0E156006740202006086116006000006000400806 8C610611601614600C011F870060A00CE906400306007202000000000000000000FFE992000000001801801885A51C018020 4004194180000060060060064260460062040068800060040280041062040020040040570020228100040068060004460065 00000000000000000000FF3A09000000001801AA1801A0580580000000180180000060360860000060268160060060100060 04000006026006002106016016D46812110004046006000006006000000000000000000000FFF94C180000001801C018019000781040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000440C60 04006044005C2E13220810800C006006420106006106000000000000000000FFA5F200000000190182180180B801A2580140 180180005070074460A600600604600C00710600600404010500600402200C0840040150C400200400602600000600600500 0000000000000004FF75150100000418A1A01883C8B80180180120182180000068268061200460460064D400700600620025 00040064CC13200C0A50A400004D0160008260C6000026006045000000000000000004FFE9DF008000041801841E01A05801 A00008801801800084E00600600600600610602400600000620000082400603402604400450590001610212091602600000600f81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801801801801 8000806004226000006006006006006016002006006006806006006006080000100140404006006006046006006006006000 000000000000FFCF6B000000001900001833A11801A01801A018018000D0402581614602400603688E007002002004046106 046006826006001052852411004014006046006006006004006000000000000000FFA336000000001801A01823805DE38458 01801801800000602600E00602200600E08400710F606000000005126004006014004006682000A700000068060180060060 07000000000000000000FFA0FF000000001801A01A09841C01905A01841C058000046116006000006006006004006106006000041040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060020000000 00000000FF2F21000000001800001801801801800800001801800000640400600601608600648600608402E0040164060064 06006006000080400006000004006006006006006006002000000000000000FF5B6100000000180000180180180180180180 1801800000600400600000600600600600600600200000600600600600600600000600600200200000600600600600600400 4000000000000000FFF449000000001800201801C01801C01A01C01801800000600400600600600600680600600680200400 6006006006806006000001000802000004006006006006007006804000000000000000FFA79B000000001800021C01801A0500841040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E21608620640 E086008200201002000150006006006006006016012000000000000000FF2973000000001800001A01A01881800880401801 800000681600641000650602E016006D44006444006006006046006546000000800204804204006006806006006826200000 000000000000FFFF92000000001800141C01801A0194EB40051801800000400442600E00402600600600607478E404006806 006006106006060886102814064004106006006006006006000000000000000000FF0387000000021800201801C018018088 0000380180000068AE13612880602700603609700000604010610610600680E086008403006007002000007006806006807000441040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (81005C018001 00684600000600700602E0068000140460001061060060063060060010001002100040009060070060068000060020000000 00000000FF3A40000000001800001801801A0100080100180180000070060004010060060060060011000060880060060060 460060070000070020008042A800600600600600002620A000000000000000FF45B3000000001800601C01801801000801C0 1801800100C00C00E11000450680600E00624400644000600E00600780652600000200600200200000680700600700601600 2000000000000000FF2D5F000000001800001801801A05000821C29801800001628C29E1A700E0860062AE08E0840063300000c41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 0000FF4415000000021800413C81A09A2484024D2A192D80008B6916800906CD6026486496A00836826B408C6926C1683688 E8B60202200084020C0880104284886A16A00826D0C000000000000000FF21B7000000081800121A05821D00902481A0D801 800020642650601680600602602600648640E0102072060C6206A46A06801110B4090040C00042400C006107006496044000 000000000000FF2EBE000000001800001801801800800201801A018000006004006000006806006006807007804000006006 006006006806000802002800804000804004006006006004004000000000000000FF7C37000000041800541801801883140D00241040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00A01A21A002 00106B01744701408200120400200A042002004000000000000000FF94490000002000000022800000C00000044800000000 08000000618E5810211000180460200005A80000004601001200905000005402800200002204900000004060040000000000 00000000FF8C2900000028000002000000000040218A40208200002080002860060490010308000064000202002000002000 00000228000800A808009084000008000000000061506C8000000000000000FF44000000000318000C1801821824A0400106 1B01800044406E000010024806C86206200242004010426406186066086006010406026002402040C840040862062002040200a41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1A418000C060 46084006016806C8600604642E00610044640604601601600630020404422424E040A0600E00600620602642400000000000 0000FFE026000000200900500D008C0E40904402A0088280010C300341351334200200A01320300300320910308348314310 3032010052D12012901201002C03003003023513002000000000000000FFCBC9000000000200201103348400201241008424 0001100880900C00A1000020488080081C808800140820800A00800840820A950088112C0800805008000880800CA8000000 000000000000FF2B20000000200900108800A019029E0020801C49800002220241400200200600302640208020200208238200641040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF08910008000AA0AA0920AA0AA0AA0880842AA0AA0000AA80002880882A8AA8AA88002883A02A8000000010000020320020 020200200220290200A202200002A8288280000000000000000000FF4A6D000000200800200200000A00C00A008002008000 002C82842802802000000500842812802800802D12C52D0A8829028080308108800028000028828028028228528020000000 00000000FFD2510000000014002512014010002252350010010000000830804A2080000400484C800804800C200008408808 00808C08C809040C480C034820114014004804800800004000000000000000FFCDD40000000098000218018018838419410400e41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000280000090 30808000000020000080000000000040000000000000000000FF93980000002AA0AA0A82AA0AA4AA0820A00AA4AA00002A92 A82A84A80082A82A82A82882A02A82080002A82A82A82802A82A82A89002000080102282A80002A82882A000000000000000 0000FFBF8900000035415412035415435434C3503543540001550820D50930D50550551308D50C20D50C40800C40D10CA8C0 0AB0AA0500540D514A0A00D50C50800D50D30C90800000000000000000FF0DB4000800000000000000600000428012400000 0001000001001001121001001001021001001001001001001001001001001800401089D4140100100100100100100000000000141040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080400084 4820900804804804800804804C108008008C0800888800800804D048008C4800004800804804800804004000000000000000 FFF0BB000000000800040200800000808808800A008000002802002002232000002002022112002000002002012002002002 00200000804A412010812002002002002112002000000000000000FF28EC0000002AA0AA48C0AA0AA2AA0800800AA0AA0000 2A82A82882884002A82A82A82882302A80000022AA2022AA2722AA2A82A80702C00002003A02A80002A82E82300000000000 00000000FF3A060000000000004020004000000000000000000000000308000200001001000040000010000000000100040000941040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF04 AA00000040040040040040050040040140140000010010015402110A10810850041810050814000000000800002001400000 10014018401000044001001010001001000000000000000000FFD40C0000004A0C00400C00C10C00C00C00C00C0080010432 0300A00312330348300200300308300000254240240215240200300300300315100101300300340201300300200000000000 0000FF120F000000001800001889801805801801001801800000600600630600600600641643630400600000600608E00620 60161060041044C6006020086006006006006006004000000000000000FF9B1000000000000020300020100022504520100000541040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600640640000 8410482000024016006016004042406000000000000000FFC70D000100000000000141800044022020100042000000022000 E1064302C01080000060000001080000000280000002080000800302205500200A0006000000406040400000000000000000 FFD9A30000000A0000000089810002000000000001000002020414E00E00020020000824E500000200000400408400000410 080810888B20910000848806000200006000000000000000000000FF99DE0000000008000018008118808018048048008000 006002204082002006002212002540142000802DB2802912CEA8A200201600200222402008001200200A00A504044000000000d41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (446410006000 28E00600600600600600602024E0260260B64B60C600408600002008C0000040960060060062960C6000000000000000FFA7 D900000000102000180180184A841821081801880002E40210200E0060160060460024461060110072CF02F0070274160060 06524020054020414006006006242506046000000000000000FF1127000100001022001901811808805805061805080002E0 0629010E40604E00603600010404600000602660660658600638631028018800000030C00600600E02000600600000000000 0000FF1FD3000000001004001821801800801801005821800000602640400004C48610E0060040040060800060060061160000341040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF1ACF00 0000001800001801801821005825801800800100600000220000600600680604320A00E0001060A62B600F0562C600400844 2086082008006006006006042004000000000000000000FFB10B0000000AB8002AB8ABAAB8C92CF8C12ABAAA800048644228 80880642AE2AE2AE2E822008E0005066863C600680625600606200A2862000003262262AE2AE288140240000000000000000 FFE613000000001800001C01801C23001C0500180080008168A284444600680680600600491024680008600E00E20600600E 006C12CA600E040821116006006006044044010000000000000000FF6545000000001000001801801800821831001801000000b41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000202226 2070092AE2AE2AE2AE2AA2A8220000000000000004FF388D000000001800001A01A01A03A01800A01A000000006086006046 0060060070060061000D684000600640600610640600500750A946445040006806006006006004000000000000000000FF2C 780000001558003559559559159519109559540000556D56D52150556D56D575565121405460144562160062C628600E0072 C711645644C0045565565565565125544D0000000000000000FF3C7F0000000AB8002AB8AB8AB88908988D8AB8AA000112E0 08ACE28E48EAAEAAE2AE28E22A40600304E956816CB723688600428802220F09000222E2AE2AE2AE2AF20CA880000000000000741040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4E0060060960 0600600600600E0062C032E02E43653634E12E20410011010804410008600600600600600610E000000000000000FF60EA00 0000001800001C01001C4180384500180080008060068420400068068060060220A6007000C4620630600620620600490092 1000906000007004006006002006816000000000000000FFB430000000001800201801A01805A41800A01A00000000600600 600600600600600600620010601001681600624608688600425001211604C800006006006006006804100000000000000000 FFE6700000000AB8000ABCABCABC89C89C88CABCAA00002AE2AE28A2882AC2AE2AEAAE28A00822F0000860A682E88E82E02E00f41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFE3AB000000 001800001801801805801800001801800000000600400400200600600600401600610040620610600602604600400400000A 002000006006006006004046100000000000000000FF8E080000000C98000AB8AB8AB8898AB8838AB80000002AE00628E0AE 1042AE2AE2AE28E2062AE00000660608600604600600C2122302203840002262AE2AE2AE28E23A226000000000000000FF49 5300000000180000180100182580184180191400000064060222004260060060060421260060040060860060060064061440 52004000014444016004006006042106006000000000000000FF8C9800000004380000180180180180180900182080000061000c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (421022242540 102AE2AE2AE2AE2AC002220000000000000000FF17E100000000180000180180182180180200192180000004260002000260 060060060000160064040C60A60460A6286086000026100002002004086006004006000084000000000000000000FF18B700 00000AB8000AB8AB8AB8898AB88C0AB8AB80002A82CE2AC4AC2AE2AE2AE2AE2CC2A62AE41004E00E24E20E00E20E2AC21622 83202822802AE2AE2AE2AE2CC28C228000000000000000FF3053001000113800155955955915955950155815800055011655 01302125565565565504C65560C42160164964160164362CC5044404C824A54444E556554556550446550000000000000000008c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400400680501 700609402000E40400620600600602E00E006400416414004004106007006116105000000000000000000000FFB3BC000000 001C00001C01801A41800004001821800000210E00420400600400600600410880628832E02E43653634E12E0060C8456096 104110006006006806004480110000000000000000FFAE50000000201800001801A01805800000001C058000000026044045 00200480600402400000600400608700600600640600600208200604C404006006006006004052000000000000000000FFB2 A80000000AB8000AB8AB8AB8C98AA0E80AB88980002A820628C08C2AA2AC2AE2AE28C2202AE0001063460861465061062AE3004c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8E8000000098 00005C80001809800000001801800040010610C30440600401680600400040620000640600608610621600248008200E0000 0044E000007006105002000000000000000000FFBF91800000009840005C0184180980180000180180000020061440440030 04106006004002006000046006106506006006006002002006000000446006007006004002000000000000000000FFE70880 0002401A20011A01C2FB81801810401C01804100100603453540300480600640C002D8600002600708627610640600614230 A204000000016006006806004002000000000000000000FF5C59000002401800401901C11801800000601C018000C028864000cc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000200050 41100060A6004024400000000000000000FF927A000000001800001801800001801800041801820020629620408420240605 800601400640629000622622E0063060860060042AC11057A1000840060060A6004184010010000000000000FF1FD7000000 001800011821800023801810023801804000C00640401402220610000650404601600000608600603E056026026044004082 082000104086006116004004000000000000000000FF9E1D000080401800201880291901800004501A01882008202E094004 017084A2600600C00020600800601600630614640610250000244C20008820640890600600402A210008000000000000FFE4002c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (110100050000 004020000000000080000000400000000008000108080080090046006000004120000000000000000000FF7E3F8000000000 0000000185200002800014C00000003480000060064400000800500060000004803280284305301483280901200082400002 00000006006000006010000000000000000000FFE929000000001800001900110843800004081001800000E0064140040040 8620200600400400650000610E00628622622608208600044200200800420008600600400C000000000000000000FF835600 010000180000184000090180000000580192404865261041042520060020060040040060000064262560560061060424064C00ac1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000AA8000A A8AA8808AACA2800108AAA80000822AA2AA2AA02B3222AA0222AA2322AA08004A00A24A20A22A20A2AA22222A12A23240022 22AB2AA2AA2AA22A000000000000000000FF8371080000000000000001000001040000200001000108880400000000000100 08000000840002000C00A00400A0080080480110000000080480004020000800000090000000000000000000FF5792000000 0AA8000AB8A20848AA8808000408AA80004122AA2AA2AA00222A2022922AA2882AA4001023420821421021022222023A6002 22A10032028A2AA2AA2AA204000000000000000000FF24610000000000000000098000000040000000000000004000004004006c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100080000040 000000000000000000000000000000FF59F58800004AA8006AA8A28888AA8908000AA8AA8001A23AAA0AA0AA0022AA2222AA 0AA2232AA00000260208200200200208222A2003222220002AA28A2AA2AA0AA222000000000000000000FF789D0000000010 002010014480012100004022010001020804000000284809000C800001050040004002001000000000400001080044001000 00014001001004000104000000000000000000FFB453000000155800355955335D55905800155D55800044655655655632C5 564D6556556454D5610021601649641645643605644652C44E456000556516557556556444000000000000000000FF8A140000ec1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (288803000000 00000000080400001A00800200001800000000200000000000000000001800000000000000000000FFA76800800000000000 000020000000020000000000000000000000000000808200080000000000000000000000008A882800000000000000000000 0000000000000000000000000000000000FF79D000000000000000000800020000800000000000000880002002002A000011 0000400010000480328128430530148328200080120010010200000000001000400108000000000000000000FF2C9C000000 4000000000000240000240000002000000000000000000010000000000000081000000000000000000400000030000010080001c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001801 001001801801A01803800000E00600600600610E08608E006026000000086206006086226056000807006004204000006006 006000000006000000000000000000FF0AE10100000000000090011030014814210011010000040004020000100444040404 004004000000000000000404111400100440001005004000004000000000000004000000000000000000FF08600000000000 0000000080080020080080080000008020028020020020000020000020220000000020028020822020060802428030010000 00002002002000000002000000000000000000FFF37300000000000000000028000000000000008200000280008000001002009c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000008060060 00000000000000000000000000FFBE0E00000000000000180000180080180100080080000020020020020020060020060020 02000000002002002002002002001002002006006000004002002000000002000000000000000000FF78A500000000000000 0001004001100000400001000000000400000000100080000000000000000000010000000100000400000000180180000000 0000000000000000000000000000000000FFF1B4000000000000010800800C00800840800800800080200204300200300201 A002002002000000002082803003002002000003002002062000003002002000000002000000000000000000FFC27B000000005c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200E00600640 04208462060860A6507106020001014003002108004000006000000006000000000000000000FFF14A000000000000001800 0038A9801841845801800040640E00600040C00614200600600608010010600640E0160160060000D000400400400000C080 00E000000406000000000000000000FF1FF10000000000000000018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000006006000000000000000000000000000FF59CE0000000000 000000018004000000000000000000004000000800000001000000000000000000000000005000000000000004800004004000dc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018400049 51801821C05C018000407216002006046026105016116016100240005A862021479060260201288160021022900060000100 00010406000000000000000000FFEA79000000000000001901800001949851881C8180000240A6006C062060060230060060 06010090126006001106246086000004804000850000044006080000000086020000000000000000FF3DF300000000000000 1801800801A11A01821901800004600680600600E00620200611681620000008690608A00E86E04600000400500016040000 C886100000010106040000000000000000FFDED3000000000000001840000801801801C818018000007146007006026046C0003c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E84600600000 0006000000000000000000FF2044000000000000001C019A000381180180180180000C500600200704600600600740600600 000010400400100700401E0000050A7000000060006806806000001006000000000000000000FFFE71000000000000041801 804821801ED18018018000286006086204086006206006006006008028004804000106044006000084106480450200006007 006000000006000000000000000000FFED380000000000000D1800012041811B018118018000245026906006144006B15006 406806000020804084003806006806000100007B04404400016040000000001006000000000000000000FF6459000000000000bc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006007800000 0040241064060C6006000001906420C20100106006006000000006000000000000000000FFAB3E0000000000002018019424 41801A01011901800008C8270041064040060061860062864000041044144062060061061800200968000000C50060860060 00008006000000000000000000FF1245000000000000001801800801C0182304180580000060D600400400E0060068160065 0601000000410401611601643601004000610410C20000710E006000010106000000000000000000FFAC2C00000000060010 9B018508058A1801009801800000604780400680780609600680600600000400410600600600600600000004600380200404007c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (988994A0C380 1804851905800008510600610645600E08E006006A06410006906C3400611613600600100600516080002700600622600000 0106000000000000000000FF4E1C000000000140401C41C40011C49800801801800000408600600600600600600600600600 001000610400611600600610040654400A832290806026006000000016000000000000000000FFF343000000000000001C01 A00001A01940805841800020401600620600600700600E0060060000040060C62960060462CE00900600C4044B4224086016 006000000006000000000000000000FF656F000000000000001801804001801901005841800050C00600440604600680600600fc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000006 000000000000000000FF77B0000000000080001825800A058111018018018000806006004806006006006006007006006004 006006004916006806100406100555010044046006446000000016000000000000000000FFC1CE0000000000400138118448 098216018018018000886086004084006016806006006004006011006146004807046006000806C5000002029000E0460060 00000006000000000000000000FFBFF4000000000000043D03990101801AE080180180000040060070840040061160060064 0600000000600400600700700600000600D28000000002E01E006000000006000000000000000000FF3C7B0000000000000200021040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (048360A40565 0E08641608E086030824917000006004004006006000000006000000000000000000FF3BBF00000000000000180180080180 1001001803800000600640408600600600640600600600600048600640400600640600000000600200400000400600600000 0006000000000000000000FFFC4E000000000000001801800801801000801801800000600600400400600600600600600600 6004006006004006006006000006000000000004006006006000000006000000000000000000FFC06B000000000000001C01 800801801001801801800000600680400600600700600600600600600200680600400600600600100300100000000300600600821040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800801C01001 801C01802020608EB2448600E00E7862261AE20600E0A020E00E28420E88E28602802288E040004000006006006000000406 000000000010000000FFB0C5000000000000001A01801801801901001C018000006006006006006006026006006006806004 006006007006006006000084006906020405804006006040000006000000000000000000FFEEF4000000000000003C01A008 01801C01001803800000600600600600602606600E0060060060000860060040070060060000006060010020000040060060 00000006000000000000000000FF79A1000000000000403881803881A8B02900188180204260AE04C20621602EC8602E0B6400421040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000060000 00000000000000FF2AFE00000000000000190000590191585180190180000470460164074060062A60060060060460010465 06006007006006000087006004024000006000000000000006000000000000000000FF3AEF00000000060000180000180180 1101801801800180600680400600600700600600600400600000600600600600780600100200600000400000600000000000 0006000000000000000000FFEC92000000000000001C01800801801A01801801800000600608640600700680600608600600 60000060060048068060060000068060C0804400006006006020000406000000000010000000FF9C0500000000000040180100c21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (604000640610 6086006206000126000348804000216000006000200006000000000000000000FF7E5A0000000000A0409800209C09A81A01 923A89800002E28EA06896116296206810C86C0EA06800C46816807086CD6A86000930A40022006800206C00D06010200826 000000000000000000FF5E22000000000000003B45C458C585590580180380002860060B624602680690E52000610610E020 09634648600E00604E001C0601030E53404000600600000000010E000000000000000000FFBF4E0000000000000018018008 01801001E018018000006806004004806006006000006006006002806006004006006006000002001801806002006006000000221040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00800800000A 0980000A601220200A00A88E80E28228220200200060202220200A4020020002020030040000010004020020080000020000 00000000000000FFC5DE000000000000100401916202008400002040000000018008C1A040084008041800000C0005200000 804000000204E0000080120020080460000206406000000008000000000000000000FF2F310000000001000404A58000C006 04800000000000008000440000060800C400000000800000000281180C0000000108000018458C1117000084010628610000 0020000000000000000000FFB9E500000000002000DA00001111801841AA18818000806A0E1062449060062160000060042000a21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080400000000 0000000000FF7EDA000000000000301A230C1803A01941A01A4180000868165060C624600640620600600600608040611610 6006556126000006546124096200026106006100000006000000000000000000FF57CF000000000080432800C0AF28CA0800 C00800800100310302320B10284204B81300300300324100320344350300320200150B00AA0884104080B203402000001002 000000000000000000FF4C0200000000008021104224802D5821032002020000B00804820C10884200801020800800088800 880A00800D00BD8800000C00A0108120C801004800800000000880000000000000000000FF5860000000000000002801020800621040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001001020000 001000000800800C48341002801041040000001000000000000000000000FF0E900008000000000AA2A20040AA0AA0880AA0 AA0000800AA82200000902A82902A82A82A80000002200104002A82082A80002A02302184080002202882888000002A80000 00000000000000FF0347000000000000200010A08A00200A42A00A000000402002882912C00000808802802802802A008128 02B0280292280200000200A000822800112842842000800802000000000000000000FFF80F00000000000000100132200100 020100100100008CC004810C2082C004844000804800004900884D30849004801000000808900144284B000048008000000000e21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000400040000 000900000902000008000800000000000004000000A010100112000000009000000001048008000000000000000000000000 0000000000FF46D20000000000000AA0AA0C80AA0AA0A80AA0AA00002A82A84003202A8AA82202A82A82A80002002A82A830 8AA82A82A80012512A90800105012A82882880000002A8000000000000000000FF75E20000000000003541542C8354354330 3541540000C40D50C40950CC0550C41550D50D50800900D50C00830550408D500014415413208A0801448D30D50800800D50 000000000000000000FF935B000800000400400000402000000000400400000100100111100100080100100000100100100300121040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFCB130000000004002000112102002002000000010000004805008848800004800804004804804802804800808004 8008000000A4004144280D02004800800004004804000000000000000000FFE3A6000000000000000A00884800800844A00A 0000008000021423020020000820000020020024000020021228020060020000000000008220000020220020020020020000 00000000000000FFB1160000000000000AA4A20204AA4AA48C0AA0AA00002A82A82400102A8AA83382A82A82A80001802A82 AA2002A92AA2AA000B08AA8A09008000AA82882A80000002A8000000000000000000FFC4DE0008000000000004000000000000921040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (12012302A008 420005062B000E0220000002521020C0002002000000000000000000FF74EA40080000040040041540044040040040044000 0101500140040100100521100500100100100100001800000000800000000014400000100022440000000400100000000000 0000000000FF77AA400000000400408D20C20D00C00C00C00C00800100328308A00300300320300300300310300304200200 3042542002101023001003003003002002003003003002000000000000000000FFE95E000000000000005801001801801801 801801800000604600601600601600600600620600600000E2060063060140060001144040B424600044600600610600600600521040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801025800000 60060C400048010600614620600600600022600610601600E0160000020A2100000100006040006004006006000000000000 000000FFA6F70008000000000001459000200A204180002000000000000800203001002500080000000000404400200A0010 0100002A00003400B0240228100006006000000000000000000000000000FFED5F0000000000000101358201000000018000 4000000103000882000000000040000004001000000282000049401200000808CC800940C040008000060068008000000000 00000000000000FFACD5000000000000006810000820800800800801810000202624200A04200A00A002502002002000002800d21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFF4550000000000000010019208010A900180100180000060060842160060060021060060060062000060464000065062 2E000342092008104300006046020004006006000000000000000000FFBB5B00000000000000180188180580580180100180 8028600600602602600644600600600600600000702E00A0070070062C028401000014444000600E08004400604600000000 0000000000FF030100080000000000594001980380184180100380002860060060060020060160B610618600604001E00604 670600604E018004404650498090106000006004006026000000000000000000FF0ECE0000000000000018120010218A180100321040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (82AE31700600 022022020A2C41002A628E28E0060062AE000000000000000000FF36C2000000000000001001901801001091801801800000 70060060070070060069060060060065000060060000060262D600024800000A0AC400006006006806006006000000000000 000000FFCDA22000000000002AB8B2000AABA03AC98AB2AB8000AAEAAE60E004AAEAAE2AA3262AE0162AE5802AE2164C22AE 00E086000910A20066818000A262882880060062AE000000000000000000FF2437000000000400001A080138018018238010 0180000060060460A600600600600E0064CE00680000608E052006047006000010004486240800116000000006006006000000b21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB80002AE2AE 2AE2AC2AE2AE2AAA262AE2AE2AF0042AE9062AE2AE00702E0002232221232810052AE28E28E0060062AE0000000000000000 00FFF1F4000800000000401401855C01455401801C01800100600600614E00600600700E0061060068000065061060068465 2E001003112906800C0080E046026006006006000000000000000000FFBE9E400000000000555D55815D55D55C45955D5580 015565565565565565565574565565565560045564565565565160060011044D422640010455655653700600655600000000 0000000000FF99870000000000000AB0A3B008AB08108D8AB8AB80002AF2AF0B64062AF2AF2AA2262AE2462AE0002AE8460000721040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 1DD700000000000012900180C80B00B001801001800000600615610600600600200600600600600000624E0CE0062064D600 030020C08010E000100046046086006006000000000000000000FFCE34000000000000001211812801001021001001800000 600600400600600600210600600600690400604600600620EA06000808008408036B06000006006006006006000000000000 000000FF14BC000000000000201001B20A01201295801A018000806806806006006806802016006006006200006496006006 946086000104900882800000806046026006006006000000000000000000FF913D0000000004000AB8A38408AB8AB8018AB800f21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (52645600048A 4324D0552004556556536450550556000000000000000000FF4FE68000000000018010018808018018018018018000006000 00608408400601600200000600600200414602600604E00600011200A04210200000E0260060000000060000000000000000 00FFFDE00000000000000110A38008210010AB8818AB80002AE2AE0042644462AE2AA2AE2AE2AE2AE0022AE0064062AE02E0 0600002008022022600222028E28E3262AE2AE000000000000000000FF6CC90000000000000050098C090114100105580180 0000600640601654E00600200600600600600400610620600610600600001004001000600400800600601600600600000000000a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002AE2A82AE4 062062AE1062AA2A82AE2AE0002AC0063062AE02610600002040021020200022428E2EE2A82A82AE000000000000000000FF D854000800000001841001884821801801851801800000600000E20600E00600600600000600600400600608600600E08600 0046106006002006006006006000000006000000000000000000FFD42E0000000000018AB0AB8308AB8AB8AB8AB8AB80002A E2A82AE0362362AE2462AE2A82AE2AE0002AC20E20E2AE28622E0002460A228422A00032628E28E2A82A82AE000000000000 000000FF784C00000000000190515584891594B95590395580005565505461161065565565525505565560045544B6056556008a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFC072 000000000001A41805801C01A01801C01C018000086003006007007006016807000886006005046406006006016006000000 2000100A6004404106006000000006000000000000000000FF146A000800000001801809932A01801801A01A018000006002 00600400400628600700000600600000424E08E0062064D600030005095204E0000140460060000010060000000000000000 00FFFD9B00000000000180100180180180180180180180010070000065360B680603600600000600600400410682680610E8 06000810284002902004084006006000000006000000000000000000FFD4C60000000000018AB0A38048AB8AB8AB8AB8AB80004a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (161480001002 80002000046120000000000006000000000000000000FF9B52800000008081881140001B13801800001841800000700080E0 06806007016006000006006000844006002286046006080008420002022000006300000000000006000000000000000000FF 9268800000010001F019518008898018018018418001017502096004044007106006101807C06000004006001D0604600610 0000144002002000006006006400001806000000000000000000FFC6BF800800000101C21003800A05C01861A01A01800108 F08040600602680608700708080620600000420700100600E80600101008080900200000640600620000100600000000000000ca1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600600 6006002006000006016000046426506106106016000006082004000000006000006000000006000000000000000000FFF9F1 0000000000018018118418858018018018018000006016046006106046000016000006006000026036002016206006000002 20A45000C002006006000000000006000000000000000000FFE11F0000000000018090118208038818298018018000006404 78600608600600008600010600E00200600E20008608620600000200202A18420A4060060000000000060000000000000000 00FF5E39800000100001801810001821801800401C018000C0600A0260060270260260170000060060000064060C20160060002a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFBB540000 0000000000800980000000001180000000000001340000002000000480040000000000004001002D40001080000001001004 50110100010006006000000000000000000000000000FF51278000000000000A00018A000000000180000000000002000002 D01400000800000000000003001482480000002404B0000008010000000400080046046000000000000000000000000000FF 859000000000000180180000100180182000180180002060064860040240060421060000060060000060060260062062060A 8006216106110410026140006000000006000000000000000000FF3D2800000008000181180000192190181000180180000000aa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C2C54443440 4400556556556000001D56000000000000000000FF8A270000000000AA8308AA8008AA8AA8A28AA8AA8000AAAB0A2AA0CA0A 2AAA2A22AA0002AA2AA50002220B1522AA2A222A0002B22A2032A224802222CA2AA0000002AA000000000000000000FF95E2 1000000000010000000480000010010000010000004000000000000005080200801001000001000000110800008080000104 01010012C080004000000001000000000000000000000000FF00BF0000000000AA8068A300A8AB8AA8B28AA8AA80002AA002 2AE00240A2AA2022AA0002AA2AA0001120020022AA00010200022223648632200032028A28A0000002AA0000000000000000006a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 1004000010000001000001010B00001000000001104B0100100000000040040000000000000000000000000000FFB9398100 000000AA8AA8A2904CAA0AA8A28AACAA00002AA2232AA2AA2AA2A82220120002AA2AA0002AA0032422AA00E0020002000002 002200002AA28A28A0000002AA000000000000000000FF2D4480080000000110000115400100100100140100008048400042 00008804810801001005004003400140A0100400800000100400410481400200C000000001001004000000000000000000FF FC2D800000000555955955001955D55955555B5580015575565565565575564578C60015575565005564B64075565444560000ea1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0D4F00000000 00000806000000020000240020100100020880000001AA80200A80208000002802A800000000000014002804100000000043 02A8000000000000000884000000000000000000FFA1C5008000008000020000400000002000000000000000000000000000 0000000000000000000000000000000601008000000000000000080000008000000000000018000000000000000000FF9130 08000000020000000809420040000820020000000008810000000008000090D00000008004000002480008002404B0000040 000048008500000000000000000800000000000000000000FF1A2A0080000000000000000400000000000000000000800010001a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (182002002000 002802002000002010082000000000000000FFD0BD00000180980182300100320380B88182B88808A180608E00602E08E28E 88E0060042000860A002008600408700E2080268050070078260A000E006006000004080004000000000000000FF67970100 02000001101001001000200445001000000005000100400444404404404400400040441000000541044014484000D0044100 00510410004000110000004010004000000000000000FF002E000000800800804800804800810C8085088010410130128020 50000512000000802400002000040082C16143002400002000C12802802000002802112000003000002000000000000000FF009a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000010 00000000000000000000004001000000000000000000000000000006006000000000000000000000000000FF32A800000080 0801000801200800800800201000000000200200200600600700200300000000200000000200240200400001080400200200 2800004002002000002000100000000000000000FFD735000004000000001400001000000001200000000100000000400000 0000004004804000000000000000405000001000000000000001000800000000000000004000004000000000000000FF2049 000000800800000C00800800A008008008000000002002002002002002003002002000002000000002203002003800002000005a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001805801 0088000509019018005018400020086416416946517207006006004000006000120116000857016001006502810102006000 006880006000007000006000000000000001FFA2BA00000180180100181000180382182A0058000000006086006406006106 106106204000016000000006208006486080006000006006006100006000006000006000006000000000000000FFBF290000 0180000000000180000000000180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000006006000000000000000000000000000FF5FAF0000018010000000018002000000018000000000000004000000da1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010060000068 00000000206040004000000000000000FF11EE000001805A01800808020905841954101840000000641300F3460060872060 360020000060001000164040D6043880006502006104006000006900000010006000204000000000000000FFA9B1000001E0 1801008001800005281011801800002000440520640628EA0600600600500010600012008610011200E00080682008A40A1A 6080006006000000006801006000000000000000FF67E300000180180100080180E801C01B0180380000000860E400601E00 60064860D620400000E0000000668081022C680000704010601695E000006006000010006000406000000000000000FFD322003a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600640680600 2100006004000006100004006000404006404006004004004006006000002820000000000000000000FF5411000001C63809 8C00018880012030018018000001004400606407607246007006002000816008000006604077007000006200002401106000 006006006000007000004000000000000000FFB4C4000001803809880511808003C039018018000000004002026006026206 02600600200910600A100006004107006000006400006004007802006806006000406000004000000000000000FF57E80000 01C018818409080048010013000018000000006002026006047046226006002890016000000006004806002000407000A02000ba1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018010000 01908001201001801000000000400010600640600600601704000000E0008080060144042460400040040000021040000040 0E006000002000000000000000000000FF130800C001801C014508098888510F149981103810000460200064160068060864 660001403E600010019680401C086100004064244006004001004006006000863000000000000000000000FF322800000180 1A01000011A00001901923C0104400002040C004610600E00610600640201040600400020720400510621000C80C40020301 4004004006006000002001000000000000000000FF6B8D000001801881000C01B04801801811801000000080600000600680007a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600080600600 6000000800002000000000000000FF6F14004001001801052001E0804101100D811004100000410210610601700600640640 7140006004110017C04806004020004800046806016004006816006001802000002000000000000000FFF54A000011A05805 010003800401031005801000000002400100600600601600E487004000006004000016104016004000114052032C02806004 006006006000002800002000000000000001FF1D2D000001001801000401A00209401441801000000042400284620E206006 00601604500801600100020600CC072442D0015008006406106001006006006000002000002000000000000000FFA7A2008000fa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806007000006 006004006007006804002006005004002806000004006006006000806006000000000000000000FF536F0000080010052008 0180080100080380180000000068060060060060060060060000060060040060161060140020060060060164870020040068 06000000004806000000000000000000FFFA48000001E05001012E0D808881050811801800000004680600600400600E80E4 06000126006004006006006007002026116016086006800005006006006000006006000000000000000000FF25B8000001A0 100100020980608100120180100000000040000060060060060061070060A00060000000060048078040000048400C68868000061040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100100380180 18038008A9823820000002600655612C10600604600E48002600600104600F48688500600708400C00400500400100480600 0001006006000000000000000000FF9B75000001801001000809880801000801801800000000600600600600600600600600 00060860041060060060460860064040040000040A4004004006006000006006000000000000000000FF181C000000001001 0008018008010000018018000000006006006006006006006006000006006000006006006004002006004004006006002000 006006000000004006000000000000000000FF9E5E000001801401000801C00801000401801800000000600600600600600600861040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806006020000 006006000000010000000000FF1E6F000001801801800801800A0100081180180000000260062AE0A6086006026446280026 0061000A600E206086C828063C480C402006044140007006006001006016040000010000000000FF289D000200001601001C 0190580181460191380005400062560065560164560061160005560164540061068064440065560069061041441144140040 06040000006086000000000000000000FF3737000001819001010801800801180001C0180000000060060060060060060060 0E001006086006006006006024006006007006000004086006004006006000006006000000000000000000FF00CD0004000200461040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000060060 00006006006802002006006002002006806000006006000001806806000000000000000000FF43AB000000041801815C1010 1805800550445C4000000060060060170060060060060000060060000060061068070010060060062060068CE00000600000 600000700E020000000000000000FF5F7E000201801C01801800105A01800C00003800008000781600600C00782600621600 02860060800060060064060020060A60860021260244A0006000000000006086000000000000000000FFFE99000400001801 800A0180080100C809B11C00022000622700652700E217006126000856016448806106006046A0254E00400408600680600800c61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (181000001103 845002181884000040602680602480E02681610E00800600600000611E00E3000020064C4004086006204000806000000020 406206000000000000000000FFF242040220333221355A00201AA1AA04020298800000906046026C1648EA2644704E048846 94680080EAD6C8E230800A168C4A24930C040068A0046880806040B06A86000000000000000000FF04B30000018010090019 4589380B800881905820000041628E90614602608E8164864000862060800060060271005300A70068860060A65540080060 06206000016046540000000000000000FF36B4000000001401000A01800801000801A018000000006006006006006006006000261040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000008880 04810000000000000000FF31AD000020921000002A00000800801840429800000000680A00600308200E0064060400A20820 00002682102840164002032402072002806000044002002000202002020000000000000000FFA8D002000180A01800020184 A00013000580002000002803410010080011012292304200002200100000204900904805C080138040800004018000058600 60000060C0000000000000000000FFCA480000018040000280A599007C000181A02000000110088100008000100010000020 00000001400000000008012182000000300003A0818448420006606000116020780000000000000000FFA96C00000184110100a61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004804C4000 4800800905004000000050800880914800004800800001010004810000000000000000FF8DE6000001933801841823011841 84114188380400000060068060068060061160064200060060400061162060262CE006426A0E04610644C010A26306006000 08E002288000000000000000FFECE3000400C00488510800D40C8AC92C04800800000028214A203102002103003292001003 00311120320311231200354B80B103413412003321003003402001403042000000000000000000FF48130002002902212500 4320028028020120400000008088144A0301224280000080800000800880408800A20C28800038000000800C10CA0830800800661040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004224004004 0040020000000010090010000010000000011010010010010010010010110000018000011011080014010010010000010010 01000000000000000001FF85CC0008AA0880880020A20400000000A20A80000000800010AA82A8AA82A82A82A82000002A80 000002A82A82202380002A0800080220220220A20288288000000000220000000000000000FF6A74000200A22C00AC0810A0 0A80A20C10C048000000410820002802000800801000130802002800802802802812902802012482A2A81280280011282282 2801542800900000000000000001FFED1D0002002012452102012CA2542934012010000000924B140048000048048048048000e61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80002B00002A 0000000000000000FF46310008000AA002112400002000008010002000000000044100000000100100000002000000022200 00000010810010000090C0100110000022080000020000120000000000000000000000FFB4360000AA0AA0AA0A80AA0800AA 0AA0AA0AA00000012A82A02A82A92A82A92A92A82280002A80000002A84C02A02880002A8228208240AA80082A82A8288000 2A00002A8000000000000000FFC1320003542003502401542902D232234435040000012D0900550D51550550550D50510800 550800800D50D50450540000D40210A30C40D50A00C48D30D10800C10800D50000000000000000FFBC93000C00400400404200161040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006106 31601622401400400400600600400000600600600600C002006000000000000000FFBC3C0002002012012400112042002002 012010010000004890804800004804004004808804800C00800800930905044800804084A28A100048008048408400050048 04814000000000000000FF8C7F00000080000008C8008D080080081080080000008000020020028000000000001000020000 0800200200204A112006002810082142002010002002002002012002002000000000000000FF66160000AA0AA0AA0006A201 00AA0AA0A20AA00000002A82202A82A82A82A8AA8AA82200002A84100002AA2122002410022A9320040000AA82002A82882C00961040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880080480100 180480800060122160020060860220025400022800100028028020126A480001241411211200600044000200200200240004 4000000000000000FFC1C3400988401401440504480400400400400401000100100100100100100100500506100110100100 1000000200018000000000000000001000444000001001005004000000000000000000FF7ED8400000C00C00C00C00C00C22 C00C02C00C00800100300308B003003003003003001003401001003402003203102103003080002003043001002002003003 003001002000000000000000FF574C000009801001903851089801801801801801808000600640600600608604600600004600561040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002006004000 000000000000FFBB8F000009810905801004021001801829021801800000600E006004006006406006000026400400006006 08640604E006004000010146016410022004014086002406046000000000000000FF772E0008099080000800218240200000 3185000000000000000200000402402000500005400004000060000904001500200000000004200004300000060061000060 40000000000000000000FF21CA00000180000008011380002400000380000000000000041080000000000000000000200000 00006500510810800110800900004000820000C40006006000016000800000000000000000FFC80D0000008009048229310000d61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00006046A562 8620222601214003020E014800016044022007003006000000000000000000FF20B900000002282593080193180C12500980 1801800000600600600E0060060060060000060000000064960860260A809610000A2041464A604008600600000600600600 6000000000000000FFC28100000188280190380180D840803800801803808000620604E0060064860460062A00060000B020 700700611628104601041200420E10604020E002002006006026004000000000000000FFD275000800002819803952009801 81980001180180800062060060060460C60260560005062000A02060060160860060060040001600040EA00000A00000E00600361040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00B0A3CAB801 80002AE2AEAAE2462AE2AE2AEAAE0002AE2A90022AE32E4962A6A8D04628AAC010404E22D00232628E28E0062AE2AE806000 000000000000FF198C400000401C01F01801E018000012088018018000006006006006806006806006800006000000006086 0C600600600600213022400600C000006002004006006006004000000000000000FFAB4F0001AB88D88D9508A2005B809418 B20AB80180002AE2AEAAE0242AE2AE2AEAAE0002AE2A80202AE00604600E042406262A10480006004000A262882880062AA2 AE806000000000000000FF2C90200000201A01805A10003840A11801001C018000007006006486006006006006000006000800b61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (068060000000 00000000FF09BD00002A0AA8AB8008A38418AB905AA28ABC0180002AF2AE2AEAACAAE2AEAAE2AE8002AE2A90002AE006C062 2E2262062AA00C2002AC2238002AC28A28C0072AF2AE004000000000000000FF70C0000801800821801C0184180340140180 1801800080600600711700680700600700000600004000700680600E00611600200604848510204101404604600600600600 6000000000000000FF8EE5000154154955853D5590BD55C31D449558018000556556D56557556557556D5700055655000C55 625681654E556336552C06088554542015554532554006556556804000000000000000FF644000002BCA9C898048B388982800761040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400641600602 610600A000106206012084006042004006006006454000000000000000FF3A4900000182C801820801809801001001801801 800000600600600E0060060060060000060004000063460A60062960360820300160D6086240096006006006006006086000 000000000000FF50F1000000200A018B0A11921801213000A018018001006006006006007006006006000006000800004A46 34608691680E002000026006012010006022004006006006004000000000000000FF528A00010180080180280180B8011410 118018018000006006806006006006006806000006000008006096016006006146002B24108004906000804006046006006000f61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (541559540000 5565565540965565545565560045560060845564864B65563563564D24445560165464C444E5505105505565561540000000 00000000FFC89980010184180100100180180400000100180000000060060040040060040060060040060061000061261460 060064060420800C6006006100006044004000006006004000000000000000FF91D50000AB8000AB88A8A38138190030A38A B8AB80002AE2AE2AE0A42AE2AE2AE2AE0002AE0000E02AE04E0062AE00620622238022600622600022628E2EE2AE2AE2AE00 6000000000000000FF8E3C0000001008018008098C1945131008801801800000600600640600600600600600000600000400000e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF793300002B88F8AB1610A38AB8880AB0A30AB8AA00002AE2AE2AC2AE2AE2AC2AE2AE0062AE0060802AE01E0062AC26 42063162B42002AC16E00024628C28C2A828E2AE400000000000000000FFBD770008800C18010AB0018C1900121000001800 000000600600442600600400600600400600640000600E0060060040060020100062C6014000086000000000006006204000 000000000000FF622200002B8898AB00D0AB8AB8B00AB0AB0AB8AA00002AE2AE2AC2AE2AE2AC2AE2AE0042AE0064082AE206 20E2AE28C0AE20222420E2AE21420828E28C2AC2A82AE2AE0AC000000000000000FFE72E0000540159550011558038440131008e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006004616506 14420400400001000004A004004000006006006000000000000000FFC7F40000440018051018458018008030010018000001 0060020068078070070070060870A78060040060060061040C60060064042000800840040160040040000170060000000000 00000000FF8F8400080180180108580980184000101100180000000060060040060068060060060060060064000063460A60 04096036106000050000306210016024004000026006080000000000000000FF3BF000010044180101100180180480100100 1800000000680300600400600500700600600600601000680741600400410605600808000400608014600404400000600645004e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180008008868 0200E0268C600602E80600680700600000210608640450620600610403001021442850201400C00000000602200000000000 0000FF1C10800045801801901010020808801001001800000002600B00600408680480E00600600610E00000208600632410 6106006000000008014000422004004000040804002000000000000000FF3D58800000001801811809840852001001601800 000008700F00C006006006006006006006006001806056016444006006004000004010000000402004004000046006006000 000000000000FF7A1F800801C01801805003800820003001001800000004700698480710680501700600600711600004692F00ce1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF43A300000000180100384402180080108B001800000010600200620E10600600640600410E00600000200608602C002006 006016110008404400144104004000000006006000000000000000FF71C20000018018850438918308008110031018000000 00600201624E00608614620600408E00600800610600602C4264660061060442440140500060040140000060060420000000 00000000FFCA1E00000000180501504380282400B001001802002010600601400600622C0860061041460060800460060160 0405640E14600A4841A4184080026084004000016006002000000000000000FF12DC80000010184382185000880080109109002e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A230C2002022 B02A23221540422022AA2AA0002880022AE000000000000000FFDE070000018940000000098500000C200100000000000000 0650820400020800000010000000000000600001001012010000801000408C00000013000400400002611000000000000000 0000FF7E2D80008184004413400190214C00800180000000000000000401280000C00000000100000003200063402A000000 00300C0000010000330320000006006000006440000000000000000000FF675C000001901141001900003041803801009802 082000700200600404632E0160060040060060900020060064040C200E00600200030010408020400C00400000000600600000ae1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000557906D5 7556556557D565565575575565085564864B65564063544460964D7556406500546556156800554556554000000000000000 FFE16100002A82ACA80CC8AA8A29088508AA8AA80000012AA2AA0A24022AA0222AAAAA22A2AA2AA2802AA20220A2222220AA 2AA220A2A2222022803022AA2AA0002AA2322A2000000000000000FF73DD0081000000000000010240010810000002000000 0004280000010048000000000008000000000000080008000B00000882240000001000100100002000000040000000000000 00000000FF1E2500012A90088D0008A20108009040AA8AB80000002AEAAA4021422AA5022AE2AE3242AA2AA0022AA01A0022006e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF49 7800000000000000000004808C1000000000000000000C000008000000008000000008000000000400000100001101000004 10000110108000000400000000000000050000000000000000FFC38F90802A8AA8AA8AA8A288286480482A8AA80000012AA0 222AA2AB2A82AA2A92A82AA2AA2AA00028A04A0022AA202206222003A0220225200022A0AA0AA00028A2AA20200000000000 0000FFBA25800800000201000001000025001000401400000100500080801100481100480400480400402000012014109000 C40000008490001000400004800000100000410000C000000000000000FF6B59800055955955955955111911049955F5580000ee1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600081220001 2002002010000002000000002000802000000000000000FF2F740000000000000000A0000000000002000000000002028022 82A82A80A820000000000000000000022004840000002000000800000000000000000000000000000C800000000000000000 FF251C0000002004000000020000000002800000000000000000800000000000000000000000000000080081000001000000 000000001008800000000000000000800000000000000000000000FF60041000800000000000080000000540804000000001 0000880000008000000008000000008003100003402A00000400300881201510400403081000004000000200000800000000001e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002002002 002003002000002002002000002002002802002000802802802802002000000002000000802802002000000000000000FFBF 1F000001C01001801F05001801801801800000000000008700E88F08E08E20600000680680600000600502EA0420782400E0 0C80600780400800000600000000400A006000000000000000FFB91C00000000100120104100000100110500000004000404 04444444444044004000004004004000100544004804000804000C0481081000400000000400000000480400000000000000 0000FFF783000000800C00800C00A00800800800800000020000000000000100000000000000200200200000200300200220009e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF87D400 0001800400000001800000000000000000000000000000000000000100000000000000000080600100000080000000100080 0001000000000000000000006000000000000000000000FF0EE8000000800801001800000800801801000000000000000600 2006002002002000003003004000002006000002001000002002002802002000000004000000000002002000000000000000 FF9ECF0000000010000004010000010000000000000000000000005000004004004000000000000000800000001004004004 000804000000000000000000000000004004000000000000000002FFA979000000800A00200800A00800800A008000000000005e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (184826004002 31A000000124040000086006006000000000000000FF2722000000000C01111800101801809C018000000008000006046506 006016006000406007404300800A0200700214000400403080680600028A020004000010000006006000000000000000FF7D A2000001880801041800001001801801800000000800000608E04641600640600000600600404000014200E00A0020120020 02102006204002000044400000100006006000000000000002FF2E7200000180000000000180000000000000000000000000 000000000000000000000000000000000060000000000000000000000000000000000000000000000060000000000000000000de1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (068068060060 0600600100600600600000080700700420200228600308490000200000000600000000040600E000000000000000FFDF7F00 000000180182180008B801C1180180000000000001161562B62060160060804060060062200002A70A608442000180501310 4000802488040006020010000006006000000000000000FF6B23000004000801089803800801C81801800000000000000600 6006006006006000006386A04080216002006924082001006406004042086000000084200001006006006000000040000000 FF6CC1000001C98807401805815C01901801800000000000111760701600E006206100006506004000406002F4E14C40080C003e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFCCE7000002 001801001E01801A018018010000000000001806006006806807807800006106004000006000004004407804204004005882 006000000006000000006406004000000000000000FFA638000001C01801801801800C018018018000000000000006006007 007006006000006006006000816007006004002001004001006047006000000006000000006006006000000000000000FF68 BE00000040180180180180180180180182000000000000060060060060060060000060060060010060060068840020000862 0210600600600000000600000000600600E000000020000000FFD863000001A01A01A01800000A018018018400000000000800be1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020261070060 00020006020000006006004000000000000000FFCBDF000001845A0100380180080180180100000000000800060060061460 06046080086106086110406005804080087054004052006006806000000006000000006006004000000000000000FFE82000 0000081A0121BA01804899845A01000000000008001620680600620600600002600680608020601D084C7004640000618200 77470660000C0006040000007006004000000000000000FF12E3000001901811001901881901911C05000000000000000640 6006006506016000846006204201006100124004007002006006024002006000100406000001006006004000000000000000007e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600600 6000007006806000007806005006003501046002004802006000000006000000006006004000000000000002FFDFAE000080 005801401901800C01805801800000000000000600700614610681600000600610600000610600D006302001004070804042 006000080406000000006006004000000000000000FFA6370000018218010018018008018018018000000000000006006106 08600600600000600600400000E00200000410348002510A02680600E000000006000000006006004000000000000008FF54 64000000021809001801902C01929805800000000000000E00600600600602610008608620420800680204030C022252807000fe1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (81000401C018 01801401800001C0100100000000000000060060060060060040000000060008000070060070060060068040000048000060 00000000000000006006000000000000000002FFD776000000001C01A0100180000180100100000000000000060060860060 07004000000006000000006006816006906806004000844000006000000000000000006806000000000000000002FFD0F200 0281801B01A01001800001801601000000000000000600600610600600400000100600080000E006006006A060060060D000 400101600010000000000180600600000000000000000AFF742C000001C41081001E01800801C01A0080000000000000060000011040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280400600000 0000000000006044000000000000000000FF7037000000001801801801C000A1809801020000000011028622400E00622612 C50008000E00009088680700700E00610E007004C02024006000010000000000006004020000000000000000FF8FA6000001 8018018010098200018010010000000000000006004406006006004000000006000000006206406006406006404004002004 006000000000000000006004000000000000000000FFB1460000000018018010018000018010010000000000000006006006 006006004000000006000000006006006006006006006000004000006000000000000000006006000000000000000000FF1100811040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006026000 000006000000007807006802006002006000002000006008000000000001006004000000000000000000FF7C94000401A018 01801001800001801001800000000008808600421600600648E28008000E00008908600620680A80788A2048012024230060 00008800000000006804020000000000000000FF0CF9000000001E01801801A00841801E0101000000000400060040060060 060240000000060000000060060060060060060048060020050A601000800000000000600C000000000000000000FF92AF00 020180180181100982082180900100000000000002060040060062060240000000060000000060060060062068460060060000411040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000100100 1001800001801001800000000000000600600600780600600000080600000000600600400400600680600380400000600000 0000000000006004000000000000000000FF9DF5000000401801811800000901801801840000000000000644401600604600 6000001006000000000407006004006042804000003202026000000000000000000044000000000000000000FF41DB000001 8018018018000000018018018000000000000006004006006006206000000006000000000006006804006802006800003000 08600000800000000000080C000000000000000000FF10AA000000001801801401800C21801001808000000004000600400E00c11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0E8000000000 0000002860A0000000000000000000FF895D000005801001101A0001B8018E19458000000000200086006A06A06006316000 200206480000180A061044421C6004482000004000406000000048000000000004000000000000000000FF416C0002282492 012A1800204C01B21D518000000000400AA6A065062C6236A06000400836080000900246814202ACEA04C8D0A8A95012C060 00000080000000800844000000000000000000FF1364000201803083003B45950B2980580180000000000000061160060060 0610E200000206410000206917004146806016044202005322156000200808000000D06504000000000000000000FF87360000211040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (254004008008 00808000A00804049380220058850D94C08B98A00000001000000000100810800000000000000002FFA8D200000080000000 0C01080821800800000000000000012610200208600A00400000000200000000202200301600240202200004204400200020 0080000000804202000000000000000002FF1A6C000001808180480001864480100000000000000000100108908002100008 0000000000000000016409400025018A00208268280420010000000110000000806400000000000000000000FF0A01000001 822000040025900100000098000000000000100020100000180000820000002820000000708000080040010010000001000000a11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (201201200011 20320140044100000000000008048008040048040040008008048100008408048000CC800880A090AC80880C004000000088 000000804800800000000000000000FFE5C5000001801801841A230210018C19138000000000000006006006806006316000 0000062000000062060862AC2862AE00E0C402E2B4A36000000048000000084006000000000000000000FFBEBB000404C80C 80D00800D14CC0C00C20800000000040010310210300210380220000100200000111200322280304B0034A32112030010020 0000090000000000340A000000000000000002FFA7770002283012030224C22010482022210000000000400200000104800300611040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000005480000 00550D50540000000000000000FF9EEB00040044040000000043440000060400000000000000000000010000008010000010 01000001000000001001011001001021101041010001000000000001001000000000000000000002FFF63400002A0220880A A2A20982AA0AA0C80000000000000AA82A82A8AA8AA82A80002A82A8280000288A202A02000C8010080040280280A0000000 02200000002882A82A0000000000000000FFC6A3000200B10A42A00800A20800C00802800000000100000080280000000000 2000000802040000802112812802A22C53042C00842840152000000000000000842802008000000000000000FFF70800030000e11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80002A82A82A 8000288211A5020022AD501402800583180000000002A80000002882A82A8000000000000002FF8855000000052000000008 0204000000000000000000000001001000000000000000000000100000001000808080088080100080140040048000000000 000000800000008000000000000002FF698F00012A08A0AA0AA4AA0000AA0AA03000000000000002A82A82A82A82A82A8000 2A82A82A80002A82A02802C82A00002103082002002A00000012A80000002A82A82A8000000000000000FF05B10003542803 543545442821543545140000000000800D50550550D51551550000550D50450000D50550540C50C00C40C30C11410C90C80000111040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (019019550018 01801801800000000000610600600600600600600000008600000240E00604C11620604610400604400E0040200100400000 00006006000000000000000000FFEB9200028020520120001124840120120100000000000048048048040040048050000008 048000008000C408480090004900D0310050A0CC4000800800000000844800000000000000000000FF215700000080080080 0A008808008008D4800000000000000000000080000000000000000200000204201204A1520022822C000232000201200000 0000000000002002000000000000000000FF37F000002A0A80AA4AA0A21020AA4AA10000000000000012A92A92A82A9AA92A00911040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000000 6800000000000000000002FFC4D20000028111100008B6000851801801004000000000600200200200200600604000000200 0000002102002082A0208211C10220A522500030018100000000004002000000000000000002FF06890001AC400401400409 4004004004000000000001001095005005005001001000000000400000180004608060000000000200004048000001000020 000001000000000000000000000002FF4D20000000C00C00C00C00C10D20C00C00800000000100B003003083003013003001 001003000000003003003002003103011213413003002001001000000001003002000000000000000000FFB225000029801800511040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000006000012 00800602400E00E1C4002710002018006020000000000000000004000000000000000000FFFECE0000018050010011400018 2981180180000000000060060060060060561160000000060000000043060140060460141000020325003060000081000000 00004004000000000000000000FF18A300000180400400214180000000000200000000000000000000000000282000000000 00000010006400210000020030000010148040008000000000000000006000088000000000000000FF877300000180000008 00018080C00000000000000000008010000080000008000000800900C000004168008208080008409008108208008000000000d11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B810001C01A5 1A05000000000000600610E00600600601600000000600000000400601620E00610220A00408040600000000000000000004 510C000000000000000000FFD66B0000000450210808018C3001881801800000000000600600600600600600600000000600 00020460061040C40AE04404004A0120B4002000000000000000006004000000000000000000FFFD22000001811155005815 8018018018018020000000006006006006006006406000000006000000012006444015016004010000102024012028000000 000000002004110000000000000000FFA0BF000000181021001800001801809805800000000000600601E00600600608E04000311040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000552554 000000000000000000FF8EF400012B8AB88B8808AB8830AB8B18A800000000000072AF2372AF2AF2AF2AE0000002AE000000 28F2AE22F02602E22312132D2A92022AC0000010000000012CE226000000000000000000FFD3A8000080201E01800A01A210 01801801000000000000780780780780780780600000000600000004300600708F3070830418970100120040000000000000 01802006000000000000000000FFE2C60000AB8898898018A20098AB8038AD00000000000062AE2262AE2AE2AE2A60000002 AE8000002C8AAE226D16E06A1AC80286A201162A8000000000000000288234000000000000000000FF35B2000000001803A200b11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (068000020068 0600280C0960128C4094906802006000000000000000006004000000000000000004FFAB190000AA2ABAAB8ABEA3801CAB8A B8AB0000000000006AAEAAEAAEAAEAAEAAE0000002AE0000002AA2AE2AA204A462A2104A262262222AE000000000000000A8 B2AC000000000000000004FF3E82000001C01C21C2AA01831201C05C01000000000100600610600600600600680000000700 0000006006102005106102014006006046006000000000000000006104000000000000000000FF4C9A000054555955D55955 B15955D55D55000000000000655655655655655655600000055700000051255655244400E45241644454654655600000000000711040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (925001801803 000000000000600600600600600600600000000600000002200600600614601440002401200400E000000000000000022148 000000000000000000FFC3D00000018218018008018090018018410000000000006006006006006006006000000006000000 00600610E09240E10402A48C082088106000000000000000006000000000000000000000FF8CF2000000001801A008119414 01A01A0100000000008060060060060060060070000000060000020020060060C204600421000600A0880060000008000000 00042000000000000000000000FFDF440000018018018008018150018018010000000000006006006006006006006000000000f11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002CC2A60000 00000000000000FF152A00005413095180195581515595591580000000005505565565565565565560060005560060005105 505464B25364460101125404525460000060060000005504C6000000000000000000FF72EE00000180000182380180100180 1809800000000000000600600600600600600600000600600000400000600204600611001000200204E00000600600000000 4016000000000000000000FFAE730000AB88B88D8AA8A38410AB8AB88900000000002AE2AE2AE2AE2AE2AE2AE0000002AE00 000028E2AE2262260062240C000622232423600000000000000028E210000000000000000000FF9CA600000000184580080900091040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000400000 E142146006012010002102084000006006000000044016000000000000000000FF177600002B8AA8AB9018A38AB0AB8AB901 80000000002A82AE2AE2AE2AE2AE2AE0060002AE00200028C2A82363520062362A232632834A30400000600600000028C226 000000000000000000FF884A0001000028018AB8019010018018218000000000000006006006006006006006000006004000 02000000E00600608E30022000A002004000006006000000000006000000000000000000FF1CBA0000AB8AA8AB8098AB8AB0 AB8AB82380000000002A82AE2AE2AE2AE2AE2AE0060002AE0060002AC2A82A620628E326220222230212206000006006000000891040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01C018018000 0000000010068070070070070060070008060020100040000061500060045820A24100020060000060060000000050060000 00000000000000FFF3438000C0000801901801801C0180180180000000000010060070078070060060060010060020000050 0000700600610E002146004002004000206006000000004806000000000000000000FFD5CF00000180080180180980100180 1851800000000000000680600600600600600600080600000004400010600E40E09600210010602203400000600600000000 4086000000000000000000FF9D8E000100000801B33801801A01A0190580000000000010060068060070068060070000060000491040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (420600000000 0000000000FFCB5F0000000058018018820098018018018000000000000C0602720700610603600600000640200008400000 6000556102092102014200024040006006000000004006000000000000000000FFDA5F000141803809901804001A01801801 00000000000200062060060068060062060008060020080048000070A8006310202010206023006000006006000000404006 000000000000000000FF2C040000040018018019458010018018018000000000040006286006006006006406000006000000 004000106000046406002008102043004000086006000000404006000000000000000000FFE888000001805811C01881801400c91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00410000600C 15614611400009208E000020006004000000004016000000000000000000FFE4250000000008400219000118058018018000 0000080000060463060060860460060000060064000040000160042060040040060000061101000060040000080040060000 00000000000000FF73F9000001880808021815801801801801800000000000000600608600600601600E0000064062001040 8000E00A00602200410608048E04000000600400000800440E000000000000000000FF4A8B00000400082000184980100382 180180000000080000061060060A60062860060000060040000040001060000460020040001120060880805060040000000000291040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A90080000000 000002AA2AE2AE2AE2AE2AA2AE0002AA4020002AA0002AA5020020002220864160261220002AA2240000002AA2AA00000000 0000000000FFE3F6000001912002000009900000000141000000000000000000000000000000000000000011000000400000 0210100100100240088400100000000010000000004000000000000000000000FF0E85000001820000000001812000000014 00000000000000000000000000000000000000004200000060000000C0448428010010240090208000000100000000006000 000000000000000000FF7F8A000001904810001800001801841801800000000000040600600614600650601600000600600000a91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFB905000155931113D55955155B55D559558000000000001D5755655655755755655600155654C00055600055640E 5565144D424444454C546001556556000000157552000000000000000000FF4DC200002A80888A8AA8AA8088AACAA84A8000 0000080002AA2AB2AA2AAAAAAAA2AA0012AA0320002AA0002AA0222AA22A23204A04220A20A0002AA2AA0000002AA2AA0000 00000000000000FFE58B00000000202100100000000100100000000000010000048000008000000040000000000040000010 00000020000024004088088000000000000000000000200004000000000000000000FF513E0001AA9458A80AA8A30648AA8A00691040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001204480 880100200A0088010001000000000000200800000000000000000000FF50E400000004000000000000020000000000000000 0000080000000000000000100000000010000000000100000810004000048801000010000000000000000000000000000000 0000000000FFA5E800002A88A0888AA0A28AACAA8AACAA80000000080002A82A92A92A82A82A92A80002AA2220000AA0012A A3020022022A00002002202320002AA2AA0000000AA2A8000000000000000000FF332B000000001021001001100201201000 000000000900100500500500480480400400100410400000080000401000010410430410414404000000400400000000000400e91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0800000000000000000000000002002000002802002802082002510882802043020000002002000000000000000000000000 000000FFD42C0000000000000000000000000000000000000000000000000209A20000000000000000000000220A90000800 000000000000000800800000000000000000000204000000000000000000FF0F7F0000000000020000000000000000000000 0000000000000000000000000000000000000000000000008000010008000000000000000000000000000000000000000000 00000008000000FF32020000800000224000080000002004000000000000000001000800801001000000001000010000200000191040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFDCBC00000080080080000080080000000000000000000000000000020020000000000000020020018020030020028020 02000002000002002000003002000000000002000000000000000000FF453000000180180580000100180000000000000000 0000000000000E006000000000000006006000224A0D00600608600728D00780600602400000600600000000000200000000 0000000000FF218E000000001001000001001000000000000000000000100000040444400000000000000400000080410400 4000805004804100004840004000004004000000000404000000000010000000FFE16800000080080080000080080000000000991040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000002FF098F000001800000000001800000000000000000000000 0000000000000000000000000000004000800801000000000000001000000000800000000000000000000000000000000000 000002FF46920000008010000000010018000000000000000000000000000002002000000000000002002000006004006002 806002004002804002006000002006000000000002000000000000000000FF4F440000000006010000000000000000000000 000000000000000004004000000000000000000000000000000000000001800800000000800000001000000000000004000000591040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000600600000000000000640600002600404E0060261060044040020060060000060060000000000060000000000000000 00FF396500020000100100040040180A00000000000000000400000001460060000000000000461064000064474064064172 474A4944911456D14200007006000000000006000000000000000000FFFA6F00000180100101204000180000000000000000 0000000000000600600000000000000600400004400601600402601600601422000400410010600600000000000600000000 0000000000FF824A00000180000000000180000000000000000000000000000000000000000000000000000000000000000000d91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 9197000201801801800000001804000000000000000000000000000600600000000000100600400000200100600600600600 2014006805002000006006000000000006000000000000000002FFE154000000001A0180C600409814000000000000000004 0000000007006000000000000006106401002C4002640600F04630188C256407312000087006000000000006000000000000 000000FF5ED200000040102100000982188000002000000000000000000000A7006000000000000026206001007804A06003 A0628E82422408202C006280006006000000000006000000000000000000FFD9AD000001981041000031851900000040000000391040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (026106112217 0A4004102000006006000000000006010000000000000000FFB66A0000002018018000018018000000000000000000000000 00000600600000000000000600600080200000600600600600000F0040060020000060078000000000060000000000000000 00FF7902000001C0180180040180180000000000000000000000000000060060000000000010060060010020030060060060 07000004005006E00000006006000000000006000000000000000000FF2C2B00000000180180000180180200000000000000 000000000000060060000000000000060060000000020060060060070008050050040000000060060000000000060000000000b91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0600600000000000000600600142640604E00E0462A62B3404B4120C000000006006000000000006008000000000000000FF D649000001805801800101801800000000000000000000000000800600600800000000000600600044240000601600600604 080600C21600000000600600000000000E000000000000000000FF5ABC000400001807880401901810000080000000000000 0078000206006000000000000106074000002000206207007447C0014E404004080000006006000000000006000000000000 000000FF2779000001D01A01904011841800000100000000000000000008050610600000020000000600600000080045640600791040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF0295 0000098018018000018018000000000000000000000000000006006000000000000006004001004007006006006006000005 800205002000006006040000000006000000000000000000FFBAF00000001018818040118018000000000000000000000000 1109061060100004000001060160002060060060060060070009440110060020000060060000000000160000000000000000 00FF993000000180180180000180180000000000000008000000000000060060000000000000060060010060060060060060 06000004000006000000006006020000000006000000000000000000FFBBB00000000038018001018A18080000000000000000f91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 04000000006000000000006006000000000000000000FF3F6B00020180180180040180000000000000000000000000000000 00000000000000000006006001004007006006006003004802000001000000006000000000006006000000000000000000FF A82D000000001C01800001800000000000000000080000000000100000000000000000000600600000680600600680680200 4002800000000000006000000000006806000000000000000000FF64D6000011801301800001800000000000000000000000 000000000000000000000000000600600040680600600600600400000000020400000000600000000000680600000000000000051040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000006006000000004006086816064000004806004002000006000000000006006000000000000000002FF14A0 00000000180180A0018020000000200000000080000000020000000000000200200006006000803214406006006004000C24 016804002000006000020000006006000000000000000002FF8FAE0000018018018000018000000000000000000000000000 0000000000000000000200060060000020840060860060020040060060000020000060000000000060060000000000000000 00FF37960000000018018000018000000000000000000000000000000000000000000000000006006000004006006006006000851040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20FF7EA20000 0000180180000180000000000000000000000000000000000000000000000018060060008020040060060044140008200068 44002400006000000020006006000000000000000000FFDF7D00000180180180000180000000000000000000800000000000 0000000000000000000600600000280C206006004002004A2280E800002000446000020000006406000000000010000040FF 7CE9000000001801800001800000000000000000000000000000000000000000000000100600600000000400600600641200 404600604000240008E008000040006006000000000000000000FFF43C00000180180180800180200000002000000000000000451040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601310040200 4000006000000000006106000000000000000000FF115C000000200801000201800000000000000000000000000000000000 0000000000000006006000004007806807806804002000000006004000006000000000006006000000000000000000FFE7E9 0000004018018044000000000000000000000000000000040000000000000400440006006000002504007006014002004002 806000002000006800000000006006000000000008000000FF6BF40000018018018000000000000000000000000000000000 0000000000000000000000060060000020040060060048050008000068040020002AF008000000006206000000000000000000c51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000008000008000000000200080041800200060000000000000000000000000000000000000000000FFABB70000 018E282104220208000000000000000000000000000001000100000000000000A60060000040062060060060040020000102 06004000006000080000006026000000000000000000FFCD390002102C0A2110000810000000000000000000000000000002 00200000000000000906886000B2C826C26886D268228AE482A4884B12C000A8E0C808800080E846000000000000000000FF 8A5D0000018128810021438000000000000000000000000000000000000000000000010826036000005C0610E0370161128000251040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (944000020020 12000004D50000000000000000000000000000000001200000000000008800810000A00A04838910978920000D0880080C82 0000A00820008000008884000000000040000002FF6A9B000000800801000000000000000000000000000000000000020000 000000000000000200200044442000608300440280C08608300000E00008A008000000006002000000000000000002FF342B 000049808080080009A0000000000000000000000000000010000000000000000000000A00001A000008002808001CDB0250 4684004C0000000080000000000000000000000000000002FFA507000001800000000021800000000000000000000000000000a51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A2A42040000 802800000000002000000000000800000000FF04E50002002052010000012000000000000000000000000000000000000000 000000000804AA4000894904804A84804800C4C80500080D094000804800000000004804000000000000000000FF7B020000 41841001840021000000000000000000000000000000000000000000000000000600E00022420600E08E02E00640600C24E0 06224000006000000000006002000000000040000000FF9A72000400C00C0080061480000000000000000000000000000009 00810000000000001003002001083003003002103512130523002441002001002000000001003002000000000000000000FF00651040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (505500000000 00800D50C40000B10440D50420550D50050CC0D21028510000D50D50000000000550000000000800000000FFC36300040000 0400000600000000000000000000000000000000000180000000000100100100000100010100110180100110000100100010 0001001001000001000000000000000000000000FF405900002A0880880000A20AA00000000000000000000000000002A82A 80000000000002A80080000002102A80082A82A80802302084802000002A82A80000000002A8000000000000000000FFCDED 000300A20A44A000108000000000000000000000000000000000000000000000800802802000C4204A80204200280280288800e51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00002A0AA0AA 0000A20AA00000000000000000000000000012A82A80000000000002A82A80002202202A80602A82A8221AA82202A8220000 2A82A80000000002A8000000000000000000FFC16C0000000000004004100000000000000000000000000000000001000000 000000000000108000040080000091000000A80000008100040000000000000000000000000000000000000000FFBFBD0000 AA0AA0AA0000AA0AA00000000000000000000000000002A82A80000000000002A82A80002B02282A82082A82A82302A82A82 A82280002A82A80000000002A8000000000000000000FFD7DE0003543343520001441540000000000000000000000000000500151040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030000010030 03000001001000000000000002000000FF3F4700000980180180180180000000000000000000000000000000000060000000 0040600608601000440810600000400600E046006204000000006006000000000000000000000006000002FF167400030000 1201001211000000000000000000000000000000080000400000000080480480400080400080481080480088400108880408 8000804804800000800000000000000000000002FFCDB0000000800800800000800000000000000000000000000000000080 0000000000002002002000112110002500000002012002002000000000002002000000000000000000000002000000FF88BF00951040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000A0 0800800008800A00800800B20A00840800888800800000800800800000800800000000000000000000FF4B7D000000800010 001800010000040000000000000000000000000000200004000000200200200001250801608000608201C022402006000010 002006000000000000000000000002000000FF0AB00001E84014014005014000000000000000000000000000001001004000 000000000000080000004000080100540160040280110260000000000000000000000000000000000000000000FFE7540000 00C00C00C00C00C080000000000000000000000000001001002000000001003003002001003001003001003403001283003000551040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (011010210038 0000200000000000000000000000000000000060100000000060060061200060000060004060160800340220000000000060 06000018000000000000000006000000FFE0C700000080110108580100C00002000000000000000000000280000960000202 00006006006000004200006000006086410204042542020000016006000000000000000000000006000002FF355700000190 01000A000180000000000000000000000000000500001100100002000000000001000000000000002001104004100882A044 0000010000000000000000000000000000000000FF863C00000180000000010181000000000000000000000000000000000000d51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00002AE00600 00002A82A8000000000006000000FF43DB000001151A05801811000000000000000000000000000000000000600000000000 6006006000002108006000090406014132004014110000006006000000000000000000000006000000FF6D05000080001021 001801800000000000000000000000000000000000600000000000600600600014C00000600000608E084400110082000000 006006000000000000000000000006000000FF15D50000018010510418008000000000000000000000000000000000006000 00000000600600602001610000E000006006084020510000400008006006000000000000000000000006000000FF9191000000351040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006556 556000CD2D505565505504063464CA54CB144C8000557007000000550550000000000006000000FF202700012B80DC898018 AB80000000000000000000000000000008008060000000000062AE2AE000A02AA0AAE2A8A20316A2108F22EA20A200002AE0 060000002A82A8000000000006000000FFED73000100201C0180180080000000000000000000000000000008008060000000 00006006006000002000006000000136008007006822000000006806800000001800000000000006000000FFAC1100002A84 3889801AA200000000000000000000000000000000000060000000000062AE2AE000A52A202AE2A8230066224402A243362200b51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180180 00000000000000000000000000000000006000000000006006006000802800806000800406C0208E90641080800000600600 0000000000000000000006000000FFD4CD0000AA2898ABA01AA2A00000000000000000000000000000080080600000000000 62AE2AE0002A22A82AE2A82A802600222622E8222200002AE806000000AA82A8000000000006000002FFBD68000001D01845 C01C01A000000000000000000000000000000000006000000000006006006000082008006000100006116022104006110000 007006000001000000000000000006000000FFCE3E000054555955801B54800000000000000000000000000000080080600000751040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AE2AE000000 000000000000000224000002FF7FBB0000000058038018088000000000000000000000000000000000006000000000006006 00600049600000600001211400C110010100000000006006000000000000000000000004000000FF9A0E0000818218018018 0180000000000000000000000000000000000060000000000060060060000260000060001020040800040824000000000060 06000000000000000000000114000002FF4079000000045A0180181080000000000000000000000000000000000060000000 0000600600600000E00000600000208C0C8804002102080000006006000000000000000000000004000000FFE50F0000018000f51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002AE2AE2AE0 002A40002AE0062282AC2902802282000000002AE2AE0060000060000000000002A8000020FF14FE00005413411195415400 0000000000000000000000000000000655600000000055655655600001600055200654C54C5504D650008600000055655600 6000006000000000000540000000FF32D1000001000001800009000000000000000000000000000000000600600000000000 6006006000016000006006004004004012080156000000006006006000006000000000000000000000FF938A00002B8898ED 8AB8A380000000000000000000000000000000002AE0000000002AE2AE2AE0000460002AE00022222422422027006A000000000d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800009400000 00000000000000000000000010070060000000000060070060001020008020069160060A6010104044000000006806006000 006800000000000000000000FFDF3C0001AB0AA0AB8AA0A300000000000000000000000000000000062AE0000000002AE2AE 2AE0002220002AA0063262AE2422602242040000002AE2AE0060000060000000000002A8000020FFE6C60001000000018000 0000000000000000000000000000000000060060000000000060060060002840000020060040040040000002100000000060 06006000006000000000000008000000FFF36300002B0AA0AB8AA0A300000000000000000000000000000000062AE0000000008d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060010060 00000000000000000002FF5A3900002100000108000140000000000000000000000000000010070060000000000068068062 00002021006007004A0600200008C00400000081E806006000007000000000000000000000FF16A900004100400180000100 0000000000000000000000000000000600600000000000700604620000002000200601531214204651410600000100600600 6000007000000000000000000000FFE325000001000001800001000000000000000000000000000000000600600000000000 700600600001000000200600080600E08201410E000000806006006000006000000000000000000000FFECED000001000001004d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600000 40A80040260163041AC00200A026000200006006006000006000000000000000000000FFC393000001000109000001000000 000000000000000000000004000608604001000000600680600000240080200600600620222E004086050000916026006000 806100000000000000000002FFD81C0000010020010000010000000000000000000000000000000006006000000000006816 12600000200000601600680E04614240430E000000006006006000006800000000000000000002FFB1790000010000011000 010000000000000000000000000000000006006000000000006017106000002001007816000006006100004214000000006000cd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010040000040 0000000000000000000000060060200000000060060060001142000000A60042040AC4400821042082000060460060001160 00000000000000000000FFC15100000100000180000100800000000000000000000000000200060260000080000060060260 0000400000020600800440008022201412000000600610E100006000000000000000000002FF4E9C00000100011180000100 8000000000000000000000000000000612600000000000600602600008C15000428600A19C0000962B204E28000011600608 E08008E100000000000000000002FF83E6000001000001800001002000002000000000000000000000000600600000000000002d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 0000000000000000FFCB790000AA8000E90000AA80000000000000000000000000000002AE2AE0000000002AA2AA2AA00021 00003262AA2042223222063A02020000002AA2AA2AA0002AE000000000000000000040FF9380000001000002000001000000 0000000000000000000000000000000000000000000000000000120000110000020010110010008110000000000000000000 000000000000000000000022FF4D780000018000000000018000000000000000000000000000000000000000000000000000 000000008000000000088080000120000020000000000000000000000000000000000000000002FF7496000001000001800000ad1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000004000 81400400400000000C004010000001005004004000004000000000000000000000FFA0840000D58001558001558000000000 000000000000000000000556556000000000556557D560005540004355564540160C62045465560000005575575560005560 00000000000000000000FF8D930000AA8000888000AA80000000000000000000000000000002AB2AA000000000AAA2AA2AA0 00322000A222AA2AA2AA22A2A22283220000002AA2AA2AA0002AA000000000000000000000FFB25700000000000040000000 000000000000000000000000000000000000000000000008000000000040000800000802A020808800400000000100080400006d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000008010008000001080002A800042802000050800010800000000000080000080000000 0000000000000002FFF2D2000080000000000000000000000000000000000000000000100100000000000000000000000000 0000000800000410440000088020000001000800000000000000000000000000000000FF376B00002A8000AA80002A800000 00000000000000000000000012A92A80000000012AB2AA2AA0002220000022AA08208208A0602322020000012AA2AA2AA001 2AA000000000000000000000FF850D000000000003400000000000000000000000000000000000000480400000000080500500ed1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF8A3A0000000000000000000200000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF34FE0000200000200000000000200000 0000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF281C00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000008000000000FF69A900000000000000010000001d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000008 00000000000000000000000000000000800000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF96D8000020000020000000020020000000000000080000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000008000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFF8900000000000000000000002000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFAE5A0000000000000000000000002000 0000000000000000000000000000000000000000000000000000000008000000000000000000000000000000008000000000 00000000000000000000FF165100000000000000000000020020000000000000000000000000000000000000000000000000005d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFE52100000000020000000000000000000000000000000000000000000000000000000000000000000401000000 00000000400410050400000000000000000000000000000000000028000000FF35EB00000000000000000000000000000000 0000000000000000000000001000000000000010000000004000000000000101010040000000000000802000000010000000 0000000000000000FF8218000000000000000000000000000000000000000000000000000000000000000000000000000000 0000100000000000000000000000000000000100000000000000000000000050000000FF409B00000000000000000000000000dd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF80E2000000000200000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD29F0000000000000000000000000000000000000000000000000000000010000000000000080000000040 080000000000000100400000000000000080000000100000000000000000000000FFA6300000000000000000000000000000 000000000000000000000000000000000000000000000000020080000000000000A082080282000000000080200000000000003d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000080000000000000200800000000001000000000200000000001100000800000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000bd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFE986000000000000000000000020000000000000000000000000000000000000000000000000000000000000002008 0000000000000000000000000000000000000000000000000000000020FFDDB6000000000000000000000040000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000 000000000020FF9D780000000000000000400000000000000000000000000000000000000000000000000000000000080000 010000100000060088000000000000400000000008100000000000000000000000FF6EDF0000000000000000000000000000007d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000800 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF008D00000000000000004000000000000000000000000000000100000000000000401000000000000000000100 00000000000000000100000000400000000000100000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF241F000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000000000000 000000000000FF241F000000000000000000000000000000000000000000000000000000000000000000000000000000000000031040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008028000000 FF21BA0000020000200000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000008000000000000000000FF617B0000020000000000000000000000000000000000 0000000000000000000000000000000080002000000000000200004000000000000800000000000000000000080000000000 00000000FF209C00000000002000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000831040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000001000000000000000000010020008000000000FF223F00000000000000000000000000000000000000200000 0800000000001000000800000000000000000000000000008000000000002800002000000000000800000800000000000000 0000FF1910000000000000000000000000000000000000000000000000000000000000001000000000000000000000000002 0000200000000000080000000000000000000000000000000000000000FFB8EB000000000000000000000000000000000000 004000001000000000001000000000000000040000000000000000010000800000005000004000000000001000000801004000431040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000000000008 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF68DC0000000000000000000000000000000000000000 0000000000000000000000000000000100004000000000000000000080000000000000008000000000000000000000000000 28000000FFE4430000000000000000000000000000000000000000000000000000000000000000000000000400000000000000c31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF10 8200000000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000 00008000000000000000000000000000000000010000000000FF164000000200000000000000000000000004000000000000 0000000000000000000000000000000001000000800000000040000000000000000000000000000000000000000000006000 0008FF2868000084000020000000000024000000000000000000000000000000000000000000000000000000000000000000 00000000002880000000000000000000000000000000000004C0000000FF4B6F00000000000000000000000000000000000000231040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005044000000 0000000000000000000000000000000000010000000000FF74D7000080000020000000000000000000000000000000000000 0000000000000000000000000000000000100000000010000000280000000000000000000000000000000000000000000000 FFF9960000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040 000000000000000000000000000000000000000000000080000000FFC2CD0000000000000000000000600000000000000000 000000000000000000000000000000000000400000000400000000040000050000000000000000000000000000000000000200a31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF3DA700000000000000000000002000000004000000000000 0000000000000000000000000000000020000000000000000000000004800000000000000000000000000000000000004000 0000FFDC0D00000000000000000000000000000000000000000000000000000000000000000000000000000080001004000000631040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF9C8600 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF9C86000000000000000000000000000000000000000000e31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000131040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000001000000000080001001000009000000000000000000000000000000200001001000000000FF59E900 0000000000000000040000000000000000000000000000000000000000000000000000020001000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000931040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFE807000010 0000000000000200000000000000000000000000000000000000000000000000000000800000000100000800800008800000 000000000000000000000000400000800800000000FF99A90004000004000000000004000000000000000000000000000000 000000000000000000000200008000900000000000800000C00000000000000000000000400000000000800800000040FF80 6A00000000040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFBC500000080004000000000000000000000000000000000000531040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000000 00000400000000200000000001041000000020FF786D00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000008000020000400000000000000000000000000000000000000000000FF5A1C00 0000000000000000000040000000000000000000000000000000000000000000000000000000000008002000800000004020 0080020020000008400000000000080000000010000000FFE03C000000000000000000000040000000000000000000000000 000000000000000000000000000000000000004001000001040000030002004000020840000000000010000004001000000000d31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000680000000000000000400000000000000000000000000000000000420200000000FF7331000000 0002000000000000000000000000000000000000000000000000000000000000000000000000000000000000040000040000 000000000000000000000000000000000040000000FF08B90000000000000000000000000000000000000000000000000000 000000000000000000000000000000040000000000300000280000000000000000000000000000000000280100000000FF04 BE0004000004000000000004000000000000000000000000000000000000000000000000000000000001000000000009010200331040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFAB3700000000040000000000040000000000000000000000000000000000 000000000000000000000000000200000000000000000A00000000000000000000000000000000000004A0000000FF806A00 0000000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA99B00000000000000000000000000000000000000000000000000b31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFED83000000 0000000000000000000000000000000000000000000000000000000000000000000000000000004000000000004000004000 000000004000000000000000000000000000000004FF18DC0002000000000000000000000000000000000000000000000000 0000000000000000000000000000000800000000004C00000000000000000000000000000000000000000A0000000000FF4000731040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000200000080000000000200000200000000000000000000000000000FFACC00000080000 8000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 00000000020000000000000000000000000000FF380A00008000000000000000009000000000000000000000000000000000 00000000000000000000000000280000000000000000200000000000000000000000000000000000000000000200FFF8EB00 040000020000000000020000000000000000000000000000000000000000000000000000000000000000000000000000000000f31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000A000000000000024020000020000000000000 00000000000000000000000802C0000000FF6A1F000108000000000000000110000000001000001000000000000000000000 0000000000000000004000400000000004100000004000000000000000020000000000000000000000000400FFA56C000000 00000000000000000000000000000000000000000000000000000000000000000000004000000000000000800C0000080000 000000000000000000000000000000200000000000FFFC130000000001180000000000000000000000000000000000000000000b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000A0100000000FF96830000000000000000000000000000000000000000000000000000000000000000 000000000000040000000000000000000000400000000000000000000000000000000000000400000000FFCB8E0000000000 0000000000000000000000000000000000000000000000000000000000000000002000000000000000000000000400000000 00000000000000000000000000240020000000FF3E9100000000000000000000000000000000000000000000000000000000 00000000000000000000000000080000000000400000280000000000200000400000000000000000000000000000FFFF1700008b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000100000000100000000000000000000000000000000000010000000000000000FF9A8800000000000000 0000002000000000000000000000000000000000000000000000008000000000000000008000002008000000000000000000 0000000000000000008000000000000000FF22B3000000000000000000002000000000000000000000000000000000000000 0000000100000000000000400000000020000000000000000000000000000000000000000000000000000001FFE529000000 00000000000000000000000000000000000000000000000000000000000000000000000800000000000004A05200000A0000004b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0020000000000000000000000000000000000000000000000000000000000000000020000020000000000080000008000000 000000000000000000000000000000FF093C0000000000000000000000000000000000000000000000000000000000000008 000000000000000000000000000000010008000000200000000020000000000000000000000000000010FF3FDA0000000000 0000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000 00000000000000000000000000000000000000FF43CF0000000000000000000000000000000000000000000000000000000000cb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF3D7D00000000000000000000200000000000000000000000000000000000000000000000 00000000000000000020000020000000000100000008000000000000000000000000040000000008FF882000000000800000 2000000000000000000000000000000000000000000000000800000000000000000000008000000000805000042840008000 0020000000000000080000000020000000FF2B73000000008000002000000000000000000000000000000000000000000000 0000000000000000000000000080000000000020000228000080000000000000000000080000038020000000FF0680000000002b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000100000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFB4BF00000000008000000000000000000010000008000000000000000000000000000000 00000000200000000000000400000000500000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8003000000000000000000000000000000000000000000000000000000000000006b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000000008 0000000080000000080000FFBFD8000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000200000000300000000000000000000000000000000000000000000000FF1A11000000000080000000 0000000000001000000800000000000000000000000000000000000000200000000000000080000000000000000000000000 000000000000000000000000000000FF54450000000000180000000000000000000000000000000000000000000000000000 000000000000080000000000000100000000000000000000000000000000000000000000000000000000FF409B000000000000eb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF4CFE0000004000000004000000 0040000000041004000010000000010000000010000000010000000010000000010000000010000000010000000010000000 01000000001000000001000000FF706A00000000000000000000000000000000000004000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFE75600000002000000 0020000000020000000020000000008000000008000000008000000008000000008000000008000000008000000008000000001b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000010 0000000100000000040000000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF9D2F000000008000000008 0000000080000004180000000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000000020000000020000FF247C0000000000000000000000000000000006100000000000000000000000000000009b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001001001000 000000000000000000FF81D90000000000000000000000000000000004000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF989A2000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF8A9000000000000000000000000000000000002000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF7EFF00000010000000005b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000010000000 00000000000000000000000000001000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFE8E1400400400400400400 400400400400400000000100100100100100100000000100100100100100000100100100100100100100100100100100100100db1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF4BA34004004004004004004004 0040040040040000010010010010010010010010010010010010010010010010010010010010010010010010010010010010 01001000000000000000000000FF7BDD40000000000000000000000000000040000000000000000000000000000000000000003b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF6D0000000000000000000000000000000000000000000000000000000000000000000000000000000010 01001001001001001000000000000000000000000000000000000000000000000000FF4BA340040040040040040040040040 0400400400000100100100100100100100100100100100100100100100100100100100100100100100100100100100100100 1000000000000000000000FF4BA3400400400400400400400400400400400400000100100100100100100100100100100100 1001001001001001001001001001001001001001001001001001001000000000000000000000FF409B00000000000000000000bb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100100100 1001001001001001001001000001001001000001001000000001001000000000FF0B88000400400400400400400400400400 0000000001001001001001001001001000000000000000000000000000000000000000000000000001000000000001000000 000000000000000000FF87A25004004004004004004004004004004004000001001001001001001001001001001001001001 001001001001001001001001001001001001001001001001001000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C0800000004 0000000000000000000000000000000000000000015010000100000015015012015100000000000002000000000000000000 01501501000000FFDB9240040040040040040040040040040040040000010010010010010010010010010010010010010010 01001001001001001001001001001001001001001001001001000000000000000000FFA85400000000000000000000000000 0000000000000000000000000000000000000000000000000100100100100100100100100100100100000100100100100100 1001000000000000000000FF41A200000000000000000000000000000000000000000000000000000000000000010010010000fb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000003140 1400000008FF742E00000810E2080001000000081000000003080000000400000000400000000400000000400001A00C1002 0000401A01820411A20000400000000430000000400000000421821820410000FFBFE10000101A4190000000000010180000 00002000000000000000000000000000000000000000000000900A00000800000A00900A0000000000000010000000000000 0000800A00A0690000FF78362000101C40100000000000101C00000000000000000000000000000000000000000000000000 4000100C0000000400CD02104C0000000000000210000000000000000000CC0CC0410000FF05BB00000C080348000000000000071040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D01080004001 040D00C05040D04001000000001000000001000000001080C04C05080000FF99170000020904000000000000020800000000 100000000000000000000000000000000000000000000000014000040000019A400140000000000082000000000000000000 00004001A00000FFE58E00000601810600000800000600800000021800000000200000000200000000200000000200004008 20068000060400469060468000020000008020008000020000000020460461020008FF0DC600002000C22200000000002000 000000020C00000000000000000000000000000000000000014008000080000014014000014080000000000000300080000000871040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000800B4D001800000000006F11110000000000000143FFFFFFFFFFFFFF FFFFFFFFFFFFB03D000000060002000020000000060000000020000000008000000008000000008000000008000008008001 00000800800901800900000800000001800000000800000000800B00B0080000FFC1D600000D03404C00000000000D000000 04000404000000000000000000000000000000000000003000D0050000000300054010350000000000000010000000000000 0000D00500540D0000FFA41A0000004380C1000400000000400000040410040000100000000100000000100000000100000000471040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000271040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000671040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000171040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000971040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000571040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000800B4D000400000000006FEF700000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000371040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000771040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800B4D001400 000000006FD39500000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000af1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ef1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000800B4D000C00000000006FF5C900007f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000809040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000409040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000209040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000609040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000800B4D001C00000000006FC0BB00000000000000000000000000000000e09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000109040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000909040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000509040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000309040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000709040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000800B4D000200000000006FE6E7000000000000000000000000000000000000000000000000000000000000089040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000889040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000489040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000289040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000689040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000189040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D001200 000000006F7EC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000989040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000589040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000389040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000789040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000849040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D000A00000000006F589400000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000449040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000249040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000649040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000149040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000949040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000549040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800B4D001A00000000006F6DE6000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000349040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000749040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000800B4D000600000000006F4BBA0000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000800B4D001600000000006F77 5F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000829040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000429040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000229040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000800B4D000E00000000006F510300000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000629040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000129040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000929040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000529040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000329040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000729040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000800B4D001E00000000006F6471000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aa9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D00 0100000000006F422D0000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D001100000000006F88670000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000869040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000469040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000269040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000669040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000169040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000969040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000800B4D000900000000006FAE3B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000569040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000369040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000769040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D001900000000006F9B49000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D00050000000000 6FBD150000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000be9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000819040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000419040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000219040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000800B4D001500000000006F81F00000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000619040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000119040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000919040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000519040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000319040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000800B4D000D00000000006FA7AC00000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000719040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000899040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000499040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000299040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000699040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000800B 4D001D00000000006F92DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000199040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000999040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000599040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000399040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000799040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6FB482000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D0003000000000000859040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000459040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000259040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000659040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000159040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000959040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000800B4D001300000000006F2CAD000000000000000000000000559040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000359040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000759040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000800B4D000B00000000006F0AF10000000000000000000000000000000000000000000000000000cd9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dd9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (EFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE00800B 4D001B00000000006F3F83000000000000000000000000000000000000000000000000000000000000000000000000000000003d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF7FBFDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF00bd9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE007d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF00fd9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF F7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF00039040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (BFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF F7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF700839040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0CF2ED55BE95 EDA3D2A914A83316954AE440695A0760104FEC006B003E386E1D01C3F532A956AA4084940507A83824081D205805810BCC7E 0C679C1E6001BB3060EA7594DF48030004E4200C114844E11024283B040FDBAFF3A3FD4C0015BC428C021379A60821838663 914901A44E04374883A7731104A645018449248A0800066CA11C46754211C8E41203C94421128054004DA21941D0612DF688 42048201326B9120581E2E86AA244A0D84004038006FC0C020C2060E955203532018C8001A0659C1C6192084FF499902A626 A9055CAB792B01430579CD9E00603FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F00439040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000F001820100800000000000000000C06030180C06030000804000080 40000000000000180BA61084384236AA1D2A5272017CEE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE 222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22D86C361B0723 91C8E48D46A351A271389C4ED86C361B072391C8E48D46A351A271389C4ED86C361B072391C8E48D46A351A271389C4ED86C 361B072391C8E48D46A351A271389C4E207F83DE0FF201552AAA150000000001540AAA0500000002024102A4310C1D8C159900c39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000239040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001002000806 028006004000810000000186001833018301800C18CC6000180C060000060C1C000000300000000C0603000A801001800006 000060000001400C0000C0000618000000000018000000000000180C00000000000000180C06000000001800000000003603 00600000000000300001800000000000000000000C0000000000600040000000000000000000000000100007182018C81000 078C0018C1E0380008140037838000E2000804488000000000180000000000018000800B4D000700000000006FAD97000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C10231808F60 00184081E230000318008188000230003047A3180080623006C061820600011B0180081800004C004000788C0000C6002062 00008C003C180081800046C00002180080000C00300100D8008180C0040C4000060020003000231800118000188D80000400 046006008C6602062300003040C004801808860200000180000600060881C0014080043E8100004000060C00200040A00000 00036602000000630840830000C00CA660CC660060000600001B0840C01000000005402C00000002018321028DC6E35000DC 0001C3811803418CD80000000186000000000001000000CC79821F83C1000018000000000CC660004000600F11E00000010000639040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000300000180 00600001BC000000003040000602000C00103180006000110080000000000008040280003000800000180300002000081008 004800000100205000000AC07800180001800000C000000030103000608100280000000001C0000001800C0400000CC18031 062301A00003001800000000001840001800000218020002301A0006000000C00C2000006488418A000800120C00000020DE 000060C0000001A200000003C0600C06030180E1D338708F66021F83851A0D06834180DD080470CD1CF31C38C70E31C239C6 2C0000066301020C46C0600206080000C004001E3206002062300003040C004C0618206030010311800018218008003F010000e39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4301980C010C C46000000066000400000C0400004000000006000018006038180018000002007003000C0180C41801548F0600000000000D 8603600301000000C000B80000198C058000548E0600000000720860C0400000030100000480000084002000000000040080 0030000060006000000300000C1CE004000000000001802C00000000300000000C1800180000180C50AA0000000000000040 A005B00000C6000018000008018000700000000600000C0000F000000003C00000000100001830000000183064204000C000 001820002000000100E0000060000030000C000020000E60001000000200000850220442044201100040201C40800301800300139040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02C600018009 040C0120860C0010086020700010088710000000000000000000000000000000000000200000400000000700000080002800 00801200400041000403C500A040A0180000002118218000002006000000086080060300008000000000600C000001800000 0C06000000C000000603060C0000000000000000000000000000003800020000005030180C6008000000003000000000C000 00000000E000008100060000063018000000C10000040001820180201A000033010218008000080000018C0048C100000008 118000002003010000000C000020130040006600010C81008000C00600C003005B0C600C0000010030603186300600D0000000939040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (319800003001 80000001800018000600000331980C0600000000000000000000000000600000000600000000003060800100000000000066 300500000E34000C1C0860000060C41A0904000000060C00000C10000600806FE040C01030000004008000E0000260330000 0000C06600002000000000CC00B07938C000C0008004001980000001800C000004000000A07801000C0000C1800018200000 1F081000F000004400000E00682442200630018F0560200000040A0003000880000100821400100884408C18804000000025 00005430000201032002000080450C8000010001400A14000700200000040000000100A540C0000010300000C0033004001800539040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1FE576727DEA 2538124A24252109280C2218004117CBFDE03F2924928106000400051A140800B103C47E0467941FA010AB3120A65700DD6E 81101416B9040405E2948B1080BE0D28C008A010A044880032100201002810881028540A2320318680050F000831D00196E0 65001864824AE416971A2CC4EF764200240E49200562D1088D361054199AE0C3000C10A004998C82760048943941A25FA916 6A6D14424004080001C02042371E34CC4BC0C0B9C4F216219840A119B004CF38060000007B10DCFC69BDC9E20559AC4E1164 88000000000000000000000300000060330180000000603186000180D80C00000000C000001060000000000000000000000000d39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000C00B921D61A25AE832D85C0E436625830920C209B4566135888D24A201000000000001F89E15AE1046B 783845AB4653010E876921DA42D3C0B4F0D243B490E78169E05A876921DA42D3C0B4F0D243B490E78169E05A876921DA42D3 C0B4F0D243B490E78169E05A876921DA42D3C0B4F0D243B490E78169E05A0055155FE0055155FE0055155FE0055155FEAA00 3FCAAAA003FCAAAA003FCAAAA003FCAA557F80154557F80154557F80154557F80154FF2AAA800FF2AAA800FF2AAA800FF2AA A80008392484027048000000000000000000000000000A880552AA09AA543118874897429086577EB7DE8DF7F3FDDEFC6B8C00339040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000140012 20000201200010090003D00900580004086000C083C202486600000218000060017800001CD3C9C4E22020C819A092418592 30EA03400D54C0C60081C6085018D86983F80C00A431284CE621B215320804341446E502C0D80011018000618049604A1523 4100040204D8AB001D08A4831A1C1200000007803041A87027138E400000010110040103040000000000800402000E040200 60801000D00000080000000009CE472538000000800B4D001700000000006F6E9C0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000739040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (158000000000 204AC205041000000020208240000024801001000000000008068224100B00000560000000000812A890000002C004000000 100501122848200000136000008000000000000E444BA02E02002C0120000008000000000809E44000440004020000200001 480800001000000000461001200000000260101C482000000000000080000781000392241000510088203000000000203200 080412804000140F008C3040000001000000000008018E2833A00000020001008022000048040A0000AA13039004E1F8B174 8F31804A2070100000BA472815029033D5820C50BC404994CB80001B52AA0040420A005A9438B4C0A00400004C270103006000f39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60218ACC043C 01C91080252230410100071100C042C05100480000822456045484104ED48801E00366311B89A320000001018100008450C5 1003710081C8A66AA01E222620190210118026013A0A4D0EA1E84100F80100000000000840800400018207F02054004F2710 0005B124082C100080000040C0A4721112808803380C0021083048804180B800000000058434D001B81478049009C4E08000 00000000000000000002000C0040000000000000000001000000000010208408210021040838088542002008048040000400 000081C88914200400000020000000081488841000002000000100000001005044AA000000002112080000100900402C0000000b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (899CE8005B30 000000000003F190CC000C000C078081206D80C0062000018460240000041C184E1148C8040C4700C060000001E0C00030C0 080410240000040814E074C0D0D20A0200018C30483CB8000F00190000003012CA6888000C206BF85EC0422CC1001002C100 800100000001809D1800000D0383005344E040420342E4416040020020080287139249900021001A2110C044660669900263 D18019A67B099E12400108A056340E0C00E0D14028221C018446A5C08244400500A31827402008000952008623023A0C8EE0 3E005022368900E6100132C3208440C1C6080104198250000060A90209508000028122860902800741010048442129028D26008b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (014007000081 61342005BA0C3EB103AC826B003ACC2680D7A031EBC086FD190B07CF14180C0A2C0A00C20504984000046A090088000105D6 02501C964000700118CA108214072110000602142EC78034084D84705D3841EB836AEDE6487C00DDC8B540285C327C00100F 33000C6402048E080002301400204880C2004202A130E84830000004896018910890080C1081A402801630000004000D2021 1029006D8662E9800473009700015004002A40201001266001E01C652800808002E84000012E410806008C0020782A024004 822C1CF045A080280610300080640891420112294AC90809C42020416114A2348C828820020114AA042B81C00000E04CDC00004b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8488160A2510 E84820DD832470050C801E0541E000C0005C1C040813ACB703801E203E000867239088540000000000008100002152080040 800134180C1218D44942D30080034C0312C002818DE460280D89AD300200640040AA9007047A8854C80E8280000000887A28 10A09F02816009C215550180CBE5122902AD0034100000920C12A830A6952533D004002C650888272421E082100208004CC0 00058422010A400F0380C406000032158001809C840C003481A000031980010610418C00103580C0760C000E065831980008 2A06ABC000C8024020028402004009284542000201000380E42201A002088002A0008050208C08050100002000000000004000cb9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9C5572880A03 966BFDD43F3B914BAF12E81DEE552A17C8ADD2A98D348D4B8D5765559955EA456204DFA443A330E01D0EB54E27168914AE47 399310A330AB38A8C40BBC50EF11A319FEDC21BF5A6CF629843C8D3A8F4BE7402B7DA0757B914E25D2E158BA7162B54A2C72 E9702E550ABDCBA75389F5BA113E914B8113A974A854260D462F560854AAF422B44B86D20974AA1D3B954803520330E6511A 914AA512A9508A453A0558A513F854AE572315400510E11CBEF33FBF41EDD2A84188004020042B21DA18E0EF169B0F40E130 3C402201101800D6402D7C216D0297EB62600D6203020006C0000001900005AE518D93780C10C0180A010007438870A51134002b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010018080000 0000000000000000000000000000000000000000000000000000000000040C728854AA510B9DCB871239740C002AAA9FEFF5 51540055003FD54AA7F800AAAA7F800AA55003FD54FF5515400002AAA9FEFF5515400002AAA9FEAA7F800AA55003FD545500 3FD54AA7F800AA002AAA9FEFF551540000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000143FB5546021E0000000402A 8540040001000040208540000954685619BD53ED43EB09AE5C7997DFA4F3ABF0DEFE299D5E2577293C1A537695066552615400ab9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6001512C8418 01620C289045C14720F06006020018003060017802041CCACA92128424C85B8CCD2B25293D0CC3198F8D64C7C201962000AA D86A31F80D1E933489932A0148E85C23080AC10CE510C1188404001020E5D8103A00420904EC01B02D4E36783C0703259BE8 1CD86C361780B181F5E05555110103425905487406050009C00000C0E10181002C300209A4C81D3151831402351A8D16BFDE 05F150000000800B4D000F00000000006FD17C00000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F8C026840080 19A05012C04600660006076098505013602C446001F800C03328B004001060EC04B001800EC10028B4B8C060135060266220 003F00231DA040A030060C660D070C0468016003603609E402081D020067839800D401B488017601040006C3608E82001600 61011A840C031800184D800300764401800280039B00000020000860B40170023323B0494805005CA621220F958010994006 4064361B0780000C4A511510D002C200119E032011C901010008201807095601F19815DE076793D8E4C00361B01C28849408 1043C19C5C639EC6851288959010290806A9C638740E3C798CC06002001156500003186D86C36100000A3301800098049888001b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (230205310009 00004282084012EB14020B0788188FF03801E0032633DE80066130600305990C6832B0C0C8000D00D0256660510832671005 650003C024136603110C00EBC030C72118CC663718C01E4B1189498B25921150405410808F01F12C980410301B04B138349C 000291898006780440031FB0D9C1F180F1A0D86C02CA2871D3B432547304C00A9211C558C46408000C0301800032300CC90A 10780C36070B88C8426101AC604B5110D424F508C096060001446300003C1AB0518059800462B408145000180001F879800D 403B488810000D98F4000FC2CC006800EC110A160003F0000D02355800CE013140CD80B1118007E00300CCA2F00884CE8011009b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3D88244E2009 81A1404DC0C126100000007824000F061404A840D0C5060E7903C86633183DE8700804C9E4010024800C06290201A1C0F1D6 40121F89A6B01B3CF82B0E9808E8C601C480C418B41B0C047B3826407810402100E8D0200060361B0D81801D180C001D0B8F 060348E2791A9B44E54231858400210305859529280200203754A596D014E0C72B930B4FA38011EE632CBC0F4C17A9280674 2E1C1881F7FB00241D6B855689D290D4184A1997DA2294A2091A431FAC0647063BDCA6E9593000AC37AB856A58178AC604D2 F8E5EA00020C0980300020200F0403C088346A342A13000001C741A9446A55291D568D4668658ACD04BCC98152A1142A304F005b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5D8CD5E335D8 C53E31CF8C73E1C18EFC081D186634180CE60D0E004A0D17B8C40A547A1F49821011058E007E3C1E830071003EC32183DF8F 01E3406E04040D5FE01618CD80704E34C1E3C0384DA6C07800D1EC57E0C09C306C8E006D340B04600C01BF000000403C2012 1980464242003DF8D02030418221990C1A300880D90DC0010D0280023C086630180C86110804880FC660CCE0C7668C026CC0 080DE0000030C801022340E8DC200C40804060CC0600008CC00006A10C78007A88060CC1820C18D06680006C0200311A0D60 02C603110A2400CC5814000E20683D1202060C41835401C482010A28406D86C2C15628082A0A084198F000633188C1A2B19800db9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (063F5A3548E0 37CB2198FC1C0887A333833170283E000E2A5050140260000D86C4F0103C400012000000001810080454010428C1E14CC6CD 180307E4C28B8580E0603F19EF30018018000202020310D84066D8260006836690EC18300002C68044481440200103000340 0341800F003F4027068814200019BC8083378B00842F6718882512000482596A2852ECC00005A8A40598082547A0DD064031 B0C600058140180C010C01E0000315983D1630C18C40437580CC663CCA0E061831D832180C06C3F069C018006008DE0700F1 DC78DD0E00060B000171E08F00934201C00201A000108049A00009C04000680105047081818607461000E1162319D8CD5E33003b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (402000A804A8 4420114881500114004000150004000100A2440A9548A402A044221008944A251229140855021542254228508A4528954A25 422910A851089048A45288548A540A954A8052A940AA5122844AA540A944A245288448A152A054AA1528950AA512A9102215 2281022112215488450A854AA440A9548805008502A010A9502A142A814A80120044A21502954825502110A0500A914A2550 A9540A452A800A21402900024000800A8552A0500060001843018BE1E0F51EB31E02C060142423010C0DABD6780D121B108C 1E6886E00C62130620012603198C0EC019BCC40F347800A0940FBB4002078BCC9E715D90C68E3782355A4C678005EE779BCC00bb9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000408A0108840021528850A2042A00400553FCAA557FAA800AA00155FEFF2A80154FF2A 80154AA00155FE557FAA80000553FCAA557FAA80000553FCAAFF2A80154AA00155FEAA00155FEFF2A8015400553FCAA557FA A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000028550A940AA010000000000000000000005000140000000002A1 00AA012A954A85520954A0002800480140014002500A804A8152014020000201082412090408140A0140A050001400042200007b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000180C0000000000000000000000fb9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0800800C0883 40000000007856040D1FAAF150400AF96628C00000A8384082109E504EF7708DE6885004D86025786C04C2762705E2013040 0E0801028442E5A1F8783251331F62E19100F082410B100A81004014B810950CE72010CD9A00551541803043B0E2AA551DC0 4290580828C00600002C000000A03000004080160300004800320180100280B4F507AA814552A8018000800B4D001F000000 00006F3B7A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000D8D54995C 1C1300008620000001520E04BD0000310040060000240D4912001400E0000080200101C0000C0016C2A842BA18100E100402 0000000D8000581548478728114400000300003481A8081041010004C002A8822210101601000A8004290090160550004000 0C048E52840001400012200002241702000019200001E30100502CB0021C530CA11A0100E2042A8AAFF01001F4A57F10CC82 00002D9C4507900881301B38081B018C080404214880010102020A102955FEC41180862D0002094602401B84000440110093 450B074C01805050140A300001000811FC5F04800A6FF002A982402A220086000008380C201402001419006ED1080408042000879040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20021002800E 01000281800327130800003888344D07805500A0600812024180110060100504520000154022600104882300118000000180 2441159FAEF208600C490980000334580028807C9FC88210181044800CAC0AA490980002E44A80044E800000280005800661 11A00D40557F820B0DB010813E046180080FA3FA442820181A8764C602A0421D10800F0B2078500415019908007182A068C9 4123120C941860840658300A4000600018006000860002DB95085727300C000000B00003480A808902000C60400002058000 0240D413010C4000C20028203040000C8010688C00031880008005482812D419030AE11110A006254180C60040210180001000479040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000600800 1300381FEC2678DC860C6701C66A82B0C5E0202220C100010008001000AA0BC9A020C0808004A2800004008C08032E290842 415000005001230AA00600441200401800A8B00004080E002A8AAFF3A03C80452AA542C50400181420000018000261058000 0081000A9751FD8A082010CA0004284102A250000189542185406905028B807001AC02800123540422D2000C825010000000 006018481018430D4412C8B4410AA812488512806068041094001000C41E00182A40E202004188020204008C008820000508 00400B32D215A2061200080514212428450808100441325000220400884000212180822C29820700090108814A82C948100100c79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00CC00344000 0018A0000C00000140000001140200001003207800A8080C17CE81006A011C7C00814105F0A0200630460D01820200108410 400C0180409010181A0600C06D02C0087A756E380400C000000470158D400F12023C2081000040010100208EC860800C0000 00043C004E88000E40080098400230020A82100C44001002804C1260C4080462800380021000003202000800000290680C01 0500008000C40800210C400001410C00046504000000A10C08C04201082400013140CA6202400900010860DC4002880A5410 218200000D8000010B000008602EC9600552C51600002A014510010918567E80C00283808C22200E28180801508D80D006A800279040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8402E8003415 1E00108EA7F85426F00820054C50103028405000006080580000005420848800017026590F80028C408935C050208C058C30 0185420053B30400004080660810041066A288601C200032060084D01540A319081440208000500008B28000001800000100 0000000000411426271888251002800A0C21884248008844E43C058DC8640208558CB02B0E42430401795214008005811089 04823006B1028C00214000640614C2240098401835002C02031228C0181021004800061940280011001A21000020BE4540A0 0000C0031C10001608400011E02040C914001728060020000004000660040000180C06030180C06030180C660019800060C000a79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C87C0819C307 10CC40070602906C200210263000005C6E30993C0C4C7F310003200020884120840025100301D07470A8D82CA6784C1C8B44 0401CC000239600250008C6F97C38002A347830000E0B2307E731F175E0E37196400016511870335710006B8460CC6E37070 F9E6C040105C849202D8322C402009A60018002493181045CD005A109C881A0089CD25202442842602400310600800A25522 094E06E09048000020008281020804440000040181800400B411048EA0A068ACD0205180D90E80200022C30100050A82B3F5 9600000C410C0469288C30402DC180260174E04002101280460165884E0600920680A80440047A0208C0000004801C20280000679040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000400A530801380418302030018366498D389C31B246CC91B270C6634E0D992634E0D992C91B270C69C31B246C36649 8D389C31B246C366498D38634E0D992C91B270C6C91B270C6634E0D992366498D389C31B246C000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000142AB54A6553E944AAA2150000000001502AA815000000000224082E00091689068108400850B291 60A24AA194AA4129D463254128D4925809054494592896825A020402D42AA9782A6820DEED3608E1428D20360908B250C9FE00e79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000200180000000000000000000000000000000000000000000000000000179040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2E1545A2AA94 10FE6680400005BB31E000003EDD4EF6603DE6000008DE6101B83C10B07D8F01E0000000180000000000C501FC580000031F 63D18300C80000020000000080D239002205430658CC1C00000001883000A060000000006006480148C00600026800000146 2300004180107B1000C4001300022040000000783FDFEFF7F8008000800B4D000080000000006F8DED000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000979040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000028002B08 000100000A400000000006003C10600000080001034000080000180000003C040600000280001015000000000080058018A0 00000500000002C0003040000000C00001023212001000000800000001900000000000060004801804001B00000064000000 36420006120000800F06E05C0E00063E490C20820002800500000000100800000000906100002104C2011C4901F1833C783B 000A9000000021060900000000040000002004004F6300208018000020000442202000116008C24000000040000430800006 882406001C00126AA2A9558002102804020090291044412018008618080600180A1000021041002004020600000001F8280600579040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080004082020 C40180000001D800080000800003C000000000001000200660000000000019800000000000100000064798F01ECB19800383 10180000000000060000100000000980000C81800000086000C008000001E0000380000001E01404000002028D706080984D 40800000000270D20C040911094183B0003F1000C3081040281402010F48035162EC18EB40031060451021040231A54A6100 401C0A402000020000028000004DA0020000401000020020000B0408006010000000800010018003003FC020400021E01F00 00080031D8DC0002280000800000E000FC0B81080010407006B041804200002B00800100000004001000562700004A00006000d79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (840C3822C060 000071FC107C0CCAE40083CD80280380000C0180F1A48006000001001B3C10336E0009800000000030118000000400884400 40000001C0183410CC1000000007E23D80090000000F00001000180800080002391000002913000040000000070030C00000 000000000011410500400000C3060000C01003A406000000C00007800008003010000000187040400880000400080000001E 100800C00000028008210004100344280C08004000000041804300044084008050220F080200800002018003000000000120 04400108940000400150000006004C08002121000069110200001800800000010180100320061007800E010000018083061300379040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000730C580D0100060C0070809800000C06400600000630020D01820000000030600C0180C00001000C0000C06F80 00005CB26400000C0000C00040038C002400403D00F0000000000000301EFC418007820003307C001980812E401A0040C006 30000007800C00201400000CF660CC000067800780061800003306001800000000780C018F0000C000CC1800618CC0030000 0C000C600C000001E30C18C06603006C00003000806380400100000000C0000018000020108230060CC000001B0000006000 40000000CC24020000000F0002011800000A034027B30C5C201A0010000000CDE0D267B300200063CC002C00800002A300F500b79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000000410 003C788020000020C0600000000000038800000C0200040200208008C1A030000C018C3000C08000780000000000E0400000 0000000000EC1A001002068080000000C01180000001C0040000003800000010080007000040800008000028412888262000 001A00003418A80180CDFC7C058700000000018400000D0603101001F03C6183018331990DE631063F17E80063C180CC043C C60F0190C4183F000406023078C018006000C60000000000000000100300004800000610000040013C00001E00C00001E000 60C0180C07E8060000600066000663326000180C06030180C06030180C660019800063C000CC02301000461800000C20000000779040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100311E63200 0BC062321B31780C10001100210928108010009100314229103C0008DC0C6463805C470D00940000518080823420940CB621 31421046095C4426728066F81931C6603798CCA6036BB351033112080008400000000210C990384120C083021209F0205C89 898080181124731132C7A3247AB19A0A4A08C84F25181D76A0602300080160084AF11FB389EF01F161600040000080000000 000019800000000030203D01800442E0322D8000008048000000000003000002202000010000000C800C00780198301DA980 800602A154A01C30020047811088C404030007B7D208000858221060000000000C0420044000003160001E0000800003004200f79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1020C0002240 800087169E1A4786921C5AD23C0B50E2D43B48F02D43B48F0D23C0B50E786921C5A87169E1A4786921C5A87169E1A42D43B4 8F0D23C0B50ED23C0B50E2D43B48F087169E1A4786921C5A0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C64A252 09C040000000000000000200000000000A080550AA9C3898082BC78BC7930060DC7813D988F033F19EFC1195DE6936383DFC 83680807E48069241AAA6A0604235613FDB83F0D0290892600E1DA483423088051434DFE4C7E0C19E30798CC60A04609946C000f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000300180000000000000000000000000000000000000000000000000000000000000000060085902116B2008f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (31E000003058 0DF6602DC6400A0CDE6301E0300030798703E000000008C001800000D603FC780000031E63D183009E000000000000000826 3C0100000300600C080000000180300000600000000060043008488000000664000300C61000000180327B0C80E200011DCB 3018000000603FDFEFF7F8000000800B4D001080000000006FFED90000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180026003C18 30000058002080C000040000000000003C06031800018000183D800000000040078039E200000F000000038000306D031600 40000086311A001803009800000301B0C00000000002000780180C001B0000006000000032000002100000814F0680D06800 46304C0C0092000280020000000000080000000048E30000110A851501480020813848116080900000000186010000000004 02A954C400809CE140608000000000000442200000002A0F056000000180000610C00C04002154AA0D000A6552A95406C000 320101019009088C001008AC840000428C0014082020A8108808040204000000009804001D0AC552A8940CFE6600C00103FB00cf9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180001800000 C00008004000000040C600000000000018E000000100080000000540801002C500800182001000000000001E600008000003 1980000C40000006006000C00C30000006C00003000C01E02C00000001970F306080188E002000000001F020040205000040 815000346E00DD0730783C1E0F0785D80050E1DC38F72082084084108010CD01B0006100600006C060000600000080000017 B0060000003000000004000F06180000300002018000100080030033C0608000F1E00F2000180011F87C0001780000800000 4000FC0983000010604006F060008600005B018003000000080010007E2F00001E000000000024000F18002100001E800000002f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C80182895036 0600000C0162E9E6000400000001122804A36600150020000000B011000000200000200040000002C0000816CE0000000007 A03D00090000000F100020002408000800044A2C508A50230000800000402B0130C0000000000000002A800A001000008200 0403086003180600000200000780011000502000000010A024805180400C00080000301E20110060000060000030000C0000 A8300C100090000002800003180A85480562A1540F50300D000000000000000200000140084002112800008002A040000402 90040042108000302214009010010000000A0180A0033006A007801E0300000180030623104000100140E81800000040780000af9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (281800060C00 78019800000C06000600000630060F0180000000003060040180C18001800C0600C06FC000007EF366080100000000000001 8C000C00203C44F2000000020000100E3C6180078000033060001980000000180100C00600000003800C00100800000CF660 CC0000678007800618000033060018000000007800018F0000C000CC1800618CC00300000C000C600C000001E30C18006603 006C00000000406580800100690420C4000019803020108210020C5800001901980C618CC0600000CC66000600000F000000 18000000060437FA0C16231400100002028980F047AA0080006A894431020000000600FD060E7032C0600000A1B0137008D8006f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (402800001000 80078C00000402000680C06CF008D19830000C01803000F08000783300000000C06600000000000000D01820100186008000 0000C01980000001800C000000300000000800000F0000C1800018000020070888243000001A00000F00E20502A95E78038F 00002002010002000C040A100000E0AC6503180AA5530D64A0603E05E32142819488002E850BE1008000EA450CC400205001 500B6600C7800000000600000011830000C000004632806A60413400001E00460001E00140CC100C836C0610006000740006 0AA34000000C00030000C00030000C600018000003C000C002300000461800000C20000000000030000000000060006A286800ef9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA303A313A1 11A84E498C42EF13E331A8DC31944A645229046A452B04CBAF006B75E0C56E115A6552A250AE532296CE6457E9702A570ABE 4A65130BDCA6312E915E8112E9DC6E54270F47A3D26854AEDC22B44B81501974BA1D2F97C049700130E2511B934AAD36A950 8865680D40A516E875BA3526B5C00F31A114FEF32FB5C1E572A8B0380060000180000000000019800000000000203D010408 81C0201C80000180D80C0000000043000006600000010008000C000C00780118300923008006000C10300810020046811088 4404010001121000000018000000000008000C40200540000011A0081E00000000030046E000000008E01818300000000060001f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (198CC6361B0D 86C9C4E27138361B0D86C9C4E27138C964B2592633198CC69C4E27138361B0D86C633198CC6C964B2592633198CC6C964B25 929C4E27138361B0D86C00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000343FB5546021E0200008402A854000000900 02402085400009D5E8D4181542A542B9002A7479A7DAE4F2ABF0FEFF29975E2E77A83C0A413294022D4233540C5D36800A81 B65BFDCE3F7BB34FAC10F834E077261DC0E560EB855485328552A55489982ACF62044E24C2E1F1A01D0BB7CA25138B14FAC7009f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000201F8000000 000000000000000000000000000000000000000000000542A954AA552A8004D2985CEA511FB74B87106B5C18C964B2592633005f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE6301E03000 30798F07E000000018C001800000F603FC780000031E63F183019E0000000000000000063C0000000300000C0000000001C0 300000600000000060004008100C04000660000000420200008180006B1000C0000101833000000000603FDFEFF7F8000000 800B4D000880000000006F021B00000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800000800 00003C06071000038000102D0000000000800780216400000B0000000200003040020000C000000632100008020008000002 01B0C00000000004000280180C001B000000600000003442000422002001EF0740E874024630940C01120004800400000000 00080000000091610100AC940A600290002103385033618C000000000186030020000000000000C000009867006000100000 0001000000280000000C0404008051801426840A2D51002800001C00146AA552A806C008300002019001100C000210AC8000 0044880010902200A0110800000100000000009800000C150AA5502864F56780C00307FB31E0000030D80FF6603DE6C01E0C003f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00C700000000 000019E0000001800C0000000200000000C800000183001800000000001E6000180000031980000CA0100106006000C00C30 000046C00103000C01E00C00000002960F306080180C010000000002F04004020A00008102A0203B5400D10A3070381C0E07 0F9000F1C3A8709A41831060C618C0180200B018600060300E806000C400000300000067801E000000F000000030000F0600 0C00F00000078000000000010033C040000041E01E0000000011787C00005800000000006000EC0D82100010006004F06100 40000038018002100000080008005E1F000096000040000018001F180011000016800000100016003D1870000098001101C000bf9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C00600000300 0000000366000000004000003001800000000000000000000002C2004816CC0000000007E03C800E0000000F000000000000 00000010004C00000003000000000000030180C00084000010000030C10300400000C3040C0609C003700600000280000780 0000001020000000302020010180800C00100000301E00000080000040000024000800000080080000000000000000831810 0000006000000F00301800000300000300030000000000000000300000000000000000000000000000000060000020000000 000000000180000300060007801E0300000180030603000000000000C01800000200280008000080000040000000F8003000007f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000063006 0F018000000800B0602C0182C18001800C1600C16FC000007EF366000000000200000001AC000C00003C00F0000000000400 301E3C6180078000033060001980000000180000C00600000007800D00301800000CF660CD00006780078006180800330620 18020000007800018F0100C000CC1800618CC00304400C000C710C000001E30C18006603006C00000000C06780C203107B0C 60CC080019803060318630060CD880001B11BA0D619DC0E00001CCEE000600100F00000018000000020037F80C6611100008 000040C180F3078C00C0C0680C003D020000000600FD860E6033C0600000C1A0216000CD8C00800C003C0200000C0060C1E600ff9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0B00C2ACF409 619850200D09A132A8F48000781300000100C0260040000000000064183008B24600C0000002C01980000201800C00080030 0000000800000F0000C1800018000020030888241000001A0420A750A00000001E50048300000000000000000F0000100000 780C2001180000030C2000603401A00000218000000C000300000000C0000CC00000000000036600CFC00209402E45021551 A30140C000000630006040033C00001E00C60001E00000C0000C0060060000600000000600060000000C00030000C0003000 0C600018000003C000C004300000A61800000C1000000000003000000000006200600000001000060C10F0011800000C040000005040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (422950A05128 9448A45288540A5508954A0052A940825420944AA542A144A2450A9448A112A054AA150A940A251221402255229502255288 40A8450A84422400A954A801009408A012A95428042A814A80102100821102854824508014A25008814A25402950A8042280 0A21400854021002800A05528150006000018000020040021980000000400060BF018C1983C0603DE6200180D80C01000000 C300000660000000100C000C000C20780018301803008006000C003018300600E7833198CC00000000000000000018000000 006000000C0600000000000080001E00010000030066700000000C70081C38006000002040380000000000078C00000D020000805040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (349A4D269349 A4D269349A4D269349A48743A1D0E8743A1D0E8743A1D0E8743A1D0E2D168B45A2D168B45A2D168B45A2D168B45A00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000020550A940AA010000000000000000000004000100000000002A000AA102A950A 85120840A8000001480450010000502A80480052015022500205402440091028400A00420050005000440294402400A01028 5420004885528954881008104005108840AA440A9448A00200442A0028144A251029048A55221102211229108A5108914A2100405040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000201F80000000000000000000000000000000000 00000000000000000000000000000004008110A944221520010220428810783C1E0F0783C1E0F0783C1E0F0783C1E0F0D26900c05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A6C24A55365 92A1A4B4112D918485915998CA4932A68D8D549244B26538AA1549932A592A000000172520E2A954552A954C4823C9B94C4E 5CA592C4254328B65E52AD8B2E52F9ED2C6A0D2A5D4AA05800000048154AA552AAA8D400800B4D001880000000006F81CC00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000205040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C21149E4908A 13000F25632AE5328752390422913240CE65491ECA49A00000D2965310520EE4F155EAD64B11C4C00420492264553552E656 8968D06933198C2995310D74E930394C46F33265B29B332993069149ED74691D00000007EAB4AA552A9B94C933D3E4F2797D 2A4F4AA2F1E9CC9972A64942D598288AA97238D96AC4800000662CA78AA550D06D4AAE159111C552AAAD74192BA55CA2D65A 09D4963CA78B2D530BE8AA55749544C0000000D26A4B198CC9A4D2A54A66352BCA06A351A952A56F0AD58BD2124964A65329 8B4FC53AA8D4AA2B1A4AA552AA95F4A608954F21A2A964B2C548AA4AA1A48AD1246C2A1492499350690E992C954AA520AA5D00a05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (961280000644 D299D27914BAD4C9932A5554662A954CE0A529654C974D098007916BADD2564A9654C6B331592EED6C97888C452994140000 364AE5A4AA4CAA1554BB8CC552A96534255319948A74F99CBCE532A78AC9E7CBA5D2E974AA4FCEA73A65CE594F1E53C794F3 9CF2F62DA55329A5B3A4F24825079246201240CE554B1B9348752390422913240CE6534879249243A91C82114898809E2A95 83CA44C390CAE520A28925E4B39842294CA1D486801390AA9972950841E5239132653487926A43C920941E4928812402F155 2CE6108A53287521A004E42A964D41E49248F24845098805E4AA95E89A038A4D21E492490EA43400920672A9995A7948249C00605040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7752C880654F 0A400594A9993C69251654A9921264AE7A13000000033198D8762AA552C5945168B4464B294CA66128A57CFF2B19958592A9 54EA725290816B52822D682C059C56C105B8B016495B04124640595052964B2D558AC28229B4960C9652C964CA55363A648B 596421689000394A2883CB71602DB2424919016690593124B700155EA8E363416C4E393756E3B6EB65BAA574394EA2600180 B2A93B258D455491A12C64249594C5233018EA662B1704C5949894B296252999CAD2491108692AAC5329C4819452EA52AA0C ADF15A916C5E3D16CF6EA3229994713903800F432954CC552C958AA652CA58B2995B154AA5D5C95D2CA933198CE6A0FAC0D400e05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2B36CD6B64AA 44B2E67B268DA557E2AD3269532654E59333553466333A94AA6532694C9E4999C64A873A512CA433168CA265999CD4324CAA 592A41312D3478132644E002C2A9B29B4B154D2962C225EAE712A592EE53490DB49942B54D07672024CC3832A643A662AA24 4E962CA25129974980EC661D2602CE54A9A12C9133A18CA642B26000604A995149A569A534A62D1553C0952290D29A532A5C C5513110AA954B9552A00001A4AAA95F155AA6624A1932000020120BD32848A29E49168CAAA4F3A93C990C9454CA674969FE E552968AA554AA94D299239984C000024142DE23118C86A6D168FEE752958AA954AB9CB24A750012A593C8D9EECA2D024E8A00105040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A9752AAB3299 96CB15FA5932DD7F16804000426552DA0D9E54CA62AAD4B6994C8D956BF4B365D4AF52A41540F28AA5ACA658B654CB16C898 40A4239E9D49135155B6B21627152E76EB748A922CA5D7AD36AA6C4E270031134CE2A955D2C56E27992DD6E954E8ED64AC48 EBB3903CBE52740791A5F2513092E06F96C3AA428099F49F2E0A4BCB51602D2E65531557A973E148AA954C98172565519812 614CA9520614CB258A950494D22504B8253099389A4CCDD3AB2DF4C27D309F4C27D309F4C21D32C74CB5D191963A7D2F4D6E B3D0AD76625B1ED74F67DBE934AE7EAF97C563D175F67229154D29B5C898B0552C998A4554C8252C653329562A52DAECB6DA00905040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9513A752C874 BA592AB24A23D1F9DDAEFD799FCAA612AB719ED567955FAF438155AA122B9CCBA362FB5498B42095C8AD621B3C7AF57B9D0A 845223F5BAD73A85D8C8D2AB55E05002914AED40AA54B6153A11482767A894BA652D8547E516A914AAF433BE18E571AB05AA 9626969CAAE55BFDF6572AB95D49A5F09D309534A48CC9A33298AA392C864EE567B26D324653218AA0200000B805449A5489 B34994CCA84C9994C2A4D264CA9A4C985346749198CC6632A14C8592CA083299532650C984A324C828331C82A89551992AEA 35AA8AE552AA55329A138010079752A54E6E3F2A952A674B9DCEA62B155326C5B3259C034B29D2A477F16D3C5A34898F29E200505040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60E48D139C9B 0D83909D1A8D139C9B0D83909D1A2746B60E4726C2344E2746B60E4726C2344EBB5DAED76442211088EE773B9DC110884422 BB5DAED76442211088EE773B9DC110884422BB5DAED76442211088EE773B9DC110884422BB5DAED76442211088EE773B9DC1 108844220C2FBD546001F8000000402A83400400014000502003440000DC781D089DD1ADC1B9480ADB7B1BDF0470BBF4EEFD 28B55E85B6B91C365246B5054957D254907544B80BA226C9FDF8DF2AB14AAF12F865EA5D2AB7D0AF53B9B8CA792D094DC553 1265CA912BB902A516F9F1B8D513B7DEAF47810CFAD74BBB5CEBC4FBCC2A41239D9DAD25ABE5EE5C79970E6F329B488A0D2B00d05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000E00D9C844F348BCD447351BCD42C050B08A22179089E0A17980926C21289C4E2713 89C60416A17CFAD52F85DA042248DCB4D83909D1A8D139C9B0D83909D1A8D139C9B0726C2344E2746B60E4726C2344E2746B00305040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0B2003211E14 48005280002089460A4105088304D0A0541108844ACA430144820000001201061A4098D02000070D100201EC3028001405A7 7208C0812010902000904422111A8000000000010000800B4D000480000000006FCB6B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5826820AC072 40D030801A2506A2022111AE38062184A503800020000422490442E0900E890890000CA03B8008124CA200C0704B10080248 90C22844688CC6246E96062C621B4008922011088140305C00000004010344884D86C32204D8244182001872210CDA2542A9 45245324104824412110888C719817E2D301941C140AA6428CD668440A62749B8161622844A2000000000406100406000000 8924422111A4C41C23518313084C9CC862105C8846A210264E3A040820748890284D261314845000458A1406240060000100 08181180808345F381E40A0100D543111170E8D516894E030400809070738B85EA01508014D4098008A825421C402202A34300705040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2018002A0100 00100500180000011012488C32191426080000800810000052400119082400724880442200DC0F0050C55C4C099440800003 80680E26A309A4D18B31600F67181FA300984C26130984DA204068CC18F31830C60C318031868C0300064310E84D04D14098 0EA80220D030001C30448180E820AC07240D0308049980E8200C074105603821A260002E0C01D12035040B6B105A4201C024 AC13130603A8408034042007235A0600E830468049980E8484135502603A04024D11000070092B04C4C180EA10200D013812 0601A98504D120821A22000048BA242C01D24603A880301D4211068180006086823A880125603A09A2412411106014010C4600f05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (688100020021 0C188024110884466271A04C220108A7322044284D18055A0040181C8811002340A0600000209027310884C620101A540835 C9A740695020C7268D0E2CC0A3E4AA052283C284138904A8401AB04A84009830E2102380C2AC40992488102E910C80D2A040 6C9130B2088D222204C24D08800A0450A814A29442810824120110881728901244822311824748034A21018904600529BC02 04528874A0510E950A2C10A13182046894400164922090120005040240A3308A512B81500200A82490A44A08028050080000 D048040224D078001A0001804000C00104083020B00060008020000000041920102955880C0404422CD1A13426D321854B8300085040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2954E4C20499 810A4048A842814C00494082C980106500A240054048345009440911C1920361000019908040804200C0940E188101178844 44343C00000487214414490B1A4B01A632444826070A928892C1091845019804499549443869731148C322B245128C2A9901 21A2F25058264C97116885409488C427A0C22700BB1C681D020000852261318E312681C820024341984C000C846442200C66 420280000804A0604011088446847671806E341A045A801321144033338D89A1C03800820F2F004000000039AC2344B30101 1088C484356C265BAC418800200D27000000005104C68100054823548144300470048221900940208012908884322140624400885040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A902011208CC 243018B4C300D00040080013164AA5534908AA5505090A2040190802582B118920201120024946210A2630A00042510A0842 458211103C35518E0244101184920908974881001000884E528348044223885200010893E7448901C2200A0C024290AA552C 11220840058521600A6572144485A2A9540000000000878488D0004010310200D2232084021002C680210048B60E213C44EE 10004862366B0010244490440001201402A440A9102A442A8100005003200A002A1190844488548080242540009081504240 01010AA384009028841A00028010B025C2000020468000210870800C168000A50905487550091205D14195C859049902E7A200485040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2910AA452215 4A25422154AA5522954AA112895422552A9542A5502954A8452A9502A442A9548A5408950A2402A914824028804A80000140 221522144A25428014A2102A9142A510A114AA452A054A2510091002400080020552A9544346084380002954A0A85D828A22 4020644226411C198310406564444101930A00C990CCC820065641008845025E2A008326003A6930503927438013019D3471 333404A1C18A2110C82506922A653044480224088926506159204546200D41402020541442814120000000E4300404422C30 204C98806A110264C09920B24800800C08000908A0440696406CD080D4C8350B0000000000D00004403203056000A46C460000c85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9DC442211088 442211088EE773B9DCBB5DAED761108844225F0517C145F0517C14F5503D540F5503D540A07AA81EAA07AA81EA0A2F828BE0 A2F828BE0A2F828BE0A2F828BEA07AA81EAA07AA81EAF5503D540F5503D5405F0517C145F0517C14285502940AA000000000 0000020000000010000400020000028950A8002895488552885420002800480550015000502A804A80520100201002010825 12090420142A0100A05200040051009500050028040A1528100AA1108040000500050000022100AA5528954A8400A1542A10 2A954AA5122950AA552A954AA552A95488152A950A2512A95488512A944AA55229448A052A910AA5522114AA4522944AA55200285040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000E001BC1E6517914CA6A351008009151880020178BC940A30080DE67354001FE555500110AA552295428052A91022052 8014110884422BB5DAED76EE773B9DC442211088442211088EE773B9DCBB5DAED76110884422110884422BB5DAED76EE773B00a85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (211E224F8442 011D000A2F829BA1F079C89E44221047482141A9401954911041600000180A1289810F0078A1042A24A5054AA7C014BEFA40 9108844220000000800B4D001480000000006F6FD00000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000685040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A4B808181631 8601A6F0311148866100D4002591393063500150860448385E181998878CC51808D4A810290642A102209042023C91429520 985430553092E026027082140892944820B2A05028551A05A5A258A94458782202CF56E9E420D95BBD5FEFF47A5C04220416 8004265B7D62FF778CDDE330892852DD0980540FD7F9FC94C71EB7C38C10422020115484146C24B808105A41088C686231A1 42110D398121A04168D0A0469E5FC983381DEEA350A84AA2B222345CDA208E4884422290CAD22A110E0C300050B0F4223E40 85C2A8140640020001E941FB68261400804021F68B4DA243243102008038C41A440004082083A988200000950024528A24A800e85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (072800428502 BC101448871CC3F3911D0EF84423C76F3100C1949701220000800A3C88D478094C8442202114915108546A24408894A01002 8068A542A150A8541A0529A512214408450A114284528850020E2450086112A0503B13329180915200EC4441069143231A89 989810200EC24143291A895918D44CC4C28000CA220099463472804AA01E398105A41289DAA4462C8C602052802089500480 4CA31A881021143291AD6140EC4CCA4702550002D11104A276A9118B23180814A0080244CDA27328503B13280000A48BD022 8F7926072CA462246463150A90076220C9FA2847A6546EC4C0A0762650008D047122A110B249A89989810200EC24411A89C800185040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (11C07E4014A0 1FEC82FBFCBC63432E064EE12261045F0B1C1B41808904A83E3006DDCE00F2B946FE5D1C1C6CE51BF9747C71B3986275F00D C6827FA807C2B6597DFEDE46865C4CA5C24D1E997C2A17E6E5C18C523C7831D9EA37F2E9187B6789DDC38771119EE31D9106 8FF3E875E6361FB75E6FF66B75B8BC7EBD068631488010581D24C2CFC419A10CA804008C43179A0CF2B701B787E195108810 BE05A984ADC1C8CDE659289B1108E480857EFD5E0F4428A77A8DC41E3F8147EFF399CDEA1D1F96814A010114464524118282 10C81C3285708448810549090EF91B85C063547BEC2E821017C14204528850085023C6880103453C1022910408A70075CCD700985040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9FC6AB32200D A2C06798DFED950A4184F103834E804760C8FCEA4CB61FAD32B8E4B21F7B260C20A0C1A020814114012C205A7CE0F27E309E 270340FC9CCC622443A635B8204CAB22321B0330227DAAD3062FDEA987E8BC2E627FB2D8470780ED0C5D19358C2230322C52 2000000E602540A114A2000453E0850284508A510A1E05111000001042001009701080005D4104422201EBD9120A2FA2900F 1001548A8D44A986052668A596886C8154461101258CA00887C82504A1C058D809988445F05220D8871B1D4241A0312482A3 6004CA281603DD98374D081944C1E3DCAE5C2B020E043003D0686547AA00478648ED161811145488801320802A513092E02100585040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (44B48C66005E 0FF60101FA7F50841BC98203318C322A13002FC6428C50F0218FD86C03505116FB5F23CD0F262B34688F0C20D488002B3D0E 63053809EFA02045DA7407B7DF8DC6E10084FC1E834CCEB0BBA81E0E7F37DEA0D1F8FC785B2583DB0F2073CC90C9079EC9EF 03EB7D8E7139845D8C31E90822914488070432D008104904281004844221E8911C04D1A1042021108D1E82448CD1A1FDAA77 6ABDDFEFD3FB7DFEFD7F974AA5F6A985FEFF331E0EC050FBFDFE273B07954A37D9DD1EEA743F9BA43150317C3E21044CA863 408410450809484114A8200421191C0A8A12634484CD013307CD340370B87359B3C68C02A844387C78101025C13B008E140100d85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C8E49688C866 2120008582247094E22C6023D060F62850A28523231403860005708E07008080C06801406213934AA576A96114C53A1D5108 2548EDE0714A35C4ED05A128E0AB3D2B81418001E4720C06131E0317D110B64708915BC477A2C10A4C08214AA8620A4C00F0 00130220078331983351200000A2F82810F11E8C1EACF061C024092A05940612D91420590296516436E884446200350E6050 20548A54422212CCD41BF4EA5E319FD881D6D00808372C840241108A4510897129500284D1A144591E968D0A354301C42209 845923F79A211428690DD880355128BE43149DCF8CF089312A2A10081ECFC0001D00CD01871E4A5042216203058612C400A200385040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (140A05028140 A0502814552ABFDFE00002A954552ABFDFE00002A954552ABFDFE00002A954552ABFDFE00002A954FF7F954AAAA5500000FF 7F954AAAA5500000FF7F954AAAA5500000FF7F954AAAA550000018002800400351552AAA150000000001542AAA1500000000 0064486800AB404B405B016E8C558295E8A7D2A8E4AB0128154725D32938336C0306E03178099E04701B00030558A9166A10 A00964220040123456120062A1432DE02C7F0C19E0F19BC1604F480A0480A40020E80210098804110A1530B03730C5E025F8 21524B70108542150010068420034000E42A246808322BD564D5A3AD86B879A210450291750E0A52B9824C9279A028014A3100b85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000C001804000278BC5E2F179B CDE05029148A05151A88020001001E4F0542A8000000001A8FB3B124AE3421AC8881223AA1945F2F97CBE5F2F97CBE5F2F97 CBE5F2F97CBEF57ABD5EAF57ABD5EAF57ABD5EAF57ABD5EAA05028140A05028140A05028140A050281400A05028140A0502800785040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A28025BEA07A A205088141A9442A55AE9002A00000108A5729806A8050A1242A452AC540A7817D540A00281EAA07A8000000800B4D000C80 000000006F555800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400088429512 E950A22D238446044BA8542811288508B4108954A0142A1540A113209059112891C7E5205D542A741FCAA893F1514CDF219A 90082752A05028552A054AA4508944485022054AA552A84098572A954AA05154522204168060044AE92669552B8D23319995 2A951F20540AB551A8CA8155229F085142A900D645821847F2A8A448EA44888C28A252A14612152A8742A130A950A1452A95 4A8552E934A251289D4FE3599452AA390ACB00F2D2BD54A0550A010080C0F04C0F670143CE16F17CA81544815007C6005560 BC250080CF00B00044144D0088A481601506CF52BC4C64867864769450199D2E265A1C3E2121BFCAED43131002FF2AA9552F00045040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (525914A84402 844A2160A0F05514A20143A41A28C4A62E255B40F2D00D14A25138944A14308894A010A68048A542A150A8542A054AA51221 4408450A114284528850221C0A1108A4B2A0D02615269142A4A209D4A0400A914A65128952A841208C40F14269148A332894 4A95410814AA7A80134A2052801EA014AA800FA4028952A844999442A52281AC8350088108A51289700A1426914AA3409854 9A44AA8A00A7528100A254AA11266510A948A06B00C549A45268D02655108146A1EAB1448A532A0549A452294CA20B25104E A500815068452A94499541A04CAA210A5500E052A110A65128952A841208C40F402A914022A8A4529A510A914564283CAC9A00845040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2944AAA542A1 FE5528B9954641E9615E28500A954A2151A944AA553A544BA512A954E9512E954265510956AA4128154AA6D2A974BE458652 C96542891496522A154EA541092AAA5A2A954A2552A912EA5509954255539974A2153DD50AA1526954281526954AA4DA6172 AD552A850424A88854A834A89540A450A9042274039543A71289D8EE791A94C194D28432AA1526554A8350B954D5341A1060 A5118956AA56AA8148A5528954BA75228D4AA1328954EB151614AA050251449414254A4A22A2A8A8865089540D9158892CAA 113B8E42A452A854A2601554A204528950A8541A9548D14194AADA079681C885416154BA4410852A854169503214161542A100445040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8140A20D0284 C5554A8954AA4D2A154A2552A9742A532A084A51C2A9508920B59D480252AD40AA5628964A8540A934884A2CC54A255080CC AA5620D5022442AD4CA2242AD5698550A854A25522914A85A0A91CAA112984622450292A2241A80D489520A114A255358742 051288508A512A154ED4002844A211220105514A61105634A0D2C0E152A004FF2AA95049B1E2E9148A45028405F32B588A78 4E02946A27E2954AA0488D5F0A80296030680D189825552A20B646513A4222A6529452A230B650626502A9902A5428900883 52A954A945281C0AA552A9D4C7551805208400891428148E8D400112214422611FCAA290D3985422002A104D8553E9F4624300c45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (954A9502A57C A05522144AA421094CA8410A954A02C9BD04AA5522950AE4C2E5C88A34208A8AA542A94C4252A8134AA60A0D14AC05269528 85530004A8351255CAA152A9948A552E9540A150A8D4AA4D12850AE6529932AA252AC14A8552A9042A5117D50B215200BEBA 0008950A25508040A94120104A8412015020000E8101815281108A152A804B916288548A552A0548A552A0548A552A954AA5 538954AA552ADD45A152A9542A550A954A2552A914AA542A9548211125542A4017D562A54208507E7C829005F15881140A11 289508174A99CC9A1122554A6442A05002512A85AC2779D0D0A040A152CA8172D954292F28C8C3B6899076854528954AA41200245040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7000062FD607 C408C1808F20309707301A008E624D0D8800100100E0A211B3186F7781E954C77E1F106214C0C19E00183C000C23A32580FF 4FBD49E013129592F703805506615275D46A2D265748E14A851C8C322A9CCEA5118820A8442204C22572A9362654BA820FC2 AA9590A6550A954AA1498842AE5C08944B65326054A6452A894AE55048221110A8944D9241A934AB4CAE544AA512A9D4AA71 0A9006A550858CD54AA6CDA3D340F5108A211551428552A144EA149A950A1542A93299411F9022A512815416412B90002550 29740A0DAA8548A2F821749A04048D4AA55209108A550E8B85515220BCC904860B46275261AA14441694AAA40A2154AA409400a45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (EFF7FBFDFE55 2A954AA552A954AAAA552A954AA552A954000000000000000000FF7FBFDFEFF7FBFDFE552A954AA552A954AAAA552A954AA5 52A9540000000000000000000864A65209C048000000000000000000000000000A880550AADC58C600001040005B097E247E B3DEE8F7DBFC26FD19979FC736A93C08112601022010380D08003017004107C0FD9A7F43235C4437000C18424D88008A10A3 F5FEF47E8419A0F08BC1200E240B0248B52A21FC6114878040301A30F6A806B281E211FA1190081D08814A01420110BC0108 C040016151708B502BD100050321C08864220E4C26133D600A3E03D64841082060A0780FC180B39A381C2001225402A5000800645040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000F001BC1E2F128948A65329148A2512894CA45028148A4502814 140A001000000000000F8383B1000E3461A28E0C26028416FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA8 00FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF7FBFDF00e45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108506014013 8004480289002F042B8808C0280C1004028154AA5502954AA552A8000000800B4D001C80000000006FDA5500000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000145040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800800006020 080120635840834281C88CC660CC6620640F0608201B0840C230154AA555402CAA552A92018364020DC6A30000DC0003C381 1803038CDA0254880986020000092A400154AACC618A1FC7C218605CA60480000CC660004022600F106662C859801430870A 2D561280AE554095080552A95586801C33118101800C0CCC60000CAC061A0002041C10042034A090080E0603000A903001E0 002E204AA552A815000C2215C827265A84A6000B8C588400A2046821389D048117980C3821581C4E064020D03C2128054305 370B08E0462C26082A32402184514284042150B01C844C6100400216001002552A95504843800000552A954081410220081000945040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A04E08006040 20000081080552A9C4204E0601000050A914684522010C01430904824120804A840228448A710A14428510A114A264290542 6200810426906801048042A05482550E21060010293480412005482C5610102834008149A4020900AA042AB3010050091588 4C28040A044061308041180080A012A114A80123844A8040291400C5618102E0909941A0080A010A05522154784C20104600 202804A8452A3C580040A010465008100AA440A81C02302090580040A0D00205009506A412A93040130A01098402088CA010 2015426546288C620202A348041200D484051A288E0002A9558420062580A881E155CA94083808055089902A81003542E80000545040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (548A0401A501 29948025302404B1130604C09012C24C080688904AF4008041268482410000008234220000241060606009098928213100AA 4104800C09812024C48210220128204B44489A481542A96328558C100384508400884822020001588402AB1510030003C000 85302444210938808041116802220500480884212110826809830034022010422A804020142A200000010018A3C04A807080 41130900322A98340103970AA0527954985529950AA4D28850A23112354AA5D0094528A9231111E0000801801C20954AA450 801082A10090010302385400442A9558E50039454C971C100AAA10090006500A94D4CEB2215036C52883022D10400CA0552A00d45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018C81820040 D000380805570800603018154820C40000100C01880180841800403304081808000140184C238C4400C44000102041800042 0150001088050C000080430000C26602100C040030AAC50F05C363001B0C600C2815420530683586300600C085520355BA1D 0A1DC0E552A928EE02101542AC40886002552A8546A0045910EC340400180A0010000823311D0180C0194008CF06140AA550 A82D862269A3080552A8D40860480619AC01814082CC06150AA150E01064C0201550070209101010111410A283524880851A 100AA00000000000081440A212A048B0D020154AA5544221800C00201042200000141A1120100202310C00202C22000522A900345040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A0957281802 B241548696328F406430C044A6344183458944B00082402A834381C29154021840854BA1108A1CC2002E39822DC0214D0044 06101A074298403845081C4A031429CC00C142900F098329642E65131541A20009D0AA1500B14005C00330A0421880C6A421 8B4020122801008050A1406202021040E11620601C12070481C12070481C12070601C1807200300E20000D000682A1100200 04134D26C04914A61A2D908420810420042215482100010022552881088550894048050603C0003100004000780C100001E0 C1600C06080002F7000046030783060B00000C46800400D840803B3180340820006010087418CC781000833002301803110000b45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (885603D4AA6D 3A955825D22331A6510E914EA512EB54AA5D2A05D8A712B854AAC72E97C7E712A11CEEF537BE58EF77BBC0480060100D2A61 483180640C988D40A0011862B351B98000C26131E6416180D98F00008000580386066542A9558248088001A000020C1E3111 000084012008022418214E04812371BA9D0000D82400804042120400006210A83108400200C08110000006C060800A0552A8 546630219542AF37020C1E2E60000060C6183018042A15462E14224C38540E02C2EEF161C058703111082102A9F42A0362B3 07084660C8661E1902CA855288CC04305838C100C2A814A019199C150CC1904C54B30009400582D8092C0C4204C1C840990800745040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (72391C8E4D86 C361B0271389C4E8D46A351AD86C361B072391C8E48D46A351A271389C4ED86C361B072391C8E48D46A351A271389C4E143F BD546021F8000000402A8540040001000040200544000B54A8541995C2A5C2A910AAF97B1FDF2C72ABF44EFE28B5DEADF708 1C52425A94054D42C354145456800AA2B6B9FDAC1F6F908EEF03B815E24F1ABFD88572EAD8D4D94A8952C5631294CAD13A04 4BA4C2F951B8D70B9F5A2D128B1DEE756A91C8A110A9143E4E46B448A530A134AE7468974A2452B95DAA8566954AED73E95C E27D3B935A2753ABDCFE5533B75A2436F3503AF74EBF5AADD489FCEE136B915B81D2E975BC5422968AAD925874EE5766974A00f45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000C01FA8544A25128944A25128944A25028144A25128944A25128944A20000000000000018C76885D FA512A9F5A8512795C88C964B2592633198CC69C4E27138361B0D86CC964B2592633198CC69C4E27138361B0D86CC964B259 2633198CC69C4E27138361B0D86CC964B2592633198CC69C4E27138361B0D86C72391C8E4D86C361B0271389C4E8D46A351A000c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030080C00018 00000000000000000000000000000000800B4D000280000000006F0CA9000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1000AC8608C0 E814081E406004005848031000000005512000000002000324020DC020020004000043810053038C0009C3DA85CE0027125C 64E0D00000C0001618070282D440794BB9840000000440D0001C1005D6B854001430870A2150628000004000408000000006 401CB00000018800000C000040AC40100000402400008042A05008000013108A801001C00000200000000001001C2200CA06 061845C4600B089984112164CA553A9D4A821712083201181C8E0C446094385528854229362B10E244288440083209018055 00040AA400A059804C4C004000540020260000000A4153B000000000000800051220008010100608101201422828080A0B60004c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C0820C061000 4120500870830082000084020100804004050844100104300408010200420840A000800864010240C603603600050000001C 00060206236002301A00028001CC06236000301B001180D00014003800331B0000AA01848C069400228062301A00188D8005 00020004004190000D800200C0C068360000C3180D80D800100020014000188C068006236001400080013C180D800040C603 0001400280005CA2301B00182D8000C06C0028000000E00070206301841180D0018C060002801C000600806836002301A000 28001C400019810100000022002815002980400140800A39008000A004080008A000445068008E006811092140000840800000cc5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4E04A1027944 E03822860017B9F1AA944B0803C4A051C42A962486428164A04460010A2214E284E01800212812080204F2898029040094E0 053B00887047804604D0E001A2403184480410C0542214092158A04003001003220380050411400C64223182050331088866 2910408194900432166211C0003188CCE6010013020114000188102A84D80386B89CC21203064A80722A18040D3300000000 7800180001800000C0000000301030000000015928A12211018014F87D800C02000001000001002460204883201800000000 0018004039450C801801000A06820406080014D0CC82215000094804022110091C00000020068000E02060C5000200000000002c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (603038000085 C0B9C0220D6B854B805239B4027710911861503804900E019C18A4C289D1A2050B9D468050E86CA841639D9A20528B1C2089 6E1D00AC62A07800C02698C263105B4C600C0880010030603186340610D080002301980C011DC2E0000100EE022400000C02 202020000000060050184062310681580A11A81000030A9D4184C29900000F2601000000015D8610610300800000C088042A 25598C03A040800C0E00400000E81062F10000180306084028042A0048834441F07E00108040004000000004000000000000 0004E0020000000000518C1C0020104541201014020120000210204C00002A1000E04000000044038014E700509C449E513100ac5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6D20C044BE35 0B83C50C0001408E04000F098080100088112884C32110894CA0000430088CC2210020400F00120300391C1A11081C088700 81D808902894062750E01C2865131540254208C0000008300220C2033002081801C6008180042A0008100020000004605002 81084116292D504B741697A5A5E9697A5A5E939504E140D89CA842005600570278C24B2C98164B4580D9242C16AB11A00300 4448400000060042601040000210000000000490402E97C1247500016034700C100481E8E0C00C06080AC4F5181426430702 4406002048EC00220090C0407265227904855341003030388E7014092A62687010DA00100D083500D480E240B04080060044006c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A21502950225 50085480500A914A2550A954A2442A800A21400940025002900AA51021500060041608A0F14420D83BB25C20D0A03C60B731 A10004806235C64541A5D9AE00408046C029150C600000010034220083221030081C750000038500400006083805160180AB B1DC6E008D900C0180318840000446420061F4A60306169B204000000C847105018000000066340300000E35034C1C4A6200 42E1C49870BA0D00000E0D020A0C90000E0102EEC3C1C020703001082102A8C40042603304815450C8EE5D149280000001DC 22705A39C220C00040000C1B9D4E8CF3984DBAF322000020C05801865C2A95C9A1021810200017080824B06001A2710E0C0000ec5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A003FCAA557F 80154557F80154557F80154557F80154FF2AAA800FF2AAA800FF2AAA800FF2AAA800285502940AA000000000000000000000 005000140000000002A000AA002A904A8052085428012001480550010000102A804A005201502244020540215001140A500A 0042805000100050229500250088142A5528004AA142A8542840081040211281408A540A0548A5520044A215089048211229 10A851228542255221548A5528854A2542211488410A8040A55209508A542A9548A542A944A85522144A2510A1140A552894 48A552A050A254209148A51288542241229502A550A95428442A9442A440A144880502950AA41289502A4408910080500140001c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D001A8D 40A05028140A05028140A05028140A05028140A05028140A00100000000000140AA010294000012A050A2052A9005F50029E A5F50029EA5F50029EA5F50029EAF505280BEF505280BEF505280BEF505280BE0A7A97D400A7A97D400A7A97D400A7A97D40 A02FBD414A02FBD414A02FBD414A02FBD4140055155FE0055155FE0055155FE0055155FEAA003FCAAAA003FCAAAA003FCAAA009c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A954AA55000 0000800B4D001280000000006FC0690000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000C0B452A95 4AA0024154AA5528944380002D9008050200002403284053078C040B66CA85F6037B329DEFE452A954C00014984737D23D64 FF57BB85E221102900FF140C8407F6F85C003C7F8DDE63F0102150AA152A140AA552A8468259389448059021442C0129C5EC 21020810E2603A51E9C3F071782010170460204001D02A5102950AA550A812DE2ABFDA6FF7FB5DE4BF3EBC9EE1C388707804 7BBF01E275FBF86C3779BF1FE3F7F9F99E441C001FAF37BBCDF81166910AAF36A9319EF36290008555F279E6CF3780C00336 18DD1AAA552A9A6DF6580000AA552A8542A040884420452A864280000006824D22834FC0032954C834A191022542A954AA4500dc5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800020402010 08040A0000A10200403001020040841080100051AA9060800021962B613C914205522918AA4708170BC110B15E085122918E A703C914B05E08858AF04288543255339E42245889D02C17AC85082470B15E20582F0442855089500A1188854F21108100EA 743C9100C658AD84F245281502A412A91C2C5788160BC110A15422543E994F205009962B412885482553FC72B05E22184F24 52E17822152A9148C553F87CCB4580058AF0432C5682512A990A87522160BC410B15E0851229182A45321148A552A8000F48 1F48620012A8142A1930140AA3E2895800500A950B0373E9FE8079309167F508A10428052A154E0782C0F80A022E18042320003c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408241280782 8780FC1882440200002420C160411F0A11E821E28154837933DC0A01E02984C3180A01E0A07B05C0F007AA074FF5F83DF6F2 078CD98CF198FC66BE1D03D98A0553281023670B80408410A084200230810001130804220108C0008400001082642B802817 9BFD7EA755229148345341FE305F2A9D4BA57A89D6DA37318F83F669FC7AC707A89540207800180001800000C0000000B000 30150A2453C178FB6733198752DAF5D00E512A954020000000007002C00B04180000A8552A9D0AA07BCDDCE81D2815488700 2C16A8553CDDCEC663F110031C201763B1400D44AA5502064841F229542C0000150AA550E910AE573084480400016423002800bc5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (CAC758AD46BF 78341D6F357AA1D08A55BE9F83E27ABDFE9163ABD7EBC7F8A850EF5FBE97CAC7E3A80C6B773D982C26722954CA1632C46320 1B0C600C5D2A940AB0F03986300620C1CAA51389982C540CD06AA550886600502A854E8170B914AA553A8743321A6562BF41 2B194530B09C00A31D2E5B8CE31B04002F3F2A554AA552FDBEB062A3144AA550C8C6C22603598ED3E005802C2F2A954AA1E0 30E6F7052A854B261BF0A81718AA19C0C003D12A6A11AA154A01522000A215299348A1400140CA502A954AA143F1962C0020 104D01F80014020120000212617C00006C2F814A7552A9140E118A81EF21023D403C05331E0E0500F014C3780C060287FAF1007c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0553F9FC325 52A9DC1C618CC7E3319A0CC63F07A3570C802BE180447F9CDA6F03F8DD3E1E181C0B4F9621FC10F061BE9E6FC7FBFC78EF17 3FDC6F305AE954AA4532976AE5133950A21D08C74A21D0A07EA25DBA1062A542A0643007A8854336617DAA5F6A9FDFE7D3F9 FDFE7D7F975AA5D6AACCFEBF130F85C84643FDFA2B3180974B27DAD914AE762F95A820530D5C0C452A954A84428444AA550A 914AA552A1102A7E1FD2A21192840442753E99CC35FAD8C48C5F3CDE85F2A8843E33660010462563F81848638C0028002004 18F033BCCBE12102B83CFE61A207C0076BF978DA09B00FECF2BBF4A0CA57A8144AA7128080385D2A954FE652BCD8AA5FAC9F00fc5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (26B8DDF4080D 3F800F01E10180A4252A49462532C15800601007A1D7D9353E7A5B10C8C0B12214727B4DA0480005E23D86030197D88C01D2 81C6EB6500006AA552A804BD770C180C3062C01C00080105C081C0440A1818949608C18BB1DCEE018DC045128890AC600288 82AA2571FD3281773FCFE260000018045029954AA552A866B0502A854CB0326DD8E17F200468E058B0588E542A9F4FB778AC 44A81E2207ECC113C060F860A319E3B7FACD54A8753B1DCAF000D066B30004154AA570DC60301831D384C5532950AA7F805F CCF7BA4DFEF33082804A251830543E72A7C1E2F5DA8914320728C86E3542A992FF7F9CC96B8190CC1E737DA3C00E854389D400025040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000030551A942AA2B1552AAA150000000001542AAA1500000000009408850817 CB27C32A05C0A0532A9524A002A5F4AB310294C9A5B22940225A02050820D20512285C0D0042A49AA97E2A13120128202091 D6F834A151ECE063D9FED86088D980261000C0A264084FC886C20044221B08D249301A391A084C811C8114811C088804B49D 2525C12C8A704085CC240272C86E054200D18B805030C0862021844E7760994CB22700864050633076AA1C0C9609B618D800 0207224001109B01D600058B04422060E1D4CC06298583621080684A061AD16CA01010008207939FA537F88430E24A0FC08600825040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000030018080000000000000000000000000000 00000000000000000000000000000000000C0181100C64222CA00000224A880EC9318D938364E324C69C1B18D926364A706C C9318D938364E324C69C1B18D926364A706CC9318D938364E324C69C1B18D926364A706CC9318D938364E324C69C1B18D926 364A706C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006F3C 3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (900300002D90 08250200002003084053058C0002851009D6025428514A80000000C0001498471550A824A6152210A000001400A5152C8406 A4D058002845089442A150280000042A0000000000464018B09040059801842C000284ACC1120060824020854284A2904802 00171320000001D0000100000000008024AC5500D4080618B982807580580717B984F2595D2E5501E200045C0E182CD60C80 23283899348544423653116477513B5EE035F20180A60798154BF34AA4008C70008000660030060000001442A4C000000000 00050800408844064420960020020004025020840A80032954C8552291002000000000000000000000000000800B4D000A8000225040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (403841021040 841080108201000968A050A1160A7028804280020010004608974A8000B854800120010C06C28804B8540005C2A400080022 00331440005081802C052800002260B05480592A0002A0008000001180000A20008900C06A288000A45829C0A2012A000000 1000982C1520164A8000A80020003C18AA2010A1160A500080002002AD54B81410182A2012D15000148010008002B0548B01 0A0582A4022C14A00100110006022170A8000B854800120010004022000000000044A9282A89410008000002103000400550 A490825500000A0552A954807120914AA4100114205028054C0693F0E825132BC84633A0A00C06040000000002800000000800a25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02A52088E049 152A154AA540080002542A944A0552A904AA140A9540A5528550A01500840AA150A944A005089108A110A844AA1502990000 0300541B5483500A24526894AA5232840A85528910AA51209102A5420854AA722644442512A9542A00221000250289542A55 2A980BA5528954A245229502A452A8548A05000000047AA918AA51AA1548E510A144B2043A800000428150AA4522178AA550 A9802C0080000204108010884C0091033258A9002000001800805A8954801C00000484C00906080028D54E8442A110021420 1542A1402C0000000A072A657005348A000004000000C08C0E072800060400816423112880082040201008040A0000A1022000625040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A11AC1502E4 52A954A245AA954A8550A850AA552E954A8543A814AA772A904C24502800E04F29C343141B8C600C15000000316031C63806 20C140000321DC0E002EC16000026576025000100C00402000000010060195FB88747A47A999451128640053579D8BE4E69A 84002F570280000001ADAE60729300200000E0B481340A5FCE57A285002C5700800001602164EA040015432412A1502A5500 11028552A854801108000A81522110690302140004008000C20000000004A2A98C8E552A954A8552B954B20522814A92215C 0000522A80C0A0000000084D80954A0052A944AA5522940AA502A954A2502A8502A552F954A95528154AA552A854AA250A8500e25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (21121D442A0D 2695088052A100885528944B0550A9542A102C154AA44AA810A0412A964A8552A850AA152A944A0010C0000000381440C503 B0002A5800C602A1800054021028014200000070A2050A004226428854AA552A054AA552A054AA552A954AA5528954AA150A 8D489642A9542A5100954A2558A914AA742A9140201209340800000400844008500004000000000001140056AB8544211288 2496752E914925D2B9448C57289402E5781C5663468152CA256288B280650848C0406958A2B15528954220023058AE6B220D 455552B950AA11201548A552A940CA55280040074168C0BA5D00050AC452A950AA55A895CA8558A944BB52285D4A2550015000125040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (47BC89E0A491 21680060300D66A5526D50AA55349B40A1422876B753969089416139D6AA55AADD4EA55A8944C650AAC5600000015029442A 15482541881AAA108213CA4120881424592A0E02815371BA9D512A910A25102150810508854A0061A94402472A9540800281 9404302A814000000166B80000000CB1316CD8926D228366E158A0508A0000160E64D20D04021621056CC512C840B8510211 422550C900A860378B25A452D9766A150680000022DC3C301C31CAC8C0010010085D959548A5D2AD54A24118004000182804 AC4D1AD5C9A3380440284718884931400102AA552C916A811089567A538380080412895400002B150220100190284108854200925040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000003864A25209C040000000000000000000000000000A080550A9BC187C0083C703C7121074E07AAFDE6CF143F5 BEFD51895EE3F6E13C80100A01000C149B00802406030060B6A3FDA23F0081000A10004918347A90186B01EB51FE506180DF 80160000007102020024E4C210421C133094280102081407410007E027E020508E40000600160010660850330400A0100860 00368AC40880208040EF0123C4623100BD1AC321280468C1188010520520910A810229003111228100000320708424088586 C4002C4438010D860086088DF8570E2A0880A00900022313B357873778A53812460ED1E13100FDF2026C3B800E21832902F400525040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000180800000000000000000000000000000000000000000000000000000000 0000000C09E1188C642024380408062BA88A78438B5A4D216A1CF0873C3485A2D691E10E873C3485A2D691E10E78438B5A4D 216A1CF02D691E10E873C3485AD216A1CF078438B5A4D216A1CF078438B5A42D691E10E873C3485A00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000325040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D001A80000000006F1DFF0000000000000000b25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000725040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aa5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800B4D000680000000006FC289000000000000000000000000000000000000000000006a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000800B4D001680000000006FFE6C000000000000000000000000000000000000000000000000000000000000000000000000fa5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000865040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000465040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000265040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000665040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000800B4D000E80000000006FD8 300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000165040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000965040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000565040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000365040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000765040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000800B4D001E80000000006FED4200000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000800B4D000180000000006FCB1E000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000be5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000815040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000415040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D00 1180000000006F01540000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000215040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000615040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000115040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000915040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000515040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D000980000000006F27080000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000315040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000715040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000895040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000495040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000295040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000800B4D001980000000006F127A00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000695040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000195040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000995040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000595040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000395040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D000580000000006F3426000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000795040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000855040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000455040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000255040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000655040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D00158000000000 6F08C30000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000155040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000955040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000555040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000355040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000755040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000800B4D000D80000000006F2E9F0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000800B4D001D80000000006F1BED00000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dd5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bd5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000835040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 1624 TDI (FFFFFFFF0000007A3DB1000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000435040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK; SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-03 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (79); SDR 24 TDI (000000); RUNTEST IDLE 2 TCK 1.00E-01 SEC; //END ================================================ FILE: demo/litex_with_dram.svf ================================================ HDR 0; HIR 0; TDR 0; TIR 0; ENDDR DRPAUSE; ENDIR IRPAUSE; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (0E); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); SIR 8 TDI (46); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (7A); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFAF2600000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000051B88941000000620000080200000044C20888820000004700 0000DCFFFFFFFFCDBDFFFFFF008C1CCC82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF4A91000000000000000000000000000000180000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FFC4950000000000000000000000000400000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF8C960000000000000000000000000000001000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFD35900000000000000000000000000000000 00000010000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFC4950000000000000000000000000400000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF8C960000000000000000000000000000001000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF2179000000000000000000000000000000000000080000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF835F000000000000000000000000000000000000100000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF20E400000000000000000000000020000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF20E400000000000000000000000020000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B); SDR 8000 TDI (00000000000000000000000000020000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF211A0000000000000000000000000000 00020000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF211A0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF80ED000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF80ED000000000000000000000000000000000000000000000000000000000000000000000000 0400000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8DC2000000000000000000000000000000000000000000000000000000000000 00000000000000000002000000000000000000000000000000000000000000000000000000000000 00000000FF8DC2000000000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000004000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA6DA00000000000000000000 00000000000000000000000000000000000000000000000000000004000000000000000000000000 000000000000000000000000000000000000000000000000FFA6DA00000000000000000000000000 00000000000000000000000000000000000000000000000004000000000000000000000000000000 000000000000000000000000000000000000000000FFA6DA00000000000000000000000000000000 00000000000000000000000000000000000000000004000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFA6DA00000000000000000000000000000000000000000000 00000000000000000000000000000004000000000000000000000000000000000000000000000000 000000000000000000000000FFA6DA00000000000000000000000000000000000000000000000000 00000000000000000000000004000000000000000000000000000000000000000000000000000000 000000000000000000FFA6DA00000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8074000000000000000000000000000000000000000000000000000000000000000000 00000008000000000000000000000000000000000000000000000000000000000000000000000000 00FF8146000000000000000000000000000000000000000000000000000000000000000000000000 1000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF80740000 00000000000000000000000000000000000000000000000000000000000000000000080000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBB1A000000000000 00000000000000000000000000000000000000000000000000000000000200000000000000000000 00000000000000000000000000000000000000000000000000000000FF8146000000000000000000 00000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000000000000000000000000000000000000000000000FF3647000000000000000000000000 00000000000000000000000000000000000000000000000410000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF8074000000000000000000000000000000000000 00000000000000000000000000000000000008000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFA6DA0000000000000000000000000000000000000000000000000000000000000000000000 000004000000000000000000000000000000000000000000000000000000000000000000000000FF B58D0000000000000000000000000000000000000000000000000000000000000000000000000406 000000000000000000000000000000000000000000000000000000000000000000000000FF663500 00000000000000000000000000000000000000000000000000000000000000000000000804000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF073C00000000000000 00000000000000000000000000000000000000000000000000000000001204000000000000000000 000000000000000000000000000000000000000000000000000000FF060E00000000000000000000 00000000000000000000000000000000000000000000000000000A04000000000000000000000000 000000000000000000000000000000000000000000000000FFC6E100000000000000000000000000 00000000000000000000000000000000000000000000000204000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFE04F00000000000000000000000000000000000000000000000000 00000000000000000000000A00000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF93BA000000000000000000000000000000000000000000000000000000000000000000000000 0002000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA6DA0000000000000000 00000000000000000000000000000000000000000000000000000000000400000000000000000000 0000000000000000000000000000000000000000000000000000FF66AC0000000000000000000000 00000000000000000000000000000000000000000000000000040400000000000000000000000000 0000000000000000000000000000000000000000000000FFA6DA0000000000000000000000000000 00000000000000000000000000000000000000000000000400000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFC6E10000000000000000000000000000000000000000 00000000000000000000000000000000020400000000000000000000000000000000000000000000 0000000000000000000000000000FF66AC0000000000000000000000000000000000000000000000 00000000000000000000000000040400000000000000000000000000000000000000000000000000 0000000000000000000000FF75FB0000000000000000000000000000000000000000000000000000 00000000000000000000000600000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF20A000000000000000000000000000000000000000000000000000000000000000000000000002 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF80ED000000000000000000000000 00000000000000000000000000000000000000000000000004000000000000000000000000000000 00000000000000000000000000000000000000000000FF80ED000000000000000000000000000000 00000000000000000000000000000000000000000004000000000000000000000000000000000000 00000000000000000000000000000000000000FF20A0000000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000200000000000000000000000000000000000000000000000000000000000000000000000000FF 20A00000000000000000000000000000000000000000000000000000000000000000000000000200 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFF23B00000000000000000000 00000000000200000000000000000000000000000000000000000002000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF211A00000000000000000000000000000002 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF93BA00000000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF93BA00000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FF11 DB000000000000000000000000000000000000000000000000000000000000000000000004000400 0000000000000000000000000000000000000000000000000000000000000000000000FF75FB0000 00000000000000000000000000000000000000000000000000000000000000000000000600000000 0000000000000000000000000000000000000000000000000000000000000000FFC6E10000000000 00000000000000000000000000000000000000000000000000000000000000020400000000000000 0000000000000000000000000000000000000000000000000000000000FF5D5B0000000000000000 00000000000000000000000000000000000000000000000000000002000400000000000000000000 0000000000000000000000000000000000000000000000000000FFA6DA0000000000000000000000 00000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000000000000000000000000000000000000000000FF20A00000000000000000000000000000 00000000000000000000000000000000000000000000020000000000000000000000000000000000 0000000000000000000000000000000000000000FFA6DA0000000000000000000000000000000000 00000000000000000000000000000000000000000400000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF20A00000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (02000000000000000000000000000000000000000000000000000000000000000000000000FF4711 00000000000000000000000000000000180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF4711000000 00000000000000000000000000180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF4711000000000000 00000000000000000000180000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFE474000000000000000000 00000000000000180000000000000000000000000000080800000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFA150000000000000000000000000 00000000180000000000000000000000000000000000000000040000000000000000000000000000 00000000000000000000000000000000000000000000FF124A000000000000000000000000000000 00180000000002000200000000000000000000000000040000000000000000000000000000000000 00000000000000000000000000000000000000FF840E000000000000000000000000000000001800 00000004000400000000000000100800000000040000000000000000000000000000000000000000 00000000000000000000000000000000FF7271000000000000000000000000000000001800000000 00000000000000000000000000000000060000000000000000000000000000000000000000000000 00000000000000000000000000FFA150000000000000000000000000000000001800000000000000 00000000000000000000000000040000000000000000000000000000000000000000000000000000 00000000000000000000FFA150000000000000000000000000000000001800000000000000000000 00000000000000000000040000000000000000000000000000000000000000000000000000000000 00000000000000FF7271000000000000000000000000000000001800000000000000000000000000 00000000000000060000000000000000000000000000000000000000000000000000000000000000 00000000FF4711000000000000000000000000000000001800000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FFD08700 00000000000000000000000000000000000000000000000000000000000000000000000100000000 000000000000000000000000000000000000000000000000000000000000000000FF42F300000000 00000000000000000000000008000000000000000000000000000000000000000800000000000000 000000000000000000000000000000000000000000000000000000000000FFDE5600000000000000 00000000000000000010000000000000000000000000000000000000000882000000000000000000 000000000000000000000000000000000000000000000000000000FF471100000000000000000000 00000000000018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFB3F000000000000000000000000000 00004008000000000000000000000000000000000000001000000000000000000000000000000000 000000000000000000000000000000000000000000FF807400000000000000000000000000000000 00000000000000000000000000000000000000000800000000000000000000000000000000000000 000000000000000000000000000000000000FF821C00000000000000000000000000000000080000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF089500000000000000000000000000000000000000000000 00000000000000000000000000000080000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF471100000000000000000000000000000000180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF5FE700000000000000000000000000000020180000000000000000000000000000 00000000000800000000000000000000000000000000000000000000000000000000000000000000 000000FFD70D00000000000000000000000000000000180000000000000000000000000000000000 00000100000000000000000000000000000000000000000000000000000000000000000000000000 FF943000000000000000000000000000000000180000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF8E7A0000000000 00000000000000000000000000000000000000000000000000000000000000800000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFB0AA0000000000000000000000 00000000400000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF70450000000000000000000000000000 00400000000000000000000000000000000000000000080000000000000000000000000000000000 0000000000000000000000000000000000000000FF8E7A0000000000000000000000000000000000 00000000000000000000000000000000000000800000000000000000000000000000000000000000 0000000000000000000000000000000000FF53550000000000000000000000000000000000000000 00000000000000000000000000000000080200000000000000000000000000000000000000000000 0000000000000000000000000000FF20A00000000000000000000000000000000000000000000000 00000000000000000000000000020000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF80ED0000000000000000000000000000000000000000000000000000000000000000 00000000040000000000000000000000000000000000000000000000000000000000000000000000 0000FF80740000000000000000000000000000000000000000000000000000000000000000000000 000800000000000000000000000000000000000000000000000000000000000000000000000000FF 81460000000000000000000000000000000000000000000000000000000000000000000000001000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000FFA643000000 0000000000000000000000000000000000000000000000000000000000000000000C040000000000 00000000000000000000000000000000000000000000000000000000000000FFA6DA000000000000 00000000000000000000000000000000000000000000000000000000000000040000000000000000 00000000000000000000000000000000000000000000000000000000FFE2F9000000000000000000 0000000000000AA00000000000000000000000000000000000000010040000000000000000000000 00000000000000000000000000000000000000000000000000FF8074000000000000000000000000 00000000000000000000000000000000000000000000000008000000000000000000000000000000 00000000000000000000000000000000000000000000FFED25000000000000000000000000000000 15400000000000000000000000000000000000000000040000000000000000000000000000000000 00000000000000000000000000000000000000FFC5650000000000000000000000000000000AA000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF80ED000000000000000000000000000000000000000000 00000000000000000000000000000004000000000000000000000000000000000000000000000000 00000000000000000000000000FF16440000000000000000000000000000000AA000000000000000 00000000000000000000000000020000000000000000000000000000000000000000000000000000 00000000000000000000FF8074000000000000000000000000000000000000000000000000000000 00000000000000000008000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF81 46000000000000000000000000000000000000000000000000000000000000000000000000100000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000FFB0AA00000000 00000000000000000000004000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF432300000000000000 00000000000000000000000000000000000000000000000000000018000000000000000000000000 000000000000000000000000000000000000000000000000000000FF1EDE00000000000000000000 00000000000000000000000000000000000000000000000000200004000000000000000000000000 000000000000000000000000000000000000000000000000FF93BA00000000000000000000000000 00000000000000000000000000000000000000000000000002000000000000000000000000000000 000000000000000000000000000000000000000000FF66AC00000000000000000000000000000000 00000000000000000000000000000000000000000404000000000000000000000000000000000000 000000000000000000000000000000000000FFA6DA00000000000000000000000000000000000000 00000000000000000000000000000000000004000000000000000000000000000000000000000000 000000000000000000000000000000FF36C600000000000000000000000000000000000000000000 00000000000000000000000000000104000000000000000000000000000000000000000000000000 000000000000000000000000FFC6E100000000000000000000000000000000000000000000000000 00000000000000000000000204000000000000000000000000000000000000000000000000000000 000000000000000000FFA6DA00000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000000000000000000000000000000000 000000000000FF93BA00000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFEED400000000000000000000000000000000000000000000000000000000000000000000000000 84000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA 00000000000000000000000000000000000000000000000000000000000000000000000000040000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF20A00000000000000000 00000000000000000000000000000000000000000000000000000000020000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFD0870000000000000000000000000000000000 00000000000000000000000000000000000000010000000000000000000000000000000000000000 0000000000000000000000000000000000FF08950000000000000000000000000000000000000000 00000000000000000000000000000000008000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF208600 00000000000000000000000000002000000000000000000000000000000000000000200000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF68AE000000000000000000000000 00000000000000000000000000000000000000000000000002800000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF68AE000000000000000000000000000000000000 00000000000000000000000000000000000002800000000000000000000000000000000000000000 00000000000000000000000000000000FFC0DA000000000000000000000000004000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFC0DA000000000000000000000000004000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF93BA000000000000000000000000000000000000000000000000000000000000 00000000000000020000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF20A0000000000000000000000000000000000000000000000000000000000000000000000000 0200000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FFE5E700000000000000 00000000000000000000000000000000000000000000000000000000000106000000000000000000 000000000000000000000000000000000000000000000000000000FFC8E300000000000000000000 00000000000000000000000000000000000000000000000000000480000000000000000000000000 000000000000000000000000000000000000000000000000FF75FB00000000000000000000000000 00000000000000000000000000000000000000000000000006000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF75FB00000000000000000000000000000000000000 00000000000000000000000000000000000006000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF81F200000000000000000000000000000000000000000000000000000000000000 00000008000000000000000000000000000000000000000000000000000000000000000000000000 000000FF20A000000000000000000000000000000000000000000000000000000000000000000000 00000200000000000000000000000000000000000000000000000000000000000000000000000000 FF93BA00000000000000000000000000000000000000000000000000000000000000000000000000 02000000000000000000000000000000000000000000000000000000000000000000000000FF81F2 00000000000000000000000000000000000000000000000000000000000000000000080000000000 00000000000000000000000000000000000000000000000000000000000000000000FF80ED000000 00000000000000000000000000000000000000000000000000000000000000000004000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA6DA0000000000000000000000000000 00000000000000000000000000000000000000000000000400000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8A6F0000000000000000000000000000000000000000 00000000001000000000000000000000000600000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFA6DA0000000000000000000000000000000000000000000000000000 00000000000000000000000400000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF66BB0080000000000000000000000000000000000000000000000000000000000000 00000000000400000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFA6CD00 80000000000000000000000000000000000000000000000000000000000000000000000404000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000800000000000000000000000000000000000000FF8074000000000000000000 00000000000000000000000000000000000000000000000000000008000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8146000000000000000000000000000000 00000000000000000000000000000000000000000010000000000000000000000000000000000000 00000000000000000000000000000000000000FF8074000000000000000000000000000000000000 00000000000000000000000000000000000008000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF93BA000000000000000000000000000000000000000000000000 00000000000000000000000000020000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8074000000000000000000000000000000000000000000000000000000000000000000 00000008000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFBF0F0000 00000000000000000000000000000000000000000000001000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF5D2000000000000000000000000000000000 00000000000000000000000000000000000000000800000000000000000000000000000000000800 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000 00000000000000000000000000000800000000000000000000000000000000000800000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF5D2000000000000000000000000000000000000000000000000000000000000000000000000008 00000000000000000000000000000000000800000000000000000000000000000000000000FF7BED 00000000000000000000000000000000000000000000000000000000000000000000000010000000 00000000000000000000000000001000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF5D20000000000000 00000000000000000000000000000000000000000000000000000000000008000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FFE2420000000000000000000000 00000000000000000000000000000000000000000000000000100400000000000000000000000000 0000001004000000000000000000000000000000000000FF80740000000000000000000000000000 00000000000000000000000000000000000000000000080000000000000000000000000000000000 0000000000000000000000000000000000000000FFD9340000000000000000000000000000000000 00000000000000000000000000000000000000000400000000000000000000000000000000000400 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF5D200000000000000000000000000000000000000000000000000000000000 00000000000000080000000000000000000000000000000000080000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF80740000000000000000000000000000000000000000000000000000000000000000000000 000800000000000000000000000000000000000000000000000000000000000000000000000000FF 81460000000000000000000000000000000000000000000000000000000000000000000000001000 000000000000000000000000000000000000000000000000000000000000000000000000FF7BED00 00000000000000000000000000000000000000000000000000000000000000000000001000000000 000000000000000000000000001000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FFD934000000000000000000000000 00000000000000000000000000000000000000000000000000040000000000000000000000000000 00000004000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFD934000000000000000000000000000000000000 00000000000000000000000000000000000000040000000000000000000000000000000000040000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFD934000000000000000000000000000000000000000000000000 00000000000000000000000000040000000000000000000000000000000000040000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFD934000000000000000000000000000000000000000000000000000000000000 00000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFD9 34000000000000000000000000000000000000000000000000000000000000000000000000000400 0000000000000000000000000000000004000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF19DB0000000000 00000000000000000000000000000000000000000000000000000000000000080400000000000000 0000000000000000000004000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFDA9A000000000000 00000000000000000000000000000000000000000000000000000002000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFDA9A000000000000000000 00000000000000000000000000000000000000000000000002000000000000000000000000000000); SDR 8000 TDI (0000000800000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF9DCF0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000080000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF41A90000000000000000000000000000000000000000000000000000 00000000000000000000180000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFAC4D0000000000000000000000000000000000000000000000000000000000000000 00000000000200000000000000000000000000000000000200000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D00 00000000000000000000000000000000000000000000000000000000000000000000000002000000 000000000000000000000000000002000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000004000000000000000000000000000000000000FF0126000000000000000000000000000000 00000000000000000000000000000000000000000001840000000000000000000000000000000000 04000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF913A000000000000000000000000000000000000000000 00000000000000000000000000000000840000000000000000000000000000000000040000000000 00000000000000000000000000FFC8E3000000000000000000000000000000000000000000000000 00000000000000000000000004800000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF20A0000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000000000000000000000000000000000000 00000000FF73BE000000000000000000000000000000040000000000000000000000000000000000 00000003000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF24350000 00000000000000000000000000000000000000000000000000000000000000000000048200000000 0000000000000000000000000002000000000000000000000000000000000000FF211A0000000000 00000000000000000000020000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF9DCF0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000FF35E200000000000000000000000000000000 00000000000000000000000000000000000000000006000000000000000000000000000000000006 000000000000000000000000000000000000FFEA7900000000000000000000000000000000000000 00000000080000000200000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFB30500000000000000000000000000000000000000000000 00100000000500000000100000000506000000100000000110000000000000000006000000000000 000000000000000000000000FFD93400000000000000000000000000000000000000000000000000 00000000000000000000000004000000000000000000000000000000000004000000000000000000 000000000000000000FFD93400000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000000004000000000000000000000000 000000000000FFD93400000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FFD93400000000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000004000000000000000000000000000000000000 FF9B1800000000000000000000000000000000000000000000000000000000000000000000000000 02000000000000000000000000000000000202000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFD934000000 00000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000004000000000000000000000000000000000000FFEE7F000000600000 00000000000000000000000000000000000000000000000000000000000000040000000000000000 00000000000000000204000000000000000000000000000000000000FFB90F000000000000000000 00000000000000000000000000000000000000000000000000000002040000000000000000000000 00000000000004000000000000000000000000000000000000FFB90F000000000000000000000000 00000000000000000000000000000000000000000000000002040000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000FF7BED0000000000000000000000000000000000 00000000000000000000000000000000000000100000000000000000000000000000000000100000 0000000000000000000000000000000000FF5D200000000000000000000000000000000000000000 00000000000000000000000000000000080000000000000000000000000000000000080000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFCDEC0000000000000000000000000000000000000000000000000000 00000000000000000000002000000000000000000000000000000000002000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF62550000000000000000000000000000000000000000000000000000000000000000000000 000800000000000000000000000000000000000820000000000000000000000000000000000000FF 649C0000000000000000000000000000000000000000000000000000000000000000000000000040 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFC09800000000 00000000000000000000000000000000000000000000000100000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFE90B00000000000000000000000000 00000000000000000000000000000000000000080000000280000000080000000088000000000000); SDR 8000 TDI (00000000000000000000000000000000000000FF7BED000000000000000000000000000000000000 00000000000000000000000000000000000010000000000000000000000000000000000010000000 00000000000000000000000000000000FF9FBA000000000000000000000000000000000000000000 00000000000000000000002000002000000000000000000000000000000000000100000000000000 00000000000000000000000000FF1F2A000000000000000000000000000000000000000000000000 0000000000000000000000000C02000000000000000000000000000000000C020000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF7F6C000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 00000000FF6B2C000000000000000000000000000000000000000000000000000000000000000000 00000001000000000000000000000000000000000001000000000000000000000000000000000000 00FF17F5000000000000000000000000000000000000000000000000000000000000000000000000 0200000000000000000000000000000000000200000000000000000000000000000000000000FF5D 20000000000000000000000000000000000000000000000000000000000000000000000000080000 0000000000000000000000000000000800000000000000000000000000000000000000FF7BED0000 00000000000000000000000000000000000000000000000000000000000000000000100000000000 0000000000000000000000001000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFB1F60000000000000000 00000000000000000000000000000000000000000000000000000000080200000000000000000000 0000000000000802000000000000000000000000000000000000FF76970000000000000000000000 00000000000000000000000000000000000000000000000000090000000000000000000000000000 0000000900000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FFD93400000000000000000000000000000000000000 00000000000000000000000000000000000004000000000000000000000000000000000004000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF17F500000000000000000000000000000000000000000000000000 00000000000000000000000200000000000000000000000000000000000200000000000000000000 000000000000000000FFBD4F00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000000FFCD3C00000000000000000000000000000000000000000000000000000000000000 00000000000900000000000000000000000000000000000800000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFAC4D00000000000000000000000000000000000000000000000000000000000000000000000000 02000000000000000000000000000000000002000000000000000000000000000000000000FF7B3D 00000000000000000000000000000000000000000000000000000000000000000000000000021006 00000000000000000000000000000002000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFCEC8000000000000000000 00000000000000000000000000000000000000000000004000000000000000000000000000000000 00000000008000000000000000000000000000000000000000FF8003000000000000000000000000 00000000000000000000000000000000000000000000000000001000000000000000000000000000 00000000000000000000000000000000000000000000FFC3E9000000000000000000000000000000 00000000000000000000000000000000000000002010000000000000000000000000000000000010); SDR 8000 TDI (0000000000000000000000000000000000FFD9340000000000000000000000000000000000000000 00000000000000000000000000000000000400000000000000000000000000000000000400000000 0000000000000000000000000000FFD9340000000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FF35E20000000000000000000000000000000000000000000000000000 00000000000000000000000600000000000000000000000000000000000600000000000000000000 0000000000000000FFD9340000000000000000000000000000000000000000000000000000000000 00000000000000000400000000000000000000000000000000000400000000000000000000000000 0000000000FFD9340000000000000000000000000000000000000000000000000000000000000000 00000000000400000000000000000000000000000000000400000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD93400 00000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000000004000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFC48F00000000000000 00000000000000000000000000000000000000000000000000000000000804000000000000000000 000000000000000804000000000000000000000000000000000000FF17F500000000000000000000 00000000000000000000000000000000000000000000000000000200000000000000000000000000 000000000200000000000000000000000000000000000000FF0E9400000000000000000000000000 00000000000000000000000000000000000000000000001006000000000000000000000000000000 001006000000000000000000000000000000000000FF769700000000000000000000000000000000 00000000000000000000000000000000000000000900000000000000000000000000000000000900); SDR 8000 TDI (00000000000000000000000000000000FF6B2C000000000000000000000000000000000000000000 00000000000000000000000000000001000000000000000000000000000000000001000000000000 00000000000000000000000000FF1997000000000000000000000000000000000000000000000000 00000000000000000000000000820000000000000000000000000000000000820000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF1D 45000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000100000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFD1F90000000000 00000000000000000000000000000000000000000000000000000000000020000000000000000000 0000000000000000400000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF69FD0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000400000000000000000000000000000000000000000FF4FDF0000000000000000000000000000 00000000000000000000000000000000000000000020000400000000000000000000000008000000 0004000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFC79100000000000000000000000000000000000000000000000000 00000000000000000000440000000000000000000000000000000000000000000000000000000000 000000000000000000FF863600000000000000000000000000000000000000000000000000000000 00000000000000000000000100000000000000000000000000000000000000000000000000000000 000000000000FF04C600000000000000000000000000000000000000000000000000000000000000 00000000440000000080000000000000000000000000000000000000000000000000000000000000 000000FFAC4D00000000000000000000000000000000000000000000000000000000000000000000 00000002000000000000000000000000000000000002000000000000000000000000000000000000 FFFCCC00000000000000000000000000000000000000000000000000000000000000000000000000 50000000000000000000000000000000000050000000000000000000000000000000000000FF2E31 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF80A1800000000000 00000000000000000000000000000000000000000000000000000000000002000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFB7B8000000000000000000000000000000000000 00000000000000000000000000000000000004000000000000000000000000000000000002000000); SDR 8000 TDI (0000000000000000000000000000FF17D50000000000000000000000000000000000000000000000 00000000000000000000000000800400000000000000000000000000000000000400000000000000 0000000000000000000000FF8E7A0000000000000000000000000000000000000000000000000000 00000000000000000000800000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 77CE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000200000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF2E3100000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000400000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF807400000000000000000000000000 00000000000000000000000000000000000000000000000800000000000000000000000000000000 000000000000000000000000000000000000000000FFBEB100000000000000000000000000000000 00000000000000000000000000000000000000000028000000000000000000000000000000000028 000000000000000000000000000000000000FF6CA200000000000000000000000000000000000000 00000000000000000000000000000000000802000000000000000000000000000000000002000000); SDR 8000 TDI (00000000000000000000000000FF5DEA000000000000000000000000000000000000000000050004 000000001000051008000000000C0005081000000000200004001000000000040000000000000000 00000000000000000000FFD934000000000000000000000000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000000040000000000000000000000 00000000000000FFD934000000000000000000000000000000000000000000000000000000000000 00000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FF0460000000000000000000000000000000000000000000000000000000000000000000 00000000040000000000000000000000000000000008040000000000000000000000000000000000 00FF35E2000000000000000000000000000000000000000000000000000000000000000000000000 0006000000000000000000000000000000000006000000000000000000000000000000000000FF9D CF000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000800000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFD9340000000000 00000000000000000000000000000000000000000000000000000000000000000400000000000000 0000000000000000000004000000000000000000000000000000000000FFD9340000000000000000 00000000000000000000000000000000000000000000000000000000000400000000000000000000 0000000000000004000000000000000000000000000000000000FF43030000000000000000000000 00000000000000000000000000000000000000000000000000020400020000000000000000000000 0000000204000000000000000000000000000000000000FF3FDA0000000000000000000000000000 00000000000000000000000000000000000000000000010400020000000000000000000000000000 0104000000000000000000000000000000000000FFDEEC0000000000000000000000000000000000 0000000000000000000000000000000000000000A400000000000000000000000000000000008400 0000000000000000000000000000000000FFA5F70000000000000000000000000000000000000000 00000000000000000000000000000000022000000000000000000000000000000000020000000000); SDR 8000 TDI (000000000000000000000000FFF54C00000000000000000000000000000000000000000000000000 00000000000000000000000012000000000000000000000000000000000002000000000000000000 000000000000000000FFD34E00000000000000000000000000000000000000000000000000000000 000000000000000000C0000000000000000000000000000000000008000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF152E00000000000000000000000000000000000000000000000000000000000000000000000008 80000000000000000000000000000000000800000000000000000000000000000000000000FF2C83 00000000000000000000000000000000000000000000000000000000000000000000000000020000 00000000000000000000000000000032000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF66AC000000000000 00000000000000000000000000000004000400000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFE7C2000000000000000000000000000000 00000000000000000000000000000000880800000000080002880800000000200002000800000000 00000000000000000000000000000000000000FFD934000000000000000000000000000000000000 00000000000000000000000000000000000000040000000000000000000000000000000000040000 00000000000000000000000000000000FF707D000000000000000000000000000000000000000000 00800000000000080002000000000000040000000000000000000000000000000000040000000000); SDR 8000 TDI (0000000000000000000000FF3D1B0000000000000000000000000000000000000000000000000000 000000000000000000000A0000000000000000000000000000000000080000000000000000000000 0000000000000000FF77CE0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC8920008000000000000000000000000000000000000000000000000000000000000000000 000080000000000000000000000000000000000000000000000000000000000000000000000000FF 20A00000000000000000000000000000000000000000000000000000000000000000000000000200 000000000000000000000000000000000000000000000000000000000000000000000000FFE68B00 00000000000000000000000000000000000000000000000000000000000000000000000800000000 000000000000000000000000000900000000000000000000000000000000000000FFD54000080000 00000000000000000000000000000000000000000000000000000000000000001000000000000000 000000000000000000001400000000000000000000000000000000000000FF809C00080000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF152E00000000000000000000 00000000000000000000000000000000000000000000000000000880000000000000000000000000 000000000800000000000000000000000000000000000000FF0A5D00000000000000000000000000 00000000000000000000000000000000000000000000000802000000000000000000000000000000 000902000000000000000000000000000000000000FFAC4D00000000000000000000000000000000 00000000000000000000000000000000000000000002000000000000000000000000000000000002 000000000000000000000000000000000000FFD36B00000000000000000000000000000000000000 00000000000000000000000000000000001048000000000000000000000000000000001000000000 000000000000000000000000000000FF625500000000000000000000000000000000000000000000 00000000000000000000000000000800000000000000000000000000000000000820000000000000); SDR 8000 TDI (00000000000000000000FF744C200000000000000000000000000000000000000000000000000000 00000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5D20000000000000000000000000000000000000000000000000000000000000000000 00000008000000000000000000000000000000000008000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF19 61000000100000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000080000000000000000000000000000000000FF404A0008 00080000000000000000000000000000000000000000000000000000000000000000000018000000 0000000000000000000000000000000000000000000000000000000000000000FF7BED0000000000 00000000000000000000000000000000000000000000000000000000000000100000000000000000 0000000000000000001000000000000000000000000000000000000000FF19620008000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000080000000000000000000000000000000000FF11190000000000000000000000 00000000000000000000000000000000000000010000000000000000000000000000000000004000 0000100000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFEADA4008000000000000000000000000000000 00000000000000000000000000000000008000000000000000000000000000000000008000000000 0000000000000000000000000000000000FFA6BE4000000000000000000000000000000000000000 00000000000000000000000000010000080000000000000000000000000000008010080000000000 0000000000000000000000000000FFD1A00000000000000000000000000000000000000000000000 00000000000000008000000000000200000000000000000000002000000000000200000000000000); SDR 8000 TDI (000000000000000000FF6CEE00000000000000000000000000000000000000000000000000000000 00000000000000000084000000000000000000000000000000000084000000000000000000000000 000000000000FFB90F00000000000000000000000000000000000000000000000000000000000000 00000000000204000000000000000000000000000000000004000000000000000000000000000000 000000FF193900100000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000004000000000000000000000000000000000000 FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFF541 00000000000000000000000000000000000000000000000000000000000000000000000000800000 00000000000000000000000000000080000000000000000000000000000000000000FFD934000000 00000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000004000000000000000000000000000000000000FFD934000000000000 00000000000000000000000000000000000000000000000000000000000000040000000000000000 00000000000000000004000000000000000000000000000000000000FF33AC000000000000000000 0000000000000000000000000000000000000000000000000000000C040000000000000000000000 00000000000A04000000000000000000000000000000000000FFD934000000000000000000000000 00000000000000000000000000000000000000000000000000040000000000000000000000000000 00000004000000000000000000000000000000000000FF1243400000000000000000000000000000 00000000000000000000000000000000000000000010040000000000000000000000000000000010 04000000000000000000000000000000000000FF9D27000800000000000000000000000000000000 00000000000000000000000000000000000008000000000000000000000000000000000008000000 00000000000000000000000000000000FFD7A5000000000000000000000000000000000000000000 00000000000000000000000000000002040000000000000000000000000000000004040000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF1D4E8000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000008000000000000000000000000000 0000000000FF609D0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 33640000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000100000000000000000000000000000000000FFADB700 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000100000000000000000000000000000000000000000000000000FF996900000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000080400000000000000000000000000000000FF06AC80000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000400000000000000000000000000000000000000000000FFD5FA80000000000000000000 00000000000000000000000000000000000000000000000000028000000000000000000000000000 000000000000000000000000000000000000000000000000FF33CC80000000000000000000000000 00000000000000000000000000000000000000000000028000000000000000000000000000000400 000000000000000000000000000000000000000000FFAFA200000000000000000000000000000000 00000000000000000000000000000000000000000004000000000000000000000080000000000004 000000000000000000000000000000000000FF809C00080000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2E1700000000000000000000000000000000000000000000 00000000000000000000000000000404000000000000000000000000000000000204000000000000 000000000000000000000000FFB79E00000000000000000000000000000000000000000000000000 00000000000000000000000004000000000000000000000000000000000404000000000000000000); SDR 8000 TDI (00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF3F51000000000000000000000000000000000000000000000000000800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFB7B80000 00000000000000000000000000000000000000000000000000000000000000000000040000000000 0000000000000000000000000200000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF269B8800000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF809C0008000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF80ED0000000000000000000000000000 00000000000000000000000000000000000000000000040000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE2301000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000040000000000 0000000000000000000000000000FF6B2C0000000000000000000000000000000000000000000000 00000000000000000000000000010000000000000000000000000000000000010000000000000000 0000000000000000000000FFD0870000000000000000000000000000000000000000000000000000 00000000000000000000010000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFF541 00000000000000000000000000000000000000000000000000000000000000000000000000800000 00000000000000000000000000000080000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF6B2C000000000000000000 00000000000000000000000000000000000000000000000000000001000000000000000000000000 00000000000100000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFBF0F000000000000000000000000000000000000000000000000001000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FFD9340000000000000000000000000000000000000000000000000000000000000000 00000000000400000000000000000000000000000000000400000000000000000000000000000000 0000FF35E20000000000000000000000000000000000000000000000000000000000000000000000 000006000000000000000000000000000000000006000000000000000000000000000000000000FF B9780000000000000000000000000000000000000000000000000000000000000000000000000004 080000000000000000000000000000000004000000000000000000000000000000000000FF2E3100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000400000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF3B0400000000000000 00000000000000000000000000000000000000000000000000000000000006080000000000000000 000000000000000406000000000000000000000000000000000000FF686000000000000000000000 00000000000000000000000000001800000000000000000000000004000000000000000000000000 000000000404000000000000000000000000000000000000FFAE4F00000000000000000000000000 00000000000000000000000000000000000000000000000084000000000000000000000000000000 000024000000000000000000000000000000000000FFAE4F00000000000000000000000000000000 00000000000000000000000000000000000000000084000000000000000000000000000000000024 000000000000000000000000000000000000FFD7D200000000000000000000000000000000000000 00000000000000000000000000000000000004080000000000000000000000000000000404000000 000000000000000000000000000000FF20D700000000000000000000000000000000000000000000 00000000000000000000000000000000080000000000000000000000000000000000000000000000 000000000000000000000000FFD93400000000000000000000000000000000000000000000000000 00000000000000000000000004000000000000000000000000000000000004000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000FF33C6000000000000000000000000000000000000000000000000000000000000000000 00000000080000000000000000000000000000000000080000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF2E 7D000000000000000000000000000000000000000000000000000000000000000000000000080800 0000000000000000000000000000000808000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFAC4D0000000000 00000000000000000000000000000000000000000000000000000000000000000200000000000000 0000000000000000000002000000000000000000000000000000000000FF6D0B0000000000000000 00000000000000000000000000000000000000000000010000010000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF96E10000000000000000000000000000000000 00000000000000000000020000000000000000020000008000008000000800008000000000000000 0000000000000000000000000000000000FFD9340000000000000000000000000000000000000000 00000000000000000000000000000000000400000000000000000000000000000000000400000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFD85C0000000000000000000000000000000000000000000000000000 00020000010000010000040400010000010000001000010000000000000400000000000000000000 0000000000000000FFD9340000000000000000000000000000000000000000000000000000000000 00000000000000000400000000000000000000000000000000000400000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF6B2C00000000000000000000000000000000000000000000000000000000000000000000000001 00000000000000000000000000000000000100000000000000000000000000000000000000FF4E0A 00000000000000000000000000000000000000000000000000000000000000000000000002000000 00000000000000000000000000000400000000000000000000000000000000000000FF5D20000000 00000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000800000000000000000000000000000000000000FF973B000000000000 00000000000000000000000000000000000000000000000000000000000010020000000000000000 00000000000000001002000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF5D20000000000000000000000000 00000000000000000000000000000000000000000000000008000000000000000000000000000000 00000800000000000000000000000000000000000000FFE8FA000000000000000000000000000000 00000000000000000000000000000000000000000008800000000000000000000000000000000008 80000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFEBF1000000000000000000000000000000000000000000 00000000000000000000000000000011000000000000000000000000000000000010000000000000 00000000000000000000000000FF5D20000000000000000000000000000000000000000000000000 00000000000000000000000008000000000000000000000000000000000008000000000000000000 00000000000000000000FFD087000000000000000000000000000000000000000000000000000000 00000000000000000001000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF5D200000000000000000000000000000000000000000000000000000000000000000000000 000800000000000000000000000000000000000800000000000000000000000000000000000000FF F5410000000000000000000000000000000000000000000000000000000000000000000000000080 000000000000000000000000000000000080000000000000000000000000000000000000FF609D00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000200000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF009700000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000400000000000000000000000000000000FF7BED00000000000000000000000000000000000000 00000000000000000000000000000000001000000000000000000000000000000000001000000000 000000000000000000000000000000FF973B00000000000000000000000000000000000000000000 00000000000000000000000000001002000000000000000000000000000000001002000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFB1F600000000000000000000000000000000000000000000000000000000 00000000000000000802000000000000000000000000000000000802000000000000000000000000 000000000000FFB7B800000000000000000000000000000000000000000000000000000000000000 00000000000400000000000000000000000000000000000200000000000000000000000000000000); SDR 8000 TDI (00FFD934000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000000000000000000000000004000000000000000000000000000000000000FF7F 6C000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000002000000000000000000000000000000000000FFAC4D0000 00000000000000000000000000000000000000000000000000000000000000000000000200000000 0000000000000000000000000002000000000000000000000000000000000000FFD9340000000000 00000000000000000000000000000000000000000000000000000000000000000400000000000000 0000000000000000000004000000000000000000000000000000000000FF7F6C0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000002000000000000000000000000000000000000FF17AE0000000000000000000000 00000000000000000000000000000000000000000000000000080600000000000000000000000000 0000000804000000000000000000000000000000000000FF17F50000000000000000000000000000 00000000000000000000000000000000000000000000020000000000000000000000000000000000 0200000000000000000000000000000000000000FFE2420000000000000000000000000000000000 00000000000000000000000000000000000000100400000000000000000000000000000000100400 0000000000000000000000000000000000FF5D200000000000000000000000000000000000000000 00000000000000000000000000000000080000000000000000000000000000000000080000000000 0000000000000000000000000000FFD9340000000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFF5410000000000000000000000000000000000000000000000000000 00000000000000000000008000000000000000000000000000000000008000000000000000000000 0000000000000000FF17F50000000000000000000000000000000000000000000000000000000000 00000000000000020000000000000000000000000000000000020000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF035D00000000000000000000000000000000000000000000000000000000000000000000000000 00000110000000000000000000000000000000000010000000000000000000000000000000FF7F6C 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000002000000000000000000000000000000000000FF35C1000000 00000000000000000000000000000000000000000000000000000000000000000000020000000000 00000000000000000100000002000000000000000000000000000000000000FF035D000000000000 00000000000000000000000000000000000000000000000000000000000000000001100000000000 00000000000000000000000010000000000000000000000000000000FF961A000000000000000000 00000000000000000000000000000000000000000000000000800000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF230000000000000000000000000 00000000000000000000000002000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF230000000000000000000000000000000 00000000000000000002000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF4373000000000000000000000000000000000000 00000000000000000000000000000000800000040000000000000000000000000000800000040000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFD934000000000000000000000000000000000000000000000000 00000000000000000000000000040000000000000000000000000000000000040000000000000000 00000000000000000000FFD934000000000000000000000000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000000040000000000000000000000 00000000000000FFD934000000000000000000000000000000000000000000000000000000000000 00000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FFD934000000000000000000000000000000000000000000000000000000000000000000 00000000040000000000000000000000000000000000040000000000000000000000000000000000); SDR 8000 TDI (409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF805A01 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF2E3100000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000400000000000000000000000000000000000000FF20A000000000000000 00000000000000000000000000000000000000000000000000000000000200000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFE44300000000000000000000000000 00000000000000000000000000000000000000000000000082000000000000000000000000000000 000002000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFEE4700000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000000000400000000000000 000000000000000000000000FFFB3000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000000FFBD4F00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000000FFD08700000000000000000000000000000000000000000000000000000000000000 00000000000100000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFBEB10000000000000000000000000000000000000000 00000000000000000000000000000000002800000000000000000000000000000000002800000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF7E700100000000000000000000000000000000000000000000000000 00000000000000000000002800000000000000000000000000000000002800000000000000000000 0000000000000000FF1C450000000000000000000000000000000000000000000000000000000100 00000000000040000200000000000000000000000000000000000200000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF789C0000000000000000000000000000000000000000000000000000000100000000000000 200000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000060000 00000000000000000000000000000006000000000000000000000000000000000000FF5D20000000 00000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000800000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFD934000000000000000000 00000000000000000000000000000000000000000000000000000000040000000000000000000000 00000000000004000000000000000000000000000000000000FFD934000000000000000000000000 00000000000000000000000000000000000000000000000000040000000000000000000000000000 00000004000000000000000000000000000000000000FFAA23000000000000000000000000000000 000000000000000000000000000000000000000000020C0000000000000000000000000000000802 84000000000000000000000000000000000000FFFD4D000000000000000000000000000000000000 000000000000000000000000000000000000000C0000000000000000000000000000000800840000 00000000000000000000000000000000FFD934000000000000000000000000000000000000000000 00000000000000000000000000000000040000000000000000000000000000000000040000000000 00000000000000000000000000FF17F5000000000000000000000000000000000000000000000000 00000000000000000000000002000000000000000000000000000000000002000000000000000000 00000000000000000000FFD934000000000000000000000000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000000040000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFAC4D000000000000000000000000000000000000000000000000000000000000000000 00000000020000000000000000000000000000000000020000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000AA0000000 000000000000000000000000000808000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF6B0900000000000000000000 00000000000000000000000000100040000400000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF982F00000000000000000000000000000000000000 00000000000000000000000000080080000220000000080080200220000000080000000000000000 000000000000000000000000000000FFD93400000000000000000000000000000000000000000000 00000000000000000000000000000004000000000000000000000000000000000004000000000000 000000000000000000000000FFB5E600000000000000000000000000000000000000000000000000 00000020000000000000200006000000000000000000000000000000000006000000000000000000 000000000000000000FF461300000000000000000000000000000000000000000000001000000004 40000000100080400444000000100100400440000000100000000004000000000000000000000000 000000000000FFE76100000000000000000000000000000000000000000000000000400000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FFD93400000000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000004000000000000000000000000000000000000 FFC48F00000000000000000000000000000000000000000000000000000000000000000000000008 04000000000000000000000000000000000804000000000000000000000000000000000000FF35E2); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000020000000000 0000000000000000000000000200000000000000000000000000000000000000FF76970000000000 00000000000000000000000000000000000000000000000000000000000000090000000000000000 0000000000000000000900000000000000000000000000000000000000FFBBEA0008000000000000 00000000000000000000000000000000000000000000000000000000100000000000000000000000 0000000000001000000000000000000000000000000000000000FF809C0008000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFCD3C0000000000000000000000000000 00000000000000000000000000000000000000000000090000000000000000000000000000000000 0800000000000000000000000000000000000000FFA0F40000000000000000000000000000000000 00000000000000000000000000000000000000080000000000000000000000000000000000088000 0000000000000000000000000000000000FF83460040000000000000000000000000000000000000 00000000000000000000000000000000005000000000000000000000000000000000004000000000 0000000000000000000000000000FF505A0000000000000000000000000000000000000000000000 00000000000000000000000000110000000000000000000000000000000000110000000000000000 0000000000000000000000FF757B0000000000000000000000000000000000000000000000000000 00000000000000000000095000000000000000000000000000000000094000000000000000000000 0000000000000000FF80AA0040000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBA970000000000000000000000000000000000000000000000000000000000000000 0000000000A000000000000000000000000000000000000000000000000000000000000000000000 0000FFDF7C0000000000000000000000000000000000000000000000000000000000000000000000 000200000000000000000000000000000000000008000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF38CB00); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFACD2000800000000 00000000000000000000000000000000000000000000000000000000000000021000000000000000 00000000000000000002000000000000000000000000000000000000FF7BED000000000000000000 00000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000001000000000000000000000000000000000000000FFE0D0000800000000000000000000 00000000000000000000000000000000000000000000000000000800000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF709D400800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFAD21400000000000000000000000000000000000000000000000 00000000000000000000000008000000000000000000000000000000000008000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF5D20000000000000000000000000000000000000000000000000000000000000 00000000000008000000000000000000000000000000000008000000000000000000000000000000 00000000FFEE47000000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000004000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF6C 4A000800000000000000000000000000000000000000000000000000000000000000000000000200 0000000000000000000000000000000002000000000000000000000000000000000000FF17F50000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000080000000000000 000000000000000000000000000000000000000000000000000000000000FFD93400000000000000 00000000000000000000000000000000000000000000000000000000000004000000000000000000 000000000000000004000000000000000000000000000000000000FF629F00000000000000000000 00000000000000000000000000000000000000000000000000000004000000000000000000000000 000000000104000000000000000000000000000000000000FF33AC00000000000000000000000000 00000000000000000000000000000000000000000000000C04000000000000000000000000000000 000A04000000000000000000000000000000000000FFD93400000000000000000000000000000000 00000000000000000000000000000000000000000004000000000000000000000000000000000004 000000000000000000000000000000000000FFFE9540000000000000000000000000000000000000 00000000000000000000000000000000001006000000000000000000000000000000001006000000 000000000000000000000000000000FF71F100080000000000000000000000000000000000000000 00000000000000000000000000000802000000000000000000000000000000000802000000000000 000000000000000000000000FF2E1700000000000000000000000000000000000000000000000000 00000000000000000000000404000000000000000000000000000000000204000000000000000000 000000000000000000FFAC4D00000000000000000000000000000000000000000000000000000000 00000000000000000002000000000000000000000000000000000002000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF989A20000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF5D2000000000000000000000000000000000000000000000000000000000000000000000000008 00000000000000000000000000000000000800000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000004000000000000000000000 0000000000000100000000000000000000000000000000000000000000FFDC298000100000000000 00000000000000000000000000000000000000000000000000000000000008000000000000000000 0000000000000000080000000000000000000000000000000000FFE09A8000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF855F8000000000000000000000000000 00000000000000000000000000000000000000000021000000000000000000000000000000000000 0000000000000000000000000000000000000000FF54708008000000000000000000000000000000 00000000000000000000000000000000000020800000000000000000000000000000000066000000 0000000000000000000000000000000000FF50530000000000000000000000000000000000000000 00000000000000000000000000002000000400000000000000000000000000008000000400000000 0000000000000000000000000000FF809C0008000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF2E170000000000000000000000000000000000000000000000000000 00000000000000000000040400000000000000000000000000000000020400000000000000000000 0000000000000000FF35E20000000000000000000000000000000000000000000000000000000000 00000000000000000600000000000000000000000000000000000600000000000000000000000000 0000000000FFACE90008000000000000000000000000000000000000000000000000000000000000 00000000008400000000000000000000000000000000008400000000000000000000000000000000 0000FFB90F0000000000000000000000000000000000000000000000000000000000000000000000 000204000000000000000000000000000000000004000000000000000000000000000000000000FF D9340000000000000000000000000000000000000000000000000000000000000000000000000004 000000000000000000000000000000000004000000000000000000000000000000000000FF8E3080 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000400000000000000000000000000000000000000FF089500000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000004000000000000000000 00000000000000000200000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF209D800800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFDBB8900000000000000000000000000000000000 00000000000000000000000000000000000004000000000000000000000000000000000002000000 00000000000000000000000000000000FFF541000000000000000000000000000000000000000000 00000000000000000000000000000000800000000000000000000000000000000000800000000000 00000000000000000000000000FF80FA008000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFAC4D000000000000000000000000000000000000000000000000000000000000 00000000000000020000000000000000000000000000000000020000000000000000000000000000 00000000FF133F800000000000000000000000000000000000000000000000000000000000000000 00000000800000000000000000000000000000000001000000000000000000000000000000000000 00FF859A000010000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFF3FC0000 00000000000000000000000000000000000000000000000000000000000000000000000010000000 0000000000000000000000000000100000000000000000000000000000000000FF12560000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF7B8D00000000000000000000 00000000000000000000000000000000000000000000000000000048000088000000000000000000 000000220320000008000000000000000000000000000000FF368D00000000000000000000000000 00000000000008000000000000000000000000000000000000000000000000000000000000000000 000002000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF211A00000000000000000000000000000002000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFE95300000000000000000000000000000000000000000004000400000000000000 00000000000000000000000000000000000000000000000000400000000000000000000000000000 000000FF811900060000000000000000000000000002000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF7C7E00000000000000000000000000000000000000000002000200000000000000000000000000 00000000000000000000000000000000000000400000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFB1D8088000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFB79E0000000000000000000000 00000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000404000000000000000000000000000000000000FFD9340000000000000000000000000000 00000000000000000000000000000000000000000000000400000000000000000000000000000000 0004000000000000000000000000000000000000FFB90F0000000000000000000000000000000000 00000000000000000000000000000000000000020400000000000000000000000000000000000400 0000000000000000000000000000000000FFD9340000000000000000000000000000000000000000 00000000000000000000000000000000000400000000000000000000000000000000000400000000 0000000000000000000000000000FFB79E0000000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000000040400000000000000 0000000000000000000000FF20A00000000000000000000000000000000000000000000000000000 00000000000000000000020000000000000000000000000000000000000000000000000000000000 0000000000000000FFD9340000000000000000000000000000000000000000000000000000000000 00000000000000000400000000000000000000000000000000000400000000000000000000000000 0000000000FF06E40000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000018000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF320900 00000000000000000000000000000000000000000000000000000000000000000000000028000088 000000000000000000000000420420000008000000000000000000000000000000FFBD4F00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000080000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF520A000000000000000000000000 00000000000000000001000000000000100004000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF6326000000000000000000000000000000000000000000 00000000000000000000880800000000080002882000000000200002882000000000000000000000 00000000000000000000000000FFD934000000000000000000000000000000000000000000000000 00000000000000000000000000040000000000000000000000000000000000040000000000000000 00000000000000000000FF52A3000000000000000000000000000000000000000000020002000000 00000000000000000000000000000000000200000000000000000000000000000000000000000000 00000000000000FF189C000000000000000000000000000000000000000000050004000000001000 051008000000000C0005080000000400200005084000000000040000000000000000000000000000 00000000FFA675000000000000000000000000000000000000000000000000000000000000000000 00000000040000004000000000000000000000000000040000000000000000000000000000000000 00FFD934000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000000000000000000000000004000000000000000000000000000000000000FFD9 34000000000000000000000000000000000000000000000000000000000000000000000000000400 0000000000000000000000000000000004000000000000000000000000000000000000FFD9340000 00000000000000000000000000000000000000000000000000000000000000000000000400000000 0000000000000000000000000004000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000001000000000000000000000000000 000000001000000000000000000000000000000000000000FFAC4D00000000000000000000000000 00000000000000000000000000000000000000000000000002000000000000000000000000000000 000002000000000000000000000000000000000000FF5D2000000000000000000000000000000000 00000000000000000000000000000000000000000800000000000000000000000000000000000800 000000000000000000000000000000000000FF769700000000000000000000000000000000000000 00000000000000000000000000000000000900000000000000000000000000000000000900000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF7BED00000000000000000000000000000000000000000000000000 00000000000000000000001000000000000000000000000000000000001000000000000000000000 000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000 00000000000000000800000000000000000000000000000000000800000000000000000000000000 000000000000FFBF4700000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000008000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE29B000000 00000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000810000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000200000000000000000000000000 0000000002000000000000000000000000000000000000FF83CC0000000000000000000000000000 00000000000000000000000000000000000000000000000000008000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF00970000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000040000 0000000000000000000000000000FF7BED0000000000000000000000000000000000000000000000 00000000000000000000000000100000000000000000000000000000000000100000000000000000 0000000000000000000000FF7BED0000000000000000000000000000000000000000000000000000 00000000000000000000100000000000000000000000000000000000100000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF9D560000000000000000000000000000000000000000000000000000000000000000 000000000C0000000000000000000000000000000000080000000000000000000000000000000000 0000FF77CE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000200000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF199700 00000000000000000000000000000000000000000000000000000000000000000000000082000000 000000000000000000000000000082000000000000000000000000000000000000FFEE4700000000 00000000000000000000000000000000000000000000000000000000000000000400000000000000 000000000000000000000400000000000000000000000000000000000000FF5D2000000000000000 00000000000000000000000000000000000000000000000000000000000800000000000000000000 000000000000000800000000000000000000000000000000000000FF7BED00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFAA25000000000000000000000000000000 0000000000000000000000000000000000000000000804000000000000000000000000000000000C 04000000000000000000000000000000000000FF20A0000000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000000000 00000000000000000000000000000000FFE242000000000000000000000000000000000000000000 00000000000000000000000000000010040000000000000000000000000000000010040000000000 00000000000000000000000000FF5D20000000000000000000000000000000000000000000000000 00000000000000000000000008000000000000000000000000000000000008000000000000000000 00000000000000000000FFD934000000000000000000000000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000000040000000000000000000000 00000000000000FF2D53000000000000000000000000000000000000000000000000000000000000 00000000000001000000000000000000000000000000000000800000000000000000000000000000 00000000FF17F5000000000000000000000000000000000000000000000000000000000000000000 00000002000000000000000000000000000000000002000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF5D 20000000000000000000000000000000000000000000000000000000000000000000000000080000 0000000000000000000000000000000800000000000000000000000000000000000000FF2D530000 00000000000000000000000000000000000000000000000000000000000000000000010000000000 0000000000000000000000000080000000000000000000000000000000000000FFA3CA0000000000 00000000000000000000000000000000000000000000000000000000000000000000008000000000 0000000000000000000000000200000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFAC4D0000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000020000000000000000000000000000000200 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF51AE00000000000000000000000000000000000000000000 00000000000000000000000000020004000000000000000000000000000200000004000000000000 000000000000000000000000FFAC4D00000000000000000000000000000000000000000000000000 00000000000000000000000002000000000000000000000000000000000002000000000000000000 000000000000000000FFD93400000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000000004000000000000000000000000 000000000000FFD93400000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FF35E200000000000000000000000000000000000000000000000000000000000000000000 00000006000000000000000000000000000000000006000000000000000000000000000000000000 FFD93400000000000000000000000000000000000000000000000000000000000000000000000000 04000000000000000000000000000000000004000000000000000000000000000000000000FFD934 00000000000000000000000000000000000000000000000000000000000000000000000000040000 00000000000000000000000000000004000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFAC4D000000000000 00000000000000000000000000000000000000000000000000000000000000020000000000000000 00000000000000000002000000000000000000000000000000000000FFD934000000000000000000 00000000000000000000000000000000000000000000000000000000040000000000000000000000 00000000000004000000000000000000000000000000000000FF409B000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000200000000000000000000000000000000 0402000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF6B2C0000000000000000000000000000000000000000000000 00000000000000000000000000010000000000000000000000000000000000010000000000000000 0000000000000000000000FF80ED0000000000000000000000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000000000000000000000000000000 0000000000000000FF08950000000000000000000000000000000000000000000000000000000000 00000000000000008000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFBD4F0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000080000000000000000000000000000000000000FF E89B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000080000000000000000000000000000000FFD96500 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000080000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFD96500000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000080000000000000000000000000000000000FFE89B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000080000000000000000000000000000000FFC80100000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000001000000000000000000000000000000000001 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF0C6C000000000000000000000000000000000000000000000000000000 00000000000000000004080000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFB5AC004000000000000000000000004000000000000000000000000000000000010000 05000000020000000000000000000000000000000000020000000000000000000000000000000000 00FFAC21000000000000000000000000000000000000000000000000000000000000000000000000 0208000000000000000000000000000000000000000000000000000000000000000000000000FF62 FA004000000000000000000000004000000000000000000000000000000000010000048000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF7F6C0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000002000000000000000000000000000000000000FF77CE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000200000000000000000000000000000000000000FF20A00000000000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 0000000000000000000000000000000000000000000000FF62E68000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000004000000000000000000000000000000000004 000000000000000000000000000000000000FF194200000000000000000000000000000000000000 00000000000000000000000000000000000404000000000000000000000000000000000004000000 000000000000000000000000000000FF35E200000000000000000000000000000000000000000000 00000000000000000000000000000006000000000000000000000000000000000006000000000000 000000000000000000000000FFD92300800000000000000000000000000000000000000000000000 00000000000000000000000404000000000000000000000000000000000004000000000000000000 000000000000000000FF80FA00800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD93400000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFF541000000000000 00000000000000000000000000000000000000000000000000000000000000800000000000000000 00000000000000000080000000000000000000000000000000000000FF5B01002000000000000000 00000000000000000000000000000000000000000000000000000000020000000000000000000000 00000000000202000000000000000000000000000000000000FFEE28002000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000400000000000000000000000000000000000000FF6B2C000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF4F690000000000000000000000000000000000000000000000 0000000000000000000000080000000000200000A000000000008000000000000000000000000000 0000000000000000000000FFD9340000000000000000000000000000000000000000000000000000 00000000000000000000000400000000000000000000000000000000000400000000000000000000 0000000000000000FFCFA60000000000000000000000000000000000000000000000000000000000 00002000008000000400000000000000000000000000000000000400000000000000000000000000 0000000000FF1D530000000000000000000000000000000000000000000000000400000000000040 00011000000400004000012000000000008000000000000400000000000000000000000000000000 0000FF35E20000000000000000000000000000000000000000000000000000000000000000000000 000006000000000000000000000000000000000006000000000000000000000000000000000000FF D9340000000000000000000000000000000000000000000000000000000000000000000000000004 000000000000000000000000000000000004000000000000000000000000000000000000FFD93400 00000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000000004000000000000000000000000000000000000FF195500800000 00000000000000000000000000000000000000000000000000000000000000000004000000000000 000000000000000000000004000000000000000000000000000000000000FFD08700000000000000 00000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF515B00800000000000000000000000 00000000000000000000000000000000000000000000000084000000000000000000000000000000 000004000000000000000000000000000000000000FFD93400000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000008000000000000000000000000000000000008000000 00000000000000000000000000000000FF152E000000000000000000000000000000000000000000 00000000000000000000000000000008800000000000000000000000000000000008000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8431000000000000000000000000000000000000000000000000000000 00000000000000000010000000000000000000000000000000000010080000000000000000000000 00000000000000FFEF22000000000000000000000000000000000000000000000000000000000000 00000000000008200000000000000000000000000000000008000000000000000000000000000000 00000000FF73A1000000000000000000000000000000000000000000000000000000000000000000 00000000080000000000000000000000000000000000100000000000000000000000000000000000 00FF0895000000000000000000000000000000000000000000000000000000000000000000000000 0080000000000000000000000000000000000000000000000000000000000000000000000000FFAC 4D000000000000000000000000000000000000000000000000000000000000000000000000000200 0000000000000000000000000000000002000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF68280000000000 0000000000000000000000000000000000000000000000000000000000000008D000000000000000 0000000000000000000800000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF65CE0000000000000000000000000000 00000000000000000000040000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000010000000000000 000000000000000000000000000000FFCF6D00000000000000000000000000000000000000000000 00000000000000000000000000000000000400000000000000000000000000020000000400000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF9B6000000000000000000000000000000000000000000000000000000000 00000000000000000802000000000000000000000000000000040802000000000000000000000000 000000000000FF6C5700000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000008000000000000000000000000000000000000 000000FFF3FC00000000000000000000000000000000000000000000000000000000000000000000 00000C00000000000000000000000000000000000C00000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF2E31 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000000000000FF3C51000000 00000000000000000000000000000000000000000000000000000000000000000001020000000000 00000000000000000000000002000000000000000000000000000000000000FF20A0000000000000 00000000000000000000000000000000000000000000000000000000000002000000000000000000 00000000000000000000000000000000000000000000000000000000FF5D20000000000000000000 00000000000000000000000000000000000000000000000000000008000000000000000000000000 00000000000800000000000000000000000000000000000000FF7BED000000000000000000000000 00000000000000000000000000000000000000000000000010000000000000000000000000000000 00001000000000000000000000000000000000000000FF06E4000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000001 80000000000000000000000000000000000000FF5D20000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000400000000000000000000000000000000000400000000 0000000000000000000000000000FFD5170000000000000000000000000000000000000000000000 00000000000000000000000000100400000000000000000000000000000000120400000000000000 0000000000000000000000FF5D200000000000000000000000000000000000000000000000000000 00000000000000000000080000000000000000000000000000000000080000000000000000000000 0000000000000000FF2E170000000000000000000000000000000000000000000000000000000000 00000000000000040400000000000000000000000000000000020400000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF5D2000 00000000000000000000000000000000000000000000000000000000000000000000000800000000 000000000000000000000000000800000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF00D100000000000000 00000000000000000000000000000000000000000000000000000000000000080000000000000000 000000000000000000000200000000000000000000000000000000FF9A2A00000000000000000000 00000000000000000000000000000000000000000000000000000000000400000000000000000000 000000000000000000000000000000000000000000000000FF7BED00000000000000000000000000 00000000000000000000000000000000000000000000001000000000000000000000000000000000 001000000000000000000000000000000000000000FF20D700000000000000000000000000000000 00000000000000000000000000000000000000000000080000000000000000000000000000000000 000000000000000000000000000000000000FF190300000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000800100000000000000000000000000000004000000000000000000 00000000000000000000000000FF95F2000000000000000000000000000000000000000000000000 00000000000000000000000000040000000000000000000000000000800000040000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF1942000000000000000000000000000000000000000000000000000000000000 00000000000004040000000000000000000000000000000000040000000000000000000000000000 00000000FFEE61000000000000000000000000000000000000000000000000000000000000000000 00000000040000000000000000000000000000000002040000000000000000000000000000000000 00FF913A000000000000000000000000000000000000000000000000000000000000000000000000 0084000000000000000000000000000000000004000000000000000000000000000000000000FFD7 A5000000000000000000000000000000000000000000000000000000000000000000000000020400 0000000000000000000000000000000404000000000000000000000000000000000000FFC8360000 00000000000000000000000000000000000000000000000000000000000000000000000600000000 0000000000000000000000000086000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF08950000000000000000 00000000000000000000000000000000000000000000000000000000008000000000000000000000 0000000000000000000000000000000000000000000000000000FFD9340000000000000000000000 00000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000004000000000000000000000000000000000000FF629F0000000000000000000000000000 00000000000000000000000000000000000000000000000400000000000000000000000000000000 0104000000000000000000000000000000000000FFA4B40000000000000000000000000000000000 000000000000000000000000000000000000000A0400000000000000000000000000000000080400 0000000000000000000000000000000000FFD9340000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000002000000000000000000000000000000000002000000000000 000000000000000000000000FF2D5300000000000000000000000000000000000000000000000000 00000000000000000000000100000000000000000000000000000000000080000000000000000000 000000000000000000FF80ED00000000000000000000000000000000000000000000000000000000 00000000000000000400000000000000000000000000000000000000000000000000000000000000 000000000000FFAC4D00000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000002000000000000000000000000000000 000000FF089500000000000000000000000000000000000000000000000000000000000000000000 00000080000000000000000000000000000000000000000000000000000000000000000000000000 FFBD4F00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000080000000000000000000000000000000000000FF8E94 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000008000000000000000000000000000000000000000000000000000000000000FFA8AF000000 00000000000000000000000000000000000000000000000000000000000000000000000000080000 00000000000000000000000000000000000000000000000000000000000000FFA8AF000000000000 00000000000000000000000000000000000000000000000000000000000000000000080000000000 00000000000000000000000000000000000000000000000000000000FF0E36000000000000000000 00000000000000000000000000000000000000000000000000000100020000000000000000000000 00000500000002000000000000000000000000000000000000FF9C86000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000100000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF961A000000000000000000000000000000000000 00000000000000000000000000000000800000000000000000000000000000000000000000000000 00000000000000000000000000000000FFADED000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFC2140000000000000000000000000000000000000000000000000000 00000000000000000000008000000000000000000000000000000000028000000000000000000000 0000000000000000FFC0910000000000000000000000000000000000000000000000000000000400 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFEC480000000000000000000000000000000000000000000000000000000200000000 00000000000200000000000000000000000000000000000200000000000000000000000000000000 0000FF05440000001000000000000000000000000000000000000000100000000400000000000000 000100000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF027A00 00000800000000000000000000000000000000000000080000000400000000000000000080000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF058600000000000000 00000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000500000000000000000000000000000000000000FF77CE00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000200000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFEE0B80000000000000000000000000000000 00000000000000000000000000000000000000000200000000000000000000000000000000000400 000000000000000000000000000000000000FFAC4D00000000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000002000000 000000000000000000000000000000FFAC4D00000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000004000000000000000000000000000000000200000000000000000000 00000000000000000000FFD7A5000000000000000000000000000000000000000000000000000000 00000000000000000002040000000000000000000000000000000004040000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFF176000000000000000000000000000000000000000000000000000000000000000000 00000000840800000000000000000000000000000000040000000000000000000000000000000000 00FFA836000000000000000000000000000000000000000000000000000000000000000000000000 0880080000000000000000000000000000000000000000000000000000000000000000000000FFA1 40000000000000000000000000000000000000000000010000000000000000000000000000100200 0000000000000000000000000000000002000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFB2680000000000 0000000000000000000000000000000000000000000000000000000000000004A000000000000000 0000000000000000000208000000000000000000000000000000000000FF8C4B0000000000000000 00000000000000000000000000010000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF12250000000000000000000000000000 0000000000000000000000000000000000000000000002A000000000000000000000000000000000 0208000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000280000000680000000200000008208000000000000000000000000000000000000 000000000000000000FF1E3500000000000000000000000000000000000000000000000000000000 00800000000000000004000000000000000000000000000000000004000000000800000000000000 000000000000FF14D200000000000000000000000000000000000000000000000800000000808000 00000000000004000000000000000000000000000000000004000000000800000000000000000000 000000FF946700000000000000000000000000000000000000000000001000000001400000001000 00400084000000000000010010000000000000000004000000000000000000000000000000000000 FF16EF00000000000000000000000000000000000000000000000000000000000000004000000004 00000000400000000400000000000000000000000000000000000000000000000000000000FFD934 00000000000000000000000000000000000000000000000000000000000000000000000000040000 00000000000000000000000000000004000000000000000000000000000000000000FFD934000000 00000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000004000000000000000000000000000000000000FF2149000000000000 00000000000000000000000000000001000000800000000000000000000000040000000000000000 00000000000000000004000000000008000000000000000000000000FF8003000000000000000000 00000000000000000000000000000000000000000000000000000000001000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8DD5000000000000000000000000000000 00000000000000000000800000000000000000000000040800000000000000000000000000000000 04000000000008000000000000000000000000FF7CD4000000000000000000000000000000000000 00000001000000000000000000000000000000000000018000000000000000018000000000000000 00000000000000000000000000000000FFFB2A000000000000000000000000000000000000000000 00000000000000000000000000000000040000000000000000000000000000000202040000000000 00000000000000000000000000FF95A6000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF86390000000000000000000000000000000000000000000000000000000000 00000000000000100000000000000000000000000000000000108000000000000000000000000000 0000000000FFD9FE0000000000000000000000000000000000000000000000000000000000000000 00000000080000000000000000000000000000000000092000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF CE440400000000000000000000000000000000000000000000000000000000000000000000000020 000000000000000000000000000000000008000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF23CA00000000000000 00000000000000000000000000000000000000000000000000000000000800000000000000000000 000000000000000840000000000000000000000000000000000000FF0D4500000000000000000000 00000000000000000000000000000000000000000000000000000020000000000000000000000000 000000000008000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF009000000000000000000000000000000000 00000000000000000000000040000000000000400000000000000000000000000000000000000000 000000000000000000000000000000000000FF20A000000000000000000000000000000000000000 00000000000000000000000000000000000200000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFCB9500000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000010000000000000000000000000000000002010000000000000000000000000 00000000000000FFF806400000000000000000000000000000000000000000000000000000000000 00000004000410000000000000000000000000000001004010000000000000000000000000000000 00000000FF5E7F000000000000000000000000000000000000000000000000000000000000000000 00004000000000000000000000000000000800000000000000000000000000000000000000000000 00FF5D20000000000000000000000000000000000000000000000000000000000000000000000000 0800000000000000000000000000000000000800000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF809C0008000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF5D200000000000000000000000 00000000000000000000000000000000000000000000000000080000000000000000000000000000 0000000800000000000000000000000000000000000000FFBBEA0008000000000000000000000000 00000000000000000000000000000000000000000000100000000000000000000000000000000000 1000000000000000000000000000000000000000FF809C0008000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF5D200000000000000000000000000000000000000000 00000000000000000000000000000000080000000000000000000000000000000000080000000000 0000000000000000000000000000FF5D200000000000000000000000000000000000000000000000 00000000000000000000000000080000000000000000000000000000000000080000000000000000 0000000000000000000000FF839A0400000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000804000000000000000000000000000000000804000000000000000000000000 000000000000FF27A440000000000000000000000000000000000000000000000000000000000000 00000000000204000000000000000000000000000000000404000000000000000000000000000000 000000FF17F500000000000000000000000000000000000000000000000000000000000000000000 00000200000000000000000000000000000000000200000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF8521200000 00000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000800000000000000000000000000000000000000FFB7B8000000000000 00000000000000000000000000000000000000000000000000000000000004000000000000000000 00000000000000000200000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE094000800000000008000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF5E3F000000020000008000000000000000 00000000000000000000000000000000000000000000000001000000000000000000000000000000 00000000000000000000000000000000000000FFB09D000800040000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFA541000000000000000000000000000000000000000000 00000000000000000000000000002000000000000000000000000000001000000000000000000000 00000000000000000000000000FFAB70000000000000000000000000000000000000000000000000 00000000000000000002000200000001000000000000000000000000800000000000000000000000 00000000000000000000FF5F58400800000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000400000000000000000000000000000000040400000000000000000000000000 0000000000FFB90F0000000000000000000000000000000000000000000000000000000000000000 00000000020400000000000000000000000000000000000400000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 8E5A0000000000000000000000000000000000000000000000000000000000000000000000000204 000000000000000000000000000000000204000000000000000000000000000000000000FF77E800 00000000000000000000000000000000000000000000000000000000000000000000000404000000 000000000000000000000000000404000000000000000000000000000000000000FFF5EF00100000 00000000000000000000000000000000000000000000000000000000000000000006000000000000 000000000000000000000006000000000000000000000000000000000000FFE09A80000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFEE6100000000000000000000000000 00000000000000000000000000000000000000000000000004000000000000000000000000000000 000204000000000000000000000000000000000000FFF59400000000000000000000000000000000 00000000000000000000000000000000000000000406000000000000000000000000000000000006 000000000000000000000000000000000000FFAA2500000000000000000000000000000000000000 00000000000000000000000000000000000804000000000000000000000000000000000C04000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF827900000000000000000000000000000000000000000000000000 00000000000000000000001204000000000000000000000000000000001004000000000000000000 000000000000000000FF048800080000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFEE47000000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000004000000000000000000000000000000000000 00FF20A0000000000000000000000000000000000000000000000000000000000000000000000000 0200000000000000000000000000000000000000000000000000000000000000000000000000FF8E 30800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000400000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFAC4D0000000000000000000000000000 00000000000000000000000000000000000000000000000200000000000000000000000000000000 0002000000000000000000000000000000000000FFE09A8000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFD9340000000000000000000000000000000000000000000000000000 00000000000000000000000400000000000000000000000000000000000400000000000000000000 0000000000000000FF77990008000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000830000000000000000000000000000000000110000000000000000000000000000000 000000FFF7ED00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000040000000000000000000000000000000000000000000000 FFFA1D00000000000000000000000000000000000000000001000000000000100004000000000D00 02000000000000000000000000000000000002000000000000000000000000000000000000FF522E 00000000000000000000000000000000000000000000000000000000000000000000000000380004 00000000000000000000020400000088000100000000000000000000000000000000FF7830000000 00000000000000000000000000000000000000800000000000080004000000000B00080002000000 00000000000000000200000000000080000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFAC4D000000000000000000 00000000000000000000000000000000000000000000000000000000020000000000000000000000 00000000000002000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFE230100000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004 00000000000000000000000000000000000000FF80A1800000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000000000 00000000000000000000000000000000FF809C000800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF820B100000000000000000000000000000000000000000000000 00000000000000000000000002000000000000000000000000000000000004000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000020000000000000000000000000000000000000000000000000000000000000000000000 0000FF050A0000000000000000000000000800000000000000200000210000000000000000000000 000004000280000000000000000000000008000004000020000000000000000000000000000000FF 9D900000000000000000000000000800000000000000200000240000000000000000000180140000 198A98000000000000000000000008000180000020000000000000000000000000000000FF379700 00000040040000000000000000000000000000000040000100008000000020000000010000001000 000000000000000000000000000000000000000000000000000000000000000000FF009E00000000 00000000000000000000000000000000000000028000000000000020000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF2E3100000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000400000000000000000000000000000000000000FF64B900200000400400000000 00000000000000000000000840000100010000000000000000158000000800000000000000000000 000200000020000000000000000000000000000000000000FFFFC900000000000000000000000000 00000000000000000800000000000000000000000000000208000800000000000000000000000000 000000000000000000000000000000000000000000FF4EF400000000000000000000000000000000 00000000000000000000000000000000000000000210000000000000000000000000000000000200 000000000000000000000000000000000000FFD6BF00200000000000000000000000000000000000 00000000000000000000000000000000008000000000000000000000000000000400000040000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF807400000000000000000000000000000000000000000000000000 00000000000000000000000800000000000000000000000000000000000000000000000000000000 000000000000000000FFAC4D00000000000000000000000000000000000000000000000000000000 00000000000000000002000000000000000000000000000000000002000000000000000000000000 000000000000FF6F6700000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000044000000000000000000000000000000000040000000000000000000000000000000000 00FFCA6D00000000000000000000000000000000000000000005060400000004100005100C000000 000C000020080000000020400480000000000004000000000000000000000000000000000000FFAF D5000000000000000000000000000000000000000000002E00000000000000000000008000000400 0400000400000000000000400000000006000000000000000000000000000000000000FF539F0000 00000000000000000000000000000000000000000600000000000000000000000000000400000000 0000000000000000000000000004000000000000000000000000000000000000FF539F0000000000 00000000000000000000000000000000000600000000000000000000000000000400000000000000 0000000000000000000004000000000000000000000000000000000000FF558C0000000001000000 00000000000000000000000002000642004000000000000000000000000610002008800000000000 0000000000000086000000080000000000000000000000000000FF3B9C0000000000000000000000 00000004000000000000100600010000010000000000000040054004020000000000000000000000 0000000002000000000000000000000000000000000000FF15AB0000000000000000000000000000 00000000000000000010000000000000000000000000000000000000000000000000000000000000 0000000000000100000000000000000000000000FF6C370000000000000000000000000000000000 00000002080002000000008000000000000024000400002008800000000000000000000000008600 0000080080000000000000000000000000FFB81A0000000001000000000000000000020000000000 0000004800C0000000000000000000000547941C0000000000000000000000000000000400000000 0000000000000000000000000000FF5A430000000000000000000000000000000000000000000000 00000000000000000000000000028400020000000000000000000000008000050C00000000000000 0000000000000000000000FF9D2D0000000000000000000000000000000000000000000000000000 00000000000000040002008400020000000000000000000000008000008C00000000000000000000 0000000000000000FF2D9F0000000000000000000000000000000000000000000000000000000000 00000000020000000400000000000000000000000000000000040400000000000000000000000000 0000000000FF20A00000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000800000000000000000000000000000000000800000000000000000000000000000000000000 FF2D67000000000000000000000000000000000000000000000A0000000000000000000000000000 20000000000000000000000000000000000000000000000000000000000000000000000000FF0895 00000000000000000000000000000000000000000000000000000000000000000000000000800000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFCA30000000000000 00000000000000000000000000000000060000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFBA5E000000000000000000 00000000000000000000000010160000000000000000000000000008C00000000000000000000000 00000000000800000000000000000000000000000000000000FFF5C7000000000000000000000000 00000000000000000000060000000000000000000000000000000000000000000000000000000000 00000002000000000000000000000000000000000000FF26E6000000000000000000000000000000 00000000000000060000000000000000000000000000020000000000000000000000000000000000 02000000000000000000000000000000000000FF1FDC000000000000000000000000000000000000 00000004460400000000000000000000000008000000000000000000000000000000000000000000 00000000000000000000000000000000FF0BED000000000000000000000000000000000000000000 00060000000000000000000000000010000000000000000000000000000000000000000000000000 00000000000000000000000000FFCA30000000000000000000000000000000000000000000000600 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFFD10000000000000000000000000000000000000000000000600000000 00000002080A00800000082002200802000000202002802000000000000000000000000000000000 00000000000000FFF516000000000000000000000000000000000000000000080600000000000000 00000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FF7930000000000000000000000000000000000000000000088E00000000020800008000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000000000FF 42CB0000000002000000000000000000000000000000000004000000000000000000000000000C02 000000000000000000000000000000000802000000000000000000000000000000000000FF9F8B00 00000000000000000000000000000000000000000802000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF196400000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000600000000000000000000000000000000000000FF6E1B00080000000000 00000000000000000000000000000800000000000000000000000000000080000000000000000000 000000000000000000000000000000000000000000000000000000FF862900000000000000000000 00000000000000000000000800000000000000000000000000000200000000000000000000000000 000000000000000000000000000000000000000000000000FF5D2000000000000000000000000000 00000000000000000000000000000000000000000000000800000000000000000000000000000000 000800000000000000000000000000000000000000FF7B1B00080000040000000000000000000000 00000000000000000000000000000000000000001000000000000000000000000000000000001000 000000000000000000000000000000000000FF9DBE00080000000000000000000000000000000000 00000800000000000000000000000000000000000000000000000000000000000000000100000000 000000000000000000000000000000FF6CB700000000000000000000000000000000000000000000 02000000000000000000000000000880000000000000000000000000000000000800000000000000 000000000000000000000000FFBF1000000000000000000000000000000000000000000000040000 00000000000000000000000802000000000000000000000000000000000882000000000000000000 000000000000000000FFCA3000000000000000000000000000000000000000000000060000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD6C600000000000000000000000000000000000000000012020000000000000000 00000000001000000000000000000000000000000000001000000000000000000000000000000000 000000FFAE6500000000000000000000000000000000000000000004000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FFBC ED200000000000000000000000000000000000000000000600000000000000000000000000040000 0000000000000000000000000000000400000000000000000000000000000000000000FF26D00000 0000000000000000000000000000000000000002AE00000000000000000000000000000200000000 0000000000000000000000000002000000000000000000000000000000000000FFD78B0000000000 00000000000000000000000000000000000600000000000000000000000000080000000000000000 0000000000000000000800000000000000000000000000000000000000FFCA300000000000000000 00000000000000000000000000000600000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF35450000000000000000000000 00000000000000000000000600000000000010000000000000020000020004000000000000000000 0000000000080000000000000000000000000000000000FFC8BE0008800000000000000000000000 0000000000000000060000000000000800000000000000000000A002000000000000000000000000 0000040000000000000000000000000000000000FFBAC50000800000000000000000000000000000 0000000000060000000000000000000000000010000000A000000000000000000000000000100000 0000000000000000000000000000000000FF8DB30008000000000000000000000000000000000000 00000000000000000000000000000000040000020000000000000000000000000000000000000000 0000000000000000000000000000FF82DA0000000000000000000000000000000000000000000000 00000000000000040000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF0CC40000000000000000000000000020000000000000000002080000 00000000000000000000000000000000000000000000000000000000000014000000000000000000 0000000000000000FF7D8C4008000000000000000000000000000000000000001000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFD36F4000000000000000000000000020000000000000001002080000000000000000 00000000080000000000000000000000000000000000080000000000000000000000000000000000 0000FF0B110000000000000000000000000000000000000000000006000000000000000200000000); SDR 8000 TDI (04000000000000000000000000000000000404000000000000000000000000000000000000FF7F4A 00000000000100000000000000000000000000000000060000000000000000000000000000040000 00000000000000000000000000000084000000000000000000000000000000000000FF2A12000000 00000180000000000000000000000000000002AE0000000000000000000000000002040000000000 00000000000000000000000004000000000000000000000000000000000000FF42FF001000000001 00000000000000000000000000000005560000000000000000000000000000040000000000000000 00000000000000000004000000000000000000000000000000000000FF9F67800000000001800000 00000000000000000000000000060000000000000000000000000000020000000000000000000000 00000000000002000000000000000000000000000000000000FF5A1A000000000000000000000000 00000000000000000002AE0000000000000000000000000001000000000000000000000000000000 00000000000000000000000000000000000000000000FF1B91000000000000000000000000000000 00000000000000060000000000000000000000000000840000000000000000000000000000000000 04000000000000000000000000000000000000FFAE4B000000000000000000000000000000000000 00000000060000000000000000000000000000040000000000000000000000000000000000840000 00000000000000000000000000000000FFE0F8000000000000000000000000000000000000000000 0006000000000000000000000000000C04000000000000000000000000000000000C040000000000 00000000000000000000000000FF539F000000000000000000000000000000000000000000000600 00000000000000000000000000040000000000000000000000000000000000040000000000000000 00000000000000000000FF98DE40000000000000000000000000000000000000000002AE00000000 00000000000000000010040000000000000000000000000000000010040000000000000000000000 00000000000000FF178C000800000000000000000000000000000000000000000600000000000000 00000000000008000000000000000000000000000000000008000000000000000000000000000000 00000000FF53F3000000000000000000000000000000000000000000055600000000000000000000 00000000040000000000000000000000000000000000040000000000000000000000000000000000 00FFCA0600000000000000000000000000000000000000000002AE00000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FFF91A80 00000000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF68B500000000 00018000000000000000000000000000000006000000000000000000000000000000500000000000 000000000000000000000000080200000000000000000000000000000000FFAA4500000000000180 00000000000000000000000000000006000000000000000000000000080000020108008000000000 000000000000000000000000000000000000000000000000000000FFFDB100000000000180000000 00000000000000000000000006000000000000000000000000080000000000000000000000000000 000000000000000000000000000000000000000000000000FF3E2300000000000180000000000000 00000000000000000046000000000000000000000000000000020008008000000000000440000000 000000000000000000000000000000000000000000FFCD4400000000000180000000000000000000 00000000000006000000000000000000000000000000300100000000000000000000000000000000 080400000000000000000000000000000000FF55D280000000000180000000000000000000000000 00000006000000000000000000000000000000000000000000000000000000000040000000000000 000000000000000000000000000000FF25FC80000000000180000000000000000000000000000018 46000000000000000000000000008000000000000000000000000000000000000000000000000000 000000000000000000000000FFEE6780000000000180000000000000000000000000000000060000 00000000000000000000008000000000000000000000000000000058000000000000000000000000 000000000000000000FF6DE000000000000180000000000000000000000000000000060000000000 00000000000000000004000000000000000000000220000000000004000000000000000000000000 000000000000FFFF6100080000000180000000000000000000000000000000060000000000000000 00000000000002000000000000000000000000000000000002000000000000000000000000000000 000000FFBD3C00000000000180000000000000000000000000000000060000000000000000000000 00000404000000000000000000000000000000000204000000000000000000000000000000000000 FF248300000000000180000000000000000000000000000002AE0000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000FF04640000 00001200000001000000001001000000000000180400000400000000000000000000000000002000 0000000000000000000000000000000000000000000000000000000000000000FFDB970000008008 00800000800000000C00800000000000000300320200000000000000000000200040000000000000 0000000000000000000000000000000000000000000000000000000000FF80290000000000000000 00000000000200000000000000000080000000000000000000000000000200000000000000000000 0000000000000002000000000000000000000000000000000000FFDD160004000000000002000000 00040000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF17F50000000000000000000000000000 00000000000000000000000000000000000000000000020000000000000000000000000000000000 0200000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF36358800000000AA8000000000000000000000000000 001AAA00000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFD5270008000000000000000000000000000000000000000804 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFC7EC0000000001558000000000000000000000000000000556000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFF6BC0000000000AA80000000000000000000000000000012AA000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF880B0800000000000000000000000000000000000000000000000000000000000000 00000000020000000000000000000000000000000000040000000000000000000000000000000000 0000FF2DCE0000000000AA80000000000000000000000000000002AA000000000000000000000000 000100000000000000000000000000000000000180000000000000000000000000000000000000FF C9070000000000018000000000000000000000000000000000000000000000000000000000000100); SDR 8000 TDI (88080000000020478120000010000000980000280400000000000000000000000000FFE15C002101 80580080001400400000104C000000000000000614C0060401000A02000000100140000100000000 000000000000001000000800410000A0440000000000000000000000000000FFEB00000001815801 80000000000000104C80000000000000060040062000000000000000001461008000000000000000 000000000000000000200000A0000000000000000000000000000000FF6CD0000001A01C00800000 00000000120000000000000000060040060000000000000000010040000000000000000000000000 00000008000000000000000000000000000000000000000000FF5A4D000101A01800010014004000 11180180000000001001065068060401000400000000100100400100000000000000004001001000 10100200000000040400000000000000000000000000FF5F56000001801801000000000000001801 00000000000000060068060000000000000000000040020000000000000000000000000000000000 02000000000000000000000000000000000000FF997C000001C01A00000400000000001801000000 00000000060060060000000000000000008000010000000000000000000000000000080000000000 00000000000000000000000000000000FF37E1000001801801000000000000001801800000000000 00060060060000000000000000000040000000000000000000000000000000000004000000000000 00000000000000000000000000FF5963000001800001800000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFCDFB000001800001800400000000400000000000000000000000000000 00000000000000008040000000000000000000000000000000000000000000000000000000000000 00000000000000FF8557000200800000800000000000020000000000000000000A00200200000000 00000000000022808000000000000000000000000000000002800000000000000000000000000000 00000000FFCE88000000601000000001000000001001000000000000100000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF3CA3000000800A00800400800000400800800000000000100A00200200000000000000000100 2281060040000000000000000000000000000280000000000000000000000000000000000000FF8B 12000001801801800401000000001001800000000000000600740600000000000000000000600040); SDR 8000 TDI (000400000000000000000000000400000000000000000000000000000000000000FFF1E500000080 18000000000000018000018000000000000006006006000000000000000000002004006000000000 000000000000000000000004000000000000000000000000000000000000FF429A00000180180180 04000000018000018000000000000006006006000000000000000000002000006000000000000000 000000000000000000000000000000000000000000000000000000FFFB4800000080183000004001 00018004518000000000000006006006100800200000000000002004004000040000000000000010 010100000104028000000400000000000000000000000000FF8951000001801801800004000001C0 02008000100000000206116006050840140000000100052400104000000200000000010140000000 000000200200240000080000000000000000000000FFD5E7000001A01A0180001000000000090900 00000000000006406006000000010000000000186000800040000000000000000000000000000000 000000000000000000000000000000000000FF961E00000100182080000000000040080180000000 00000406087006028000000000000000024204000020000000000000000080000000000084028000 000000000000000000000000000000FF312600000180181180005281000000094180001000018004 06216006100040328000000100016000900000040400000000010030010100000000201C00420400 100000000000000000000000FF6091000001401A0080000080000000080100000000000010060060 06000000000000000000004006000000000000000000000000000000000006000000000000000000 000000000000000000FFDE060000018010018000018000000006008000000000000A060040060000 00000000000000006500000000000000000000000000000000000400000000000000000000000000 000000000000FF580000000180100080040180000060000000000000000000060048060000000000 00000000004286000000000000000000000000000000000206000000000000000000000000000000 000000FF442700000180100180040100000000020080000000000000060040060000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF157500000181100280000102000011000000000000000099060040064000002080000000800A40 06240088080000000020000020000000000006000000080000000000000000000000000000FFB65B 002001C01803810000020000001000800000000010800642C0060000182882001800800001402200); SDR 8000 TDI (0000000000000000000000000002000000020000000000000000000000000000FF701B0000019000 018000100000001E040000000000000000002088A000000000000000000002000000000000000000 0000000000000000000000000000000000000000000000000000000000FF2DF40000010018018000 840000018000C0800000000000088600600600000000000000000000400014000000000000000000 0000000000000000000000000000000000000000000000000000FFFA00000200201A000000840002 518002D0000000000040008740E2260000000000000000008C480084800000000000000000000000 0000000800000000000000000000000000000000000000FFAB3B000241201809800040408001D404 04000000000000022610608600000000000000000000400020400000000000000000000000000000 0000000001020000000000000000000000000000FF48120002000018000000000000018000000000 00000000000680780600000000000000000000400000400000000000000000000000000000000000 0000000000000000000000000000000000FF49C70000008018000000000020018000010000000000 00000680600600000000004000010000000000600000000000010000010000000000000000000000 0000000000000000000000000000FF141B000001C018018000000000018000018000000000001806 00600600000000000000000000000000040040000000000010000000000000000000000000000000 0000000000000000000000FF655F000000801A000000000000018000018000000000000006006006 00000000040001000080602810400001000000001000010050000000000000000000000000000000 0000000000000000FFCE780000018018018000000040018000018000000001001006007006000000 00000000000800600000408000020800000000000010000000020000000000000000000000000000 0000000000FF3BB7000200A01000000000000001C000000000000001001006006006000000000400 01000000605410040041080000000810008020000000000400080000000000000000000000000000 0000FF9C8800000180120980000020000180000000000000000000060062A6000000000000000000 806000006000000800000000080020000000000000000A00800000000000000000000000000000FF 3E9E000400C010100000000000018004000000000000000006007446000000000040000110000006 004080000008000100100140000000000006000400000000000000000000000000000000FF532800 00018010018000000000018000010000000000000006006086000000000000000000000000004000); SDR 8000 TDI (00000000000000000000000000000000002000000000000000000000000000FFDE730000AA0AA02A 0000880000008A84C800000000000002A82A92A80000000000000000004000000000000000000000 00000000000000000000000000000000000000000000000000000000FF10A8000000002000000010 00000040001000000000008000000110000000000000000000003400000000000000000000000000 00000000000000000000000000000000000000000000000000FFE7F90000AA0AA12A0000AA000000 0AA08800000000000012A82A82A80000000000000000001480000000000000000000000000000000 00000000000000000000000000000000000000000000FFA33A000354330354000324200200154144 0000000000001550CC05500000000000000000008108008000000000000000000000000000000008 00000000800000000000000000000000000000FFBC69000400400400000000000400200004000000 00000000010000000000000000000000000010010000000000000000000000000000000010000000 01000000000000000000000000000000FF91100000AA0880AA000080000000088000000000000080 0AA82282A80000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF71CD000200204A00800250200200840090800000000000000290 2802000000000000000000B028008020000000000000000000000000000008000000008000000000 00000000000000000000FFBDC7000201221200000004000000004225000000000000000480400400 00000000000000008288000000000000000000000000000000000008000000000000000000000000 00000000000000FFD17100000108580180000A0000118A0021000000000000080620610600000000 00000000000460000260000000000000000000000000000000000000000080000000000000000000 00000000FFA4A4000400C40C02800200000402A10080800000000000000300280A00000000000000 000130300148A0000000000000000000000000000010000000002000000000000000000000000000 00FFA6C500022020020C00040200001C01012A0000000000201220801010000000000000000000C4 0800028000000000000000000000000000000800000000410000000000000000000000000000FFE1 E1000001805000800000008000800001800000000000100200310200000000000000000018200061 2000000000000000000000000000000000000000000000000000000000000000000000FF83690000 01840001800020000020200401000000000000000048020000000000000000000000000200400000); SDR 8000 TDI (000000000000000000000000000000006000000000000000000000000000FF3A1700000000180100 04008018038015540000000000006006006006000000000000000000104800000000000000000000 000000000000000800000000006000000000000000000000000000FF778700000000590000000080 19518010000000000000006006006006000000000000000000034000320000000000000000000000 000000000000000000004000000000000000000000000000FF8393000001901801800000809C0190 10020080000000006006042006000028200020080000004800200040080000000000000000000000 080800000000004000000000000000000000000000FF5D4A00000000180100000080100180780000 0000000004600600E0461100203000000800000051400001A0000000000000000000108000001000 000000004008000000000000000000000000FF0EF600000180180080000080100180180000000000 0000600600C086000000000000000000005000008010010000000000000000008000001000000000 004010000000000000000000000000FFD93900000180000180000000800000000200800000000400 000401401100081000200000000000C0210000080000000000000000100000080000000000000000 000000000000000000000000FF993000200180000180200000000000000000000000000000000040 00000000000000000300000000000000000000000000020400000100000000200020000000000000 000000000000000000FFC5BB000000900000800001000C0090100000000000000022020020020000 20000000000000002000002010010000000000000000000000000000000000002000000000000000 000000000000FFBF2F00042040100000040000000040040000000000010010090010000000000000 00000000000000000000000000000000000000000200000000000001000000000000000000000000 000000FF6843000400C00800800400800800C00C0000000000010032030030020000200000000000 00002800002000000000000000000000000000000800000001002000000000000000000000000000 FFA61E00404180180180200180180180180000000000000060160060060000000000000002800060 00006000000000000000020200000280000000200020006000000000000000000000000000FFD9AD 00020020130000000500020000524200000000000040048008040000000000000000000288008000 00000000000000000000000000000800000001000000000000000000000000000000FF3445000000 80080080002080080080080000000000000028020020020000000000000000003020000020000000); SDR 8000 TDI (00000000000000000000000000002AE000000000000000000000000000FF904E0000541338540000 12104101954000000000000055055648655600000000000000000045000454600000000000000000 0000000000000004000000546000000000000000000000000000FF6F7C0000018018010000040000 01800000000000000000000610600600000000000000000000000000600000000000000000000000 0000000000000000006000000000000000000000000000FF4AE200002B88982B8000028818038818 0000000000002AE2AE0262AE00000000000000000020600020600000000000000000000000000000 000000000022E000000000000000000000000000FFC25A00000004590000014880982984D8000000 00000000600600E00600000000000000000015600400600000000000000000000000000000000400 0000006000000000000000000000000000FF75C50000818018018000000459018010000000000000 0060062860060000000000000000000060000D600000000000000000000000000000000000000008 6000000000000000000000000000FF80F1000000001900000000001B218014000000000000006006 00600600000000000000000010E80412600000000000000000000000000000080400000000600000 0000000000000000000000FF7E2C000301A01001800001001805A019340000000000006006006006 00000000000000000002400000000000000000000000000000000000000000000000600000000000 0000000000000000FF8DEE00002A0AB02A000601801809801C0000000000000062AE2AE2AE000000 00000000000020500430800000000000000000000000000000100400000000600000000000000000 0000000000FF3366000401825001800401001801C013400000000000006006006006000000000000 00000000680008600000000000000000000000000000080000000000600000000000000000000000 0000FF327B000154155054000001001901C010C40000000000006556556556000000000000000000 506004006000000000000000000000000000000004000000006000000000000000000000000000FF 57CF0000ABC898AB800000801CA180181200000000000062AE2AA2AE00000000000000000034E000 046000000000000000000000000000000000000000006000000000000000000000000000FF336F00 000040188000000080184D801810000000000000600600600600000000000000000003600024E000 000000000000000000000000000000000000006000000000000000000000000000FFF5E60000ABAA 982A800000801815A0100000000000000062AE2AC2AE000000000000000000204000418000000000); SDR 8000 TDI (00000040400000000000000080006000000200000000000000000000FF0D6C000000001801000000 00000180000180000000000000060860062000002080000000800000002000000000000000000000 10080080000008000000006000000000000000000000000000FFC4D9000001881801000000008001 80000500000000000000060060062000000080000000000000003880400000000000000000000000 00000000000000006000000000000000000000000000FF948D000000001801000000000001840001 00000000000004060860060000002000000080800000000000200000000000000000000804800000 08000000006000000000000000000000000000FFC16B00000000080100000000000180020B000000 00000010070068060000000000000000000000000001002000000000000000504000000000000001 00006000000400000000000000000000FF66EA00002580080100000000000180000100000000000A 00060060060000000000000000000000000000000000000000000000000000000000000000000060 00000000000000000000000000FFA68C000040000801000000000001840401800000000014140602 60060000000000000000000000018060000000000000000000000000000000002000000060000000 00000000000000000000FF8B7F000001800001000000000001800001800000000000108602700600 00000000000000008000000060000000000000000000000000000000002000000060000000000000 00000000000000FF9F0D000002001801000000000001800000000000000000010700780600000000 00000000000000040060000000000000000000000002000000040000000060000000000000000000 00000000FF3067000001801801000040000101800000000000000000000628600600000000000000 00010000001360000000000000000000000000000000000000000060000000000000000000000000 00FFD1EF000000001881000000000029800000800000000000080600E00600000000000000000000 0004000000000000000000000000000000000004000000006000000000000000000000000000FF49 A30001AB8AB92B00008A0AA0578AA00080000000002A82AE0762AE0000000000000000002A800024 00000000000000000000000000000000000000002AE000000000000000000000000000FFEE7F0000 800019000000A002802B800000800000000000000602E00600000000000000000008000401600000 000000000000000000000000000400000000E000000000000000000000000000FF9F3600002B8AB8 2B0000A80AA0818AA00080000000002A82AE2062AE0000000000000000002A800028E00000000000); SDR 8000 TDI (000002002002002000002003003002002000000000000000000000FFEA5D00000020020000000020 00000000000000000000000000000000000000000000000800000002800000000000000000000000 000000000002000000800000000000000000000000000000FFD61500040000020000020000000000 00001000040000000000000000000800000000000801000000000000000000000000000800800400 000100000000000000000000000000000000000000FFBFB200000002008000000000010000000000 00000000000000801000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFC43000010000400000000000002800000200000000 00000800000000000000000000000000000002140000000000000000000000000000000002000000 800000000000000000000000000000FFE00600002A88882A8000000000028000A880000000000002 AA2AB2AA00000000000000000000000020A0000000000000000000000000000000000000002AA000 000000000000000000000000FFA54700000004100000000000000000000100000000010010050010 04000000000000000000000000140000000000000000000000000000000000000000004000000000 000000000000000000FF67700000D595315580000000010180015500000000000015575565560000 00000000000000000000446000000000000000000000000000000000000001556000000000000000 000000000000FF0D3400002A8888AA8000000000808000AA80000000000002AA2AA2AA0000000000 0000000000000020A0000000000000000000000000000000000000002AA000000000000000000000 000000FFB59400000000100000000000002A00000000000000010010008010000000000000000000 00000000088000000000000000000000000000000000000000000000000000000000000000000000 FF0BF200012A8248AA80000000005680008100000000000002AA2AA2AA0000000000000000000000 002020000000000000000000000000000000000000002AA000000000000000000000000000FF87A0 00008191400100000000002800004800000000000000010060000000000000000000000000000A00 00000000000000000000000000000000000000000000000000000000000000000000FF7261000001 80000180000000008000000400000000000000000000000000000000000000000000000080000000 00000000000000000000000000000000000000000000000000000000000000FFF646000001901801 00000000800180000980000000000000070060060000000000000080000000000081002000000000); SDR 8000 TDI (020E00604600630020600E046406006000000000000000000000FF7D67000000001801201200800C 01801C01801801800000600600600600600200000000000484632004000400200600000600000600 6006006200006006006006006000000000000000000000FFDA6E000400081881001100811C098018 45801805800020643E814046002006000000000000004100100084000006000106000806906C1610 6000016006006016006000000000000000000000FFD105000001801801001002A61801A01A298018 01000040600600400600000200000000080400400000000480000600000600080680680600640000 6006006006006000000000000000000000FF06F3000000001D010014028018018018318018018000 0060070040068028040000000000008044A284080400000600000600000600600600600200600600 6006006000000000000000000000FF73DD000001881801001000800809801801801801800000602E 00000600000000000000000404400000008400000600000600000600600600600000600600600600 6000000000000000000000FF40E30000018000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF92AC0002018000000000000010000000000000010000000004000000000000 00000000000400000000000000000000000000000080080000000080000080000000000000000000 0000000000FF3733000000801800001001000800801A008808008000002002802002002002000000 00080280200080280200200200000200080600220200210000200200200200200000000000000000 0000FFE9F70080000000010004006000014000000000000000000000000000000000000000000000 000140000000000000000000000800004800000030000000800004000000000000000000000000FF C110000000800800800A00800860D50C008188048000002003002002802002000000001002002000 003002002002000002000003002002002001002002002002002000000000000000000000FFE91300 0001801001801A018018018018018018018000006006006006006046000000000006406000807006 006006000006000007006006006000006006007006006000000000000000000000FF456C00860020 10010010012000010A900000100000000018018000040010000000000000000000A0000001800004 000004001004004004004028004004004004004000000000000000000000FFFB1900000080080080 08008008008008008008008000002002002002802022000000000002202000802802002002000002); SDR 8000 TDI (06000006006004804006006004000000000000000000000000FFB760000000401800845140801001 C11824000005800000600608601602604600600014000200C00400E00E0064001000060008860040 0600600400E10E406084000000000000000000000000FF3FB8000401A01010811604814A15A01000 000011800010600620700600620600400000001204680A0064C60460400000063088060441070060 02D26206086004000000000000000000000000FFCFD20000018010018018808000419CD821801800 800000680600000601818000000000018600600018E2A60060060000060000161960071060000060 06006006006000000000000000000000FFB94E000000001811801800200403C21801801801800108 640608480E02182200000000000C42600400680E80622600000600108702608600600420E00E0070 86006000000000000000000000FF51CD000001E01C11C55824414049805805801815800000680640 400600240500000012000600E00C00600602600610000651001600E006106004126487A860060060 00000000000000000000FFD94C000090001C81C01C00400221C05801801801800100600701400600 30060000000000050260040061060060060000060000070060060062240260064060060060000000 00000000000000FFD865000101800905001201801841805801001801000000424680601600400400 00000000068060040000840020060000060000060060060060240260060060078060000000000000 00000000FF975D00041000080340100101981B809881801801800000402600600E00400080000000 00044460040000040020060000060008060060060060040060064068060060000000000000000000 00FF8EC7000401A00C11001001800003C09901801801800000400600A80600500400000000180000 4000006006004006000006000006006006006200006006006006006000000000000000000000FF8C 9800010008080100110104000190180D8018098000A2400622600E04C0044800000000CC10400400 60AE80C10600810600000780E00690640401605622FC0600E000000000000000000000FF45E90000 01881801401400C318018E1C0080180580012361E60B600E00600208000018000009C50081E0AE80 C09600800603818610E00700610006662620E00600E000000000000000000000FFEB0A0000000018 01005040C00841815840801800800000640E08204600400200000001100480404010600600400600 0006040416006236006000206006006016006000000000000000000000FFD7E0000101C018010052 40A01821815C11801811800001600640700685600020000000812E80622180080480200E00000600); SDR 8000 TDI (0060061060000A6406106006000000000000000000000000FF6851000200201A92551A408A521122 5810000223800020680611602E896A14824000000894A489408B0900914000000C0600044EB2E806 206C30CA7107006806000000000000000000000000FF1D98000041911C0000510441114280190400 0001800003600E00620642612628600000000408400040024040000000090E000006006214126000 016426536226480000000000000000000000FFCD76000200001800401800801001E0180000000180 00006006007806006004006000000004000000000000000000000006000806004004006000006007 806004000000000000000000000000FF1C3A000200001C0000140020100180180000000480000060 06106006005106002000000800004000808020084000000006001006002004806000004006006006 000000000000000000000000FF92C0000001801800401C0080100180100000000180000060060060 0600400600000180000000600000080004400000000600000600600500600000602E006006000000 000000000000000000FF37F400000000180000180000100120180000000180008060060060060050 06802000081006804000006006406000001806000006000004806000004806006004000000000000 000000000000FF810A000001C01A0000100020140100180000000180000060060060060040060020 0008100E00020080E80658002820000E02800608D004006000006046006004000000000000000000 000000FFFCE2000000001801201200C0040080180000000180010060060060068040060000001000 0600400600E02684400080000600000600600600600680700E006006000000000000000000000000 FFECDF000001801801401001800800C0180000000500000060060060268040268000000008072000 00016006204000801006240006204007006000806006006004000000000000000000000000FF417B 000000401C0100140080100180100000000180000060061060060041460000001000004040060000 01500028400016408006516806006006006006006006000000000000000000000000FF7EA4000001 80180100100080180180180000000180000060060060460040060000000000100064040000000060 00000006000006004006006004006006006004000000000000000000000000FF75BB000000001800 80100180000180180000000180000060060060060060060060000000020040040060060040000000 06000006000006006004004006006004000000000000000000000000FF70D2000001801800C01001 C0140180180000000080000060060060060070060040000000020068040070070040000000060000); SDR 8000 TDI (0001000002800000000800000000000000000000000000FF873F00002A0880AA0AA0880800AA2AA0 A80AA05200012A82A82202A82A00A00000000000002A80002002A82202A8000AA80002A82A92A82A 82002A82A82A8AA82A8000000000000000000000FFE95300025430215415214A52255415402A1542 040000540D50C50D509001208000000008A0C50900C40C50C5055000055000155055155055088055 0D50D50550550000000000000000000000FF84100004004424004004446446002000024004000000 00100100180100921100000000114000100111100108800000000000180000080000100180100000 0801000000000000000000000000FFA95500002A00008808A0080A00AA0AA0000AA0880000A202A8 3202A80604080000000000202000003082003002A80002A80002A82A82A82A80022A82A82A82A82A 8000000000000000000000FF36CE000200234A04A00A82800800800B0C0002208000002802882002 C02802802000000D028028028029528C200000000200000280200280288000300280200200000000 0000000000000000FFD2F20002813002412412212150000002402002020000894800814004908AA0 0000000008088B490092080080900000000400000480080000480100000400400080000000000000 0000000000FF751F00000100183180B8AB12B811A0B842000015800001641600E00604E216206000 00022E08400042630E206000000006000006106006006000406806C0600640000000000000000000 0000FF7DFF000400C00880CC0800800E44C40800000520800000304330280B503123102000001002 00B00108302302220000082200088B2130129430210234030C3952080000000000000000000000FF 0E000002202000001273202A24480022002002400000810808881228C00A48020000000800890880 800800888C00000280001020101208220A48C08820041100480000000000000000000000FFD4D200 000180085900820114101280084000012280000024120130023020024020000004132020202A2462 0020000010020013064A2002002000002002002022000000000000000000000000FF8CD900000180 14004C008000008040400000001580000000061000100D0084000000000008104000000000604000 0008480000012080008C0020200201228211200000000000000000000000FF798A00000180840001 001660802400000A0000000001008000400800020030380000000000020000500000040000000000 000818010011800000040080480040100000000000000000000000FF3E4000000188198200104001 50000710840000010000A2604680E00600E5040040000000C400C000048390004000000006000006); SDR 8000 TDI (16006000306006004046000000000000000000000000FF5CD6000001801801011004800141840844 800001800011602402600600600601600000000820800220040028400000000000000640600E0060 00006116306006000000000000000000000000FF2609000001001801001010810001801000800161 80006AE0040041060060060460000400001802B20100A000C0000200000000060060061064820062 0E086006000000000000000000000000FFF89E00000081180102100080000B915000800001810002 61040000060020060860080000000205400000D001400002000000000E1060460061001062060260 06010000000000000000000000FF46890000018100000400020000B40B4020000100008000002004 00000000001080100000004500104102003000000000000000102000201004000000002400000100 00000000000000000000FF4AE9000001800000094010010004000000000001800000000620010005 40000040004000200000000000000001400000000000000800100000002400400000400000000000 00000000000000FFEAC7000002000021010030010001801805800000808000210A00232200200204 20000400920020000022320020000800000000021060120020001021820820020000000000000000 00000000FFAFBF000401401440401407401400400400400000000100000100150800120000000000 00410010000000000011000010000010050010110010010010010010050000000000000000000000 00FF53FA000402400C00C14C40C10C04C00C00C00000808100200B00300205340200200040010300 30000020020030001010000010030030030030014430C3003043000000000000000000000000FF70 88000001801801901811001801801001000001800000600640605600600600600000000600600000 6446006020000000000006106006006000006006106006000000000000000000000000FF16380002 012252014012013152010010412002820000004800920004888A9480000000080880080082080080 0000000800000804804004804C03005004000005000000000000000000000000FF3D400000008008 00800842800800800812800020800000200240A0020020420020000001020022001120020CA00000 0000000002002002002000002002802002000000000000000000000000FF5F050001AA0880AA0AA0 880300AA2AA0800AA1080000AA82A8110AA82200000000000006312A84002402A82002A80002A800 02A92A8AA92A80022A82A92A8AA82A8000000000000000000000FF67FD0000800304004004000080 002004800000D0000101000000000041080800000000040810000200808000000000000000000100); SDR 8000 TDI (006000006006006006006000000000000000000000FFCB6400002B88D88D8890880840AB84180180 00AB80002AE2A63022AE2AA2AE2AE00000020E3060002A62462260000000000002AE2AE2AE2AE000 2AE2AE0042AE000000000000000000000000FFEF1800010004180180100005000191180280000180 0000600611600600200600600000002600600400E02600E000000000000006006006006004006006 414006000000000000000000000000FFE3100000018058458450430028018230A880000180000060 160260060060060060000000860AE000006096106000000000000006006006006000006006144006 000000000000000000000000FF345F000000001803C01001040C43801A0080009380000060060060 0600600601600000010600680404600E016000000000000006C2E006006A04006006004006000000 000000000000000000FF3228000301A01241001B05A9388980080080002180000060060060060060 0610600000001030E4001101462A4000000000000006086006006000006006004006000000000000 000000000000FFFD2E00042A0AB0894ABC29C01C05AAA80080000180002AE2AE2AA2AE2AE2AE2260 000003204270062002060040000002A8000AAE0062AE2AF0062AE2AE2AEAAE000000000000000000 000000FFB327000201C15205201A00B0520180000080000180000060060060060020064560000000 46210900046028006000000000001006106006006800006006004096000000000000000000000000 FF0D42000154555535155920809041B5480000011580005565565565565525565560000004160084 045464D0016000000550001556C46556556404556556556556000000000000000000000000FF4CA9 00002B8418A90A3084848889ACDA008000CB80002AE2AC2AE2AE22620E08600000021614000020E2 0000E0000002A80002AEA2E2462AE0802A62AE2AD426000000000000000000000000FF8118000000 001A010010128A4891A0180080004180000060040060060020060060000000261400000160002A60 00000000000806116006006000006006005806000000000000000000000000FF7EDA00032AB01889 011250A820C780000080000180002AE2AC2AA2AE3361C60260000003200260003803865440000002 A80002AE0063362AE0000162AE2AE00E000000000000000000000000FF70920000010518054810C2 840401840800800021800000600400600608E41600E00000010030E8000000262A40000000000000 06C16086006900056006006486000000000000000000000000FF14B700010010384102D010810031 88C80080009380000060040060060060463060000000080001000280100140000000000000061260); SDR 8000 TDI (6030106006006006106000000000000000000000FF06B800000100180180184580100580B8000018 4180000060060040566A600602603002000208040008020000000002010600000418604600600002 6066016006006000000000000000000000FFCDFC0000014118019088808000058410200012018080 00600401700601400000620000010600202800C00028E08000100600081600600600600810700E40 6026106000000000000000000000FF9C6302004100184180A8008108010410000010018001406007 00600608504400600000000680000000000000600000000600800400600740600000600680600600 6000000000000000000000FFB4470400410018018140448000018210000018418001007804001006 00402000200000000020200000400780800000000601100600600700600000600600600600600000 0000000000000000FF675A000003001801800000A20205A01000201C0180004068A61850C6404004 0060100810022064000060060088000609060011FD00680740600080704701700700600000000000 0000000000FFC7CF0000054010418000010488010000000014018000006145002916103002006000 08000100200400400600080000100600000608602600600400700700680600600000000000000000 0000FF8E3F00000100100180002B242A012100440018018000006806020006140002002000000102 0460001160C6000000000806000006006806006001006006006006006000000000000000000000FF F3EB000081001001800001801001044088201201800000600430A00600A004006000000816102004 044010006000000006001005006006806004007007006006806000000000000000000000FF4E5600 012B0AB0AB8AA0818890AB0C0000001CAB80002AF2AE4002AE2422AE2AE000000266358004200200 2AE0000000060002AC2AE2AE2AE0042AE2AE2AE2AE006000000000000000000000FFC8F400008000 1801800001808001800804001001800000600C00E0060060020060000000360220060AC08E00E000 000006000004006006006006006006046006006000000000000000000000FF8CB100002B0AB8AB8A A0A38A88AB0888000010AB80002AE2AE0862AE0842AA2AE0000002862060042AE3262AE000000006 0002AC2AE2AE2AE0042AE2AE2AE2AE006000000000000000000000FF658600005413195195415592 015590A93000155580005575444425565565505560000005064120044044064A6000000006000554 556556556004556556516556006000000000000000000000FF03A700000100180080001180400100 49540010018000006006050006414000002000000016006000006016006000000006000004006006); SDR 8000 TDI (50000800000000040000000000000000000000FF1F8E000100000548020002200000000000000200 00000000000100000800B09300000000200900008480D01000000008000000008010000004000008 00001001000000000000000000000000FFFDB3000000000000004040024000002000000000000080 00002200000082004000000000090002000800000080000000000000000000008000008000000000 00000000000000000000000000FFAD4080002A8AA8028888888888AA8A88000AA8AA80002ABAAA4C 3AAA2220030020000002832320002022022220000002AA0002AB2AA2AA2AA0012AA2ABAAA2AA2AA0 00000000000000000000FF2B290000000230000010540102000050000004000001004C4035100500 084080000000000004C0000000000800000000040010008048050040010050040050040040000000 00000000000000FFA54A0000D5955C01951153D41955955000155D55800155655600E5564CE11648 E000000446124201016516526000001556000D56557557556400557D56557D575560000000000000 00000000FFB8C00000AA8888AA8A888092282C8888000008AA80002AA8820022AA2AA08A2AA00000 008208200050A22222A0000002AA00004AAAB2AA2AA0002AA2AA2AA2AA2AA0000000000000000000 00FF7AF30000000000AC00200000A200001000000200000100000008100100122082000000009020 0000520020008000000000000000000001000000800000000000000000000000000000000000FFC6 6C0000AA8890AA8850828809008E80001F48AA80002AA0120022AA0024232AA00000065262210024 23922020000002AA0007022AE2AA2AA1002AA2AA2AA2AE2AA000000000000000000000FF39010000 0100000100C030049102004000002201800000004628000011001000600000003000400208400814 8000000000000090000000000002000000000000000000000000000000000000FFCDB10000018240 000200000020500000000100000000001A8805000024050000000000008009008004804000000000 0000000020000000000100000000000000000000000000000000000000FFAC620000010018018010 01801001001828001201810031700401000601400100204002010000201000440002000000000600 001600600600600000600E206026006000000000000000000000FFBF920000010018018010018018 15005800001E0180000060041440062A42060A640000000210014015000010000002000600000608 6026486020026046006006006000000000000000000000FF961A0000010118019119018010098518 08001801800028E8040A000600620408600000000000208002419843010000000600000600602628); SDR 8000 TDI (207113114006306000000000000000000000FFBC96000000505940021811A13801A05A0180120180 0000600600600680680400400000680410000080080001E0060060060020A288680E006200806002 006006006000000000000000000000FF05E8000100001800001C4084000980980181100180000070 0E9060060064560040008000010440800C405000600602600600288A106016006208006022006806 006000000000000000000000FF3702000000001800021801802001801001821001800002E0060040 8604600000000000600400000000C000106006006406002026006006006100206002046006206000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF1B2400000000000100000120000000000000100100000050000040000040000000 00000004800800001001001000001000000000000001000800001000004000000000000000000000 000000FFEB8A000000001000800A00800800C00C0080080080000020020020020020020020000020 0200202880200222202202220208280280A002002028002002002002002000000000000000000000 FF3F7C00000010040040000000000500000000000000000008000000000000000000000400000008 02000000000000000000200000000400004802000800000000000000000000000000000000FFA785 010000000800A00E18A0080281080480480080000120020620020120020020006328626020004020 020020020030022FA00200A243002000002002042002042000000000000000000000FFA942000040 001A01A01801801801A01A0180180180000064060460060060060060000060068060018069068068 06046006004006006006006000106004006006006000000000000000000000FF4833000000001000 00000020000140800000000000000000048018040000000000000008000000008000000040040040 05804000004000004000004004020004004000000000000000000000FFD767000020000800A00A00 800800800C0080080080000034020220020020020020000020028020000029020020020220020028 02002002002000102002002002002000000000000000000000FFDA2D000000000600000000000000 00020000000000000008008000000000000000000000008000020008000000000000000008000000 00000002000800000000000000000000000000000000FFD222010000100000000000400000200004 00400000000100000000000100000000000100000000504000004400400404000010010000400000); SDR 8000 TDI (E904006002006000000000000000000000FF687C0000001818018A100320180190D0018018208000 00021600500600080400000000680604E20086600600600600610610500440608400E00000E00600 4006006000000000000000000000FF451D000000021801801001003B418A38018018488000000006 00400601080480208000E0240260040060162C72A61060060040042A600504600408608400408E00 6000000000000000000000FF41130000040038528094312018918018018048050000000016804087 800007A13800006006006024A120C784600611610E554554016000446005A4600700580600600000 0000000000000000FFC37D000080001800901001011801801C01802801800000001600D206080826 00200100682509640420280631720600600600510408630100600400702400400710600000000000 0000000000FFC98D000100001600001001801841E01A018018018000200006806806000046004000 80010680400440281004E00608780600088400608402604400682600400680600000000000000000 0000FFBABC00000002900000122188090180100180584180002000062164060102040860010070C5 00040400A004406406006006000004106006006024006007806006106000000000000000000000FF 29E0000000051000081241D09A01801C018008018000000817404007101406100000006000096000 008006106006006006803006007204006000806000004806006000000000000000000000FF7A9C00 0000401000201015800801881803804803800040080E004006020006002000006014896004810006 086806006A06003C0E006886806004006940006046126000000000000000000000FF0D7001800000 1800400041841181C05811181043808020006601600602600400400015620900E200844D0708718E 00F25E60438C1070B5186800187002004026026000000000000000000000FFB62000200055191402 44018110018299410010018080100086004006116005900000006404206440084002016016056006 0B6026016040047008016012554006006000000000000000000000FF4A7100400004180024301584 1C01941145802000800008080E00E006006004006000808806D04020116901006006806047140024 00600602600900E042A27006006000000000000000000000FF6574000000105800001021821811E1 580185000000000000161040060062440020000060040C010114680808600604640600200F006002 006011007022047006006000000000000000000000FFF60C0000803119B4401A4981980181581180 1241800002E10600608613600E104000140000004000048420016007046006010000116014006080); SDR 8000 TDI (420A6346236000000000000000000000FF7BCF000000401001001801801801801801001801800000 08060040060060020060000000040040000000000000060078068060020060060060000060000060 02006000000000000000000000FF659B000000001001410889801800C01801001841804000900600 640600E834004100003006002000004A0410042600610680601200600E0060000070028062060060 00000000000000000000FFD1A1000000401001000C01C01800001801001801800000000604600600 6001C040000030068020004070040000061060060070020060060060000860010060068060000000 00000000000000FF9615000000200001400001A01800C01801801801800000000600400600700410 40204400041000008841320460068060061465160468060060000078020060030060000000000000 00000000FFB798000000000001000811801800801801801801800001100600408601600000400848 42848000280002AA20608E00702E1465B720E0160060000060000060020060000000000000000000 00FF3A26000000400801E00281801801401800001A01800000000604600600002650604004600010 6804504B52846026107006006800026006806004886002006206806000000000000000000000FFFF 0C000000000801801819801800001A80001A03000000028602400600002680620000000006480400 0802006007006006086810006006806004006022006002806000000000000000000000FF4D540000 00001201811C01C01801001900801844804000150604600600001000450008600200604C80453510 011600604E006143016806006005006804006006006000000000000000000004FF7FDA0000000010 01801801801801001800801800800000000600428600004200601000048200400400600440020600 6106086002406006006004006024006002006000000000000000000000FFE1800000000000000000 01001801801800801801800000000600600600000600600000400600000400400600600600600600 6004006006006004006004006002006000000000000000000000FF95240000000000000008010018 00001800801801800000000600600600080600600080000600000400600600600600680700600600 6006006004006804006002006000000000000000000000FF60E8000000002854130053805B018298 00001801800000080600600600000480408000480680C0064140060C6486016006056D0400608605 60060C6004806112006000000000000000000000FF962D000004040800600001801810001E000058 2D8000000C0600510600000041400000C0420044200060C640602608680EA0605614E00640600040); SDR 8000 TDI (908D50D50000000000000000000000FFAD5D00080040040844054A42000000000040040000010010 01000801001080448000001141109001001501001000800001001501001010801001000101000001 000000000000000000000000FFAF4300080028808A0880880A20AA0000A00A800800002282A80802 A82A00002200000800002A0000200200AA82A82A82A80300002A80A02A80002A80000402A82A8000 000000000000000000FFC147000000000C40C00A44A00A00A42A10A00A208000903002C12002802A 0289200124290280A8008828AA002802002802C0B08A802C02002800802C0AC12802802000000000 000000000000FF760600000024320124520021100030820320428200008010048200048108C88000 0080CC34804902848800800004005004904C248048140049020049248C4000804000000000000000 000000FFF9F60400000B108B0951038818A190188B15580180000460264868064060D64960000040 2E04C00202E03600602600600610644C1060AE0060028364CC286946126000000000000000000000 FF860F100000400C00820C50812E10C42820C00C4C800128B20303200B0834030020005034835030 09303283332A8282A23240300200A203A0B00020300202320B402000000000000000000000FFA987 0000002432A024420022008224A2203002C00000818820841208900A00810000A00A10D80808B00A 00400500010C40B00810080C094388200A0800808500708000000000000000000000FFC1BD000000 100901C19000A01900800C0101C824800006204200300200251A00200110208002A00245A4221C28 0282301240268280205220600200201282205A082000000000000000000000FFDE17040000008008 00000409C20000008004180180006060801140204060E00000004800200100200840812190408400 08020000A281A0000001000400441281020000000000000000000000FF65E90000000000160021E0 20005012420200001000001000002A0010020000000000008C000000100001000008888808810000 28111A00000001410108A80000000000000000000000000000FFE5ED100000010001120811901820 081955881800000000040640488600600072000000214C24600000405000022600600600E0420060 06006000A462E2106024046000000000000000000000FF25690000004084A9201A01891AA0341885 A91AA08000C010C6C4409684692A82600090229530C8309008008880AE00608EC468828264B72368 0030689240E817106000000000000000000000FF5CE7000000003405054AA1A41805C15C41001801 800002800608424600620140400021004404600221432040020612600600EC4A30E0060060220262); SDR 8000 TDI (4016382000000000000000000000FFD0E60000800418448000018000140118018010218200046316 00400600600000C00000600000D10800002001620600602600600202E00200704040600240600600 6000000000000000000000FFDB3300080000000002004000002A0100900000400440408000040000 0400000104000000000304D00100804000404000002000002C002800042022000008821000020000 0000000000000000FFB05F0000000000000030050000000000000019018000016308304040206210 00040044000000000800824022000002000000810008004000040048011008004000000000000000 0000000000FFD9C6000000041844000800800800C060028008048000042112002002002002002080 00210210200000240201200201200228200001A10200600002246200200200200000000000000000 0000FF319F4008004004214010004004000004000000000000001100001008000020000001001009 000010000001441001009001021001001001000001001601209001000000000000000000000000FF 97F2400000400C00C00800C00C00804C008008008000003002403002002422002081403003002800 002043003003013003153003003003002801003143413043002000000000000000000000FFA23000 0000001821003005801801801003801901800001620E08605620601600620004401600600200E206 00600604600620610609602600620254600C086006006000000000000000000000FF114D00000020 12052032522020002002002222120000800804800004810910010000015430810A00880810804804 004004820844000888004800800044800001000000000000000000000000FF036700000000084883 08808808008018008088208000102002002802002442002000242102302000052342002002002002 102512002002002000002912002802002000000000000000000000FF48F80000000AA08008000002 82AA4AA8AA0D00C000003382A82A82A82B00102A00001800000200002000002A82A8AA8AA8208000 AA8221AA86002A82102A92A82A8000000000000000000000FF735A00080000000200000002400040 000800203000000880004800000082280A00005080000A8000000111001000000000020088000041 000000000088400000000000000000000000000000FF4DDF0000000AA0A20920001122AA0AA2AA08 208A00002202A82A92A82A02401000004282084402003300282A82A92A8AA82B00302A84C02A8000 2A92202A82A82A8000000000000000000000FFEEB400000035435035435231035413432235030400 00C40D50831550D40900A10000840CB0C00900D50C20550551551550B00C40D50A90550900D50C40); SDR 8000 TDI (14404000000000000000000000FF2BC60000000018058848418018938B5891800801800000000601 600601010608E00030404602A1041060C60060060060060065241300320061040A81260060240340 00000000000000000000FF6348000000031804A50001801A0590180580080B800000000600600601 041604600029443604AC040961060AE006006006006044000002006C0400000C0062840040000000 00000000000004FFD451000000001A21902801A01931235A00001821800000000600600600010621 60000400841000044440360060060060060061140040068060040041060060040040000000000000 00000000FFE35000000028388D8000AB8AB8010018A88AB88180002AC2AE2AE2AE2A002608600000 00042010040042062062AE2AE2AE2AE2142AE2AE2AF0042AE2262AE02C2AC0000000000000000000 04FFD7CD000800003C42410841C01C01401840800801800000000610600600000602600008201640 48000020C0046006006006006044004000006800004400006046006000000000000000000000FF6B B3400000151D50514155955CA503595495491580005545565525565404364C600000A42251420454 24B0446556556556556506556550D56204556488556106556000000000000000000000FF56D60000 004A98888C088B8AB8AB903C908AB09380002A82AE42C2AE2A61342140002142A60AE0002B220828 E2AE2AE2AE2AC0062AC2AEAAE0002AC0222AE28C2AC000000000000000000000FFB3A80000006038 00820001801809081C00801021800000000600400600E08400C0004C608A02600201200008E00600 600600402600000600600200002200622E006000000000000000000000FFD03F200000081A888068 810AB801851A848AA04180002AC2AE0042AE2B64821060000442040020000042062262AE2AE2AE2A C5162AE2AEAAE0002AE1922AC0042AC000000000000000000000FFEC48000000001840AC0011801A 4180185480012180000040064140060060460860000060C440280044403608600600600600420600 2006006800002402004086006000000000000000000000FFA2C70000000358048088438010958CD8 0180100B800000200614400601640E44E00034C0140B600009010000E00600600600412800400200 600000404A00642C000000000000000000000000FFE2FA0000000018008200018110214019098010 0B800008E04608400603600640602800E08804600000028050600620E0062040003060AA01600000 632214E206402400000000000000000000FFA5710008800018008008418090009E58018010098040 4862260C401E00E0002045A800C00C10444061003808624618602600666000600018E41804608222); SDR 8000 TDI (106200000040000000000000FF94DE8000800018A0821831A0180183180180180180000002100260 0680400600000000002400600100008A0008029060872A040248E00400600010600400400E006000 000000000000000000FF57F780000000190084180180100181180180180180000101000078064060 0200020840020600000000E006007004007806006003806007016040086006006006006000000000 000000000000FFDC28800900101C00801C41801581801801C01C0180010088008070072040020002 08018A4460000010E003017004907006046403506004846021006007405007006000000000000000 000000FFD162000000001221800810C00801821801C01C01800100121502680780200C0000000000 0200000500608810601500608750202080F086006005806007806017806000000000000000000000 FF25AE00080000110D80080188B80193584580580180002410040B600601220600000010890A0202 0002611300700400600600200002603600600002609400600630E000000000000000000000FF5696 000000001041800A00840A49801801C11C0180010800054060060020520000000000000960040080 2600200280680600210609610480620450E044005006006000000000000000000004FFBF75000000 0AB0408AA8AB91588390188D8E1AAB80001182AC0162AF2B04822A80002202203060042802022A82 AA2AE2AE2AA33E3062442AE4040462042AC2AE026000000000000000000000FF0D46000800001021 850801841849801805A03801800000800600600600A0060000000200900D60840060000060060060 0614601400E1040060044B6304504006036000000000000000000004FF95350000000AB0898AA8AB 8218A98218A988B8AB8000A202AE2262AE2A01262A800022009020620434628A2AE2AE2AE2AE2AE2 2602E28C2AE0042862AC2AC2AE286000000000000000000000FF6EC50000001551119038B5915905 8CB951B51D5580014C05565565575425325100004104444060044CE54855655655655640E4A44462 4455608400600E054156406000000000000000000000FF5030800000001003801001801803815801 80180180000000061060060000120000001104440560000160220060060060060060062060040060 00016006004006056000000000000000000000FFC7F30000000AB8840000018898010018018A98AB 80002282AE2A62AE2A020624600010428E20000020E2062AE2AE2AE2AE2260061040162AE0000040 46006404184000000000000000000000FFF2A4000000001849050895843841001843803801800008 000600600600002E02600005400608000404600E00600600600609601640450600600440440C2D63); SDR 8000 TDI (0000000000000000000000FF5A9D8000000AAC008808088088AA8018AA8AA8AA800022222B2AA2AA 2A226200000000028220220024200A2022032AB2AA2222A22AA003AAA2002AA2222AA2AA2AA00000 0000000000000000FF54E580080020500140420A00000101400140040000010010808010050B0100 0000000000940200000105510010010050042300A400404100400000800402000400400000000000 0000000000FF012B910000155915151843845D558CB555D55D558001556D4E557557D46506000000 0004044160004172AE456D5655655650640D55612655600055645655755755600000000000000000 0000FF97010000000A80AA850CA08D48AA8208AA8AA8AA80002AA2222AA2AA20200A000000000202 30A0002C20024322322AB2AA0022022AA40A2AA0002C225200A2AA2AA000000000000000000000FF C02E00000020002020409011000000000140040000010000008008000080100000000001280C0400 0800008800008000000300C0000209004400000080000000000000000000000000000000FF88B100 00000A90AB9008808888AB9000AAAAA8AA80012AA2322AA2AA00244200000000004220210020200A 10A3022AA2AA1020122AA1022AA1000221885022AA2AA000000000000000000000FF88FD00000000 4001050008000000000000001C01800000600000600148E4C80000000000000B0100008224540108 0000000400A00004D0000100000000420000000000000000000000000000FFA25A80000000000008 404402200013400040000000010001088000000400000000000003480000000A0080000020000000 490210000000000000308420088000000000000000000000000000FFA9B400000000180080180000 0003841801D05A09800100400702600688600600028020000E00800009022E04200010600601210A 02600E086080046002116096006200000020000000000000FFE31100000800180081580000002189 1951811D0582804840060860070240065100001000841202A8040002000290006006080202506002 426410014120406006046040000000000000000000FF81A200000010180080190180193388580180 1C09828029407609600702600600805000008A0882A80201AE012000016006086002086002026000 00C0A220604E106020000000000000000000FFE0E2000008101800809801801809801821A0980380 0100C10602600608401600008048000002000010000211829000E0060062C2006100256200004002 484006026000000000000000000000FFE982800000101800805881801881833909D05D0180010008 1100E00600600628042820000600600008840604200A10600601001242700E8861110460048160A7); SDR 8000 TDI (06000000000000000000FF1C1B00000000180182D900000001000005811801800000220000600600 400400C0080020160060401000000800061060060062060060064060001020220061060060060000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF0008000000400400000000000200200000200001000000400000400000480000000000 08008040000000008000000008000008000010000000008000000010010000008000000000000000 00FFF25F000000000001800800800800800801800800800080200280208200200200200000200200 20000028020028822A2022002000802002802000000802002002002002000000000000000000FFA1 1C000000001000000000004000000400000000000080000080000000000000000000000000023000 0040000000000800000000000000000000000000000800000000800000000000000000FFFE040100 00000C06806900800800C00C06860A04800006200201208200300240200010311300202041A02204 3082082002003912003003002000003002052003002002000000000000000000FFAA320040000010 01809801805E018058092058018000006006006006006046006050004105006000106806C0600700 600701600690600640600000700C006006006006000000000000000000FFF2460000004010010006 00000000000001000200000000000000000400180020000180400400020800000180000400590480 4184000005800000104805800004004004000000000000000000FF89D9004000400800800800A04C 00802A00802800800000200200200200204200202800210280200010280240200300208200A00210 2002002000802002002002002002000000000000000000FF94D60000000002000000002000000002 00200000000080000000180000000000000000000000000000080000000000000000000000000020 0000800008000800000000000000000000000000FFAE650100004002000081000040000000082000 04000080000001000000000000000010011000000040000004000044004000089000000000000108 0000050800000000000000000000000000FF3E140000000005080241200224000B44004004000001 09010080100001008800000000002803000014008012804800080000000100034000000000000800 0800000000000000000000000000FFFAE01100000000420080041000000000000000000000000000 00000080000000000000000010000001122000010100000011001000000800000000010000000080); SDR 8000 TDI (000000000000000000FFC1390000841416498018018094C1A01811A81A4000000460060004061060 0600400000000100400000601641620648610609620000610F006424044004206806006006000000 000000000000FFFB87000000001009C55801801009841802805800000001700604040E8AE0060040 0000510010600410601680648608E026006010504207004025005055002446286006000000000000 000004FFC928000000000001A01803E01C01A0180180980000009068060002860064060260002000 85084000002004200086116426006020A86006006024824804A06806006006000000000000000000 FFAECD00840826000184101980D80189EA0080D84000008020021800860162061A60808260150180 0440062500040680628608629080750E71E414104015006406106006000000000000000004FFAC89 008008005209815800009C15121805801800000001600602000F1440040060800208060040000870 48006006006106086484005816004000804022006846C06806000000000000000000FFB01C000002 005003813800801801803A00801800000040600602200600600600E0018060060402042460000060 06007807907406004806004004036C2A006006106006000000000000000000FF0D04000010410801 841907DD1585B93D81800019800001601E00200600400600E01018413400438092684212604680E3 1E01606310606695698002EB08004416686006000000000000000000FFBC2D000000040811900801 001001001820A0010184000060460020060040040260000100460060200060828260070164260071 0600600720700040600204408602E006000000000000000000FFEC13000002420E03A0DA81801001 C10801800001820040280204200600680680600880B100004021C03124080006006006106A020060 0640E0000060C0001017007006000000000000000000FF220F000000000801801885A01315803844 A00005800101600601200620E22E00600000300A286008080004800086006086106087C060060862 01907082020006006006000000000000000000FF19B1000010215819D43801AD04058A10C1A0B901 800001604600202600600604C0080A00340442A010200282004680614681610018700694E0014200 20844DA68F6006000000000000000000FF3ECC000000201A01829800D00011805818881801800080 623E00204E416006004001048006026000800002880006886006E0622C10E00E31600004000280D0 47146006000000000000000000FFE4CF000000001811801A05800103941920C83805800001682601 6016804C5680400009304454451000280004010600608608694CA1600F00620000090204E0060060); SDR 8000 TDI (0000000000000000FF9C9F600001000401000001801801A00001801801800180600600200E004004 00800000080680600004640200400600600600700600200600400000200200700600620000000000 0000000000FF8858000001000800A00801C058018006000018018000006806003006004006420000 028400006020C12806156406006017206106541C0680601000300200600600600000000000000000 0000FFE06D000001401800801801901C01800001D418058000006006002007204026000000000080 2862A82C20870840860072BE0061C7D00026006201802002006006006400000000000000000000FF D4BA000001000A01003801803C01801C0200B800000000600600000E006004450000050C00000044 412404156406006006C04004026204000014000800006802006000000000000000000000FF215E00 0001018801007801841801801801A01A84002000600600000680400E220020060000000000802004 02600E00E006804004804814000000100030006002006000000000000000000000FF8DB800000140 0C11C00001A018018018000019000040006806000446506124440040101406500324484882946106 007056006106006006804404817046807000006000000000000000000004FFD99C00000100080180 1901801801801801801800000000600600000600600E00000000010600200800600200604E10E506 206006004026004004006006006000006000000000000000000000FFC87400000180000100000180 18018018000018000000004006000006006004000000000006004004006004006006006006004004 004004002004004004006006006000000000000000000004FF73E7000001800401200001801801A0 18018018000001004006000006004004000001000006804002806004004006006006006006004006 006806007006006806006000000000000000000000FF434B008008400841808801811B0180180100 1840000008400600040600600400000000000E088004006016836406006026004004004814002004 004004806026046000000000000000000000FFDB9600040404081180180980584181181080180000 000450061010061040440800001011060000008060C620608628610648E446104086106C20046016 406806006000000000000000000000FFE26F00010011F401806805001401000840B61A0000000020 0200000600400400400100548008C1000160A680608600600620610208600608600001F00C006026 01E006000000000000000000FF2D89008008605001A0880F807005A09C2100184000009868060808 0700602608400148521800008640E0064260070060260060E2004106104416146004402006026006); SDR 8000 TDI (00000000000000FF4CEA000200C00A00AB4940C04D08B14D40A00A008000802C0288200282200201 00004414C2A02A00A82802932802002802802802C228028129008020428028028020000000000000 00000000FF8CAD0000012014002012092002422000152002040000800914C30004C0888880000109 10089008008088B0800004004004001048810000C04801154D0C94C8000048000000000000000000 00FF14380000A90238818C102189188994384D00390180001060C600680610600600000021040600 E00840600601601640608E02E42634610602E10012442C046406A46000000000000000000000FF58 C4000400888C10800800C00C00C08B00D00C20800122320B41200321304240000000102322300104 340330380280A803C8309300385330300140308231312A10A000000000000000000000FFB6D50000 400132802032612002203044492802000000D40800880800D10860C00000808800C08800A00C00D0 0009081080008C08A00290810820E008108007810D9200000000000000000000FF87EC0001018401 20C20C00800808848D10800800800000220201200200A00200000020004A0D200000220A02220300 3002302002162022400100022022822012002000000000000000000000FFB26F0000004000001010 80020182020001005101800000000000E00022028000000040000000001044002000102040031887 0100001000240200080280488864700000000000000000000000FF55B70000105A40100C00020800 000102A400004200000004504210A00800000000000B04000002000A008028889081800008021000 0148020000108100010009800000000000000000000000FF42ED000001000801009A099198118818 00901081800002412600280E00400400000000028002200000000001600620600640204640600210 4000042442346006026000000000000000000000FFCF6A000401200B01201929A89B05A49949281A 85800084544692A036CA4A46000000548A908B2A00B02D00916016316A0E802C06A46912A04A4084 2A42886C06206400000000000000000000FF181A0000011442418B3805C21831881A00001C018000 00400600288600E086000000000000006000020048246326006106ACA00E00222204400031288344 E8CA14E000000000000000000000FFE96A000001600001201801801801A018018018018000004006 00200780600600000000080080600200200080400600600600300600000380400200200200600000 6000000000000000000000FFDA87000001000011402101CC18018000020AB8078000006006002446 10410400000010040600600000400280604610600640602700281600400091201200600600600000); SDR 8000 TDI (000000000000FFFF220000A8001001000000002080004004000001800000C0000062100040000000 00000080010000204204080404088140080208400000500010200220440080000000000000000000 000000FF344F0200000038A0808803C00400104805800900800000200200A1022220000082202000 0204000000252200200200224A602002000540400080082400002012082000040000000000000000 FF298D400C0141C54040640008000040040000000000006010000010114090000004010090290010 80000080001001201401009401081221001001001001001201101000000000000000000000FF9075 400400C00C00C00C00880900C04C0080080080000030020030030030000000212090530130820021 02003003503113213003103003103113103003443003003000000000000000000000FF32B5020151 801001809805805001001803801801800000E00600E2060560000080000001040060004064460862 0601602608600E206226206000404226006286006000000000000000000000FF4FDF000001215200 3240094444000802412002040000850A208A00048000000000014008CC904A029408008100010048 0400080880480480480280C844D20000800000000000000000000000FFFC03000000840800810804 801801A4C892804800800048211200A8020020000000000B00022021000121320A20020020028022 C200200200240010210200A002002000000000000000000000FF2EB60000000800AA0000F00888AA 8101000A80A800000000402102A92A9AA82A8000000210528400200200201AA82A92A82A80102A82 A82A8000230208110AA82A82A8000000000000000000FFC53E000800000000080002002008008008 00200000000000000800002300800000000401402C02002400800000000000000002000A90001000 00308248000000000000000000000000000000FF798A0000000A20AA09210008A0AA4C400808A0A8 00003002902802A82A82A82A80002102C10400803302082082A82A82A92A80202A82A82A82002202 40000AA82A82A8000000000000000000FF7B7B0002003523542145503302C43002C43303520000D5 0CA0C48D50800230450000310A09008880910C40D08D51551550D508B0A00550C30900800900CB0D 50D50550000000000000000000FF7DBA000800410400440004420400000442440404000102900102 10000000000000010A10000110030011211200018000000014810010010010031011094400010000 00000000000000000000FF3BC60008000AA0AA0402020A80000640000AA0A800002A8030000AA818 02203A00000000000280800202102402A82A82A82A82800802A80A00002408002002A82A82A80000); SDR 8000 TDI (0000000004FFF1360002210310030B4001A01801A01B458018000000006006000006006000000000 00010010E20000602600600600600601600202010428C20011210400611400600000000000000000 0000FF62F4000483201A814400AB8098098A90018AB8A800002AE2AE2A82AE2AC2A8000000000226 23700422C2462AE2AA2AE2AE2262AA2442240050043222242AE2042AE000000000000000000004FF 4FF6000A050112D1820001C8BA01801905801804000000C004010006006000000000000008026800 01004804000000600604640202001400C800020044002546004000000000000000000000FF2F6520 0113295903014155905905915AC39559520000554554550556554550000000000526486004404510 55055255655655655240C45600400440048E5524B6554000000000000000000000FF5A3E0000D12A 380300B4AB821915A8DA219100A980002A62AA2A02AE0D63200000000002842884804C03042902A8 2AE2AE2860B60824062A608008E08E2AE00C2AE000000000000000000000FFB83000004122003128 0401831829821809800001800000400000000600600000000000001004028012C004000002006006 00600608208634E20004E026006006006000000000000000000000FFBFD40002830818A11000AB88 18498E921186C0A980002262AA2A02AE40C0100000000002620000002262040062AE2AE2AE030000 4141E62040004224062AC0042AE000000000000000000000FF9CEC2000310400110B420184180580 194580000180000060020000062264C000000000008A020B0008400403600200600641040020C006 0D4800002106004516006000000000000000000000FF5BDB00000101500500080180B8A180381190 3805800011600601000608600800000000000048A0000100B63040060060060820D612020C000100 512430002044006000000000000000000000FFA552000001001815004841C01C8184381380184180 0020E0AE42000600640000008000000000220020C010014102006006200106424024200200082200 24200E006000020000000000000000FFA68A00088100102104082194D80182982181B92191000860 0622600601E00004808002008265E00000040622400611604600269001451C16010000A088000086 006000000000000000000000FF9FD700008100182100180180981589012180380B802008400400E1 0600400008800002010208600802410022400200600600000200400600800800A0AA102106086100 000000000000000000FF7E0A00080000000C02200014209400009000001411404101500100000002 001400000000001004104500100100800900000000102280001103100800402A0000100080000000); SDR 8000 TDI (00000000FF0482800800001C008A98000018018098008004010440806006800C0744602600002010 402701002040000611290684708F6864061048360840004C248A00E9030010000000000000000000 00FFAB920000100008024A9C00001801801800C01C00800000530400900600600600804000628600 600402410400720690600E006024006006002004016040007046004000000000000000000000FF74 DF0008000000000818000298C9903800821800800100400408080600600600000000622601600000 041400202E0070070060842148061100001461000A6004002000000000000000000000FFB6790000 00041C0002D800003803849800805C0280000061028480068060060000000040048C600434C0A405 52860060060A600404600600200401200E016801007000000000000000000004FFD2CA0000AA09B0 AA0018AA1C18118018AA88DAA800002AE23E2102AE2AE00600000000418C2060004164043841062A E2AE21E23C5842AE2300042022362462A82AA000000000000000000000FF859100080004D8018498 000B1909813801801800800001602680800620600600000000033414000620C20000608600600602 610600C00608400402A2142C6220202000000000000000000004FF22910000AA0458AB88B8AA0119 0182B8AB8A98A880002AE3262202AE2AE0060000000004442A000002600622602E2AE2AE2262C600 42AE2A40042A22A628E2A82AA000000000000000000000FF0B300001540810A39019540018018C19 55953D5000002C608CCC05561560060000000000044160040440205360565565565160265244A643 4004402044016112142000000000000000000000FFC7108000001018018418000038239018018018 02800000600010000600600600000000001400E0020860CE01640600600608600604C00600400201 2006006002002000000000000000000000FFC9E800008980B81B0848AB8858458810AB8898AC0000 00440C2002AE2040000000000000042060001061142224002AE2AE00641620209620600018610600 6004016000000000000000000000FFA77C0000058400410528018038038098018038020000004124 04800604600000000000044C08E00434C0A401228200600641605613200602E00400C0860C620440 4000000000000000000000FF5A120000418818810010018298C984580182180000004CE406080006 08C0000000000001000400020064140820280060060A648600245410600022624C2120AC13600000 0000000000000000FF97BE000011903829001201943CC58058118018040000006006000006006000 00000000000C00090610411400200200600610600609201402680600401400202400400000000000); SDR 8000 TDI (000000FFB0C2808000109113921800001001555951951D53800010E107556D575575560000005245 5654E101157026036D575575575560262564564A40002164045561360C6000000000000000000000 FF99330000004CC8AA88A8000009008AA8808A890880002822822AA2AA2AA2AA00000000A2A22D20 000AA0022222AA2AA2AA2AA20248A20A34A0002AA2220AA22228A000000000000000000000FF70EC 0800000222200124000B010800020000040000008402408000008000000000000100000004012012 002800008008000002000800000084001200A8000200200000000000000000000000FF40A1000000 0038888E88001C00100AB81C88CC0680002522432AA2AA2AA2AA0000005422022081004024023122 AA2AA2AA2AA3100421620021002AA102002000020000000000000000000000FFCA34000000040002 00200000A00200012200200180000400540060000000000000004400100002002C40A41500000000 00000130410080050000004048300480500000000000000000000000FFBA0D800000088040000000 0200C80000000204C800001081000000000000000000000881400C01000084100000000000000000 00140210300100000300048030010000000000000000000000FF95C5000000001801808000101841 811804803C918000082006A0000600E0261000000260861061402940440040C60160460060040460 C01120104062A2086446044200000000000000000000FFCB980000000010018000000038838A38A0 8C1841810040601700804600601605040000400600640002000440801600640600E08030A0100020 000A6002404004004000000000000000000000FFA6D600000000181984D100041881883810803821 000029E00610002600600E02000000600605821200410410C00E00600600E04000640204A0420260 02214014104000000000000000000000FFB2890000100050018230000238238098A00A1C09044040 20070084064060260880000244060B008246808439010610E0060060A020C00A0000022C24420041 00000000000000000000000000FF284F800000001000A01880101801841C0AC00501808000600EA8 08060160060004000020840000282840400048A60062460060041222C01420280062A208EC2E0A44 00000000000000000000FF2706800080081804801A000018018018008000018000006A8600800602 E00600810008008400000000608000420602600600642408201202220040A0022060420040000000 00000000000000FF2C53800100105000801800001801809C00800001000040600700000601602600 008000602600004000400600600780790608600600404414440008608BC160078000000000000000); SDR 8000 TDI (0000FF51400000000000000010000000000000000000000000001004004800000000804000000000 000000800800000000000000004001000000000001000000000000000000000000000000000000FF 96B7000089A00803000A00800800808C008002008000002002002002802002002000000002002028 00200202242B002002402802002002002028002802002002006000000000000000000000FFA75100 00000104004000000400000000010000000000000000000100401008100000200000000400800000 000000080000000000000000000280000001000004000000000000000000000000FFFDEF00000880 8B02A00800820800808800800740800000200201289B202063082000060002002000002402002002 40200227A002002002002029003003002002002000000000000000000000FFBC83000001401A01A0 1801801801801A410000018000006816106406006906046000000006004000104007506006806007 005005C04004006002007006106046006000000000000000000000FF108A00000110000100400040 00004000016000A0000080000000000000400C00000000000000430000500000400C201800004004 005004000281804015800004004000000000000000000000FFEC0A000000B00800A00C0080080080 0840800200800000200A082C02002082022000000002002080002002C82002002002802802C02002 00200000280A082042002000000000000000000000FF2B2E00000000000000020040000000000000 00000000800800000000000000000000000000000000000000000000000000000000000000000000 000000001800000000000000000000000000FF554600010040030000240000000020000000000000 00000800011000000000000000400000000050081C00040440100000001000000800000000000000 000000000000000000000000000000FF473F0100000140200000000280C00000400204040000448D 208000000000000000000C8000100080008410110001001001000010088008008001288010000090 0C8000000000000000000000FF22E300000004000204C00000200240000200000000001000100010 00800800000000000000050200AC08A04200000000000001202200A0120200040120000440400000 000000000000000000FF011088000008088888080008584D8AA88C88E8A880004030122AB2AA2AA2 AA0000002022AA202000002112003AAA2AA2AA2AA3120023022020010022022AA002012000000000 000000000000FFB05B80080020140000040000A02200122000044000008000090010050040040000 000040100044028010C800100500500400404400000000400200000C20010C024000000000000000); SDR 8000 TDI (04FFD4B4000001E01801000801801801811C0080000080004028C600080622E00600600020180400 400001401180610680680400400202A40000600408608641600608E000000000000000000000FF34 E9000000821C01084801091069801484804000000010300600000200E00600400020000441600440 4480436806004008190C5A80213825C00441E85608E4B6806000000000000000000004FF7D4C0000 01851801900000901811005940810400800004200611000700680600600000000408420400612604 601604600E0040004008234063000060060C68A6006000000000000000000000FF3ED1000004A218 01C00085801001081C001442400000002804002802106006006000000436106204006007826007C0 60C6A0080082800A00400482680600600E006000000000000000000000FF1E2A000021401C010020 01841C15C81800882221800000500600298400600600660000100C4002004982661A6826006C8004 706F02600C80600102700700600E006000000000000000000000FF958D000021001C514140098018 41815C3480000180000160060020040060160060000001040000A214248621744600C00890E10E10 640704608200E006046026006000000000000000000000FF7162000004241A01800113041801A0B0 54840000000000C00600280200700E0040000014448820A0000800216206206234212882113A0000 608000E007807006006000000000000000000000FF4A47000000001801804001841A01A11C408200 01000000500608200228600600600100100410208000600149610E0048042020034320020060A901 6006086306026400000000000000000000FF0FB80000018028D061880080187580188880A0018000 82720600202610602600600100110640C0004C81000060060160061442020030880C200120628E04 406E006000000000000000000000FF22610000008849000108018018014938508002818000086406 002006C0600E00E00000000700600001420011610608400600402208220216A00040641760404608 E000000000000000000000FF5175000000A00A00002000841041801A008520008001146006107004 10600E00E000000006114080102A0080600E0840060010035520028120A800600610448603640000 0000000000000000FF99500000008808000000010010010830808000800000006006006040006046 00400000000600600000600040600600400640022200228A00200001608600400E10600000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF51DD000000000800900000841841811B41801801800000E00600000400600620C00008010C0140 A010D02E2A60060460A0028226087406006000086826000006006000000000000000000000FF9CDE 000000000800A01081001A01A03C00849800840000600600004A800026006000000006A460040062 06887006006006006802802006804104006008003006006020000000000000000000FFBCB7000004 000800C01001001C81C01800801A0180002020062A080A000086004000A00084A860060148468060 0608600E096052802006E24006026000002006006000000000000000000000FFF860000000200201 8018008019018018000018008000C16116540013006146C0E40054050E5041044060143440060069 40121202103006046005146442004006006000000000000000000004FFC7AD000000000001801800 801801801800001901800000600600000200600600600000000400402400400400400608600C2040 02002006006004006002004006006000000000000000000000FF1ED3000000001801000801001801 80180180180080000060060000060000060060000000040040040040060060060060060060060060 06004004006004004006006000000000000000000004FF020A000000001C01000801001801801801 801C0080000068060000060000060040000010040048050050068060060060070068068060068060 04806006804006006000000000000000000000FF28AD100230001810240101811881C01A4B801804 800000600601002620000600600040000400420400440604E00600600000000600E04E0040860861 044040A6006000000000000000000000FFD5F300010004B880200001C01831A01801805A30802000 20060000060211460040000A0855004804144816D0650649724CC8C0061062061260008370060040 06206000000000000000000000FF954400060180B2410118016018298110218181A8000098600600 0002006006004000020005064001E0400600600600720428C00600610C03E0000260460060060060 00000000000000000000FF3E7D0000018210A1005881811C81C0D80A806001002040604600002200 680600600020000541400440001E00F10620C000005C4584C5858C608448F8468070A71160000000 00000000000000FF09B61000A9801009C48800809801801C00800004000000600601080224612600 60000800540002040C42062A6486086856004006107C24804004006127C060064060000000000000 00000000FF063C000201811401C00801C01C01C11824808001000094710608800244600600600000 000708020500C44621601682400601400421400400428408609622720E0060000000000000000000); SDR 8000 TDI (AD6D00000200520B003053141801815AAD0118218000086046006306006006046000090406486000 40E5165061060161460062142C4416016110006004034006006000000000000000000000FFCAC700 20104A0880D50C80C10CB0CC0C00C44C10800100200B42300309211308A000001113053129923023 00320228340B2A302300A103303020083443202852812000000000000000000000FFB6F900420020 010030020622830835201601E2900000820808840809008200BC0000210F90C48810040C00200020 A00828808800B00D18C008400014408810C1004000000000000000000000FFFBC200000A00942100 10018028008809018808488000002AB240210212200200200000000201200008207A482083492212 002402432002202000002002043027002000000000000000000000FFDFD800000000048800010019 0000000400001020000038C0400862200010100100001000000000814000010092000000002E0028 040280120101000000210010200000000000000000000000FF942200008018621209600004007000 40C000000000000000000000000811000280000080001800000001001204008081C0500240001000 018021000028408A00030000000000000000000000FF547F00001406080486807100180182982104 1002000000280602648621000E00400000000620614031620400410E106406006010080806002010 32E082002006806000000000000000000000FF7025000010250824CC4205353A11A01CC1213B4B80 00C8E106826886A96A0EC2C000400A06C06880904C04CC50B6086956C8E840A40006812800A1694A A0A2C6206000000000000000000000FF516A000084682D10A080400018218B5802081E018000026A 4E10044E84680708600101008411400020603480C206216406026A08080B0E242020026002102006 026000000000000000000000FFF74E000200000800A00000001E01801800001A0180008060060000 06006006006000000004004000004004004006006006006000000806002000006002800006006000 000000000000000000FF2A89000204000800880081821821801A20809900800000611600100C0000 6600440004048620E000C8620400500680700540401200200600600080640B002006006000000000 000000000000FF3ADB000000400E0080000180180180B88080180000008070060000440060060040 00000006004001006004004007006004004002002006006001006802000006006000000000000000 000000FF5AD8000000000800800000801801801A0182180182008020060018050010060040000000 04046000004007107806047801001006006406006080806006002806006040000000000000000000); SDR 8000 TDI (AD400C00408401400400000000000400000000000008101000100100140000000100100102100108 0081001041001121001021001000000001001001409005000000000000000000000000FF51804004 00C00C00C30C00800810800C00800800840000300244310300300240200100301302300108240311 3003143443003003013002002881003003003003000000000000000000000000FF9ED50800019098 95801001801001141001801801800009600610600603600600610000C0040041000060A600608640 601640402600640600E00050E00E016006000000000000000000000000FF784E0002442242232054 2A00040020042420030C000081080480089480080080000080400504C800884880804805005354CA 48C4840840808800804800804004000000000000000000000000FFC7A3000090800800808800A018 01801900800840800000200210202200200200200000280208240002A04A00200200200200A01201 210A082400002002002002000000000000000000000000FF5AF60000000CC0CC0E00900AA8AACAA9 5800000400003B02A83786402A82A82A80000002A83400002002402A82A82A81000003403C020022 00002A82A82A8AA82A8000000000000000000000FFF9B300084200201200002A0800804000280001 280000000A001210A80000004800010000880D00032C000000000142000008020820000000000300 0000080800000000000000000000000000FF97E10000B00880880820200AA0AA0AA0020001280000 2202A82000902A82A82A80000012A8208200520280AA82A82A80200C02082083202202002A82A82A 92A82A8000000000000000000000FFD3DE00031035034034030024C24C0D43002002000000D300A8 C00400D50D50830000001240C00C00010D30D51550108CC8C51140948B30AB0900550D5145055055 0000000000000000000000FF1433000C044004004085024004000004004004000001001001001001 00100100000100000100100101101000100100141120980100101111100100100100080000000000 0000000000000000FF220200088808A08209400020000000000400008400000008880902082A82A8 0000000008000000000002002A82A8028A082A00000000000000002A82A8A202A82A800000000000 0000000000FF626F000200220A30A00A30808D10B02B24A00A228000CA2002802842802802CC2000 80040344AC00AC283300280290200300210AA02C0281280080280201200200200000000000000000 0000FF70D900022420100124D2853422422480090002100000810A44C308808008048080000008C9 100800010900800804A048A1010C2494C8D4D40900804804884004004000000000000000000000FF); SDR 8000 TDI (000C01C0DC0324124DA21A8DC01821881801800000600600001610400624E0000060260260000040 4408600600601600C084086006026802006546046006000000000000000000000000FF8CC5400401 D35D491551058D190189594B95594180001065564004460065565560000065565560045545545565 5655614E0A041645655644E204556486406556550000000000000000000000FF42870000008A18A8 8828818038018CBC8982984480002AE2AE2022A64342AE10600000010021080204E20C2262AE2AE2 062062262262AE0860022AE0043172AF2A8000000000000000000000FF73E9000000A01A00800801 80584B801E01801813800022E0060AA10E4B400600200000200200200000600400600600620640E0 C61040060040000060320D7807800000000000000000000000FFEAD0000000881888AB1A83911841 80188700799A80002AE2AE37A22E0062AE00600000041010000050230221E2AE2AE3CE34A2362322 A84120002AE0340062AE2A8000000000000000000000FF97EB200200845800801849891801925841 801801800000600610208648600620C00000222202A8002C20220460060060060020860080001088 000064024CE006000000000000000000000000FF279B00000181104281200084592D809810929820 800000600600200604C00614600000410C30000001610810600600602614400C0820022420000061 0C006006000000000000000000000000FF9BA8000001801020840001401C01C01801801844900000 601604240610C00604600000600604000030600010600600600620400C04201014200004612E1060 16088000000000000000000000FF907A000801811000821003819805893801961802846001E7E600 204606405E1066000040041A600001608022E08618E21601800402032200808202600609E1060000 80000000000000000000FFEA8000000192100080D0258058119258D4001800008054600600210600 000600610000600600605000610022E1060162060004C60082200090C80060064060460000800000 00000000000000FF23D0000800148040012040004004008154080040090022000002048011002004 00000000000000504900000800000000102001000101081200300000880001080000000000000000 00000000FF1BAC0000000800820000000000100A0000001000040001400048610000820400400001 00080000800000200101202804002040000104000080000080080000000000000000000000000000 00FFE299080000800808029800C00410440000800800840010201A02204202200230218000200200 200000020208200202208A002450002002002080282042602042110000000000000000000000FF27); SDR 8000 TDI (0803801843A410219118099518A8001805000000600000000601680614C0000B404E0CC10010E086 8060040060054C200410E006094000806306000006000000000000000000000000FF5FCA00000180 18008058818419018038040018280000006004800004D06005006000006004006404046030006000 00600000A0060260B6026204006046003006000000000000000000000004FFA43E0000E98AB88888 911B8038238018440AB8D400002AE2AC2A82AE4262AE2020002443C42440002062002AE2A82AE2AC 1022AE2062163060062AE10E2AA2AE000000000000000000000000FF2E5E00000182102180408980 585584194080182180000060020000060260040060000442000B000402C0060060040060040060B4 28E10A2B400400600E004006000000000000000000000004FF23020000890AB0AB8820058258D584 18888AB90180002AE2AAAA82AE1462AE0AE0002842082882002AE28E2AE2AC2AE2AC2262AE2AE226 22E0042AE2062AE2AE000000000000000000000000FF92010011531150949488458C990188980495 588D80005565515405565165545560004941544004A45045365565565565544C6404046222004104 556346554556000000000000000000000000FF198480000500000085082191180191380080180180 0000600000000600E00640600001400400010000604600600600600400E006006086006400006056 006006000000000000000000000000FFBA7E0000890898808818008038298058190AB80080002AE2 AE2B02AE0042AE0020000240040040002002062AE2AE2AE2AE2340060860860860002AE0042AE2AE 000000000000000000000000FFEEC300000500184800988504190180390180184580000060060000 0600600600600000445444C40400002600600600600608403640600600E004006444006006000000 000000000000000000FF278500002102580202504891180395184380190980000060060100062CE0 0634C0003080801001400D008E006006006006014504056256226104006108006006000000000000 000000000000FFD94500020100180200300D531801B43801801843800010600600000604E0060060 0000000000000400000600600600645641404402600610EA04006048046006000000000000000000 000004FF686C000001843821A20A2080194B811821801908800000600610010E4040060060000040 04004000002002006006006106104094116006006004006104006006000000000000000000000000 FF4512000001A89A8DC88CD1003A01841A8B0AB800800022E2AE2282260862AE2AE0000042AC2AD8 002AA2AA2AE2AE2AE0060202042062AE3270062AE20428EAAEAA8000000000000000000004FFF398); SDR 8000 TDI (0104108202100100405404000040000000010012808000001410080000000000A00A000000010800 0880000000000000000240000200110089028004000000000000000000000000FF1F8B0001C00008 899400AA8020220000890408C880005520032AA0420122D22020004224025020022823022AA1822A A22244220219250201200048A08240A2AA000000000000000000000000FF2E900000200040411480 00040100002000115800000124600000634425080680600040023042800000808800000400000400 0008000440208002020008400000000000000000000000000000FF97B580000A0D00040020001100 0815004222004400001083510000081000481480001081001003000400400002280001103280A023 01080A00802004400A0000000000000000000000000000FFC80B0000008018200408038058018058 15C05022800100E0010002062808208C400000600621604050E11000600400600020249220004600 A000020100012006100000000200000000000000FF49B00000008018050028018918018218418018 1085004060261400060120000160002060441440080460002460042160080100420A00062824A050 2012522006050000000000000000000000FF4F5000000080180000290388B80191180B94182A8000 06403C00021E00600000200020400622600800E00001610020600C04400201200608222000048820 2516000000000000000000000000FFB5C00000009018030208018018118038018038008000206047 0B000610600200E00000402408C02040640030E00600E0041040420A20062020003022020AA00E08 0000000000000000000000FF29240000018010218008818018018D18210A1801030000E802800006 4960200C60000060020020005261100468840060024322D640904200E10112000000228702800000 0400000000000000FF4619800021811821800881801801803801209801020000E0060000A6216802 00600000608000240000600001600444600202A00620200000608000008020304600000000000000 0000000000FFA5368040418011018008118018018058210118010001807000000006407000006000 00400210400000402611600182641605610640408400610000604600700600000000000000000000 0000FFBB3D802001903081A0090980181180182100180100600070C7010007006802806000004000 09C40000642680700641E28F10668600E08406600080702601F047000000000000000000000000FF CCBA00000180B820801001801801801800401801040000E9010000A6116004006000006086006004 204006007804006080002044017006004005086886200007800000000000000000000000FF909600); SDR 8000 TDI (00000020010020040000021000000000400010000010000000001000000001100000310008000000 80A00820000004000000000090000800000800000000000000000000000000FFF8E6010016800800 A08880800E00E00A08804D00802000200206300280201208300200208A60000009259A95A41A2AA0 2208208A08208200200007A00301A000002000000000000000000000FFE871004001001801889C01 801801951801801821804183795640F006106416006106206004030000CA45164C60060060860860 8C516056106400006046446100006400000000000000000000FFF177600449000241001001000100 2000000000000000C00404040004800000000000000004000228005800894200000000041C040418 00004088000005805800000000000000000000000000FFB349002000800800A80800A00A80848A00 800A0080400520A220200200221280290240200203000100248A00200200200280200250A02B0822 00002042422080002200000000000000000000FFB0F3000000000220008000200000100000000200 00004002080300001000008008000000000000008800005000000008808A02888200008000000000 00000000000000000000000000000000FFECC2010220000000000200000000000000004120000000 08000008000000100000000000000001002304004681000008000404008410000000010000400000 00000000000000000000000000FF443208004010021004220011000215000040005400010000A880 08000110101480000000500403000000108002288003500800100080800802000000001008000000 00000000000000000000FF1AF40000020540A0000000040100002002000000000000040000000010 00008000000000000880000000A00010000008000000000A04100100000201280000000000000000 00000000000000FFB73480008C900852888CAA8038298058A88AA88080002AA0022AA2AA2222A220 20002AA2922120002AA2022AA4822AA01222A3A220202222200028A20222A2AA0000000000000000 00000000FF4778000801041003001001110000112005510000000100101100140008100140000010 0024024000028001004A0100480D0805084200102000011484110150040000000000000000000000 00FFDF7F1001518134011159558C9101089155555955800155604F557D56417547B5600055640440 4500556427D570575574A4CAE4564D6116556000C46446505D56000000000000000000000000FF57 9B00000A08A8A880A8AA8248D48408A880288A80000022A22AA08A2425020AA00004A10A01228050 224A2AA02B2AAAA200A0220020221220800021220A22AA000000000000000000000000FF653C0000); SDR 8000 TDI (1E01001001801895811C018000018020106446004806046006006006000C06000200442106006506 0060072861044AC0A4904200004006842008004000000000000000000000FF38FF00000102180150 1001811C15801801800B01000010E006004006004006006006100047900004016806816000046006 08600008400400400480600E024020806000000000000000000000FF360D000050A0D8410128B380 3009840C0DA00011800008C09600600600618608611E08639008051106400700EC868000180E0006 00680E106C0081490E120021104000000000000000000000FFD3D80000008091154028A3803421A0 1811C00A01800000788600600600600F88604780E40200000020280E00608100082020030E036096 427008405006008008004000000000000000000000FF03F3000411C41883A0000980100000080180 030980008040060058060060060028A600F848000311010808806206027006004806906806804008 01288600C010086000000000000000000000FF3ADE000005801A03800005841010A01A098808C580 2002600710400601604E00600640E5523000002821143068820164160AC002006A86924080242006 904000006000000000000000000000FFEB40000040007851938001899A4586040502800982002042 16006206006016226200006004028000C280010068060840E44067B82FA12B540400C85226108080 004000000000000000000000FF9C31080000001A19850001901C01848807800801800098C08E0270 0622600600E00000600600000000060410E004000140107400002042000000006486004000006000 000000000000000000FF3CC4100005005801A00005821809810801831A5582002144969260062260 5642540041685454000105280040708000C404856044802D021200810060C6104000006000000000 000000000000FFA6B100000100180380000181180100001110188180400440060062060160060080 0000650600800050211400E0000840140061082AA00A00400054600600C080006000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF6B7300000000100000000000000000040100120000008000000000000040040000000040000000 00001000000000805004000004000000000000000800801000000000000000000000000000FF67CD 000401800801409001A00800A0080080080080000020020020020020020028020020020003000820 0220200212A0020A228A0A2882000000802042000000002000000000000000000000FF7404000200); SDR 8000 TDI (009E9B01C03C01801A03800001800008600600C0860362060008A0000000082000006404026804B0 200488480400C006082000806006804806006000000000000000000000FFEDD10000008018414018 01805801045845800201802010612645600640640E00254848020251450C04715052600405631000 008010C006902004007006006006006000000000000000000004FFF62A0000008018010098018018 01801801800081800000641600608604608644000000008000004000600400E2344060440A044800 400600A004006006006006006000000000000000000000FFCBD70000008010000008018018010018 01800000800000200600400600600600600000000000400400600600600600600400000000000600 6004006006004006006000000000000000000004FF9075000000801000C00801A018014018018000 00800000300600400600600600200000000000000100700600600200680400400400400600600400 7006006006006000000000000000000000FF7C99200002A21A0001080D801C01021A01848200A000 8020060060061060468060200000340840040064060068260C600410010800000600602410E00710 C846026000000000000000000000FF8EC9200400803832100821805A05201811884000A080102006 00700600620620000854110502408088E00600611601689443100010852E00640000640680628600 6000000000000000000000FFB8C9000441A11F21208029801A13300C098800008000605006006006 002006002004000624020400004816106426486C0600C00000600660600000500606208000400000 0000000000000000FF68D600000380B803040001A11814921841808F018080806006006956086006 A0642402191C8C001500CC17087A0870600628180801440441602400840740A40002400000000000 0000000000FF48860004210218912808038058118818018240018000106006004006006426006015 D0010000028008040800688682E31604610408FAB600640408440608244000400000000000000000 0000FF2FEB002031201881010801901C80C01805820A01800048E036804006022006406004001001 00820414480410640004692600E00100400C006205000017053000004000000000000000000004FF B33C0004008018010319018018018828058A00A18001A3589682614600400E286006000104800000 10020608600680612600C040806206204004805A06202A00004000000000000000000000FFE96800 0010C01B014018E191180100A841880839802002428602601601E18E0824060002741D0014A04096 806080542002280EB82A60B609407C006016017008006000000000000000000004FFE14E00222100); SDR 8000 TDI (4002432222002042002002460000C00C00890700A008008088008009E0010A01600800180E00800A 088048B4804980A00800CC0000810430C90000000000000000000000FF5CD30000018008309008A0 800880852800800988800020A20200A00201A00223204008200A22A00102217200201A00A8124824 0204200250200822200240200200A000000000000000000000FF1473000008040001044010000002 1A801A08181000000000200010081461161000081060105000000100010001004A442424430C4040 00028000009380020100000000000000000000000000FF48BF00008402010001A100040050000184 00002000000010000010200800000000000604000000008886016080400000001300001016000000 00000808248041200000000000000000000000FF3298000013019881080809981801001821918800 00000908860260060044860004304062060820000460840160A41048C00080402000260000000160 06106006106000000000000000000000FF23EE000209AA9AA1B044A9AC1A81A01A83A88A848000A0 848684680EB1688680000092712F22A800106A44C16CA08505494C5335204826A00801036086A0F0 46A06000000000000000000000FFC9FE0000C3E01C0D008805803805955C31800A30800008204608 E22600600644C050006200880200A3610208701610400480800080028705000828641604600608E0 00000000000000000000FF6C91000201A01801200801801801801801800800800180200600780600 40060040000060000000000060060060020000040000000000068000000060060060060060000000 00000000000000FF583F000401801840280801801C014458418028A1800000710644400600200E80 600000E00640200000640400689C84600204200200200700A0000060060060060060000000000000 00000000FF38B8000001801A0080080180B801009809800C01000000600600408620600600200000 60070000004860044070010060130A6A870A68860020001060060060060060000000000000000000 00FFCFCC000200801810200901801C01C01801800A03802004744602600600E0C625454040600400 2021846D42086006004006006006803006006000006006006006006000000000000000000000FF35 4E000000801A10000C818118018018118048C1802000622E00600620A09EA2420829628400C2A802 60EA28E2260882AE046EAE0C200600E000107006006006006000000000000000000000FF2C550004 00801800881901A03A01009801800085804004644602408640E146452D204000020060454C650450 608C80601088088108008600A004806006804806006000000000000000000000FF749E000180A01A); SDR 8000 TDI (1801801001001001001801800000600604620640640600628E1061040000000C40A642600E406106 004106224006020080106106086006000000000000000000000000FFB58100000920000000040020 02235002002422100000000004804804A90800B108008088B5000800B448A4800B11320C80855040 804800830C00C0000400C801000000000000000000000000FF7681000040800800A2280080191084 5801800842800080280200200204200200211200200200030000A00200204200A03250241208A08A 50000002A802CC2002000000000000000000000000FF70EA0002860AA2AA48C0AA4AAD001188AA88 C08400012A92A82A92A81102A81302202B02000000004007182A8000000040040080320230010000 0C12A81000002A8000000000000000000000FF22C8000A121080000200004004C200001009200000 002200010200000880000500800080C80000020200000004A0000020000008110288080002349001 000000000000000000000000000000FF18220002A80AA2AA0880AA0AA0280004AA0B000000002A82 A82A82A82202A82002202A03200004800300002A82A80A00882003002302200A04002102A8848000 2A8000000000000000000000FF17EE00014024431430A35415401035254424030C0000900D50410D 50C40D50D00C50D40A00000B01290D48D50810D48D10CB0D40C008004509008005505488004D0000 000000000000000000FF6A21000A0040000004040000000444200040054800000000010000010010 01041109001009001001881041001001211401109049001081401001080000401001000000000000 000000000000FF3AFD0008800000C00800AA08802000000000004800000102A8B802A80002A82002 202A0000000002000A082A80202002002A02280400402800020802A8008000000000000000000000 000000FFD3AE000000B44A20A00A00A04A10C00A14A00A2080009230020430028428028528108034 42002B0051200280290280A833002803402C02012800A02802822802002000000000000000000000 FFF37400025520820A04A4012202822CA2A034A3040000C11004810804A9080090090080910C0048 00024940804A1092088480D0848AC8AC824880834004B00004AB4000000000000000000000FF3C18 00000B00180BAA5829801809903803801811800000640600640608608E11600008610408C0000064 8E10E00600640400415430450620400040680605609610E000000000000000000000FFC840000540 CD2CC0C10C80D40C20C28D10D10D44800141200300A08302B40300243142344B403000A530222033 5350202B33320304200310300104B083503222402000000000000000000000FFD82400036038424E); SDR 8000 TDI (AB913A1500BC418AC0D380002442AE22E2AE2262AE4860002A60440C00002AC32E2AA24A2A622033 73212A62AE2200002AE2AE0962AE2A8000000000000000000000FFC711000210000C4380180182DA 01009901800041800010400600600608E00620E00400E00420000000408600202214600000720320 6006000400006006006006000000000000000000000000FF3821000058090991A012AB0019C10419 018A800180002002AE3062AE1162AE02C0002B61140100002AA2062A83022062A6A2EA38A262AE33 80002AE2AE0062AC2A8000000000000000000000FF32A5200144044A0590100189184502180B8040 15800014400600600604600600400400644444080000200600004200E00600200210A00608080000 6006546004000000000000000000000000FFCD7B0000000080510338008458099139418000A18000 01600613600629600048600200E10A0903000040CE00608C14601408008000000200010000600600 E002000000000000000000000000FF07A6000000004943041841C81803C11D558800259000026086 40600600600008E20220620220000004612E0261140060200800021000020C04000A620604608242 0000000000000000000000FFBA060008000420800130028139138018218019138440036086016006 00601008638238600614000000400610404649619420434E2D461221000000E00612620020800000 0000000000000000FF09DB00000010181000500D0258219058018018018080002016086006026000 20400200E04600009230600600000608600420020E20014220009200E04600E20611000000000000 0000000000FF22B00008000800240280301480C80840820000880D20010000300000000010410000 0000005401085400A01201502160300800000500080A030812000010008010000000000000000000 0000FFAD730000000000A000000000000C000000001801000001000002000040E406104400006000 0000000A00D022000001600C0045004C40004201000C0080000000000000000000000000000000FF 8B820000008C0810800800C0000141043018884080002022120920820C208200200A0924C2000000 00201208A0022A208208614A00E3C2098000002642012002040000000000000000000000FFCCCA40 0C011004004684000A05840820000000000001001001001300110000000080001009001001001011 1102A9001221201001101001501001001001081001000000000000000000000000FFAE2B40040080 0C40C00C00920C108848209108008001413203083002002102102002003013001001003003002343 15345350340B00B283011001043403003003000000000000000000000000FFEBAE00000100190181); SDR 8000 TDI (8558A98618018960AB80004162AE2AE2AEAAEA362AE506AA02040040002422AA04632E2AE1040142 4040C2260060042AE2AE2AC01C006000000000000000000000FFA8D700082114184080104182B801 021951C0A001800001600600600600600E4A60160122040000060A200409610C0000A60840481045 04006006002006004204006000000000000000000004FF3F9F0000A10818C18AB0C18018AB001951 8A00AB80000262AE2AE2AE2AE2262AE0562B22440000002822AC30E2342AE02E0842040942AE0060 042AA2AE2AC124006000000000000000000000FFF2F50001110159150C591580195380B803B40154 80005465565565575574C601654354015400000441255644640655041045430044C03400600400E5 565560D4006000000000000000000000FF3CAA800003029804001801881801895805800000800010 600600600600610600400200009400000000A0060060060062044440900440060060000060060064 04006000000000000000000000FF261700008C0200A98910211018889218018820AB80002222AE2A E2AE2AE2260842222A00040000020002AE2862CE2AE2062A02042A02060000027E62AE2AE2060000 00000000000000000000FF55A20000241020058010018018048018D1840001800011600600600600 600643400E00000400000414000600600600402600000C00802400000400C00600608E0000000000 00000000000000FF2E2D000001009801853092935840915805808001800000200600600600608E00 41060085500000002080060320460060960140A40040960000000060060060460000000000000000 00000000FF3D43000003001A01841001D09800D25A23800003800011600600600629600600400600 8022310B040000C60020462043160401540480040C08040040060060060000000000000000000000 04FF9E67000051800055A05A01845800009891800001800000400600600604600628E00200010004 000000421600401410E006C88A04900006010200006006006006000000000000000000000000FF78 000006818AA0818890AB101AAA1018018AA0A980002202AE2AE2AE0062AE1640022A02080010042A E0062AC2840261220000042102AE3010042AE2AE2AE2AE2A8000000000000000000004FF7DC5000A 00800041D41400A418003018158000018000114006006006006006036006000400400D0000400600 4004016117004006014004000900004006446006000000000000000000000000FF5BB12001249541 11D55555801B54025835954115800045055655655644655600400654054A15028455623655029440 E22F4B00B60A0554450004554556556556550000000000000000000000FF35300000820A340380B0); SDR 8000 TDI (000C0000D0001A0180000000000C00000060860000042460000400000A00802A8080006000000004 200006488000000000208040000000000000000000000000FFBBC580000004400004200013404013 400460000000000000000100018012284D00001105502105000102100000300460D02A0008020006 040100490000000508000000000000000000000000FF82B8000009001812050825803801851815C0 020280405264963060070070200A4202A8E08604E00050402C002000016226016110406206000140 402206006006286000000000000000000000FF0D830000000A194000380180995380180182000184 800160060460160C60100060070060045040C80440040020140000160862240360560900000A0026 420006006200000000000000000000FFE26800000102182200B00180982B00D94BA0005992800260 0E0260068A60080160460060062860A80A640207000C0000060020080020060CA000080026002016 216000000000000000000000FFBA900000010018800010238438D1001831820023800020E0863160 060070224AE246AD401402400020604640844404E00648826002804E12208002000622200C006200 000000000000000000FFDAFB800009101810840401801801025881C0000088200874061040160068 0400602601610601200000222C006006006235003103202A46000020C0740600400710E000000000 000000000000FF5440880041011A0585100180190104B80180000080000060060040070CE0060062 0E806444442050C8200710608690100402009608A00622210010E20604480E006000000000000000 000000FF137C90004100000101100180184180181180800180200060060078070260044040032042 062840200062013021230400312034172100064040800C6016006084006000000000000000000000 FF3E008028014001E0001401841807801C01C080018220007006006806807006086006A060540C40 104062C7020002F0E9A80C124620000600600003680E006094006000000000000000000000FF49DB 002001A09C02840C01801891035A01C00001820000700608E80611700608622A82A0060060050861 040422008090060868800870260A6005003206047007006000000000000000000000FF6D5F000821 81184180190193580111580580800180002B600600600700608E00440200A13600400212600624A1 040074B64C600434400E006002002806004124006000000000000000000000FF26B7000015921005 000A038018038018D1C4000080000068060060060068060060AE0000040060040120009040060000 0000C0B0006106006004006006004406006000000000000000000004FF5AB20000918078980AB83D); SDR 8000 TDI (41801801801801800045650634E49610610E4160060802860000025050160062470040062850860C D106806110C16D37107406006000000000000000000000FFB4BF0000010010000010000004000000 000000020000000004000044004005004000020028000001884B0152010000C05000484040482000 0089845A24800004804000000000000000000000FFE87600000080088AC00800840800800A008008 0080004122030C221210308220A00200120200000050200200200300203220202202210280208822 A28A102402002000000000000000000000FFD4CF0000002006002000000000000000000000000000 021880C098A180080800000008088000000200000000040000000008008029000000000000004000 0000000000000000000000000000FFCC540101002000004000000002200044000040000000000000 0000000000008000000000000000004100C8E804A000000100000040110000000000000000080000 0000000000000000000000FF81220080100440900280001340001340044005100000000000001000 8008880000B00080000205000100880800100404500009400C00000102000A800024800100000000 0000000000000000FFCC210801002080400002000000000000B00000040000000800000000000000 000A0100000001000202040004840000010001000801000002000000100010000000000000000000 0000000000FFD8BE8000328808128828AA9018AA9018018AA8208001AAA2AA2AA2AA2AA2222AA012 2A22AA2820002820222120A268A0122A32022022AA2820022032AA0022AA2AA00000000000000000 0000FF583D80080100000100100108000509400440040000000048048C1005001101008001400000 004000111080320080405081200104950000100000009004884008004000000000000000000000FF 6F61880101D419010D1D5580115580B023555C058000557556557D575574C6557147546556414000 4062864C64A615444648E12448E5564562004D6556306557556000000000000000000000FFCA3500 008A8A08C08AA8AA8008A88009508AA8AA80002AA2AAA0A2AA2AA2421022AA0AA0AA30240024224A 00A2320AA20202222B0022AA0020002C22AA84A0C22AA000000000000000000000FF3F6F00804200 A04300300002A0010201104004B000000008000000008008090004008100000A04800A9028000008 001081020410040000100000000800030000000000000000000000000000FFBDCF0000C901489688 00AB8540800400000AA8AA80002AA2AA2022AA2AB0124422AA8024020D2100202022002202288252 11A2A648A2AA4521000222AA4A04022AA000000000000000000000FF87FB00004210905000800000); SDR 8000 TDI (801801800021000000748600600600631608603600100411040056808E81600E00E8103164880262 060888808CF0B712704F026000000000000000000000FF7F45000009000085801815841401801801 8000010000006006006406086406006006140504200010002A8A026C07C10280C4600224700E0430 00006006006017086020000000000000000000FF624E000040003002801801820201003801830000 0000007806004006806006006016020904480409A0002610A20020048F0820000068A88200010060 06087046006000000000000000000000FF8FA2000011903000821801800001801801800104008100 600612410600600723628600800400800010404690600401692E00200244A1000220000160268060 26406000000000000000000000FF4A05000101808201A0980180B083881821881801000022F40680 EC0F10E1970860069016060100021006842402AA8268042D4E284800062000022C601722E20F9060 40000000000000000000FF88750000039000B985380182110D9218C180180100008862A6806A0600 600E40640601048401008300ED08024106A00A0002C88280081F00A0820060064164160060000000 00000000000000FF84CD000012A11401C05800855201820881901905000044E4460464160161060D 61070000040001000920140C00100082D445004624410044E1000160260060462060000000000000 00000000FF9ECB000000805140801800801009000800801801008010410610E10600600E00600600 010400000000602440424442600408048E0900000060002860060260060060000000000000000000 00FF6BF8000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000006000000000000006000000000000000000000000000000000000000000FF07 30000000000001000001001000001200001001000000100000000000000080000400000400000100 0000801000007004004000004006000000001000000000000000000000000000000000FFDC5A0000 01001000A00800800A0080080080080080000020020020020020020020028000AA1102A840200200 200202000280208228E802002000806002802002002000000000000000000000FF915C0000000004 00005000000200000000000000120000000000054000015080000088000000000080000080080030 0880000008000001000088000000000020000000000000000000000000FFB3A70101060008008028 00800800804A008048048A0001B0020022A20020AA0020020C00820882A81125DA5DA4022B208200 208A08A14280200000244307A022802000000000000000000000FF879C000001801B158018018418); SDR 8000 TDI (1801800001802000611600600600600600610605608608040440000200200E416026204004000006 006006006004002000000000000000000000000000FF881800000180180080100180180180180180 00018000006006004006006006006006006006000000000004004000000000004000000006006004 004004002000002000000000000000000004FF06A3000001C01800801001801801801A0180000180 00006006806006006806006006006006000004800004004806006007004804005006806005005004 803001002000000000000000000000FF4DCA000041800402A4980180180180180180200180000060 0601704600600600680600600600004420084680608001000000C041200006306004006014002080 042000000000000000000000FF253700009384403180181180180180184581000180000260060060 06006C8E50600610734629028C89040E02E41720630610488802020E84E00004E844432A48002000 000000000000000000FF139D000000000A08185801801A0100180180000180000060060060060060 8600600608080008000000C1061AE28604E04600440410000602400100662600E007006000000000 000000000000FFD29B000002612A22413809805811901B018120118400506056C0E9260060076560 0600080000002508090681640E1204A6C0C164C80807404004046406805086126000000000000000 000000FF8D1300055024080004980180080180184581000080000478060058060064161060060005 204084942042AC800002406206084314245C1631400584F817A26436006000000000000000000000 FF2FFD000000884A10003801800C01849801800002800002600611402610E0060060060008000080 0524444448400702014E0B5005000417104004106006204206006000000000000000000004FFBDB8 00040110100180180580380180188180000180002460062965061060064460860800060004020241 0280E20482608620C844D0000E0840060C6206006006086000000000000000000000FFF8B1000021 011000E1581B80180105180199001584001066860062060061869970860800060002040040021070 0560044200070C08808640C00420600648EC06006000000000000000000004FF184C000040403009 00180180081188180100000080000060B6004026016006806006000006010004A074444040041060 160C401700CC8600E00040600710C006006000000000000000000000FFD732000000803200001801 800C01803801048040800000608600400600600688602600080600000400E8440848140000060001 0E000347896084096946024006026000000000000000000000FF162400014800048180180B801061); SDR 8000 TDI (00011841800000000000422018002009850659020000050804000000000031600000440447400E08 0020800000100208880000000000000000000000FFDAF30000800800640101A00000420040000201 800001600008008000000E0880005080040800000248840009010000600083102008019722001240 0410288000100000000000000000000000FFFC7C000027051A1A0010008018018008019C00318000 0B688602600602604600600600602600002022008404464080E54040020020800000600038200A40 4000004000000000000000000000FFC52300020D431882AB1300A09A81A44A01A883418000826096 92700688600E0C680E087246000C404808448C0808028800020AA5294C08946810A5294AB04200A0 4000000000000000000000FF2FFA000121900030000423C05C15801CA1C204038000286A0621622E A26A4621620600610E00001003031121420640023000C00802188620604008220204C09008400000 0000000000000000FF6F2D000001A000008000018018018018018000018000006006006006006006 00600600600600000000000400000600600600400000000600600000280000000000000000000000 0000000000FFAA840000014014000018018118018018C18061018000006006040106406447006116 046026000000800C07006400006840C0200280220000600082F42300400000400000000000000000 0000FF348600000180140080180180180B8018018000018000006006020006006006006007806086 00002910140600280600100720288708F000086001006003000000004000000000000000000000FF 6250000001A01000200803801801801803800003800080F006000007007407816006006206200280 4000034CF00000000000680AC46006806000006000004000002000000000000000000000FF43E200 000180100000080180181180190180402980A008600F0C00070AE00E20E22608F0062887F000000E 20E00E2862860268AA44E0060060200660C0000000002000000000000000000000FFCCE1000001C0 1A00801005801C0380180380000380000160070068070064070168068064A6400804D00C04554001 800006C0008808820608600400C002804000004000000000000000000000FF41F400000100180980 1229A01809801849A04201800020E2A6006806006086036806006886020804200C2419440602E00E 044005004006006004206004864000000000000000000000000000FFC17F000001800410C0085181 1811801A118001518100C964460C610655654E4462571060064480C080004AA060000C05110008B4 008806806044444486002000004000000000000000000004FFA32000000180000180080180180180); SDR 8000 TDI (820840800000280200280200200200200200200200000010204A08208AC420220020320120420120 00002002802002002000000000000000000000FFBAD20001400860740AA0800944AA89010088A082 00002A82A82A82A92A82A82A82A80002A00000000000000200100880800002102002882702002A82 A92A82A82A8000000000000000000000FF93A30008C0002022000000004400000014000002000000 08000000010000000000000000200000000000010080480010400000400800008000020000002200 00000000000000000000000000FFC9D00000080880000AA0AC0A00AA0A40020880A800002A8AA82A 8AA82A82A82A82A80002200002002C84A02080014A82483402C04802A82000002A82A82A82A82A80 00000000000000000000FFD1910002143503083543543501303543403523500000CD0550CD0D5055 0D51550D50800A88000C00A90D50520C81350410C40A88C40D30290900D50D50810D50D500000000 00000000000000FF6180000C04440500400400400000400430444402000100000100000000100100 10010011100010010010099415200010810090010290011014010010000010000000000000000000 00000000FF13890008800880A00AA0AA0A80040AA08008A0A80000000AA82002A82A82A82A82A800 0080000000040200200280888B803B00202302A88400002A82A83802A82A80000000000000000000 00FF4292000204A44A04A00A00A02A44A00A20A00A028000812002803002802802802802802C0200 080140080210A84204202280A80A90A802402800802802803000802000000000000000000000FFEC DD00022820120920120020030820020A2402000000B450048AD004804004004800004834000C010D 08C8820810204808004D05004800954880000004835000804000000000000000000000FF79F90400 858C100D005101805841851881851901800010E00601440608602608E08608640E00021040000E00 E146804106004154204116026010406054026400546000000000000000000000FF6A15000430C0AD 20D48C42D40C00C04C08D04C3080002022032A3002003C0280322A40B00200110003122304320209 3422B4A4030AB0021030218C3C0330A001002000000000000000000000FF079F0402102092811842 002042882002B020C2020000800A00A80809200801320A08000890000810810840A0080102082114 8904900A009008080692E0830880640000000000000000000000FF89DD0001489048000218468008 008408008008008000102C0255640300200300200300200200020000023A02A00B00020B0020DA00 6002042040002002040400000000000000000000000000FF701700000002010044800194B8000339); SDR 8000 TDI (A0AA00002AE2AE9002AE2AE2AC2AE2AE2AC2AE000000004204216002088012324A30B202882AE000 02018021C006206000000000000000000000FF019E000001851091A408018000438018B180100000 000060060900060060060060060040040008400061440CE30804630200C00200A000006800108440 104006106000000000000000000000FF558700013580502500D00180100980180580080100000060 0644600600600200600600600400000000000A00602640604C086088100026006000402012040006 056000000000000000000000FF6AA8000001805101113041849401801C0180180500000060060062 1600600600608400E0040000801302060060A2000304016212102006146100000100400546016000 080000000000000000FFB83D00080001380180103082100180882184B8CB010000600620E0060062 0608646600C00410000000E00001E01400000028E10E40648000E400202042048006246000000000 000000000000FFDD3D00000100104D821000901011810841815911000004450630E0060062000860 0610410400800000600404600000E0004A6006036120017010228400088006406000000000000000 000000FFF87F0008000080800CC01008801000000002000000800201001004080000000004000001 001100000000000001300161000402804404460A04880502003202A0028000000000000000000000 FF7AED000001000004000021801800081800003801800000C0000041100002004082260042040A00 400901082800080563043000A0000006000000088440220000000000000000000000000000FF91D6 000000882854800800800C0A000C00808840800000262200200228200208210212A02A2001001426 020620A208042200A20A312022222080022142000002002000100000000000000000FF6385400C00 50442040000000001400002000400000010010010050010010890004C12410000010012000210186 41041001421141000001000001001001189001000000000000000000000000FF6585400400C00C00 C00840800800900800808800800100322300300300300B08210301302A5410033023430021130035 23143403402003442803123003043003002000000000000000000000FF1B7D000001801845801801 801801001821801801800000E00600411648650620E00620620600002001401654600610C00400E0 0E00604600610000E22620E006006000000000000000000000FFAB8800030024000820020A252200 2202C22002080000800004804004805000804800801010000A0142CB00C0CA40004C0CD308810C08 00884800800800004804000000000000000000000000FF5D87000032810B04800840800801814808); SDR 8000 TDI (A380002AE2AE2242AE2AE0C62A808A2862200002002004062AE2A608E1064342A622428E2AE00422 622C2AC2AE2A8000000000000000000000FF2129000048041912935B54D51801B54801D303518000 20655604655655640655531652E4880004A60045265561083304C04240CC4A855655410629421045 6556100000000000000000000000FF60F180001004180004180180180B80182B8220018000006006 00600600600E00040605601000011005401600601624602400401611004600640001600400600600 0000000000000000000000FF85480000038040C38A98AB8A98358AB85588C0A980000042AE00E2AE 2AE0042AE00222200000000001420E2AE0462AE2A431400402428E2AE0000C60262062AE00600000 0000000000000000FF5AB10000018128218038018018018018A18200058000404006084006006026 00601611242000000454410600610C00000402024C08400600600440648610600640400000000000 0000000000FF2EF20000D18A080980180180489580181580200080000CE00644600600630E006326 00211200032000802600622200600C08E10440C04600610405601602E00613600000000000000000 0000FF03DA000001804841A0180B8008458238118000008000006006006006006006006006002002 00001000010644E2C020004C316054244026006C04016206486006104000000000000000000004FF 2BC3000201A4108C849841801889811A858000018000006006916006006006006006006004000800 00004C00600E046104004504804006006004106136016006456000000000000000000000FF642800 00AB8892448838818ABA418818618AA0AB80002AE2AE2262AE2AE2AC2AE2AA2AE2AC001000000314 1C60040882100300540CC2CE2AF004A26006026006006000000000000000000004FF45A9000C1184 1C40841801800A05801A018010008000004006016006006006006006002006001000002100006452 00620400E00600E006006800916446144006104000000000000000000000FF40A000055532549094 195195480B94180D9551548000554556D4E556556556556556552556000004002044406108550140 426C8688E516556404456096514006294000000000000000000000FF5D3D000083A8B093C8C8AB8A B0218AB80B8AA0AB00002AE2AEC202AE2AE2AE2AE2AC2AC2AC00002000424A3460862AE0A6220320 A202AE2AE00044600E20400622E000000000000000000000FF287B400001809201C0A80580108180 B8818010010000004006000006006006006006004004000010006206016244000206100002202006 006000106246024006046000000000000000000000FF6724200241A818018808AB8AA1918AB9418A); SDR 8000 TDI (800001200600E006006006200A052AC4064000000060842C000041610600E0860080500820800220 2640E006000020000000000000000000FF9F79000000800100900C01C018418C9815E31003810000 61460064060160960938D60060460004004040100140000200061062565243000424000820860204 08000000000000000000000000FFDCC100000180C00C819841C01821AA9829801311800040640600 620600E00E00E08E0040060002002160C60060441006060020062000060222000120060020021800 00000000000000000000FFBF7700000180204080148980180B80180188B0A9808020624600650610 60862860162AC30634000050C0021FE00669E58608030612020600200208A0C402220A0000000000 00000000000000FF7CDB800001801082881A21803801A03883C40405800000E8C680800680700600 522680702000000000203420402204600500B0CE90A15010210002602220C0040000400000000000 00000000FF692F8000048820008008A1803801803801800001804080600600080600602EB0000400 641000841003222840425610000424000600602080220004600A04C0040000000000000000000000 00FFF5A7800001905048801801E01801805801880401800000600700000600601600E08600601400 0208140406002000020101022086006056006400006084006006000000000000000000000000FF42 2380080080040AC01D41A05801C01801C80201804000705E000C1F00760710F286066C0460000001 000644218612680140820E82600E0060010068C4007007000000000000000000000000FF29F00000 02800002201C00001801C00001C00001800100700600710790784740120B0030860B000420603408 843040820600F41714000700000404400E056006000000000000000000000000FF7C990008D28400 2580080920B895811015842009800000600600600600613600232600601400031005412400444600 60CF04E1270D402600040011500C104006000000000000000000000000FF1D9E000001000400045A 44041801A020A1D10445800000680608700600620680101611308400000008621400410800120030 4016000006002005026126014807000000000000000000000004FF915E00000508F0888888812818 218A510180049180002AE2AE33E2AE2AE4062AB0462223240000003041402AC0062AE41410420620 028E2AA0043063042242AE2A8000000000000000000000FF9C67000902089001001C00803941A008 8180000380000B600648E0060060CE00402600602200000032000E00620000000E00440400000600 40040040C0084006228000000000000000000004FF52610001200880CB88D8AB8AD9418C9801A880); SDR 8000 TDI (2000A1120820322C204208240204348240000000200200200205200208201308A002030001022342 20A402012000000000000000000000FF500F00000000000020020000000000000000000000004200 00440000008080040000000800000000200801800000000000200B00200010000000000000000000 000000000000000000000000FF167500000000002000000001000000000000020000000000200000 80000400800000C00000000110801EA8688800401000000100000200040500000001000000000000 000000000000000000FFD3440100004C00401000A400009422A01440020000001490008010000000 000293208000300000000C00302404002002501500014D00401080000003000200C8000000000000 000000000000FFA2D61001320140140004100000001000A004400000014000000880010008004000 10150080000110008200080108000100000000000000000200090008480000000000000000000000 000000FF1DD1800000C0088482AC00EAA8358008548888AA80010022AA2322AB2AA2AA1820032022 1200020020208200A4220AA4022022AA04228A22200022202200A202000000000000000000000000 FFF0BE800A0B04001100020420000A40002A400400000080080500C805004005081400C110040001 0000C00100009004489000000000C0010440020100004C5080000000000000000000000000FF5A17 9001038458C1103913955801501801D55D5580000D755744555655755644735624ECC40001105240 8E48E12E53400E5065571045565142024561260A602E000000000000000000000000FFF59A0000A0 082822820CA8AAA9408C88008AA8AA80002AAAAA222AAA2AA2AA2020AA0222220004001222A22224 2228AA220222AA2222AB1120800A213200A02A000000000000000000000000FF3359010429090008 04804000014022A0804002000000A000008800010000010110008800000004000084208400000000 C002800040C000040000080208211280000000000000000000000000FFF88000008009098191CC88 8AA82008C9008AA8AA80002AA2AA1062AA2AA2AA0F2002B0219A0002624022123920020A828259A2 AA32228A4220026024022A0402000000000000000000000000FF6C4000000C00D0440C4001C01800 0018A020180180000040000CC00000000040881615600000008050000000048840604004000600C0 06400000108080008288000000000000000000000000FF5623800020040010000024000094642014 00060000000000002000000000000003200002400000000280C80300200060084000060800260880 80020228000020000000000000000000000000FFE851000000808008801310A03815C048A1B05441); SDR 8000 TDI (00608708680600600602600610F10A00828002700221200E200006102020822C00C0000000700212 4807006000000000000000000000FFC2500000100000018018008558018118018100018080126017 10600610608402700602700C20040800600600F08E00700E3020460A200000020108E00202430603 6000000000000000000000FFABD100000400D024001901841A018818418040098000206A6600E08C 00E20420E006C8700610080090688000004608E12442C08640402604000806682380100621600000 0000000000000000FFB6470A0080001041203801801A018018218000018100106856016104116104 41600694400600080080612461400600080001400104C24680000000688200400600600000000000 0000000000FFEE5C1204900012000058018218018018218000118000006007006806006004047006 00600A2004080070000011171100444C002001120000040115608204420402E00000000000000000 0000FF551E000000009001001001015801889801808001800024620610600E006204006006000000 000000006024004006006014000086100000000010006022004106406000000000000000000000FF 27960000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006000000006000006000000000000000000000000000000000000000000FFF72D00 00000012000000000000000000000010000000001000000000000004000000000000000000800000 000800006804004806004006000800800800000000000000000000000000000000FF9A4B00000000 0800800820808820800820800802800000A00200200200200200280A08208201008000284280200A 22800300A00200A802020280002002000802002000000000000000000000FFEA4000800000000000 00001000000000000024000000040000000010000000000000040020000428800000000800000080 000000000001000830000001000000004000000000000000000000FFA6B800000000080080482088 0820800820800C02800002B00200200A00241A00300A42243A0080000025BB5D200212A08200B102 10B183000003002002003062002000000000000000000000FF406E000050101A01801801801811C0 5801801C01804001615632605654E0C712640604650640000100624600700603400690451701500E 050001046D45416406016000000000000000000000FF83DB00800000004000200000100100100100 2001000044580400590000400000400508028000022040411053800C084001C04800584C00000028 004004804000004000000000000000000000FFAB2D000030100800A00C00800810C0280080080080); SDR 8000 TDI (60068068060060068070020010060008000000000008060060060050060060060068040040070020 06000000000000000000000004FFB067000003801801821801801801811A15A09801800001604600 600680600620600081240620000409080684600400001610400120000600C00500F0440820060080 00000000000000000000FFEF0B000041851835801C01801841805841A01C858100006006806146A0 60168560403400C601080042042E2068C701650603482E03444E526C8010601680200E0000000000 00000000000000FFA02A0000002019A9801C0100181180190180DC01808000600600600600600800 F01608409000000002698E01609640600600C0060240060002800060060420020060000000000000 00000000FFB303000000031A01821801C01C01801831801883800010744600683700600041602E80 480E008045286206C0711604005600450080C0262D8005D0E90408200201E0000000000000000000 00FF3C6500004221080480180080182980DE95803801800000E026006086206002246006456421A0 000080E84024C02F41629612404E20520E04000010784F842012006000000000000000000004FF39 52000030020801809800881901851941801C03800000F00650680720620210622601614640000012 604402C00701020600404809400620000C02620C002202006000000000000000000004FF94640000 00001E01801801801881E09881801A018000016207A0680600600410600610C8822004000C6007C2 208600E036014A0600C0062284082A6006402506006000000000000000000004FF77630000100118 01891801B01A01847C51801801800010604610E01640E00441641E08484200024400F00600681700 000260891060080600020480E51620E086006000000000000000000004FF26DE000020020800D018 01001801801801801805800000600680E006016406006046004000000000016024014807046C0600 402610400600000000E004010006816000000000000000000000FF6470000008000809801E01A058 01801E41801805800000780600602608600600600E0A401220000000622C00C80640000600000080 0C06000004006040094006006000000000000000000000FF1D8400000000100D801941DC38198019 9B800403800000600610E0260AE00C08E00E027106A0050A1473AE4061D71860604060465CE88645 8000806023248002006000000000000000000000FF091E0000840250818098100018018018038040 0180000060C601600605601413600640C00510801000600600600700110008600081610600000304 680340000200E000000000000000000000FF40590003080403018118498018018018018004018000); SDR 8000 TDI (060068060060061060040140860001000040840B400490E14C90800600600800200008E00601C0C6 000000000000000000000000FF716F000431A25A81C918B592D8C9AC1C81A0A411800085710E8065 168870B708ECD490D40E000800804800C2884C4208081488008A6800A2288088E80E824206200000 000000000000000000FF2080020005801C2904580180180180182D880341800020600642E0060462 062260040441260001002CC3451042060082242040C001608E10A00022624680C12E120000000000 000000000000FF5C71000001801801001A01E01801A0180180000180000068060060068060078060 04004806000000806001800006806800004006006007802000006006000806000000000000000000 000000FF84EF000001801841801A80801951C4180180000180408170160064870070060268040148 1E000000004006026005046006002047004400046000004406004806000000000000000000000000 FF6ED600000180180181180080180180180190000180010860060260260060060070060040060002 00804002002806000806802800004000026000006006004006000000000000000000000000FF7DED 000001801801901A00801801801801800401900000600680E8060874060068044060060400000048 06006004040004007001000006006000004006800006000000000000000000000000FFC6B7000001 801801D01900801801C0188980008980002A622626E1CE2AE0A62CE02C2A42A620842820C02E0468 AF2860A882600F004006046000006006800006000000000000000000000000FFB5DA000201801801 809C01001A01C01A01901801900008600700E006106406006006A0680E0400040060040040050400 06000000006006004004806804004006800000000000000000000000FFAF390002018018C1A01829 001801809A21889821800000640608700600600E0268868448060B000401600418C00600E10208C0 8600600660400482680C800006800000000000000000000000FFD234000001801B01801851001D51 851941911851804009605611609605603650E02449651610000400700680601450004E0001488002 06046004046016006006000000000000000000000004FF52D1000001801801801801001801801809 801901800042600642640648610604610C00404644004C20602E00E0C604E0060CC0060000060060 00006206002006000000000000000000000004FF939E000001801801801801801801801801801801 80000060060060060060060060020020060000040000040040040000060040000060060040040040 04002006000000000000000000000004FFC221000001801A01801801801801801801801801800000); SDR 8000 TDI (8000800000000000000000100010100008081000010000B000000110000100000000008001000000 0000000000000000000000FF01680000000880000AA12A2AA0AA0AA0AA0AA0AA00002A82A8AA82A8 2A82A02A8AA82002080000082A80084802A80A80103284A83202A80000002A80000802882A800000 0000000000000000FF03030002003501522322841543543543543543540000550550550C28D50A20 D50D50CD0A40000000D504C0C50D50350C00D50D50448D50000800D50C28C80B4155000000000000 0000000000FF917F000C004204004004000004000004004004000000000000000000001009000001 1290C000100000100105100020100100100100100080100100121101102080000000000000000000 0000FF8F3B0008000A80880800000AA0AA0AA0AA0A80AA00002A8AA82A82002A81102A82A8000180 0000002A8A082002A8888280220088A282880000002A80802482102A8000000000000000000000FF AF5E000400A00800A30D10A00A00C00A00A04C008000802002803083003202802802813002000810 80210288280200282A802802002802002801002C2A902802000000000000000000000000FFE28900 0001202244203225001001201401200001000000500480482C804935004000B20C2C000800000840 84900022480008CC40880840000800000800844954000000000000000000000000FFBC3C00012180 5805833815001881901801901A81800090640600600608640610600600600E00040081608E0AE406 804426A0400604E01640601000608650E00E010000000000000000000000FFC9CD000402D40D00D0 0900E00A14840D40C40C00800000300200220240300B41382B51344200110950304340310A483082 0A30CB303203153001A0B413042242820000000000000000000000FF9AD100004030438024228028 24001002003400000000100C08000C01000800830250908A20000811000800E00A10000A21000840 000800100891410810C00800240000000000000000000000FF7BB1020001820800801C01808C1886 0800800800800022200282208B00200200200208200200000000234210212A400003042002082092 00A000002002040806010000000000000000000000FF4A8900010000182012400200010040000A00 1DA00001000000A000005A02A06010840244580000805240200404010260046A40270004064C0000 220628020238880000000000000000000000FFCC8A00000E00200800031420022040006000000000 01000080009200000418088028400000000400298010008001206400000196578006230000000100 100C00020000000000000000000000FF733A00002184180589982982188588198188A009800000E0); SDR 8000 TDI (600600600600635601600600000008604600E4864060060880460AE0260B00000260A20080040060 00000000000000000000FF627F000001801000041801811851801805884801800000600610600611 600600400422601608800000402650E20400000602200000609602048000621244004608E0800000 00000000000000FF256100080180304000880D80382D81581308A80780C000640608600602600E00 40060040060280101844062040840604460963884064280040500060C00803060660000000000000 00000000FFEB400000018050800130118058818018018308A9810000600600612602600E00400408 C00602000000400600008420600E08620E0160400000004060800884060060000000000000000000 00FFD011000800000120024004008080004000040008004000040000014008800000000001000000 00080002000800000062300200060003060202D0200048010120000080000000000000000000FFF0 4D000000001810000000100001040100003800000000000020012040002012404C00820031004050 400814822009620000004600000E00402028020000000C000000000000000000000000FF47250000 02800802020801820886810810888940800000A22208A00200200220220274201212020000224201 240240000A01228263220222E00000A482468002116000000000000000000000FFA632400C010004 00400580440400440400000402000100100100120102100150901003102800100902102100140123 0021208401040001401001001021001001000000000000000000000000FF9DCD400404800C10400C 00C80C82C00D00814C04800100B24300B04302300301344244305244100904320300300342244340 20C320201304B00100B4C3043013002000000000000000000000FF97340000018018040218018018 0180180188180180000060062863062060260260060064060884202860340B604608401600E00600 6406004040306006016006006000000000000000000000FFA8690002012104004004412012002014 002004010000804004804004804915000000808A0C000810000A8D088800224801128A4154482080 48010051008C4800004000000000000000000000FFB5690000008208080008148008008008008048 00800000280200280200200200200234200200000000202202200280202A40200200A00200200000 222200A132002000000000000000000000FFABE30000000861F60AA0800AA0AA4AA0AA0A80AA0001 2A92A82A92A92A82202A8AA80000A00000002A85402002A90887C00000880102890000002A814864 02002A8000000000000000000000FFDC600008000040001000502000000000000000000001001000); SDR 8000 TDI (06006000016006004006000000008146006006206206056006006046026000006006006006000000 000000000000000000FFC8390000AB8A98000030AB8AB8AB8AB82308B8AB80002AE2AE2AE2AE2AE2 AE00010C0842AE00000001022E20600648E34404C08E2AE28E2200002AE2862460042AE000000000 000000000000FF272900000180180000180180180180180100180180000060060060060060062004 0640600600040420000601600420000002400000604600000400604600600C006000000000000000 000000FF48100000018048000D080180180180189182180180000060060060060060060C80A602C0 060000820C80820C64CE0460D648444600600610C2060060160B62C4006000000000000000000000 FF8622000001800800001A0580180180180180180180000060060060060060060001161160060008 0408028210E00440048610C440026046888804006006106004806000000000000000000004FF2A2D 00020180180020182180180180180100480180000060060060060060060060060060060004800160 4600400602604C044006096006000200006006456804006000000000000000000000FFE00A0004AB 8AB8AA0AB0898AB8AB8AB8AB0A88AB80002AE2AE2AE2AE2AE2AE2AE2342362AE00100422600E2242 AC0C800020408820628E3210042AE2AE0062AC006000000000000000000004FF4F6C000A01800800 40084180180180180180180180000060060060060060060060CE0AC00600080010600610420E0060 06106006006006004804086006105006006000000000000000000000FF883B000155954954555953 95595595595595595580005565565565565565565565464465560000044D60460205561105462563 50226516448004556556234556006000000000000000000000FFF6A40000AB8AB0A80ABA8B8AB8AB 8AB8AB0AB0AB80002AE2AE2AE2AE2AE2AE2AC0042042AE00000042C32424A0862AE2102284AE22E2 AF0B64002060A62042AD006000000000000000000000FFC624400001801000001801801801801801 001001800000600600600600600600400610400600030000429449200420001010200008E0270062 00006004084007006000000000000000000000FFB2020002AB8AA0862AB0898AB8AB8AB8AB0A90AB 80002AE2AE2AE2AE2AE2AE2AC4040042AE00000000421C2840660883C42202883062886060000D66 122742AC006000000000000000000000FF57FF200001800040001841801801801801005001800000 60060060060060060040064A400600080025410404400C04602C002006006000802A004160081040 06806000000000000000000000FFB4C4000001801008000803801801801801000801800000600600); SDR 8000 TDI (00600400600600608600000000020200600600000440600000650620600801620600650400020000 0000000000000000FFC5B8000001C0180988982380980B801809A210038000086106186046406006 00604640606658800000014242E1B60C602608608642609640602000602E00E20400000000000000 0000000000FFB246000301803801A45801801D00D13A01909A01820000600600600600680480600F 024006000102100004106400406C9422E04620622800E08214E00600608604002000040000000000 0000FFB94C8000108019418018018018008018018008018000806806006487006504086006084884 01010880820412E4460082174561000262C00060900A6406006006000000000000000000000000FF 0CC5800001601821801801E01801C01801E01801800000F00792F80748E2B4107807236006008400 09000604600000100D2AE02040620600610000600E207806000000000000000000000000FF84DF80 0001A01801801801C01A21C01C01C01C01800080E806E2E01F08E82D61F00602E15E500361080506 50700620680708662701E00600601134602E226007000000000000000000000000FF0D4B00041180 1881C01801801C21801C01A00601800100608600632680700700602610700600000D000024016CC8 4304060060800260AE206004C06446044006000000000000000000000000FF6C8B00080020980182 9801801801801801802001800080680600600600680608E00600600600000008801414E00620614E 006247006006436004006016104006000000000000000000000000FF5FE4000001825801885801A0 1A01401C0185100180000060068060060060070070060040060003048000042060000008048D6000 0060061064040060A6016007000000000000000000000004FF18AD0000AAC818018118AB8AB8AB8A B8ABC810AB80002AE2AE2AE2AE2AE2AE2262AE2AE2AE0000002202A45462AE0EE25620608E2AE2AE 0060002AE2062262AE2A8000000000000000000000FF942600000180380180180180180080182384 2801800000600600600600600000620613600600020440000E016000000004086000006006006004 00630E004416000000000000000000000004FF53380000AB88B8018258AB8AB8AA8AB8AB8A28AB80 002AE2AE2AE2AE2AE2A82A62AE2AE2AE0004802A020E00E2AE08E0863064AE2AE28E28E2042AE32E 32E2AE2A8000000000000000000004FF0BA9001155D51801953955955955955911B1195580005565 5655655655655034E04E20455600010614054654635015040C20E550556536556206556026514126 550000000000000000000000FFB4D880000102180188180180180180180181180180000060060060); SDR 8000 TDI (0000100800840000800402028468691200000C400001000402400200020008000000400000000000 00000000000000FFF2C108011200020000020040004A200000042000000080080000100100009000 08000008000000000000800002800000000002400000000002000010000000000000000000000000 00000000FF83FB000020000000200000000200000200310200000000000080000000100000000000 00000000800000088000284400008000000000410000000000000000000000000000000000000000 00FF6EFC800040EAA8AA8AA8AA8AA8808AA8AA800CAA80012AA2AA2AA2AB2AB233AAB2AA2AB2AA00 02000002222AA00208A2AA2AA08BAAA28A2AA001AAA2AA2AA2AA000000000000000000000000FFA5 FB000C00200001001201401400201001210401000100480500500500542100500410101000000080 0010004000444000004400804000804001004004050811000000000000000000000000FFE6240002 89955D55D55D55F55F21D55D55C919558000557557557556556546D5655655655600020000044F55 6006354557556556556557556400557556556556800000000000000000000000FF21F50000A8AAA8 AA8AAAAA8AA8888AA8AAAA08AA80002AAAAA2AA2AA2AA0922AA2AA20A0220000008002222AA14208 A02A2AA0AB2AA2CB2AA0002AA2AA082002000000000000000000000000FF379F0800020000000010 00000012400000042400000100000100080080100000080000100000008000008000052800000000 0000000000004001000000001000000000000000000000000000FFBBA0000006CAA8AA8AA8AB8AAC 448AA8AAA848AA80002AA2AA2AA2AA2AA0022AA2AA0425020005000003022AA4120885022AA08A2A A28A2AA4002AA2AA422542000000000000000000000000FFDC8E0001000018000000000000218000 00051800000000000000000000022400000040041400020000000000002824605000020600000600 0000000000400510000000000000000000000000FF0F768000280000000000000001120000004020 0000000000000000000000900000001500C000008000014800028000648000004600002600040000 0000108040000000000000000000000000FFE0D80001012058018D5841811D10011809D208018000 00601600600600600400600E00410410008000000011600000649410614644602001600012600601 6006020000000200000000000000FFEBF7000000C019118018118018009259018108458080006006 1060060060040060060460460100001004000464A028002405600000601040614800622E00600400 0240000000000000000000FF06B600000180188180180D801805021881801021848010600E006006); SDR 8000 TDI (0420F0060460240060004060A64400260268060B60260360068321082060AE286006006000000000 000000000000FF83AD0002000038008838018018218418418010018000006626A0E2460060040060 06046004806000006F1E8C0002200A860060180861A601A000406016426226006000000000000000 000000FFEBA4010000401801905801925821881C01B00013800004600651680E0060044060068060 0C00E4B00060064800022004C6B460008C60210024A1006146106C26006000000000000000000000 FFE9C900000200580980180180180180980180000180001060260062060060040164060044440060 0020602600004204600600642640E000042010006006046006006000000000000000000000FF2796 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000006000000006000006000000000000000000000000000000000000000000FF8ACB000000 00000000000000000000000000100000000008040008000008040008008040040000000000000008 00006000000006000806000000000000000000000000000000000000000000FFF107000000000C00 800810800808A00800800C88800000200280200200200200210200208200240200280A04A4022282 22002002022002002002002806002026002000000000000000000000FFA3C7008000000001400000 00000020000000000000400101044808000000100C0840A50000040140040A000001400800084300 A8000200000140000000000001020000000000000000000000FF93F6000000100804800800810840 810800800800802000B88300200200300A03A0B200A40202200043A842DA22222AA00200202A0020 5A002000003002002002002000000000000000000000FF13E8000450001E09601801801801945941 801A13800000610444600600600620740E00640740600252602E20628604541640735610690622C0 02457206006406C46000000000000000000000FF949E008000081041001001009021009001000001 0000054C04004101C4400180400D2002800440E0214C0C11008000404C3288008406000040A18040 04004004024000000000000000000000FF9BFA000248000800800800800C00C24920800810800000 210222200200200200221200220224202050200280200204240AA8232210200280A0004520020020 02042000000000000000000000FF469F000000000000000000600200300200600002000005020000 0000220000400000001800000000000200008100000020800010820100C000000004000004004000 00000000000000000000FFE74F00000000022C200010000010000200000110000000000050008000); SDR 8000 TDI (800806C2404E02044C516006C26306A0E80E10E44641400708680823611080400490600000000000 0000000000FF6A5A000000001D01801803801841C0181D8018038001086054036006006000006006 00490003E02100600600620600644600C18620402600600002600640600600600000000000000000 0000FF2C77000000001881829805C01841C09811C01801880010622608E8060060810060872048A1 00640438696620E8A6200006DA022192100780400440E007207007026000000000000000000000FF 6F7B000000003E41805811845849945945920E21800045600E00600650602200600602621290640C 00E816144802016B3600600608E00610600F40608E006006096000000000000000000004FF79A400 0002403801801C01805801C01801C0880580010164065264860060220062B6A0680202610C016206 104003000086016A0100681604420502600E807007006000000000000000000004FF26B100000020 1801601A01805E01801A018018018000906047A07807806004007A16006144027808086C26806C04 84688620480610000E002004236006006006046000000000000000000004FFC2D000002000181901 9801A01841821A0181182580000160271461060060048661460040A4006504016006A0627C020626 0010A801800680206400E1B6026066026000000000000000000004FF31E1000042003801001A0580 1801821A09C00821800000640700620600604600600740600600600400610650400000602708E2CF 006006040200006046826006006000000000000000000000FFEF3900000430180120180980181388 1845802A01800000644690680600601600602600601604648400E006014244000106006400006806 0A000404608600610788E000000000000000000000FFB37C018010485907C03945C4B86980781181 141D80600069914071048060441060269C6004CAE02082E1275862363E605E5600464040660A6000 0260C610600608E000000000000000000000FFC77300010000184181380180B901E0180182104180 000D600001600520600402610700628508E04134684E046086408206010000030806216080806006 006006006000000000000000000000FFD988000082001920809C09E41881881E4385000180000374 4000688600603612608600448EA0628008709600E08A0104A6284420424000202001806047086086 006000000000000000000000FF5EAD000000401800C0180184380181180180100180000860000860 0E00600400720602420C016348407007A460020060462044062140000022C0006006007006006000 000000000000000000FF66CC008212005808C01945C818058A183188504F80001260165160264060); SDR 8000 TDI (6A0E02601600443203608609002680000C0C409080210E04E0100242003560AE8360000000000000 00000000FFA381000000801800001801801801801801801801800000600600600680600400600600 60060060020060028000020060000040060000060060020040000040040060000000000000000000 00FFD315000001001840001801805801801900841805800050620E006897006A0280E00600694480 400042682C40E00455680680280604280002E00140400800E002006000000000000000000000FF88 AC000001001800601801801801801800901801800000608600702600700200000600600500402800 7100806000021003002001400000086001004000006002026000000000000000000000FF73180000 00801800011809809801A09801A4590180A0007006006C0600E109807116005006004500006006D4 6006088004046008022026006000024800104005006000000000000000000000FF400C000000801C 000018118018018018098C1821882100629E0AE16629F4202AE02F2A520602D23804F2AE0AE02684 60A40A6A0F080846076008024010004004046000000000000000000000FFE4A20000010018002098 01811801811801D05881814000630600620600610E00A10F0060048072A480612C4CC00491000604 081044680608600402400088E006006000000000000000000000FF177F00000120184A2818218818 01C2B823803801800002682600628642688404228410400481600488610404400400600600881600 6006006014006000004004006000000000000000000000FF629C000000001C041018419058018558 4D94584590015460CE0B691614E103090512046D0402600401704D51604480004602240090500600 6004047001006006006000000000000000000004FF804B0000000018100018018018018019018018 01804000640600644600602420004220602400623428620400600032E10208A00602400604600420 6000004004006000000000000000000004FF52980000018018000018018018018018008018018000 00600600600600600600600600600600000400600600400600000600400000400600600400600000 4000006000000000000000000004FF712C000001801C00001801801801C018018018018000006006 00680600600600280600600600000400600300400680680600400680400600680400600100400480 6000000000000000000004FF8080200001A038000018058018098418008418258000406006826006 00600280608680720608000680685608E84600010704680012402600600400600000400005600000 0000000000000000FF5B0F200001A0184004D81184380190D94190180188010D64061060063060C0); SDR 8000 TDI (50809490D50800D50D50C28CC0510D50D40D10500D30920900D50D50D50550550000000000000000 000000FFFBCD00080000040000000020020000040000000000010010000010010010010000018010 01001201001001009048C21001101021041000101401001000001001000000000000000000000000 FF03190008000AA08C0AA0AA0AA0AA0AA0AA0A80AA00002A80002A82002A84802A82A80800002A80 002A82A8B002300A82A82000C82002A80200002A82A82A8AA82A8000000000000000000000FF7980 000000A00A42400C00800800C00C00C00A0080010028B2803103002A02802802002C028028008028 0202A802003002842802802802B02800802801002002802000000000000000000000FF9E03000001 0012002012012010014014002032010001004C0080482D004850000000C30948800C020040009009 10405000890C208B0800814902004000800001004000000000000000000000FF998B000021001802 00182181180190180181180180000064262162260060C600600620610601641080E8A60AE14600C0 06546106106106526040826010406096506000000000000000000000FF4C2E000400A00820500D00 800A10C00D12D40840800044300300300340320BAA3B13143423503021003003203012D4334B00B4 23453403003011402C010A3802002000000000000000000000FF4B7F020041020068100400000080 2822362020C20000C80E00020808800E10440020A00C00400800800A888009000208408408208008 08840851009610000880880000000000000000000000FF8147000000A80800000808A0880A800888 85080080008220020022020021C220240200A08202202000A14210200280802A40A1021020023020 00040080322012402000000000000000000000FF5C6B000000400482280040210400108001080228 00002080C0E080C06000208A121C520209004208000000080040C9600409048E0504860080084000 01080000008000000000000000000000FFD4D6000000000004020000202600000000100400000080 00000900000280000000000400201804100200004600209460901000062A80064000200000004483 01800000000000000000000000FF98FB0000A1001800001981801811801901829801800004600C00 640608600010810000414421C0408160040180940065042200464061008A600002400800602E1260 00000000000000000000FFA4AC000241281908501C8980B889D03A2BC21B218000346D0D1074172D 6D048C0822C0CAA4CB4800006A088208800B0940A10840CD680028682080C108806A060860000000 00000000000000FFAC24020080C2182402180180180381188190B80B800001780642E10600604021); SDR 8000 TDI (08E20640408000000001400A0106861561182042000000181B210418E00658600000000000000000 0000FF4996000000001801115831821811801821815821880013600640E00600608400402610620E 00C300000000004412106126006406200090003040020014006006026000000000000000000000FF 65090008001000220000001480080040400000C000000A8040240408088008008040000008230000 0000000880000160402280260001060000200101002001104400A0000000000000000000FF093200 00000000020000000000020000000000000100100000108200020544494220240010504400020008 4C000004621040040E514006120000008110020080000000000000000000000000FF87AA00000002 080182086080080080088880C804800002202211200A282002122402482082002428012592040602 14800210250204221200A000082012082002002000110000000000000000FF3E68400C0040040440 04004004804004004004000201001601021001000009001189009021029081009271148029201061 180061004001000001001001001105000000000000000000000000FFA1F3400400400C00C00C00C0 0D00C00C88C08C00820100300310300B28241342305344B1235530C100B00320A40342340B002003 00A403142801103013103003002000000000000000000000FFB3EB00000004180102182180180580 180180180180801460260364060260A611640608600E00621004630600602E01400620640E484006 01600000E106026006006000000000000000000000FF84E000000000022520120120100120120124 B201000100480080100500491080080480508C800802800800894A40404804008820C0C840810802 800800004804004000000000000000000000FFA0D700000000081080080080080080080088080080 00002092002002002002002002002002002200002002002002022002B02402102002122000002002 802002802000000000000000000000FF5DA20000006AA0800AA4AA0AA2AA0AA0AA5140AA00002A83 202A82A82A82302A92A82A83202A80002A82A82201888882A80600880302892402002A82A82A82A8 2A8000000000000000000000FF529500080000000000000020040000000000020000000002D00000 00000088000000520040000200000000000000820000008001028000208000000000001001000000 000000000000000000FFA1FA0000000AA0D24AA0AA2AA2AA4AA0AA0202AA00002A8230AA82A82A83 202A82A82A82282A80002A82A82A04008882A84104883002A82080002A82A92A82A82A8000000000 000000000000FF59C00000003543303543541541543543543541540000D50800D50D30D50840D515); SDR 8000 TDI (600624830400E0861000062200064144001080262C600430E0020060060060000000000000000000 00FF4A78000000041825001801801801801801801801800000600609600600631401400600600608 20400A60040201160060060040060040060160840260A8006006006000000000000000000004FF3D 00000004001C01001801801801801809801801800000600600600600651402E0C600600610300000 601409010624000E004020000046006A04006000006086006000000000000000000004FF85AF0000 28001800801801801801801923801801800000600600200600602628601600600600C00000412600 40000064060942060D000600200400680200600E006000000000000000000004FF1C890000D00AB8 008AB8AB8AB8AB8AB8058AB8AB80002AE2AE2AA2AE2AE0040062062AE2AE2250002AC20622422808 80A63240C820028E2AB0042AE0062AEA262AE000000000000000000004FF0CBB000804001A010018 01801801801801801801800000600600200600600610400620600601680000411409409004600604 6026154006002800027000107096006000000000000000000000FF1760000504155C011559559559 559558A19559558000556D5655255655610400649655655654E004554114554324510406436110C2 055655240455600455700E556000000000000000000000FF9BE00000A80AB8008AB8AB8AB8AB8AB8 AB8AB8AB80002AE2B62AC2AE2AE0AE00602E0AE2860840002AE22622624648E32620808E20628E2A E00040E0022360462AE000000000000000000000FFCC20400000001A008018018018018018098018 0180000068060040060062362B40260060060040000062260060160400AE00240088E00600600000 6002006CA6006000000000000000000000FF99B80002800AB8018AB8AB8AB8AB8AB8AB8AB8AB8000 2AE2042AC2AE2AE4044FE5860062764660022AC2062062860A82163004880062C82A800210000600 E40E2AE000000000000000000000FFD4852000400018018018018018018018018018018000006044 00400600604400401601600E20C80000401608E04200600E0120064220000008000200060C628600 6000000000000000000000FF62C4000014001000001801801801801801801801800000608E002006 00630E4064262C60861040000020C00460124061260A042608804600600030A00020602600600000 0000000000000000FFC21F00000008104402180180B8018298018818098000006026002116156006 00620621600604400000A28814600202000620204002040600600000000421611600614008800000 0000000000FFBAB20008000018010AB80990380182D80188990D8800006006146486026096116186); SDR 8000 TDI (011042210B40260CE0022462C40B20561220800060401460420042A2A06210000000000000000000 FF5E83800000001801801803801A0180180180380181208060C680642681640E03740650C22640C0 201140260B6456008884452000000010202100086042004000006000000000000000000000FFA871 800000001800801801E01801E01E01E01801808000602600E00602E02430E20624C0062040014864 06306086000006026130002007806080006086006006006000000000000000000000FF8015800000 401800C21C01C01A01A81C01A01C018001007104C0E047626C372471E7105016814019206A460160 0626681E0160AE400616002419007087006805006000000000000000000000FFBF41000000401801 421E03A01C01881801803C0180210060050872870060060078068062250260448140000442544093 04400200026026206004904046806007806000000000000000000000FFA6E2000800001801001801 801A01801801801801800000600480E00600600400600600600408628A1141081040200268040340 4604600614C402004316004006006000000000000000000000FFC6AF000000201848A01801801801 A01A01C01C01800100680414600680700680600600480500E00000500000E2804000040800000140 4600000402F046004804006000000000000000000004FFCEDE0000000AB8968AB8AB8AB8AB8AB8AB 8AB8AB80002AE2AC2462AE2AE2AE2AE2AE2AE2AC22601023422022610808E2AC30428E78428E2100 043861062AC2AC2AE000000000000000000004FF09BA000000001809001801801801801800801801 800000609600E0060060B600600600600020042008600C04C0062400060A400001404608000422C0 42004004006000000000000000000004FF6D6F0000000AB8C10AB8AB8AB8AB8AB8AA8AB8AB80002A E2AC20E2AE2AE2AE2AE2AE2AE2AE3202802262242A402628E2AE24C0AE0442AE2002042364262AC2 AC2AE000000000000000000004FF9B79001000129945955955955955955954155955800055644654 65565562062D655655455014810444E4A45065461105564145105445162421041044025565545560 00000000000000000000FF318B800000001801801801801801801800801801800000600410600600 600400600600400001000010610C00E21604600600440600C0060C200200600E0060040060000000 00000000000000FF9DC10000000858818AB8AB8AB8AB8AB8AB8AB8AB80002AE28E2262AE2AE00400 42AE2AE2AE00000020622E20823608E2AE0A40EE22028E0160000063122AE2AE2AE0000000000000 00000000FF9B1400000000B811801801801801801801801801800000604600600600602434600600); SDR 8000 TDI (008000000008000210000001000200010000020200000508000020000000000000000000000000FF 2BFA8800000AA8808AA8AAEAAEAA8AA8888AA8AA80002AA2AA2ABAAA2AA203AABAAA2AA083222000 22A2222224020AA2AB00208A22228A0CA00022200200A003AAA000000000000000000000FFD55800 08000010112012014014014014024012010000804400004804805009051004841085010400010000 0100080048000140014300402041000884012A5009004000000000000000000000FF086E00000055 5903555D55B55955D55955D55D55800155655755655755655655655655780444E0904C654E556056 53455640C15652E55640620044624E486956556000000000000000000000FF9F850000000AA8828A A8AA8AA8AA8AA8808AAAAA8000AAA0822AB2AAAAB2022822AA28A4420220803225223023222AB28A 2A22AA08228A10A00002202200A3232AA000000000000000000000FFA4C010000000002920020000 040040040020000000000000000000000000010010008005488804000080000000800000000A0201 000000110000090100848200000000000000000000000000FF97630000000AA8C08AA8AA8AA8AA8A A8588AA8AA80002AA0522AA2AA2AA1420022AA00201250224028201224222208826222208A00A28A 04000040211A0000022AA000000000000000000000FF3E7D00000000004000000000000000000200 000000000004000000000000884B400010049420C000008200148000446010004046220026200080 200500228480000000000000000000000000FFB0F380000000001400000000000000012000000000 000001300000000002400000004480200A01200201280001100061001084060800060B0000130020 080050000000000000000000000000FFBED900000000181100180180380184180194B84180000060 2600600E0060000042060040040842100A802408800222628401004E1064400260200C21061464C6 206008000000000000000000FF53DA00000800180110B8018018819118C5801901830000E0061060 0620600204600650650401408020010604000210004400010000600000401000A024200002006000 000000000000000000FFDB570000000018000439058018C580180380181182800066240461060060 060060060840044440C0002086000182000006144000042106004000002004202006016400000000 000000000000FF0BB200000800180002980380382388988182982980000060045A61062060061240 0624609426E00820200640010208640600448644026602040800A0840A200400E000000000000000 000000FF2F0E000000201809B01C81801801841841883B01800000E0060068960060060064060044); SDR 8000 TDI (44480840844064800A081613420010C30001002010210200014680E006000000000000000000FFDF CE088021001001081001801800001809820001800008608600600E4060064060061000A621400000 40240040000060060000C640001000001000202A002406006006000000000000000000FF27960000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006000000006000006000000000000000000000000000000000000000000FFD2FD0000010010 01001400201000200001001000000080000000000400100080000000400000400000400400000080 6800004006804006800000000000800000000000000000000000000000FF1772000000A008028008 00880A00080802802800800000200200200200200200200208280250220000204A002000288082D0 6802026002002280802002002002002002000000000000000000FFFACA0400000000100100000002 00000000000000110050008044010040091080100140004000000800900010020080080000028080 0000200000001020110000000000000000000000000000FF9824000000800A00800C00C008006048 00810800888128200222209220208A0030020E3D1A24234058342A4DA0400020820032F24025D300 2280003002002002002002000000000000000000FFE5590040458059018058418150041159419119 01804024600604E10640615645625688C146004000046006057010114096D5450721420610400014 6554916006006006000000000000000000FF9E330200000002080080010010002030000080010000 804004005800004404004000A048200A44A800024070082000400000580024400800400180000408 8004000000000000000000000000FF48400020448048808008208128021128C09088808020442002 05200240222224302A11212200220000200282200010A8025122830120028020000A2B4A00A00200 2002000000000000000000FFB9350000000000000000000000000000000000000000800000000080 000090010C0080000000000202002080000800088802000022040090000200080008000000000000 0000000000000000FF742B0000004000040020001000001000040040000000000100000010000000 0000000005000000004100002C840051000050001004044040000100004000000000000000000000 0000000000FFAC7C0000004000204004000000000000244000000000800000800001000000000000 0010210805101001000900C02000002C802010002040000009004054048800000000000000000000 0000FF22BE00000000000A0000000000002000000002000000000000000000000130000000000410); SDR 8000 TDI (A404200080000042080000808088800789600400C084086106024006000000000000000000FFE46B 000000800851010841882A2810584CE018818480096206016000C460260C6296003806406200120D 46024141C1620F8A4807A2489622E000007806012006006006000000000000000004FF1850020000 840801000C41A0080001591080582580008060060460000065370060070820A62000204022868044 2000100601025048028600600E004424002016004006000000000000000004FF5FD6000001801800 801A01800A00609882883E03800000780600600080604EC060040120100040000040468000404068 04000A2E000216006400016003806006106006000000000000000004FFFA41000009841860821841 80084202583288184180006061868C60000061062261A4102008D845C04071200814800082181B00 8051810EBB620638E0C2086216086006000000000000000004FF624E020008800808840801800802 021820C0180180000060060860008064068A602480214000400002420610408000F4060240860040 06422010404500082506004006000000000000000000FF93A7000000840800800811B00920001800 8018018A2042680640E0000060060060040420C08C4206007A0020C94000040E0080001004060420 0600440811200780D006000000000000000000FF29AC0000010210059A7007893094235853824191 800110706F24601600701E4060841160212903003043042060308161003CEA068060165320001871 0F08E206026004000000000000000000FF8EC8000001001001A21001A03000041883820045800000 E10E00600610600600612400600840602040E02C026801300800C064214178C60020008070264064 C6047004000000000000000000FFE3FB0000000000010000118018304019018000018A2140600700 600F08700720604514008002004000C84404E08048020C02700040649020A0010064828060068160 04000000000000000000FF2B55000000000001200001801800421801840401800000600600E00620 624602708420110009004800C00400612000680480A0264922A10020200060028062860160040000 00000000000000FFFB5E0880210010058810818110040958598044D580009D63868D600E006086A0 722601603621410010413420221081610E8808C691084E1000080828EA4801460060040000000000 00000000FFB333000001001001001001801000209801200101800082600E00608600640E84654608 08061042000948840060408A0006820A008008468080020028031000260060040000000000000000 00FF1858000001001001801101801800151801800001800002640E88E10600615600600620600600); SDR 8000 TDI (05414708614285600600680700000100E0009068062C6083006006000000000000000000FFFF8600 0001801800001E01A00E01800801E0040180002060460064060060158870062000CF206280106000 006003000007206001200000006000006002806010006006000000000000000000FF059900000180 1900001A01801801C01801820083842000E00612C0A7007422C0604708F004006008404012056006 080016006200156806046000007806046006046004000000000000000000FF048900000180180000 180180180180082184040D8AA060322E2B652708E2002A606662F2AE62E43828420A10E20600602E 4868AF406227826000006003506004006004000000000000000000FF6B14000001801880001C01A0 0A01801800000901A24080B04634604100443650600E93415400408448681685600410080E000401 14C00604C004806006022096026002000000000000000000FF82E000000580182000188980880182 0A022028A1B000002006006000004006006286854004C84000106000086000286016120016006006 00400082680C002006006000000000000000000000FF681E000001801840001911C15C5180585400 2D518280850326086500516055406526004C040244084048508164840008460060A0004A07026006 146010846004006006000000000000000004FFA5A700000180180000180180180082180000080180 404000164260400064041360064040B408C0400343000860442D6006046006006046006000006000 006004006004000000000000000004FFCEC000000180180180180180000100100000180180000060 06006000002006006006004006000000002006006002000006000000004006004004006000002000 006000000000000000000004FFAF63000001801801801C01A0000120000000180180000060060060 00806806806806804806006800802801006002806006800006004806806000007000006004006004 000000000000000004FFC6B300000180184980184180500100104C0208438100012D060060000C40 260460160440040D0004080106006906209006016200804006204004116082892000006000000000 000000000000FFD1B2000001811901851909809048114000010809840012284608E000C00804906B 0690480C20092082025604602E8064068C60460D488E126000006002006004007004000000000000 000000FFDC1E000001801885901C01D0080040980080592980004260260060000060160060060821 0E00640000080800400804601400033E400806016000087007006006047606000000000000000000 FF9DF40000018098138A1889C0804000180082B803800120608708600008600E1060070320870AE4); SDR 8000 TDI (00080000006A82202280A83202E82200000000002002A8010208000000000000000000FFAC4E0002 00A04C08A00A00A10A00A00C08C00A00800000200280280A00200280290A40A10283280080A22280 280200288290280280A802802800912C0A852002802842000000000000000000FF12E50002022002 C42020011420004013042020010000000004800800800000004804804811404820AA0900D5400000 4814000A00904800908800C248C4880000CD4880000000000000000000FF348D000101805841811A 01841801805001911A018000A16C0600610E0AE28604E106244406424200006536046006104406C0 604E12600620600014608604E00600E226000000000000000000FF69B1000420D20D02D42848F08C 148A0D08C20820800100300310B00340382A9024020831331030012B30022034B2A130430A350200 B20314300040B40B503A320A3082000000000000000000FFC4CE0002003803C02604403080002003 0030040A0001008801100800008021000800148810900800910E00820249480A201C090010C80086 0800884800E0042890C840000000000000000000FFA60500008080080080080082088080A800818C 00800042200202200A04241280200228208204200044200304A00300000202200202000200200106 2080042242802122000000000000000000FFA22F0000038018259098280100010000018018800000 280280000116D350000D048940406002440008C04C4800202260C080849F04000630000210063813 88902B0408000000000000000000FFC05E0000000000000146900820005E40100620400000010408 090000000140A01101000408008008000100200010906408400067080006000000E1010000000084 0080000000000000000000FF854A000161867800001801841835A018818002018000006006204286 0062081262060203044040002240B600658201600620000621060840600000680600600600600600 0000000000000000FF1B76000285A83AA0229901A8CAA1922A81A540958000843096B04A8680EA40 28688E81690702C80884CC88C0E83200102ECB0820A0AA00C068002A630CC04C462B68C600000000 0000000000FFA79D000021821800001849821801809C01C00001800051640602600E04680C046406 B2024D004000B040220A6A824A03068000880C000E02600000604405411600600E00000000000000 0000FFB788000001801800001801A018008008018000018000002007806006006004006006006006 004000804002806806006006000006002006006000806000804004806004000000000000000000FF 2B29000005801800001801804851A05811800201800005610620450740605601680E021006800400); SDR 8000 TDI (000080800C62085200060080061202A00400002880C0000020000000000000000000FF7E6E000003 80188182182102100100000180380002000100004802060204D00000005144C05000080C00802240 0001629012022E02400E088008420300000010404000000000000000000000FFE243000000800800 002880800800800800020000808002208A00218220201206202210200202250044A5220020426000 6200208250620200000050201A088492002002010000000000000000FFBF7000000000040000C400 400000400400400400002100110110840900910108128906110D1080A12010410006610010017081 01080001000001001501061011081000000000000000000000FF78B5000000800C00800D00C00800 C00C00C40C00802104300340210B0134030A34D320B21304A9494130034020030030530420031424 03002811043013093103483002000000000000000000FF5481000005801901829841841801801801 803801850000E00E01600642602E0060060840442060000A608404600640E50600E22E00401608E0 00206006006006006006000000000000000000FFFDFA00023422C203210200200200400201203001 0000005004004800804804800804804814C00800884104810800C04400CA0C20AC48008048008110 048A5004000804000000000000000000FF70FE000000800820824800800800800804800A00800000 200200200A00200200200240A10203201000A2222A200204290200A00200A04214A0000021020120 02002002000000000000000000FF73ED00008008008C0800AA0AA0000AA0A80A80AA0001AA82A9AA 82A02A82A82A82A84B02200900003208081000000880380000880402882100003B02682002A8AA82 A8000000000000000000FFC225000004000120000000010000000040000400000100000100001100 10000010002488800480010004100C80010000A00100010080000080002208002880004210400000 00000000000000FFB29F0000A20A20880820AA0A80000AA0A80AA4AA00002A82A82A82B02A82A82A 82A80402A82400082214902500002882400282A83082A82200002202102482A8AA82A80000000000 00000000FF90A30003503522043543542042003542003541540000550D50550D40550550D504C108 0450C80840449120C00800130C10D40B30440D10D408008905288415509005080000000000000000 00FF87D3000410410420450400404400400404400000000080100000100180180100100110180110 1001010841001001841101281001001001101001001101101800001000000000000000000000FF2A E40000A80A80100A80AA1400000AA1340A80AA00002A8AA82A82A02A82A82A82308A022008000010); SDR 8000 TDI (0022100000061200200000220068040000160B6207004026000000000000000004FF185E00000180 18200018018018018C0804001801800009600600600800601600400600C00420600008E000006004 44600680E4061480060060000044A640602E004416000000000000000000FFB4090000AB8AB8C80A B8AB8898818008A80818AB80000062AE2AE2A00062062AC2AE4842AC0070043260002AE0A20882AE 206088A0028A2AF0042AE0460060872AE086000000000000000004FFB4B200000080082000080184 58018040040018018000096006016000146426004006304430106800096040004004046006010026 00400600C800004006414016804406000000000000000000FFDCA200015495491015495584D83593 415215595580004D65565565404564D6554556084D5009600444E03055400C150556488550440532 554005556296244406556236000000000000000000FF1C7C0000AB0AB0880AB0AB88988B8898A98A A0AB80002262AE2262B620E1162AE2AE04008640C00040650C2AC22E28E2AEA0608F14628E144000 2AC4360042862AC086000000000000000000FF8EB800000100100200100188190180180180000180 0000600600601608600600600604E0064240100065040044C2400006026001896002004000000006 10C0AE004086000000000000000000FFB0D00000AA0AA08C0AA0AB8898C98C90A98A80AB80002062 AE1062A62A608E2AC2AE09080C0440600460042AA3260882AE3C64A84162C86240002AE10616406E 2AE056000000000000000000FF84CD00000000002000000180184182100580000180000460064060 0E00640600600600800420480020E00400200240600600E0060C2004104800802096414007006406 000000000000000000FF83BF000001001002001000043804005801802001800008E0060B600600E0 260060062242A60AE0000A64CE00009602600602020621004601000000422610030600414E000000 000000000000FFB27800000100100000100000584410B811802001800000621600600605610E3360 06284006286C00226206008022000206220140200022020CC0206006308106006046008000000000 000000FF9F020000010010400010001C18080030A190A019800000610E0860260060060041862444 022051200861020000024480540082A813403810100000E08600044660E006000000000000000000 FF61F5000001001008021020009810001921810003800000E0060860CE0060060040560040020050 2008600200010209600409021602000400500012E08E000016016006000000000000000000FFA380 00000000002804002002A02209000808000400000083000000100501004880280202000800000000); SDR 8000 TDI (40022A5086000080000024046000006006020026006002000000000000000000FF2E8B000501C05D 00401C61C23821C11C01A12401982080F04710F004D648476AC636C22544C061C091500020470420 C047060496800714406000046006090916206006000000000000000000FF0E1E000401C01C00409C 00821800801C00001C01800000700680700200628704700308600600400500701402C02400C21020 6020B0600400600528648E102407406004000000000000000000FFDDED000011809800005840C058 208018002058018001006006006002006804006002C0601480400000400410C23400400410440605 420402E000406006001006006004000000000000000000FF0616000405C05C24231C01841801C43C 02001C01800000680600680B0020070040021560A600400480690C04610044400085604040604408 600404E006116006006004000000000000000004FF235D0004A1CE188828188B8C988E8898A84A98 AB80002AE2AE2AEAA02AE2AE2AC2AA0063042AC0002AC22420600408C2AC20408E0C408C61600008 62AE2242AE2AE2AC000000000000000004FF2A0C000001801A018058058210438C18000008018000 0060060060120060064CE0062060220840040020801422400000A400444000C0000060040060060A 4006406006000000000000000004FF427A0000C388B88B8838AC88B0C9889AA80AB8AB80002AE2AE 2AE2B22AE2AE2AE2AE2862002AC0002A82C62AA2CE4AC2AC2AC2AE3142AC1060004062AE22C2AE2A E2AE000000000000000004FF3A9E000551D51B15D51951914111815B503559558000556556556D40 55255600655212251241600455244E4161123504144541104C453052E00443655640C5560D655600 0000000000000000FFCD260000098018218518018010018438020018018000006006006002002004 00400204A0280060000000160060060040040040060040040460000CE00610400600600600000000 0000000000FFB5830000AD8AD8C98AB88B88808B8818AC0A98AB80002AE2AE2AE2A02AE2AE0042AE 2162022640002AE22228622608E20630608E2202AE20E0001042AE2862AE0042AE00000000000000 0000FFA4580000038018258018018400018218020018018000006006006008006006486006156032 0140040061020060124000060562000880021060044C4006036006414006000000000000000000FF 500C00000080480180084180402180D0000058018000006006006000006006054006006080106000 00600E04A08604614E0800460040060260000100060060060A4006000000000000000004FF50AF00 000080080380080182402B815000055801800022600600600052E0A60060062200000AE8140064CE); SDR 8000 TDI (9000008412004083000008800000900400D005005004000000000000000000FF7C06000555D55D15 D55E0BC4584D955D519219558001556557D57546A0655755712645644E556001C470455165161564 4440E1164D6156556000547556415556D56406000000000000000000FF45990000AA8AA88A8AA8AC 88A8C88AA8A8AAAAAA80002AAAAA2AA22A2AA2CA10AAAA04242234A00022232228A0022AA2224122 8A4822AA0420002022AA0A22AA2AA2C2000000000000000000FFAC7C000400400400200040408480 00040001200000008000000008101290000002108800800000000803088000404001080A02008002 000000000090000C08000008A8000000000000000000FF9B820000AA8AAC888AAA8A8C888E8AA8A8 CA88AA80002AA2AA2AA8822220224022AA10200A22200000A0122426622AA23220A08A0222AA4020 0014A2AA4022AA2AE210000000000000000000FF426A000401C01825A01801C41801800003801800 00000000000000061104000540040484441100000444040040800040040804460080042C80004A00 00400000000080000000000000000000FF3952000000000000000040004220000600004000000000 00000012280001104800005001000000004800A81280080060880200065000060000000000001300 00000050000000000000000000FFE84A000201A01B00291C52401C00001C93A2C045800024600610 702600204400404A10009400600000C4A40004800042002062060061140000500800960022264062 00000000020000000000FFA75E000401C01C48641800083900003801D00009904000600642601601 600650C00600200440E4A000401448005030C04800E0884C600420A1000022063020160160000800 00000000000000FF1CF9000401C01808001901063800011A41800009880001610602610404E10628 400208600400C00000400401200808400410200800244400808009800E00200E00621C0800000000 00000000FFE0FB000001801C8002D8AB08180001980BC88007840020E0463068AC02640600C00E40 60047140A010420425206424402C4080D61801E464200000201624014600E0040000000000000000 00FF8793000401C01C20281A00801881805CA1824041802002710610680600012680682700211400 6200814950108500014402302406242214000029000486102446C06000000000040000000000FF03 7A000081803880011800801C0180180181020180000060060062063100AE0041161024D400602003 4108000104104B2A0024002020140000002C0486012416006004000000000000000000FFA3DA0000 01801800003801805C21801801E03003822000E00600E40580C0141160A204200F88E000046087C0); SDR 8000 TDI (000000000006000000000000000000000000000000000000000000000000FF061D00000000100100 12010010012000000012000000800004000000800004001000004805004000000804000000000800 004806000000000000000001004800000000000000000000000000FFA5F600000000080080080080 0800800A08A00800800002200200481200200200204308220A04200840220280200A082002002002 02A00A802000002002002002802000000000000000000000FF0FC300000800001000000000000000 00042500000000000000410080408110080C000000000904A0080808000000000021000801000000 000430001000000000000000000000000000000000FF42A8010000000800800C00800800C0080282 CC40800102200226200B202082002202C9200B40220808204A55A1820030020021D380A502002000 003012003603002000000000000000000000FF443A000000001801901801801951941F5584180180 20416407545916006116056006C0C0944C4410006004056007406146894446147336256400506106 C47416086400000000000000000000FF260600000800000800000000000000000100200000000000 1000408480C008084010A0C004224021A0006472100888000000400000028D000228044000100004 004040000000000000000000FFBCD80000000008008808008008B08C0AD2820A00802040A00A0A20 0200209300A00A20301344200000200202A00200294300200282240A44220000210302280B002200 000000000000000000FFAA340000000000000000000000000000000002000000000A004001088000 008208000088808802120000208000002008009004000800C00080024A0800D00400880020000000 000000000000FF027A01000000000000000000000000001000004000000008008108000000000008 40001400110100000401B80800000040008070040801800000000810000000000000000000000000 000000FF699600040040040020010250042200040005200000000008010008000B00000010080911 000000010012A89284284004A8000040030200100000100000051000000440000000000000000000 FF892300000000002400020805401000000210000000008000000000084000008005400200000000 02000000000100001000010400000000030002028800000001000088000000000000000000FFB6BE 0000AA8AA8C88AA920900C80EAA8ACE00EAA80002AB2AA2AA2A20022AA2AA00220322A2AA0002BA0 022420020AB0022A20CA2820AA2020002022AA2822AB2AA002000000000000000000FFC026000400 40042040040040020000140220020100010048050051008010000408012080900000010880050000); SDR 8000 TDI (6256C04D010042368CC004096888084447206008000000000000000004FF5F9F0000000018018008 8088180180130182020000002200C400209600620600600400A00620212010420482480400630420 400680420608400400680C10C02E506000000000000000000004FFC39B0000000018018004808818 038010818000020000002004002086006006D0614494214708208449C2040A40440060D00E050010 E056204004956106466086086090000000000000000004FFAC75000000001C008000018018038414 01C0009300000010069000060060060064068020028A240100400410440732600608400600C00645 6000006001004487806080000000000000000000FF03CE0000000098808000018018018010818002 41000000200600000604600601600402214241200400410404000400600600008080600604600400 700A007C06206000000000000000000000FFBE52000000001811010A21809851805865863A038180 8EC44444260610618E10604E52280A082B4016C0A0806804936080A3646700005E10010070610D00 400E207000000000000000000000FFD913000000001801000021E2B803841E0980B80B800131400E 00380680601600609600E01610740040C04E0130040461094C601028000600200800720400409600 E000000000000000000000FFEC1A000000001808000601845815801891811A518000006005000006 0A600690E0C710F0A34160A010601182600700601408250080284614010080650700648700F00000 0000000000000000FF3F050000000018400000018018018018018098038800006007400217816016 00720720752700600010740020634C40600404208608200600200040608608F02620E02800000000 0000000000FF09280000000101012B08218018498CD8258018080000C044544440060A600720E004 4A80042000804070040368061962A621C01672822688021010600400400702600000000000000000 0000FF657D000000000201200201801801801A01A8188000000268064044060060A640640400410C 08420080608408E01407E40600400800208E80200000E00622660E006050000000000000000000FF AE52000000000040040021801801811801901A04800102600680600710E156016807509201280302 006084916804800106040110917116106003416106D5685644E000000000000000000000FFFA8800 0000000001080001801809881821811888900000600600600E046006006000040050000000106404 424526480026210006226246006200006006006006006000000000000000000000FF0CF500000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0102E800006000886200806002007006046000000000000000000000FF116F000000001800000001 801801811C000218410000280A060A60B200E2EE2AE68646C68C62C0F00EE6BC05C20C2260200560 2E54E000056420006002006006406000000000000000000000FF1172000000001801800200801901 A01000110001150014300451454201651654600410614080028600604050400CD1440600610080E0 00104007006000806206826000000000000000000000FFDD5E000000001801808000809821A03021 082243088002A0AC80D20AA8200700602E28600080000800684601600480420E80604680608000C0 00006000806006006000000000000000000000FF46CA000000001801810401801951845504124001 1140CD21544144325064CE08E494C56A0833002E12E50142410E05280000680000E0010160260460 06006007006000000000000000000004FF985B000000001801800001811801801041000003000000 24040C410201600644604608610000008000601600420640454C4060160061000060040060060060 06006000000000000000000004FF8A18000000000001801800001801801800801801800000600600 60060060060060060000060060040060060060020000060060000060000040040060040060060060 00000000000000000004FF0B4F000000000001801A00001801801801801801800080600600600600 68060060040048068060008068060060020060068068060070000068040060060060060060000000 00000000000004FF4246000020000001821801001A09805800045841000000200280600601610600 6086C06082042004006000A0600600200010600000E00001408400640C1065068060000000000000 00000000FF14FA000000002105801881105AC180184B101809040053204680624608280E00600485 4A0A20A08A50ED00906216517544826A060068801268220960060060061060000000000000000000 00FFD0FE00000000200380100080188D801829811809800102C00400600600600600600400A04210 A48020401628400E04F024004206004016804400006004004017806000000000000000000000FF69 FE00000000000182108180380380180180980182000040241062060864870061050320A2002044C8 C08E00000602620000500010C006004085046008414016086000000000000000000000FF31C60000 40000100E01001881841803805945841800030400400402601600E006086207C0A2C721000640600 42063060870C40060058960D4244096404105D16006000000000000000000004FF53020000000000 00801001801801821C01841B11800044412400400E0060063062440A6142246A04006000800A2654); SDR 8000 TDI (014820925000950801004904885000004000000000000000000000FFE8FF00000012190190188180 184184194900190B8000406494006006006206046116044004424000006826106016126126C0600E 01601022600001630C006206216000000000000000000000FF733E020000410C44C08C00C08C14D0 4A04C4CC00800114A0034B340352B08A903023403D5209340928330325324320B40B013102202541 10B0103430422CB002802020000000000000000000FFFF960400002182003282202802C020008421 02000000910E108008009B08802809890006C8528C00801000900800C88A20000800800920940810 8909C0898809000240000000000000000000FF9025000000000800800800800804800A0080092080 006A280200A00204210280200200A002002000702182452442212082002003002210082001042633 066423202000000000000000000000FF66EB00000004380981198001181186831800180800000001 8C0906000084168402500C5010840000000064220004040058A800BE018040008028000000000000 480000000000000000000000FFDFB900000000000200000000000008200000800000000480002000 08400000828000400101210020800600008210100100410106820088230000A08008B00200820000 000000000000000000FFFE35000000100145802002801801905A6084581680000060265460842000 0610600482000208201000E00400602002240602E006486400402200526002406004016000000000 000000000000FF10A6000000200215A4A320A81A81A518A0201A2C0000812C4E90E90694E90642E8 0E029512D22820416C24A34A208AAA2F106910086140D12A00206C4228EC44046400000000000000 000000FF117700000000C00180000380180188380980980080004A6102C042162060060862879010 0600E000006884004002203107C360400362080220500D611204680C286000000000000000000000 FFE629000000000001800001801801801801001A0000000020060040058040060060060000060060 00806004006002006006006006806000002000006802006005806000000000000000000000FF49E8 00000000180000000180191184190488186180400048064020020060068062060000049040010060 0CC4410801210440688700600082E000047002006206006000000000000000000000FF48C6000600 001800000000801901801E00E01A018001804006403A420060072860052042C52040000062450060 0040600400700052F801006000006002006006206000000000000000000000FFA1F1000000001800 000001801801809800809A01950094480391688A8124AE8460061260040044C8047804D5400408A4); SDR 8000 TDI (2002032012092080042022002642000002000000000000000000FFCA294008000080000081800000 00000400000480000100900100108940020100002100120128100100900000820800908101800100 1001201001081001005001001000000000000000000000FFB831400000000800800800800800800C 00800C80800101300315308304204B45202314305308300915308200A43202B34344210302300340 3081083043013403003002000000000000000000FFB4FC00002000980192B8118018818118010018 01900028602600621600620600630E21628620600000624422608608600400600608611613600000 C00408600600E006000000000000000000FF286F00000022220020421020020020020120040A0001 010800808805000800000800088010D50C00800B24940800941414D10C210B4804800C0080494480 5004804004000000000000000000FFBCF70000000008248408848008008008008208408000002002 08200200200200234AA0222200208000201220200200A14202200200200215200000240A00200200 2002000000000000000000FF6A5100000008C0880C80640AA0AA0AA0AA0CA09000003A02A82202A8 2A82A8AA80000209800400002A80500082A82104000000882002A92400022A80102A82A82A800000 0000000000000000FF3DD80008000020040200000000000022000240320000000020000000000000 00010801001000000201002832002000002000002004080028000200004042000000080000000000 0000000000FF69540000000A81120880000AA0AA0AA0AA08C08000002202A82A92A82A82A8AA8210 4C8C004001002A80002802A82800202002882802A82882002A80002A82A82A800000000000000000 0000FF6D810000003503503043543543543501543103000000C90A80CD0D50D50D50D50C40D40CC0 D50C80C81280800C08D10C88D40D10900550830900D50B09110D50D50000000000000000000000FF BB310008004004204025104004004004004004440001011001000001001000001121000029089401 001501029001021111149041051800001001001541801001000800000000000000000000FFE58500 08000880A80100AA0AA0AA0882AA08A08000000400302002A82A82A82A8000220228220000240800 2101002402802300886102A80000022A80000002A82A8000000000000000000000FFDB8A00000020 0A00A08A00A00A00A00800A20A208000CA2A8294300280280280280280288280300091201280A902 80300A902C0300A000C02900802C32433002802000000000000000000000FFDA9C00000022220232 420020020022200120020A000080880C809001000800004AB090C004894B00824320940A48950840); SDR 8000 TDI (C82AE0062270062AE2262AE2AE2AE006000000000000000004FFBD02000800001001803805801801 802910801010800000010600000610600600410420610010488000615010E1260000940060060060 06042800004040006006004006000000000000000000FFBEA5200000151111911921155955954030 91111480001284C64284CE4565565565560064464441045560A85564B65045485565105560065420 04550492556556554006000000000000000000FFEEFC0000000A88CC0898C98AB8AB8A802388D821 00002B022CAA62060262AC2A802C00422A22C0002AA00422220A02E2462A808E2AE0061160802AA2 012AE2A62AC006000000000000000000FF46A7000000002044021813801801800002025841000020 00040860060060040000040AC10200C0000062040060060060060000000060060162000020410060 06004006000000000000000000FFA4B600000008C0A80C988B8AA8AB8888018CA98580002202A621 617E4142AC2A84861542202264802AA6040022025062022AC6C82AE0064840002AA1122AE2362AC0 06000000000000000000FF9AF0200000000800041801000801842844020805800000001600610645 600400020609410611680000204410201224200A00402600600602C8000024028060060040060000 00000000000000FFF76000000002280200582080180180011180183180001080060D620610600400 604C2260120062000060962360C610A1240060060060062020800020B000610E0000060000000000 00000000FF8EDF0000000008000018D4801801800081821853844001008648640600604403200408 612202629000E20600600600208422610002628650A2000120C20460064000060000000000000000 00FF71E900080000008006388A8038098000C402180193201082AE28610620608400C1042A442013 E06208607213E20678260010602809601600000214A022036006000086000000000000000000FF17 B6000000000100005800005815800000105901800000045604600648C10400000424401640600010 61022262A600201000604E086006002080002402006446000086000000000000000000FFA13E0008 0000000000004000000000004200204C108000000002040011002004000000040830020800040050 00C0000088300086020280300500080280010000200000000000000000000000FF4E2C0000000018 0190180900188180100000180000004040200CC4000200064402004281040000000A052040014014 0044400086100108050000008000090000008000000000000000000000FFC90B0000200008008228 00800804808800900900880018200200210220202A00A18A08212A00210801211202200200220206); SDR 8000 TDI (10680444600520610C806407000000000000000000000000FF05FD000800001A05A0180380180180 58C1808045800000802600000680600680E0060010560060002CC00210C442404534848024006004 0D40005560AC006006008000000000000000000000FFA2E7000000005801801A41C43C0181180900 4000800008611400B0060068044460048004860040000068B0226088048000086404006006000005 006004005007086000000000000000000004FF206C0000000A9AA98AB8C9889AAB8A19478B008980 002262442B02AE2AEAAE1D62AC2A80462AC00401420241640218400430608C2AE2AE200004006244 2AC2AE3262A8000000000000000004FFBA810008000A400180181180080188180080401080001000 0400A006226004106016116420002002206006202524102104020400006004220006106026000006 084000000000000000000004FFA7DF0000002AA0ABAAB88BAC18AB8CB808AC208980003202042A02 AE2AE2AE2062AE2AE4042AA0003263060820160262240102AC2AE2AE20000422E2862AC2AE22E2A8 000000000000000004FF8FB5000000410555D55903D54D558558C3550142800044E44C5425560175 444362A642200E5100041164D013601444A44448E130556554082004406516550556444550000000 000000000000FFCA1980000000000180180181380180180180002380000161140000060060060060 0400209400000400604E0460C640E10C4260040060060B2000106016004006006000000000000000 000000FF9F620000000838A98AB8498AA8AB8800118AB08100002263062A02AE1A42BE0002242041 0624400024422222400422623420428E2AE2AE21600005E0042AE2AE2162AE000000000000000000 FF700200000000180180188180080180000080101500000860160080064160064B208600C4860240 0414C08210C04C0060040880000060060C600410401400600614E006000000000000000000FFFB9B 0000000310058018430008018348B5801021000000E14600000600600600401614605010E0000040 1600450410E094026026006006012000246344006006006006000000000000000004FFCD44000000 02300380588D00080180001480100500000860060D001602E0060060062260260269040020960020 823564D4006220006006112C04004004806006006006000000000000000004FF019F000000001801 8418018018018010C082100080000305520001064860060060040960100142000060400060160000 04004006006006006000006114006006006006000000000000000004FF1A250000000898A988D821 8AB8AB8AB10088B0A88000200012A002261042AE2AA2AE4062903854062AE2002AE2260500002A80); SDR 8000 TDI (AAA208200000224A00AAAA002000000000000000000000FFCA460000000020000000204C04002000 22004080000100000080880000080000008000881008000800000010008852082000800000000008 8000088001000000089000000000000000000000FF395E00000048C8A8CAACC8AAA8408AA90C8AA8 0480006004030022AA2AB0222AA14232208A06214046A00A3C24022222A229A2AA2AA01204800008 22001422AA412000000000000000000000FFE4E9000000041A01801841801831C018212018880000 90603444600000010E00000010040420C00208044401402000000400000400040022000244810841 0000028000000000000000000000FF092B8000004020044000020006820000840000220000048280 0880000002000002A80080200801404001000403100880100200060000C808010000004012000028 0000000000000000000000FFCAB300000040024C401C24209C01A81801A138800080A00007086206 28682400E0080024002D414040610600042C4221002400C403600240600000010000604602A02000 0000000000000000FF7123000000000400001800405885801891E218200C4002804644C02E02F10C 00600414201000440014405248010401203010840400601201412000240014E11610200000000000 0000000000FFC0C1000000000008001980003A918998C71218B5880002850600602600E02410E004 00610000422000400808002600200400000440600210402001001040E00600240000000000000000 0000FFA9A400000040040040582220980B00182110B81B80806402844266162274061060000A6590 0B40C02260420102966461340A004400E00A288000502000224086002000000000000000000000FF 73F9800000001844001801C00C01801810881800022000402630E00E106914086016004410214001 1050A6203008032092A16324246006006100808295082036132240000000000000000000FF551E80 0000201800001809813801809820A03844824010702C0B4106526056A0E3154D40040C6410214210 02204208602204608508600644200005000C000486802000000000000000000000FFAEB380000000 1E00605811801801811840941810040000500600608608702404608602400640C00804E200104128 32A246086005046006006000106007026006002000000000000000000000FFDE80800800409A0020 1C01C01C01881C00C218008040447194015016C06C16C260155148052444004250500D408200E306 E86244027006002001056087025106802000000000000000000000FFA68C000000609801801801C0 DC01901A01E0202480001008262A220602600508E40700028E906025005006005000004009040484); SDR 8000 TDI (0220202880200200200200E000000000000000000000FFFC26040008001000008000000000000200 0000020000000000000940400408440940000440000012C204D0100210A802900082080108000008 82000404000000000000000000000000000000FFE4F4010000018802000800820800800810A00B00 800100200A00A4B2A022030220A304210360B4000AA00245308282B00A40A00300A0021020000420 0360200260A000000000000000000000FFD64D140010401000001805805801951905855845814051 412641741600E51700614E0074044960000C7D075160064D6305544D565575162040008060861569 4600E200000000000000000000FF02C9020008001000008000400400000008200203080000400400 4008884000205800404B6D800608200AE88882082800442048010042401044910458140058004040 00000000000000000000FF3D6E0A00080008002008028028008A080285284480A008204200A80200 240A0020D220228220A000002502112002A421028A22822A2C422024080020820A20A20022000000 00000000000000FF2C8F000000000000200000000000008080000000000001010020041000810000 00008000200804018A0020000000080C202008080080098000020000100000002080000000000000 00000000FF89FD010000200000000004610600000000400100000020040000040000001080000084 1100100140000000640000008D000004308000805800508604000080000000000000000000000000 00FF198D01000000200400000240840020020C000144000104800080080000000100004000102108 00000011010000100A09100C0000800108420200080108100800050000000000000000000000FFBE 601000002400000004400C2000000000200008000010000000800080100000050815020000808000 04400B0080410200000200000000008000028000400000100000000000000000000000FFABEF8100 00088EA8EAAC888048AA8AA8A08AA8008000303AAA2A22AA2AA2AA2AA00230248B2220082AA01A24 222200343220A4AA2AA22208200020232203B2AA202000000000000000000000FF5F658008004402 00200200400414400040400131000109404104080400505000400000490401000000000800004001 100C140000804800414080550085400804145000000000000000000000FFD2569000007319559559 15C09D55D55D09F51855000144E55754755755755755624E4450C444E08055754741644601608452 6157D564D6446400446456326556444000000000000000000000FF56C7000000088AAAAAAC8A8AA8 808AA8108AC80080000220924922AA2AA2822AA20A2322325020001122A220A08A2A23222022AA2A); SDR 8000 TDI (09200401600600618C116040000000000000000004FF0B9A000000021400001820801841C0380B40 9001000001000602601600710610600440604244000420600784400610211414400ED06006906000 006016406042006000000000000000000000FFCCFE0000020010000011008018018018A10498C300 0010001604780600600C0060048860528062048068040240148248A0810006026006006004007817 A07052006000000000000000000000FFA0B7040000001810003801801800902001100A00000060A2 8640E5460161060069460D610F64216906500C52C6C491C0861E68400B6042016000066106206005 006E00000000000000000000FF8F35000000000800003801802A02802205800800000000BAC780E0 0600682620720C806A0608A01030E2B5015904204806C0748230600E20600000E2060870060D7000 000000000000000000FF3A880000000018002018810010048019428B0CA3800000202E8262068060 D62062CE027AC61281000160A608204EA800222022C181604B8060000062060068350A6000000000 000000000000FFA474000000001800001005001200801A228109010000002416016006106C160061 0E0A60A704622002620C09208408054340B10212E106116001016046006446006040000000000000 000000FF277E040004000010001801805A03108201001200000010A02642614401600602E0062160 04002408D84C26420A060640050B402160680A4122002161969A608421E200000000000000000000 FFEEBF0000000002002E1001003A21200000A01800000002008708608692608624600600661C6024 8020601400082D20800401400A41602620200042600E106006416000000000000000000000FF9C1B 000000001000001805801843801C01011D00000004030E0B6106046A16216116087020820130A254 249004B42902202408C612704691000102610F006A06006420000000000000000000FF7B20000000 00100008100100380180984480180000000080260060040060860060042261000060001060060280 060201000800160061162004000160460260C6006000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF2955000000000000000001 20000100140000100000008040000000040000048008050000008050008008000048000008040040 00800004000800000000801000000000000000000000000000FFF332000000000802000802828A00 800800A00800080000220A00A80208200200200200281610A0A008A00200210284A0020030020034); SDR 8000 TDI (6044016086A0700600E000000000000000000000FF14600000000018020018000000038298A12010 25882020600EB06A04204A06002006004006602004802822C2EC0608600600610480200A106004AC 4006E26006006000000000000000000000FF72470000002018001018002012018145510050C11041 4121064564A451641600AA1620E8C610240000203208C004007130000C4E00300680610440700604 6006006000000000000000000004FF58470000000018040018000000038418010090010000144216 00600C0460C64A21260C42060020AC00228204401408E40420400400201600600410400600600600 6000000000000000000004FF75300000000018000018018010018018018018018000006006006006 00600600600600200600600000600600600600600600600400600200600400400600600600600000 0000000000000004FFA213000000001800001801800001801801801C018000002006006004006006 00600680080680600400680600600600680600680400600200680400400600600600600000000000 0000000004FFA71F000000001A002012018310002022092018018000908046016007006006906856 00201400280624A0128068062060010B010408604200600688430610601600600000000000000000 0000FF2846100000001A08221841900040A000012418558020A0510F206544114006806806C10B24 102925082CC2006227036C2C404024446206016D0845402E006006006080000000000000000000FF 3AD50000000018080218018A78019401E52218010000007006306006406C06006004806003606411 00400701602612E104004434016202006001006006006004006000000000000000000000FFBDBB00 0000001800041821841801170605001805002120408E80648680E00600640C2061820960054AE40E 41E046C86055EA424C2A70220520050AE0060D6400116100000000000000000000FFA37C10000000 1000001E01011840883A0BA01855800010C04790E44628620508602681644B0002ACA07547803C06 40255401508401600200E48CA062AE006014006100000000000000000004FF0C8C04000000100000 18010818408018418358018001004006216086006CB6006106206012B2708003690600220608A005 024C0500700300600408F04E406020206020000000000000000004FF4DE802000000880060180080 1801881801003003000000200621620611601600E50610790600888004654401650580600420C024 806002826004086827856214206080000000000000000004FF3AB100000002880004142094180105 2049041C61000000800602610E08E44688E0060860361000600160244270C44166C008940C29E002); SDR 8000 TDI (2914280322B303002000000000000000000000FF96D900000020400020222022024020020620830C 0000C10000A08800500C900089090400008109208009488908008008100009006109408008000090 01618900A00000000000000000000000FF826E01000000A800000800814880800810800800800000 220242200200B02260340200210210A202102A0200210A30208228201200248A2020126430860020 02002000000000000000000000FF69E200000008000008101788B13918D94000188000000614A000 00010042091000800052000004000040847040200A80690680008200201000088200080C00204080 00000000000000000000FFEE66000000010084040140700006020000010030000008800880003808 08000008104080190000010B08000000014504000004001880008280400008201004000800000000 00000000000000FF8D080000001010480018080418018118288E0801000020600600628002410600 62060840242E0040A0001000A4968061065062A6040016006100106016004A060260000000000000 00000000FF3B51000000315000301A2A020AA1A21A202D0A490000C93096206A8493602680600688 4A4C808800320308A148D40969068AE886B4090024E800C12126A04206CD40000000000000000000 00FFADA200000000109000300010BC13909213C00101000002624602E03600631640F31600C00434 722000400408000422604E20624201005400600A04200E114026006000000000000000000000FFA3 2E000000001000001800200801801001000001000000200600600200600680600600400400600080 0000002006006006006000000000006000000006004006006000000000000000000000FFC1DA0000 002018001018002018000058108009078000A16406046206016016000017004CC6A0602080680680 6804027004404002802802106000866006A0E806004000000000000000000000FF058A0000000018 00601800000E00803C01800A018000003C06407825806C46801C0600402F007A004270A740700681 601420420A00A00200E00101600600600620C000000000000000000000FFA82B0000004018000010 0020180180020890C849802180A03601680E10500E1500B72B6C04106110886C0E04E2040072A00A 09410A7082C06048004107006006006040000000000000000000FFB3190000004018000018000018 0180000100EA0580004A608608E4AE0A60A62A82B62AC9841862B80422CA28620C84F2A81402A814 6102406091045006017806406040000000000000000000FF849C0000000018000018000010018058 110910498040016456C16054106C56152546556456203344502492C54C0401653640652E81280601); SDR 8000 TDI (103003003403002000000000000000000000FF67D00000000000138000D181500181382180180184 0008402620621620610610608E084014156240004084226086156006006126084116106202026316 016006026000000000000000000000FF43FB0000002C0200200201291052242202202200000088C0 05004004800000801000804144810800004804848800510934434000804A248C4800800004800895 004000000000000000000000FFBA1600000000C000800004842A0080092884081280000028020028 0200200200200200200A2422088020020820020222029028D2002012412000002002002402002000 000000000000000000FFF8B00000001044000AA0A800048408C1400880E000002212A82A82A92A8A A82A82A82A8B010804002A82A83002A88000010002102A90C10502002A8AA82A81202A8000000000 000000000000FF851F0008000120000024804400020920000A200000005000010008100000300000 480000004004000C8940080008049000000090000001008000001000001020000000000000000000 000000FFDF260000000000000AA08A0000A80300020A809000003282A82A8AA82A92A82A82A82A82 404000012A82A82002A8848020080A202A83000000002A92A82A80002A8000000000000000000000 FF414A0000001202000480341042A82002B421024C0000808D505504C0D50D00D50C00D50C488208 21400000C48C40900548D40A20D50D50540900D50550D50310D50000000000000000000000FFB6A0 00080042800040042055200048041040440200010000010000000000010010010018080C90100018 01051000301290448081000010501401000801001C31800000000000000000000000FF62E0000800 0820001002000900880C808008010000002E02A8AA88082A80002A81002A83281900000086102001 00428A202300002A82A82000002A82A82A80002A8000000000000000000000FF90D1000000048A00 042800A00A40A00A24A00A00800100B002002142802912802C43002002A42C0080202A9028029020 0300288A803002842800802002802532002000000000000000000000FF15910000002000003102CC 23520224221023254C0001000005004A00800C24000894800080814840CC4904848B28C05090110A 4080480088C882000004800805000000000000000000000000FF855701000001380000185180B00D 901849851911800040680640600E00600688611644680E004540014004016216006106D064065341 06006002A06016086006206000000000000000000000FF47DC000000500842420C828C0D40C12D04 C00C04800103340300300348230B4022030030820AB00010215350308252B24B0231130034330831); SDR 8000 TDI (4D56556557556000000000000000000000FFC8A50000002C8001C0008A0AA8310119128898938000 08A2AE2AE11600E2AE2262AE20E29620400022A2AA34C4422AA2062060102A62162AE000416AAE2B 62AE086000000000000000000000FFE8864000000000018000000098118938A98018018000002006 00601600600400200408680612600821635614400600220600602002601600600220600600600600 6000000000000000000000FFE9892000002A80018000A80A890198C0018C588180000062AE2AE0C6 4462AE33E2AE0462262060603A62260820062AA20632610222204E2AE0001EEAAE2242AE86600000 0000000000000000FFF1E90000000020018800040058018000A58018098000326006006446296006 00600448610600680000600601202E0000CE00E8AA10250600680020600610400650600000000000 0000000000FF0AE60000000000018540000008AB043808033842000001600600600E044002106006 02C0160AC00001009024028200400610640000A04600600000600600E00601600000000000000000 0000FFD834000000000001810000011801001800001800020000E2160B600600420810E22E004046 00E02028420C02000228C006006002012106036000106006006006086000288000000000000000FF F8C40008000000C9868000140869800009103830020010E04E0AE40609402A00E30E0060121EC220 0581001004E60844C62462262822061A60180124962E4216036200000000000000000000FF8FD300 000008011180200000189182405502D84000A00460060060061240C0002004006202006508000040 00810E004086306226542256207100022126316306026400000000000000000000FF339600080010 000000200015000004202204800800C00A04200002000485000000C0000420000088040020130200 2080400800000101004000800B0450000108090000000000000000000000FFC9CB00000004000000 000190300000380000980002000800403100C0040008444088510080240400094484444100208040 0000C00000100A0400080490010000020000000000000000000000FFCDD800000000004A8000A800 8900808820900888800020220202200200A00218A022002012082020502512002012022602042002 2E20D2012000002022012202006000510000000000000000FF6A314008004004004E040040041800 000000051000010010010113092810A100100102132D009089121000000009081001201001001061 000089021045001001000000000000000000000000FFAD5A400000420400C80400D00C0080080080 8C0080014032031430430CB03325302345344340311102B402002013403443403003243003042889); SDR 8000 TDI (06800006806000000000000000000004FFCE220000000008AA0000881410AB8078018AB8C9800020 02AE2AE2AE2AE25611E2AE2B03242AC00044440C3267042262AC2AC2042062AC2AE0042442AE2A82 AE2AE000000000000000000004FF8F78000800001040801801803800C02001001801000000600600 600600608E00610E1261000400041000960060260060060040A80840040060043440060040060060 00000000000000000004FF020C0000000010AA801AAB8098AB8880832AB88900002262AE2AE2AE2A E2864262AE2A02082AE48808612620E04E2AE2AE2AC2282A62AC2AE20420C2AE2AC2AE2AE0000000 00000000000004FFEBE8000000001914801D559518CCB11951555955000055655655655645644655 640640E44A1162A444E4444545141565565542004545565561040145561245565560000000000000 00000000FF2DD5800000001800801801805801821851001805000011600600600600600600600600 60420060000160140240040060060040800160060060000840060040060060000000000000000000 00FF009F0000000000890000898A800104388C8AB88980002202AE2AE2AE32400C2AA06422220240 40802222223860044062AE2AE2040062AE2AE0000262AE4362AE2AE000000000000000000000FF9E AF000000000001000005805081911801801801800000000600600600440400600600A00200620400 200201650C0060060060B400400600600408C00610E006006000000000000000000000FFAD660000 0000002300002180003304002480182380000940060060060940C60062940820B034E02009608E02 20464D60060060042D6006006084206006406006006000000000000000000004FF63DD0000000000 0100000182102B840103803801800010400600620600400600600600A00001700014600624200600 6056056014044026006804004006006006006000000000000000000004FFB6DC000000200001A000 04081001001828801801800024200600614600600011600600000400600020224201600400000610 608410210E006204556806006006806000000000000000000004FF227F0000000AA0018AA0E800B0 8108B8008A98AB800004A2AE2AE00E2AE2A82262AE2A0AAC2A700800A08A0862AA2A829620632620 A2062AF0040062AE2AE2AE2AE000000000000000000004FF0C610008000040018B20200000050218 4080182180002460060064061060040020040810400D680000200200411600014E04E22401008600 680000400600600740E000000000000000000000FF10BF0000003540019541140C31430400049539 55800028E5565564C65565544D65564515504160040C20024145565520C62CEC0E4882A65562040D); SDR 8000 TDI (0023002AA000000000000000000000FFB515000000000011034005800020211802001820000008C0 00000000000001006000404048024080014108088108000004084014500090000100410000400150 000000000000000000000000FF597580000002A08200002002211014004000000400000000000000 000000000000001300802900002802200404400003500080800484000000001200000A8000000000 000000000000000000FF01B3000008001001801202000844211048A89805100004422608E20620E0 2700602E00642A10C14002403600611620602200800001201250608000E506002000006000200000 000000000000FFEAC100000002101180140800D800E25101C058A101204040160060460064860964 0600008220440000C10623600608640C0802CC0420C000E4400C60060AA080116000000000000000 000000FFD222000000020001018840000801021808809821008020200E0060060060864863064420 8628400058400230206200620000400010208000E2000AE046002058006000000000000000000000 FF6FCE000000000001000C1A001823819801C8180308000362261CE22620642604642E23200614C6 0000C09A40200210600A08C4141820080860200041060A00A0086000000000000000000000FFC94A 8000080018098010200128004020A0803901804000700700600601640620E8860064560000A12410 460D608E2860260022CA0560464061000062A600A00400E000400000000000000000FF5201800000 0018018212002A1C00080100C81835800020610600650702615611604F48029640000845000700E1 0602608612200220640F106000005006001004006000000000000000000000FF1D41800000000801 600808105C00909849D0180180000061260060AE00782608E1171424063002001200060060878164 06006016006207006000007106017004006000000000000000000000FFC279800800001801800C00 003C00C01829A018118000C07026E0742E99F116E074C6C220768180004806E2C1201A00F3071461 86C0680610660080480700C005006000000000000000000000FF4060000000001000841600440000 C00101801823800000F00712600702620602700601608002401500D08F0060060A60040002000840 0E006004006806002004006000000000000000000000FF20ED00080000100080102004940194188D C0184180001060060060068070168C70068081000045100A40C60060D60170070040141248040064 010D6006002004006000000000000000000000FF7D36000000000800000004084000C11821801805 800103480680680600612640600600001500400420C2028920021060040000C08160040060040040); SDR 8000 TDI (2002002000000000000000000000FFE1570000400018010818518038518055519558018000246246 12E52E036156256106006154506341D4C34702630611610E4D45574A60A64D000080E00754651604 4000000000000000000000FF6C8D020088001111001001010000001000000000080191413400428C 4042201000400012A4A482A80242AC02C0880E860420482080140400870850050000580100400000 0000000000000000FF8BCD000040000800900850A00828802AD094A800800024204200322A202013 4CA10200283200200034324300228201208250A2C254288310850000200232230A00200000000000 0000000000FF707F00000060060000000020000000000000000000000882880509000500A0801820 0001008A04800088000400000A020882000000024080000000980000000004000000000000000000 0000FF465B00000000019811011040A0000001000000000000000800480000040000000040001000 300020C100804000000000408000080400412200007C07C0800010840000000000000000000000FF A23A1080001004040040201501005400100000000000000000000000800001001000930110290000 280288000040000B50D08A80100010000000000000148080000000000000000000000000FFE80100 000004400002020400204C01012420000000000A8000800800001000000000400000020501010020 128091000000020010008100800400000000000010800000000000000000000000FF9C8F80000000 8CA88C88889048008428008AA8AA8001A13AAA2AB2AA2AB2AA2AA2AB012223C02000062002202202 2AB0021120322322222AA0002ABAAA2023222AA000000000000000000000FFE1CB80080000104900 14404000A94200444000040000009004805004004005000004408004204500A34841000000005000 90C004000934804000401004005014804000000000000000000000FF31D790000014315510973584 995551190BF559558000106D57556D5755655755755620641411450120C086106017556517425404 4C6457556400556556504C57556000000000000000000000FFDC1C0000000AA8848C288AC8A80088 88888AA88880002822AAAAA2AA2AA2AA2AA2AA1023020CA00100320A28A00A2AA2CAA222AA0B2203 2AA0000AA2AA2AA222AAA000000000000000000000FF363C00800000800000400000000040202000 000000002400000000000000010000001200A00400000802294282C00008400000A4000880000000 000800028000004000000000000000000000FF0CDE000000081820891C888C8806806888CAA8C880 002622AA2AA2AA2AA2AA2AA2AA0422560022001221022425422AA0022222224020202AA1000022AE); SDR 8000 TDI (06800000000000000000000000FF9E55000000001861819809823801808110BCC907802110F53605 E0961C6816007006062006C1AB10A8520600680200CC260260400269061000000711664064832120 00000000000000000000FF9974000000001C01801809C21900E0800081060100A004E026507C0600 70260262460024A70034010044A600F0060550C62CE30A0040062080280000069061024A21000000 00000000000000FFA538080000001800801801810881800000C0288080808C401400681604604A02 641601628642200882411689600682628608A428A07C06A800B0510087A864060121000000000000 00000000FF1A29080000001C00901809800810C000888108C18000C348040C612614601322600604 70092124105045260C610E00D03610200250653614810044080600620E1020000000000000000000 00FF373E000000001800801801801801841911041001800000652674744E00600500604C0020F000 618000604624E4224260064043A002E10701022000E020026022B42000000000000000000000FF08 86000000001A00801811821801801801181001800080600610600600E2A448608418290082600002 60065162030840C6820002016846010000006A00E06006002000000000000000000000FFFCBB0000 00001800101801800810C01901811901800024D0440260A610E2D404600C00600602E4112420A704 634E0D5006044A86CA6316140140A46040006C0D082000000000000000000000FFCB5A0800000018 00001801821800801811801840000000400420600E04600010610402604840610008220600600600 6116100026006006000400016200026024402000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE07D0000000000000000000002 00001001001000000000000000100000000000000000480400480000000000100000000000500500 0000000000800800800800000000000000000000000000FF406D000000001C808888AAA28800A008 0880C800800000004020A00280200280202200200A0120009020022020420420A2006042042022C0 0000002002002002022000000000000000000000FF32D10400900002010000000000002010800000 000800200001000C48000550910110110540100B00248510048A0808840000080080000000041004 8000000808000000000000000000000000FF7F3900000000087080082282EC008008089EA8008000 20280300A12304208A08A08A08A00A40205008204218232200208240280200278221000050B54378); SDR 8000 TDI (006006000000000000000004FF6E7A00000000180100180182980180580080080188002AE0840560 0E10615600E416010090004440204044006400046146284006006006006004424006006004006006 000000000000000004FF747E00000000180180180180100180180100180180000060060060060060 06006006000004000004004004002006006006000006006006006004002006006000006006000000 000000000004FFB432000000001C01001801801A01801A01A01801A0000040060060070068068060 06800804000802004804002806006806004006006806006006006806806004006006000000000000 000004FF8025000000051801001801C018018018010018011000057506C5400650E2061064160000 100020A412450C8464072D6046400826006006006004002216007140206246000000000000000000 FF9295000040401801001821A2190192120280DD09A00048484E10413600684E216106CB0AC1552A 1040C82489600600688E10081620E40C0060002269261060040C6006000000000000000000FFE66C 000000021C01801801A07001801001DC3800000000620600600700600C0020042808040000040020 0600E1040060060009A60071CE060000126A27606002006000000000000000000000FFDF84000000 2018018018218212018A1841009201800045616FA0600E38600480A084008465C800EE18A20E046F 14C0E00620014605C33710000608600E006CB3004020000000000000000000FF0A21000040011801 801801800501801804820F1188005571060AE14600E24430241502049424C4002271279270843460 D6100816406806000005406106886002326200000000000000000004FF2767000000401C01C03801 B0002180180880084180000070070360A6446B2C30A14428880D00C40420682E20E0061161372000 0730640700000D226806426022224000000000000000000004FF50E0000000201A00A21801801801 001801801801800008C0040068A6006A4E42C02611404404812180040E01601610C4A68045068B49 4604000402600684624A007800000000000000000004FFE3C2000000001800821801801A01001857 009840800008414401680654600612410E8044840A04844082860C6C624042160802064040261280 0400602600E006846000000000000000000004FF4242000000001800803801880821001801809801 00004250040460060061060000162041142840000901263060860060074850260064160100092070 4640F002200000000000000000000000FF73A8080000001C00801801C0C801041801801801800000 400400612600600780080E0158140440044A08161262062040060000064464060000842860060078); SDR 8000 TDI (2002000000000000000000FF7D8B0000000020000040280010401491160E00C1000100D0000850A0 D001040400400048042300082A4A04A8400000040030C0C40410A044020008802060018000000000 0000000000000000FF7EA10000000200002022800800000842C80000020000201410169108010000 800888120120000020140840130000800020000108908218000000410008180070318B0800000000 0000000000FF08100000000019F00018018438B100180000100D80000A4804004806006494406216 0060068822000000A0000286086006C0000600610608000020471600200EC2600600000000000000 0000FF9437000000211B20885931A03A012AB903281209800082E30482640E826A260062B6C4ED46 102C40C96286A40A4E0CF2CE4A4A0E426A2E880800B04CD680080628640E000000000000000000FF C298000000045811009803881921001808A510A3800028600631612610E10621600708600644E008 02004810010600600681108200E1064104000150042A254E056006000000000000000000FF636A00 0000001E01801801801801001801A012018000006006006006006006006006006806006002800806 000006006006000000006006800002004004002004006006000000000000000000FF0AAC00000000 1811801911800201801801081A80000011500481484680E9A6946806002226816000D000C080A000 84710640200200680B0020005C47B4286026006006000000000000000000FFE52F00000000180160 180180000180180100180010200062A500500F10701604702600280600600000EC09002049006007 28680180700200200000C00400600E086006000000000000000000FF75DC000000001B01001801A0 0009801800001A08028004C01600600600600650E406486082806088D068264A40008170060220C2 22E80200200080600404E004006006000000000000000000FF8D5D00000000190100180180020180 18014019880A802169862A720E2BE22EA0F26E20F7EAAA63B800E0C710428021F22E40A9A841600A 002000106524016044006006000000000000000000FF104D000000001801201801801811A01E0148 0C1195408462340070161060B6D5640648400000080450C48C44C05100700614002604600E002004 010046AA680A886006000000000000000000FF614E00000000199120180182F80180388098A80384 0102422C50648640600680680600480000081080420C024000006006094806006F86002000000916 986800006006000000000000000000FFBC5C000000001A01001911C01801C0190101491580800064 54004146056206546046A004214B410411549502608040E2160040B6006016006004904426006007); SDR 8000 TDI (00000000000000000000FFF2AF00000000001080080080081082080082C880800000280280200200 2012012002042A2202A00001200200204A0020020320120020020024008120120024921520000000 00000000000000FF17B70000000AA2800AA6AA00A0500C809808010000012A92A82A82A9AA8000B0 0AA8280098210001A012A82A8000AA82A84803002A82A80000012312212A8D102010000000000000 00000000FF28260000000000542004000000200A0008100088000104908000100000000880800000 81088010800080000000209000000804800010000000010810080000002B00000000000000000000 00FF2CDB0000000AA28A0AA0AA08008008A2A009002800002A82A82A82A82A8308A292A832890020 00802202A82A80A8AA82A81402002A82A80002002A03282A8020228000000000000000000000FF0E 090000001543001541543523102142222022220000500450D50550D50CC04C0C48D40A00550200CC 0D51550C10440D50C50820D20550800800450440D50C48800000000000000000000000FFBE280000 0040002000020043440440000444440200000000010010000010408000010004210A100210800180 1400801001009049001001001002000000001001100000000000000000000000FF46B80000000AA0 800AA0AA0880AC0001000500000000200A802A8AA82A82A02283A82A80C8AA00002282A82A810001 82A82200100182A8000100A203A02A8300008000000000000000000000FF71CA000000000A12A008 00A40A00AB0A00CA8A82800090204300200280280210300280322200280090280200280210300280 2812D028028028000028028028CAA42002000000000000000000FFFC320000002012410010012032 042022CD202251000082801400000480481080480480080080CD00004804800CB0A4500410CB2082 400000490088C808000800904004000000000000000000FF33B100000000188B0058018010218D18 C58918410000406C16C4610628620620641614600600404084444410608600600685403614600641 400000628E106026326006000000000000000000FF5D04000000400C40A00A04D42C12C04808C20C 04800108A00308281200B15204202340354215308008309301320205340248310200BD5314308142 B003C13112013082000000000000000000FFF25800000020820D4804043052002022002002000000 500000E002100A8840A08820CC80C0800900808408000C08870A810F4A10A3044001090084088082 0800880000000000000000000000FFA6F8000000001800C08C02800804830C001188218000012280 00200280222280340220260294E04100211200212280A00B00200300600230A00000000201220284); SDR 8000 TDI (000000000000000000FFFA630000002AA2108AB8AB851089A2488188810580005042440062AE2AE0 C62AE2AA2BE2B62060000420662162262AE2AEA223262AA41622200020621C03000C2AA2A8000000 000000000000FFDDE600000000004C801801B03001804841820003800020C0240060060060060060 0600600095680002600600608600600610208E000006002900096006000000002000000000000000 000000FF847100000000010180180184982509181580515180001260962CE00600644E0060040060 0800650028A28A0CE0160060060080020024AE0920000261205124A4002000000000000000000000 FF3469000000000021811801805801009801820105800050E0862C60260062CE10600C0061080262 800200020060060B6046102006082036482000286000000004002000280000000000000000FFC503 00000000000104180180190780D8398000019DC000C0842B60165140260060C80460462820183021 5601601E40641E20621E0C81A6262090006060082018092000000000000000000000FFB273000000 00000100384580182180192190202980000244240061060000060161001060003120004160065260 86006006206506210006012100006306128300102000000000000000000000FF935D000000000040 0280220041400020000C00D204200A00400100103002800900400060000000000200880501064282 20000000220000000010300400008400010000000000000000000000FF7FC3000000084000000028 0200010B1001101021104020000030830800044C0000042060240805000043100000064000084A00 40010400050100000030000040000000000000000000000000FFB1F100002000000080488080880A 800908824800820040868800216203201208A0221C215A0525001120425020221820221023020220 121120000023000E2100002000500000000000000000FFAEE70000004004004004004001A4440422 400400000100102103110108801120120002929170D0010211011982010012810000010010010010 090A1081049081001000000000000000000000FF8DBA000000400400C00C40C00800D08C54C20C00 904100B4330234430A24035130420B30C30130030232030024033030932420030330030030130230 4B103103003000000000000000000000FF52B9000040104001801911849831801801901021840040 608630601601604600620440620400428000600E00602600624610622600620602C0800864860160 26004000000000000000000000FF9C1B0000002000240010012C02A4202244401234000080400400 4804000AA00A4004808004884882140800804C80005004C009208008048048020849048000248048); SDR 8000 TDI (0000000000000004FFBC3E0000000018880AA0AB8898A90898AB9130AB00002AE2AE2AE2AA2AE2AE 2AE2062AE0042840000060162AA2AE2AE2AE3242822262AE24E0042AE20E2262062AE00600000000 0000000004FFEE1000000000180D15415591190D131955911155000049644655655653655655654E 55600648000422A15255655055655624454040655410600455652E04654E41600600000000000000 0000FF90EA00000000180500000180580500380184180100000060060060000060060060A60062AC 00800045204200600600600601403000600600600000604600E046006006000000000000000000FF 77500000000000018AB8AB88B8C98818AB8AD8AB80002C62862AE2AE2222AE2AE2222AE55421A002 0064042AE2AE2AE2AE28C23200E2AE0160022AE00608E206006000000000000000000000FF671500 000000010D001801821841845801802801800000601600600600E00600600A00422C0C20042A030C 0060040060060040020C600630C00400642E006086014000000000000000000000FFDE5A00000000 00418018018018038090018018018000056026006006086006006102006104000000016026006006 00600604410A2060060460020060844260562A6000000000000000000004FF292B00000000000500 1801A41801801001843841800000600600600600600600600215400408080428E28E12E004006006 04C00200609604C80404600408640E004000000000000000000004FF73B500000020021080180180 28000018CD801203800000400400600600600600600600608C824100020004006086006006904088 806006102200306006016044006000000000000000000004FFF2260000000AA0A00AB8AB88C8AA0A B80188808980002AC2AC2AE2AE2AE2AE2AE2AE21632420D20400003224622E2AE2AE2062242AE226 20300400E2AE2260842AE2A8000000000000000004FFFDCF00000000004080180190280084180580 0201800001410400600600208600600200600400090001000E046016006006004040006006100800 006046446114000000000000000000000000FFCB70000000354128155955B10954B5582D91415180 00554554556556556556556552546404C8010440E10650644E5565568864345564CE550004126556 456404550550000000000000000000FFDE020000002AA4828AB8ABA010CB0889298AD02980000262 0E32E2AE2AC20E2AE2AA2A62A6AD62003024823063262AE2AEAA840AAAE0A622E0802AE304086226 2AA2A8000000000000000000FFD21300000000040280180182100100090182000380000060060060 0600000600600600603605640012042600E10600600643008200400600620020E0040860CA002000); SDR 8000 TDI (00000000000000FF3435000000001800800001889C01C05C35801401010008421444620000710600 E20E22014002624014001000000635628E0060560442420200102260B60060060040060800080000 00000000FF399D0000000018018200018019018018019011038A2000410400612004E40E08600601 040010609000030048831000600613628620401230410008640612600610404E0000000000000000 00FFC24500000000180182001180684180182180509B8A200160460060B400E00E0C634600620008 608008424C00004820604600A2061040022104822860A601601601400E000000000000000000FF01 AC000000001800804009808881903803083805848008E21632620411624603E01E02602050600200 041000822641E01643049200442A09400200610E026106004026000000000000000000FFF36B0000 00001801800201881021C00809801C01000000415480600A8471050060A64091000424300230A6B0 208612652E88304CCA640602820802620608E00E897006100010000000000000FF53D90000024818 01800001811001840801901801000004C0C4006A522062062064862004A405241085200600244082 608604200420604640000028E406406016006006000000000000000000FF66390000001018016000 41E11081C808018010018001826127006009406107007A4784E20600210040200600422000780632 0011406006006000406006026106006006000000000000000000FFA2CF000004201801C042218030 89A08C2FC0180581E021601700744080608C41612702E80C91249025302300C01E0570168815A001 F08E00600001600F0AE016006006000000000000000000FF43780000004018000004018030080498 51900401020040400490700610F43600600E4070B622400500722B01400120690700F04600635441 6004086296516007007006000000000000000000FF66C00000002018008002018050420038018800 01800000400400600085600600608E0071060A400001620200400600600680408200E00400E00000 621610E406136006000000000000000000FF6400000000001845400001841000241C01C140010000 00400400680650600600640680622F0080042A68230060000060060CF41402700612600400614682 600E006006000000000000000004FF0E3C0000000018C88AA0AB8C90880C98AB8208AB80002AC2AC 2AE2AC0062AE2AE0362AE00624000410258A2AE2AE2AE2AE2040203962AE3060042AE1063061B620 6006000000000000000004FFD22F0000000018A1800001823801005801841001000000608E006006 00600600600600600002400608600600200000600608C0020D600422600600600630E00612600600); SDR 8000 TDI (000000000000FF8BC9000052048908880830800B528D0A249108209000C4200340212304200A10A0 8234A80228200104300A2522A2912A22402D42B0A00201000008202220008202A000000000000000 000000FF31B000000000000000000000000000000800400000008102A80A80084888200000080000 80800008C88AA0000000040000100010800300000000000200000001800000000000000000000000 FFED1D0000000501000001100001000005C02040000020001010100100000210010800000020D484 E0440000011048000000000441041000820000020C08000000000000000000000000000000FF4057 00000020008000000000004220200000440000000000010000A08008000000000009308201010C01 508000210008000200C0000110000200801001000800000000000000000000000000FF6837000000 00000200020004440004000002000000000000000004100000010008000404000080000108001104 00000000090410000000450000000000000000000000000000000000000000FF19148000000AA828 8000AA888C8888CEAA888CAA80002AA2AA2AA0032AA2AB2AA2AA28A00238220020271226208B2AA2 AA2020022AA2220820002AA2AA2AA2AA2ABAAA000000000000000000FFAFC9000000001101400401 001204400201441304000000410500500000505100500400105400010300400C8C00008050040201 10001008010002804004004004110004000000000000000000FF497700000055588120055594D953 D119559359558000556557556156557556557556557D2D44610123502541655655755640E52E5565 56006001557557557556556556000000000000000000FFC7560000000AA8248000AA88ACA88AAB24 91282080002AA2222AA0AA2AA3022AA2AA2CA2822AA0012AA2A220A2AAAAA2AA2022222B24822A20 012AA2AA2AA2AA2222AA000000000000000000FF397C00000000104A000400000000220000200400 00000000008012000008010010000000000082001000009000000010001200000008002A84000000 00000000000000000000000000000000FF4DF30000000AA8930000AA8C92A8CAA890000098800020 02102AA4022AA0022AA2AA28A0022A200022222220208A2AA2AA19A2022220422021002AA2AA2AA2 AA2222AA000000000000000000FF4AE000000000001000000000400180182189040180001000D000 041000044600000004640401400001400C0942460000000000000001000080000000000000000000 00000000000000000000FF3B0000000000002000000002000200021202202400000500000000A000 08900000000061300000801001000400060000002200A81082300A01000000000000000880000000); SDR 8000 TDI (0000000000FF696D000000001801801805800803C05801401C038200907805A30C8EA8F000102002 92820604600003701600000809022E416C0289608625000020680140200600600000000000000000 0000FFE039000000001843805801801901C21A0900181180000860243000260B7500882802800046 00620008F00644800E2400A40C2302086086100081444004500006106020000000000000000000FF 71AD000000409801801841861101C118021C5B81800040E09600624204603EC10A000A690A926080 8277C0806A668C6806A4C12006E20E90041104618190A407006000000000000000000000FF617E00 800000388580180180106180180002180180A0A370470250CB006145100800106092806000806004 00600080680480001B206C3603800001E11C002806006040000000000000000000FF87FC01000000 58C18018018009018018038A1A1181205460042A208A116C0A004004800886006400106500C27448 2460244454064160070A0080407004400006106000000000000000000000FF971100000000980180 3801821801841811801901000000608400040004600000440404002604608004E000016006086086 090126146126000000046004108006006000000000000000000000FF440900000000000000000000 00000000000000000000000000000000000000000000006000000000000000000006000000000000 000000000000000000000000000000000000000000000000FFD0D500000000000000000000100000 00000004010000000000000000000800000001006804000800000004000006000800004800000000 000001000000000000800000000000000000000000FF2F570000000008A2802808800C82A00A2800 28008000802008002802802002C104000020032222A1302002802802822002002002812802400028 002000003002002000000000000000000000FF50FF04000010000000010000201021000101020404 40901500010840820100821840AA80500808080200C82C8020000050000200020001000280800020 004100800000000000000000000000FF79370000000D682281280080080A868B0E8408028220002A 8270A902623092222802003D0201A08009240200240298212A0031C200A00306002806243A002002 002000000000000000000000FF4155000054051911901851801B55951855D15821884024620F48C1 4F0CE414086106156086D0E1528AE09484644E956C465045565070860200020A642E40480600E000 000000000000000000FF1A1302000060000100900100240100110102900000000909440448204048 440142346A82E800580840C6EDEB0300021080005000010C05210280001004004184044000000000); SDR 8000 TDI (00000004FF6C95000000000001800001801800C01801001801800000400600600600600600600080 60068048040068060068068028060068040028020000040060068060060060000000000000000000 04FF0F64000000400001800081A01801801C09A218418000C4489740740680E00604680600640202 020410210A046040206117000005012026000006006006146006144000000000000000000000FF9B AA1000002A0001800005841811821343A01C91080080400601614CB0713700688643710AC9084D02 AC4200640612E84612C024342106040508406316016006006000000000000000000000FF1ED70800 00201805801801801801D81A09905C01000080600606E08620700E01E08702E00020612100620210 720602602640413C00F02600000000680A006906006000000000000000000000FF81A20000000A18 01C018818058058219A38058B9010040649694680F14F0868030023069004560850264E200602098 608E9841048C5006000084006052806006086000000000000000000000FF7ABF0000000018058018 058408118018016A3801F0002230162064460860278240040062918D621490F0170C680641600624 D08442610604040C4045030B6906046000000000000000000004FFF18C000000401801841C019008 018C181110188190009070072060A600F40625124020600800600824688E90613000600E44420408 4106000205044002126086006000000000000000000004FFE171000000001801821A01881001F018 018038058880404024A438220C600208A002406004447C00126202080C2600040D80412400E01602 0104806021086006006000000000000000000004FF3E3600800000986BA01801C21005847A219018 1380000650340020028060020C644601E60409638008E15200020066022454582E04E86E22009C28 680004611E206000000000000000000004FF3909008000409815801801822001A01AA90019010000 104404902106016C02A0000008688C88600C20E80200008E880026000414085106C0040054601480 7007406000000000000000000000FF93870000000018018018418090038018010018010220000004 202A0601601208400440688480600400608200000082000C80001600409604000408E84414388601 6000000000000000000000FF7289000000001001801801849901835881945B058020107636016106 846006066FA630642224E3880564120200D601058440600965600E10041008F02202208600E00000 0000000000000000FF894D000000001001801805801801821881A018010001A06026026857306006 41604683604251641200602604010008002482A30110600720800244410640020600600000000000); SDR 8000 TDI (000000FFD44C0400000000A982008185D82180108188989100000081D40000D40000000060000002 0240600800AA120060060A002602660624C006400010006186084026006000000000000000000000 FFB71C0000000004B1830521A05B23A15241B45B01800112893408AA562428A8446810880422C929 1020240AC16C80810804826806884916140890856906CA502E80E000000000000000000000FFBBAA 0000004100058000058A8009901883811815800000500720490610C40408E48000608E0260201378 460260418A004C48E2B220C244000020A0624F015206346290000000000000000000FF7799000000 000001800001800001801801A0180180008040060060060068040068000060060020000060060060 06000007806000800004000000006006004007806000000000000000000000FFCE0D000000000001 800001801C018A09C1511901800002020490000608090200700680000440600080410C8100060028 1C40410200400291000018600E004006006000000000000000000000FF125F000000000601800001 801801800A010038018000A108852A94240082024062A700190400E2914252040400010030060548 0280400700000100600604400600E000000000000000000000FF706A000000000001800001801C01 800001801A01000000402E0068160060920D601680E24C84202008C02400845004400400000008A0 C2020428006806004026006400000000000000000000FF90AD000000000001800001801C01808303 8018218A2001C8060460862AE62A2062A62AE0BC0A23E946463487069E2050A4040A201121860400 50306006044047007400000000000000000000FFEABA0000004000018000018004008A0A01A03801 800022255448A45690A912556CB0016B4004AA1511002000004004400C0168068040448004048060 0E00400600C000000000000000000000FF647800000000000180000180000983050D20380B04C038 6AE4A6AA6E40280202E80880680080300600000000002680C01600680480000406000600601E8068 06804800000000000000000000FF48D2000000000001800001800011840800911C05880040610451 241504A546456006026020002510020CC00200000069040004060041051100054070060060060060 00000000000000000004FF673B000000000001800001800001800850803931810000E20400208608 20160062B65160902A20440000000105562160442041440000040000041060060060060060000000 00000000000004FF3280000000000001800001801800801801801801800000400600600600600600 60000060060040000060060060000020060060040020020000040060060060060040000000000000); SDR 8000 TDI (0000FFFEB70008004080000004000204004000080000300000100088000001001020091080000010 800003000800108020080250088200101001000003208008041000000000000000000000000000FF 81370000000AA0AA0AA0AA0284AA0AA0A00AA0AA00000292A83212802A82080880282A82402A8008 2A83003204A82282A82803282A82A80002002A80282A02A92A9000000000000000000000FFF54000 00001423541541543141541543423543040000C49440B48B48550308C40450D30D405508405504D0 C40D10C40900C408A8A30550000900100CC0A00550D50800000000000000000000FF0E5800080000 04004006004040004004044004000001100001800049001080420501001090801001801021011001 001001041001000001001001001001001000000000000000000000000000FFED2A0008000800AA0A A0AA0800AA0AA0800AA00000002202800080002A80202002002882A02A84002A8A202200A8230000 2202200202A80000000402001102A82A8000000000000000000000FFE040000000204400800000A3 0A00A00A00C00B008000902802442912802D0A802852842812002A0000200280A802882842802812 C02802800800933102C12802802800000000000000000000FF77ED00000025040140040120220020 0232201232000080C84C084C400048008D490480080400084000410C900C00810C88110900895000 000900C048548C4004000000000000000000000000FFDE3404000000800180000180184180390184 1801800000604600400600400E01648C006004046440B04024426006096006906206046126000100 506006426C26B06080000000000000000000FFC33A000000020500900500CAAC00CA0C0C884C4C80 0133210BC030328AB323482003312343C8310001280B08340B0230234130334034025010080224AB 01108300A010000000000000000000FF97460000002183002002003A044004023000420000008010 00800A00880150209608810840080821001000E28800800800100800800E88120800900A08C40A08 B00008000000000000000000FF2D7100000000000080000080080A802804840804800040500808A0 0300220210308018208220A08023280204208214200228A0CA400002000000402002004002402000 000000000000000000FF2EA000000000000210002200180148010142004A000000000000002C3710 890101000061208444405800600000360040014000000800200001A0240420028000018390000000 000000000000FFD27100000004000000810000208010C00250200000001F0020E00000808420CA00 10407C081201018000081006060180480100300001400800090290502105400A0000000000000000); SDR 8000 TDI (00FF79BA00000000180180000180200182D90C001883800010608E0A60B411610E00400002600211 600001001610A00612A50A1340C00000400060000060064060004A0004000000000000000000FFE7 CC00000000180182000180400384380008108980000064060040040162040040C049600201604000 C40600220008200A20408242A04405600004608600E00C20C006000020000000000000FF80160008 000018018180018038038018130410CD84400061D010A00400615240408004060668658004008A14 6000246304104456202004006202006406404004004006000000000000000000FFDA9B0000000018 0180400580180180180300100190805260000102141060000844080000960860000800B200612640 642600C006086106087490116026004106004086000000000000000000FFACDA0008000000000200 0000000004201012004409404A00080004101001503000003161000080000202000202C60A00C049 00C0110020148108040400208108000100000000000000000000FFC38A0000000200000000000018 20040110082005020002C42812001020000010840002E02C4504002140A813000640004028004020 0100000000000100008080080004000000000000000000FF6E6B0000000010008240048228088008 2080000084800024401020220324820024782422920824481B224210200A00209A00249A0C230000 6000312162082000410002000040000000000000FF1CC74008004004004404000444004424025204 09002118149164928108162920109008104110108110140020028000000100020100100106000100 1001001029001000000000000000000000FF105D400000400C00C00400800C00C02D10C40C108121 01310300B1435430CB50308251330320B2814530A222231240201340243340300300280100312308 3003103002000000000000000000FF25750000000218018000018018498018238058050200046024 08420E00600400E22402600E02601000401409600600612610610610648600600040600600E0AE00 6006000000000000000000FFDEBF0000002014014004012502014012320012010000AC8804144928 004154880834840808804800004C84910800810801150801000004804800804C34C2900400400000 0000000000000000FF1C55000000000800800000884800800800800800800000200200A002002802 4122020020A200221000200A00244208200240215200200200240000200210200280200200000000 0000000000FF72D70000004AA0AA0AA0AA1000AA0AA0902AA0AA00004002A8A10200AA8241021080 2882012A8400AA80302200883202A80102002A82A80000002A85800102A82A880000000000000000); SDR 8000 TDI (FFDE3680000000100180180180180180181280180080000040160460060060560060560460400020 00412046006446086048006014006040006000006006004106006006000000000000000000FF94C2 0000000898AB8000AB8818AB8AB8A985192180002AE20604623C2AE00622C28628E2A02AE1002222 2220408E0042AE3260040041422AE0802AE2AE002002212184000000000000000000FF0C44000000 001801800001831801801803801005800000602E00610400614E00400E00600000608401208200C0 0000C00608E42400C02200600400600640A022102054000000000000000000FF2358000000045801 80000180580180180195309100000060864AE00400640608402004601000644008600E1462265460 060041143442880060040060060C2308052204000000000000000004FF0826000000201801800001 80382182182D801001800002E0060260040CE0360040A00260100960100A604610600008E0060140 04124040006804006006002000002004000000000000000004FFA57D000000001001800001830095 801A00801801800000600208A00600610200601600602444600000A10800C02602400630612440C5 00806404006006806000000004000000000000000004FF08C90000000010AB8000AB88000188B884 8AB0AB8000B862AA2022AE2062022AE20628E3840178002123002322882022AA42624E0060480070 062AE2AE2AE2A82A8004000000000000000004FF4896000800401001800001800001903922801031 800101604205201614E00200600000600C0970401021080060260060861140141141340068020060 07006004104006000000000000000000FF552800000040115580015591400B953900955555800024 655248255643654255643051643404600452242844611050655611440E2264060064045565575565 56555006000000000000000000FFA3210000000010AB8000AB88B8AB809C098AA88400002A620608 60A62062AE2AE20E2AE22222600222A22432228E2A204A2260802242028060022AE2AE2C22AA2420 04000000000000000000FF62846000000010018000018218A1801C49800000000001600602E00608 600E00608604600250601000600410622002E00602610009408E0060000060060000060060060000 00000000000000FF7DB30000000000AB8000AB8C18AB841A018AAA0000002263124084060262202A E3662883A622600022622423608821640420644220E20A0060002AE2AE8362AA0180040000000000 00000000FFFB7F000000200001800001831801901821800828000000E04220020640600000611600 000E0068401061040064260060440062121461060068000060061140060048060000000000000000); SDR 8000 TDI (05510000000008019018018000018039610018418A2008610430608E02401603012400E10E280200 66661442400000641604620200600000400010401E002106446006000000000000000000FFDA4F00 0000000801801801800001801941041821808020600E02E2364060064002440164060200880CE516 01E05E6460860A610000E000034000484046202026236006000000000000000000FFF27400000000 1A01881C21801801821D05095804800004E2C008000009028E10A08E5000820100000040AC304307 04024C00610602649020A090002406006086116046500000000000000000FFF2CB80000000180180 18018038018318054019448AA01265100CB34201024680220E3000D22263400040064A6000000204 246006006000006000806A0600290E006006000000000000000000FF02A3800000001801805801E0 5E01849801C0180A850008640612448408E0060A600E28E0278060800440040A4011000006006404 006000002000403006006096006006000000000000000000FFEA2E800000001C81C03A01A01C01C0 1841D83D08804024E1362060570860060AE406067117046441004C0400400604846F40620C01F000 00600000E006083006816006000000000000000000FF9966000000001481A01C01800201A01D0504 3821080020E042413002202227414024006A0420200480008C40C02021001402608E00680000E005 016224105806006006000000000000000000FF2DAE000800041001801A01A04001801829025C0000 000060C208200200210E0000C40061040024100000462360064C00AD006144006408006200006004 10C4AE8AE006000000000000000000FFD98D00000001540180180183000180180320180500000060 1201200300200600600E00601080210024890C1044000104060060163260A0006004006006046006 406006000000000000000004FF955B0000000910AB8018ABAC00AB8AB8810898E900002AE2023222 AA2AA2262AA2062AE2202AA1000802040040AE4000002AE20450E1002AE0062AE2AE2040464462AE 000000000000000004FFFE2700000002100180180182180180184380182D800000400E1061060062 860880840060000020000860062064000862CC00E02400601000208400200422400E006046000000 000000000004FF4DB60000000A30AB8018AB88B8AB8AB8C18AB88C80002AE2A62162AE2AE3062AC3 0428E2882AA4081263162CE08E0565042AE2C40562082AA2042AA2AE32C20E08E2AE000000000000 000004FF6039001000115155801955D1595595591088580180005564A620E44655604E44244E5565 485524444524D615613043600042649452E4005560045565541144A6546416000000000000000000); SDR 8000 TDI (BA000000000000000000000000084200000114000060000030084000004040048980001056128850 14000402000006A0001860080000000000080010000401008040000000000000000000FF78C60000 0004000020020000420040001000002A0001000120020128128000108000000008C005100B000000 02000000400000000000000002001000D04C0800801000000000000000000000FFB5C31000000142 00000000030000000020000100000000001011000000000042000004004004000000000000004009 09100000810000002C0000430000010000000000000000000000000000FF73B38000000808AA8AA8 AAE808AACAA882EAA80080012AA202202202213AAA0022AA28BB8348A0002022AA2AA08A222213AA A23A2AA00000A0000022020132AA2AA2AA000000000000000000FFD24D0008000012010012012004 01401001001440000085012403404514C0040041340410112144C101400000042000844800414000 4001008080801000404004005004000000000000000000FF25FC100000145D55D55D55915D559559 11955B45800055654C50452CC44556016556556C5684C08850455655655645722655644755600004 640012E556546557557556000000000000000000FF4EAB0000000AAAAA8AAAAAA8A8AA8AA8AC8AA8 8A800008200A1020020022AA29220228A2A202200022212210A08A2220022AA20A2AA000322000AB 208A00A2AA2AA2AA000000000000000000FF959C0000000090000000000204004000240000080001 0000000300000800002A0000000000080201030000000000080080000080000000C8800020100000 4000000804000000000000000000FFFB110000000A80AA8AA8AA8C08AA8AA8810AA8888000C0A402 4225124022AA24020028A2A218A2A032A4924E208A32A3022AA0022AA0002220002224421402AA2A A2AA000000000000000000FF9C870000000000000000002318000000100000000000006420400428 40000000008800600404400010020020000608011400000000000000008210000800800000000000 0000000000000000FFC0728000000040000000000040000000440000220000520110088080130000 0D004004601040000000003000824600004000035000000010800001054032000000000000000000 0000000000FF0916000000001801801801A0180182180100180080014464280500401101060A4254 50800600000000200613620640604400608203600800C00800420200600601604628000000000000 0000FF94CA000000001801801821E0180180380310B8048D20096002400510042206004004000016 2AE308112144004090046104086402006280424100004002206046106006000000000000000000FF); SDR 8000 TDI (000000028100302205801805811C298CA80D0443246086000443080EF8E187965060660C60000080 1061600688481600680008605E006000A06282006002006046000000000000000000FF1F58000000 050000200201801801809851801A0320000069000061860294010C000EA060068060208040044060 A080520600E003006906006000D8642A206006026006000000000000000000FFFBFF000000000040 000001901801809801801815000000601400400002600C0849164010C62234300500010168C01445 0611700610E006026000006932D06026906006000000000000000000FF9717000000000000002001 80184180188188A001010840600400020411614441420604020609210008008800600E40C0360464 26006016006002006002046006026006000000000000000000FFEAFE000000000000000000000000 00000000000000000000000000000000000000000060000000000000000000060000000060000000 00000000000000000000000000000000000000000000FFDDE5000000000000400001000000001400 00000040008000040000000000000000008060040000008048040000060000000060000000000000 00800000000004000000000000000000000000FFC7F500008000000000000084080080080080080C 80002024020800048820000010820028020028402022020028020030228028020020028020000020 02002002802026000000000000000000FF4FAB008000000000000000000000000000000000100085 00C00001004000B02408300308102A41008900204008005408082082100050108004A00000000000 00000000000000000000000000FF4E8E000000000000118000800818904806800900880002202200 28DA29208200248A00200200203000201205A00201ADA220A3C201A4620022010121120024020020 02000000000000000000FF28F3000014000114310041901801955F55805945E200456044556347CC 62D65175460064C704549010C2040CE2060560D6D0602614E8163060000971040960065070060000 00000000000000FFA0AD008080000000080000021001080001000600200000C28500400401800D82 4830029000D0488844C06DA010007A040800140800420C0400A080C0840000008140440000000000 00000000FFF67B00000A00011209002090080082C90CA00884840102A0228AA50324B44A00A24200 280200200008200200280201280250220204200A4820000128820120024830020000000000000000 00FF188C00000000000000000000000000002020202000008000000000400808804800008004A030 0001A30420130000540008000000008000020000800000080000800020000000000000000000FF56); SDR 8000 TDI (00000001000A00118018038419019059418000336907416010D441022160042C680E884A28C08044 04E026A262860868060AE81621600000741601600600A044000000000000000000FF1DA800000000 0000000045805841821801843001800120E000802006006856806C1408604000200004312202E006 A3E22604608500600616600078620E04E002806026000000000000000000FF710C0000000000002A 0001C01C07803A05821801904209600682601E0A240A88A8AC02604146A00C322502016008047C16 364044006086046004806C14066002007006000000000000000000FF4EAD00000000410000003380 3841801901901941E003826504214442206144444A0620654C08042008E087107146906107107054 94E02E294021846146005802816006000000000000000000FF8C7D0000000000000000058C188182 18D188984180020060148080430360208100062461040082A000600E806930516840814404206307 004004006004004202206006000000000000000000FF3CC900000000000000800180180180182580 1E4188220060080040268022020CA0820264102240000220420140860A042E006114806006806000 006203806002006006000000000000000000FF05E5000000000002008405B41B01841801801C1980 8200608021561221180E0A608B006308894040022432665040010006156C8E46E5060C6004006012 046487406806000000000000000000FF7F69000000000002000001801803801909911001C1020170 84C0400442684800100A406045100480082082004016200006006024817006106000006800006102 006006000000000000000000FF0708000000000000000001801811801841801A2180000868040040 004068045040AA24E01400000400230280400040310E406006006026106084016008007807026006 000000000000000000FF2B56000000000162022005D018058519A1841A0484C168F64E04E4408001 8700602600684290600889220219491604200025625871601708E09160E60F006002016046000000 000000000000FF6F9A000000000002122001825801801801901008808204E08E08E00004245700FA 06106082226231326836C4502008320200648000600602C000006086244103006006000000000000 000000FFC3C2000000000000000001CC5811841A018818508003006124124004A260020820068509 0A284A20C360A68248A82C25040360A3896007026009007883C26106056006000000000000000000 FF1E22000000000040000001881841801881801C00808300600C804204806002022006020C82A545 100C689601400E2501480C644200E106024000006002144047086006000000000000000000FF8E98); SDR 8000 TDI (00000000000001821801401841C0588D8000026107816A0208008E90130000600E20808810648400 620022752A02600A40A0AE00600040210200E027A86316000000000000000000FFA6F90000000000 00000001801801001801801801800000600600600200700600000000600680000000200480600600 6002000000002006806000002002006006002004000000000000000000FFB61C0000000000000001 01901801811813901901800200640612E0069100044028808080020C0221017006808006A00D0400 010200000E80600044600200600620E206000000000000000000FF003C0000000000000000018018 01E01E0180180180038460464061070014440030040000C680000030E24E00084011142400600080 2006006000004222006046002006000000000000000000FF6E5A000000000000000001A01801801A 01945A419400106C0600620290608452E2570A620622009100308444089180008602884202424604 6080006106106007026044000000000000000000FF0B98000000000000000001801C018018018078 03822000E0EEA0EBAA0062E48F638C2AE2AE2883205024E42A8AAE7A800805602084644600600000 6526106006052044000000000000000000FF4281000000000000000001C01801801803941841AC00 92640642E204104500D04456956D46B46A3400A90E2501300104A600004600600E04610400604000 6826206206000000000000000000FFDD0E0000000000000A0001821803AA3881821D018480AA6016 03600422400800883681680600680000220E40080600010600600600608600600000600000600680 6004000000000000000000FF65B1000000000000100101921A01905D11A45805C040547127406034 D54128C960C6446156A9000000A9460B0129130A120010C600600600600444604200680600200600 0000000000000000FF944D0000000000000400018018058518019018018100016206146504004200 04240610620602444000240E00040640000600600600608600600000600200600600200400000000 0000000000FF0EAC0000000000000000018018018018018018018000006006006000004006000000 00600600600000400600600000600400000600600600600400600400600600200400000000000000 0000FF920E000000000000400001801801801C018018018003006806006800004806004804006807 006000805006006806806006007006806006006000006006006006002004000000000000000000FF DA58000000004000000201801801803801801A0180020064060464408040031220A6806486036804 1000040861100868464000D6006946006045046144006006802004000000000000000000FF6D5C00); SDR 8000 TDI (0000000003543543543543543323300000550C08110C40C00400D20C40D10540411020450550C409 50D10A50D50828D50D51510B00550B08D30550D50550000000000000000000FF06F1000800000000 40040000040040040044204400030010114914810000010100110011018218002002010010211111 11001100001001001400000120001001000800000000000000000000FF45200008000000000000AA 0AA0AA0AA0AA00008800022A80080002900802482003802A82A0200420A20A202200880200002A83 202A82A80200022A80280002A82A82A8000000000000000000FFD6C7000000000000000200C00A00 A00A00D00C00800080288200284B02282290281280280202228000201280AC02C02C028028028028 02C02900802C03022802802002000000000000000000FF20AE000000000000000200001400200001 24D2230000004A25354000A0C08483484480081409080010890090084091094880091000000490CA 00800904A94804801000000000000000000000FFF775000000000000000011801831911801923901 800050600640609600C00441610C01600480E00021600E04601610601600630E4160260060000864 0C006486006106000000000000000000FF3BA3040000000000040400F02C80C00E00C00828800084 329208B842402D0A0822430822C324352994330341310341352302B0038C29121230092031024920 03543252000000000000000000FF3F090000000000000002004002902002002442500000140480C0 0000820290300A00A808014808080404A0C00980910808808901110010800800400A80C008200008 28000000000000000000FFACE3000000000000000000880800808800900808800200A11210A21200 302A0B142A002C0206200000A2020020120020020220B20231C2902200122502002C020020020000 00000000000000FFACB9000000000000000091820040101820020000000280100800090C41500100 011400E0040040414050000100064006700060042C10000000012000200103010E02D00000000000 00000000FF11080000000000000000000000000302820826020001420001200001A8880140800001 6BA00106003301100000060A0100056000408820060010000001A880085000000000000000000000 00FF83AA04000000000004000190590300180980998180002062060B60660005020040C010004E20 81900860040C620E20608600660E00020E08600000201A106006204506000000000000000000FF95 8D000000000000000281C81A83251913CD18018002A0F216CA6856256422C4C848D104A68A0C00A3 2824906908906806810D269404068C6C00842A2A286A0E826826000000000000000000FF89210000); SDR 8000 TDI (000000012580188380180380992009C00862C60200343C610C18E2840187040A22200540020004B8 0060140042160460A412641000E004026006024006000000000000000000FFCA3F00002000000800 0048801909825801811800140000650420050401601405608420004400204A40408220810642E102 082006006104046002026406506106044006000000000000000000FF073C00084000000800009200 0010042000022080024040004040028804052040603040608040001021048001040614003020E010 0C0000100410540280308080000288000000000000000000FFE21B00000000000000000181004100 180002200010002000C00800040C002804E04810E208440008444328404006008104106200008008 000040000000280200000000000000000000000000FFBD970000000000000020808A080080280090 880080000A200A02820A2120802C20021420C000602014A0124220024921021020AA212412012000 08A00200A432002002000000000000000000FF497440080000000000000040040000040040040000 01009211201081109611001280221021001291001000048268231018200011011001001001001001 101041009004000000000000000000FF6402400000000000002000C00C00800C00C54C0080011031 2321148345314348300214304340314100300A00240212300250200300300300304100B00300B003 013002000000000000000000FFFC390000000000000000818D184180380180180108004362060C00 0E00600603632E20E50E02420024C4A420E00E206086006546206016006000106006206206006006 000000000000000000FF9EB30000000000002002000012002002004890010001004A208008893448 D51208088008D488480812C024800A209114A8800840800800804A00804140805025000004000000 000000000000FFB3FD000000000000000000800800800800842A0080000020824482020122020021 02042002012100A02A0200200200200200211200200200210000281200250A002002000000000000 000000FFA1F80000000000000000AA2AA0AA0AA0AA0100AA00002A81080800304114406092202882 002206011010C82A80882204002A82002A82A82A80012A92012A80102A8AA8000000000000000000 FFD70000080000000000000000000000000000000200030000C02400801291100080080210091401 03101000088400040080000400000000040003000040000800000800000000000000000000FF7E6B 0000000000000000AA4AA0AA0AA0AA08028800002A82400400400A00880A02A02A82502880880501 102A82882200202A82292A82A82A80802A82082A82A02A92A8000000000000000000FF46C4000000); SDR 8000 TDI (0000000080180000004180180180000065040000020060A600400C00610600204408000200600000 C416000004004106006004006022006006006006000000000000000000FFA6D70000000000000000 018018200200038018C5800000603400020800601400600002603413000005609610A2460C614620 63542CC00E00600000628200600610E006000000000000000000FF9A8B0000000000000000008018 00000001801801800000600400000212601412421000600D2002004A000610222008610E40000408 4006006804086002006006016006000000000000000000FF1FB10000000000000000018018000000 01001801800000600600002420E00640604400612602409000400001600600E22400615404400600 6280016152006006486006000000000000000000FFDE280000000000000000AA8AB8AA0AA0AB0AB8 AB80002AE2AC2A8A9E0062B600E4942AE21709D00000C2A82360882220040A820620E2AE2AF00422 62062AE2AE027AAE000000000000000000FF5F9E0008000000000000018018050010010018018000 00600600101450611404640800600480810000400000400610E41600611404400600690031609200 6006046806000000000000000000FF5FA60000000000000001559559551551551559550000556554 5504842864A434E00051628400041404C5504445104C60A45504CE4065565560844D64D655655629 6556000000000000000000FF5A4F0000000000000000AB8AB8A80AA0AB8AB8AB80002AE2AE2A82A4 04E2263060062CE2AE1062003262142244AE2220464AE0205102AE2AE4000062222AE2AE00622E00 0000000000000000FF5974400000000000000000801801001001801801800000600600002604E006 0060A604604632608028600408402001620E0000010C800600640000600200600602680600000000 0000000000FFC7DD2000000000000000AB8AB88A0AA0AB8AB8AB00002AE2AC2A82A40062262161C2 2882AE4CE0402B63443322882261060AA4020022AE2AE0000460062AE2AE51610600000000000000 0000FFEFC4000000000000000000801801001001801801000000600400000620610E006042000007 026C8000002C00204600E44E404152882006006A8020640E00600642E006000000000000000000FF A18700000000000000000180182080080180180080000060060000141360040D6214026004206040 00C086110006082102000400228004006000156140006006084356000000000000000000FFB33100 00000000000000008018058018038C584080002860060400444062242064540A60042C640008420E 00004010204021620210A24C00E00031610404E216004516000000000000000000FF431100080000); SDR 8000 TDI (041C00001800020201A09C81844000744F22601702602224000A04090200600025008803250608A0 0400C0061020834043081060072AE506006006400040000000000000FF9084800000000000011801 C018002000C1805905800000601401703424621200805244804AC8620000000C42A1000B208404C8 46002002226008026016526AA6046006000000000000000000FF2A29800000000040000880441800 0000418018018001A2E00600708602644E007A4E2264A200440180602608C08002C00601411600F8 03004010506016206006006006000000000000000000FF4CE4800000000020000C81C01C20508401 8059059800A2E9540B649459E026216206106A8206408100120400401E70400204428E8070024060 0128E006106C0701F006000000000000000000FF73C1000000000000011C01801820608481C01C01 80000072070A40450060044A608400F00D30608400440E42420000432600524600080602E0048361 070278A6824006000000000000000000FF96F00008000000000018318018A0004001801841800100 68060060040060000061100468041260060540560CC0260C414640414F1040060060020060060060 06004006000000000000000000FFFEA8000000000000001D02201C04100401801805800200600400 601600600600600600600000E01108490600600040241200400603000200600400648E0060060050 06000000000000000000FF1D960000000000000018458AB8480280AB8AB88980022AE2AC0063A42A E2AA2AE23228E2A831600420421621628E04A0060AC2062042AE2AE0002AE0762AE2AE2AC2AE0000 00000000000000FF66CA000000000000001800001802004043801801800200602600621200614000 608800600400600200000000A0000065060000060000820040060060460060060040060000000000 00000000FF6582000000000000001A018AB8822C00AB8AB8CB80002AE2AE0062282AE2AC2AE2842A E2AC20600C02E20428208E00650E2AC2462802AA2AC0002AE1062AE2AE2AC2AE0000000000000000 00FF9E4C001000000000001D5415593051011195594D80005564860060A255641255644255649054 C02425654E52635051603655044E4D045255600455650E556556554556000000000000000000FF76 4480000000000000190980181000C001801801800200600400600000600600602600600002400448 60C4046226516046004116050006006000006406006006004006000000000000000000FF281D0000 000000000000AB8AB88A0CA0898AB80980002AE0140000A02AE2062AE2A428E24620200230022222 608E2440060AE1040042262AE0022AE00A2AE2AE2262AE000000000000000000FF11B60000000000); SDR 8000 TDI (410200000420020020040000008010000008100004200000000001480000080C0220000000100480 000001050210000000000000000800000800000000000000000000FF5DDE8000000000000888108A ACA88888AA8AACAA80002AA2AA212223AAA00228A00228A2022AA00000A0122622AA24A00A0AA2AB 0120022AA0032AB2AB2AB2AA2AA2AA000000000000000000FFF4AF00080000000000050840120040 0000401001000100450840094080400400410C00000008004101440D040040021004000000004310 80000100400500480400D004000000000000000000FFC4C6100000000000125C81D55915F33D55D5 5955800155755650755655601655441655744E55600924D20550611750608E5564C6204116556300 556556556D56557556000000000000000000FFE1A50000000000000888008AA8AA8AA84C8AA8AA80 002AA0020322122AA28A28A2222AA2A220200002204228208A3022CA2AA2A22AA0221320802AA2AA 2AA2AA2A22AA000000000000000000FF3EF500000000000000842220022000000040000000010000 000410010003200000A00001000000008800C08082200092200000100A4240800001000001000000 001004000000000000000000FF18E90000000000000CEA448AA8AACAA9208AA8AA80002AA2421020 A22AA2402C820028A2B227200050A30223248A29A2002AA23A2220026024002AA2AA2AA2AA2A02AA 000000000000000000FF28CB00000000000004010380000180190100000000000001042080040001 400460480060040000202C4024104206004000004000104280100000000000000000000000000000 000000000000FF749580000000000000003000020040000A00000000000000300A02080000100061 000260100880000001100080460200D0006080010048048480000000000000010000000000000000 000000FF1702000000000000040200041C01441003009801854000E08C10210C0060244000140501 264042A02344000000A64B000E00C0800804862160C00060060A6086106006200020000000000000 FF33FE00000000000000042180180B01100188390588000064442424444C62940C03440004060040 080040404B0210000406124000014014046010026206406406006006000000000000000000FF29F0 00000000000000112000180300900188380380004060040060240862800860201062060442800041 3008000800030A084000008008126400136006016006006016000000000000000000FF80FB000000 000000001281861809501003001801888020E5C408668420600814638018E0262240280042403004 262204C202408001420009E02000E30600600608600E000000000000000000FFBFAD000000000000); SDR 8000 TDI (01801209001801021811100008680648202000015441014748080492F430D528CEA1081010650400 880E09600100240004694700600708E080000000000000000000FF0D100800000818018018018010 0100180300B80400A022401600A40C2280040000060000542061000062061021062260020804A620 600010200020E006120006004000000000000000000000FF72090000000000000000000000000000 00000000000000000000000000000000600000600000000000000000000600000000000000000000 0000000000000000000000000000000000000000FFF5D30000000010000000010000000004000004 00000000000000000000080000600080600400480000480080080600000480400000100100000000 0000004000000000000000000000000000FF5241000000000800800800800808800829000900A000 00280200B01001408000080204200200200082201200600280200A082083222000002AA800200228 6202000000000000000000000000FFB1501000000000400000000004000000040102002420400001 220884200C30000810500111040548010AA011082008054080040800031080080000000000000000 0000000000000000000000FF173C000000000800818804858C40800A02804800800090300200A80A 04280A10244A00200211B821182002642992812AA204208A0020000022A000247A0C280200200000 0000000000000000FF757D1100540059419019519159518C1B0984D95192C01171071041075040C6 04454E006507C8E22A40E4C6204406C260060D430EA9681043400014702F44400600600000000000 0000000000FFB61C08000000002100100020000020522510B0004220A800046340D4A04605D94A00 2E00C0880B881202010EC020090011CA5A0002408800400180440000480404400000000000000000 0000FF825B1080320048C0C8095090C9108408808308D0952010A08220208A08352200A302822422 402000493002002802A2300202A48240A008A02000123002020002002000000000000000000000FF 255700000000000020000020004020400010220000000000000080400000004C084880080001052B 800840420200000008280008100000850002000000400000020000000000000000000000FFEC5200 000000000000000404005008001A00030020000008018808002501400000410008900C00000103D1 800010018010000000400400000012000628C40400000000000000000000000000FF6F7200000000 000002043040020004400000000000000000000B0080000088040350041000000000A01110888001 020040200000500120000280801000800000000000000000000000000000FFFB5510000000000000); SDR 8000 TDI (28980B883921201A01A6004AE08610248720600640E9050164A043000560104E030088DC680611CC 1410E82010400D00601702400700E020000000000000000000FFA822000000081801841822201881 85181174180180002078560164420274342262B6C47A06A00000886B2531122740652FC240942A74 0041640410602E004006342100000000000000000000FF3F61000000001801C01802001A11801815 011A41800410630701704220F0C40562160461460200300AE094800A08807416044104036A000040 0410680602400F012000000000000000000000FF3134000000001801A01800221A09801800089821 A20020202600C02622E0264568840060068404064400260C4416440006025B040060019020020860 16004006000000000000000000000000FF91A8000000001801809804021861821A10081809A08010 25260040028A630F0868350160400002911102070A4000000416710026116000202004A070869840 37000000000000000000000000FF1722000000401801809800001801821D04201809810000200608 540408040C086426047B0720C14400029400A006081006005054846200C000044060868440470120 00000000000000000000FF45EA000000003E01841800205AC1805800001801828000288602400800 904C8868C601680880400400E426002000A200060002A60060000000048060060140868420000000 00000000000000FFAF87000000001801809800023A21851A251458750000042446401600A406070A 7484A0E144106868142006004146A18CCC2560B81467001460015060040060871260000000000000 00000000FF340B0000000018018098C8221809901821801E01200180280E90900140108602600424 6204C4F29000188600E2080001145060002060002060480063042860560040002000000000000000 00FFBEF3000000003801801910201B11803801425801848000243730800C0108A600042582034428 2A80042C4600CAB004044602A0032C610100202840690548E026006000200000000000000000FF37 87090000001801801802001811805A0104180BA80048300E0002051002264010A408004C41232008 650651600E0008A400234200E00108A2000060A5100006114100000000000000000000FF97540000 00081821A41841801001B5180510B815A0800641060CF00A26E09400600E206014076008B3A10680 4086287202184408A0600054200232E404020016104000000000000000000000FFCA4D0000002018 01801805A01001A05A63001801A02000600620602690740C00E81600600408600200002E00600002 604000C002886000012002006000000006004000000000000000000000FFF0F7010000001841C018); SDR 8000 TDI (0C71901805101901040069E8021060048060028080068000060802A282605770422E29A204806006 00700680400040660E006006006000000000000000000000FF47D600000000180000180000080180 1801001E01930000701000E8054068430C085700008200600100A84600400084200500FC06406007 006028807106206006086008000000000000000000FFC0AC000000001900001800000A0180D80000 982000000462420A614812789600640632E200A0E00800640F0AE000006024806106836006004280 826806086006006000000000000000000000FF930F000000001C0000180400084180188800982280 005A60B801E2986AE0AE0AF2CE66F2A22A66B906A29601626685628C0873AE0C6006206540806486 786006006000000000000000000000FF17F100000000188020180020100181420181184115008564 461469201261541564109165063148A500AC20B46A0828224601140741600600600C02610E806006 086008000000000000000000FFA60B000000001828019A224014418202118038091CA0116202B270 24106B0020686000684880C804202000926006A020061000060062060060050A601E906006006000 000000000000000000FFF959000000001C4A40184408181184000390594380010465044464434264 0608E09480E0100A400822AC1422504040A41700032E086006406000447486006006006000000000 000000000000FF67C5000000001800001800001801880101809811815040603400E08E01604A2264 042263004144C00020A4004406000086000006006406006004106006206006006000000000000000 000000FF80E500000000180000180000180180180180180100000060060060020040000060000060 06004000004000004000006004000006006006004000006006006006006000000000000000000000 FF703400000000180040180000180180180180180100100060020068028060040060000068068040 00800000004006007004000006006006804004006806006007006000000000000000000000FF9D3C 000000301800001800201A01841801041A0120001060068064060450020060828464400240044840 12A0C101504214410006316206006014006006006106006040000000000000000000FF1039000000 205804241880081B0591585050580504402060A8896906C0681720F032406916C8C2140085220044 3600408602108604704648E40409612E2060060A6080000000000000000000FFB17A000000003801 819844011811801A01803A03802005600688284600644604640400600808820C00E0061400060068 4600401400600108600000E886244086416000000000000000000000FFF12C000000001803801880); SDR 8000 TDI (A00AA0042AA0A000000002A82302402202002E83802C82402A0000208D288A80883200402200102A 80001100002A82204102A8810000000000000000000000FF9895000000200800200A40A00C10C008 84800A10800091280310200290B04300282282288280282108208240280280B002912802002002C0 280080288280A8022A2000000000000000000000FF71B00000002004004012022242034004504012 020000A450008140CD00109500480C800830814800840C04000C40880D48004CD5004004950C0000 4814CA5004814000000000000000000000FF38820000000418001018219058918819099018898000 08629600600652604600405400604600440040E48C896006006116D342060160061161108060A610 6486006000000000000000000000FFE7EE000000482880414C14C10C00C00C40C00C248000023002 542D5300348B29250320340B4B31290C202344342B2CB44200212220200324340100320B00200220 2000000000000000000000FF65040200002042A02A022021020A2082083002C000009008381414A0 900C1880081C800C00880C50D08900000808800910400840C00200800900A00C38800E88C0000000 0000000000000000FF5B210000000808000088008008008008428009008000802083003004042000 00130200A0524021000836060024620020A204290308300255A01008204200700308208000000000 0000000000FFD6A80000000419001020559800101821110200240000080401408108406060016040 4060A404C08821404104000601040110C0A000000828002000818002810000000000000000000000 0000FF20790000000000000000000260000000000800000000840100200A00286180506400006008 000200060010330096400241000800800000000402000000080000200000000000000000000000FF 894B000000121800015800001981801821801818000020600080605400E004088822200206330000 00680240600616A006A3260E016086026000806A06B06006806000000000000000000000FF907302 00002A192052BA40245D15A09A0BC01AA080001068A000632080F025100242810C0350EC008D6402 C268C8822806432286006A86C568004060564A680E206100000000000000000000FFE86800000000 1800001C001018019038418C1809800020601521601748609000E016206128820110202006006001 00E2A600402E08600E08604008EB06016286086000000000000000000000FFE6B200000000180000 1800001A01E01801E018018000006005806802006000006806007802800000002806006006006006 004006006806006000006007807806006000000000000000000000FF9BE100000000180400180210); SDR 8000 TDI (0480000001100CC00504A00A00001562001061203060C00204480102000080A61000300001200200 000900A0450020108200000000000000000000000000FF5553000000001800021021845002092090 00400804004404101080403061083160242CE10C00C0804945005080061104000000A00900100040 0010008010C040008000000000000000000000FF19C400008000880000680080080C800906800800 802000203201040440A1400204120026021B200002200202240A05210001A0020001002C20000024 02002002002000010000000000000000FF35D240080000040040804858048040040140403000C108 10810012894212211116800010012413290010050442110010010010010010010090010090190010 01001000000000000000000000FFFA76400000000C00450800C42C84C14C00C0082080810C353300 300302343302314214B31310343300320300240300320300302301100150300308B0031030230130 00000000000000000000FF6F2D00008000980000380980181190190D001801820020600610E4AE09 608620400620600620E00034C08451400608E00600E10608000800E00000608600E0060060000000 00000000000000FF90D7000000200400200202000401401243001200000080100000410C80900500 40008010308A091004480492C800880D4CB20104000800800C00000C44CA080080C8000000000000 00000000FF694C000000000800000840A00800800800A008D0800010200281222214200200280204 208200200088200200200200200201203200000015200080211200A0020420000000000000000000 00FF52090000000AA0AA0AA0C80AA0AA0AA0884AA00600002382A82B18002002A82A82A828860020 81012182A82006A8238400040A00AA80002000002A80000412A8280000000000000000000000FF16 75000800000000000024000000000220400020000008800000109000014000002800020000000010 80410D0000010200001000000000000000001040020000220000000000000000000000FF92170000 000AA0AA0AA08C0AA0AA0AA0880AA09000003202A92400882282A82892A82A80082200001202A830 0088A20008088A092A80002282002A82C90802A8341000000000000000000000FFEEB70000003541 5435431033433435409015430C0000A40D50CC0400CB0C10D10C00D10890D50820A41008400D50C4 0890D50520550000A40C00D50510900D51100000000000000000000000FF85530008004004004004 004004004006420004400001001000100C2110100104000100112108901040100104902008112120 00A0001001101001001000208001010000000000000000000000FF41B20008000AA0AA0AA0880880); SDR 8000 TDI (18C180184980040062D200410A80202000603600633420410814202080002008E00600E006000000 002810006006006006006800000000000000000000FF927700000000180000000002400180180580 18040004006006004444006202026004026000008000002114004206044002084006000000002000 006006006006006000000000000000000000FFE1390000000AA8000AA0AA2C80AB88BA0D8AB89000 002AE0062AC8002AA0CE2CE28028E0000A100060BA042AC0882002AA3242AE2A82A82AB0002AE2AE AAC2AE2AE000000000000000000000FF379100080000180000000100400180182380180300040064 1200404400608000600E00604404400001291110002600C4160A6006000000016000004006002006 007000000000000000000000FFD857000000154800154155114155951949955945000055644A5543 5055200C51644E51642402401414250155015040C552406556550550556004554556550556556000 000000000000000000FF19FC0000000AB0000AB8AA4918AB8A9C890AB80880002AE0042AB2032AE2 4E2AE34028E2121020402A622622628E4201202142AE2A82A80828402AC2AF2AE2AE2AE000000000 000000000000FFD763400000000000001801001801803E0100180100000060800038020022860078 8002609230A08001682E006200144000054006000000006008004007806006006000000000000000 000000FFD1BB0000000AB0000AB8AA0C38AB88F8810AB94080002AE14E2AC3142AE2222882002E81 024B24002202062160881840042042AE2A82A86620002AC2AE2AE2AE2AE000000000000000000000 FFB83D20000000000000180101180180184500190180000062420040240020820000C000000200AA 001080868860260144500C400600000000E820004006006006006000000000000000000000FFCD81 00000000100000180082180182181180182C800000408600408A0000100460080063362060400060 5602E20644208600E006000000102000006006006004006000000000000000000000FF9A92000000 00100002180184388D813903809880090002420644E08620420002600010630E0CE00000021600E1 4000200A00E00602008000610000620600E404006040008000000000000000FF2DE1000800001002 00180580388988382882F810800039400420008001001C33810000800E20601000618A0A20083467 42086346298000006240404006006184006020000000000000000000FF7D80000000000004003829 90180192185084180002202041500802040A414420045021002640622000800214220E40E0060862 064800000D640002C046104004006000000000000000000000FF9C4A0008000000000200540C0000); SDR 8000 TDI (01109801004000E04614600200040E026006006027200101A9610813610824E04580000600780640 6001847006006106004006000000000000000000FF1167800000403C01C01204001801C018214078 0100201E742661E5021561665161C60170072000C08040C20060E63A742480008E80660620600113 E007046886004006000000000000000000FFBC9C000000403841E10800000401805C20C018838103 00688700605020000000621442728C82E00080640600600000600E00F10F00600600000400640780 7007006006000000000000000000FFFBAE00080000380180200200400180182A8018258002006236 08E00440649002655400702414600C4860201340064060CE00600600600608008000600610E80600 4006000000000000000000FFCB97000000531C01800B00000801C01800C018110000004006046520 00000600600400610C00E08000E108006240126C0680000680600644200880600604600600600600 0000000000000000FFCD420000002058018A82280AD8AB8AB8808AB88180002AE08624644C4AE026 28E0042AE20420620003624024608E00E4062AC2AE00600644A2102AE2AE3562AE2AC00600000000 0000000000FF844C00000000380180482400280180182180180180000160260C6002000100006000 0060040080000480060244000061160860060060060044400A600628E00600400600000000000000 0000FF12890000000898018AC0040A88AB8AB8958AB85180002AE2262060920AE0882AE22828E304 2C45080C428630C0AE2A60862AE2AE0060060964802AE2AE2062AE2AC006000000000000000000FF 4396001000551801950B1015195595591195583500004C648640E44E5504365364D253654C546340 3064C8516130556446408556006006554106416556046456554006000000000000000000FF9FC280 0000021801800150001801801821801883000000411608E00600644600610202604C00C00040400E 006206016036004006006006006000006006006006004006000000000000000000FFD89D0000000A B8000A80A80A80AB8AB88F8AB98000002262320863062AE2862AE00428E2A02A000002220A22208E 2262262C42AE0000002AA2002262AE0063262AE000000000000000000000FF63B100000000080000 0000000001801821801821000000E00A00608E00203200600600601000030400A00210222000600E 014006000000002004086006406086006000000000000000000000FFFAED00000000180000200200 40018018018018138000106102434042006004006556026004014020482120008006096086046006 0000000020C000E00614E00E006000000000000000000000FF556200000000080000000000000184); SDR 8000 TDI (40104000020500040040040000040051140010050002088140000080400040200908040044008042 00004801004004810004000000000000000000FFB86F000000555D55951D55D01955955911D55881 800055755655654631643455444455750441644914D4065561165570165175565564464440115565 4E556557557556000000000000000000FF3C280000000AA8AAA8C8AA8C8AAACAA8888AA908800030 22AA2AA2222AA2AA2AA2222AA28220A0200A23024C228A2AA10A2022AA2AA12B0AA0202AACC22AA2 AA0822AA000000000000000000FF184900000040000000420045200000004240002C000200000000 001402008000100C0010290A00012001280002400003000210000001000880800000010040008000 00000000000000000000FF2D090000000AA8AA8628AA8850AA8AA88E8AA80480020A22AA2AA31008 A20028820228A0521620004020520020AA2AA4022C22AA2AA0024021022AA0122AA2AA4622AE0000 00000000000000FF1F4B000000201800201801801800000020000120000040800000008040601000 610004604C0140002040C40000060005140100000004800100C00000000000005040000000000000 00000000FF61A080000000000011060022C000000000000012000000000000002802612004602800 63002802301504103484060000400200000000485404000004C80000000100000000000000000000 00FFBAA1000000201801A01C01405891801801801810050008402642640430801000001252002000 02880004062AE0061061320064060960000C220000602200E006006006080000000000000000FF26 540000046098858450050A1843801881953945882004E2160060C80461202C002200030E20004044 814200614040640421612E4060922020002A6002086506106106000000000000000000FF4D9F0000 02001801839A030018238418C5801801082002602601608E00E00000602600608820000800001000 E02001600000E00E206088202040006000006216086006000000000000000000FFDBD60000000099 818018010A18C1825923901800820008E60626E3025200A83060062A603004022020029215608621 E01A0062060060020A20001A600204600E004086000000000000000000FF7362000000401803C03A 000038118018012D5935008100600F00602450600614000A00020100010005004E4C600610654440 50C691600000242040682690E886806006100000000000000000FFE239800000001821815004001A 01801C01011885008001408608643405031644844A2312C600802028C24200601000640600C00600 6000002000006206006006006006000000000000000000FFF58F800000001881803C000018418019); SDR 8000 TDI (00000000000000000000006000006000006000000002000000000006000000000000000000000000 000000000000000000000000000000000000FFA98300000000100100100100100100020020040000 00001000000000006800006000806000004800004004000007000000804001000800000000800000 000000001000000000000000000000FF41BA000000000800800800800810A2888480080084000522 AA00500080200140080210A20210200080308302201210A80208200220A000080080002084084102 012206000000000000000000FF54CB04004000014010000000000020000010020000405000000308 840082B008821020004C048A30B00000A90000800000000008804800004230820000000008000000 000000000000000000FF3B47010000000880884804844A00920C00C18818810202208A8028038020 0200310A08298248200005A0C280A74246211B80200206A00086200012204205A602003002000000 000000000000FF57F100000008180191580180194594D135CD581188825168CE1564165065578440 1641650E49600010680640E01645710E28442602D200016200006257026226006006000000000000 000000FFFDE702002000002000000002021840100108140102800CC00402C08484808C685281B488 6C2486690200002C050938844008400040480010422808002402408C44C404000000000000000000 FFB03500000010080091280080094280481082480080004020030C340A3220CB0220023020232020 0080200280221200281280240280240081240000204A802002202002000000000000000000FF1F3F 0000000000000000000000100006400080103100131888000000001A002010000404088902400808 000301001080A0000040A08000000000000000000040020200000000000000000000FF0499010000 0000000040040040003B818628020020404004600080000014400100090084800600005008402401 40A21300280010420000180100000300120200000400000000000000000000FFD0EA000000400200 0022204A420040000220008000000008000000400000400200000203002800481504100004000000 40300800000010020400000100800001000800000000000000000000FF0353080000000000000004 00000000002000004000080000000005000000100000C00008488104012010C0000040000D100100 01000020110091000008000800000000000000000000000000FFF3DC9000000AA8AAEA8888808CAA CAA8888AA80A80022AA2ABAAA00A2AA28228A30A28A0030220000020022AA08BAAA0420222AB2AA2 922024002AA2232AB2AA2AA2AA000000000000000000FF7D21000800400001200400401201201020); SDR 8000 TDI (41800008610F0064A240108000644682610EA4C0AA00601700622040702A506006492000A0402800 4C16000C06226006000000000000000000FF9775000000000001800800820821A018218018C18010 00600600551404600200640410E42E2A0408084000010C0604044604400001208020410180620208 2086026006000000000000000000FF1E19000000004801800D04820801C00809805809C000006116 18400002023F00E0440CE90600024005C1A0000040C38216804240D020800846841871F600200648 6006000000000000000000FFBC46000000000801800C00800801800911A11809800088680680C824 406CC040E004006806014082206848000006000002C8640780700008405000680600640608600600 0000000000000000FF1DFF0000000008018008448048058008058818018428006806014408808084 00608490684600480080484680000808042200681622A04000600080600604650600791600000000 0000000000FF95160000000410218611AA001000281AB3881D0180024062166CE0020460860768C8 81619644280800601A2C008680028626340C206E2840600301610280100640604600000000000000 0000FFD3810000000018238018080019200898C1C01803808212E326106022800006206408206206 0820CAA06080B0832000010E50214100711182602000405200600602E006000000000000000000FF 4505000000001005801800003842001C01801E858321CD6816024024820002008A20310C2ED420C2 4061220482408000170024A400400084602000610204148602E0A6000000000000000000FF964000 0000001881801840801800281801C158498000006046C04A04006882200888400006112401287016 02840EA0100700214400040000629004594BA05406006106000000000000000000FFC19300000004 180188100080330B219811801C01A0000A63C7826CB22B082042E2260862860068A800A0028060B6 1872E23860060D1100600000A1E050082006406016000000000000000000FF77B600000000190180 1A00801A01407861985891800100700E40F00E51F00000601610692E00681082088100610056641A 526006960000400000806200106186006106000000000000000000FFD31900000000180190184180 1815811801A09901C00002602601420882610420088600005711644032408A04E050806043046006 00420080028800688CC06806006006000000000000000000FF8AE100000000180180180180380190 180180182180001062960441240000240304464002060061000120060064060061020060A6000000 00200024E244004206006006000000000000000000FF61C900000000000000000000000000000000); SDR 8000 TDI (910000600632E2960304A608E44600E04634E0400022064080410A60170068060220008040108060 02002006006806000000000000000000FFCB1B000000000001800008800000101821C11091822102 E2CE6CE02E2AE22E2AE8EE4A702E02E7680A244C23009E2842AD2060064680202066000060038030 46006406000000000000000000FF8FC6000000000801800800040A01A11AD08C1A05910128641611 4494C5055492ED0011655235000C42410EC400C00CE09201000680E04000E0140060070262060870 06000000000000000000FF403E000000000801800A10000A01D0380198BA0BB88029601600440400 604080720080608260005024403600002682600200800E00600010E4002260060060060060060000 00000000000000FFA56A000000000041800800000805851B40A05851800042608605512500010E34 62563269201042045008268400201442B140480704E040C560048160060030060060060000000000 00000000FF7CDB000000000001800800000811805801811885835008642648401455640200E10601 621004C00000000641049620600200C00E0060000060004464060020060060060000000000000000 00FF46E3000000000801800000000001801800001801800000600600600600000000600000600400 0004004000006000006002002006006000004004006006006006006006000000000000000000FF61 AB000000000801800000000001A01801201801A01000700600600600600400600000680480000080 4004806006806002802806006000804000006807002007006006000000000000000000FFA6CE0000 00000001800210200001809840829A01800204648702600641000200610620609050200440100600 621000604200E04680680000E004006206006106006016000000000000000000FF308F0800000440 058C0020204045841885803B21910300600EA9604E007897517416056C208425008B008C88E04693 6006D06D0EC16C008864A8456016802026906006000080000000000000FF90590000002002018002 20100101801011D83881864100700688600E00608624604E00E20683000008604600600602641400 608C062100E8600020E20A60001E006106000000000000000000FF58C50000000048038809000800 A382088380D921C80000608E01E03620800A40682700646E38000074680101E00808F2070CE04020 200000E084027006100186006006000000000000000000FF36FB100000244A01840210604801809C 29821E01A130027C062270020070040B7C8644708600DB0002E12E086C2700603220622701648000 4230004002001046106116000080000000000000FF7C66000000000801800802000841A01D418118); SDR 8000 TDI (00004804104944841105004884820000814800848A04900820810C81010854128000AB0800A34810 A00000804004000000000000000000FFF09F00000000180180188582180185180180380180408064 4640641610650E00400410600600440043600440613642600640600608602040600000E106226A16 086826000000000000000000FF20BE000000440C84C44C50C00CA0A04D0CF209048C0028208A80A1 4322B02328A2C3203A230330A908240B03300300B503022083A5221110B48008340B10B003403202 000000000000000000FFF75A0000002C02002842002002084340025004020C4082148100C524C808 00800840D00200884830A18800E60810A008008008000106101008008008088000B1200A08000000 000000000000FF8F200000000008008008808008408C0808088C00920010310B0000C00020201001 0000200204224040200200200208218220210210204000210008249205240A002426000000000000 000000FF351B0000000018018019418C1801800280004000000028000040101017E11000E40008EC 002181000E4484000066060400080000C640008000080002005A1200400040000000000000000000 FF0F5000000000000000001000812060803400208400014002308112000066482072000060E00004 0810123001000E0000084492080880204102810101000000001A8000000000000000000000FF59E6 0000000009A584080E802881801900841909800000604622400400008449008000000A8020000068 000861064160260020A62060002A6400326024004000806006000000000000000000FFCAB7000000 280B41A80A8CA82AC1851D05A95A939400826CAE224CA482F025300A00808C4A082C30A865409068 00806912A92A2ECC60008C6A80D06B34804930227246000000000000000000FF5A0C000000000801 800400808009081829801A01C00250600601780608628800E08108608220E00002F0002460492C40 2400210600A22040601002600092020209600E000000000000000000FF2792000000000801800000 800001001801801801A0060060060068060008000060000078020060000068008060060040000020 06000000806000006000000002006006000000000000000000FF2A5F000000000041800800800814 1D1901A81841A00000604604450480610B001006C10404906A00A23028810C8E806086806006A0A0 0094C000016402022206006006000000000000000000FF321F000000600001E00800840800611881 801C09800048645600400540080302010748028D0070890020840210000160020160070000200062 00006002002026086206000000000000000000FF3EA9000000000001800000800000001831C49003); SDR 8000 TDI (20A04200016450244202000001200204A0400821020820820C202242204200200001000040200211 A002002006000000000000000000FF46964008000000000000400000004004404004000081081081 02D2C84094A100102002108138102820100962001000100120108100100100100100160100500100 1000000000000000000000FFF58C400000020800800800800904D00C80C40C40810110B503403102 0131334934324CB10B40302840340B0820420032134030C300300308900100308B00348304300200 0000000000000000FFD85D08000000380190380184580180380590D801942040604405620E126006 04408600622603600011604404430611612404600E0060C620000040604601600600600600000000 0000000000FF647A0000002022002002222002401012012012010005005004004844C00809044914 840000940830849205114820810804090004A00804800810804810A4480480500400000000000000 0000FF03CD000000000800804800800800822800800800800000200200250A002402002002002002 00A000202002002202082012002CB21220021080000024A2112002002002000000000000000000FF 2F5E0000000AC0AA0A808C0AE08A74C0AA0AA0AA00002A82A8AA90000E91A0289230288AA8200000 0800B82300882202E0B201104180002200012A81004002A82A82A8000000000000000000FF594E00 080004200000A00204200820A2000000000001001000001040000050001000000000000020110408 010400000030050040088000000001040001009000000800000000000000000000FFB27F0000000A 80AA0A80C00A80A80002AA4AA0AA00002A82A92A80B00880082A82202A8AA82400301104002A00A8 230210A310010200002B00002A80001082A82A82A8000000000000000000FF0C9100000030035420 03103103420C01545545540000550551540500950D00D504C0D50D50D510108208A0D40930CD0A00 D00C80C40800430808400D50400550D50550000000000000000000FFD01F00080040040040441040 04040102000004000003001000800401200421000101000001091001241141001401101080000C20 101001001008001429021001001800000000000000000000FF16C40008000180AA16004000008220 00AA0AA0AA00062A82A82102104882082882302882A82A08204800A8220088220128200210200000 100000190220160AA8AA82A8000000000000000000FFA53E000000322A00A00B20A00A48900800A0 0A00800080280204A80AA0284304280A802802802010A0300300AC02883002942082802800002808 80290290A002002002000000000000000000FF6EDC00000020020031420A34C20004D20100020100); SDR 8000 TDI (E2A82ACAA828808628E22228AA0624100438002C2266882AC40628C2AE2940002A94042AEA108462 262AEAAE000000000000000000FFE230000800009801821802011815801831815801800000600400 C04C00608602600002712604080000615400E04604604E00400604A0040C88800070000060060068 06000000000000000000FFA7F72000001559549559541559139559519559558102556554554D5035 0056556414533506C064044480AC54615055408444C556426004D501045564428864D65575560000 00000000000000FFDDFD0000000C18AB0818A80C18A00AB8838A18ABC0802AE2A9346A022CE22E28 E34E28E2143120802B40062A428E08C28422E2AF4000020002002AE228B2E2A62AE2AE0000000000 00000000FF4888000000001800001800001800001803801801C0200060070068020002860060A600 282C88810000420600C00000402C106007080006000000006080A0E0060060060000000000000000 00FF82BE00000008D8AB0B58A80858820AB8898898AB80402AE2ACA043040A82062A82022A828628 26002A442822608860600C3242AE184000C000002AE3A02262162AE2AE000000000000000000FF91 66200000023800001802009848001801803801A00400600404C12C00604600004200400601690001 420000C006114026084006834004048C0000601200600E006806000000000000000000FFDACD0000 0000180101580004580000184584180180A000600008600240011600609000604C04200000410610 64460464800160064020003000800060060960A6006006000000000000000000FF3C980000000018 0104380000184000180190380580002062000060CE00600600600040200400028000400002602013 4410206126006044000000086016246006006006000000000000000000FF58470008000018010238 0190182001580180186190400061440046080460567880C419022408221044C13E43211848432009 400640608C2000004560E601601E006006080000000000000000FF3DAD0000000018000018418419 00041825801809800000600400400450848604850400444454604001404008020600604010400601 6314488408006086106006406006080000000000000000FF482000080000000000000008008000C0 0210200210402002800000000361160264402060002000882400005102A621009000808020822010 02100C8010240000200000000000000000000000FF50420000000418018018018458038801420A00 000C200004244000002C641651629051643004400001422400442E01048800004800012051000040 0134000480020000000000000000000000FF4A8408000000280088286084088084284080A8308000); SDR 8000 TDI (0801014009001600604C12C09000000120E08C45202C00610E08703101202C406005006506106106 027006000000000000000000FFEA1F000800001905801824001C01800001A0000081000064080001 2420600604602C044000D2808010E0A412A44400600600600431600C00650000600E007006006806 000000000000000000FFF543000000401C11C01C1040180180020180080180200060A60002000400 06006006204804000205442C0C002004006004806000042426004004006086002005002006000000 000000000000FF3FEC0000004ABA21AAB8804ABCAB8AA0AB8AA8AB81102AE1062A801808E2AE28E7 8608C2AC40000000205421208C2AA3BC2AE2AC0025860040002AE2362AA2AC2AA2AE000000000000 000000FF4114000800001801801C00001801801001801001804200608400610200000600600C0000 4820420001202C08E4002262520A600400200400408400600E002006002006000000000000000000 FFB96D0000000AB8098AB8AA0AB8A98AB0AB8AB8AB80502AE2042AE0A60AE2AE2AE00C0AC2A80AC0 802B22842262CC2AE2222AE2AC02600E0044002AE2262AA2AE2AA2AE000000000000000000FFEBD1 000000355B55D55B54355D53955155955155810055642C5264465105565365465504821500865405 0440615011200640E5544125540044065562C6552556552556000000000000000000FF1BAA800000 0018C380180000180580100180180180000060540064062060060060464040020004000020040860 0400200600600428A026004080006106002006002006000000000000000000FF65A40000000AB8A9 8AB8800AB8AB8AB8AB8AB8AB80022AE0062162160CE2AE2AE20628E2040060000000040C408E2061 062A62AE3602020000002AE0002AE2AE2AE2AE000000000000000000FF567D000000001800801810 001801801801801801810200602614E04E02000400604A04202400020444040C0044000064AE0160 06000042000084006080006006006006000000000000000000FFB497000000001803801824001801 801801801801805000650C00608220600600610000608E52E08010E0A444E0260CE0060060060921 12000202006228006006006006000000000000000000FF358700000000180080180000180180184B 801801A14000600400600204002C026094002126136C0402610410604000640E006006802002000A 0400614220E006006006000000000000000000FF0345000000001801801800001821801881801801 801000600680400400620600600602601600010000E2040160060041460440060300000001000060 10126096006006000000000000000000FF3B830000000AB8AA8AB8AA0AB8CB8AB8018AB8AB80002A); SDR 8000 TDI (22220228A28A28A2422AA28A2A2488C0A4C22222AA2AA3122AA2222020821120802AA08200202222 A2AA000000000000000000FF8ECB1080004002004004004002000000005200200040801040120348 02000000000020008000851008044909020028008000100800000000810080000004800100000400 0000000000000000FFC9730000000AA8AA8AA8AAAAAAAA8100AA90008881002AA2022043240CA2E8 2883102AA2462B20002620323002AA2222422AA23220642202A6002AA04255A60A2022AA00000000 0000000000FFDEC6000000401A01A018018018019140000540000080000004008088026006046008 00410000421010800C08000400000C00000C0284002001000000C422000400800000000000000000 0000FF880680000000000000060040040004000010004200200000A81200004060060060C0006028 0081000002800500061100C00000801000900800000004081000C00A0000000000000000000000FF A89D000000201A01A01C08501C0401590D851800030048628000048C0000100000C4154212016000 00600022C0C4016000046008042046202100006006014006016006020000000000000000FF312200 0000481E11E018800418A80018018018811000006016010040516540100404004002406108226526 10441450600010610000610E00E050086004406506206046400000000000000000FF8A7D00000040 1849841ACC0018A00400018098900800006000006006086206006004004106146088316090084084 066000006044012006002000486004266046144006000000000000000000FFF9C500000008182182 1822201A0200880D86194902800061960060EE60808E0060940FC10E0860005BE116204274086000 1A61B400206640C000256004002404260006000000000000000000FF6AF9800000401C01C01C0052 18104430838018018003486C1400840400602008024600430623600200245003000C414000006013 02A10E2020AA00600601652610C046240000000000000000FF4D96800000001801801810001C0000 1801905C0590800560444884001004A010002640421600E0C08028000304842440D000682200E40E 000000C06406082087000806000000000000000000FFBD1D800000001C01841800001C0200100982 1D018000026084406402040206126006004046082000005446002304004006416106004006006000 256006006007004006000000000000000000FFFDB5800800401A09C21C00401A22001A09A01C0190 0109704416608242E14E03E186485426892159104A2620200444404720E006004406004000006086 602C07000806000000000000000000FF8CCC000000401809C01C08401821C0000590524481058878); SDR 8000 TDI (280200205008030840200200220208280200200200200200280240200200202A0020820028020020 02000000000000000000FF656B1400080400040080040400000400000002020000000210810D1000 82818280201104A13490284484214204502800502008000401000885001248082000000000000000 00000000000000FF4EAD010000014800804810C02800A3080098C800C64200B0A200200380200208 288284281280200008300399A00A85A1A2A128020220830020200020821421920020020000000000 00000000FF4ACD140010101801801D11901801901831C898258902A8F0CE42434655754400411634 E506C8400281614640F4960C6116CA62AE2A60A6006002844087C060A600E0060000000000000000 00FFABDA0A000802800200820202100505010522601240618042080B929800821C42C2682202F822 D028668230A60A606904488108042040000CC2814A400C340000004040000000000000000000FFBF 130A0010080800800888D00C00B00808800A14808000B03220E8C2AB22C220290F00310AC0280041 2002002422C92002002552542102022000043002802002002002000000000000000000FFD4460000 000000000000002002000002A400022010484800800204080000080000204B002010000000001003 0010040800280000000000000000000880000000010020000000000000000000FF41290100000040 0000401000000203830048A01020000400004000000019400000001102001014020200A020008004 0AA8038000000020000012A000003E10B0000000000000000000000000FFC9380900004002004004 0040020005040008008001210000A800002020002002000020013010030002128000820044092000 0D20200000008001001000121000051000000000000000000000FF20E80000000000000000000000 0000000002805200000000000484000000000000000000010000081100081000000900100000080B 0000500480000000410000500000000000000000000000FF5FD48000000AA8AA8AA8AA8AA8AA8C28 AA80680080032ABE0229208A0AA28A28A2AA0AA24322A0002020222220AA042203AAA0020022AA02 20002AB2AA0022AA0022AA000000000000000000FFFC0F8008004004004004004004045012014012 200003004A0408C02C00000404400400000480000088100501400000000000508412C02844000100 5211001111101004000000000000000000FF5826800000555D55D55D55D55D53913D558119138080 55611440400651655455455615640CCA600043790444615600F4365572C44D4556526401556D56B0 7D56557D56000000000000000000FFD05B0000000AA8AA8AA8AA8AA8A8C22AAA832A8A80202AA0CA); SDR 8000 TDI (01400216C07B020000849042901004100201880804120160161063042061240A210641A087106006 000000000000000000FF76EE000000002800800C01A21801800009829849C0000061110020000064 06106C00200041004A0500400740542834E1461048060070064060050A20060C6090007004000000 000000000000FF77B5000000000800840803003E01804081811801800000E0200020008810061160 04100000034094084A082B404000E006806006056806006004806106446152106004000000000000 000000FF8D3E000000001005003021803909841845A252073D204669000200004067074C60BE4C07 024060C0082225026C0000640160401E32F784046091007046813024016006000000000000000000 FFBCB00000000018010838218418118098018A15414020087001B240408210060062A60018038064 0002A94400708040602400400640600208610024E016087004006086000000000000000000FF2DEC 000000001000121003C018018338C1C8D8A1050010E140284000A40000200C020401060264200320 9500242080020600500600600410600020F0364D209608E006000000000000000000FF8414000000 001800001801803C41C0180190180109000070002254884860808408030001162908100920045020 1014020701600600600211644800708F80600E006006000000000000000000FF2E85008000001805 003801A419018A3A27A2128180204062070010661083062DE0A9406A2641083000620C53C3066100 E30848861A6004046010041326082024006106000000000000000000FF6703000000001801009801 A05801A49841A09203800000698640000611610610700008E8064208000261B4004066C000020060 060460060060008800066260C6006086000000000000000000FF3049010000001801015A01801C41 805C0184100521000062060404AE80640042801400E04694601082E024CD48060404060848861068 06016228000456804116006804000000000000000000FFCC8A000000001801001801801801889805 90908108200060060000064000000000A408648E01004010640400420E10014600C0060060060860 00086106124006006106000000000000000000FFB2FA000000000000000000000000000000000000 00000000000000000060060060000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF0AF7000000001001001001400000000000000000200000 08000040008070060060000000040040010040040040000040050040000000010000008008008000 00000004000000000000000000FF3BF1000000000800800800802800800880A30A08800102A0C2B4); SDR 8000 TDI (C50D564168365561561563048460841080001422421014D002001654600C00608E20688428600600 0000000000000000FFD533000000000801800A01803A018098238648238500804100206006006887 08680E00E00E006004086044800000002002A0000404001E00600402600610600400600600000000 0000000000FFBE1E000000000001900040845805911C41D00015C000100414956457340526126556 08600682600080688431620105421400420910010600600500600680700400600600000000000000 0000FFDD13000000000001800001801841821895808921885023002440608601601640E00643654E 516500486414026088004004414004200006006006026006002004006006000000000000000000FF 040A0000000008018008018018018018018010018000004000006006000006006006006006006000 000004006006006006006004000006006004006006006006006006000000000000000000FF00AE00 0000000801800801801801801801C014018010004000006006006006006006006006806000005004 006006806006006004000006006004006006007006006006000000000000000000FFCCC600000000 0201820201889A03801841801801A0C008600200740690004700608640F206206446546044006006 4C60061068848000C630600600F106806006D46006000000000000000000FF449A00000000C08581 4081801B0189180DA81A51A4002404B209684600710EC4F40E1068168C608400C48D28E006816407 406C04C4840601600602602610680E006006000000000000000000FFD5E300000000800180044784 1801881901805005000000600604201600600620680E006800024004008089288106806046204006 0060140060004060266421C4086016000000000000000000FF80BC000000000883822CA1089D85C0 D88180341100212A760608200F40080700E00228601010422420090100000622E03688420622E304 006105207807902000106006000000000000000000FF8E30000000004800810A01821803A0183590 1855C4900068D783644690614E026281816408484085924226000086086C06004086007148516006 8521068A2834446016000000000000000000FFA1F5000000002800800801001801801801835C01A0 000B6116016A960A000E2860944C682000400808D20F300C46A36327115116496800006004003126 442008006016000000000000000000FFFB3C00000000000180000180188180C001A03801811012E4 00012D1014780600600E0C01148041040108860C0800000806804887A16204006040002026002804 006016000000000000000000FF9059000000000C07800801821A1D868069A0182180808060000020); SDR 8000 TDI (2A8B2034C3003403A134B002240B44B023443303083A020011020830D004B00320309350A0020000 00000000000000FFA36A0000002302402082003882082100402002820081400804940D4081820090 0100800800080880818808800840800840980400800881108800010808880800800C000000000000 00000000FF33A2000000000800800810800800808C00800120824000340200220208259000000218 208200264904350262210200200222201200000200210000600230A4002030020000000000000000 00FF98D60000000018219018850020A010440200200810002140200200001470060974A042800103 00000240440C400021C2240010E4080020000010CA02A0400058038228000000000000000000FF23 DB0000000000040400200200004402804200040008120A0020000002700E60E24820000050010088 00800180201001084000000201110002010080000003A0480000000000000000000000FF40FA0000 0018088388094A8019418218059C1801840008C112486006200000000006006606206010000A3000 0006440400008108000606006040146406014000906886000000000000000000FF8B660000002A0A 83A90A91C31CC9A21805B01C318401004442846A068CED09490C96D0E8070A680800022688080680 88410290000410A6816A0082F056904A8C42E086000000000000000000FFCCA60000000008418008 2288380181188182588380802A8005286006206006006046026287A062800C908823082640020850 60CC10040600600008628640E024106236000000000000000000FFE6FF0000000008018008018018 01801801801801800000600400600600000600700780600600600200000600080600000080600400 0006006003006806806005806006000000000000000000FF2AA4000000000001900048841845901D 01A85C1185014441170068160070000001060268266A60008209A1046000254405002C1200000600 68000870063A6084006006000000000000000000FFE39C000000000001800001801801829821C018 21B000005806006007C0004848900600710E00602100500000640080440410350204000E00702900 62AE806804086006000000000000000000FF11AD000000000001800200801801A03C01815C01A001 43615740E3360494868064D648E20701648828E20FAA808194202280285600000652600000600680 700640E006000000000000000000FF774B000000000001800011C01C01831C09889881A82048E226 0AEEA62AE22E32E7262A66A64AE2D071467E6C878840200A00A0072A008600604110644614600601 6006000000000000000000FF7685000000000801800801C01801C43821A950219000854150416156); SDR 8000 TDI (0B4C24C24D22D314344124B013122122042103443003111141041051403012423223003002000000 000000000000FFD74A00000008380183180188182180110190D801884004400414401408640400C0 1400400420E1080064A400C00620600608403602000000050005640608E006096006000000000000 000000FF8AB90000002002342002004014002212012012010040004804A408108208250449489008 00A848028C0814814910920B08804000000800000A00001004810888800004000000000000000000 FFD85B000000004800800800800800802800800800810000210A08E10600200200240600600604A0 0800A2421420020120220020028002000000000A20024A2442002802000000000000000000FF9008 0000000A80800AE0AA0AA0AA0880AA4AA0AA0000AA822040222228828828810232A2AA4000002404 802102302000002A8AA92A80B82A8000F082A85001012A82A8000000000000000000FFADCC000800 03000008400000000004040040C00001000011000000100208400000300100093000000083000080 000800A0B000000000400000000200000A0050000200000000000000000000FF7E3B0000000AA0A8 0A80AA0AA0AA0C80AA0AA0AA01402A82A00002B00A8AA82A80082302001200102801202C02A03285 082A8AA82A80402A82010002A80000202A92A8000000000000000000FF679D000000204354240330 3543545101541003400000D50448D50C40910510D30D00D40D40048840D41048D40D40C40C10020D 50550308550A00910D50C10A00D51130000000000000000000FF68C7000800400404400400400400 40240000040000010018110D10014000010014410010D10110010090110010010010410000000015 00001000051001029408000000000000000000000000FFCCF00008001200A801A0240AA0AA2AC0AA 0C209400402A82202A03204A82A82882002282A00000002A88802202302902008302A82A80282A80 004002A82001002A8000000000000000000000FF175C000000280A00A00A04C00A00802A00A08C40 808100200A80288280280302294A80280284A840802243002802802822202802000402002A008130 02822D02802C52000000000000000000FF457400000020C2042C0308401401201201241215002800 4885010810A0000500480088080828480280481488890883088890C0040009040048025250048908 35004904000000000000000000FF1EAA0000000118018C1803801901881805901905900000440450 600601600410C00650600610600001414400610610E046404134800416806000D0640608E4260064 06000000000000000000FF0F78000000480C42C00CB0D00C4082C820820C008241B0A1130232A30A); SDR 8000 TDI (5561061462A655600C09610448255044254455620600055055000555455608654E55655600000000 0000000000FFAF5E0000000938AB0A58AB8AB8AA8AB0AB8058AB8000121236D1701608E2AE2AF0C7 00602E2AF02040A0C624C2A022A2A82422360002A82A80012AA2AE2AC20A2AC2AE00000000000000 0000FF7A12400000001801001801801801801001801801804010700400620600000600642E20E00E 00608042024E05000008201600201400000000000000200642E002006006000000000000000000FF FA1A2000000E18AA0898AB8AB8AB8AB8AB9018AB8120004A842067060C82882884361D66062AE602 0C24103042303842062122260002A82A8002AAA2AE2042422AC2AE000000000000000000FF97D000 0000001800001801801801801801821801800008400C00600E0060000002060060C6006800226020 04000800401604A00E000000000800002006016102006006000000000000000000FFE99B00000000 D80104380080180000180190D80181002480460B60A644002604609622E016006040012316114106 0281401040860000000000000020060C4052004006000000000000000000FF43FB00000000180100 1811841808081801801823800020008500700621600640722700708600E0000A8210020106000200 00420E010000000200046086006302046006008000000000000000FF7E5700080000181302980980 78098118218058238E000040C055604600660016803619E20E60E000002046214036400016004286 5802000801000004264020C2206086080000000000000000FFD65300000000180505584281180382 1835951801880014420800620E0A00300100860264360C60D000610040202608802414C106000440 30002000E046016014486106080000000000000000FF5CC100080000001000002402800009000011 400000000000404A021025604E2061000400C00801500A83200100885104100B00002080002004A0 0284004080200A0000008000000000000000FF3F3E0000000018018058010C000000008A08202000 0000444034001014E02615603040000054829042C1440B000804400C3001401480000002A8230310 480000080000000000000000000000FF1F1100000008288082C8008008A684081486808280205624 1701106010200010149102128004200000221A2420020022420020120000C0008000002102002412 00A002000000000000000000FF834740080000010000000040040040242040050C08010090080000 C00012C92002000880290010210010014000B0380491021109001021031001001100029221001000 000000000000000000FF668B400000000800802800C40C84C04C52C20C4880010134524020820531); SDR 8000 TDI (6106526B0E00000008000000600090C4255420060060070002000240062861328060060000000000 00000000FFE5E90000000ABAF1CAB80F8AB9218058AA0208AB001000627006600608E28E28E45E04 64362A80080200080062202141040022AE0060060000001142AE4760422AE2AE0000000000000000 00FF5AA60008000018038018010018298298018B5801000210611652644622002600622E02620E00 40C01040000360060160960060060060040000000240060260A2046006000000000000000000FF78 1A0000002AB8818AB8B18AB80B8898AB80B8AB00B030630650E4CE2AE28E2AE0862860862AC28010 42A000E2262A60162542AE0060040000802442AE08608A2AE2AE000000000000000000FF355E0000 00555D51D55955155901905955801155812042E22001611611051651610650612655000422054850 64565462264D454600600600014420655611400A516556000000000000000000FF02878000000018 05801801801841821001941801800005600600600600604600600600E0460000084480104C609600 6446084006006006000208006006004202006006000000000000000000FF895D0000000AB8A98AB8 AB8AB8848818AB8018AB800000602202600608E28E2CE00E0160262AE60003600C00632620600622 60160000000004003122AE4046260042AE000000000000000000FF47950000000018018018018018 13810801929001810208628021631602000602610652630E00600408000401201610E42600240400 00000002040CA00620408E404006000000000000000000FFA7F00000000018028018018018408258 01805801805022C0120860462060460064260160060060A04164C42C610602608E1120D600000000 01400060060CC0060B4006000000000000000000FF1A5D0000000018008019118018018018018218 0180A024C15220E20E400006006B2631645600680001631408A10E02614E0C212600000000000000 60060044A6004006000000000000000000FF0B440000000018018018058018000018018048018010 08680684680604604604600684680600608022002404200000400600E20C00000000080080200644 C006004006000000000000000000FF178E0000000AB8AB8AB8258AB8AA0AA8AB8880AB8000400254 4861A608828E28E00E0060862AF00808000420222029C2002061440002A82A90002AE2AE08400E2A C2AE000000000000000000FF06D20008000018008098018018000008018480018040214100046026 20600600600620690600600010000400600000200608208600000000080000400600608600600600 0000000000000000FF69A30000001559549558B19559541549558CD155810004C5000D6036550556); SDR 8000 TDI (580404302A20002BA2BA28A23220200211A2AA2AA2020000A000C2AA2A22022AA2AA000000000000 000000FFC900000000001A0180180500000000200000000000200001442103104060060061005203 08014040004004004000114004500000000050000000040000010010000000000000000000000000 FF4B438000000000004001200000000A804013402C01080002080800400060460264200100000003 00000000020108020550020000000080000400480000000120000000000000000000000000FF6B88 000008201A01C4181380591190180180188188080060560062162401002002060060264063080860 A400802648000204600630610400800000600614E004006006000000000000000000FF4456000000 401E0388B80190180182193580583180484461022060A611642801002E44E51604E0002364044405 1604000410431601600450000002C316006416016006040000000000000000FF54F3000000001803 88B8038C1801821823993805802001640020602600602600612600E00E1260C002E0140202060181 0001404600600020000012C20640E006106406000000000000000000FFC2C3000000401801A01801 8438DD881809801829880020E64210600E12000E20E19605600650626009658420048663000202C0 8E00E0900904001C411609601A006006000000000000000000FF54D4800008401C01C41C09C21A01 A01881811A83000004612E006486316500000216246546D0A010202C5200E0491050861064265068 0200800080611624620708F206040000000000000000FF1886800000001801803809801801841C41 921909034142E1120163364201004104060060CE022408C020030360A010441600510E0060421000 00006A06346302006006000000000000000000FFC8A3800000001801811C01801851801C41841801 808124620020600E0002C60460460C60A608A0013021070400002823060040060060239002001060 96216096006006000000000000000000FFAF70800800401C01C09C11A49C059C1B81807963884101 6012B3654650623E436526086A0700A40108302E80000080289760510720608280000005E8660064 02806806000000000000000000FFAFA0000000401C01C03801411E01C0180008141514000060A604 600604000600600E00E40FA2403480D22C01034100B00400380EA0708C0080050074061460070070 06000000000000000000FF98AB00080000180D801901A01813945A00082001014022E08108604642 60260264260160060043024154C52D010802288E01200600600400010A2948060162060070060000 00000000000000FFF052000000401C01C01A41801901811800008001000088600821631600000600); SDR 8000 TDI (80200202A00800204A80204245228200200A20200201208000200207316228200000000000000000 0000FFA996000010001801889815801921801C13249803840013040F424516016094D14046436136 CA63282150D642F507816887286C8C28E006A0600008602522F2A6006000000000000000000000FF E1860200A00000A00000A00030191011A17A51810A00A2114422D02C809A8C2E40A01A86290102A1 1C4E8018088C88802405404400102000002968468C284000000000000000000000000000FF753600 000800080081080A800C00800C10840800800012040200328201201233200708200A80A040D0A30A 80220200A003502A02002802202000A02800002802002000000000000000000000FF0D1D00000000 00000000000003280800020800800000810128420010800080000020021D20140490040000100100 0008800508A8C88000000002080A40010001800000000000000000000000FFA51D00000000000019 000410000040008000E0060200000851801000000040010C00608100301000040060228040440800 000441811000010400000000A303A0000000000000000000000000FFD52000800040040040000020 000000004008200000810002080800400400000404200100000A0088100008930101020150000000 8000080004080008000000D0000800000000000000000000FF5E1A08000000000000040000040000 00000080000000001140210310200040000100520309008000808140000010100A000080000000C0 000000000000000000000000000000000000000000FF93F68000000AA8AA8AACAA8AACAA8AA88E82 08AA80202AB00202600608A28A28A00E016027252200273A0320232221B0522A3AAA2AA202000180 2AA2AA2AA253AAA2AA000000000000000000FF38BE80080040040040049240100100040212140000 41004010000000000004004000008041010000800800000081000D280000040040400000C0045004 120440004804000000000000000000FFDB3B880000555D55D55955F559559559118B5B558001D561 0E01411435655451410450412450608950652E5464475462864C65575564B6000010557556556006 557556000000000000000000FF1A1D0000000AA8AA8AA8208AA8AA92088880C8A880802AA48250A4 CA2CA2AA2AA0822820832A23202A23223322222AA8022222AA2AA28A0004003122AA2120922AAAAA 000000000000000000FF69C800800040040040040000000000044000000000C80004205204400000 00020228020208000400801000010009000000010000000000000400001000000280000000000000 000000000000FFE2C00000004AA8AAAAA8088AA8AA8148CA80008480082AA0420600000AA2882884); SDR 8000 TDI (400620000610400600400E400306006002106A062060060060022960461060000000000000000000 00FFEC1A0000000018C1000943419801901BE1803A0984200401467361A2B0700E30625E184C04A0 311140640C80662E0D0806F46116096186316100046866046037404600000000000000000000FF1A A7000000001A81111801801E41801803C03C01E001A0800600704A40120FC0E4864150AE11342000 692D0060C6101007006206024814004000D0F08480628700C000000000000000000000FF67EE0000 00001840001809401A41801801811823840080004E0902140804000000A2A2E2CD00E2C900114000 310622E8060A729485200200600031690304E81630E000000000000000000000FF0A8D080000001A 00401801801821801E890138A380A0200216A0102582F00802828A08E14C0060805200080AA08608 6026207088028100114000886129046116106440000000000000000000FF2CD90000000018011189 41A29805B43805BC1801820845010608600A20002611702000680490E00850E6A200402E02058600 E020202412916100246002506527804000000000000000000000FF0B360000000098010018018018 01AA9A2120190D8000888006006A06806206096040206A44026200000102204046208006036810C4 200200620080E00299EE46006000000000000000000000FFA4F3000000001801210801A01C419519 419118318000000417500440007210140504B0620C826500B56A3244C006B010462460C401000090 E20000F03004608C106220000000000000000000FF3A870800000098010018018318018038110058 01832031000600000C45004000000C01610401600800000208409602810600600000008000600050 6080006006006000000000000000000000FFB2FA0000000000000000000000000000000000000000 00000000000000600600600000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF70130000000010010010010000000000000002002000000800 00000000600600600000080500400000400400480000400000000000080000080000100000080100 4000000000000000000000FFE23A000000000800802810900828A00A0080092480A085008A000004 0120002088100B210200A00802200A00208300200200322E80200280228000200600200200200000 0000000000000000FFADF00200C00000A00001200040800000C04C020008009008012451480012B1 040B40400C48141540100280100810101520000000408020000848280D08280000A8000000000000 0000000000FF60EF00000000080097280C8188A0800C00804820C4A04880C201208200300210280A); SDR 8000 TDI (4608713124ED2634E08602600E4000808012064160004C72A6287006004000000000000000000000 FFD41000000000180180080002188180100381100381001062A640C28441602650601604E48E40E4 0008600E006406406206000210008006006000006006006006000000000000000000000000FF28B5 00000000180180180080180180100180180100000020040060020000060060060060060060000060 06006006006006000000000006004000006004006006002000000000000000000000FFFB3F000000 001801A01800801801C0120180180100000020050068020060070060060060068060008068060060 06806006800004804806806001006006006806002000000000000000000000FF54B1000000001811 801808101A0182100D221031A2008C0D2E10604601105620604620608601608408600604602600E3 060C0900000406004004206A26806426400200000000000000000000FFD078000000043841945920 04DA0590120180D4858900C020064362960060060CF30F10F456046408C0688E516406946006C008 00A8815683602084E106056006008000000000000000000000FFECAE000000003801C80820009919 80180B80B881800201100600680600640600F80F005220100000AC4006000006CA604600600204E0 0662600010E02610E122A04000000000000000000000FFFC41000000001801820800983C41E81810 A11E01A1801A931E286596000C2748662229400208840402418E2082566060A702600200682610E0 05056806806B86004000000000000000000000FFC1F5000000041848C05890841885A21C0182182B 920020012702E24B01620E246100017090021C880040060A10260164063061062A75160040405475 06926006014200000000000000000000FF18BA000000021800A01800C05C11895C01C05905A20200 02074070220000060360D44C6C12410120D3400F08080692E00610E282A0688600410028650E026C 46804200000000000000000000FF6031000000001801800800201825903811A13801B00180040640 052400600620605630C00D8040C000C08A80005602680600E0029060860060804172028169260040 00000000000000000000FF9E9C000000001801800800905813811860021B018D6060096706101086 00AF9969020444A74A4408444202008006416E7EB0652208600611E0009060126CE0060060000000 00000000000000FFFDEB000000021800800800801801801800A21803800008000F80000400654E04 72000040C41480090854061148070800064068464060060060010261021062060042000000000000 00000000FF658C000000001800E008148018058418008D184D802000000E04140000000600600402); SDR 8000 TDI (382000022A02012002C0300200249201620204A003402002092002000400000000000000000000FF 9472000000001801848001C000000814B0021461404001016D2A1280067006106040040000028010 8801603208201090A00850241A40084A0000018004840460490100000000000000000000FF503900 000000000010202004420803420A4020026000C00201009010007806886380220008000101900001 008200810649A01209200460300010940160728000100000000000000000000000FFD08F00000000 59058818008018038098459040811C00300004004004000010000006006506040000056006006006 00600602A94004000000200000601E00431002C050000000000000000000FFBCD0000000209AC1A2 4A10B09895A21821A43C21010040088CD44920C860101089168CE826D00800346C0EAB724620E88E 4C20B4944812B2A80000E8AEB16C4084C200000000000000000000FFD20400000000180188882082 1821B0990B08128A480010424080EA0604600620622620620E05700000704600610610622600C200 2004A0002000906806026802104010000000000000000000FFDD7F00000000180180080080180180 12008010000000006000006002001006006007806006806000006006006006006006804000000002 802000006006006002000000000000000000000000FF03ED00000000181180184401191180580081 80410000220044004004006020000416446806280000206006416026026807006EBA082000806000 156506506006806000000000000000000000FF653E000000001801E01800601801801A80A8000100 021000244044058114002C00865072468100A008E107C068061070A6017006006000006288287006 A07007006000000000000000000000FF8AD4000000001901A01880001A01E01200E0150190028042 870D6012D0008600E25604E08E00020880622E0C790E00600E506006446806006001006846842006 002000000000000000000000FF26180000000019018019000018018011089830020A200AE20822EA 8A2AE2AE2EE0A609E0AE2884E862E2F61A62D626620E2064E600E00620E100606046C62006002000 000000000000000000FF84D1000000001801800000801C018018018081011000324D44354C10510D 46316556546D56D100941162864460860860D6510088CC0006004214086006006807806000000000 000000000000FF3939000000001801B800008A7821A0103396588900C02048840840240060060060 0600620686020008600E007006006006000044004206004000016026846006002000000000000000 000000FFCE52000000001811800844109851805A4140115034014540081448490A0D0E0365464868); SDR 8000 TDI (8808C4C088920001000804804244948888000800800020800800801000000000000000000000FF12 E300000000080090880080080080082A80080080C800200204210200200200200600600680200000 202201280208200200291200204200200000290A002142002002000000000000000000FFE1430000 000AA0E06000AC0AA0AA0AA0500AA0AA40080012A92016200C82A82884022AA23A2B0010590A0020 12A82282A82A90002502002A80082A82002A82082A8000000000000000000000FFA6380000000000 00000008400000000508000000414800100102108044080000002809000800002028800000000008 1000001050500028140000000080000400048000000000000000000000FFA9B50000000AA0900820 A80AA0AA0AA1000AA0AA00010002A83480C8288AC82A80882A82202400000212002A82A82002A82A 84092803482A80002A92482A80C02A8000000000000000000000FFE5170000003543543543421545 543540423543540000800550510420910551510C00C20940D50801040CD0D40D50C08550D5048082 0900810800D50C50D50890A00800000000000000000000FF5B4D0000004004020304004006004006 0240040000C80000000000010000018010210010811010010000C900000112900100012000100000 1011000101001411001000000000000000000000FFB1B90000000AA0A80AA0000AA0AA0AA0000AA0 AA00080002A82002100882882C83002004082A00008802202382A8260AA82A8A000104004000402A 80802A8040100000000000000000000000FFDD2F000000200A00A00B04A00800A00820C00A00A040 80280280290AC0280200288A8C284280280000280280280280A0030020828CA8228A2800802C0280 2A12A22800000000000000000000FFEC600000002002042002482010014003150010010080004004 8D4844820824044820810B0081084044C90C88480488400400402CC04C90C1084000483000092089 4000000000000000000000FFC3BF000000001801941801845801815801801101004800C90C406026 00600401400604611610600808601641640651684600491401440621600008609608E00E25613000 0000000000000000FFE0B8000000402D02C00C40800A04D40932AA2E40AC0830204214210B0AA292 D032A320344302B08084A142103102022202C0224214302B0C3010C4B023C2354308240000000000 0000000000FFDB3B0000002082A02202480802A43401004801080088084890404160B90101619408 808A70810800200818C80580AC0000C0000480089081080108088000080084420800000000000000 0000FF826E000000000800800800C28C00800A000408008009002802140004002409000022482002); SDR 8000 TDI (00006004006002000006046107886004006000006006006016804004000000000000000000FFAA0B 0000000AB0AA0818918AB8AB901818181802804A05E0062042000882C828800600618630A0002AE2 A82AE2AC2AE2AE20EA262264322060002AE40601628624E006000000000000000000FF0703000000 00000001180580180194884084992080024A600684480C0460200442060A60060228000060000060 0400600602610210600004E8000068060CE0060C6006000000000000000000FF1F14000000001001 022849801801805903805811812000432A11612640000600615640E44E0860400060020060000000 0608600801429208202000653620604E002000000000000000000000FFC1CA000000001001081801 8458418018C1111881802000402223622E04604600B00700700600690808620220600000000E0460 B008440A02AA0000600604608600000A028000000000000000FF88DA000000001001004845881883 8108010058E984221545B222C18810608818021E0664067470004463321865803081065260040A43 0028309001E0060246060026C2000080000000000000FFC999000000000001021901901903940805 821809800A00400200400420831000430630608E00F04000E04203600821040600E0000540205031 0008622608C00E08A106000100000000000000FF16FF0000000000001240C40040000901240A2000 02020D04000000004A600600E0002803100C00400201082460080802005000900000900302100802 40010010110010000000000000000000FFAFCD00000008180380100180000000008A042021108244 050825001010600E0861401083001040204004A41060040A44802200140004800801001101300100 00004000000000000000000000FFD21C0000000008008008208408408C0800810008822008201000 04C001A44000110100100801211059200A2124020021120120C201A0620020000022023821022020 42050000000000000000FF6F3A00000000000058000240241841840048445001010011210C522420 10A12282082200210080010010014012890011010C10052000000080011210015607990210000000 00000000000000FF33BB000000000802C00842C04C00C00C00C00C0090490434430930C240B15343 250A02242301284100322300308B0230031030034024C201280103310B0120034430020000000000 00000000FF93D900000010180180180180180188190D0C1801840828600C40641608600408602429 41140860004860960862060862062061140160061060800064460060060060060000000000000000 00FF849600000020020C0442022012012004814012002008800804894814C20804824D4880088000); SDR 8000 TDI (00600600008600600200610000834600000408C44400E002002006000000000000000000FFFEFC00 00000018A18098AB8AB8AA80092184989580802AA2262AE1162AE2AE2CC0D64C60962900102AE216 2AE2163162AA2AE4042AC22E2A80002AC2AC006202222086000000000000000000FFF43A00000035 5B51955B5595595590380188015000404900325064263105165503061062065500445504D6550436 51655655445054000E35000444608E52624254A4D6000000000000000000FF6CD200000001180380 18018018009018038858018000002112006026006006004406006406040000000044006046026006 00400000000600000000600615601200244E000000000000000000FFFE740000000A98A98AA8AB8A B8AB8A18010218AE000224400220E2AE08E28E28E00E00618E2A00002AE2262AE2862462AE2AE2A0 22608E20600000400622631A000004000000000000000000FFCD1A00000000080180080180180181 18400890000002004022106006000026042106126006010004006006004016016006006010006206 016004486446116106050014000000000000000000FFC21700000000580280180180180180391500 5801002012E29202600624600600622640E24600402000610E0060460A6006006004096046124000 056116002026300324000000000000000000FFEADC00000000080090180180180180183500581100 D808E32A806812240026002206A060AE08480000600600400600600608600000610E00480C006806 14600E0C8004000000000000000000FF39E700000000180183280180180180188184892000020460 02004320006006046126136C06020000006002006004006006046A28326046106000006006006106 402004000000000000000000FF5D610000000AA8AB8408AB8AB8AB8AB8110900020012A061422AC0 4048828E28A80E0060062090082AE2AA2AE2AC2AE2AE20E0D084E30622D0142AE2AE20E226900006 000000000000000000FF0AB400000000180080480580180181180300804500800060A300500C4060 0600720612740600C800006006006002000006016004016006416800006116006114092004000000 000000000000FF57CB00000015495480295595595595588504513301204064135553101505565121 0650634EC2400C55655655655255055650EA0020E45654C004556D5654E4C6A48006000000000000 000000FF6F0A0000000AB0AB0A88A18AB8AB8230A1023888800B30420E2AE2A20AE28E2AE12F20E0 2E2420202AE2AC2AE2AA2A82AE2A6AAF2A60C60A60202AE8242A6226A04004000000000000000000 FF2C5A000000000001111801801801800020081800800B8CC00400600200000602222E0360068920); SDR 8000 TDI (8050246000000050048080110240000000100500088080080000000000000000000000FF81D50000 00201A05801AC1801901009829811801808000029201454C02041009448614608608214009400041 641600604000E21010005002000002600200600420E006200280020000000000FFDC39000000601F 0180DC0D9018090259018A3890820015004244400010614040404640E25643020800433004000648 600800600402428008000808608040C0041241060C0000000000000000FFBC990000000018018018 018C104812380580980002000040061060266B600600408600620602620000400010000600600800 600001820208040801601026E61600E0860A0000000000000000FF4DB6000000001883803C218210 000898AB805898840010E28E50E00E00802620402629E02608C1A810404C22E20600603051610800 012200000040E000506002084006000000000000000000FF486B000000401C01811A8BA009408018 018A5C0181001248402A450400649008C40602611620200011434008700F486800014C028C208802 02008A408E00600E222006400500040000000000FFA2B6000000001801801801824820C258218A98 44912024C14004C1104080C044C0564C652E020051004A10A8012603608080400E04620A20028004 EA0E04E402002006000000000000000000FFEE8F000000401841801805820E40D03009E518320000 09422014E00208002620432E32620648E02000450728109604608700511702620420040140440611 2106004006000000000000000000FF2D7F000000201C21A09C03C00C02C9900BB05A009502406B00 4066224A661E1D4286006806A8C01116C88502700E817067004006006006060000816036C0208300 4006000000000000000000FF1883000000001C01809C01E05205A418238004018042021004004150 05008600400600E0D602608501102E040847007816B1600000009600010402704602620600600600 0000000000000000FF7C84000000083805C23801801001801825CC4222000000100C004404426006 04422640F24692600000680600604682E00600608400401601000080600502E40600610600000000 0000000000FFDBE8000000429C49811A018010018AB8898080080100004084004000000046404106 12610600400900003100000600600400400000002610000400600428613280E00E00000000000000 0000FF06070000001458919C58AB8AB0AA8558118018C000002AE2242AC4A808E28E08C00E01604E 20C0002AE3842AE38E2862AC2AC3782A83862200002AE2AC4061423B6226000000000000000000FF D18A000000401C03801C0180180182992D82B801800000228603608A02004600005644E036000000); SDR 8000 TDI (A53C84408402D4001000040010464280400009101100004000000000000000000000FFB960004112 04C808000842890510100808B10A42CA00C0248650A2A20CA402C0E28322ED0600200084A0820024 4214200208281040300A822000802002003002002000000000000000000000FF96AB000000000020 10000002022202A0A20040080100008001800010000140020800000849C282AA0004000008100002 30010080120800A00002888008000000800000000000000000000000FF8C0B010000004000200004 40000001000003014404600805001204004008000800680004004800004010018A8C400080000000 300000000000012004C0A88180800000000000000000000000FFDD89000000400400000000004152 0340000120C400C20800200004804400200002204082400B00100A8050200800800108000200C000 10000000000000040250011000000000000000000000FF6ACD000000000000400400020000100000 0402080000050080000000000000400100120000000001400C800400000000000000901281200000 02000108010100100000000000000000000000FF9CD20000004AA8AACAACAA88C904800EAA880C04 800220224A2AA06A08A28A0AA00E00618E24200100300208A2AA2ABA222AB8221422020000002AA2 323920022222AA000000000000000000FF5978000000200400401200400424000001041512004200 4004044004200044000400000480804041000C440010048050490A10040140100000004000840001 4104C004000000000000000000FF7487000000155D55B55955931811949955885A89804244440455 6406156514556304104204494000D06424517557556516556405404556000000556446446096C0D5 56000000000000000000FF0E300000000AA8AA8AACAA8B28888A08AA900800810200A2AA29224208 A28A2AA0D24C20120CA0002D28122AA2AAAAB28220A2AA2A23220000000A22120822020822AA0000 00000000000000FF0C2D000000400400000000400420002000048020008208810800011040004000 00504480310040100500900210000000408008AC00C0000000000000840002200A00000000000000 00000000FF6A760000000AA8AA8AACAA88888A8948AA814040800254622220C31C2CA2882AA00801 00C840200000210208A2AA2AA20220222222208A0000000120486522124062AA0000000000000000 00FF7344000000201A01800001802000000000088009000223000004002000602600410012000000 0000404284006000000104080014004000000000248020020028430000000000000000000000FFF5 E900000000000000000002004004C0000240C401221000881001000260060062204082404C80200A); SDR 8000 TDI (2400000860062800A004E1260A70900D601682642640E008000000000000000000FF74D100000000 1808103821808000003801851825C0420C410ECAE2A1928C904A20C428700A047480006040C00084 82703600A00000080712200010702B156846006200000000000000000000FF14A500000000190001 581184000040180180185180221044065078080A6C0028201000652A00E08000E280037A140C60A6 0121000800070424000C729700624E52E000020000000000000000FF8C4600000000184000181194 006250B845A0A800A68242708E02C286008006008292A3C946B060308A60060060021044065E6940 82A14B002100053102006406016010000000000000000000FFA00600000000182000180188000000 58A9800880800200E006044466B070AE400427084006426000306008A008A2006006006068050002 00A00000A006806596106000000000000000000000FFF1EA000000001840001801920040001951C0 1909C2800AE106C1491040E4881048080C482E80E002A2E816248231146046087108802812012402 882406001044436000020000000000000000FF6E2000000000188000B80980000200980181384180 4000640E10400004004000C0A440C2860460A000650000608000410605600010000202200005210E 000004006000000000000000000000FF0C1B00000000000000000000000000000000000000000000 00000000006006000000000000000000000000006000000000000000000000000000000000000000 000000000000000000000000FF62FE00000000100000000100000000000020100100000000000010 00806006000000000800800000000804006004000000000000001001000000000004800000000000 000000000000000000FFDFAA000000000800000802A0041200A800908B42AA00953312C020041020 01081400000202042000802002C02002002002802800002002002028802022002002002000000000 000000000000FF56171000001500040000001040005400820442100100A00000848B504094C02289 042B0810C01550400440089000000150800808000020020280200010000000000000000000000000 000000FF71FD01000000480016480088000A082810E80A08C8402A204A30282A0822128020420021 4202200900210200245A81A42A002000002022002028202403782102002000000000000000000000 FF70DB004094055830501845950332323833953855CCA0516B06556554957C04D5611704E52C506B 0004740400E80E10E40610E12828680680400008E10E216006006000000000000000000000FF35AC 0800000A800208300000200003178B02200000810080200288840081EC2A8EC46A80A8051AF1014B); SDR 8000 TDI (0006006006006000000004004004006004002006006006000000000000000000FF9F400000000018 01C00800000001801801801001800200600600600400600680680200600680600000600680600600 6806806000801004006000806006802006806006000000000000000000FF11200000000018818498 40250011A01C89A01003C80200E806246806C0884612600610640620601400E00000020623600600 6800100005404404007024022006006006000000000000000000FFE1F20000000018259049040041 05B0D801A430C1A121546D36006096006B1680E92E20F04E13650308612004E046104806B46CA002 8C3480E1220CE006002026D26026000000000000000000FF1A670000000018024098020000C00418 458000100401806026216666806206C0600E00F00000C20804600400E01E00400608200000E02E10 E00008E413716026016000000000000000000000FF4EFB00000004182008388000006048DAA18060 B008002C70060070062001264E2056086208854004D2700404120603600601032080670400408407 680206E003086000000000000000000000FF8EA800000000190004184003400C04581384000A0540 04E50E02C08E00F8964150C3205026527101096125846826C97807C2610012600748622000624A08 7006236020000000000000000000FFED0B000000001800001840040000009801D1004000C101750E 4143468C0416000202A1400600624880610408008602410608645000F02C00402510609221622A20 E200000000000000000000FF1E09000000001800001800000600043E01A8160161100442C6006000 126206403010417000445000546084486086806086202020086C4700210090795280700600E00000 0000000000000000FFC0120000000018180018404400002318698110510040294036017909018176 9864401E63E02940500268652000060060062105100961060020C504602284601680600000000000 0000000000FF66190000000218000018000000200018098050010000505006204450006006041004 004C04104C0000780402600004E80610600000600C00000100E00640E24220620000000000000000 0000FF84A700000000180810184000030020180380B0010200004006304400008027004004004144 004084006804000200046006006000006804000005806406096002146400000000000000000000FF 4A9F0000000018000059919024C0505899882858A0C001C22604600E90703645F15616600014C000 2E6186826B0000645605000002F0070068080053420060062A6000000000000000000000FF2B1100 00006018400018018520000018C1F208028081B444D600E936020487107002216008014208306027); SDR 8000 TDI (20018220880010000208300010808008080500800800000000000000000000FFA22F000000001A21 804031804003801881894005800008608600600420000000600420620600602000658C0060064200 062060004401E240600000640242400000600E000000000000000000FFA2E40000002118A1A00201 800501D21D21A822C180408A6A86C86844B1680884EA40B26A2E82E940016A04809346A070261060 002A0CA288E800286A0A856C00426006000000000000000000FFF3750200000018038B3421880003 81180D821805930000E017006C0400688628600E00608610700030690C00000E02E2164560000080 0A20600003614228600808E02E000000000000000000FFDCBE000000001A01A01001800001801E01 801801A0000060068060040000060060020060060060018060040060060068060060000000000060 00806002802000006006000000000000000000FF0EF0000000001C01804801800001901815A41101 820000604694E206906000806121006816E96000006104C16A26007006046408430002C560008470 12B1F004806006000000000000000000FF898E000000001801A00801E00001801883C01601A00180 78062261075003014062040070070061001270040010060444464860000000000060000AE02A0030 05006006000000000000000000FF9869000000001801800801808101A21801801001B04080622E08 605605002615608A0AE22E04E250206AAD0A000680600E0268402000030060288070020068068060 06000000000000000000FF3B49000000001801880809800081841D01C8902384A008E49E207A8E20 68AF6AE26E8FF2E60367202A674C0C66EE2EF0FE2860000C00000860580470420120060060060000 00000000000000FF0E08000000001A01A01800010081801803C01001D040006847536354CD054715 651410640ED460565460109000060072064C604820000280400608E008A060050068060000000000 00000000FF4B1E000000001821900A10000023C2B8A58010098A0122720600E06402E20600601430 600600600800680682600604600600600800060601401108E0801160040060060000000000000000 00FF1093000000001C41C05800000081809C0990900990004365460D68169402A602610044F116A1 70320A62802A804EC8C0565072085100048A600600680F002804007006000000000000000000FF68 860000000018018018000000238A392184112584C010601640630641601649622000622604640040 600E0065060060860260000000042060000AE086002004006006000000000000000000FF74DB0000 00001801801800000001801801801001800000600600600400000600600200600600600000600600); SDR 8000 TDI (2A8AA82180002002202001822208202414102A8000000000000000000000FF4ADF00080000000000 020400000000000020000000200000000080B00208000480000280A0008100000240240010040801 0480012800000400800000000000A8800000000000000000000000FF1F990000000AA0000AA0AC00 00000AA0AA08C0C800202A82A82A8230288AA80280082A83082A84902A80C00882802A8AA9320000 2C83202082012282C82880A02A8000000000000000000000FF89EC00000035420035415020000035 43541523540100CD0D50C00C00B10510C80D08C00C08D21440D50908910C40B08550300000048A30 C10C00CA8D50CA0C00550000000000000000000000FFED9000080040040040060000040040040064 04000081001001001001000801080501001041001801001011041021000000001000001011121000 101801000001801000000000000000000000FF73EC0008000AA0000AA0A80000000AA0AA0A80A800 202202A83602A02882E82082403002082000002A8020088300020AA88000002003001000820202A8 210A002A8000000000000000000000FF50DB000000200A00A00804A00000C00A00804A0480008828 0280A80A80200280280280A82284A400802802802882A020022A2000888822C12800C12002912002 002002000000000000000000FF44A200000020000120020000000140140120120000808080009008 0082080492092C9409009008C0004A88A2084C89100480C000820914920A009048048208AC004004 000000000000000000FFF00500000000184180180180000190180190902180000069064061060164 0412611640624E0061404060462065064260260060100802340960004CE014226106026086000000 000000000000FF2EA7000000442908C54C14904500C00D20804C84940154340300B00310214B0020 2308310324B41090348B053003013403302000421103243010003403113202802012000000000000 000000FF5F5000000024018304220410000020034820320014209614008000008100980000100809 40C40D10509000858900800808808000880800888800D80A80808A00280120000000000000000000 FF964B020000008800810800800100820820C009008200402002282002002C4012A1041020020020 4000200200220200200250200002801205200104200224200882B006000000000000000000FFFEC5 0000000018002080018000800880020200C0088000820801102018E9072C12014204180900810000 14406088240440020000300400000000230030110000840010000000000000000000FFD7D0000000 0044500A000008000010000010002200000001004003000060060010680000A0028001A802400064); SDR 8000 TDI (E006002001002406022A0000240E032116006000000000000000000000FFA8090000000010018058 0180180000180100D00D80004D61460260240200460860CA4A625632E42000600A22600042600600 400000002A510100002146106026006000000000000000000000FF705E0000000010018018018218 00005801809401802120729702602420601700600B00712702600200600008048004601600400008 01020020000A2016004016006000020000000000000000FF69070008000010418079058A89000018 05828007840015E2CE0A641C19648004600201600660601211615A2880401060064001804044FA20 A10200200E226086046000000000000000000000FF1CF40000000000818090219098420819510240 11800000600631610400014049610222600608E00002600645600000400610000000800249200000 A146424306006080000000000000000000FF54DA0008000000C000812400012000004A0020100420 54002040022040E40620801000800010000812014000622012000048000020800010010002012000 0000040000000000000000000000FFCDF90000000018010000018000880201201000900080510040 1080400A612610834000840855009012448C2062C402001000408840409004025020800810024000 8000000000000000000000FF77A700000000088880080102080410690A822C000801001001230302 0020511601034611410500002120020E210208223220200012A40220200011200200241200210004 0000000000000000FF13754008000004004004000004004004004010201220000288011088349208 20140828002000122100910000900804100100000100500100100100100000940100100000000000 0000000000FFDCA5400000000C00C00C00800D08440C00C02930804011210A5434D241344A543012 0C20421430410D340A02B0AA10341300210904301300305141300200B02301300000000000000000 0000FF79D50000000019098018018418000038CB921001028020422400400600608400C126214414 20C308406006506206006046404000414086424400004016086006006000000000000000000000FF 72E20000002002002002010004004014002012280140800800800800800044D08C088008C8800903 000AA8A2085080000414480010C800844A008042048C0A84804800000000000000000000FFDC7300 0000000800800804800800000800810801800000600600614A422002046002006006006008002002 00210200200280200004209210A000112112012032002000000000000000000000FFB20B0000000A A0000AA0A80000000AA0AA0A208680002AA2AA2AA3000C8A884030E02AA2022AA2002A8400488210); SDR 8000 TDI (5644E0005402A6146004516556006556554004000000000000000000FF23D9800000011801801000 00800180180180304980800260062060060040064A600E00640602E00808E2960460360040060160 020A0006006000046006106006000004000000000000000000FFA6280000000A988980910188D000 0AB841087099800024620640E2A608E28E1CE2260060060760002A058608E2467842AE22C0002300 0E0040000462AE01E2AE2AE000000000000000000000FF1551000000004801801829041000001925 041025808013611654600E40004600600E13610E10600401002000009604E0060040001002044040 04004006526006006000000000000000000000FF23D70000000018438C5883804000001811009001 805200602600600402600644610640642640E02000440E4260460060060840000140A612C0003360 06006006006000000000000000000000FF768C000000000801833801000000001801015149810093 68B683600420002611602ED17336A2691000400E2000060060060040000002CC0049040040464060 06006000000000000000000000FF797C000000001801081A05801800001801001203803420620630 6806046006426C0404600608E2000003000260063360060040000000060042000020960461160060 00000000000000000000FFFE6C0000000AA8AB0010A98018AA0AB8AB8A110180000460060062AE08 828E8070840060060070022A80600882AE0042AE2A80010000062AF0062AA30608E2262AEAA80000 00000000000000FFDC53000800001801003801000800001801001003802000601651613400600702 E894306A06156C000040200060000060060040000045040408000000060560860060000000000000 00000000FF80C200000015495514395100095415595510500B810030E10610655415053652E29434 E54E44E2845541165105504C65565500000001545520045504260C44CE5565500000000000000000 00FF1F640000000AB0AB8A9CAD8018AA0AB8AB093489810280F447026A064AE2AE50620505602F40 60402AA08A2AE2A83362AE2AE0000060261080002AE29650220E2AF2A8000000000000000000FF0A 2F400000000401811805801800001801431021802000624E22E00640000600602400600608601000 220002000000E00600600000620600028000600E40A006006000000000000000000000FF355F0000 000AB2AB8890A98008AA0AB8ABAE18418080546306086206088288206A4400E1860061002AA42208 82AE0042AE2AA0000060964025002AA0462022462AE2A8000000000000000000FFCE192000000000 01841805800800001801001921802000600E20E08E40600002E00400600600688000230600600608); SDR 8000 TDI (0061061000024D0000156006042084410006000000000000000000FF4FAE000000001801181C0190 A005801821801041810008E00603607452400601640640E0060860000061060004102860AE446004 00008A2A000000E006606000044016000000000000000000FFDAE300000000180380182188008180 3805905013890001662608614C2942A660619E09600E10662800610603600800600602602E000052 0080C8286006016000010004000000000000000000FF6567800000001821811A0180000B94188188 B821850040608E2164060140000AE4444060464560012D6D4E286346022006206504140006004000 826416026082B2E02E200000000000000000FFC13F8000082018A1801881800001A09A0180188180 0044612E44E2165045281460042C62A602604814624E0000160210160460420000062041002262B6 006002006804000000000000000000FFA5DF800010001E0100100180060388184580504185000060 0622604624428608604E4362AE09600103602E081D0800700F806000100006404080406016406002 100006000000000000000000FF84A0800800401943A01D01800003C81C39A694319A200471061864 1612400645E62610600E00E04090F0060972A06028660460420E000606400004690620600B090004 000000000000000000FF4494000000601802001C00000001C09C01889901804020E24E01610400C0 5600608600600602621400748200084004600600600600002C004025006C4600E015005006000000 000000000000FF076000080000B800801000022001801801A2180180000060260260042040264460 1640642640E00880740820614000680604600604010E02C000006006016004000006000000000000 000000FF9D4A000000001801201A00008001A01C01809C2580801371165060060240060060841361 0610600002E022040006004006306004108004106000126006104007004004000000000000000000 FF4DC40000005E58AB8AB8AA0800018AB8AB893889807020660605E2AE08C28E08E22445604E0260 002C608208E30E2AE2AE40E00661022630600031E2AE2242AE2A8004000000000000000000FF7601 000800001801901A04000001801811801901808040624600E10402002601600422E0260060020060 4004008600A00610600000000C216000006006326004004004000000000000000000FFB9D5000000 0018AB8AB8AA1220018AB8AB8C1903801048E0CE0862AC2CC2AE01632408609628600020604028E2 062AE2AE0A600200032C24E0002062AE22E2AC2A8004000000000000000000FF0F27000000355955 04DA28150001955905951025804011611612642E5105162064D610630E50602455600E5104160465); SDR 8000 TDI (0000001000000000800010000000000000000000000000000000FF0A660000000000803840002000 0210001012C05040000000008400416C0130010629820081040000000000288000000000080000C0 0000080000660000628800000000000000000000000000FF9B151100000002000004020004002000 00000000002002002000000020000044000040042040851080000040004014800000008000000800 0201000000120108008000000000000000000000FFDC3900000020004C0000000000000000000000 2401001101105400000000400000001301001000000000D002080820080080002000010008800000 0000010040220000000000000000000000FFAA3D8000000AA8808AACA88000AACAAEAA8AA8998000 20620640E2AA0AA28A1CE2AA00600E0760002AA20208A2C24022AA2AA20A0002222220982ABAAA21 22038C22AA000000000000000000FF5D0E8008004004000002000000014010010500480000020000 2400500000044A000400040002800100544000102011100500400100050001440000480400091502 0110000000000000000000FFD033800000755D4D9559518005559559559558250140154114124556 15655420455610430450410955644E537C0613755755630600055644E201556556526416A0655600 0000000000000000FFB6080000000AA8B282A8AC8000AA8AA8AA880902814048A0CA0823022AA2AA 0122AA0820922820C02AB08A2AA2120422AA2AA41200004A2220002AB2AA2AA20220222200000000 0000000000FFD5ED1080000002000004040000004000000001000000400240008000400000010000 2280300004010001000000880010010000308000001000800000000008A008800000000000000000 0000FF9B200000000AAC009808A88000AA8AA8AA88488800002006000182022AA288088204450048 0204002AA02208A30240A2AA2AA1420002023001C02AA2AA2022C039200A000000000000000000FF 1DF10000002018458044018000000000000040240020130110540008004006000000130100100142 000010046004440000000010000020110002000000010000024400000000000000000000FF96A580 000000011003000200000000000002800001000000200000A00060264400A8400420408400000480 4060C81000000005400001100202400000000C00480080A0000000000000000000FFD20800000020 1A01801241802109941841801001880000602E4862040140800C60CC00602600641010E226046140 04400600622C02008A00011040620E002004084026200000000000000000FF8CCE00000060182581 1C01808001805901915005840028E50604600402444020600410E0163560404260162800002860CE); SDR 8000 TDI (3644E0260460C0002427046486206000000000000000000000FF092E0080000000079010C1800800 2899828818C984800D404240E04600010E29816E80C0A68000200261064078864060468845C64160 0624C00090400208E006104000000000000000000000FFBB93000000000001A01801A01800005820 20180180002240A2E044064004474200462441169080808460066000160060060061460060064140 0069E802E06126006000000000000000000000FFFABA010000000503841A81801900249A40103B21 A2C2AAE31600300E800000024B0508404640628840E506100106B060471060174170460240A08064 20002026206000000000000000000000FF4A4800000000000988000100180008189202180B900200 604611200601010811400C21400605004008600E0160060000060440060460060060000860001522 06002000000000000000000000FF687F000000000000000000000000000000000000000000000000 00000000060000000000000000000000000060060000000000000000000000000000000000000000 00000000000000000000FFB76D000000000000400001000000000200000001200000000480000000 00060000000000008040000008000060060000000000008008000000008008008000000000000000 00000000000000FFB320000000000000808820802C044C080C242850800082300200200202210081 100080200A0020410020028020020020020420020020028042800220020020020020000000000000 00000000FF73530400000000000000000000080100010800000800A100800840A1091C4892014011 0040440512200808A01910020530000048400000000022A000100000040000000000000000000000 00FF63520000000000009048048008000248008008008560022C13642002402002802C0240200220 200000200221208A00228A7A2003002002802280003E03462002102000000000000000000000FF48 49000110000155A0B8A5821A10623F55A539558C0053685734515600C4D451695602612614C1488C 70060060060160060A600700EA0680E00023628F227206006000000000000000000000FF5D8C0200 0000000150802240200E11B0033210002A81A086880840805C82240A04A12884390002A961450CD1 900006102400003C005000904120800808010004580000040000000000000000FFD5550000880000 52814902800808400D44800912800042AC320A30CA02700288E886002802026080D0320200300202 A80204200A01220200A080012282802202282000020000000000000000FF72E10000000000000000 200200000AA0102840203200080000200000010D10200000000C2909003003010080000000000000); SDR 8000 TDI (040004002006016106006106004006000000000000000000FFBDEE000000040401810041815E3400 1A43029001C100A1724E44E8A641620640E4068964560462C4807106A0640601422E00608629440F A2A04408681680E006084106000000000000000000FF222200000002044188590100180850581980 98105C20147A0008289692600680682426600402280408600620620600420620400628680E80E000 00460E40E006404000000000000000000000FFCFF7000000000021A0780192B820483933E21A0400 410B600800020E08660600200408680C08236500680600010411600610650700E404006004814006 206116104000000000000000000000FF216F0000400000058118C5801804021801A0395545044160 C022802641788E22829400DA4700209402628700600600E14E0070C6046C06244024888906006106 304080000000000000000000FFBED5000000000005801C018018000018218A99310805127108A094 06826006044014CCC20E88320020E00E80040C00628600482602E00C004200000106026206004020 000000000000000000FF836D000000000605801A01841E00041F0080189448820A648484E0040423 164461468060044D200404600600640E08E28640600604640E02400080480600788E004000000000 000000000000FFDF56000000000001801801C2181822B85084380000C200620542406D0820EEA038 B600602522A5488362860601060060062060469960268A446000600604E006124000000000000000 000000FF818A000000000001803C0148180000B801E93C41200400E00C8044148808060010065344 5400280C206516006007004006086286006044104004014106016206046040000000000000000000 FF208300000008024D801805801E00001801A51801000184600411411401004600408603404C1022 0C006106021006006206206306006004006004006006046006006800000000000000000000FFFFFF 0180000024219218C986780018991D8ABA9A988058620A40E64C20A10620684AC06004886020506A 0641600E00631600E016007006046611304046984806025000000000000000000000FF34C1000000 002001841B0910184C609801903CC2C48001654A00580420240FCD600A0862842060218074060010 3620402603602628E016006080420006207006346000000000000000000000FF4C35000000080009 801805881832001A04801800A000C060879008858032308A20014CE4AE2072082860060280460060 9642601690780E006089026827446006204000000000000000000000FF7979000000000509D41A01 8011000458088238228C4000E40E10020C20A540002D000A600ED4041130E29608E00E5060260460); SDR 8000 TDI (6A0AA24800824888A0AA4EAA7206000000000000000000FF57EC0200000002038C9881801803883A 03C230D1C80000600629600650630E28F94620400700600024642E00000820611608630622614210 C02821240214708600E016000000000000000000FFADA1000000000001801A01A01A01801801A010 01E00000600680600600600600600680400600600000600600780600600600600680600200400000 2002806806004006000000000000000000FFC889000000000001905C01C018014118014020058042 806016243000A06049006006A8E90680600080605607E006026816880846044802106000146C0680 F026A06006000000000000000000FFA634000000000001E01901809A010298010806118003006006 82208100E00024609600711702604124601600040000700700500680511380628802600600600701 4006000000000000000000FF3872000000000401800201A01A016038830111459002526536103230 0A64A609644604624620E29008E0262000204082A600600600800240204080680600600680602600 0000000000000000FF8857000000000001801801809801015EA712F0E180822EE2A720A2886AE20E AAEAAF3BE22E02E2E023E2C66862A72DA6C602E00601500300251024680701604641404600000000 0000000000FF6147000000000001A018818118010218810083159000C86D56326D5094ED56D5734E 244556257B144C601602822040610608600600611040204400600600600600600600000000000000 0000FF60EF000000000009904021831AA34218192C18098A40846C06186820806886806006004006 08600400600600600602400660400E006080700004006406086806806006000000000000000000FF 3A15000000000001A01C01A01841001AA110B203C0000061568160105060B632620E88E0568462A0 0062B612842088E406008006040806800000C07006886006004006000000000000000000FF4B2600 00000000118018218218830298050011518B1030E00622654002E40600E126246306116000456006 40608624609604002E000086000004126006006006004006000000000000000000FFAD9000000000 00018018018018010018010018018000006006002006006006006006004006006000006006000000 006006004006006004004000006006004006004006000000000000000000FF3322000000000001A0 1801A01801401C010018018010006006002806806006006807004006806000806006806006006006 004006006006004005007007004006004006000000000000000000FFF28A00002000000588180584 180104180120352380208061068864060461160460D620700610600C146206000000006086406046); SDR 8000 TDI (A82A82004002282802A8208000000000000000000000FF109500000000055433420220420035448C 5543520040C10D40288448D50510C40C90D40CB0800800D50550911550891550AA8D50550C088D0C 41500C90C50D50410000000000000000000000FFE25900080000000040840054A000400610600400 01010011000010010810011010010010012010100010012008010900010000010010000010090910 01048001040000000000000000000000FFF9620008000002AA0001480000000AA0C00AA0AA008824 02A00602202002E82802002082004000602A82A84A82A8440AA82202A82A80404000000302001802 A8180000000000000000000000FF8BB3000000000000A54A02A14A00C00808800A00800282280AC0 280A812802842802902802822800802802A0200283200288300200282A842800C0290280A8028020 02000000000000000000FF28530000000000013003412C100140104200120000429088008948808C 0804808950840948488800804804800804C80804814005000C84C94C20910848C40804A300040000 00000000000000FFBCD30000000002018A180180584190194D801001804805600600E10644600414 600644621610600014600600E004106106486C0601642C00612030E20600600640E0060000000000 00000000FF1F5F000000000000C048548C0C04C00E00B2AC00880910300B34304310210B00B53310 3123A5313020B48334203324A00200A0034430024030110031234D21130A32020000000000000000 00FF7EE902000000048020026124000C200484000200000282088024094080001010040080082900 0841408000D40848C000A0C25280A18AE8404800B20880800000A00000000000000000000000FFD8 33000000000400940A0CD0980200081AC80800800209202211400214230000205200200220210300 200A00200000300290900A00240280000A40A002002016002006000000000000000000FF5CE00000 0000002002E00002408000800020902800020002014202000010870211200004404482800F120001 60062109000100200C0010888050000008241320184208000000000000000000FF693D0000000000 02080280202220002140042080100220801800800008900E2582004800101000100005200078961A 0208200000420000020100010000519000478000000000000000000000FFE97E0000000002018000 118018411818011340038AC01460060840AE60600008608634418603600030600608E00604080608 2C060060022060200047400A208E006406000000000000000000FF0559000000000141A0582982B9 51411B09311A058480D36B36824AD680E800846A06904936A2ED009170068881008A2426A5405691); SDR 8000 TDI (046000106004004006006410080000200000000000FF27EE0008000000018018050018830238098A 38898A0034E20E2AA00811640802628600440608E01009608E1C84001461C602000610008A106060 036444096182106048010000000000000000FF727B00000000000180000104985580980180381184 000062260024A00060B442E55608C0061461401261164161260060160C600600010200E480026014 306002006000000000000000000000FFCAE700080000000000002203000001008200000000001400 C0000240130546208028140408020330010200026346320010300000120200130300110428408000 000220090000000000000000FF7C1600000009002400000400000014800008000415400C00101000 100500B60105301202104D048010450054E116204200024488110008440200008020110000100000 000000000000000000FF57D70000000020008208208208508008AA802480000120100022E1052802 0130100041312100000006204240201000206200210200000200A008282002002002102000000000 400000000000FF0BBD40080000040400040040040040040142002C01001082A10013800010000900 50608010051009001008001200009001001001001201011001400000001001001000000000000000 000000FF6644400000000440800C44C00C00D50C04C04828840220A14B08B20248314210200200A4 420031091434022B348A20320302308B08900B04341100200208B003003000000000000000000000 FFE8560000001120018218018218018018B1941881082202420424401403440E4042840A60042842 0000609600600400E046006206000204206000116046006006086000000000000000000000FF7A79 0000000000013082002D000040122120122400008008100C4804880844CC8908800800C888100010 04820004800804800004800804000C08814800820800844000000000000000000000FF5747000000 00020082080080280080080480081180400060460020020160020060060020060260000020022020 0233200200280200000200200020211211200220A000000000000000000000FF90C80000000000AA 0460AA0002000AA0880AA08080802AA292B182A82322884023222A82AA002000AA82A80C8AA80012 A82A92A82A82A82A80000E03202012A8180000000000000000000000FF5275000800000000000010 15000000000000000001000800090010800010001080200080001500000010000200000000000000 00000080000000020020000001020000000000000000000000FF04360000000004AA1000AA000400 0AA0A20AA0D200202A82412202A82202A80482282A82A8150000AA82A80892A82202A82A82A82A82); SDR 8000 TDI (60002AE3262060442AE000000000000000000000FF18B90000000000019218050218A18018018810 01800A01601604004E01602208E14605613610628401000600040000200632600600000440C08400 601600E406006000000000000000000000FF6C0E00000000000180580111381100180182D8018048 0060062101060060064262061042064360000040064460260300060140060004AC14624000610614 60CE006000000000000000000000FF899300000000000183180120180580180190A4C3C04000E02E 10090702E00200ECAE00412EB4F08000400624000000000614800620814409481000608602700600 7000000000000000000000FF37D40000000000019018018018C90018018218098080A46A06816008 286026AA600600640600600000000600642609000640600612001484600001601611600600600000 0000000000000000FFFD020000000000AB8138AB8AB8018AB8AB801901C10048658632422004628A 4460062AE8060170082A82AE0880883662AF0062AE0002063170002A62262072AE2AE2A800000000 0000000000FF508E000800000001835801801801001805911225A00000E407014090D0600600700E 04520700680000400624604640000601200601004020502005610602E80608680000000000000000 0000FFC894000000000155843B559558CD955B5588904B80000C602740454820651200644655454E 50600C5545565105304065564AE556108482C040044364CE496556556550000000000000000000FF CAA50000000000AB9018ABCAB8B18AB8C980489180C8AA68AE28722600E2AE90E126306026136420 2AA2AE08E28E0AE2AE0A62AE2802908AE00230620E2822AE20E2A8000000000000000000FFBF6D40 0000000001901801801801801801824801802801600E02C00608E02209608E006006046100002006 020000008006006006220048046008086006042006006000000000000000000000FF65E900000000 00AB821AAB8AB88D8ABA818418018002006006A482A004628846640623E11640E2002AA2AE088088 0062AE4002AE24800A80602028624622A2AE0462A8000000000000000000FF3B7F20000000000191 1801801805801803820801C02240E3061000080060440060C6006306006800002006246426040007 010006000402056800026106003006056000000000000000000000FFDF4600000000000180480100 182180183190B8B580820A60360460062CE00631641608404E346020006006006006312006546006 1200C048600000E054084006286000000000000000000000FFFACC00000000000180184100190184 39158A1D01880320F10E2AC00F04600308700622509700E40000642600001040200620608604040A); SDR 8000 TDI (0027600E00E3A6004000000000000000000000FF3501000000000201801801809821C09800201805 830448E0060222AC00600C20622600628E5264100C60B602605602712620700250622C0002900104 06306007016228100000000000000000FFEBCD800000008005840401801909801852049803904034 633640210C0061142260064564260A6480A8F0162100100163161064C642601400000040004614E0 06044000000000000000000000FF0215800000110005821C11E018038018048208418A2003600E24 20865064240064060063060A630000E30620810010E2064873220560060001001020024038970078 00000000000000000000FF8A7E800000020281801C2B801903C99910C04A09800050E94602225429 E33458E006196087006000D068960260B6067116206806C0E01600008008220625300E0440000000 00000000000000FF30A5000000020481801823801811C81821E8920D801000620608A40400600403 602622404E00E0050070060402400070060000100000842080044324261068060020000000000000 00000000FFE3C0000800000201809C01801001C0180181300180C000680615210400624442620600 42064361108268060262060360060130000001340002080000060960160020000000000000000000 00FF6FD6000000000001844001801801801801921001801801601600204E01600408E10600613710 640410E006400000006806326005004004000084002006006126004000000000000000000000FFF1 F50000000000AB8C18AB8AB8AB8AB8AB9410AB80002A67E62022543E608C00606E2AE00600600020 62AE08E0EE2D62AE0162AC0042442A85002A82AE2262162AC000000000000000000000FF229F0000 000000019038210038A18018018A805581105462B610204A0A604000641600401600600400600600 000042C00600E00400600642028400000600600E004000000000000000000000FFFA1B0000000000 AB8138AB8AB8AB8AB8AB812055804054E01628220000E28C0264962AC0962862902A62AE2AE28E40 62AE0842AC0062062A80102A82AC2A62062AC000000000000000000000FF10420010000001558219 1589181195595580200180520160064525020165100C612655632650E20455655655053008655632 6554006536008044550454556506554000000000000000000000FF18028000000000018800010018 01801801800081810200600604A10020604430E00600644603600001600600600610400644600400 610E00000000000400E126004000000000000000000000FF07170000000000AB8198A90410070AB8 AB8019AB808A2A62A60822066A628E41600E2060060461602A02AE08E08E2822AE0062AE00000410); SDR 8000 TDI (090028000000110000000000000000000000FF14ED08000000000000040000020000000001400000 06010010000000010000088140000130100400000000000000000001320880080108000000000000 130800420000000000000000000000FF040B8000000004AA800CAA8AA8AAEAA888EA09AB80022A62 A6323AA26A60AA41600E2AA0060460002AA2AA28A08A2ABAAA0020020022320000002226822032AA 002000000000000000000000FFB6A90008000004010A410010000140120100408000020000000840 402000003080000C0440030501005004400404801004C41004010044000001000410030005100000 000000000000000000FF114A000000000155911955955D55B55B5111580100000140044464D60145 560C412455632450C481557D56136514556D5732705544E5460005005460D64C6556356000000000 000000000000FF376F0000000000AA80082A8428AA8AA8828A8854800054A01222211200A2AA0224 9220A0922820002AA2AA0AA08B2CA2AA88222A2C220A00028142A0224022AA012000000000000000 000000FF986708000000040002400000000000000304005400005402B00080000A00000004100000 10000001000000400020000000008A80080000000000008000010001000000000000000000000000 FF1EEB0000000000AA8108008308AA8AA8D08A88AA00002A07E02344023E02AA0000682020000000 002AA2AA08A0C80222AA0123222223000000001021021022AE46A000000000000000000000FF05A1 00000000000000A00110000000002800500000000100100000840100040881000901301000000000 00446006010000B26004004128000000000240028000000000000000000000000000FFF49D800000 00000012013200C00000000200000000000000000904280000064202000202004305000000000064 264800000100880900000004802A8110300000480000000000000000000000FF0B6F000000000001 800081001841841801909895850049601604410420600420608600410621600004610E00E0160240 06820000280020000000456006416446006000080000000000000000FF39F6000008000001801821 955883805881825841880004630610402C11633408624611405608604050E0460203004860264061 04004208548080004496104106412410000000000000000000FFE5B90000000000018018218A3893 913885800821880002628600440624E20408608666C40604653000E0060082C00865061860000060 00028410006086006006206040000000000000000000FF0A0F0000081000018018810018098A1903 9AE8C9840000600E1940440A60A400644608403601E0802064060064063042060260940061006900); SDR 8000 TDI (4940506011006006000000000000000000FFE1FB100000010151C05C018018118119202012918142 C0E090CD2D03400886042C2408603600643031620614083003600644E40608600600200901400800 688400E006000000000000000000FF0DBB0000000000018898000818018018088150018002106040 00200A0C803608200400600644600000600600E00620400008411600E00634200010600000600440 6006000000000000000000FF6CFF0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000600600000000000000000000000000000000000000000000 0000000000000000FFC3C10000000004000004000010000000002002000000804000000000004000 80000100000000000000000000680600000080000080000080000080000000100080000000000000 0000000000FFAFAE000000000000800800800848CA0A20800850A8A004A842A02A0304A90200A002 02A002B0280000200200200000200200200200200200200000500300600400600200000000000000 0000FF67C90020000002210000041501000003140000820202200D04940840280A10401230280110 810B11010008000880000508000000001000800340000040880020800000000000000000000000FF 5667010000000180800840808800824800800E00800300288201200202A00236B103022402002041 00200207A002002003782003003002002000182002002022002002000000000000000000FFD4A005 0144114541905B11155C45A33955B45853F5044D65554550D489450684E056406516496000006006 0460040060062A62A621620642C0804AEA05027886006006000000000000000000FF654600200000 00310010470A00901036A80101800A412280040A80206440C850072828020904C2E910C40D1010C5 4002888010040040040042A0004064084804404004000000000000000000FF37290280C408C0A090 4D088ACC42810890944A28AD00822D0A4360CF00340282280A206486822000882002842842A02002 04280200A202202000002803002082002002000000000000000000FFF2C200000060000800020000 00081220242000040040400040000000A808C0810900000000000040000200000000000000800541 801800830100000C20020001A00000000000000000000000FF40F901000000020000006200005010 00042080D40140088440C00C00128400380320010108788000000000080000000000280000200000 8000012A8000000000000000000000000000000000FF3BF30000000004000B200000000000004200 00000002000000090008000200420200000200430080801000040440000000010228C30000000480); SDR 8000 TDI (0702E865096006000000000000000000FF0EB2100000208221C01C29A49C01A0980DA81A08D44201 93B8266003022346AA280508600E80600708624E00000090E10600620698650F80C0866020860061 1401E006000000000000000000FF50C00000000004018838008038139418A5003C20909102000308 E21649700E80A3540279478C60C020E1060164060860068270860561065260000550560061140470 46000000000000000000FFA736020000000001829800A81C21C01C41D138048000C210422860064D 6C160128A50060260A622400708650000021602E246A8E40E02E00400C00480F4068040060060000 00000000000000FF737B000000000001801820821841201A00201809805013401700180409214091 290210600600602040EA062060060860168060160D6056006148800006A060080060060000000000 00000000FF32A6100000000201A51A2080198180181D931AADB4000850445401BC8420100A204208 700604600CA2E3060000780161464044060260068860A5C040160060000168060000000000000000 00FFE328020000000001801800881801801820C230A1A010404904004044403A0102200200604610 6408046026086007204004846106406306100000801002806880006806000000000000000000FF07 EE08008000200184D800A41B05891800815801A02004C20582408C002800802A1240600600612C00 E006108001816046446046506006800004056202286800006006000000000000000000FF01560000 8000000BB03CA1811A81803AB13C2CFF85801A21063946809081C002490CAB644604E00882760600 760600600608600603600720A00042F182006046006006000000000000000000FFC2630000000000 0B8018B5B05041843D25800881880000201420584102C400C5400514610E10E2010C608600000000 400D10790604620E43200010600200601408E206000000000000000000FF1FC6080000002201D01C 098D1A218C9803011A01B20400F50881084012422000CC04006A8E8862A010708611100000E02E44 40A6506006022000107003006044897006000000000000000000FF3694100000010141C118008018 01801901A0BA09820148604849010009410002408408604600600800E40601600E2260271164AF08 709631201089600A207104216006000000000000000000FF85E20000000000098D1A0588580D8098 1A041881C0C000A00606201EA2022660210403604626E20021600602680600600622600601741682 2000C044A0586018006406000000000000000000FF0DDA000000000201803800801A018018248018 01042000208400220600040EC8232404700F01602008600608002080E04680604680E11701200006); SDR 8000 TDI (006802006000000000000000000000FF23C500000000001180114480100155390584100180428020 0C887006800040204086807006040000906C06607046806806222006602046002000A27094046004 006000000000000000000000FF919B000000000601A00001A01601801801A01A41C02240212500E0 0620014000C427026036A00401047026000041006006802207802C06000000006205006884006000 000000000000000000FF010D000000000301001802801809401B0D801B0190800200062460D6050A 1094401650F48702808848E48613040000E10E012106092806802080006804A26004806000000000 000000000000FFACCE000000000000200C05A01C93401829A098A980808032AC48EBAEAA008022C3 AE28E2A62883A822640E0AEA0E03FA3700350F08888E000101006404646104006000000000000000 000000FF5370000000000080801800801C00405D15A0194191244460D515605645455434CC56D564 D64364145560C6B50420006106232006317406002004226102006007006800000000000000000000 FF437C0000000001A08078448099048038058538038A102AE80420640600D20C88100600600E8060 00006086016006086046E1AA0600000608A0001E200200E806006000000000000000000000FFFE23 000000000440000A00801801151931C01D4CC30051654E506106A344B450C056A064962060443262 8E9204200A6C0600200EA8E00E80C00480280F40E006007000000000000000000000FFD329000000 000008000900009801803801805800885004600400E04E0840040444860960461564900060064060 0E00E0060024060000C6104000002006026006006000000000000000000000FF5252000000000001 80080000180100180180180180000020020060060060060040060060060000040060060000000060 04006006006006004004002002006004006000000000000000000000FF23CC000000000401800800 001801801801801A0180100020000060068068068040060060060040020068060068068068070060 06003006004002002002006007006000000000000000000000FF019A000000400000202800A01805 401A23825811A20280090200600600200244510600600682E00420600E0280000160060460071060 06004104C0602E046006006000000000000000000000FF102E000000010020000C30035849949A09 C818A3B15208221104E546D5222211401625714E48414008EC860068060868048062060480975540 0002E10701610E126020000000000000000000FF0811000000000181D01C01A21821801901021882 82336D00435060B200303600244430E00620E0040060060264060040047841060070060060000020); SDR 8000 TDI (1150001000000000000000000000FFF81F0008000002AA0AA0000521240AA00402200800002A0120 2302202A02302202202A82A82A80002A82A80880880002000602A82A82A80081000802202A82802A 82A8000000000000000000FFB0AF000000000000A00AB0A20C02C00AB0B00C80800280240290A902 80280A102802802802803081003002A432028CA83280280280280312288084288A80280280200000 0000000000000000FF516C0000000000000002033103100012052092220142810088800009014884 808910800000800C01005004801044A04880C88804000804C04A0020C80500485000480000000000 0000000000FFDC34000000000201921821021803B0181182900B810200E216106206104104096016 02605601600840640600601441604644600683608614C0109040CC40600E02600000000000000000 0000FF4259040000010510E0C914D00D40C00D44C84D4090034838A32238D222A413223403103A03 28340000300335350300320B1124C300204B40300125300300B342A02008000000000000000000FF A98502000001051040040A3883004002003042020000801008500068810800A08810021030110800 800800838880890800818000819040828800804908820C40085010000000000000000000FF28F504 0000000088804C048208008A280080191488002121E20A201288200210200200200200A280002002 00210000A002202802002802412000402042006002802000000000000000000000FF8C5D00000000 00200400700400410001C40CB040000000040480940036041001008104020160401800808808621E 0200101410002401A8000000300004208120808000000000000000000000FFB44B0000000800021A 00800000060000280000000000080010000000401B084000001804400200014006206064066004C8 400B400808100400000F8090490200A20080000000000000000000FF644A00000000000181B90080 2828101811A11081910252A20404630600A02206440600E006080400806006146006806224000426 026206382018806020006096446000000000000000000000FF77E9020000100234A49B45A48A084A 3C31805A838002802A3482E82EA8A412C44806946826A0880001702ECA941020E816800406A06006 8028103488012C6A06456000000000000000000000FF9942000000000101885808882824001B0188 900168002A808708620704604601610600E4070A02880063060000801264C640804614A34E2CA000 000128017122086080000000000000000000FFA9D4000000000000800800800800001A01801A0100 00002004006006006007806006006006000002006006006006006004800006000006000002800801); SDR 8000 TDI (04144000000000000000000000FF553400080008000000000001405000200A140040122000800804 80101080901101000080001000801000200062462200A00001404002001001081400100000A02000 00000000000000000000FFD520000000000040008084040000000022002040000023400844855050 440043002002040031008030015002E0060402081004004A01400100000800000100001000000000 00000000000000FFFEBB00000000000982082080080488A88883880E092010228300140002200200 108168104040200003200278210821A01200202204A21201200000A38A5724021420000100000000 00000000FFAFE5400800400410400400400400400540480401028000113400000104908908000000 00A14010010092000412210800706610810010096010210010010050010010000000000000000000 00FF78DC400000400440C40C02C20C00C02C04CCCC008A0040B04205230300B08B44208214210311 30031434D2503423122002003003143503003023103503003003083000000000000000000000FFBD 5C00000000000181192100180191180980182B814002620420402C28620608E04440424400610041 6006016014416406086346416034016000016014056006006000000000000000000000FFBACA0000 0000020120024920020140120421220100208A0814850848A5080080480880080000088200500480 1025000D00800000000804844902928044804808000800000000000000000000FFAC8D0000000000 008008848008008008C8800840810000A0A208600608210A10210600600600200080200240220200 2052002002002002112200402902002142002000000000000000000000FF8A5A0000002000AA0AA0 004AA0AA0AA0500A008A00002502003022830012202282222AA2AAAA80012A82A80E80882A80102A 82A8AA92A82501001412082A8200AA82A8000000000000000000FF32430008000000000004B00040 200000C0042000004801000000000000010081010000000000048000000040000010000020000000 0000308000488080000220000000000000000000000000FFFA4D0000002000AA0AA02A0AA0AA0AA0 820920C800A02002082482484082A02202202A82A92A80802A82A82884A82A82202A82A92A82A820 04000082502A8200AA82A8000000000000000000FFF8EF0000000005543540042802103542103082 CC0080D41230CC0CC8D48C40540C50D50D50D50800D50D50950B30A48B30890D50D50D50820C0084 0C49550890D50550000000000000000000FF2D920008000004004005000004004004004404040001 0818A100108012000991110900100000100200100100100100110100000000000110100340010100); SDR 8000 TDI (006000000000000000000000FF8B0900000000020580188880502B80180100180581000161101261 46006086024026C2ED0E20680400600620042000400400600622A004056B042840D5007012006000 000000000000000000FFB2410000000000C98B1804801801801801200841A0100000062162160D40 0E50E29608602603250000600600600600600610E000106006106000856004006002806000000000 000000000000FFEE8A0000000001018438208A98818AB8AB0AA8D980222A12248468062063224069 061060060830042AE2AE0E80882AE2AE2262A80462AE2070040063072AE2A22AE000000000000000 000000FF9CFD000800000005801804841001801801C4080180A204000400600610410610C8060060 0600080000600604600600610600E006092004086800084010806C24006000000000000000000000 FF85A600000000004190180091191195595515590180024CE5443163564444360242162163060125 0455655651011055655655655650E5504D6484944442556494D56000000000000000000000FF0029 0000000004B18818898958918AB8AB08D8A3C00000A3570B732622622A22603708680614E4002AE2 AE28E4AE2AE2062262AC2022AA24E00082E2A02AE00AAAE000000000000000000000FF52E5400000 0004138138AB823823801801801E05814000001400600610E00609604602602E3440000060060002 4000600600600000600200600040E008006026006000000000000000000000FF055D000000000081 8DC8408810458AB8AB001891800072202040601623622620650E45E57E4861002AE2AE0A80882AE0 5E32E2AC0402AA006500C062AA2AE322AAE000000000000000000000FF9DA6200000000211802903 83180980180101380180800970080060861061160060060260060368000060060060460064060060 040AA002046A00096003006006006000000000000000000000FFFD040000000000438210488048A3 80180112102B80400024864D62360120021545265063062023000060064062060040C41060064020 0250E10024600000610A004000000000000000000000FFFAC7000000080009805840801805911811 8A1001842009028500710604412210524731700600202000E0460C01004260A600600640600A04E0 00446082206244004000008000000000000000FFAF4F0008000000098039A09950018AD801807045 00002022B20464B612023660422E08618E00A1282260060200080166161820060004020260602060 32006004404180180000000000000000FF8898000000000001801000001829841803011001090040 602200E04600A4060140960060362900102C60064064560040040041260200020860900860420AE1); SDR 8000 TDI (6006000000000000000000FFFE51800000041810801009801001D05925E09811000248380010624E 04020620022604620E00600190613648008980600400210000F80600402000400784400200600600 0000000000000000FFAC58800800003A00C01801C41081AFB8038C180D12C120A5424E6006C281C6 008006D2682764641080748625644601601601283082700601C01801404681400700700600000000 0000000000FFC024000000003841249801A01484801C00901820830080C01600600680C00815400E 00E12700E0040078060000000860C62A304024680E0A400400300628400300600600000000000000 0000FF0E8E000800001801021881889000A0180182D80081102A400010600E0840A000423685740E 02E001006006006046006004207011126086004000002147004210006006000000000000000000FF B3DF000000001C0101584584500180180088180080000000B020E2A6044200002006306126806004 006006440000006006122300016416006004002016002127006806000000000000000000FF0AD200 00000018AB09195D8010AB0AB8AA9018AA813000820007640621C1082AA5C60060062860042AE2AE 08E28E2AE2AE00A0206460262AE0002AA3062AA0062AE006000000000000000000FF084E00080000 18018010A1051000801882801821800005430E02E00642E1460242A6106006046006006006420020 00608600200022628600600400200E00620000E006000000000000000000FF884C0000000018AB88 30010A10AA8AB8AA80D8AB80500D428E08600E4860362AC00610628E2560002AE2AE0AE4CE2AE2AE 2220880862C62AE0002AA2162AE0882AE006000000000000000000FFF95300000000195595380B90 5155955850955911812030004010609610241241000622651651600455655611051025640612A430 00E036556004226546552130546006000000000000000000FFDB5880000000180184180181300080 1800841801800040004620612604240000000E44E02608600200600640600600600410A240016016 006002006026002420006006000000000000000000FF0DE80000000000AB8018088018AB8AB80308 88A5802000E08242644622E2043260960160460000002AE2AE28E08E30407442E3041020A62AE002 13600C2AE002226000000000000000000000FFF8570000000000019138A08C380180180104380381 0000024020E0A600608C00600630612608A0040060060004000060865060A040640400600440C404 00601210E000000000000000000000FF4B7C0000000000018418048110018018B100081180122A60 0810640E08604611423605640E2460000060060460260B640E00600E0CA00E0060001061240062A2); SDR 8000 TDI (AA000000000000000000FFFDEA800800001200004000041200401000040000000100051020032100 C0440040084480200040028048040200040040880000000040048443020000050242100040000000 00000000000000FF6C59908000555951D0B903915835D5584B913911800045628E104094D4C43450 400422451555600055755655651555655623600155655644E00054655641600E5565560000000000 00000000FFDD6D0000000AAAA8888892902CD08AA8AA88A8AA80002B200208200A22210A2B200210 228A2AA0812AAAAA28A28A2AA2422B20002AA2AAA8A0002022AA2800422AA2B20000000000000000 00FF894400000000000202004002000040008000000401010000200280000001000202A010000000 02800000000000200000000800000000001002000000009242C0000000000000000000000000FF03 370000000AA88C8408C081000C8AA8AA88888881602A204A0700003224022025C00000002AA0002A A2AA0AA0C82AA0222220002AA2AA2002003D22AA2101022AE222000000000000000000FF9FF20000 0000004208500002800000000100200000800041042080A010800400000030012000000000000000 6006000000000000000000000000050000008100000010000000000000000000FF73ED8000000000 0004802A1020A400000004002200000104201004080003300A823005040800008000000040624600 02900900000000000C81000000000C0428000080000000000000000000FF20C20000000C18119019 0180508594980980808180A02265260CE04625250000E02E0160060C60000A600610651640602400 030000620E040000016556124002106004000000020000000000FFA9740000040018818098219490 09801801904001840010600240640E1020004C630614648641604041604622002004651604002800 604600802020600620C006406004080000000000000000FF08E10000020018018018058A80898258 4584001D92A009600000610600601000600640E0060060122060060002A802600610002000602600 8022186006000006246064080000000000000000FF16AD0000000018898818B18020018898418080 83800022E62208622608E21844E4B639630607600A00E04614611610610654001040601616000201 6286190006086004000000000000000000FFB2628000000C18008080048010038058338A38010802 0020862360964200864C220E0260873160201468463260064065360C228800641600400041602E23 4002826006000000040000000000FF47D5800000021828850000841A05A01A818298430840102152 40643620042610204640641600641010621600844001603600B08001600600404000682622400600); SDR 8000 TDI (000000000000000000FF6CFF00000000000000000000000000000000000000000000000000000000 00000000000000000000000000006006000000000000000000000000000000000000000000000000 000000000000FF93FB00000000000140020120000040000000000100000050040040000040048040 04000000004000000000006006800000000000000000004800004000800001000000000000000000 000000FF769F000000000002820800800802000A00A4B400A22010200210200A0032022221230024 020920880020020020000020020020020020020022A1002082002800002002000000000000000000 FFD08C10802000010801001003240000809008024020814004A80114005000C0010408A101280412 40000400440150000550000000010000000808000000800200000000000000000000000000FF4DAB 000000000008C20E00802C00840C00E088189A218920020430020C20121028020022028830800020 0281202B0022AA002802002002002080802002003202002002000000000000000000FFB854040000 100001941801D05805A0980594584B8040504854154556546D3412430700448E0D64124060060060 0D04700702608720600622600080E00E006006806006000000000000000000FF5203088020000080 00D00802815302C0980811204180A4472C0282000208AC0AC2A87000A84202200442046011848000 0000400001C400010008400485000005400040400000000000000000FF6BC2040000080000940A00 A00802810804A42800A0005020821060A242250B002C02006402812008242002A028820230020028 0200A20202200080220A802002202002200000000000000000FF56DC000000000000000000100228 00200000002001400008400282000808008A01002000900A04000000000000080000000001002000 00000000000000000000000020000000000000000000FF4BEF000000000004002000402280000008 0C408A0000030B081000184004214000008900002100100000000500000000008200008000002084 40208000000000800000000000000000000000FF58390100004000404480100120002004C8040042 0080140C201004081201300002300504080000810010002400008000000C00008008000800000C00 00090000000000000000000000000000FF81EF10000000000000400202000C000000004000000001 01002080A00100001200003001208002000000000004200000000100000000000082800000000000 40000000000000000000000000FF28138000000AA88A8808B08809A08AAC028C88C88061B0300A42 6446203A0221A0960160462AA0012AA2AA08A08A2AA2AA2020002AB2AA22210021BAAA22228BAAA2); SDR 8000 TDI (0000000000000000FF1577000000000200001834211C003010A40011410083506827084304006446 02680602700610051011700E00110000600600680103620600222000620F00E80209280608000000 0000000000FFCA61000000000004003A00281801A01713400080323022210400708600C002800505 82480048628810EC0E10600680208210E00601620402E05000208600E48608288608000000000000 0000FF9364000000000002063A808F18015014090B8000692011224461840600E0426C00A00841E4 026800826206080140802602086006046084006408002816007204012006000000000000000000FF E7E40000000000000019540018058210417430410013006406104006004402100046104002046004 046806206006002022006006006107006004A00206006006006016000000000000000000FF247F00 0000108100001800003845101221001101054000000010400600415228004600408210600408E006 0C8000082012046506006846000004C00056006846106006000000000000000000FFA73700000000 208581385EA59BA28C3D07001010A00288A00C6C81647EE00004628800060008800008E006007146 8021020262D440700702600004000E8C6005006006000000000000000000FF8EAD00000000200180 5800801800805811001000880028AA1400FA14016805816511A00014010402006006000001202202 00600400600704608200A00610EA84006006000000000000000000FFE07900000011000180184000 1C00801B4100109095000014000043160060AC2460404000028004000070060310A0002202006836 40602600600040802704C085106006000000000000000000FF622E00000000000182182420580480 1801205420A0C088910052424611688410720002030A02003001600602604601202230600C02E046 0260001024170450C4016006000000000000000000FF68D0000000200005891A00245801A414B908 9809A040402004040004822A0011000828791528808000600690600650411400F00600620420E189 840086006444804004000000000000000000FF5C63000000200003901800861801429001200A0188 0000200C04000C804808238880006000040040026006000200004004016006006004C06000000126 88690C004004000000000000000000FFD9E4000000000005801A40405801831001001811A9408070 0E40400E10010050049014231210000802600684024000404440601605640604611008044E006045 004004000000000000000000FFFDE70000000000018418040010050010A911582180000901001042 4605241004000040200641010000E00600600600C00408600600604601600000000612601400E004); SDR 8000 TDI (00000000000000FFDD22000000001801801A01A0101100380000180284000028CE14682640A14008 84070B6C062C61201465068D030002208E0868864240870040080060028060068060060000000000 00000000FF3D67000000001801801801A01401001C00009A80A8000B22DD2860AE2BAAA86C622C22 E0AE28F02808E2AE12E68624A31E0A640F8E80260041104060420068460040060000000000000000 00FF687A000000001800001801000411A05800809A0564800444801460A6C00148916D5515651654 654C156526250120002046926106404154006A2482680620200400200E000000000000000000FFB2 5F010000001804001801000819C01908AB3931001000502602E2060000411060840C620610600620 6106A0600600200600E4068440C463400661C002602004002006000000000000000000FF803C0000 00001800001C01400001805201945A45080005004F0C6A072A401004709610710E80F50008620625 052021200F12700E10A0048A4801004806802804804006000000000000000000FF994F0000000018 00001801800801841049801801053010030641614E00C48040644441642642605440E04E10600600 240600E026006084004004004002002004004006000000000000000000FF6C470000000018000018 01800001800801801800000000400000600600000600200200600600600000600600000000600600 6006006004006000004002000004000006000000000000000000FF6D4D0000000018000018018000 01801A01801800001000400100680600080600280080600600600400600680700680680700700680 6806006004004002800004804006000000000000000000FF5DCD000000001800233801930001A058 8390D8502800C0080610600680000600000208601720604C01610640010000600600614600600400 6004146802110086000006000000000000000000FFCAC900004000D802201911803405811821C219 000092810550206916A48C8F406848A2740604E50508702600604690684690680680620600600400 600200102E10D046000000000000000000FF09B9000020200042001800822C408410B00290000890 04280524644402600A1C090C233006004A21087006007006006006066802006002C0600060604680 6003402016000000000000000000FF5EF3000000008020009808801C27861008285480040105292D 00620D00E08282248608200EC0E00500E086E000C00061460160A200680425600540790688E10200 2916000000000000000000FF2D42000000204400043901891800815002C032290010436306145124 A06406A0602600E20624409400602600702610602610600300620680200494402600714A30A02E00); SDR 8000 TDI (000000000000FFE37000000000020200135020C11420230520320001000A0B308C090080081054CA C08088C4A24840005004C00024890904004804804804814A4080C000804900A00904000000000000 000000FF0FAF0000000018018019039418819259011030018000006006416006406106D240061065 04106000006406006014206506C4600610601400E01040620640428E006006000000000000000000 FF7D82004000420D54F48C20C12E04C08C34850CC28A8181348B08328300B22B00B12B0230322135 0881300315290301200208245202A48322302004B8A30130230B2402000000000000000000FFCCDD 0000000402440C024021020028020B2422000C000080212008008000209208A0000820B008010288 80861200810800080A00200804800A80800008810810828880000000000000000000FF131B000000 00090090080484090C800804C0580290080024925220020024020021020021000820810020021131 00082802022002101002014001004462082402102006000000000000000000FF01FE000000000091 A000A0120000046180090049000908500C0080086850900140050080900001080000000060064001 A0800029000708040000000A000280A0000608000000000000000000FF7A4C000000000008000108 08C0821100201201000100010200010720038040208200340401410400A10008006806000001F410 D1050810408000280100400040051020000000000000000000FFA7C5004000001001811801003821 80185080888580082261000860060061064C005C0A624A00601000640608E09E004C0E006C0680C0 04084050C76084202102286806000000000000000000FF0E15000000201291C81B41311A81A81A00 A0AA958808C2ECACB26C4EC368C728083490704288690000F10E8A82888040860A62B621420D094D 004848A68B28A2A46006000000000000000000FFD88B000000001001801809045252803B2C521800 A00090680600E00608600602828723648920601022600600000008404E2060060000030040008442 1620780208E4B6000000000000000000FFE19D000000001001801801001800801800C01800800880 68050060060060060010040060008060000060060060068040060068060000000040008040028060 02004806000000000000000000FF05E9010000001805801801801801045940801015854801A00000 6806806800042025006807046500006826306046002006026E470040049148000260272060268070 06000000000000000000FFD21D000000001801801801A01C01601C00C09A01808004240500710700 601024308C0070960062080170060000208020260060060040560052A040600600600700400E0000); SDR 8000 TDI (0000000000FFDD0000000600880108480000480088210280B008820234202312918030A602022603 0600321020000026020020404120427820020000A030200009200242810000200610000000000000 0000FF8A2E40080000040040040000040052140859040008230811480000280810A10C9088201009 0A10A10010000010000A10A9009021009009001041019001011001025000000000000000000000FF 2DEC400000000C00D00C44820C52C54C00C20C50902311301221213243314349350A04335344B0A1 0034020C30021030CB00312301314900B001003203043403043002000000000000000000FFF54200 000200980180180180180180185380380184022444060442040864160060062040060862002C6126 00642C22600648E00C046000406000126006006006086006000000000000000000FF2EDB00000000 020300035133020D20122000900040A2AA4B308C08008004C80482C080880C224A10004804A40404 88080480088C004000810A080880008048048B4004000000000000000000FFF4A100000000080080 0800804940800800920A4A800000A00201600622200288200200622201200000200200204200A112 0020020024480A2000802802002092002802000000000000000000FFA8EE0000000000A80AA10204 00000AA08E24608000000411006422AA1898002008082A2480CC0000AA82A80888883212212A8320 AA80806004003302A82A83202012A8000000000000000000FFF4A700080000020000008400000840 20104000040020C200C0220028090000200500010080320422000000000040000810000021000028 200222428000000008801000000000000000000000FFDD180000000000AA0AA00C0020140AA0C840 02A400202802480082A80102103095002001091082092A82A82A94A82202282A82292A8020000001 220AA82A82202482A8000000000000000000FF1B860000002001543542102D450411028413435000 80100C10890D00A20D50930808CC1449010801550D50D31510C50540D513085503008A8800900D50 CB0D20328550000000000000000000FF86DE0008000004000004204906C040040031000841010080 011010014401410400310A9840801000801001000801010100001000000511151008000001001011 900000000000000000000000FFE0AA0008000002A80AA0420000402C80600A80AA00008100002002 080882A00000482202000800002A82A80A8088320A202A8808AA80282000002202A8200000020A20 000000000000000000FF30F4000000200800A00C00B40840820A10800A00802020A802812822A228 02802802902012012A0000300280240280200A8023220024808A2800902802932A3208A012000000); SDR 8000 TDI (00000000FFCD090000000AB8A90AB8AB801881A0B0B1C90081800224C240446C0620032200222440 62262AF8002AE2AE0880883222AE2AE2AC0062002AB0002AE0042242A40062AE0000000000000000 00FFB260000800023801001831845803801901B02401C01200403008702600000600600400601600 600000600604640600A006006000048409046841046000000004016806000000000000000000FFF2 DE000000155955155955833925A03B01940105C02250410E10E15645645615645411644E55600C55 655655051045255655655010845055200D55650050044D48F556000000000000000000FF8D880000 00089AAB8AB881888889AAB8238308AD81002A64832264162AA32A0AAD130962A62AF0422AE2AE08 E0CE3222AE2AA2AE2040A048400240425622E2D62A62AE000000000000000000FF324C6000000018 01801801880811B49A23802849008001640000600610000620610202610600600000600600002000 200600200222588000400000402E036106046006000000000000000000FFCF0C0000000898A98AB8 0F8018C9880811A008AAA0402B62020963062A22264060CE4462062AE0002AE2AE4880882222AE2A A2AE30000001400091C106326204806AAE000000000000000000FFD1770000000218008018218298 01832945950800000000E00E00608600600610622600600600680000600604602600200600200208 044003480022444E1060D4006006000000000000000000FF27200000000058038011019038258018 0980280181200000C245605601210A2520024D614E00604000600640640610C00600400404C09048 60201000840120064CE006000000000000000000FF8E240000000018018010098019118158218009 01000030000100700604001221200B4062060C620000600600020008440608400011434000602000 802C012406106056080000000000000000FF2B7C0008040018018010490758ED8EB9058258B30908 2502C204642E01206614E0CE38622601603001600601000006400600009428401060602000058244 000408600E000000000000000000FF884C0000000018218050010018019008018518431002000516 48E15608648600630602E0CE00604022628600612E41415640010040400010620808600600014400 6006000000000000000000FFD14B0008000000400000200100020000440120080102010030250200 02810854002001010003041024810000E3161003100000100084A800021010043003022000002000 0000000000000000FF391F00000000000180002404004C0080210400200002030484400400044010 2000040003004104005201200C625640000000408C02000000802002020000040010000000000000); SDR 8000 TDI (000000FF29FB00000000A00040000180180300C8911008C1852310509000601714600C0A808E2060 2622632C00604408400000B00710302614E40020E00400600650A002007006000000000000000000 FF1AEA0008000000D0400001841801040801020A33809200D04E08608722702D02290E4560060062 008068040040060120061062569060002C240843220600A102006006000000000000000000FF1C99 00000000040400040180D80111000100A801804288430522602E08E2840000460860068061100060 0442442000200682E080006000816080883136040012006006000000000000000000FFA88A000000 0AA1100AA0AB8818AB0070AB0C4881801032440441E3064060442882060062AE2AE0002AE2AC0CC0 CE3B22AE21600027E0000060001424062D02222AE2AE000000000000000000FF9B7B000800020200 020040001001801889040888810008020630E0862061260260140060060060000060060004000060 060081060C600010200022204E00A102006006000000000000000000FFCE530000000AA0220AA0AA 0810AB8298AB0888A8813222800610600608401615428C00E2AE2AE2882AE2AE08C28E2262AE2042 0E28600009200820A0AE3022AA2AE2AE000000000000000000FF985F00000011435411410C909155 915843912825804244808C0262261264124165442965565562A455655651013054E5564444504060 0045600410E406480456556556000000000000000000FF790480000000000000000082D001901801 800805801200013404644E04E2824060445260060060000060064040060060061441240060004463 00006006000006006006000000000000000000FF36CD0000000A90A90898A18C58AB841803088801 801022404600E2160162043842A00462AE2AE2002AE2AE0EE28E2262AE32622421E0002A65E00263 262642022AE2AE000000000000000000FF5DCD0000000050010458058118018A3911800811808210 C30022602E08808C00C01008600600600400600600004000E00600E00408600000E00400608E00C1 4A006006000000000000000000FF57D2000000001003001811825001809841822945803200404E08 60862260460460004560060061200060064060060860060860940420000064002960061040020060 06000000000000000000FF0875000000001003001801891001801801830A3180821040C68A60460A 608E256810C2E10E0060100060062402200960060060044320C000600800630E10400A5570060000 00000000000000FF2CAD000000001A010018018458358C180DA02005A03202400820E31601000610 61041060060060000060060060060020060060041060108028008060240140040060060000000000); SDR 8000 TDI (0000FF01720000000000AA8000A08C88C88888AA8CA8A280022A342A3020021222222422CA00B00A 2AA0002AA3222AA08A222AAA2AA2B22AA0002022A05022AA0B22222322AA000000000000000000FF D76E0000000004000000220104000A000100100000C00104A0108080000000080000000221000008 001000200200010000508A0800000028000840C000030009001004000000000000000000FF354300 00000004A880009E8A88888C108008008100602BA1020183006123321902040004422AA0802AA202 2AA6E83B22AA2222022AA00010200224A2AA4022022222AA000000000000000000FF8C4C00000000 000180000000204204400402400200800040440200280001000200B0080544000020000008004006 000000000040000000000000040000204010000000000000000000000000FF00AB80000000040200 002000000000802801002800000005102800801300102100004500080002000000C0006006010000 1080900000004A84C01000000B00C0108000000000000000000000FFE33400000000040180010184 1811801024840041810000602801620E0060920060D400E210106450006004044006204286102086 00E04000C11048C306046000000016000000000000000000FFA4CC0000000000018A204388B80384 9100900001840050E3065261264864020560042A614643608029612401400010404600600E546000 22000000201610E208000006000000000000000000FF819100000000000180001100B80090501880 5805800024A2840060260460C61A60260A60042060800860060045402F4296086006026500204048 04204640600A01804E410000000000000000FF79500000000004018000210018088830E281183786 0042242C48E00E4166360560DE4060C814667810600616400601442600604605614040400000202E 286052400026000000000000000000FFA024800000000401D441131218058510018A2A0100809060 0022648752600800A00441642112E00040F0A400C4C600A80E0029142962A00540C053628604E202 002806208000000000000000FFE08A8000000100018000210018018A508D90080100C210F0C00564 4E0A402050350410651021608101601441401028204F2B20043064000B2000106206416002002006 000000000000000000FFD6DB8000000004018000510058018C1003848C0D800220A20451622600E1 21A0320609620D00E00101700E04C008282226002010006040104000086406002002006006000000 000000000000FF0078800800002201A60409002803809041826AA1800286284D0C6006C054810028 4600E10110600090682640400606201745200CC061010440010070060801D6406006000000000000); SDR 8000 TDI (00FFAD62000080800802A00A00A00800200089800804904000300280200208280280000280A80200 2000042002002000002002000002002000002001002002002002000002000000000000000000FF68 530AC04103001001000C0400000220004104080200110210C094008008408440008C0008820140D0 0108000040001151000800000000000428000080000800000004000000000000000000FFE9380020 00808800800800824C00E00C008048008100C0280210200208280200246200200219A41000200200 200200200A002002002000002100002002002802002002000000000000000000FF3BDD1400058018 01801A899418419519457533430540546A57005816556547147C54496D2E51641011601700600404 6807807006006020006000A0E006006206006006000000000000000000FFFB2A0A80211200081082 0A00400102141900B40B08A0A88208E8CB00000830C243040A180C0243A86A44888445740040A090 40040450000042A8000080004800404004400000000000000000FFB7370A00049008008008008C08 408908C4C50940828010282220200A2B24C210243221215208A40021221200200200280200200202 2800002000002003002202002002200000000000000000FF74860000000000001002102000000400 0000200400404000000001008000004000001004008001118800000402A884080008000000004000 0000800000800000800000000000000000000000FF7A3D0001000000044000806060002043080802 000400020208000000800008020880010000A00000000000000000800000000800000000000000A0 8000000000A00000000000000000000000FFD49F09000000040200002212C0480100020440220020 14151028009000008001000045000900000100000000040000080048012000000010048000100109 0200080000000000000000000000FF7E720000000000000000000000041040000100000001000000 0200200000500800000805400000880000000000001080000484010000002280003280000400B002 0000000000000000000000FFE6B88100000004A88000888008C08208A88808C8808134A02200E216 2AA2022322AA0479022AA6002AA2AA2AA0EA2232AA00200B2AA0000020080022AA20210221BAAA00 0000000000000000FFF6488008000002000000000024020034010010110080001004040449000004 0050045208808044C100481000000400080500480000400002800000C00400010D08080400000000 0000000000FF6F8F90000000015580011194391380DB3313590B8002407014424224D5654C446D56 294017556081D565561561145465568440A655600004E50012555750644454655600000000000000); SDR 8000 TDI (FF6CEC000001841821880461841049C03B4101E004100001C2C0404024200C668D60A40866260263 100662027A660000618200E0A618600022620012E02A20610302E106000000000000000000FF5247 000001801808C000010016118058098402010220004801016D444A10865060040440061160000064 0C8060062C6012016146006000006000216056506007804006000000000000000000FFAEE1000009 801810842001009081831801AA00418000084A0600081420E00E40640410401600E0000878048060 00446002006006006000006008086806096086004006000000000000000000FF807D000185867989 000201825805205D01C09015812000A0830AC0420025A40AF340084A8E606160006002207006A1E0 42024046006000806008C47712206012004006000000000000000000FF9F37000001801845000001 E41C0100141180D001E02022A12032C2020208260D600880752612600021600240F0200060820460 06006001006001006006406406080006000000000000000000FF4FD8000009801820020601013901 241801A454358080106A4320020E2420142058B000402604610009680400E0218260220040460060 0080600080601200600A084006000000000000000000FF62DD00000180181008012140B811201901 811C018C8024E30604120600EA062A42908A43460360200060440C60064464120540160260000062 40106016107106800006000000000000000000FF20B80000058000040240018A100583D911903C83 002044202208406289240280600620480691620048600420602E0061040040262060000860805441 2211F503004026000000000000000000FF3059000001800000300001A1120181180B801029000018 204800C8021008A844F00600600608600800688400620080E0F400600640600000600001C0060160 06024046000000000000000000FF8013000001800010020301905001C41809A0502905204075128C 644681228C8944820C54268D604810612048625001600400400E0460010060210840560060060000 06000000000000000000FF877A000001800000000021841011801883809905080005600600800600 602400401240408600640000600002600622648404E0460060001065000060060860840400060000 00000000000000FFE41E000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000060000000000000000000000000000000000000000000000000000 00000000FFDDB8000000001001001000000200000401000000000000400400400480400400100000 40008000008000000000060000000008000000000000000000040010000000000000000000000000); SDR 8000 TDI (7C67000000000800800285001401851694C21C0584004424545411403440D6457446556A44C56551 15604400612800042611601700E040000100036006006006000006000000000000000000FFCD2F00 00000048008821812009019A1090801821808000228602600680C806006000804004026100046404 01600600000700600E006000000000E04006006806000006000000000000000000FF56FD00000000 1801882201020001C4980192D80D80A11565448C010C50834E844220156B0D0D60401061020464A9 50A00650600603608008000008400E00E006806006000000000000000000FFD8EA00000000180180 00018000318038C08018C18C0040201440E24402600648E090004024206208406032086006002006 00600E006000400000004026006006006006000000000000000000FF7D0500000000180080000180 00018018008018018000000004006006004006006006006006006000006002006000006006006006 006000000000004006006006000006000000000000000000FFED2F000000000800800001A00001C0 18008018018000000005006806804006006006006807006001006802006006006006806006006000 000001004006006007006006000000000000000000FF6073000000209A0180C203140003809B0080 1801880000484400810440600600E14008600E406000026006006000006006306006006000028000 00E40600E206000006000000000000000000FF4B89000000245B15880009800009805852C0588184 4048040C48080C94643614700E006C460A620020EA0608620700600E8160060060200002001060A6 007026226006000000000000000000FFA613000001801A43A4814181DB08B008AB91305082202C12 070040480262268050028000270A600120620600600700600600E106006000006000006002007022 016006000000000000000000FF13D5000001843801882029AC38C3802F41B8848089000200201140 0008000640448200320620600000701600600150600608600600610000E00188600210600300E046 000000000000000000FFB993000001849B30A20485041801908801801049800000000EC971202060 0E15402E10001700620005600210620600600E204086006020046400816523016402A46006000000 000000000000FFD61F000001801808800401001A00C40811C2150D8A2028004E426B0112E5060540 07022806A96108087023006021056017004007006020006000506102836082006086000000000000 000000FF894D000001801821880001801801821801A818910100484490944004808806007B440840 4624640008602282604600E0028060068060C044640004608202F802056026000000000000000000); SDR 8000 TDI (75000000400C44C128C0D40D14D48C80822812800122300B00201354B50340B83314340BA02001C4 300200241301208284240384A00050000140202280202B043282000000000000000000FFF5BB0002 002403422103082022802004010022400000A00800108840C08C00D10000820801608000060A1000 1001000980810801000000000000804994000848A00E00000000000000000000FF17770000000268 00800CA003880490080020C804800040A0120230A206200204200264210200200040200202300000 200200B402002000500000000002002902012002000000000000000000FFCF970000000018058018 5404400008000A52002800000440208040140042242A0A04004240024000A000A101010611000002 00B00A8000A800000082290080A0008124000000000000000000FF94730000201080000000020001 220781400404900000100480400E083100480005680004100100000880093806DE2810090C080044 0000040000061001080C00560080000000000000000000FF57A40000000000A810F0019018518020 9128190180000A200424400008418400E0161040AE00600000600080600602480680600E01600002 0000E0644680601608600E000000000000000000FF335D0000002342922112ADA15A41A825098C9B 018000C2280682C057244CA484E82AA04926C160012C6808046A08CA401608608703600024000002 488E086006C8EC2E000000000000000000FFF49F000020001021003201C41883C29805A038518000 08E0A720430408800850440102041602600000E32430608000408604E056906000100001A0C44601 70CE046102000000000000000000FF7C6B000000001000001201801801A018018018018000002004 00400400000200400200280600600080680480600600400600600600600000000000400600600680 6000000000000000000000FF1F5D0000000048000010808418518350018C58118440116004804000 00400680680611630300480140680500684680000640600601600050000012604600600600600200 0000000000000000FF5D87000000000E00601000A01A01A01081821801800000620D005820004844 01720200E84220748000E00400702900040600680600E00000008100E00600680680600000000000 0000000000FFF44F00000000180100900380380101180BC01A059200C4604654C0842A6A97C46050 52600B04E05032602228E08002A0A688E00F00602000000800600E00600E00600200000000000000 0000FF6B63000000001801011001A05E81001829D89883980022202C29D2AD2A0EAC2AD2BA02623A 28C2A94A62AA5BE28F2DA10608680702608000001000601E00E817006000000000000000000000FF); SDR 8000 TDI (000410002C00840C00800C10C54C00D24C1095003431031130834C20CB10353343345300A0095130 1308300300300308B0030024110C0001043003003003103000000000000000000000FF31BD000000 0118018898058219431019098018A180000062460242040062064060040860861060000464460260 8410600640600E026000000000006016236114006000000000000000000000FFDC71000000220231 2002002002312052004A32C300008414A88D4824C088308008049048008040000041048002048049 14000000004000800000000224004A94C04000000000000000000000FFD327000000004804800800 800902840800810800800000A00240210214208200210A00200200200000282A0020420020020028 020020000000008020120020020CA000000000000000000000FFD1A50000AA0880800AA0AA0AA100 0880AA00000800002801100002080002002A92203282A82A8000AA93502A98882A8220AA82A8AA80 002A80002A89802A80600002A8000000000000000000FF3882000000000400000002088020000002 08800400000080C88000000100200288082800000000008010000014410010102080008000000000 00230801000210008000000000000000000000FF51610000AA0A80CC0AA0AA0AA0280AC0AA0A8122 00003002402802A00302002A82082202A82A8000AA82002A82A82A8228AA82A82A80002A80002A8A 282A84882402A8000000000000000000FF0B760001543521503543502423122C82B02404B00000D4 0C00529548AC0C88C804C1020D51550000550528D50110550540900D505500005500009005505509 00CC0550000000000000000000FF2F20000000404600400400400402400400404608000103100105 18115011510008C10110018000008000010000010019000010018000010000010008000010010900 00000000000000000000FF5AEC0000AA0880AC0AA08208808800400000400200002A00008002A000 00002202200B02A82A80002A8A002A80882A82200402A82A80002A80000002A8AA82482002A80000 00000000000000FFDE1E000000204800A00A00A02C40D00B10C20950800080280240200294288290 210AA02802002000002042802A22802002A0A8020020000000009020020028829120020000000000 00000000FFAB9900020022020420023124040242A0453154010000810CA80D080CC0CC3100800081 1000000000004888004804800894125004004000800000C348040048448410000000000000000000 00FFC02100000014590190180D815841801A319019418000106406D464440040461465064060A601 600000600E88E0C408600600E00E40600004000004650E00650630E006000000000000000000FF4D); SDR 8000 TDI (02000C1B009519019099541258A1955955800051655425022020C42E55442C40654655600055652E 55453044E556552556556000000001556556556552485548000000000000000000FF6DF90000000A 98A90AA04B88188D885C038AB8AB80002AE04212C0140063020842001462A43060002AE2AE2AA08E 2462AE2AA2AC2AE00000000008D2AE2AE2AE0102A0000000000000000000FF7EDB00020001184D00 0029825801809211801801800004400210401408610280600712E00E006000006006002000086006 002000006000000000805006006006028000000000000000000000FF5049000000089AA80AB90182 18E08B98918AB8AB800022640E00020010E0C2054004E942340F60002AE2062AC2C82162AE2AA2AC 2AE0000000004042AE2AE2AE144000000000000000000000FF606100000000580000180190D81080 1801801801800001428642000008600220408400C006016000006006004006046006002004006000 000000234806006006404C08000000000000000000FF8BE300000002000500014B80180580282B80 1801800010604210C14C24243015444802610A40600000613600404608E006004006006000000000 100006006000128140000000000000000000FF1F1C00000000000100800980D82182090184182180 000040120040042040240C6040046400006000006006104000006206084006006000080000000206 006000104100080000000000000000FF544E0000000000010878098419A3805800821903884018C0 0E00600604041803400C40C06445600010E2460A03000061060040060060800000001820061AE180 064018000000000000000000FF2FEF00000000000512190580180B80982288180D900000C2860880 A000A08420429409409408620002E40604040640E00600C106006100000100006086056200204000 000000000000000000FF92780000000000020500820520000440A000005000000002001101204202 402102A0240480248000120020000106010100000100000000000080000400000400080100000000 000000000000FF197E0000000038018298040000B000C0200C0040048002044412402424C0000040 2C148544000200030240300126000200090010020210000000020080040000080000000000000000 000000FFA750000008008800080880820812890084900988804020210200200A0921023220021000 1A18240008200200200048240231200220200010000000210A08A00A400000100000000000000000 FFC93100040000040100050000040042044840240008000810810092D10102A90D92812050010084 092010094210410014010010014000010A0001601105301081001000000000000000000000FF4AA5); SDR 8000 TDI (00201A01842801805805831809001801800080080D24604082154600010200204500200100600680 2000802002106C1000600080400000B006800012446000000000000000000000FFC9CD0000004898 E98000AB8E98C18D18810AB8AB80002A838450600060054422600A2AE25E2AA0002AE2AE22A0AE2A A2AA3260042AE0000040001522AE2A83A241E000000000000000000000FFF73B000000001A008109 0180180502182100180000002040162A401620000640610600600A00600000600600200000200600 6044006000004000122006000004006000000000000000000000FF197C0000000AB882AB08AB0898 8988388B0AB8AB00002AC20602C23608800E2AE3062AE2022AE0002AE2AE28228E2AA2AE2364042A E0000040002022AE2A82260A6000000000000000000000FF9D25000000555B51D4203592595188D9 15155955000003054401444011055602842E4144C255200055655645655055655654E48C55600000 400040655655044450E000000000000000000000FFC0FB0000000018118040018058050018410018 01000000005400408602000600005600410600000000600602E0460060060060D400600000400000 6006000016006000000000000000000000FFFD100000000898AD8000018908898A98890AB8AB8000 1062A000410424622612000E34400E2AE0002AE2AE38608E2AE2AE2262842AE0000000002162AE2A E332242000000000000000000000FFBBF000000000180184200100C8038058250018018000016000 20404402601248210611420600600000600600644000600600600000600000000000E00600608201 2000000000000000000000FF09080000000258048898D384084080180100180180003260080B650E 0961020102240440C600600000600605200600600608E0360060000000000C60060060120A200000 0000000000000000FF28F4000000045880801855880800803801001801800044E00010E14E246032 00244C00410E00600000608E00220010E00600600600600000000000680600600242A14000000000 0000000000FF712E0000000098058020018450010499098018018000106004424004084006004086 00E00600600000604600200600600600200000600000000000600600600200200800000000000000 0000FF76930000000858298AD8858090AB081E278AB8AB80000062AC00430404E2872AE1002A6226 2AE0002AE2062AA0A82262AE2AA2A82AE000000000AAE2AE2AE2AA086200000000000000000000FF EC0F00000000580280000185580004194180180180000060944064C64340124040D4006006006000 006006004206106006002006006000000001026006006002400010000000000000000000FF45CE00); SDR 8000 TDI (288CA8C008068808369008E88AA88880002B20022020022A20020022422020022020002AA2AA2122 882322222AA2222AA0003A20000D62AE000402200000000000000000000000FFA331000000001801 84388001200800100000002200080040240403040140440141480C80081480000000000280060800 10000084000000004002440000000010010000000000000000000000FFDF28000000424404088028 0200800D400400000000000102881080300003085400000005400000000000001000260081000000 100000000080000080000004C00A0000000000000000000000FFC87F00000040044228580580180D 843945925881880003620800610624649400441010600610004002640610010601008C0260000062 00000000506486008002000400080020000000000000FF7B81000000100001401809009801801801 80180380880060861064421060244CC12000E4C203241040E1462000000400041060000060400000 0200004E2A0082010140000000000000000000FFE244000000080001041000989949801801801801 808000600409401008600022408204A01C40A0082060862044804240040260040060000040002020 A6000052000020000000000000000000FFF73E0000002004034810048018838630618A1881880004 E0940442C22366821147020321200820300462664942060040040865040060201040004822060000 22008280000000000000000000FF976D000000201A4002380A801821801883205A03800004241000 E03600202E11502F08628224620002E0070040062149120060020064000020000050164B00920050 00100040000000000000FF1271000000003800209800001821801891041901914050A20128740320 210E0440262464430D6140C8650614408842400A04F00280612000208010C0060A88864040000000 00000000000000FFFF85000000003C0100114484010582580D4918018409A2202432522104F88608 420002603300C02000600648A0000130438160460060004020022060078A00860040000000000000 00000000FFFC74000400401A014310A00200CB883A43089829934911303501C80B02680624411948 340904610140605E80210740A0220470268861412021021168070100064048000000000000000000 00FF3AEF000000401800E20801801811881901021CC9000000420100680E40421640902388E10608 20090A648704400804400A007281106000100000007006001000005000000000000000000000FFDD 66000000025802888001001831805A25001801000000402609650809400C08E22200708200000000 60060844060040020161448060000000004A2006000000104800000000000000000000FF4ED90002); SDR 8000 TDI (2C108008008C4800800800804C00800000280200202208200200214200200200A001022002002003 802002002002000000000000002002002003002000000000000000000000FFA61400001014180180 1D11941809B55815955913840105492690754491692DAAD10C81680E5564514860068060042AE206 006084000000200000006004426006006000000000000000000000FF73920200800000A808220302 24424003C16030816940C0CC882848140400AC004CA42004298042A800442C004534000058000404 000000000028004004005004004000000000000000000000FFC2D40000100C08008008908808008A 080490490882C00223020020C2093002002012002012022200082002002002A02802802202000000 200000003002002802002000000000000000000000FF689A00000000000000000004000000432004 80040000208040100410040888508280000000108030400A00800290040C00800080000000000000 000800040000000000000000000000000000FF182F00000000000000000000062820800810000000 00500000000000000420C60400008200200000800C00800000088028000000000000000000000000 200000000000000000000000000000FFA3F600000022421200000405400040000000010A0000010A 880008301089485400A8340230048000000000050200090090800410800000100000081000000008 008000000000000000000000FFD20400000000010020204800000000000020000000088200200003 008200010100000080001000000010000000200400000000A0000000850002230000000340000000 000000000000000000FF3C44000000088C208AC8808848AACAA8AA8AA86080012830022AA1132022 03402202002082242001AAB2AA38208A2022222AB9032AA0002020000422AA0000022A2000000000 000000000000FFE9F900000040020240411000000002000440144800080008548910C8800500A010 04001408C00001005004000245141100004105004000000002405004800004004000000000000000 000000FF24F6000000555915F51955949955955955D558818000406C2C5578265074861565041064 4E40600055655645633451644755623455600155600008DD56000044456000000000000000000000 FF6C150000000AA8A88B08408AA8C080C8888AAC8280082A2302242402AAA0328AB2922AA0A292A0 002AA2AA34208A20322A2AA22A2AA00022A0021022AB0000CA2AA000000000000000000000FF8480 00000020022000000000000000000020000C00000D01010004000300300000502310800880008010 00000001020088000000800000000000200000000288100000000000000000000000FF465B000000); SDR 8000 TDI (01000801803009001901001801800000CA0480440400408652490600730200600000680600600001 3802802000000000000000006008046084006000000000000000000000FF7CC00000000318419110 61801801883C01C21A1181000C008A18608614601229086360C09404600100600600600600200300 200600004000018001E0020A6006006000000000000000000000FF91CC000000025813E010018088 01883C01D21C218821906932806145C0604200040204F02400602804684E00E00000200208200200 0000000000006082306406026000000000000000000000FF0F3900000000390C8804018118018018 81881801914000C2460072000470A3050A0300442680600900600E01600000200208280600000000 0000007103206406006000000000000000000000FFA19D000000041C08800481D018038018438098 05800003440E10600800614354000315412609640008603610610600202220200200004040000010 600201600E546480000000000000000000FF96E1000100011841810029827811829001AA1A518220 240802A06A4658221700F30D0428122460E006E0460262268940040A40040A00C00000002270B282 632504E000000000000000000000FF68410000000019A18002518008058010018018298080090822 40E0243041060060A420400300600000608600600010408C10500804000000000000600304644400 6000000000000000000000FFAE04000000041A01800001AC5800831005B51A4D8080504046816C20 20004214A4225408C00964001061460865010040CC20400C00010020000044614200701435630000 0000000000000000FF33FD000000001831800081801801801021801801822002440E106008002402 4021120120004060A005601604604600400404400010002000000010600200E00400600000000000 0000000000FFE41E0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000600000000000000000000000000000000000000000000000000000000 0000FF62890000000012000014000012002000000004000000005005000000004000000001004000 800001000000000006800000000004000000000000000001001001000000000000000000000000FF FE33000000000800800800800800800801080800A000202002000042083203242202002802012828 042202002000002002002002000000000000002002002000002000000000000000000000FF507E02 01000040A008220410000200008000010028000880903000050000C8000000200028800A80000049 000040000008000000000000000028000000800800000000000000000000000000FF5CA100000000); SDR 8000 TDI (800C21A01A00223820483881A80100028C0260305200B454B2C830604408650010202250E0000020 060164060000000000002C6A26AA4006006000000000000000000000FFD661000000000001801801 80184481188400182D84003500464940800084040020000040862360002222020060061020060260 06400000000000002006004006006000000000000000000000FFE0D8000000001801800801801800 00100080000180000060020020060060060060040020060060000020020060000060060060060000 00000000002004004004006000000000000000000000FF86BF000000001A01801801801800001400 80100180000068020008068068060070048000070068008028020060068060060070060000000000 00002006004004006000000000000000000000FF7D77000000015801A00809A01901801000C03421 8000A000008020002420220220162030060160080060060060000060060060060000000000002020 0428C006006000000000000000000000FF8ACD00000010190BA01801A21805821010911011894011 62120400869003125021008D0924146B0080682700600E8060060060060000000000400120060042 86206000000000000000000000FFF525000000001A63A05801804801800B01009809802000F80100 408200702001300208600300608000600704600600600600700400000000000000E106006206A060 00000000000000000000FF112500000000BA09801801832941820989203E05908088620040404024 724B01A0430460020262000070370260400061060060040000000000205060441075164060100000 00000000000000FF4EED000000101901802C11A01905C00801481841900040401004400392608654 6096C2F12608E0100060060060160060060060050000000000014071065161040060000000000000 00000000FFA37E000008001A41C00B0580180188080522DD118080134D1005480209620754600E20 610E03632000720604E0000860162060048000000000008068144068051062000000000000000000 00FF3D07000000000001003801A03001501805001889880040628442690600400E0A400640E01240 601000620E00600608208A2020040000000000400060068060C6106008000000000000000000FF39 31000002000001003801812059029F210558258000310014097084256CCE00420600E82225654808 E0268161C001A00201A00408000000002040E006806026026000000000000000000000FF2B730000 0A000021000B058010810518410018218080024004104824504906A1442E0260C200600010E04604 600600200200200010000000000009782CC8720D246200000000000000000000FF26600000800001); SDR 8000 TDI (082C844800900851000100800018204A01244A002003003002042022402000002282803000102103 002002000000000000002042402000802000000000000000000000FF4077000000081800113A0001 2001000420080020000124400000C2844C5048E044C42842040A8000020170880006040000080540 000000000000A04010840200880000000000000000000000FF4E8500000002600006000000018804 000000A60400000204200C0000101000030100110448000000500400A50006081080100208000000 000000080180280140220000000000000000000000FFB8C80000001019A08840111A98360B100102 18C9800040E200404036030002040004004094006000000000026806004E06866026000000000000 06640200E00C006000000000000000000000FF5918000000245B02A81229201B02B0120123181380 008C3050C34C23030C02800804D04B0F0AE000D20A804C6080884306037246000000000000C26902 D27204906000000000000000000000FFE05F000000481840C242018B30286211450838C180002103 04086110B0008E3280A002602620600000402400600002400610601600000000000010E20200F00D 226000000000000000000000FF8AD7000000001801800201801800A0100120180180000028060040 02000806000006004006006000804004006806804006006006000000000001802002004804006000 000000000000000000FF154C000000001800800001011A4411100510580580000060009048061070 40084844814046846400004C04C07006802806046006000000000000506C03546806006000000000 000000000000FF699E0000000018018010010018000010032018018120802C8100400300600000D0 0450408D147D00805005046008003406006006000000000000007002004006006000000000000000 000000FFA98B00000000180000200100BA000A500113180190010000540164C840A408C242A60462 46C0E02828A14A88E02020288E80632E000000000088802083006006006000000000000000000000 FFCA86000000001801005401000A00001001401829802028A2AE22C8EA23E2082E92CEAA50862D60 B13AA0B21AE057482106006656208000000110023102004006006000000000000000000000FF5C23 0000000002018008012158000C5E04151801B140806554814516400414492284CC45575062A140C1 4504E001003417006106000000000000006000806005006000000000000000000000FFB879000000 200181A018210118009238A00018818A4002000480400000008480200485480600E0400141040460 0600200600E006010000000000802024006804006000000000000000000000FFC2BB000000000401); SDR 8000 TDI (002023084022002014010000C048308008C0C8088804484881500900400100480480482480C10880 4B44000000000000004825004800804000000000000000000000FF91EC00000000080080C8008808 24840800800800800015200200201202202211210228204200200000200200200200280208200A00 0000000000002512002002002000000000000000000000FFC6D30000000AA0800A00AA0280400884 AA0AA0AA00001102902A8200009200A002005202802A80002A82A82A82882A032032941000000000 0000AA80002A82A82A8000000000000000000000FF4F620000000040204000000040000400024004 0000008880101201000000100100C0AC000000000000080080000009008000088800000000000100 0028000000000000000000000000000000FFA9A300000008C0A00C00AA05200C0A80AA2AA0AA0000 2202202A8280280200B002080482282A80002A82A82A80882292282200C0000000000000AA82882A 82A82A8000000000000000000000FF6C290000003503141543543303103143501541540000440D40 C00A30D20AC0CC0C10010D28D50000D50550551311440C50D48440000000000000550A80D50C08D5 0000000000000000000000FF7F5900000042041260C4005004804040000004000001801101001051 0480D004914180110100000100180180124110000101080000000000000000104100100100000000 0000000000000000FFD97600000008A0A80A80AA0880CC0A80A82AA0AA00000002A8210000018000 A202000202002A80002A82A82A8AC8A20220A202A0000000000000AA80002A83402A800000000000 0000000000FF1C90000000240A00800A00A04A02A00A00800A008000152802822C02822C0A10A8D2 28288300200100200200200210A91201200A000000000000002C8280280280200000000000000000 0000FF9AA80000002002042022002402402022030010010000400804089128C848C4004804810849 004001001000004024800804884004000000000000000834001154804000000000000000000000FF 002A00000000590180580182B8018C18A9801805800044600400E006214104014154406406006000 44E00E00680410600E406A8600000000000000632C02600E026000000000000000000000FFC49D00 0000510C40D28C14C80C92C10C00E20AC08001903343AC352B142022A22203133053402001103342 85200B0424A2123042000000000001843003C13522002000000000000000000000FF3CC200000020 02002000002002002001822404020000000984B20900A08380089030C20800A00000AD0800001090 820850C09000000000000000008A00030C10040000000000000000000000FF0DC100000001084280); SDR 8000 TDI (8C880000180180180180000558A600001200200400A4C00060060060000060260062000060020060 0600000000000008E00E004004006000000000000000000000FFCD6B0000000AA0818A8089911800 0898898CD8AB80000000BE1028260062362B01A01081462AE0002862162AE6CC2A62AA2AE2AE0000 000000002AE0101042602AE000000000000000000000FF4E27000000000025C00043848900243841 801801800000040600610628E10600A00E04200600600000600E0060020060020060060000000000 000062A4404004006000000000000000000000FF72FB00000000181080500188484B801803845801 80005340042B240E0420160024024842B20060000560A600604600E0040040060000000000000060 10130090004000000000000000000000FF1C250000000018018A1005804803103801805905800000 42040083062220062060000160440060000060860060002260044A420E0080000000000260044200 44004000088000000000000000FFA6080000000018008A1011852910041849809811844000E24450 A2861262762120C210821802E3000460860060041060340020060000000000000064041800062040 00000000000000000000FFCC65000000001881803081800820009013811801800003008402602E00 64061203162424022D642000600E00600200604400200600000000000000602400000E4440000000 00000000000000FF731700000000010000408A05008C084021800088004004004020004850001011 02080000401001400200080000061000003000000000000000000000202000200400000000000000 00000000FFBF090000000218010A1800000009001089924010100003400800440454414808048400 84542302801200300100060101082840000000200000000100200040000000000000000000000000 00FFE92A00A00000A80080000080084087082680488484002821023CA00A00200204204A5E600240 20000020022020004420120424120100002000000424000C2012000000110000000000000000FFEC 1100000000002040140A00000040E40040452002A10012910311A100920120902124108108010900 9241031009001001001000000000000001011001001001000000000000000000000000FFDC8D0000 00000800D00C00800810C00D10C00C0894C142B00304343334331340B14300B4834D241100341344 301301300B503002000040000001003023103003002000000000000000000000FF568E00A0000558 2184180B801801831845941841800008430648600600E02608420E3040360060000D600600600600 6086004006000000400000006006004006006000000000000000000000FFFA1E0000002002342012); SDR 8000 TDI (209102080180180180000840260800020081260A60802C8006006000006002002400006086016006 000000000000006004000004204000000000000000000000FF96690000000C00538C18818320B10A A8AB8AB8AB80000242AE2A02202A82AE0262002B40862AE0002AE2AA2AA2AE2AE2A62D62AE000000 0000002AE02E20002E2AC000000000000000000000FF8802000000501951B5094590804110D15595 5955800004C41644854A54441241242E00232C556000556556556150556456504556000000000000 5565445524B4034000000000000000000000FF115F00000000B80180B80980000300100180180180 00214006010080004002502056002454006000006006006006006016004006000000000000006006 002106004000000000000000000000FF6CA100000003D8A80AD8118438078098AB8AB8AB80004043 040062A02A02A400400E0080062AE0002AE2AE2AE08E2AE2262402AE0000000000002AE2122A6282 106000000000000000000000FF014B0000000038020019038C98B194580100180180000440D41480 0000000444642040022E00600000600600600000601604000600000000000000600200604A484000 000000000000000000FF988300000008000000285180180180180180180180002960064060100080 0C10A0860C008600600000600600622600610610800600000000000000615200A00202E000000000 000000000000FF987B0000000000000108018A184B801A01011801800053600E09640804008C4AA4 0690000600600002E08600640001600600000600000000000010E002002002006000000000000000 000000FF1C970000000418A800580180D001801805943801800000410400010428C00600600A0040 04006000106026006006006002000006000000000000406530006002006000000000000000000000 FF2A6000000008B8025A18AB8010818AB8A98058AB80000042242200240042260440A022C2AE2AE0 0020620E2AE0A83A62AA2A82AE0000000000000660402AE2AA2AC000000000000000000000FFCECB 00000002182000285180500184380180180180005060C60505405041040020020060040060001060 86006006106002000006000000000000006544402016006000000000000000000000FF30FE000000 151822012955805955D559558D195580002804165572A02D452C30201654E5545560004D648E5561 30456552550556000000000000406504552556556000000000000000000000FFF34000000008C08A 8A90820208AA089CAB8898AB800005420620201202A2242A2448A5420E2AE00022E2262AE08E22E2 AA2AE2AE0000000000002AE00202C2802AE000000000000000000000FF7FBA000000004888841000); SDR 8000 TDI (0404000180000000000201080104080300100084A00804300000000001080C000608800004000000 0000000000000010110320108000000000000000000000FFA11F000000401A01D000108019058850 08001841800002400600648408600210208200600600600000E00010040000448604600602800008 00400064162044120040000A0200000000000000FF26930000000018018290008158298110000019 01840800C5260C600C01655221244A4D628E44E4105262004000364B400600600600000000000208 6106084082404010000000000000000000FF2E9D0000002018018010418428018890018518018000 00628441204640E00E00602A02604610600008620420422008409600600600000000000000604604 400A244008000000000000000000FFEF8D000000001801C010210208038030058099018300436144 0021240560064CE28241E16620640000601409404600C24602600600000000000008600602004200 4000000000000000000000FFA1C70000000010018A8011808931801008021D21800001402132EC8C B002A0400002D00D0E8B641023600400401022300E0040060500001000400064B648648282600014 0400000000000000FF9543000000401901801005800C0180100802182584210A400048E24C5004B0 890C420C0416146128446444CC408604200692400600000000000088610600A00608600000000000 0000000000FF7E2C000000405801E0000180084180100382190390A810602020200700A0000A0013 12120E1360D013600220200010200608580600000000000248610604E02600600000000000000000 0000FFFD5B000000203801A01401A00821803001A01C418C09446E001120454424100105CB000046 80E00108F0030520060C2006044806000000000002A0600682200F106000000000000000000000FF 3E89000000001901800A05800C01803009801C01800100E08700531410614520500620E087006200 406455104120003027006006000000000001006004004011804000000000000000000000FF569D00 00004018ABA21803A2C001801001A01801800129600648403512E004524080056086806000006004 00400600208610E006000000000000806024804148004000000000000000000000FF8B6900000000 3801800809800031801001801A01800004680604C08600400400442708622E006001006803002400 002006025006000000000000006416102402004000000000000000000000FFE4780000004A990188 B8E59800838AB0AB8AB8AB80001062AE0042142042AC01C1082060042AE0002AE2AA2AA0AE2AA22E 2042AE0000000000002AE58637A4022AC000000000000000000000FFA268000000040003C0080180); SDR 8000 TDI (78104B483001000100402C0255008002210200048500844008300040145504000146A40040000000 00000A88014080015000004000000000000000000000FFAEF100210400CA28800C90900900844800 90880C8A00D0A5032228024420831420020020832020C80130020220820220024020400000000000 00003003002802002000000000000000000000FF2F4D00000000000000020000204008804A040000 0000000000108040088040000080C20020000C00000810000400000200080000000000000000808C 08008000000000000000000000000000FFA659010000004000000000000002040280202280000000 08280002D0040200208C000080080005108000002880000080000000000100000000408000000000 00000000000000000000000000FF3F300000002004000B0002002000040008200000000000000810 00000401280004A04C00000000010000200000001008000000000000000000010000000804080000 00000000000000000000FFA8B2000000002000000008430000012000000000000800080083089011 00000D08110100008000000000901402000100000010000000000000020000004081200000000000 00000000000000FFCC980000000BCCAAE068B0CC08AA8C08A28AAEAA80002AA3A234222230220221 30030022AA2AA0012AA24220A0AA2222AA2AB2AA0000000000012AA2AA0220422AA0000000000000 00000000FFCC4500000040A200202040044404225001401401000900012080115108000400484001 105500400100500081000110800480100400000000000300410108C0040140000000000000000000 00FF6535000000501955911901903955903955755B55800055745741745642E52444493610ED5755 6000D56C1640E356C57556556556000000000000556556806204556000000000000000000000FF9B 990000000C08AAAA88928888A88880AA8AA8AA800832A20A2A200221222223208A2A24022AA0002A A34B2A20AA2222AA2AA2AA0000000000022AA0022422822A2000000000000000000000FF33250000 0024040004002200840020900000000000008000010010808000080802002200010000000000800A 00000800010010000000000000010000002B0090000000000000000000000000FF007D000000028A AACA88088008888800A38AA8AA80002022222B24022C23323224022021002AA0002AA2022026AA22 22AA2022AA0000000000002AA472220052220000000000000000000000FFCBA90000000038018018 2214304000A01180000000081100040040A400010010001405408000000000004001000600000011 0000000000000002000480000010000000000000000000000000FFD9B80000006800004040800100); SDR 8000 TDI (3805A498038C0000628702709400700004824140A006002200106006005000007006006000000000 01010000200702E006006000000000000000000000FFF9B0000040022105800001811C0184192001 58898221202026A060A000480222B21480F906804C00006006004006006006006000000000008100 00680612E802006000000000000000000000FF673500000000200480000181180180180004180D84 4005210600650004404E086404156006224008207106004080406016216000000000000001906016 006106006000000000000000000000FFD784000000000001801801801D03931823849805B1002062 2E28E02208418202A08A2020860040401260060B222608E0B6006000000550000000428006086022 006000000000000000000000FF0A5000000000000080182180180580380181380180000060070260 4A00F200210802802E06004000486926102000166106016000000000000000854006006846006000 000000000000000000FF3A14000000000004801841811801843840023801A04021655653640A0D43 12D42012056007221010146006042546016046206000000000000000104800106006006000000000 000000000000FFCD0A00000000200080180180180180180200180B84000460060060820040260065 0248610600000000602600200040601600600000000000000000400A006086006000000000000000 000000FF44BE00000000000000000000000000000180000000000000000000000000000000000000 00000000000000000006000000000000000000000000000000000000000000000000000000000000 FF8BFA000000001200001000000000000001A0000000000000000000000040050040010048000000 00000000800006000000000000000000000000000000000000000000000000000000000000FF6175 000000002828A00800800C00C0080100080080A089280290280200200A0022020020020028008020 02002002002002002000000000001000000002002002002000000000000000000000FF29DB0C0000 0A80002100040140001200121044000000C008288208280202400000001008800000408000000000 01000540000000010000000508001100001000004000000000000000000000FF4933010000000C28 908800802A00800800C0080080A028A00208200280200A6420020820028035100020030020020020 02002000000000000840003002803002002000000000000000000000FFA3DB004102015C51801911 905AC1A55D15155F159400515557556046556546B57084A061560063410160060061068460062860 4000000000080000620E006006006000000000000000000000FF9EA00A00000A8000080003009205); SDR 8000 TDI (01801801800000600600600000000000400400400600600000600600200000600600600000000000 0000006006000000000000000000000000000000FF8D4B000000000800801801801801801C018018 01800100680600600000600000480400400600680000600600200700600600600000000000000000 6007002000000000000000000000000000FFC8DC00020000982880180184180182182BA008018000 00600640681080681600440E20500680608500600E00600000600601600000000000004100600600 0088000000000000000000000000FF02BE000000001C018A98438858159118018018A1E0400D6C0E 056100006006104800024206006A00407006006206006006006000000410110010C0600600200000 0000000000000000000000FF2C960000001059090A1901821801805801C01895802108E00E106004 80106E60610601000600680000600600600700600600E00000000000002000200700600200600000 0000000000000000FF6C8C000000003A95809C03C81811815801841D2984504062174EE91C902100 0503C632190600600480680E40600004604700600000001008000410104610608A00600000000000 0000000000FFFA8A0000000908210018A180381595584DA018038001826006206100000007106017 008206002500407006006406006006006000000410010810A0200600600200600000000000000000 0000FFAAB2000000008A01001801C01901801809801C41C0000870C6006441202426A06806A11206 20288020E88E00622801600600E008000000000000013006016802006000000000000000000000FF 0059000000001B01800001801801801801A01881A010506926006204005800200814044246202001 A0E00E004006026046006000000000000800802006006800006000000000000000000000FF55C900 0400001885800201819927821C01803847800007E0069C614412650008004C53413F002100006026 424050006006896010000000000004014246006000006000000000000000000000FFFF0600000000 8809800001801E4984D811845801822080401620600C4440210A9880004806004000006146044406 80E006106000000008000000882404096004006000000000000000000000FF0DD100000004084580 4001E05801801809A0190180302058060060040040C640600000400600402400600600C000806016 006000000000000000007804006006006000000000000000000000FF642A00000000112180200183 390191394B80581181000062C6C2684C004822182030A02106602000006006004806006806006000 000550000000402007106002006000000000000000000000FF434100002000500080000182180184); SDR 8000 TDI (8806000C811804208882A040001150918093008010000002800000800E0000600000000000000001 00220080208008200000000000000000000000FFC2D700004000023A86988180180388BA0020180D 800082600600600E210082804004000000004000006006040040006086006000000000000000406C 26414206000000000000000000000000FF178B000000228028B41A11933A31A35800021911824012 744600EA46C2CD0A004884046C80824A00A2EC0E88884744F2A6A06000000000000880828326C848 2E000000000000000000000000FF6C6808000040360280D881801803881941883803888021611652 608B10702228C85030001611401080600684400800601610600000000000100128200604E306A000 00000000000000000000FF4615000000000201801801801801A01801A01A01800000600680600200 40020040060000060040000078068040060060060060000000000000000020068020040000000000 00000000000000FF1653000000044001100005801801C05C44000C41844154600700E106C0100234 414401405050CA000060060040000060068060000008000000012060060040220000000000000000 00000000FFD64D000200000001200001881A21801C002208018000006046007C8702400200401408 40409050500060060040060060070060000010000000000060068040020000000000000000000000 00FFBE55000000001000800003A0180580180181200B82C140691640604A20F44A015546A4C28F22 60812062A60AA0A800E026016000008040000008006006002001000000000000000000000000FF50 E5000200001001A02001901A0180988988B089C8000063AE2AF23A0AC2A320C2060B468640E1A828 616E32225E016006006080028000000010806006002000000000000000000000000000FFE7460000 00000800800005C01A25801801835815C54040604E417545250456214D554C0150154A2C40640604 C100006046016000008040001001206006006022000000000000000000000000FFEAC60000002008 68804001801A21801801921803808010F00600640400080880400C20600056401010600600C00600 6006006000000000000000006006002000000000000000000000000000FFB60B000000021A008000 0380180180B81180D82988804262062A611450E2A64CC9504060D000F10040602643240800600600 6080048000000000006006006002000000000000000000000000FF9F0B0000000038099000018018 41801923841883842000E0D600E0440400080044000B620000604000601600200600600600600000 0000000000006006002000000000000000000000000000FF11E10000000008008018018018018018); SDR 8000 TDI (A0AA0003200AA82A83203A8860280200240AA82202012A8AA83200A82A82A92A8000000000000100 0802802A80102A8000000000000000000000FF921700080000008200000000000040001000020000 01048000001088088020000008808800810823000000000400000001000000000000000082080808 000008000000000000000000000000FFDBBD00000008048208A0AA4AA0AA4AA0AA0AA0AA00202A12 A82A8208220A80028288210AA83081102A8AA82202A82A82A82A8000000000000010150B082A8080 2A8000000000000000000000FF9B8B0002003522303341545545541543443541540100480D50D504 40C00D08A50CC0540550420500550D50CD0950D50D50550000000000000800C40540D50D40550000 000000000000000000FF508C00080043003044000020040000040040060000000080010018210080 11481021900801021400000001011001001000000000000000001201400041001440000000000000 000000000000FF7D090008000A80800A80AA0AA2AA0AA2A20AA0AA0008A802A82A82200400203802 202A02A83008002A82A82A00A82A82A8AA80000000000004100108082A80002A8000000000000000 000000FF0529000200402A24A00800800800A00810A00800800A04B00300208B00B00A8129120120 02842400802802812802803002002000000000000A00ACA0428034C2000000000000000000000000 FF04210000002002092020010014014010012010010108805004004800AA0C808248048040009108 C0805004800C01004004804000000000000910800B04004810000000000000000000000000FFF616 000000011809001801805901941A210A1001800200600641604E0C640E10601400C1060060000860 0E206086006006006000000000000308426416116206800000000000000000000000FF26A5000040 480840C34A04A00842804C00810A94B40008320A8034032130222022C35238234B308000232304B0 43303A42002000000000001021002003C23082000000000000000000000000FF82E7000000208240 2004044022602442C02025000008000A11010C40808C20A84000A00100800801000C08800820F204 09280000000000000800848A00000801000000000000000000000000FFA79F080000000C01810A00 C20B00820801250892920800200300200206224200047A042042002101002B0208200200A0030020 00000000000000082806020002000000000000000000000000FFE7DA00000002180000780808800C 000001920000402120808862001418400C001004484A084F8208300050430106000A000000000000 000004D00000111C05A4000000000000000000000000FF6B18000000112000080000204000500021); SDR 8000 TDI (01C000006006006006044026006000000046046A80006004046000002006006000000000000AA010 0006206006000000000000000000000000FF259A0000018010440038000018018018018558018040 00600600600E0962900024A455601608E04000600408C00600400600600000000000000825000612 A0B6000000000000000000000000FFED150000818010000810040418018118008C18038000286086 0060A60C600020010240614600600000602400400022410E00600040000000009000020601605610 0040000000000000000000FF6EC40008018210010D78020219089018000918438620096016406086 4942620CA0062020A611006020E00020418600406601600020000000000000200E10C50600800000 0000000000000000FF71CA00000184100100180801183480392B001801814002622600600E00448A 11601408200602010249600020402800400600600000000000040201408E20400601000000000000 0000000000FF082C0008800000000500100080C210A0AD84000000804200A0400030200010420010 1000001100800800200000560000800100000000000005100000802802C000002000000000000000 0000FF9E960000000818220C180800000000000180D00808002402104300502002100B42202B0150 008000050420000006000100000010000408200000000080280000000000000000000000000000FF E42F0000808010008008020008000008830108C082000124320820820501220021820020020E0000 08200200200244201A00A000080000028000010402008016100000000000000000000000FF205A40 080050040000040040240040042040040200A108900100100109D5812410090011116010A1311048 0E8001001001000000000020081601021005001001000000000000000000000000FF16AA400000C0 0C008C0C00404C00C00C80C12C10892104B00B22B03308305310B2830430430030C1003002092003 003103002010100420101001003103503003000000000000000000000000FFF6C300008180184580 1814001801801845801905840050644610608640600420602E50C00614E000226216006006006016 016000000008250000046006016006000000000000000000000000FF606D00000020310420200000 1401001211200401004014C00500480C8044848210D0834004904900804000888C00801004004000 00000000091080C004804D04000000000000000000000000FF95CB000000828A2880080000080080 0800800800800080200200208200200A012002082002012008002002002002002002802000000000 00020042285200204A000000000000000000000000FFC8B50000000840000A80AA2AA0AA2AA0A20A); SDR 8000 TDI (80405565565565564104C24501025405564160045564964D63504565565560000000000000204165 56510556000000000000000000000000FF143180000003380400180000180D80180100D801808200 60060060060001080004120060060860140060460060060060060060000000000000080060060100 06000000000000000000000000FF55EA0000890A98898018000AB8018AB8A392B8AB80802AE2AE2A E2AE3242040060142222AE3060222AE2862260AE2A62AE2AE0000000000000020062AE2002AE0000 00000000000000000000FF68A9000005003805901800001825801808881801804000600600600610 40845004280020060360040060361060000160060060000000000000204060060200060000000000 00000000000000FF08FF00002100084184C000001891001801801801801000600600600600C03404 E10008E0060800000060020162060060060060000000000000081360061100060000000000000000 00000000FF75B9000001002811802000001801801810901001C0200060060060860942940064A055 60D60004080060020962000060060060000000000000080460060D00960000000000000000000000 00FF99570000019298C580000000180180180184D801801000600600601604602200000400400600 0100006002026006002006006000000000000280104806400806000000000000000000000000FF33 22400001A41B058A80AA0AB8AB0ABAA28018ABC0802AE2AE2AE2262460022A805A0042062A90102A E2AA3060A82AA2AE2AE00000000000106074C2AE000226000000000000000000000000FFEE3E0008 01A04A45841800001801001801820801A02000600600601612644200012801411608602000600404 600600200600600000000000000011700610D106000000000000000000000000FF571B0000019088 21935954155955155954804955808055655655653609623255608000C54E55610455655443655055 2556556000000000000000007556354457000000000000000000000000FF11010000018A908088A0 AA0AB8AB8ABCAB8898AB80002AE2AE2AE2A600E0082AA0044402062084002AE2AA28E4AE2AA2AE2A E0000000000001482022AE20240E000000000000000000000000FF9CE30000018030088008000018 008018008C980180200060060060072060810002004C000600040000600200600000200600600000 0000000308008006006086000000000000000000000000FF8D880000018A80908A80AA0AB8AB8AB8 A20858AB81802AE2AE2AE2A6E04106AAA40A1002C62461002AE2AC2062AE2AA2AE2AE00000000000 0400042AAE042246800000000000000000000000FF84024000018020088000000018008018110018); SDR 8000 TDI (005464060D62A00062920CE0A602A24E00020004601620020600400600600000000000000010004E 406304080000000000000000000000FF905900000040110089001200182382180108180380000860 0608E00440208602E02600000600400000600600400000408600604000000000017000048E24E016 410000000000000000000000FF98FA0000000010A04000080098058038890098119C001264362060 0C06240604601E5824C626C02008640600C00600C0060260004000100000000021260B000E288000 000000000000000000FFB9B8800000020001C29000023801809843043801808040620F0464A0A16C 0A50210482E42E0044000470565042C8442016106020000000000510108206006484000000000000 000000000000FF6BB8800000200003001A00001A11A018410A1AA180A044612604743028610A0924 2404A1165040289260A6304406822807006000080000520010022806200004000000000000000000 000000FFF0D3800104001005801800601803801821001C898A01A87C06406005053082407A400000 96282000116006402240042007006000000000200008141096217806000000000000000000000000 FF1BD3800882401000401C00401C01C21803549C418040047106AC6404C0A862A1618514304605A0 5084E84600202680280700600000000011800008200F000007000000000000000000000000FFE027 000000600800C01C00201E09C21805011001810200604F08703210421612400F20E206004005007A 86104001003006006000280008040000004006006006000000000000000000000000FF34DB000800 00084884D800001821801801041001810200600680600300505604C5260000061340068060AE0044 0680A80600600000000000000220C00602E006000000000000000000000000FF925700000002B802 C00400001901A01811209C018022007006006002004006D0000F1508060020000060060020001020 07006000000000000040126007300007000000000000000000000000FF29E70000AA081880080000 0AB90B8AB8A30830AB80122AE2AE2AE2AA2AC2C61000023002AE20200C2AE2162AA0AE3222AE2AE0 000000000000084562AE4002AE000000000000000000000000FFC408000820000801C00000001829 80180003100180820060060060060400160804440160060420420060260020000860060060000000 0000000A0A6006020006000000000000000000000000FF261D0000AA2808B00AA0000AB8218AB8B3 0A18AB80502AE2AE2AE2AE2A820622812422E2AE2320042AE2862AA2AE22E2AE2AE0000000000000 200862AE0A02AE000000000000000000000000FF43C8000114553935B55800155905955954003955); SDR 8000 TDI (8001080100004400C8C403480018800401000A0000000010000A0800000000000000000200000080 0000000000000000000000000000FF657700020000000000000000000010002203800800002A0000 0000408002000C800004800084000200000000000080000000000000000000010000000000000000 0000000000000000000000FF3FFE01000008808444C00040020000000000000000010000008000C0 1000010882B04008000400088000000A00000010008000000000000002C040880011004000000000 0000000000000000FFC4AB0000002220200000000000000000800000000100000800000810010130 02000094800010800000000000040001000000000000000000000A0C000044050000000000000000 0000000000FF88BB88000004480C8808000AA8AAEAA82A8AAEAA80202AA2AA2AA203A22353202042 1032AA2020012ABAAA30A0AA2A22AA2AA0000000000000021022AA00200A00000000000000000000 0000FFD66B8008004041014000004010014010004404010000805005005000000044800044481004 0000010040040480000110048040000000000001000B4804020900000000000000000000000000FF A4AA800000691801D55800555D55955855955B558101557557D5754E536404C06215206556446000 5565564265564575575560000000000004C0427556126086000000000000000000000000FFD88500 00000A88008AA8000AA8AA8AA8AA9088AA80A02AA2AA2AA2A22AA10A2A23020422AA32A0002AA2AA 2820AA2222AA2AA0000000000002480022AA40A40A000000000000000000000000FF7FF208800000 00D04000002000004001004000000021000800001000000000148100049000110011000000008000 080800800000000000000010010800408A48000000000000000000000000FF87F60000000A88F540 08000AA8AA8AA8AA8048AA80002AA2AA2AA2B22A24022B22920122AA2020402AA2AA2224AA3222AA 2AA0000000000000006802AE1020C2000000000000000000000000FF2FDD00000040380410180000 0000000001080000000000000000000400448001400814C000000000000000000206000000000000 000000000010000000490448000000000000000000000000FFB95E80000000000804C00000000000 000182A00000C0000000000008010048000040400000130020000000090006110000000000000000 0002C0028000020000000000000000000000000000FFDAC6000000200041A0080004980380588104 5801890000602E4060100360024060161060864500201060260900B023410E0C6000000000000400 00C08610E002000000000000000000000000FFA55C00000044100152000200582184985309180580); SDR 8000 TDI (74164028874504840075060C620609600000600400600004702602005000000000008010002000E0 0E000000000000000000000000FF4CE5008001001808801815801A49835815009000A00008407608 E32E10203632404620E83614601AA0610604643E0060160000500005000000408600010040040400 00000000000000000000FFC38C000001001800001801801A018018010A1803800024480600601608 210618400E00688611662200608600E00028600E0000000000000080020400000050160000000000 00000000000000FF6F46010001001811801800041809825801D4D005A040104206012147016406C4 54061564060068210060040060462270460000000000000100010800000040060000000000000000 00000000FFC2300000010018018018000018018018118010A0000020C02E2822062C004600410E40 61260060104061040160101060160400280000000001000000400140060000000000000000000000 00FFE41E000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000006000000000000000000000000000000000000000000000000000000000000FF4E A5000000001400001001001000000000200001000000000000400000400000000000000080080000 0800000806000000000000000000000000800000000000000000000000000000000000FF57030000 00800800000800800820A82800808800800080208A80202000200202280280248A02200800200208 2002002002000000000040000008040000003002000000000000000000000000FFE2FC1000010000 000000040040002080050400006800008000801001408480000008000000800000000800000C1000 1548000000200000000020800000000000000000000000000000000000FFCA30000000800A008008 00800820802802826800800000288A002002202AC210300304208A60380800200208200200308200 0000000000000D08020000002002000000000000000000000000FFC10F000511001B158038818018 3581388570D0B5880081604F046C17A443160570AE0161070360C00C600600600F00600E00000000 0000000000000000006806000000000000000000000000FF27430800010002010000020020011090 510416000800548D0411014400C86058040C10460410480000400000420840462C40000021002000 0A20010000000000000000000000000000000000FF9FE700010880091280490080080C800A00B049 0490008122428C24B200200300300208220208A04000200200200220300220000000800000000000 8001002002000000000000000000000000FFBD160000000000000000000000200923100000400000); SDR 8000 TDI (264060160060060400CE42701680608400640610600000602600000000000040000000C006807000 100500000000000000000000FFF3CC000080201901A01840011949A41890201841A200104C8E10E4 06016506D1640711600610E81400700600680600600600000000055100082C206006006000000000 000000000000000000FFD98F0000018018000018042018098018018218A08000006A260020460022 4600600602E10660E04D00700700600601E006000000000000000904000001006004000000000000 000000000000FF5C990000818018A10058018A1C018C1821D04804120001209710240E01A1265AE0 06A0680FC07024006206086000006436000000000000000081148040016904000000000000000000 000000FF300E000601009E0004594A211945835889801800000010681630BC270071064075360860 86106900006006006006006006000000000550200028C00001006004100500000000000000000000 FF71CA000001001809001801801C018018018018000004942026C0A15694640E006C8E0C608604E0 B008622E00620020E126080000080000001404001000A2680C020000000000000000000000FFCEDE 000000800000001801801801801801885E04E200A560C61060A40020448860178B610620E02E1060 0400630601612E000000080000000002000820106884020000000000000000000000FF2DBF000000 800010001801C01821801801A198A0020030229741241535293483E12620E2668461000060440060 800064061200000000010004000407804C6076000000000000000000000000FF2364000000000000 0038000018418218018018A1A800006C068028042062042464464064060068040062140060062060 0604000000000000000408000100E004000000000000000000000000FF77EC000000080208029881 801E05809803825800000080600680200400010484602600600E00600C0060040060000060060000 00000000000004000000006006000000000000000000000000FF4ACD180001800506001834000199 905820A11980800080601601A1060024C4706C8686600615E4006060060060060060060008500001 18E0039020060080E004000000000000000000000000FFE9A6000001800001001E2060A041801850 800821800000E04600600610200C807107006006007000006106046410006016001000000201000C 20440009016004040000000000000000000000FF6CB9000001880111031880014003901800E4C840 0000017006002006000244826206006006006A000060040060060060060000000000000010080000 08006806000000000000000000000000FFBAA90000018000010018000400018058088028A0204003); SDR 8000 TDI (A0A42604E906D56AA6A86C068908308160A750E80603724E00000000000000080082600E00608000 0000000000000000000000FF6F7608000000B84D8018058038038038000059010001202006126016 28600E00600E00E1164042000062060061000061060000000000000002001161072A620000000000 0000000000000000FF4872000000001801801801801E018018000018010000802006006006006006 80600600680600400000780600600600600600000000000000000000780780600000000000000000 0000000000FF47E30000000000419058000018019019400031419100002016C03046806814082004 007006A0A08200601614600080601600040004000000080240600600600000000000000000000000 0000FF8432000000000001801A84001801F03800001101E00090388F016407007004822204086137 022020006046006007006006000000000000000000006006006000000000000000000000000000FF BBE8000000000001801800000041809840309043848004E4260870CEC8E34C8100CC00E206006408 A0680E006000026426080000000000001A80026006006000000000000000000000000000FFFBC900 0000000001801A0000000183980A083C09C0002AE2261263863AE2A42EF7AD23E0AE0E62A868E0F6 20E0260C6066308008280080008500046006006000000000000000000000000000FFCB9600000000 0001801905801A41905840113CC58500154556814C56416554110054106D56210CAC006006806000 806406000000000000000000006007006000000000000000000000000000FFF63900000000008380 1802001881801800069803822090408608800F006404800004086106200044007006806006006046 000000000000000804006006006000000000000000000000000000FF8DEF00000000000388380380 1B0188184C502829C00021000728CC4632614C13140534682640281128E056116001006016010408 140080000000206006006000000000000000000000000000FFA0D700000000012180180180180182 988001190392C00404B604608E00E0042000D400E0160A2500006086426046106006400000200000 008000006006006000000000000000000000000000FF8BC200000000180180180180180180180000 08018000004006006006006006002006006006004000006006006000006006000000000000000000 004006006000000000000000000000000000FF587500000000180180180000180180180040180180 00004806804006806006802006006006004801006007006806006006000000000000000800006006 006000000000000000000000000000FFB975000000209821A45891AC1803A93840020101C0000040); SDR 8000 TDI (02A82302A82A82A82A82A82A80102A82A82A82A82A82A80000000000000001000010002A82A80000 00000000000000000000FFE5DE0001243503523542C43105541543343044440020C50D50D51448C4 0C50450550550550D50800D51400D50B50D50D50000000000000800800800000CD01280000000000 00000000000000FF2E39000840400500400500402600000040040400000000000100900100100100 00010008000010010000010010010010000000000000000010010000010010000010000000000000 00000000FF44510008800880000AA00808C0AA0AA0A000028000802202A82A8B200083A02202A82A 82A82A80002A82002A82A82A82A80000000000000000600000002200000000000000000000000000 00FF840400004C204A04A00B04A42800A00A04500800800081280280200304280280280280200300 282080284B002802803002000000000000800800802002912500000000000000000000000000FF97 BD0002002202B120022020040120100802B255004090080480011430481089400000400480080080 4885004800005004000000000000000A00000004804828000000000000000000000000FFF68F0001 00001803801821821901801842221801800015611600644640E20600481608610648652000600620 6006006406000000000000000000006016146200000000000000000000000000FF3B69000000414C A8D34D0CC14804820A8811490085212022432C2812803002443102A4282304301000308300305281 3002000000000000011451102003402000000000000000000000000000FF0AC60803202060002042 8020030200040001030009009485008402088008008802B000010100082900080088080100082000 0000000000000E00108000B00880000000000000000000000000FF04AE0000000008009408008048 0080080000020A0400213032183002202002A0A00300200200A60100A20200200300A00200000000 0000000000003002002000000000000000000000000000FF3D63000000001A0400384785180C4000 024000A000004A5000620C40488480004808F00A007C01400001806000C600048000000000000001 00000860800A0400000000000000000000000000FF28C80000000282D803000000A68048A0485220 0002C000000800882181000804000008108800000000082000800680000800000000000000004002 6800040000000000000000000000000000FF6E860000000119238019180018018419142C58010000 0028C600201602600642610604E04600001000600600601003620600000000000000001000601EC0 6200000000000000000000000000FFECB2000040221901A23A88211911A9180A0C1A3315008D212E); SDR 8000 TDI (06006006006000086006006300206086006000016206028200000000004050036000084000120000 000000000000000000FF80260008000018011018D892A10182180084194184202C600E40601609E5 666064104564360260C8006036006006006016008000000000004000406618000200000000000000 000000000000FF4A6600008000182102380084404184990080B80B810050631600604610600E08E0 8000614644601010E246006000026006000000000000004500006000240400000000000000000000 000000FFBE100009000000541440400801200900A004C03400800482002204100005081004882204 1020044020640000000604E01000000000000000055002E000400000080000000000000000000000 FFB79300000000580000184181384000400000002201000000004840C84000080C828C1082000400 00486000028006006100080020040400400008006000008000000000000000000000000000FFB5BB 0000200088008208008808008008A080890086220021021020420220022120021101020020001321 1200200200240204040000000002000068A220340000040000000000000000000000FF53BC400C00 00040000000000044040C4005904C00D032A12880293010882810010312010A90892811492812400 01009000000000000081001011101441001000000000000000000000000000FFFBC0400440002C00 800800908C00C10C40C00C0280013234922C341321210344B4A311355313350300B1030020030130 0208000000048144300340300100B000000000000000000000000000FF1D60000000009801821841 803801801901801881884000600600E02614620E1060042060060060002062062160060060860000 20020000006000016000406000000000000000000000000000FF7ECF000042220202200220200401 2010001414550080840000841005304800804005004804804888800805004A008010040000000000 00004800800000005000000800000000000000000000FFA1A4000000004920800904842800800840 A1280080203028025020020420020028020020020020000020020020020020020000000000000020 00002000802000000000000000000000000000FF84F70000880880480AA0080C80AA4AA08A504090 01010182A80482A81082A82A92A82A92A92A81002A92A82A80A82A82A80000000000000000E00008 002A82A8000000000000000000000000FF2231000810004000000010020000400000048108008010 00000000000900008810010008000000200000C80000000000000000000000000002000000000004 00000000000000000000000000FFA5D700008C0AC0120AA0320880AA0AA08C00812200402A12A848); SDR 8000 TDI (2AE22E2AE00E3202AE2AE7002AE2AE2AE0AE2AE2AE0000000000002242002AE00022600000000000 0000000000000000FF66AE000000001801801801801801801801801801804008E006132006006106 00640000800600608400400600600000400600000000000000C04000600000600000000000000000 0000000000FF05CF0000000018058018058058018018148018018080006116200006006006006122 08000600604000600600620600600600000000000008408800600011600000000000000000000000 0000FFD4CB000000020801801821821801801800811801A0C408600604A006006006446002000006 056088004006006000004006000000000000004120006000006800000000000000000000000000FF 4EF30000000040008019058038018018018418018004036004504006006004116006002006006000 006006006406006006000000000000006000006000006000000000000000000000000000FFF81B40 00000880AA8AB80988D8AB8AB8018838AB80002062A80042AE2AE2AC4062AE2AA2AE2C70002AE2AE 2AE0A82AE2AE0000000000000070182AE2A82AE000000000000000000000000000FF4CD100080000 10008019018438018018018438258006006004104006006004206016006006026000006006006006 006006000000000000006000006000006000000000000000000000000000FF8C1200000015115495 58C5901955955801823955800240E55409455655655411655655655649600C556556556550556556 000000000000006000D56550556000000000000000000000000000FFC9B00000000AC0AB8AB83209 00AB8AB800889889A1202B02AA0242AE2AE2AC08E2A62AE2AE30E2202AE2AE2AE4AE2AE2AE000000 0000000040482AE2A82AF000000000000000000000000000FF7CEA00040000400180181005000180 1E009118018120140006426006006004026000006006006080006006006000006006000000000000 0040C0006000006000000000000000000000000000FF93FE0000000890AB8AB8080880AB8AB80000 188980802A82AE4142AE2AE2240462222AA2AE2060002AE2AE2AE0AE2AE2AE000000000000004620 AAE2A82AE000000000000000000000000000FF8F4B40020000500180190402200180180080380180 0000000628600600600411600A002006086840006006006000006006000000000000004800006000 006000000000000000000000000000FF2E200000000208000018208000018018008C984580200060 0204C00600609644610000600604E200006006006206006006000000000000004008006000004000 000000000000000000000000FFCBC0000000000814001900810001901840801801802000E0020C42); SDR 8000 TDI (611600C1FE0061C602602048E32601E00400600600000000000040000000E0062060060000060000 00000000000000FFA4C7000000000401A01C008C2409801800001885802020420E02008600608400 62074D6C160064002011170460040400460000000000000084904C65160060060100060000000000 00000000FF3C2E800000210041801800800041C4180A0038C38000944526000116236444D4E40630 E016556400910006546104840806000000000200000000010006A860060000060000000000000000 00FF5BB4802000000001805800E04021D4580400110D9300025A96101C0FA0E22522620608600603 62010AE0362A6004026006000000000400400000009806006006000006000000000000000000FF89 DE800020402041C01C10A0A301C83800005C0988C010500F206347106104117106C1761690600082 602E8061048070060000000000781F8000006006106006000006000000000000000000FFBCBA0000 2060C401401400009C01A01810001821800100284640A00602600C00602F0070A640600020708700 E005007006000000000000000000000007406006000006000000000000000000FFAD4B0008000340 35000004201A0180184200180180C01004860920060060040061268B600680650C80600680640480 600600000000000000008C00600604E006000006000000000000000000FF4BB00000001000012014 00003801801808001C01800201404E80200680600400740600700600600000600600600400680600 0000000000000020000006006006000006000000000000000000FF5D6C0000000140812AA0A82A98 AB8AB8800AB0AB80022204062262AE2AE2AC2AE00E3462AE2AE0002AE2AE2AE0AC2AE2AE00000000 00002A82102AE006286006000006000000000000000000FF0B56000000023820801A000018018019 20001801810000200E45600600601600411600600600600000600600600000600600000000000000 0010000006006006000004000000000000000000FFE3B70000002A18CA8AB8AA0A98AB8AB8A80AB8 AB80A02A20A63282AE2AE2AE2AE3362162AE2AE3102AE2AE2AE2AC2AE2AE0000000000002A80402A E00632E006000006000000000000000000FF8F62001000511914D55B345559559558141559558040 4D25461065565565465564464565565560405565565563505565560000000000005482C055000654 E006000004000000000000000000FFCF31800000001800801800003801801804001801800000A016 00600600600600400600600600600000600600600400600600000000000000050000600600600600 0006000000000000000000FFF2120000000AA8A98AB8A98A98AB8AB8A18AB8AB80002262260002AE); SDR 8000 TDI (00000000800001000410000000000000000000000000000000000208020800800000000000000000 000000000000FF75F500000020000000000000220000000000020000004200000A88008000008010 00000000000040020800800200020000000000000000000000400000000800000000000000000000 000000FF04178800000AA88A8008AAE8C8AA8AA800088CAA80200022AA6422AA2AA2AA2AB2AA2ABA AA2AA00028A2AB2AA0AA28BAAA00000000000000002008A2AA2AB2AA0002AA000000000000000000 FF5EC6000800400000404400202201201000201201000000C004C81005004000C008040048048040 00001005004000001004000000000000000040004004004004000000000000000000000000FF5D95 000000711911D53D55951D55D5580031195581003075560075575565575565575565575562505175 56556356516556000000000000000428555557556556000556000000000000000000FF6EDD000000 0888CC8A88AAAC8AAAAAA80008CAAA81200222AA8022AB2AA3330A2AAA2AA2AA2AA25028A2AA2AA2 AA28A2AA0000000000000002080AA2AA2AA2AA0002AA000000000000000000FF410E080000022022 20040000000000000004200000400480000910000000000000000010008000000208008000000210 00000000000000000000004000000000000000000000000000000000FF3CA80000000EE880C808A8 8888AA8AA8000400AA80005002AA0522AA2AA22A0122AA2AA2AA2AA0082CA2AA2AA2AA2CA2AA0000 0000000000000048A2AA2AA2AE0002AA000000000000000000FFFCA1000000401814001805843800 00000002200000022880000480000000000040000000000000200060000000040060000000000000 00000000006000000000000006000000000000000000FF5D0980000000002044C600600000000000 09000001220200005000000000805300000000000002000260000000060460000000000000000002 28446000000000000006000000000000000000FFC4EB000100201801C11442C11803809800110801 88C00440B60822060360060141060063060264A02800060360040200260000000000000000402862 0E006006008006000000000000000000FF6D7800000840184184200082580992580002090D840048 440604A15600630600622E48E04E0060000503560060040000060000000000480101000501062060 06000006000000000000000000FF8694000000401807023A00B018018A38000AE009800009C00600 A00E50E2060060060460260060980260060060040060060000000000280004300000060060060000 06000000000000000000FF842400408800182140D8328099038098000000018EC00240A61962663A); SDR 8000 TDI (00685640608202600000692410600604680600000000000010001000800410404600080600000000 0000000000FFCE38000000000001201A01801841801A00A11200B0408960170A0436906106C36104 00690604601082000C00600600002600000000000802810048810400400680000200000000000000 0000FFF55B00002000A0210018218018818038409038308000224086008006426416086000156446 116540110444006406000006000000000040000040006024004006000002000000000000000000FF C4F20000000000000000000000000000000000000000000000000000000000000000000000000002 006000000000006000000000000000000002006000000000000006000000000000000000FF183800 00000000000010000000000000002002000000000000000000000000000800000000000801007000 000000806000800000000000000800006800000000000006000000000000000000FFC59C00000000 02088808202A02008088000088082080002002802A8220302224A00300200200204000228C80A20C 002022010000000028240000084000088286002002000000000000000000FF77D905000000000000 001520B0000820000002003200000000220808040814080400A00010000200800000000000001484 800000000000000080000820004001800000000000000000000000FF16CF00000000046088080888 0C00800B00C00800880000200200208210202200A04201A00211200060220200A203002222008000 00000880045840202208A082802002000000000000000000FF538F0501141105018C583185581180 B92D8D595593404A608E5174961164C64A7A0600620E206208006027016006007004000000400000 400800004006006006006006000000000000000000FFE04202800000404000000310B10128300100 00010200011C4406084D0A581C094A60404148000260100004C05804000084000000000020A000A0 284005004004001800000000000000000000FF046F02810A088500922848932910814D14B50A5090 20422002D0A10A91200200202220200200282008202200A002002002000000200000200000002002 802002802002000000000000000000FF970700000000000000000000000020004020030404800002 50800200000488100200000430400C10000000200000000000000000000000000001800000000000 000000000000000000000000FF6AAD00000000203000004004000001010001201001000880814204 20400020668000400080111000001111000010001800000000000000040400000000000400000000 000000000000000000FF428B0000000000202CC40002000040000002200001000908000000000000); SDR 8000 TDI (6007106000004280A1600600680600621400000000000800012000600600601E0060060000000000 00000000FFC190000000000049801800931B89C05B41521427A06A08FC072070160274072C680608 682010511002E0160060060060260000000200002600C9D002060870070260260000000000000000 00FF4DA1000000000045801C01101445801844809009080000604604695710641603644602640000 400080600604614600700E000000000140009200007904406046002006400000000000000000FF5B EF000000002001841801001203801C10C55441C000226006A06006A2611600602600600000C00204 600600600602708600000800020000028B000205006007002006000000000000000000FF810E0000 20000001801809001801801881813040A00008E00600600620628600604604785200448800600E00 60060061060000080000000202A8106206806006006006000000000000000000FF1C6D0800200000 01801E08011801A0585314100000400CEC1E4BE0E605E866E8620662602A024A6004600600780604 700600000000000000080006000E206807006006000000000000000000FF1ADA080000002021C200 01101483801A02001403001020600612610E8068161264060070060D680300600600700600600600 0000000400000002A0600E406006007006000000000000000000FFE6490220000000018008430210 43801800001801100002680604680E80600640604E04680604600008600600600600610E00000000 0000020828008016806806806426000000000000000000FF3A0F0000000000018C58008050298119 D18218018048006006E074461C604621F02700680618400088640660600480600A00040019805071 810040E047077007006026000000000000000000FF8A9D000000000001881800809091803805F210 41E100106C1700000620608600700620600600600340610600620510600200000000028000080204 0406006016006006000000000000000000FF50A7020000000001823841001005801A129010208142 826806846016207106006807A460060440020000860062040000020000000004D00400D340021400 6006802402000000000000000000FFA4F400000000A041801801001141805A21D010408242216116 09622E4C600752E00E12604600682802000E0862040200220000000000080C80084860C400600600 2002000000000000000000FF0C550040A0000001001A25855901815841803888B800186616026446 846AEE0060B720E20208C28048EE840070061069060004000000201000A004604409403600400600 0000000000000000FF0277000100000001001801801A018018018691008400026C06000006007046); SDR 8000 TDI (06806806806000006004000006006006000000000000000000006006006006002006000000000000 000000FFA74F000000000001501045841011810A41889A4191420424264860660455460048040168 87286000000006000004001004000040800000000000006006006007000000000000000000000000 FF5D73000000000001C01001C01201800801C018218022080801007C8644400600432602600E0060 00810006000404021004000001000000000000000006006026002000000000000000000000FFB940 00000000004100120B001081A00A85801B138000000016C4200601454ED2400A20E2060464A9D060 0E0200A4806A8C280000000880000A20000006807007004006000000000000000000FFC84E000000 000001801085001701880801821AC380000088EA02B24E2CC80E2ACBAE6F632E0AE3A802E0BE0C89 AC02E6B4580088088000020440806006086007006006000000000000000000FFDF9A000000000021 201011801001801905089515E040906016546506C16557540C5400641654644C516806000C260461 06000000000100001004000006006827000006000000000000000000FF572F000000000209901101 801201A218C90DE8418019394006186886006006000002006006046000007006A012060060060000 00001000000000006007006806002006000000000000000000FFFB64000000000009C01A03821811 8D1301901005800020455724640704434E304D0E05642611612500611650808E80E9060801481080 00020004000006106006000806000000000000000000FF3B48000000000001001821801801801011 801101894004400601615628C00602C04628601600621004E0260002460262260000000000000000 00006006006006002006000000000000000000FF5EF8000000000000001001801001801800000001 80000060060020060060060020040060060060040060060000060060060000000000000000000000 04006006004006000000000000000000FF3171000000000000801201801401801801000801800000 40060030060060068030050060068060000068060000070060060000000008008000000068060060 06006006000000000000000000FFC75E000000000040801801901821801AA1001831C001004806C0 21460850060062040060260060042260060400460064260000000000000300000000040060460040 26000000000000000000FF3B21000000000004001801845885C41805021C03883890405284A81600 4A16D26040047206806500006806001106807006000000040950C00251006D065060070460064000 00000000000000FFC888000000000011801801803811C21A81811401801A01600E00E00604600601); SDR 8000 TDI (00180100100100000100000104100800000000100000100904100000000100100100000000000000 0000FFABEE0008000000881480A408C0AA0AA00000008200041802A80202A82A82A82A82802A8220 088000288B202A8A202880080000000000000000000A82002A02A82202A8000000000000000000FF AC47000000200400AA4A10A00A00C00808C008008002C12802802802802802802843002002802810 842012800102823142000000000000800810802802000002912802000000000000000000FFF30000 00000002242012020230010001222B52290122840000C8800500100500480C804894A44840800085 00000C801404000000000000000840A048A8814004804800000000000000000000FF6E1E00000000 40018C1805891A21901A05801901800020E80610601600640E004006006206016440106C06220C06 00608600000000000000040001432600680600C006000000000000000000FFA43700000004055080 4C30A0080AE14C2094C828800112324344AD034020825035222C20230C3011202002000143503202 000000000000001021103002002142283202000000000000000000FF00070000000202402C108000 10600040022820080200880C0080100080080080082C200800800880800604A00600900820000000 000000000880B80900804144800E00000000000000000000FFA5460000000000A0802000A0020080 0800A14002800061220200B6020030060021400228021DA478302020000004002004000000000000 00000000404200280A004002000000000000000000FFA9D200000000410110C4093B240A42144110 841000001280241700100807A00006010484E0000200007008401000406580000000000000000028 0160060A0AA04A0006000000000000000000FFDF910000000000086000762002801120A402074000 00000048000900008801800001500808820000007000081000006008000000000200000440006407 008001110006000000000000000000FF88D0020000040012021801801815888801A418A180000460 0640400660601650200000620620600040880404094620000600000000000000000000E006A06806 206000000000000000000000FFB9EB020000040294889A51885801A0A2418C58258200816A068344 06A8620600280680602E456808C08424200406A01016000000000400000820908806216406884C00 000000000000000000FFC61F0000000004208438832418B38C0885A1189180004A602E80400600E0 C600222EA365060862A0006015080806006146000000000000000090C00006146936441006000000 000000000000FF8EA700000000000000180180180180020180180180040060060040060060060020); SDR 8000 TDI (60260060200004040020060000460100000000200064000160060100100160240000000000000000 00FFB57A00080400000400002A0000A00B01020200C012401200005500202164502102A000002000 002800648000000014E04000010000004000008000E3064500C00A0006000000000000000000FF6B 3E00008000800000300100104200400800000003000104A01482500C65100D000428014800010000 6200000410006000000000000020408200006406408200000006000000000000000000FF1B310000 000828C98548A29C080080088002088A810002214200201210202424202211A00200200004204C00 A000002000000000008108082450000002000000414002000000400000000000FF544E4008004004 0240040050044040040044040009012810082010816090011012C90212012210081890810110A419 9004000000001040021001005009411001000000000000000000000000FF7ED8400100410C04C04C 00C00C04C04C00C00C0094012D351245308300B41301311354305304310801350300350200300200 0000011010523001003003001001002002000000000000000000FFDE600000001059090019258018 0180189180191580000060260864360A60C644440600E28620600000601600604E00600600000000 000000E40000420E000400004006000000000000000000FFBA7C0000000002012002A22002002010 050014110144000000908800800804804A0880505480082080000400000480100C00000000080000 0820804800000000A14800800000000000000000FF95D4000000200800824808800800800B08A008 40800000200240200200200200214200210200200802280200280204208200000000000000200840 2002000000122022000000000000000000FFE11A0000004000AA0880000AA0AA0AA0200AA0820000 AA82A80202A82A82A92A80012A82402A80402C92A8AA92A82883200000000000000000000A82A9AA 8AA80402C8000000000000000000FF293E0008000000000100000100000004920002880140000000 4000000010010000200008080900200010000010080200500000000000000000002200A010000110 0000000000000000000000FFDED40000000000AA0920800AA0AA0AA2022AA08C00C12A82A82882A8 2A82A82A80402A82882A80102882A82A82A82882200000000000000000202882A82A8AA828828800 0000000000000000FF8C6F0000002003342043303203543540202AC0420000C50D50930D50D50550 550C90D50540C40810D50450D50540D10C80000000000000800830910C10450550450D5000000000 0000000000FF75490008000004004204544004004003500006400000000001041001001000001510); SDR 8000 TDI (0634C00200600E10000600600E00000000000000C100006006000000082006000000000000000000 FF01F4000000001422800000001000803841021801800200444E0120060040041520D60060060048 04006006000006006806000000000000004010200007001000002002000000000000000000FF6BD2 00000000180100180000180180188A09180180001060861260040060060044060060060041000068 060000060460060000000000000040200460060000008D0046000000000000000000FF1E14000000 0018894ABCAA4AB8AB8A98040038AB8000A2E0062002AC2AEAAE3440162AE2AE2AD6042AE2AE000A AE28E2AE0000000000000052808882AF2A92A820028A000000000000000000FF94E3000800001314 008800003001809812005801800100604601400600600409010E0060060068000060060020060070 06000000000000004400006006800800000006000000000000000000FFB3DF000000001112154954 155155955800111955800054E036484556556554400306556556556104516D560025565575560000 00000000004200510556550550500512000000000000000000FF882E0000000018208A30910818AB 8018C01318AB800020600E3262A822F2AE2240262AE2AE2AC2802AEAAE0052AC2AE22C0000000000 000061014AE2AE2A82A92C42AE000000000000000000FF65094000000010208010010010018018C9 043801800000628602E0000078060158460060060060000260060058040068040000000000000061 5184000600000004C022000000000000000000FFFB42000000001808881A470F18AB9458818018AB 80001565022AE2A83062AC2244062AE2AE2AC000288A260042242883240000000000000060002882 AE2A82A8014288000000000000000000FF7265200000001080C09811401001889803809801800408 E08600600004600400C0060060060068000000160041040000840000000000000068800460070010 00254044000000000000000000FFC3630000000018458258C080B8018258300A5801800044644E00 600609600410254E00600600450004608400200E0460160000000000000062000060060000001060 06000000000000000000FFF05B000000001805801800801901841881103903880000640A23620E54 620440200609628E0061000260C40020060A60060000000000800060500004460000800C60020000 00200000000000FF8D8100080400188181185080180710182888381B854000620A00624602601600 214E00628E00609018000400200601018600810000000000610006013E4400484060200000000000 00000000FFA3B30000000018A18258048C102100985304182180000C612208600600E04204A21600); SDR 8000 TDI (8C4048000046006484010004000050000046080000080000006816004004006000000000000000FF 8665800000045E48803003913801805905821881802200220008520600609212C4C6006106006010 106006006504006004000020000026000000080001806006004004006000000000000000FF5C1380 0000121922C01009869C01C038098218219602312A9042D084D3F6068042B69D6496644040086047 006004006004000010000006440000006006007006004004006000000000000000FFA7BB00000000 1803A20408001C0061140980544101044250A002E0AC02702420000720702710E204006006006006 00E20E00000000000E100000000000007014004004006000000000000000FF314200080000180184 004000182200109580000100100048402061068060C3080006806006006280006006106006006006 000000000006000550406006006004004044006000000000000000FFFFA000000000180480000280 1A018010018018010000004310133004007016024006002006004004006006806006046006000000 00000600000004000000680400C004006000000000000000FFE5230000000AB8E88CA0888AB8898A B0618AB8AB00002AC04010222C2AE64630C2AE2AA2AE2AC0002EE2AE22E2AE28E2AE000000000006 2A84000CE2AE0060042A42CC006000000000000000FF0E2F00000010383080202302384300188180 0001800000202000600400600408A2D60000060040840060060AE006006086000000000006000100 000000006000086000004000000000000000FF8C5C0000000AB88288008D0AB8A90AB8898AA8AB80 022AA4800163342AE00C2022AE2A82AE2AC28028E2AE2A62AE28E2AE0000000000062A804808E2AE 0060002AE28C006000000000000000FF11D200100005190293011190991195584D95515580004CA4 9030E4545564CC4460065505565544065564D640655655644E00000000000654820A550550006006 44E550004000000000000000FF4A6580000000181081404180180580180380180180000020102260 04006100056004000006004000006006016006046006000000000006000100206006006006006004 006000000000000000FF257000000000388B0800880010808AB8800AB8AB800022420406E3042AE2 8622E0042AE2AE00400028E22620222628E2260000000000002A426808E2AE00000022228E000000 000000000000FF793A00000008104100200010904080180200180180000040844000CC0040260062 8600600600448404610602A116046086000000000000004000420006000000012042000000000000 000000FF06A7000000031800850024025014801829001801800208C03608600600600C08202E0060); SDR 8000 TDI (A00028A2AA2AA2AA28A2AA0000000002AA00003828A08A2AA2022AA0AA2AA000000000000000FF20 79000800001000400200200004404001405401000000C0000A005000020400500100480401000004 0104004004000004000000000004000000004000004084000000000000000000000000FF14040000 00555921D55911955D01955955A45B55800254600050E55653600E40DD5643655655620055655755 6556516556000000001556000500134517556436556356556000000000000000FF26F70000000AA8 AA888880AAA8088A88AA9208C880023220002122022AA02A2224232AA2AA22228028A22A2AA2A228 A22A0000000002AA0000202AA0AA2AA22022A2AA2AA000000000000000FF77AF10000000000C2004 2400001040000008800000000000000400000002A40A000010080000008000000400000404000400 0000000000000020404020000100000000000000000000000000FF2B6D0000000AA8AACCC8D4CAA9 408808AA81808C00002240000021022AA30033A1922202AA18200028A2202AA2382CA32000000000 02AA00051008848A2AE2143222AA2AA000000000000000FF50510000000000010038098018450020 00000004000000800034040800600008004400800000800004600000010000609000000000000000 0200026046000080080004006000000000000000FF2A238000000000000402240000880280001440 2000001000000080A000615000040810000024050000608800000002600000000000000000015020 6206000030008006006000000000000000FF217A000000001801A20C08C418001018818118818080 0021080364040C210004240608E08600608030000401600600005600000000001600005000600640 60A6114004006000000000000000FF4D5F0000000018008048008818C00058258018518840292400 0060060022160820B602602610600002010C00622600000600000000048600000008014000E00600 4004006000000000000000FF0C140000000018018228018018808010019C188D8800042200006156 0162460822A64060160064000060040060261061060400000002860005280000A000E0060E410400 6000000000000000FFDAF100000000181080480D8258208810A18299018020062088026004106056 44200E05645E01468000600C00E20608641E00000000001E44000008600600600600400400600000 0000000000FF14F8000000001800801001101C01203C05801C25808030B00001652C12A14C024006 3321460860025400860060040001440200000000060005020060062060A601408400600000000000 0000FF71F880000008588084120110180181188380380190C011205050525440310608C016A02806); SDR 8000 TDI (40000444000046000006000000000004006400026006004016002004004000000000000000FF4818 00000000000000000000000000000000000000000000000000000060000000000000000000000060 00000000006000000000000000000000006006000000000000006000000000000000FF705E000000 00020000100100000000100140000000010040000000008060000000000000000000000060000000 00806800000000000000001000006006000000800000806000000000000000FF8916000000000000 8008008008282008888088A8A000002000000A800028220822020020020A40220022004000040122 0200005000022A2A2002004002000000202004002000000000000000FFE6800C01000000D0000040 02000524800122400020008890480408048808800001400000104000000018051040000000CC0000 00000000000000008001800004004000000000000000000000FF3D6300000000040080082080080A 800800800820840006240200220200200209200200200A02202004230326294300A0020000000001 0208255080A062052803202002002000000000000000FFB527010040104001851801801881801C55 4CB84980001468C604602E4D654400608C28F10605600208E08E0040060078040000000800060068 02004006006005004006006000000000000000FF902E0A00800000A9000000021001028101020401 020240863C02410500009504C0E4004054204400C200848841A40400AC0000280002E81050200140 0002C004004004000000000000000000FF4438010040084000830800C0090080080CC10A0080020C 300204301280A8A280280200210A01200028A08A00208202200200000000002208200000A0020020 03003002002000000000000000FF74C30000000000000000002000000001400400500000400CA000 08A01008000209284880200404008000008000000000000000001000000010000000000000000008 00000000000000000000FF4BC8000000000000000000000040000310096110000010000800010032 0248000400000800100002000000000800000C000000000000004405128000000008000000010000 00000000000000FF57EB000000200300220410000000000200028000000010000002000000003000 10000C80000002800200010000000200000000000010000005000400400000800000000000000000 00000000FFDC2208000000002A004022000204000000004000000000800011000004048008000000 10000000000000000000000000000000000000000000000004008000500002000000000000000000 00FF01038000000AAC00888C80EAA8EC8AACAA8808AA80002320002022AA28A00222A2AA2032AA2A); SDR 8000 TDI (00701642628680611600001052004620F40228630645600A026014006000000000000000FF5B5900 0000000029801809801801000201001011C22050420620604E28644280600228E2870A732C0AE206 08500602700600000100920F2862A02200080070028A2C44002000000000000000FF819D00000000 0011800011801A038018000010498400044004204A300478040060C64060860260A000F216086006 80608600000080080E006201A2600E004000000446006000000000000000FF9E3F00001000004182 01E1801A61C818F0007081800141458412C00002600418608E11640610601414600E864007007006 000000000406106840000000004000140006002000000000000000FF699900000000040184200180 18011019010211018030084004055802306CC4026212006006006204006006810806046006000000 010006206904006006006880004804006000000000000000FFCDA900000000064580000180180300 1801003009810000400400400000600400604A026006006004006006510106806026000000000844 046010800000006000000004802000000000000000FF6570000000000001845811967819019801B0 3181808002E816004286906014046806026006186020806006000404807012000000191016616009 46641E586184804016006000000000000000FFF76E000000000001E00001E0990100184080100388 0005308780C347216004007086007806006029106006002004007102008200040406106120000000 046004454006802000000000000000FF7DF4000000000023821811811805001821C0100380000060 0E80C04648100000612680600600601000000780228400000A008000020826037040200000224005 454006006000000000000000FFFB0600000004000184181184582101391181340582410464260048 260800002060C65060162162880084CE100A4409000200000000000720608810612600580C004C46 002000000000000000FFCC29000000000001A05821B01989801801BA1891980000E906004006036A 920EE21A00E026004020986004512006806146000400010415106300826406024007802014000000 000000000000FF4051000000008201A00043841813801801901819808088680E80C00400E0220060 03106046004000806004902006006006000000001004006000800000004006602444004000000000 000000FFCC87000000048001841803C018C3815801C51C0591400264560148060C88420060920160 0640C290108114000407088006000000000006206090100140045006006004000000000000000000 FF4B99000000000001800009803801801909803881840011600600404400030255642220600E0040); SDR 8000 TDI (0086006002001004000400006006006000000001004017002006006000000000000000FF599F0000 00000001000011801800011808041811842080E03602E08212681400600608644E00648800621600 72AA00654C0000008060060062A8000080006006804002000000000000000000FFA8F40000000000 01A01801801A00081C02001C01CA0062E2AE22E292AAE28C26E2AE28603E2BE53000EDAE80E3732A 60840882A0006007007550006006007816004002006000000000000000FFAA3C000000000001A002 11A01800811810249D359440016556032D4455751400E5560D6546906804226016006C06007D5600 0401006006006004800080006006002802000000000000000000FFF85F0000000800018020018018 28101A204A180780904960060C702E0060044060060060D690600400600666600680600600000000 680E00680480605E006006803002006000000000000000FFC0E8000000080003A0C201A218010218 82149831CC810C620708213428600414E40E11640600680491605700F4464C608650834000610700 6000000800005006002002000000000000000000FFAA550000000000818000038018298018480018 0180200060D621620403649400614620608642E02400610600600600600600000000600E00600000 6006004006002002006000000000000000FF43540000000000010018018018008000000018018000 00600600200200600200600600600600600400600600400600600600000000600600600400000000 6006002004000000000000000000FFFA9B0000000000010018018018000004000018018000006006 00600200680300600600600680600400600700400600600600080000600680600100600600700700 2004006000000000000000FF48A20000002022058400018418432140080018018100C4600E006004 84E00E00600600700622600C02601642000680600600000050620651611020080000601600600400 0000000000000000FFE253000000210351880025811909820000041821C01001650600FC04106926 10E10F08600681620400600680500400708E00081002605680780401630645604600781400600000 0000000000FF2DA9000000000001800003801801800248001015D01000024600620460608708608D 08600600E80003600610450600680400000000020E0E640510E00600700384280200600000000000 0000FF8C54000010000089884021809805800230041069808005800610E40488610604E446006806 20620E00E00709580600610600000000000700608A000800007122002006002000000000000000FF 193D000000012045841801841953034001041005D000444136006806056053006002007807026004); SDR 8000 TDI (02203002803552000000002C82802C00802802012112883102802000000000000000FFCAE9000000 00000030A2000010112020002242010000814014008A4C80100480422C00480510C80280010C0111 0482100400000000483480482AA44C00924004015034800000000000000000FF22E9000000000001 845841A1180100190000180180000060160162A42960440068060060060064000068068264840060 0600000000608600600012C5062260060AE004006000000000000000FF4AE4000000000704C10D00 D20B44C28A2C428854800144BA03A4301300350B2820528220034D310100242350B0234033420000 01003003003309003013002803803483042000000000000000FF692D000000000404200300208400 2005042000000000AC100104880C810C19021080201000F4C800800040820D448008000000000009 00808C00A20808800028208880800000000000000000FFE231000000000100800800800D01800808 022C80800002200200219000210200302280300203020000200401A0020020040000000020020020 0008C502200006004004002000000000000000FFA63D000000000000019881982040001890008442 00000100002244007062000802008000080000880074201000200065000000000802000800081460 06441000880400066000000000000000FF41B602000000000204604001028A000002050200000000 82000000000060604080008602800001000070000000080060480000000000000000000160A60292 00010220006000000000000000FFF76C000000000001800001A41825079840001015800240649641 624000008230685E00600600440020080444600660000600000000600E2061300062160048069421 00006000000000000000FF3B4E040000000201A15A8190D81121188022B105800340F086842A02A0 10C301604E426A8F234910C00004807006A0101600000090680E8868288D0C48A540060034008000 00000000000000FF92FF000000000003800001801AA3821812001001800094640721610800640A32 628600600600420380604582E05600600600000000740620E002401080004C2E5161440460000000 00000000FFD1D3000000000001801801801801801800201001C00200600600200200600200680600 60060040020060040060060060060000008078068060020060070040070068040000000000000000 00FFC83C0000000001050118058418008419102198538042206806006802A0880010700681640700 E000101006007002001004400001006107006000006046004006003006000000000000000000FF74 64000000000001A01801801800E01800001921D00100748600743200148184E2CF05610708780144); SDR 8000 TDI (0200000060000000000401000002000060060002A8000400006000000000000000FF433500000000 0000920800000800820831800880800000200A0C0082422182002202082082002090002400006622 002444000200300022032040000002540002006004002010000000000000FF1AA740080000040000 04004204000404005804040A210E92A1001228441029129001229209401050219005601004001000 000001001009201021004221001005001420000000000000000000FF2FED400000000400800C00C4 2C10800C40C48C4080811134B340315210B04B03348B04B153003000203003003442003002000401 441013043041002203001013003002002000000000000000FFCC4F00000004000184180180180580 18010019098C4220600614E40600610420600630620600E1000064160440040060060000000000A6 206400004026000546004046006000000000000000FF9DB800000000040030A20120000020222100 120100008200000048008410D500409400400500080080000488C804800084000000000800804828 804820800004A05114800000000000000000FFD4EC000000000000800800800800800910A0080080 0028A00200211200200200282200280200220004280202200204200A000000000002002000442002 0000100C2442002000000000000000FF22F70000000000AA0200AA0AA6AA0A80024AA0AA00005402 A9AA82202882002A8200AA82A82A80002892A82002A82883200000000002A82A81800886C82A82B1 1180002A8000000000000000FF28C600080000000004000000000000440020240000000080000000 00000081000120800800000000021000008010040040000000000300000048200020040808008028 000000000000000000FFE5FB0000000000AA0CA0AA0AA0AA08C0900AA0AA00000082A82A82282882 882A92C8AA8AA82A80002A82A82882A82A82200000000002A82A80002C80882A82A02400C80A8000 000000000000FF0E550000000003543143543543323301541501540000D40CD14D0D50D50C485514 10550550D50A00D10550CA0D40D10A88000000000848D50C00930D10510540D40D00D50000000000 000000FF3DD700080000040040040040000044064400040000010000008011010410210000008000 01001401000001041001000010000000001001001049001001000000001401400000000000000000 FF5A4C0008000000AA0200AA0AA0A20A80A80880AA00002A02A02A00002882A02A88802A8AA82200 002A8A208A02282880000000000000002A80000880A8200A202202002A8000000000000000FFD23D 000000000200A00C00A00A00A00802200A00800880280200288084300A802002002002802A008020); SDR 8000 TDI (2016026006000000000006006000806406000806084104406000000000000000FF92300000000000 AB8210AB8AB0938A9A008AB8AB80002AA2AE00520428A2042AE2AE2AE2AF2AD0002EEAAEA82A2628 EAAE0000002A82AE2AF0000A80A82A92AE3242040A8000000000000000FFD99E0008000000218010 01801805841C01805801801200200600508600601400600600600688680000610600240604700600 0000000006006040206006000807105084006000000000000000FFC95D000000000155915155955D 03931C0195595580005525564044365325145565565565565560045165560AAD4651755600000055 0554556000930510550557434444150000000000000000FFA8450000000001018CA0AB8AA28888D8 018A98AB80002AE2AE2AE0342AE2A42AE2AE2AE2AE22C0002CF22F2AE92A28E22C0000002A82AE2A E0008AE4AE2C82AE2242262AE000000000000000FF7FD1400000000001040001800020805A018018 018000006006136084002044006006006006006000007807A028120268040000000000060060A040 004000000600408E400000000000000000FF21E70000000000958200AB8AAA430A980188B8AB8000 2AE2AC2AE4042882202AE2AE2AE2AEA240022882A62260022883240000002A82AE2AE62088828822 0AAE2142360AA000000000000000FF91342000000000230000018008110018018018018000006004 00710400400800600600600608680000000608E50204000400000000000600680004604610000694 4086004000000000000000FF19E200000000000990A0018010C1803800841801800000600400624E 02610200600600600600C00002600C00604E00608E00000000000400600020600600800600C01640 0000000000000000FF48AD000000000009800029821101881840891811820200600C046246202002 00608600620600641040E48400404601614600000008000400E04008000041054608448600600800 0000000000FF43B20008000000019080298A58318D590182584B934000422E01603614020A006286 00E00600622000001C0064060084061000000000060060006686601480A606000600400000000000 0000FF0FC200000000000180800190184180180984180380000864C610610600450A10E4060B60AE 00E04000004400600610000600000000000C106010016006000006410006002000000000000000FF 8EFC0008000000080000000041100540A011402011401001000905081260001100000C0548008000 20E0C0000020086080100000000010100012086006000200510300006000000000000000FFF08500 000002000000180180300B0018000280540100200000230000296000480088000040408028006208); SDR 8000 TDI (0600600000018000051E996000406006006000006006004000000000000000FF532A00000000000D 800401C01001E01A8188045300008A710100650403440CA060260260A62060844060864040060960 00000001000006204400020400006000200044004000000000000000FFB756000800000401800001 A0910181380180040100100060000060060440840060060060060060020260060D40060060000000 00000006806106026246006000002004404000000000000000FFA1DB000000000001A00401845015 84184B80000100000D60000060000040340060070070060065000060064060860060000000000000 060062084000000040000C4006004000000000000000FF3CC50000000000ABCAA0AB8910218C5885 8AB8AB80002062A82AE2A828C2042AE2AE2AE2AE2AE01828E2AE40623E2AE2A80000000002AE2AE0 3008E08E0042A820E2AE0AC000000000000000FF8D2600000000010B801001802841023002801801 800028412000608600010200600600600600E00002600E2A81460060800000000003060064000000 00006000000004000000000000000000FFF0940000000000AB8AD2AB8A284B2890A88AB8AA800020 42A82AE2AE2AC28A2AE2AE2AE2AE2AE28028E2AE0C822628E2A80000000002AE2AE4402AE0AE0062 A82422AC2AC000000000000000FFB273001000000001B55355910815509930954155000001440855 642855044E5565565565564C65045165460044065164500000000000465560D05505300065505545 56350000000000000000FFA67580000000000180100180088100180080180180100D400000600000 40260060060060060060000260060001060460000000000000060061000064060060000960060040 00000000000000FFF5940000000000418AB0AB8C09208098880AB8AB801006220622622428E2262A E2AE2AE2AE00406028E2260020142EE2A60000000000162AE00008E08E0002AE2262A40AE0000000 00000000FF37240000000000A3801001830815941000001801800020A08E10600404200E00600600 600600C5040061161421460060160000000004860062400200400000060160040000000000000000 00FFA046000000000009001001805901002045001801800008604601609600608200600600600634 4000046006212216006006000000000056006110206206000006086014206000000000000000FF43 5E00000000000110B00180184180200100180180000060062160860220AA00600600600600500000 600602A1060060060000000000060060A0200000000006816854000000000000000000FF5DE50000 00000001801001801209801800801801800200200614483400600400600600600680400000600600); SDR 8000 TDI (5560000000000015565560201143565568004C4556356000000000000000FFA2530000000000AA8A C9108888CA8808AA900A00800032A0002AA02A2AA2222AA2AA2AA2AA2AA02028A2222AA21228A000 0000000002AA00A2302AA2CA2320000323022AA000000000000000FF8F3F00000000000024440002 02010000022900020000000000000000200020801000000800004080000000320000000000000000 000000800200224000000000014000000000000000000000FFABF50000000000AAAA8A8088C8880C C88887015080002020002AA4042AA2A22AA2AA2AA2AA2203002EA2342021822CA0000000000002AA 54200008808A2000006002142AA000000000000000FFBA0900000000000000585182184244180010 812800001000000001080040080000000000000000800061100C8240006000000000000000480000 026046090000110140004000000000000000FF970B80000000000040040220400000204200400200 00048000000240006000000000000000088020006000000008026000000000000000028228406206 020000020010006000000000000000FF860D000000000001C01D01C02011A3180108384390400120 0000604C224122406006046016014010008444006004000040000000200106004400206216204120 42E004004008000000000000FFE1D300000000000192D801140123C8180900180184802065480062 0608400202651620E0A60442C040010400600600020001000000000601600011002008C400104004 004000000000000000FFF354000000000001803801820001C8190F05982180800020080062042B44 1200608600602600422800E0044064060060104080000000060040500000200CC090200104604000 000000000000FFF500000000000041A81A8188202D829901083807800010228010641E00C2926060 4604614E40C00000608400600600600800000000008645400000600E024000082044004000000000 000000FFF071000000000001A31C01C00082801881821C00944040F041006022004028046C0E24E0 86026100200446206206000240200000C0080600E43050E406204430028086004010000000000000 FFB0C4800000000001801881820000A038018A180088A000E08042614252C200016116916C061560 80510286406226110400000000000487006400220400004000402406004000000000000000FFD5D2 800000000041C11901800000811801805800802180C00000604A08402584708F08F0060CE0000064 06006046006200000000001007046000000000007800004406004000000000000000FF7A86800000 00040BA09C01A40004C0DC01843A29910102400055E0024041A50360070074060060001160060064); SDR 8000 TDI (6000000000800000000000006806000000800000800000000000000000FFBA6B0000000000000008 0080080089088080280800002020048060CE03200208200200A00E28400000220E00200440200008 0400002242082090004002000000000004000000000000000000FF9B6D02A0220000040000000000 00000008000000002004020000820000010000000042000000004000100000002084055500000090 0000004200020000020000804200800000000000000000FF23E3000000004010800800800800A048 00802800000020305B00208A00A41208300300A00A20202001234A1834020220236F000004210204 20C0022002022002002002000000000000000000FFD2B1140004000001801801909C09825D558258 5004800A602700604611610604614600E02450610001600408700600600600000000700700608801 4806006005004004000000000000000000FF52BC02A0220000030010000000011090011100006021 02070404C6244412D800501562410404400154903580022400029C0006100600A40C4A0810400000 0000000004000000000000000000FFEF9D0A0002000000800800900810C028AC8008400500082202 0222420021220420AB202082122100AA200A00280200300B00020802300202208808A00200600600 6002000000000000000000FFC6A80000000000000000000000000800000280100001020000000000 82800000000000804020000200800000000000080080000180000000080000000000000000000000 0000000000000000FF8C6700000000401000000000820012431008201000010000E0800000AC0808 00080000000010000000190108000040000001000010040084004000000000000080040000000000 0000000000FFA16410000000000022040000004400000404010000003280008000300000C9000000 80000000000000000004000000000000000000100000040800000000000002000000000000000000 0000FFDDB800000000000000400020400020002010400A0000000000000000200000000800000000 000090040000310000040000000000000000000000040240000000110000200000000000000000FF 2A429000000006AAC888AA8A88CC8AA88880882080000520012AA2820AA2022AA2AB2ABAAA2AA600 28A2AA0022AA28A0000000000002AA2AA03028A08A2AA0002022AA0AA000000000000000FFB25A00 08000000012004424202014100004032040000000000004084000115005005005004004200000104 000020000000000000000005000000004000105000104044000000000000000000FFC03600000000 0155911D55F15911F5593184593180005060005564CE156515557556D56556556010536556016556); SDR 8000 TDI (06800A0020600602E420006026004056026000000000000000000000FF8C8A100000580025831816 C00011801A1181C876202261480408606E6040440460861A608601E0C00068060030070060060000 0000680690621042040000480E185000000000000000000000FF8ED3000000000001843801800801 C01C2182000000020844061260160024140060260068840060000068460234060478060000000060 06206100826006006004402800000000000000000000FF5AE7000000000041801801822801E01901 8022C0000328400C0878060020058060060962060060060260470124068264160000000040065078 00000120006144000000000000000000000000FF7F1D0000000000058198180118E78458A182BCA0 00022860050064061C60D6656466646004806040036506020104C3610D010010106D062DE0501260 86406806806004000000000000000000FF5134000000040001801802001889809841929800600300 E0040060260061060878060061050060001060070C00340060242000000370060064800500080170 17084004000000000000000000FFBA90000000000243A01804021A01811801A80800000200600580 64460048260AE2060AF4060060208814C600A22C2005250000009360060264C00080502140B60020 04000000000000000000FFFD9F00000000000180180000182180194589480001234162C440748611 60C600E24641610602E0404000860020040008040000800060162A734880E00600400608880C0000 00000000000000FFE6980000000400010A1800A97811845801801202200009401410F00684201600 60060263080042000168019041060170064100100045868060101260060040001020060000000000 00000000FFF5F4000000000001041800805A41A01A09C01080000080610500610601220600608601 60020040000A606002C6060060060001000040060060000000000040200000060000000000000000 00FF9D09000000000201481801C8180180185380030021404160240064070030C601652620608202 C020B2108000D00600000600000080610F2A6B2800800000404008C016000000000000000000FFC2 2300000000000100180180180180190190A002000010640441600610020600600604641200440000 0000044006000006000000004006006000046006004000006006000000000000000000FF8F670000 00000000000000000000000000000000000000000000000000000000000000000000000000600000 0000006000000000000000000000006006000000000000000000000000000000FF52B70000000000 00000001001000000000000000000280480000000000000000080080000000000000600080080100); SDR 8000 TDI (08A0AF0AE2870C715000E186006007806040000000000000000000FFB5F000000000000000180180 1800804045901811F440536457111550016335086156116550406004806C2601400C0070C6004407 204804005000000000006C06006000000000000000000000FFA9DE000000000002021801819800B8 00118C3881800000420E200080086004046426006020006100806006004614806407004006106006 016260006806007006006000000000000000000000FF55D1020000000209001809D4390181008591 390D9080A8649643214281621428E0C60B6000417000007246D360040860860840B6037006906000 008080006007006000000000000000000000FF7DD700000000202302980180180180004180182184 4004E0461022104A60C400600E2062A014604802E08E00608444E00E00C0060064A6006400006006 006006006000000000000000000000FF63DB00000000000000180180180080180180180180000020 04004000006004006006004000006000006006002004006006006006006006006000000000006006 006000000000000000000000FFF059000000000000001801A0180080180180180180000010040050 00806004806006004000006000007006002004806006806806806006806000007006007007007000 000000000000000000FFC83700000824800000184980980180180584180180008020044062860060 0601680601400100600400600620084404F086006006006026046A00000100006006006000000000 000000000000FF3FFD0000000000041319038C184D8018C188195180801000C500600E80E40E9269 14144140806010096D060000840068548A6C46896106A16911016457006086206000000000000000 000000FFD5FC000000008001801809880181801801821808208140400701700E00410602600E0060 240464008860462166B640642E0100006C6606006840006007457807116002000000000000000000 FF462F10000802000583588280085B805C5780181000021048B620608600604E00E4860260841260 0400628600600E00E28600000102F0A701E0F1801E2800600648C002000000000000000000FF0792 400000000005889841451821E018C18817400003B0400400E20600A2840860078960050072108170 4600E00624700615044000600642620800E90624E084202002000000000000000000FFB212200000 000001801810001801801801C25000008001420504710680240C04E04600602500704802604E4464 460260070012012060062A6881200020006024020002000000000000000000FF9DBA000000000021 801801C00641803805A00800014200480E80690680600401630604602408610804600E4020460070); SDR 8000 TDI (C00600604E806040014006006016056000000000000000000000FF94450000000284A8940CC4840C 24CA4854D40840800A08B08389380244B20B4830C200294088300141240220304301344348300300 300308331302329344B543002810000000000000000000FF0A3900000000050020832C2200002A40 4030004000088D0801231104800C00800048000009304800E90004A61040A00800004000A0080000 0800868810800551201000000000000000000000FF8B3A000000040020800880C00808800A108408 008008200002004002C0620A0C200200002100800200A00100400201A00600200200200200202000 4402462002002000000000000000000000FFC6F000000000000107200194442410040C0A20020002 5086801804043480900290812008000904800074200001100060205100800A00510002020162A600 1080080010000000000000000000FFF97F00000001004A48000000A08204A0000004000003020128 0000008100200001110800408000000070004106800064400800000000203801D228610E21002805 0280000000000000000000FFB2E7000000000091101841A91841800283801801800080600640E2BE 02600650622682630000600010080400600600000600600600420400C40800600600E00600600000 0000000000000000FF596B0000000002A5209AA988DA48AD0085D01A038000142A16806AB4006807 08EB0644604010E800B00004806D06A09027086886A06C26A06820A40A9084E806A0600000000000 0000000000FF35900000000000090C5801821883803811823801800040E8A652C00344EAAE04602E 08621040608000E8444448070070060060061240040942881108402060D690650000000000000000 0000FF6B050000000000010018018018018018018018018001006006004000006806006007806001 806000006004804004007006006806004004005000006007006006006000000000000000000000FF 93940400000040518118119059000101558518158500102007011007046006806006006400404000 000026816016800002003006806046016001006006006006006000000000000000000000FF85EB00 0000000001801801801800000001801809F02102A43700020600E087287A96106310004050801006 006005001002002407007806027001001001006206006040000000000000000000FF95A300000000 0200801801A018018058C3901805840050200690B13700644E00602600E02028428100648E81600E 0060A28020062060060060AA000880006006006000000000000000000000FFDE8A00000000000080 1801821801C01901801825882122A8A60A322E20E2AF6AE68E2AE0801AD5F802E3BE2A68862AE28A); SDR 8000 TDI (01091241108019200000000000001000000000000000000000FFD1C0020000444C04C00802C00C20 C04D02C02C08810100310300344B00220B08B0230034C30528000030030430020030134030010C31 13452801402402002002003000000000000000000000FF2F720000000018898018098C18018C1801 80180194400160065441042AC02604428622600E20622043635610602602E0060242102062060042 0000400E404114006000000000000000000000FF4A83000000001000201330022201201000431001 000000080000400488C800804800804808800808800004800800801005004000804804804828C44C 21001100888010000000000000000000FF7BD5000000000A00800800A10800800A00802800800080 20020020020420020020020020020020000028120920020020020020000020020020000020020060 0E042000000000000000000000FF20F70000000000AA0AA0024804AA4AA0AA0C400000082A82A8AA 8AA82002A92A82A82A93A12A80002E92B03212A82A82A80000002A82A82A80000880C82AA2222122 A0000000000000000000FFE90200000040000200002C088400400000432400000802000100000024 80210000010000000000000010080100000200000000004200000000002004000800401480000000 00000000000000FFDA470000000002AA0AA0CC08A0AA0AA2AA08800000002A82A92A92A82802A82A 82A92A82282A80102882212282A82C82A80000002A82A82A80282A80882A82A03402A80000000000 00000000FFDEC30000000003503543002241541543541000000000B10D30550D50900C10550D5055 0B48D50840D50540D40D50D10CD0800000900D50D50830930950C48D08C005500000000000000000 00FFF90C000000000000600400040000000000400000000900100000000104900000100000000000 1001000100000001001001000001001001001001001401001011000000000000000000000000FFD1 570000000000880AA0820800AA2AA0AA080000000A0000202A82A80203802A82A8AA800022000028 8A202002202A82200000000102A82A8020088088200200080220000000000000000000FF19AB0000 00200202800A00A00A00800A00A22A008002C0AC02802802B1282A802802002C5080280080200284 2902803083002002C028028028128028430C304AA42100000000000000000000FF63F10000000002 4040122822B20040020121100100028A491000400480480100480000410009484082011490C80880 100C004004930800000800A24A00808880808010000000000000000000FFE7A50000000000018118 0190B801801801801801800A22620640429408600604601680600001620010680603648E00600400); SDR 8000 TDI (006406906800806007047046006800000000000000000000FF165D00000000193595595415591194 4954155955800044455455244A552554550556556007556014516D56D555565564CF4D4550556556 556040110110006007086000000000000000000000FF98CD0000000018AC8AB8AA8AB88188B8AB8A B8AB80000A02A62280062AC22E2AE2862AE0062AE0002AEA26AB600E2AE0542222A808600E026028 48E2AE28610F0A6000000000000000000000FFB88600000000180080180080180380180180180180 00092006000002004006006006006806006000006806806006006804002000006006806010240040 14E55622E000000000000000000000FFF81000000000188A8AB8AA8AB0B18C08AA8AB8AB80000002 263004462AC2862AE066226006A2602028823620E826288004A322A845E14649E0002E80880364A6 C16000000000000000000000FF64F400000000184080180080100182080080180180004020060C10 B200004E00600E00600610680004001604620604054C10200040608640680000600600E20614E000 000000000000000000FF8EA100000000100080180180180B80D00100180180001541160124060060 0600030611600601600000608410609600600601600012644E042050006426306016206000000000 000000000000FF1D0200000000100180980180900380300104980188A00044A610254A2060464000 06346286106A4000600C016006106406406000006206002C000C04090072B70AE140010000000000 000000FFBA8100000000108080194198B97990200002D813848029002605800A0162062002060060 3E4D72802000045060060000060060000060AE0030A001004044600E006080000000000000000000 FF40F400000008108180180382500182802C00184580002C000600400402248E04044E0060460071 0848840400600600004600600000615608315000600600E006406010000000000000000000FF9A80 00000008000000802404010210805400405004000482800C02A04080300200084204064360280960 000080000860202000000004001000000A62464502202A8028008000000000000000FFEA07040000 04402300000380000408010000000000A00000040200000504C000450842001600E4402462A80800 20046008040408430020100400006016200088000000000000000000000000FF91FA000000000088 800908880800862002802820984000A0020062862C610A02204210230200200000A41070A0020024 0020200000208A226410014213001101002000000000000000000000FF4D3E000000400440400000 42042440040040044802017810F92810290001010890310010A12200000010054310001890050050); SDR 8000 TDI (700600E0100062464C649648E000000000000000000000FF2CB5000000000001801401801801809C 01801800000100200404644620600482500700600600600400600604400600600600400000600690 6000040000006026026000000000000000000000FF01EF0000000AA0038AB4898AB0AB8A18818AB8 AA00002822AC74E48E0062AC04C2AE2AE2AE2AE00028E2AE0042AE2EE2AE22C0002AE2AE2260002C E08E01E006006000000000000000000000FFAD5C0000000000018000038010018058118018000000 30A00608620602200442000600600600600400600620400602600608E00000600600600040000000 E006006000000000000000000000FF574D0000000AA0AD8AA0AD8AB8AB8858A38AB8AA000024A2AE 00602602A2AC4862AE2AE2AE2AE0002AE2AE0D42AE28E2AE2A60002AE2AE23600848E2CE28628628 6000000000000000000000FF369100000015015595455185595591194595595400000261164460C6 40E54210452655655655600455654C0B44CE5164D644600055655641601015055052650652E00000 0000000000000000FFF664000000000001800001801801851809801800000008200601610E506002 00C00400600600600000600640400600600600E00000600610600000600604602E05600000000000 0000000000FFBEED00000008D8AA8AB8A81018AB8CB8818AB8AB800002644421809E32021601C014 2AE2AE2AE00028E22602420628E2262260002AE2AE1E600008E08E00605600600000000000000000 0000FF222F0000000018008018000958018018098018018000516126140442000056024006006004 00400400611648E006006086106000006006006004020440006026026000000000000000000000FF 2508000000043800801802021801821825001801800000440C00000610A0843064D6006006006000 0460060040AE04601601600000600620E0084060064CE49648E000000000000000000000FFEBAF00 000000184080180000184D80D8010018018000084004011042002004000006006004004804026006 00C00602600E01600000600600682100042088E8AE82E000000000000000000000FF530C00000000 18148018000019018408008018018000456004082096004004004006006006806010006006104804 006086804000006006004008046006206006106000000000000000000000FF24F60000000018808A B8AA0AB8418908AA8AB8AB8000006AACA23302AAC2AC2AC2AE2AF8062AF0042CEAAEA202AC28FA26 2A42A82AE2AFAAF004288488426206206800000000000000000000FF01E000000000180180180000 18238008000018018000415014802896806084006016006807006820006106005546006D07104000); SDR 8000 TDI (00000030000420008000000000000000000000000000FFFEAC0000000000AA8C8AAA9C00AA8AA8AA 8AA80000000003222AE2AA01A2024CA00A2AA28828C00028A4462A02302CA2243360002AA1024020 3808C08A010000002000000000000000000000FFC825000000000000021001800000000000000000 00000400080000001200080240000000260260000060080001000260900000000000C00080000264 26000020020000000000000000000000FF83CB000000000000002400034000000000000000000028 81000000002000A04002C00000060060000463200100080060001100000002084C00004060064C84 90488000000000000000000000FF61DC000000000001801483811825803953901902020000403028 601600020640005640640000010000041244608600010611600000600440420000628602E2060060 40000000000000000000FF8B310000000000018010099059018A9801841810000000400000610600 208604040604E0101300082001020060060000060060000160161060000000501061060560000000 00000000000000FF5423000000000001801001801891889821825840000000240205600600208200 000602E00E0064801862CA2360061560C608E00000E4440843101100004060D65065100100000000 00000000FFA0EB00000000000184120980182B8078898C1828060051206200608E04020230001620 610640E00000600204600602E0060060000063042040080C602600602E29E0200000000000000000 00FF4254000000000201801C83894801821805805882000000440C53600680600682644E0064000A 041020004600E10408004400280000602E00610000E3164AE206026508008000000000000000FFBE D7000000000001C01801B22809801C098018C8000004610C09654609642E41620614624002040055 000608E42441040400A20000602E006200000500006006006000000000000000000000FFDCC60040 00000001D00805803851801C09E23E20004010604600789748E14200E2060A642600600000600600 6044106204002000006006046400000000006006006000000000000000000000FFCB2C0020000020 61A80C23B41C21C01C0180391200A081210681740E206482C6702700600600640000600611600408 60040124001E704682600005E00600600E006000000000000000000000FF6C120000000024018404 41C01201A03801801802050022200C10682602201508002E0060864260044D600602440641600600 500000609400400000048000601600E000000000000000000000FF0D8F0000000000D1A00023A010 0180584D801800000003200488600615200430600600600600600002600649400600600608400000); SDR 8000 TDI (001010000001280000004020000000000000000000FF803A00000000026081080080080880080800 0800800000200200200200200200200200280200200040200200100B0020EB110000002012762540 0A2002282002002000000000000000000000FF8227000014110001801D059018098B1C04053B2984 A0044037046016414824004004244004004280006004000006006806000000006006006000004006 006086006000000000000000000000FFC5E2080000000082000000001001001280082008002100D4 0400C10414432C00500501C00C144240240404000004000004090060001000041028304000004444 404000000000000000000000FF512200000A108200800B02D008008008000548008400042A130020 8A2A208200280222A0020A2080022002000002803002008020002002022000082002002002002000 000000000000000000FF4A6C0000000000000000002000080000040000D001400000400200000008 40000000000000000442001A000000008008000000000000000000020000000002A0200000000000 000000000000FFC9BE0000000000000100000004001A800001000000019004010004000088000000 40800840000000000010000040000000050000040810111D00000001000000000040000000000000 000000FFAB8200000000020004440002000000000000000000004400100008000001504000010000 200000000000000000000200000800008000000000102200204C0490488000000000000000000000 FF783000000000000020800001400000000040000000000800008000001000008200000000000000 02040110000000000000010000000000000020000000000020020000000000000000000000FF86A5 0000000004AA8808AA880EAAEAAEAACAA800000010A2B22AA2AA26A20219A2AB2AA28A2AA00028A2 222AA2AA28A2AA2220002AA2AA2AA00008A28A00E056002000000000000000000000FF52B1000000 000201400400003401001001401200000001500000400404000088C3108040040040000000840040 04000104004001005000088040004000040028050000000000000000000000FFB786000000000155 D43D55945955955955955800000042644755755648E4570045565565545140005564CC5565565565 56554001556D5655600055411652450452E000000000000000000000FFAAA90000000000AA88A8AA 8088AA8AA8AA8AAC00000032324A2AA2AA2822AA8020222AA2AA2AA0002AA0122AA2A228A2322220 002AA24A0220002AA2CA282282282000000000000000000000FF0273000000000400208400008400 00000040000000000101000000040000802200008000040200000000000040040000000000010000); SDR 8000 TDI (7000026006006006006000000000000000000000FF59E2000000000001001A01E038018418100000 018000048006004016106880296200006046016004006056010806006806000040D0010000001080 0400006946806000000000000000000000FFC22600000006000580F805811975807A0A0058010440 1A20460260460654640CC026106006006000B4602E6084049870040009302C6097016701356B8601 76A7406000000000000000000000FFB7D5000000010040849209821801811D42001901E001802106 0478860060000061360160065060094060060008150260840010008064062860204010204C600600 6000000000000000000000FFBDB3000000000003821801803881809800203801004080A0A6004126 0040800441168050015000081008060002040200040000800462070960100C00002B400620600000 0000000000000000FF2AF7000000004040801005801805809C000019418480002326004006000020 3204060A400000000010000E0200040200040000000240253240000C750600424600600000000000 0000000000FF3CFA000000010041801A15851A1584196000010104000A4006286296988480400420 1138E603E00004602000001680610608001008201340A14001E04600400E00E00000000000000000 0000FF66A6000000200001801801809801821800020009800004410600E506800000000000102006 006000007040000006806006108000004000004000000020004006016000000000000000000000FF 0DE4000000000001801C00809C01821A402001098400900406004006100040320000842000010002 1000100010060000060100000220464C30020D0D20004016006000000000000000000000FFC51100 00000020210018028018038118000200418100000026514006008100000240002140040000000000 040006040006000000100000010000006006004446006000000000000000000000FF8B4100000000 00000000000000000000000000000000000000000000000000000000000006006000006000000000 006000000000000000000000006006000000000000000000000000000000FFCA9400000000000000 00000002000000002002000000000001000000004004004004000006006000006000000800006000 000000000000000000006006000000000000000000000000000000FF7697000000000000800A0080 0809080800008810800080220600020200300200282200282400000000200A00002880308C020020 002002012000544002000006002000000000000000000000FF927910000000010200020000000000 0090284000002009000000800000043000080000C810004200000004000004000001000000040000); SDR 8000 TDI (A8006806007006006006000000000000000000FFBE82020000000020A11000041801C40915901150 04C03440002D4100526507105000116006006806006926427006D2B0140880860D40040140020000 00004006006006000000000000000000FF3911010000012008801000001821904801815002100000 42C000423000E05404608C24642E32E20013600610E0260060044404060060064460480060060040 06006006000000000000000000FF0E21000000000000800001801800801000801000000000400000 60000000040060060060060060040060060060060020060000060040040040000000000060060060 04000000000000000000FF6D1A000000000000800201801800801201801000000000600000600000 60040068050070070060000070060068060060060000060060068060010060060060070060040000 00000000000000FF2E28000000008000800101801900A03841809000000000628028601011411444 420640600609600400600600644680200604020F024804104900000C410064060060060000000000 00000000FF3F230000000000048000498D5810951A81C0140C000120605180608000522410688404 604600600A0A600605681600602600800601615604643213600692600E0860060000000000000000 00FFA3F2000000200001861801801808001800401C09000011600E00600608402A22400518600600 E04088716600000605652600000002682E41600100610601600F006000000000000000000000FF74 1A0000000000050018AD809800009880001807000108E2860C405E40784204608400600608602400 708602804E80668600000880C914004640008280187046006000000000000000000000FF99F70000 002080028010018C3900143840010001000020404640788600C302085C0624604780600804600600 044782E006030200006107B571290A604604E206086000000000000000000000FF9E210000000000 00051101821840025800020041000040C01600400600040200002008722E02602480680600040602 600622100002480422400102020002F006006000000000000000000000FF76980000000000038A18 05001801805E00001E21000000E08E00640600604000600C00682E00640000600600180600600620 080182608E027020006206044006006000000000000000000000FFD5EB0000000001A1091C018C18 09C4180000780100018060860CE246006C0004604C1074070C624400600608804600600604000000 400500540000100011464607E000000000000000000000FF4AD30000004000418018818818318018 00040005800040000610C00E20600000600600680688600000600610940604640600000000600620); SDR 8000 TDI (884800800030884000000000000000000000FF232700000000000080893080084081090093002000 000020400200000020028400022C200400000010300300200221200620000200200210240010020A 410006002000000000000000000000FFD7F800000000018900300200001042008008C0C000010D08 002080092350088890A40350070061104064200000C040F0000900000004000500E00060C6061000 400420000000000000000000FF66EE00000004000200000010018404000200000000005000001000 11809200801018001197096000006100020408006200420000280300288110236036001000000000 000000000000000000FFFE76000000010051821089A3982100A00480000000000260004064001001 3610410000600080000820080200202400411600000610002002000800E106204A86006004000000 000000000000FFB0DD000000000204B21295809A29248281B280A0000082E0210A60084A090A034C 28C46800000800A0022284AB06B014064A0C06942922D02A00848900A04307086824000000000000 000000FFA56F00000000013180D041021881003003001000000108600040E00000824208408708E5 175160090061021030570131060000062142048340A8480228044026006004000000000000000000 FF653900000000020080100100180100100100160000000060000060000000020040060060060060 00806802002006007806000006002002802000006006004006006004000000000000000000FF5776 050000004250811801C01A41944A22C001401040406000047000D000060860004560008000001010 04505042104002000006AC4284444800006007004006006004000000000000000000FF0FE1000000 000000801801801801800801D508206020A060000264010364060179480040C10418088080060064 42000002000006007806007000000001004246206004000000000000000000FF8509000000000000 A00803C01C01845C0080080C0A010063404970B00848B602640652421600E2A0006A2E50F0120022 0A000006806006006020000800006816006006000000000000000000FFD4E7000000000000880801 801801C0180500080002004062A00CF22806C22F0A708E08400629E30002E4F602E00222E01B2A82 8698E10700E040006006006416406006000000000000000000FFA0C1000000000001800004001801 8440209500521440004540D0D550916556154550546557046A4E01600650E456002205000006200A 01000002000000006026006006000000000000000000FFFBD100000000800190600002181980008B 8EA00A00808A6000A0408100708600400480622E0260008060060060060066040000070068060067); SDR 8000 TDI (4086006006000000000000000000000000FF04D20000000013492002484010444000002012010000 884000004004894B50404CA4810844044880800004001004841000004000B10C0082C94A804A2080 4004000800000000000000000000FF74E8000000000802800802800800800A0080A0000000052000 00200200200208A00200200280200002281200000200200200200002205240200044200200200200 0000000000000000000000FF5FE60000000000400AA0800AA28C0AA4000B40AA00002102A9AA82A9 2215108310482A12892882002882A00002A82882A80000000000800902400884C82A8AA82A800000 0000000000000000FF3E060008000000000C001220000000000000A00A0000028001110000400001 00812004104104010204009000001002000000000002802804804000020014100000000000000000 0000000000FFBC210000000000880AA0B00AA4A80AA0000800AA00002C02A82A82A8488000A00100 3202A82A81002C92200002A82A82A80000002880080001082C80882A92A82A800000000000000000 0000FF481100000020025420A2A01543543542003002A00000C80550441551130CD0481208C90510 510A00D11440000C40D10C40800000900B00800B08950950C08550550000000000000000000000FF 6A7D0008000004044004026000004000004404000001000000800800040040120C11010000001401 0001100010010010000000010413414C1401001001000000001000000000000000000000FF108F00 08000001000000000AA0880AA0000C002200002802A80882A8220220060008200288A88202288A28 000320288330000000608200700002488288288AA82A8000000000000000000000FF3C4000000040 0482AA8B50800A24A00A00A02A00000100A00040200080288288A002842842042800802002003012 842883000002902912842B22A42802802002002002000000000000000000FFD7C300000000023020 22020010002000002313080000840001025000094014404CA4090804004880820084005100800014 000004820840910808804840824005004004000000000000000000FFBA8B000000100001801881A0 1825851883809820000050600010600000440C00600480600C88C000146C04004006006104408006 10E40648650000C046016816006006000000000000000000FFBB0E000000028554C84C50C88F08C8 2C10D420800001032841402208D0A8A2D220CB0D2082003129202102003223413C0A00100320310B 02B02910310B442003403402000000000000000000FF7CE000000010022438424020040810401024 130000000080208808004804C042024110820830C84084128408CA00880480000200C38890C00A00); SDR 8000 TDI (CE2CF2AE2A8280000000000000000000FF035E4000000018AB830821801803021881C48001000000 600000600600001600630E00602700630000380680100200000600200000620E0064C00000000070 07000000000000000000000000FF6F742000000018AB88C8818AB889881805B02201000000200022 6006200444446696146288A886002A80060000022882260022A8206206206130CC80A8204AAE2A82 00000000000000000000FFF40B000000001801800841801A21801851810000000002200000600605 033420600E80E84004080000441640082A00690E0020000961460168002260061040068000400000 00000000000000FF639D00000000100184281200180504B0850C0000000049400010E00608400413 60465260060060800060C40A848602600400600002401414648800640602C0060001100000000000 00000000FF47CF0000000010018A1800081821001009900100000020442000600602000401600604 600E00601000204440008E00002E4060000040060061000000082040360280280000000000000000 00FF485E0008000010018308040918998051088C4004114000032000E2160340940C600600600025 020A00000403800601000631600000608C306282488300044606400000000000000000000000FFEB F7000000001001801800045901841000800010020000800041642608012410608E08602040044022 4004040424106006006000004094406400156406104086100000000000000000000000FFD9AE0008 0000000010000200A04000008002408810C041008020004810804804800802004603604044600020 0248096028088000000000100000006016200028308028000000000000000000FF83A30000000001 000810310400010000200C502100000805000402C80140D008011015052600600000600000000000 6024020000200400200100006016000000000000000000000000000000FFFC1F0000000820208108 0284082084680280180E8E8000000808200200200200A10210201822400000A0E400018600200A00 620800A0A2022000440102140106040000000000000000000000FFF14D4008004084000000004404 00400400400401042120102120900128120122100120100540900002110100100000100100140102 0009009301004281001001001000000000000000000000FF1A26400000400CC0900808C00C00C02C 04D00C20804148304111353310B49352301300301304B00002302300108200300300301105254B05 300100220B003003001000000000000000000000FF702B00000008D8018018238018218018418230 1510800062902260062040260160862AE2A400400001600600000400603604400020600620640000); SDR 8000 TDI (2AE2AE000006000000000000000000FFC8DC00000000000000182280180000580180100000000460 000060000160240040000000060060000000040000AE22008E080000006226004000000000004006 000004000000000000000000FF06FE0000000AA0AA0D58898AB8AA0AB88182100C000022E0002AE2 A804640C2AE2AC2A82AE2AE0002AC2AC0002260AC2AE2A80002AE2AE2AE0004AC0CE2AC2AE000004 000000000000000000FF40D000100015415415591095585411194395515400004860005565505445 0C5545564C85565560045504C400040611044645000001611655404055035054E556000006000000 000000000000FF4A89800000000000001801801800001843881000000000600000600040E0860060 04000006006000004004000096004006000000006006006000004406006006000006000000000000 000000FF1CFE0000000898AB8AA88B8AB9008E98110AA0AA000021E0002AE2AE2AE2022AE2AE00E2 8E28E00028E23600000E08E00E2260005460062AE00008E08E2062AE000000000000000000000000 FFFC3000000000580180080180180000380D80000000000060000060060020020060060860260260 0400210E000006000406106000216206006000420000046006000000000000000000000000FF154F 00000004180180084180195280192180000000000A40000060060061520060062260060060000460 060003464460C600E0000C60B600602000624608E006000000000000000000000000FF9099000000 0018C9800805801A4484B88180400000000048000060060820320062460068060468040021061008 8E20080E806000316046206034220200006006000000000000000000000000FFF11E000000001803 80C84180180080184D201200000000200000600605630200600E0060268060800460160080060460 8600400000620604E200806046004806000000000000000000000000FFABBF0000000018018A0889 8AB8888818118AD00000002AA0002AE0062020062AE0862AC28E28F20628AA262202260883260042 A803608E1970820880882AC2AE2A82A8000000000000000000FFC26F000800001801801811801C40 81181180540000000310000160064061061160460070060068000060861400160071060040002C65 06206040006006006006000048000000000000000000FFACEC000000001801905913955D30915825 900400000055000055600635254655602755751655600455254F5484D655144E0045505240C44460 14D30550556556550550000000000000000000FFF2BC0000000018AB8A88A38AB88B0A38A1C28001 00005060002A60060AC00E00610620E2AF2AE0802CF22E2113222AE2370022A800E04E0AE20088E2); SDR 8000 TDI (0000000108000000000000000000FF25E880000000004008A0400000000000000A00000000148000 0000004803502202201400060064C00060A80000080060000000000000A842042000642601000000 0040000000000000000000FF5C77000000000001081C22003C15809805881802000002E000006400 0040D000430001642010005000400A3204860A404E0000000060140501104841060040164B044C00 0000000000000000FF51A900008000002100B0010098019058098318200B4000448044E0C048C400 0C400010610802030000400200000600C10640000000600600200005440815428600000400000000 0000000000FF792000000000000100B001049901843809801930000040620022E01024C2000B6000 44608640600004400209000602C00E1500000064040040400040084AC2CE00022400000000000000 0000FFC9A700000010004508102302380B88D8018A108A0A2012C0900066501040480063C0010026 5363A800400000040600402609000000600402A088004206004406208004000000000000000000FF 2693000080000021C00000A0188184180580980001002060000061280A60C00140002AE410500000 02400E4484821040822310000062160040203541064040268A000C000000000000000000FFC50180 000000040180010180180380980180100000204440000C600081628021480514603004005052C414 44800044400A100300116006006302004050004806000004000000000000000000FF493180000010 0000800001801803801801801814010000610001610002E20228E02602004E42600808400E010002 00400208050004E006006500004000006407400006000000000000000000FF03B480000000204480 0001C81881C1188380900A068004508014EC8092690308701C1100061060400444040400020C4002 000000126226386000604006007006A00006000000000000000000FF1CEE000000002400401880E8 1880003883809800004048680800602900482000508700600600E08440C00640040650400C009000 006424200000004050007006000006000000000000000000FF561B00080000000000984180180000 18439458810000036000006801114010004006000026026000004006000116004004090000006006 006000424006006007000006000000000000000000FF093E00000000000112380180180420181180 10310000106000006000444320807006006006006000044004000006444004000000006006004020 004220007006000006000000000000000000FFCFC50000000AA0AB0018CF8AB8A80AB89181D14300 003040002AE2A81060402AE2AE2A828E28E00028C2AC00022648C2AC2200002AE2AE2AE04008C08E); SDR 8000 TDI (0408E000000000000000000000FF73D70A800048B200000008001400264000403410000024001808 000001002414C084001C250CC1001404040818800002284208110000000040200240400048440440 00000000000000000000FFB8E210004021280C800902800810810820030822100050201000000002 30820A240A4123020220880B232301208202600620000A0020020028000028220020020020000000 00000000000000FF84FD00000000002000000004000000020A000008040000010044000000804001 0000000001000200000000880000000000000000000000000800A208002002000A80000000000000 00000000FF9D76000000000000000000000210022200280210000002002000000008000024040000 0001000001000400000000D009000000008000C00400008010000000200000000000000000000000 00FFBD420800000000244222084004000004000005000000000000800000000110000C2034802002 04804001000000080000800000008000000D0110000200000000000000000000000000000000FF75 FA00000000020000004400000400000000004C000000000000000000000000000000000000001000 0008000080200010000000000000400240000040001000000000000000000000000000FF1EA88000 00000488C888C0CAACA8EAACAA8AA90000002AA0002AA0002ABA222AA08A00228A28A0000AA23200 03220AA2220000012AA2AA0020002AA08A2AB2A80002AA000000000000000000FF99C90008000004 002444002012010010014004010000208001004800A14044C1491402000400404000012400000400 100400000000414080008000000000500400000C000000000000000000FFAD2B000000000145953C 95955955955955955C0D00005560015560005564445574CC0165545545105564C400045415654400 000055655694E048156536556556000556000000000000000000FF17600000000000AA8888888AA8 AA8AA8AA82A8AA80000A20002AA0000C24020A302248A2AA2AA2802AA00A0000022AA2320000002A A2023120282AA2CA2CA2AA000282000000000000000000FFA4240800000004082002004004010000 00200220000000000100080100008880000052000400000000000000000020101400000000000020 0280400000000804000000000000000000000000FF7B2E000000000088800CCE8AA8A80AA8AA9008 AB80000020002AA00002011200048A00228828C0002AA4060005D62AA3220000002AA0120424802A A08A2002AA000240000000000000000000FF19980000000000050210018004058000000140010000 20000000000000800410800421002602600200440000044000410800000000040010801000400612); SDR 8000 TDI (006000000000000000000000FF0036000000021800001401821801E0980000401442001044000000 0000228000600E04200E01700000A88031408400A00200000684600601108900210110601600E000 000000000000000000FF6843080000001800001801A4080481280020080800000960C00000100025 4000600EB070000100000001004C690701200200000200615600210000C400014006006000000000 000000000000FF40BC000000101C08001801804802D0081001200000000060000000010860A00064 8E00600120000100200000E12602200200020082400508029044424E024006086020000000000000 000000FFBC2800000010580108583180100102124008488C062002E0100000000068000261060E01 060260010340000040062860060000060428A220A070000807104000016000000000000000000000 FFE7DD080000001A21001001801001003202000A0000000460000000008066080060061040260460 8008E000006006406006000404004844400800044800004228006040000000000000000000FFF102 080000001831101A41200005242004402880002000600000000010694804608E8440214000000060 00016906146006000006042002880488404208044400006000000000000000000000FF0041000000 081801801801802001080008110808040000C0000000000060000062060040000001001360020060 42006006000000000080008040004046004028106000000000000000000000FF435D000000000000 00000000000000000000000000000000000000000000000000000000060060000000000000000000 00000000000000000000000006000000000000000000000000000000FFFB35000000000001000001 00000120020000000000000000000000010050040008000000070060008040040008000000000000 00000000004800000806000000000800000000000000000000FFE14F000000200A00800800A00200 800800200808000000208808000000200A0222028220840008000022060820022020020200020020 2204A000820002000000006000000000000000000000FF68650A800030A200000010200000220200 202400000020100000000000002000880000000040480200000000080000442C0000000000000048 020000002A0001000800000000000000000000FFF16B000000000A00806800800810800800000C00 00000030E000000000300A0021020220C231200000200200216210210200080200260200A0590020 022A2003002000000000000000000000FF3408100040015835801905841A11C11854151044140050 60A02400008C7144416416C161040042100161440961070450040000060061060040004260062072); SDR 8000 TDI (6000000000000000000000FF43950000018018000010018000010018000008000000004006000000 00400600400000600600600000400200600600600600000400400600400000400000400000600000 0000000000000000FF5A5E000001801800001001C00001A018000008000000004806000800004006 00600080600700600480400200680600600680000600680600400000400600000000600000000000 0000000000FFE2E4000001841800001005802001105808045800000004400E000000004006004100 40640E10680610440000600640602600000480400680600010682002608620600000000000000000 0000FF493B000001C019000090018A0049A21CC0011C101001804806208821805406086000907806 206C040040C0086C2601600688001600602623634D80608648B00600E000000000000000000000FF D9D2000000001801801801891806001C20001C000000804000000000801004086006002006086001 46001060400410602608004E80600610200400203600E006006000000000000000000000FF0E5B00 0000265885809801821808021808022840080000600000000000140400600619200E007004210208 404004607006000024C040042AB4305028080268C6006000000000000000000000FFF5B200000040 1E0180180380D8405050800094080000046010208020000405006106203406406404100140084224 11600600000600682600251010008628500020E000000000000000000000FF412A00000020180180 189180180848111210011000014060001000010250350A600E80200F0A702002000008C004006006 00001490C204022000008220004200006000000000000000000000FF9A8D00000000180188180980 0810084888001C00000041600008000002241402600680300E8A602182000030C806A04004000006 08681600220000A046007007806000000000000000000000FF38900000000018258A1001C0080000 280011E950000000E00000018000204471E01611602700600000000800280680480C0000144155ED 002870526000006046006000000000000000000000FFF9BC000000023821841E8180080100000400 0C000000004000000000002004006806002846006004012008004006804814000006006006021004 042407006400006000000000000000000000FFC42208000009380180180180080104000008080000 000160480000001078041069060860860460149028000460260A4904001800000240000040006401 007800006000000000000000000000FFC66200000002980000519181980582584008080020000063 001800100E204208600640206E02680968000000C0240A20820000660063161EB00081209E01600E); SDR 8000 TDI (00000000000000000000FF26D8000200400000016020154080000080000084000000081000000002 0000800000100A971960118400009004000000200002000200080A0200018106001880C000000000 00000000000000FFB68F010085801808081B0988102B30001000414000002000060000000080842A C2000260000000080122066500A645E51600008018800201400008402E2040280260000000000000 00000000FF70D1040081A01B2C255801A093098540002241080000850106000000A48A0444C300C2 60008208002328A6280806D06806000A168128A2D14C00934C288A40502260000000000000000000 00FFBE01000001821800101829B23042901084010040000020445600000008414408600010A51651 72880022170002AE02E3260001040A400E025080C04080A00900006000000000000000000000FF69 8C000001801800001001801001801000200000000000400600000000600400600000180600600000 0006000006006006000006002002004000004006000000806000000000000000000000FF533A1000 01951950311801900801B00800005C00000005100600040080080400404000600108084000600600 600E006026800A80284006006840004006000087006000000000000000000000FFC4790000018019 01001E01C00801C00A002C10000020002086480400209014305B100060410010000064C640622600 608700100200788620700000400000040608E000000000000000000000FF4ED9000001801A014010 01801800823844215C800D0081344E010030002CA680604048E50E0063280040160B610640600E00 000600E004006208006010802006006000000000000000000000FF7D7B0000018018030010018018 00C01A220098800AA00032A62A00A88BA22E6AF6880AF2AF2A669822C2AE28723E08F28E0A83AE33 E00440641880628E802C06006000000000000000000000FF8A8D000001A01D000018018010010448 441540801540011556510450A00556104150D1354F107124006D564D6546C0613600020020010200 400000600800690008E000000000000000000000FF5CD500002180390401300196118197E8081801 0E040038000E108000201087044000A0000650600404400600680690600600000604600602478400 6006806800006000000000000000000000FF029A080001A2182808580180000020082C2130001000 C0C4360000110841262972100324060060C000714A88601600748E03005421400602680800608800 6006006000000000000000000000FF2B0A00002188B8000010018000018008000010100140044106 2304C025420E0061404800D604641440C20040642600E00610050600600600602000620600200600); SDR 8000 TDI (000000000000000000FFC1CE0000004AA0C80AA0AA0E00DC0E000002440000002A80000000001012 A0AA82A8000A89288000A202A80080022A222A0000C04802802A81C01000882A9A002A8000000000 000000000000FFC61C00080040000C12001000000002000001000000000080000000000000108000 000008010400002400080B00200080080000800300502A0410020040000000800000000000000000 000000FF350A0000000AA08C0AA0AA09408008A00008000000002A80000000002282A0AA82A84C8A A82A80092282A85302302282A00003000280002A80002502882A82002A8000000000000000000000 FF71150000001542A020C2C25543523142002222000000D41000000000D48B00550550CC0550510A 21110A20A00D08CC0CC0000A48900C80810840D10B10D48D48550000000000000000000000FFDE8D 00080000040040040060040040040045000000010010000000010000108010010008000014008810 010011010810100010091014D1001011001041000151801000000000000000000000FF0274000800 2AA0A00A000808808808000010800000000008000000002200402A82A82382882880202001000002 002202200002006000080000002002882082002A8000000000000000000000FFC9D2000000800A0A 200A80804A00A20A00200C00000090A00200000080B002002000802042842C00022C4A80A88290A9 02000902822842A02A0080282280280A002000000000000000000000FF6C0400000100120120C245 2202422130003240000000C2400400000088455080500088000480480088C880B248290000100008 50910D009508488AC8009440C4004000000000000000000000FF2F43000001A41901035801851801 83190011380A000004600600000004640600642040608C00C41005431621400650600600008E0265 4640604011610600602442E080000000000000000000FFB9F0010004800C22D00888C84C40900810 4008A0000140022A0000012098A20A210108A84208310010300214330302BCAA00140330300310B0 09043043502902802000000000000000000000FF8B0D00000044030422821002020021A100212000 00008044C8000000C40240040800C0814C208C00B24880884900B80040000818C00D20E008908608 C0C20001004000000000000000000000FF9537020400820843800C00800800C00000000818000042 90020000000045029004C00928000040020020130022020022020005020020821020001002021800 00802000000000000000000000FF06950000000000A114000040B0400E0002128020000004022000 000029082100010020480702638000852C0000080210800000000400400080402000060011402501); SDR 8000 TDI (0000000000000000FF75EC2000000018018A20018018098408000030008000200006000000110046 00600090084004080048601690E00601620600010E14600203484201404600404E80600000000000 0000000000FF669900000000180181100082382480100088180100000140060000004040164B6000 4100060060200204460065162460B600004400C0D20862000C040614C08200600000000000000000 0000FF84530000000018008810008819008411088018090200284006120100004306206000400406 0860000A200600722700F08E0102040040080260002A4028204002226020000080000000000000FF 379C00080800980180101689981692400E86198612002005460A0690500246006500000060058000 6021260061163860864880060060022940A001C40000442208E400000000000000000000FFF4E800 001001380104180080180180004080D000000000000E000000000006086008040100400000002246 10E006406206100004004280284350004086084122116000000000000000000000FFB3CA00080000 20001000100000901020A000200810000003300000104800204802802000860C6000040080090400 000010000400000408010210100526500200220400000000000000000000FFDF7804000000A00002 100904C00D0040C002304000004400000000804002800000100044465060004B0004054010000000 020208000104000422000006000008100000000000000000000000FFC4B500000000082084080080 080082080881880A800010400202800800010208A010062484404200106482283153093402400022 2A2326242000460092020102006040000100000000000000FF9CA6400C0040040000042040402040 040240448008010892600000210AD001201201001009021089001009000000108000001000441009 081489000201001021001000000000000000000000FF89E8420400410C20800C10C10854C04D4AC1 0D1490012B10020401512A948350300104310B14311144B10B10A00A012002041402103053103089 042003003003083000000000000000000000FF144200000000580182184182180182180102184100 0000620601000000600601620800622420440008400642600600600600004E006284406040006306 04602E006000000000000000000000FFA25400000020122020020020520220A20128820100008050 04000000CAC80C0048008A004484481010C800A808A0808900000A30830834800848C2C800804141 004800000000000000000000FF3F3300000000080280080081084080080080480080000020020000 0000200200200021200200240000200204240A00200200000240200200200008244200200A002000); SDR 8000 TDI (00000000000000FF6D9C001000155940152955955155945823815911800014655600000000655655 600255055655654401455614633641615600048E05600651000452251054E4565560060000000000 00000000FF8A66800000001800004901801001801905801801800008400600000001600600600200 000600601010C0060064460260060000060060060024400520040060060060060000000000000000 00FFBBA40000000AB8058018AA8AB8AA88180996188180004042AE0000000242AE2AE0002A828E28 E0000042AE00600604600600000640610A2460F021208E2062262AE000000000000000000000FF93 A1000000001815005801801800841800011803800004400600000001400600600000002602610449 400630E1260063560000060D640200600000200010E096006000000000000000000000FFF6900000 000018A18D180180180080D0C5905849000030C00600000048400600600000000600624004400604 620E34E00600032E2060A00CE2080D0246044006006000000000000000000000FF9154000000001A 1100180184D81080300004B801000000400600000000400600600001084604700000502600600634 680E00022604E44800608000004048C106806000000000000000000000FF2B1A0000000018C38018 0080182280880180180180008C400600000084C00600600010000680600088401600C32680630600 001640600280402200240600602C006000000000000000000000FF0EE30000AA0AB8000AB8AB8818 848A0800881001800131C2AE0000013842AE2AE00022028E28F00822E2863B480F05F02600008608 69812AD0082AA0880362042AE000000000000000000000FFF7610008000018018098008018808020 0080100000008000060000008001062060000100060068004CC81611408612630E0005163068008A 4008006006056114006000000000000000000000FF600F0001541558331559559058819040009058 000000400556000000400556556000D08D56D16004C4642F4462AE40611600041409425055402A55 651020650CD56000000000000000000000FF69600000AA0ABAAA8440AA8CB8228A98008858008000 0022AE0000000CA24E08E0002C0ACEAAE022804246226A0EA0702600002605628220E0202B22AE28 6246AAE000000000000000000000FFC9884000000018808000008298488298008310008000042006 00000004A00600600004000602600810C0860060060864260001262260020060820060200A602600 6000000000000000000000FF90A20000AA0AB8AB9000AB88989188A8000790008000DF22AE000000 C22286046000020288A8800080E186226066896806000206206252A044082000882042062AE00000); SDR 8000 TDI (000000000000FF277800000000180101490180190D95404B9100D004001062004003000065060460 4600011040002000254410653601600E000006006204400020050404544450016006000000000000 000000FF607700000000180100080180180B8AA00900808992000462062002000002560060060000 8E20650010220400E026006106000006004206042100404204214120146024000000000000000000 FF3D040000000018010008C18AB8C59000831F000184803661C600000058016E00629E3806660460 0000002608620611E10600000610404600220010007C08408800E004000000000000000000FFE699 000400401C00813A0180180000184180184208000860000100800060860260260000000205200861 0400610E3461160000062460043220A835010404C207126004000000000000000000FFAB5D800020 089800805801A4180002184180180010000070000484800204060A60468000083105284D444630E0 0600600620002E2060144C21100000040A4046006004000000000000000000FF9CCE800040481801 8008418258120418230159010A000850400001000C020604600302010600609022F80C09600600E0 4641000605600E102100002104056006006006000000000000000000FFFCA6800000413BE188CD81 803A081019838038810000006000040421000807106E4262048651640100544E4060261060260081 8642E00744200000208410E047006006000000000000000000FFC444000400003C01089C01C01020 0000018C000000000460800080202060A680600E0820560460440860040060460060860000360840 2480000808602C006001806004000000000000000000FF8349000800001841020CCB801090034141 000022000000400000000008600600600600002602620010600400600E14E0060000060060040000 A4046424006010006004000000000000000000FF081F000000201D12004801801A24001815801810 80000CE00600000084680600680600000600610D00C8060063264061560000060060040002040860 04006086006004000000000000000000FFFD8E0000000AB8440888118AB9100C18418AB890800024 62AE00000024E2AE2AE0062A828E28E0002242AE2AE0061066060002AE2AE2AC2AA00870A48C2AE2 362AE004000000000000000000FF61C5000000001808000801801001808109000023800001600600 00002B60060060020000060060042A400620E00608640600002610642E0003000040400041000060 06000000000000000000FFC06D0000000AB8880A88258AB04388A0098AA0C380002162AE00000028 62AE2AE0022A82AE2AE2802242AE2AE08E20E0AE0002AE2AE2AE2AA0900040CC2AC3202AE0060000); SDR 8000 TDI (0000000000FF920200000000000000000000000000000060000A0001800000080080000800000000 000810000008000B0000001080000000000000000000000002040022848822800000000000000000 0000FFE3DE01000000000050000000000000000000A0A00000000018018000000000000000010000 840000000800000000801009500000400400440000000800400000000000000000000000000000FF C68A10000000022C52440000000000C00003004000008000500000000B1000000108800020020100 001000000208348000001000000000000400548400000121000000000000000000000000FFCA0400 00002000000100000000000404000000120000000000000000400001000000000000000000088000 000120000150000000000000000008000000000008000000000000000000000000FFD0228000004A ACC0800CAA8AA8AA880CAA8C288080012AA2820000000022AB2AA2222AA28A28A2002332AA2AA002 0022020002AA2AA2ABAAA0000020AA2AA2022AA2AA000000000000000000FFC20300080020100420 0200444400040000440021000001100C00000043100500400102C004004000024841400440000000 0000040490804044000040000040D5004004000000000000000000FF52A8100000355905C3595595 591190595590194380005564540000001075565565175565545540004C4556556336456156001556 55655655440025655655650DD56556000000000000000000FF1AD70000000AA888CAA8AA890C8A89 292A88088A80005022A20000000832AA2AA02B0822AA2AA00010220A08208A22A0AA0002AA102222 00A0002A22AA2CA2022AA22A000000000000000000FF1FEB00000000000808040040002202800021 20100000001080000000428001000040004004004280001000800000080200000000000800000010 080000000020004000000000000000000000FF99070000000AA8E88AACAA8808E888080089688000 000422020000000022AA2AA502C0028828870041712205A0021026020002AA4022123462102102AA 2002002AA300000000000000000000FFE71000000000000100100180000000800100000000004240 0000000041000000011000E0260260000080960003204001500000000880C8034000000004120008 0000B0000000000000000000FF118980000000000400000002C0020240CA02805400001101300000 000C00000002402A00060061004A02003400081480000000004400001000100C8006008120000000 000000000000000000FF19FA000000001801001C018CB80180010104000200802040800080000860 0600648D48042002000000300400C0064C60060000062440041004100840D4004000006046000000); SDR 8000 TDI (00000000FF31610000000018421508018258C0601000020021000000E10600640032601600620600 6800080200104026026206810008402081226A005022884AC0150150060060000000000000000000 00FF22B8000000029880210AC581181180F8A6888801908021601600610000E0C41068962CC00602 608022240208400439001000640111602C82243000020408510E016000000000000000000000FF21 28000000051800201801801809A018008028038000C1610680600101600400600611400604600050 20020460061000004060084470C680201080402480400600E000000000000000000000FFF2820000 00001840150A01841851801C02A22A21008000600600640030611400690700400008050084202210 62064080000060800065044A0200404414014006006000000000000000000000FF98220000000018 8400188180388180D0C0890805000000600600600004600400620620000000000000200200600600 001000601000600800014012C044104016016000000000000000000000FF44BD0000000000000000 00000000000000000000000000000000000000000000000000000600600000000000000000000000 0000000000000000000000000000000000000000000000000000FF01110000000000000010000000 00001000000000000000000080000000000000000000000600680000080000400400000100000000 0004005000800800000000000000000000000000000000FFE272000000000800200800A008008008 00800800000002A20200200000208000200200A04002400000200208200200080008400020200220 E000400000000006002000000000000000000000FFA76C0020000000000000002001000040000004 00000000008080000004800002104000000420880000480400000000000000000000002000002880 0820209000004000000000000000000000FF8536010000100860100800800800A00800800E008000 00A8120120000020C21030020021029020000020020820020000104020000025821CB58021A82200 A002002000000000000000000000FFCBD30001500019440059059019158518050491438000016446 08648000600600605611600C4840100040C400600E000010006001006006004000446006226A8E00 E000000000000000000000FF07550020000810000000010010800020010052110000024A94014010 02C0250A40258000E42CC00004440405000000000800400000402000422810440401400444400000 0000000000000000FF64E00001280008A400488288090CA508048408008000012442002208003002 8020521130224A200002202202A00200000000200100200200200028200200200200000000000000); SDR 8000 TDI (000000FFD336000000001800809801801081800801941A03800003640650610E0061060060300040 46006014140006002000006006000006000806416000006142206006006000000000000000000000 FF97BF000000001800845951901049829D41805A11A000486146816006006046486400D0400700E8 008002468024208A6806800806280894825508816012046007006000000000000000000000FFFFF6 000000401800000C21C01A81821C01C11801800022E01680E0800060062C600E00690640E0000061 868041360A00000040000160C402380010280E126006006000000000000000000000FF37A6000000 00194002881D88180D80D804000107800108604E08600041605402600600602680600E0E72161040 8600004000400100600610040004A1B6087006806000000000000000000000FFDB06000000001E00 604F01801841801F2194DC1180000064C6C0601000714600644650610720600000604680440F0018 00004000296034412A88080004204006006000000000000000000000FF791A000000001802120801 801A0982180000844180012462060060100062060860062370070061042160864040060800080050 0008620E040088091424024006006080000000000000000000FF5C23000000001900000801829800 621801E01803800000780604620820F00608600652612600E0001460943040040800300048000862 0440200812A406046006006000000000000000000000FF3F3000000000184814E805829814009004 83090980004DE44E02E20000604406600E0970A600E10409680400E004818000004000E260603485 60202116006826006000000000000000000000FF7BC3000000001812209809801800013000820849 000110600F00E00000640C00600E006806006000A0600481400600000000400004600C0080012060 46006046006100000000000000000000FF0D32000000001800001801801A00003A82802E11080002 E22E4160000069440060060060068078040060068060860000000040000160000008804068060060 06006000000000000000000000FF02FE0180000018000609019E7830181880828847020110600608 600800708640E4160461C730650060E0060040060000000024000661940034209022AEF070461860 00000000000000000000FF460E000000001800410823811B20241220E30801020100600610611000 600E11600628640642600001620E224006888208002010086806022049006D5700610600E0000000 00000000000000FF5F9300000000180000088180188004124020222900000C624621600080600E40 6406C8622014028180600E24608600040000201000680C0421005000040850260060000000000000); SDR 8000 TDI (0000FF77FA040000511200909929B13A05A24A23B25A400000324C0612E0062C754600611084E000 800820896B0E80A00092688600080E0A08CCCCCD00C349149040B7116000000000000000000000FF 9453000000021080805801841A01288A11009B0D800100E10680602600700E016000486516516000 247026202010206246400026010000000020806024A04006206000000000000000000000FF435C00 00000010008018018012010008010018018000006806006007806006006000005807006002004006 000000006006000006000004004002004000005806006000000000000000000000FF978400000005 1805801801A11801804011811100000000501600E106006046906000006000000000802D96002800 026006041047400806046110006804084006006000000000000000000000FF310800000000180180 1801801801C00801E0100000000044160061062A64072063280040C1200101003004002050006006 080006001004004800047000044106226000000000000000000000FF3A1A000000001800801801C1 10010204011011010CC01160A78064068060B6886000806406826448000004080200006A2E001107 000006007000406106006056006000000000000000000000FF62B400000000182080180182100982 0803821F21002028E22621E22E4EE28E62E3E82AD0AE66E1A82A01253A0EA80666F618828E088024 204000C0600A806106446000000000000000000000FF85D7000000001A01801801811A01A40801A8 18001540116557006506086557086410007546006454002006002050006006000106800000000800 82408612602E006000000000000000000000FF559B0000000838408218238D122128888101301A00 008260860A601720600600604000620700600010084600A00000600600000600020C045100006006 006006006000000000000000000000FFE637000000003C00801801901841914811A0530080403465 3644634654F24610E310C0C03640E014222516D4214802712615054F090206006000806012004006 006000000000000000000000FFB8980000000D180482182380101182190384182280000160061160 0600608E4460000A430604614000000601220000640600000620004C204010006002004006006000 000000000000000000FF84FA00000000180080180180100100000100180180000040060060060060 06006000004006006004000006002000006006000006000000000000006000006006006000000000 000000000000FF9F4C000000401800801C01C01001801001C01801A0000040068060060060060060 00805006006802800006802000806806800806000004804002806000006006006000000000000000); SDR 8000 TDI (00FF58B80000000AA0000A00AA2AA0880AA0020800AA00012A82A82A80002A8AA82A82A80212A82A 82002202202A82A80000002A00002A82282A80203502A82A8AA8AA8000000000000000000000FFB2 450000001540003543543543103202102441540001550D50550000550510550D50CD1510550880B1 0910A10040800800550800D50C50AB0800C00C10C08550D50000000000000000000000FF0D080008 00000400400400000424400520414000000080000100000000080000000130000000108310110900 1001001000009001001001001413001001000000000000000000000000000000FF56610008000AA0 000AA0AA0AA0CA00804409008000002A82A82A80002A80402A82A8220A882882800000201A008800 00002A00002A8080000050250220208AA82A8000000000000000000000FF3495000000000800A00A 00A00A00B22A20A08A008000003002802002802502003000802042842800C1280281202080280201 0802800802A3288088A892882003002000000000000000000000FF418C0000002010002012012002 4020129424424B00000048040040040040548050008900048048000C0508A04C0000000080000480 0A28880A48820804845004004000000000000000000000FFBBE30000001418418058818018018850 C18218038000A962CE00E00600644600640028688C00C00000680640430010610620000600000641 6100206416006006806000000000000000000000FFC6FF000000400C00C40C44C48D02C20C08D149 50800104200394300290388A0C2081002002083001A0B5430420210034020810020095330434310C 3003092403402000000000000000000000FFA9080200000000C02C04A00082002A02003040100000 C01000880000000400100C0088130C00C800610C40804800020280000008800840E00A00A00880A0 0824080000000000000000000000FFFF95000000080000800800840800900800842AC00000019002 00200208200280200010300000000000200260200000200200000200000204A00000200010080200 6000000000000000000000FFA2AD00000040000100210C4B000100001102122200000005C0008001 00085100800040400700600102428C00840800002100002001811C024170408018090080C0000000 0000000000000000FF967600000012800020C00000200400006009800400003402101300218202A0 8001000280972960200080000401403801007000000204A009040002000000040820800000000000 0000000000FFCA2E000000041001801A4180190304E90B00110800008A400684680630610E046088 20680010000008612600600000640600000608000000008014442400480600600000000000000000); SDR 8000 TDI (FF40B10000000000000018010010018838008800A5094008620600602800E0060000060040060064 0000000C00400104750610000600640604040800C00C284126406000000000000000000000FF159A 00080010000006182104D0438019408C00A0000027000048000840E1840000860040201002200420 8450614052624660000600601C014040024544004606286000000000000000000000FF4FEB000000 00000000182300988382981480000802002000A81000001060241001260062D04000400021040064 10016016000006006004000000544004004016116000000000000000000000FF11A7000800000000 0000040220A192014802001004A00901104000205000000800200003062860000000000803404000 A8080000000200028048208088400010010000000000000000000000FF1E9B000000000000008001 00102580001002000008002B001008000000004011004008000604E2004040800005003004000080 5009040020C240000000000000000000000000000000000000FF817F0000001A002000080088A800 8B688480080690000024C20020080020C000020200023C0040000422124020311130020002022020 220024801024C0100142002000000000000000000000FF7EA04008004400004A0402400058400420 44240000010010210012210810012010810054412C10291E91012800000000010010911010890910 41001001001005004000000000000000000000FFECDE400000400020450C00D08804C42D40C02C04 80010030930034411030034010830030135034530134030824C048200300140300B0931032030030 03003003002000000000000000000000FF90CE00000008000008180380580188180900180108002A C0240840100061260882260860040140002060062060000062060081262062262061000061060060 06006000000000000000000000FF917A0000000002002AA00020024420021144C201000000480480 40008040040008048AC044844C82908890800800800800000804805228800892D288048040040040 00000000000000000000FFC253000000000000000A00800800800904900800800000200200200000 20020000022028020020000020020020000020021080020020020022400020020028008000000000 00000000000000FFB34E0000000AA0000140AA0AA0880AA0300404AA0000AA92A82A80012A8AA82A 92A80102892880002302202A82A80020022200002A81802A81000002A82A82A82A80000000000000 00000000FF9D3F00080000000000000000000200A100080400000000000100000100080000000000 00410002000202200402880000000000000000800005001001201408000000000000000000000000); SDR 8000 TDI (248B0000000000000010880018AB8C98C5801883800028620620E0002AE0860002AE00428E28E000 2002222820000060060002AE2AE30600C0102062262822AE2AE000000000000000000000FFB1A200 000000000012100400D801005800009841800004600600600000602400000645402602600400008A 00A000406346000006006086446028016086002006006000000000000000000000FF8CA100000000 000000B0200C18018418558C2809000000E136126000006216000006104006006002130002022000 15601600000600604E0840020C4014052006006000000000000000000000FF84CC00000000000200 1000001801009800000801000000600600600000600400000600404600680611000202200114E016 00000600600E028002004314002006006000000000000000000000FF227900000000009000100000 18018C40018010298000006006002000006006000006004806846080000002312000406B06800006 006004C04528006006000806806000000000000000000000FFD9F90000000AA0200AB8AA0AB8AB80 00AA8AB08380002AE2AE2AA2A82AE2AE2A80062AC28E28F2042202AE1060000160260002AE006BA4 1870002AE0262A82AE2AE000000000000000000000FFBA9800080000000000100101184188003084 C010000008000000000000600400000643400600688024040A10A000CD6297000006006085084100 00401608E006006000000000000000000000FF04990000001540921559551559558C415495410800 005505505505505565545500065545565160045415560060000C6116000556006014410400554016 556556556000000000000000000000FFC51C0000000AA0AA0AB0AB8801018221008018A280002302 A82AC2A82AE2AE2A80060052AF28E0000800220000000068260002AE00744E20C20022E3262232AF 2AE000000000000000000000FFAD5D40000000004000100180000180800080182280000000000040 000060060000070050070463018080032480002062260000060064460260D0006346007007006000 000000000000000000FF06860000000880AA0AB8AA8460B581800418108080002002A82A82A82AE2 AC2A8006984A88AC8400030906C4C00022E00E0002AE0062A40C40D0106204200AAEAAE000000000 000000000000FFA9EB20000004000000180082000188000002B81080000C80000000000060040000 06034040000A000002D608400000628600000600600440680005608C084006006000000000000000 000000FF1F7100000000400000100110900D8258AC80004500000060060060000060060000064040 0604608049000022000010604600000600600E02C450284024050006006000000000000000000000); SDR 8000 TDI (B30000080000050018018A98E98828D300102D02200062360040080060042082061C61B602610201 404610422E026006000406014056002102004514094086006080000000000000000000FF63AA8000 00000401801089801801840401800804800008080600412100600600010602620810002088648604 200628628600000611600610210843604C004457436000000000000000000000FF8DBD8000001200 01B01A3180D802000001A288408A004942A680684000E50608048F0064403482200C730600240600 6406000896206907022440104004024406006000000000000000000000FFE7678000000004030C30 49815E50048C8D0108A0904000C11600028102F88780000724224622600010C02610220600620600 0046106007142110006046007A06006000000000000000000000FF0BB2800800440001423C81C018 0DAA888380089884214048468042C1026406800C162080161160000441070008060060062000370B 7706A9A008104026007007006000000000000000000000FFCDFC000000300001C01C818018000808 21C2000400008812070050000060040800860960860064C5003406000006006006201306C2502E20 044400028E04E007006000000000000000000000FF00CE000800000001401809821801A448450200 22000015500F12600000600500080600602602600000210751080605601600000600700688004000 40060AE006006000000000000000000000FF8E30000000000001801A43C058000009118118118000 00204600000080600400000600600600600400045602000650614600000600600644000000600640 6807006000000000000000000000FF73DC0000000000010AB8818898AB8899118838D180002023C6 24C0002AE2AE0002AE2AE28E28E0002A81060400060066160002AE2AE2AE00A0082AC2AE0062AE2A E000000000000000000000FFFC7100080000000112900180980000000100900100000A200E014000 0065260000063020060060040820080C200600620E00000600600E01002608814410400600600000 0000000000000000FFA17D0000000000010AB0A98898AB8888238A1083000022E20E2060002AE2AE 0002AE2A82AE2AE0002AA22808200632E0A60002AE2AE2AE2920202AC2AC28C2AE2AE00000000000 0000000000FF6B4D000000000001005955943954115091945953800040E546540000556014000556 0525565560044284C24100064B614600055655644652000044641644E55655600000000000000000 0000FF51248000000000010018058258018258018138018000086006114000006006000006000006 006002000000410006006006000006006006042008004006046006006000000000000000000000FF); SDR 8000 TDI (00800000000000020040008008840002402400003410000D00000000000010010300200200010000 001080000500100000000008000001004A0000000800800000000000000000000000FFD4E4000000 00000000000000001004400000800000000080000000008000000000001000000003000001080000 00500140000000000000800021000000000000000000000000000000000000FFB5908800000000AA 8AA8AACAA822810CAA88088880018122ABA020002AA2AA0012AA30228A28A0002ABA23A222AA0022 02001AAA2AA2AA2AA20104A2AA2AA2AA2AA000000000000000000000FFE0E28008000000000D0401 401080011140043035000008C0040000010040240010044800040042034500505000000400000008 05008004B24002020014055004804000000000000000000000FFA9F0800000000155955D55955955 823155901103000034555604600155655600055741655455400154E44E4565564361460005565575 57554020406556557D57556000000000000000000000FFF79D0000000001128028AA8AA822922808 88088080002222AA4220002AA08A0002AA00A2AA2AA10000250204A2A230A0A20002AA0A22AA00A2 A02023223022AAAAA000000000000000000000FF2BC0108000000000000400200000080000052028 00000000004880010000000008000200000042810001000800001002080008008000010005000880 00000000000000000000000000000000FF3D580000000000608A08AA8AA8328808848928A2800020 A2AA3120002AA4000002AA04228C2880001222022220120026120002AA4022AE08600011A2002002 AE2AE000000000000000000000FFC00400000000010400C000000081800001010000000004400000 400000000000000030402602608080612C0044485001400000004080002040400040800C80000000 00000000000000000000FFB29A80000000000800000000000982C04C02000800001000000D000000 02D00000000300060062003100001081000500100000000A00000283004A00300000000000000000 00000000000000FF4A050000000000018018098B18218A080500000A040008022600409000600441 040608602000002080600604640414620E00000608C0060004004A80240042263060000000000000 00000000FFF0BD00000800000180192180390A0108D1810120014000400600000000630408001602 63080800000065264041160060060080060044260900880044845440060061000000000000000000 00FFC19F00000000000180182180380200C829009081008000600600604000628408010E00600604 60021060262060C640616E00800600622600A2020802942241160D6000000000000000000000FF8E); SDR 8000 TDI (0000000011811901801A00005831810201042000E00E806806000006006080306806046000006484 206808086808000004004006006400038424000000000100000000000000000000FFE7A600000000 0543C81801C4D88428180302100000401170161080060004168161002040804000001468B5506401 00401000000601620540F029520104002C04504000000000000000000000FF3FEB02000000000180 18018010018010C1005028000004600602000000002600620000620800000000E004006088086000 000000004004006002000044120000000000000000000000000000FF46BF00000000000000000000 00018000000000000000000000000000000000000000000006006000000000000000000000000000 000000000000000000000000000000000000000000000000FF0C2800000000040000000000100180 10004010000000000000000000000000000000800006006000800001000000000000000800000000 000800800000004004004000000000000000000000FF4DCC000000000001800800800A00A00B0000 28110000002802002802000002002000002004000000102002000000082000000002002002002100 00400020E002002000000000000000000000FFF57102800000000000100005020008020824004010 40400000000820488000400008000000085020000010014000000000000800040000000000008000 000000000000000000000000000000FFE7AF000000000400800800A00800880800A0082800203120 6240262220000200200100201200200108200280200048200000014202201A00240104204200A402 402000000000000000000000FF38E20501501100419418B194580184194594590D8C401064865142 0651010600608001601400480109600600654000605000000640600749600000C22610400E086150 000000000000000000FF9265028000000001611001008004000611030041080008C0052440000C80 0420400800010C084020000018C0C00010000000002014000000428010C005004040040000000000 000000000000FFC0F60500D01104208C0950B42804840944CC488482400823022B28023300820020 0080A00A00200101200A2024C08820500000024A2002412001002002902002002128000000000000 000000FFF5B100000000020000800000000000001001022810000018000008000000000000808000 800000000800000000008000000000000000001000008002400000280A0000000000000000000000 FFB23E00000000000000000004000040011000420000000010008002000000000000000000000000 000000010000004000000001000000008010000C8040400400400000000000000000000000FFA9DC); SDR 8000 TDI (10000001801803CA1807801801E01001000012602E26E604100106006000A0220601680081C00280 400000440000040740600600642410600628200400C000000000000000000000FFFBF50000000480 09841A8590B8A0621805911115008129780780680C0C018E00600000208602E02410446206404022 4A0048030400F0968260C100608600230F006000000000000000000000FF05410000080000018018 09801E01811955814431100000E08600700404000605700800382730600484400A005A1180613000 005620640711641048E004010104084000000000000000000000FF3F3A0000000000018018018098 0448BD11C050010000006006026804000006006800A1200F10720020400A00448800600002000408 6846846A08106004020001000000000000000000000000FF17B4000000040001E03801821801835A 01883488000000E00602600602004600600050200E08600025600201428000400000048780602400 6C08006006442104004000000000000000000000FFDAD50000000000E38438018310201210318110 20000086680680600400012618600008700600640002E0D6A4C01006462044020616601404704180 6026200206006000000000000000000000FF9D1D000000000105801803881043E011250010420000 006007001006000006006000012806806004086B0340582000402000000600600400600410604600 0404804000000000000000000000FF960508000000020180188180190020D8010014000000006006 02000402040610620000648602E004006006804820004000000000054024006108D0600600000000 0000000000000000000000FFD1CA080000000401C01845807889803C4B421041904104604E1002C6 00830608600800228602640040411200602000010000010602E00601E84801601690300478400000 0000000000000000FFAC73000000000001801801EA1008001013040401800010E09600050E008006 0060100020265060020050428060002A200000000408600E08700080620700208F00600000000000 0000000000FFE66E000000000001C01881B4120000160140020080010861260C0014000086006000 0070411080000068060060004C2000000082006054106140A0E40C08300400400000000000000000 0000FF9AE2020000000481C01801855005881101445030020004600600000400140600E400006100 20000012604E08640000200000000000640400E248106484023406006080000000000000000000FF E3BD00000000002B8898C5801881813C4BC0904110400D68060AE04204102E806400082A0E426400 40E35000608080490000000610C006A06800300004082114284000000000000000000000FF196B00); SDR 8000 TDI (000001800001801801801A0100000100008060068060060060000060060060068060008000000060 06002006001804006004002000000004004004006000000000000000000000FF45B8000000000011 90015184104180031480020000014068014064000060005060060270110000008060024060068000 2E000106A00816E05040906004026006006000000000000000000000FF74DC600000000001800001 B01400400022D000A882004171000060000862000AE0868055280002880060400060860028060000 0700300700700000600400602E006000000000000000000000FF2835000000000041800001801800 08430080C00090400A620024E31020680820604640E80640E00000480A40E0064011060000060049 4E00408080600600E086006040000000000000000000FF3FA7000000000001C02001A01801982000 80A2E29A8002F0880AE0A86AE6B946E28EAEE2262BE7A80AC2880BE226A2A2BE2A900E0AE0A60271 80A06086056146006000000000000000000000FF746D000000000221800001F01000204144112090 0440556500C56D1008600008E0A6C1755740600C00604AC06106C009260010042001542010010040 0600400C006020000000000000000000FFEF62000000080001800003983049808024090008002008 606000650000700000602680600604600600480080600680040600000600610680664600C0060040 04006000000000000000000000FFCDDB000000100201C80031841208294301B040B1004048688E95 70165065495261460A42262160A00B611254E04623289604011602684E0461000060060060060060 00000000000000000000FF97E0000000000009804083805001800029800003130004E00640604604 E00001621640E00E08640C00420000620600202648800608E00620600048E1060060060060000000 00000000000000FF8491000000000001800001801800001801000001000000600600600600600000 60060060060060000040020000060020060000060040060040000040040040040060000000000000 00000000FF4F3C000000000001800001801801801801000001000000600680600600600000600600 70068060040048000000060030060000060068060060008040040040048060000000000000000000 00FFF28700000000000180000B801800209A01800001010041602620600E00600800E80620614612 680400405200200642211600005600400684C0A8206106006406006000000000000000000000FF41 6D000000010009800501D2D921821B4DC12651100004710E01700602600004680E004406A0682402 4800040416002046100007016D0610700400E00648E09688E000000000000000000000FF99DD0000); SDR 8000 TDI (00000000004004104004005004000000000001101508000801000001541801001011001000001001 011000001009001001001049001001000041000000000000000000000000FF8ED00008000000AA2A A0AA10002A0800880AA00400002A8AA82000880002A82A8000420288A880603082202A0000220000 0000800402002A8060220200000A00A00000000000000000000000FF40D8000000000400800200A8 4A00A04C00C002808000802003032842002001002002802042042A00882892812802882802000C12 C02842802800802892812112102000000000000000000000FF2E8800000000040100000123128023 02232002530000804805104A04004800004004A900040048008448000000008140000008408C8888 800C0888C824D2082082C000000000000000000000FF1B95000000000001A0004185380590580B10 2051800000600C24E014006000006006106884904500004206A4604600400600028E2C6016046200 10C406006016036000000000000000000000FFB197000000000500800680900C20C28CA081050400 00082282082343402020C0200305340B00304830302301308324350A0010030030033030C9223033 4A3442002000000000000000000000FFE11100000000020142030030020020000231033500000206 08808810000028600000800B04900800980A41000000C04198000800A20800E008888B8840880E50 8A0000000000000000000000FFC23800000000008080200080000281094080004000001028020624 4200200000200600200000401002600A01210200220200060210200200200044600020A023006000 000000000000000000FFD86600000000000000000000600582641802200000010810006003000008 010000800700060260C00004040A40802A4000000100008280088600000200520080240000000000 000000000000FF075F0000000000000002C264004194008400C08000012001311910080000418010 08100086286509008000400000040000000018040010040150100000000000810000000000000000 000000FFA640000800000121800009839021889800000008000000E800006020406200086806284C 1080000060200624E26600042600008440000410002000043404400400E000000000000000000000 FF6C240000000004A18221158352222D5C08050230000094E0008C6C310060200060868060000208 08A22A068AE846820CAE000A06A26886C0E8B085080488CC240AE000000000000000000000FF86AA 000000000001800001801E00201903604101000020623621600600620828600E4A65075060801120 0A206286480006000114014205080200100424424084406000000000000000000000FFBA85000000); SDR 8000 TDI (0988580100080190485000100190A000600001008000000E00608800200400444000204614608613 222E00000620E00C1044C8200020030126006000000000000000000000FF99460008000000000440 0008000180808400000C010012040000002021041000009000001620644000022002054004020044 80000100480080B0480448040040010010000000000000000000FFA8674000000000400000090020 1184004805011100800005202C84204400001000C010002610E14042010C00008844440014050021 0108020000504404004040000000000000000000000000FF82630000000080118018028088409808 80880000840008214A00200204000240200020254802001000200220322200302220012202202200 2400002002012012002100400400000000000000FF0C0800000000040042040058418050A4005014 02000102904100108100128122120000128524500100C0010080010000000010010D02112812B916 1009001005004000000000000000000000FF7326400000000420C20C10C00810C2CC20C00C148001 12B5134035230011030430402030D350300104A00321209300202250110348210310302100301300 3003002000000000000000000000FFDE160000000080018018038090018011090290818100006004 15400622020628630008620600E0A020409600622622620602024600624624630020620600602600 6000000000000000000000FF59960000000000010012002012802012012212440000804005044800 000005004000C00844844800804800000800908800000A0480480080082088880080002482C00000 0000000000000000FFD496000000000000A00800800808800800892810800000280200A152000002 00200014A00200220800210200200200200200012A00200200200800200200291210200000000000 0000000000FFB7780008000000AA0AA4AA0AA0220AA0AA0000C000012A82A8290200000AA82A8000 0002882884002A86382A80022200020000402A82A82A80802202A82A860060000000000000000000 0000FF9C630000000000000000000041100040020001000001000800028100000800000000031040 0002030300080000004000000000804000880002001000A0221201210000000000000000000000FF 3E970000000000AA4AA0AA0AA0A20AA0AA03208A00002A8AA8220020000AA82A80000102A82A8000 2A80C02A80002A00000002802A82A82A81002A82A82A90880B0000000000000000000000FFF3C600 00000003545543542502442D03483542280000550550D00A28000550D50000880510D50800400D40 D50800928800000C50910C40D50810C50C10890130140000000000000000000000FF220800080000); SDR 8000 TDI (80188385588990984B00812180000060B61360220000060060000AE0060064403260062D65460002 CE000006006126106208004484404006006000000000000000000000FF0A20000000000401801801 800000040041000221800000603600612E00000600680000604202280000E04E00F5560004960000 0600E00600E150906006800006006000000000000000000000FF5FC6000000000001801801801909 80181580101180000061060060040000060060000068068060008860861060060000060000065260 06526000014004004806806000000000000000000000FF7BFE0000000004ABA018AB0AA8320CA881 80188380002AE2062AE2062A80062AE2A82AE28A28B0182262062240472A88260002AE0062AE0070 002202AE2AE2AE2AE000000000000000000000FFACD6000800000201C01801040901824804000C03 800000600800001000000600600040700600604010E016006C4650000E0000260060060060080040 040C4006006000000000000000000000FF0CFC000000000155C01955954944110910000501800055 6500550556550006556550557552D12004C4640F55651655050E000556106554534130550550550D 56D56000000000000000000000FF732F0000000000AB8018AB89082B8888C080100000002AE2C02A 83402A80062AF2A81262AEA8F002A0620648E00602122600030652E106546420B2C225204AAEAAE0 00000000000000000000FF0097000000000001A01801000800002842C01032000000603000000000 000600600000600202200008E0A680600600002600000642E0060060000060000060060060000000 00000000000000FFD1620000000000AB8018AB0A402208809080115800002AE2002A82022A80062A E2A8216A88AC800086E14604619E81010E000016006456016008204314214A06AAE0000000000000 00000000FF41D5000000000401801801012001800000A01224000000604000004A00000600600000 604400484048408610622604048600008E0962062D680010008E0A61060060000000000000000000 00FFD0FC00000000000180180180091184283300110100000061160061040000060060000D200604 600000224E24E00630802600024644613400444005402401402E006000000000000000000000FF59 D00000000000018018018208820208050250A9020020E0AE0860442000A620600002208220201000 200600700600110621008602600400C00009601000000E006080200200000000000000FFD3E10000 000000018C18019208C20329280238A5082034E4080880800504A600600002645001800000240608 644608A0AE04000622604608600000C404184086076070000000000000000000FF92240008000000); SDR 8000 TDI (180188182200000000180080400164C04C040600009600E40000201400405010E28C000087004006 0000160961444B6050414504402007006000000000000000000000FFE37A800000084000001E0188 1004080080009808802011600200200500000600780000020400402800708600000600600608000E 016026106050014286200007006000000000000000000000FF3087800000082480401C09C01849C2 20E02098008001086802102004090816856418000214044000116416040026004006000006106104 C16002404006802807006000000000000000000000FF7785000000000480001809A0180804400000 380000010264A124040610008700602020208408C0040060052002A700200E000086206000044300 084006000006004000000000000000000000FFE42B00080000040040180180908180202000D84000 0000604008022C00080700600040000404440000600600054600028E0000060060048064B4004486 401007004000000000000000000000FFA697000000000000001C019458005500082C180500008069 040040060000060060000120440041081160040000160020460000060060000060000AE007092006 006000000000000000000000FF1C6C0000000000AA0AB8AB91183B90009204188900002AE25C22C0 860002AE2AE0001E028C28C0102262AE2A80062A85060002AE2AE2AC2AE00064606E0622AE2AE000 000000000000000000FFD1FF000000000000001805881080041801800829000000608E0161160000 060060000A800000000008E00642000600A28600000600612E106010226124022006004000000000 000000000000FFB6880000000000AA0AB8AB8218A38098C180A8AB00002AE2862163160002AE2AE0 002002AC2AC2802AE2AE2A828E2A802E0002AE2AE2AC2AE08000630420A2AE2AC000000000000000 000000FF16970010000001541558318538441159538B090500005564465462060005565560002005 5055054442655611051652205600055655640645642008E406412556556000000000000000000000 FF03E100000000000000180180580184580590080100000060061460240000060060000100040040 0000600600002600000600000600600400645011600E082006006000000000000000000000FF6859 0008000000AB8AB92188183380188182500180002AE2062062C80002AE2AE00000428E28E0000062 AE0060462000060002AE2AE00600612020403C1242AE2AE000000000000000000000FF11DC000000 00000180181180000002400188480D800000600600600600000600600020602202210400E0060060 1612800600000600640E4560800AE006096006006000000000000000000000FF47B4000000000001); SDR 8000 TDI (AA8AA82A8C888888888080002AA26223A4220002AA2AA0003220AA4AA0002AB2AA0000422A200200 12AB2AB0622AA0023A22AB2AA2AA2AA000000000000000000000FF83A80000000004004014010400 00020040000405000080410400441000100500400000000000000043084800002104000000100500 402040040104D005105005000000000000000000000000FFCFB3000000000000155B55D558CD9159 35913B43800155650C484006001D57556001456556156109556556000517546056000556D5640655 6048444556555556556000000000000000000000FF080F0000000004000AA8AA88893288C8888349 480000AAA22A32A1220002AA2AA0004AA2AA2AA4A000220200028A48202A0012AA2AA31213204B28 220A02A2AA292000000000000000000000FF5FA10200000000002000000000000000000200080000 0000000200A800000100000000000000040000080000000080828000000000011000020001100100 0800800000000000000000000000FF3C210000000000000AB8AA80482288A8AC90082100002AA202 20200A0002AA2AA0000022AA2AA0021031220000020125020002AA2AA02200A0002263C04062AE24 2000000000000000000000FFF4840000000000000000000010018000000840920000000000100040 00000000000000400400400053400600001052604000000000000C24020200000020400000000000 0000000000000000FF18108000000000000000000CA09184000204800000000000B0030280000000 0000002C80060064A000048800054080828800000000028010002809003013000012800000000000 0000000000FF473A00000000000000181182104B8018038010220000116010008020000086006100 00610401409000710400000700640600008600610844420210804C00808610408008800000000000 0000FFCC0500004000002002180580990002180184380815400060A050028440043640E20000E02C 00400000420424010E05611650800608604410E008000204520216434220000000000000000000FF 073B0008200000000218018010081A595981180900800066A606621E20020610E000006024404400 0060041000664260062C00060064060841000820040A00062A4010000000000000000000FF66E100 0000000020001801821083903803805811000004E00600E0220100860460C0404184154088006086 64040620409E1001064860A400458010220420200600C200000000000000000000FF30C800000000 020000180D8098418000A00358240A41086011300087000036B0620000A01440C200006A048C0096 00E406028106006208456408014034010316006148110000000000000000FFC27680000000000000); SDR 8000 TDI (800801800821000101800801610E0060140000060060061000160040000062060060060060060000 04006088400002000000030014010000000000000000000000FF4299000000000000000000000001 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF4079000000000000000200000201800001 20000000000008008000048000000000000008040000000048000000000000000000000000010010 00804004005000004000000000000000000000FF5C93000000000000000900800800800800800800 A0004420021428020008020220020000028020000822020220020020220000020020024021280020 02002002002000000000000000000000FF1FA20020800000220000100040440400000400C8200100 00008008008008000000000000000000000000005000000001000000001002000008008000000000 00000000000000000000000000FF570E000000000800200808802C3A820800C00800800020341203 280200006200200200000300200009B00220205A102002000062082002162820D82D824021824020 00000000000000000000FF99CC004010105800145A01001041C01003C0110B800091601600611600 042600600602120604600028E00600600600700600002620602680600005601600682608E0000000 00000000000000FF974F0020800010220000010010002010101650A9000102500101400040010400 40040000414100400008040840000800840008000040010000808008010000000000000000000000 00000000FFCDB20020101028002A2800800820800804A00810800008A00200280A20048200200204 0822C2A02028200200200200200200000200204280280000A0020028020020000000000000000000 00FF5553000000000000000000000000000000080084000000000800010000000000000000000000 0000010800000000000000000820400000000000000008000800088000000000000000000000FFBB 050000000000000001000000000000080220000000800C1091800000002004000000120000000000 0400040040000840000000000400500010420400C00020400000000000000000000000FF40521200 00000000200000000000044044000024000000000008030000100000000000820000048900080000 0540810288000800000A80000008000000000800000000000000000000000000FF11F00000000000 00000400200100000000024010000080011000001000000100000088000020000000000000001000 0040000001000008000240008001000000000000000000000000000000FFF52A9000000000004AAC); SDR 8000 TDI (1903800A35C051058841006026B0E00E04804600F50604020C2B621100608E116444005806011006 026007886A40A94004084006204000000000000000000000FF48C000000010180000000000220400 00018210318000046C1600700E00000600680620000C0062243170060068042040062000C6026204 004480016806006006006000000000000000000000FF4606000000001800001801801801801809C8 1E01800010680681600E00000600600640000E00622104602600600408C006001046006006026220 004004004004044020000000000000000000FFF1A20000004018000A1200A0080020080508185180 0088641602E00600000660600600002600A19C13618660600640400E0001060060870261181005E0 500004020000000000000000000000FFF677000000101800141880804803A00801450001800002F0 0604600400000E00600600004600E00120600688620400609620000E04650E20600002C80C004004 004000000000000000000000FF78A0000000001800001000804B00104801820001800000620E0060 060C0016006046000006006004006006106246106006200005C06000080224000000000004800000 000000000000000000FFA7530000001018001418C0840A09882A01D129758100B260848069060005 4E6063260008060261400001160062244E418720000621E10608618048440C00C807004000000000 000000000000FF9641000000001900000880E10848420953402801800145610604E0540100060064 0F8003060A600000000602E00400601610000602600C0008101070960B7006006000000000000000 000000FFE6F60000002018000018000022800000A500080180800060170370060A81460060960014 8490602000200702E006A0400700000602600A007410404504024804004000000000000000000000 FF654E00000010180000080040010180020108092180000360B600600600000600600E0800061060 001424C6026006006096000006006110000088108000040004020000000000000000000000FF0646 00000010110014184085084984083995111580001164060061D600040680602600800E0261000001 1630600400481610080400E126206240804084B0C20E004000000000000000000000FF0A46000000 001000001800800A10000811A23009800800600600610E0000060060460000060460000020060060 0601E80600000400600400400002600600606604E000000000000000000000FF1743000000301000 001800C00900000801924051800002684600600600000680600E0100069040009461264460070061 0E00080600E02600648A92C104C05404004000000000000000000000FFDAE6000000001000001000); SDR 8000 TDI (00600000A00001E800007224003C5022020622E0060010070024080000060A640600602000100600 600200700000400400502400E000000000000000000000FF3F8C000000001000000A010000000280 04013109854154E0900220800000D6886306000D0A2000400021568060B400608000000100000C00 6041006006016006006000000000000000000000FF6E13400000001820000801C0080181040E8210 9182000060812520E826050E7662AE2A004A4802800090262CE2840172C800812602EBEF02700100 4084014044006000000000000000000000FFEDA1000000001000001801800A00240000A143459540 556CD000651040005700E306000516802434002355086536026100000228200A1000502D00000008 000800E000000000000000000000FF4ABE200000001040041829000A018000008981038000096560 016600008076006006100E0200000000278C01645C006000000A0604614600600000400400400400 6000000000000000000000FF0257000000001808000C09A20828200212D40A098000006816A06036 2001060265264201068820840110464A6006007110008126015006A0600000000001600000600000 0000000000000000FFC0530000000018040008418058018000018048058200106006006086030006 20601601001205040000001600610400640002041640641602614000410400400400600000000000 0000000000FF9D750000000010000008010000000018000018018000006006006006000006006006 00000200000400000600600400600000000400600400600000600600000600600000000000000000 0000FF1E16000000401800000801800401801801401C018001006806006006000006006806000002 000800800806006004806000000006006006806000804804004804006000000000000000000000FF 88BA080000001080040A81801902201A008018018000006046004116000046006206000842800204 00002610604408608000000D024804506044016006006006206000000000000000000000FFD5F800 0000001800100A45841829889A4584590588208AE106504007048106016816040A0A44880800088E 016404006001008006406806006200D04804094804006000000000000000000000FFD7DA00000000 1800001801801A01801A11C31C01800002601207600500008600610E000006106001006006006004 04400700000600600600698000480400C006004000000000000000000000FF650B0000000018000A 1520000228689015819801800009E88A0070860000160060060000268060040070661074049B4186 00001EA06014604045146416506006006040000000000000000000FFE76D100000001900000905C2); SDR 8000 TDI (B00A20810A008001002D02803082800003002002800802922800822002802A02A4A80080088A8028 129528008D2802C42842800000000000000000000000FF1F1F0000004420002482242C1200214305 445201000080480D000A14000005004004000A00810900D0C000804950880800000C40800CA0A00A 0080094890891084C000000000000000000000FFEECC0400000018000019038810018A188D001801 800000E0A408E48401004600640602000642E000024A060860C600600000040600608E4060001060 06006016006000000000000000000000FFF9ED00000050080040AC08C22C24C00C208CC820800028 220B422002101C034038220010A310300150B0020034030C210000115302322303348904342B3130 83082000000000000000000000FF864600000030200020820020020C2002603900400000508908C0 8D00200088C00020000880808800805001000808B08000000B80800C20C00880900C508108108040 00000000000000000000FFD88A020000008800080808800800800802800000800000260200200200 840200200200000A05200040A40300204208210000004A04214A00A0080220020020020020000000 00000000000000FF2FFB04000000000000100300000384010400A42200010A000006000010086000 08000482403840002300081883A002100008000002001003023008400400402C0080000000000000 00000000FF22EA0000000000000001B0064041828008660400000101100031122801020000040020 00000200000800200000000400200000000000000001000080004803809800000000000000000000 00FFFE52000000001800035805108821901890804081800000685000688000000622624600012440 6000146002206406006000000430000280244400240028320000026000000000000000000000FF20 F70400002098002C0B2DA48A2C221B308C22818000806000806250211427007446000AA48D68008D 280AC8E826B16000080CB6806B16A36A28A14804A04924006000000000000000000000FF8E9F0000 0000380000980120080000980281184380008B6A1223608600009622600620801640600040282200 650E0260200010048240240040800C602E0C0A0E0D6000000000000000000000FF83020000000018 00000A01200801801800A01801800000600200600600000600600600000200400000080380680400 6000001006006006004000004004004004006000000000000000000000FFFD2F0000000010140408 01844051800000004033800001641401A00000010600600601092685200000220604684602E00004 03B8600AA0406949000000096008006000000000000000000000FF37D8000000001800000A018008); SDR 8000 TDI (0120002004002029000000020000400010024004C004104028000000440044400200080200220410 0900200000000A8100000000000000000000000000FFF1C70000000C20000008208008048208040A 0000800000200220A02218601240248028240220A00001A00209A603402002002002402002002000 00A052002042002010000000040000000000FF22354008004000000824004200004804004004A400 010216A10010010010090010004006A0021051001181110000001081201061448080001681014080 111001000000000000000000000000FF9474400000420010002C00C00840D00C20C84D0080015030 234132431030131030001020C20C300101300320240200308310340300249200B141002082003003 002000000000000000000000FF9F760000000820000C1821845801821881821841804002C0860040 060040060064A002E006416000006006046026206406206006016006086000004006026086006000 000000000000000000FFD9870000000000000842C020821031000105120100010041408050040040 05004000000800880900928804804800800004004800800810820890804948908804048000000000 000000000000FFC33700000000000002880894488080480080480080000028020020020008020020 0000200204200000200200200200200200200200250208A2000D2002442002002000000000000000 000000FF23510000000AA0000500120500220200AA2D44AA00002A92082A82A80012A82A82A80002 A86087003402A92A82A82AA2A80002A82A80202004102006400002A8B80000000000000000000000 FF78960008000000000000840B409002C49021040000000000408000880008000000000004800002 820A00010000880090000004800000A0148142400220000040080000000000000000000000FF2F84 0000000AA0000820A010202A00A0AA2800AA00002A8200AA82A80002A82A82A80002A80A00002082 A82A82A82A82A80002A82A84800000004200882202A8420000000000000000000000FFAF79000000 1500002C82102002443000021441540000D50890550A20800550D50550800820D30800811550550A 40B40550800848D50C08C00C008C8910CC0D08848000000000000000000000FFD843000800000000 0004044005004A000020000000010001300010000008010000000010010090010010000010010000 00001001001051351101111001109001010000000000000000000000FF131F00080008C0000840C0 0080AA0200480800AA00002A84202A80200002A82A82A80000B8200202400AA82A80000002A80000 002A80000000A0200200010200680000000000000000000000FF3D6E000000000800204A10A02A00); SDR 8000 TDI (148518018000006046116046004006006000000506016000C4C01600600680600600625640400400 4400056004504046004000000000000000000000FFBF290000000AA0000810AB0910320880408818 AB80002AE3062262060042AE2AE2A800207C2A70040842262AE2AE0060060060860AE4A22AF00020 6304054206AAC000000000000000000000FFCDC400080001000000005510100180000000B0018000 00000C0400070040060060000000060068000461060064060C600600604603400405402001408402 C406004000000000000000000000FFA4F3000000154000014155801944110090131155800055044E 4C04CE000556556550002086456004C8E45655655621600600703402603255650810C00440431655 4000000000000000000000FFA15B0000000A40000AA90180D8AB8C80330810AB80002A822628822E 0002AE2AE2A800028E28A4008142462AE0A8C0E0060064860841242044004C60162060CF2AE00000 0000000000000000FFB8A74000000000000A08010A30000420030030018000000006008006000006 0060000002060864800460860060000A6006006B0648C08000400144623608604780600000000000 0000000000FF9F2F0000000000000AB82104102208C1080E10AB80002A83062003060002AE2AE2A8 002244066100D042962AE002006006006216406416106120A066441042062AC00000000000000000 0000FF820020000000800000180908300182200000B0018000000006100006000006006000002106 1168000360460063120860060060360C6112036800056004504046004000000000000000000000FF 27D40000000C2000001085849911801925801801800000615604E156000006006000004056406480 28401600604025600600610441444450430008012E02E096006000000000000000000000FF314900 00000000000010098238A800B941803801800024600600640600000630604000600602620050E026 34E20300601600600400620A0160004003260262A6406008000000020000000000FFC15900080000 00000011098238A404381400317181000900063E01161104060D60200060064360502064A6006086 00E20600600600E0EE026010010014104006204180040000000000000000FFA14500000004000000 1001009001881800001003802010008E40002600010E00630000620400600202610600610640E206 006004416102046222000004004006084000000000000000000000FF244600080000000000010001 00118B00B000011200C04281100005500105000281000000002104300C04002A0000000008000000 000400008228208280120280080000040000000000000000FF465700000004000802100100302180); SDR 8000 TDI (0015018001420001500806301009127010040B202060608150015A621010680000018C85645E5461 4150700F006113006000000000000000000000FFC7F8000000000082402481802004000080001449 82400C004080008620100000702000800B04600400482F0460060060000000024060040000018150 05805006806000000000000000000000FF459F000800000000020001000111804254001001800111 002015000628000000600000880242E0028040060060865470000000070065060060220050040040 06006000000000000000000000FF4D4C00000000000000A001000000020000001C01800002611600 70060310070070000800001060040040068060360160000000060060360040101160060040060060 00000000000000000000FF63F30000000000000C00AB8AA0238880840AB8AB80002463462062AE00 02AE2AE0002202A80060002AC2AE2AE2061462A82A82AE2AE4162AE0003262AE2AC2AE2AE0000000 00000000000000FFEFB2000800000000004001851800043800005801800008603608600600000600 600020029000600600C0020060260A60000000860AE02602E0220C40040060060860000000000000 00000000FF06030000000000000800AB8AB8238CB8B00AB8AB800030E20622E2AE2C82AE2AE00022 82A82260002AC2A82AE24600E2A82A82AE2AE0A62AE00822C2AC2AE2AE2AE0000000000000000000 00FF32140000000000001500D380384C111954151955800044610644655655055655600011000055 60040C455255648E21655055005640650650401040E44E4C655644E000000000000000000000FF82 5680000000000000A001801909801800001801800000601610600600000600600008000008E00000 0000006116406000000006006006006020006006006006006000000000000000000000FF66140000 0000000008A0819219238898818818AB80002164202162AE2A82AE2AE0002400442AE0026042AE2A E0060062AE2AE6060040140040022863062162AE286000000000000000000000FF9CC90000000000 00000011801880021811801801800000621000E00600000600600000000600600400400600601601 600600608600C1081040200160C6006006006000000000000000000000FF73E80000000000000400 4590D81180582583380180001360841260060000060060001482B60060000AC0060064C654600600 602E4C424424C0100240160AE00604E000000000000000000000FF367C0000000000000040018318 88003821805801800000609600610E800006006000000006006C8400408600600654E00600600600 421400409008412E02E096006000000000000000000000FFDF980000000000000310018058018201); SDR 8000 TDI (5955800044C5044AD556000484D56000001446296000056C0E557C06216800000107556556116000 556556556556556000000000000000000000FFCE9E00000000000000002888A8328CC8000A8CAA80 00222222232AAA00122A2AA00080128322250004A0022AA33200A00000022A2AA2122024C82A22A2 2C222A2AA000000000000000000000FFF33C00000000000040020022000004000000000000001000 480000010000080000000000080405002000808001500A0000800254000000000548000000000800 000000000000000000000000FFE84D0000000000000000008C882A88A8000800AA80003123923022 AA0003022AA00000001222A0005241022AA00A1420000002A02AA10A10200020220A2023222AE000 000000000000000000FF0F1500000000000000008102410182000000000000000080080000000000 0000000000042C000280490424000004010000000010000020148120010000100110000000000000 000000000000FFBB4080000000000000004C00000180000002C00000001200201300000000B00000 000001001000000001080005205400000000000003002002081400A0028000000000000000000000 000000FF1C9D0000000000000000210A980180190000100980000084000480060000000060280000 0600002008608600E20E00E0000000820960240001084842A450440C226000000000000000000000 FFB2480000000001000800018018D401184000502195404401000004060000A01064000000161140 00004256226086006040120006006096016240004004024104006000000000000000000000FF98BF 00000000000006000180188A1C783000180182202060061860060000B600600000000E4044000140 2E12604200E01000000600608C404000004004006004006000000000000000000000FF6687000000 0000000800218A9821809880041919848010E20640630610000618606800011409C2200040566060 1800600000000605E06450E030014004686004006000000000000000000000FF7EE5800000000100 0002010000018200080052218801020100030006000810006200000002A0600008C3070965220060 48140100106006200308486526044292446000000000000000000000FF4AB5820000000080400001 0140000000C000102180204080201402060004010068080500000261000941060060020860100000 242064060520A128710700508B006000000000000000000000FF3955820000000000000001008000 04004004100180010100000202060002110260000004424160801040820062000060080000500060 0600C008006096206003006000000000000000000000FFF54D800800000002002081800003820200); SDR 8000 TDI (01000080080080000000000000000000400400400000080000000500000100000000080000100080 1000000004000000000000000000000000FFC5C5000000000000A10A00800800C8088882008C8100 00200200008A20200200200280220200300000000200200200280200200200211200200000A00200 2002000000000000000000000000FF8FBE0040000000002002000000400040002000000000200010 81100400000000000020000400080000080000400080000002014000000000000000480000000000 0000000000000000000000FFD3D501000000000080880080081885AC449B8882800100300204A002 00206200216200200280200006011A0020020020028020A200308A0025D100A5C21C241A00000000 0000000000000000FFF741140104000441801809021001A01523033C8D8280016406007205005226 00E02440620402600202000600400604620680700600600E00704100C02600600600000000000000 0000000000FF170E0024000000010010014012001050111010000000700018424994004004104104 200004000040000510105800000000860845001000100828C4420000000000000000000000000000 0000FF4B91140302000020800810C40800800800A40C12810000220A202082002402082002402202 82200000080A00200200220202202200280A082000002802802002000000000000000000000000FF 50EB0000000000000000000002000801082020800400000000000208000000010000000000000022 020800800000840800000000000000000040020840800000000000000000000000000000FF8F2501 00000002000000000000401423760884100100288000001010C008200001A1000400000000000380 880000801800000000800000001400208040040400000000000000000000000000FFF9BB01000000 00000002000040880040000000000000150008100000000081000000000000240000008108000148 540000000100000000108540000000000088000000000000000000000000FF7F5D10000000000000 00000200000200000000000000000140008800000000000000000888010282240020000800010000 00022880000020000A000000000000000000000000000000000000FF60048100000000000000AA88 882288C8000AAEAA80002022022222AA00026B2AA000000322082002183A43AAA202002000000002 2AA2AA4620022AA2AA2AA223AA8000000000000000000000FFEA2080080000000020048440010000 00000032010000004004004805000805004000800840888000004C30805000401001000084004020 028000010010008800004000000000000000000000FF080B90000000000000055591594D91180015); SDR 8000 TDI (800084408614C48704600600782600620000000A03080608220611400408480610E02408680A0040 06006084000000000000000000000000FFC7F2000000002001851810840830059959994049800002 600E8042A600700600600610E05808200420000E0031060CC0060042060065860460408140160060 06000000000000000000000000FFE7EE000000002001801800800801802000400001800028C41240 404610208600600000E0000A000450101600200E00600400650600600D406B054240440040040000 80000000000000000000FF0E8B00000000000188180080080A08400801000382400C600600435600 A00780620000600090202422048E20A0062060062062060040060040001041040040000000000000 00000000000000FF60750000001000018C38208028A1A50840C61C01000083C4560470020C20260A 608010E0680802802202CEBAE06002441400430E0860440A60108146268069048000000000000000 00000000FF3A280000000000098038420346A0000800901D11800020688611600228392612E10803 6090A0828000000704600004604401601612608C1470A02240472060070000000000000000000000 00FFBDAE000000000001801A04828A0C4328088081038220D04086086812A42106006400006080A0 2000000006006002404A0E40408602682E00602802C086007004000000000000000000000000FFF2 64000000000001801804000011810922A0040188C0804C2E096AC200A0460A60800060200D22A000 011612608A00640600650642632E1172D0884026006016000000000000000000000000FF71BB0000 0030001184180080080190304112B81180000844D607654C01400E01603614600001404008006080 6000804044814006004104224100500004404104000000000000000000000000FF4AC10000002000 01801C00820820005001211A61800060404600600400400604604608E002006002000000A061628A E006006106004006804042A18004004000000000000000000000000000FF2B150000000000018018 04820C100000440000018840904104046D4C80804E10610010E04102E4C00008483240060C6A0700 6006426ACE50708810004400400C000000000000000000000000FFCB090000000000018018008008 21808080044001810000421410E00400000600600000600010600010008000401600E00600620600 4006054400202004004000000000000000000000000000FF42990000000000000000000000018000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF611E0000000000000000000000018002002002); SDR 8000 TDI (007018300C004608728E03C0882CE2A622C038080AB792E26E2E65F70AF20638628C0C762004E044 004006000000000000000000000000FF9A4000000180000180180080120000020013062595000504 403004930571462244400165565162C402080640641650680600600620000E201008006080800004 000000000000000000000000FFAB772000018000018438249812018022000221D984000082506202 1E00E0662040600248068040040381060060060060068060AE12E824006085006004004004000000 000000000000000000FF61CE008001800003801A00801040040002A01804804094EC060169025462 0E04E01014E52A116048481047026C565470A62CF4068044068040A000E000806006000000000000 000000000000FF1ABC04000180000180392180100588208882580080004060060A62060160862061 0020600044400402040630E00600601600614E45614C086400406004004006000000000000000000 000000FFECD100000180000180180000180000180180100080000060060060060060060060000060 02004000002006006006006006006006006004006000006006000004000000000000000000000000 FF5E8A000001800001801C01401801801C0180100080000068060060068060070068000040020048 05002007006006006006806806806804806001006004004004000000000000000000000000FF23D1 080049800403801800801A04005813C0180280A048622E20684A006A060060000068000840040204 0602684602640E20600E00400C415020406046106006000000000000000000000000FF87A4000001 800201C258C9831A29809B41825D08840105608704680684600E00680020E00040C80C800046B0E4 0620610690E806806824806B1415600400C006000000000000000000000000FF6488000020000001 801C01D81B81A03801821C018000080A029060260160070060060070000000001000060020061040 0400440600600400602400C006006004000000000000000000000000FF48C6000000000001E31899 86083800D943A1184B8000A3288280600612710600600630604008000C0402262A220606520C1842 0E006404046090A04006006106000100000000000000000000FF4C83100010000005803840009203 80155100590185200108522C701700E4160060060160014100040A000780A047C8488440C0060060 3420E211124024114004000000000000000000000000FF4828000000000401C21800000000441001 4059018000D022864AF00602700600602600620084000810880608229600400400508609602C3072 A044C02C004000000000000000000000000000FF2784000000000201801801801821801C01A00111); SDR 8000 TDI (0840AC00453612680E80E40004600650610020600630610610612604610600600641600043604600 6106000000000000000000000000FF3FAA000400800320D20C40808D40C00800F10D00800040A203 5430034121422028014032B302305110B10B0030234030135030034B34D30A315108331350341200 0000000000000000000000FFAB340200000004402002002983402022000422030000818D08000F14 088028420000A48810C00800200800800A00A00B80A80808A50800B5080883084088080000000000 0000000000000000FF51F6000001800408808828800000800AA80009100000002042002000102002 80000040208200200010221A00210A1820020420021021120020C040A00202A00200000000000000 0000000000FF34E40000000001041000000000019C415040002400002A00010080A0851201081000 00610C0840B849402018006040005802002000060040810018078C40408800000000000000000000 0000FF08350000000000000420806000218200060B00800001001290540040401150018488000060 048102000080000000000000000200000000000210000000100000000000000000000000000000FF 11DA0000018000018819429050018098001080498000D00820220008006806004000006606126040 00610640E00602602650E106480066080000244010000534000000000000000000000000FFD45704 0201800201C8BB50889200201A404A034B8000208541020D0700E026824008A0CA2E806800A04946 88E826D06D26CAEA0E886C46906A80826C84814804000000000000000000000000FF0F9D00000180 0011801802A018200D5913A15001800114600A41202B906A1608E1000020870CE0A808220E007216 04600E00604620500620800848E00E0C0154000000000000000000000000FF588A00000180000180 1800A018018018018010000000806002802006006006006800000006004000000006006006006006 007806006004006800006004004004000000000000000000000000FF13F605000180040580190000 1045940110000A0580C0BC081521498244600600480000601610E800422006506006806016C06006 20080E2048034060A0006006000000000000000000000000FF6F3C00000180000180180080100000 0608020C4A8000000204044407007006414020004316007288002806806007006007006006003006 006008026004004006000000000000000000000000FFAD8600000180040180180000180000000131 28018C0005004808184A03612602420003684650402000000E48622E4A62AE006006884004820201 806006006006000000000000000000000000FF8309400001800001821C0280180180001320483082); SDR 8000 TDI (16010810050010010092600010A00810010000011080000000000014000002000910211040000000 00000000000000000000000000FF07FA400400024400D00C00C40800C00C00C00C00904114310308 300300B00300B30000B4B21030130002230022820820020131420924020830C300A0025220020000 00000000000000000000FF793A0000000000238018098118A180B809001881040000601400644610 60040860100860060162000A000600E00602632620600642612E2464100040060160060000000000 00000000000000FF5D8A00000000020140134928820044924140520100009148A500480514C80500 41008000008908008008108008408008008008008008008008A090C800800CC00000000000000000 00000000FFD20500000000000080080480490080480C848800800000200200209200200200205000 200200220000010201201200200200200200200200200000200200200A0000000000000000000000 00FF09180000000004AA0AA50006002A0D04800900AA00013202482A82303102A82A9B002A82A822 00080002222B23C22AA2AA2AA2A82A82A82A80082202A82A8000000000000000000000000000FF82 6400080000000040040200200040004202210C00012810010080008008010000000002C804040000 00080A0280200230220000400290100200430100020400000000000000000000000000FF58120000 000000AA0AA00A0821320840800820AA00002204802A82A0220AA82A82082A82A83284000002202A 02002A82A82A82A82A82A82A80802282A82A84A0000000000000000000000000FFEE300000000003 541540D02402D41303085002000000010510540D484D0550550548D50800D10800000D40C0884893 0880880D50880820C50850900C50C90940000000000000000000000000FF07EF0008000000004000 20410400400034440400000001100900100100000100004100000100101100111100101100100100 1001001001001049101001001008000000000000000000000000FF408E0008000000AA0AA0001100 220840802B004000000C0A402202202202A8AA82002A80000000000002202002800000000102A805 0200080000000200200010000000000000000000000000FF6B53000000800400A00A90A4AA00A00C 00800A0080008320A280290A902802002000802D52C02A00002802822812A12B12B02802C0A84AC0 2A40A4280284280A000000000000000000000000FF705600000100000140124530129045443500B2 CB0000C0480C88C80480C0040040D08008008B08000009090908209408408488048C088083080889 08B0890CC0000000000000000000000000FFA3E00000018000038018810838018A394B82102D8000); SDR 8000 TDI (0801612000400201600004E40C21200000088F00742EC2730E45600402404640400010609412C04C 000000000000000000000000FFDE4500015400015595580195584411114410128180004564904170 0455455255600052650455601444054603621608643601655402E554206100556048480554000000 000000000000000000FF1AC30000AA0000AB8AB8218818238890A088B2A380002C62202472122AC2 AE2260004860A6103040A002064061060160068862AE0840960A425022E024204286000000000000 000000000000FF444E4000000000018018B380108802300882B04B8000086020026AAA0040060060 000070260020000880069061060361060A60064840040C4008006206006006000000000000000000 000000FFE46F0000AA0000AB8AB80D8811220CF088881201800021630430600C2AC2AA3060000060 060460201D00461D608618604622E2AE61660621600800640400C226000000000000000000000000 FFBB84200000000001801881831009821002801109800004600C14608400400200E0005268060068 0040842600E00E02E2AE0060060D61440B68210862C6000006000000000000000000000000FF07B3 00000000000180184580588180182103382380000960C200E42000600412600000E4AE5280000201 1644644640600610600200400E00420045200C2A4094000000000000000000000000FFE576000000 00000180180980383000380104988100000A60C20060400063440460081160040843403410071272 070070070A64020060360860000AA20800602C000000000000000000000000FF2F76000800000001 80180186182A1630A00090418E0002600062619464400810600000601006400000011600609E3FE0 1E206112006206066000402184014004408000000000000000000000FF630F000000000001803801 809085801148001003914021640804E20401401000E0000060002140000004062060862060062060 02006404006450000020080004010000000000000000000000FF5FB7000800000000004008010101 88001002014200A05081300102300402C01300000880102002004A02882000000000000002080000 08000400200048000000200000000000000000000000FFC9EF0000000440200C0000001003802008 0001010A2001001000004000800010010010620C0004080C00001000000202204080001401484481 081080044C4000000000000000000000000000FF1B3D00000000000280080880C8A0888000800009 80000A248200220009000200201800A00211A140001222942E828828829423A220A0421022501524 0211A052000000000000000000000000FF2085400C00000400440400420004500400400410000161); SDR 8000 TDI (0044C60040100060008071002262800022C602642E04E44E44E08600400400448408408432500400 0000000000000000000000FFE89E000000000001801801800010001810001C0180000060C6006006 00502600600600605088601000201649608640600610601600600200600800C25401600600000000 0000000000000000FF116C0000000000AB8AB8AB8AA0238AB8900AB8AB80002AE2062AE00E2AC286 2AE0072AE20004E0000020065061464861860062262AC2AC2AC0202245040462AC00000000000000 0000000000FFA7BB00080000000180180180180002102183112380000060860060160A6006006006 00604000E0000020062464A630648600600610400400C40028620602400000000000000000000000 0000FF05B40000000000AB8AB8AB8AB82B8AB0838AB0AB80002AE22E2AE2A62AE20E2AE0062AE2A8 1062880022CE04E40E12E42E2AE22E2AC2AC2AC4502A602E20C2AC000000000000000000000000FF 4EDF0000000001559559558418CC11591390381180005564565564C640E556556007556110546506 0025560160160560565564CE4540485040D0046156496526000000000000000000000000FF8F2580 0000000001801801801901801841801801800000608600600E00614600600600600040E000002006 006006006006006106004004004080016006106004000000000000000000000000FF2A1800000000 00AB8AB8AB91582388188388180180002AE2062AE2822062262AE0002AE406222060000006186006 08608600622E00470E04C20001E004004236000000000000000000000000FFE53B00000000000180 18018098000018018038018000006006006022056006006000006216002004000016416096406006 1060060140C6104010006256016006000000000000000000000000FFA49F00000000000180180194 589182B8290298AB80000060AE00601610608E0060000061461122800002A602642604E44E44E086 4A40064241202C6104324094000000000000000000000000FFFF8200000000000180182180190000 180B04982180000360160CE88E00600600600000E08E0028080212A6216A0E25642EA36006014006 0340B00060082A6004000000000000000000000000FF3E6800000000000180190580180182384180 5B11800008600600620200600200600010600600200000800E086086886086006004484006284000 0062C4004006000000000000000000000000FF60BC0002AA0000AB8AB8098AB02A08988188180380 002062A63060222AE2AA2AE0002362362AF000A80017C260664068064862AC0262AE0170412AE106 0582AE000000000000000000000000FFEC12000A0000000180189185501180101204100980000060); SDR 8000 TDI (00000000800000800010000400800800002404A03004800000000002800000100040000004000000 00000000000000000000FF825600000000008E0AA8AA8A88328A08800C088880002AA5622C020422 02122AA2422AA00040218222C0024821424821820022AA0020020022083122422020020000000000 00000000000000FF20E500000000002000000000010980002A040044000000010804002801000000 00480060003140001000104100904000001000001000100800000480000400540000000000000000 00000000FF032C80000000000000000000400180C00000A000000000040000810008012800008180 00000202400002C00204200482484280004484A02280401000C80904800000000000000000000000 00FFA329000008000001001801821801890100020003904044E00651440A0060000060210062C02B 641000400E02610610620E00600E00600200608008022C2040C8080080000000000000000000FFDD AF000000000001081801905890002050102009820008648E0041021560C040E40000E00000612021 424610603602600600620610600608E000400104104004000000000000000000000000FFAAEC0000 000000010018018018040630A980114183000860C604624000602600E00680600000202820800E40 602600600600600600601248E618052086004000000000000000000000000000FF9F910000001400 0100190580384388100180102188200261260160401060063160060062600F820000002608600602 621E1067060C4004404000602016084004000000000000000000000000FFA7C38000080000019018 0194011181080014288D008021640E2AC1560AE10000624000E10040210100220624611610600600 700E00600A20608012C44C406136100100000000000000000000FF900C8004000002218038018100 0408880C000801008053600648408E0471200062802268015020000020060462060C602600E04E31 60560960A8025005006004000000000000000000000000FFEEE0800000040041E058018000420008 13800801000001608610448F8270C000610188652020800002200E00600630E00E08E00600C00000 C128326406006006000000000000000000000000FF4D6A800800100581C01901880001962801800C 010100046206404206006801006008886A8090000002200E64700624E2060074065047D442400008 E206007004000000000000000000000000FFBF28000400000601A0180591000000A0000000018000 28640401404610400088E208447001026005002006006C060064460078B60260020C600001500D00 4000000000000000000000000000FF4C050008000000018018018001018000240000018000006016); SDR 8000 TDI (04000210001000020000808000800000000000000800000000008000000400800000000800000000 000000000000000000FF6B8C010000002000800800980812A2084AB42840822041266266AA226020 6200118201000280200000001000200380200200200200200280306000305B01A01A000000000000 000000000000FFC4070001100500018018B18218018098030350090B0149700E2268042AE1063000 040200064A6000000010A47486416006006046006226227001006006006006000000000000000000 000000FF060B0000000000AA0010000010282001113810650080244D04014D0400420C0004040000 00800400000000080800801000001100000010000200400205004000000000000000000000000000 FF94D40000080280008008108008008008008408408080A022020022830821030800020000024020 0000000802220240A802002082802802802000802002802002000000000000000000000000FF3EA2 00008000000000000002000000868208A6121400020088440000C50000C002000200000802000000 00C00100000000000040800800000000400000000000000000000000000000000000FF47D5010000 0000000000A000000000414804050400000D91000080000000000004000500000310000000108000 00000000000800010228220800000040000000000000000000000000000000FFCCAD108000000000 40020000200004401202C00000010000000000000001208001200000000002100002A00204200484 48428000000210000030100000000480000000000000000000000000FF82A8000000000000000000 00010001000000000000000000000001100000100000000000009300000300104100904000001000 000000A0000000000000000850000000000000000000000000FF6C599000000000AA8AACAA8A883A 8808A08C08AA80002AA2AA2AA2222AA2022AA24BAAA000212080282002182002082082003AAA2AA0 022AA20022A2AA2AA002000000000000000000000000FF4B2280080000040140140140010002304D 00140000010040110841040040048040948010000484400140000800000000000000040000401202 08005011010000000000000000000000000000FF252F800000000355F5595591194590511390D155 8001D56556D5654E55643555640C5560015062104565560160160560565565565560565562204CC5 56D57156000000000000000000000000FF61960000000000C88AA8AA8CA82288888088ACAA80002A A00220A22A2AA2A2AAA202AAA0000820002A22CA04A40A12A22A2AA2AA2AA28A20A0202232823224 AA000000000000000000000000FFBB36008000000000000200444000028020000000000000000000); SDR 8000 TDI (20400608000000000600600008100004500E01620600614D00913100141201680780600400000000 0000000000000000FF61700200000000218018018210501000000021300000046806404100014006 01010000842608600000001004600604608600600440000000188800000600608400000000000000 0000000000FFDA8C00000000000080786380180384612090AA0181214A70421C224400E246800802 18000604600280000802414002008051000601684600640001600610608618000000000000000000 0000FFB757000000000000881803009E02210030848803822108E28A012404086207021202020106 20600120024000400020023000000600708630E02240408E006406000000000000000000000000FF A19C020000000040901801021048510080C00C258280406212012084804006008200030206146000 0002000060C020000209280620E006286532217007006004000000000000000000000000FFB40A02 0000000100801805401081802000C029118001296022A3680410C126220080020106016200000020 0860AA2022C20C200610600609635030C026086004000000000000000000000000FF650A00000000 00008018818118018618191615118001036B424462461060460C010600014EEA6000409040224002 8A2450E0020A0063EE216000002116106406000000000000000000000000FF2DDA00000020000180 1801A03800001803389011800004648284619E006006000004000006006400000040006802042402 00240203E006806800004006906006000000000000000000000000FFD025000000000000801B0580 520002181200008000000070C220400688C10614008002009714E0000000000C604F306127147012 88680608E2A8012026006004000000000000000000000000FF0DF402000000008180180100110180 580004A000000050E00200C406004046400000000006406000010000206106006006406002026556 406000480006006004000000000000000000000000FF7D6E00000000000000000000000180000000 00000000000000000000000000000000000000000000000000000000000000000000000000000002 000000000000000000000000000000000000FF874100000000000100000100000180000000040000 00001000000000000000000000000004805000800000800004005004004000000000000800800801 000800000000000000000000000000FFDEB4000000000000800800800220804A82C0088204400221 0100C040000002000202000002002000000000102002802002002002002002002000002402002002 000000000000000000000000FF73AC0000000040B400000000020404021020400101000000048014); SDR 8000 TDI (202608618E0408060024000000008064064068069866A496C0040040000060040068000000000000 00000000000000FF9622080000100081801004A01A00300500412801800004900B00F48220604610 E85648831755201400010014F03614E42E00E02C00400E08EA050040060060000000000000000000 00000000FFA5C000000000201180100080180180204208084380005000820860020CE40620620600 00060020001000084061060061064061040140240040001060060060000000000000000000000000 00FF50A7000000000001800001001000001801801801800000600400600000600600600600000600 0004000000006006006006006006006004004000006004006000000000000000000000000000FFEE D1000000000001800001001001801801801801800000680480700000600600680600000680000000 0000807006006006806006006004805000806804006000000000000000000000000000FF2C690000 00100001800001801800025801A51821000010608400648124680600600601000600000400000008 6406006886006806886004404104086506086080040000000000000000000000FFCE680000000044 258404498CD829891C11A03C91004002E034446050116806086034040106A20000310088A0604610 6006106006056284024000044827006000000000000000000000000000FF20A60000002000028118 01A01809801801981807800040E40220300200600600118E00000620200000088026402608748600 710602E006006010806006006006000000000000000000000000FFF57C0000000802408098018DB8 040C18058038A0002122754200010B96600600100600000744200410004108480640600640601680 60469461080042C7806086000000000000000000000000FF4DCC000000204440841831821841C53C 1143101180000864D204252231600608004505008604200131080880440600620608608608628624 6080926026107806040000000000000000000000FFCA7F000000000200801841803A08201A012110 3002000B681220400300700720000400000680630020008013412E0962460061060AE40E00620A00 4096006006000000000000000000000000FFE6EA000000000000E01821825201800005801E018000 1560058020000A4806A0000700000642600021008000C4060C682600600400020002084000608E10 6004000000000000000000000000FF51D8000000000000801C01211004006401811C518000807015 00230020400608080600000600650480804010634642681F40602474008070192100E64688600400 0000000000000000000000FFB821000000400021801C0100140982000020040002000064C7C00C00); SDR 8000 TDI (100210402008409C4848030200800808980800808800BC0A00800800800880800800000000000000 000000000000FF9AED0000000000008E6888C3C802840840810902800000802608A426B0A0020024 0200000280A180000080002002002002002002402022022000302042002000000000000000000000 000000FFE65900000000010000100040008180048A42002000014A14414000114602000000204002 060000202400001001000081603241400204C0180460400300200028000000000000000000000000 FFA6F300000000040000005010200188002000205000013502080002800800800001800000902300 004004400E02806402180102A00000004400980E0000120000000000000000000000000000FF86BA 02000008024180110220000D801911808881800000000004680400052E406206008006C064000000 0000E02600600604600200200620620000401400E200000000000000000000000000FF4A9E020000 100021A8D28002424A351A01AAAAA38000801000884040AC1157046B26408B064268000402808468 A6906836806AA2C82886A86B00A06904A26028000000000000000000000000FF8535000000000081 A21013091100401955A00C01800034EC4A84ED0000C2060060020010061160C840000108E20E20F2 0644A0020222260260480A6C0400E400000000000000000000000000FFE600000000000601801001 201001801801A00E0180000060028060000058060060060000060060000000000060060060060000 02002004804000006004006000000000000000000000000000FFAD4E100000104111805800C40811 8000001118518000D0014200E200002406006C46440006C56000800830546546C060460120068060 06806400186006006000000800000000000000000000FFBE07000000000001801800800A00000000 080885800000808242615048230E0272268000270060810810000060074060064038070060060064 00004206006000001000000000000000000000FF2847000000000041C00801A00800002040003801 824108685208600000202610E08612820613424001000008E0060960268400060260042A48280070 06006000000000000000000000000000FF7B6F000000000041880809800E01880000103801800002 690A09EAA022A54624E44689828E0847080800C000E00E0AE28E24000F0C602C5CC4501064060060 00000000000000000000000000FF82810000000002018000000000000042402041058440110050D2 6B5248200E11690614044695204411000010E8065160464060040040060060008060040068000000 00000000000000000000FF0EAC0000000002019040120400118020A2060213800000864066604208); SDR 8000 TDI (28600608600600E0400062860060060061060060A640602E00E54000600600600000000000000000 0000000000FF977200000000140500020120020024424302A2850000804804840810804804004115 0008008008008000048008288208B08B090890090090080882880080080000000000000000000000 0000FF7191000000000920800800800908800810A008108000002112402002002002002002002002 13201000200200200211200200200201201200A000102002002000000000000000000000000000FF 765700000000001C6AA0AA0AA03248848008002000012A82200882A12A92A80002200002A8200000 0000002AA3822023422002202203202200202402A82A82A8000000000000000000000000FF853200 08000000000000A00000800040040200000000800000000000120000000080000000000000000000 2281400004A00000080000800000000C8000000088000000000000000000000000FFBFE100000000 00C00AA0AA0AA0A20AA0B20A008A00002A82A80202A82A82A80002000002A80200100000002A8200 2482002C02282282282300404802A82A82A8000000000000000000000000FF14E400000040055435 421234825435051030C30C0000550D50D08D50C00D50800C50800D50D50810800800880A00890800 D28CC0CD0C50CD0850C00D50D50420000000000000000000000000FFA9C800080020040000040040 040000000041442000008010014910000000000000D1001001509001000001001049101009011101 101001101011011001001000000000000000000000000000FFBEFE0008000000AA0AA08008402208 A2E00A806000002A82000402202102A80008000002A82A8000000000000210440210000220220220 2200000002A82A8280000000000000000000000000FF45FE000000000200A00A00A10A10A00800A0 0B00800000285280290282B003002452800802802810800800B2A9428D2822C4280A802802802840 8D2802802040000000000000000000000000FF137F00000000020120022C02530024021420440C00 00804084AC8014885004004900000800804800000000800808A00890890900910910908808C00800 804808000000000000000000000000FF8F4700000000400182584183100194380980982D800050E0 C430600402440E4060862000160D4140000040106006506036126086546206086010046016006000 000000000000000000000000FF41C0000000000140C80D08A84C44C10D42D40C808000023C0302BC 0A303103003242001042203200450201023083023103013043003023243241503143102000000000 000000000000000000FFE0DB0000000042A05082000C026033C0041C020400000001001310000008); SDR 8000 TDI (E0860022AE32E28000000321608610645612C2362261040845000263042AE0000000000000000000 00000000FF53BD40000000180180280500100000000101380180000020050060460540060060C680 20060061000010020B62860362861460060060040042800060060060000000000000000000000000 00FF9DE90000000018AB8898A008102208E088090AC78000212A04804A362242AE2AE0260022AEA0 60000000061C601649600660422E22621601600871428C2AC000000000000000000000000000FF12 5520000000180180480200100980000402080180000CA0840AC08E10400600600600200611680000 080600620602E086106006006006106800006006004000000000000000000000000000FF78D70000 00001001821809033901841821813831800000404E40200600800600630E00400604450000000222 E0CE40645602C10210A0CC24C48014E044006000000000000000000000000000FF1DE70000000010 81801801001800003881801803800000C10653204602800608600604C08E02400000004708700709 700620E0022820CE006100006200046028000000400000000000000000FF42840008040010019C19 2701184406B8C0007041844000808600201462040600600600400600401000002641645E60600610 604200240600602016605C004000010000000000000000000000FF0AB60000000010018030410C10 098918020A908800800A000E00208400612640E00E00400600408020000600600600602600600200 200600644000C080504000000000000000000000000000FF80FB0008040000800220800480359000 4202005005200400002D015000034021000804008000010800000020804000802040804000042000 0100108120120020010000200000000000000000FF14520000000000240020000010018280C00081 00108000008040000050400010000010804601002000428040010004000020004020042850800000 0004000000000000000000000000000000FF7C7A0A00000020008208201088028808021309070020 1220300020020122021020020120122420004020009A2C02B02AAA18208A5021120026800AA40240 2010000000000000000000000000FF624F44080040040440040240000C40044C400424000120960D 0A102140140120120100000100100000100404000040005000001000008000102015100100000000 0000000000000000000000FF5BEE400000404C20C04C00C00808C30C10C00C40900140B103083003 10300300320301202340300000300248210204220250200200248250300000300300200000000000 0000000000000000FFE7D51000000018018218258098018819018319018140044056246026004006); SDR 8000 TDI (A8324AAC2461002A84001064060865862AC2242242AC2AC0082AE6042AC004000000000000000000 000000FFB7E70008000000018A98C00101000018030498A380000860840A600620600600000000E0 0600608400200010630600608644400600610400C00808E206120006000000000000000000000000 FF0E730000000AA0AB8018950AB0AB0A98AB083891800028622E3062AE08E2AE2A82A82262AE48E4 002A809020E10E22602E2AC22E22E2AC2AC3002AE0AC2AC004000000000000000000000000FFA79D 00000011415580580C92284C15592990580900004564524064A61165565505504C6D2E4564065525 504360364CE45600C4D64D6434524502246156406006000000000000000000000000FFC88C800000 00000188180180180100580182982580000560020560040260060000000160060060000000400460 46116006004106106004004008006004004004000000000000000000000000FF98F30000000E98AB 88180180182388988188180B80002062262942960442AE2AE2AE22E20E3260002002220060060860 8630C22622600400400008C20421E000000000000000000000000000FF25C100000000180180D102 121800041801823820800000608E0240061240060060061060460060840401020960960160060040 06016004504404246016146000000000000000000000000000FFCF7A00000000380184082980B889 80384B811901800013400601205640C00600600600608611620211000A4264464462561241161065 4C054088006124006000000000000000000000000000FF40EC000000001801808008011810045825 825800800001400600200610400600608E006006016804000002C1721723720E02C11610E0040040 00006000006000000000000000000000000000FF3914000000001801821803845901A00000891A01 800010690E806C4E04E0060064460060040064800000000860860860861040040040040042100060 04004000000000000000000000000000FFF7890000000018AB8830B109102208C08C8018AA800026 62262AE1862062AE2AE0060062AD2A30040000040260261060262042242242AE2AF0842AC2AE2AC0 00000000000000000000000000FF0775000800001801801821021011C00000001C0980000810820C 2006104006006436006006006800002000006A2682688600610410C2444440100060540040000000 00000000000000000000FF2EFD00000000195593112114594C150150121D54800048954A552A0E50 45565564170065565564040020044060362060364164D44D45565560105565505540000000000000 00000000000000FF25C10000000018AB8AB89508B8A38A80AB0C5881800022222D20EAA622C2AE2A); SDR 8000 TDI (0000060084000460000100900100001000100000004002A000801451400400000000000000000000 0000FF94DF80000000000000000208A0018220040440080000000230000000000088000000109908 1201003100004A04404402500281001085500D0000340140020530000000000000000000000000FF 5E05000000000041803900810843001800004081820010600600E0A602E4800B00A0027106014020 80600004622610600E00600222A01600615000C400140120000100080000000000000000FF2FB800 010000000180180494481108D80800802D814000E006142406086020000000016006044400104008 00610E046486256002002006106000046114004004100000000000000000000000FF7CFC00008000 00018038008009010699E504182190A004E44600400600601400000000680600610000600000600E 006006206002002006006000104086000006080000000000000000000000FF7C8200000000000181 180080282B00180700380582000A622642C2260260A4000000506006026040004040026146486006 00C01200200C084538404004024004000000000000000000000000FF1414800000000441A0190415 0081085810848093880000600608608211641214814004E08600E2C210601000632602628E046006 44E0060061020CE211086140000100100000000000000000FF6EDD80000000000180380280C80109 18008000019100016516056002106822CA020002700610600000408800600600E22E8A4546406056 006020086044504004000000000000000000000000FF4C6E80000000010180180001400100994094 3009808000E08622600210604300000040700600600000614008600601608E02600604E02C104080 006006106006000000000000000000000000FFEB2D800800180481C11C048008010218A48A300990 00A26036006002006802500400046806B0E0000040102A70469868C700400602E0040E4040106845 404004000000000000000000000000FFFE73000000000401E0580080080112000000000380004464 2600E0060070020400000840064120240020004468862062078862AC404006006208204001800000 000000000000000000000000FF313800080000000191390280088900404A00214180008060D60B60 0640E8020000000850068CE0800021104A6446C4645600610C114004004200007124004004000000 000000000000000000FF4426000000000201821C2080080104000182880B80001160060060061260 06000000014004006204002420016096017006004004004006006080006010006000000000000000 000000000000FFE81E0000000AA0AB8558498AB82308808188080180002263062062AE4062AE2A82); SDR 8000 TDI (0146106002046056006146146006006086006C0620608208680600F2240000000000000000000000 00FFDF5D0800800AB00100C54000102008152C645119000071403000800400410400842523000100 0400115808111800801000800000000190110010000150000114000000000000000000000000FF0E 2C000008084802800800A00800804C00840C00800000200200300202200200000200002290200000 A04A08A122122002002002002402402800082012003003000000000000000000000000FFA6B00400 0000000800000020000200002000022804000A80000000000000000002801001000004000C000000 0000000000000000000010000900000140800400800000000000000000000000FFE3900100000000 801022A00000000044820C2080000020001800000000098000000182800000000200000000000010 180000008000008008800A0000008090A8000000000000000000000000FF2B660900000004004000 4C04C08004202004200000008001504000080000D00000000008004485010080004A044044045000 0110100000000130001140021530000000000000000000000000FF0D420000000000000001001000 00000010010000000000000008810000000000000000000000000000000001009001000000000000 0000000200000011510000000000000000000000000000FF26608000000000AA8AA84085082A8888 82880EAA80002AA202032233AAA2020000002AA2AA0820002A20000020020820822AA22222A2AA2A A0002AA303002002000000000000000000000000FF26BB8008000004010010012010000010110510 8300000040140040010048050008000050000000010000000400401100000001001000C004011001 1080000100000000000000000000000000FF565E800000000555D5580D0050559511291519550001 5565344A44465564448000005575560165015460004360364CE0165564CE4C655655621055705605 70D6000000000000000000000000FFF0C90000000000AA8AA88C8D08AA8A88C488280080002AA502 2AA02A2AA2AA00000032A30A2823002AA00020A10A22220A54A22A22A20A30A4400A302A42A02A00 0000000000000000000000FFA9AE0900000004000001002800800020020020010000000004004080 8011080010000048002A00010080000803000002A00000000080000000A000020048020000000000 0000000000000000FFD8780000000000AA8AA8408248AA88D08088807080002AA0422007022AA222 0000002202622520008020001024020821C220222222200200200840260210240200000000000000 0000000000FF1ED300000000000000013000000100002800008300000000801280C8000000000000); SDR 8000 TDI (0A0068008564040002009840A4060026086004084000016006807104000000000000000000000000 FFCEA2000000001021200893801803652010803809880140848600400640710E10010E2200820070 81006006108101004046000206104086126000204017006404000000000000000000000000FF0911 000000005001400A20200B45220932C018220000002306A0D09630640800048E5201020061080164 0401280200681400020600210400484040E004A55A04000A00000000000000000000FF4F48000000 105005000950200A1104010091390400010820060A60862060100400064000420C60200060060820 0A29600600200600000648624010C006004204000000000000000000000000FF0B61000000001A59 82C90580B0B1998820301811940011420620604A0C61001100860000022060800660243003000240 24822006AA6084044080042016006100000000000000000000000000FFE7C6000000001A11801A01 881001B10A00001801000080400700621200600000000699800200600000E00600208200620621A2 0600400602E04820408601E400000000000000000000000000FF709C000000001805828910414551 8409002141040000080206106106006004000106400806B260A004E00648710E486C074468070061 06257310302107004800001000000000000000000000FF7F96000000083801801840080001000840 100000000000000624620630600C0200060000220060000060260062060360460062065400061060 00010004004000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF917B000000000000001400000001000000200000000000 00048000000000000000000008050048010000008050040000000040000010008010000008008000 00800000000000000000000000FF1CB3000080000080000800800000A00A00821000000000000200 28020010060000068080020020020000020020020028020020020020020020020020020028020000 00000000000000000000FF6A761000000CD00901028A000440302000000001000021402000080400 00018100000A08008008008040080008000800000000000001000000000000008000040000000000 00000000000000FF180601000000088890088A800C00800850D9E810000000801301280200210200 00424880020020000020030020028020028020020020030030000020020621830000000000000000 00000000FFE9FB040010105915801801801805805041881021820002600600600404780400008612); SDR 8000 TDI (000406000006004006406006086114106016014002006006006004006006000000000000000000FF D1710000000000018000018018000018018018010000000006002006006000006006000000000004 000006004006006006006006006006004000006006006006006004000000000000000000FF904700 0000000001800401801801801801801C010001000006001006006800006806800000800005001006 004006006006006006006006004000006006006004007006000000000000000000FFB73E00000814 A201810011B01900003A018018900000040006024406506000006006100040300804000006004906 80604600600600600680400A284806006006006004000000000000000000FF8D8400002000020380 0223A038518498C5811844022030009600408405612800E806840290800A0400800E1040062C6106 08E2B60060868058A6006006007005006806000000000000000000FF1DBB000020001A03848801AC 18018098BB9C18030200A840C653700480600E00050601800201E8000040040070070A4014006026 00600400408C00600417F146540000000000000000000000FFC155000008085801900805941829C0 0C05C00081000000404629E2060068860002060200220D601600480400608600402410610E004404 0040101C4006417027800000000000000000000000FFC569000000455801820C5582388182320085 1851004004402E0061064D7024010106101C93A0620400C00C10600620410C096306006104004022 2070060861062A0000000000000000000000FF002C000000001801828801C01801820000B0000900 0100408682701620600400008600008A2072840040044CE016C5408401600608E11404520001600E 006007000000000000000000000000FFA815000000401801800C0200081184180080180000000140 0680680E40500200008680000200420800400422610EA0C004086080006004004A4812600600C006 000000000000000000000000FFE90A000000001BE1950860140809208C04803C70000100C1060061 8682400200000680011209610500460C106086046124006018004514004020205804004806000000 000000000000000000FFD435000000003801801800200801008C00B0400000000000260560060440 0200000700100332600400400E01600600404600F00008E00604600440E00E204004000000000000 000000000000FFD36F0000001018118218000508018009009001020001000006C060060052020080 0610021200601400400600620600608E00602000000600784002000642C005800400000000000000 000000FF73F5000000085007024849829B519028448638C185803020070749561460060004060002); SDR 8000 TDI (C08100000040020040004002018010002000002003800020042460009E000000000000000000FF3A 3F020000180040004002058000000410044000000000001149820150028000100022000000000040 00000A0000200200000000228040058050280290080101000006000000000000000000FF7F9E0000 000000119010011010109071411221200000018406022026A2E00002680601008010600000012620 602606610E506002084114086000040406006290010006000000000000000000FFAF890400000044 01B092B1A81290AA3A9120833200008D0826D42C06056200856026AC0080846800200806A06806CA 6956806CA2C968A6A96920A12956D46A24A00806000000000000000000FF5DED0000004800038430 05849840A1184192220000000000060120B3506108404086008211416102000AC68AE22E00620624 E8020244060060020C4A06806116110116000000000000000000FFA149000000000001A010018018 00801801800000000000000600200200600000400600000080400200000600400600600600600200 4006004002002806807804000006000000000000000000FFBB4D0500001140018018011010000010 05001800000040015610600E00610004600600000000200000000644640600600640604618682400 6A4038400600600122C006000000000000000000FF2F65000000000001A01801001200401011000D 010041881AC600442608F85000E09620210090202020104740400E00600600700600700420502080 6006006004004006000000000000000000FF1E8A000000000001800801001A00805001A3180A0500 000016004086006100526246010050000D08110006006446C06B2E50600600620600E91000400600 6007804006000000000000000000FF2DEC000000000001800801C01A00821C018838120820000246 00420602600808E4A60200200003202000C60040862066CE08600E12648E01C11090700600600401 4006000000000000000000FFE43D0000000000010000018014008058110509040540080516802D4F 10E9505560D6410150102434D10006406456406116506004004024406220A0000600600122400600 0000000000000000FF620B00000002000102200710102080909920080000000BC01602882E006920 2060063880188810048002064C64260060064066C405E20600680400680600600400400600000000 0000000000FF5D920280004CA001045001201040851205002802100002402708C40602603054E0A6 0300401020444003060840A700749600600400630600402110400600600000600600000000000000 0000FFFCAB0000000000010010018010018019011008000040484506044056006000006006400000); SDR 8000 TDI (0000200201200200200211200A10A002002000042002002092002002000000000000000000FFD661 0000004AA0AA0102A20EE0AA01048002008000002002A92A8200AA92400002A80000002A80002A82 AA2002022AA2AA2022300202A82A81200002AA2ABB21000000000000000000000000FFE8BC000800 00002000000400002000800400000200001280010480510000080000000000000200000080480002 40030400000000200300100020028290001021000000000000000000000000FF4B390000000AA0AA 0A02C40800AA0A20D20880D000002C02A82A82C8AA82800002A80000A02A80002A82A82082802A82 A82082202802A82A80100A02A82A8220000000000000000000000000FFA710000000154314354530 31028C2443502A22400000C00D50100A00540540000550800D50910A00D40D00850900C808B0A90C 48910808C00C08900840CD0490000800000000000000000000FF994D000800000000404010410400 40000044440200010090000010000000110000010014090014010010010C10490010011410810510 01001041409001000810001000000000000000000000FF58AC0008000880880AA0820CE08010008A 03011000000002A84001082302000002A80002A84200002A00005000100000000C03282402480500 20400000200200000000000000000000000000FF5476000000004400A00A20A00A08A48A40B00A08 00008A0802A32A42802108002002802800A02C00800802852842912B028528028D280280AC008D2A 428C2022802802000000000000000000FFD2C80000002204432002080412253042010143250000C1 480090490508C840004004000800908802808B48D00D08C40848C009008008C0AC080AC008888101 10004000000000000000000000FFB6610000000200119018498058C1083881901801000001405604 40A400602000680602640012E0000001162061062060264060062960560161400460564464060040 06000000000000000000FF4F29000000100520C0CC00B28C10C5082CE2AD40800130320231340A4A 210100200340A02100300828120308B0030230830C348300350302301108B4030038925130120000 00000000000000FFCA6B0000004003022902084842082C02000002410000C04800844D808C004020 40A4000800800810300C00800808880800A48E20800880A00980800800C0100800C0000000000000 00000000FF60F40000000000010008C0C00180800804080802800000202200200600210800800200 200802200000029211A1020020A200200241260200200010206A0620021820020000000000000000 00FFE80900000004200002B0310200600390A821808900001A40463000580010000010004CC64025); SDR 8000 TDI (0066A648241618606641622648402410602804418631E0042042AA000000000000000000FFC1C620 00000000010409018080480010008058000000002006C02226004000040000444006106800806016 01208641640E086016226006106C000A6006006CC4844002000000000000000000FF389100000000 002180383384500489384B841000000000400608E10C00600011000000600624E00000600642024E 04610645610601450C254000416236126008090006000000000000000000FFD94700000000004182 18018811008098018410C4000020400642620400642840000022610400621040F00600312700F007 00600E00E00600650008720700608002000E200000000000000000FF3CF30009000000219818018C 70E290D9818010A00B6024010622204602C22825000000603E0160002A6016006096106416406186 18602E04609040200618E000010002000000000000000000FFDECC00000000000180102180100C84 10458010000C000800361020961541000800000060260C61001461062A6006006026006006006056 086000000006416000000402000000000000000000FF12F60009000000000200000400100A200002 000001001200C808052008008015000004008012008000000824004000802000000800000002000A 080000000000010016000000000000000000FF43FE00004000A01002008401203203102001400500 801000260400000080000900400400840000004040A00044202802800000804D0040008050000040 020000010006000000000000000000FFCAEA080000020023000868800080800846820885800000C2 0A28201400000000000060200201A410012902302812902C1AC8A202012002102400403403402186 042402400000000000000000FFB2EC40080040040040A40058040048240048050000212000010050 01001001101001198028081001000208000000060030100020000280221200000000001101094000 000000000000000000FF02F340004044A440C12C02C0CC08C40C00C10C0280410000430030030030 01001001002142083001402202402402202542002102142082023000002002003003002002000000 000000000000FF16D81000000000138219498019250958458A5801010030E20E4A40060160000080 2042600E0160000060AE00604608600601642641624620E230006026046004104006000000000000 000000FF599C0000002000014CC0092012012C820020C2050000884800804804004848800000800A 48800800800800940928800800820900A00800800910D10800800004804800000000000000000000 FF58B400000000000080080080080080482C900850000004A0020021520020800000000021020024); SDR 8000 TDI (E00E20400E20E40E32E22E2AE2AE2AC0082062C62C62AE22E2AE000000000000000000FF2E910000 0000191414B95584580380C1318859550000044D565205464960020040004C605624444455603602 C216436416456446416514404040006506506436496556000000000000000000FF4C248000000018 00141801801805801803801885000000400600400600600200600000600600401000604605442604 6026006086006006004100056006006006106006000000000000000000FFCF9E0000000000A98098 AB8099219098A90098AA00002842AE0242162060000000002360060840002AE00648604602606608 63200440440C45000040060062262862AE000000000000000000FF21F50000000000059050019420 00045800081800000004C00600002604600000000001634620448400608605629608600600600000 451400400000E01600E10E04E006000000000000000000FFB3CB00000000000184080180188D9018 03043801000000400628C09610E00000000010600E02E02000644E40604640E28E4561082D404445 42B0326546546006006006000000000000000000FF40E30000000000018200018000400018000499 5100000540068020D600600000000080600610E000006A56006A1625624F22611000400400414055 654654680E886006000000000000000000FF1F17000000200201811801801905801801A812000000 C0400612C80600600000080000600600680000608600610688688600600600400400400800681681 64C6016006000000000000000000FF62240000004004ABCC30AB8AB0088AB0AB80310200000842AE 2042162AE8002A82A82AE0063270000060162AE02600600608E3262AC2AC2AF00000400600600622 62AE000000000000000000FF3E9A000800200201801801801114949011A0100100000000064A0046 0050000080010C600641600000604611704600700E90608608602602400821700744601410400600 0000000000000000FFB26A0000000001559111559550C495595581300200004085565024C6555001 550D5055600644E0048062C65565260A604E40645655655655600035651651684CC5455600000000 0000000000FF3FDA0000000000A90A98C98A30208018A58ABCAA00012AA2AF00108E2AC0002A0AA8 2040060A500000710E02010724E28604622E04C48C20C24008222E006D24A4C2AE00000000000000 0000FFC0254000000000010028018010108010018A1C4800018A0007029006004800800000004006 00600000600600000E40E2860AE0060060060040C8002046046504104006000000000000000000FF 97A700000020028F28D8058900800250808892AA00002AA2AE030C062AC000200AA809C006006002); SDR 8000 TDI (2620620602E0060064062060001060C0084006416100020100080000000000000000FF65FB000000 0018000059440418919109410A2031910014808C1025360165160460404800260060004100060260 060860961460260161060160000064C6086000000000000000000000000000FF050B000000001800 0038A10010C9848809892101888000E00E08E0AE00E00E4260300260260060001081061260060060 0600600600E080406490414086086060020006010000000000000000FFAB8A000000001800081803 00300182288180800302202072260160062860A600620808611E00408000000608400610E0860A62 26116112094210004226206000000006000000000000000000FF3968800000001000001C00921823 48002104194980000A0086002206006204206100406006A060082860C64062061260160060064060 0420E05030E00600E084004100108000000000000000FF056C880000001000021800821813120103 002204028081080648000688600402728080600600E0100060860042362062D62B64162064061260 00006006506804014000000000000000000000FFF01D880000001000605801841009040805803900 804114010609004610600400710004600701400804650640604630608E0260060062140840081064 06006004014006000000000000000000FFFE2D800800003188483883801C2590A80182188005200B 308E4000260060040474180269648040000262072048160064468164064760066140000862061062 2C004006000000000000000000FFF9A3000000003810141482801821C0A881020405800000180E00 200700600000600100600E0060040060060062060060062860100800800260000040062074540040 06000000000000000000FFAC0F000800001800503000911011000903000111800008000650000200 600000600000680680400A00654E04704652E48F45611000000600425608654654600410C0260000 00000000000000FFB256000000001800009000801D45000809000021000005400604C00200600000 680000600600648000600681429600600600600000000400608001601600E1160060060000000000 00000000FF246F0000000018AA0350AA8239018AB8710AA0030000244AAE4042AA2AE0000060002A E2AE2AC0002AE5063841061061260862202A82AE2AC44032601601622622628E0000000000000000 00FF9290000800001820001801889029820003831801000049400601200602600200400000628609 410000628608408608608610600E08600608C0084AE04E04E106026006000000000000000000FF92 F50000000018AA0018AB8CD8498AB8818AB851000028C2AE0B42AE2AE0020060002AE2AE2AC3002A); SDR 8000 TDI (00200201230A00200A00280200200000302A002002002002000000000000000000FF4DDB00004000 00220000040800200002020080020041020088048020040000000000020000000082000020000000 000000000000000010000880000880000000000000000000000000000000FF512600000800010400 020034000010A0801020000000458120040780100881000008008000010000000000000000000000 0000000000200A8000200000800428000000000000000000000000FFFF0A01000000000000000440 040004800015211000000800005201408000000000000280000002110084480000404284A8530108 110500000208000540540100088040000000000000000000FF670500000000000000003000000010 40000000240000000800008008000008000000101000150000000080000290080000000000000008 000020000010008010000000000000000000000000FF09978800000AA8000AA8808AA8AA8408AA80 0810800022A2AA043A022AA2A22AA0002032AA2020802A20022AA0420020420023223221222AA000 2AA00200222222228A000000000000000000FF372C80080000100002144104408440D00100048000 0004D000044000004014000000004C000C0001000040900420040020040080080020020040010000 000104104000000000000000000000FFC2EE800000155800155925D55D558131558058A3800052FD 563042CF55655455600055455600E00144E036556216436016436456446026556008556506506454 554556000000000000000000FF74280000000CA800088C888908208C08A880A82A80001002C20922 AA2AA2A22AA00028308200200022200B22A00A20A40A30A22A22A20A20A2102A22C22C222A22A2AA 000000000000000000FF43060880000000000010080000004800000A840000000040000100000000 040000000000004C0289080280000080080480080000008408000440000048048084000000000000 000000000000FFF1B60000000A900008C0AE008812820884140800800048101242E2AA2AA2282AA0 0005E2724125C133A5020021021221020A222222210210202000A01201220228628A000000000000 000000FFDECD00000000000000200002300100000208004400000000064000040000000060000400 0C288000006000500290000000000010010140000008000010008008008006000000000000000000 FF6FED8000000020000400001000C811203005211000002294B00800000001000060003001000402 400805480300405084A8410100100208548400320540540120020026000000000000000000FFF9B1 000000001800101800103005002809000003842040144601200648604600648002200E2021090000); SDR 8000 TDI (60000020020220A680680E016400804102006406006800000000000000000000FF69620000000000 01808804892801805C03029201800000C00602200200400610004F00000608032008309040E34231 20022AB44641600600E2C004744AD06102006000000000000000000000FFB0990080004040818828 09025001120841A108918040A260362061200258A60061000000A600000800350080490A83022040 0006006006386808085000006006006006000000000000000000FF65B60000000000218118010010 09000985A80A0B800000600E80620000004680600088000602000000220000600280200A00280602 6886006100006010406006006006000000000000000000FFB2B0010000000041882A14014211800A 010409158000C5400E422A400440860000081001461402A01023110174A654E00E4B6246A0E08610 6820926222086104006800000000000000000000FF40D30000000000818018000A00010228010888 01800000402600200000400608004200000600001000200040601600622600600602600641641000 6002006004004000000000000000000000FFD6380000000000000000000000000000000000000000 00000000000000000000600000000000000000000000000000000000000000000000000000000000 0000000006000000000000000000FFD61A0000000000000010002000014002000000000000800000 00000000100000600080000080480000400080000400400400400000000080080000080000100400 4806000000000000000000FFCEA1000000000080A00A00080820880802240A128000120002002002 04000480200600000200A00000200000200200200200200200200200200000200080400280200200 0000000000000000FF79B30040400000002043000100002012002102400100400140014000000000 0010008400008408000000004000000000000000000002882C000000002400080000000000000000 0000000000FF1C1D000020050204802880C489A081881A90C8208081092002842D02922802003002 00000200200000200080280200200200200200280300300080300380240200380200000000000000 0000FF88A0000050000123883881C0303594B083C8B92B802010E48E024004426884006444500006 00608040600080600601651600601700604612608020602E006026806006000000000000000000FF 8B2700200002820100040510100060100102260B000104406081C544104004000015870004120000 000040A008000000000000008002982B0800800124004010000800000000000000000000FFF4B200 00000000809049008028128A0C00D008C88000102202002802A82002002242500002082000402000); SDR 8000 TDI (07006004800006800800804000804002006006006006000000000000000000FFE81E000000031881 8018C3801801811A25801C01A080106C0002510600E00C0060060300062800040068000260060860 04280946000000004000124402004086004006000000000000000000FFF5BE000000003801801C01 845C51A03809B2B953A00000E840884806886006006086800C0E00800000684008E0262065040402 06008000004040805002006004006006000000000000000000FFAC65000000002011800A93D83801 801781801883800080E82408468608780460608400000604000000200000401E0060060060000000 06004800004860004086004006000000000000000000FF482B00004002000D810A05801A01809021 83FA2180000565040010060060040065040214160200040020000340169860060860204009568040 40014810005106006006000000000000000000FF5B9B000000408101800849C41051A0400DD01811 808010640404400301400800600401021631000000204008D826406286427B010080060040201442 03804002006006000000000000000000FFF554000000420001904811C03421008905901881882020 700604B0030840100060040000060002080060802040060060A600E0088802064B4000044A420AD0 02006006000000000000000000FF0961000000000603800800803A41A01041400E11800002400582 C00608600200628400000E01030000200010440E00600640E00648610004E43000400A0840040060 06000000000000000000FFEBF3000040000021874A0480980181123D0708098040C0401C00428607 E80200600400080662809008270049628612614F287087006040506B880144020441240060060000 00000000000000FF2974000000420021B01810810401000101084C81880000C28500050600600E00 600400020604000010200000408602600E0860960064080060000460408140440040060000000000 00000000FF7BC1000000000201A21C08888003800801000801800000400E80280680600600602600 0C8600000600200000E0062060260060060060000062002060000058000060060000000000000000 00FF529601800000444180288180C9839491D1875CA18040A1E80501114681E00600603600029601 00189820181C4008380020418146026006017000A04006006406006006000000000000000000FF52 61000000000001802C83800E090096018018B180014472042A000600600608608620880620004100 252000409000800002000604600E087001006106006006004006000000000000000000FF24A10000 00000041840A0C880811821011002001800002420454882200400690001621001621002000202003); SDR 8000 TDI (02608600000400624645E00006604400600C006000000000000000000000FFB708000000001C1182 A0D58D220A210350B422510000946A0114A202824002800824400A0AA10808894400CA692692E916 020C04A06826B16A80806884806C0E806A80000000000000000000FF219200000000188190100180 1001322804808085000080E128C0212629430F006C950408A208020044400000E206207006080044 1262860070000274540860A6096006000000000000000000FFD18700000000180180100180140100 0A008000010000006000002806004006006004000002000000004000006006006004000004806006 004000004004006006006006000000000000000000FF59B1010000001005800901C0085481129080 5800000000701020F003107006000006000006010000846010006406C06406400806406806806000 00680C007006006000000000000000000000FF5E1F000000001601E00A01800C20C0100080034000 010060040C4203097006800036020256000201006000006007006004000006807007004200005024 006006006000000000000000000000FF8B94000000001001801901C0180088980894580A01208C68 4D0048B22048330270060010060001000060808060060060860000A6006006006022006006007004 006006000000000000000000FFCF9D000000001001801A01C81800801C20889A0A0A8008E82427C6 8232C2AA2EE00E0C020E2800000060A022700E08E02408088602E00622C4C0004056007006006006 000000000000000000FF72CD000000001801800B0180082029008894434B8140127050B021522140 36006856000C52800304006080006006006106000946006006806000006002007006006006000000 000000000000FFA314000000001805878B0F97E8141B00C28700E180000240000000025048140060 A6A28812C00000086000006C06406C5E02061E056066016000006002006004006006000000000000 000000FFED9C008000001801800801C00801C4121000450D8C808CE009424D06036444B4E8CE4100 0210800014613104601610E004221086206006824880005002006006006006000000000000000000 FF58CE000000001801800811800841801103100001800000604000C0060061060060060C04020000 00006000206006006004100006006006404000004002006006006006000000000000000000FF38A7 00000000180180180180180100080080180180000040000020060060040060060000060000000060 00006006006004000006000000004000004002004006004006000000000000000000FFA50C000000 001801801801C01801400800A0180180000040008000068070060060068010060000000060000060); SDR 8000 TDI (0108080010008000000000208000000100220000000000000000000000FFB0250000000000AA0324 A20A20AA0802AA0804AA00002A82A84C12002002802882A80002A82A80080280002A820028030024 82A02A82282A80082A82A82A90302A82A8000000000000000000FFBDAD0000004003543543103042 8832034C3101540000CB0800C50450CC0CC0D10C41000D50D50840D508008C0A80D08C20450D40D4 0CD0C508508A1550D51440810D50000000000000000000FFAC8B00000020040048000041040040A0 00454200000100100100080010900100100180100100100128000100114903100000101100110100 1041001801000C81001000000000000000000000FFB54C0000000000AA0AA08C0800000220800820 AA0000A801500802202102202A80100002A82A80002A80000080580400000002282202A03A000020 82002A0218180288000000000000000000FF399E000000000A00A00A00C30A8AB00A04A008008000 002A28C4210281291280288A000802802800803000902842C52D5209080280281280284280205281 2042C02802000000000000000000FF222F0000000014012010432032410082492282000001030905 00C8148C4004800A24000000800820800000A20A80900800C409009088008108088A008400090082 8840000000000000000000FFFA5D000000001841805885801955321805081801800012E20408C14C 12688600628E08888611600040640055650600600620020610610E00604008602C2262160060D600 0000000000000000FFE0650000000C4D00828A30954800C0ACA0C10D0280012030CB442202203003 40B0020012230034010CA0010030032A34A200108320344333341344AC039030830C300200000000 0000000000FF5DD40000000412802A04900402025300022A0000000080080081080084080C810A00 000400800800800400D68D00A80D40800A00800C00A0080081148400081080085000000000000000 0000FF803B000000400000A00440C9000080890080280080001C200E00700280000000200C010002 0020022020002022820020020200022020220020C0003032002082002002000000000000000000FF E33D00000000404801810850C1000024081182A300000281C42004701082800060A010102C01E208 1080000800001080004805204A001010021250000094640418E106000000000000000000FFEFF200 000030000024402422245404406400010400004100305209000801000061102001C0280400010000 010000440008000000100180080402000208486320046286000000000000000000FF13C500000000 190180220380000808008080000980000066000CA2806248024004040202061000004E4200006026); SDR 8000 TDI (C400000610600424401011408E0000C0000026000000000000000000FF23FD0000000018410210A1 809800049109800001880000400420210E00C500012006426006000B000962471070072060260800 2600E006006C40086006104000086082000000000000000000FFB2FF0000000018011A10A1809840 08F00980010506001002000064060440E40C000600401602100000621640646601E01E0000060060 960271300060A6000000006000000000000000000000FF8458000000001801001001021884101821 15002100A002841002E0462840081044060040060410000060060061061064860000060061060470 00006146014000000004000000000000000000FF729D0000000000000000000400420201000200C2 11000A801000048052800804E4002400080004001100284800002001200800000000100002880000 0008E000106106000000000000000000FFE42200000000800000300008A0B00010910C1024048012 00000200800040040162500000040160000002800800003000002884000000C04401102800885260 00286006000000000000000000FF424700000002106288880A80090088886291080000602022A045 405200240A00208220A002084100082002802D829224A20000C20920020020001020060020060020 02000000000000000000FFED6F00000040040842040042450241044040940008010090050890210B 90002010054050A10000000010040000000086180000080083180000000010610191800000000000 00000000000000FF66F2000000410C20C40C00D20C12D00C00C50C02800108B10113310308301240 340300B0A310280008300200208214202231000A1120220028884030030030025020020000000000 00000000FFE34E00000002180D89581381182180188B8810218B4042444600604604600601612C00 400600E00000630608600620E1060003060062064260001061145460040060060000000000000000 00FFFC3F0000000014002C405225520021420022100100010048050C482C92084084090480480080 4800A48004800820920820020900910810800820800894800444800800000000000000000000FFBC E900000000080080880080080084080088C000800000200220A08220A09200201200200200201008 200200210201211209000A002002002010002042002012002042000000000000000000FF2D400000 000000AA0002900800AA0C00AA0002AA00002A82A80103510402502C82200002A82A80000000002A A20A2022503002202202A02A80002A82002A88802A8288000000000000000000FFBBB00000000000 0000004005004200C000042400000000020010088000000804008000000000000000000020800000); SDR 8000 TDI (000010008000004000004006006006006004000000000000000000FF4F960000000898A98880198A B8D38018918AA08D80002060042242AE0062A628E2362062402A80000062AE186006086044000220 22000400400000C2222AE3060CE28E000000000000000000FFC57000000000580584214500182181 180B8000018000006404004006154016042016116000000004056006016116046304000100110004 10400404408200204E020002000000000000000000FF5B8600000004180180000080181012382180 004580000B40D409400640400600608604615000000028600642644640E04C0000080004D424C000 484012006106406046000000000000000000FF699A00000000180180000001384202180183004180 00004284924156004052002806006310800814006006216206246004000000108014004824004002 002006000002000000000000000000FFB75100000020180183300180180180D8D5B0500580000068 14006006000106046002002020000000006006906886086004000006006004004008004800806806 006006000000000000000000FF0E040000000AB8AB8C10AB0E1889C8180101108980002AE02420E2 062ACA0228A2AA0021002A90042AE00602606E84E2AC0002AE2262A42AD0042AC2A82AA2AE2A82AA 000000000000000000FF988A00000040180180000180584003184105500100005110004164260150 0600608200200200080000E006006007006036000016016116006840016010006504006046000000 000000000000FF602B00000055595591015510594A149943B2215500005513105265065555125125 5300243255000C55700613608600655600055654E4D6556044556540552554550532000000000000 000000FF8C3A0000000CB0AB8CC8AB8A9895880089A800CB00000422AB1220862A420028F22C0062 AF2A8020226006D0EA3600E0840002262A62242A40080852A72AF02C2AE28E000000000000000000 FFF0B2000000001001802800809801802011000001000000204300A02E0048200230040060060000 0000600640621650E00600000600600600601000700E002004000002000000000000000000FF41B2 0000002890AB8898AB8898A1A8C0852000010000002AAA08A01E2041D42C82240062AE2A80003268 060661067C64040003AE22E2AC01C020644A062AE0042A8288000000000000000000FF3337000000 00500180180080381580400310C0150000002000C4250604C21002481480600600084000E0062164 4600620E000006006006106800026046002414006004000000000000000000FFE2D1000000041801 04300182180004104982012180005340040020460840440060860060060000000840060860960560); SDR 8000 TDI (0006006026446000006086406020006184000000000000000000FFEBA80000000100218418010218 03045811081871052000623008211400410400C0860004068401280020081060A600E2B014000E00 6186484280104006010000000004000000000000000000FF4AAB000010000401802C088000200208 30840082808000109002A3262AE2080040260000870A040001230001620600600214000620600622 6030006010210804086204000000000000000000FFDC890000020000218098C28000000908229480 80882034022014000604200C40440602289608000000200820628614610200050645641605440000 4000046014200004000000000000000000FFDA0C000000000081810C2180184100B8008316088040 40614802408C25401000400604310614000008204004600600620001000600608600E01000600001 1014000004000000000000000000FFC2480000000104C9C41905827A21041890801D00940015E480 10400420C00000440618301700000108202003E80690EA1080810600601644448810428000682480 6004000000000000000000FF94C40000020006098010008400011000C41000400080001000006004 004082204006004A070000840060082862868560860A020645640600610400650204004440000400 0000000000000000FF7F1E000000000001C0D882800249002000102000000000000400400440400E 40400608C0160000000020000A644640E00600000600E00600600000600200689480602400000000 0000000000FF9C6500000000000182103080000102080183020180000B00C40AC00615250204410E 00400700000500200021711604700680010610600600400400400A40000644000400000000000000 0000FFF6E50000000AA0AB8918408AA0C78888AB8440AB800020024C2042AE04642648C2363242A4 2A80002AA2A80060060862AE00022E2262AE2AC0002AC2A20AE32608E28C000000000000000000FF 14FA0000000400218240018018020218830010410000006028092006136002000006086003000004 00200000604600630600000000008000C004004086000026000000000000000000000000FFEDD500 00000AA0AB8C088D8AB8918CB8AB0090AB00002062103202AE31600608C22622E2A02A80002AA2A8 10E0CE22E2AE0002A02A02A82AC0002AC2AE2AE22E2CE2AC000000000000000000FFE67300000011 411591114595590010D84195510980004D650044455640654E55054243650AD50004552550436316 4D600E00055055045054400454C44E550416510550000000000000000000FF3E4200000000000180 580180180180180188100180000D6100014006002156044106006010000000002000246406106006); SDR 8000 TDI (00000008020000400001000008000000000000000000000000FF1CAB00000000020009200A032054 03004000204800001284A00280005010202011000010110000002400002A04404089100000000000 88000000000010200110020400000000000000000000FFCAF4000000000000000000000080004014 01000400000008100000000405080004208101000000028100000101100400400001101000000000 02000100000000400000000000000000000000FFCF740000000004AA8208A08908048808808A48C0 80002020002822AA00A0020AA00A2B22222AA00018200000200208221200022222A2222AA0002AA2 220AA22208A0AA000000000000000000FFA16100000000000121204321000120844140D043000004 40041549050950000000005090310000000010000404001000480000000000000400001000100000 C4220000000000000000000000FF461400000000015592192D9258C195390312190B000054741442 4556C074AE55740F54754F55600104E0004363164D75460005465465565560005564563564D45365 56000000000000000000FF7A650000000000AAAC0888C8082ACA288C820080800030A2AA20222A22 22AA2AA2AA0022823320002AA00030A0CA22A2820002AA2AA2A228200020A2A22AA20A08A2AA0000 00000000000000FF169A00000000000000A00000000800022840800000000080C40950000B100000 00A00010010000002010001000400000000000100080000000000000800000000000000000000000 00000000FF48CF0000000000AA82888A0EE90008088090309080002202AA0222002802A22AA2AA24 28028020002AA0000020020820020002222222320320000422220AA2262AA2AA0000000000000000 00FF777B000000000000104000000112048004088010000009000400005004801400400408C40611 6000004000010110040404000110100008008000030010406008006004000000000000000000FF80 DE000000000000000020000020004028040022000000000029008000000000600004015122000000 00002A0440408130000000008080480000480100006100006006000000000000000000FFCC5D0000 100000018030000000010008400C0020004000044024200410000001408600080700200000A11000 E2060062460A000620612610650000600E006020100004000000000000000000FFAB760000000000 418018020500431448880001000D000881081020C442C5540040260001160A00000024000060D615 608620000E006006006048006086010000006404000000000000000000FF1AE80000000000018018 1300980109B8810018050A0008E0002124040040A000400600000E00045000200000600E0A600220); SDR 8000 TDI (000006206210404446220006200028000000000000000000FF34C8000000001801801A11A11A2120 1A0120100000000000201060020000420401008860B6006000006E06022C4600628E002002008C06 066000000106006086006000000000000000000000FFCB4E040000001C2181182182202010184010 0000000090805000202E10000601000042600602600244E00652600600748E14700600000740E052 80444EC4040E406000000000000000000000FFA7F800000000180180180180001000100004005000 000000000000060000062000001060A60060000060560161060B6026206406010006006400100006 006084000030000000000000000000FF480300000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000006000 006000000000000000000000FF023900000000000000000000000000140000000100008000000008 04001000001001004004000000000800004000000000004004000000000000005000006804006000 000000000000000000FF944E0000000008208008008008808408A2A88C0580000000000042020000 020000000020020020000020060A2802002002802002000002002000002002802002802000000000 000000000000FF73CD00800000000400400000800000000020020000000000004008080000000008 00000000000000004801000001280000000000120000000000020100048208208000000000000000 000000FF05E9000006000922802800840800800C2284485280010008002002020010020000604124 0200200000200208300200280200280200000290200041B002003003002000000000000000000000 FF2F231001041438418C18038119010098330030430321080200006346000144000020D2648F40E0 0000F506C86146C1643612600611000615620800E006046006006440000000000000000000FF3C94 01C01000108101100116800100010155153900000008005558084500050000010000000440000040 040404102C48000008000A0850880000020480028218208000000000000000000000FFF2F3094094 140840840800810800800C0CA04C40012080020000252222914300000028220240200000B4832020 CA20A21610200211000211200000A006842002002240000000000000000000FFAB04000200000000 1086040000800102A00C808004000000000880000008000008000001100280020000008A0C000200 40040001800840000412000200800000000000000000000000000000FF8DD4000200002000000000 0A010004010015400A0000080000220000000000000820C304008000000000000408000000010000); SDR 8000 TDI (080640024A106006007006006200000000000000000000FFC9AD000000081805809809801841A01A 01C13800000000000088500000100400006082E00E00620001F00600600400F00600600600000000 6020084006047004006000000000000000000000FFBBE940000003182DE25801821815841841911A A808001201002040300200660080002060062160044060478364C40060A7C2620600051100609400 6006821106000028000000000000000000FFAB3B2081420118859018218018491418233094004000 400010024104001016021000106306007001C06046086044006006C07106000040C0621000400600 6006007C00000000000000000000FFE898000040001801D01C41801801289C010010002000010421 00C10400000E0480A080600600608400620710608C2163460860060800000160240C800600100600 0000000000000000000000FFBE9D0000000018C1889A01800001881883A01C000000000200010080 00000604000000400400F00000600610611431600620600608000E00000050400600600600600000 0000000000000000FF64280000400118B980D84180001580309B9718600200100141060000000856 0109090062061861044060C60064440A610E00680602050701005425608600010600000000000000 0000000000FF121B00020000180580180180000002D620000000020000800000000C000006000051 00640600600080628601700682624E10600604000600000000490700600400600000000000000000 0000FF2C2C000200001813801901808000005800400000002000000005080C000206000000006086 106004046046006226006006006106000006800004000806000806000000000000000000000000FF C659000004001821901C05809C00C6391090AD050001198800826008001006060010106626886000 016107100024186186080600000086106000404046646006806000000000000000000000FF7E2000 0000101E21805801801CA0801000C0A801000100104100490000100E000000016047046080006006 000006006006110000000106806008086406008805000000000000000000000000FFBD2800000008 1813885C85A00000E01408900885000000000000A0000004120000100061060060810460A7882405 006806002880000006886000084006036006000000000000000000000000FF6FDB040000001C4180 1801824410801020940A10000010800800005000000244008004600604600045602E512027016006 0A2002001206016029086556000416006000000000000000000000FF8B1D000004001801809A2980 9941081901201020004080004008610208182380800031600E0460000168070002850A6026210202); SDR 8000 TDI (060C620004E806106036026000000000000000000000FF8656000000001201801801801801801001 00000100000060008060040008060060000060000040000060048040078060060060060000068060 00006006000006000000000000000000000000FF8438040000000C07901841845051101800905804 00000500100069040010410060006060004060002060074060060060064160170009068064000040 06000004006000000000000000000000FFFB16000000001801E01E018050812018A2D00800000000 0000C8E42640048200600088604000400000640600600600600600600600004E0060280050068060 06000000000000000000000000FF4E240000000000118098018014018096108038AB800020400802 609400802800643100E40808693102480E00C08E20754E00E08700000600650000E0060000060000 00000000000000000000FFD3A0000000001001801801805D01A21920C098418A0028420013EE2C09 028A88E21842E22810C0600A608703C2A66A608E086106028A0628E0000160068060060060000000 00000000000000FF48D500000020081381180180180121182A104B120000A00010446934400D4E00 4440116250006116A4640F002916006D568168060000500062AE8048060000020008000000000000 00000000FFB9350000000A00018238018891C320119A020AA8000080000000280600000600406000 601008700080E00648090600680642600600051800600008C0060060060068000000000000000000 00FFFBB0020000541805805841885201041A01C2C8201400082410056054101356114408C4EC2010 402612700604A4464260870D7006048000096206804806000006000000000000000000000000FFDE C30000000010018A180184981510182388088A000045200000650400000600400000600021400001 610608000608600E006016000000406000114006006004006000000000000000000000FFB0720000 00000001801801801801801001001801000000600000200400000600600000600000400400600600 4006006006006006000006000004006006000006000000000000000000000000FF89B70000000010 01801801801801801801201801200000600100200600000600600080600000400000700700500600 6007006006001006800000006006006002006000000000000000000000FF50D0010002200001D21A 01821C09841A05801A2100002068004068A400003700600000611000400400200600408600692604 6106000026000104006006800004000028000000000000000000FF66DC0000C02D1131811A49801A 01901A41885911280004681012600404100684E00054E2004044022020460C482601600640640600); SDR 8000 TDI (C50800D30D50950110D30000000000000000000000FFA628000C0060040000020044041040000801 04900001001001091050001101001001001001801001001001001000001001001101001101081001 041001401801020000000000000000000000FFBD700008000AA0AA0AA0AA0920880000882800AA00 000000004002A00008000000002002002A80002A8AA80800002A82A80881400002A83A00020202A8 4A80200A8000000000000000000000FF2512000000000A00A00800A20A00B00C00800A0080008028 00A0A802000412802000902800002A80802002852D0300280280284A800802802880812802802412 802000000000000000000000FF131800000000000100100120822322A04503420100000040008A08 0C0000A40040008548D1000800000000C04849004000C40C80000800810C00A80800C00880C00000 000000000000000000FF226E00000002180180190192194184582120B80580004260001064460008 8C00600002610000650080688620400608608604605600000E00600041610604620E00E000000000 000000000000FF57AC000008704A54A22E22C14C12D00E8ACC0D4800000920894331020004032020 0011224140B001003003113103203A0330B08200108310B0090032531031030A2000000000000000 000000FFD68C00002840040400028029009020024240A2250000000000800E000000000040008048 00800C00001220810900880C00C18820200800880A00800800800800800000000000000000000000 FF321A0000800A4828C608008208040008008508C0000000801010206C0008000000010420000120 000A200A68202200200A00221A000002002000002052102002002000000000000000000000FFCEEC 000000008090484040049402043020000012000020010861C1000008000800003B00404001010000 800000801001A00A0000000190130010018000086788076000000000000000000000FFFEFC000000 0426002080001000080082080A410000014000000200000001984000000003A82280000001000080 00400200300000000000000000000780006010086000000000000000000000FF6BBF000010101843 80190D8051411051941008080000150000046000000C2600600000E4000060000060041262060060 060461C6000006006000624006046026100000000000000000000000FF873B0000402C9825829C81 AC9C95205928202AA40000800000A2EA400000248060008A60A0C36800826C94C16AC7086896C068 36200886806800C04A86800A84886000000000000000000000FFA4D9000090005909901809801A01 8092052C8009000040E01000601400011408600140F2080060009060240C6006006A4614E2860000); SDR 8000 TDI (62A200441640C004216000000000000000000000FF7C630000000018898018418038030008010080 000CC040602600008E4A812201612000008412600000600600600603622620600600600608602040 4086012004400000000000000000000000FF844B0008000000000000000040000800900080840020 0400401000000D040828842000010040000000600040804000000008001000000010000000041040 6000016000000000000000000000FFED4B0000000100400000000000810C20800000400000220200 010004008004080080000010080000006400480020C4020030000010052013041000000000600800 6000000000000000000000FF12E000002000291886080280082480080012081012A010A082080102 00002A00800000240236A5000021020028821928AA802E0240200200200054310202270210210040 0000000000000000FFBCC7400C005804004004244004084084284004010801090009005000001001 00406100900100100900100500000000000000808100804864102000002878147400000000000000 0000000000FFBE98400400408C20C00C40C00C08C04C20C00C20100130250B00900201100B082001 0030031530090034032020C304201251200301201211304800200200300200200000000000000000 0000FF8D910000200058098218018018A193110984100182C004600610600600004401610000E00E 40600000600608400630634600648608628600640000602E046004006000000000000000000000FF 991A0002002012012012012232482010530033490000800800814940000854804800801001004802 800804804800804800800800804810800C02AA0800800804A00000000000000000000000FF868A00 00000008008008008108048008008408048000002002042002000102002000002002002280002002 05200200200204212A002002002080012002002002022000000000000000000000FF14430000000A A0AA4AA4AA0900840AA2C068800000000000002802080002100000002A82A82A85022A82A83802AB 2A82AA39A2120002A02A85000002AA2A82A8088000000000000000000000FF089C00080000040040 000044400A03400000000000000000001401000008000000004402400002820000004A0400000000 0A8408000008000280000000001220000000000000000000000000FF197C0000000AA0AA0AA0AA08 40C00AA4820A202200000000002402800002200000002A82A82A80002A82A82282A82A82A8220240 0002282300002882A80A82A8288000000000000000000000FF457F00000055415415455410032030 034C5523540000800800810C500002D0800000910910D50800D515508108C8D50D50A00800800CC0); SDR 8000 TDI (0400601600004E400000000000000000000000FFD1810000000018018018018019298CD80980B001 000008C28408401400003600600009610600600000600610852600641620624600608E0900000544 A6206106046000000000000000000000FFA9D90000000C1801801801801801000041821435000003 6006484004000016006000006006006804014806081416007236286206006006000A04004AA60004 C6000000000000000000000000FFF55F00000000D80180180180180180180B08D800000010000400 48000000860040000060060060000C60060040860060868061560060080061000060164060140460 00000000000000000000FFFBDB0000000018AB8AB8AB8AB8AB8AA881051C80000020000482C2A800 02262AC0012AE8062AF2862162AE22E1662AE00602E8060062A03AF0062AE0060A81042880000000 00000000000000FF3907000800011801801801801801000841000208000005000500150400010608 4000006006406D001270060048060068060469460061100968000050060060064060000000000000 00000000FFED6A40000010595595595595595595490310414C00004CE00742940400054655400055 6006556284C0755644640E5560B600E04E0064C04461045540561512463300000000000000000000 00FF70080000000A58AB8AB8AB8218B182C88B8A488180002040042AA0400002262260002AE80602 600021622E0944062AE2174160060062262260802160862AE08A0AE000000000000000000000FF4A A700000002980180180180180100082980080180000040048800D000000F0060008060060060000A 600608C0060062062A630600600E016200006506400012000000000000000000000000FF3F5D2000 000018AB8AB8AB91D8859000A10988C480003040042AA8100000142360002AE0061162808863A644 61D62AE1661064160062AE2A64003664760AAC42088000000000000000000000FFADB20000000498 01801801801853880001000C22000004E00600044800030480600000600640680041680601602600 608E2AE22600600600690008610E404142006000000000000000000000FF73AF0000000838018018 0194380104A815845011000010600600610200005210E0000000040AE0000460162C441600620600 608E006006016200014206000416240000000000000000000000FFA7310000000018218098018018 0114484382103100000860160060220000005060100102044062A000608600701610700700700E20 60060065000A5006006286086080200000000000000000FFB75A0008000018218498218019818229 33120124028024600E16202E2004B00064880080040060220060064161CE02622630658600600600); SDR 8000 TDI (010006004006104000000000000000000000FFEDC6800001801001281A018A910800000090900090 00416427046002008004006026A5424600612000600200200600E0AE00600600E49608E04020400E 084226004000000000000000000000FF7571800001100800901801900031431020895021000020E2 4708600001000601629600C0260060C0000082000007006216006406006006046420406016154406 004000000000000000000000FF7F8F800881C89281401C8D80110130B0A084330590800660160C74 0000000600E00EC0500680600081F080880006C16A4701F20600601612600100502602D006004000 000000000000000000FF1253000080208C80E01CC9C5500100508000100000A00060860060040000 0600402504640600600410080011600608608680688600E48601000C800046004054004000000000 000000000000FF802E000800000A0080180180100114100002900A000032E0060821260000160040 04906006806000006000086427006456486446006086080000004526405094404000000000000000 000000FF67D5000000801001001C01801001415001801C40000000600604300400000600400400F0 06006000800000816096007006056006006016010000000816004004024000000000000000000000 FF4ED00000008AB0AB0AB8AB8AB8AB9018AB88388400000062AE24A20C0003B62AC0042262AE2AE0 002AE2A82260462AE18610608E2AE2262200002AC0060AC22408C000000000000000000000FF141D 000800800000001801800004012023001895000000400410600400028E10E00600E0060060000000 022360260064861060060060080060000160460000B4020000000000000000000000FF9A41000000 8AB0AB0AB8AB8AA8AB8098AB09588100002862AE2862860002262AE0062A62AE2AE0002AE2AA2AE1 0E2AE40E22E2262AE2A82AE0002AC2CE2AC2AC2CC000000000000000000000FF7679000000954154 155955955128100101931801000025453404E5540000464460065465565560045505500060965560 164564CE556540556004406516150404510000000000000000000000FF3DBD800000801001001801 80180184580182185100000560060160540000060060060160060060000060000062060060260061 16006000006000004006004004004000000000000000000000FFF0B30000000AB8AB8AB8AB8AB803 8418B18A5849000030400440422000000622E0002262262AE0002AE2AE1004062AE0C600608E2AE2 262200003C60064AE20608E000000000000000000000FF5E47000000001801801801801801800003 8018A300000440342541000005061060000060160060040040064400160060260D60060060060000); SDR 8000 TDI (0010400000000000000000000000000000FF30A48000A880C8048AACAA8008509408808AA8808000 2AA2AB0024A20002AA2AA30A2022AA2AA2000ABA232024032AA08200200A2AA2222220090A20020A A2AA0AA000000000000000000000FF34C08008214044084014014012010410050290050000000000 0010040010100041100800050044000008A000030100400004011080400000010004000000000000 0000000000000000000000FF70F0808155901801D55B5584190580992D155941800055655651600E 000D56556446547557556210156C564560965564564564CF55655654648843651655655635600000 0000000000000000FF26E600008A8908228AA8AA82A82A80A8C88828B000002AA2AA2AA02A000022 2A222222A2AA2AA0200AA20A40A00A2AA42A30A2222AA2A22AA24020A2CA2AA2AA2AA00000000000 0000000000FF0E541000002282A820000028A40000200000000A0000000000021124000000004008 00800100008020008008002080008010000080000001000008004000000000000000000000000000 0000FF15520000000409008AA8AA90010010008088800100002AA2AA2AA70000050223822A2222AE 2AA3004AA0021420422AA18202208A2AA2322220001A20022AA2A22AA000000000000000000000FF 70500000201101000000001121021120000041000000006006004090000510100000010000000042 006404024010000040090000000000000002004010004000004000000000000000000000FF3F7C80 011202405400000002002802004A04003200000060060000200000200001001000000001004060A8 4905200004102004400000900902C0208520006008006000000000000000000000FF99CB00000100 18038418018010110010481111240500046206406014240126206042002086306120006406006106 48610E086016206026006000008006004006084000000000000000000000FF1E7500000100180181 581581102300908200300088402861161460A011001610641200221600601000000422E016046006 04614614600601642004400624422E004208000000000000000000FF907400000106184180180380 512104902304180188002860860060A008800E00630E006006006000006006102046016006006006 00600600600000600600422E004000000000000000000000FFE0CA0000018010030218458070C916 10090419C782400063162864080200A628658600628E2060A8100004238086506086006106086006 006430024006224016004208000000000000000000FF5893800001800C20815809C0800440008093 504000A002600E02600020000600604600400610600000040208203754E00E1260B622604600E200); SDR 8000 TDI (00020000006000000000000000000000FF3FC1000000001801821801011829001801801028800010 200C0AC4060020021060060000060261000061000021161060160060060000000060000860000000 00006000000000000000000000FFDAD5000000000000000000000000000000000000000000600600 00000000000000000000000000000060000000000000000000000000000000000000000000000000 00000000000000000000FF1D97000000000000400001000001001000000000000000600680080080 00000008000048000000010068040040010000000008040000000000000000000000000000000000 00000000000000FF1C94000000000800800800A00800800A00800808800000200200020600600200 20028060060020000020060020020020020020020000000020000020000000000060000000000000 00000000FF0E63000040000024200000200000000240000001000000000804400000102000480400 00010040020408000040000000001000004000000000020044010000802080000000000000000000 00FF4D7D1000200008008008008008008008208148008000002003182042502402042002003002C0 2000112002002003002002083002000000002000002010060000002000000000000000000000FF85 65000000021801921801801841801C259018010000006006006A0480488600700780400684400080 641500400740608F506046000000006001004000000000006000000000000000000000FF3A0D1800 0410002260100000151000020044A0090000500808024204005020044004004004404151020004C0 4404044404800000200000D41150D0120800008020C000000000000000000000FF68091000040008 00900800800A20800804A80A00800028200200200200200200300280200282200080220A00200220 2002282042000000002800006800000000002000000000000000000000FFA2030000000000000200 0060000800000000020000000008000002000000800000000000000000A800180020020002030800 00000000008200A8200000001800000000000000000000000000FF24380000000A00000000000000 800000200200000000000000000040500C0006000000000060000011000000000080000000000000 0000280000080001000000000000000000000000000000FFA01F01000404404040000015210C1440 3200004200000000001280000000000001001480000001002000890D052000001044034100008008 8280208520000000200000000000000000000000FF7AC308000010010A0004000000200080000000 10000000000140021000000000002000080080001000000000001080044009000000001000000100); SDR 8000 TDI (000241006088000000000000000000FF3C2F00045074140160180000180004280105382000000070 0E0448001048444A794681600600200480610400008628620608C006000000556415405420200000 006000000000000000000000FF1FB2010000010010021C4000180005080104190480000068020AC0 C80040040060060060060222801000042412A600620E08408E100010406288084800000080006000 000000000000000000FFD98C00840000140108B8010418810288018010A1000000608604E0020060 0600600600000602A080886042400C46006006404406080008088080006008000000006000000000 000000000000FF135300000001101184B80100188500090D819221000100600A7071520060060060 0600080600200000080200010608649621E216000000000000906000000040806000000000000000 000000FF3246000000000800001820001808081811A41005000008600E8040020040068060060060 07002204006003840006086107104106000000400214006000000100006000000000000000000000 FF106F000010604800821800001800005821823201800000620200400202402600610630602E0820 04400002800907826006006006080280000084086000040080206000000000000000000000FFF454 0000000415610218009619D096A905821C41050005EA0600640682F00616684629E4260020000069 065E1086026006004000200018C06080452400008000066000000000000000000000FF000B000000 000804085802A0BE00808801401801000000600A00780701620600700E0061068020000002060000 06206006004008200001106000002010010000006000000000000000000000FF29D2000000003083 901801C95809900925803040008004201600620600480700604E000C161020004070000000068060 06006000000280006000822200040000006000000000000000000000FF1232000000040A00C01821 889851800821001D40820002281295700600480E10600611000E80240008830020000E00600640E0 02100048006420022000040080026000000000000000000000FFA88C000030049021025805001A41 288A01A0140084000860000040860064461061068001060220888205044200274860060248121000 00706000516010000300406000000000000000000000FFE42C000000001801801801101A01123C09 80100A80000060040043060060060060068008860020002464048C008600600E8568020000004060 40086000018500046000000000000000000000FF75B3000040049841C01841001801432851C01084 820002200000480600681200600610808E8002095080005000460060062060060800480062008260); SDR 8000 TDI (0000000000000000000000000000FF5389000001801801001E00801800000000001C24722011004E 00208640000200044880602600040100682600600740600600600600028000628000600600000000 0000000000000000000000FFA4C0000001E0020140180080182180980000A881000004648002A236 02030700008000E30E116110000886006116886D0E0060240000000A601028600720008000000000 0000000000000000FF828F000001801101001800801801801800080985182001E2260BB22E08822E 0602E828E0060A630002EA262260060AE2060260442A000116603050600640000000000000000000 0000000000FFB1D900000100080180380180184001020181404184409465500C3556440500000510 00E55611641400014600611750751680680600050100628400600600008000000000000000000000 0000FF354E0000010020018018018219E8074209806021000000608E702006000000000000006006 40E004207006006246006086006444100000006004806006000000000000000000000000000000FF 7AD0000001203A01841840801814100001801001000080E02800A23600083043050000E006906400 04004602600E10E427027006440000046040006006000000000000000000000000000000FF0AFC00 000100100180180082180000000D9011210840006506022006088202000050546106036004416406 416406046086006004000000006004006006000000000000000000000000000000FFDB1400000180 00018018008018018018018000008000006000002006000002000000002006000000000006006006 006006006004000000000000006006000000000000000000000000000000FFEBE000040180100180 1800801C018018018000000000006806002006800002000001002006000804006006806006006006 806804000001000004006007000000000000000000000000000000FF69FF000021A4010180180080 1801A05A01A4002100008060110028461000061401400328060860060000060C6026006006046404 000800000006006006000400000000000000000000000000FF980C000011B01015845840809A11A4 1A43A104030000016886842506000046400200802006406804006004806007487006286844000200 D5040C446446C00000000000000000000000000000FF8D5F00000000108B10182000180800080180 5D810000006006002880006004006206106066282000006106000107007406014006001000006000 024010000000006110000000000000000000FF31C40002000000001A3C00049814100927801C0300 0010E1820062208070040060070A78060120040010460A0026006006A24226000200116004004018); SDR 8000 TDI (002A8000000000000000000000FFCBD6000400A20B00800804A00C00A00A209028A0800080280280 2002100912800000922802A02A00C02802C42803002802B4281200080080284088A8020000000000 00000000000000000000FFB3C100000128A24B001220201242200294230015000080080090888C84 880480000080000094C8408008C0800804804804808D40000000908C000000000000000000000000 00000000000000FFE6ED000121851801805805901943801901805925000000600620602E0002A420 08000260460040000060061060060060061064460000000060005561460200000000000000000000 00000000FF56E7000400C04C30AA0C08C40C00D20C4CCA8A10800151304303220200100200800120 BA134C308110340B00248A2824832530120004012432A18032021000008100000000000000000000 00FF87CB0001002082034602004002082082D02980210000800880008800800984810800A19000A2 0808900C908A0000281200860C50000020800A08C40000000001000000000000000000000000FF43 1D00000104680000482892A802882808800A12800061200244285400000200000000208218600200 2002002002002002002002000000002002192002000020020000000000000000000000FF200E0000 400100C000A0010400A4140005101280000000600683000000000460808040000000418000600800 9409008480680000000200660000008000000200000000000000000000000000FFC5420000020802 00580014000040000002000344000000600620088828024002000000064804800002E000101B0100 11001002000004000885A0000060040000010000000000000000000000FF79700000018218398018 83881900000121847008800010006600260400040208000806603640000008600620601650600601 E086000000006040206506100000200000000000000000000000FF6137000401B038CBB15A48C23A 0A20A34120D0488000A008A0802004200C02100108A06C26CC880092888EA8E40E80E886C4EC0600 0220B0E880D0E846000400240000000000000000000000FF0B8B0000038298018418838898C18818 0B0812828000006006234314101106C2800004C10900008800600602600628620688608600000082 6229006006000020000000000000000000000000FF11320000018010018018008018018018010010 00800000600000400400080600000080400200000000000600680600600680600400000080600000 6006001800000000000000000000000000FF0AB6000001C008814438408018041140040018008000 00000008200600100243000004610640000080000601705680604600644600000000600000600700); SDR 8000 TDI (000000000000000000000000FF293104000000002000004404100000004100000000000160D60880 8002042000409001011000008004E020080C04C48C00008004000034080100000200000000000000 000000000000000000FF4FB800802000080001488880282188080882004184400021026240024800 04102026502202282100002382802042082002A82202048002002101063002400000000000000000 000000000000FFB0C801040142044140050044048000040000040000006006010010050010012010 4100102100100000110100000000008010008020028110100008000101D001000000000000000000 000000FFBC90020440C20C00C00C22C00C40800C1082040080000120AB4031030012434030030032 23003000013403103003213402002002000113003100002203003001000000000000000000000000 FF4F63000001801801801809805881881841800001000000600615600414000600610E00E08E5061 000260460062061261064164862102460060000C6006004000000000000000000000000000FFAA48 0004010A322520100520022D28C0002002030000800A0088C8042908A4000004810800030800C009 40800000805004800800000000914C10808800804800000000000000000000000000FFB5B9000000 808808800828800800840A0080005080000420024420120000120020021220025022000020020020 020020020020B2000002002000002002002000000000000000000000000000FF4216000000304480 0AA2800AA0D00040AA0AA08400002884A80002B05202002A82A82002A80100080A82182AA2A92A82 A82AA2500000002200103B20020000002A8000000000000000000000FF35660000002A0430000204 00000000000A0082C400000000008080080000000000000100000000002000005200000010000082 08000000000000010000000000000000000000000000000000FF20980000004301320AA4804AA082 1284AA0AA0B000002A80A88C82A00402082A82A82802A80C00102A82402A82A82A82A82A82000000 002A82002200000010002A8000000000000000000000FF221600020000C084554130354350354300 0C20100000D50D50521540540D48D50D50D00D50930A00950C20808D50D50550AC08C0000800D50C 40D40801000000550000000000000000000000FF4DDA00040000000060024A000400400000400600 00010010004018000091400000010310004014010011010000000010010010800000010010010010 01000000000000000000000000000000FFB6C70000000000000AA0880AA08C0AA04000000000002A 82A82202202102202A8AA82482A84000400A83180882A82A82A80000000000002200002200008000); SDR 8000 TDI (0000000000000000000000FFF52E00000190B8010018298008098000030402410000006406016004 00010200680610602201600020600400600600600680600600000600601008601600600000000000 0000000000000000FF6F130002AB8058AB0AB8018AA881880089082083000028A0A8A862AC000203 006006226B17A270100A82AC4262AE2AE2AE0362AE00000422700080680600700000000000000000 0000000000FFEFD3000401901C01001801801C218140080245010000006006115001001016006007 02630E84600000708680600600600611650600000601604102684600600080000000000000000000 0000FF716C0005558C1D551558859559219125541505518000552550CD555400144A0060064D6406 4360041515570B65565565564065560000045460142D6536006000000000000000000000000000FF 3F6000008902B8A98AB8AB8AA88988190288801500002CE2AEA262A80002C600700629284620F042 4AE2045162A82AE2AF0060280000022A700200E28E002000000000000000000000000000FF1C7A00 020101180180182980080B821A008040050000002000806000000086007006002046886000200006 8060000060060A600000000000E001806007802000000000000000000000000000FFF53C0000CD00 188D8AB8AB8AA8858C806188804000002A80AA20622000002600680622220E3260002AE0542462AA 2AE2AE44E00000000222E000506006002000000000000000000000000000FF137F000001101A0380 180180082182008B82032080000040040C6800000D03006006002046086840000826006002006006 2262020000000068004B6006003000000000000000000000000000FF6CB400004385582180180180 081580580100200A800000640001409600001400600609408601600000030C0AE0000060060860AA 00000210602000654E006000000000000000000000000000FFED5400000180180180185180180382 1801000000880040202640400611012450640610400400635008608700610204600700600A020000 00630108F2A6006000000040000000000000000000FF133B00000180181189580192086381006512 A0488CC008052400414244042401414600614610E0280002060A601609E006006786000000006000 406006006080000020000000000000000000FF511C00000180180188180384180180000105409281 0010400A04440A000008006006406016216000006206146046106206006006000000006000046016 486300000000000000000000000000FFE42800000000000800004C10000005000410008200002064 160402D00A84882083200001485004001060000000900202000000080000000002004882A8080200); SDR 8000 TDI (00000000000000000000FF12FC0000000118014234A1C85B01C5D800905800000000424C20200000 000700111080E90640011816720F7069812070060174041400086061000060060060070000000000 00000000000000FFAFA9008001901801C00A21C81801B01C4180000180000841040C200000100C80 000014600100800400008280600002F0160260060000200060242160060140068000000000000000 00000000FFA64E000001801801800001813A0184D82280000380000042040022A800045400000109 621400020020600214608800600620601400001000630000E5460040060000000000000000000000 00FF689E000001801801C01801D01801801810800811000004400400600000000600080000692600 00140008024168408068060B7146000000006014406016094006000000000000000000000000FFA9 F90000AB8AB8AB8AB0AB8658AB8C18808008A1000028C4AC2AE0000001862A82A82261042A80800A E2AA1062002AE2AE1062040002A02AE0001E6006324006000000000000000000000000FFDE1A0000 218018018000018018010210210018C1000004000000810600008E00800009601412000400014448 60000060060862540002000000040A6006002006000000000000000000000000FFA0950000AB8AB8 AB8AB0AB8898AB0810C800188D00002AC0AC2A820E0002262A82A82AE22C2A82082AE2AC40E2A82A E2AE20E3340002A82A828820E28E22A006000000000000000000000000FFC5E10001139559359541 55955955913914801815000051055040445600044654055044630441048455000E01631055655645 60840000C8550504416536452006000000000000000000000000FF7F380000018018018010018018 01815804801821000000400400414600001600000000600400010000600602600000600604600400 0000000000006046002006000000000000000000000000FF5F220000898AB8A98AB8AB8AA8AB8A18 A800000100002AE0AE3462A200022E0062AE2060420040E00AE4840460662AE2AE00608600000E2A E0600A60063A4000000000000000000000000000FFF8A30000018018018018018008018118040001 21000000200000600E0001060460060461120160044000044160060060060D604600004400600440 601600C000000000000000000000000000FF128C00002380180580180180080180580000000C0000 0064060AC00200000628E0061162262A620000644C14628E00600640641600030600630000E54600 4000000000000000000000000000FF0902000001821A01801905800A258358400100108000022000 02480680085200600680E09608681000080529600600600649600600000410E80022E54600400100); SDR 8000 TDI (000000000000000000FF5E3C000101955955845D55D559559558058538B380005563564A45460005 560000005560D600020055744401600155755643655600000054E00041653654F556000000000000 000000000000FF502300008A8AA88AA088AAAAA8809008A08A280880002AA2AA22222A0002020008 002AA0AA0000000AA2C240A800AAA2AA22A002000000AAA00020A28A2A22AA000000000000000000 000000FFC92800004A4000000904000004000002D108000000000000000080000000008000000002 000000800000844800000008000810000010000000800A0000000004000000000000000000000000 FF585B0000C90AA8C91448AA8AA8588A488409890680002AA2AA2342220003220000002224020003 004AA20A1020002AA2AA1020720000002223001E20022222AA000000000000000000000000FF3979 00000400000010200000002000000000002000000040040000000001080000000000080000800060 04410000000000090310000000100000400010010000000000000000000000000000FF1104000020 00002205000000008401404A04410800000060060881080000000000000905400000004060A01400 00000000240000000000008100008540100000000000000000000000000000FFA0C7000001801801 8018118018059018C10A8905800044408C01013000020600001012400600050040E0101064902060 06006126008000006000086026202006000020000000000000000000FFB18D000001841821825801 80194180580B0048098A001142244804001400860A042000412E0000300000002160200560060060 0E0000004160A0206086012006200000000000000000000000FF7E11000000825831801901801881 8438830028418A000042040CC2000A00560802200240861002A010E10C00E0001060060060060000 0020E08008608600A046000000000000000000000000FF80CA0000008038018230018158038C1821 0A8891000062408424402000020E00004850402E01000808010438602806E01604640C0000400061 00006006002006000000000000000000000000FFC024000000001809400889801841021011401835 800008C04C046088000146020000106006100000200100006B005070060061260100000060202060 46206026200020000000000000000000FF02EC00A100111801001805A01891905C20084820000012 40A410E04024912E10010804610750008010E00002600100E00610E0061400000060202160060160 06000000000000000000000000FF13E9002100001801024705811809001000C01828800024441420 A0204300A608004021600610000001020E0270014060060860040000100060000060060060060000); SDR 8000 TDI (0000000000000000FF4B690000000000004000000000000000010000010001000000000000000000 00400000000000000000600080080400400400000000000100000000000000400000000000000000 0000000000FF7592000000A008018008002008008008008018018000000006000002006002002006 00600600600080200200200200308200000201000000200000200081200000000000000000000000 0000FFF1EB0000002000002000002000000000000020000000800000004000000024000500000000 000000000084800804200005000020000000000000000000000240000000000000000000000000FF 652000000080080085480000080080080080080080000407826020420020020020021C2002002001 042002002002202083000002008000112000102000002000000000000000000000000000FFAA4101 0005813841101800001801801851C030110000001206006006006006006007086006406000447117 416504556854100426000000806000006000006000000000000000000000000000FF05E004014000 10010040000011110000000411010000010004004000044025001284044004004001020084801804 000004400020400001000001800001008220000000000000000000000000FFB895040002810840A8 0800400800800850A00800000000080200200202200000280200200220200022308A212282312002 300422200000002000002000802000000000000000000000000000FF411F00800000020020000020 00880000000000800000000000000000000000000000000000000000000000000000040030000800 000000000000000000000000000000000000000000000000FF62F40000A000220005600000000000 000002600800000482000000400000008000008E0000000000800000000000000000000800000000 910000100001000000000000000000000000000000FF299800000200000001440040000000000A02 009000000002000A8000000000000000000048000000000910140001001000200000000000000100 008540100000000000000000000000000000FF362600003040000014000000000000010011202400 004000000001100000000000000003000000804000404100000000000B0000000000100000400010 010800000000000000000000000000FF4211800080CAA8AA8008AA8AA8AA8AA82080080080000AA0 AA2022320002AA0000002AA0020002000AA2120420002AA2AA0022AA00000022A6000A20022222AA 000000000000000000000000FF99C900000140100120040120140204841100002000000000001041 00000051000800000000000400000014020800805004001500001000800200000040010004000000); SDR 8000 TDI (00000000000000FFE5C7000201801802001000001811801000009800000001000E20400780600600 000680EA0610E010807A1680408203488F88028400000000E0080240000060000000000000000000 00000000FF438E180021851818005058041849801008309890000000900780400400600601000600 600608618C6000E608600278E4064500440000006860051040001860080200000000000000000000 00FF9C920000A0801C00821000001803821029001924000000010600402680600600080600600600 60000061060A4802004002000006000000106200004000806008040000000000000000000000FFC3 CE0020808018008C1000001901801800801900000000000780400600610600000600E00610600402 0016006002006002800086000100026004004000006000000000000000000000000000FFE4080000 C09DDA8008784042181182504301D019040100000600E00611620605008610670608E06000700640 441682D007400404080600506000006500600000000000000000000000000000FF0BB20000138019 22A09804031801821005001001080100004E00F80600640610248600600601600020002610C00705 40460000060900000060A02A6001000100000000000000000000000000FF2DCF004004A01C002518 22401889803000803081080080002E00600780610600380609610600600024702620F20800702400 00040000800240C0426400000000000000000000000000000000FFAA86000021801800A418004018 11843800409100000000101640604600600700200704604600601040000E00604000600442100600 0001404080016000002000000000000000000000000000FF3A570000D1065864000802011823809A EB0032080400000026086207116026154406006A06A26000020816B8C20CA0C00040070401000050 6028306900002100000000000000000000000000FFA1D8000001201A0080A800021801881A00A618 220001000806406006006046806A0608648600E00000688680648403622800082E00000000600002 6000002000000000000000000000000000FFEBEF000040041840A0080242184D8558918022200000 00000600604600600600420712704740600840008E0060A104622822040E000000A0608042700000 6000000000000000000000000000FFDEDD00008000180184A80000180190184500808A000000002E 10640600600600600600610604E00002600630E00820600000002600000000405000C00000600000 0000000000000000000000FF7E180000000000000000000000000000000000000000000000000000 00000000000000000000000000600000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FFFA9E4000010010010410018018018018898210050AA02CF2AE2A62BE22E08E22E3 CF4876AE2AE3A000E1BE0A64AC8096A6026226080001006000006146144000000006000000000000 000000FF53E2000000801820801841811801803C0194021194402062D640E4C708650600200A0961 0201680400000620604600800600E006000040004004806006006000000006000000000000000000 FF6ABC2200000010022638018A189F805801803001000080680700C0060062060020028060120168 00026206206204020006006006000080804000006006006000000006000000000000000000FFF8AB 002201801A038090018A1881B298338CA2090C404CE1524AE0B624612A03014E0D7026026084C485 16526556049546026846100108006005406006004000000006000000000000000000FF2ACA040001 001089003001801801801881801001008000620600640600E4004002060045063064200060460060 04000006006406000000006000006006004000000006000000000000000000FFFFBB000001001000 00100180180180000180100180000000060060060060020060060060000060040000060060040000 06006006000000004004006006004000000006000000000000000000FF0017000001001001001001 80180180040180180100000000070060060070008060060068000068030068068060048000060060 06000000004002006006004000000006000000000000000000FF023B000081081040009001801801 80180180000100800068060460060160020060168060060060140000060060140010460068068001 000160048061060840C8400006000000000000000000FF9D7B00205501109102104192D8458B5A09 9010410001546006004407086480B4600615690700692000684684F30480000E006A168082000260 A8006046044000000026000000000000000000FF7FDB000020849888009800001801801040011810 000002090680400700F0068001070060061060006060061250060041060000040000100060200460 00086000000020000000000000000000FF6CFA0020888B18004218600E1847C61061581840000080 00160042460062060A000601608680608E80040600518E00492600064C0080000160060660800060 08200000000000000000000000FF75E3000002801840201800015841B15009009C48008050090604 400610610640209693600610602080602608C2040041100018040003098340880070400471400000 00000000000000000000FF0188000500841804045800001801801800801A14000000008620400600 600680A00600740600E00400000F0450040452102A810400000000420C0868000068000000000000); SDR 8000 TDI (0000000000FF3AAA0001010219118099018018218A1051821801800004C0360060868060B6526906 01608442602804600640E2862100060061060000001560000160A622600000000600000000000000 0000FFA491000420D00C42CA0C00920800800900C10CA4800050310340204A013803003003943C4A 803101082C9210303210043202342200000100341148300B00A000001102000000000000000000FF 5BD80022092A02102000000424822413402002C800000501808A891803520088100800008C484808 8C0014804800910800000900000000800A00F10020820000000020000000000000000000FF184100 0140900880902900800C00A200908008048001084002203007002052222202142002842000002103 0020020010168060E2000000042000082012602000000002000000000000000000FFE5FD00000000 3008080000500060100000008020000020122000008108812C50C0248A4E248201501270005187A0 4A04E80082000000003984B80081C8050000000000000000000000000000FF7A0F00002004010000 00004000000006000421020000400010000860A000800401000101008000000072888A0010200A00 8C0000000000000000020200088000000000000000000000000000FFD7A500008280984787082982 9801A80009890801800090004C40400600600600608220E05020600000E40620604E000006206406 00000000400000600600600000030E000000000000000000FF78BF000210A2BA8BAA2C29A11B218A 0109A052118000480D2488603632EC2E8CE8C28A6AD0126810890C0E0068AE0A00A6286906000000 D168A08C6D46896000000826000000000000000000FFB6C60020A3881801800801823803800001A9 10A3800100000C25610600610620221620E0002060000460864B620620020E016246000000006210 21600E22600000020E000000000000000000FF1E6900000100100100020180180180000180180180 00000004006006006006000007806000006002000806006004000006006006000000006002006006 004000000006000000000000000000FF68EE004000C01930A31C01801801956245911A1180000402 060060060060460070420D6004006000401006006006800006806806800010006000406006006000 000006000000000000000000FFF999000001801801801001E01801800401901009002020002E0162 4600620600601600600400600000600600620600820700F007000040006000006806004000000006 000000000000000000FF965F000200401200601821809801A01A01C214031400046086C0408E8861 060070A221628600E10080008E2060440000060068060000000060000070A60A6000000006000000); SDR 8000 TDI (00000000FFEEFB400D80418400400412400408400400400400020100100100900100500100108100 14090213000013010191210011151240000000000010880081380000000000000000000000000000 00FFB2204024004C0C40C00C00C40C88C00D00C00C02820100300300300300300B00348B01300B05 3002003403103033411403032002000210003092042002202000000002000000000000000000FF33 A300000400180100180580184180184B81380180000060060560060860C60060260A600608620002 602C20640600002600600600004008600008E426006000000006000000000000000000FFD6E80001 50201201200401401201200308248248000000000080080000480090C004800800800882C0100480 0914800084004800000000800802800800880000000800000000000000000000FF43470000040009 44844800800800800822800904800080200200200280200200280200200200240000200200204200 0852002002000000002300002002052000000002000000000000000000FF30BE0001040AA10C0880 000AA0AA0AA0500C600000000002A82A82A92A82A82302A82A82A82A80000A82A82A82002A830080 02AA0000002A80002AA002300000000002000000000000000000FF6B9B0008202000000000000004 0002C128008000000000000000800900000000800000000000008000000029000002084880000000 0000450000208000400000000000000000000000000000FFE0340000480AA00008A0000AA0AA0AA1 000900D200010002A82A82A82A82A82212A82A82A82A82802A82A82A82482A8A488002A80000002A 80802A8000228000000000000000000000000000FF8B3C00011415434C3542003541543002023243 540000800D50D40D20550D50AA1550D50D50D50A00D50D50840C90508500000928000000880B008C 0800930000000800000000000000000000FFE5B90008004004484404004004004004044004000000 00000100100000100110000100100100100300100100110100080080100000000100140300100100 0000001000000000000000000000FFD4610008A80AA0000880000AA0AA0200000000AA00000002A8 2A8008AA82A8000AA82A82A82A80000A82A800024000020800040800000002000008800002000000 0000000000000000000000FF1CC4000004A00A08A00C00C00A00B00A22B20A008000802802802C22 000802A82002802802802800C02802A93002500042002A22000000902800C02802A1200000080200 0000000000000000FF22350002014002A222400120120120D3092122000000004801000904004000 848000000004004B008000048448C8848904004900000000A10A8084000088000000000000000000); SDR 8000 TDI (000000FFDA19000800081A04901801801801804001204A0180008030000068068060431248060061 06006C0000680200710600080700650E00000024480004605612600000082E000000000000000000 FF3CE2400410155822913955955955948154823955800054A480556556556432484446D5644ED562 84550552557556000557556216000000554304446116556000000306000000000000000000FFCD35 00008802191042B8AB8AB8AB8A98AA13083000002C82B33262AE2AE20E4002AE8CF236AAE0802AE2 AE2A80070002AE2AF02600000010228108F286208000000286000000000000000000FF2890200242 001908841801801801C03800089000000080004B00600680688204C1160078860060000008068060 06000806006026000000006000016226004000000036000000000000000000FFCE1E000046015842 0018AB8AB8AB8800AA80018400002002220162AE2AE1042142AE6262062AE2000AE2AC2A8C560002 AEAAE08600000003A000406006080000000006000000000000000000FFAFCA0000100C19408A5801 801801A4200000200000001401028C60060064401050069060068068000000040062CE0000060062 46000000206D0003603602400000002E000000000000000000FF364A000140015808010001801801 811801951053000001201640E00600608E0540060160AE00608020000000000600000600600E0000 00080000286486410000000286000000000000000000FFC20B00000002180080A003883801809820 023889000000A02E2365060A61060140062464860460801062403263062002060070264080400040 0100700608C000001206080000000000000000FF0E7000098000D89886080381194180800E03B841 080020612E2062460262D21047A61860665066400000200060061001861060060080000060003064 06006090040006000000000000000000FF9568000000011901880841821801822008081801954050 600608600E40620240604601600600E00000E00000600600000600600600000000628024E1460060 A0000006000000000000000000FFC82F0008000240001140200CA14002002000012800A001008012 E0D60800500880000202004D004008E4002A02800802000800002000200003001100A00880300002 00000000000000000000FF36B7002002140000000000000100000113003003000000000000600608 014C0002080C42040840800061542003104100A00080000000100800000C04802000000000000000 00000000000000FFB61C000000000821800808820820804820908800840010200202200240200240 402641A10200A10002200608200640020A0828420002200020010434020020000410021000000000); SDR 8000 TDI (0000FF2FDA000800000805044801801800005900111A03800010410000600600622E436006002002 00600040602E44480000200600640600000014400008E12610E000000446000000000000000000FF FED7000000201131800801A01800040A320238018000034008006001006006904806004007006004 00080610E000001006006116000000208004026216A22000000096000000000000000000FF6AF400 00000AB1010888AB8AB8AA0888410018ED80002042202AE2AE2AE1860042AE2AC2AE2AE0000AE2D6 4042A80002AE2AE026000000110000746006002000000006000000000000000000FFB71600080000 003103280180180180082115180380001120100060000060862240060260060260060000360A4002 0000060060060000000820064A6506022000000546000000000000000000FFCAA80000000AB0490A 88AB8AB8AB8A088915188980002A82A02AE2AE2AE24628C2AE2AE2AE2AE0002AE2060B42AA0002AE 2AE20E00000042200000E52E48200000054E000000000000000000FFAEA500000015408510095595 5955908912003841800044454055655055640611455628E5563160041505064145500005565564B6 00000044A004016056492000000016000000000000000000FF4EF680000000100500480180180181 2805805001800000401000600600600E044006006006006000006086004000000006006146000000 002002006006032000000006000000000000000000FFEC430000000AB8000818AB8AB8AB8C580000 011B800022A2222AE2AE2AE2D60042AE2862AE2240024AE2060802AE0002AE2AE02600000020A002 006006282000000006000000000000000000FFBF9D00000000189400180180180180183382208180 0010200A0040040060062D4006006006106004200016000006000006006116000000082004226216 02A000000096000000000000000000FF280300000000182002B80180180184D90191002180000020 8200600600602E00400602E0060160020060A025000600000600640600000002200008E126002000 000446000000000000000000FF0909000050001C4022180180180180B800C9340180000220128040 0400608E835246806026806A04000000000006000006006A46000000002B04436A2E002000001356 000000000000000000FF7A4C00008400190A003801801801840000041001800010A5200060060060 46104106004086006000406006000806000006806096000000000000886106002000000006000000 000000000000FF6A620001000AB8000898AB8AB8AB8800AB8010AB8001A028002AEAAFAAF2062050 0E2AEA0E2AF0840A9AAF2A82AE801AAE2AE1060000002A90041060062AA000000006000000000000); SDR 8000 TDI (00FF73EA1000000080000A000000040202042000002000000CC0000000000010000000040A510080 0100001000000080200000800000000000400000520500408000000540000000000000000000FF35 6E0000000008B08A18AA8AA8848AAA40820808800040200028C28A2AEAAA0422AA2432AA22A0000A A2AE21200200E2AE2AE022000000312000142002242000000002000000000000000000FF44450000 00130001008000000000001033905085000050000002600600000640000001400600040000600000 C414540000000110000000100300420210028000000090000000000000000000FF9D0D8000000020 0A00200000003200010001002000000280000060260000000C80000C00000800802060001400C000 0000000400000000050000088120080000000440000000000000000000FF5AAC0000000019459058 0980180808DD01005821804008208044021000724600600E0091024041200A648640E00E00610600 600620000000600000600600E080000006000000000000000000FFDD050000000018118008A582D8 000408489298010C8021201008810604609610E10602004210420000000E00600410200600601600 040040604052E3464C6210000006400000000000000000FF80340000000018018700218238018018 00001811088020240808608600600608E0C658C0220F420008600E04600600200601600600000000 400222E006004000000006000000000000000000FFB1AF04004000102300818D8018098AA8898038 2100004022C04262081260C604446600408650C00200000601410448000604600600005000002200 6036200008000006000000000000000000FF282E8000000009119042058118000008211318080220 08A000210006006C560068162408034060C004048623600A00308701600E4002004060000863060C C480000006400000000000000000FF8D3A800000281001800009A0D852000A419018880080100400 040430C0600600408E0C8056006050486316C4641201000600600600000000A00001600600000002 0006000000000000000000FFFEC58400A0100811000011805E498408000010880040084000047840 20700780608780210A00610824190F20400200300600600600000000600000601600400000000600 0000000000000000FF6E79800880407009020101C61A81820A029012000120405040006197007187 0048172432C69662C002740604490101108600600600000066200006600680000004000600000000 0000000000FF2A6E000000400801820C05C11A82001C230018018000006C00206201106826027226 C8BA0320620408000600E410A0210702600600002800C00401600600600000000600000000000000); SDR 8000 TDI (FF066F00000000004120020008020020028D000000000002050D040101200104000C080000000010 00000000005000004800000000000100800000000100040004000000080000000000000000FFBCDA 00031080280085E87C886800800840806800800011A00280A0030020621020020020020020000020 02002003002002000002002082102000C02002002C02020000080000000000000000FFEE2D000001 82100D801801C01801801801005E898080206016804006206026007027406007106000006406546C 06504114010006416106006000006806006946000000000000000000000000FFE1F9000018011421 0210452040400001AB00020000000A028C024000205085D0021C8000000040000008000040040040 04000000000000000000800080020400000000000000000000000000FFAE37000410A00C04800800 800800800800A0488081000020100020030000002020024020030820000022024A32022820820080 0240A082002000002002002126000000000000000000000000FFE19E000000200000200020000000 0002802000000000000000000000C000000000400000000000000008000008000000080000000000 00000000000800000000000000000000000000000000FF0702000100028408200006002020000200 0000081000200000C001000008201808080000000010000000000000000000000000000010001000 00400800000F00000000000000000000000000FF4C27100000040000000000000008412500000200 00000200000204408010000000011110280004800000010010800C08000004000000001282001081 20010000000440000000000000000000FF12710080001002000C4200200020080032000004000008 00000000000000000008000204000000004000000000104100000001100000002000002202103200 00000090000000000000000000FF32EC81000000A8AA8188AA8AA8D2D20800EAA8A8800020A00028 A08A2A82AA2AB2AB2030822AA0000ABAAA2AA2220022ABAAA0220000000020800020020420000000 02000000000000000000FFE0BC80080020010404920120144000040444828C000005400000404080 50004010048048011080024010045410204548050041400000000004020000400000000000000000 00000000000000FFC16B800000123D55803555D5590180BD13B55F13800040400055455755755655 6D5640C456556400356557557C5614D5565564B60000001564800160360860000000160000000000 00000000FF54E00000002D4840882CAAAAA8888AA88888484080000820002AA48AAAA2AA10A2AAA8 A2AA2222800AA2AA00248A082AAA2AA20A00000022208020A50A28A00000054A0000000000000000); SDR 8000 TDI (C0A8000100100008A358018000018000008008C5802000E006046006806006007286884006006004 006006016C0600200200000702600E102084007002007000000000000000000000000000FF3E5B00 0200802809801801800001000088814021800000612781640033600602622E806002007004200026 0060060028C2000086006006000004006006006408040000000000000000000000FF189C00020105 8000015A238028919248010093A0800049E01600E04602E7D6024806104207206000016007006006 0272A6000600F54086016100012400000006400000000000000000000000FFFCD700000000060000 1823882900820805601800800188780640780000780621500602DC06407002000006006206046406 00000100788480400A022010010006000040000000000000000000FFE9E6000001842801409C0180 18099019010054008000006046000221206036A0C0560AE003006000416047807206000004000102 114807006100042004008004420000000000000000000000FF4B0940014082080100980190580085 5841001900800004600600000E0061060100070160220060084400060270070A0004000302006006 52C00015202440A004000020000000000000000000FFA48D000001000218A0580112100180501582 180AA000C04116C060001262060264860040060260000000272870070040000000280440068160B0 21241000241C020040000000000000000000FFBDA920000980A8018078210010A180101980981180 0080408E0060960060068068068A604A28608000604640600611C000000052806006804000002804 092804000000000000000000000000FFF1A000004984CA11C118210A5101809001051004A0000460 168000860064060461060C6016486108420006046006000000000286006806236080012046486006 040040000000000000000000FF95F100010180180180180100102102304100090180000061060000 0002610601600600E002046000006006086006040000000006006006100020546006006016000000 000000000000000000FF41F300000000000000000000000000000000000000000000000060060000 00000000000000000000006000000000000000000000000000000000000000000000000000000000 000000000000FFF95700000000040040040000100000100000040100000000000060060000000008 00004004000000006000000001004004000004000001000000004800005000000000000000000000 000000FF7299000000803800000800000A00A00A00800800900000200220C0020060020020060020 02006000002002002006002806000002002802002000002002002080040000000000000000000000); SDR 8000 TDI (EE000001000801A01AED0018141818819060018000606106006006806A0600080684220200300698 6807002006006006000800006006006006806006006106006006000000000000000000FF1D2A0080 018410818019010008012452A080080380000AE0463360804A602688828E10630610642040848600 6006145486408000016006007000006806007006006006000000000000000000FF123C0400018810 01801809000801011804810111804000601600601601640E40004641604204600404600648600600 4006000480006006006004006006006006006006000000000000000000FF6E0B0000010000018018 01800800000000800801000000600600600000600600200600600200000000000600000600400600 0000006006006000006006006006006006000000000000000000FF79670000018010018018018008 00000800800001000080600600600600700680000600600200080400600680000600400600000000 6006806004006006007006006006000000000000000000FF25E9200001200009821A8B040A000012 00811801880000601600640015610650220600E10210600400080600604600400600000000680600 600400680E0160C6006046000000000000000000FF8373280005A05083811A0100AA10091A108411 25800012600701604600600200814E10600300681404E12488710E10400601000040633634614440 6446506016046016000000000000000000FF004D00000100220090788B8000098040019058008000 60600E40600608601600602600400600610000700400708608600600800600500C20600000320226 6086400000000000000000000000FF1B5208000000005288980186C00108E0558010828040836107 80600000E807A0E50601408781608C0200870070660070060000060442240961A414200208606E00 0028000000000000000000FF5B520000050001108218018020008000118B28209000107006416246 047116107C9609500610600401602608601600400000000740410602200540203201700422000000 0000000000000000FF439E0001000802009358018000040000018010808000106806006020406007 00600614410600700004000628F00E00550002000600400600020040200204600400000000000000 0000000000FF9D71002221000000A01801825003805000A098008200086106006027A06006006006 03500608EC0002600648600600228600000600400400620034600200600200000000000000000000 0000FF80A5002221818841B018018190011991D4A098228200006006826018006806606006006162 88620000000680625600200604000680400F09400081E006047842000000000000000000000000FF); SDR 8000 TDI (0202143442804104482002042022002402C20000828100B08980189090838AD4800800C04C008C08 08000C00800804000800A40D40800800820818888C00208000000000000000000000FFAF7F0000C2 8308010088008108608B09A8802900800000300600400200600210300250220200201001A0A20868 A65028020000001AA00212A00010A0A2022002022202000000000000000000FF01EE000020000048 020100025003140003029018000050108800601F00030868402828413422438010634100C1482080 080000000140A8000210280540100228500080000000000000000000FF6DEB000100080120440000 14811000000010000000000008000160270004200009000280C0190008006010510A100408E00000 000000000100A8000000000000000020000000000000000000FFD7CD000009809801A85814883881 009015810021800028423600000022600600640601200E0000000064022000060A60060003804060 1628600000620660618608600E000000000000000000FFED170202D5A41D09921A00334B05289A48 A083438000AAC4B68008A6AAEC26CA60969328B6880A808888AEC004C68460C6000280A0692EC8E8 4084ED0EA46A16AA680E000000000000000000FF0778000001891821C11808801841443885844009 800000400741601600609601524620220224000900640609000E28E0160010000AA0060274885070 4608F94600E326000000000000000000FFFF34000001801001A01801000801001A00800801800000 40070060000060060048060068038000000000078008060058060000000020060060000060060060 06006006000000000000000000FFC7A1050001140901409806A20815818A6090088100002B601664 080602600488340665204638480004002600500600E0060000000020060068008060062061060060 06000000000000000000FFDC48000601801601001E00800801801810811821820000E40F00100040 600700A12E8068860052200260060044062044060000000000D68072A90060060060860060060000 00000000000000FFE0B2000001000801001A00810900800B0080080B01200060A60562B0016ACE80 220604225200E8900000068260A60060B600000004800600600000600602E00E0061060000000000 00000000FF454700000180100101180420080083380280918F80201A64A608E08E2AE46E3884AF88 608202626020F2C62860064A52862082800080068064010060064069160061060000000000000000 00FF69BA0000010008018018010319000011318100518540256157456550C5611600815644255651 23140400060425460165560000000561560060AC00600602E006006006000000000000000000FF91); SDR 8000 TDI (000184180004380181180184185580180190000000064040060060060C6006016046496000206026 026006106226000416486026006000006016006006006006000000000000000000FF07E800045120 422020000021228420C20031024A0000800800844A20804804004800800D00804800800800804804 9041040000C0800800C10A10D00950890800800800000000000000000000FFE84400010094091000 080080083084082484480080000000020020020000004B000200202200200040200200200202204A 00001200200202200003220202210A002002000000000000000000FF34010000460180020AA2AA0A 000409008C00008000002A92A82C84892A82A89102A82A84082A86180A82A82A82A8248A40000210 2A82AA082400002002202222002002000000000000000000FF8DB000082C00802000002000213000 400008A0000000000000000001001000090000220000000202200489000000000828000328310220 0402220000482A00A0000000000000000000000000FF37030000880000CC0AA4AA0820900A008810 002A00002A82A82880A82A82A92002A82A81402A80002A82A82A82A8280A800003202A82A8210008 0104A02C82A0000000000000000000000000FF6CAC0003002A411235431035020431032822035400 00550D50D30D30550551440D50810D50D50820950840550D51510480000800840908C08800D50C80 810C10800800000000000000000000FF2715000C004C240040000042844040244045248000010000 010010000018008410010010110010010010010010010088100000010010010A1001341009001011 001000000000000000000000FF17890008200000880AA08C0880A00CA0AC0200AA00002002A82880 882A82A82282A81002A82A82000A8000AA82A82402000000000080281080002A8200000200000000 000000000000000000FF8DC0000400A00800A00A00A00A08A20A00A00A008000002802822C028000 02002802A9280300280080280A003002802042000850A02802842800802812842882802802000000 000000000000FF9C7300031234A44500104222220420020231420000009308048048208040009000 04840801004840C00B408050048C888C000A80940C80B00A208008C0A90830000000000000000000 000000FF535500014994192182190D841901841905801909800020610608C00E00650650681650E0 060940000062D60144162460060000002160561060080060B6006106286006000000000000000000 FF9021000402C14C00A14E40C92C32C90C10D48C40800110201300308208380B00A52300314B2035 091530034821430820220001010A330300B001083403483203003002000000000000000000FF4CF6); SDR 8000 TDI (8D0910880AB0A18AB8AB8108AA80003280002292AE2AE28E2AF09720E2AE2AF2A92B60422AE2A430 F2AF4A72AE0000042082270260020260070A702702EA06000000000000000000FFF20F4002010050 0000088982480B808810AAA800800000100480600000714600600640600100600000010612600700 70060000061440060060000CE22614EACE00E00E000000000000000000FF375B0000430408C80AB0 118AB8880C4AAB95510180002A0AAE2880A82AE40E1262AA2AE2A8A060200AE0042462AE80EAAE00 00040E0006006040106006016086786006000000000000000000FF8F4F200011128A000008218008 4002C8018018018000010006040006006B2609700200600010680000004685600610600600000601 400E2468002460B61462160460AE000000000000000000FF96F30000C18050420011120018038008 0113414B000000000600640000600620600400200004E00020030C08600624600600000420052610 E04008E20640E046016406000000000000000000FF0DCD00000180184000190A0918A180D8210A08 8500002000260060064260260061044A200000E30015622608E30600603640000600501751600103 72070070074070AE000000000000000000FF10AC0008019069000318480018A81889350388030140 20040614008622E60619E07420244000622800801600E02601600E20000675600620607860618640 664E006006180000000000000000FF8CD800000982080A04180000100A001801004049080000000C 40812800E00E00640400210802602800600600604E00600600000600650600648008602E02608E08 E006010000000000000000FF864500080004002A0100C4108004002014100108088000041045604E 0000300000900004500200000A60100000100100200000000002900905001100304200402100A800 0000000000000000FF8ACD00C00002000002000413002002314D0110010800000000156046080200 02008014002410002040604014820800002000021020028003000010002000010020000000000000 0000000000FFC8A20000101009000028008008008809008048408060000042100002006006206402 14A1022121000024421025860860060000021DB02300200906360B00332310B00201000000000000 0000FF1643400C014004004004000000080004004600000000001001354001201001081018001201 00D0000B8081005001001200000000000008001020000000200000400000000000000000000000FF 6F87402400C00C00400C048C0848904D00C108008040001003002023503403403082143403003040 122083113513003002000002012512053050142422402522012002000000000000000000FF1E7501); SDR 8000 TDI (8900019818898008800200C797408180000062AE28E08E2AE2AE2AE2022202A82AE0000AE2262AE2 AA2A82AE0002A841A506346000106506206006506546000000000000000000FF4D8D0008208C2001 0818058008018018008AA80000000063060062000060040060120060000000002000060000040060 060002880822860A60004C62860064062862A6000000000000000000FF9BD90000AA8A20018038A9 8AC88188988880088B00000062AE2AE0AE2AE2AC2AE2A222E2A82A82800AE32E2A82AC2AE2AE0002 A80C202E40E28844E02E02E42E02E00E000000000000000000FF9B6A00011281000105593192A953 95591580095580000060365561305565545564C25325505565441504365565565565560000404520 564165240160562D6056056016000000000000000000FF752C80000080000183180580084D845801 80084180000020060062060060040060121000000060084060040060060060060000000020060060 00006006506086006006000000000000000000FFEAD400008980100000108B8018818AA8C8020088 000000020428E0AE2AE2AE2AE2262062A82AE0000AE1002AE2AE2AE2AE0002042020060260000060 06206106006006000000000000000000FFF6A80000038B100000002190D043800820001844000000 004602600000600600609602600000600420002800600600600600000400A0560160244362960560 460D60A6000000000000000000FF63890000418050000D5001840811800804114000000000008E00 62060060060060060940000062C00065000060060060060000CC1423063062800860260862962064 0E000000000000000000FF60AC000001C492000000C188402984488C134800000000000604600100 6806807006154D080570100000008168060060060000040C208E00700003622E2962963168960000 00000000000000FFC2E700000190000000100583180208884100080100000008060064460062D611 6006406040806000406334046006806806000004012C06C8E0084861068068468464060000000000 00000000FF59940006AB8428AA0AB0099010800008010008AB00002A82AFA8E0882AE0062272AE10 60003870000A80042862AE2AE2AE0000042020261770108068060260060060260000000000000000 00FF8AC3000A01A04404000805801800101800001000000010000480604680602604680600600000 68000060170060060160060000061070963168012175364062960060CE000000000000000000FF4C 49000155910D541548258091400C3D4240095400005505565565305564164D655605635044E01455 04574165565565560000064164B6406004406116207006526526000000000000000000FF26570000); SDR 8000 TDI (110002000400102200204C0000420000004000026006000000000004024D360040C0006020004014 5040000000000080500100004302D00500400D00A0000000000000000000FFB24880004008403400 C04000001000800004400000000000000060260000900000004900000880004062800A00A0050000 000000040300100120000000080290200408000000000000000000FFA1D200000180080195080902 584010810180A88D020000600600010824620610600620284011008808E00611001000600E080000 51600600E00010600600600E146026000000000000000000FF6DC80000018000AB80080501080002 400188182111204462D633044600602620604A10A108000000400036400400016006000000046416 54610041610E3564C6016406400000000000000000FF1C1E00000580002180010900180180380100 0821808022602E00602601613620640E08808808840008E02E28834C14210604000000426E20E450 04604628E08E40E006000000000000000000FF86EE0000408000058200010108018898C100A8898A 2000600641640056630600603241003011000800000600040400000600000020001600600044E086 026006026206200000000000000000FF92C380000300010B291883C52C2004000028080580000062 8632848E2161121062062030010044802000070050A012E90E12000014C00612635032602E006446 306026000000000000000000FF79808080010C00A9809901800814014511014901840001682E0400 0000600EC1688314200200428044602610401000E006000000900086006000006016006006026006 000000000000000000FFCE2780804012008B005881C08C0180182001280182000064460460018160 4620F086021001006000000046086016006006000000404016006000426006046006006006000000 000000000000FFF58C800800000041C2380BC20821A81811020D018000016A1600640714E8260076 2340088106600018600686680701680600100021810660618100E1E7026006006006000000000000 000000FF15C300000180000145180B821834094481C20000000000700640E00020610F00602F10A1 0808A504440007003202003006000001106006006004816016806006046006000000000000000000 FF4A5B00080080000104B843915830114009914422000000680602602600680600614710A0000022 882060870028020008060000000C630610629010612608629620640E000000000000000000FF36C9 00000184C001A01801C40802400041800011800000600600620080600600680A0008008060000000 160060028020060010002020560360004362160560460D60A6000000000000000000FFBB8F0000AA); SDR 8000 TDI (01841801C0182580D801801801840000001640404604604640400600ED5654410004655600454605 510600004600610700615044600F406006006046000000000000000000FFE4940100110A80056040 4000100110A0012C200000000082AC08400080109003C80010000000400000080800480000400400 0800000000800000004504824008001800000000000000000000FF03BB000400904880820A008008 04804800800A00820000000120202204282240200280224A34208004254A0024C204A10200004200 20820020A9242082002002002022000000000000000000FF0F0C00020A0000000000000000202000 00200000000000180880000000000000000080808000000000000180000000000000000000000000 0000800210000000000000000000000000000000FF423C0080000200020020202000102880000200 00000000000004000000004800801008040000000100000000000000080000000010000100000041 0001200000000000500000000000000000FF5A030001304000000040000840300001140400040001 0088000204210004010014300B000109000020000103001085000000000014830010010008000008 0290200408000000000000000000FFCB9900000400000004000024000204202009408800004A0000 0000000000300001000000000000800000000011401010000000002000500300004302D00500400D 00A0000000000000000000FF64FC888000CAA8AA88C8AA80888089880080082080000022A828A4CB 2A80822A9003A03AAB2222080AA2AA2832032432AA00000000200220261800200220210200200200 0000000000000000FFC87E8008050491000440010000044204124214000000000004004041004900 8040002208B504450000008084D00502080400000000000000010000000050008000000000000000 0000000000FFFB2B80014B955155911955D4190B9419038D58298001487556554116D56057556356 516556CAC28055655742C4145065560000001560560160800160562D605605601600000000000000 0000FF94E900008890280A89088A8AA89088C8A088A88080002AA2AA2AA08A2AB22B2AA2AA08AA02 2920202AA212A8228B0822AA00000024A02A40A44044A02A02A42A02A00A000000000000000000FF C73E1080000000000200000140202042302012820000030004004000000280000000020000000010 0000000810A00088040000002002804A00004C02800004002802A0000000000000000000FF255900 00CB0098408808C80AA8C08A08808880DC80002AA2AA28868A2AE2222AE2AA0020042262020AA04A 20E2464122AA000000382502362202182502202002502542000000000000000000FF0B0C00000002); SDR 8000 TDI (C03821C35865820001C6980784410100060060071441000A21871170360160008060060068072060 0640814600670016812101E02661000003489E800000000000000000FF6478000101800005883A00 841801850001809411E00050040600600000780000A04E20600600608008800E0470860060060080 05806001805800006046006280044047200000000000000000FF7873000681C51A05900801803801 800001801A01800120800600000008448301280EC0FC0600C08010E00F0000871000064003063260 2880000000620E082010C06424200000000000000000FF014300003184290180092CA01805814009 A8909380004000060000060060020824261460861240008001460201060100260010060061242040 0100610E834002016024000000000000000000FFC7F4000081881021809001811825A11001303C10 0C40100E9E0360000442000030C2303014A000002808000C402402400E0000CE08E1041881A018E1 26A1250A01620EA00000000000000000FFD9AA080401801C09811001A09801A01081211825000000 082604600600680A86200E0022040000000060021042042042C6000806806A040240000669160062 02206006800000000000000000FF74C30800018458498010D5801841805401005921880040013600 0006006006102416C423050C000040104600008440848600000610630710E0411060074164168164 16000000000000000000FF20F20000B1881881801001009805811911101009800000020600000000 620E0060C608200420000010610604022402000E00008E01002642610000E0460260062060462000 00000000000000FF41F3000000000000000000000000000000000000000000000000600600000000 00000000000000000060000000000000000000000000000000000000000000000000000000000000 00000000FF9F9A000000000000001000000000001000200201000000000000600600000400080000 00008040000060040048000048000000000000008000010000010000040000000000000000000000 00FF1F26000000000800800800800808800801000800800000020222810200280200600200300200 2000802002006002002002000002002002002000202002000002002002000000000000000000FFD7 190000010B0000000000000000012600104000000001115400400000088005080800020000400000 0010000800004804000000000000000100000000020000200000280000000000000000FF3AE60000 00800800800A00800800800800C00E00800018100230A08280264200280200200300200000280200 280200200200080210200200208101200200201221A062000000000000000000FF91F30000039259); SDR 8000 TDI (1000801801800801801801800000600620600600640000400642600E006000406010006000006006 000006006006006000286206006006006006000000000000000000FF118800000180100100100080 18018008018018018000006006006000006000004006006006006004000000006000006006000006 006006006004006006006006006006000000000000000000FFB633000001801001001000A0180180 08018000018000006007006006006000004806006006006000006000006801006006001007006007 006000007006006006006006000000000000000000FF71E1000001801041033088901801808841A0 1001810000600E006800006200014007206006006004000001006000006806000046016006086004 0B600680612E006046080000000000000000FFF006000005845003001020A238518C0E0182385580 0005714600680700F0800440260A610F03602040E000206000306006200896346546C16209006146 106006506106000000000000000000FFF3C1000003801011980005803805821805E0080180000084 0780600610C00610000622600770600020601600600700600600040C006002002000006436C9802E 006006000000000000000000FFC89400404180002D90800300182980194382340980400608D64061 00885C064A2C0680608600E00400014E806917446006200084A302A24022048A6986402006106106 080000000000000000FFB501000001A450058440D092180389184180184580800002560060060045 0600A02610601794002000E00620400648400600022611600249201001720E403106506127800000 000000000000FFD6E30000038C0041800010401841809801C012A580000010070860000049160920 2540688640000420000700400708C01600000604003600202500620E112206826026000000000000 000000FF86BD000001205001880011A01E218858418018018000000806006086004407B022268048 060060000060C081208E34A00E0000042060420020408060060000068C6046000000000000000000 FFA57D00400501B8018000010618078E381986904980400400060060000841060021864040060060 0440001A00A00600308600002621060246200C6A680780298601E106080000000000000000FF1FC5 000021140043801001C01801809D0180990B800000002E50600610700F80A0060041064020000060 008020060021060000270470120060080A7516C8E206006006080000000000000000FF5CCC000011 010801A01241001801801801881401800000180F8160008064060C20068042460020040000020020 063020060004062A002E00E024906516106016206A86000000000000000000FFE4BA000409A41001); SDR 8000 TDI (0135008800100001004000000252000061960200000A42404006201200C000E3E014040C50400000 00085C0008030000000128028688758000000000000000000000FF0C190004000080000140040001 00110008082084000020080809600E090408201010088080250000006000C00000080C6000000000 81002000400002C0000000000020000000000000000000FFC1150002038008818418418098418A18 031448280000046036000000A0618404ED0611600608400000600620600200600600029600648600 600000600608602602644E000000000000000000FF6213080005B00A41C95B00C01C01ACAA132B3A 820000D2615680088E336D20C364470B7206C2489088080A426C00A46036000C8EC96C0E8CE810D2 68A68C6B2683680E000000000000000000FF3543000001832A938018018919138019010018300000 016206D160068060081060160060D688400000E34208E05009210600000602614620600080EA1700 E0164862A6000000000000000000FFA7A1000201800001001000801801800801001C000000006006 00600080600080400600680600400000000000600000180600000600600600600000600600600600 6006000000000000000000FF6D23010401951801800800811801820C41C118018001406056400006 0A66180960071471060060000000130060008020060000060060060060004064060062060AE08600 0000000000000000FF8F4B000001801001600E00801801800C01881D01880000654620004000E080 81630600604600601000628200600100200780180780602600650028620628601600600600000000 0000000000FFA700000001801C01840000801805804905805803820180E016806300806042044007 82610700654082000100694000010600080600608680604183700600608600604641000000000000 0000FFB460400001801001440000801C01800801A01C0182000170068A60260060921041AE246206 0060182A608100E001000006000087026106006100407406106516156106000000000000000000FF 1512000001801801801801801803825B059041059400006557406540156B40856C06006146006324 0205020061400061060000060060460064450D6006406006006826208000000000000000FF83C42A 0001801801A0100181180180180980080180010060060062060060108B400610610E626000006000 006000006006000006806006006000086006806006006806000000000000000000FF1FF20880018A 9001001800801C01800C31809A01820040502E1462408071001468CE80640604600C8A0083016801 006006000906026006806004007006006006006006000000000000000000FFC89904000180100100); SDR 8000 TDI (800800842800892820800000000200224200204210A0521020020C20000021220020028220020000 02202082102280002002422002002002000000000000000000FF909D0004AA0000AA0940484AA4AA 0880AA10000000010002A82880882A82000000012202A82004000A82412402A8240AA80002AA0021 4A0424002A82AA0922C22AA2AA000000000000000000FF2C2F000C000100000420282002000A8002 00000400010010000200000000001282280010890D02020000208C00010000000002304000800203 020000004A0200000000000000000000000000FF183F0000AA1022AA0A00920AA0AA0A80AA008004 0000000AA82A80882A82881302C02302A82480804A82083082A9288AA80002A84A02102081002A82 A80402002A82A8000000000000000000FF6B9300013430235431030015415420231034C320000000 0550D10930C40950A00900CD0440400900D50C90410D48550D50000880928C30C88800D50D508108 20D30D30000000000000000000FF03E40008004500004004002002004044004244C8000000080100 12410010414010101010010810010011000010000000000010010090011010010010015011090010 00000000000000000000FFF232000A882400AA08A0040AA0AA0A00C800009000000002A82884A811 0400080000220A202080020A80002002202002A80000280002202880022A82A80201102002000000 00000000000000FFF160000004840A00A40A0C800800A0AA00A28A208000802000802802C02802C0 AA2280200A842800C029228B2802812802000802A52802802A80802802802A428228020000000000 00000000FF8BA700002130C0002012C02014012002432822130000000804824A00934B2C82091491 4904900C80800A0C80488C920804000D00900890840800804800D109089109500000000000000000 00FF278B000005901805925015951901901801805801000000600608C00E1164C401611628640E08 E00000602410600C04E4060000065461061060004164060062064C6016000000000000000000FFBF 23040300C00F40C08D40C00C50C48D00D48C52800114211300310200300B04244303300304302110 3112443503302142001493003403013041043133113083013442000000000000000000FF7BD80805 0022242028229000021224A3802202030000088184B08800800A6081080486481C80080098081088 0A00879184000D00A20A00900808A90C00910900880A80000000000000000000FFEE400400058008 00901800880800800801008810800010300200400310E01600202A00200200200800200E82E13620 280A00000200202208A00046A012002002002012000000000000000000FFA97200000018014F0081); SDR 8000 TDI (A8AB8AA88CA018ED80001C62AEA880882AE28421CAACAA82AEA361004AA066AAE01600E2AC000006 0860060062002AE00E01E646006506000000000000000000FF2AAC40000182190512180080080180 0800011C01800000600604000600600400400600000610EC0000400600610E80680600004E00E0AE 0A6800006046206006306006000000000000000000FFFBED0000018058318138010010018010238A 5005800022E0060062200040520C20040040060060802002940064242A600400048622620640E100 0065060C613602E336000000000000000000FFE30E0000018058018448210A10018A300001100980 0000E4060060061460AA01203600C05604620010620604E0060B601610100708708700E308227407 40704F007006200080000000000000FF8EA30008018019018298250B01A180301406918F854000E3 1601014602628206240E00010600610008404662600600600600000649648654E0000360660064A6 44630E0A0000000000000000FF697200000180180991100100004180902000004180001060260A04 0800C20200210654000608601200210610632600600600000600604600604210408610610608624E 0A0000000000000000FF761A000800004080084002008000008048000040054008013014E1560900 500082000A01200205080065400805400280080800002102205404A8510300000008500120000000 000000000000FF7F2700814000800004000111000001100314000001000000284561060000400200 002040C0100240056000080100100000008000000080000000800A00800020200000000000000000 000000FFF5F0002000801038808800800020940804808000800000200600040200200A0023424120 1610600000200A01200210600200100320300300200002300350B483043002400100000000000000 FF6323400D0148040040040040240000040040140000010050014540090010110010010850012014 00381011205001001000000000000208001008080408280000000000000000000000000000FFB7DA 400440C88C50C10C00D10C00810C00D40C00810100300B00210B0030430230030830435030004030 03503003003002010002002202003011043003512142402002000000000000000000FF3F32014001 801801841801805841801805811801800000604600400600600600620620410600602002E0060060 8608600600000620610E00600010600E006006006006000000000000000000FF65C30000012D1200 2404022012012002002213120000804804844800800908A40A8081480480CC80A008088B480008C0 00000800950C40C30800800800810848800800000000000000000000FF9A6C00020080480080A920); SDR 8000 TDI (AB88A8440100A380002AE2AE2AE4AE2AE2362222AA2862AE2AC0002AC2AE2AE2A82AE2AE0000AE42 E12E20E0002AC22600612E40E12E000000000000000000FF308B00015591200D90C9319139559530 8095108D800055655655653040E4465521025465565540045500965562805565160003560D605641 600444E42E286056056056000000000000000000FFFD8B8000018010018008518138018419008418 01800000600600600600610610000200600600400000400400600000600600040610600600600000 601652E206006006000000000000000000FFAF660000AB8C98018098AC0C98AB88802188B8890000 2AE2AE28E0AE04422E2260242062AE2AE0020AE0242AE0BC2AE04400000600600602600200E02627 6686086086000000000000000000FFC09900000180390D0050000038018401008418258000006006 02640048E00600650C00600600600400009400640400651400011610604601600404648610605605 6046000000000000000000FFC10500000182182192180202180180400A8018018000006006006006 02608610E00412C00600600020620400600400604400022624E28E28600048400E00E00620620E00 0000000000000000FF607000000182380104300A0018018C2000911C218000006006046040804146 0060040040060068840008440068048A6804000A8628E2D6236B0400432E326906ACEA8E00000000 0000000000FF82D7000001801001A00A200008018082008038058000006006806006006C0E806004 80200680640000630C80600400600400000600600690600000600600642600600600000000000000 0000FF7B764006ABA890AB8880900AA8AB8100AA821C898001AAEAAE28E2882AE0062AF2AC2AAAAE 2AF0042A81062AE2AE20E2AC00042E9268060070042AEC0680E04E006026000000000000000000FF 3D8F000A01A81041349A01000801801001051A0180008070070060460070D6446006002007006800 00710400710410600600040E0CE156356900004206D06006216006000000000000000000FF252A00 0155913155113005154955943154A2D9518000557557556150556446556556D52557556404150426 D56556CC6D560000862160C614E484554156346506136336000000000000000000FFE8B80000AB82 38838018AB8AB8AB8ABAA8103888800020E2AE2AE28EAAE2048842ACAAF2AE2A62000AE20CAAE224 A56AAC0008A7206A070064002AF1360269168A6836000000000000000000FF68CF00020184180102 08A1801801801800081803800080680600620000610C00400600780600608020000C006004016006 00004E02640E20600000600601600E206006000000000000000000FFEBAD0000AB8998118058AA8A); SDR 8000 TDI (849300050949040008E00602000000600610E28A10602610640800C54603602E00600E0A00060060 06006000044056006006006206200000000000000000FFBD21000011901805800931845821801824 104003084004640E0881264260CE20204240E21200600000400E0060064160060000060060064165 200060064C628620E026048000000000000000FF23300000018A1803911881811801801822803003 01200263064864A602242624A0A600600C04604000400E00650600614640000640614620E0805121 0608621606E206000000000000000000FFF1A20400418010418028298418478018008810090A0008 E10602600020020E06220220666412402010400610640000E02610000600604600622033A1162260 0E006026008000000000000000FFF37A8004118008018A880104BC218509000280C1808100610E40 820600208708300A10E80610621000C5268562B74069163400062060A600600010212E0061064060 06440000000000000000FFDE1A800001801A01828C0B201801C2980A002801800000700654822090 04A600A00200600240400041400640684200600600005601600600600880204600608E0060060000 00000000000000FF0000844421800021900813001845840800084001900000600654604008208702 200380610420600000404700740400700608040610E00600601021210E0060860060060000000000 00000000FFEBFB8028039A3483A80801201C01A038140A0201882000716600658600080601201A6F E09C81C0000150274061D90068262082460860CE006020A028460670160660060000000000000000 00FFD055000003822C83829C01C21E01C0B001021001802100700600E00100644600300210722010 600448400608600700602620801600608E006025104006006006006006000000000000000000FFB3 BD000801800001A3380380980184180A10B045800000600602602600700E00A00209600000600200 400600600400680600022624E28E28600280400E00E00620620E000000000000000000FFB49F0000 01801C01800841A23801A15100040309800000700600600000608608200204600100400440500700 60028060060001161060460160040074C6107056016046000000000000000000FF89AA0000AB8AB0 AB89088D8C18AB88183110481180002AE2AE28E28E2AE2262322AA2562A82AC0000AC2AE2AE2A82A E2AE0000060064061660002AE1062262861E6486000000000000000000FFB71D0008018000A18408 0180180180004D002021800000600600600008609400222A00E00600400600042600602000600600 00064063060A6006104086006106486306000000000000000000FF603A0000AB8AB0AB9428818818); SDR 8000 TDI (0C00800A80800000224000A802202002000088002122022000C8208280240340A10240020A002002 A08000002002002002002002000000000000000000FFC95200000000000000000800028220008000 80000000000000000000001800000820410000400080800000809888800228000000000000000000 200000220000000000000000000000000000FFA58C0002000000000000000684400B000800202200 000A08410000000000004002009A0000000002000800080000080000000000000000000000000040 019880000080000000000000000000FFE08A00040003200028A00040000001240A00800000000008 000202010000000805000013080005000000000000280000000002402082880804000A8028028020 200208000000000000000000FFF2A410800010000000000000000008010044400000008000000000 00028000231031000000000000000000000500800800000110140040010082000480100010010040 000000000000000000FFAD218004AA800EAAC208AA8AAEAA820820C808AA80002A82A828A0EA2822 AA4030032AB0222AA0006AA2ABAAA0032AA2AA0000020020022220002020022126820A2082000000 000000000000FF700C800A0110000100044100120140240010000500010050040044401000000340 00805005100000000400804100804004000400100000000000000010508200000000000000000000 000000FF77AC900155809955925955D559558A3C819259558001557D5655411748655600C136556C 0CD56400156556556516D575560003560D605601640051644E2C6056016056000000000000000000 FFFF510002AA82A8AA8AA88C8AAAAA8808CC8088A880002AA2AA2AA08A2422CA0822AA2AA32A22A2 002AA04AAAA4122AA2AA0000AA42A12A00A20022A22202212A42A12A000000000000000000FFF58E 01000014200001040000000020844C01000000008000000002000480000C02010001240000800000 000000400040000000004003002A00800200800001004A0300000000000000000000FF91B40000AB 8808AA8AA8890AA8AA8508A086488900002AE2AE28C08A0920224062AA2AE2020021002AA1A22AE0 422AA2AE000002002402762100182102202282182482000000000000000000FF9E5A000000020000 00100200000002C411901000000000000002620602C1000080040000040000000044000004A00000 00000110140040010080008480100010050040000000000000000000FF876180000000A000000020 00000010000200A02200000000000060262002084C00000001282C85000060100000080000000002 40208288080400440028028020200208000000000000000000FF5787000001821801823801801803); SDR 8000 TDI (00800C01800014ECC701004000500600704680F00600600000680020E03700610608009700002601 000000680C840084000006000000000000000000FFC18B400041CC5C498089118528018290C88009 0480000864860804A654220710F01602E09624610000600100722E02608600000640202630000940 E20680F424004106000000000000000000FF2D3B004001C01801A03061811408A016448888318000 8050361065000060067066960020368CE5020110010840861064060000048A270C5286C05C64A441 4410000114000000000000000000FFC29420004B8418418318018010908410019118018000806046 106106006426D061262D635640620200600010414600E006000206102006010002006006AB684402 4204000000000000000000FFAEE2000001805C11A45851800100411040800B018000086306000046 22600601680F00620684630000600000520E046106000207426456100491406D4650640604600600 0000000000000000FF890B00000D88180180188184C0000011118018430000006006000200084026 00624630600611600000600000400601600600000600600644000011600602600600630600000000 0000000000FF7F700000000000000000000000000000000000000000000000006006000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF24150000000000000002002000000000010012000001000001006006000000000800800000 000000000004000000000000000001004000000001001001000801000000000000000000000000FF 520E000000800800800800800001A008008008008000082026224002022006002006002006006800 002007003006006002000002002802000000002042002002002002000000000000000000FF397600 00000000000000002825102006501000000000820500110200401000204000000001120800001000 000000000000000000450000000000000800000000800000000000000000000000FFC64E00000080 0860800D808408489F6800880D80800008221A222002002002003002102003002000002002002002 002002000902A2B802000001102803812002802002000000000000000000FF935600040188188180 1809C09801081881809801800012602600400600680600632EA2E14620608250780480EC8E51610E 400416806006200000006006024106006006000000000000000000FF0C7D0000010010010000010C 3185040438004544000002148409D2006200040048051000040E4000000104100004004444000880 800801010000484800C15000800100000000000000000000FF73FB000000900900800800C00A00A0); SDR 8000 TDI (80000180000060060060060060060040070060040028040008008060000060060000060060060060 05006006006806006006000000000000000000FFCEFF000000001210001801821A00203801804081 A04002684600600108630600402600604400200420000600600602600600040690610622600C006C 07006006106016000000000000000000FF1CDA10400C021A03501B05C03804201E09800025B40049 688701640622600E01500E82E00500AC8C0288068860060060060001068264461160048460368864 06006106080000000000000000FF3F3A00200980180180107BA19A01861800800801880000C01684 E00628400614F00E10A00700600000010600600600600600001C00621C0200005071240C400205A0 06000000000000000000FF8857000001825811A10011A01A1780580091080100402E400E82620180 608601602719302600E0040100060070060260060000040260050401053860C50209020224860000 00000000000000FF69A7100005801C15881101843801C05808802B44822100414600600602621612 7006022006006514230100086006006006000284086144D1100C84620C0054021020160800000000 00000000FF79FB000001911B01D02001A01C81A01900800800000080500600600108600600642F02 24AE00600C000041086036106106000084006884009404006004044A028820060000000000000000 00FFA0F9000001821821A01043800805841100928A89800000480600600610600680620608220601 60020018268860479061060000040AE804008282006024044082802106000000000000000000FFAE E80000018318218250338609318390008208EB00000460069E600000C0BE87685600695602E01400 601E2068060260260001060AE106040004026684808006102486000000000000000000FF6AF60000 019059098C8801800C41803001801C05802000400600600601694600680605080604600401000640 600E846026000004006004000004146106016402006006000000000000000000FF5E500020099018 01E04941C40821C09201801809000004601610608180608E00600600604780600400600681600620 600600002E006206090004006106006306046806000000000000000000FF8D130000218818118010 01801809803144866C818000E0404702644600608E06618603202608E90000018700601620610600 06243A89444204D80460E4004000020E06000000000000000000FF1B31000621801801800801C158 09C45200E00900800110C30603600000600648644E04200E12F200008006206026106206080104A2 900404190030620EC52008004116000000000000000000FF47040000118018118031018228418311); SDR 8000 TDI (B0418000786416000000A0680640620203E01E006000002000046000006006000086206186006000 21628604620608620E000000000000000000FF7E390800902A1B098C9A50013A89200943A4D32D00 0120605680088624E0268B6D02B4E8AEC16820A20840106AA10A68060008AEA56C96906800B068C6 886D26A4E82E000000000000000000FFA58F00000000982580190012180510081188100180000C65 0751601610628E20602200640610608110848820E01021650600000708602640702884E206252016 106406000000000000000000FF499800000000180100180000180100080180100100008060060060 00006006004002806004802000000000006000006006000006006006006000006007002006006006 000000000000000000FFEEB5004000001004801881801C45881C04181A0180008164471501068468 0600720482700644E00000100480600400600600080600640650600040600600A006026086800000 000000000000FF8CFB000000001E01001801E01889801C91201C0100800060960001010070260061 54006006A0622008000502600C0264060010078060960060A8246007222006006007000000000000 000000FF06F9000000001000801801801A2080180440080994208260272062080B648EA050040071 0C022090001006806126096056000006006006226401006006002806006006000000000000000000 FF456B000000001801001C01801A4080188110081188A024700E20660600E2A602D0A420E2AC04A0 4002020E00608606E00608020E20600644E401406006412007006106000000000000000000FF1DDE 00000000100080188180191028168D00000195400061574061101565564062D68261164163141000 02046152116C560008060069168070AC046806826006046806000000000000000000FF3FA8088000 00100080198188780018100100018390000660060060060060068042064A64140000040800022060 0200680600000640600600600401E007004006806006000000000000000000FF16B5010000001803 001A01901C2120100508100580C100F03640E4800364460372A70B600602400094001680610604E0 0608141680720750E001006806005006007006000000000000000000FFBBD1104000001801001801 80180300108100100180004062061260060060860040060060C42100040004064060060060060000 06006006006004206006004006006006000000000000000000FF45F1000000001000001801801800 00180080000080000060060060000060060040060060040020000000000060000060060000060060 06006000006006006006006006000000000000000000FF5CEE000000001801001C01801800001800); SDR 8000 TDI (2000000A10000200000400000000008000000000002C080108000000000000002800040800000000 0220020000000080000000000000000000FFD1220002AA0AA0AA0402AA4A808A2AA0041081020000 2A82A82A80A82882A82A82A84002A82A82004802A82A82A82A82A80002A82482A80002002A82A810 84102082A8000000000000000000FF68B50003543541540C01543343023103543542140000C10550 D10930C90D50D51550348D50D50C00808550450D51550D50000C808908A0800C00D50880D00CC8D3 0C00000000000000000000FF247100080000040010C0000044400004504204400001001801001001 0200010010010110000010010000018010000000000010011010010010010010010010C112100000 0000000000000000FF22CC0008AA0AA0AA0000AA08829008A0AA0AA10000000002A82884A88002A8 2A8AA80002A82A80002002002202A82A82A80000284400200000002A803001020022025800000000 0000000000FF7AEF000200400A00B54800C00808A00A00A00AA28000880000822802042800802002 842803002800802812092802803002000902852D02802800802902C2A90290280200000000000000 0000FFAE900000000002002014000452242202012002100000A54004804A00A8C004000800D14000 800A008B4924805004005004000C00A80808000C00800C109008288108C0000000000000000000FF 8F71000004105805801809905803841821933851800011600608C00600E906146306006006006100 40400C0060C48062060002C6206106116048116086026106016006000000000000000000FFD37204 0200600C40844CC0A00C80D0C910C00D048001422C9300330B242003C0B01252BA33323049013542 2434133020820010030C30234030810234231130032C3002000000000000000000FF272204040040 802826020840A2002002003002080000811028B08810C002242C8090845000040880C00814800844 204900000828840820400860800800980800800800000000000000000000FF1B17000000020840C0 8880C00988880903040984800000700600400200600A0221020824020020100161C208E082002002 00000200200200200800206200A022032022000000000000000000FFFBB700008C10428000001000 00051040E8025010000002028000658E0C910110540000026138004028462C20050D528680000500 408200290110028500034008148000000000000000000000FFFC0A0000000000062001000A400005 04000100220000040900096006031080010021700080408122028001C002300810000000401A0048 1000021C0000200180600000000000000000000000FFDCBC080000081801885860301803000A1188); SDR 8000 TDI (800000000600602000600420010600601420E04000012600608C00600600034E44650600E0000465 060B6136426216000000000000000000FFBF7700000102180982184002180188182D029812800002 228632620620622600200608600C2061400202060C654C01602600100700700700E2012171064270 47407006400400000000000000FF12BE00081912198988380A0018718800010098028E4001624600 83B600620638E2460160C820600801006600608600602600000641620610E08004E0CE2966262761 96300000000000000000FF51A00000010018039058140018818420010010A1900028600E01004000 600620E30E00610008E0101020162160060060060000061064264261300860161020860062060000 00000000000000FFED140008001000040400400000900220440200C800002880B020601640002000 00501100401100801100004202200000000000002100403402481400200500000104100802000000 00000000FF085D00000000000000800A00000808201501204008000042205462060200002A44A042 000C0080A00440005000040008002000C82000201102008000089002100000000000000000000000 00FF5BEA0000208008A28008000EA820000810800800804006A00A14008200600200A10200E00200 20400C241211601A23E002081003183203002001483202203183203002000000000000000000FFC9 8D400C0040040040040040040152040040440100010110055440090010214110050D160500514910 5005001091000000000200000080001000108410500400000000000000000000000000FF94E34004 00C00D00C10C00400C40C20C04C08C00800100300300230B00302304324320301300B01300300340 300322B0024003124020A210340300200300200A002002000000000000000000FFBB790000218018 258018140AB811805809801821100004643600400604600610608610600400600002400608610600 600608002608640600E00000E006006106406006000000000000000000FF938D0002000012012530 000212010002002903030000800804844C2000480080080484C804804A0088492C80480080480400 0800800800800C00800800D10800808800000000000000000000FF307F0000008008009008000128 448008508008088000002000002002B3000200200228200200200002A00200200200200200000215 2002002000002002002412502002000000000000000000FF7FAD0000AA0AA0AA4002AA2800882AA1 8202603000002A82A82884880012A82A82A81402A92A80002512002A82A92A92A80002AA2022AA00 20002AA2AA4600A20222AA000000000000000000FF49840008000004004140000000200440000000); SDR 8000 TDI (00016000006406006006100006002000006000004006006006006006000506106506406410016406 002486406146000000000000000000FFAD840000A98AB8AB8AB8000AB8A908188808980880000862 AE28E0AE2AE0840262AE2AE20E2AE0000202AE2AE0002AE2AE00000608602E00E04000600621410E 006006000000000000000000FFC3F200000380180180180000180502384404500280002160060260 000060240160060060460062245100060064120060060002D60060061060244561061040060C60A6 000000000000000000FF5D770000018018018018000018000098000008C080000260060064060062 0C5060060060840061000000060060C000600600000624E50622628008645604E4C620E216000000 000000000000FF59B40000018018818018020018020018000280A480000060060462000060040068 86006004116010000026006102006006000A8E48EACE2160102AEB2E086206457086000000000000 000000FFD90900000180182B801840001A1104434900380880008068068060460068040060068068 02C4680000090680682080600600000600600688680080600604A84E08640E000000000000000000 FF5BF14000018AB8118AB8880AB8A108800308100080002AE2AE28E088AAE2AE2AE22E2AE2AA0070 01AA820E2AE2082AE2AE000026826006027010006406202096846036000000000000000000FF70BA 00080180D80180184000180104004000180480010060060062470060040060060064122A60008000 1600601000600600011612600611600022600640A006106806000000000000000000FFDC72000001 9559019559521559311541205032A8800055655655613155655655644E5565522160145504465564 08D565560000964161560260043561164D204648E126000000000000000000FF771C0000018C18A9 8AB88A0ABCCD88DC8C88D83000002A92AF2AE08E2AF2AC3292AF2AF00700E8202212A72AF280AAE2 AE0012074070B70270008974360A6807426106000000000000000000FFA472000001801843801800 001C0280180CA48A02800000300700620080700500108700700712600080108F0071220060060002 460A6406316000006046006286006206000000000000000000FF1FC30000018038058AB8880ABA89 88808B8C990880002A8AAEA882882AEAAE802226AAE940826000190A0EAAEA42AAE2AE0000460964 0E40606000E10E00675609E456000000000000000000FF98A1400001921841801800001804820041 80280480000020060400060060060D28160064C008680045000600602200600600000600E0463468 00306046206006006126000000000000000000FF206700000101188B801824001821803801021920); SDR 8000 TDI (10E0060A600E00608E0142842162AC00602807600E20402400600600000600600628621030E10632 E10601620E000400000000000000FFA1A80000018000018C180102104082100481380100A0106246 20E00022631604C43401A40400600004646601400408602E00001628600601604000608600020620 6006028000000000000000FF701B8000018000010258018808308048208218318000281086000006 08E006A0201610600203628000ED07108090C068060000060262AE0160B014642610609614E00620 0200000000000000FF9B8D808001808041A03801A02B0A800900A838018000804004550029106806 4020C648611242604100600E5008A000600600800620628648600004E0170C22C600600600000000 0000000000FFF2D681000180802102180180580080190090580080000240424D6001106007002347 80208202602043600608600600600600001640608620600000600610600600600600000000000000 0000FF445B800C09C00401805C01809840801C20A118008000025006006186007006C81006022800 80600020F4160077068870061B0006826406006040A16086042506006006000000000000000000FF 7F37000209A00001401A01C10C95800843C01000000108700600605000710E8A000E32E210406005 00702720B04310700602000602600608E004426117006026006006000000000000000000FF2C0800 0801800001001801800811808C41D010480000026002026006006006140006000808806108006006 002102806006000406A4E5062A628000645648C4C620E256000000000000000000FFFCE500000180 02018018018008048028108531050000016804006440006806011006006140006200006806002812 0068060000D6006006006008C561060020060C6086000000000000000000FF31F20000AB8AA0AB8A B8018AA9F08A488280504100003862AE28E08E2AE2AE2402AE2AA2402AE0102AE2AE2AA2222AE2AE 00000648606E11E00018601606200E116406000000000000000000FF313400082180000100180180 180082380490184000004C60060064000060CE00200600201200642040E006004434006006000006 20603600E0000C610E08201608E206000000000000000000FFF53E0000AB8AA0AB8AB8018AB80088 18AC88990A00002462AE2AE0AE2AE2AE2082AE2AA2882AE4802AE2AE2AC2B42AE2AE00002E02E016 02608024612631003602600E000000000000000000FF825A00011395415515580195595291195084 D88A000000E5565561305564064B25565524C25561061265565561065565560002D60D6286346306 40E2464422462460B6000000000000000000FFA3C580000180000180180180180484980084180000); SDR 8000 TDI (00011400000000000000002800000000008000000000000002000200008000000000000000008010 00000080000000000000000000FF525400040000000000000000008002040C000022000050020002 00400010008900004008100002000010001200810010000004002485000401000005101004C02202 10000000000000000000FF449D10800000000020000002001400212000021000000300D000040080 00000000000480010000880000008108500000000000D00000005004084500404480000800A00000 00000000000000FFFB1A8000AA8000AA8AA8AA88AE208888008AA880800000200228A08A2A82A822 22AA0822A32AA1002AA2AB2032022AA2AA00000208202A00A00008200200210A00A0020000000000 00000000FF2D4C800801400208401001245000041200001000000100900000404100400482100540 084100408100900500D10C8050040005001005000000000105000044804001400000000000000000 00FF263A900555800155D5595590990B909D05955D1580001568565545575575574D65564C745655 6000D5755644C4155575560002D60D628654650040E2C648E2462460B6000000000000000000FFC8 650000AA8004428AA88A8888AA88AAAA8AA8C880003220222AA28A2AA2AA48A2A20D348A2AA40048 32AB2A22432AA2AA00002A02A0122222A024202210203202200A000000000000000000FFBEF60080 00400000200000424020022030001040000140030000400080400100100480810100440800000010 50A00050000000002000300080080C0008020010088200000000000000000000FFA4AB0000AA8001 008AA8C808A0AA8880AA8880AE800022259228808A2AA2AE0222300020022AA0420422AE2022062A A2AA00000248206A11A002102012450002112402000000000000000000FFE28A0000000001200000 04000001004001000001000000040002600600000040401000044400008000800000410C00000000 02D00000004004004502400000000800A0000000000000000000FF38368000000000140000400400 0002000002200000000900280062260000000900802A81100002404A000014804000000000000024 85000C01200801105484C8228210000000000000000000FF2AFD0000018000018C18010200018200 2184180100A000E20041000040E00640604C20600604E2D000628609000820604600000630600600 600000620624E406486206000000000000000000FF565300002180000180180308002480410A8058 B5100020608612000E0C63160063040864B600600000604E2001401060160000060464D649654044 E026004016046016450000000000000000FF157200002180001980586300101380108B8018830800); SDR 8000 TDI (860062802264046AE344410206006028044404306286F06240000000014014144000D04204402804 21480E000000000000000000FFA2BE000003800003881009819101001801801869000080602E0060 060C6086006C06001106406000206006807026906022000822806880004020206004802086004A06 000000000000000000FF707B00000D800005941841A40210001809911C0500000060260000864064 47506106040206006001006C4640632644602E100446006120004240D06414007487406004028000 000000000000FFFDCE020001800801801809800000001881003889000005649620040011408602E0 4640800600605020600600600600620600000600620040400000608444600E00620C000000000000 000000FF7F7000000000000000000000000000000000000000000000000060060000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF241800000000100000000000000000020000000100000010000060060000050008048008000000 00000004001001000004000004800004000001001000004000000000000000000000000000FF5136 000201A21A00A00800800000200800801000A0000064060A80020020020060020020020060000020 03002006002002000002002002002000002002002802002002000000000000000000FFC91A000004 2000002000001000822020B40AC02820010000012040100000008000200000050002000000005040 00400020000000000000000000000800000000000000000000000000000000FF9AD5000000820C06 804800800800840802A00800800100301200A0020620020038020130020022000020020030030020 22000002002002002000002002002402002002000000000000000000FFBDB9400023851009895801 88D801811C09845D119040027006084156406056006006A0740790600028650EC4E5061561565000 06856007056550806006416006006456000000000000000000FFABE6300103101400000005401083 0202E80AB028000000420C2040080000008048201080040041010400012840546044000400010000 00800000000000000200000100000000000000000000FF2CB2100100840A10812800804800800810 844A88884004100210215240204A002002803203082000202082A422820A214A10000204A00204A2 B0002002412002002452000000000000000000FFAA46000022090000080000400000008000000000 00000000000000000000008000008000000000800A04080080302100004000000000000000000000 00800000000000000000000000000000FF058D000400000000004002188000004420200000000000); SDR 8000 TDI (00640610712601008620EA2680680040602409621721680600025640621603401054640600600604 2106000000000000000000FF1ADA000001C020111012A59818058418018019200000036027116006 00400400608C88600600600000400500E00608E10610002620C2E41260000A420642600460608600 0000000000000000FF95AA40A001800088092803C11A51841801005C82050008E08608E010006804 50E00490620E08600400C004146846926006000006C1400E48420401400420680406602600000000 0000000000FF7E0B200001800043009001841945831510805A100200406007026507906144006804 22E1260060004040A448620E20608608021600400741401020400500740500600600000000000000 0000FFC794000009808002000C01D21C018012020C18280000026007006000446224006044846486 1460A904400400E006006006000006004020006028004006007404806006000000000000000000FF 67550006218000A5001001800A0080180180300102808860060060860278042068240278461060A0 82400400F846406106000806404804006128004004006404006106000000000000000000FF5BF601 80218000A180101FC1081084B829001041000088602602609000609C12E00420E12600600401C024 14600630608E0018060048068040840140048260061860A6000000000000000000FF7CD500020981 0400008001AA082080D84B94101000008460260460062042C6056006496406046010007046006006 00600E00100700F020204000006004046004026026000000000000000000FF8356000001800000A0 0001800800815803001000000040680780600022E80600780634E406006000006006086806206006 000006106340004000216006046006006006000000000000000000FF7C9700000194022330902180 180780B831955810800018718600620632F554426304806006106003645464E07206006010000090 0140B404400200CD1E421004004006000000000000000000FFB8AE00000180002200884180184180 1020801840E800006016427A00004006046456007806006000106007026286106020000080246800 30D90010700401104C014006000000000000000000FF086B000401840401801801800A0080180B92 3A21900120600E4400000860AC00600D146C0608600190500402688600600A00000A4A5206414080 004484008056804006000000000000000000FFE272020001800000820821E4088880109090988580 0002E0062000060164270071262361062060000064470060060A601210040200622020620010610D 422416004006050000000000000000FF6A5000000990040110100180104100180181381100008062); SDR 8000 TDI (610600620E00E30640600489000000440E12E00600602E00000628628620E00002628724640440C0 26000000000000000000FF0FD6000001800001001A01801001801C01001001800000400600600000 60060040060060040000000040058060060060060000060060060040000060060060040000060000 00000000000000FF1BB10000418000A0881511910911816045817A05000000200600001700600600 2006A900060000000000060448060060060000060060068060000060862060560840860000000000 00000000FF7058000601800001801001E00801800401F11801E00004204600020000600604288302 181600000000000400540600640780000600640E0042D00068060060860040060000000000000000 00FF5E9E000001800200005201B01891809AB2800808912080230F5360A902633620222A00834701 655000680600E126A068B600000600E107806000A0F006036006800016000000000000000000FF6B B4000001800101101001801B21801944800A3888A02082AE2AE0A622E22E201AE23A04AE20E0A800 62AC00E0A640622E001286006006004550416106406006100106000000000000000000FF6C180000 01800020805801900811A1201030A0019140040356D5655004655644050EA56156016D4C00200681 654700655600000681651600600400600602E90400600E000000000000000000FFAC170080018020 00001C11866943BF428001400180008A000700600600600600080E00670608680000300600600600 6006000806006006006000006006807004802006000000000000000000FF6CA80100418002018018 01A0880580012320101580C00C854E32E0A804E44E4004AF0C60461160040025448360A600704E00 0486806006804004806006006016006006000000000000000000FFF63F0000018020010018819008 11800001001021900040000600600640600600000641600E2060A800201400600600640600000600 6006004000006006006046002006000000000000000000FF98FA0000018000000018018018018018 00000000800000200600600000600600200400600600000400400400600600600600000600600600 4004006006006004002006000000000000000000FF36B8000001800001001801A018018018000000 00800000000700600600600600200680600680080000400480600600700600080700600600400000 6006006804002006000000000000000000FF86C6000001A00000005A01801C218018082020088200 00200604608000600600000E0C689608600400E10420700612600600000600E08620440400600602 6406002026000000000000000000FF7D3F0140018020C5011B4184190181188020002280004C0126); SDR 8000 TDI (30021080D50890D48550550800881050D50D50550810800840AC8808890810940A00800A20D08C50 000000000000000000FF081F00080040041041220001240440042040040000010008010010410000 01001001100001001001001001001000001000001001001011001001001001141001001000000000 000000000000FF3E3B0008AA0800000200AA08808C00000008808800002A82A82882886000002A80 00220AA82A80000900002A82A82A80400000800000000000000001480E8120240300000000000000 000000FFF40A000200A54C80A00800A02A02B04A0CA40A00800080200284280288A8C2802C1280A0 02802800A22A028030020028D2800832942A02B12810832882C02882912812000000000000000000 FF4D0700000120123228D0010210412302C02042220001000004804820824C0C0009409000010048 088148B0001004804A00000A00C08948840800A80C20800A0C8408C0000000000000000000FFB0C6 000243901101943801905801801815905881800000600608C04600600E00651608EA060840C00A40 0682600610603640020600600604600810600600620E006006000000000000000000FFC83D000100 C20C34C00A28A20B28D34D40C30C4C800120281300311208A00394302302300342301100B2831024 020033020110830832C350B40122312B11304310350A000000000000000000FF74100004492C021A 2050005C000022024020A2D60000801080908840884804000A00801000A84840800C00908889000A 00000A80800808810800880AE0800A44800800000000000000000000FFE82E00048080196494A000 C0000885E810900800800000300600400A00302210200220220200200801622A00300600241A0000 22002002002008002002202000002022000000000000000000FFCD52000002101080020420000280 10002102510000002A400800619622001088410014040040C1001641000202200001E00304000000 600400900201000B0400308200000000000000000000FFEB6400000400200000060A22240000010E 0000000000408820296007008A080684600200881200902000002800011000000001000002004000 00600000108080000418000000000000000000FF4DAA02032180880188185180C1718800810D1029 800000621602000011608600609609602604000008808604640628600640000638658638E40014E0 1E006014006186000000000000000000FFEEA40200B1B12309D2982184A341A4C28D3232918000C2 60AE82080EAAE126944826946AB6C40890B288A6C06AB6C86A86040AA680684E886890D1685688E9 04806B16000000000000000000FF5E6100000580002380380B901209901841009023800010C206D1); SDR 8000 TDI (04640E1180020764160062006105EE11600602000E00600600E00608623000E20609E00E0162A610 0000000000000000FF6A8500000980191194180C02980190000988800903000060060A800040608E 00012A08608600620000001624610600000608600601620610E08048640610621600632600000000 0000000000FF476F00080800008001003000000002800A00010C00A0080000096006028100080048 09049020800000840032010820000010000020000801010834005002000008E00008000000000000 0000FFD5FA080020001100000000028020000009080000000000000004600600809024C5000A8400 00028800C000410400D40000004040000400214000000208080880006000000000000000000000FF 306B02000180280B0008000C4980822820830840848001210A048002406602002102202086002120 32200209208210880220300B043402002201203103202422003002000000000000000000FF90ED40 0C004004004004004105000804C24020000021005005244009001025001028001029085401005005 101004000000000000000080001000408000000000000000000000000000000000FF6D6E400400C0 0C80C00C00C40C20940D14C04800802100300301200B0030230030D20C3033083111053003003483 550002002002002082413000012412103082002002000000000000000000FF7A4712004100380D80 18019018018038018A1801810000601640400600E51643620641628600604040400620E006000006 406036006206006200006006406046006006000000000000000000FF6A5400000120021144020102 94092002002002000000804004844800804804800800800804804800804804801004000800000800 800948800800800800840800800800000000000000000000FFCD4500020080092090280080284280 0924800842800000200000224200200200200210A0020020000020020020020000D2002052002202 002000002002002002002002000000000000000000FF052B0000AA0AA0460484AA2C00900AA0180A A0CC00002A9AA82884882A82A82A82A82202A82A80182A82A82A82A82A82020003822AA5422A8008 2AA2AA28A2A82A82AA000000000000000000FF8561000C000B41400A420040042002012204000400 008010000002010882280002200010008000084205000000000003000002900002A0240000410008 290008000000000000000000000000FFF66F0004AA0AA0800800AA4800A00AA0820AA09000002A82 A82A80882A92A82A82A82292A82A80002A82A82A82A82A83280002302A80002A80102A82A82102A8 2A82A8000000000000000000FFAF7A0001542002142101541521103142083143300000550550D509); SDR 8000 TDI (600600000E4060060060040160064040060000160162D600604645608404E2060060420040960000 00000000000000FF78DE00000B81300094D80180180184180092B820800000600600600600600614 808613400600610202000600C0060004C64A600624650608640208612E2AE0820062460000000000 00000000FFA099000001A01090801001801801849C0A821810000010600604624080600681004600 6006146905100006004006000206006216216206006C8422F30E21600228C4160000000000000000 00FF4CE2000001801220A01800833801802000A00041800080E80680600600680600020610E80600 E2000068068008060008860068860868CE0060008860061060000060C6000000000000000000FF7E 6F0002AB8AB8078AB8AA8858AB8800A088A08300003362AE28E0882AE2AE2B009E2262AEA0700522 E2AE2AA2AE2A802E0060268260062AF0041060268362A8466816000000000000000000FF5FE2000C 0183101080100080180180C205800001800044E00600604600600600A03609614710E80080250611 000600052600608690634640690040694E006004006016000000000000000000FF1A0F000555B559 09B551549319559421319001310000C46D56D56550556D564C28C6556D574CE28440AD56556D5655 042E0060060060465562040161161075540064C6000000000000000000FF99210000AA3032C028B8 AB8AD8AB8818A8C8B8098000806AAEA8E08F2AEAAF000004226A0E22628028E80F224AAE2A880E00 084604680E1302010AE006C162222A6AA6000000000000000000FFECE54002000010200010018018 0180980282B80480000060060060010060060004040060068060000A60070040060000860004CE2A E28E00010022644622600608E006000000000000000000FFBEF90000AA0818052C98AA8898AB8E80 8A8E81C78000B06AAEAC84A82AEAAE540F04226A06206000244846A06AAE2A808600241649600600 A000006486146B12216006000000000000000000FF86DC2000002258090210008018018020008058 10800002E00600000680600600012408E03600E801004416006006000006002006036026042C0004 640608E046016006000000000000000000FF3AF30000010090A48058010258018018208000218000 0860060462000060064D00120060861462801501260D400600023600054E40628E48008031602E44 61100C62B6000000000000000000FF8D0E00000300380181180100388580D8C3800081880040E006 20620600E0060000020060064161000800060060164C10160030072270160022210370B704600410 7006000000000000000000FFE0F20008039E38098A78420098038C20A08E00458840306106200206); SDR 8000 TDI (0604600020000681402208600003012F0100060C00060AE00600E00A02600E106106042106000000 000000000000FF9B8C822401800009002881820A01800C01C228008000004026140220336006A040 400080A602421000A0000000260000160000260160060044A020600600608E002006000000000000 000000FF6DD2840511E00000800901801801810C29C008008001807046146001C8FC060060280004 0600600980401600780600010600000600E006006000106116006206026006000000000000000000 FF15DB804C89A00035060201809881828803804C0008010052060060C6006A06C050000112070064 0001100F6074470788060090862A690601454048E08F026106006006000000000000000000FF44BF 000001800020803401848D01841803021A00080030640641648002601708200000414F0460040060 0202200708000E00814632600600600401600684600C006006000000000000000000FF14EF000803 800020801223800801821815133880000000600602602600700680200002C0060060800240033420 060014C6080406246D460C620008652E2AE034006206000000000000000000FFBFDF000201A00109 00101180080180294100081000008048060060000060060030900848070064040930020030068000 160508D600600601408404E0060065060060B6000000000000000000FFC5650000E98AA1570AB095 8AA8AB88881100082200002AC2AE28E68E2AE2AE2A82202442AE2AE0003002AA01A2AE0001462100 0608E01E2040007060060060062AE406000000000000000000FF6FA00008018000200A1823801801 808801800880800000400600600000400600A00000C0060062840080041440060000A60080065160 0E04428428600600600C006206000000000000000000FFA09E0000898AA0010AB8818AB8AB8808C3 88A88C80002AC2AE2AE0AE2AE2AE2A83201142AE2AE2802282AC2C42AE00020E22002E5360262843 000260262263042AE00E000000000000000000FF8D8500015583411200B111955955942955914822 00005545565565305565564825485445565560064C05564065560004160C005604604650C0060460 4E4C6546556016000000000000000000FF8AB780000580000100102180180182C801820820000000 400600600600400600001020400600600000000600600600000610028600628605400000E29610E0 560060A6000000000000000000FF42D000008198108880188B8AB8AB8818AA84181980002AE2AE28 E0AE2AE2AE2402260022AE2AE2002862AE0B42AE00000640650608E50E00600021650601620A2AE1 46000000000000000000FF892900004182102280102180180180B800801885000000600602640000); SDR 8000 TDI (0100000900000000800000100008000000100002D000000000020044840040000002009000000000 0000000000FF10C58080AA8AA80088A8AA8828AA8208AA8A2C8880012ABAA828A0CA2AA2AB2A22AA 223AAA2AA0002A32232032AA00000200050208A50A2AA0000121020122AA28A14200000000000000 0000FF68CB8008014110000010014214010004030000040001209004004041001004B204040B1005 000100800884145004000001000280000280C000000080901080040000A0000000000000000000FF 55D5800555F5500D913555949D55D13955C339538000556556554516D57556547554456556556400 20643445455600041680005604604655600044644E4C6556516016000000000000000000FF381C00 00AA8008208828AA88A8AA8AACA88AA8A880000022AA2AA08A0AA2AA0020822022AB28A200C83202 20A2AA00020A00002A5320230AA3002222222222A22AA00A000000000000000000FF2A9608800100 10A00200002042000200001000000001001004000000001001010004081000000080150080080804 0000A0000000510008000280080000000004020200000000000000000000FF7AFB0000AA9C491485 18AA8880AA8AA8890AA80080001C22AA28C48A4022AE8120522022AE24208007A2D62062AA000142 00000208A01A0020001020020022102AA402000000000000000000FF36D000000000508000800000 000000100200100300000040000260062000000060440280000004004000240C40000000100000D0 000040010000448400400020006090000000000000000000FFD8AD8000000280320A200002400000 004000013000004500000062260A80003483100800001500001000100100000004C0000400240500 5203000801480C8110006240000000000000000000FF4BA300000180090180184188000582180180 388184400062362300000040270261120260C600E0480060000082061080060000060060060C6080 10E146106004442306400000000000000000FFB30F0000818000418AD0118020018008818C885109 001161061000464463161044002062060062000062000200160002061400060D6446416050046416 0160C4002006000000000000000000FF4F9D000081800019881805803001905885801825888004E0 0600E02602600E08620012420600600010620440414600000600000600622620600000E20644E004 106216000000000000000000FF65D200000180002500102B88100182285382280100205A422E6360 002042B61040980840B60062080000042446061803060000060061060B40A00860A62264242C600E 200000000000000000FF525A800001800100854A0180080388080188890A82000068860800060060); SDR 8000 TDI (702609610050602002621640600F0000460065170060460164A0D06006D261448410000000000000 00000000FF55CD000049841911841801801880001801801901800002610600040020610600600600 604000610010600610610605000600600621608600600002420600600C0080000000000000000000 00FF5768000000000000000000000000000000000000000000000000600600000000000000000000 0000000000000000000000000000000000000000000000000000006000000000000000000000FFC7 39000000000000000000000000000000000401000000000000600600000000000000080000000000 0000800000001000004000004004004000000801000800806000000000000000000000FF96550000 00801000800800C00800011000A00800800004280728800200200200200600200000200200700600 7002000002002002002002002002802002004000002000000000000000000000FF3FA60000000000 00001000000000000000240000000100480002420800402400400100480000000000000080000400 0800000000000000000000800000000004000000000000000000000000FF37FF000004A008008008 00800900800800800800800100200200200200200200200300200000200000200200200200000200 2002002802002000002002003002002000000000000000000000FF99DA0000018818018A1801A018 2B8098058A1A018000006026C1400600600600700600E0A802600200EC9600780E42800608701600 6006006002007806006004806000000000000000000000FF1D7F0000010010000110010010000090 10221000000042440402C209844024004C1450400000400100400440404400000140080100080100 0140000801005044800000000000000000000000FF68BE000000A00A008008008008218008058008 00800000002021200200000200000009200000200080220A00200220000200200A00200200208000 2002003002002000000000000000000000FF618100000008020012800000000A0080082400000000 2002000000000218018002002000C800000001008020002805000000000000000000002000000100 0000800000000000000000000000FF2DCE0000040000000000000001000000000800000000000000 500000000000000008000000020002000000000800000000A8000080000080000200000100002000 0000000000000000000000FF56CD08000000011200000001020048C0000080400000800000020420 0008010008000000000004000089008C80000002C00000002405400001000801280C800000024000 0000000000000000FF490F0002004000200202000400000000002004020000000000000000000000); SDR 8000 TDI (0640600010600788619611E00600010C006004806416706006086423086066806020000000000000 000000FF01FA000001810801801811801809831D45881910800002710604608600610603680E0060 08006014016046106006100104006014816006006004007002C06400006000000000000000000000 FF75AA000001810D15449C21841801801805C0180080008060870060012060071064060261000060 042A62264060060000040060840060868162040060A208E000026000000000000000000000FF3B6C 00000180088DA41A0180180083140582381000200060060060064160060061064061000060101478 86006006000004006004106406406310004002015802006000000000000000000000FFC69A000001 AD1861815801841D0082940183B986002068690700E60010E02611640608620000678C8064061061 8600810400610608601610608C004D46104042006000000000000000000000FF091A000201880801 001841801800801001801800000010600600E0068060360060061464000860042068564160060100 0600600400608700E004004002004804046000000000000000000000FFAE7E000001801801601801 8118809010C1803800000000610780622030680780780640600000600401620600600600011600E4 0E00610610600400400642414CC06000000000000000000000FFC34D000001800001801845801801 805899A81910000101644600633620710600600680600000680004620600600601040400800C0100 704D800000615020400201E000000000000000000000FF75A3000001800001001881801831E29801 881E00E0002460060A60000060062064070062002070000861060064060800060000841000000000 00006000084202806000020000000000000000FF767E000401801001801905809B08821821E01800 800101614614008980600600620640620000600000F08600600601028C0005060020804000008061 04904416400000000000000000000000FFFEEF000049D41115081809901840801809809888800000 608600020600700632700E09610032602104648E08610E05102600210E4020020122804864241048 47010000000000000000000000FF2BD20000018008218018418018411378018A593100006E640602 60013063064060860060204060813C60062064269000040022049180320420200060502469C02268 00040000000000000000FF9D7D000001A01841921811801881041831C01801800000600604602600 64864061360060000460004061060060460008060020060020828020000260440270084060000000 00000000000000FFDFCE000001901805801801901A20003841931851000050600600002600700614); SDR 8000 TDI (05504644000000600601700600600600200400680600680002600600600600000600000000000000 0000FFDA5C000000001001801E01801801E0000180180160000060C600010004600620230E024216 00000800600600E00600600600000400700E007029806006007002000006000000000000000000FF 2D5C000000001001C09821C01805801801C05B5080010064088C62302872A60220070050460000A0 80600600602600604E00000600400680600040E00600400200E046410000000000000000FF44F100 0000001001801C01801A05811C81801800080000629038642E50620644028624408E0000A8006006 006206006286000005004006006000046006004006006046410000000000000000FFBEDC00000000 18018118418018018000018859508000006546046150846B4600050E00645600014D00680600E046 00605600600400681600602CC1600600680400E006000000000000000000FF626B01000002180182 18038018019E0001981A188000006025006046806886000806186106000004006A86006006806806 006006064006006004006806005020806006000000000000000000FFEBF5000000021801801C0180 180180040180180000000045264A62100064A6100506406016240154006506006006006086006004 807007006005006006006002006006000000000000000000FF48D500000000180182180B80180180 00918018000800006004006006006006000006056026000004006006016406006406006004004006 006004006006004026006006000000000000000000FF853D00000000180180180180180180180180 10000000006006006000006006002006006006000004006006006006006006006004004006006004 006006004004006006000000000000000000FF93C3000000001801801801801C0180180180100000 00006007006007006006002006806006000804006006807006807006007007004006006004006006 004000806006000000000000000000FF897C200000001801841831801811A81881801020000000E0 0644602004600684812600600600000501608610600600600E006016004806006006006006004112 006026000000000000000000FF827B000008011811C09881811801A49C45D05110000008650C0860 069160C600000E80700E00080E1060460060068C69060068040D4006146004286046445806006006 000000000000000000FF3960400009A0080182180180D801801801C01820000044600EA961060860 060068A60070000060000060076170060200040060048A7006CA60002060021264CE006000000000 000000000000FFD112000001840C0920D8A1803901881801C03810000128E20600E02112E0378161); SDR 8000 TDI (80002A80002A82A82A82A80004000004200001400002000802402202102880000000000000000000 00FFFF1A000200204A10800400A00800A04A00A00A20800000280284280200200000280080300280 0C000020030030028028028D280A8128C28A2800852802802912842802000000000000000000FF48 AB0000002012830014014010242202000002080000000000804A0000400400000480000480080200 4805001004000D48C00C80CA0A08A08802C008D0890824800000000000000000000000FFA38F0000 00009843A018019218418419018059158000806B1608C00680680640680628640608840000600620 620644645602E1161461464060400160A6446024006006000000000000000000FF8B030002021408 10800CA0800E90D00C20EC0C40800100300300315224200381200300200200100894204300300301 300340324320320300B211083003003003323512000000000000000000FF2CBD0004004112204012 8020211036814010C2040000008000B0C800001001011024000000800810284000A08880048C5082 08C0800800800C40810800800804800080000000000000000000FF27AD000000442280C20800C008 828028A28A0840800002250200008280702600300250300E00020010288640200600200220200200 212A08201000A00220208000200A000000000000000000FFB30F0000000280580000001402600802 084000290000880A2000611E820200204009000020000400840A0008062008022841C10014020060 8000000168020040706200000000000000000000FF110400202010000600A1400200000000000400 1000000000000960062C008848028020860011800100006002000820000000000060044000020000 0000000020046030000000000000000000FF1ACA000084081801A8180B8018018000018029808000 206098000040C0680602E80600200600000002600600400641608604661C02E0060360003A62864C E204000506000000000000000000FFCA24000080321A31821C01A01B03AAA2B5A40A488000B268A8 80088652615688C526802816000C00A86886A4542690E89684688485682E8B6800A0EA4688EAA080 08B6000000000000000000FFAA61002040015883A8B88B843841801801B0A8800000816404516016 006C0642700EA0A24601000202642608C08F20724620A40C2064062062020A711644600520640600 0000000000000000FF295B000000001A018018018018018018018008000000006004806000006006 00480600200600000380600600480600600600200400400600600200600600500000600600000000 0000000000FF5A87010000001401801811C01C018080118818018000006007040406006046103006); SDR 8000 TDI (000000400800000000880004080000002080000400880B0300000130246080000000000000000000 FF87E508014400100800000210402000102000000100001200245060060001200000004000080000 004000004002002C0100000204000100000000000100C04800106000000000000000000000FFB963 002008800800801820828C8008AC88008800800004204250C0020060020060020060060020000224 0200206690284208A1820632436124410A3202412200023002400000000000000000FFB231400C10 400400400400410100420000422000000100500152000102100500100918100120100100D0050050 00008018000100000008001000000018420404000000000000000000000000FF8DAF400500C00C00 C00C00C00840D50800C44800800104300300A0030430430030030030130030010130030030424020 02002402002012403000002103003002082002000000000000000000FFF805104045801811801825 9438010038D1009801800010604604400600608600600E20600620600024600620620614E10608E0 06046486006000126406046006046006000000000000000000FF6004000000214201001201201004 20020000122000000048008448208040040040008050048048008048050050048008008C08008C08 48848800800A108008A4800800000000000000000000FF5CDB0000008C0800A00800800851800801 80080080008020020022020008028008020000020024000020020020020020020120020121021020 00002142002012002002000000000000000000FF9FEB0000AA1104AA0AA4AA4AA6808AA0AAAAA0CA 00002A82A82880882A82A82A82A82A80002A80012A82A82A82A80022AA2402A83102022026002AA4 122A82002A8002000000000000000000FFFFDA00080002044000000040040000000040008C000080 00000402008000010000000000000000008008000000000001000000200A80004102001300800000 00000000000000000000000000FF8CB60000AA4220AA4AA0AA0AA0B00AA4AA4AA08C0000AA82A82A 80A82A92A92A92A92A80002A80002A8AA82A82A80002A82882A82002082100002A80202A82002880 00000000000000000000FFEC7A0003543141145543541541143345541542200000550D50D1093055 1550550D51550800D50A00550550D50D50800828CB0908C00A108C0800C00C10CD0D20D508000000 00000000000000FF5645000800000000000000000204400000000400000000100100120100000080 00000010010014008008010010010010010010010211211410010011010010C90410000000000000 00000000FF761A0008AA0A80202AA0AA0AA0C80880AA0AA0820000AA82A82880A8AA8AA82A82A82A); SDR 8000 TDI (00600000600600600608708604C00600234629700020620E006046043236000000000000000000FF CAED000001801001801801801801842A418458210000006816006006006006916004096006006800 006006006006C16416004006002006806000086886006316006086000000000000000000FF17FE00 0001AAB0ABAAB8AB8ABAB188C8838898830000AAE20628E4882AEAAE2262AC3262AE007000AAEAAE AAEAAE0260262842AE2AE80E02700082E026AAE01428A106000000000000000000FFF13A00080100 5801801801801C35C1384180584000000060A7006046006007406005106806006000006006016006 146D361061062034864CE80148600752600C0468CE000000000000000000FFC0C240000115595595 595595580194988995592000005564575561505565574D6555456556006004556556556556496516 496556556146136004286016556226552456000000000000000000FFE0ED000001C890ABCAB8AB8A B9018C0A898A9808800122740E2AE08F2AF2AE08F2AE2362AE0070012AF2AF2A72AF41600622C420 02801680600003694600024628E206000000000000000000FF9B5A200001601801E0180180194380 084380180A8001806086006001007806007006006006006001807807807806026046026000000416 20600004E4A6001084002006000000000000000000FF5B440000018E90AB8AB8AB8AB8298A080588 9907800011E0062884882AE2AE8462AE2262AE0060022AE2AE2262AE006206004212184066006002 006416090304288006000000000000000000FFA2E400000100180180180180190180281580182180 000C642684000680600641680681600600680000600600E00628608600610204400620680004E0AE 22285604402E000000000000000000FF73390000018030018018018018038088A182589100002061 160064200060060C60020860060060000060060860060360364AC04840849612E000506406012080 006506000000000000000000FF676C000001801801809805803C01883C018058B100000060060060 0E0060160860120060060061001062060061170872360060820250070060410D700600A02A023106 000000000000000000FF2EE40008018518118098A180180188287F8638A90A0054E28610850E4260 0600610A00600600608020608600600600600601E60641618E586000206426426200480026080000 000000000000FFFBF6000001801803841941801801801901801803152001632E4100000260860260 020160860060404060860060460060060060060060560363104060C6046482104026300000000000 000000FFDEBA00080005000C04000200200000008000000200C02800100064864000880C00800101); SDR 8000 TDI (400000E20600600600600600600014650600E10010601644640A004006000000000000000000FFBF F6880C02008001C01DA1A039099A5C09A09C018000A0720600600700682700702700604680404080 720710761650600F00C0108BF2871860A0016406006286004006000000000000000000FF7F261000 42009C01801845801805821009909C01000020680205600080700700680600630610400500700620 700603621700E006000006406024006006004104004006000000000000000000FFED440008000008 01801801A01901853041C01855800000600602602600480600600F00600680410300600600600652 E53600612AC0430648608A0D604E04C110004406000000000000000000FF99A5000400001801A01C 01801835901295801A01000100600200640000600700608600600600420800680700680600600700 40060C104F04E0000062861060020440D6000000000000000000FFC7670000AA0AA8AB8AB8AB8AB9 418011418AB88580002AE2AE28E08E2AE2AE2AE3362AE2AE2AC4002AE2AE2AE2AE1061062AC24200 C40600620070600620632628C006000000000000000000FFA89C0008200048018018018018A18018 A180180000000060060062000060060061060060060063000060060060060860860C404210220600 60202860060040C4000006000000000000000000FF9EE40000AA0AA8AB8AB8AB8AB80B88980B8AB8 8080002AE2AE2AE2AE2AE2AE2AE2262AE2AE2AE1102AE2AE2AE2AE22E20E2AC20A02602602600002 602628C2282AC02E000000000000000000FF04C90001020089559559559558159558159559530000 55655655613055655655645655655655604455655655655645603600441241204E2CE28404E24E45 64125100D6000000000000000000FFAEEA8000000008018018018018018238018018518000006006 00600600400600600600600600600000600600600600604600408228E09651651001649602600600 4306000000000000000000FF0CA20000339C90AB8AB8AB8AB8018AA8018AB88A00002AE2AE28E08E 2AE2AE2AE2262AE2AE2AE0002AE2AE2AE2AE0066064341062421060062002061061060062CE40600 0000000000000000FF4BDB0001090210018018018018358008958018000000006006026000006006 00608600600600624400600600600600600600404600A04E00E02400628604604C0020D600000000 0000000000FF9F47000001805001801801801901800841801840000000600600622600600600600E 00600600610000600600600652E13630C50E0C23064A60800D604E48E48402640600000000000000 0000FF5ED600000100100180180180180DA0080980181000000060A6846440806006006806807006); SDR 8000 TDI (0100480500500400004030900000009051000001049100400C000100000000000000000000FF0D28 808000125955D55B55D558151558155559498001D570465545165575575565575575565561115575 57D5655645643655612608604E2CE50044E24ED560245560D6000000000000000000FF2287000000 2CA8AA8AA8AAAAA80AA8A80A8AA80080002AA2AA2AA08B22A2AA2AA2AAAAA2AB2AA4802AB2AA2AA2 AA22A20A04228A22A0220222A00220222222222AA02A000000000000000000FFF0AF000000009200 4000000000A00000A020040400000011100000000008008040000048000004008000040010040800 80000808210200000008080000000304000000000000000000000000FF62750000000A80AA8AB8AA 8AA9400891400AA9A880002AEAAA28C4AA0022AE2AA2AE2AA2AE2220402AE2AA2AE2AA1021020AA2 4232240200200070200231C3802AA482000000000000000000FFDDBB000000000000000000000034 04009400000400000000060262060400000000000000000100000000000000000000000001080100 48048040000000020030004050000000000000000000FFC612800000004000000000000100004040 00000000000000000060064880000000000000000802C00000000000005283302000200803004803 000D0528080000006200000000000000000000FF95D40000000018018A38038018418019018D1821 00C01370824001000040960461062860060160000861060A600E00600E0060060D200604E02004E1 0601430C0C4026008000000000000000FF25CB000000001801801801805801889845803881920040 62020904260460060060060160860061000064260064260060060060062061064062880060164C40 4001400E200000000000000000FFE8DD000000001801801801803801881821801895800020600220 60064060060060160060860060D00060B600602600610600600408641E1062001064060842240840 06000000000000000000FF3BC1000000000801883801801825805881881821820002E28605E18020 608E02601E00640600E00000600E40600604600600400002E28600E0081A648600C01002400E0000 00000000000000FFAAB2800000001001821803A0180181180382B80A88A008600208022602600600 688650E0060040501064061462160060970060042060062C612000E21622608E00C0264080000000 00000000FFC795800020001201801803841901801801901A01800000600250040081680680600600 60C608404080E80608681649640600400C00600621600000E00E2260020040060000000000000000 00FFC076800000000001E01E01C45811801801801800800000640650628100C02600704E00780600); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FFC4F900 00000000000000000000000004000000010000000000006006000000000000000000000000000801 000800000000000005000801000800800000800004000000000000000000000000FF498000000180 0800800800800800800800000800A000006006020002002002002802206000000000002002002002 002002000002002002002000002002002002002002000000000000000000FF063000000000000000 4001000000000001000000200000050100400000002400040C080000000000000000000001000000 000000000000004800800000000000000000000000000000000000FFFD9D00000090080084080080 0800800A00800800800000228252200200200200218200200000000000260300300200280200001A 163403002000002003002002002002000000000000000000FF5D53000481803C01881C81C0180184 1A4B081809800100624E004006016096007A06006000200000046D16014217C36006000506806007 004001006007006446006006000000000000000000FF20F900000100001100200100100000000100 0000000000400538400000002410020C084000000540401000404100004800040000000100504500 901000800000004004000000000000000000FF81AC000000C00800880800C00801800800800C1080 0000240300200200A000002800002000200020022A82002802402002020482003002002000002002 002002002002000000000000000000FF685100000020200800010000000002000810020000000000 28080000000088000001800000000282C00008A08810008000000000000800200282000000000000 000000000000000000000000FF7CDD00028010020004020000000000022200000000008000010000 00000000080200400000000000800000800280820000000000100480880000080800000220000000 000000000000000000FF35CF00000014000000000020010000004000008200008014A00204000010 008000010000000002890010008000005283300004800003004803002D0428000000400400000000 000000000000FF133A08800000400020000000003400009420004000000000080000000000000000 000008000000000000000000000000000000204300480480080000800004100000D0000000000000 000000FFAAAD900000008EAA8AAEAA8AA8018AA8018AA80880002AA40228A0EA2AA2AA2ABAA82A82 AA2AA0002AA2AA2ABAAA0020022AA40A0C21020020000021022AA0B20AA402000000000000000000 FF4C8280080020140140140120100024100040142A00010050000040409010048040048048048000); SDR 8000 TDI (400400EC86046404008206800082208280006084404004006046000000000000000000FF0E450000 018000418018018058118001002A1840000080788780600601600600400E00600000040800400400 E80620600400820000610680A228004004014006006006000000000000000000FFA3060000018800 81801981A0194195C4002118000000186086006600006E0614408600610000020020E21480616684 609C00000000000600210100411C406006006046000000000000000000FF15D4000001D019018050 01801A01800254001800000000600600600600400600630611600000000041440600620608630600 1000026003B02000004006804006006806000000000000000000FF25160006018008018010018018 018000000098400001806407A06020006106006006006000000006026A86006D0600600620000020 0812802006884006806006006006000000000000000000FFA3810000019410418499018318018018 05045820020046626614600602F086604F8600600000000062528416080706600428001410700601 6000A02004084006006006000000000000000000FFA8720000018018038090018218218118010018 00920000610E01600045400600600600600000000008400640000608600612010401600602602044 6006104016006006000000000000000000FFA708000001801041801801801C018004030118008800 006016040000007006805806006000000000106004300487806004000080C0601604602090200400 6816007006000000000000000000FFD9F80004018018019250018459039445011018048001006216 00000600600600610600600000000000600602121630740E0C004000C0020AE0A800200640E0C600 6006000000000000000000FF01EB0000019C0087841901811841811C098450090001406106516240 40600700400600600000022880400480500710608424001411600401600004620400400400600600 0000000000000000FF9D69000181A08801841881801801801931807001800000600600E006006006 02700600600000000000620600401602E82610000400408484600020E00E01700600600600000000 0000000000FFDE7D0002019098018818018039058C40019010150000006416010406006006026006 00600000000100640702600453653602080100E00408E02901640600608600600600000000000000 0000FF507B0000018019038039018418018000418010018000006006000000004006006106006000 00045000600600640400600640002000010400610020600E406024006006000000000000000000FF 7F700000000000000000000000000000000000000000000000006006000000000000000000000000); SDR 8000 TDI (83006007806506000000006002004000006006004007006806000000000000000000FFC959000001 801C018010010018818018A1829A01820004708E2A62AE0062860070EF3CE0AE0082A800E36E22E2 260AE2AE0480A882E002004000006006004806006006000000000000000000FFC0A2000001001C01 801E0000180180040001120184000074068CE150046556806287006106020494806800006007006D 06000000804002000284806006002006006006000000000000000000FF9560002181001803801880 00180195C140981001800000600504E006086006006606006016020000A260808060460160060000 00006102100000006006000806007006000000000000000000FFD1D4000001001805821800001801 800000001501800000608E50E54080632700690E0B612602054054710C0360060A754E0080B10548 00000001006006006004006006000000000000000000FF14B0004001001801901884001881800000 829001840002620600600E0860060060264060060100080164244064060060060000000060020000 00006006004006006006000000000000000000FF6285000001801801801800801801801801001801 80000060060060000060060060060060060000000060040060060060060000000040040060000060 06002006006006000000000000000000FFE286000001801801801800801801801C01801801800000 60060060060060060060070060060000000068048068070070060000008060060060000070060020 07006006000000000000000000FF425B000001801C01801804801801A01801001801A02000604600 610000E006006A160460060000048060040064060060060000001041040460048160060260060060 06000000000000000000FF534A000001901805801C0084182D809801809903A00000610D20600600 6006406826006006000008C06A040469069060064082104060060160000060064040040060060000 00000000000000FF6C7E00000180100380181B80180BC01800901802000004668600600684400600 402F406000000000A040041060060061040000060060160000000060040040150060060000000000 00000000FF3046000001801201801201C21951941C548C9800000002600EA0608002700624400601 600000000400401580628750680420000F8400061000540068042140060060060000000000000000 00FFFEB2000001881001801801801841811800801900802000604600600680E00600540624600000 0008805C0414600610608401020650610A848000016004044016006006000000000000000000FF2D D4000001800041803001805801805D008898208001006006006000016006084A1608610000000800); SDR 8000 TDI (8408C8004C40000910A28805008800888A00888920804804000000000000000000FFF67100000188 B801801843081901921849101805800080680608C00610600610680610600600000004600C006306 10612E000000016224046000006306526026006006000000000000000000FF9F7F000400820830D0 0E90C10C40C14880C00880800000300300313201200200B00201200200100150B40332B002823002 0005010C3003483401233003003493003002000000000000000000FF58F90002082A60102010BA20 204031400A200288000008400092488080500CB1480000C004008800FC0804890800000A00000E80 800804D20800880800800C80A88880000000000000000000FF5B26000000A4080080800100080080 080100880180000020020000020030020020020030020000020020120421828820020001081C2002 00200201200200A24200220A000000000000000000FF01E60000000104001004001205000C040000 0006000102100000601E228020008029000000000000008228720408800070000000020440004280 000400260000000000000000000000000000FFB3C90000022006080001440000000024F008042000 010080082960471800010002010102002000000004800000009201080080000088082C8400408020 580108000000000000000000000000FF85ED0000019018438018018198A982010190130180008062 84000100816286886002B8600600000001600200600604E0060000002142A600000024618E000014 006006000000000000000000FF5874000211805805C09C09C0DAA9A8430920112580000C6A868208 8E2C6A2628EC22096C06210800816B52D26906106836010280CB6216810D0088E956B0C806816816 000000000000000000FF303A0000058C18098018C5841801A21A42091009800000E00ED060060160 8E00601020600600000028600380601682E2060000080070C6324000206006045496306306000000 000000000000FFF167000001801801801801A01801A01A00A0100180000060060060000078060060 00006006000000006006006006006006000000006806004000006006804006006006000000000000 000000FFE71E000001801801D41005401801944000201B018000046C06000006006046006A860460 06000000106002006004006006000000807100100800006006806807006006000000000000000000 FF8E60000001801801C0100100180180000080100180000070060080500064860070260060860204 80806026006004006006020000006002001280006006006004006006000000000000000000FF66E9 000001801801801001001801801A0101180184000264050C61008460360060060A60060000110060); SDR 8000 TDI (2042082802112480212002002001003052052402402012000000000000000000FFE6130005804004 00400420400010180401000400000100100122430100100900100100120900000820100100100411 0001000000000018000000000320000004000000000000000000000000FF0D0D000410C00D00C005 04C00842800C00800C0080010030830024030031130932030030110008082132C340300304200300 2100023003002800302202003003003002000000000000000000FFD49B0000018018018000418118 01825811001801800000604654400611600600600610624000000000600410610600600600600040 6006106000006026006004006006000000000000000000FF7DF50002012080010000010012002140 05200202000000400484482000080480000400400080080880080489000480480000482089085081 0800910800800804804804000000000000000000FF21F7000000842800800000800800800A008008 40800080080200200280200000280080000000000000200200200200200200211002230200201020 2002002002002002000000000000000000FF2F870000AA1802AA0AA2AA2AA0AA8B00A80AA0880001 2A92A82886892A82A82A82A92A80000000002AA2A83222A82A82AA0002006001402A00000622AA2A 82A82A82A8000000000000000000FF22600000000022000024000000000400000400840001001000 00020002000048800000000000002001020802008880000000008042001000000000020000004800 0000000000000000000000FFC2310000AA2102AA0AA2AA2AA0AA0800AA0AA0AC00002A82A82A80A8 2A92A82A82A82A80000000002A82A82282A82A82A80003280882082A80082082A82A82A82A82A800 0000000000000000FF448B0003543501540281545543543085343102100000550550D50930D01550 840D515500000008008808A0C90C40550A88800450908CC0CC8840D488A88B0C80D50D5000000000 0000000000FFAD040004000422000000000004004424004004000000000001001000000001001000 80000100101100100100000180100000100104100100100108100100100100100000000000000000 0000FF58E40000AA0000AA1080AA2AA0AA0A428808E0400000AA8AA82880880382A8008AA82A8000 0000004400002002002A80480002200002202200002200004000002A82A8000000000000000000FF D8C3000200A028008A0A00800A00A00840A00A208000002002842802D02800D42002000002000800 B02D42913002002902800000902912902840802932A22C0A802802000000000000000000FFAF6F00 02002B120120500140120021420524030B0000004000804A2080480480400080400400084085080C); SDR 8000 TDI (AE2AE02E0060002AC2263030041268260362AA2AE2AE000000000000000000FF6B6D000441801001 840001801801802000829C01800000641604604600400600610E006000800841006800C060060060 8E006000136452006800807006117042006006000000000000000000FF8178000555955155B54355 95580191014415595580005565565561305565565564CE55655000000449650012E5565560860060 0055554744601421640E207556556556000000000000000000FF772D0000898AB8AB88828B8ABA83 8A9CB38038AB80012AF0C6A8E08F2AF2AE2AF2072AE2A800000002E2AA0262262AEC260060000060 802A000043600620010E2AE2AE000000000000000000FF366B000001801801800001801941821C11 001801800100700700600100500700700700700000000802700A40700600625600600000681080C0 000461260C0002006006000000000000000000FF2A0900028F8AB8ABA8E2C98AB8718802009818AB 8000AAE826A884A8AAEAAEAAEAC6AAEAA80000007062A2316B162AE00E0060006060042300603067 56060C022AE2AE000000000000000000FF6EB9000041801801820021801909810090005801800000 630602020600600600602600600000080000681208600600648600600009650400C8000060261124 06006006000000000000000000FF45C7000001801001800005801805825824831001800000600E00 60000060060060160060000000200AE0020360CE00602600600004604810000012E10E2020D00060 06000000000000000000FFE04C000001801001810001801C01801914081021808000600640640630 600E04620600600000080100608900E02604708608E28000600404480141702E1022023060160000 00000000000000FFEBBA0000018018018080418A181190600108300982C010E00604800608660642 63160260900010000062622063161060060060000061C612700810E0066060060860060000000000 00000000FF8AB9000001821811844001941921810041825011840021628601000004400600600614 610000140800620050640600620600600001420620F4500064060560040560060000000000000000 00FF233B000000040000000020000008088040040000004008028004620622000840010810000800 04100000800901100C0280000080000440310220300200100000030000000000000000000000FF84 9900000800000000010000800C004000000001000000008000608611008010C20000000000000001 0004200080850000000000040800880000480080004800800800000000000000000000FF1C3A0000 01800890844003800D6082091C00084080004060264800020020060020060860200000008022B688); SDR 8000 TDI (006006000000004200306004086016006007006006000000000000000000FF1080000401801A0180 0000001883804003801001800000600602642600600600680680600000400002E0004A60000064CE 00000000630648600049610E046012006006000000000000000000FF725700000180180180040000 1C118400118010018001007006006000006806002006006000006004206004016000806006001004 000040026004046446097320806806000000000000000000FF4FCA0000AB8AB8AB8000AA0AB82188 80B18AB0AB80002AE2AE28E08E2AE2AE2AE2AE2AE0000060001C62A80062A82AE1062A80042AA01E 11E0001060062060062AE2AE000000000000000000FF5FEC00000180180180000080194180184D00 180180000060060060000060060060060060000060044A634A006000006086000006200100106004 486006206026006006000000000000000000FF7B8D0000AB8AB8AB8000AA0AB94B8A18C50AB8AB80 002AE2AE2AE4AE2AE2AE2AE2AE2AE00000600040E2AA20E2A82AE22E2A80062AA026006000426226 2260822AE2AE000000000000000000FFC61700015595395580015495581594990193595580005565 565565305365565565565560000060040160024365505564565500060CC4344160040464CE08E50A 556556000000000000000000FF78AE00000180180180000000180180B80180180100000060060060 060060060060060060000060000060020C600000600600000600648642600000E116116254006006 000000000000000000FF90B20000AB8818AB8000AB8AB82188D8218898AB80002AE2AE28E08E0042 AE2AE2AE2AE0000000000860221062AE2AE0062AE0002062022420000160060C60262AE2AE000000 000000000000FF683E00000184180180000180181180181100180180000060060264000260060060 0600600000000421620201600600600600600008C10A10A004046446036012006006000000000000 000000FF774C00000181380180000180188384590282580180000060060060262960060060060060 000000000260884A60060064CE00600002602204200049610E206302006006000000000000000000 FFD2FC000001801801800005801809815804001A0180000060060460000060060060060060010008 140073293060060062060060000040020C281520E416296006006006000000000000000000FF8672 000201801001800201801A0182023180180180008068068062468068060069168060000000004960 0200600600688600600000609200A000086086006806006006000000000000000000FFC3570000AB 8AB0AB8AA0A98AB8B78840810AB8AB80002AE2AE28E4882AE2AE2AE2262AE2A800100482604002E2); SDR 8000 TDI (A22A80022230A48A20A00042222222A0D2AAA2AA000000000000000000FF0A750000010000000004 010001400000A00400000000004804020000000000A400010040000000004A020000000000008000 0020080280000000480001000080001000000000000000000000FFF5490000AA8AA8AA8000408AA8 208908C10C880680002AA2AA28C0AA2AE2AEAAA2AE2AA00041C0001C221A00200028210200033208 220200200010200210240E2AA2AA000000000000000000FF90AC0000000000000000020000100080 40020451800000000002640600000000600000000000000020004001000001000000000404002002 40000404404C4440000000000000000000000000FFBF050000000000000000C800008202400C0020 8000000000000060060000000000000000005200000280804A00000404A800008841011050800049 0108010080000000000000000000000000FF8A32000001801801800001801809800125029C018800 2060964200003160070220064060000040000060060063404060062A020000001020610000601654 6014086006000000000000000000FF39700000018019018280219319018500090858058540086226 00041604643600224608600000400000635601601015604600000035210614E20009650601640640 6006000000000000000000FF908A000001801881900021001881809880003803822009602600600E 02620E00210600600000400000600C10E00002C00600000420C40208220000600600200200641600 0000000000000000FF9690000005801801880001081809801821029801880000618677620000E006 0060062164500060000062C00060807140060000044F64061200C000624602A00A00600600000000 0000000000FF383C000001C01801828001A51801820015100A018100C0E20E000006D07026042346 90700000400000604608625008604654020000431220A00009608E50220730620E00000000000000 0000FF4AF3000101801B01800101803811840001040801800000602600040040610620A006006100 2564000C6206006400006006000200006106A02100106006000000006006000000000000000000FF B13C000001801881800101801801815841800801800040604600600000608781600704610000C000 006002006001906006000100322103000000016026000002007806000000000000000000FFA3EF00 0405801A01800209461A1180B823840C018000B868060064664070064068068260005C64000465C2 006000C1600600148009200600014000E00E001007006806000000000000000000FF455C000101C0 1C01800010605801840003801601800100608655600100700600200600F228004004086004006400); SDR 8000 TDI (02002A06002A02000000802002000000002002000000000000000000FFE674000000000000000001 00000C0004102000000000100C400440000040000040100040000000000040000000000000000000 01004004004000004000000000001000000000000000000000FF07C8000000000000800800800A0A A00C0880080080000820024120020020020020028020000080000020020020020028020020430030 1201800101A043001000002002000000000000000000FF7BF1000040000021803801801801801811 821823802000E0068040070260060860060040001000280060060260060060860060042040A40060 21004006000020006806000000000000000000FFD1BB000000000405001101000205004000005000 000000023022C00080400404440810400000000000440010140050080040000410400D0140008040 04800010004004000000000000000000FF47F1000020000200800800800800C00800840A00804000 28020020020020000000020020000000000020020020020020820020002800A08020000020020000 00002002000000000000000000FF2966000000000042004000000000000008000202000000880000 00000000000A000000000008002A0000000000000000000008008000000000220000008008080000 00000000000000000000FF7437000000000000000080000002002000002020000000000800000002 0000000200C800000000004002000A1A01280000201C408004010080000000400008200000000000 00000000000000FF93C3000000400000000000000082034002004000000000000000042000000088 10008000000000000280404A00000004A80010400000101480004901090500508008000000000000 00000000FF824B0000000002000000024000100000B0000400000080000004000000080044800000 00000000022001000100000000000001100303210000020404401002000000000000000000000000 00FF56110006AA8AA8AA8000A88AA8208848008A8CAA80002ABAA828A0CBAAA2AA0122A82AA0002A A00008224A1020002AA0020002022820133420000120022020C32AA2AA000000000000000000FF66 B7000401001201000403201000022011000240000080500400404000480500100500400008400000 10400C08010000008000000200200C0000008111000004805004000000000000000000FF78540003 55D55D558001555558159518159159558001556556514516557557107D5755600055600001608E43 6000D564560015164560464160000464CF55620C557556000000000000000000FFF2A50000AA8AAA AA800088AAA94A88088288AC888000AAA2AA2AA28A2AAAAA2AA2AA2AA00002200040B28220A80032); SDR 8000 TDI (4060820020002140040150066800D0C06006000000000000000000FF10CA0000100100C18018C302 1001C0000580180100000460030060068064068064C4000000000000106406006802406806006002 003102204001006806800000006006000000000000000000FF67C000008000000180180100180181 00218118018020006006C46000047806007906100000000004006006202800006806006004D05012 106004804006800000006006080000000000000000FFE0AA000000000041841821045401801B82B0 9908080005416700601610E006006085002400000000006400006002006010400101080008020011 006006001000006007000000000000000000FF9328000000000001811A41101009801C04C0180A08 0000600208E42001600610603540200020000000601010600240620000002001114084048021704E 0012A0006006200000000000000000FF3D4F00000000002180180100380180804190180380200141 061080410C6007006006500200000000006002406002806008000040A0004208028020600E000D00 006007000000000000000000FF5D66400010002001805A41421B0180208182180180003463062004 2E00600634640E0484001004D000630308640600400200202010012B80200000608E000000006016 000000000000000000FF21F8000100000001A518015C1011889A200019090000044826446410A862 2610685428600840000000641012600240E482402902012103004010094046800040006086500000 000000000000FF27BF20000000000180180104380180180280188180004060060060060660060060 1610600020800002600284E00609210200308412481202600080460601880000E006000000000000 000000FFBEBB000000000001A05801081901B0024184190980000C754700044F406246446C064544 0048035204628609640708000600600502400400000210400F00000000E106000000000000000000 FFE7DA00000800200180182180580181408480180180000060002000001060060860060040100100 000060060060020060060061420020C4020000004106000000006016000000000000000000FF7F70 00000000000000000000000000000000000000000000000060060000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF4903000000 00000000000000000000000020000000000008000060060000000000040000000000000000040000 00000004004004004001000000000000800800000000000000000000000000FF703C000000000000 80080000080080080080180080000020030000020020060020022000000080002020020028028020); SDR 8000 TDI (780480400480644E000206006004006006000000000000000004FFA26F000000000021823801001A 019DA051AAB809800080000600600E0660060060041040000000000040063060060064061C600000 2006006000040006006800006006000000000000000004FF5892000000000001809803A018018020 83889A09800002495415644828708608614E8484A0110106006016A0E54640F10640600B000C0500 0007000006006206006006000000000000000004FFA92E0000000000A18A38010018018000018238 01800000000420600600600600640440400040000051400604600600600600600200000602000000 4006006006006006000000000000000004FF48BB0000000000018018010018018018018018018000 00000400600000600600600400600000000400400600200600600600600000200000000400400600 6000006006000000000000000004FF3BA4000000000001801801001801C01801C018018000000005 00600600600600600500600000000000400680280700600600600000480300000100400600600400 6006000000000000000004FFD518000000400201803A01041811801811801A038000000004006000 00600F00600400600000000440400600220600680600648490040801240400C80400620600600600 0000000000000004FF4E1D0100002A0001C21A01001C018439018018018000420004116446106086 04E0C400200010000200410600201691640E007040C4000292210288400400710704700600000000 0000000004FFCFAD000000020001C21800001001821880C01E00000000404300E01688608650E0B4 006000000000006C8644000008700E00600001018A00404000A00600108000700600000000000000 0004FF4728008100094105801804041641E0780084180000002040361860000060169A710C006000 000014206206A2080800E00640680102880304E205012006000051806006000000000000000004FF D8AA000000000001805801041011A01809801A02000004400700622E806016206005006000080000 0060068022000072060072C0480C04124120902006001400026006000000000000000000FFA8DC00 0008000001801801401001809941801808000002400680620000700600F405006000000004006A46 1020000062060060010003051140040020A6000800286006000000000000000000FFBE0500008008 00058018012010218100008018090000004006006206006806106004000000000008406026806002 006006007084004C00144000004146100100107806000000000000000000FF262100000008442180 18A1001A19864142841801800000401610600000621601602700000000000428600611E002206C06); SDR 8000 TDI (10303852003009013503303243003002000000000000000000FFF54000000004414024020C2C2004 3A82024032440000D2CD80B24880020000004B80A20000020900820940800918818C18D014E82150 61134880908A40000704A00820000000000000000000FFD37D000000000000880900800C12800A00 C18880800000001200010284682680202240C00000042000200A2020220220020431048226034420 0004600208A008002002000000000000000000FF354D000000008400000022100460040020180021 0000080000006016A088C88680000000000002000884900400C02001202AC2009440000800106845 88020040480080000000000000000000FF02F3000000180000000080000200000210200000000000 004809E00E8008008800081000000000006002001A02001C02800108004880802000000000004000 00000000000000000000000000FF81D10400000000099218118398898121C9805911800025622600 00204062060060060000000080000060260060060060060060120020188080000300263160040060 06020000000000000000FFB170000000108401CA1A2BC2190BB2A00D80DA018000A24C4683084E02 62360B68A68240000288408868AE8268C6896A1684E4CAA04812050801000A0689680CA068460400 00000000000000FFBD5500000000001180190188D841801921D01CC1800010D09650608640E10600 620E416000000200A3620648420E4268C6502804150320486080AC894E2452041061060000000000 00000000FF4B2B000000000001801801001801A01801801801000000000580600000600600600400 60000000000040068040060068060020000000020060000000060040000060060000000000000000 00FF1970000000000101911805801801840305801801800004400640000642710600640610400010 0000116806944006006406042005004004A42000044206002406006006000000000000000000FF20 09600000000001801801801E01A00401801801E000A0400400810000600600600600000000000000 6006004806006006000000002807002408005006002806006206000000000000000000FFB0AB0000 00000001801803301801821A2180180992008080AE02600000752E08622C80600000048900400680 500600644E001001000006000021004086026002006116000000000000000000FFE9910000000000 01801805001C0180182980180180008100BC0EE2260870461864BC22E2A020808020480E00C2A620 E086200008001A06400001004106046806006516000000000000000000FFEFBA0000000000018018 01901801840421801809940020414780E100026516006026004000000516006006002006006C5600); SDR 8000 TDI (00304300300100B003001003003003002000000000000000FF09EC00000000180180180181580580 1801901801802000600411400600600601600600612020008802600604601620E10600601654420E 00C480006006006414006006006000000000000000FF1DB900000040100120104400100123122100 02420000800A848448008000040040048800000008020009208008488488208C0100C04140804900 800800804804800804004000000000000000FFCBB9000000000800800810800A0080481280081080 0000202200244200200200200001200000050000201220200200211201220A00800A0D220010A002 002002002002002000000000000000FF71720000000000AA4AA0802AA0AA0805806AA0C000002A81 582880882A8AA8AA9AA83300018000022A83420B8282282202201D205E1A403001022202A8000000 2A82A8000000000000000000FF661500080000040040000824440044054000002A00004100200000 000008008010200C00000000000002800000000002000002C0AA01000004820A0000000000000000 000000000000000000FFE4150000000000AA0AA0AA2AA0AA0AA0080AA08400002A84002A82882A8A A8AA82A82200000002802A82082400280282082080400082882204002A02A80000002A82A8000000 000000000000FF7BD10000002001541542C41101541040143543000000940B10D50D30D505505504 90C10000000D00D50850CC0AB0850810C30808010C40CB0800C10D51000800D50D50800000000000 000000FFF71D00080040000000000020060040004200041000010010010010410008008008010000 00001000001001101501281141140011000001011001011001801001001000000000000000000000 FFC4AC0008000002AA0AA0000000AA2900000AA02000000000202880A82A82A82A80A02000000000 022A80002100007801C01800200A02100000000002A80000002A82A8000000000000000000FFAED8 000000400000A00B0493280080CAA4A002028000A02A12802802802000002402852000000D008028 3280AC42802852852A08808892830A02D02802002802802802800000000000000000FFD2D6000000 00020140123020100122020900129000008CC900824C00004004004810904000000800000B009409 10848A00A00104C0404048490102C800000004804804000000000000000000FF4907000000000001 801885881A11901901881815800014E14E08C0064260260061060860000000008064060060061164 16526444054206AB40004A404600E106206006000000000000000000FFEF5C0400000C44A0D20C08 C30844C50830A14CC0800140340300309280280282300340200000150120312B0A314B04310300A9); SDR 8000 TDI (F555512405336554425200556556006000000000000004FFB8AB0000002010AB8AB8050AB8AB8838 ABAAB8118000000142AAE08EAAEAAEAAE816AAE0000002002244B622891621704648824420200632 43002AE32C30220A2AE2AE006000000000000000FF3BC5000000001001801E01001801801801C01A 018000A2100200640000600600600611600000008080400601000E40620608000402080682410000 600510A94A006006006000000000000000FFC51A2000002010AB8AB9F18AB8AA8E08ABAAB9058000 0D6432A88088AAEAAEAAE846A0600080010000600620244616621604031804861620E000AAE20621 A3822AE2AE006000000000000000FFF9510000000010018018118018008048018018D58000436C02 04000600600600642E0560000008000562060820AE08E00E023041506004086C0000605682201200 6006006000000000000000FF16F2000000001801001803001801009001801801000000010A006420 0040060061060860000004805040AE0484064060C628A10604012A04610000408010602400600600 6000000000000000FF37600000000018010018018018010010018098020800006082206006406406 00600E08600000800000700600300F40700602200620200002600002455444601401601600600000 0000000000FF7CCF00080000180102198185F8080060059058030C400062820000862062060260A6 40600000000A00600600678610640E00600019E65A01E07200400400200C00602E00600000000000 0000FFBAA2000028001809043803801814088029801009000000E4460805081400CE04614600E000 000090006006206006016016006000000100306100114004008284006046006000000000000000FF 95D200084000000000200200000401004808C0100420008000506216120128000008216000000000 0000004000082000000000000000C02400901202B0208200016000000000000000000000FF86F700 000000000000000002802800000010C0000020000000446006010008010000006140200000000000 054008540110004810AC0C5080820080090080004000E800000000000000000000FF869B00001000 101000088084280010000C800802800002204208C02200200200600210200001018800280A002822 912C2204208240200210608009200204010C002002002000000000000000FF631440080040040040 04004404024004804004040001041005440001061005001005000001001001028010000040008000 00000001C000061000108700005241010001000000000000000000FFB82A400000400C00C00D00C0 0C50C00C90C14C00800100300300204301300B00300300200100100101200201200214204A003103); SDR 8000 TDI (14404000002424026116806006000000000000000000FFC8DA0000000AB0AA0AB8AA0AB8898E00AB 8AB809000000001428E48E4462AE2AE2AE2AE0000060002A80462060460560462141400462205AC0 002721442063262AE2AE2A8000000000000000FF2F98000800041820001822001801801801801840 000000000400600002600600600600600000600040002610212612E12600C00208008C12A0000920 04086086006006000000000000000000FF06F70000000AB8AA0AB8AA0AB8A38838AB8AB822000033 02A42AE0AE1062AE2AE2AE2AE0000060002A820E34A30E30630E24440000222005600008220C22E2 262AE2AE2A8000000000000000FF9A54000000115912155910155915935955951915000032042C55 65303065565565565560000060040C049643241640641608442444A2204060044424C04564565565 56550000000000000000FF90A6800000001800001800001811811801801911000000000400600600 E0060060060060000060000001060060060060061040145121140060004020001060160060060000 00000000000000FF6A2A0000000A98A98AB8210AB8C98A98AB805889800001210028E0AE03C2AE2A E2AE2AE00000000001400600600600600644631608802220E0002262140062062AE2AE2AE0000000 00000000FF212F000000005801801803001805805801813821800012208202640010600600600600 400000000444C01654601600E00601604E0024800420041061100460260040060060000000000000 00FFED3E0000000018058019090018418018018C1803800020A22A00600620600600600600600000 00001044C601634634635632610622600A08600001204630C08C006006006000000000000000FFCB F10000000018018018010018018418018018018000112002046020004006006006154000000C8400 400604640705684602F45204000011290442E006104094004006006000000000000000FF55CB0000 00201801801801001800814801A018018000242002806006806806806806C060000000000044D650 E0C6086086086106502116046400906002026442006006006000000000000004FF409B0000000018 AB8AB8AB8AB8AA8808AB8AB8AB80018162AA28E2C82AE2AE2AE2AE0060000010062AE90640680E31 630E207007008A24A070060062AE20E8022AE2AE006000000000000004FF30B00008000018018018 010018008108018018418000A8200200624600600600650600600000080011480608600680650600 68061110C700A801006004045040006006006000000000000004FF5D184000002019559559559559 5494C955955B558000106552D56110D56D56D56D56A4600080040555644E1264C604604E4564D648); SDR 8000 TDI (2BA4202022222022222AA2AA000000000000000000FF208900000000000000000000000000000000 00010000214400026006000000000000006000000242000000148010008000400110050010000002 008008030008006000000000000000000000FF9E0380000002200000000000000000A00000000000 000C01080060260080000000000060000001000004C00003403403500484205001000004800A0100 100100006000000000000000000000FF920000000000180000180002184192C04592580008000024 0610000040428602600640201002620011002E006006086226006002330106102000104104004000 1320C6000000000000000000FF6D0B000000001824001800093801800081801801048050000E4482 8600400E01620604A2004060000004061064860060060460000024220520102440040C4004002006 000000000000000000FFBD5E00000000180000180008980180982181180000800800060262460640 0E00E2160262000060000000064C608601600602600400022200E1000824140B6014006016100000 000000000000FFB8780000000018200018000218018A180190380508000002000960000042060060 062060003062001880062360060162260041140120160A640802200400600C00E006000000000000 000000FF2A85800000001802001800003C41804083B29801020020000E2100A72060860260160120 1004600000045600620610E006006004CD410000208020028A00E0071428AE080000000000000000 FFF2E7800080003A00425820201905800221801C01080020828654040001600600600E4020100060 104000060060264A6096806404046004092000D00002206006002006000000000000000000FFB367 800000003800403904021831801821C01C05000001050454630000F80780600E0060080060080000 0600400624600600440300401400E000104002442002007006000000000000000000FFFBC9800800 021C20401882029D2D803801D018011000060004006086806A068070060060001060011090062740 06117007004910A06000006400004802022007007006000000000000000000FF6262000100021620 021840411C0180240180180000004000060160010062060060064060000060044108064060460061 0F80600442C000084005202004006007006806000000000000000000FFB255000800001000001800 0018458120018018C000004C00D40260268060060060060060000060000004C60163463463560252 1424E00400400008A914116006006006000000000000000000FF8642000000001000401800001A01 800001C01804000000820600620032F00680700600600000600080001614601600F0061161230841); SDR 8000 TDI (2000102002000002002002000000000000000000FFD9F9000080025801801823C09C01805801C838 058C8100741640504600E0AE126906006C144160800102B600605651405600688E00410700C0A020 C006800006007825A00000000000000000FF0B3C0000001011010400010012250080100010010000 004A0008480000068442400000080404444000000000110004080080100100400000440000500400 0014000904010000000000000000FF7E6D000100000800A00C00400800800800D040009000002002 0020020020520000020020020021000002A280200282600200208A80080200004041300200001200 2002800000000000000000FFAE6E0000000A40800002440000000020080000020300000410400040 0082802000800002082282200000100001508100280000000009000002800000000000000000A020 8000000000000000FF85670000000000000200000080060000000000000000800001000000000000 0A000000000000000000800000080068000000080000000080800014000000000000000000000000 0000000000FF29A70000000000004000002000000422002002100001000540020220001000800800 0000000001100004C00483403403500000900100104A048804808010000000080000000000000000 0000FF58B71000000000000000000000000000000000420000000008000000000000000000040000 0002000000105000100080000000400000C00080000800000304B0040000000000000000000000FF B6768080000AA8000AA8000AAEAA888CAACAA48080002AA00228A08A2AA2A82AB2AA28A001AAA000 0000020020020020022AA2022A220200200020222A20200228A2AA000000000000000000FF4B2680 08000010004010002010010204010010010000214040004040001004804804000000004000000110 880000000001100004100004000020080000040000000805000000000000000000FFC1BA90000015 580055580055595594D9559558D30001554286514156557557556556516000556000000496086416 406416D5640645632650E108446406436016557556800000000000000000FFE1730000000AA8000A A8002AA8AA8928AA8AA8AA80000C248A2AA48A2322AA2AAAAA2AA0002AA12000020220A30A30230A 22A2A022A2A032208022A2AA30A2AA2AA2AA000000000000000000FF627C00800000100020000000 00000002000010010000000030020200000804800000020000004308000020A301201281200000B4 0800080402000900B01002A0000800000000000000000000FFE7D90000000880000AA8000AA8AA8A 08AA8AA8AA800000602228C28A3A22AA2AE2AE2AA0002AA40000004A242042052042082010002234); SDR 8000 TDI (04046006000006006000000000000000000000FFF94C180000001801C01801903801A03801801805 80000060060060060170074070040060022060000001041000040040044041E501118E0820000241 462A0006006002000000000000000000FFB877000000001901801801841A21C53801801801800000 610620600002600614600400600220600002002C0000040040040040040004470460000054065400 A6006002000000000000000000FFA3C10000000018819418018A1C03800000801801800000688E40 00000430064970060008000060000001068420060060864168062522228100008044A60000468000 02000000000000000000FFE57A000000001C09801803801809810000901C4980800C600640000600 600601600600080000601000004604240E12E02E00600635702A0004804340460001060000C20000 00000000000000FF8357000002001801800009A01841A51801001805800000604E10600001604684 6804006016006000840A541000A48028040850B610200004002800200408010600680C0000000000 00000000FF1327000000003801800001809A01881803023A1381000070A64062060060060960A608 60066060000180860020063022062062068128900E800000208400000E0070440000000000000000 00FF1A0A000002001C11800815C09801A80004103841800002615600020600600710702600080400 60090014A700614F02B0560061440440051022A882A124100106800014000000000000000000FFE3 DB000000005801800801801811808000041805800008600400000000200600610608000400600000 000604640620220630620450014400E000202004000016000104000000000000000000FFF77F0000 00000000000000000000000000000000000000000000600600000000000000600000000000000000 0000000000000000000000000000000000000000006000000000000000000000FF714E0000000000 00000000000200000000000000000000000500600600400000000080600080000000000000400080 0000001001000801000000800000000000006800000000000000000000FF31C70000000008008008 01800801800800801800800000200200000200200200600200280000200000000200200200200200 2002002002006000002004000002002004000000000000000000FF329C0000000000000000000010 00600000400001000000440000400000050404100000000400000200000000000080400000000080 4000880002824001000000000001000000000000000000FF5A7F000000000800A00800800DC48108 00C00800800000200210200200200200200300280300200000000280200240280280200200300208); SDR 8000 TDI (007006806006807006002000000000000000FF2F2100000000180000180180180180080000180180 0000640400600601608600648600608402E004016406006406006006000080400006000004006006 006006006006002000000000000000FF5B6100000000180000180180180180180180180180000060 04006000006006006006006006002000006006006006006006000006006002002000006006006006 006004004000000000000000FFF449000000001800201801C01801C01A01C0180180000060040060 06006006006806006006802004006006006006806006000001000802000004006006006006007006 804000000000000000FFA79B000000001800021C01801A0580180180180180008060042260000060 06006006006016002006006006806006006006080000100140404006006006046006006006006000 000000000000FFCF6B000000001900001833A11801A01801A018018000D040258161460240060368 8E007002002004046106046006826006001052852411004014006046006006006004006000000000 000000FFA336000000001801A01823805DE3845801801801800000602600E00602200600E0840071 0F606000000005126004006014004006682000A70000006806018006006007000000000000000000 FFA0FF000000001801A01A09841C01905A01841C0580000461160060000060060060040061060060 040000440C6004006044005C2E13220810800C006006420106006106000000000000000000FFA5F2 00000000190182180180B801A2580140180180005070074460A600600604600C0071060060040401 0500600402200C0840040150C4002004006026000006006005000000000000000004FF7515010000 0418A1A01883C8B80180180120182180000068268061200460460064D40070060062002500040064 CC13200C0A50A400004D0160008260C6000026006045000000000000000004FFE9DF008000041801 841E01A05801A00008801801800084E0060060060060061060240060000062000008240060340260 44004505900016102120916026000006007842000000000000000000FF557D000000001941821801 901A01900028801A858000E0E1560067402020060861160060000060004008068C61061160161460 0C011F870060A00CE906400306007202000000000000000000FFE992000000001801801885A51C01 80204004194180000060060060064260460062040068800060040280041062040020040040570020 22810004006806000446006500000000000000000000FF3A09000000001801AA1801A05805800000 0018018000006036086000006026816006006010006004000006026006002106016016D468121100); SDR 8000 TDI (120400200A042002004000000000000000FF94490000002000000022800000C00000044800000000 08000000618E5810211000180460200005A800000046010012009050000054028002000022049000 0000406004000000000000000000FF8C2900000028000002000000000040218A4020820000208000 286006049001030800006400020200200000200000000228000800A8080090840000080000000000 61506C8000000000000000FF44000000000318000C1801821824A04001061B01800044406E000010 024806C86206200242004010426406186066086006010406026002402040C8400408620620020402 4000000000000000FF4415000000021800413C81A09A2484024D2A192D80008B6916800906CD6026 486496A00836826B408C6926C1683688E8B60202200084020C0880104284886A16A00826D0C00000 0000000000FF21B7000000081800121A05821D00902481A0D8018000206426506016806006026026 00648640E0102072060C6206A46A06801110B4090040C00042400C00610700649604400000000000 0000FF2EBE000000001800001801801800800201801A018000006004006000006806006006807007 804000006006006006006806000802002800804000804004006006006004004000000000000000FF 7C37000000041800541801801883140D81005C01800100684600000600700602E006800014046000 106106006006306006001000100210004000906007006006800006002000000000000000FF3A4000 0000001800001801801A010008010018018000007006000401006006006006001100006088006006 0060460060070000070020008042A800600600600600002620A000000000000000FF45B300000000 1800601C01801801000801C01801800100C00C00E11000450680600E00624400644000600E006007 806526000002006002002000006807006007006016002000000000000000FF2D5F00000000180000 1801801A05000821C29801800001628C29E1A700E0860062AE08E08400633000E21608620640E086 008200201002000150006006006006006016012000000000000000FF2973000000001800001A01A0 1881800880401801800000681600641000650602E016006D44006444006006006046006546000000 800204804204006006806006006826200000000000000000FFFF92000000001800141C01801A0194 EB40051801800000400442600E00402600600600607478E404006806006006106006060886102814 064004106006006006006006000000000000000000FF0387000000021800201801C0180180880000 380180000068AE13612880602700603609700000604010610610600680E086008403006007002000); SDR 8000 TDI (00804804800804004000000000000000FFF0BB000000000800040200800000808808800A00800000 280200200223200000200202211200200000200201200200200200200000804A4120108120020020 02002112002000000000000000FF28EC0000002AA0AA48C0AA0AA2AA0800800AA0AA00002A82A828 82884002A82A82A82882302A80000022AA2022AA2722AA2A82A80702C00002003A02A80002A82E82 30000000000000000000FF3A06000000000000402000400000000000000000000000030800020000 10010000400000100000000001000400000280000090308080000000200000800000000000400000 00000000000000FF93980000002AA0AA0A82AA0AA4AA0820A00AA4AA00002A92A82A84A80082A82A 82A82882A02A82080002A82A82A82802A82A82A89002000080102282A80002A82882A00000000000 00000000FFBF8900000035415412035415435434C3503543540001550820D50930D50550551308D5 0C20D50C40800C40D10CA8C00AB0AA0500540D514A0A00D50C50800D50D30C908000000000000000 00FF0DB4000800000000000000600000428012400000000100000100100112100100100102100100 1001001001001001001001001800401089D41401001001001001001000000000000000000000FF08 910008000AA0AA0920AA0AA0AA0880842AA0AA0000AA80002880882A8AA8AA88002883A02A800000 0010000020320020020200200220290200A202200002A8288280000000000000000000FF4A6D0000 00200800200200000A00C00A008002008000002C82842802802000000500842812802800802D12C5 2D0A882902808030810880002800002882802802822852802000000000000000FFD2510000000014 002512014010002252350010010000000830804A2080000400484C800804800C2000084088080080 8C08C809040C480C034820114014004804800800004000000000000000FFCDD40000000098000218 01801883841941041A418000C06046084006016806C8600604642E00610044640604601601600630 020404422424E040A0600E006006206026424000000000000000FFE026000000200900500D008C0E 40904402A0088280010C300341351334200200A013203003003209103083483143103032010052D1 2012901201002C03003003023513002000000000000000FFCBC90000000002002011033484002012 410084240001100880900C00A1000020488080081C808800140820800A00800840820A950088112C 0800805008000880800CA8000000000000000000FF2B20000000200900108800A019029E0020801C 49800002220241400200200600302640208020200208238200A01A21A00200106B01744701408200); SDR 8000 TDI (006006042004000000000000000000FFB10B0000000AB8002AB8ABAAB8C92CF8C12ABAAA80004864 422880880642AE2AE2AE2E822008E0005066863C600680625600606200A2862000003262262AE2AE 288140240000000000000000FFE613000000001800001C01801C23001C0500180080008168A28444 4600680680600600491024680008600E00E20600600E006C12CA600E040821116006006006044044 010000000000000000FF6545000000001000001801801800821831001801000044641000600028E0 0600600600600600602024E0260260B64B60C600408600002008C0000040960060060062960C6000 000000000000FFA7D900000000102000180180184A841821081801880002E40210200E0060160060 460024461060110072CF02F007027416006006524020054020414006006006242506046000000000 000000FF1127000100001022001901811808805805061805080002E00629010E40604E0060360001 0404600000602660660658600638631028018800000030C00600600E020006006000000000000000 FF1FD3000000001004001821801800801801005821800000602640400004C48610E0060040040060 80006006006116006006406400008410482000024016006016004042406000000000000000FFC70D 000100000000000141800044022020100042000000022000E1064302C01080000060000001080000 000280000002080000800302205500200A0006000000406040400000000000000000FFD9A3000000 0A0000000089810002000000000001000002020414E00E00020020000824E5000002000004004084 00000410080810888B20910000848806000200006000000000000000000000FF99DE000000000800 0018008118808018048048008000006002204082002006002212002540142000802DB2802912CEA8 A200201600200222402008001200200A00A504044000000000000000FF04AA000000400400400400 40050040040140140000010010015402110A10810850041810050814000000000800002001400000 10014018401000044001001010001001000000000000000000FFD40C0000004A0C00400C00C10C00 C00C00C00C00800104320300A0031233034830020030030830000025424024021524020030030030 03151001013003003402013003002000000000000000FF120F000000001800001889801805801801 001801800000600600630600600600641643630400600000600608E0062060161060041044C60060 20086006006006006006004000000000000000FF9B10000000000000203000201000225045201000 0000804000844820900804804804800804804C108008008C0800888800800804D048008C48000048); SDR 8000 TDI (4006000084000000000000000000FF18B70000000AB8000AB8AB8AB8898AB88C0AB8AB80002A82CE 2AC4AC2AE2AE2AE2AE2CC2A62AE41004E00E24E20E00E20E2AC2162283202822802AE2AE2AE2AE2C C28C228000000000000000FF30530010001138001559559559159559501558158000550116550130 2125565565565504C65560C42160164964160164362CC5044404C824A54444E55655455655044655 0000000000000000FFE3AB0000000018000018018018058018000018018000000006004004002006 00600600401600610040620610600602604600400400000A00200000600600600600404610000000 0000000000FF8E080000000C98000AB8AB8AB8898AB8838AB80000002AE00628E0AE1042AE2AE2AE 28E2062AE00000660608600604600600C2122302203840002262AE2AE2AE28E23A22600000000000 0000FF49530000000018000018010018258018418019140000006406022200426006006006042126 006004006086006006006406144052004000014444016004006006042106006000000000000000FF 8C98000000043800001801801801801809001820800000614E00600609600600600600600E0062C0 32E02E43653634E12E20410011010804410008600600600600600610E000000000000000FF60EA00 0000001800001C01001C4180384500180080008060068420400068068060060220A6007000C46206 306006206206004900921000906000007004006006002006816000000000000000FFB43000000000 1800201801A01805A41800A01A000000006006006006006006006006006200106010016816006246 08688600425001211604C800006006006006006804100000000000000000FFE6700000000AB8000A BCABCABC89C89C88CABCAA00002AE2AE28A2882AC2AE2AEAAE28A00822F0000860A682E88E82E02E 0060002022262070092AE2AE2AE2AE2AA2A8220000000000000004FF388D000000001800001A01A0 1A03A01800A01A0000000060860060460060060070060061000D6840006006406006106406005007 50A946445040006806006006006004000000000000000000FF2C7800000015580035595595591595 19109559540000556D56D52150556D56D575565121405460144562160062C628600E0072C7116456 44C0045565565565565125544D0000000000000000FF3C7F0000000AB8002AB8AB8AB88908988D8A B8AA000112E008ACE28E48EAAEAAE2AE28E22A40600304E956816CB723688600428802220F090002 22E2AE2AE2AE2AF20CA88000000000000000FF1ACF00000000180000180180182100582580180080 0100600000220000600600680604320A00E0001060A62B600F0562C6004008442086082008006006); SDR 8000 TDI (00006010000000000000000000FFE929000000001800001900110843800004081001800000E00641 400400408620200600400400650000610E0062862262260820860004420020080042000860060040 0C000000000000000000FF8356000100001800001840000901800000005801924048652610410425 20060020060040040060000064262560560061060424064C80000020005041100060A60040244000 00000000000000FF927A000000001800001801800001801800041801820020629620408420240605 800601400640629000622622E0063060860060042AC11057A1000840060060A60041840100100000 00000000FF1FD7000000001800011821800023801810023801804000C00640401402220610000650 404601600000608600603E0560260260440040820820001040860061160040040000000000000000 00FF9E1D000080401800201880291901800004501A01882008202E094004017084A2600600C00020 600800601600630614640610250000244C20008820640890600600402A210008000000000000FFE4 8E800000009800005C80001809800000001801800040010610C30440600401680600400040620000 640600608610621600248008200E00000044E000007006105002000000000000000000FFBF918000 00009840005C01841809801800001801800000200614404400300410600600400200600004600610 6506006006006002002006000000446006007006004002000000000000000000FFE708800002401A 20011A01C2FB81801810401C01804100100603453540300480600640C002D8600002600708627610 640600614230A204000000016006006806004002000000000000000000FF5C590000024018004019 01C11801800000601C018000C0288640400400680501700609402000E40400620600600602E00E00 6400416414004004106007006116105000000000000000000000FFB3BC000000001C00001C01801A 41800004001821800000210E00420400600400600600410880628832E02E43653634E12E0060C845 6096104110006006006806004480110000000000000000FFAE50000000201800001801A018058000 00001C05800000002604404500200480600402400000600400608700600600640600600208200604 C404006006006006004052000000000000000000FFB2A80000000AB8000AB8AB8AB8C98AA0E80AB8 8980002A820628C08C2AA2AC2AE2AE28C2202AE0001063460861465061062AE3421022242540102A E2AE2AE2AE2AC002220000000000000000FF17E10000000018000018018018218018020019218000 0004260002000260060060060000160064040C60A60460A628608600002610000200200408600600); SDR 8000 TDI (000004000000000000000000FF086000000000000000000080080020080080080000008020028020 02002000002000002022000000002002802082202006080242803001000000002002002000000002 000000000000000000FFF37300000000000000000028000000000000008200000280008000001002 28880300000000000000080400001A00800200001800000000200000000000000000001800000000 000000000000FFA76800800000000000000020000000020000000000000000000000000000808200 080000000000000000000000008A8828000000000000000000000000000000000000000000000000 000000FF79D000000000000000000800020000800000000000000880002002002A00001100004000 10000480328128430530148328200080120010010200000000001000400108000000000000000000 FF2C9C00000040000000000002400002400000020000000000000000000100000000000000810000 00000000000000400000030000010080100080000040000000000000000000000000000000FF59F5 8800004AA8006AA8A28888AA8908000AA8AA8001A23AAA0AA0AA0022AA2222AA0AA2232AA0000026 0208200200200208222A2003222220002AA28A2AA2AA0AA222000000000000000000FF789D000000 0010002010014480012100004022010001020804000000284809000C800001050040004002001000 00000040000108004400100000014001001004000104000000000000000000FFB453000000155800 355955335D55905800155D55800044655655655632C5564D6556556454D561002160164964164564 3605644652C44E456000556516557556556444000000000000000000FF8A140000000AA8000AA8AA 8808AACA2800108AAA80000822AA2AA2AA02B3222AA0222AA2322AA08004A00A24A20A22A20A2AA2 2222A12A2324002222AB2AA2AA2AA22A000000000000000000FF8371080000000000000001000001 04000020000100010888040000000000010008000000840002000C00A00400A00800804801100000 00080480004020000800000090000000000000000000FF57920000000AA8000AB8A20848AA880800 0408AA80004122AA2AA2AA00222A2022922AA2882AA4001023420821421021022222023A600222A1 0032028A2AA2AA2AA204000000000000000000FF2461000000000000000009800000004000000000 00000040000040041101000500000040200000000000800000004000000000080001080800800900 46006000004120000000000000000000FF7E3F80000000000000000185200002800014C000000034 80000060064400000800500060000004803280284305301483280901200082400002000000060060); SDR 8000 TDI (0006000000000000000000FFED380000000000000D1800012041811B018118018000245026906006 144006B15006406806000020804084003806006806000100007B0440440001604000000000100600 0000000000000000FF6459000000000000001840004951801821C05C018000407216002006046026 105016116016100240005A8620214790602602012881600210229000600001000001040600000000 0000000000FFEA79000000000000001901800001949851881C8180000240A6006C06206006023006 00600601009012600600110624608600000480400085000004400608000000008602000000000000 0000FF3DF3000000000000001801800801A11A01821901800004600680600600E006202006116816 20000008690608A00E86E04600000400500016040000C886100000010106040000000000000000FF DED3000000000000001840000801801801C818018000007146007006026046C0200E006006400420 8462060860A6507106020001014003002108004000006000000006000000000000000000FFF14A00 00000000000018000038A9801841845801800040640E00600040C006142006006006080100106006 40E0160160060000D000400400400000C08000E000000406000000000000000000FF1FF100000000 00000000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000006006000000000000000000000000000FF59CE00000000000000 00018004000000000000000000004000000800000001000000000000000000000000005000000000 000004800004004000000806006000000000000000000000000000FFBE0E00000000000000180000 18008018010008008000002002002002002006002006002002000000002002002002002002001002 002006006000004002002000000002000000000000000000FF78A500000000000000000100400110 00004000010000000004000000001000800000000000000000000100000001000004000000001801 800000000000000000000000000000000000000000FFF1B4000000000000010800800C0080084080 0800800080200204300200300201A002002002000000002082803003002002000003002002062000 003002002000000002000000000000000000FFC27B000000000000001801001001801801A0180380 0000E00600600600610E08608E006026000000086206006086226056000807006004204000006006 006000000006000000000000000000FF0AE101000000000000900110300148142100110100000400 04020000100444040404004004000000000000000404111400100440001005004000004000000000); SDR 8000 TDI (06000000000000000000FFC06B000000000000001C01800801801001801801800000600680400600 60070060060060060060020068060040060060060010030010000000030060060060000000060000 00000000000000FF77B0000000000080001825800A05811101801801800080600600480600600600 60060070060060040060060049160068061004061005550100440460064460000000160000000000 00000000FFC1CE000000000040013811844809821601801801800088608600408400601680600600 6004006011006146004807046006000806C5000002029000E0460060000000060000000000000000 00FFBFF4000000000000043D03990101801AE0801801800000400600708400400611600600640600 000000600400600700700600000600D28000000002E01E006000000006000000000000000000FF3C 7B00000000000002988994A0C3801804851905800008510600610645600E08E006006A0641000690 6C34006116136006001006005160800027006006226000000106000000000000000000FF4E1C0000 00000140401C41C40011C49800801801800000408600600600600600600600600600001000610400 611600600610040654400A832290806026006000000016000000000000000000FFF3430000000000 00001C01A00001A01940805841800020401600620600600700600E0060060000040060C629600604 62CE00900600C4044B4224086016006000000006000000000000000000FF656F0000000000000018 01804001801901005841800050C0060044060460068060060060078000000040241064060C600600 0001906420C20100106006006000000006000000000000000000FFAB3E0000000000002018019424 41801A01011901800008C82700410640400600618600628640000410441440620600610618002009 68000000C5006086006000008006000000000000000000FF1245000000000000001801800801C018 2304180580000060D600400400E00600681600650601000000410401611601643601004000610410 C20000710E006000010106000000000000000000FFAC2C000000000600109B018508058A18010098 01800000604780400680780609600680600600000400410600600600600600000004600380200404 E846006000000006000000000000000000FF2044000000000000001C019A00038118018018018000 0C500600200704600600600740600600000010400400100700401E0000050A700000006000680680 6000001006000000000000000000FFFE71000000000000041801804821801ED18018018000286006 08620408600620600600600600802800480400010604400600008410648045020000600700600000); SDR 8000 TDI (000000000000000000FFB9E500000000002000DA00001111801841AA18818000806A0E1062449060 06216000006004206040006406106086006206000126000348804000216000006000200006000000 000000000000FF7E5A0000000000A0409800209C09A81A01923A89800002E28EA068961162962068 10C86C0EA06800C46816807086CD6A86000930A40022006800206C00D06010200826000000000000 000000FF5E22000000000000003B45C458C585590580180380002860060B624602680690E5200061 0610E02009634648600E00604E001C0601030E53404000600600000000010E000000000000000000 FFBF4E000000000000001801800801801001E0180180000068060040048060060060000060060060 02806006004006006006000002001801806002006006000000000006000000000000000000FF2AFE 00000000000000190000590191585180190180000470460164074060062A60060060060460010465 06006007006006000087006004024000006000000000000006000000000000000000FF3AEF000000 00060000180000180180110180180180018060068040060060070060060060040060000060060060 06007806001002006000004000006000000000000006000000000000000000FFEC92000000000000 001C01800801801A0180180180000060060864060070068060060860060060000060060048068060 060000068060C0804400006006006020000406000000000010000000FF9C05000000000000401801 800801C01001801C01802020608EB2448600E00E7862261AE20600E0A020E00E28420E88E2860280 2288E040004000006006006000000406000000000010000000FFB0C5000000000000001A01801801 801901001C0180000060060060060060060260060060068060040060060070060060060000840069 06020405804006006040000006000000000000000000FFEEF4000000000000003C01A00801801C01 001803800000600600600600602606600E0060060060000860060040070060060000006060010020 00004006006000000006000000000000000000FF79A1000000000000403881803881A8B029001881 80204260AE04C20621602EC8602E0B64048360A405650E08641608E0860308249170000060040040 06006000000006000000000000000000FF3BBF000000000000001801800801801001001803800000 60064040860060060064060060060060004860064040060064060000000060020040000040060060 00000006000000000000000000FFFC4E000000000000001801800801801000801801800000600600 40040060060060060060060060040060060040060060060000060000000000040060060060000000); SDR 8000 TDI (0000000000000000FFC4DE0008000000000004000000000000040004000000090000090200000800 0800000000000004000000A010100112000000009000000001048008000000000000000000000000 0000000000FF46D20000000000000AA0AA0C80AA0AA0A80AA0AA00002A82A84003202A8AA82202A8 2A82A80002002A82A8308AA82A82A80012512A90800105012A82882880000002A800000000000000 0000FF75E20000000000003541542C83543543303541540000C40D50C40950CC0550C41550D50D50 800900D50C00830550408D500014415413208A0801448D30D50800800D50000000000000000000FF 935B0008000004004000004020000000004004000001001001111001000801001000001001001003 001001020000001000000800800C48341002801041040000001000000000000000000000FF0E9000 08000000000AA2A20040AA0AA0880AA0AA0000800AA82200000902A82902A82A82A8000000220010 4002A82082A80002A02302184080002202882888000002A8000000000000000000FF034700000000 0000200010A08A00200A42A00A000000402002882912C00000808802802802802A00812802B02802 92280200000200A000822800112842842000800802000000000000000000FFF80F00000000000000 100132200100020100100100008CC004810C2082C004844000804800004900884D30849004801000 000808900144284B00004800800000000804000000000000000000FF7EDA000000000000301A230C 1803A01941A01A4180000868165060C6246006406206006006006080406116106006556126000006 546124096200026106006100000006000000000000000000FF57CF000000000080432800C0AF28CA 0800C00800800100310302320B10284204B81300300300324100320344350300320200150B00AA08 84104080B203402000001002000000000000000000FF4C0200000000008021104224802D58210320 02020000B00804820C10884200801020800800088800880A00800D00BD8800000C00A0108120C801 004800800000000880000000000000000000FF5860000000000000002801020800800800000A0980 000A601220200A00A88E80E28228220200200060202220200A402002000202003004000001000402 002008000002000000000000000000FFC5DE00000000000010040191620200840000204000000001 8008C1A040084008041800000C0005200000804000000204E0000080120020080460000206406000 000008000000000000000000FF2F310000000001000404A58000C006048000000000000080004400 00060800C400000000800000000281180C0000000108000018458C11170000840106286100000020); SDR 8000 TDI (00000000000000FFF4550000000000000010019208010A9001801001800000600608421600600600 210600600600620000604640000650622E0003420920081043000060460200040060060000000000 00000000FFBB5B000000000000001801881805805801801001808028600600602602600644600600 600600600000702E00A0070070062C028401000014444000600E0800440060460000000000000000 00FF030100080000000000594001980380184180100380002860060060060020060160B610618600 604001E00604670600604E018004404650498090106000006004006026000000000000000000FF0E CE0000000000000018120010218A180180102580000060060C400048010600614620600600600022 600610601600E0160000020A2100000100006040006004006006000000000000000000FFA6F70008 000000000001459000200A204180002000000000000800203001002500080000000000404400200A 00100100002A00003400B0240228100006006000000000000000000000000000FFED5F0000000000 00010135820100000001800040000001030008820000000000400000040010000002820000494012 00000808CC800940C04000800006006800800000000000000000000000FFACD50000000000000068 10000820800800800801810000202624200A04200A00A002502002002000002812012302A0084200 05062B000E0220000002521020C0002002000000000000000000FF74EA4008000004004004154004 40400400400440000101500140040100100521100500100100100100001800000000800000000014 4000001000224400000004001000000000000000000000FF77AA400000000400408D20C20D00C00C 00C00C00800100328308A00300300320300300300310300304200200304254200210102300100300 3003002002003003003002000000000000000000FFE95E0000000000000058010018018018018018 01800000604600601600601600600600620600600000E2060063060140060001144040B424600044 6006006106006006000000000000000000FFCB130000000004002000112102002002000000010000 0048050088488000048008040048048048028048008080048008000000A4004144280D0200480080 0004004804000000000000000000FFE3A6000000000000000A00884800800844A00A000000800002 14230200200008200000200200240000200212280200600200000000000082200000202200200200 2002000000000000000000FFB1160000000000000AA4A20204AA4AA48C0AA0AA00002A82A8240010 2A8AA83382A82A82A80001802A82AA2002A92AA2AA000B08AA8A09008000AA82882A80000002A800); SDR 8000 TDI (000000000000FF4FE680000000000180100188080180180180180180000060000060840840060160 0200000600600200414602600604E00600011200A04210200000E026006000000006000000000000 000000FFFDE00000000000000110A38008210010AB8818AB80002AE2AE0042644462AE2AA2AE2AE2 AE2AE0022AE0064062AE02E00600002008022022600222028E28E3262AE2AE000000000000000000 FF6CC90000000000000050098C0901141001055801800000600640601654E0060020060060060060 04006106206006106006000010040010006004008006006016006006000000000000000000FF1DD7 00000000000012900180C80B00B00180100180000060061561060060060020060060060060000062 4E0CE0062064D600030020C08010E000100046046086006006000000000000000000FFCE34000000 00000000121181280100102100100180000060060040060060060021060060060069040060460060 0620EA06000808008408036B06000006006006006006000000000000000000FF14BC000000000000 201001B20A01201295801A0180008068068060060068068020160060060062000064960060069460 86000104900882800000806046026006006006000000000000000000FF913D0000000004000AB8A3 8408AB8AB8018AB8AB80002AE2AE2AE2AC2AE2AE2AAA262AE2AE2AF0042AE9062AE2AE00702E0002 232221232810052AE28E28E0060062AE000000000000000000FFF1F4000800000000401401855C01 455401801C01800100600600614E00600600700E00610600680000650610600684652E0010031129 06800C0080E046026006006006000000000000000000FFBE9E400000000000555D55815D55D55C45 955D5580015565565565565565565574565565565560045564565565565160060011044D42264001 04556556537006006556000000000000000000FF99870000000000000AB0A3B008AB08108D8AB8AB 80002AF2AF0B64062AF2AF2AA2262AE2462AE0002AE8460082AE31700600022022020A2C41002A62 8E28E0060062AE000000000000000000FF36C2000000000000001001901801001091801801800000 70060060070070060069060060060065000060060000060262D600024800000A0AC4000060060068 06006006000000000000000000FFCDA22000000000002AB8B2000AABA03AC98AB2AB8000AAEAAE60 E004AAEAAE2AA3262AE0162AE5802AE2164C22AE00E086000910A20066818000A262882880060062 AE000000000000000000FF2437000000000400001A0801380180182380100180000060060460A600 600600600E0064CE00680000608E0520060470060000100044862408001160000000060060060000); SDR 8000 TDI (0000000000FFF9F10000000000018018118418858018018018018000006016046006106046000016 00000600600002603600201620600600000220A45000C00200600600000000000600000000000000 0000FFE11F0000000000018090118208038818298018018000006404786006086006000086000106 00E00200600E20008608620600000200202A18420A406006000000000006000000000000000000FF 5E39800000100001801810001821801800401C018000C0600A026006027026026017000006006000 0064060C2016006016148000100280002000046120000000000006000000000000000000FF9B5280 0000008081881140001B13801800001841800000700080E006806007016006000006006000844006 002286046006080008420002022000006300000000000006000000000000000000FF926880000001 0001F019518008898018018018418001017502096004044007106006101807C06000004006001D06 046006100000144002002000006006006400001806000000000000000000FFC6BF800800000101C2 1003800A05C01861A01A01800108F08040600602680608700708080620600000420700100600E806 001010080809002000006406006200001006000000000000000000FFC072000000000001A4180580 1C01A01801C01C018000086003006007007006016807000886006005046406006006016006000000 2000100A6004404106006000000006000000000000000000FF146A000800000001801809932A0180 1801A01A01800000600200600400400628600700000600600000424E08E0062064D6000300050952 04E000014046006000001006000000000000000000FFFD9B00000000000180100180180180180180 180180010070000065360B680603600600000600600400410682680610E806000810284002902004 084006006000000006000000000000000000FFD4C60000000000018AB0A38048AB8AB8AB8AB8AB80 002AE2A82AE4062062AE1062AA2A82AE2AE0002AC0063062AE02610600002040021020200022428E 2EE2A82A82AE000000000000000000FFD85400080000000184100188482180180185180180000060 0000E20600E00600600600000600600400600608600600E086000046106006002006006006006000 000006000000000000000000FFD42E0000000000018AB0AB8308AB8AB8AB8AB8AB80002AE2A82AE0 362362AE2462AE2A82AE2AE0002AC20E20E2AE28622E0002460A228422A00032628E28E2A82A82AE 000000000000000000FF784C00000000000190515584891594B95590395580005565505461161065 565565525505565560045544B605655652645600048A4324D0552004556556536450550556000000); SDR 8000 TDI (00000000FFA1C5008000008000020000400000002000000000000000000000000000000000000000 00000000000000000006010080000000000000000800000080000000000000180000000000000000 00FF913008000000020000000809420040000820020000000008810000000008000090D000000080 04000002480008002404B0000040000048008500000000000000000800000000000000000000FF1A 2A008000000000000000040000000000000000000080001000000000000010040000100000010000 01010B00001000000001104B0100100000000040040000000000000000000000000000FFB9398100 000000AA8AA8A2904CAA0AA8A28AACAA00002AA2232AA2AA2AA2A82220120002AA2AA0002AA00324 22AA00E0020002000002002200002AA28A28A0000002AA000000000000000000FF2D448008000000 011000011540010010010014010000804840004200008804810801001005004003400140A0100400 800000100400410481400200C000000001001004000000000000000000FFFC2D8000000005559559 55001955D55955555B5580015575565565565575564578C60015575565005564B640755654445600 0C2C544434404400556556556000001D56000000000000000000FF8A270000000000AA8308AA8008 AA8AA8A28AA8AA8000AAAB0A2AA0CA0A2AAA2A22AA0002AA2AA50002220B1522AA2A222A0002B22A 2032A224802222CA2AA0000002AA000000000000000000FF95E21000000000010000000480000010 01000001000000400000000000000508020080100100000100000011080000808000010401010012 C080004000000001000000000000000000000000FF00BF0000000000AA8068A300A8AB8AA8B28AA8 AA80002AA0022AE00240A2AA2022AA0002AA2AA0001120020022AA00010200022223648632200032 028A28A0000002AA000000000000000000FFBB540000000000000080098000000000118000000000 0001340000002000000480040000000000004001002D400010800000010010045011010001000600 6000000000000000000000000000FF51278000000000000A00018A00000000018000000000000200 0002D01400000800000000000003001482480000002404B000000801000000040008004604600000 0000000000000000000000FF85900000000000018018000010018018200018018000206006486004 0240060421060000060060000060060260062062060A800621610611041002614000600000000600 0000000000000000FF3D280000000800018118000019219018100018018000006006006006006006 00200600000601600004642650610610601600000608200400000000600000600000000600000000); SDR 8000 TDI (000000FFA9B1000001E01801008001800005281011801800002000440520640628EA060060060050 0010600012008610011200E00080682008A40A1A6080006006000000006801006000000000000000 FF67E300000180180100080180E801C01B0180380000000860E400601E0060064860D620400000E0 000000668081022C680000704010601695E000006006000010006000406000000000000000FFD322 00000180580100880005090190180050184000200864164169465172070060060040000060001201 16000857016001006502810102006000006880006000007000006000000000000001FFA2BA000001 80180100181000180382182A00580000000060860064060061061061062040000160000000062080 06486080006000006006006100006000006000006000006000000000000000FFBF29000001800000 00000180000000000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000006006000000000000000000000000000FF5FAF000001801000000001 80020000000180000000000000040000000000000010000000000000000000000040010000000000 00000000000000000006006000000000000000000000000000FF32A8000000800801000801200800 80080020100000000020020020060060070020030000000020000000020024020040000108040020 02002800004002002000002000100000000000000000FFD735000004000000001400001000000001 20000000010000000040000000000040048040000000000000004050000010000000000000010008 00000000000000004000004000000000000000FF2049000000800800000C00800800A00800800800 00000020020020020020020030020020000020000000022030020038000020001820020020000028 02002000002010082000000000000000FFD0BD00000180980182300100320380B88182B88808A180 608E00602E08E28E88E0060042000860A002008600408700E2080268050070078260A000E0060060 00004080004000000000000000FF6797010002000001101001001000200445001000000005000100 400444404404404400400040441000000541044014484000D0044100005104100040001100000040 10004000000000000000FF002E000000800800804800804800810C80850880104101301280205000 0512000000802400002000040082C16143002400002000C128028020000028021120000030000020 00000000000000FF0D4F0000000000000806000000020000240020100100020880000001AA80200A 80208000002802A80000000000001400280410000000004302A80000000000000008840000000000); SDR 8000 TDI (0000FFFA48000001E05001012E0D808881050811801800000004680600600400600E80E406000126 006004006006006007002026116016086006800005006006006000006006000000000000000000FF 25B8000001A0100100020980608100120180100000000040000060060060060061070060A0006000 0000060048078040000048400C6886806000806006006000000800002000000000000000FF6F1400 4001001801052001E0804101100D8110041000004102106106017006006406407140006004110017 C04806004020004800046806016004006816006001802000002000000000000000FFF54A000011A0 5805010003800401031005801000000002400100600600601600E487004000006004000016104016 004000114052032C02806004006006006000002800002000000000000001FF1D2D00000100180100 0401A00209401441801000000042400284620E20600600601604500801600100020600CC072442D0 015008006406106001006006006000002000002000000000000000FFA7A200800180180100000190 8001201001801000000000400010600640600600601704000000E000808006014404246040004004 00000210400000400E006000002000000000000000000000FF130800C001801C014508098888510F 149981103810000460200064160068060864660001403E600010019680401C086100004064244006 004001004006006000863000000000000000000000FF3228000001801A01000011A00001901923C0 104400002040C004610600E00610600640201040600400020720400510621000C80C400203014004 004006006000002001000000000000000000FF6B8D000001801881000C01B0480180181180100000 00806000006006806006406806002100006004000006100004006000404006404006004004004006 006000002820000000000000000000FF5411000001C638098C000188800120300180180000010044 00606407607246007006002000816008000006604077007000006200002401106000006006006000 007000004000000000000000FFB4C4000001803809880511808003C0390180180000000040020260 0602620602600600200910600A100006004107006000006400006004007802006806006000406000 004000000000000000FF57E8000001C0188184090800480100130000180000000060020260060470 46226006002890016000000006004806002000407000A02001006000006800000000206040004000 000000000000FF11EE000001805A01800808020905841954101840000000641300F3460060872060 360020000060001000164040D6043880006502006104006000006900000010006000204000000000); SDR 8000 TDI (00FF04B300000180100900194589380B800881905820000041628E90614602608E81648640008620 60800060060271005300A70068860060A6554008006006206000016046540000000000000000FF36 B4000000001401000A01800801000801A01800000000600600600600600600600600000600600000 6006006802002006006002002006806000006006000001806806000000000000000000FF43AB0000 00041801815C10101805800550445C40000000600600601700600600600600000600600000600610 68070010060060062060068CE00000600000600000700E020000000000000000FF5F7E000201801C 01801800105A01800C00003800008000781600600C00782600621600028600608000600600640600 20060A60860021260244A0006000000000006086000000000000000000FFFE99000400001801800A 0180080100C809B11C00022000622700652700E217006126000856016448806106006046A0254E00 4004086006806008806006020000006006000000010000000000FF1E6F000001801801800801800A 0100081180180000000260062AE0A60860060264462800260061000A600E206086C828063C480C40 2006044140007006006001006016040000010000000000FF289D000200001601001C019058018146 01913800054000625600655601645600611600055601645400610680644400655600690610414411 4414004006040000006086000000000000000000FF3737000001819001010801800801180001C018 00000000600600600600600600600E00100608600600600600602400600600700600000408600600 4006006000006006000000000000000000FF00CD0004000210010038018018038008A98238200000 02600655612C10600604600E48002600600104600F48688500600708400C00400500400100480600 0001006006000000000000000000FF9B750000018010010008098808010008018018000000006006 0060060060060060060000060860041060060060460860064040040000040A400400400600600000 6006000000000000000000FF181C0000000010010008018008010000018018000000006006006006 00600600600600000600600000600600600400200600400400600600200000600600000000400600 0000000000000000FF9E5E000001801401000801C008010004018018000000006006006006006006 80600700000600600400600700680400200600500400280600000400600600600080600600000000 0000000000FF536F0000080010052008018008010008038018000000006806006006006006006006 00000600600400601610601400200600600601648700200400680600000000480600000000000000); SDR 8000 TDI (FFC1320003542003502401542902D232234435040000012D0900550D51550550550D505108005508 00800D50D50450540000D40210A30C40D50A00C48D30D10800C10800D50000000000000000FFBC93 000C0040040040420042240040040040020000000010090010000010000000011010010010010010 01001011000001800001101108001401001001000001001001000000000000000001FF85CC0008AA 0880880020A20400000000A20A80000000800010AA82A8AA82A82A82A82000002A80000002A82A82 202380002A0800080220220220A20288288000000000220000000000000000FF6A74000200A22C00 AC0810A00A80A20C10C0480000004108200028020008008010001308020028008028028028129028 02012482A2A812802800112822822801542800900000000000000001FFED1D000200201245210201 2CA2542934012010000000924B14004800004804804804800004804C400048008009050040000000 50800880914800004800800001010004810000000000000000FF8DE6000001933801841823011841 84114188380400000060068060068060061160064200060060400061162060262CE006426A0E0461 0644C010A2630600600008E002288000000000000000FFECE3000400C00488510800D40C8AC92C04 800800000028214A20310200210300329200100300311120320311231200354B80B1034134120033 21003003402001403042000000000000000000FF4813000200290221250043200280280201204000 00008088144A0301224280000080800000800880408800A20C28800038000000800C10CA08308008 00800000888004810000000000000000FF31AD000020921000002A00000800801840429800000000 680A00600308200E0064060400A20820000026821028401640020324020720028060000440020020 00202002020000000000000000FFA8D002000180A01800020184A000130005800020000028034100 10080011012292304200002200100000204900904805C08013804080000401800005860060000060 C0000000000000000000FFCA480000018040000280A599007C000181A02000000110088100008000 10001000002000000001400000000008012182000000300003A08184484200066060001160207800 00000000000000FFA96C000001841101181000001103845002181884000040602680602480E02681 610E00800600600000611E00E3000020064C40040860062040008060000000204062060000000000 00000000FFF242040220333221355A00201AA1AA04020298800000906046026C1648EA2644704E04 884694680080EAD6C8E230800A168C4A24930C040068A0046880806040B06A860000000000000000); SDR 8000 TDI (D27500080000281980395200980181980001180180800062060060060460C60260560005062000A0 2060060160860060060040001600040EA00000A00000E006002006004000000000000000FFBB8F00 0009810905801004021001801829021801800000600E006004006006406006000026400400006006 08640604E006004000010146016410022004014086002406046000000000000000FF772E00080990 80000800218240200000318500000000000000020000040240200050000540000400006000090400 150020000000000420000430000006006100006040000000000000000000FF21CA00000180000008 01138000240000038000000000000004108000000000000000000020000000006500510810800110 800900004000820000C40006006000016000800000000000000000FFC80D00000080090482293100 880080480100180480800060122160020060860220025400022800100028028020126A4800012414 112112006000440002002002002400044000000000000000FFC1C340098840140144050448040040 04004004010001001001001001001001005005061001101001001000000200018000000000000000 001000444000001001005004000000000000000000FF7ED8400000C00C00C00C00C00C22C00C02C0 0C00800100300308B003003003003003001003401001003402003203102103003080002003043001 002002003003003001002000000000000000FF574C00000980100190385108980180180180180180 80006006406006006086046006000046000000006106316016224014004004006006004000006006 00600600C002006000000000000000FFBC3C00020020120124001120420020020120100100000048 90804800004804004004808804800C00800800930905044800804084A28A10004800804840840005 004804814000000000000000FF8C7F00000080000008C8008D080080081080080000008000020020 0280000000000010000200000800200200204A112006002810082142002010002002002002012002 002000000000000000FF66160000AA0AA0AA0006A20100AA0AA0A20AA00000002A82202A82A82A82 A8AA8AA82200002A84100002AA2122002410022A9320040000AA82002A82882C80002B00002A0000 000000000000FF46310008000AA00211240000200000801000200000000004410000000010010000 000200000002220000000010810010000090C0100110000022080000020000120000000000000000 000000FFB4360000AA0AA0AA0A80AA0800AA0AA0AA0AA00000012A82A02A82A92A82A92A92A82280 002A80000002A84C02A02880002A8228208240AA80082A82A82880002A00002A8000000000000000); SDR 8000 TDI (3C0000001008018008098C1945131008801801800000600600640600600600600600000600000400 400641600602610600A000106206012084006042004006006006454000000000000000FF3A490000 0182C801820801809801001001801801800000600600600E0060060060060000060004000063460A 60062960360820300160D6086240096006006006006006086000000000000000FF50F1000000200A 018B0A11921801213000A018018001006006006006007006006006000006000800004A4634608691 680E002000026006012010006022004006006006004000000000000000FF528A0001018008018028 0180B801141011801801800000600680600600600600680600000600000800609601600600614600 2B24108004906000804006046006006006806000000000000000FF09BD00002A0AA8AB8008A38418 AB905AA28ABC0180002AF2AE2AEAACAAE2AEAAE2AE8002AE2A90002AE006C0622E2262062AA00C20 02AC2238002AC28A28C0072AF2AE004000000000000000FF70C0000801800821801C018418034014 01801801800080600600711700680700600700000600004000700680600E00611600200604848510 2041014046046006006006006000000000000000FF8EE5000154154955853D5590BD55C31D449558 018000556556D56557556557556D5700055655000C55625681654E556336552C0608855454201555 4532554006556556804000000000000000FF644000002BCA9C898048B388982800B0A3CAB8018000 2AE2AEAAE2462AE2AE2AEAAE0002AE2A90022AE32E4962A6A8D04628AAC010404E22D00232628E28 E0062AE2AE806000000000000000FF198C400000401C01F01801E018000012088018018000006006 0060068060068060068000060000000060860C600600600600213022400600C00000600200400600 6006004000000000000000FFAB4F0001AB88D88D9508A2005B809418B20AB80180002AE2AEAAE024 2AE2AE2AEAAE0002AE2A80202AE00604600E042406262A10480006004000A262882880062AA2AE80 6000000000000000FF2C90200000201A01805A10003840A11801001C018000007006006486006006 006006000006000800006046A5628620222601214003020E01480001604402200700300600000000 0000000000FF20B900000002282593080193180C125009801801800000600600600E006006006006 0000060000000064960860260A809610000A2041464A604008600600000600600600600000000000 0000FFC28100000188280190380180D840803800801803808000620604E0060064860460062A0006 0000B020700700611628104601041200420E10604020E002002006006026004000000000000000FF); SDR 8000 TDI (800000101843821850008800801091091800080088680200E0268C600602E8060068070060000021 0608640450620600610403001021442850201400C000000006022000000000000000FF1C10800045 801801901010020808801001001800000002600B00600408680480E00600600610E0000020860063 24106106006000000008014000422004004000040804002000000000000000FF3D58800000001801 811809840852001001601800000008700F00C0060060060060060060060060018060560164440060 06004000004010000000402004004000046006006000000000000000FF7A1F800801C01801805003 800820003001001800000004700698480710680501700600600711600004692F0060046165061442 0400400001000004A004004000006006006000000000000000FFC7F4000044001805101845801800 80300100180000010060020068078070070070060870A78060040060060061040C60060064042000 80084004016004004000017006000000000000000000FF8F84000801801801085809801840001011 00180000000060060040060068060060060060060064000063460A60040960361060000500003062 10016024004000026006080000000000000000FF3BF0000100441801011001801804801001001800 00000068030060040060050070060060060060100068074160040041060560080800040060801460 04044000006006450000000000000000FF793300002B88F8AB1610A38AB8880AB0A30AB8AA00002A E2AE2AC2AE2AE2AC2AE2AE0062AE0060802AE01E0062AC2642063162B42002AC16E00024628C28C2 A828E2AE400000000000000000FFBD770008800C18010AB0018C1900121000001800000000600600 442600600400600600400600640000600E0060060040060020100062C60140000860000000000060 06204000000000000000FF622200002B8898AB00D0AB8AB8B00AB0AB0AB8AA00002AE2AE2AC2AE2A E2AC2AE2AE0042AE0064082AE20620E2AE28C0AE20222420E2AE21420828E28C2AC2A82AE2AE0AC0 00000000000000FFE72E000054015955001155803844013154155954000055655655409655655455 65560045560060845564864B65563563564D24445560165464C444E5505105505565561540000000 00000000FFC899800101841801001001801804000001001800000000600600400400600400600600 40060061000061261460060064060420800C60060061000060440040000060060040000000000000 00FF91D50000AB8000AB88A8A38138190030A38AB8AB80002AE2AE2AE0A42AE2AE2AE2AE0002AE00 00E02AE04E0062AE00620622238022600622600022628E2EE2AE2AE2AE006000000000000000FF8E); SDR 8000 TDI (000000000000000004808C1000000000000000000C00000800000000800000000800000000040000 010000110100000410000110108000000400000000000000050000000000000000FFC38F90802A8A A8AA8AA8A288286480482A8AA80000012AA0222AA2AB2A82AA2A92A82AA2AA2AA00028A04A0022AA 202206222003A0220225200022A0AA0AA00028A2AA202000000000000000FFBA2580080000020100 0001000025001000401400000100500080801100481100480400480400402000012014109000C400 00008490001000400004800000100000410000C000000000000000FF6B5980005595595595595511 1911049955F558000000557906D57556556557D565565575575565085564864B6556406354446096 4D7556406500546556156800554556554000000000000000FFE16100002A82ACA80CC8AA8A290885 08AA8AA80000012AA2AA0A24022AA0222AAAAA22A2AA2AA2802AA20220A2222220AA2AA220A2A222 2022803022AA2AA0002AA2322A2000000000000000FF73DD00810000000000000102400108100000 020000000004280000010048000000000008000000000000080008000B0000088224000000100010 010000200000004000000000000000000000FF1E2500012A90088D0008A20108009040AA8AB80000 002AEAAA4021422AA5022AE2AE3242AA2AA0022AA01A0022A230C2002022B02A23221540422022AA 2AA0002880022AE000000000000000FFDE070000018940000000098500000C200100000000000000 0650820400020800000010000000000000600001001012010000801000408C000000130004004000 026110000000000000000000FF7E2D80008184004413400190214C00800180000000000000000401 280000C00000000100000003200063402A00000000300C0000010000330320000006006000006440 000000000000000000FF675C00000190114100190000304180380100980208200070020060040463 2E0160060040060060900020060064040C200E00600200030010408020400C004000000006006000 000000000000FF43A300000000180100384402180080108B001800000010600200620E1060060064 0600410E00600000200608602C002006006016110008404400144104004000000006006000000000 000000FF71C2000001801885043891830800811003101800000000600201624E0060861462060040 8E00600800610600602C426466006106044244014050006004014000006006042000000000000000 FFCA1E00000000180501504380282400B001001802002010600601400600622C0860061041460060 8004600601600405640E14600A4841A4184080026084004000016006002000000000000000FF12DC); SDR 8000 TDI (00000C01111800101801809C018000000008000006046506006016006000406007404300800A0200 700214000400403080680600028A020004000010000006006000000000000000FF7DA20000018808 01041800001001801801800000000800000608E04641600640600000600600404000014200E00A00 2012002002102006204002000044400000100006006000000000000002FF2E720000018000000000 01800000000000000000000000000000000000000000000000000000000000600000000000000000 0000000000000000000000000000006000000000000000000000FF87D40000018004000000018000 00000000000000000000000000000000000100000000000000000080600100000080000000100080 0001000000000000000000006000000000000000000000FF0EE80000008008010018000008008018 01000000000000000600200600200200200000300300400000200600000200100000200200280200 2000000004000000000002002000000000000000FF9ECF0000000010000004010000010000000000 00000000000000500000400400400000000000000080000000100400400400080400000000000000 0000000000004004000000000000000002FFA979000000800A00200800A00800800A008000000000 00000200200200200300200000200200200000200200280200200080280280280200200000000200 0000802802002000000000000000FFBF1F000001C01001801F050018018018018000000000000087 00E88F08E08E20600000680680600000600502EA0420782400E00C80600780400800000600000000 400A006000000000000000FFB91C0000000010012010410000010011050000000400040404444444 444044004000004004004000100544004804000804000C0481081000400000000400000000480400 0000000000000000FFF783000000800C00800C00A008008008008000000200000000000001000000 00000000200200200000200300200220600081220001200200201000000200000000200080200000 0000000000FF2F740000000000000000A000000000000200000000000202802282A82A80A8200000 00000000000000022004840000002000000800000000000000000000000000000C80000000000000 0000FF251C0000002004000000020000000002800000000000000000800000000000000000000000 000000080081000001000000000000001008800000000000000000800000000000000000000000FF 60041000800000000000080000000540804000000001000088000000800000000800000000800310 0003402A0000040030088120151040040308100000400000020000080000000000000000FF497800); SDR 8000 TDI (005801401901800C01805801800000000000000600700614610681600000600610600000610600D0 06302001004070804042006000080406000000006006004000000000000000FFA637000001821801 001801800801801801800000000000000600610608600600600000600600400000E0020000041034 8002510A02680600E000000006000000006006004000000000000008FF5464000000021809001801 902C01929805800000000000000E00600600600602610008608620420800680204030C0222528070 02026107006000020006020000006006004000000000000000FFCBDF000001845A01003801800801 80180100000000000800060060061460060460800861060861104060058040800870540040520060 06806000000006000000006006004000000000000000FFE820000000081A0121BA01804899845A01 000000000008001620680600620600600002600680608020601D084C700464000061820077470660 000C0006040000007006004000000000000000FF12E3000001901811001901881901911C05000000 00000000064060060065060160008460062042010061001240040070020060060240020060001004 06000001006006004000000000000000FFCCE7000002001801001E01801A01801801000000000000 18060060068068078078000061060040000060000040044078042040040058820060000000060000 00006406004000000000000000FFA638000001C01801801801800C01801801800000000000000600 60070070060060000060060060008160070060040020010040010060470060000000060000000060 06006000000000000000FF68BE000000401801801801801801801801820000000000000600600600 600600600000600600600100600600688400200008620210600600600000000600000000600600E0 00000020000000FFD863000001A01A01A01800000A01801801840000000000080680680600600600 600100600600600000080700700420200228600308490000200000000600000000040600E0000000 00000000FFDF7F00000000180182180008B801C1180180000000000001161562B620601600608040 60060062200002A70A60844200018050131040008024880400060200100000060060000000000000 00FF6B23000004000801089803800801C818018000000000000006006006006006006000006386A0 4080216002006924082001006406004042086000000084200001006006006000000040000000FF6C C1000001C98807401805815C01901801800000000000111760701600E00620610000650600400040 6002F4E14C40080C18482600400231A000000124040000086006006000000000000000FF27220000); SDR 8000 TDI (18018118000009018018018400000000000006444016006046006000001006000000000407006004 006042804000003202026000000000000000000044000000000000000000FF41DB00000180180180 18000000018018018000000000000006004006006006206000000006000000000006006804006802 00680000300008600000800000000000080C000000000000000000FF10AA00000000180180140180 0C21801001808000000004000600400E006006026000000006000000007807006802006002006000 002000006008000000000001006004000000000000000000FF7C94000401A0180180100180000180 1001800000000008808600421600600648E28008000E00008908600620680A80788A204801202423 006000008800000000006804020000000000000000FF0CF9000000001E01801801A00841801E0101 000000000400060040060060060240000000060000000060060060060060060048060020050A6010 00800000000000600C000000000000000000FF92AF00020180180181100982082180900100000000 00000206004006006206024000000006000000006006006006206846006006002804006000000000 000000006044000000000000000000FF7037000000001801801801C000A180980102000000001102 8622400E00622612C50008000E00009088680700700E00610E007004C02024006000010000000000 006004020000000000000000FF8FA600000180180180100982000180100100000000000000060044 06006006004000000006000000006206406006406006404004002004006000000000000000006004 000000000000000000FFB14600000000180180100180000180100100000000000000060060060060 06004000000006000000006006006006006006006000004000006000000000000000006006000000 000000000000FF1181000401C01801801401800001C0100100000000000000060060060060060040 00000006000800007006007006006006804000004800006000000000000000006006000000000000 000002FFD776000000001C01A0100180000180100100000000000000060060860060070040000000 06000000006006816006906806004000844000006000000000000000006806000000000000000002 FFD0F2000281801B01A0100180000180160100000000000000060060061060060040000010060008 0000E006006006A060060060D000400101600010000000000180600600000000000000000AFF742C 000001C41081001E01800801C01A0080000000000000060060060060060060000070068060000078 06005006003501046002004802006000000006000000006006004000000000000002FFDFAE000080); SDR 8000 TDI (880AA2A20982AA0AA0C80000000000000AA82A82A8AA8AA82A80002A82A8280000288A202A02000C 8010080040280280A000000002200000002882A82A0000000000000000FFC6A3000200B10A42A008 00A20800C008028000000001000000802800000000002000000802040000802112812802A22C5304 2C00842840152000000000000000842802008000000000000000FFF7080003002012012000112032 0140044100000000000008048008040048040040008008048100008408048000CC800880A090AC80 880C004000000088000000804800800000000000000000FFE5C5000001801801841A230210018C19 1380000000000000060060068060063160000000062000000062060862AC2862AE00E0C402E2B4A3 6000000048000000084006000000000000000000FFBEBB000404C80C80D00800D14CC0C00C208000 00000040010310210300210380220000100200000111200322280304B0034A321120300100200000 090000000000340A000000000000000002FFA7770002283012030224C22010482022210000000000 400200000104800325400400800800808000A00804049380220058850D94C08B98A0000000100000 0000100810800000000000000002FFA8D2000000800000000C010808218008000000000000000126 10200208600A00400000000200000000202200301600240202200004204400200020008000000080 4202000000000000000002FF1A6C0000018081804800018644801000000000000000001001089080 021000080000000000000000016409400025018A0020826828042001000000011000000080640000 0000000000000000FF0A010000018220000400259001000000980000000000001000201000001800 0082000000282000000070800008004001001000000100000E80000000000000002860A000000000 0000000000FF895D000005801001101A0001B8018E19458000000000200086006A06A06006316000 200206480000180A061044421C600448200000400040600000004800000000000400000000000000 0000FF416C0002282492012A1800204C01B21D518000000000400AA6A065062C6236A06000400836 080000900246814202ACEA04C8D0A8A95012C06000000080000000800844000000000000000000FF 1364000201803083003B45950B29805801800000000000000611600600600610E200000206410000 206917004146806016044202005322156000200808000000D06504000000000000000000FF873600 02000010010010018000018010018000000000000006006006007806006000000806000000006006 004004006006806003804000006000000000000000006004000000000000000000FF9DF500000040); SDR 8000 TDI (00214180000000000200000000000000000000000000282000000000000000100064002100000200 30000010148040008000000000000000006000088000000000000000FF8773000001800000080001 8080C00000000000000000008010000080000008000000800900C000004168008208080008409008 10820800800000000800000000006800000000000000000002FFC4D20000028111100008B6000851 8018010040000000006002002002002006006040000002000000002102002082A0208211C10220A5 22500030018100000000004002000000000000000002FF06890001AC400401400409400400400400 00000000010010950050050050010010000000004000001800046080600000000002000040480000 01000020000001000000000000000000000002FF4D20000000C00C00C00C00C10D20C00C00800000 000100B0030030830030130030010010030000000030030030020031030112134130030020010010 00000001003002000000000000000000FFB225000029801801901955001801801801800000000000 610600600600600600600000008600000240E00604C11620604610400604400E0040200100400000 00006006000000000000000000FFEB92000280205201200011248401201201000000000000480480 48040040048050000008048000008000C408480090004900D0310050A0CC40008008000000008448 00000000000000000000FF2157000000800800800A008808008008D4800000000000000000000080 000000000000000200000204201204A1520022822C00023200020120000000000000000020020000 00000000000000FF37F000002A0A80AA4AA0A21020AA4AA10000000000000012A92A92A82A9AA92A 80002A82A82A8000288211A5020022AD501402800583180000000002A80000002882A82A80000000 00000002FF8855000000052000000008020400000000000000000000000100100000000000000000 00001000000010008080800880801000801400400480000000000000008000000080000000000000 02FF698F00012A08A0AA0AA4AA0000AA0AA03000000000000002A82A82A82A82A82A80002A82A82A 80002A82A02802C82A00002103082002002A00000012A80000002A82A82A8000000000000000FF05 B10003542803543545442821543545140000000000800D50550550D51551550000550D50450000D5 0550540C50C00C40C30C11410C90C80000000548000000550D50540000000000000000FF9EEB0004 00440400000000434400000604000000000000000000000100000080100000100100000100000000 1001011001001021101041010001000000000001001000000000000000000002FFF63400002A0220); SDR 8000 TDI (0811941401A01A0100000000008060060060060060060070000000060000020020060060C2046004 21000600A088006000000800000000042000000000000000000000FFDF4400000180180180080181 5001801801000000000000600600600600600600600000000680000200680600280C0960128C4094 906802006000000000000000006004000000000000000004FFAB190000AA2ABAAB8ABEA3801CAB8A B8AB0000000000006AAEAAEAAEAAEAAEAAE0000002AE0000002AA2AE2AA204A462A2104A26226222 2AE000000000000000A8B2AC000000000000000004FF3E82000001C01C21C2AA01831201C05C0100 00000001006006106006006006006800000007000000006006102005106102014006006046006000 000000000000006104000000000000000000FF4C9A000054555955D55955B15955D55D5500000000 0000655655655655655655600000055700000051255655244400E452416444546546556000000000 000000552554000000000000000000FF8EF400012B8AB88B8808AB8830AB8B18A800000000000072 AF2372AF2AF2AF2AE0000002AE00000028F2AE22F02602E22312132D2A92022AC000001000000001 2CE226000000000000000000FFD3A8000080201E01800A01A2100180180100000000000078078078 0780780780600000000600000004300600708F307083041897010012004000000000000001802006 000000000000000000FFE2C60000AB8898898018A20098AB8038AD00000000000062AE2262AE2AE2 AE2A60000002AE8000002C8AAE226D16E06A1AC80286A201162A8000000000000000288234000000 000000000000FF35B2000000001803A2B810001C01A51A05000000000000600610E0060060060160 0000000600000000400601620E00610220A00408040600000000000000000004510C000000000000 000000FFD66B0000000450210808018C300188180180000000000060060060060060060060000000 060000020460061040C40AE04404004A0120B4002000000000000000006004000000000000000000 FFFD2200000181115500581580180180180180200000000060060060060060064060000000060000 00012006444015016004010000102024012028000000000000002004110000000000000000FFA0BF 000000181021001800001801809805800000000000600601E00600600608E0400000060000120080 0602400E00E1C4002710002018006020000000000000000004000000000000000000FFFECE000001 80500100114000182981180180000000000060060060060060561160000000060000000043060140 06046014100002032500306000008100000000004004000000000000000000FF18A3000001804004); SDR 8000 TDI (45801001801801800000000004000628600600600600640600000600000000400010600004640600 2008102043004000086006000000404006000000000000000000FFE888000001805811C018818014 01C0180180000000000010068070070070070060070008060020100040000061500060045820A241 0002006000006006000000005006000000000000000000FFF3438000C0000801901801801C018018 01800000000000100600700780700600600600100600200000500000700600610E00214600400200 4000206006000000004806000000000000000000FFD5CF0000018008018018098010018018518000 00000000000680600600600600600600080600000004400010600E40E09600210010602203400000 6006000000004086000000000000000000FF9D8E000100000801B33801801A01A019058000000000 00100600680600700680600700000600200000400000E14214600601201000210208400000600600 0000044016000000000000000000FF177600002B8AA8AB9018A38AB0AB8AB90180000000002A82AE 2AE2AE2AE2AE2AE0060002AE00200028C2A82363520062362A232632834A30400000600600000028 C226000000000000000000FF884A0001000028018AB8019010018018218000000000000006006006 00600600600600000600400002000000E00600608E30022000A00200400000600600000000000600 0000000000000000FF1CBA0000AB8AA8AB8098AB8AB0AB8AB82380000000002A82AE2AE2AE2AE2AE 2AE0060002AE0060002AC2A82A620628E3262202222302122060000060060000002CC2A600000000 0000000000FF152A0000541309518019558151559559158000000000550556556556556556556006 0005560060005105505464B25364460101125404525460000060060000005504C600000000000000 0000FF72EE0000018000018238018010018018098000000000000006006006006006006006000006 00600000400000600204600611001000200204E000006006000000004016000000000000000000FF AE730000AB88B88D8AA8A38410AB8AB88900000000002AE2AE2AE2AE2AE2AE2AE0000002AE000000 28E2AE2262260062240C000622232423600000000000000028E210000000000000000000FF9CA600 00000018458008099250018018030000000000006006006006006006006000000006000000022006 00600614601440002401200400E000000000000000022148000000000000000000FFC3D000000182 1801800801809001801841000000000000600600600600600600600000000600000000600610E092 40E10402A48C082088106000000000000000006000000000000000000000FF8CF2000000001801A0); SDR 8000 TDI (10020120100000000000090010050050050048048040040010041040000008000040100001041043 04104144040000004004000000000004000000000000000000FFB905000155931113D55955155B55 D559558000000000001D5755655655755755655600155654C00055600055640E5565144D42444445 4C546001556556000000157552000000000000000000FF4DC200002A80888A8AA8AA8088AACAA84A 80000000080002AA2AB2AA2AAAAAAAA2AA0012AA0320002AA0002AA0222AA22A23204A04220A20A0 002AA2AA0000002AA2AA000000000000000000FFE58B000000002021001000000001001000000000 00010000048000008000000040000000000040000010000000200000240040880880000000000000 00000000200004000000000000000000FF513E0001AA9458A80AA8A30648AA8AA900800000000000 02AA2AE2AE2AE2AE2AA2AE0002AA4020002AA0002AA5020020002220864160261220002AA2240000 002AA2AA000000000000000000FFE3F6000001912002000009900000000141000000000000000000 00000000000000000000001100000040000002101001001002400884001000000000100000000040 00000000000000000000FF0E85000001820000000001812000000014000000000000000000000000 00000000000000004200000060000000C04484280100102400902080000001000000000060000000 00000000000000FF7F8A000001904810001800001801841801800000000000040600600614600650 601600000600600000410000600C15614611400009208E0000200060040000000040160000000000 00000000FFE425000000000840021900011805801801800000000800000604630600608604600600 00060064000040000160042060040040060000061101000060040000080040060000000000000000 00FF73F9000001880808021815801801801801800000000000000600608600600601600E00000640 620010408000E00A00602200410608048E04000000600400000800440E000000000000000000FF4A 8B00000400082000184980100382180180000000080000061060060A600628600600000600400000 4000106000046002004000112006088080506004000000004206000000000000000000FFCB5F0000 000058018018820098018018018000000000000C0602720700610603600600000640200008400000 6000556102092102014200024040006006000000004006000000000000000000FFDA5F0001418038 09901804001A0180180100000000000200062060060068060062060008060020080048000070A800 6310202010206023006000006006000000404006000000000000000000FF2C040000040018018019); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000002FF098F00000180000000000180000000 00000000000000000000000000000000000000000000004000800801000000000000001000000000 800000000000000000000000000000000000000002FF469200000080100000000100180000000000 00000000000000000002002000000000000002002000006004006002806002004002804002006000 002006000000000002000000000000000000FF4F4400000000060100000000000000000000000000 00000000000004004000000000000000000000000000000000000001800800000000800000001000 000000000004000000000000000000FFDCBC00000080080080000080080000000000000000000000 00000002002000000000000002002001802003002002802002000002000002002000003002000000 000002000000000000000000FF453000000180180580000100180000000000000000000000000000 0E006000000000000006006000224A0D00600608600728D007806006024000006006000000000002 000000000000000000FF218E00000000100100000100100000000000000000000010000004044440 00000000000004000000804104004000805004804100004840004000004004000000000404000000 000010000000FFE16800000080080080000080080000000000000000000008000000000000000000 00000002002000002802002802082002510882802043020000002002000000000000000000000000 000000FFD42C0000000000000000000000000000000000000000000000000209A200000000000000 00000000220A90000800000000000000000800800000000000000000000204000000000000000000 FF0F7F00000000000200000000000000000000000000000000000000000000000000000000000000 00000000800001000800000000000000000000000000000000000000000000000008000000FF3202 00008000002240000800000020040000000000000000010008008010010000000010000100002000 000001204480880100200A0088010001000000000000200800000000000000000000FF50E4000000 04000000000000020000000000000000000008000000000000000010000000001000000000010000 08100040000488010000100000000000000000000000000000000000000000FFA5E800002A88A088 8AA0A28AACAA8AACAA80000000080002A82A92A92A82A82A92A80002AA2220000AA0012AA3020022 022A00002002202320002AA2AA0000000AA2A8000000000000000000FF332B000000001021001001); SDR 8000 TDI (08000000000000000000000000000600600000000000000600600142640604E00E0462A62B3404B4 120C000000006006000000000006008000000000000000FFD6490000018058018001018018000000 00000000000000000000800600600800000000000600600044240000601600600604080600C21600 000000600600000000000E000000000000000000FF5ABC0004000018078804019018100000800000 000000000078000206006000000000000106074000002000206207007447C0014E40400408000000 6006000000000006000000000000000000FF2779000001D01A019040118418000001000000000000 0000000805061060000002000000060060000008004564060261061122170A400410200000600600 0000000006010000000000000000FFB66A0000002018018000018018000000000000000000000000 00000600600000000000000600600080200000600600600600000F00400600200000600780000000 0006000000000000000000FF7902000001C018018004018018000000000000000000000000000006 006000000000001006006001002003006006006007000004005006E0000000600600000000000600 0000000000000000FF2C2B0000000018018000018018020000000000000000000000000006006000 00000000000600600000000200600600600700080500500400000000600600000000000600000000 0000000000FF91970002018018018000000018040000000000000000000000000006006000000000 00100600400000200100600600600600201400680500200000600600000000000600000000000000 0002FFE154000000001A0180C6004098140000000000000000040000000007006000000000000006 106401002C4002640600F04630188C256407312000087006000000000006000000000000000000FF 5ED200000040102100000982188000002000000000000000000000A7006000000000000026206001 007804A06003A0628E82422408202C006280006006000000000006000000000000000000FFD9AD00 00019810410000318519000000400000000000000000000006006000000000000006406000026004 04E006026106004404002006006000006006000000000006000000000000000000FF396500020000 100100040040180A0000000000000000040000000146006000000000000046106400006447406406 4172474A4944911456D14200007006000000000006000000000000000000FFFA6F00000180100101 20400018000000000000000000000000000006006000000000000006004000044006016004026016 006014220004004100106006000000000006000000000000000000FF824A00000180000000000180); SDR 8000 TDI (00000000000000000000000000000000000000000018060060008020040060060044140008200068 44002400006000000020006006000000000000000000FFDF7D000001801801800001800000000000 000000008000000000000000000000000000000600600000280C206006004002004A2280E8000020 00446000020000006406000000000010000040FF7CE9000000001801800001800000000000000000 000000000000000000000000000000100600600000000400600600641200404600604000240008E0 08000040006006000000000000000000FFF43C000001801801808001802000000020000000000000 00000000000000000000000000060060000000040060868160640000048060040020000060000000 00006006000000000000000002FF14A000000000180180A001802000000020000000008000000002 0000000000000200200006006000803214406006006004000C240168040020000060000200000060 06000000000000000002FF8FAE000001801801800001800000000000000000000000000000000000 00000000000200060060000020840060860060020040060060000020000060000000000060060000 00000000000000FF3796000000001801800001800000000000000000000000000000000000000000 00000000060060000040060060060060040000000000040000000060000000000060060000000000 00000000FF3F6B000201801801800401800000000000000000000000000000000000000000000000 00060060010040070060060060030048020000010000000060000000000060060000000000000000 00FFA82D000000001C01800001800000000000000000080000000000100000000000000000000600 6000006806006006806802004002800000000000006000000000006806000000000000000000FF64 D6000011801301800001800000000000000000000000000000000000000000000000000600600040 6806006006006004000000000204000000006000000000006806000000000000000000FF02950000 09801801800001801800000000000000000000000000000600600000000000000600400100400700 6006006006000005800205002000006006040000000006000000000000000000FFBAF00000001018 81804011801800000000000000000000000011090610601000040000010601600020600600600600 6007000944011006002000006006000000000016000000000000000000FF99300000018018018000 01801800000000000000080000000000000600600000000000000600600100600600600600600600 0004000006000000006006020000000006000000000000000000FFBBB00000000038018001018A18); SDR 8000 TDI (00000000000000000000000000000000000000000804AA4000894904804A84804800C4C80500080D 094000804800000000004804000000000000000000FF7B0200004184100184002100000000000000 0000000000000000000000000000000000000600E00022420600E08E02E00640600C24E006224000 006000000000006002000000000040000000FF9A72000400C00C0080061480000000000000000000 00000000000900810000000000001003002001083003003002103512130523002441002001002000 000001003002000000000000000000FF94400002002012000004D500000000000000000000000000 00000001200000000000008800810000A00A04838910978920000D0880080C820000A00820008000 008884000000000040000002FF6A9B00000080080100000000000000000000000000000000000002 0000000000000000000200200044442000608300440280C08608300000E00008A008000000006002 000000000000000002FF342B000049808080080009A0000000000000000000000000000010000000 000000000000000A00001A000008002808001CDB02504684004C0000000080000000000000000000 000000000002FFA50700000180000000002180000000000000000000000000000000000000000000 00000000008000008000000000200080041800200060000000000000000000000000000000000000 000000FFABB70000018E282104220208000000000000000000000000000001000100000000000000 A6006000004006206006006004002000010206004000006000080000006026000000000000000000 FFCD390002102C0A2110000810000000000000000000000000000002002000000000000009068860 00B2C826C26886D268228AE482A4884B12C000A8E0C808800080E846000000000000000000FF8A5D 0000018128810021438000000000000000000000000000000000000000000000010826036000005C 0610E037016112806013100402004000006000000000006106000000000000000000FF115C000000 20080100020180000000000000000000000000000000000000000000000000060060000040078068 07806804002000000006004000006000000000006006000000000000000000FFE7E9000000401801 80440000000000000000000000000000000400000000000004004400060060000025040070060140 02004002806000002000006800000000006006000000000008000000FF6BF4000001801801800000 00000000000000000000000000000000000000000000000000060060000020040060060048050008 000068040020002AF008000000006206000000000000000020FF7EA2000000001801800001800000); SDR 8000 TDI (00000000000000000000000000200004000000200200200001250801608000608201C02240200600 0010002006000000000000000000000002000000FF0AB00001E84014014005014000000000000000 00000000000000100100400000000000000008000000400008010054016004028011026000000000 0000000000000000000000000000000000FFE754000000C00C00C00C00C080000000000000000000 00000000100100200000000100300300200100300100300100340300128300300300000100300300 0001001000000000000002000000FF3F470000098018018018018000000000000000000000000000 00000000600000000040600608601000440810600000400600E04600620400000000600600000000 0000000000000006000002FF16740003000012010012110000000000000000000000000000000800 00400000000080480480400080400080481080480088400108880408800080480480000080000000 0000000000000002FFCDB00000008008008000008000000000000000000000000000000000800000 00000000200200200011211000250000000201200200200000000000200200000000000000000000 0002000000FF88BF00002A0AA0AA0000A20AA00000000000000000000000000012A82A8000000000 0002A82A80002202202A80602A82A8221AA82202A82200002A82A80000000002A800000000000000 0000FFC16C0000000000004004100000000000000000000000000000000001000000000000000000 108000040080000091000000A80000008100040000000000000000000000000000000000000000FF BFBD0000AA0AA0AA0000AA0AA00000000000000000000000000002A82A80000000000002A82A8000 2B02282A82082A82A82302A82A82A82280002A82A80000000002A8000000000000000000FFD7DE00 03543343520001441540000000000000000000000000000550550000000000800D50C40000B10440 D50420550D50050CC0D21028510000D50D50000000000550000000000800000000FFC36300040000 04000006000000000000000000000000000000000001800000000001001001000001000101001101 801001100001001000100001001001000001000000000000000000000000FF405900002A08808800 00A20AA00000000000000000000000000002A82A80000000000002A80080000002102A80082A82A8 0802302084802000002A82A80000000002A8000000000000000000FFCDED000300A20A44A0001080 00000000000000000000000000000000000000000000800802802000C4204A802042002802802888 8A2A42040000802800000000002000000000000800000000FF04E500020020520100000120000000); SDR 8000 TDI (00000000000000000008008060000000000062AE2AE0002A22A82AE2A82A802600222622E8222200 002AE806000000AA82A8000000000006000002FFBD68000001D01845C01C01A00000000000000000 00000000000000000060000000000060060060000820080060001000061160221040061100000070 06000001000000000000000006000000FFCE3E000054555955801B54800000000000000000000000 0000000800806000000000006556556000CD2D505565505504063464CA54CB144C80005570070000 00550550000000000006000000FF202700012B80DC898018AB800000000000000000000000000000 08008060000000000062AE2AE000A02AA0AAE2A8A20316A2108F22EA20A200002AE0060000002A82 A8000000000006000000FFED73000100201C01801800800000000000000000000000000000080080 60000000000060060060000020000060000001360080070068220000000068068000000018000000 00000006000000FFAC1100002A843889801AA2000000000000000000000000000000000000600000 00000062AE2AE000A52A202AE2A8230066224402A243362200002AE0060000002A82A80000000000 06000000FF43DB000001151A05801811000000000000000000000000000000000000600000000000 60060060000021080060000904060141320040141100000060060000000000000000000000060000 00FF6D05000080001021001801800000000000000000000000000000000000600000000000600600 600014C00000600000608E084400110082000000006006000000000000000000000006000000FF15 D5000001801051041800800000000000000000000000000000000000600000000000600600602001 610000E000006006084020510000400008006006000000000000000000000006000000FF91910000 01101021003800002000000000000000000000000000000000601000000000600600612000600000 6000406016080034022000000000006006000018000000000000000006000000FFE0C70000008011 0108580100C000020000000000000000000002800009600002020000600600600000420000600000 6086410204042542020000016006000000000000000000000006000002FF35570000019001000A00 01800000000000000000000000000005000011001000020000000000010000000000000020011040 04100882A0440000010000000000000000000000000000000000FF863C0000018000000001018100 000000000000000000000000000000000000000000A00800800008800A00800800B20A0084080088 8800800000800800800000800800000000000000000000FF4B7D0000008000100018000100000400); SDR 8000 TDI (00000000000000000006006000000000007006046200000020002006015312142046514106000001 006006006000007000000000000000000000FFE32500000100000180000100000000000000000000 0000000000000600600000000000700600600001000000200600080600E08201410E000000806006 006000006000000000000000000000FFECED00000100000180000940000000000000000000000000 000010070060000000000060070060001020008020069160060A6010104044000000006806006000 006800000000000000000000FFDF3C0001AB0AA0AB8AA0A300000000000000000000000000000000 062AE0000000002AE2AE2AE0002220002AA0063262AE2422602242040000002AE2AE006000006000 0000000002A8000020FFE6C600010000000180000000000000000000000000000000000000060060 00000000006006006000284000002006004004004000000210000000006006006000006000000000 000008000000FFF36300002B0AA0AB8AA0A300000000000000000000000000000000062AE0000000 002AE2AE2AE0002A40002AE0062282AC2902802282000000002AE2AE0060000060000000000002A8 000020FF14FE00005413411195415400000000000000000000000000000000065560000000005565 5655600001600055200654C54C5504D6500086000000556556006000006000000000000540000000 FF32D100000100000180000900000000000000000000000000000000060060000000000060060060 00016000006006004004004012080156000000006006006000006000000000000000000000FF938A 00002B8898ED8AB8A380000000000000000000000000000000002AE0000000002AE2AE2AE0000460 002AE00022222422422027006A0000002AE2AE000000000000000000000224000002FF7FBB000000 00580380180880000000000000000000000000000000000060000000000060060060004960000060 0001211400C110010100000000006006000000000000000000000004000000FF9A0E000081821801 80180180000000000000000000000000000000000060000000000060060060000260000060001020 04080004082400000000006006000000000000000000000114000002FF4079000000045A01801810 800000000000000000000000000000000000600000000000600600600000E00000600000208C0C88 04002102080000006006000000000000000000000004000000FFE50F000001801801801801800000 0000000000000000000000000000006000000000006006006000802800806000800406C0208E9064 10808000006006000000000000000000000006000000FFD4CD0000AA2898ABA01AA2A00000000000); SDR 8000 TDI (0000000000000002AB2AA000000000AAA2AA2AA000322000A222AA2AA2AA22A2A22283220000002A A2AA2AA0002AA000000000000000000000FFB2570000000000004000000000000000000000000000 0000000000000000000000000008000000000040000800000802A020808800400000000100080400 4000000000000000000000000000FFCB790000AA8000E90000AA8000000000000000000000000000 0002AE2AE0000000002AA2AA2AA0002100003262AA2042223222063A02020000002AA2AA2AA0002A E000000000000000000040FF93800000010000020000010000000000000000000000000000000000 00000000000000000000000012000011000002001011001000811000000000000000000000000000 0000000000000022FF4D780000018000000000018000000000000000000000000000000000000000 00000000000000000000800000000008808000012000002000000000000000000000000000000000 0000000002FF74960000010000018000010040000040000000000000000000000006006020000000 0060060060001142000000A60042040AC44008210420820000604600600011600000000000000000 0000FFC1510000010000018000010080000000000000000000000000020006026000008000006006 02600000400000020600800440008022201412000000600610E100006000000000000000000002FF 4E9C0000010001118000010080000000000000000000000000000006126000000000006006026000 08C15000428600A19C0000962B204E28000011600608E08008E100000000000000000002FF83E600 000100000180000100200000200000000000000000000000060060000000000060060060000040A8 0040260163041AC00200A026000200006006006000006000000000000000000000FFC39300000100 01090000010000000000000000000000000000040006086040010000006006806000002400802006 00600620222E004086050000916026006000806100000000000000000002FFD81C00000100200100 0001000000000000000000000000000000000600600000000000681612600000200000601600680E 04614240430E000000006006006000006800000000000000000002FFB17900000100000110000100 00000000000000000000000000000006006000000000006017106000002001007816000006006100 004214000000006006006001006000000000000000000002FF5A3900002100000108000140000000 00000000000000000000001007006000000000006806806200002021006007004A0600200008C004 00000081E806006000007000000000000000000000FF16A900004100400180000100000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000008000000000000000000000000000000 00800000000000000000000000000000FF1651000000000000000000000200200000000000000000 00000000000000000000000000000000000000000008000000000000000000000000000000008000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF96D8000020000020000000020020000000000000080000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00008000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8A3A000000000000000000020000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF34FE000020000020000000000020000000000000080000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF28 1C000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000008000000000FF69A90000 0000000000010000000000000000000000000000000000000000000000008010008000001080002A 8000428020000508000108000000000000800000800000000000000000000002FFF2D20000800000 00000000000000000000000000000000000000100100000000000000000000000000000000080000 0410440000088020000001000800000000000000000000000000000000FF376B00002A8000AA8000 2A80000000000000000000000000000012A92A80000000012AB2AA2AA0002220000022AA08208208 A0602322020000012AA2AA2AA0012AA000000000000000000000FF850D0000000000034000000000 00000000000000000000000000000480400000000080500500400000400081400400400000000C00 4010000001005004004000004000000000000000000000FFA0840000D58001558001558000000000 000000000000000000000556556000000000556557D560005540004355564540160C620454655600 0000557557556000556000000000000000000000FF8D930000AA8000888000AA8000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000080000010000100000060088000000000000400000 000008100000000000000000000000FF6EDF00000000000000000000000000000000000000000000 00008000000000000020080000000000100000000020000000000110000080000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF80E200000000020000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFD29F00000000000000000000000000000000000000000000000000000000100000000000000800 00000040080000000000000100400000000000000080000000100000000000000000000000FFA630 00000000000000000000000000000000000000000000000000000000000000000000000000000200 80000000000000A08208028200000000008020000000000000000000000000000000FFE521000000 00020000000000000000000000000000000000000000000000000000000000000000000401000000 00000000400410050400000000000000000000000000000000000028000000FF35EB000000000000 00000000000000000000000000000000000000000000100000000000001000000000400000000000 01010100400000000000008020000000100000000000000000000000FF8218000000000000000000 00000000000000000000000000000000000000000000000000000000000000001000000000000000 00000000000000000100000000000000000000000050000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF890000000000000000000000200000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFAE5A000000000000000000000000200000000000); SDR 8000 TDI (00001000000000001000000000000000040000000000000000010000800000005000004000000000 0010000008010040008028000000FF21BA0000020000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0008000000000000000000FF617B0000020000000000000000000000000000000000000000000000 00000000000000000000800020000000000002000040000000000008000000000000000000000800 0000000000000000FF209C0000000000200000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 241F0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000800000000000000000000000000000000000000000000000000000000FF241F00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000800000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF008D00000000000000 00400000000000000000000000000000010000000000000040100000000000000000010000000000 000000000100000000400000000000100000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFE98600000000000000000000002000 00000000000000000000000000000000000000000000000000000000000020080000000000000000 000000000000000000000000000000000000000020FFDDB600000000000000000000004000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000008000000000000000000000020FF9D7800000000000000004000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000080001004000000504400000000000000000000000000 00000000000000010000000000FF74D7000080000020000000000000000000000000000000000000 00000000000000000000000000000000001000000000100000002800000000000000000000000000 00000000000000000000FFF996000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000400000000000000000000000000000000000000000 00000080000000FFC2CD000000000000000000000060000000000000000000000000000000000000 00000000000000004000000004000000000400000500000000000000000000000000000000000002 00000000FF1082000000000000000000000002000000000000000000000000000000000000000000 00000000000000000000000000000000000080000000000000000000000000000000000100000000 00FF1640000002000000000000000000000000040000000000000000000000000000000000000000 0000010000008000000000400000000000000000000000000000000000000000000060000008FF28 68000084000020000000000024000000000000000000000000000000000000000000000000000000 00000000000000000000002880000000000000000000000000000000000004C0000000FF4B6F0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 8000000000000000000000000000000000000000000000000000000000000008FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF68DC0000000000000000 00000000000000000000000000000000000000000000000000000001000040000000000000000000 8000000000000000800000000000000000000000000028000000FFE4430000000000000000000000 00000000000000000000000000000000000000000000000000040000000000000000000000000000 0000000001000000000000000000010020008000000000FF223F0000000000000000000000000000 00000000002000000800000000001000000800000000000000000000000000008000000000002800 0020000000000008000008000000000000000000FF19100000000000000000000000000000000000 00000000000000000000000000001000000000000000000000000002000020000000000008000000 0000000000000000000000000000000000FFB8EB0000000000000000000000000000000000000040); SDR 8000 TDI (00000000000000000000000000000001000000000080001001000009000000000000000000000000 000000200001001000000000FF59E900000000000000000004000000000000000000000000000000 00000000000000000000000200010000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF9C86000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 10000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF9C86000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000100000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF3DA7000000000000000000000020000000040000 00000000000000000000000000000000000000002000000000000000000000000480000000000000 00000000000000000000000040000000FFDC0D000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFAB370000000004000000000004000000000000000000000000000000 0000000000000000000000000000000200000000000000000A000000000000000000000000000000 00000004A0000000FF806A0000000004000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFA99B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000068000000000000000040000000000000000000000000000000000042020000 0000FF73310000000002000000000000000000000000000000000000000000000000000000000000 000000000000000000000000040000040000000000000000000000000000000000000040000000FF 08B90000000000000000000000000000000000000000000000000000000000000000000000000000 000000040000000000300000280000000000000000000000000000000000280100000000FF04BE00 04000004000000000004000000000000000000000000000000000000000000000000000000000001 000000000009010201000000000000000400000000200000000001041000000020FF786D00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000008000020000400000000000000000000000000000000000000000000FF5A1C00000000000000 00000000400000000000000000000000000000000000000000000000000000000000080020008000 000040200080020020000008400000000000080000000010000000FFE03C00000000000000000000 00400000000000000000000000000000000000000000000000000000000000000040010000010400 000300020040000208400000000000100000040010000000FFE80700001000000000000002000000 00000000000000000000000000000000000000000000000000800000000100000800800008800000 000000000000000000000000400000800800000000FF99A900040000040000000000040000000000 00000000000000000000000000000000000000000200008000900000000000800000C00000000000 000000000000400000000000800800000040FF806A00000000040000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFBC5000000800040000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000400000000000000000000004000000000000000000000000000 00000000000400000000FFCB8E000000000000000000000000000000000000000000000000000000 00000000000000000000002000000000000000000000000400000000000000000000000000000000 00240020000000FF3E91000000000000000000000000000000000000000000000000000000000000 00000000000000000000000800000000004000002800000000002000004000000000000000000000 00000000FFFF17000000000000000000000000000000000000000000000000000000000000000000 00000000000A00000000000002402000002000000000000000000000000000000000000802C00000 00FF6A1F000108000000000000000110000000001000001000000000000000000000000000000000 0000004000400000000004100000004000000000000000020000000000000000000000000400FFA5 6C000000000000000000000000000000000000000000000000000000000000000000000000000040 00000000000000800C0000080000000000000000000000000000000000200000000000FFFC130000 00000118000000000000000000000000000000000000000000000000000000000000000000000000 0000000000200000080000000000200000200000000000000000000000000000FFACC00000080000 80000000000000000000000000000000000000000000000000000000000000000000000000000000 0000100000000000000000000000020000000000000000000000000000FF380A0000800000000000 00000090000000000000000000000000000000000000000000000000000000000028000000000000 0000200000000000000000000000000000000000000000000200FFF8EB0004000002000000000002 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFED830000000000000000000000000000000000 00000000000000000000000000000000000000000000000000400000000000400000400000000000 4000000000000000000000000000000004FF18DC0002000000000000000000000000000000000000 0000000000000000000000000000000000000000000800000000004C000000000000000000000000 00000000000000000A0000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF3D7D00000000000000000000200000000000000000000000000000000000000000000000 00000000000000000020000020000000000100000008000000000000000000000000040000000008 FF882000000000800000200000000000000000000000000000000000000000000000080000000000 00000000000080000000008050000428400080000020000000000000080000000020000000FF2B73 00000000800000200000000000000000000000000000000000000000000000000000000000000000 00000080000000000020000228000080000000000000000000080000038020000000FF0680000000 00000000000000200000000000000000000000000000000000000000000000000000000000000000 20000020000000000080000008000000000000000000000000000000000000FF093C000000000000 00000000000000000000000000000000000000000000000000080000000000000000000000000000 00010008000000200000000020000000000000000000000000000010FF3FDA000000000000000000 00000000000000000000000000000000000000000000000000000000000000004000000000000000 00000000000000000000000000000000000000000000000000FF43CF000000000000000000000000 00000000000000000000000000000000000000000000000000000000000001000000001000000000 00000000000000000000000000010000000000000000FF9A88000000000000000000002000000000 00000000000000000000000000000000000000800000000000000000800000200800000000000000 00000000000000000000008000000000000000FF22B3000000000000000000002000000000000000 00000000000000000000000000000001000000000000004000000000200000000000000000000000 00000000000000000000000000000001FFE529000000000000000000000000000000000000000000 00000000000000000000000000000000000800000000000004A05200000A00000000000000000000 000000000000000A0100000000FF9683000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF9D2F0000000080000000080000000080000004180000000020000000020000 00002000000002000000002000000002000000002000000002000000002000000002000000002000 0000020000FF247C0000000000000000000000000000000006100000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF4CFE0000004000000004000000004000000004100400001000000001000000001000000001 000000001000000001000000001000000001000000001000000001000000001000000001000000FF 706A0000000000000000000000000000000000000400000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFE75600 00000200000000200000000200000000200000000080000000080000000080000000080000000080 000000080000000080000000080000000080000000080000000080000000080000FFBFD800000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000200000000300000000000000000000000000000000000000000000000FF1A1100000000008000 00000000000000001000000800000000000000000000000000000000000000200000000000000080 000000000000000000000000000000000000000000000000000000FF544500000000001800000000 00000000000000000000000000000000000000000000000000000000080000000000000100000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFB4BF00000000008000000000000000000010 00000800000000000000000000000000000000000000200000000000000400000000500000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF800300000000000000000000000000000000000000000000 00000000000000000000000000000000100000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (10010010010010010010010010010010010010010010010010010010010010010010010010000000 00000000000000FF4BA3400400400400400400400400400400400400000100100100100100100100 10010010010010010010010010010010010010010010010010010010010010010010000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF4B A3400400400400400400400400400400400400000100100100100100100100100100100100100100 1001001001001001001001001001001001001001001001001000000000000000000000FF7BDD4000 00000000000000000000000000400000000000000000000000000000000000000000100000000000 0000000000000000000000001000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE8E14004004004004004004004 00400400400000000100100100100100100000000100100100100100000100100100100100100100 1001001001001001001001001000000000000000000000FF81D90000000000000000000000000000 00000400000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF989A2000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8A900000000000000000000000000000000000200000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF7EFF0000001000000001000000001000000001000000000400 00000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000020000000020000400820068000060400469060468000020000008020008000020000000020 460461020008FF0DC600002000C22200000000002000000000020C00000000000000000000000000 00000000000001400800008000001401400001408000000000000030008000000000000031401400 000008FF742E00000810E20800010000000810000000030800000004000000004000000004000000 00400001A00C10020000401A01820411A20000400000000430000000400000000421821820410000 FFBFE10000101A419000000000001018000000002000000000000000000000000000000000000000 000000900A00000800000A00900A00000000000000100000000000000000800A00A0690000FF7836 2000101C40100000000000101C000000000000000000000000000000000000000000000000004000 100C0000000400CD02104C0000000000000210000000000000000000CC0CC0410000FF05BB00000C 08034800000000000C08000000040000000000000000000000000000000000000000015010000100 00001501501201510000000000000200000000000000000001501501000000FFDB92400400400400 40040040040040040040040000010010010010010010010010010010010010010010010010010010 01001001001001001001001001001001001001000000000000000000FFA854000000000000000000 00000000000000000000000000000000000000000000000000000000010010010010010010010010 01001001000001001001001001001001000000000000000000FF41A2000000000000000000000000 00000000000000000000000000000000000000010010010000010010010010010010010010010010 01000001001001000001001000000001001000000000FF0B88000400400400400400400400400400 00000000010010010010010010010010000000000000000000000000000000000000000000000000 01000000000001000000000000000000000000FF87A2500400400400400400400400400400400400 00010010010010010010010010010010010010010010010010010010010010010010010010010010 01001001001000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF6D00000000000000000000000000000000000000000000000000 00000000000000000000000000000010010010010010010010000000000000000000000000000000 00000000000000000000FF4BA3400400400400400400400400400400400400000100100100100100); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000800B4D001800000000006F11 110000000000000143FFFFFFFFFFFFFFFFFFFFFFFFFFB03D00000006000200002000000006000000 00200000000080000000080000000080000000080000080080010000080080090180090000080000 0001800000000800000000800B00B0080000FFC1D600000D03404C00000000000D00000004000404 000000000000000000000000000000000000003000D0050000000300054010350000000000000010 0000000000000000D00500540D0000FFA41A0000004380C100040000000040000004041004000010 00000001000000001000000001000000D01080004001040D00C05040D04001000000001000000001 000000001080C04C05080000FF991700000209040000000000000208000000001000000000000000 00000000000000000000000000000000014000040000019A40014000000000008200000000000000 000000004001A00000FFE58E00000601810600000800000600800000021800000000200000000200); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D00040000000000 6FEF7000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00006FD3950000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D0014000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000800B4D000C00 000000006FF5C9000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000800B4D00 1C00000000006FC0BB00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000800B 4D000200000000006FE6E70000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 800B4D001200000000006F7EC8000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000800B4D000A00000000006F589400000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D001A00000000006F6DE60000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000800B4D000600000000006F4BBA000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000800B4D001600000000006F775F00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000800B4D000E00000000006F51030000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000800B4D001E00000000006F6471000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000800B4D000100000000006F422D00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800B4D001100000000006F88670000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000800B4D000900000000006FAE3B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000800B4D001900000000006F9B4900000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000800B4D000500000000006FBD150000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000800B4D001500000000006F81F0000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000800B4D000D00000000006FA7AC00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000800B4D001D00000000006F92 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D00030000000000 6FB48200000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D0013000000 00006F2CAD0000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000800B4D000B00 000000006F0AF1000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (1B00000000006F3F8300000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF F7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF F7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE00800B4D00); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000F0018201008000000000000 00000C06030180C0603000080400008040000000000000180BA61084384236AA1D2A5272017CEE22 2EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE2 22EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22D86C361B072391C8E48D 46A351A271389C4ED86C361B072391C8E48D46A351A271389C4ED86C361B072391C8E48D46A351A2 71389C4ED86C361B072391C8E48D46A351A271389C4E207F83DE0FF201552AAA150000000001540A AA0500000002024102A4310C1D8C15990CF2ED55BE95EDA3D2A914A83316954AE440695A0760104F EC006B003E386E1D01C3F532A956AA4084940507A83824081D205805810BCC7E0C679C1E6001BB30 60EA7594DF48030004E4200C114844E11024283B040FDBAFF3A3FD4C0015BC428C021379A6082183 8663914901A44E04374883A7731104A645018449248A0800066CA11C46754211C8E41203C9442112 8054004DA21941D0612DF68842048201326B9120581E2E86AA244A0D84004038006FC0C020C2060E 955203532018C8001A0659C1C6192084FF499902A626A9055CAB792B01430579CD9E00603FDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF F7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF F7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF); SDR 8000 TDI (31800060001100800000000000080402800030008000001803000020000810080048000001002050 00000AC07800180001800000C000000030103000608100280000000001C0000001800C0400000CC1 8031062301A00003001800000000001840001800000218020002301A0006000000C00C2000006488 418A000800120C00000020DE000060C0000001A200000003C0600C06030180E1D338708F66021F83 851A0D06834180DD080470CD1CF31C38C70E31C239C62C0000066301020C46C0600206080000C004 001E3206002062300003040C004C0618206030010311800018218008003F0100C10231808F600018 4081E230000318008188000230003047A3180080623006C061820600011B0180081800004C004000 788C0000C600206200008C003C180081800046C00002180080000C00300100D8008180C0040C4000 060020003000231800118000188D80000400046006008C6602062300003040C00480180886020000 0180000600060881C0014080043E8100004000060C00200040A00000000366020000006308408300 00C00CA660CC660060000600001B0840C01000000005402C00000002018321028DC6E35000DC0001 C3811803418CD80000000186000000000001000000CC79821F83C1000018000000000CC660004000 600F11E000000100001002000806028006004000810000000186001833018301800C18CC6000180C 060000060C1C000000300000000C0603000A801001800006000060000001400C0000C00006180000 00000018000000000000180C00000000000000180C06000000001800000000003603006000000000 00300001800000000000000000000C00000000006000400000000000000000000000001000071820 18C81000078C0018C1E0380008140037838000E2000804488000000000180000000000018000800B 4D000700000000006FAD970000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (AB3120A65700DD6E81101416B9040405E2948B1080BE0D28C008A010A04488003210020100281088 1028540A2320318680050F000831D00196E065001864824AE416971A2CC4EF764200240E49200562 D1088D361054199AE0C3000C10A004998C82760048943941A25FA9166A6D14424004080001C02042 371E34CC4BC0C0B9C4F216219840A119B004CF38060000007B10DCFC69BDC9E20559AC4E11648800 0000000000000000000300000060330180000000603186000180D80C00000000C000001060000000 000000000000000031980000300180000001800018000600000331980C0600000000000000000000 000000600000000600000000003060800100000000000066300500000E34000C1C0860000060C41A 0904000000060C00000C10000600806FE040C01030000004008000E00002603300000000C0660000 2000000000CC00B07938C000C0008004001980000001800C000004000000A07801000C0000C18000 182000001F081000F000004400000E00682442200630018F0560200000040A000300088000010082 1400100884408C1880400000002500005430000201032002000080450C8000010001400A14000700 200000040000000100A540C0000010300000C0033004001802C600018009040C0120860C00100860 20700010088710000000000000000000000000000000000000200000400000000700000080002800 00801200400041000403C500A040A018000000211821800000200600000008608006030000800000 0000600C0000018000000C06000000C000000603060C000000000000000000000000000000380002 0000005030180C6008000000003000000000C00000000000E000008100060000063018000000C100 00040001820180201A000033010218008000080000018C0048C10000000811800000200301000000 0C000020130040006600010C81008000C00600C003005B0C600C0000010030603186300600D00000 4301980C010CC46000000066000400000C0400004000000006000018006038180018000002007003 000C0180C41801548F0600000000000D8603600301000000C000B80000198C058000548E06000000 00720860C04000000301000004800000840020000000000400800030000060006000000300000C1C E004000000000001802C00000000300000000C1800180000180C50AA0000000000000040A005B000 00C6000018000008018000700000000600000C0000F000000003C000000001000018300000001830 64204000C000001820002000000100E0000060000030000C000020000E6000100000020000085022 0442044201100040201C40800301800300030000018000600001BC000000003040000602000C0010); SDR 8000 TDI (0000000E444BA02E02002C0120000008000000000809E44000440004020000200001480800001000 000000461001200000000260101C4820000000000000800007810003922410005100882030000000 00203200080412804000140F008C3040000001000000000008018E2833A000000200010080220000 48040A0000AA13039004E1F8B1748F31804A2070100000BA472815029033D5820C50BC404994CB80 001B52AA0040420A005A9438B4C0A00400004C270103006000000014001220000201200010090003 D00900580004086000C083C202486600000218000060017800001CD3C9C4E22020C819A092418592 30EA03400D54C0C60081C6085018D86983F80C00A431284CE621B215320804341446E502C0D80011 018000618049604A15234100040204D8AB001D08A4831A1C1200000007803041A87027138E400000 010110040103040000000000800402000E04020060801000D00000080000000009CE472538000000 800B4D001700000000006F6E9C000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000C00B921D61A25AE832D 85C0E436625830920C209B4566135888D24A201000000000001F89E15AE1046B783845AB4653010E 876921DA42D3C0B4F0D243B490E78169E05A876921DA42D3C0B4F0D243B490E78169E05A876921DA 42D3C0B4F0D243B490E78169E05A876921DA42D3C0B4F0D243B490E78169E05A0055155FE0055155 FE0055155FE0055155FEAA003FCAAAA003FCAAAA003FCAAAA003FCAA557F80154557F80154557F80 154557F80154FF2AAA800FF2AAA800FF2AAA800FF2AAA80008392484027048000000000000000000 000000000A880552AA09AA543118874897429086577EB7DE8DF7F3FDDEFC6B8C1FE576727DEA2538 124A24252109280C2218004117CBFDE03F2924928106000400051A140800B103C47E0467941FA010); SDR 8000 TDI (C80E8280000000887A2810A09F02816009C215550180CBE5122902AD0034100000920C12A830A695 2533D004002C650888272421E082100208004CC000058422010A400F0380C406000032158001809C 840C003481A000031980010610418C00103580C0760C000E0658319800082A06ABC000C802402002 8402004009284542000201000380E42201A002088002A0008050208C080501000020000000000040 01400700008161342005BA0C3EB103AC826B003ACC2680D7A031EBC086FD190B07CF14180C0A2C0A 00C20504984000046A090088000105D602501C964000700118CA108214072110000602142EC78034 084D84705D3841EB836AEDE6487C00DDC8B540285C327C00100F33000C6402048E08000230140020 4880C2004202A130E84830000004896018910890080C1081A402801630000004000D20211029006D 8662E9800473009700015004002A40201001266001E01C652800808002E84000012E410806008C00 20782A024004822C1CF045A080280610300080640891420112294AC90809C42020416114A2348C82 8820020114AA042B81C00000E04CDC00899CE8005B30000000000003F190CC000C000C078081206D 80C0062000018460240000041C184E1148C8040C4700C060000001E0C00030C00804102400000408 14E074C0D0D20A0200018C30483CB8000F00190000003012CA6888000C206BF85EC0422CC1001002 C100800100000001809D1800000D0383005344E040420342E4416040020020080287139249900021 001A2110C044660669900263D18019A67B099E12400108A056340E0C00E0D14028221C018446A5C0 8244400500A31827402008000952008623023A0C8EE03E005022368900E6100132C3208440C1C608 0104198250000060A90209508000028122860902800741010048442129028D2660218ACC043C01C9 1080252230410100071100C042C05100480000822456045484104ED48801E00366311B89A3200000 01018100008450C51003710081C8A66AA01E222620190210118026013A0A4D0EA1E84100F8010000 0000000840800400018207F02054004F27100005B124082C100080000040C0A4721112808803380C 0021083048804180B800000000058434D001B81478049009C4E0800000000000000000000002000C 00400000000000000000010000000000102084082100210408380885420020080480400004000000 81C88914200400000020000000081488841000002000000100000001005044AA0000000021120800 00100900402C0000158000000000204AC20504100000002020824000002480100100000000000806 8224100B00000560000000000812A890000002C00400000010050112284820000013600000800000); SDR 8000 TDI (03425905487406050009C00000C0E10181002C300209A4C81D3151831402351A8D16BFDE05F15000 0000800B4D000F00000000006FD17C00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000100180800000000 000000000000000000000000000000000000000000000000000000040C728854AA510B9DCB871239 740C002AAA9FEFF551540055003FD54AA7F800AAAA7F800AA55003FD54FF5515400002AAA9FEFF55 15400002AAA9FEAA7F800AA55003FD5455003FD54AA7F800AA002AAA9FEFF5515400000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000143FB5546021E0000000402A8540 040001000040208540000954685619BD53ED43EB09AE5C7997DFA4F3ABF0DEFE299D5E2577293C1A 53769506655261549C5572880A03966BFDD43F3B914BAF12E81DEE552A17C8ADD2A98D348D4B8D57 65559955EA456204DFA443A330E01D0EB54E27168914AE47399310A330AB38A8C40BBC50EF11A319 FEDC21BF5A6CF629843C8D3A8F4BE7402B7DA0757B914E25D2E158BA7162B54A2C72E9702E550ABD CBA75389F5BA113E914B8113A974A854260D462F560854AAF422B44B86D20974AA1D3B9548035203 30E6511A914AA512A9508A453A0558A513F854AE572315400510E11CBEF33FBF41EDD2A841880040 20042B21DA18E0EF169B0F40E1303C402201101800D6402D7C216D0297EB62600D6203020006C000 0001900005AE518D93780C10C0180A010007438870A511348488160A2510E84820DD832470050C80 1E0541E000C0005C1C040813ACB703801E203E000867239088540000000000008100002152080040 800134180C1218D44942D30080034C0312C002818DE460280D89AD300200640040AA9007047A8854); SDR 8000 TDI (880FC660CCE0C7668C026CC0080DE0000030C801022340E8DC200C40804060CC0600008CC00006A1 0C78007A88060CC1820C18D06680006C0200311A0D6002C603110A2400CC5814000E20683D120206 0C41835401C482010A28406D86C2C15628082A0A084198F000633188C1A2B1983D88244E200981A1 404DC0C126100000007824000F061404A840D0C5060E7903C86633183DE8700804C9E4010024800C 06290201A1C0F1D640121F89A6B01B3CF82B0E9808E8C601C480C418B41B0C047B38264078104021 00E8D0200060361B0D81801D180C001D0B8F060348E2791A9B44E542318584002103058595292802 00203754A596D014E0C72B930B4FA38011EE632CBC0F4C17A92806742E1C1881F7FB00241D6B8556 89D290D4184A1997DA2294A2091A431FAC0647063BDCA6E9593000AC37AB856A58178AC604D2F8E5 EA00020C0980300020200F0403C088346A342A13000001C741A9446A55291D568D4668658ACD04BC C98152A1142A304F23020531000900004282084012EB14020B0788188FF03801E0032633DE800661 30600305990C6832B0C0C8000D00D0256660510832671005650003C024136603110C00EBC030C721 18CC663718C01E4B1189498B25921150405410808F01F12C980410301B04B138349C000291898006 780440031FB0D9C1F180F1A0D86C02CA2871D3B432547304C00A9211C558C46408000C0301800032 300CC90A10780C36070B88C8426101AC604B5110D424F508C096060001446300003C1AB051805980 0462B408145000180001F879800D403B488810000D98F4000FC2CC006800EC110A160003F0000D02 355800CE013140CD80B1118007E00300CCA2F00884CE8011F8C02684008019A05012C04600660006 076098505013602C446001F800C03328B004001060EC04B001800EC10028B4B8C060135060266220 003F00231DA040A030060C660D070C0468016003603609E402081D020067839800D401B488017601 040006C3608E8200160061011A840C031800184D800300764401800280039B00000020000860B401 70023323B0494805005CA621220F9580109940064064361B0780000C4A511510D002C200119E0320 11C901010008201807095601F19815DE076793D8E4C00361B01C288494081043C19C5C639EC68512 88959010290806A9C638740E3C798CC06002001156500003186D86C36100000A3301800098049888 6001512C841801620C289045C14720F06006020018003060017802041CCACA92128424C85B8CCD2B 25293D0CC3198F8D64C7C201962000AAD86A31F80D1E933489932A0148E85C23080AC10CE510C118 8404001020E5D8103A00420904EC01B02D4E36783C0703259BE81CD86C361780B181F5E055551101); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000180C0000 00000000000000000000000000000000000000000000000000000000000408A0108840021528850A 2042A00400553FCAA557FAA800AA00155FEFF2A80154FF2A80154AA00155FE557FAA80000553FCAA 557FAA80000553FCAAFF2A80154AA00155FEAA00155FEFF2A8015400553FCAA557FAA80000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000028550A940AA0100000000000 00000000005000140000000002A100AA012A954A85520954A0002800480140014002500A804A8152 014020000201082412090408140A0140A050001400042200402000A804A844201148815001140040 00150004000100A2440A9548A402A044221008944A251229140855021542254228508A4528954A25 422910A851089048A45288548A540A954A8052A940AA5122844AA540A944A245288448A152A054AA 1528950AA512A91022152281022112215488450A854AA440A9548805008502A010A9502A142A814A 80120044A21502954825502110A0500A914A2550A9540A452A800A21402900024000800A8552A050 0060001843018BE1E0F51EB31E02C060142423010C0DABD6780D121B108C1E6886E00C6213062001 2603198C0EC019BCC40F347800A0940FBB4002078BCC9E715D90C68E3782355A4C678005EE779BCC 063F5A3548E037CB2198FC1C0887A333833170283E000E2A5050140260000D86C4F0103C40001200 0000001810080454010428C1E14CC6CD180307E4C28B8580E0603F19EF30018018000202020310D8 4066D8260006836690EC18300002C680444814402001030003400341800F003F4027068814200019 BC8083378B00842F6718882512000482596A2852ECC00005A8A40598082547A0DD064031B0C60005 8140180C010C01E0000315983D1630C18C40437580CC663CCA0E061831D832180C06C3F069C01800 6008DE0700F1DC78DD0E00060B000171E08F00934201C00201A000108049A00009C0400068010504 7081818607461000E1162319D8CD5E335D8CD5E335D8C53E31CF8C73E1C18EFC081D186634180CE6 0D0E004A0D17B8C40A547A1F49821011058E007E3C1E830071003EC32183DF8F01E3406E04040D5F E01618CD80704E34C1E3C0384DA6C07800D1EC57E0C09C306C8E006D340B04600C01BF000000403C 20121980464242003DF8D02030418221990C1A300880D90DC0010D0280023C086630180C86110804); SDR 8000 TDI (004188020204008C00882000050800400B32D215A206120008051421242845080810044132500022 0400884000212180822C29820700090108814A82C948100120021002800E01000281800327130800 003888344D07805500A0600812024180110060100504520000154022600104882300118000000180 2441159FAEF208600C490980000334580028807C9FC88210181044800CAC0AA490980002E44A8004 4E80000028000580066111A00D40557F820B0DB010813E046180080FA3FA442820181A8764C602A0 421D10800F0B2078500415019908007182A068C94123120C941860840658300A4000600018006000 860002DB95085727300C000000B00003480A808902000C604000020580000240D413010C4000C200 28203040000C8010688C00031880008005482812D419030AE11110A006254180C600402101800010 000D8D54995C1C1300008620000001520E04BD0000310040060000240D4912001400E00000802001 01C0000C0016C2A842BA18100E1004020000000D8000581548478728114400000300003481A80810 41010004C002A8822210101601000A80042900901605500040000C048E5284000140001220000224 1702000019200001E30100502CB0021C530CA11A0100E2042A8AAFF01001F4A57F10CC8200002D9C 4507900881301B38081B018C080404214880010102020A102955FEC41180862D0002094602401B84 000440110093450B074C01805050140A300001000811FC5F04800A6FF002A982402A220086000008 380C201402001419006ED108040804200800800C088340000000007856040D1FAAF150400AF96628 C00000A8384082109E504EF7708DE6885004D86025786C04C2762705E20130400E0801028442E5A1 F8783251331F62E19100F082410B100A81004014B810950CE72010CD9A00551541803043B0E2AA55 1DC04290580828C00600002C000000A03000004080160300004800320180100280B4F507AA814552 A8018000800B4D001F00000000006F3B7A0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (254128D4925809054494592896825A020402D42AA9782A6820DEED3608E1428D20360908B250C9FE C87C0819C30710CC40070602906C200210263000005C6E30993C0C4C7F3100032000208841208400 25100301D07470A8D82CA6784C1C8B440401CC000239600250008C6F97C38002A347830000E0B230 7E731F175E0E37196400016511870335710006B8460CC6E37070F9E6C040105C849202D8322C4020 09A60018002493181045CD005A109C881A0089CD25202442842602400310600800A25522094E06E0 9048000020008281020804440000040181800400B411048EA0A068ACD0205180D90E80200022C301 00050A82B3F59600000C410C0469288C30402DC180260174E04002101280460165884E0600920680 A80440047A0208C0000004801C2028008402E80034151E00108EA7F85426F00820054C5010302840 5000006080580000005420848800017026590F80028C408935C050208C058C300185420053B30400 004080660810041066A288601C200032060084D01540A319081440208000500008B2800000180000 01000000000000411426271888251002800A0C21884248008844E43C058DC8640208558CB02B0E42 43040179521400800581108904823006B1028C00214000640614C2240098401835002C02031228C0 181021004800061940280011001A21000020BE4540A00000C0031C10001608400011E02040C91400 1728060020000004000660040000180C06030180C06030180C660019800060C000CC003440000018 A0000C00000140000001140200001003207800A8080C17CE81006A011C7C00814105F0A020063046 0D01820200108410400C0180409010181A0600C06D02C0087A756E380400C000000470158D400F12 023C2081000040010100208EC860800C000000043C004E88000E40080098400230020A82100C4400 1002804C1260C4080462800380021000003202000800000290680C010500008000C40800210C4000 01410C00046504000000A10C08C04201082400013140CA6202400900010860DC4002880A54102182 00000D8000010B000008602EC9600552C51600002A014510010918567E80C00283808C22200E2818 0801508D80D006A84000006008001300381FEC2678DC860C6701C66A82B0C5E0202220C100010008 001000AA0BC9A020C0808004A2800004008C08032E290842415000005001230AA006004412004018 00A8B00004080E002A8AAFF3A03C80452AA542C504001814200000180002610580000081000A9751 FD8A082010CA0004284102A250000189542185406905028B807001AC02800123540422D2000C8250 10000000006018481018430D4412C8B4410AA812488512806068041094001000C41E00182A40E202); SDR 8000 TDI (0100000004001000562700004A000060000028002B08000100000A400000000006003C1060000008 0001034000080000180000003C040600000280001015000000000080058018A000000500000002C0 003040000000C00001023212001000000800000001900000000000060004801804001B0000006400 000036420006120000800F06E05C0E00063E490C2082000280050000000010080000000090610000 2104C2011C4901F1833C783B000A9000000021060900000000040000002004004F63002080180000 20000442202000116008C24000000040000430800006882406001C00126AA2A95580021028040200 90291044412018008618080600180A1000021041002004020600000001F828062E1545A2AA9410FE 6680400005BB31E000003EDD4EF6603DE6000008DE6101B83C10B07D8F01E0000000180000000000 C501FC580000031F63D18300C80000020000000080D239002205430658CC1C00000001883000A060 000000006006480148C006000268000001462300004180107B1000C4001300022040000000783FDF EFF7F8008000800B4D000080000000006F8DED000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000002001800 0000000000000000000000000000000000000000000000000000000000000000000400A530801380 418302030018366498D389C31B246CC91B270C6634E0D992634E0D992C91B270C69C31B246C36649 8D389C31B246C366498D38634E0D992C91B270C6C91B270C6634E0D992366498D389C31B246C0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000142AB54A6553E944AAA2 150000000001502AA815000000000224082E00091689068108400850B29160A24AA194AA4129D463); SDR 8000 TDI (788020000020C0600000000000038800000C0200040200208008C1A030000C018C3000C080007800 00000000E04000000000000000EC1A001002068080000000C01180000001C0040000003800000010 080007000040800008000028412888262000001A00003418A80180CDFC7C05870000000001840000 0D0603101001F03C6183018331990DE631063F17E80063C180CC043CC60F0190C4183F0004060230 78C018006000C60000000000000000100300004800000610000040013C00001E00C00001E00060C0 180C07E8060000600066000663326000180C06030180C06030180C660019800063C000CC02301000 461800000C2000000000000000000000000000730C580D0100060C0070809800000C064006000006 30020D01820000000030600C0180C00001000C0000C06F8000005CB26400000C0000C00040038C00 2400403D00F0000000000000301EFC418007820003307C001980812E401A0040C00630000007800C 00201400000CF660CC000067800780061800003306001800000000780C018F0000C000CC1800618C C00300000C000C600C000001E30C18C06603006C00003000806380400100000000C0000018000020 108230060CC000001B000000600040000000CC24020000000F0002011800000A034027B30C5C201A 0010000000CDE0D267B300200063CC002C00800002A300F5840C3822C060000071FC107C0CCAE400 83CD80280380000C0180F1A48006000001001B3C10336E0009800000000030118000000400884400 40000001C0183410CC1000000007E23D80090000000F000010001808000800023910000029130000 40000000070030C00000000000000011410500400000C3060000C01003A406000000C00007800008 003010000000187040400880000400080000001E100800C00000028008210004100344280C080040 00000041804300044084008050220F08020080000201800300000000012004400108940000400150 000006004C08002121000069110200001800800000010180100320061007800E0100000180830613 080004082020C40180000001D800080000800003C000000000001000200660000000000019800000 000000100000064798F01ECB1980038310180000000000060000100000000980000C818000000860 00C008000001E0000380000001E01404000002028D706080984D40800000000270D20C0409110941 83B0003F1000C3081040281402010F48035162EC18EB40031060451021040231A54A6100401C0A40 2000020000028000004DA0020000401000020020000B0408006010000000800010018003003FC020 400021E01F0000080031D8DC0002280000800000E000FC0B81080010407006B041804200002B0080); SDR 8000 TDI (0000D603FC780000031E63D183009E0000000000000008263C0100000300600C0800000001803000 00600000000060043008488000000664000300C61000000180327B0C80E200011DCB301800000060 3FDFEFF7F8000000800B4D001080000000006FFED900000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000300 180000000000000000000000000000000000000000000000000000000000000000060085902116B2 1020C0002240800087169E1A4786921C5AD23C0B50E2D43B48F02D43B48F0D23C0B50E786921C5A8 7169E1A4786921C5A87169E1A42D43B48F0D23C0B50ED23C0B50E2D43B48F087169E1A4786921C5A 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000C64A25209C04000 0000000000000200000000000A080550AA9C3898082BC78BC7930060DC7813D988F033F19EFC1195 DE6936383DFC83680807E48069241AAA6A0604235613FDB83F0D0290892600E1DA48342308805143 4DFE4C7E0C19E30798CC60A04609946C100311E632000BC062321B31780C10001100210928108010 009100314229103C0008DC0C6463805C470D00940000518080823420940CB62131421046095C4426 728066F81931C6603798CCA6036BB351033112080008400000000210C990384120C083021209F020 5C89898080181124731132C7A3247AB19A0A4A08C84F25181D76A0602300080160084AF11FB389EF 01F161600040000080000000000019800000000030203D01800442E0322D80000080480000000000 03000002202000010000000C800C00780198301DA980800602A154A01C30020047811088C4040300 07B7D208000858221060000000000C0420044000003160001E00008000030042200000000410003C); SDR 8000 TDI (8C000C00203C44F2000000020000100E3C6180078000033060001980000000180100C00600000003 800C00100800000CF660CC0000678007800618000033060018000000007800018F0000C000CC1800 618CC00300000C000C600C000001E30C18006603006C00000000406580800100690420C400001980 3020108210020C5800001901980C618CC0600000CC66000600000F00000018000000060437FA0C16 231400100002028980F047AA0080006A894431020000000600FD060E7032C0600000A1B0137008D8 C801828950360600000C0162E9E6000400000001122804A36600150020000000B011000000200000 200040000002C0000816CE0000000007A03D00090000000F100020002408000800044A2C508A5023 0000800000402B0130C0000000000000002A800A0010000082000403086003180600000200000780 011000502000000010A024805180400C00080000301E20110060000060000030000C0000A8300C10 0090000002800003180A85480562A1540F50300D0000000000000002000001400840021128000080 02A04000040290040042108000302214009010010000000A0180A0033006A007801E030000018003 0623104000100140E818000000407800180001800000C00008004000000040C600000000000018E0 00000100080000000540801002C500800182001000000000001E6000080000031980000C40000006 006000C00C30000006C00003000C01E02C00000001970F306080188E002000000001F02004020500 0040815000346E00DD0730783C1E0F0785D80050E1DC38F72082084084108010CD01B00061006000 06C060000600000080000017B0060000003000000004000F06180000300002018000100080030033 C0608000F1E00F2000180011F87C00017800008000004000FC0983000010604006F060008600005B 018003000000080010007E2F00001E000000000024000F18002100001E800000180026003C183000 0058002080C000040000000000003C06031800018000183D800000000040078039E200000F000000 038000306D03160040000086311A001803009800000301B0C00000000002000780180C001B000000 6000000032000002100000814F0680D0680046304C0C0092000280020000000000080000000048E3 0000110A85150148002081384811608090000000018601000000000402A954C400809CE140608000 000000000442200000002A0F056000000180000610C00C04002154AA0D000A6552A95406C0003201 01019009088C001008AC840000428C0014082020A8108808040204000000009804001D0AC552A894 0CFE6600C00103FB31E0000030580DF6602DC6400A0CDE6301E0300030798703E000000008C00180); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0201F8000000000000000000000000000000000000000000000000000542A954AA552A8004D2985C EA511FB74B87106B5C18C964B2592633198CC6361B0D86C9C4E27138361B0D86C9C4E27138C964B2 592633198CC69C4E27138361B0D86C633198CC6C964B2592633198CC6C964B25929C4E27138361B0 D86C0000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000343FB5546021 E0200008402A85400000090002402085400009D5E8D4181542A542B9002A7479A7DAE4F2ABF0FEFF 29975E2E77A83C0A413294022D4233540C5D36800A81B65BFDCE3F7BB34FAC10F834E077261DC0E5 60EB855485328552A55489982ACF62044E24C2E1F1A01D0BB7CA25138B14FAC72AA303A313A111A8 4E498C42EF13E331A8DC31944A645229046A452B04CBAF006B75E0C56E115A6552A250AE532296CE 6457E9702A570ABE4A65130BDCA6312E915E8112E9DC6E54270F47A3D26854AEDC22B44B81501974 BA1D2F97C049700130E2511B934AAD36A9508865680D40A516E875BA3526B5C00F31A114FEF32FB5 C1E572A8B0380060000180000000000019800000000000203D01040881C0201C80000180D80C0000 000043000006600000010008000C000C00780118300923008006000C103008100200468110884404 010001121000000018000000000008000C40200540000011A0081E00000000030046E000000008E0 181830000000006040280000100080078C00000402000680C06CF008D19830000C01803000F08000 783300000000C06600000000000000D018201001860080000000C01980000001800C000000300000 000800000F0000C1800018000020070888243000001A00000F00E20502A95E78038F000020020100 02000C040A100000E0AC6503180AA5530D64A0603E05E32142819488002E850BE1008000EA450CC4 00205001500B6600C7800000000600000011830000C000004632806A60413400001E00460001E001 40CC100C836C06100060007400060AA34000000C00030000C00030000C600018000003C000C00230 0000461800000C20000000000030000000000060006A2868281800060C0078019800000C06000600 000630060F0180000000003060040180C18001800C0600C06FC000007EF366080100000000000001); SDR 8000 TDI (07800000001020000000302020010180800C00100000301E00000080000040000024000800000080 0800000000000000008318100000006000000F003018000003000003000300000000000000003000 00000000000000000000000000000060000020000000000000000180000300060007801E03000001 80030603000000000000C01800000200280008000080000040000000F800300000C7000000000000 19E0000001800C0000000200000000C800000183001800000000001E6000180000031980000CA010 0106006000C00C30000046C00103000C01E00C00000002960F306080180C010000000002F0400402 0A00008102A0203B5400D10A3070381C0E070F9000F1C3A8709A41831060C618C0180200B0186000 60300E806000C400000300000067801E000000F000000030000F06000C00F0000007800000000001 0033C040000041E01E0000000011787C00005800000000006000EC0D82100010006004F061004000 0038018002100000080008005E1F000096000040000018001F180011000016800000100016003D18 70000098001101C000080000080000003C06071000038000102D0000000000800780216400000B00 00000200003040020000C00000063210000802000800000201B0C00000000004000280180C001B00 0000600000003442000422002001EF0740E874024630940C01120004800400000000000800000000 91610100AC940A600290002103385033618C000000000186030020000000000000C0000098670060 001000000001000000280000000C0404008051801426840A2D51002800001C00146AA552A806C008 300002019001100C000210AC80000044880010902200A0110800000100000000009800000C150AA5 502864F56780C00307FB31E0000030D80FF6603DE6C01E0CDE6301E0300030798F07E000000018C0 01800000F603FC780000031E63F183019E0000000000000000063C0000000300000C0000000001C0 300000600000000060004008100C04000660000000420200008180006B1000C00001018330000000 00603FDFEFF7F8000000800B4D000880000000006F021B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0AA010000000000000000000004000100000000002A000AA102A950A85120840A800000148045001 0000502A80480052015022500205402440091028400A00420050005000440294402400A010285420 004885528954881008104005108840AA440A9448A00200442A0028144A251029048A552211022112 29108A5108914A21422950A051289448A45288540A5508954A0052A940825420944AA542A144A245 0A9448A112A054AA150A940A25122140225522950225528840A8450A84422400A954A801009408A0 12A95428042A814A80102100821102854824508014A25008814A25402950A80422800A2140085402 1002800A05528150006000018000020040021980000000400060BF018C1983C0603DE6200180D80C 01000000C300000660000000100C000C000C20780018301803008006000C003018300600E7833198 CC00000000000000000018000000006000000C0600000000000080001E0001000003006670000000 0C70081C38006000002040380000000000078C00000D02000B00C2ACF409619850200D09A132A8F4 8000781300000100C0260040000000000064183008B24600C0000002C01980000201800C00080030 0000000800000F0000C1800018000020030888241000001A0420A750A00000001E50048300000000 000000000F0000100000780C2001180000030C2000603401A00000218000000C000300000000C000 0CC00000000000036600CFC00209402E45021551A30140C000000630006040033C00001E00C60001 E00000C0000C0060060000600000000600060000000C00030000C00030000C600018000003C000C0 04300000A61800000C1000000000003000000000006200600000001000060C10F0011800000C0400 0600000630060F018000000800B0602C0182C18001800C1600C16FC000007EF36600000000020000 0001AC000C00003C00F0000000000400301E3C6180078000033060001980000000180000C0060000 0007800D00301800000CF660CD0000678007800618080033062018020000007800018F0100C000CC 1800618CC00304400C000C710C000001E30C18006603006C00000000C06780C203107B0C60CC0800 19803060318630060CD880001B11BA0D619DC0E00001CCEE000600100F00000018000000020037F8 0C6611100008000040C180F3078C00C0C0680C003D020000000600FD860E6033C0600000C1A02160 00CD8C00800C003C0200000C0060C1E6C00600000300000000036600000000400000300180000000 0000000000000002C2004816CC0000000007E03C800E0000000F00000000000000000010004C0000 0003000000000000030180C00084000010000030C10300400000C3040C0609C00370060000028000); SDR 8000 TDI (809E2A9583CA44C390CAE520A28925E4B39842294CA1D486801390AA9972950841E5239132653487 926A43C920941E4928812402F1552CE6108A53287521A004E42A964D41E49248F24845098805E4AA 95E89A038A4D21E492490EA43400920672A9995A7948249CC21149E4908A13000F25632AE5328752 390422913240CE65491ECA49A00000D2965310520EE4F155EAD64B11C4C00420492264553552E656 8968D06933198C2995310D74E930394C46F33265B29B332993069149ED74691D00000007EAB4AA55 2A9B94C933D3E4F2797D2A4F4AA2F1E9CC9972A64942D598288AA97238D96AC4800000662CA78AA5 50D06D4AAE159111C552AAAD74192BA55CA2D65A09D4963CA78B2D530BE8AA55749544C0000000D2 6A4B198CC9A4D2A54A66352BCA06A351A952A56F0AD58BD2124964A653298B4FC53AA8D4AA2B1A4A A552AA95F4A608954F21A2A964B2C548AA4AA1A48AD1246C2A1492499350690E992C954AA520AA5D 2A6C24A5536592A1A4B4112D918485915998CA4932A68D8D549244B26538AA1549932A592A000000 172520E2A954552A954C4823C9B94C4E5CA592C4254328B65E52AD8B2E52F9ED2C6A0D2A5D4AA058 00000048154AA552AAA8D400800B4D001880000000006F81CC000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000201F80000000000000000000000000000000000000000000000000000000000000000040081 10A944221520010220428810783C1E0F0783C1E0F0783C1E0F0783C1E0F0D269349A4D269349A4D2 69349A4D269349A48743A1D0E8743A1D0E8743A1D0E8743A1D0E2D168B45A2D168B45A2D168B45A2 D168B45A000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000020550A94); SDR 8000 TDI (98CC6632A14C8592CA083299532650C984A324C828331C82A89551992AEA35AA8AE552AA55329A13 8010079752A54E6E3F2A952A674B9DCEA62B155326C5B3259C034B29D2A477F16D3C5A34898F29E2 A9752AAB329996CB15FA5932DD7F16804000426552DA0D9E54CA62AAD4B6994C8D956BF4B365D4AF 52A41540F28AA5ACA658B654CB16C89840A4239E9D49135155B6B21627152E76EB748A922CA5D7AD 36AA6C4E270031134CE2A955D2C56E27992DD6E954E8ED64AC48EBB3903CBE52740791A5F2513092 E06F96C3AA428099F49F2E0A4BCB51602D2E65531557A973E148AA954C98172565519812614CA952 0614CB258A950494D22504B8253099389A4CCDD3AB2DF4C27D309F4C27D309F4C21D32C74CB5D191 963A7D2F4D6EB3D0AD76625B1ED74F67DBE934AE7EAF97C563D175F67229154D29B5C898B0552C99 8A4554C8252C653329562A52DAECB6DA2B36CD6B64AA44B2E67B268DA557E2AD3269532654E59333 553466333A94AA6532694C9E4999C64A873A512CA433168CA265999CD4324CAA592A41312D347813 2644E002C2A9B29B4B154D2962C225EAE712A592EE53490DB49942B54D07672024CC3832A643A662 AA244E962CA25129974980EC661D2602CE54A9A12C9133A18CA642B26000604A995149A569A534A6 2D1553C0952290D29A532A5CC5513110AA954B9552A00001A4AAA95F155AA6624A1932000020120B D32848A29E49168CAAA4F3A93C990C9454CA674969FEE552968AA554AA94D299239984C000024142 DE23118C86A6D168FEE752958AA954AB9CB24A750012A593C8D9EECA2D024E8A7752C880654F0A40 0594A9993C69251654A9921264AE7A13000000033198D8762AA552C5945168B4464B294CA66128A5 7CFF2B19958592A954EA725290816B52822D682C059C56C105B8B016495B04124640595052964B2D 558AC28229B4960C9652C964CA55363A648B596421689000394A2883CB71602DB242491901669059 3124B700155EA8E363416C4E393756E3B6EB65BAA574394EA2600180B2A93B258D455491A12C6424 9594C5233018EA662B1704C5949894B296252999CAD2491108692AAC5329C4819452EA52AA0CADF1 5A916C5E3D16CF6EA3229994713903800F432954CC552C958AA652CA58B2995B154AA5D5C95D2CA9 33198CE6A0FAC0D4961280000644D299D27914BAD4C9932A5554662A954CE0A529654C974D098007 916BADD2564A9654C6B331592EED6C97888C452994140000364AE5A4AA4CAA1554BB8CC552A96534 255319948A74F99CBCE532A78AC9E7CBA5D2E974AA4FCEA73A65CE594F1E53C794F39CF2F62DA553 29A5B3A4F24825079246201240CE554B1B9348752390422913240CE6534879249243A91C82114898); SDR 8000 TDI (24006000010008181180808345F381E40A0100D543111170E8D516894E030400809070738B85EA01 508014D4098008A825421C402202A3430B2003211E1448005280002089460A4105088304D0A05411 08844ACA430144820000001201061A4098D02000070D100201EC3028001405A77208C08120109020 00904422111A8000000000010000800B4D000480000000006FCB6B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000E00D9C844F348BCD447351BCD42C050B08A22179089E0A17980926C21289C4E271389C6 0416A17CFAD52F85DA042248DCB4D83909D1A8D139C9B0D83909D1A8D139C9B0726C2344E2746B60 E4726C2344E2746B60E48D139C9B0D83909D1A8D139C9B0D83909D1A2746B60E4726C2344E2746B6 0E4726C2344EBB5DAED76442211088EE773B9DC110884422BB5DAED76442211088EE773B9DC11088 4422BB5DAED76442211088EE773B9DC110884422BB5DAED76442211088EE773B9DC1108844220C2F BD546001F8000000402A83400400014000502003440000DC781D089DD1ADC1B9480ADB7B1BDF0470 BBF4EEFD28B55E85B6B91C365246B5054957D254907544B80BA226C9FDF8DF2AB14AAF12F865EA5D 2AB7D0AF53B9B8CA792D094DC5531265CA912BB902A516F9F1B8D513B7DEAF47810CFAD74BBB5CEB C4FBCC2A41239D9DAD25ABE5EE5C79970E6F329B488A0D2B9513A752C874BA592AB24A23D1F9DDAE FD799FCAA612AB719ED567955FAF438155AA122B9CCBA362FB5498B42095C8AD621B3C7AF57B9D0A 845223F5BAD73A85D8C8D2AB55E05002914AED40AA54B6153A11482767A894BA652D8547E516A914 AAF433BE18E571AB05AA9626969CAAE55BFDF6572AB95D49A5F09D309534A48CC9A33298AA392C86 4EE567B26D324653218AA0200000B805449A5489B34994CCA84C9994C2A4D264CA9A4C9853467491); SDR 8000 TDI (0020468000210870800C168000A50905487550091205D14195C859049902E7A22954E4C20499810A 4048A842814C00494082C980106500A240054048345009440911C1920361000019908040804200C0 940E18810117884444343C00000487214414490B1A4B01A632444826070A928892C1091845019804 499549443869731148C322B245128C2A990121A2F25058264C97116885409488C427A0C22700BB1C 681D020000852261318E312681C820024341984C000C846442200C66420280000804A06040110884 46847671806E341A045A801321144033338D89A1C03800820F2F004000000039AC2344B301011088 C484356C265BAC418800200D27000000005104C68100054823548144300470048221900940208012 90888432214062446881000200210C188024110884466271A04C220108A7322044284D18055A0040 181C8811002340A0600000209027310884C620101A540835C9A740695020C7268D0E2CC0A3E4AA05 2283C284138904A8401AB04A84009830E2102380C2AC40992488102E910C80D2A0406C9130B2088D 222204C24D08800A0450A814A29442810824120110881728901244822311824748034A2101890460 0529BC0204528874A0510E950A2C10A13182046894400164922090120005040240A3308A512B8150 0200A82490A44A08028050080000D048040224D078001A0001804000C00104083020B00060008020 000000041920102955880C0404422CD1A13426D321854B832018002A010000100500180000011012 488C32191426080000800810000052400119082400724880442200DC0F0050C55C4C099440800003 80680E26A309A4D18B31600F67181FA300984C26130984DA204068CC18F31830C60C318031868C03 00064310E84D04D140980EA80220D030001C30448180E820AC07240D0308049980E8200C07410560 3821A260002E0C01D12035040B6B105A4201C024AC13130603A8408034042007235A0600E8304680 49980E8484135502603A04024D11000070092B04C4C180EA10200D0138120601A98504D120821A22 000048BA242C01D24603A880301D4211068180006086823A880125603A09A2412411106014010C46 5826820AC07240D030801A2506A2022111AE38062184A503800020000422490442E0900E89089000 0CA03B8008124CA200C0704B1008024890C22844688CC6246E96062C621B4008922011088140305C 00000004010344884D86C32204D8244182001872210CDA2542A945245324104824412110888C7198 17E2D301941C140AA6428CD668440A62749B8161622844A200000000040610040600000089244221 11A4C41C23518313084C9CC862105C8846A210264E3A040820748890284D261314845000458A1406); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000E001BC1E6517914CA6A351008009151880020178BC940A30080DE67354001FE5555 00110AA552295428052A910220528014110884422BB5DAED76EE773B9DC442211088442211088EE7 73B9DCBB5DAED76110884422110884422BB5DAED76EE773B9DC442211088442211088EE773B9DCBB 5DAED761108844225F0517C145F0517C14F5503D540F5503D540A07AA81EAA07AA81EA0A2F828BE0 A2F828BE0A2F828BE0A2F828BEA07AA81EAA07AA81EAF5503D540F5503D5405F0517C145F0517C14 285502940AA0000000000000020000000010000400020000028950A8002895488552885420002800 480550015000502A804A8052010020100201082512090420142A0100A05200040051009500050028 040A1528100AA1108040000500050000022100AA5528954A8400A1542A102A954AA5122950AA552A 954AA552A95488152A950A2512A95488512A944AA55229448A052A910AA5522114AA4522944AA552 2910AA4522154A25422154AA5522954AA112895422552A9542A5502954A8452A9502A442A9548A54 08950A2402A914824028804A80000140221522144A25428014A2102A9142A510A114AA452A054A25 10091002400080020552A9544346084380002954A0A85D828A224020644226411C19831040656444 4101930A00C990CCC820065641008845025E2A008326003A6930503927438013019D3471333404A1 C18A2110C82506922A653044480224088926506159204546200D41402020541442814120000000E4 300404422C30204C98806A110264C09920B24800800C08000908A0440696406CD080D4C8350B0000 000000D00004403203056000A46C4600A902011208CC243018B4C300D00040080013164AA5534908 AA5505090A2040190802582B118920201120024946210A2630A00042510A0842458211103C35518E 0244101184920908974881001000884E528348044223885200010893E7448901C2200A0C024290AA 552C11220840058521600A6572144485A2A9540000000000878488D0004010310200D22320840210 02C680210048B60E213C44EE10004862366B0010244490440001201402A440A9102A442A81000050 03200A002A119084448854808024254000908150424001010AA384009028841A00028010B025C200); SDR 8000 TDI (4EE12261045F0B1C1B41808904A83E3006DDCE00F2B946FE5D1C1C6CE51BF9747C71B3986275F00D C6827FA807C2B6597DFEDE46865C4CA5C24D1E997C2A17E6E5C18C523C7831D9EA37F2E9187B6789 DDC38771119EE31D91068FF3E875E6361FB75E6FF66B75B8BC7EBD068631488010581D24C2CFC419 A10CA804008C43179A0CF2B701B787E195108810BE05A984ADC1C8CDE659289B1108E480857EFD5E 0F4428A77A8DC41E3F8147EFF399CDEA1D1F96814A01011446452411828210C81C32857084488105 49090EF91B85C063547BEC2E821017C14204528850085023C6880103453C1022910408A70075CCD7 072800428502BC101448871CC3F3911D0EF84423C76F3100C1949701220000800A3C88D478094C84 42202114915108546A24408894A010028068A542A150A8541A0529A512214408450A114284528850 020E2450086112A0503B13329180915200EC4441069143231A89989810200EC24143291A895918D4 4CC4C28000CA220099463472804AA01E398105A41289DAA4462C8C6020528020895004804CA31A88 1021143291AD6140EC4CCA4702550002D11104A276A9118B23180814A0080244CDA27328503B1328 0000A48BD0228F7926072CA462246463150A90076220C9FA2847A6546EC4C0A0762650008D047122 A110B249A89989810200EC24411A89C8A4B8081816318601A6F0311148866100D400259139306350 0150860448385E181998878CC51808D4A810290642A102209042023C91429520985430553092E026 027082140892944820B2A05028551A05A5A258A94458782202CF56E9E420D95BBD5FEFF47A5C0422 04168004265B7D62FF778CDDE330892852DD0980540FD7F9FC94C71EB7C38C10422020115484146C 24B808105A41088C686231A142110D398121A04168D0A0469E5FC983381DEEA350A84AA2B222345C DA208E4884422290CAD22A110E0C300050B0F4223E4085C2A8140640020001E941FB682614008040 21F68B4DA243243102008038C41A440004082083A988200000950024528A24A8211E224F8442011D 000A2F829BA1F079C89E44221047482141A9401954911041600000180A1289810F0078A1042A24A5 054AA7C014BEFA409108844220000000800B4D001480000000006F6FD00000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (DFE00002A954FF7F954AAAA5500000FF7F954AAAA5500000FF7F954AAAA5500000FF7F954AAAA550 000018002800400351552AAA150000000001542AAA15000000000064486800AB404B405B016E8C55 8295E8A7D2A8E4AB0128154725D32938336C0306E03178099E04701B00030558A9166A10A0096422 0040123456120062A1432DE02C7F0C19E0F19BC1604F480A0480A40020E80210098804110A1530B0 3730C5E025F821524B70108542150010068420034000E42A246808322BD564D5A3AD86B879A21045 0291750E0A52B9824C9279A028014A31C8E49688C8662120008582247094E22C6023D060F62850A2 8523231403860005708E07008080C06801406213934AA576A96114C53A1D51082548EDE0714A35C4 ED05A128E0AB3D2B81418001E4720C06131E0317D110B64708915BC477A2C10A4C08214AA8620A4C 00F000130220078331983351200000A2F82810F11E8C1EACF061C024092A05940612D91420590296 516436E884446200350E605020548A54422212CCD41BF4EA5E319FD881D6D00808372C840241108A 4510897129500284D1A144591E968D0A354301C42209845923F79A211428690DD880355128BE4314 9DCF8CF089312A2A10081ECFC0001D00CD01871E4A5042216203058612C400A244B48C66005E0FF6 0101FA7F50841BC98203318C322A13002FC6428C50F0218FD86C03505116FB5F23CD0F262B34688F 0C20D488002B3D0E63053809EFA02045DA7407B7DF8DC6E10084FC1E834CCEB0BBA81E0E7F37DEA0 D1F8FC785B2583DB0F2073CC90C9079EC9EF03EB7D8E7139845D8C31E90822914488070432D00810 4904281004844221E8911C04D1A1042021108D1E82448CD1A1FDAA776ABDDFEFD3FB7DFEFD7F974A A5F6A985FEFF331E0EC050FBFDFE273B07954A37D9DD1EEA743F9BA43150317C3E21044CA8634084 10450809484114A8200421191C0A8A12634484CD013307CD340370B87359B3C68C02A844387C7810 1025C13B008E14019FC6AB32200DA2C06798DFED950A4184F103834E804760C8FCEA4CB61FAD32B8 E4B21F7B260C20A0C1A020814114012C205A7CE0F27E309E270340FC9CCC622443A635B8204CAB22 321B0330227DAAD3062FDEA987E8BC2E627FB2D8470780ED0C5D19358C2230322C522000000E6025 40A114A2000453E0850284508A510A1E05111000001042001009701080005D4104422201EBD9120A 2FA2900F1001548A8D44A986052668A596886C8154461101258CA00887C82504A1C058D809988445 F05220D8871B1D4241A0312482A36004CA281603DD98374D081944C1E3DCAE5C2B020E043003D068 6547AA00478648ED161811145488801320802A513092E02111C07E4014A01FEC82FBFCBC63432E06); SDR 8000 TDI (8850221C0A1108A4B2A0D02615269142A4A209D4A0400A914A65128952A841208C40F14269148A33 28944A95410814AA7A80134A2052801EA014AA800FA4028952A844999442A52281AC8350088108A5 1289700A1426914AA34098549A44AA8A00A7528100A254AA11266510A948A06B00C549A45268D026 55108146A1EAB1448A532A0549A452294CA20B25104EA500815068452A94499541A04CAA210A5500 E052A110A65128952A841208C40F402A914022A8A4529A510A914564283CAC9A400088429512E950 A22D238446044BA8542811288508B4108954A0142A1540A113209059112891C7E5205D542A741FCA A893F1514CDF219A90082752A05028552A054AA4508944485022054AA552A84098572A954AA05154 522204168060044AE92669552B8D233199952A951F20540AB551A8CA8155229F085142A900D64582 1847F2A8A448EA44888C28A252A14612152A8742A130A950A1452A954A8552E934A251289D4FE359 9452AA390ACB00F2D2BD54A0550A010080C0F04C0F670143CE16F17CA81544815007C6005560BC25 0080CF00B00044144D0088A481601506CF52BC4C64867864769450199D2E265A1C3E2121BFCAED43 131002FF2AA9552FA28025BEA07AA205088141A9442A55AE9002A00000108A5729806A8050A1242A 452AC540A7817D540A00281EAA07A8000000800B4D000C80000000006F5558000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000C001804000278BC5E2F179BCDE05029148A05151A88020001001E4F0542A800 0000001A8FB3B124AE3421AC8881223AA1945F2F97CBE5F2F97CBE5F2F97CBE5F2F97CBEF57ABD5E AF57ABD5EAF57ABD5EAF57ABD5EAA05028140A05028140A05028140A050281400A05028140A05028 140A05028140A0502814552ABFDFE00002A954552ABFDFE00002A954552ABFDFE00002A954552ABF); SDR 8000 TDI (118820A8442204C22572A9362654BA820FC2AA9590A6550A954AA1498842AE5C08944B65326054A6 452A894AE55048221110A8944D9241A934AB4CAE544AA512A9D4AA710A9006A550858CD54AA6CDA3 D340F5108A211551428552A144EA149A950A1542A93299411F9022A512815416412B900025502974 0A0DAA8548A2F821749A04048D4AA55209108A550E8B85515220BCC904860B46275261AA14441694 AAA40A2154AA4094954A9502A57CA05522144AA421094CA8410A954A02C9BD04AA5522950AE4C2E5 C88A34208A8AA542A94C4252A8134AA60A0D14AC0526952885530004A8351255CAA152A9948A552E 9540A150A8D4AA4D12850AE6529932AA252AC14A8552A9042A5117D50B215200BEBA0008950A2550 8040A94120104A8412015020000E8101815281108A152A804B916288548A552A0548A552A0548A55 2A954AA5538954AA552ADD45A152A9542A550A954A2552A914AA542A9548211125542A4017D562A5 4208507E7C829005F15881140A11289508174A99CC9A1122554A6442A05002512A85AC2779D0D0A0 40A152CA8172D954292F28C8C3B6899076854528954AA4128140A20D0284C5554A8954AA4D2A154A 2552A9742A532A084A51C2A9508920B59D480252AD40AA5628964A8540A934884A2CC54A255080CC AA5620D5022442AD4CA2242AD5698550A854A25522914A85A0A91CAA112984622450292A2241A80D 489520A114A255358742051288508A512A154ED4002844A211220105514A61105634A0D2C0E152A0 04FF2AA95049B1E2E9148A45028405F32B588A784E02946A27E2954AA0488D5F0A80296030680D18 9825552A20B646513A4222A6529452A230B650626502A9902A542890088352A954A945281C0AA552 A9D4C7551805208400891428148E8D400112214422611FCAA290D3985422002A104D8553E9F46243 2944AAA542A1FE5528B9954641E9615E28500A954A2151A944AA553A544BA512A954E9512E954265 510956AA4128154AA6D2A974BE458652C96542891496522A154EA541092AAA5A2A954A2552A912EA 5509954255539974A2153DD50AA1526954281526954AA4DA6172AD552A850424A88854A834A89540 A450A9042274039543A71289D8EE791A94C194D28432AA1526554A8350B954D5341A1060A5118956 AA56AA8148A5528954BA75228D4AA1328954EB151614AA050251449414254A4A22A2A8A886508954 0D9158892CAA113B8E42A452A854A2601554A204528950A8541A9548D14194AADA079681C8854161 54BA4410852A854169503214161542A1525914A84402844A2160A0F05514A20143A41A28C4A62E25 5B40F2D00D14A25138944A14308894A010A68048A542A150A8542A054AA512214408450A11428452); SDR 8000 TDI (4095080552A95586801C33118101800C0CCC60000CAC061A0002041C10042034A090080E0603000A 903001E0002E204AA552A815000C2215C827265A84A6000B8C588400A2046821389D048117980C38 21581C4E064020D03C2128054305370B08E0462C26082A32402184514284042150B01C844C610040 0216001002552A95504843800000552A95408141022008101085060140138004480289002F042B88 08C0280C1004028154AA5502954AA552A8000000800B4D001C80000000006FDA5500000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000F001BC1E2F128948A65329148A2512894CA45028148A4502814140A0010 00000000000F8383B1000E3461A28E0C26028416FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2A AA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2 AAA800FF2AAA800FF2AAA800FF7FBFDFEFF7FBFDFE552A954AA552A954AAAA552A954AA552A95400 0000000000000000FF7FBFDFEFF7FBFDFE552A954AA552A954AAAA552A954AA552A9540000000000 000000000864A65209C048000000000000000000000000000A880550AADC58C600001040005B097E 247EB3DEE8F7DBFC26FD19979FC736A93C08112601022010380D08003017004107C0FD9A7F43235C 4437000C18424D88008A10A3F5FEF47E8419A0F08BC1200E240B0248B52A21FC6114878040301A30 F6A806B281E211FA1190081D08814A01420110BC0108C040016151708B502BD100050321C0886422 0E4C26133D600A3E03D64841082060A0780FC180B39A381C2001225402A500087000062FD607C408 C1808F20309707301A008E624D0D8800100100E0A211B3186F7781E954C77E1F106214C0C19E0018 3C000C23A32580FF4FBD49E013129592F703805506615275D46A2D265748E14A851C8C322A9CCEA5); SDR 8000 TDI (12070601C1807200300E20000D000682A110020004134D26C04914A61A2D90842081042004221548 2100010022552881088550894048050603C0003100004000780C100001E0C1600C06080002F70000 46030783060B00000C46800400D840803B3180340820006010087418CC7810008330023018031100 018C81820040D000380805570800603018154820C40000100C018801808418004033040818080001 40184C238C4400C440001020418000420150001088050C000080430000C26602100C040030AAC50F 05C363001B0C600C2815420530683586300600C085520355BA1D0A1DC0E552A928EE02101542AC40 886002552A8546A0045910EC340400180A0010000823311D0180C0194008CF06140AA550A82D8622 69A3080552A8D40860480619AC01814082CC06150AA150E01064C0201550070209101010111410A2 83524880851A100AA00000000000081440A212A048B0D020154AA5544221800C0020104220000014 1A1120100202310C00202C22000522A9548A0401A50129948025302404B1130604C09012C24C0806 88904AF4008041268482410000008234220000241060606009098928213100AA4104800C09812024 C48210220128204B44489A481542A96328558C100384508400884822020001588402AB1510030003 C00085302444210938808041116802220500480884212110826809830034022010422A804020142A 200000010018A3C04A80708041130900322A98340103970AA0527954985529950AA4D28850A23112 354AA5D0094528A9231111E0000801801C20954AA450801082A10090010302385400442A9558E500 39454C971C100AAA10090006500A94D4CEB2215036C52883022D10400CA0552AA04E080060402000 0081080552A9C4204E0601000050A914684522010C01430904824120804A840228448A710A144285 10A114A2642905426200810426906801048042A05482550E21060010293480412005482C56101028 34008149A4020900AA042AB30100500915884C28040A044061308041180080A012A114A80123844A 8040291400C5618102E0909941A0080A010A05522154784C20104600202804A8452A3C580040A010 465008100AA440A81C02302090580040A0D00205009506A412A93040130A01098402088CA0102015 426546288C620202A348041200D484051A288E0002A9558420062580A881E155CA94083808055089 902A81003542E800800800006020080120635840834281C88CC660CC6620640F0608201B0840C230 154AA555402CAA552A92018364020DC6A30000DC0003C3811803038CDA0254880986020000092A40 0154AACC618A1FC7C218605CA60480000CC660004022600F106662C859801430870A2D561280AE55); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000C01FA8544A25128944A25128944A25028144A25128944A25128944A 20000000000000018C76885DFA512A9F5A8512795C88C964B2592633198CC69C4E27138361B0D86C C964B2592633198CC69C4E27138361B0D86CC964B2592633198CC69C4E27138361B0D86CC964B259 2633198CC69C4E27138361B0D86C72391C8E4D86C361B0271389C4E8D46A351A72391C8E4D86C361 B0271389C4E8D46A351AD86C361B072391C8E48D46A351A271389C4ED86C361B072391C8E48D46A3 51A271389C4E143FBD546021F8000000402A8540040001000040200544000B54A8541995C2A5C2A9 10AAF97B1FDF2C72ABF44EFE28B5DEADF7081C52425A94054D42C354145456800AA2B6B9FDAC1F6F 908EEF03B815E24F1ABFD88572EAD8D4D94A8952C5631294CAD13A044BA4C2F951B8D70B9F5A2D12 8B1DEE756A91C8A110A9143E4E46B448A530A134AE7468974A2452B95DAA8566954AED73E95CE27D 3B935A2753ABDCFE5533B75A2436F3503AF74EBF5AADD489FCEE136B915B81D2E975BC5422968AAD 925874EE5766974A885603D4AA6D3A955825D22331A6510E914EA512EB54AA5D2A05D8A712B854AA C72E97C7E712A11CEEF537BE58EF77BBC0480060100D2A61483180640C988D40A0011862B351B980 00C26131E6416180D98F00008000580386066542A9558248088001A000020C1E3111000084012008 022418214E04812371BA9D0000D82400804042120400006210A83108400200C08110000006C06080 0A0552A8546630219542AF37020C1E2E60000060C6183018042A15462E14224C38540E02C2EEF161 C058703111082102A9F42A0362B307084660C8661E1902CA855288CC04305838C100C2A814A01919 9C150CC1904C54B30009400582D8092C0C4204C1C84099088A0957281802B241548696328F406430 C044A6344183458944B00082402A834381C29154021840854BA1108A1CC2002E39822DC0214D0044 06101A074298403845081C4A031429CC00C142900F098329642E65131541A20009D0AA1500B14005 C00330A0421880C6A4218B4020122801008050A1406202021040E11620601C12070481C12070481C); SDR 8000 TDI (48834441F07E001080400040000000040000000000000004E0020000000000518C1C002010454120 1014020120000210204C00002A1000E04000000044038014E700509C449E51314E04A1027944E038 22860017B9F1AA944B0803C4A051C42A962486428164A04460010A2214E284E01800212812080204 F2898029040094E0053B00887047804604D0E001A2403184480410C0542214092158A04003001003 220380050411400C642231820503310888662910408194900432166211C0003188CCE60100130201 14000188102A84D80386B89CC21203064A80722A18040D33000000007800180001800000C0000000 301030000000015928A12211018014F87D800C020000010000010024602048832018000000000018 004039450C801801000A06820406080014D0CC82215000094804022110091C00000020068000E020 60C5000200000000C0820C0610004120500870830082000084020100804004050844100104300408 010200420840A000800864010240C603603600050000001C00060206236002301A00028001CC0623 6000301B001180D00014003800331B0000AA01848C069400228062301A00188D8005000200040041 90000D800200C0C068360000C3180D80D800100020014000188C068006236001400080013C180D80 0040C6030001400280005CA2301B00182D8000C06C0028000000E00070206301841180D0018C0600 02801C000600806836002301A00028001C400019810100000022002815002980400140800A390080 00A004080008A000445068008E00681109214000084080001000AC8608C0E814081E406004005848 031000000005512000000002000324020DC020020004000043810053038C0009C3DA85CE0027125C 64E0D00000C0001618070282D440794BB9840000000440D0001C1005D6B854001430870A21506280 00004000408000000006401CB00000018800000C000040AC40100000402400008042A05008000013 108A801001C00000200000000001001C2200CA06061845C4600B089984112164CA553A9D4A821712 083201181C8E0C446094385528854229362B10E24428844008320901805500040AA400A059804C4C 004000540020260000000A4153B000000000000800051220008010100608101201422828080A0B60 030080C0001800000000000000000000000000000000800B4D000280000000006F0CA90000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (BD414A02FBD414A02FBD414A02FBD4140055155FE0055155FE0055155FE0055155FEAA003FCAAAA0 03FCAAAA003FCAAAA003FCAA557F80154557F80154557F80154557F80154FF2AAA800FF2AAA800FF 2AAA800FF2AAA800285502940AA000000000000000000000005000140000000002A000AA002A904A 8052085428012001480550010000102A804A005201502244020540215001140A500A004280500010 0050229500250088142A5528004AA142A8542840081040211281408A540A0548A5520044A2150890 4821122910A851228542255221548A5528854A2542211488410A8040A55209508A542A9548A542A9 44A85522144A2510A1140A55289448A552A050A254209148A51288542241229502A550A95428442A 9442A440A144880502950AA41289502A4408910080500140A2150295022550085480500A914A2550 A954A2442A800A21400940025002900AA51021500060041608A0F14420D83BB25C20D0A03C60B731 A10004806235C64541A5D9AE00408046C029150C600000010034220083221030081C750000038500 400006083805160180ABB1DC6E008D900C0180318840000446420061F4A60306169B204000000C84 7105018000000066340300000E35034C1C4A620042E1C49870BA0D00000E0D020A0C90000E0102EE C3C1C020703001082102A8C40042603304815450C8EE5D149280000001DC22705A39C220C0004000 0C1B9D4E8CF3984DBAF322000020C05801865C2A95C9A1021810200017080824B06001A2710E0C00 6D20C044BE350B83C50C0001408E04000F098080100088112884C32110894CA0000430088CC22100 20400F00120300391C1A11081C08870081D808902894062750E01C2865131540254208C000000830 0220C2033002081801C6008180042A000810002000000460500281084116292D504B741697A5A5E9 697A5A5E939504E140D89CA842005600570278C24B2C98164B4580D9242C16AB11A0030044484000 00060042601040000210000000000490402E97C1247500016034700C100481E8E0C00C06080AC4F5 1814264307024406002048EC00220090C0407265227904855341003030388E7014092A62687010DA 00100D083500D480E240B04080060044603038000085C0B9C0220D6B854B805239B4027710911861 503804900E019C18A4C289D1A2050B9D468050E86CA841639D9A20528B1C20896E1D00AC62A07800 C02698C263105B4C600C0880010030603186340610D080002301980C011DC2E0000100EE02240000 0C02202020000000060050184062310681580A11A81000030A9D4184C29900000F2601000000015D 8610610300800000C088042A25598C03A040800C0E00400000E81062F10000180306084028042A00); SDR 8000 TDI (F229542C0000150AA550E910AE573084480400016423002880002040201008040A0000A102004030 01020040841080100051AA9060800021962B613C914205522918AA4708170BC110B15E085122918E A703C914B05E08858AF04288543255339E42245889D02C17AC85082470B15E20582F044285508950 0A1188854F21108100EA743C9100C658AD84F245281502A412A91C2C5788160BC110A15422543E99 4F205009962B412885482553FC72B05E22184F2452E17822152A9148C553F87CCB4580058AF0432C 5682512A990A87522160BC410B15E0851229182A45321148A552A8000F481F48620012A8142A1930 140AA3E2895800500A950B0373E9FE8079309167F508A10428052A154E0782C0F80A022E18042320 000C0B452A954AA0024154AA5528944380002D9008050200002403284053078C040B66CA85F6037B 329DEFE452A954C00014984737D23D64FF57BB85E221102900FF140C8407F6F85C003C7F8DDE63F0 102150AA152A140AA552A8468259389448059021442C0129C5EC21020810E2603A51E9C3F0717820 10170460204001D02A5102950AA550A812DE2ABFDA6FF7FB5DE4BF3EBC9EE1C3887078047BBF01E2 75FBF86C3779BF1FE3F7F9F99E441C001FAF37BBCDF81166910AAF36A9319EF36290008555F279E6 CF3780C0033618DD1AAA552A9A6DF6580000AA552A8542A040884420452A864280000006824D2283 4FC0032954C834A191022542A954AA452A954AA550000000800B4D001280000000006FC069000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000D001A8D40A05028140A05028140A05028140A05028140A05028 140A00100000000000140AA010294000012A050A2052A9005F50029EA5F50029EA5F50029EA5F500 29EAF505280BEF505280BEF505280BEF505280BE0A7A97D400A7A97D400A7A97D400A7A97D40A02F); SDR 8000 TDI (26B8DDF4080D3F800F01E10180A4252A49462532C15800601007A1D7D9353E7A5B10C8C0B1221472 7B4DA0480005E23D86030197D88C01D281C6EB6500006AA552A804BD770C180C3062C01C00080105 C081C0440A1818949608C18BB1DCEE018DC045128890AC60028882AA2571FD3281773FCFE2600000 18045029954AA552A866B0502A854CB0326DD8E17F200468E058B0588E542A9F4FB778AC44A81E22 07ECC113C060F860A319E3B7FACD54A8753B1DCAF000D066B30004154AA570DC60301831D384C553 2950AA7F805FCCF7BA4DFEF33082804A251830543E72A7C1E2F5DA8914320728C86E3542A992FF7F 9CC96B8190CC1E737DA3C00E854389D4A0553F9FC32552A9DC1C618CC7E3319A0CC63F07A3570C80 2BE180447F9CDA6F03F8DD3E1E181C0B4F9621FC10F061BE9E6FC7FBFC78EF173FDC6F305AE954AA 4532976AE5133950A21D08C74A21D0A07EA25DBA1062A542A0643007A8854336617DAA5F6A9FDFE7 D3F9FDFE7D7F975AA5D6AACCFEBF130F85C84643FDFA2B3180974B27DAD914AE762F95A820530D5C 0C452A954A84428444AA550A914AA552A1102A7E1FD2A21192840442753E99CC35FAD8C48C5F3CDE 85F2A8843E33660010462563F81848638C002800200418F033BCCBE12102B83CFE61A207C0076BF9 78DA09B00FECF2BBF4A0CA57A8144AA7128080385D2A954FE652BCD8AA5FAC9FCAC758AD46BF7834 1D6F357AA1D08A55BE9F83E27ABDFE9163ABD7EBC7F8A850EF5FBE97CAC7E3A80C6B773D982C2672 2954CA1632C463201B0C600C5D2A940AB0F03986300620C1CAA51389982C540CD06AA55088660050 2A854E8170B914AA553A8743321A6562BF412B194530B09C00A31D2E5B8CE31B04002F3F2A554AA5 52FDBEB062A3144AA550C8C6C22603598ED3E005802C2F2A954AA1E030E6F7052A854B261BF0A817 18AA19C0C003D12A6A11AA154A01522000A215299348A1400140CA502A954AA143F1962C0020104D 01F80014020120000212617C00006C2F814A7552A9140E118A81EF21023D403C05331E0E0500F014 C3780C060287FAF14082412807828780FC1882440200002420C160411F0A11E821E28154837933DC 0A01E02984C3180A01E0A07B05C0F007AA074FF5F83DF6F2078CD98CF198FC66BE1D03D98A055328 1023670B80408410A084200230810001130804220108C0008400001082642B8028179BFD7EA75522 9148345341FE305F2A9D4BA57A89D6DA37318F83F669FC7AC707A89540207800180001800000C000 0000B00030150A2453C178FB6733198752DAF5D00E512A954020000000007002C00B04180000A855 2A9D0AA07BCDDCE81D28154887002C16A8553CDDCEC663F110031C201763B1400D44AA5502064841); SDR 8000 TDI (025428514A80000000C0001498471550A824A6152210A000001400A5152C8406A4D0580028450894 42A150280000042A0000000000464018B09040059801842C000284ACC1120060824020854284A290 480200171320000001D0000100000000008024AC5500D4080618B982807580580717B984F2595D2E 5501E200045C0E182CD60C8023283899348544423653116477513B5EE035F20180A60798154BF34A A4008C70008000660030060000001442A4C000000000000508004088440644209600200200040250 20840A80032954C8552291002000000000000000000000000000800B4D000A80000000006F3C3000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000030018080000000000000000000000000000000000000000 00000000000000000000000C0181100C64222CA00000224A880EC9318D938364E324C69C1B18D926 364A706CC9318D938364E324C69C1B18D926364A706CC9318D938364E324C69C1B18D926364A706C C9318D938364E324C69C1B18D926364A706C00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000030551A942AA2B1552AAA150000000001542AAA1500000000009408850817 CB27C32A05C0A0532A9524A002A5F4AB310294C9A5B22940225A02050820D20512285C0D0042A49A A97E2A13120128202091D6F834A151ECE063D9FED86088D980261000C0A264084FC886C20044221B 08D249301A391A084C811C8114811C088804B49D2525C12C8A704085CC240272C86E054200D18B80 5030C0862021844E7760994CB22700864050633076AA1C0C9609B618D8000207224001109B01D600 058B04422060E1D4CC06298583621080684A061AD16CA01010008207939FA537F88430E24A0FC086); SDR 8000 TDI (000000381440C503B0002A5800C602A1800054021028014200000070A2050A004226428854AA552A 054AA552A054AA552A954AA5528954AA150A8D489642A9542A5100954A2558A914AA742A91402012 09340800000400844008500004000000000001140056AB85442112882496752E914925D2B9448C57 289402E5781C5663468152CA256288B280650848C0406958A2B15528954220023058AE6B220D4555 52B950AA11201548A552A940CA55280040074168C0BA5D00050AC452A950AA55A895CA8558A944BB 52285D4A255001502A11AC1502E452A954A245AA954A8550A850AA552E954A8543A814AA772A904C 24502800E04F29C343141B8C600C15000000316031C6380620C140000321DC0E002EC16000026576 025000100C00402000000010060195FB88747A47A999451128640053579D8BE4E69A84002F570280 000001ADAE60729300200000E0B481340A5FCE57A285002C5700800001602164EA040015432412A1 502A550011028552A854801108000A81522110690302140004008000C20000000004A2A98C8E552A 954A8552B954B20522814A92215C0000522A80C0A0000000084D80954A0052A944AA5522940AA502 A954A2502A8502A552F954A95528154AA552A854AA250A8502A52088E049152A154AA54008000254 2A944A0552A904AA140A9540A5528550A01500840AA150A944A005089108A110A844AA1502990000 0300541B5483500A24526894AA5232840A85528910AA51209102A5420854AA722644442512A9542A 00221000250289542A552A980BA5528954A245229502A452A8548A05000000047AA918AA51AA1548 E510A144B2043A800000428150AA4522178AA550A9802C0080000204108010884C0091033258A900 2000001800805A8954801C00000484C00906080028D54E8442A1100214201542A1402C0000000A07 2A657005348A000004000000C08C0E072800060400816423112880082040201008040A0000A10220 403841021040841080108201000968A050A1160A7028804280020010004608974A8000B854800120 010C06C28804B8540005C2A40008002200331440005081802C052800002260B05480592A0002A000 8000001180000A20008900C06A288000A45829C0A2012A0000001000982C1520164A8000A8002000 3C18AA2010A1160A500080002002AD54B81410182A2012D15000148010008002B0548B010A0582A4 022C14A00100110006022170A8000B854800120010004022000000000044A9282A89410008000002 103000400550A490825500000A0552A954807120914AA4100114205028054C0693F0E825132BC846 33A0A00C060400000000028000000008900300002D9008250200002003084053058C0002851009D6); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000001808000000000000000000000000000000000000 000000000000000000000000000C09E1188C642024380408062BA88A78438B5A4D216A1CF0873C34 85A2D691E10E873C3485A2D691E10E78438B5A4D216A1CF02D691E10E873C3485AD216A1CF078438 B5A4D216A1CF078438B5A42D691E10E873C3485A0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000003864A25209C040000000000000000000000000000A080550A9BC187C 0083C703C7121074E07AAFDE6CF143F5BEFD51895EE3F6E13C80100A01000C149B00802406030060 B6A3FDA23F0081000A10004918347A90186B01EB51FE506180DF80160000007102020024E4C21042 1C133094280102081407410007E027E020508E40000600160010660850330400A010086000368AC4 0880208040EF0123C4623100BD1AC321280468C1188010520520910A810229003111228100000320 708424088586C4002C4438010D860086088DF8570E2A0880A00900022313B357873778A53812460E D1E13100FDF2026C3B800E21832902F447BC89E0A49121680060300D66A5526D50AA55349B40A142 2876B753969089416139D6AA55AADD4EA55A8944C650AAC5600000015029442A15482541881AAA10 8213CA4120881424592A0E02815371BA9D512A910A25102150810508854A0061A94402472A954080 02819404302A814000000166B80000000CB1316CD8926D228366E158A0508A0000160E64D20D0402 1621056CC512C840B8510211422550C900A860378B25A452D9766A150680000022DC3C301C31CAC8 C0010010085D959548A5D2AD54A24118004000182804AC4D1AD5C9A3380440284718884931400102 AA552C916A811089567A538380080412895400002B150220100190284108854221121D442A0D2695 088052A100885528944B0550A9542A102C154AA44AA810A0412A964A8552A850AA152A944A0010C0); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000800B4D001A80000000006F1D FF000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D00068000000000 6FC28900000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D0016800000 00006FFE6C0000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000800B4D000E80 000000006FD830000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000800B4D00 1E80000000006FED4200000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000800B 4D000180000000006FCB1E0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (800B4D001180000000006F0154000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000800B4D000980000000006F270800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D001980000000006F127A0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000800B4D000580000000006F3426000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000800B4D001580000000006F08C300000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000800B4D000D80000000006F2E9F0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000800B4D001D80000000006F1BED000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 1784 TDI (FFFFFFFF0000007A3DB100000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK 1.00E-02 SEC; SIR 8 TDI (C0); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SDR 32 TDI (00000000) TDO (00000000) MASK (FFFFFFFF); SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-01 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000100) MASK (00002100); ================================================ FILE: demo/litex_with_dram_flash.svf ================================================ //ULX2S / ULX3S JTAG programmer v 3.0.92 (built Sep 19 2020 14:37:22) //START STATE IDLE; STATE RESET; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK; SIR 8 TDI (0e); SDR 8 TDI (01); RUNTEST IDLE 32 TCK 1.00E-01 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); STATE RESET; STATE IDLE; SIR 8 TDI(FF); RUNTEST IDLE 32 TCK; SIR 8 TDI(3A); SDR 16 TDI(68FE); RUNTEST IDLE 32 TCK; SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000001B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000801B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000401B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000c01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000201B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000a01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000601B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000e01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000101B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000901B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000501B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(20); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFAF26000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000051B889410000006200000802000000 44C208888200000047000000DCFFFFFFFFCDBDFFFFFF008C1CCC82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF00000040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000800040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000400040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000200040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000a00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000e00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF4A910000000000000000000000000000001800100040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000900040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000500040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000d00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000300040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000700040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000880040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000480040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000280040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000a80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000680040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000e80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFD3590000000000000000000000000000000000000010000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000180040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000980040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000580040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF8C9600000000000000 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFC495000000000000000000000000040000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8C9600000000d80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC4950000000000 000000000000000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000380040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000b80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000780040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF835F00000000000000000000000000000000000010000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2179000000000000000000000000000000000000080000000000000000000000000000040040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000840040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000440040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000200000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000c40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF20E4000000000000000000000000200000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF20E400000000000000000000240040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000640040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000e40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000140040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000940040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000540040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000340040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000b40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000740040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000f40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000cc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000006c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000009c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF005c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000003c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00bc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000fc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000020040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF211A00000000 000000000000000000000002000000000000000000000000000000000000000000000000000000000000000000000000000000820040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF211A000000000000 0000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000420040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000c20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000220040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000a20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000620040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000120040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000920040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000520040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000d20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000320040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000720040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000f20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000008a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000004a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000002a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000aa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000001a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000da0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000007a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000860040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000460040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000260040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000a60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000400000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000660040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF80ED0000000000000000000000000000000000000000000000000000000000e60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80ED00000000160040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000960040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000560040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000d60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000360040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000b60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000760040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000008e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8DC200000000000000000000000000000000000000000000000000000000000000000000000000000002 00000000000000000000000000000000000000000000000000000000000000000000FF8DC200000000000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000ce0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000002e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000006e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000ee0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000009e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000005e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000be0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000010040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000810040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000410040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000c10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000210040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000610040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00e10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000110040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000910040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00510040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000310040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000b10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000710040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000f10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000090040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000890040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000490040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000c90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000290040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000a90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000690040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000190040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000990040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000590040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000d90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000390040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000790040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000f90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000850040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000450040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000250040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000a50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000650040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA6DA000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000 FFA6DA0000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000 000000000000000000000000000000000000000000000000000000FFA6DA000000000000000000000000000000000000000000150040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFA6DA0000000000000000000000000000000000000000000000000000 000000000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000FFA6 DA00000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000 00000000000000000000000000000000000000000000000000FFA6DA00000000000000000000000000000000000000000000 000000000000000000000000000000040000000000000000000000000000000000000000000000000000000000000000000000950040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000550040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000d50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000350040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF807400000000000000000000000000000000000000000000000000000000 00000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000750040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8074000000 0000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000 000000000000000000000000000000000000000000FF81460000000000000000000000000000000000000000000000000000 000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000FF4000f50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000800000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000 0000000000000000000000000000000000FF3647000000000000000000000000000000000000000000000000000000000000 0000000000041000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF80740000000000000000000000000000000000000000000000000000008d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFBB1A00000000000000000000000000000000000000000000000000000000 00000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000FF814600004d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE04F0000000000 000000000000000000000000000000000000000000000000000000000000000A000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000002d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF060E00000000000000000000000000000000000000000000000000000000000000000000 00000A04000000000000000000000000000000000000000000000000000000000000000000000000FFC6E100000000000000 0000000000000000000000000000000000000000000000000000000000020400000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000ad0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0406000000000000000000000000000000000000000000000000000000000000000000000000FF6635000000000000000000 0000000000000000000000000000000000000000000000000000000804000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF073C0000000000 0000000000000000000000000000000000000000000000000000000000000012040000000000000000000000000000000000006d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA00000000000000 0000000000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000000 0000000000000000000000000000000000FFB58D00000000000000000000000000000000000000000000000000000000000000ed0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFC6E1000000000000000000000000000000000000000000000000000000000000000000000000 0204000000000000000000000000000000000000000000000000000000000000000000000000FF66AC000000000000000000 0000000000000000000000000000000000000000000000000000000404000000000000000000000000000000000000000000 000000000000000000000000000000FF75FB0000000000000000000000000000000000000000000000000000000000000000 000000000006000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000001d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000004 000000000000000000000000000000000000000000000000000000000000000000000000FF66AC0000000000000000000000 0000000000000000000000000000000000000000000000000004040000000000000000000000000000000000000000000000 00000000000000000000000000FFA6DA00000000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFA6DA0000000000000000000000000000000000000000000000000000000000000000005d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF93BA00000000000000000000000000000000000000000000000000000000000000000000 00000002000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000dd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF80ED0000000000000000000000000000000000000000000000000000000000000000000000000400 000000000000000000000000000000000000000000000000000000000000000000000000FF80ED0000000000000000000000 0000000000000000000000000000000000000000000000000004000000000000000000000000000000000000000000000000 00000000000000000000000000FF20A00000000000000000000000000000000000000000000000000000000000000000000000bd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000007d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF93BA000000000000000000000000000000 0000000000000000000000000000000000000000000002000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF20A00000000000000000000000 000000000000000000000000000000000000000000000000000200000000000000000000000000000000000000000000000000fd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000030040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFF23B000000000000000000000000000000020000000000000000000000000000000000000000000200000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF211A0000000000000000000000000000000200000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF93BA000000000000000000000000830040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000430040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF20A0000000000000000000000000000000 0000000000000000000000000000000000000000000200000000000000000000000000000000000000000000000000000000 000000000000000000FF20A0000000000000000000000000000000000000000000000000000000000000000000000000020000c30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000230040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FFA6DA00000000000000000000000000000000000000 0000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000000000000 0000000000FF20A0000000000000000000000000000000000000000000000000000000000000000000000000020000000000 0000000000000000000000000000000000000000000000000000000000000000FFA6DA000000000000000000000000000000 000000000000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000000a30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000040004000000000000000000000000000000000000000000000000000000000000000000 000000FF75FB0000000000000000000000000000000000000000000000000000000000000000000000000006000000000000 000000000000000000000000000000000000000000000000000000000000FFC6E10000000000000000000000000000000000 0000000000000000000000000000000000000002040000000000000000000000000000000000000000000000000000000000 00000000000000FF5D5B0000000000000000000000000000000000000000000000000000000000000000000000020004000000630040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF727100000000000000000000000000000000180000000000000000000000000000000000000000060000000000000000 00000000000000000000000000000000000000000000000000000000FF471100000000000000000000000000000000180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF11DB00000000000000000000000000000000e30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF7271000000000000000000000000000000001800000000 0000000000000000000000000000000006000000000000000000000000000000000000000000000000000000000000000000 000000FFA1500000000000000000000000000000000018000000000000000000000000000000000000000004000000000000 000000000000000000000000000000000000000000000000000000000000FFA1500000000000000000000000000000000018 000000000000000000000000000000000000000004000000000000000000000000000000000000000000000000000000000000130040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000080800000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFA15000000000000000000000000000000000180000000000000000000000000000000000000000040000000000000000 00000000000000000000000000000000000000000000000000000000FF124A00000000000000000000000000000000180000 0000020002000000000000000000000000000400000000000000000000000000000000000000000000000000000000000000 0000000000FF840E00000000000000000000000000000000180000000004000400000000000000100800000000040000000000930040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 4711000000000000000000000000000000001800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF4711000000000000000000000000000000001800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF47110000000000000000000000000000000018000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFE474000000000000000000000000000000001800530040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF5FE70000000000000000000000000000002018000000000000 0000000000000000000000000008000000000000000000000000000000000000000000000000000000000000000000000000 00FFD70D00000000000000000000000000000000180000000000000000000000000000000000000001000000000000000000 00000000000000000000000000000000000000000000000000000000FF943000000000000000000000000000000000180000 000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000d30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 0895000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF4711000000000000000000000000000000001800000000000000000000000000000000000000000000000000000000330040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF4711 0000000000000000000000000000000018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFB3F00000000000000000000000000000004008000000000000 0000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 00FF807400000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000 00000000000000000000000000000000000000000000000000000000FF821C0000000000000000000000000000000008000000b30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FFD08700000000000000000000000000000000000000000000000000 00000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000FF 42F3000000000000000000000000000000000800000000000000000000000000000000000000080000000000000000000000 0000000000000000000000000000000000000000000000000000FFDE56000000000000000000000000000000001000000000 000000000000000000000000000000088200000000000000000000000000000000000000000000000000000000000000000000730040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80ED 0000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000 000000000000000000000000000000000000000000000000FF80740000000000000000000000000000000000000000000000 0000000000000000000000000008000000000000000000000000000000000000000000000000000000000000000000000000 00FF81460000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000f30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF53550000 0000000000000000000000000000000000000000000000000000000000000000000008020000000000000000000000000000 00000000000000000000000000000000000000000000FF20A000000000000000000000000000000000000000000000000000 00000000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FFB0AA000000000000000000000000000000400000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7045 0000000000000000000000000000004000000000000000000000000000000000000000000800000000000000000000000000 000000000000000000000000000000000000000000000000FF8E7A0000000000000000000000000000000000000000000000 0000000000000000000000000080000000000000000000000000000000000000000000000000000000000000000000000000008b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8E7A00000000000000000000000000000000000000000000000000 00000000000000000000008000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF8146000000000000000000000000000000000000000000000000cb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF80ED0000000000000000000000000000000000000000000000000000000000 000000000000000400000000000000000000000000000000000000000000000000000000000000000000000000FF16440000 000000000000000000000000000AA00000000000000000000000000000000000000000020000000000000000000000000000 00000000000000000000000000000000000000000000FF807400000000000000000000000000000000000000000000000000 00000000000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000FF002b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000001004000000000000000000000000000000000000000000000000000000000000000000000000FF807400000000 0000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000000000000 0000000000000000000000000000000000000000FFED25000000000000000000000000000000154000000000000000000000 0000000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000FFC565 0000000000000000000000000000000AA000000000000000000000000000000000000000000000000000000000000000000000ab0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000000 000000000000000000000000000000000000FFA6430000000000000000000000000000000000000000000000000000000000 000000000000000C04000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA0000 0000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000 00000000000000000000000000000000000000000000FFE2F90000000000000000000000000000000AA00000000000000000006b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF93BA00000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFEED4000000000000000000000000000000000000000000000000000000 0000000000000000000084000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA00eb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000004000000000000000000000000000000000000000000000000000000000000000000000000FF36C6000000000000 0000000000000000000000000000000000000000000000000000000000000104000000000000000000000000000000000000 000000000000000000000000000000000000FFC6E10000000000000000000000000000000000000000000000000000000000 000000000000000204000000000000000000000000000000000000000000000000000000000000000000000000FFA6DA0000 0000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000001b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000002000040000000000000000000000000000000000000000 00000000000000000000000000000000FF93BA00000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000000000000000000000000000000000000000000FF66AC00000000 0000000000000000000000000000000000000000000000000000000000000000040400000000000000000000000000000000 0000000000000000000000000000000000000000FFA6DA000000000000000000000000000000000000000000000000000000009b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF2086000000000000000000000000000000200000000000000000000000000000000000 0000200000000000000000000000000000000000000000000000000000000000000000000000000000FFB0AA000000000000 0000000000000000004000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF43230000000000000000000000000000000000000000000000000000000000 000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000FF1EDE0000005b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000008000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000003b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFD08700000000000000000000000000000000000000000000000000000000000000 00000000000100000000000000000000000000000000000000000000000000000000000000000000000000FF08950000000000bb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF20A0000000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000000007b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000002000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF20A00000000000000000 0000000000000000000000000000000000000000000000000000000002000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000fb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FFC0DA00000000000000000000000000400000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFC0DA000000000000000000000000004000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF93BA00000000000000070040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF68AE000000000000000000000000 0000000000000000000000000000000000000000000000000280000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF68AE0000000000000000 000000000000000000000000000000000000000000000000000000000280000000000000000000000000000000000000000000870040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000080000000000000000000000000000000000000000000000000000000000 00000000000000000000FF80ED00000000000000000000000000000000000000000000000000000000000000000000000004 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000470040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF81F2000000000000000000000000000000000000000000000000000000000000000000000800000000 0000000000000000000000000000000000000000000000000000000000000000000000FF20A0000000000000000000000000 0000000000000000000000000000000000000000000000000200000000000000000000000000000000000000000000000000 000000000000000000000000FF93BA0000000000000000000000000000000000000000000000000000000000000000000000 000002000000000000000000000000000000000000000000000000000000000000000000000000FF81F2000000000000000000c70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000006000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000270040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000048000000000000000000000000000000000000000000000000000000000 0000000000000000FF75FB000000000000000000000000000000000000000000000000000000000000000000000000000600 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF75FB000000000000000000000000000000000000000000000000000000000000000000000000a70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFA6CD0080000000000000000000000000000000000000000000000000000000000000000000000404000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFE5E700000000000000000000000000000000000000000000000000000000000000000000000001 06000000000000000000000000000000000000000000000000000000000000000000000000FFC8E30000000000000000000000670040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF66BB00800000000000000000000000000000 0000000000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000010000000000000000000000006000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFA6DA0000000000000000000000000000 0000000000000000000000000000000000000000000000040000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000170040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFA6DA00000000000000000000000000000000 0000000000000000000000000000000000000000000400000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF8A6F00000000000000000000000000970040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FFBF0F000000000000000000000000000000000000 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000570040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF807400000000000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000d70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF93BA000000000000000000000000000000000000 0000000000000000000000000000000000000002000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000370040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF814600000000000000000000000000000000000000000000000000000000000000000000000010000000000000 00000000000000000000000000000000000000000000000000000000000000FF807400000000000000000000000000000000 000000000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000000000b70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000100000000000000000000000000000000000100000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF5D20000000000000000000000000000000000000 0000000000000000000000000000000000000800000000000000000000000000000000000800000000000000000000000000 000000000000FF8074000000000000000000000000000000000000000000000000000000000000000000000000080000000000770040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5D2000000000000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000800000000000000000000000000000000000000FF7BED0000000000000000000000000000000000f70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000 0000000000000000000000000000080000000000000000000000000000000000080000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF5D200000000000000000000000000000000000000000 0000000000000000000000000000000008000000000000000000000000000000000008000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000008f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF7B ED00000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000001000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000004f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000800000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF80740000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000 000000000000000000000000000000000000000000000000000000FF81460000000000000000000000000000000000000000 000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000cf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5D20000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000002f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFE24200 0000000000000000000000000000000000000000000000000000000000000000000000100400000000000000000000000000 0000001004000000000000000000000000000000000000FF8074000000000000000000000000000000000000000000000000 0000000000000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000 FFD9340000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000 000000000000000004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000af0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000004000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF19 DB00000000000000000000000000000000000000000000000000000000000000000000000008040000000000000000000000 00000000000004000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFD934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000ef0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000000000000000 000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFD93400000000000000000000000000000000000000000000001f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFD934000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000009f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFDA9A0000000000000000000000000000000000000000000000000000 000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000000000FFDA 9A00000000000000000000000000000000000000000000000000000000000000000002000000000000000000000000000000005f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000df0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40003f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000007f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFAC4D0000000000000000000000000000000000000000000000000000000000000000 000000000002000000000000000000000000000000000002000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D0000ff0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF41A9000000000000000000000000000000000000000000000000000000000000 0000000000001800000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9DCF0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000808040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF243500000000000000000000000000000000000000000000000000000000000000000000 00000482000000000000000000000000000000000002000000000000000000000000000000000000FF211A00000000000000 0000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9DCF00000000408040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0200000000000000000000000000000000000000000000000000000000000000000000000000FF73BE000000000000000000 0000000000000400000000000000000000000000000000000000000300000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000840000000000000000000000000000000000040000000000 00000000000000000000000000FFC8E300000000000000000000000000000000000000000000000000000000000000000000 00000480000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF20A000000000000000000000000000000000000000000000000000000000000000208040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFB90F000000000000000000000000000000000000000000000000000000000000000000000000 0204000000000000000000000000000000000004000000000000000000000000000000000000FF0126000000000000000000 0000000000000000000000000000000000000000000000000000000184000000000000000000000000000000000004000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF913A000000000000a08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD9340000000000000000000000 0000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000000000 00000000000000000000000000FFEE7F00000060000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000204000000000000000000000000000000000000FFB90F00000000000000 000000000000000000000000000000000000000000000000000000000002040000000000000000000000000000000000040000608040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000000000000000000000000004000000000000000000000000000000000000FF9B18000000000000000000 0000000000000000000000000000000000000000000000000000000002000000000000000000000000000000000202000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000e08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FFB3050000000000000000000000000000000000000000000000100000000500000000100000000506 000000100000000110000000000000000006000000000000000000000000000000000000FFD9340000000000000000000000 0000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000000000 00000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000000000000000 00000004000000000000000000000000000000000004000000000000000000000000000000000000FFD9340000000000000000108040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE90B00000000000000000000000000 0000000000000000000000000000000000000008000000028000000008000000008800000000000000000000000000000000 0000000000000000000000FF35E2000000000000000000000000000000000000000000000000000000000000000000000000 0006000000000000000000000000000000000006000000000000000000000000000000000000FFEA79000000000000000000 000000000000000000000000000008000000020000000000000000000000000000000000000000000000000000000000000000908040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFC0980000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000508040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF625500000000000000000000000000 0000000000000000000000000000000000000000000000080000000000000000000000000000000000082000000000000000 0000000000000000000000FF649C000000000000000000000000000000000000000000000000000000000000000000000000 0040000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000d08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000000 0000000000000000000000000800000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFCDEC0000000000000000000000000000000000000000000000000000000000000000000000000020 000000000000000000000000000000000020000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000308040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000009000000000000000000000000000000000009000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF7BED00000000000000000000000000 0000000000000000000000000000000000000000000000100000000000000000000000000000000000100000000000000000 0000000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000000000000000b08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF7BED000000000000000000000000000000000000000000000000000000000000000000000000100000000000 0000000000000000000000001000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFB1F60000000000000000000000000000000000000000000000000000000000000000000000000802 000000000000000000000000000000000802000000000000000000000000000000000000FF7697000000000000000000000000708040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000002000000000000000000000000000000000000FF6B2C0000000000000000000000000000000000 0000000000000000000000000000000000000001000000000000000000000000000000000001000000000000000000000000 00000000000000FF17F500000000000000000000000000000000000000000000000000000000000000000000000002000000 00000000000000000000000000000200000000000000000000000000000000000000FF5D2000000000000000000000000000 000000000000000000000000000000000000000000000008000000000000000000000000000000000008000000000000000000f08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000020000020000000000000000000000000000000000001000000000000000000000000000000 0000000000FF1F2A0000000000000000000000000000000000000000000000000000000000000000000000000C0200000000 0000000000000000000000000C02000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF7F6C000000000000000000000000000000000000000000000000000000000000000000000000000000088040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF80030000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 000000000000000000000000000000000000000000000000000000000000FFC3E90000000000000000000000000000000000 0000000000000000000000000000000000002010000000000000000000000000000000000010000000000000000000000000 00000000000000FF7BED00000000000000000000000000000000000000000000000000000000000000000000000010000000 00000000000000000000000000001000000000000000000000000000000000000000FF9FBA0000000000000000000000000000888040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000002000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFCEC8000000000000000000000000000000 000000000000000000000000000000000040000000000000000000000000000000000000000000800000000000000000000000488040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000900000000000000000000000000000000000800000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFAC4D0000000000000000000000000000000000 0000000000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FF7B3D0000000000000000000000000000000000000000000000000000000000000000000000000002100600c88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF17F500000000000000000000000000000000000000 0000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000000000 0000000000FFBD4F000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000080000000000000000000000000000000000000FFCD3C00000000000000000000000000000000288040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000200000000000000000000000000000000000000FF0E94000000000000000000000000000000000000000000 0000000000000000000000000000001006000000000000000000000000000000001006000000000000000000000000000000 000000FF76970000000000000000000000000000000000000000000000000000000000000000000000000900000000000000 000000000000000000000900000000000000000000000000000000000000FFD9340000000000000000000000000000000000 000000000000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000a88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFC48F00000000000000000000000000000000000000 0000000000000000000000000000000000080400000000000000000000000000000000080400000000000000000000000000 0000000000FF17F500000000000000000000000000000000000000000000000000000000000000000000000002000000000000688040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF D934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000 0000000000000004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFD934000000000000000000000000000000000000e88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000004000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000000000 0000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000000000 00FF35E200000000000000000000000000000000000000000000000000000000000000000000000000060000000000000000 00000000000000000006000000000000000000000000000000000000FFD93400000000000000000000000000000000000000 000000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000188040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000000000FF 4FDF000000000000000000000000000000000000000000000000000000000000000000000020000400000000000000000000 0000080000000004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000988040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFD1F90000000000000000000000000000000000000000000000 0000000000000000000000002000000000000000000000000000000000004000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF69FD0000000000000000000000000000000000000000588040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF1D45000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000d88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000100000000000000000000000000000000000100000000000000000000000000000000000000FF1997 0000000000000000000000000000000000000000000000000000000000000000000000000082000000000000000000000000 000000000082000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000388040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF B7B8000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000 0000000000000200000000000000000000000000000000000000FF6B2C00000000000000000000000000000000000000000000b88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0400000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80A1 8000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000788040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000440000000080000000000000000000000000000000000000000000000000000000000000000000FFAC4D0000 0000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000 00000002000000000000000000000000000000000000FFFCCC00000000000000000000000000000000000000000000000000 00000000000000000000000050000000000000000000000000000000000050000000000000000000000000000000000000FF 2E3100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFC791000000000000000000000000000000000000000000000000000000 0000000000000000440000000000000000000000000000000000000000000000000000000000000000000000000000FF8636 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000000000000000000000000000000000000FF04C6000000000000000000000000000000000000000000000000048040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF80740000000000000000000000000000000000000000000000000000000000 000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000FFBEB10000 0000000000000000000000000000000000000000000000000000000000000000000000280000000000000000000000000000 00000028000000000000000000000000000000000000FF6CA200000000000000000000000000000000000000000000000000 00000000000000000000000802000000000000000000000000000000000002000000000000000000000000000000000000FF00848040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF2E31000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000448040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF77CE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000200000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000c48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002000000 00000000000000000000000000000000FF17D500000000000000000000000000000000000000000000000000000000000000 00000000008004000000000000000000000000000000000004000000000000000000000000000000000000FF8E7A00000000 0000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00248040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000204000200000000000000000000000000000204000000000000000000000000000000000000FF3FDA000000000000 0000000000000000000000000000000000000000000000000000000000000104000200000000000000000000000000000104 000000000000000000000000000000000000FFDEEC0000000000000000000000000000000000000000000000000000000000 0000000000000000A4000000000000000000000000000000000084000000000000000000000000000000000000FFA5F70000 000000000000000000000000000000000000000000000000000000000000000000000220000000000000000000000000000000a48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000000000FFD93400000000 0000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000000000 0004000000000000000000000000000000000000FF430300000000000000000000000000000000000000000000000000000000648040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000400000000 0000000000000000000000000000FF0460000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000000000000000000000000804000000000000000000000000000000000000FF35E2000000000000 0000000000000000000000000000000000000000000000000000000000000006000000000000000000000000000000000006 000000000000000000000000000000000000FF9DCF0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000800000000000000000000000000000000000000FF409B000000e48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000000 000004000000000000000000000000000000000004000000000000000000000000000000000000FF5DEA0000000000000000 00000000000000000000000000050004000000001000051008000000000C0005081000000000200004001000000000040000 00000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000000000FFD93400000000 000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000148040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFE7C2000000000000000000000000000000000000000000000000000000000000008808 0000000008000288080000000020000200080000000000000000000000000000000000000000000000FFD934000000000000 0000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000004 000000000000000000000000000000000000FF707D000000000000000000000000000000000000000000008000000000000800948040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF66AC0000000000000000 0000000000000000000000000004000400000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000548040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF152E000000000000000000000000000000000000000000000000000000000000000000 0000000880000000000000000000000000000000000800000000000000000000000000000000000000FF2C83000000000000 000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000003200d48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000800000000000000000000000000000000000820000000000000 000000000000000000000000FFF54C0000000000000000000000000000000000000000000000000000000000000000000000 000012000000000000000000000000000000000002000000000000000000000000000000000000FFD34E0000000000000000 0000000000000000000000000000000000000000000000000000000000C00000000000000000000000000000000000080000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000348040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF0A5D00000000000000000000000000000000000000000000000000000000000000000000000008 02000000000000000000000000000000000902000000000000000000000000000000000000FFAC4D00000000000000000000 0000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200000000 0000000000000000000000000000FFD36B000000000000000000000000000000000000000000000000000000000000000000 0000001048000000000000000000000000000000001000000000000000000000000000000000000000FF625500000000000000b48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000080000 0000000000000000000000000000000900000000000000000000000000000000000000FFD540000800000000000000000000 0000000000000000000000000000000000000000000000001000000000000000000000000000000000001400000000000000 000000000000000000000000FF809C0008000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF152E0000000000000000 000000000000000000000000000000000000000000000000000000000880000000000000000000000000000000000800000000748040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFC89200080000000000000000000000000000000000000000000000000000000000000000000000 80000000000000000000000000000000000000000000000000000000000000000000000000FF20A000000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000 0000000000000000000000000000FFE68B00000000000000000000000000000000000000000000000000000000000000000000f48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFD1A0000000000000000000000000000000000000000000000000000000000000008000000000000200 0000000000000000000020000000000002000000000000000000000000000000000000FF3D1B000000000000000000000000 0000000000000000000000000000000000000000000000000A00000000000000000000000000000000000800000000000000 000000000000000000000000FF77CE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000200000000000000000000000000000000000000FF409B0000000000000000000c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000040000000100000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFEADA40080000000000000000000000000000000000000000000000000000000000000000800000 00000000000000000000000000000080000000000000000000000000000000000000000000FFA6BE40000000000000000000 0000000000000000000000000000000000000000000000010000080000000000000000000000000000008010080000000000008c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000018000000000000000000000000000000000000000000000000000000 0000000000000000FF7BED000000000000000000000000000000000000000000000000000000000000000000000000100000 0000000000000000000000000000001000000000000000000000000000000000000000FF1962000800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000000 000000000000000000000000FF11190000000000000000000000000000000000000000000000000000000000000100000000004c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF5D200000000000000000000000000000000000000000000000000000000000000000000000000800000000 000000000000000000000000000800000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF196100000010000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000080000000000000000000000000000000000FF404A0008000800000000000000cc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 00000000000000000000000404000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF744C200000000000000000000000000000000000000000000000000000000000000000000000000200 0000000000000000000000000000000002000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000 000000000000FF12434000000000000000000000000000000000000000000000000000000000000000000000001004000000 000000000000000000000000001004000000000000000000000000000000000000FF9D270008000000000000000000000000 0000000000000000000000000000000000000000000008000000000000000000000000000000000008000000000000000000 00000000000000000000FFD7A50000000000000000000000000000000000000000000000000000000000000000000000000200ac8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000000000 0000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000000000 0000000000000000FF33AC0000000000000000000000000000000000000000000000000000000000000000000000000C0400 0000000000000000000000000000000A04000000000000000000000000000000000000FFD934000000000000000000000000006c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000004000000000000000000000000000000000000FF1939001000000000000000000000000000000000 0000000000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000 000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFF5410000000000000000000000000000 000000000000000000000000000000000000000000000080000000000000000000000000000000000080000000000000000000ec8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000004040000000000000000000000000000000002040000000000000000000000000000 00000000FFB79E00000000000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000404000000000000000000000000000000000000FF6CEE00000000000000000000000000000000 0000000000000000000000000000000000000000008400000000000000000000000000000000008400000000000000000000 0000000000000000FFB90F000000000000000000000000000000000000000000000000000000000000000000000000020400001c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF33CC800000000000000000000000000000000000000000000000000000000000000000000002800000000000000000 0000000000000400000000000000000000000000000000000000000000FFAFA2000000000000000000000000000000000000 0000000000000000000000000000000000000004000000000000000000000080000000000004000000000000000000000000 000000000000FF809C0008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF2E170000000000000000000000000000009c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000100000000000000000000000000000000000000000000000000FF99690000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000804000000000000000000000000 00000000FF06AC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000400000000000000000000000000000000000000000000FFD5FA80000000000000000000000000000000 0000000000000000000000000000000000000002800000000000000000000000000000000000000000000000000000000000005c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF3364000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 000000000000FFADB7000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF6B2C0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000100000000000000000000000000000000000000FFD0870000000000000000000000000000000000000000 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 00000000FF1D4E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000080000000000000000000000000000000000000FF609D00000000000000000000000000000000003c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF80ED00000000000000000000000000000000000000000000 0000000000000000000000000000040000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE230100000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000bc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000400000000000000000000000000000000000200000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF269B8800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF809C00080000000000000000000000000000000000000000000000000000000000000000000000000000000000007c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF3F 5100000000000000000000000000000000000000000000000000080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFB7B800000000000000000000000000000000000000fc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFBF0F0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000828040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF6B2C0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000100000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000428040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF54100000000000000000000000000000000000000000000 000000000000000000000000000000800000000000000000000000000000000000800000000000000000000000000000000000c28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000080000000000000000000000000000000000000000000000000000000000000000000000FFD93400 0000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000228040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFAE4F000000 0000000000000000000000000000000000000000000000000000000000000000000084000000000000000000000000000000 000024000000000000000000000000000000000000FFAE4F0000000000000000000000000000000000000000000000000000 000000000000000000000084000000000000000000000000000000000024000000000000000000000000000000000000FFD7 D200000000000000000000000000000000000000000000000000000000000000000000000000040800000000000000000000 00000000000404000000000000000000000000000000000000FF20D70000000000000000000000000000000000000000000000a28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000004 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3B0400 0000000000000000000000000000000000000000000000000000000000000000000000000608000000000000000000000000 0000000406000000000000000000000000000000000000FF6860000000000000000000000000000000000000000000000000 180000000000000000000000000400000000000000000000000000000000040400000000000000000000000000000000000000628040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF35E2000000 0000000000000000000000000000000000000000000000000000000000000000000006000000000000000000000000000000 000006000000000000000000000000000000000000FFB9780000000000000000000000000000000000000000000000000000 000000000000000000000004080000000000000000000000000000000004000000000000000000000000000000000000FF2E 310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFD85C00000000000000000000000000000000000000000000000000000002 00000100000100000404000100000100000010000100000000000004000000000000000000000000000000000000FFD93400 0000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000004000000000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000128040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96E1000000 0000000000000000000000000000000000000000000000000200000000000000000200000080000080000008000080000000 000000000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000000000000000 000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF4000928040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D0000000000 0000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000 02000000000000000000000000000000000000FF6D0B00000000000000000000000000000000000000000000000000000000 00000100000100000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000528040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000800 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2E7D000000 0000000000000000000000000000000000000000000000000000000000000000000808000000000000000000000000000000 000808000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000d28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000000000 000000000000000000000000000000FF5D200000000000000000000000000000000000000000000000000000000000000000 000000000800000000000000000000000000000000000800000000000000000000000000000000000000FFD0870000000000 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF33C60000328040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000800000000000000000000000000000000000800000000000000000000000000000000000000FFE8FA00000000000000 0000000000000000000000000000000000000000000000000000000000088000000000000000000000000000000000088000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEBF1000000 000000000000000000000000000000000000000000000000000000000000000000110000000000000000000000000000000000b28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000800000000 000000000000000000000000000000FF973B0000000000000000000000000000000000000000000000000000000000000000 000000001002000000000000000000000000000000001002000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF5D200000000000000000000000000000000000000000000000000000000000728040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B2C00000000000000 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000010000 0000000000000000000000000000000000FF4E0A000000000000000000000000000000000000000000000000000000000000 0000000000000200000000000000000000000000000000000400000000000000000000000000000000000000FF5D2000000000f28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 1002000000000000000000000000000000001002000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFB1F60000000000000000000000000000000000000000000000000000000000000000 000000000802000000000000000000000000000000000802000000000000000000000000000000000000FFB7B80000000000 0000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000002000a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF009700000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000400000000000000000000000000000000FF7BED00000000000000 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000100000 0000000000000000000000000000000000FF973B000000000000000000000000000000000000000000000000000000000000008a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000004a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF5D200000000000000000000000 0000000000000000000000000000000000000000000000000008000000000000000000000000000000000008000000000000 00000000000000000000000000FFF54100000000000000000000000000000000000000000000000000000000000000000000 00000080000000000000000000000000000000000080000000000000000000000000000000000000FF609D00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFF541000000000000000000000000000000000000000000000000000000000000000000000000 0080000000000000000000000000000000000080000000000000000000000000000000000000FF17F5000000000000000000 0000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000002a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF17F50000000000000000000000000000000000000000000000000000000000000000000000000200 000000000000000000000000000000000200000000000000000000000000000000000000FFE2420000000000000000000000 0000000000000000000000000000000000000000000000000010040000000000000000000000000000000010040000000000 00000000000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000000000 00000800000000000000000000000000000000000800000000000000000000000000000000000000FFD9340000000000000000aa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000020000 00000000000000000000000000000002000000000000000000000000000000000000FFD93400000000000000000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FF7F6C000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000002000000000000000000000000000000000000FF17AE000000000000000000 0000000000000000000000000000000000000000000000000000000806000000000000000000000000000000000804000000006a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000004000000000000000000000000000000000004000000000000000000 000000000000000000FFD9340000000000000000000000000000000000000000000000000000000000000000000000000004 000000000000000000000000000000000004000000000000000000000000000000000000FF7F6C0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000 00000000000000000000000000FFAC4D0000000000000000000000000000000000000000000000000000000000000000000000ea8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000 00000000000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000 0004000000000000000000000000000000000004000000000000000000000000000000000000FFD934000000000000000000001a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FFF230000000000000000000000000000000 0000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF43730000000000000000000000000000000000000000000000000000000000000000000080000004 000000000000000000000000000080000004000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000020000000000000000000000000001000000020000000000000000000000 00000000000000FF035D00000000000000000000000000000000000000000000000000000000000000000000000000000001 10000000000000000000000000000000000010000000000000000000000000000000FF961A00000000000000000000000000 0000000000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFF230000000000000000000000000000000000000000000000000020000000000000000000000005a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF035D000000000000000000000000000000 0000000000000000000000000000000000000000000000000110000000000000000000000000000000000010000000000000 000000000000000000FF7F6C0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000002000000000000000000000000000000000000FF35C1000000000000000000000000da8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000400000000000000000000000000000000000000FFFB300000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 00000000000000FFBD4F00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000080000000000000000000000000000000000000FFD08700000000000000000000000000 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000003a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000008200000000000000000000000000000000000200000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFEE47000000000000000000000000000000000000000000000000000000000000000000000000040000ba8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF2E310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000400000000000000000000000000000000000000FF20A00000000000000000000000000000000000 0000000000000000000000000000000000000002000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE44300000000000000000000000000007a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF789C00000000000000000000000000000000000000 0000000000000000010000000000000020000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF805A010000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF7E700100000000000000000000000000000000000000000000000000000000000000000000000028000000000000 000000000000000000000028000000000000000000000000000000000000FF1C450000000000000000000000000000000000 0000000000000000000001000000000000004000020000000000000000000000000000000000020000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000068040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBEB1000000000000000000000000000000000000000000000000000000000000000000000000002800000000 0000000000000000000000000028000000000000000000000000000000000000FF409B00000000000000000000000000000000868040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000468040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000020000000000000000000000000000000000020000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000c68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 17F5000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000 0000000000000200000000000000000000000000000000000000FFD934000000000000000000000000000000000000000000 0000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFAC4D000000000000000000000000000000000000268040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000004000000000000000000000000000000000000FFAA230000000000000000000000000000000000000000000000 00000000000000000000000000020C0000000000000000000000000000000802840000000000000000000000000000000000 00FFFD4D000000000000000000000000000000000000000000000000000000000000000000000000000C0000000000000000 00000000000000080084000000000000000000000000000000000000FFD93400000000000000000000000000000000000000 000000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000a68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000800000000000000000000000000000000000800000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFD934000000000000000000000000000000000000000000 0000000000000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000668040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFD934 0000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000 000000000004000000000000000000000000000000000000FFC48F0000000000000000000000000000000000000000000000 0000000000000000000000000008040000000000000000000000000000000008040000000000000000000000000000000000 00FF35E200000000000000000000000000000000000000000000000000000000000000000000000000060000000000000000 00000000000000000006000000000000000000000000000000000000FF5D200000000000000000000000000000000000000000e68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000004000000000000000000000000000000000000FFB5E600000000000000000000000000000000000000000000000000 00000020000000000000200006000000000000000000000000000000000006000000000000000000000000000000000000FF 4613000000000000000000000000000000000000000000000010000000044000000010008040044400000010010040044000 0000100000000004000000000000000000000000000000000000FFE761000000000000000000000000000000000000000000 000000004000000000000000000000000400000000000000000000000000000000000400000000000000000000000000000000168040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF982F0000000000000000000000000000000000000000000000 0000000000000000000800800002200000000800802002200000000800000000000000000000000000000000000000000000 00FFD9340000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000968040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 6B09000000000000000000000000000000000000000000000010004000040000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000568040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FFDF7C000000000000000000000000000000000000000000000000000000 0000000000000000000200000000000000000000000000000000000008000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF38CB0000000000000000000000000000000000000000000000 000000000000000000000000000AA0000000000000000000000000000000000808000000000000000000000000000000000000d68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000001100000000000000000000000000000000001100000000000000000000000000000000000000FF757B0000 0000000000000000000000000000000000000000000000000000000000000000000009500000000000000000000000000000 00000940000000000000000000000000000000000000FF80AA00400000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF BA9700000000000000000000000000000000000000000000000000000000000000000000000000A00000000000000000000000368040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (CD3C00000000 0000000000000000000000000000000000000000000000000000000000000000090000000000000000000000000000000000 0800000000000000000000000000000000000000FFA0F4000000000000000000000000000000000000000000000000000000 0000000000000000000800000000000000000000000000000000000880000000000000000000000000000000000000FF8346 0040000000000000000000000000000000000000000000000000000000000000000000000050000000000000000000000000 000000000040000000000000000000000000000000000000FF505A000000000000000000000000000000000000000000000000b68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000200 000000000000000000000000000000000000FF76970000000000000000000000000000000000000000000000000000000000 000000000000000900000000000000000000000000000000000900000000000000000000000000000000000000FFBBEA0008 0000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 00001000000000000000000000000000000000000000FF809C00080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00768040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000400000000000000000000000000000000000400000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF6C4A000800000000000000000000000000000000000000000000000000 0000000000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FF17F5 000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000f68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 0000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000800 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5D200000 0000000000000000000000000000000000000000000000000000000000000000000008000000000000000000000000000000 00000800000000000000000000000000000000000000FFEE4700000000000000000000000000000000000000000000000000000e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF709D400800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAD21008e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFACD2000800000000 0000000000000000000000000000000000000000000000000000000000000002100000000000000000000000000000000002 000000000000000000000000000000000000FF7BED0000000000000000000000000000000000000000000000000000000000 000000000000001000000000000000000000000000000000001000000000000000000000000000000000000000FFE0D00008 0000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000004e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000 00000000000800000000000000000000000000000000000800000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000ce8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080200000000 0000000000000000000000000000FF2E17000000000000000000000000000000000000000000000000000000000000000000 0000000404000000000000000000000000000000000204000000000000000000000000000000000000FFAC4D000000000000 0000000000000000000000000000000000000000000000000000000000000002000000000000000000000000000000000002 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF989A2000002e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000C04000000000000000000000000000000000A04000000000000000000000000000000000000FFD9340000000000000000 0000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000 00000000000000000000000000000000FFFE9540000000000000000000000000000000000000000000000000000000000000 00000000001006000000000000000000000000000000001006000000000000000000000000000000000000FF71F100080000 000000000000000000000000000000000000000000000000000000000000000008020000000000000000000000000000000000ae8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000008000000000000000000000000000000000000000000000 0000000000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000000000000000000000000004000000000000000000000000000000000000FF629F000000000000 0000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000104 000000000000000000000000000000000000FF33AC0000000000000000000000000000000000000000000000000000000000006e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFB90F0000000000000000000000000000000000000000000000000000000000000000000000 000204000000000000000000000000000000000004000000000000000000000000000000000000FFD9340000000000000000 0000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000 00000000000000000000000000000000FF8E3080000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000400000000000000000000000000000000000000FF08950000000000ee8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF2E1700000000000000000000 0000000000000000000000000000000000000000000000000000040400000000000000000000000000000000020400000000 0000000000000000000000000000FF35E2000000000000000000000000000000000000000000000000000000000000000000 0000000006000000000000000000000000000000000006000000000000000000000000000000000000FFACE9000800000000 0000000000000000000000000000000000000000000000000000000000000084000000000000000000000000000000000084001e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000210000000000000000000000000000000000000000000000000000 000000000000000000000000FF54708008000000000000000000000000000000000000000000000000000000000000000000 208000000000000000000000000000000000660000000000000000000000000000000000000000FF50530000000000000000 0000000000000000000000000000000000000000000000000000200000040000000000000000000000000000800000040000 00000000000000000000000000000000FF809C00080000000000000000000000000000000000000000000000000000000000009e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF125600000000000000000000000000000000000000000000000000000000000000000000400000 00000000000000000000000000000100000000000000000000000000000000000000000000FFDC2980001000000000000000 0000000000000000000000000000000000000000000000000000000008000000000000000000000000000000000008000000 0000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF855F800000000000005e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000008000 0000000000000000000000000000000100000000000000000000000000000000000000FF859A000010000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFF3FC0000000000000000 000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000100000de8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D00000000000000000000 0000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200000000 0000000000000000000000000000FF133F800000000000000000000000000000000000000000000000000000000000000000003e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF209D800800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFDBB8900000000000000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000200000000000000 000000000000000000000000FFF5410000000000000000000000000000000000000000000000000000000000000000000000 000080000000000000000000000000000000000080000000000000000000000000000000000000FF80FA008000000000000000be8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFB1D80880000000000000000000000000 0000000000000000000000000000000000000000000004000000000000000000000000000000000002000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000002 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF7C7E000000000000000000000000000000000000000000020002000000000000000000000000000000 0000000000000000000000000000000000400000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000fe8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF211A0000000000000000000000000000000200000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFE95300000000000000000000000000000000000000000004000400000000000000000000000000 00000000000000000000000000000000000000400000000000000000000000000000000000FF81190006000000000000000000018040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000002000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000818040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF7B8D0000000000000000000000000000 0000000000000000000000000000000000000000000000480000880000000000000000000000002203200000080000000000 00000000000000000000FF368D0000000000000000000000000000000000000008000000000000000000000000000000000000418040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF3209000000000000000000000000000000000000000000000000000000000000000000000000002800 0088000000000000000000000000420420000008000000000000000000000000000000FFBD4F00000000000000000000000000c18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000404000000000000000000000000000000000000FF20A0000000000000000000000000000000000000 0000000000000000000000000000000000000200000000000000000000000000000000000000000000000000000000000000 000000000000FFD9340000000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000000004000000000000000000000000000000000000FF06E40000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000180000000000000000000218040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FFB90F00000000000000000000000000000000000000000000000000000000000000000000000002040000000000 00000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000000000 0000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000000000 0000000000000000FFB79E00000000000000000000000000000000000000000000000000000000000000000000000000040000a18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFB79E0000000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000000404000000000000000000000000000000000000FFD934000000000000000000000000000000618040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 000000000000000004000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000 0000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000000000 000000000000000000000000000000000000000000040000000000000000000000000000000000040000000000000000000000e18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000400000000000000000000000000000000000400000000000000000000000000000000 0000FF52A3000000000000000000000000000000000000000000020002000000000000000000000000000000000000000002 0000000000000000000000000000000000000000000000000000000000FF189C000000000000000000000000000000000000 000000050004000000001000051008000000000C000508000000040020000508400000000004000000000000000000000000 000000000000FFA675000000000000000000000000000000000000000000000000000000000000000000000000000400000000118040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF632600000000000000000000000000000000000000000000000000000000000000880800000000080002882000 00000020000288200000000000000000000000000000000000000000000000FFD9340000000000000000000000000000000000918040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000810000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF520A000000000000000000000000000000000000 000000010000000000001000040000000000000000000000000000000000000000000000000000000000000000000000000000518040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFE29B0000000000000000000000000000000000000000000000000000000000000000000000000800000000000000d18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF7B ED00000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000001000000000000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000 0000000000000000000000000000080000000000000000000000000000000000080000000000000000000000000000000000 0000FFBF47000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000008000000000000000000000000000000000000FF409B00000000000000000000000000000000000000318040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000002000000000000000000000000000000000000FF5D20000000000000000000000000000000000000000000000000 0000000000000000000000000800000000000000000000000000000000000800000000000000000000000000000000000000 FF76970000000000000000000000000000000000000000000000000000000000000000000000000900000000000000000000 000000000000000900000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000400000000000000000000000000000000000400000000000000000000000000000000000000FF5D 2000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000000000 00000000000800000000000000000000000000000000000000FF7BED00000000000000000000000000000000000000000000 0000000000000000000000000000100000000000000000000000000000000000100000000000000000000000000000000000 0000FFAC4D00000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000718040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF77CE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000200000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF19970000000000000000000000000000000000000000000000000000000000000000000000000082000000000000000000 000000000000000082000000000000000000000000000000000000FFEE47000000000000000000000000000000000000000000f18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 001000000000000000000000000000000000000000FF7BED0000000000000000000000000000000000000000000000000000 000000000000000000001000000000000000000000000000000000001000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF9D5600000000000000000000000000000000000000000000 00000000000000000000000000000C000000000000000000000000000000000008000000000000000000000000000000000000098040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000080000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF0097000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000400000000000000000000000000000000 FF7BED000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000898040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFA3CA000000 0000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000200000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAC 4D00000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000 00000000000002000000000000000000000000000000000000FF83CC0000000000000000000000000000000000000000000000498040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000002 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5D2000 0000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000000 0000000800000000000000000000000000000000000000FF2D53000000000000000000000000000000000000000000000000 000000000000000000000000010000000000000000000000000000000000008000000000000000000000000000000000000000c98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000800000000000000000000000000000000000800000000000000000000000000000000000000FFD934000000 0000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000 000004000000000000000000000000000000000000FF2D530000000000000000000000000000000000000000000000000000 000000000000000000000100000000000000000000000000000000000080000000000000000000000000000000000000FF17 F50000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000298040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (250000000000 000000000000000000000000000000000000000000000000000000000000000804000000000000000000000000000000000C 04000000000000000000000000000000000000FF20A000000000000000000000000000000000000000000000000000000000 00000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FFE24200 0000000000000000000000000000000000000000000000000000000000000000000000100400000000000000000000000000 0000001004000000000000000000000000000000000000FF5D2000000000000000000000000000000000000000000000000000a98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFAC4D000000000000000000000000000000000000000000000000000000000000 0000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FFD934000000 0000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000 000004000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAA00698040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000006000000000000000000000000000000000006000000000000000000000000000000000000FFD9340000000000 0000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000 04000000000000000000000000000000000000FFD93400000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000200 0000000000000000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000 0000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FFD934000000 0000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000000 000004000000000000000000000000000000000000FF35E2000000000000000000000000000000000000000000000000000000198040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF51AE00000000000000000000000000000000000000000000000000000000 00000000000000020004000000000000000000000000000200000004000000000000000000000000000000000000FFAC4D0000998040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFD96500000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008 0000000000000000000000000000000000FFE89B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000080000000000000000000000000000000FFC801000000 000000000000000000000000000000000000000000000000000000000000000002000000000000000000000000000000020000598040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000 000000000000000000000000000000FFE89B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000080000000000000000000000000000000FFD9650000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00080000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000d98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF80ED00000000000000000000000000000000000000000000000000000000000000000000 00000400000000000000000000000000000000000000000000000000000000000000000000000000FF089500000000000000 0000000000000000000000000000000000000000000000000000000000008000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBD4F00000000398040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0002000000000000000000000000000000000402000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B2C0000000000 000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000100b98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000 00000000000000000000000000FF77CE00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000200000000000000000000000000000000000000FF20A000000000000000 0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000 0000000000000000000000000000000000FF62E680000000000000000000000000000000000000000000000000000000000000798040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFAC21000000000000000000000000000000000000000000000000000000000000000000000000 0208000000000000000000000000000000000000000000000000000000000000000000000000FF62FA004000000000000000 0000000040000000000000000000000000000000000100000480000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7F6C000000000000f98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF0C6C0000000000000000000000 0000000000000000000000000000000000000000000000000004080000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFB5AC00400000000000 000000000000400000000000000000000000000000000001000005000000020000000000000000000000000000000000020000058040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000010000000000000000000000000000000000010000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000858040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FFF5410000000000000000000000000000000000000000000000000000000000000000000000000080 000000000000000000000000000000000080000000000000000000000000000000000000FF5B010020000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000002020000000000 00000000000000000000000000FFEE2800200000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000400000000000000000000000000000000000000FF6B2C0000000000000000458040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000404000000000000000000000000000000000004000000000000000000 000000000000000000FF80FA0080000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD9340000000000000000000000 0000000000000000000000000000000000000000000000000000040000000000000000000000000000000000040000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000258040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000 00000000000000000000000000000004000000000000000000000000000000000000FF194200000000000000000000000000 0000000000000000000000000000000000000000000000040400000000000000000000000000000000000400000000000000 0000000000000000000000FF35E2000000000000000000000000000000000000000000000000000000000000000000000000 0006000000000000000000000000000000000006000000000000000000000000000000000000FFD92300800000000000000000a58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000400000000 0000000000000000000000000004000000000000000000000000000000000000FFD087000000000000000000000000000000 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF515B0080000000000000000000 000000000000000000000000000000000000000000000000000084000000000000000000000000000000000004000000000000658040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000060000000000000000000000000000000000060000000000000000000000 00000000000000FFD93400000000000000000000000000000000000000000000000000000000000000000000000000040000 00000000000000000000000000000004000000000000000000000000000000000000FFD93400000000000000000000000000 0000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FF195500800000000000000000000000000000000000000000000000000000000000000000000000e58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFD934000000000000000000000000000000000000000000000000000000000000000000000000000400000000 0000000000000000000000000004000000000000000000000000000000000000FFCFA6000000000000000000000000000000 0000000000000000000000000000000020000080000004000000000000000000000000000000000004000000000000000000 000000000000000000FF1D530000000000000000000000000000000000000000000000000400000000000040000110000004 000040000120000000000080000000000004000000000000000000000000000000000000FF35E2000000000000000000000000158040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF4F6900000000000000000000000000 000000000000000000000000000000000000000000080000000000200000A00000000000800000000000000000000000000000958040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000008D000000000000000000000000000000000080000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF65CE000000000000000000000000000000000000000000000000040000000000000000000000000000558040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF08950000000000000000000000000000000000000000000000000000000000000000000000000080000000000000 000000000000000000000000000000000000000000000000000000000000FFAC4D0000000000000000000000000000000000 0000000000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF68280000000000000000000000000000d58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF843100000000000000000000000000000000000000 0000000000000000000000000000000000100000000000000000000000000000000000100800000000000000000000000000 0000000000FFEF22000000000000000000000000000000000000000000000000000000000000000000000000082000000000 0000000000000000000000000800000000000000000000000000000000000000FF73A1000000000000000000000000000000 000000000000000000000000000000000000000000000800000000000000000000000000000000001000000000000000000000358040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000180000000000000000000000000000000 000000FF5D200000000000000000000000000000000000000000000000000000000000000000000000000800000000000000 000000000000000000000800000000000000000000000000000000000000FF152E0000000000000000000000000000000000 0000000000000000000000000000000000000008800000000000000000000000000000000008000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000b58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF20A000000000000000000000000000000000000000000000000000000000000000000000000002000000000000000000 00000000000000000000000000000000000000000000000000000000FF5D2000000000000000000000000000000000000000 0000000000000000000000000000000000080000000000000000000000000000000000080000000000000000000000000000 0000000000FF7BED000000000000000000000000000000000000000000000000000000000000000000000000100000000000 0000000000000000000000001000000000000000000000000000000000000000FF06E400000000000000000000000000000000758040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000C00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF2E310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000400000000000000000000000000000000000000FF3C510000000000000000000000000000000000 000000000000000000000000000000000000000102000000000000000000000000000000000002000000000000000000000000f58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF9B6000000000000000000000000000000000000000000000000000000000000000000000000008020000000000000000 00000000000000040802000000000000000000000000000000000000FF6C5700000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000 0000000000FFF3FC0000000000000000000000000000000000000000000000000000000000000000000000000C0000000000000d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 20D7000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000000000 0000000000000000000000000000000000000000000000000000FF1903000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000 000000FFCF6D0000000000000000000000000000000000000000000000000000000000000000000000000000000400000000 000000000000000000020000000400000000000000000000000000000000FF409B0000000000000000000000000000000000008d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF00D10000000000000000000000000000000000000000000000 0000000000000000000000000000000800000000000000000000000000000000000002000000000000000000000000000000 00FF9A2A00000000000000000000000000000000000000000000000000000000000000000000000000000004000000000000 00000000000000000000000000000000000000000000000000000000FF7BED00000000000000000000000000000000000000 0000000000000000000000000000000000100000000000000000000000000000000000100000000000000000000000000000004d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF5D20000000000000000000000000000000000000000000 0000000000000000000000000000000800000000000000000000000000000000000800000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF5D20 0000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000 000000000800000000000000000000000000000000000000FF2E170000000000000000000000000000000000000000000000 0000000000000000000000000004040000000000000000000000000000000002040000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000002d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000104000000000000000000000000000000000000FFA4B400000000000000000000000000000000000000000000000000 00000000000000000000000A04000000000000000000000000000000000804000000000000000000000000000000000000FF D934000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000 0000000000000004000000000000000000000000000000000000FFD517000000000000000000000000000000000000000000 000000000000000000000000000000100400000000000000000000000000000000120400000000000000000000000000000000ad8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0895 0000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000000000000000000000000000000000000000000FFD9340000000000000000000000000000000000000000000000 0000000000000000000000000000040000000000000000000000000000000000040000000000000000000000000000000000 00FF629F00000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000006d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF913A0000 0000000000000000000000000000000000000000000000000000000000000000000000840000000000000000000000000000 00000004000000000000000000000000000000000000FFD7A500000000000000000000000000000000000000000000000000 00000000000000000000000204000000000000000000000000000000000404000000000000000000000000000000000000FF C836000000000000000000000000000000000000000000000000000000000000000000000000000600000000000000000000 0000000000000086000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000ed8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000008000 0004000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF1942 0000000000000000000000000000000000000000000000000000000000000000000000000404000000000000000000000000 000000000004000000000000000000000000000000000000FFEE610000000000000000000000000000000000000000000000 0000000000000000000000000000040000000000000000000000000000000002040000000000000000000000000000000000001d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF961A0000 0000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000 00000000000000000000000000000000000000000000FFADED00000000000000000000000000000000000000000000000000 00000000000000000080010000000000000000000000000000000400000000000000000000000000000000000000000000FF 95F2000000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000009d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A8AF00000000 0000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000 0000000000000000000000000000000000000000FF0E36000000000000000000000000000000000000000000000000000000 0000000000000000010002000000000000000000000000000500000002000000000000000000000000000000000000FF9C86 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000005d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FFBD4F0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000080000000000000000000000000000000000000FF8E940000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000 00000000000000000000000000000000000000000000FFA8AF00000000000000000000000000000000000000000000000000 00000000000000000000000000000008000000000000000000000000000000000000000000000000000000000000000000FF00dd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000100000000000000000000000000000000000080000000000000000000000000000000000000FF80ED00000000 0000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000 0000000000000000000000000000000000000000FFAC4D000000000000000000000000000000000000000000000000000000 0000000000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FF0895 0000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000003d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000200000000000000000000000000000000000400 000000000000000000000000000000000000FFAC4D0000000000000000000000000000000000000000000000000000000000 000000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FFAC4D0000 0000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000 00000002000000000000000000000000000000000000FF2D530000000000000000000000000000000000000000000000000000bd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF058600000000000000000000000000000000000000000000000000000000000000 00000000000100000000000000000000000000000000000500000000000000000000000000000000000000FF77CE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0200000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEE0B007d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 0000000100000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF027A0000000800000000000000000000000000000000000000080000000400 000000000000000080000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000800000000000000000000000000000000002800000 00000000000000000000000000000000FFC09100000000000000000000000000000000000000000000000000000004000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEC4800000000 0000000000000000000000000000000000000000000000020000000000000000000200000000000000000000000000000000 0002000000000000000000000000000000000000FF054400000010000000000000000000000000000000000000001000000000038040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020800000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC214000000838040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0004A0000000000000000000000000000000000208000000000000000000000000000000000000FF8C4B0000000000000000 0000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF122500000000 000000000000000000000000000000000000000000000000000000000000000002A00000000000000000000000000000000000438040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000088008000000000000000000000000000000000000000000 0000000000000000000000000000FFA140000000000000000000000000000000000000000000010000000000000000000000 0000001002000000000000000000000000000000000002000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFB268000000000000000000000000000000000000000000000000000000000000c38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFD7A50000000000000000000000000000000000000000000000000000000000000000000000 000204000000000000000000000000000000000404000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFF17600000000000000000000000000000000000000000000000000000000000000 00000000000084080000000000000000000000000000000004000000000000000000000000000000000000FFA8360000000000238040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 04080000000000000000000000000000000004000000000008000000000000000000000000FF7CD400000000000000000000 0000000000000000000000010000000000000000000000000000000000000180000000000000000180000000000000000000 0000000000000000000000000000FFFB2A000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000000000000000000000020204000000000000000000000000000000000000FF95A6000000000000 000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000002000000a38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000100000080000000000000000000000004000000000000000000000000000000000004000000000008 000000000000000000000000FF80030000000000000000000000000000000000000000000000000000000000000000000000 000000100000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF8DD50000000000000000000000000000000000000000000000000080000000000000638040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF16EF00000000000000000000000000000000000000000000000000000000000000004000000004 00000000400000000400000000000000000000000000000000000000000000000000000000FFD93400000000000000000000 0000000000000000000000000000000000000000000000000000000400000000000000000000000000000000000400000000 0000000000000000000000000000FFD934000000000000000000000000000000000000000000000000000000000000000000 0000000004000000000000000000000000000000000004000000000000000000000000000000000000FF214900000000000000e38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000068000 0000200000008208000000000000000000000000000000000000000000000000000000FF1E35000000000000000000000000 0000000000000000000000000000000000800000000000000004000000000000000000000000000000000004000000000800 000000000000000000000000FF14D20000000000000000000000000000000000000000000000080000000080800000000000 000004000000000000000000000000000000000004000000000800000000000000000000000000FF94670000000000000000 000000000000000000000000000000100000000140000000100000400084000000000000010010000000000000000004000000138040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000400000000000004000000000000000000000000000000000000000000000000000000000 00000000000000000000FF20A000000000000000000000000000000000000000000000000000000000000000000000000002 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFCB9500000000000000000000000000000000000000000000000000000000000000002800938040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF23CA000000000000000000000000000000000000000000000000000000000000000000000000080000 0000000000000000000000000000000840000000000000000000000000000000000000FF0D45000000000000000000000000 0000000000000000000000000000000000000000000000000020000000000000000000000000000000000008000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF0090000000000000000000538040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFCE440400000000000000000000000000 0000000000000000000000000000000000000000000000200000000000000000000000000000000000080000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF8639000000000000000000000000000000000000000000000000000000000000000000000000100000 0000000000000000000000000000001080000000000000000000000000000000000000FFD9FE000000000000000000000000 0000000000000000000000000000000000000000000000000800000000000000000000000000000000000920000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000338040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF809C0008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF5D200000000000000000000000000000 0000000000000000000000000000000000000000000008000000000000000000000000000000000008000000000000000000 00000000000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000000000000008 00000000000000000000000000000000000800000000000000000000000000000000000000FF839A0400000000000000000000b38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF5D20000000000000000000000000000000000000000000000000000000000000000000000000080000 0000000000000000000000000000000800000000000000000000000000000000000000FFBBEA000800000000000000000000 000000000000000000000000000000000000000000000000100000000000000000000000000000000000100000000000000000738040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000800000000000000000000000000000000000800000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF809C0008000000000000000000000000000000000000000000000000000000000000000000000000f38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF5F5840080000000000000000000000000000000000000000000000000000000000000000000010000000000000 00000000000000000000201000000000000000000000000000000000000000FFF80640000000000000000000000000000000 0000000000000000000000000000000000040004100000000000000000000000000000010040100000000000000000000000 0000000000000000FF5E7F000000000000000000000000000000000000000000000000000000000000000000000040000000 0000000000000000000000080000000000000000000000000000000000000000000000FF5D20000000000000000000000000000b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000000 0000000000000000000000000000000000000000000000000000000000FFB09D000800040000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFA5410000000000000000000000000000000000000000000000000000000000000000000000200000000000 000000000000000000100000000000000000000000000000000000000000000000FFAB700000000000000000000000000000 0000000000000000000000000000000000000002000200000001000000000000000000000000800000000000000000000000008b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000004000000000000000000000000000000000002000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09400080000000000800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF5E3F000000020000008000000000000000000000000000000000000000000000000000000000000000004b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF85212000000000000000000000000000000000000000000000000000000000000000000000000800000000 000000000000000000000000000800000000000000000000000000000000000000FFB7B8000000000000000000000000000000cb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000001004000000000000000000000000000000000000FF04880008000000000000000000000000000000000000 0000000000000000000000000000000008040000000000000000000000000000000008040000000000000000000000000000 00000000FF27A440000000000000000000000000000000000000000000000000000000000000000000000002040000000000 00000000000000000000000404000000000000000000000000000000000000FF17F500000000000000000000000000000000 0000000000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000002b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000040600000000000000000000000000000000000600000000000000000000000000000000 0000FFAA25000000000000000000000000000000000000000000000000000000000000000000000000080400000000000000 0000000000000000000C04000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8279000000000000000000000000000000000000000000000000000000000000000000000000120400000000ab8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFEE6100000000000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000204000000000000000000000000000000000000FFF59400000000000000000000000000000000006b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF8E5A00000000000000000000000000000000000000000000 0000000000000000000000000000020400000000000000000000000000000000020400000000000000000000000000000000 0000FF77E8000000000000000000000000000000000000000000000000000000000000000000000000040400000000000000 0000000000000000000404000000000000000000000000000000000000FFF5EF001000000000000000000000000000000000 000000000000000000000000000000000000000600000000000000000000000000000000000600000000000000000000000000eb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000004000000000000000000000000000000000004000000000000000000000000000000000000 FF77990008000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000 000000000000000404000000000000000000000000000000000000FFB90F0000000000000000000000000000000000000000 0000000000000000000000000000000002040000000000000000000000000000000000040000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000001b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFE0 9A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFD934000000000000000000000000000000000000009b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFAC4D0000000000000000000000000000000000000000 0000000000000000000000000000000000020000000000000000000000000000000000020000000000000000000000000000005b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FF8E 3080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000400000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFEE470000000000000000000000000000000000000000000000000000000000000000000000000400000000000000000000 000000000000000400000000000000000000000000000000000000FF20A00000000000000000000000000000000000000000003b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000400000000000000000000000000000000000000FF80A18000000000000000000000000000000000000000000000000000 000000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FF80 9C00080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF820B10000000000000000000000000000000000000000000 000000000000000000000000000002000000000000000000000000000000000004000000000000000000000000000000000000bb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAC4D00 0000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000 0000000002000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFE2301000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFFA1D000000 00000000000000000000000000000000000001000000000000100004000000000D0002000000000000000000000000000000 000002000000000000000000000000000000000000FF522E0000000000000000000000000000000000000000000000000000 000000000000000000000038000400000000000000000000020400000088000100000000000000000000000000000000FF78 3000000000000000000000000000000000000000000000800000000000080004000000000B00080002000000000000000000 00000200000000000080000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000fb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFAC4D00000000000000000000000000000000000000000000000000000000 00000000000000000002000000000000000000000000000000000002000000000000000000000000000000000000FF6F6700 0000000000000000000000000000000000000000000000000000000000000000000000083000000000000000000000000000 0000000110000000000000000000000000000000000000FFF7ED000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004000000000000000000000000000000000000000000000000078040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000210000000000000000000000000000000000200000000000000000000000000000000000000FFD6BF002000 0000000000000000000000000000000000000000000000000000000000000000008000000000000000000000000000000400 000040000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80 740000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000000000878040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (310000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004 00000000000000000000000000000000000000FF64B900200000400400000000000000000000000000000008400001000100 00000000000000158000000800000000000000000000000200000020000000000000000000000000000000000000FFFFC900 0000000000000000000000000000000000000000080000000000000000000000000000020800080000000000000000000000 0000000000000000000000000000000000000000000000FF4EF400000000000000000000000000000000000000000000000000478040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800000400 0020000000000000000000000000000000FF9D90000000000000000000000000080000000000000020000024000000000000 0000000180140000198A98000000000000000000000008000180000020000000000000000000000000000000FF3797000000 0040040000000000000000000000000000000040000100008000000020000000010000001000000000000000000000000000 000000000000000000000000000000000000000000FF009E0000000000000000000000000000000000000000000000028000 000000000020000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2E00c78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00040002008400020000000000000000000000008000008C000000000000000000000000000000000000FF2D9F0000000000 0000000000000000000000000000000000000000000000000000000002000000040000000000000000000000000000000004 04000000000000000000000000000000000000FF20A000000000000000000000000000000000000000000000000000000000 00000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000FF050A00 000000000000000000000008000000000000002000002100000000000000000000000000040002800000000000000000000000278040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000002080002000000008000000000000024000400002008800000000000000000000000008600 0000080080000000000000000000000000FFB81A00000000010000000000000000000200000000000000004800C000000000 0000000000000547941C00000000000000000000000000000004000000000000000000000000000000000000FF5A43000000 0000000000000000000000000000000000000000000000000000000000000000000284000200000000000000000000000080 00050C000000000000000000000000000000000000FF9D2D000000000000000000000000000000000000000000000000000000a78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004000000 000000000000000000000000000000FF558C0000000001000000000000000000000000000000020006420040000000000000 000000000006100020088000000000000000000000000086000000080000000000000000000000000000FF3B9C0000000000 0000000000000000000400000000000010060001000001000000000000004005400402000000000000000000000000000000 02000000000000000000000000000000000000FF15AB00000000000000000000000000000000000000000000001000000000 00000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000FF6C370000678040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100005100C00 0000000C000020080000000020400480000000000004000000000000000000000000000000000000FFAFD500000000000000 0000000000000000000000000000002E00000000000000000000008000000400040000040000000000000040000000000600 0000000000000000000000000000000000FF539F000000000000000000000000000000000000000000000600000000000000 0000000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF539F000000 000000000000000000000000000000000000000600000000000000000000000000000400000000000000000000000000000000e78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000060000000000000002080A0080000008200220080200000020200280200000000000000000 000000000000000000000000000000FFF5160000000000000000000000000000000000000000000806000000000000000000 000000000004000000000000000000000000000000000004000000000000000000000000000000000000FF79300000000000 00000000000000000000000000000000088E0000000002080000800000000000044000000000000000000000000000000000 04000000000000000000000000000000000000FFCA6D0000000000000000000000000000000000000000000506040000000400178040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000000000 00000000000000000000000000FF1FDC00000000000000000000000000000000000000000004460400000000000000000000 00000800000000000000000000000000000000000000000000000000000000000000000000000000FF0BED00000000000000 0000000000000000000000000000000600000000000000000000000000100000000000000000000000000000000000000000 0000000000000000000000000000000000FFCA30000000000000000000000000000000000000000000000600000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFFD1000000000978040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFBA5E000000000000000000 00000000000000000000000010160000000000000000000000000008C0000000000000000000000000000000000800000000 000000000000000000000000000000FFF5C70000000000000000000000000000000000000000000006000000000000000000 000000000000000000000000000000000000000000000002000000000000000000000000000000000000FF26E60000000000 000000000000000000000000000000000006000000000000000000000000000002000000000000000000000000000000000000578040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000A0000000000000000000000000000200000000000000000000000000000000000000000000000 00000000000000000000000000FF089500000000000000000000000000000000000000000000000000000000000000000000 00000080000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFCA3000000000000000000000000000000000000000000000060000000000000000d78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFCA30000000000000000000000000000000000000000000000600000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFD6C6000000000000000000 0000000000000000000000001202000000000000000000000000001000000000000000000000000000000000001000000000 000000000000000000000000000000FFAE650000000000000000000000000000000000000000000400000000000000000000 000000000800000000000000000000000000000000000800000000000000000000000000000000000000FF2D67000000000000378040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001000 000000000000000000000000000000001000000000000000000000000000000000000000FF9DBE0008000000000000000000 0000000000000000000008000000000000000000000000000000000000000000000000000000000000000001000000000000 00000000000000000000000000FF6CB700000000000000000000000000000000000000000000020000000000000000000000 00000880000000000000000000000000000000000800000000000000000000000000000000000000FFBF1000000000000000 000000000000000000000000000000040000000000000000000000000008020000000000000000000000000000000008820000b78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000080000000000000000000000000000008000000000000000000000000000000000000000000000000000 0000000000000000000000FF8629000000000000000000000000000000000000000000080000000000000000000000000000 0200000000000000000000000000000000000000000000000000000000000000000000000000FF5D20000000000000000000 0000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000800000000 000000000000000000000000000000FF7B1B000800000400000000000000000000000000000000000000000000000000000000778040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF42CB0000000002000000000000000000000000000000000004000000000000000000000000000C02 000000000000000000000000000000000802000000000000000000000000000000000000FF9F8B0000000000000000000000 0000000000000000000008020000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF196400000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000600000000000000000000000000000000000000FF6E1B0008000000000000f78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000140000000000000000000000000000000000FF7D8C40080000000000000000000000 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFD36F400000000000000000000000002000000000000000100208000000000000000000000000 0800000000000000000000000000000000000800000000000000000000000000000000000000FF0B11000000000000000000 0000000000000000000000000006000000000000000200000000000000000000000000000000000000000000000000000000000f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000060000000000000000000000000010000000A0000000000000000000000000001000000000000000000000 000000000000000000FF8DB30008000000000000000000000000000000000000000000000000000000000000000000000400 000200000000000000000000000000000000000000000000000000000000000000000000FF82DA0000000000000000000000 0000000000000000000000000000000000000004000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF0CC400000000000000000000000000200000000000000000020800000000000000000000008f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFCA3000000000000000000000000000000000000000000000060000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF354500000000000000000000000000 0000000000000000000600000000000010000000000000020000020004000000000000000000000000000008000000000000 0000000000000000000000FFC8BE000880000000000000000000000000000000000000000600000000000008000000000000 00000000A0020000000000000000000000000000040000000000000000000000000000000000FFBAC5000080000000000000004f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FFBCED200000000000000000000000000000 0000000000000006000000000000000000000000000400000000000000000000000000000000000400000000000000000000 000000000000000000FF26D000000000000000000000000000000000000000000002AE000000000000000000000000000002 000000000000000000000000000000000002000000000000000000000000000000000000FFD78B0000000000000000000000 000000000000000000000006000000000000000000000000000800000000000000000000000000000000000800000000000000cf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000002AE0000000000000000000000000010040000000000000000000000000000000010040000000000000000000000 00000000000000FF178C00080000000000000000000000000000000000000000060000000000000000000000000008000000 00000000000000000000000000000800000000000000000000000000000000000000FF53F300000000000000000000000000 0000000000000000055600000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFCA0600000000000000000000000000000000000000000002AE00000000000000000000000000002f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFAE4B000000000000000000000000000000000000000000000600000000000000000000000000000400000000 0000000000000000000000000084000000000000000000000000000000000000FFE0F8000000000000000000000000000000 0000000000000006000000000000000000000000000C04000000000000000000000000000000000C04000000000000000000 000000000000000000FF539F0000000000000000000000000000000000000000000006000000000000000000000000000004 000000000000000000000000000000000004000000000000000000000000000000000000FF98DE400000000000000000000000af8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000004000000000000000000000000000000000000FF9F678000000000018000000000000000000000 0000000000060000000000000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FF5A1A00000000000000000000000000000000000000000002AE0000000000000000000000000001000000 00000000000000000000000000000000000000000000000000000000000000000000FF1B9100000000000000000000000000 0000000000000000000600000000000000000000000000008400000000000000000000000000000000000400000000000000006f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000002AE00000000000000000000000000000400000000000000000000000000000000040400000000000000000000000000 0000000000FF7F4A000000000001000000000000000000000000000000000600000000000000000000000000000400000000 0000000000000000000000000084000000000000000000000000000000000000FF2A12000000000001800000000000000000 00000000000002AE000000000000000000000000000204000000000000000000000000000000000004000000000000000000 000000000000000000FF42FF001000000001000000000000000000000000000000055600000000000000000000000000000400ef8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF6DE00000000000018000000000000000000000000000000006000000000000000000000000000004000000000000 000000000220000000000004000000000000000000000000000000000000FFFF610008000000018000000000000000000000 0000000000060000000000000000000000000000020000000000000000000000000000000000020000000000000000000000 00000000000000FFBD3C00000000000180000000000000000000000000000000060000000000000000000000000004040000 00000000000000000000000000000204000000000000000000000000000000000000FF248300000000000180000000000000001f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000080400000000000000000000000000000000FF55D280000000000180000000000000000000000000 0000000600000000000000000000000000000000000000000000000000000000004000000000000000000000000000000000 0000000000FF25FC800000000001800000000000000000000000000000184600000000000000000000000000800000000000 0000000000000000000000000000000000000000000000000000000000000000FFEE67800000000001800000000000000000 0000000000000006000000000000000000000000008000000000000000000000000000000058000000000000000000000000009f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0006000000000000000000000000080000020108008000000000000000000000000000000000000000000000000000000000 000000FFFDB10000000000018000000000000000000000000000000006000000000000000000000000080000000000000000 000000000000000000000000000000000000000000000000000000000000FF3E230000000000018000000000000000000000 0000000000460000000000000000000000000000000200080080000000000004400000000000000000000000000000000000 00000000000000FFCD4400000000000180000000000000000000000000000000060000000000000000000000000000003001005f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFC90700000000000180000000000000000000000000000000000000000000000000000000000001000000000000000000 00000000000000000000000000000000000000000000000000000000FFF91A80000000000180000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF68B5000000000001800000000000000000000000000000000600000000000000000000000000000050000000 0000000000000000000000000000080200000000000000000000000000000000FFAA4500000000000180000000000000000000df8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FFF6BC0000000000AA800000000000000000000000000000 12AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF880B0800000000000000000000000000000000000000000000000000000000000000000000000200000000000000 000000000000000000000400000000000000000000000000000000000000FF2DCE0000000000AA8000000000000000000000 0000000002AA0000000000000000000000000001000000000000000000000000000000000001800000000000000000000000003f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF36358800000000AA8000000000000000000000000000001AAA0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFD52700080000000000000000000000000000000000 0000080400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFC7EC00000000015580000000000000000000000000000005560000000000000000000000000000000000000000bf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 8029000000000000000000000000000200000000000000000080000000000000000000000000000200000000000000000000 0000000000000002000000000000000000000000000000000000FFDD16000400000000000200000000040000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF17F50000000000000000000000000000000000000000000000000000000000000000000000000200000000000000 000000000000000000000200000000000000000000000000000000000000FF409B0000000000000000000000000000000000007f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000280000000000000000000000000000000000000FF8B120000018018018004010000000010018000000000000006 0074060000000000000000000060004000000000000000000000000000000000000000000000000000000000000000000000 00FF046400000000120000000100000000100100000000000018040000040000000000000000000000000000200000000000 00000000000000000000000000000000000000000000000000000000FFDB97000000800800800000800000000C0080000000 000000030032020000000000000000000020004000000000000000000000000000000000000000000000000000000000000000ff8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000804000000000000000000000000000000000000000000000000000000000000000000000000000FF 8557000200800000800000000000020000000000000000000A00200200000000000000000000228080000000000000000000 0000000000000280000000000000000000000000000000000000FFCE88000000601000000001000000001001000000000000 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF3CA3000000800A00800400800000400800800000000000100A00200200000000000000000100228106004000000000004040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF997C 000001C01A000004000000000018010000000000000006006006000000000000000000800001000000000000000000000000 000008000000000000000000000000000000000000000000FF37E10000018018010000000000000018018000000000000006 0060060000000000000000000040000000000000000000000000000000000004000000000000000000000000000000000000 00FF596300000180000180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFCDFB0000018000018004000000004000000000000000804040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000200000A0000000000000000000000000000000FF6CD0000001A01C0080000000000000120000000000000000060040 06000000000000000001004000000000000000000000000000000008000000000000000000000000000000000000000000FF 5A4D000101A01800010014004000111801800000000010010650680604010004000000001001004001000000000000000040 0100100010100200000000040400000000000000000000000000FF5F56000001801801000000000000001801000000000000 000600680600000000000000000000400200000000000000000000000000000000000200000000000000000000000000000000404040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (990600400640 00002080000000800A4006240088080000000020000020000000000006000000080000000000000000000000000000FFB65B 002001C01803810000020000001000800000000010800642C006000018288200180080000140220088080000000020478120 000010000000980000280400000000000000000000000000FFE15C00210180580080001400400000104C0000000000000006 14C0060401000A02000000100140000100000000000000000000001000000800410000A04400000000000000000000000000 00FFEB0000000181580180000000000000104C8000000000000006004006200000000000000000146100800000000000000000c04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFDE060000 018010018000018000000006008000000000000A060040060000000000000000000065000000000000000000000000000000 00000400000000000000000000000000000000000000FF580000000180100080040180000060000000000000000000060048 06000000000000000000004286000000000000000000000000000000000206000000000000000000000000000000000000FF 4427000001801001800401000000000200800000000000000600400600000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF157500000181100280000102000011000000000000000000204040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF961E000001001820800000000000400801800000000000040608700602 8000000000000000024204000020000000000000000080000000000084028000000000000000000000000000000000FF3126 0000018018118000528100000009418000100001800406216006100040328000000100016000900000040400000000010030 010100000000201C00420400100000000000000000000000FF6091000001401A008000008000000008010000000000001006 006006000000000000000000004006000000000000000000000000000000000006000000000000000000000000000000000000a04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006000000 000000000000002000006000000000000000000000000000000000000000000000000000000000000000000000FFFB480000 0080183000004001000180045180000000000000060060061008002000000000000020040040000400000000000000100101 00000104028000000400000000000000000000000000FF8951000001801801800004000001C0020080001000000002061160 06050840140000000100052400104000000200000000010140000000000000200200240000080000000000000000000000FF D5E7000001A01A0180001000000000090900000000000000064060060000000100000000001860008000400000000000000000604040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3E9E000400C0 1010000000000001800400000000000000000600744600000000004000011000000600408000000800010010014000000000 0006000400000000000000000000000000000000FF5328000001801001800000000001800001000000000000000600608600 0000000000000000000000004000000400000000000000000000000400000000000000000000000000000000000000FFF1E5 0000008018000000000000018000018000000000000006006006000000000000000000002004006000000000000000000000 000000000004000000000000000000000000000000000000FF429A000001801801800400000001800001800000000000000600e04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500000000000 000000000000000000000000000000000000FFCE780000018018018000000040018000018000000001001006007006000000 000000000008006000004080000208000000000000100000000200000000000000000000000000000000000000FF3BB70002 00A01000000000000001C0000000000000010010060060060000000004000100000060541004004108000000081000802000 00000004000800000000000000000000000000000000FF9C8800000180120980000020000180000000000000000000060062 A6000000000000000000806000006000000800000000080020000000000000000A00800000000000000000000000000000FF00104040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000004000004000000000000000000000000000000000000000000000000000000000000000000000FF49C700000080 1800000000002001800001000000000000000680600600000000004000010000000000600000000000010000010000000000 0000000000000000000000000000000000000000FF141B000001C01801800000000001800001800000000000180600600600 0000000000000000000000000400400000000000100000000000000000000000000000000000000000000000000000FF655F 000000801A00000000000001800001800000000000000600600600000000040001000080602810400001000000001000010000904040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001001801 8000840000018000C08000000000000886006006000000000000000000004000140000000000000000000000000000000000 000000000000000000000000000000000000FFFA00000200201A000000840002518002D0000000000040008740E226000000 0000000000008C4800848000000000000000000000000000000800000000000000000000000000000000000000FFAB3B0002 41201809800040408001D4040400000000000002261060860000000000000000000040002040000000000000000000000000 00000000000001020000000000000000000000000000FF48120002000018000000000000018000000000000000000006807800504040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000008000000 00410000000000000000000000000000FFE1E100000180500080000000800080000180000000000010020031020000000000 00000000182000612000000000000000000000000000000000000000000000000000000000000000000000FF836900000184 0001800020000020200401000000000000000048020000000000000000000000000200400000000000000000000000000000 0002000000020000000000000000000000000000FF701B0000019000018000100000001E040000000000000000002088A000 0000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000FF2DF400d04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000828800000000000000000000000000000000000800000000000000000000000000000000000000FFD171000001085801 80000A0000118A00210000000000000806206106000000000000000000046000026000000000000000000000000000000000 000000008000000000000000000000000000FFA4A4000400C40C02800200000402A10080800000000000000300280A000000 00000000000130300148A000000000000000000000000000001000000000200000000000000000000000000000FFA6C50002 2020020C00040200001C01012A0000000000201220801010000000000000000000C40800028000000000000000000000000000304040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004004000000 0000040020000400000000000000010000000000000000000000000010010000000000000000000000000000000010000000 01000000000000000000000000000000FF91100000AA0880AA0000800000000880000000000000800AA82282A80000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF71CD00020020 4A008002502002008400908000000000000002902802000000000000000000B0280080200000000000000000000000000000 0800000000800000000000000000000000000000FFBDC700020122120000000400000000422500000000000000048040040000b04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF10A8000000002000000010000000400010000000000080000001100000000000000000 0000340000000000000000000000000000000000000000000000000000000000000000000000000000FFE7F90000AA0AA12A 0000AA0000000AA08800000000000012A82A82A8000000000000000000148000000000000000000000000000000000000000 000000000000000000000000000000000000FFA33A0003543303540003242002001541440000000000001550CC0550000000 000000000000810800800000000000000000000000000000000800000000800000000000000000000000000000FFBC69000400704040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000280 006000006000000000000000020200000280000000200020006000000000000000000000000000FFD9AD0002002013000000 0500020000524200000000000040048008040000000000000000000288008000000000000000000000000000000008000000 01000000000000000000000000000000FF344500000080080080002080080080080000000000000028020020020000000000 00000000302000002000000000000000000000000000000000000000002000000000000000000000000000FFDE730000AA0A A02A0000880000008A84C800000000000002A82A92A80000000000000000004000000000000000000000000000000000000000f04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080000100 0C00901000000000000000220200200200002000000000000000200000201001000000000000000000000000000000000000 2000000000000000000000000000FFBF2F000420401000000400000000400400000000000100100900100000000000000000 0000000000000000000000000000000000000200000000000001000000000000000000000000000000FF6843000400C00800 800400800800C00C000000000001003203003002000020000000000000002800002000000000000000000000000000000800 000001002000000000000000000000000000FFA61E004041801801802001801801801800000000000000601600600600000000084040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000004008 000000000000000000000000FF0EF6000001801800800000801001801800000000000000600600C086000000000000000000 005000008010010000000000000000008000001000000000004010000000000000000000000000FFD9390000018000018000 0000800000000200800000000400000401401100081000200000000000C02100000800000000000000001000000800000000 00000000000000000000000000000000FF993000200180000180200000000000000000000000000000000040000000000000 00000300000000000000000000000000020400000100000000200020000000000000000000000000000000FFC5BB0000009000884040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001048 00000000000000000000000000000000000800000000006000000000000000000000000000FF778700000000590000000080 1951801000000000000000600600600600000000000000000003400032000000000000000000000000000000000000000000 4000000000000000000000000000FF8393000001901801800000809C01901002008000000000600604200600002820002008 0000004800200040080000000000000000000000080800000000004000000000000000000000000000FF5D4A000000001801 000000801001807800000000000004600600E0461100203000000800000051400001A000000000000000000010800000100000484040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000801CA1 80181200000000000062AE2AA2AE00000000000000000034E000046000000000000000000000000000000000000000006000 000000000000000000000000FF336F00000040188000000080184D8018100000000000006006006006000000000000000000 03600024E000000000000000000000000000000000000000006000000000000000000000000000FFF5E60000ABAA982A8000 00801815A0100000000000000062AE2AC2AE0000000000000000002040004180000000000000000000000000000000000000 00006000000000000000000000000000FF3A170000000018010004008018038015540000000000006006006006000000000000c84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060000000 00000000000000000000FF8DEE00002A0AB02A000601801809801C0000000000000062AE2AE2AE0000000000000000002050 04308000000000000000000000000000001004000000006000000000000000000000000000FF336600040182500180040100 1801C01340000000000000600600600600000000000000000000680008600000000000000000000000000000080000000000 6000000000000000000000000000FF327B000154155054000001001901C010C4000000000000655655655600000000000000 0000506004006000000000000000000000000000000004000000006000000000000000000000000000FF57CF0000ABC898AB00284040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000015600400 6000000000000000000000000000000004000000006000000000000000000000000000FF75C5000081801801800000045901 80100000000000000060062860060000000000000000000060000D6000000000000000000000000000000000000000086000 000000000000000000000000FF80F1000000001900000000001B218014000000000000006006006006000000000000000000 10E804126000000000000000000000000000000804000000006000000000000000000000000000FF7E2C000301A010018000 01001805A019340000000000006006006006000000000000000000024000000000000000000000000000000000000000000000a84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (121041019540 0000000000005505564865560000000000000000004500045460000000000000000000000000000000040000005460000000 00000000000000000000FF6F7C00000180180100000400000180000000000000000000061060060000000000000000000000 00006000000000000000000000000000000000000000006000000000000000000000000000FF4AE200002B88982B80000288 180388180000000000002AE2AE0262AE00000000000000000020600020600000000000000000000000000000000000000022 E000000000000000000000000000FFC25A00000004590000014880982984D800000000000000600600E0060000000000000000684040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000000 0000000000000000FF49A30001AB8AB92B00008A0AA0578AA00080000000002A82AE0762AE0000000000000000002A800024 00000000000000000000000000000000000000002AE000000000000000000000000000FFEE7F0000800019000000A002802B 800000800000000000000602E00600000000000000000008000401600000000000000000000000000000000400000000E000 000000000000000000000000FF9F3600002B8AB82B0000A80AA0818AA00080000000002A82AE2062AE000000000000000000 2A800028E0000000000000000000000000000000000000002AE000000000000000000000000000FF904E000054133854000000e84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000006000 000000000000000000000000000000200000006000000000000000000000000000FF9F0D0000020018010000000000018000 0000000000000001070078060000000000000000000000040060000000000000000000000002000000040000000060000000 00000000000000000000FF306700000180180100004000010180000000000000000000062860060000000000000000010000 00136000000000000000000000000000000000000000006000000000000000000000000000FFD1EF00000000188100000000 0029800000800000000000080600E0060000000000000000000000040000000000000000000000000000000000040000000000184040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180020B00 0000000000100700680600000000000000000000000000010020000000000000005040000000000000010000600000040000 0000000000000000FF66EA00002580080100000000000180000100000000000A000600600600000000000000000000000000 0000000000000000000000000000000000000000006000000000000000000000000000FFA68C000040000801000000000001 8404018000000000141406026006000000000000000000000001806000000000000000000000000000000000200000006000 000000000000000000000000FF8B7F000001800001000000000001800001800000000000108602700600000000000000000000984040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000000 000000000000FF0D6C0000000018010000000000018000018000000000000006086006200000208000000080000000200000 000000000000000010080080000008000000006000000000000000000000000000FFC4D90000018818010000000080018000 0500000000000000060060062000000080000000000000003880400000000000000000000000000000000000000060000000 00000000000000000000FF948D00000000180100000000000184000100000000000004060860060000002000000080800000 00000020000000000000000000080480000008000000006000000000000000000000000000FFC16B0000000008010000000000584040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002020000000 000000000000000000000000000000002AA000000000000000000000000000FF87A000008191400100000000002800004800 000000000000010060000000000000000000000000000A000000000000000000000000000000000000000000000000000000 0000000000000000FF7261000001800001800000000080000004000000000000000000000000000000000000000000000000 8000000000000000000000000000000000000000000000000000000000000000000000FFF646000001901801000000008001 800009800000000000000700600600000000000000800000000000810020000000000000004040000000000000008000600000d84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800155000000 0000001557556556000000000000000000000000446000000000000000000000000000000000000001556000000000000000 000000000000FF0D3400002A8888AA8000000000808000AA80000000000002AA2AA2AA00000000000000000000000020A000 0000000000000000000000000000000000002AA000000000000000000000000000FFB59400000000100000000000002A0000 0000000000010010008010000000000000000000000000000880000000000000000000000000000000000000000000000000 00000000000000000000FF0BF200012A8248AA80000000005680008100000000000002AA2AA2AA000000000000000000000000384040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFC43000010000400000000000002800000200000000000008000000000000000000000000000000021400000000 00000000000000000000000002000000800000000000000000000000000000FFE00600002A88882A8000000000028000A880 000000000002AA2AB2AA00000000000000000000000020A0000000000000000000000000000000000000002AA00000000000 0000000000000000FFA547000000041000000000000000000001000000000100100500100400000000000000000000000014 0000000000000000000000000000000000000000004000000000000000000000000000FF67700000D595315580000000010100b84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280200200200 0002000002002002002000002003003002002000000000000000000000FFEA5D000000200200000000200000000000000000 0000000000000000000000000000000800000002800000000000000000000000000000000002000000800000000000000000 000000000000FFD6150004000002000002000000000000001000040000000000000000000800000000000801000000000000 000000000000000800800400000100000000000000000000000000000000000000FFBFB20000000200800000000001000000 000000000000000000801000000000000000000000000000000000000000000000000000000000000000000000000000000000784040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008188048000 0020030020028020020000000010020020000030020020020000020000030020020020010020020020020020000000000000 00000000FFE913000001801001801A0180180180180180180180000060060060060060460000000000064060008070060060 06000006000007006006006000006006007006006000000000000000000000FF456C0086002010010010012000010A900000 100000000018018000040010000000000000000000A000000180000400000400100400400400402800400400400400400000 0000000000000000FFFB1900000080080080080080080080080080080080000020020020028020220000000000022020008000f84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF92AC000201800000000000001000000000000001000000000400000000000000000000000400000000000000000000 0000000000800800000000800000800000000000000000000000000000FF3733000000801800001001000800801A00880800 8000002002802002002002000000000802802000802802002002000002000806002202002100002002002002002000000000 000000000000FFE9F70080000000010004006000014000000000000000000000000000000000000000000000000140000000 000000000000000800004800000030000000800004000000000000000000000000FFC110000000800800800A00800860D50C00044040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800006000006 000806806806006400006006006006006000000000000000000000FF06F3000000001D010014028018018018318018018000 0060070040068028040000000000008044A28408040000060000060000060060060060020060060060060060000000000000 00000000FF73DD000001881801001000800809801801801801800000602E0000060000000000000000040440000000840000 06000006000006006006006000006006006006006000000000000000000000FF40E300000180000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000844040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (181180000160 0640700685600020000000812E80622180080480200E00000600020E00604600630020600E04640600600000000000000000 0000FF7D67000000001801201200800C01801C01801801800000600600600600600200000000000484632004000400200600 0006000006006006006200006006006006006000000000000000000000FFDA6E000400081881001100811C09801845801805 800020643E814046002006000000000000004100100084000006000106000806906C16106000016006006016006000000000 000000000000FFD105000001801801001002A61801A01A29801801000040600600400600000200000000080400400000000400444040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF8C9800010008080100110104000190180D8018098000A2400622600E04C0044800000000CC1040040060AE80C106008106 00000780E00690640401605622FC0600E000000000000000000000FF45E9000001881801401400C318018E1C008018058001 2361E60B600E00600208000018000009C50081E0AE80C09600800603818610E00700610006662620E00600E0000000000000 00000000FFEB0A000000001801005040C00841815840801800800000640E0820460040020000000110048040401060060040 06000006040416006236006000206006006016006000000000000000000000FFD7E0000101C01801005240A01821815C118000c44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000060000 07006006006224026006406006006000000000000000000000FFD86500010180090500120180184180580100180100000042 4680601600400400000000000680600400008400200600000600000600600600602402600600600780600000000000000000 0000FF975D00041000080340100101981B809881801801800000402600600E00400080000000000444600400000400200600 0006000806006006006004006006406806006000000000000000000000FF8EC7000401A00C11001001800003C09901801801 800000400600A80600500400000000180000400000600600400600000600000600600600620000600600600600600000000000244040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000680600 000601818000000000018600600018E2A6006006000006000016196007106000006006006006006000000000000000000000 FFB94E000000001811801800200403C21801801801800108640608480E02182200000000000C42600400680E806226000006 00108702608600600420E00E007086006000000000000000000000FF51CD000001E01C11C558244140498058058018158000 00680640400600240500000012000600E00C00600602600610000651001600E006106004126487A860060060000000000000 00000000FFD94C000090001C81C01C00400221C058018018018001006007014006003006000000000005026004006106006000a44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF70 D2000001801800C01001C0140180180000000080000060060060060070060040000000020068040070070040000000060000 06000006006004804006006004000000000000000000000000FFB760000000401800845140801001C1182400000580000060 0608601602604600600014000200C00400E00E00640010000600088600400600600400E10E40608400000000000000000000 0000FF3FB8000401A01010811604814A15A01000000011800010600620700600620600400000001204680A0064C604604000 0006308806044107006002D26206086004000000000000000000000000FFCFD20000018010018018808000419CD82180180000644040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100624000620 4007006000806006006004000000000000000000000000FF417B000000401C01001400801001801000000001800000600610 6006004146000000100000404006000001500028400016408006516806006006006006006006000000000000000000000000 FF7EA40000018018010010008018018018000000018000006006006046004006000000000010006404000000006000000006 000006004006006004006006006004000000000000000000000000FF75BB0000000018008010018000018018000000018000 006006006006006006006000000002004004006006004000000006000006000006006004004006006004000000000000000000e44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806006006006 005006802000081006804000006006406000001806000006000004806000004806006004000000000000000000000000FF81 0A000001C01A00001000201401001800000001800000600600600600400600200008100E00020080E80658002820000E0280 0608D004006000006046006004000000000000000000000000FFFCE2000000001801201200C0040080180000000180010060 0600600680400600000010000600400600E02684400080000600000600600600600680700E00600600000000000000000000 0000FFECDF000001801801401001800800C0180000000500000060060060268040268000000008072000000160062040008000144040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFCD7600 0200001800401800801001E01800000001800000600600780600600400600000000400000000000000000000000600080600 4004006000006007806004000000000000000000000000FF1C3A000200001C00001400201001801800000004800000600610 6006005106002000000800004000808020084000000006001006002004806000004006006006000000000000000000000000 FF92C0000001801800401C008010018010000000018000006006006006004006000001800000006000000800044000000006 00000600600500600000602E006006000000000000000000000000FF37F4000000001800001800001001201800000001800000944040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000818010011 800000040080480040100000000000000000000000FF3E400000018819820010400150000710840000010000A2604680E006 00E5040040000000C400C0000483900040000000060000060060061060000A6406106006000000000000000000000000FF68 51000200201A92551A408A5211225810000223800020680611602E896A14824000000894A489408B0900914000000C060004 4EB2E806206C30CA7107006806000000000000000000000000FF1D98000041911C0000510441114280190400000180000360 0E00620642612628600000000408400040024040000000090E0000060062141260000164265362264800000000000000000000544040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08881228C00A 48020000000800890880800800888C00000280001020101208220A48C08820041100480000000000000000000000FFD4D200 000180085900820114101280084000012280000024120130023020024020000004132020202A24620020000010020013064A 2002002000002002002022000000000000000000000000FF8CD90000018014004C0080000080404000000015800000000610 00100D00840000000000081040000000006040000008480000012080008C0020200201228211200000000000000000000000 FF798A00000180840001001660802400000A000000000100800040080002003038000000000002000050000004000000000000d44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFD2F2000281 3002412412212150000002402002020000894800814004908AA00000000008088B4900920800809000000004000004800800 004801000004004000800000000000000000000000FF751F00000100183180B8AB12B811A0B842000015800001641600E006 04E21620600000022E08400042630E206000000006000006106006006000406806C06006400000000000000000000000FF7D FF000400C00880CC0800800E44C40800000520800000304330280B50312310200000100200B0010830230222000008220008 8B2130129430210234030C3952080000000000000000000000FF0E000002202000001273202A24480022002002400000810800344040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (505515505508 80550D50D50550550000000000000000000000FF841000040044240040044464460020000240040000000010010018010092 11000000001140001001111001088000000000001800000800001001801000000801000000000000000000000000FFA95500 002A00008808A0080A00AA0AA0000AA0880000A202A83202A80604080000000000202000003082003002A80002A80002A82A 82A82A80022A82A82A82A82A8000000000000000000000FF36CE000200234A04A00A82800800800B0C000220800000280288 2002C02802802000000D028028028029528C200000000200000280200280288000300280200200000000000000000000000000b44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0AA822000000 00000006312A84002402A82002A80002A80002A92A8AA92A80022A82A92A8AA82A8000000000000000000000FF67FD000080 0304004004000080002004800000D00001010000000000410808000000000408100002008080000000000000000001000001 000002800000000800000000000000000000000000FF873F00002A0880AA0AA0880800AA2AA0A80AA05200012A82A82202A8 2A00A00000000000002A80002002A82202A8000AA80002A82A92A82A82002A82A82A8AA82A8000000000000000000000FFE9 5300025430215415214A52255415402A1542040000540D50C50D509001208000000008A0C50900C40C50C50550000550001500744040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880000018018 0190181100180180100100000180000060064060560060060060000000060060000064460060200000000000061060060060 00006006106006000000000000000000000000FF16380002012252014012013152010010412002820000004800920004888A 94800000000808800800820800800000000800000804804004804C03005004000005000000000000000000000000FF3D4000 0000800800800842800800800812800020800000200240A0020020420020000001020022001120020CA00000000000000200 2002002000002002802002000000000000000000000000FF5F050001AA0880AA0AA0880300AA2AA0800AA1080000AA82A81100f44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000000024 0040000040000000000000000000000000FFEAC7000002000021010030010001801805800000808000210A00232200200204 2000040092002000002232002000080000000002106012002000102182082002000000000000000000000000FFAFBF000401 4014404014074014004004004000000001000001001508001200000000000041001000000000001100001000001005001011 001001001001001005000000000000000000000000FF53FA000402400C00C14C40C10C04C00C00C00000808100200B003002 0534020020004001030030000020020030001010000010030030030030014430C3003043000000000000000000000000FF70000c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006046000 0400001802B20100A000C00002000000000600600610648200620E086006000000000000000000000000FFF89E0000008118 0102100080000B91500080000181000261040000060020060860080000000205400000D001400002000000000E1060460061 00106206026006010000000000000000000000FF46890000018100000400020000B40B402000010000800000200400000000 00108010000000450010410200300000000000000010200020100400000000240000010000000000000000000000FF4AE900 0001800000094010010004000000000001800000000620010005400000400040002000000000000000014000000000000008008c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000105180548 10C2840401840800800021800000600400600608E41600E00000010030E8000000262A4000000000000006C1608600690005 6006006486000000000000000000000000FF14B700010010384102D01081003188C800800093800000600400600600604630 6000000008000100028010014000000000000006126016006000306006004046000000000000000000000000FF5CD6000001 801801011004800141840844800001800011602402600600600601600000000820800220040028400000000000000640600E 006000006116306006000000000000000000000000FF260900000100180100101081000180100080016180006AE004004106004c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (556404556556 556556000000000000000000000000FF4CA900002B8418A90A3084848889ACDA008000CB80002AE2AC2AE2AE22620E086000 00021614000020E20000E0000002A80002AEA2E2462AE0802A62AE2AD426000000000000000000000000FF8118000000001A 010010128A4891A0180080004180000060040060060020060060000000261400000160002A60000000000008061160060060 00006006005806000000000000000000000000FF7EDA00032AB01889011250A820C780000080000180002AE2AC2AA2AE3361 C60260000003200260003803865440000002A80002AE0063362AE0000162AE2AE00E000000000000000000000000FF70920000cc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (061060000000 1030E4001101462A4000000000000006086006006000006006004006000000000000000000000000FFFD2E00042A0AB0894A BC29C01C05AAA80080000180002AE2AE2AA2AE2AE2AE2260000003204270062002060040000002A8000AAE0062AE2AF0062A E2AE2AEAAE000000000000000000000000FFB327000201C15205201A00B05201800000800001800000600600600600200645 6000000046210900046028006000000000001006106006006800006006004096000000000000000000000000FF0D42000154 555535155920809041B5480000011580005565565565565525565560000004160084045464D0016000000550001556C46556002c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (041801801000 050001911802800001800000600611600600200600600000002600600400E02600E000000000000006006006006004006006 414006000000000000000000000000FFE3100000018058458450430028018230A88000018000006016026006006006006000 0000860AE000006096106000000000000006006006006000006006144006000000000000000000000000FF345F0000000018 03C01001040C43801A00800093800000600600600600600601600000010600680404600E016000000000000006C2E006006A 04006006004006000000000000000000000000FF3228000301A01241001B05A938898008008000218000006006006006006000ac4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (042AE2AE2AE2 AE006000000000000000000000FF658600005413195195415592015590A93000155580005575444425565565505560000005 064120044044064A6000000006000554556556556004556556516556006000000000000000000000FF03A700000100180080 0011804001004954001001800000600605000641400000200000001600600000601600600000000600000400600600600000 6006006006006000000000000000000000FFCB6400002B88D88D8890880840AB8418018000AB80002AE2A63022AE2AA2AE2A E00000020E3060002A62462260000000000002AE2AE2AE2AE0002AE2AE0042AE000000000000000000000000FFEF18000100006c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000081610 2004044010006000000006001005006006806004007007006006806000000000000000000000FF4E5600012B0AB0AB8AA081 8890AB0C0000001CAB80002AF2AE4002AE2422AE2AE0000002663580042002002AE0000000060002AC2AE2AE2AE0042AE2AE 2AE2AE006000000000000000000000FFC8F4000080001801800001808001800804001001800000600C00E006006002006000 0000360220060AC08E00E000000006000004006006006006006006046006006000000000000000000000FF8CB100002B0AB8 AB8AA0A38A88AB0888000010AB80002AE2AE0862AE0842AA2AE0000002862060042AE3262AE0000000060002AC2AE2AE2AE000ec4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01800000A202 05A01000201C0180004068A61850C64040040060100810022064000060060088000609060011FD0068074060008070470170 07006000000000000000000000FFC7CF00000540104180000104880100000000140180000061450029161030020060000800 01002004004006000800001006000006086026006004007007006806006000000000000000000000FF8E3F00000100100180 002B242A0121004400180180000068060200061400020020000001020460001160C600000000080600000600680600600100 6006006006006000000000000000000000FFF3EB000081001001800001801001044088201201800000600430A00600A00400001c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (606601600600 6000000000000000000000FFCDFC000001411801908880800005841020001201808000600401700601400000620000010600 202800C00028E08000100600081600600600600810700E406026106000000000000000000000FF9C6302004100184180A800 8108010410000010018001406007006006085044006000000006800000000000006000000006008004006007406000006006 806006006000000000000000000000FFB4470400410018018140448000018210000018418001007804001006004020002000 000000202000004007808000000006011006006007006000006006006006006000000000000000000000FF675A0000030018009c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020100002010 00440002000000000600001600600600600000600E206026006000000000000000000000FFBF920000010018018010018018 15005800001E0180000060041440062A42060A64000000021001401500001000000200060000060860264860200260460060 06006000000000000000000000FF961A000001011801911901801009851808001801800028E8040A00060062040860000000 00002080024198430100000006000006006026286030106006006006106000000000000000000000FF06B800000100180180 184580100580B80000184180000060060040566A600602603002000208040008020000000002010600000418604600600002005c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (50828809008E 80001F48AA80002AA0120022AA0024232AA0000006526221002423922020000002AA0007022AE2AA2AA1002AA2AA2AA2AE2A A000000000000000000000FF390100000100000100C030049102004000002201800000004628000011001000600000003000 4002084008148000000000000090000000000002000000000000000000000000000000000000FFCDB1000001824000020000 0020500000000100000000001A88050000240500000000000080090080048040000000000000000020000000000100000000 000000000000000000000000000000FFAC62000001001801801001801001001828001201810031700401000601400100204000dc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005004004000 000000000000000000FFA54A0000D5955C01951153D41955955000155D55800155655600E5564CE11648E000000446124201 016516526000001556000D56557557556400557D56557D57556000000000000000000000FFB8C00000AA8888AA8A88809228 2C8888000008AA80002AA8820022AA2AA08A2AA00000008208200050A22222A0000002AA00004AAAB2AA2AA0002AA2AA2AA2 AA2AA000000000000000000000FF7AF30000000000AC00200000A20000100000020000010000000810010012208200000000 90200000520020008000000000000000000001000000800000000000000000000000000000000000FFC66C0000AA8890AA88003c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200900008480 D0100000000800000000801000000400000800001001000000000000000000000000FFFDB300000000000000404002400000 2000000000000080000022000000820040000000000900020008000000800000000000000000000080000080000000000000 0000000000000000000000FFAD4080002A8AA8028888888888AA8A88000AA8AA80002ABAAA4C3AAA22200300200000028323 20002022022220000002AA0002AB2AA2AA2AA0012AA2ABAAA2AA2AA000000000000000000000FF2B29000000023000001054 0102000050000004000001004C4035100500084080000000000004C00000000008000000000400100080480500400100500400bc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800800800C00 8008008000003402022002002002002000002002802000002902002002022002002802002002002000102002002002002000 000000000000000000FFDA2D0000000006000000000000000002000000000000000800800000000000000000000000800002 000800000000000000000800000000000002000800000000000000000000000000000000FFD2220100001000000000004000 0020000400400000000100000000000100000000000100000000504000004400400404000010010000400000500008000000 00040000000000000000000000FF1F8E00010000054802000220000000000000020000000000000100000800B09300000000007c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFA785010000000800A00E18A0080281080480480080000120020620020120020020006328626020004020 020020020030022FA00200A243002000002002042002042000000000000000000000FFA942000040001A01A01801801801A0 1A01801801800000640604600600600600600000600680600180690680680604600600400600600600600010600400600600 6000000000000000000000FF4833000000001000000000200001408000000000000000000480180400000000000000080000 0000800000004004004005804000004000004000004004020004004000000000000000000000FFD767000020000800A00A0000fc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF1B24000000000001000001200000000000 0010010000005000004000004000000000000004800800001001001000001000000000000001000800001000004000000000 000000000000000000FFEB8A000000001000800A00800800C00C008008008000002002002002002002002000002002002028 80200222202202220208280280A002002028002002002002002000000000000000000000FF3F7C0000001004004000000000 050000000000000000000800000000000000000000040000000802000000000000000000200000000400004802000800000000024040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01A05A018012 01800000600600600680680400400000680410000080080001E0060060060020A288680E0062008060020060060060000000 00000000000000FF05E8000100001800001C40840009809801811001800000700E9060060064560040008000010440800C40 5000600602600600288A106016006208006022006806006000000000000000000000FF370200000000180002180180200180 1001821001800002E00600408604600000000000600400000000C00010600600640600202600600600610020600204600620 6000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000824040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000000 0000000000FF4A71004000041800243015841C01941145802000800008080E00E006006004006000808806D0402011690100 600680604714002400600602600900E042A27006006000000000000000000000FF6574000000105800001021821811E15801 85000000000000161040060062440020000060040C010114680808600604640600200F006002006011007022047006006000 000000000000000000FFF60C0000803119B4401A49819801815811801241800002E10600608613600E104000140000004000 048420016007046006010000116014006080207113114006306000000000000000000000FFBC96000000505940021811A13800424040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008006106006 006006803006007204006000806000004806006000000000000000000000FF7A9C0000004010002010158008018818038048 03800040080E004006020006002000006014896004810006086806006A06003C0E0068868060040069400060461260000000 00000000000000FF0D70018000001800400041841181C05811181043808020006601600602600400400015620900E200844D 0708718E00F25E60438C1070B5186800187002004026026000000000000000000000FFB62000200055191402440181100182 994100100180801000860040061160059000000064042064400840020160160560060B60260160400470080160125540060000c24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1C0180280180 0000001600D20608082600200100682509640420280631720600600600510408630100600400702400400710600000000000 0000000000FFC98D000100001600001001801841E01A01801801800020000680680600004600400080010680400440281004 E006087806000884006084026044006826004006806000000000000000000000FFBABC000000029000001221880901801001 80584180002000062164060102040860010070C500040400A004406406006006000004106006006024006007806006106000 000000000000000000FF29E0000000051000081241D09A01801C01800801800000081740400710140610000000600009600000224040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF687C0000001818018A100320180190D001801820800000021600500600080400000000680604E200866006006006 00610610500440608400E00000E006004006006000000000000000000000FF451D000000021801801001003B418A38018018 48800000000600400601080480208000E0240260040060162C72A61060060040042A600504600408608400408E0060000000 00000000000000FF41130000040038528094312018918018018048050000000016804087800007A13800006006006024A120 C784600611610E554554016000446005A46007005806006000000000000000000000FFC37D0000800018009010010118018000a24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060060 06006004006006006004006004006002006000000000000000000000FF952400000000000000080100180000180080180180 0000000600600600080600600080000600000400600600600600680700600600600600600400680400600200600000000000 0000000000FF60E8000000002854130053805B01829800001801800000080600600600000480408000480680C0064140060C 6486016006056D040060860560060C6004806112006000000000000000000000FF962D000004040800600001801810001E00 00582D8000000C0600510600000041400000C0420044200060C640602608680EA0605614E00640600040E90400600200600000624040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001A03000000 0286024006000026806200000000064804000802006007006006086810006006806004006022006002806000000000000000 000000FF4D54000000001201811C01C01801001900801844804000150604600600001000450008600200604C804535100116 00604E006143016806006005006804006006006000000000000000000004FF7FDA0000000010018018018018010018008018 0080000000060042860000420060100004820040040060044002060061060860024060060060040060240060020060000000 00000000000000FFE1800000000000000000010018018018008018018000000006006006000006006000004006000004004000e24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF9615000000200001400001A01800C0180180180180000000060040060070041040204400041000008841320460068060 06146516046806006000007802006003006000000000000000000000FFB79800000000000100081180180080180180180180 000110060040860160000040084842848000280002AA20608E00702E1465B720E01600600000600000600200600000000000 0000000000FF3A26000000400801E00281801801401800001A018000000006046006000026506040046000106804504B5284 6026107006006800026006806004886002006206806000000000000000000000FFFF0C000000000801801819801800001A8000124040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020612600600 EC4A30E0060060220262420A6346236000000000000000000000FF7BCF000000401001001801801801801801001801800000 0806004006006002006000000004004000000000000006007806806002006006006000006000006002006000000000000000 000000FF659B000000001001410889801800C01801001841804000900600640600E834004100003006002000004A04100426 00610680601200600E006000007002806206006000000000000000000000FFD1A1000000401001000C01C018000018010018 018000000006046006006001C04000003006802000407004000006106006007002006006006000086001006006806000000000924040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100000100000 2A0010020000000000008C00000010000100000888880881000028111A00000001410108A800000000000000000000000000 00FFE5ED100000010001120811901820081955881800000000040640488600600072000000214C2460000040500002260060 0600E042006006006000A462E2106024046000000000000000000000FF25690000004084A9201A01891AA0341885A91AA080 00C010C6C4409684692A82600090229530C8309008008880AE00608EC468828264B723680030689240E81710600000000000 0000000000FF5CE7000000003405054AA1A41805C15C4100180180000280060842460062014040002100440460022143204000524040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF A9870000002432A024420022008224A2203002C00000818820841208900A00810000A00A10D80808B00A00400500010C40B0 0810080C094388200A0800808500708000000000000000000000FFC1BD000000100901C19000A01900800C0101C824800006 204200300200251A00200110208002A00245A4221C280282301240268280205220600200201282205A082000000000000000 000000FFDE1704000000800800000409C20000008004180180006060801140204060E0000000480020010020084081219040 840008020000A281A0000001000400441281020000000000000000000000FF65E90000000000160021E0200050124202000000d24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002802C0B08A 802C02002800802C0AC12802802000000000000000000000FF76060000002432012452002110003082032042820000801004 8200048108C880000080CC34804902848800800004005004904C248048140049020049248C40008040000000000000000000 00FFF9F60400000B108B0951038818A190188B15580180000460264868064060D649600000402E04C00202E0360060260060 0610644C1060AE0060028364CC286946126000000000000000000000FF860F100000400C00820C50812E10C42820C00C4C80 0128B20303200B083403002000503483503009303283332A8282A23240300200A203A0B00020300202320B4020000000000000324040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00C40D508315 50D40900A10000840CB0C00900D50C20550551551550B00C40D50A90550900D50C40908D50D50000000000000000000000FF AD5D00080040040844054A420000000000400400000100100100080100108044800000114110900100150100100080000100 1501001010801001000101000001000000000000000000000000FFAF4300080028808A0880880A20AA0000A00A8008000022 82A80802A82A00002200000800002A0000200200AA82A82A82A80300002A80A02A80002A80000402A82A8000000000000000 000000FFC147000000000C40C00A44A00A00A42A10A00A208000903002C12002802A0289200124290280A8008828AA00280200b24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF48F8 0000000AA0800800000282AA4AA8AA0D00C000003382A82A82A82B00102A00001800000200002000002A82A8AA8AA8208000 AA8221AA86002A82102A92A82A8000000000000000000000FF735A0008000000020000000240004000080020300000088000 4800000082280A00005080000A80000001110010000000000200880000410000000000884000000000000000000000000000 00FF4DDF0000000AA0A20920001122AA0AA2AA08208A00002202A82A92A82A02401000004282084402003300282A82A92A8A A82B00302A84C02A80002A92202A82A82A8000000000000000000000FFEEB40000003543503543523103541343223503040000724040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (031530030030 03002801003143413043002000000000000000000000FFA230000000001821003005801801801003801901800001620E0860 5620601600620004401600600200E20600600604600620610609602600620254600C086006006000000000000000000000FF 114D0000002012052032522020002002002222120000800804800004810910010000015430810A0088081080480400400482 0844000888004800800044800001000000000000000000000000FF0367000000000848830880880800801800808820800010 200200280200244200200024210230200005234200200200200210251200200200200000291200280200200000000000000000f24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (630830404020 6210000400440000000008008240220000020000008100080040000400480110080040000000000000000000000000FFD9C6 000000041844000800800800C060028008048000042112002002002002002080002102102000002402012002012002282000 01A102006000022462002002002000000000000000000000FF319F4008004004214010004004000004000000000000001100 0010080000200000010010090000100000014410010090010210010010010000010016012090010000000000000000000000 00FF97F2400000400C00C00800C00C00804C0080080080000030024030020024220020814030030028000020430030030130000a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFA5710008 800018008008418090009E580180100980404862260C401E00E0002045A800C00C1044406100380862461860260066600060 0018E418046082224016382000000000000000000000FFD0E600008004184480000180001401180180102182000463160040 0600600000C00000600000D10800002001620600602600600202E002007040406002406006006000000000000000000000FF DB3300080000000002004000002A01009000004004404080000400000400000104000000000304D001008040004040000020 00002C0028000420220000088210000200000000000000000000FFB05F000000000000003005000000000000001901800001008a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C5162AE2AEAA E0002AE1922AC0042AC000000000000000000000FFEC48000000001840AC0011801A41801854800121800000400641400600 60460860000060C4402800444036086006006006004206002006006800002402004086006000000000000000000000FFA2C7 0000000358048088438010958CD80180100B800000200614400601640E44E00034C0140B600009010000E006006006004128 00400200600000404A00642C000000000000000000000000FFE2FA00000000180082000181102140190980100B800008E046 08400603600640602800E08804600000028050600620E0062040003060AA01600000632214E2064024000000000000000000004a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (552556540436 4C600000A4225142045424B0446556556556556506556550D56204556488556106556000000000000000000000FF56D60000 004A98888C088B8AB8AB903C908AB09380002A82AE42C2AE2A61342140002142A60AE0002B220828E2AE2AE2AE2AC0062AC2 AEAAE0002AC0222AE28C2AC000000000000000000000FFB3A8000000603800820001801809081C0080102180000000060040 0600E08400C0004C608A02600201200008E00600600600402600000600600200002200622E006000000000000000000000FF D03F200000081A888068810AB801851A848AA04180002AC2AE0042AE2B64821060000442040020000042062262AE2AE2AE2A00ca4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D45100000000 1A21902801A01931235A00001821800000000600600600010621600004008410000444403600600600600600611400400680 6004004106006004004000000000000000000000FFE35000000028388D8000AB8AB8010018A88AB88180002AC2AE2AE2AE2A 00260860000000042010040042062062AE2AE2AE2AE2142AE2AE2AF0042AE2262AE02C2AC000000000000000000004FFD7CD 000800003C42410841C01C0140184080080180000000061060060000060260000820164048000020C0046006006006006044 004000006800004400006046006000000000000000000000FF6BB3400000151D50514155955CA50359549549158000554556002a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1040162AE000 004046006404184000000000000000000000FFF2A4000000001849050895843841001843803801800008000600600600002E 02600005400608000404600E00600600600609601640450600600440440C2D6314404000000000000000000000FF2BC60000 000018058848418018938B5891800801800000000601600601010608E00030404602A1041060C60060060060060065241300 320061040A8126006024034000000000000000000000FF6348000000031804A50001801A0590180580080B80000000060060 0601041604600029443604AC040961060AE006006006006044000002006C0400000C006284004000000000000000000004FF00aa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE2A01262A80 0022009020620434628A2AE2AE2AE2AE2AE22602E28C2AE0042862AC2AC2AE286000000000000000000000FF6EC500000015 51119038B59159058CB951B51D5580014C05565565575425325100004104444060044CE54855655655655640E4A444624455 608400600E054156406000000000000000000000FF5030800000001003801001801803815801801801800000000610600600 0012000000110444056000016022006006006006006006206004006000016006004006056000000000000000000000FFC7F3 0000000AB8840000018898010018018A98AB80002282AE2A62AE2A020624600010428E20000020E2062AE2AE2AE2AE226006006a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001041 800A00840A49801801C11C018001080005406006002052000000000000096004008026002002806806002106096104806204 50E044005006006000000000000000000004FFBF750000000AB0408AA8AB91588390188D8E1AAB80001182AC0162AF2B0482 2A80002202203060042802022A82AA2AE2AE2AA33E3062442AE4040462042AC2AE026000000000000000000000FF0D460008 00001021850801841849801805A03801800000800600600600A0060000000200900D608400600000600600600614601400E1 040060044B6304504006036000000000000000000004FF95350000000AB0898AA8AB8218A98218A988B8AB8000A202AE226200ea4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070160400860 06006006006000000000000000000000FFDC28800900101C00801C41801581801801C01C0180010088008070072040020002 08018A4460000010E003017004907006046403506004846021006007405007006000000000000000000000FFD16200000000 1221800810C00801821801C01C01800100121502680780200C00000000000200000500608810601500608750202080F08600 6005806007806017806000000000000000000000FF25AE00080000110D80080188B80193584580580180002410040B600601 220600000010890A02020002611300700400600600200002603600600002609400600630E000000000000000000000FF5696001a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (401600008048 000002000010000211829000E0060062C2006100256200004002484006026000000000000000000000FFE982800000101800 805881801881833909D05D01800100081100E00600600628042820000600600008840604200A10600601001242700E886111 0460048160A7106200000040000000000000FF94DE8000800018A0821831A018018318018018018000000210026006804006 00000000002400600100008A0008029060872A040248E00400600010600400400E006000000000000000000000FF57F78000 00001900841801801001811801801801800001010000780640600200020840020600000000E0060070040078060060038060009a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018008018 00000003841801D05A09800100400702600688600600028020000E00800009022E04200010600601210A02600E0860800460 02116096006200000020000000000000FFE311000008001800815800000021891951811D0582804840060860070240065100 001000841202A8040002000290006006080202506002426410014120406006046040000000000000000000FF81A200000010 1800801901801933885801801C09828029407609600702600600805000008A0882A80201AE01200001600608600208600202 600000C0A220604E106020000000000000000000FFE0E2000008101800809801801809801821A09803800100C10602600608005a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (440000008000 0000000000000000000000000000FF88B10000000A90AB9008808888AB9000AAAAA8AA80012AA2322AA2AA00244200000000 004220210020200A10A3022AA2AA1020122AA1022AA1000221885022AA2AA000000000000000000000FF88FD000000004001 050008000000000000001C01800000600000600148E4C80000000000000B01000082245401080000000400A00004D0000100 000000420000000000000000000000000000FFA25A8000000000000840440220001340004000000001000108800000040000 0000000003480000000A0080000020000000490210000000000000308420088000000000000000000000000000FFA9B4000000da4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000094 0200000105510010010050042300A4004041004000008004020004004000000000000000000000FF012B9100001559151518 43845D558CB555D55D558001556D4E557557D465060000000004044160004172AE456D5655655650640D5561265560005564 56557557556000000000000000000000FF97010000000A80AA850CA08D48AA8208AA8AA8AA80002AA2222AA2AA20200A0000 0000020230A0002C20024322322AB2AA0022022AA40A2AA0002C225200A2AA2AA000000000000000000000FFC02E00000020 002020409011000000000140040000010000008008000080100000000001280C04000800008800008000000300C000020900003a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (050802412002 24000B4400400400000109010080100001008800000000002803000014008012804800080000000100034000000000000800 0800000000000000000000000000FFFAE0110000000042008004100000000000000000000000000000000080000000000000 0000100000011220000101000000110010000008000000000100000000800000000000000000000000FF5A9D8000000AAC00 8808088088AA8018AA8AA8AA800022222B2AA2AA2A226200000000028220220024200A2022032AB2AA2222A22AA003AAA200 2AA2222AA2AA2AA000000000000000000000FF54E580080020500140420A00000101400140040000010010808010050B010000ba4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (104805800004 004004000000000000000000FF89D9004000400800800800A04C00802A008028008000002002002002002042002028002102 80200010280240200300208200A002102002002000802002002002002002000000000000000000FF94D60000000002000000 0020000000020020000000008000000018000000000000000000000000000008000000000000000000000000002000008000 08000800000000000000000000000000FFAE6501000040020000810000400000000820000400008000000100000000000000 00100110000000400000040000440040000890000000000001080000050800000000000000000000000000FF3E1400000000007a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000002 30000040000000000800000000000000000000000000000800000000800000000000000000FFFE04010000000C0680690080 0800C00C06860A04800006200201208200300240200010311300202041A02204308208200200391200300300200000300205 2003002002000000000000000000FFAA32004000001001809801805E01805809205801800000600600600600604600605000 4105006000106806C0600700600701600690600640600000700C006006006006000000000000000000FFF246000000401001 000600000000000001000200000000000000000400180020000180400400020800000180000400590480418400000580000000fa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF00080000004004000000000002002000002000010000004000004000004800000000000800 804000000000800000000800000800001000000000800000001001000000800000000000000000FFF25F0000000000018008 0080080080080180080080008020028020820020020020000020020020000028020028822A20220020008020028020000008 02002002002002000000000000000000FFA11C0000000010000000000040000004000000000000800000800000000000000000064040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20844DA68F60 06000000000000000000FF3ECC000000201A01829800D00011805818881801800080623E00204E4160060040010480060260 00800002880006886006E0622C10E00E31600004000280D047146006000000000000000000FFE4CF000000001811801A0580 0103941920C838058000016826016016804C5680400009304454451000280004010600608608694CA1600F00620000090204 E006006006000000000000000000FF1C1B00000000180182D900000001000005811801800000220000600600400400C00800 2016006040100000080006106006006206006006406000102022006106006006000000000000000000FF409B00000000000000864040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004600602000 608282600701642600710600600720700040600204408602E006000000000000000000FFEC13000002420E03A0DA81801001 C10801800001820040280204200600680680600880B100004021C03124080006006006106A0200600640E0000060C0001017 007006000000000000000000FF220F000000000801801885A01315803844A00005800101600601200620E22E00600000300A 286008080004800086006086106087C06006086201907082020006006006000000000000000000FF19B1000010215819D438 01AD04058A10C1A0B901800001604600202600600604C0080A00340442A010200282004680614681610018700694E001420000464040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00009C151218 05801800000001600602000F144004006080020806004000087048006006006106086484005816004000804022006846C068 06000000000000000000FFB01C000002005003813800801801803A00801800000040600602200600600600E0018060060402 04246000006006007807907406004806004004036C2A006006106006000000000000000000FF0D04000010410801841907DD 1585B93D81800019800001601E00200600400600E01018413400438092684212604680E31E01606310606695698002EB0800 4416686006000000000000000000FFBC2D000000040811900801001001001820A0010184000060460020060040040260000100c64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680600600600 0000000000000000FFFB87000000001009C55801801009841802805800000001700604040E8AE00600400000510010600410 601680648608E026006010504207004025005055002446286006000000000000000004FFC928000000000001A01803E01C01 A018018098000000906806000286006406026000200085084000002004200086116426006020A86006006024824804A06806 006006000000000000000000FFAECD00840826000184101980D80189EA0080D84000008020021800860162061A6080826015 01800440062500040680628608629080750E71E414104015006406106006000000000000000004FFAC89008008005209815800264040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000008060C6 20608628610648E446104086106C20046016406806006000000000000000000000FFE26F00010011F4018068050014010008 40B61A00000000200200000600400400400100548008C1000160A680608600600620610208600608600001F00C00602601E0 06000000000000000000FF2D89008008605001A0880F807005A09C2100184000009868060808070060260840014852180000 8640E0064260070060260060E2004106104416146004402006026006000000000000000000FFC13900008414164980180180 94C1A01811A81A40000004600600040610600600400000000100400000601641620648610609620000610F0064240440042000a64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180000 1800000000400600000600600400000000000600400400600400600600600600400400400400200400400400600600600000 0000000000000004FF73E7000001800401200001801801A01801801800000100400600000600400400000100000680400280 6004004006006006006006004006006806007006006806006000000000000000000000FF434B008008400841808801811B01 801801001840000008400600040600600400000000000E088004006016836406006026004004004814002004004004806026 046000000000000000000000FFDB96000404040811801809805841811810801800000004500610100610404408000010110600664040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000000 000000000000FF215E000001018801007801841801801801A01A84002000600600000680400E220020060000000000802004 02600E00E006804004804814000000100030006002006000000000000000000000FF8DB8000001400C11C00001A018018018 0000190000400068060004465061244400401014065003244848829461060070560061060060068044048170468070000060 00000000000000000004FFD99C000001000801801901801801801801801800000000600600000600600E0000000001060020 0800600200604E10E506206006004026004004006006006000006000000000000000000000FFC8740000018000010000018000e64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000464020040 06006006007006002006004000002002007006006200000000000000000000FF8858000001000800A00801C0580180060000 18018000006806003006004006420000028400006020C12806156406006017206106541C0680601000300200600600600000 0000000000000000FFE06D000001401800801801901C01800001D4180580000060060020072040260000000000802862A82C 20870840860072BE0061C7D00026006201802002006006006400000000000000000000FFD4BA000001000A01003801803C01 801C0200B800000000600600000E006004450000050C00000044412404156406006006C0400402620400001400080000680200164040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (881A00001C01 800000400600288600E086000000000000006000020048246326006106ACA00E00222204400031288344E8CA14E000000000 000000000000FFE96A000001600001201801801801A018018018018000004006002007806006000000000800806002002000 804006006006003006000003804002002002006000006000000000000000000000FFDA87000001000011402101CC18018000 020AB80780000060060024461041040000001004060060000040028060461060064060270028160040009120120060060060 00000000000000000000FF9C9F600001000401000001801801A00001801801800180600600200E004004008000000806806000964040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF55B70000105A40100C00020800000102A400004200000004504210A00800000000000B04000002000A00802888 90818000080210000148020000108100010009800000000000000000000000FF42ED000001000801009A0991981188180090 1081800002412600280E00400400000000028002200000000001600620600640204640600210400004244234600602600000 0000000000000000FFCF6A000401200B01201929A89B05A49949281A85800084544692A036CA4A46000000548A908B2A00B0 2D00916016316A0E802C06A46912A04A40842A42886C06206400000000000000000000FF181A0000011442418B3805C2183100564040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (340330380280 A803C8309300385330300140308231312A10A000000000000000000000FFB6D5000040013280203261200220304449280200 0000D40800880800D10860C00000808800C08800A00C00D00009081080008C08A00290810820E008108007810D9200000000 000000000000FF87EC000101840120C20C00800808848D10800800800000220201200200A00200000020004A0D200000220A 022203003002302002162022400100022022822012002000000000000000000000FFB26F0000004000001010800201820200 01005101800000000000E000220280000000400000000010440020001020400318870100001000240200080280488864700000d64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40A00A008000 802C028820028220020100004414C2A02A00A82802932802002802802802C228028129008020428028028020000000000000 00000000FF8CAD0000012014002012092002422000152002040000800914C30004C088888000010910089008008088B08000 04004004001048810000C04801154D0C94C800004800000000000000000000FF14380000A90238818C102189188994384D00 390180001060C600680610600600000021040600E00840600601601640608E02E42634610602E10012442C046406A4600000 0000000000000000FF58C4000400888C10800800C00C00C08B00D00C20800122320B4120032130424000000010232230010400364040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF7B7B0002003523542145503302C43002C43303520000D50CA0C48D50800230450000310A09008880910C40D08D5155 1550D508B0A00550C30900800900CB0D50D50550000000000000000000FF7DBA000800410400440004420400000442440404 00010290010210000000000000010A1000011003001121120001800000001481001001001003101109440001000000000000 000000000000FF3BC60008000AA0AA0402020A80000640000AA0A800002A8030000AA81802203A0000000000028080020210 2402A82A82A82A82800802A80A00002408002002A82A82A8000000000000000000FF4CEA000200C00A00AB4940C04D08B14D00b64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A2002002002 8022C200200200240010210200A002002000000000000000000000FF2EB60000000800AA0000F00888AA8101000A80A80000 0000402102A92A9AA82A8000000210528400200200201AA82A92A82A80102A82A82A8000230208110AA82A82A80000000000 00000000FFC53E00080000000008000200200800800800200000000000000800002300800000000401402C02002400800000 000000000002000A9000100000308248000000000000000000000000000000FF798A0000000A20AA09210008A0AA4C400808 A0A800003002902802A82A82A82A80002102C10400803302082082A82A82A92A80202A82A82A8200220240000AA82A82A80000764040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080080000030 0200300300300000002120905301308200210200300350311321300310300310311310300344300300300000000000000000 0000FF32B5020151801001809805805001001803801801800000E00600E20605600000800000010400600040644608620601 602608600E206226206000404226006286006000000000000000000000FF4FDF000001215200324009444400080241200204 0000850A208A00048000000000014008CC904A0294080081000100480400080880480480480280C844D20000800000000000 000000000000FFFC03000000840800810804801801A4C892804800800048211200A8020020000000000B000220210001213200f64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFFF220000A8001001000000002080004004000001800000C000006210004000000000000080010000204204080404088140 080208400000500010200220440080000000000000000000000000FF344F0200000038A0808803C004001048058009008000 00200200A10222200000822020000204000000252200200200224A6020020005404000800824000020120820000400000000 00000000FF298D400C0141C54040640008000040040000000000006010000010114090000004010090290010800000800010 01201401009401081221001001001001001201101000000000000000000000FF9075400400C00C00C00C00880900C04C0080000e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020060062001 0642402420020008220024200E006000020000000000000000FFA68A00088100102104082194D80182982181B92191000860 0622600601E00004808002008265E00000040622400611604600269001451C16010000A08800008600600000000000000000 0000FF9FD700008100182100180180981589012180380B802008400400E10600400008800002010208600802410022400200 600600000200400600800800A0AA102106086100000000000000000000FF7E0A00080000000C022000142094000090000014 11404101500100000002001400000000001004104500100100800900000000102280001103100800402A0000100080000000008e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80002262AA2A 02AE40C0100000000002620000002262040062AE2AE2AE0300004141E62040004224062AC0042AE000000000000000000000 FF9CEC2000310400110B420184180580194580000180000060020000062264C000000000008A020B00084004036002006006 41040020C0060D4800002106004516006000000000000000000000FF5BDB00000101500500080180B8A18038119038058000 11600601000608600800000000000048A0000100B63040060060060820D612020C0001005124300020440060000000000000 00000000FFA552000001001815004841C01C81843813801841800020E0AE42000600640000008000000000220020C0100141004e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF2F 65200113295903014155905905915AC395595200005545545505565545500000000005264860044045105505525565565565 5240C45600400440048E5524B6554000000000000000000000FF5A3E0000D12A380300B4AB821915A8DA219100A980002A62 AA2A02AE0D63200000000002842884804C03042902A82AE2AE2860B60824062A608008E08E2AE00C2AE00000000000000000 0000FFB830000041220031280401831829821809800001800000400000000600600000000000001004028012C00400000200 600600600608208634E20004E026006006006000000000000000000000FFBFD40002830818A11000AB8818498E921186C0A900ce4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600610600609 2014026806004014002024004000000000000000000004FFF1360002210310030B4001A01801A01B45801800000000600600 000600600000000000010010E20000602600600600600601600202010428C200112104006114006000000000000000000000 FF62F4000483201A814400AB8098098A90018AB8A800002AE2AE2A82AE2AC2A800000000022623700422C2462AE2AA2AE2AE 2262AA2442240050043222242AE2042AE000000000000000000004FF4FF6000A050112D1820001C8BA018019058018040000 00C00401000600600000000000000802680001004804000000600604640202001400C8000200440025460040000000000000002e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00440C2002AE 2040000000000000042060001061142224002AE2AE006416202096206000186106006004016000000000000000000000FFA7 7C000005840041052801803803809801803802000000412404800604600000000000044C08E00434C0A40122820060064160 5613200602E00400C0860C6204404000000000000000000000FF5A120000418818810010018298C984580182180000004CE4 0608000608C0000000000001000400020064140820280060060A648600245410600022624C2120AC13600000000000000000 0000FF97BE000011903829001201943CC5805811801804000000600600000600600000000000000C0009061041140020020000ae4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004FF229100 00AA0458AB88B8AA01190182B8AB8A98A880002AE3262202AE2AE0060000000004442A000002600622602E2AE2AE2262C600 42AE2A40042A22A628E2A82AA000000000000000000000FF0B300001540810A39019540018018C1955953D5000002C608CCC 05561560060000000000044160040440205360565565565160265244A6434004402044016112142000000000000000000000 FFC710800000101801841800003823901801801802800000600010000600600600000000001400E0020860CE016406006006 08600604C006004002012006006002002000000000000000000000FFC9E800008980B81B0848AB8858458810AB8898AC0000006e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006084214806 1100001461000A6004002000000000000000000000FFB679000000041C0002D800003803849800805C028000006102848006 8060060000000040048C600434C0A40552860060060A600404600600200401200E016801007000000000000000000004FFD2 CA0000AA09B0AA0018AA1C18118018AA88DAA800002AE23E2102AE2AE00600000000418C2060004164043841062AE2AE21E2 3C5842AE2300042022362462A82AA000000000000000000000FF859100080004D8018498000B190981380180180080000160 2680800620600600000000033414000620C20000608600600602610600C00608400402A2142C62202020000000000000000000ee4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070000060160 2600008000602600004000400600600780790608600600404414440008608BC16007800000000000000000000000FF048280 0800001C008A98000018018098008004010440806006800C0744602600002010402701002040000611290684708F68640610 48360840004C248A00E903001000000000000000000000FFAB920000100008024A9C00001801801800C01C00800000530400 900600600600804000628600600402410400720690600E006024006006002004016040007046004000000000000000000000 FF74DF0008000000000818000298C9903800821800800100400408080600600600000000622601600000041400202E007007001e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFB289000010 0050018230000238238098A00A1C0904404020070084064060260880000244060B008246808439010610E0060060A020C00A 0000022C2442004100000000000000000000000000FF284F800000001000A01880101801841C0AC00501808000600EA80806 0160060004000020840000282840400048A60062460060041222C01420280062A208EC2E0A4400000000000000000000FF27 06800080081804801A000018018018008000018000006A8600800602E0060081000800840000000060800042060260060064 2408201202220040A002206042004000000000000000000000FF2C53800100105000801800001801809C0080000100004060009e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001402103001 00000300048030010000000000000000000000FF95C5000000001801808000101841811804803C918000082006A0000600E0 261000000260861061402940440040C60160460060040460C01120104062A2086446044200000000000000000000FFCB9800 00000010018000000038838A38A08C1841810040601700804600601605040000400600640002000440801600640600E08030 A0100020000A6002404004004000000000000000000000FFA6D600000000181984D100041881883810803821000029E00610 002600600E02000000600605821200410410C00E00600600E04000640204A042026002214014104000000000000000000000005e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080000000 00000100000004012012002800008008000002000800000084001200A8000200200000000000000000000000FF40A1000000 0038888E88001C00100AB81C88CC0680002522432AA2AA2AA2AA0000005422022081004024023122AA2AA2AA2AA310042162 0021002AA102002000020000000000000000000000FFCA3400000004000200200000A0020001220020018000040054006000 0000000000004400100002002C40A4150000000000000130410080050000004048300480500000000000000000000000FFBA 0D8000000880400000000200C80000000204C800001081000000000000000000000881400C0100008410000000000000000000de4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5B8008002014 0000040000A02200122000044000008000090010050040040000000040100044028010C80010050050040040440000000040 0200000C20010C024000000000000000000000FFB0C2808000109113921800001001555951951D53800010E107556D575575 5600000052455654E101157026036D575575575560262564564A40002164045561360C6000000000000000000000FF993300 00004CC8AA88A8000009008AA8808A890880002822822AA2AA2AA2AA00000000A2A22D20000AA0022222AA2AA2AA2AA20248 A20A34A0002AA2220AA22228A000000000000000000000FF70EC0800000222200124000B0108000200000400000084024080003e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000000 0000000000000000000000000000000000FF473F0100000140200000000280C00000400204040000448D2080000000000000 00000C80001000800084101100010010010000100880080080012880100000900C8000000000000000000000FF22E3000000 04000204C0000020024000020000000000100010001000800800000000000000050200AC08A04200000000000001202200A0 120200040120000440400000000000000000000000FF011088000008088888080008584D8AA88C88E8A880004030122AB2AA 2AA2AA0000002022AA202000002112003AAA2AA2AA2AA3120023022020010022022AA002012000000000000000000000FFB000be4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00400C000000 00000000430000500000400C201800004004005004000281804015800004004000000000000000000000FFEC0A000000B008 00A00C00800800800840800200800000200A082C02002082022000000002002080002002C82002002002802802C020020020 0000280A082042002000000000000000000000FF2B2E00000000000000020040000000000000000000008008000000000000 00000000000000000000000000000000000000000000000000000000000000001800000000000000000000000000FF554600 01004003000024000000002000000000000000000800011000000000000000400000000050081C0004044010000000100000007e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001040040 0000040000000001000000000000000000010040100810000020000000040080000000000008000000000000000000028000 0001000004000000000000000000000000FFFDEF000008808B02A00800820800808800800740800000200201289B20206308 200006000200200000240200200240200227A002002002002029003003002002002000000000000000000000FFBC83000001 401A01A01801801801801A410000018000006816106406006906046000000006004000104007506006806007005005C04004 006002007006106046006000000000000000000000FF108A0000011000010040004000004000016000A0000080000000000000fe4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000016086 00400E106000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF51400000000000 0000100000000000000000000000000010040048000000008040000000000000008008000000000000000040010000000000 01000000000000000000000000000000000000FF96B7000089A00803000A00800800808C0080020080000020020020028020 0200200000000200202800200202242B002002402802002002002028002802002002006000000000000000000000FFA7510000014040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (260060010011 0640C0004C81000060060160061442020030880C200120628E04406E006000000000000000000000FF226100000088490001 08018018014938508002818000086406002006C0600E00E00000000700600001420011610608400600402208220216A00040 641760404608E000000000000000000000FF5175000000A00A00002000841041801A00852000800114600610700410600E00 E000000006114080102A0080600E0840060010035520028120A8006006104486036400000000000000000000FF9950000000 880800000001001001083080800080000000600600604000604600400000000600600000600040600600400640022200228A00814040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001C51414009 801841815C3480000180000160060020040060160060000001040000A214248621744600C00890E10E10640704608200E006 046026006000000000000000000000FF7162000004241A01800113041801A0B054840000000000C00600280200700E004000 0014448820A0000800216206206234212882113A0000608000E007807006006000000000000000000000FF4A470000000018 01804001841A01A11C40820001000000500608200228600600600100100410208000600149610E0048042020034320020060 A9016006086306026400000000000000000000FF0FB80000018028D061880080187580188880A0018000827206002026106000414040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0441E85608E4 B6806000000000000000000004FF7D4C00000185180190000090181100594081040080000420061100070068060060000000 0408420400612604601604600E0040004008234063000060060C68A6006000000000000000000000FF3ED1000004A21801C0 0085801001081C001442400000002804002802106006006000000436106204006007826007C060C6A0080082800A00400482 680600600E006000000000000000000000FF1E2A000021401C01002001841C15C81800882221800000500600298400600600 660000100C4002004982661A6826006C8004706F02600C80600102700700600E006000000000000000000000FF958D00002100c14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600008005400 02040C42062A6486086856004006107C24804004006127C06006406000000000000000000000FF063C000201811401C00801 C01C01C11824808001000094710608800244600600600000000708020500C446216016824006014004214004004284086096 22720E006000000000000000000004FFD4B4000001E01801000801801801811C0080000080004028C600080622E006006000 20180400400001401180610680680400400202A40000600408608641600608E000000000000000000000FF34E9000000821C 01084801091069801484804000000010300600000200E006004000200004416004404480436806004008190C5A80213825C000214040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80200001C018 31A01801805A3080200020060000060211460040000A0855004804144816D0650649724CC8C0061062061260008370060040 06206000000000000000000000FF954400060180B2410118016018298110218181A800009860060000020060060040000200 05064001E0400600600600720428C00600610C03E000026046006006006000000000000000000000FF3E7D0000018210A100 5881811C81C0D80A806001002040604600002200680600600020000541400440001E00F10620C000005C4584C5858C608448 F8468070A7116000000000000000000000FF09B61000A9801009C48800809801801C0080000400000060060108022461260000a14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600200400600 6000000000000000000000FF1ED3000000001801000801001801801801801800800000600600000600000600600000000400 4004004006006006006006006006006006004004006004004006006000000000000000000004FF020A000000001C01000801 001801801801801C008000006806000006000006004000001004004805005006806006006007006806806006806004806006 804006006000000000000000000000FF28AD100230001810240101811881C01A4B8018048000006006010026200006006000 40000400420400440604E00600600000000600E04E0040860861044040A6006000000000000000000000FFD5F300010004B800614040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000006A46004 006206887006006006006802802006804104006008003006006020000000000000000000FFBCB7000004000800C01001001C 81C01800801A0180002020062A080A000086004000A00084A8600601484680600608600E096052802006E240060260000020 06006000000000000000000000FFF8600000002002018018008019018018000018008000C16116540013006146C0E4005405 0E504104406014344006006940121202103006046005146442004006006000000000000000000004FFC7AD00000000000180 1800801801801800001901800000600600000200600600600000000400402400400400400608600C2040020020060060040000e14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180180180 B880801800000080700600004400600600400000000600400100600400400700600400400200200600600100680200000600 6000000000000000000000FF5AD8000000000800800000801801801A01821801820080200600180500100600400000000404 6000004007107806047801001006006406006080806006002806006040000000000000000000FF51DD000000000800900000 841841811B41801801800000E00600000400600620C00008010C0140A010D02E2A60060460A0028226087406006000086826 000006006000000000000000000000FF9CDE000000000800A01081001A01A03C00849800840000600600004A80002600600000114040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0A2C6206000 000000000000000000FF516A000084682D10A080400018218B5802081E018000026A4E10044E846807086001010084114000 20603480C206216406026A08080B0E242020026002102006026000000000000000000000FFF74E000200000800A00000001E 01801800001A0180008060060000060060060060000000040040000040040040060060060060000008060020000060028000 06006000000000000000000000FF2A89000204000800880081821821801A20809900800000611600100C0000660044000404 8620E000C8620400500680700540401200200600600080640B002006006000000000000000000000FF3ADB000000400E008000914040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000814000 010092000000002E0028040280120101000000210010200000000000000000000000FF942200008018621209600004007000 40C000000000000000000000000811000280000080001800000001001204008081C0500240001000018021000028408A0003 0000000000000000000000FF547F000014060804868071001801829821041002000000280602648621000E00400000000620 614031620400410E10640600601008080600201032E082002006806000000000000000000000FF7025000010250824CC4205 353A11A01CC1213B4B8000C8E106826886A96A0EC2C000400A06C06880904C04CC50B6086956C8E840A40006812800A1694A00514040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C10CB0CC0C00 C44C10800100200B42300309211308A00000111305312992302300320228340B2A302300A103303020083443202852812000 000000000000000000FFB6F900420020010030020622830835201601E2900000820808840809008200BC0000210F90C48810 040C00200020A00828808800B00D18C008400014408810C1004000000000000000000000FFFBC200000A0094210010018028 008809018808488000002AB240210212200200200000000201200008207A4820834922120024024320022020000020020430 27002000000000000000000000FFDFD8000000000488000100190000000400001020000038C040086220001010010000100000d14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A82A80000000 00000000000000FF626F000200220A30A00A30808D10B02B24A00A228000CA2002802842802802CC200080040344AC00AC28 3300280290200300210AA02C02812800802802012002002000000000000000000000FF70D900022420100124D28534224224 80090002100000810A44C308808008048080000008C9100800010900800804A048A1010C2494C8D4D4090080480488400400 4000000000000000000000FFAD6D00000200520B003053141801815AAD011821800008604600630600600604600009040648 600040E5165061060161460062142C4416016110006004034006006000000000000000000000FFCAC70020104A0880D50C8000314040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8200520280AA 82A82A80200C02082083202202002A82A82A92A82A8000000000000000000000FFD3DE00031035034034030024C24C0D4300 2002000000D300A8C00400D50D50830000001240C00C00010D30D51550108CC8C51140948B30AB0900550D51450550550000 000000000000000000FF1433000C044004004085024004000004004004000001001001001001001001000001000001001001 011010001001001411209801001011111001001001000800000000000000000000000000FF220200088808A0820940002000 0000000400008400000008880902082A82A80000000008000000000002002A82A8028A082A00000000000000002A82A8A20200b14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018019008008 40800000200210202200200200200000280208240002A04A00200200200200A01201210A0824000020020020020000000000 00000000000000FF5AF60000000CC0CC0E00900AA8AACAA95800000400003B02A83786402A82A82A80000002A83400002002 402A82A82A81000003403C02002200002A82A82A8AA82A8000000000000000000000FFF9B300084200201200002A08008040 00280001280000000A001210A80000004800010000880D00032C000000000142000008020820000000000300000008080000 0000000000000000000000FF97E10000B00880880820200AA0AA0AA00200012800002202A82000902A82A82A80000012A82000714040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF5180400400C00C00C30C00800810800C00800800840000300244310300300240200100301302300108240311 3003143443003003013002002881003003003003000000000000000000000000FF9ED5080001909895801001801001141001 801801800009600610600603600600610000C0040041000060A600608640601640402600640600E00050E00E016006000000 000000000000000000FF784E00024422422320542A00040020042420030C000081080480089480080080000080400504C800 884880804805005354CA48C4840840808800804800804004000000000000000000000000FFC7A3000090800800808800A01800f14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (490000080000 000010200100010108120030000088000108000000000000000000000000FF1BAC0000000800820000000000100A00000010 0004000140004861000082040040000100080000800000200101202804002040000104000080000080080000000000000000 00000000000000FFE299080000800808029800C00410440000800800840010201A0220420220023021800020020020000002 0208200202208A002450002002002080282042602042110000000000000000000000FF27AD400C0040840140040000000000 040000000000000810100010010014000000010010010210010800810010410011210010210010000000010010014090050000094040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180184490 0000601604240610C00604600000600604000030600010600600600620400C04201014200004612E10601608800000000000 0000000000FF907A000801811000821003819805893801961802846001E7E600204606405E1066000040041A600001608022 E08618E21601800402032200808202600609E106000080000000000000000000FFEA8000000192100080D0258058119258D4 001800008054600600210600000600610000600600605000610022E1060162060004C60082200090C8006006406046000080 000000000000000000FF23D0000800148040012040004004008154080040090022000002048011002004000000000000005000894040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFEAD0000000881888AB1A8391184180188700799A80002AE2AE37A22E0062AE00600000041010000050230221E2AE 2AE3CE34A2362322A84120002AE0340062AE2A8000000000000000000000FF97EB2002008458008018498918019258418018 01800000600610208648600620C00000222202A8002C20220460060060060020860080001088000064024CE0060000000000 00000000000000FF279B00000181104281200084592D809810929820800000600600200604C00614600000410C3000000161 0810600600602614400C08200224200000610C006006000000000000000000000000FF9BA8000001801020840001401C01C000494040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (440860060060 1600C084086006026802006546046006000000000000000000000000FF8CC5400401D35D491551058D190189594B95594180 0010655640044600655655600000655655600455455455655655614E0A041645655644E20455648640655655000000000000 0000000000FF42870000008A18A88828818038018CBC8982984480002AE2AE2022A64342AE10600000010021080204E20C22 62AE2AE2062062262262AE0860022AE0043172AF2A8000000000000000000000FF73E9000000A01A0080080180584B801E01 801813800022E0060AA10E4B400600200000200200200000600400600600620640E0C61040060040000060320D780780000000c94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801843800010 600600000604E00600600000000000000400000600600600645641404402600610EA04006048046006000000000000000000 000004FF686C000001843821A20A2080194B811821801908800000600610010E404006006000004004004000002002006006 006106104094116006006004006104006006000000000000000000000000FF4512000001A89A8DC88CD1003A01841A8B0AB8 00800022E2AE2282260862AE2AE0000042AC2AD8002AA2AA2AE2AE2AE0060202042062AE3270062AE20428EAAEAA80000000 00000000000004FFF398000C01C0DC0324124DA21A8DC01821881801800000600600001610400624E000006026026000004000294040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFBA7E0000890898808818008038298058190AB80080002AE2AE2B02AE0042AE0020000240040040002002062AE2AE2AE2 AE2340060860860860002AE0042AE2AE000000000000000000000000FFEEC300000500184800988504190180390180184580 0000600600000600600600600000445444C40400002600600600600608403640600600E00400644400600600000000000000 0000000000FF278500002102580202504891180395184380190980000060060100062CE00634C0003080801001400D008E00 6006006006014504056256226104006108006006000000000000000000000000FFD94500020100180200300D531801B4380100a94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600400600400 60B428E10A2B400400600E004006000000000000000000000004FF23020000890AB0AB8820058258D58418888AB90180002A E2AAAA82AE1462AE0AE0002842082882002AE28E2AE2AC2AE2AC2262AE2AE22622E0042AE2062AE2AE000000000000000000 000000FF92010011531150949488458C990188980495588D80005565515405565165545560004941544004A4504536556556 5565544C6404046222004104556346554556000000000000000000000000FF19848000050000008508219118019138008018 01800000600000000600E00640600001400400010000604600600600600400E006006086006400006056006006000000000000694040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (050000006000 00000601680614C0000B404E0CC10010E0868060040060054C200410E0060940008063060000060000000000000000000000 00FF5FCA0000018018008058818419018038040018280000006004800004D060050060000060040064040460300060000060 0000A0060260B6026204006046003006000000000000000000000004FFA43E0000E98AB88888911B8038238018440AB8D400 002AE2AC2A82AE4262AE2020002443C42440002062002AE2A82AE2AC1022AE2062163060062AE10E2AA2AE00000000000000 0000000000FF2E5E00000182102180408980585584194080182180000060020000060260040060000442000B000402C0060000e94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF A536804041801101800811801801805821011801000180700000000640700000600000400210400000402611600182641605 6106404084006100006046007006000000000000000000000000FFBB3D802001903081A00909801811801821001801006000 70C701000700680280600000400009C40000642680700641E28F10668600E08406600080702601F047000000000000000000 000000FFCCBA00000180B820801001801801801800401801040000E9010000A6116004006000006086006004204006007804 006080002044017006004005086886200007800000000000000000000000FF9096000803801843A410219118099518A8001800194040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20600C044002 012006082220000488202516000000000000000000000000FFB5C00000009018030208018018118038018038008000206047 0B000610600200E00000402408C02040640030E00600E0041040420A20062020003022020AA00E0800000000000000000000 00FF29240000018010218008818018018D18210A1801030000E8028000064960200C60000060020020005261100468840060 024322D640904200E101120000002287028000000400000000000000FF461980002181182180088180180180380120980102 0000E0060000A621680200600000608000240000600001600444600202A0062020000060800000802030460000000000000000994040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001083510000 081000481480001081001003000400400002280001103280A02301080A00802004400A0000000000000000000000000000FF C80B000000801820040803805801805815C05022800100E0010002062808208C400000600621604050E11000600400600020 249220004600A000020100012006100000000200000000000000FF49B0000000801805002801891801821841801810850040 60261400060120000160002060441440080460002460042160080100420A00062824A0502012522006050000000000000000 000000FF4F5000000080180000290388B80191180B94182A800006403C00021E00600000200020400622600800E00001610000594040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF653C 00000104108202100100405404000040000000010012808000001410080000000000A00A0000000108000880000000000000 000240000200110089028004000000000000000000000000FF1F8B0001C00008899400AA8020220000890408C88000552003 2AA0420122D22020004224025020022823022AA1822AA22244220219250201200048A08240A2AA0000000000000000000000 00FF2E9000002000404114800004010000200011580000012460000063442508068060004002304280000080880000040000 04000008000440208002020008400000000000000000000000000000FF97B580000A0D00040020001100081500422200440000d94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1222A3A22020 2222200028A20222A2AA000000000000000000000000FF477800080104100300100111000011200551000000010010110014 00081001400000100024024000028001004A0100480D080508420010200001148411015004000000000000000000000000FF DF7F1001518134011159558C9101089155555955800155604F557D56417547B56000556404404500556427D570575574A4CA E4564D6116556000C46446505D56000000000000000000000000FF579B00000A08A8A880A8AA8248D48408A880288A800000 22A22AA08A2425020AA00004A10A01228050224A2AA02B2AAAA200A0220020221220800021220A22AA00000000000000000000394040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000080000 0010000000000000000100230400468100000800040400841000000001000040000000000000000000000000000000FF4432 08004010021004220011000215000040005400010000A8800800011010148000000050040300000010800228800350080010 008080080200000000100800000000000000000000000000FF1AF40000020540A00000000401000020020000000000000400 0000001000008000000000000880000000A00010000008000000000A04100100000201280000000000000000000000000000 00FFB73480008C900852888CAA8038298058A88AA88080002AA0022AA2AA2222A22020002AA2922120002AA2022AA4822AA000b94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFF1776004 490002410010010001002000000000000000C00404040004800000000000000004000228005800894200000000041C040418 00004088000005805800000000000000000000000000FFB349002000800800A80800A00A80848A00800A0080400520A22020 0200221280290240200203000100248A00200200200280200250A02B082200002042422080002200000000000000000000FF B0F300000000022000800020000010000000020000004002080300001000008008000000000000008800005000000008808A 0288820000800000000000000000000000000000000000000000FFECC201022000000000020000000000000000412000000000794040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (228A0A288200 0000802042000000002000000000000000000000FF7404000200000000200100200400000210000000004000100000100000 0000100000000110000031000800000080A00820000004000000000090000800000800000000000000000000000000FFF8E6 010016800800A08880800E00E00A08804D00802000200206300280201208300200208A60000009259A95A41A2AA02208208A 08208200200007A00301A000002000000000000000000000FFE871004001001801889C018018019518018018218041837956 40F006106416006106206004030000CA45164C600600608608608C516056106400006046446100006400000000000000000000f94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006206016006 00800000650600800050211400E0000840140061082AA00A00400054600600C080006000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF6B7300000000100000000000000000040100120000008000000000 00004004000000004000000000001000000000805004000004000000000000000800801000000000000000000000000000FF 67CD000401800801409001A00800A00800800800800000200200200200200200280200200200030008200220200212A0020A00054040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (EB4000004000 7851938001899A458604050280098200204216006206006016226200006004028000C280010068060840E44067B82FA12B54 0400C85226108080004000000000000000000000FF9C31080000001A19850001901C01848807800801800098C08E02700622 600600E00000600600000000060410E004000140107400002042000000006486004000006000000000000000000000FF3CC4 100005005801A00005821809810801831A55820021449692600622605642540041685454000105280040708000C404856044 802D021200810060C6104000006000000000000000000000FFA6B1000001001803800001811801000011101881804004400600854040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00680E106C00 81490E120021104000000000000000000000FFD3D80000008091154028A3803421A01811C00A01800000788600600600600F 88604780E40200000020280E00608100082020030E036096427008405006008008004000000000000000000000FF03F30004 11C41883A0000980100000080180030980008040060058060060060028A600F8480003110108088062060270060048069068 0680400801288600C010086000000000000000000000FF3ADE000005801A03800005841010A01A098808C580200260071040 0601604E00600640E5523000002821143068820164160AC002006A86924080242006904000006000000000000000000000FF00454040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1601E18E0824 060002741D0014A04096806080542002280EB82A60B609407C006016017008006000000000000000000004FFE14E00222100 1E01001001801895811C018000018020106446004806046006006006000C060002004421060065060060072861044AC0A490 4200004006842008004000000000000000000000FF38FF000001021801501001811C15801801800B01000010E00600400600 400600600610004790000401680681600004600608600008400400400480600E024020806000000000000000000000FF360D 000050A0D8410128B3803009840C0DA00011800008C09600600600618608611E08639008051106400700EC868000180E000600c54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000421021891 2808038058118818018240018000106006004006006426006015D0010000028008040800688682E31604610408FAB6006404 084406082440004000000000000000000000FF2FEB002031201881010801901C80C01805820A01800048E036804006022006 40600400100100820414480410640004692600E00100400C006205000017053000004000000000000000000004FFB33C0004 008018010319018018018828058A00A18001A3589682614600400E28600600010480000010020608600680612600C0408062 06204004805A06202A00004000000000000000000000FFE968000010C01B014018E191180100A8418808398020024286026000254040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0600602410E0 0710C846026000000000000000000000FF8EC9200400803832100821805A05201811884000A0801020060070060062062000 0854110502408088E00600611601689443100010852E006400006406806286006000000000000000000000FFB8C9000441A1 1F21208029801A13300C098800008000605006006006002006002004000624020400004816106426486C0600C00000600660 6000005006062080004000000000000000000000FF68D600000380B803040001A11814921841808F01808080600600695608 6006A0642402191C8C001500CC17087A0870600628180801440441602400840740A400024000000000000000000000FF488600a54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (608644000000 008000004000600400E2344060440A044800400600A004006006006006006000000000000000000000FFCBD7000000801000 0008018018010018018000008000002006004006006006006000000000004004006006006006006004000000000006006004 006006004006006000000000000000000004FF9075000000801000C00801A018014018018000008000003006004006006006 002000000000000001007006006002006804004004004006006004007006006006006000000000000000000000FF7C992000 02A21A0001080D801C01021A01848200A0008020060060061060468060200000340840040064060068260C6004100108000000654040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008018008819 01A03A01009801800085804004644602408640E146452D204000020060454C650450608C80601088088108008600A0048060 06804806006000000000000000000000FF749E000180A01A009E9B01C03C01801A03800001800008600600C0860362060008 A0000000082000006404026804B0200488480400C006082000806006804806006000000000000000000000FFEDD100000080 1841401801805801045845800201802010612645600640640E00254848020251450C04715052600405631000008010C00690 2004007006006006006000000000000000000004FFF62A00000080180100980180180180180180008180000064160060860400e54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00000600600 6006006000000000000000000000FF38B8000001801A0080080180B801009809800C01000000600600408620600600200000 60070000004860044070010060130A6A870A6886002000106006006006006000000000000000000000FFCFCC000200801810 200901801C01C01801800A03802004744602600600E0C6254540406004002021846D42086006004006006006803006006000 006006006006006000000000000000000000FF354E000000801A10000C818118018018118048C1802000622E00600620A09E A2420829628400C2A80260EA28E2260882AE046EAE0C200600E000107006006006006000000000000000000000FF2C55000400154040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80000092712F 22A800106A44C16CA08505494C5335204826A00801036086A0F046A06000000000000000000000FFC9FE0000C3E01C0D0088 05803805955C31800A30800008204608E22600600644C050006200880200A361020870161040048080008002870500082864 1604600608E000000000000000000000FF6C91000201A0180120080180180180180180080080018020060078060040060040 00006000000000006006006002000004000000000006800000006006006006006000000000000000000000FF583F00040180 1840280801801C014458418028A1800000710644400600200E80600000E00640200000640400689C8460020420020020070000954040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000104401000 00021A801A08181000000000200010081461161000081060105000000100010001004A442424430C40400002800000938002 0100000000000000000000000000FF48BF00008402010001A100040050000184000020000000100000102008000000000006 0400000000888601608040000000130000101600000000000808248041200000000000000000000000FF3298000013019881 08080998180100182191880000000908860260060044860004304062060820000460840160A41048C0008040200026000000 016006106006106000000000000000000000FF23EE000209AA9AA1B044A9AC1A81A01A83A88A848000A0848684680EB1688600554040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (406806056096 10E000000000000000000000FFC840000540CD2CC0C10C80D40C20C28D10D10D44800141200300A08302B40300243142344B 403000A5302220335350202B33320304200310300104B083503222402000000000000000000000FFD82400036038424E4002 432222002042002002460000C00C00890700A008008088008009E0010A01600800180E00800A088048B4804980A00800CC00 00810430C90000000000000000000000FF5CD30000018008309008A0800880852800800988800020A20200A00201A0022320 4008200A22A00102217200201A00A81248240204200250200822200240200200A000000000000000000000FF14730000080400d54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (202A00000000 02000A082A80202002002A02280400402800020802A8008000000000000000000000000000FFD3AE000000B44A20A00A00A0 4A10C00A14A00A208000923002043002842802852810803442002B0051200280290280A833002803402C02012800A0280282 2802002000000000000000000000FFF37400025520820A04A4012202822CA2A034A3040000C11004810804A9080090090080 910C004800024940804A1092088480D0848AC8AC824880834004B00004AB4000000000000000000000FF3C1800000B00180B AA5829801809903803801811800000640600640608608E11600008610408C00000648E10E00600640400415430450620400000354040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0880AA0AA028 0004AA0B000000002A82A82A82A82202A82002202A03200004800300002A82A80A00882003002302200A04002102A8848000 2A8000000000000000000000FF17EE00014024431430A35415401035254424030C0000900D50410D50C40D50D00C50D40A00 000B01290D48D50810D48D10CB0D40C008004509008005505488004D0000000000000000000000FF6A21000A004000000404 0000000444200040054800000000010000010010010411090010090010018810410010012114011090490010814010010800 00401001000000000000000000000000FF3AFD0008800000C00800AA08802000000000004800000102A8B802A80002A8200200b54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0400C8010000 00000000000000000000FF7681000040800800A2280080191084580180084280008028020020020420020021120020020003 0000A00200204200A03250241208A08A50000002A802CC2002000000000000000000000000FF70EA0002860AA2AA48C0AA4A AD001188AA88C08400012A92A82A92A81102A81302202B02000000004007182A80000000400400803202300100000C12A810 00002A8000000000000000000000FF22C8000A121080000200004004C2000010092000000022000102000008800005008000 80C80000020200000004A0000020000008110288080002349001000000000000000000000000000000FF18220002A80AA2AA00754040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100900100100 10111102A9001221201001101001501001001001081001000000000000000000000000FFAE2B400400800C40C00C00920C10 884820910800800141320308300200210210200200301300100100300300234315345350340B00B283011001043403003003 000000000000000000000000FFEBAE000001001901811801801001001001001801800000600604620640640600628E106104 0000000C40A642600E406106004106224006020080106106086006000000000000000000000000FFB5810000092000000004 002002235002002422100000000004804804A90800B108008088B5000800B448A4800B11320C80855040804800830C00C00000f54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (301480C80840 820000880D200100003000000000104100000000005401085400A01201502160300800000500080A03081200001000801000 00000000000000000000FFAD730000000000A000000000000C000000001801000001000002000040E4061044000060000000 000A00D022000001600C0045004C40004201000C0080000000000000000000000000000000FF8B820000008C0810800800C0 000141043018884080002022120920820C208200200A0924C200000000201208A0022A208208614A00E3C209800000264201 2002040000000000000000000000FFCCCA400C011004004684000A0584082000000000000100100100130011000000008000000d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00200000000 0000000000000000FF07A6000000004943041841C81803C11D55880025900002608640600600600008E20220620220000004 612E0261140060200800021000020C04000A6206046082420000000000000000000000FFBA06000800042080013002813913 801821801913844003608601600600601008638238600614000000400610404649619420434E2D461221000000E006126200 208000000000000000000000FF09DB00000010181000500D025821905801801801808000201608600602600020400200E046 00009230600600000608600420020E20014220009200E04600E206110000000000000000000000FF22B00008000800240280008d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000004086 002022146000007203206006000400006006006006000000000000000000000000FF3821000058090991A012AB0019C10419 018A800180002002AE3062AE1162AE02C0002B61140100002AA2062A83022062A6A2EA38A262AE3380002AE2AE0062AC2A80 00000000000000000000FF32A5200144044A0590100189184502180B80401580001440060060060460060040040064444408 0000200600004200E00600200210A006080800006006546004000000000000000000000000FFCD7B00000000805103380084 58099139418000A1800001600613600629600048600200E10A0903000040CE00608C14601408008000000200010000600600004d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180030181580 00018000114006006006006006036006000400400D0000400600400401611700400601400400090000400644600600000000 0000000000000000FF5BB1200124954111D55555801B54025835954115800045055655655644655600400654054A15028455 623655029440E22F4B00B60A0554450004554556556556550000000000000000000000FF35300000820A340380B0AB913A15 00BC418AC0D380002442AE22E2AE2262AE4860002A60440C00002AC32E2AA24A2A62203373212A62AE2200002AE2AE0962AE 2A8000000000000000000000FFC711000210000C4380180182DA01009901800041800010400600600608E00620E00400E00400cd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF3D43000003001A01841001D09800D25A238000038000116006006006296006004006008022310B040000C6 0020462043160401540480040C0804004006006006000000000000000000000004FF9E67000051800055A05A018458000098 91800001800000400600600604600628E00200010004000000421600401410E006C88A049000060102000060060060060000 00000000000000000000FF78000006818AA0818890AB101AAA1018018AA0A980002202AE2AE2AE0062AE1640022A02080010 042AE0062AC2840261220000042102AE3010042AE2AE2AE2AE2A8000000000000000000004FF7DC5000A00800041D41400A4002d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000A0060060 06006204444090044006006000006006006404006000000000000000000000FF261700008C0200A989102110188892180188 20AB80002222AE2AE2AE2AE2260842222A00040000020002AE2862CE2AE2062A02042A02060000027E62AE2AE20600000000 0000000000000000FF55A20000241020058010018018048018D1840001800011600600600600600643400E00000400000414 000600600600402600000C00802400000400C00600608E000000000000000000000000FF2E2D000001009801853092935840 915805808001800000200600600600608E0041060085500000002080060320460060960140A400409600000000600600604600ad4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021951C0A001 800001600600600600600E4A60160122040000060A200409610C0000A6084048104504006006002006004204006000000000 000000000004FF3F9F0000A10818C18AB0C18018AB0019518A00AB80000262AE2AE2AE2AE2262AE0562B22440000002822AC 30E2342AE02E0842040942AE0060042AA2AE2AC124006000000000000000000000FFF2F50001110159150C591580195380B8 03B4015480005465565565575574C601654354015400000441255644640655041045430044C03400600400E5565560D40060 00000000000000000000FF3CAA80000302980400180188180189580580000080001060060060060061060040020000940000006d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF6D5F00082181184180190193580111580580800180002B600600600700608E00440200A13600400212600624A1 040074B64C600434400E006002002806004124006000000000000000000000FF26B7000015921005000A038018038018D1C4 000080000068060060060068060060AE00000400600401200090400600000000C0B000610600600400600600440600600000 0000000000000004FF5AB20000918078980AB83D8558A98618018960AB80004162AE2AE2AEAAEA362AE506AA020400400024 22AA04632E2AE10401424040C2260060042AE2AE2AC01C006000000000000000000000FFA8D700082114184080104182B80100ed4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200710608690 100402009608A00622210010E20604480E006000000000000000000000FF137C900041000001011001801841801811808001 80200060060078070260044040032042062840200062013021230400312034172100064040800C6016006084006000000000 000000000000FF3E008028014001E0001401841807801C01C080018220007006006806807006086006A060540C40104062C7 020002F0E9A80C124620000600600003680E006094006000000000000000000000FF49DB002001A09C02840C01801891035A 01C00001820000700608E80611700608622A82A0060060050861040422008090060868800870260A60050032060470070060001d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4BA000599280 02600E0260068A60080160460060062860A80A640207000C0000060020080020060CA0000800260020162160000000000000 00000000FFBA900000010018800010238438D1001831820023800020E0863160060070224AE246AD40140240002060464084 4404E00648826002804E12208002000622200C006200000000000000000000FFDAFB800009101810840401801801025881C0 0000882008740610401600680400602601610601200000222C006006006235003103202A46000020C0740600400710E00000 0000000000000000FF5440880041011A0585100180190104B80180000080000060060040070CE00600620E806444442050C8009d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFBBC580000004400004200013404013400460000000000000000100018012284D000011055021050001021000003004 60D02A0008020006040100490000000508000000000000000000000000FF82B8000009001812050825803801851815C00202 80405264963060070070200A4202A8E08604E00050402C002000016226016110406206000140402206006006286000000000 000000000000FF0D830000000A194000380180995380180182000184800160060460160C60100060070060045040C8044004 0020140000160862240360560900000A0026420006006200000000000000000000FFE26800000102182200B00180982B00D9005d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00A2320AA202 02222B0022AA0020002C22AA84A0C22AA000000000000000000000FF3F6F00804200A04300300002A0010201104004B00000 0008000000008008090004008100000A04800A90280000080010810204100400001000000008000300000000000000000000 00000000FFBDCF0000C90148968800AB8540800400000AA8AA80002AA2AA2022AA2AB0124422AA8024020D21002020220022 0228825211A2A648A2AA4521000222AA4A04022AA000000000000000000000FF87FB00004210905000800000000C0000D000 1A0180000000000C00000060860000042460000400000A00802A80800060000000042000064880000000002080400000000000dd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A8208001AAA2 AA2AA2AA2AA2222AA0122A22AA2820002820222120A268A0122A32022022AA2820022032AA0022AA2AA00000000000000000 0000FF583D80080100000100100108000509400440040000000048048C100500110100800140000000400011108032008040 5081200104950000100000009004884008004000000000000000000000FF6F61880101D419010D1D5580115580B023555C05 8000557556557D575574C65571475465564140004062864C64A615444648E12448E5564562004D6556306557556000000000 000000000000FFCA3500008A8A08C08AA8AA8008A88009508AA8AA80002AA2AAA0A2AA2AA2421022AA0AA0AA30240024224A003d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFCC5401010020000040000000022000440000400000000000000000000000008000000000000000004100C8E804A0000001 000000401100000000000000000800000000000000000000000000FF81220080100440900280001340001340044005100000 0000000010008008880000B00080000205000100880800100404500009400C00000102000A80002480010000000000000000 00000000FFCC210801002080400002000000000000B00000040000000800000000000000000A010000000100020204000484 00000100010008010000020000001000100000000000000000000000000000FFD8BE8000328808128828AA9018AA9018018A00bd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (470040062850 860CD106806110C16D37107406006000000000000000000000FFB4BF00000100100000100000040000000000000200000000 04000044004005004000020028000001884B0152010000C050004840404820000089845A2480000480400000000000000000 0000FFE87600000080088AC00800840800800A0080080080004122030C221210308220A00200120200000050200200200300 203220202202210280208822A28A102402002000000000000000000000FFD4CF000000200600200000000000000000000000 0000021880C098A1800808000000080880000002000000000400000000080080290000000000000040000000000000000000007d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000200200 20020020020020028000AA1102A840200200200202000280208228E802002000806002802002002000000000000000000000 FF915C0000000004000050000002000000000000001200000000000540000150800000880000000000800000800800300880 000008000001000088000000000020000000000000000000000000FFB3A7010106000800802800800800804A008048048A00 01B0020022A20020AA0020020C00820882A81125DA5DA4022B208200208A08A14280200000244307A0228020000000000000 00000000FF879C000001801B15801801841841801801801801800045650634E49610610E416006080286000002505016006200fd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF9E CB000000805140801800801009000800801801008010410610E10600600E0060060001040000000060244042444260040804 8E090000006000286006026006006000000000000000000000FF6BF800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000600000000000000600000000000000000000000000000000000000 0000FF0730000000000001000001001000001200001001000000100000000000000080000400000400000100000080100000 7004004000004006000000001000000000000000000000000000000000FFDC5A000001001000A00800800A0080080080080000034040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (692E00200244 A100022000016026806026406000000000000000000000FF4A05000101808201A0980180B083881821881801000022F40680 EC0F10E1970860069016060100021006842402AA8268042D4E284800062000022C601722E20F906040000000000000000000 FF88750000039000B985380182110D9218C180180100008862A6806A0600600E40640601048401008300ED08024106A00A00 02C88280081F00A082006006416416006000000000000000000000FF84CD000012A11401C058008552018208819019050000 44E4460464160161060D61070000040001000920140C00100082D445004624410044E100016026006046206000000000000000834040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (007486006006 00631608603600100411040056808E81600E00E8103164880262060888808CF0B712704F026000000000000000000000FF7F 450000090000858018158414018018018000010000006006006406086406006006140504200010002A8A026C07C10280C460 0224700E043000006006006017086020000000000000000000FF624E00004000300280180182020100380183000000000078 06004006806006006016020904480409A0002610A20020048F0820000068A882000100600608704600600000000000000000 0000FF8FA200001190300082180180000180180180010400810060061241060060072362860080040080001040469060040100434040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFF8B100 0021011000E1581B801801051801990015840010668600620600618699708608000600020400400210700560044200070C08 808640C00420600648EC06006000000000000000000004FF184C00004040300900180180081188180100000080000060B600 4026016006806006000006010004A074444040041060160C401700CC8600E00040600710C006006000000000000000000000 FFD732000000803200001801800C01803801048040800000608600400600600688602600080600000400E844084814000006 00010E000347896084096946024006026000000000000000000000FF162400014800048180180B801061801801800021000000c34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C0C164C80807 404004046406805086126000000000000000000000FF8D130005502408000498018008018018458100008000047806005806 0064161060060005204084942042AC800002406206084314245C1631400584F817A26436006000000000000000000000FF2F FD000000884A10003801800C01849801800002800002600611402610E00600600600080000800524444448400702014E0B50 05000417104004106006204206006000000000000000000004FFBDB800040110100180180580380180188180000180002460 0629650610600644608608000600040202410280E20482608620C844D0000E0840060C62060060060860000000000000000000234040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060170460060 0600680600600600004420084680608001000000C041200006306004006014002080042000000000000000000000FF253700 00938440318018118018018018458100018000026006006006006C8E50600610734629028C89040E02E41720630610488802 020E84E00004E844432A48002000000000000000000000FF139D000000000A08185801801A01001801800001800000600600 600600608600600608080008000000C1061AE28604E04600440410000602400100662600E007006000000000000000000000 FFD29B000002612A22413809805811901B018120118400506056C0E92600600765600600080000002508090681640E1204A600a34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFA320000001 800001800801801801801801800001802000611600600600600600610605608608040440000200200E416026204004000006 006006006004002000000000000000000000000000FF88180000018018008010018018018018018000018000006006004006 006006006006006006000000000004004000000000004000000006006004004004002000002000000000000000000004FF06 A3000001C01800801001801801801A0180000180000060068060060068060060060060060000048000040048060060070048 04005006806005005004803001002000000000000000000000FF4DCA000041800402A498018018018018018020018000006000634040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AA44E0060060 200660C0000000002000000000000000000000FFCCE1000001C01A00801005801C0380180380000380000160070068070064 070168068064A6400804D00C04554001800006C0008808820608600400C002804000004000000000000000000000FF41F400 0001001809801229A01809801849A04201800020E2A6006806006086036806006886020804200C2419440602E00E04400500 4006006004206004864000000000000000000000000000FFC17F000001800410C00851811811801A118001518100C964460C 610655654E4462571060064480C080004AA060000C05110008B400880680604444448600200000400000000000000000000400e34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010640644700 6116046026000000800C07006400006840C0200280220000600082F423004000004000000000000000000000FF3486000001 80140080180180180B801801800001800000600602000600600600600780608600002910140600280600100720288708F000 086001006003000000004000000000000000000000FF6250000001A01000200803801801801803800003800080F006000007 0074078160060062062002804000034CF00000000000680AC46006806000006000004000002000000000000000000000FF43 E200000180100000080180181180190180402980A008600F0C00070AE00E20E22608F0062887F000000E20E00E286286026800134040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2300020D4318 82AB1300A09A81A44A01A88341800082609692700688600E0C680E087246000C404808448C0808028800020AA5294C089468 10A5294AB04200A04000000000000000000000FF2FFA000121900030000423C05C15801CA1C204038000286A0621622EA26A 4621620600610E00001003031121420640023000C00802188620604008220204C090084000000000000000000000FF6F2D00 0001A00000800001801801801801800001800000600600600600600600600600600600000000000400000600600600400000 0006006000002800000000000000000000000000000000FFAA840000014014000018018118018018C180610180000060060400934040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600204204000 2002040400000000000000000000000000FF701700000002010044800194B800033900011841800000000000422018002009 850659020000050804000000000031600000440447400E080020800000100208880000000000000000000000FFDAF3000080 0800640101A00000420040000201800001600008008000000E08800050800408000002488400090100006000831020080197 220012400410288000100000000000000000000000FFFC7C000027051A1A0010008018018008019C003180000B6886026006 02604600600600602600002022008404464080E54040020020800000600038200A404000004000000000000000000000FFC500534040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08602608E086 08640E00021040000E00E146804106004154204116026010406054026400546000000000000000000000FF6A15000430C0AD 20D48C42D40C00C04C08D04C3080002022032A3002003C0280322A40B002001100031223043202093422B4A4030AB0021030 218C3C0330A001002000000000000000000000FF079F0402102092811842002042882002B020C2020000800A00A808092008 01320A08000890000810810840A00801020821148904900A009008080692E0830880640000000000000000000000FF89DD00 01489048000218468008008408008008008000102C0255640300200300200300200200020000023A02A00B00020B0020DA0000d34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08800880A00A A0AA0A80040AA08008A0A80000000AA82002A82A82A82A82A8000080000000040200200280888B803B00202302A88400002A 82A83802A82A8000000000000000000000FF4292000204A44A04A00A00A02A44A00A20A00A02800081200280300280280280 2802802C0200080140080210A84204202280A80A90A802402800802802803000802000000000000000000000FFECDD000228 20120920120020030820020A2402000000B450048AD004804004004800004834000C010D08C8820810204808004D05004800 954880000004835000804000000000000000000000FF79F90400858C100D005101805841851881851901800010E00601440600334040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800002000000 220000000000000000000000000000FFC9D00000080880000AA0AC0A00AA0A40020880A800002A8AA82A8AA82A82A82A82A8 0002200002002C84A02080014A82483402C04802A82000002A82A82A82A82A8000000000000000000000FFD1910002143503 083543543501303543403523500000CD0550CD0D50550D51550D50800A88000C00A90D50520C81350410C40A88C40D302909 00D50D50810D50D50000000000000000000000FF6180000C0444050040040040000040043044440200010000010000000010 01001001001110001001001009941520001081009001029001101401001000001000000000000000000000000000FF13890000b34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008048008010 10000A0142CB00C0CA40004C0CD308810C0800884800800800004804000000000000000000000000FF5D87000032810B0480 0840800801814808820840800000280200280200200200200200200200000010204A08208AC4202200203201204201200000 2002802002002000000000000000000000FFBAD20001400860740AA0800944AA89010088A08200002A82A82A82A92A82A82A 82A80002A00000000000000200100880800002102002882702002A82A92A82A82A8000000000000000000000FF93A30008C0 002022000000004400000014000002000000080000000100000000000000002000000000000100804800104000004008000000734040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (504420400000 00001400002000400000010010010050010010890004C1241000001001200021018641041001421141000001000001001001 189001000000000000000000000000FF6585400400C00C00C00840800800900800808800800100322300300300300B082103 01302A541003302343002113003523143403402003442803123003043003002000000000000000000000FF1B7D0000018018 45801801801801001821801801800000E00600411648650620E00620620600002001401654600610C00400E00E0060460061 0000E22620E006006000000000000000000000FFAB8800030024000820020A2522002202C22002080000800004804004805000f34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (102284000880 06406000000000000000000000FFF87F0008000080800CC01008801000000002000000800201001004080000000004000001 001100000000000001300161000402804404460A04880502003202A0028000000000000000000000FF7AED00000100000400 0021801800081800003801800000C0000041100002004082260042040A00400901082800080563043000A000000600000008 8440220000000000000000000000000000FF91D6000000882854800800800C0A000C00808840800000262200200228200208 210212A02A2001001426020620A208042200A20A312022222080022142000002002000100000000000000000FF6385400C00000b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600400 000000000A00602640604C086088100026006000402012040006056000000000000000000000FF6AA8000001805101113041 849401801C01801805000000600600621600600600608400E0040000801302060060A2000304016212102006146100000100 400546016000080000000000000000FFB83D00080001380180103082100180882184B8CB010000600620E006006206086466 00C00410000000E00001E01400000028E10E40648000E400202042048006246000000000000000000000FFDD3D0000010010 4D821000901011810841815911000004450630E00600620008600610410400800000600404600000E0004A60060361200170008b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01C0A8058010 8180B88180100100000040060000060060060060060040040000100062060162440002061000022020060060001062460240 06046000000000000000000000FF6724200241A818018808AB8AA1918AB9418AA0AA00002AE2AE9002AE2AE2AC2AE2AE2AC2 AE000000004204216002088012324A30B202882AE00002018021C006206000000000000000000000FF019E000001851091A4 08018000438018B180100000000060060900060060060060060040040008400061440CE30804630200C00200A00000680010 8440104006106000000000000000000000FF558700013580502500D001801009801805800801000000600644600600600200004b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600602600600 6000000000000000000004FF45A9000C11841C40841801800A05801A01801000800000400601600600600600600600200600 100000210000645200620400E00600E006006800916446144006104000000000000000000000FF40A0000555325490941951 95480B94180D9551548000554556D4E556556556556556552556000004002044406108550140426C8688E516556404456096 514006294000000000000000000000FF5D3D000083A8B093C8C8AB8AB0218AB80B8AA0AB00002AE2AEC202AE2AE2AE2AE2AC 2AC2AC00002000424A3460862AE0A6220320A202AE2AE00044600E20400622E000000000000000000000FF287B400001809200cb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002112000320 00802600622200600C08E10440C04600610405601602E006136000000000000000000000FF03DA000001804841A0180B8008 45823811800000800000600600600600600600600600200200001000010644E2C020004C316054244026006C040162064860 06104000000000000000000004FF2BC3000201A4108C849841801889811A8580000180000060069160060060060060060060 0400080000004C00600E046104004504804006006004106136016006456000000000000000000000FF64280000AB88924488 38818ABA418818618AA0AB80002AE2AE2262AE2AE2AC2AE2AA2AE2AC0010000003141C60040882100300540CC2CE2AF004A2002b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180B80 182B822001800000600600600600600E00040605601000011005401600601624602400401611004600640001600400600600 0000000000000000000000FF85480000038040C38A98AB8A98358AB85588C0A980000042AE00E2AE2AE0042AE00222200000 000001420E2AE0462AE2A431400402428E2AE0000C60262062AE006000000000000000000000FF5AB1000001812821803801 8018018018A1820005800040400608400600602600601611242000000454410600610C00000402024C084006006004406486 106006404000000000000000000000FF2EF20000D18A080980180180489580181580200080000CE00644600600630E00632600ab4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2242AE2A8000 000000000000000000FF9C67000902089001001C00803941A0088180000380000B600648E0060060CE004026006022000000 32000E00620000000E0044040000060040040040C0084006228000000000000000000004FF52610001200880CB88D8AB8AD9 418C9801A880A380002AE2AE2242AE2AE0C62A808A2862200002002004062AE2A608E1064342A622428E2AE00422622C2AC2 AE2A8000000000000000000000FF2129000048041912935B54D51801B54801D30351800020655604655655640655531652E4 880004A60045265561083304C04240CC4A8556554106294210456556100000000000000000000000FF60F180001004180004006b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860B00042060 3408843040820600F41714000700000404400E056006000000000000000000000000FF7C990008D284002580080920B89581 101584200980000060060060060061360023260060140003100541240044460060CF04E1270D402600040011500C10400600 0000000000000000000000FF1D9E000001000400045A44041801A020A1D10445800000680608700600620680101611308400 0000086214004108001200304016000006002005026126014807000000000000000000000004FF915E00000508F088888881 2818218A510180049180002AE2AE33E2AE2AE4062AB0462223240000003041402AC0062AE41410420620028E2AA00430630400eb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (803801803801 800001804080600600080600602EB0000400641000841003222840425610000424000600602080220004600A04C004000000 000000000000000000FFF5A7800001905048801801E01801805801880401800000600700000600601600E086006014000208 140406002000020101022086006056006400006084006006000000000000000000000000FF422380080080040AC01D41A058 01C01801C80201804000705E000C1F00760710F286066C0460000001000644218612680140820E82600E0060010068C40070 07000000000000000000000000FF29F0000002800002201C00001801C00001C00001800100700600710790784740120B0030001b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000000 00000000000000FFDCC100000180C00C819841C01821AA9829801311800040640600620600E00E00E08E0040060002002160 C6006044100606002006200006022200012006002002180000000000000000000000FFBF7700000180204080148980180B80 180188B0A980802062460065061060862860162AC30634000050C0021FE00669E58608030612020600200208A0C402220A00 0000000000000000000000FF7CDB800001801082881A21803801A03883C40405800000E8C680800680700600522680702000 000000203420402204600500B0CE90A15010210002602220C004000040000000000000000000FF692F8000048820008008A1009b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008050000000 048840604004000600C006400000108080008288000000000000000000000000FF5623800020040010000024000094642014 00060000000000002000000000000003200002400000000280C8030020006008400006080026088080020228000020000000 000000000000000000FFE851000000808008801310A03815C048A1B05441800001200600E006006006200A052AC406400000 0060842C000041610600E08600805008208002202640E006000020000000000000000000FF9F79000000800100900C01C018 418C9815E3100381000061460064060160960938D60060460004004040100140000200061062565243000424000820860204005b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408C88008AA8 AA80002AAAAA222AAA2AA2AA2020AA0222220004001222A222242228AA220222AA2222AB1120800A213200A02A0000000000 00000000000000FF335901042909000804804000014022A0804002000000A000008800010000010110008800000004000084 208400000000C002800040C000040000080208211280000000000000000000000000FFF88000008009098191CC888AA82008 C9008AA8AA80002AA2AA1062AA2AA2AA0F2002B0219A0002624022123920020A828259A2AA32228A4220026024022A040200 0000000000000000000000FF6C4000000C00D0440C4001C018000018A020180180000040000CC0000000004088161560000000db4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF1DD1800000C0088482AC00EAA8358008548888AA80010022AA2322AB2AA2AA18200320221200020020208200 A4220AA4022022AA04228A22200022202200A202000000000000000000000000FFF0BE800A0B04001100020420000A40002A 400400000080080500C805004005081400C1100400010000C00100009004489000000000C0010440020100004C5080000000 000000000000000000FF5A179001038458C1103913955801501801D55D5580000D755744555655755644735624ECC4000110 52408E48E12E53400E5065571045565142024561260A602E000000000000000000000000FFF59A0000A0082822820CA8AAA9003b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200801800000 000000200B00200010000000000000000000000000000000000000000000FF16750000000000200000000100000000000002 000000000020000080000400800000C00000000110801EA86888004010000001000002000405000000010000000000000000 00000000000000FFD3440100004C00401000A400009422A01440020000001490008010000000000293208000300000000C00 302404002002501500014D00401080000003000200C8000000000000000000000000FFA2D610013201401400041000000010 00A004400000014000000880010008004000101500800001100082000801080001000000000000000002000900084800000000bb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5801801C0180 4001615632605654E0C712640604650640000100624600700603400690451701500E050001046D4541640601600000000000 0000000000FF83DB008000000040002000001001001001002001000044580400590000400000400508028000022040411053 800C084001C04800584C00000028004004804000004000000000000000000000FFAB2D000030100800A00C00800810C02800 800800802000A1120820322C204208240204348240000000200200200205200208201308A00203000102234220A402012000 000000000000000000FF500F0000000000002002000000000000000000000000420000440000008080040000000800000000007b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF9A4B000000000800800820808820800820800802800000A00200200200200200280A08208201008000284280200A 22800300A00200A802020280002002000802002000000000000000000000FFEA400080000000000000001000000000000024 0000000400000000100000000000000400200004288000000008000000800000000000010008300000010000000040000000 00000000000000FFA6B8000000000800804820880820800820800C02800002B00200200A00241A00300A42243A0080000025 BB5D200212A08200B10210B183000003002002003062002000000000000000000000FF406E000050101A01801801801811C000fb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000011171100 444C002001120000040115608204420402E000000000000000000000FF551E00000000900100100101580188980180800180 0024620610600E00620400600600000000000000602400400600601400008610000000001000602200410640600000000000 0000000000FF2796000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000006000000006000006000000000000000000000000000000000000000000FFF72D000000001200000000000000000000 001000000000100000000000000400000000000000000080000000080000680400480600400600080080080000000000000000074040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (810001808012 601710600610608402700602700C20040800600600F08E00700E3020460A200000020108E002024306036000000000000000 000000FFABD100000400D024001901841A018818418040098000206A6600E08C00E20420E006C87006100800906880000046 08E12442C086404026040008066823801006216000000000000000000000FFB6470A0080001041203801801A018018218000 01810010685601610411610441600694400600080080612461400600080001400104C2468000000068820040060060000000 00000000000000FFEE5C120490001200005801821801801821800011800000600700680600600404700600600A200408007000874040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF1D8400000000100D801941DC381980199B800403800000600610E0260AE00C08E00E027106A0050A1473AE4061D71860 604060465CE886458000806023248002006000000000000000000000FF091E00008402508180981000180180180380400180 000060C601600605601413600640C00510801000600600600700110008600081610600000304680340000200E00000000000 0000000000FF4059000308040301811849801801801801800401800000608708680600600602600610F10A00828002700221 200E200006102020822C00C00000007002124807006000000000000000000000FFC25000001000000180180085580181180100474040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (208600E03601 4A0600C0062284082A6006402506006000000000000000000004FF7763000010011801891801B01A01847C51801801800010 604610E01640E00441641E08484200024400F00600681700000260891060080600020480E51620E086006000000000000000 000004FF26DE000020020800D01801001801801801801805800000600680E006016406006046004000000000016024014807 046C0600402610400600000000E004010006816000000000000000000000FF6470000008000809801E01A05801801E418018 05800000780600602608600600600E0A401220000000622C00C806400006000000800C06000004006040094006006000000000c74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (838000107446 00683700600041602E80480E008045286206C0711604005600450080C0262D8005D0E90408200201E0000000000000000000 00FF3C6500004221080480180080182980DE95803801800000E026006086206002246006456421A0000080E84024C02F4162 9612404E20520E04000010784F842012006000000000000000000004FF3952000030020801809800881901851941801C0380 0000F00650680720620210622601614640000012604402C00701020600404809400620000C02620C00220200600000000000 0000000004FF9464000000001E01801801801881E09881801A018000016207A0680600600410600610C8822004000C6007C200274040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000004FF B067000003801801821801801801811A15A09801800001604600600680600620600081240620000409080684600400001610 400120000600C00500F044082006008000000000000000000000FFEF0B000041851835801C01801841805841A01C85810000 6006806146A060168560403400C601080042042E2068C701650603482E03444E526C8010601680200E000000000000000000 000000FFA02A0000002019A9801C0100181180190180DC01808000600600600600600800F01608409000000002698E016096 40600600C006024006000280006006042002006000000000000000000000FFB303000000031A01821801C01C01801831801800a74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (50004E000148 800206046004046016006006000000000000000000000004FF52D10000018018018018010018018018098019018000426006 42640648610604610C00404644004C20602E00E0C604E0060CC0060000060060000062060020060000000000000000000000 04FF939E00000180180180180180180180180180180180000060060060060060060060020020060000040000040040040000 06004000006006004004004004002006000000000000000000000004FFC221000001801A0180180180180180180180180180 000060068068060060068070020010060008000000000008060060060050060060060068040040070020060000000000000000674040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002A622626E1 CE2AE0A62CE02C2A42A620842820C02E0468AF2860A882600F004006046000006006800006000000000000000000000000FF B5DA000201801801809C01001A01C01A01901801900008600700E006106406006006A0680E04000400600400400504000600 0000006006004004806804004006800000000000000000000000FFAF390002018018C1A01829001801809A21889821800000 640608700600600E0268868448060B000401600418C00600E10208C08600600660400482680C800006800000000000000000 000000FFD234000001801B01801851001D51851941911851804009605611609605603650E02449651610000400700680601400e74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF84EF 000001801841801A80801951C41801800001804081701600648700700602680401481E000000004006026005046006002047 004400046000004406004806000000000000000000000000FF6ED60000018018018118008018018018019000018001086006 0260260060060070060040060002008040020028060008068028000040000260000060060040060000000000000000000000 00FF7DED000001801801901A00801801801801800401900000600680E8060874060068044060060400000048060060040400 04007001000006006000004006800006000000000000000000000000FFC6B7000001801801D01900801801C018898000898000174040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4C9080060060 0800200008E00601C0C6000000000000000000000000FF716F000431A25A81C918B592D8C9AC1C81A0A411800085710E8065 168870B708ECD490D40E000800804800C2884C4208081488008A6800A2288088E80E824206200000000000000000000000FF 2080020005801C2904580180180180182D880341800020600642E0060462062260040441260001002CC34510420600822420 40C001608E10A00022624680C12E120000000000000000000000FF5C71000001801801001A01E01801A01801800001800000 680600600680600780600400480600000080600180000680680000400600600780200000600600080600000000000000000000974040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200282208B00 200200200208200200000000234210212A40000304200208209200A000002002040806010000000000000000000000FF4A89 00010000182012400200010040000A001DA00001000000A000005A02A06010840244580000805240200404010260046A4027 0004064C0000220628020238880000000000000000000000FFCC8A00000E0020080003142002204000600000000001000080 009200000418088028400000000400298010008001206400000196578006230000000100100C000200000000000000000000 00FF733A00002184180589982982188588198188A009800000E0060068060060061060040140860001000040840B400490E100574040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFBC3C0001 21805805833815001881901801901A81800090640600600608640610600600600E00040081608E0AE406804426A0400604E0 1640601000608650E00E010000000000000000000000FFC9CD000402D40D00D00900E00A14840D40C40C0080000030020022 0240300B41382B51344200110950304340310A4830820A30CB303203153001A0B413042242820000000000000000000000FF 9AD10000403043802422802824001002003400000000100C08000C01000800830250908A20000811000800E00A10000A2100 0840000800100891410810C00800240000000000000000000000FF7BB1020001820800801C01808C1886080080080080002200d74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100100100080 1001001211011020800000000000000000000000FF8F3B0008000A80880800000AA0AA0AA0AA0A80AA00002A8AA82A82002A 81102A82A80001800000002A8A082002A8888280220088A282880000002A80802482102A8000000000000000000000FFAF5E 000400A00800A30D10A00A00C00A00A04C00800080200280308300320280280281300200081080210288280200282A802802 002802002801002C2A902802000000000000000000000000FFE2890000012022442032250010012014012000010000005004 80482C804935004000B20C2C00080000084084900022480008CC40880840000800000800844954000000000000000000000000374040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800080000000 0000000000100010100008081000010000B0000001100001000000000080010000000000000000000000000000FF01680000 000880000AA12A2AA0AA0AA0AA0AA0AA00002A82A8AA82A82A82A02A8AA82002080000082A80084802A80A80103284A83202 A80000002A80000802882A8000000000000000000000FF03030002003501522322841543543543543543540000550550550C 28D50A20D50D50CD0A40000000D504C0C50D50350C00D50D50448D50000800D50C28C80B41550000000000000000000000FF 917F000C0042040040040000040000040040040000000000000000000010090000011290C00010000010010510002010010000b74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A86900020121 04004004412012002014002004010000804004804004804915000000808A0C000810000A8D088800224801128A4154482080 48010051008C4800004000000000000000000000FFB569000000820808000814800800800800804800800000280200280200 200200200234200200000000202202200280202A40200200A00200200000222200A132002000000000000000000000FFABE3 0000000861F60AA0800AA0AA4AA0AA0A80AA00012A92A82A92A92A82202A8AA80000A00000002A85402002A90887C0000088 0102890000002A81486402002A8000000000000000000000FFDC60000800004000100050200000000000000000000100100000774040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (63220222E000 00A482468002116000000000000000000000FFA632400C010004004005804404004404000004020001001001001201021001 509010031028001009021021001401230021208401040001401001001021001001000000000000000000000000FF9DCD4004 04800C10400C00C80C82C00D00814C04800100B24300B0430230030134424430524410090432030030034224434020C32020 1304B00100B4C3043013002000000000000000000000FF973400000180180402180180180180180188180180000060062863 062060260260060064060884202860340B604608401600E006006406004040306006016006006000000000000000000000FF00f74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2602600E0040 0408C00602000000400600008420600E08620E016040000000406080088406006000000000000000000000FFD01100080000 0120024004008080004000040008004000040000014008800000000001000000000800020008000000623002000600030602 02D0200048010120000080000000000000000000FFF04D000000001810000000100001040100003800000000000020012040 002012404C00820031004050400814822009620000004600000E00402028020000000C000000000000000000000000FF4725 000002800802020801820886810810888940800000A22208A00200200220220274201212020000224201240240000A012282000f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001801008 000803801801801801000801800000600600600600600600635601600600000008604600E4864060060880460AE0260B0000 0260A2008004006000000000000000000000FF627F0000018010000418018118518018058848018000006006106006116006 00400422601608800000402650E20400000602200000609602048000621244004608E080000000000000000000FF25610008 0180304000880D80382D81581308A80780C000640608600602600E0040060040060280101844062040840604460963884064 280040500060C0080306066000000000000000000000FFEB400000018050800130118058818018018308A981000060060061008f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AF0B64002060 A62042AD006000000000000000000000FFC62440000180100000180180180180180100100180000060060060060060060040 0610400600030000429449200420001010200008E027006200006004084007006000000000000000000000FFB2020002AB8A A0862AB0898AB8AB8AB8AB0A90AB80002AE2AE2AE2AE2AE2AE2AC4040042AE00000000421C2840660883C422028830628860 60000D66122742AC006000000000000000000000FF57FF200001800040001841801801801801005001800000600600600600 60060040064A400600080025410404400C04602C002006006000802A00416008104006806000000000000000000000FFB4C4004f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E2AE2AE23423 62AE00100422600E2242AC0C800020408820628E3210042AE2AE0062AC006000000000000000000004FF4F6C000A01800800 40084180180180180180180180000060060060060060060060CE0AC00600080010600610420E006006106006006006004804 086006105006006000000000000000000000FF883B0001559549545559539559559559559559558000556556556556556556 5565464465560000044D6046020556110546256350226516448004556556234556006000000000000000000000FFF6A40000 AB8AB0A80ABA8B8AB8AB8AB8AB0AB0AB80002AE2AE2AE2AE2AE2AE2AC0042042AE00000042C32424A0862AE2102284AE22E200cf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018048000D08 0180180180189182180180000060060060060060060C80A602C0060000820C80820C64CE0460D648444600600610C2060060 160B62C4006000000000000000000000FF8622000001800800001A0580180180180180180180000060060060060060060001 1611600600080408028210E00440048610C440026046888804006006106004806000000000000000000004FF2A2D00020180 1800201821801801801801004801800000600600600600600600600600600600048001604600400602604C04400609600600 0200006006456804006000000000000000000000FFE00A0004AB8AB8AA0AB0898AB8AB8AB8AB0A88AB80002AE2AE2AE2AE2A002f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620655602651 4126550000000000000000000000FFB4D8800001021801881801801801801801811801800000600600600600600001600600 4006000000008146006006206206056006006046026000006006006006000000000000000000000000FFC8390000AB8A9800 0030AB8AB8AB8AB82308B8AB80002AE2AE2AE2AE2AE2AE00010C0842AE00000001022E20600648E34404C08E2AE28E220000 2AE2862460042AE000000000000000000000FF27290000018018000018018018018018010018018000006006006006006006 20040640600600040420000601600420000002400000604600000400604600600C006000000000000000000000FF4810000000af4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2262AE2AE2AE 0000002202A45462AE0EE25620608E2AE2AE0060002AE2062262AE2A8000000000000000000000FF94260000018038018018 01801800801823842801800000600600600600600000620613600600020440000E0160000000040860000060060060040063 0E004416000000000000000000000004FF53380000AB88B8018258AB8AB8AA8AB8AB8A28AB80002AE2AE2AE2AE2AE2A82A62 AE2AE2AE0004802A020E00E2AE08E0863064AE2AE28E28E2042AE32E32E2AE2A8000000000000000000004FF0BA9001155D5 1801953955955955955911B11955800055655655655655655034E04E20455600010614054654635015040C20E55055653655006f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1881C0180180 1C21801C01A00601800100608600632680700700602610700600000D000024016CC84304060060800260AE206004C0644604 4006000000000000000000000000FF6C8B000800209801829801801801801801802001800080680600600600680608E00600 600600000008801414E00620614E006247006006436004006016104006000000000000000000000000FF5FE4000001825801 885801A01A01401C0185100180000060068060060060070070060040060003048000042060000008048D6000006006106404 0060A6016007000000000000000000000004FF18AD0000AAC818018118AB8AB8AB8AB8ABC810AB80002AE2AE2AE2AE2AE2AE00ef4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (14E006006086 040020000400000000000000FFB94C8000108019418018018018008018018008018000806806006487006504086006084884 01010880820412E4460082174561000262C00060900A6406006006000000000000000000000000FF0CC58000016018218018 01E01801C01801E01801800000F00792F80748E2B410780723600600840009000604600000100D2AE0204062060061000060 0E207806000000000000000000000000FF84DF800001A01801801801C01A21C01C01C01C01800080E806E2E01F08E82D61F0 0602E15E50036108050650700620680708662701E00600601134602E226007000000000000000000000000FF0D4B00041180001f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060460460100 001004000464A028002405600000601040614800622E006004000240000000000000000000FF06B600000180188180180D80 1805021881801021848010600E00600600600400600600608600000000020200600600000440600000650620600801620600 6504000200000000000000000000FFC5B8000001C0180988982380980B801809A21003800008610618604640600600604640 606658800000014242E1B60C602608608642609640602000602E00E204000000000000000000000000FFB246000301803801 A45801801D00D13A01909A01820000600600600600680480600F024006000102100004106400406C9422E04620622800E082009f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000021 8000000518000000000000000000000224000000400414000200000000000028246050000206000006000000000000400510 000000000000000000000000FF0F7680002800000000000000011200000040200000000000000000000000900000001500C0 000080000148000280006480000046000026000400000000108040000000000000000000000000FFE0D80001012058018D58 41811D10011809D20801800000601600600600600400600E0041041000800000001160000064941061464460200160001260 06016006020000000200000000000000FFEBF7000000C0191180181180180092590181084580800060061060060060040060005f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (565565568000 00000000000000000000FF21F50000A8AAA8AA8AAAAA8AA8888AA8AAAA08AA80002AAAAA2AA2AA2AA0922AA2AA20A0220000 008002222AA14208A02A2AA0AB2AA2CB2AA0002AA2AA082002000000000000000000000000FF379F08000200000000100000 0012400000042400000100000100080080100000080000100000008000008000052800000000000000000000400100000000 1000000000000000000000000000FFBBA0000006CAA8AA8AA8AB8AAC448AA8AAA848AA80002AA2AA2AA2AA2AA0022AA2AA04 25020005000003022AA4120885022AA08A2AA28A2AA4002AA2AA422542000000000000000000000000FFDC8E00010000180000df4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000008000 0008800028440000800000000041000000000000000000000000000000000000000000FF6EFC800040EAA8AA8AA8AA8AA880 8AA8AA800CAA80012AA2AA2AA2AB2AB233AAB2AA2AB2AA0002000002222AA00208A2AA2AA08BAAA28A2AA001AAA2AA2AA2AA 000000000000000000000000FFA5FB000C002000010012014014002010012104010001004805005005005421005004101010 000000800010004000444000004400804000804001004004050811000000000000000000000000FFE624000289955D55D55D 55F55F21D55D55C919558000557557557556556546D5655655655600020000044F5560063545575565565565575564005575003f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006002003002 006000020000050200000000220000400000001800000000000200008100000020800010820100C000000004000004004000 00000000000000000000FFE74F00000000022C20001000001000020000011000000000005000800000001008008400008004 02028468691200000C40000100040240020002000800000040000000000000000000000000FFF2C108011200020000020040 004A200000042000000080080000100100009000080000080000000000008000028000000000024000000000020000100000 0000000000000000000000000000FF83FB00002000000020000000020000020031020000000000008000000010000000000000bf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200200200000 0000000000000000FF13E8000450001E09601801801801945941801A13800000610444600600600620740E00640740600252 602E20628604541640735610690622C002457206006406C46000000000000000000000FF949E008000081041001001009021 0090010000010000054C04004101C4400180400D2002800440E0214C0C11008000404C3288008406000040A1804004004004 024000000000000000000000FF9BFA000248000800800800800C00C249208008108000002102222002002002002212002202 24202050200280200204240AA8232210200280A000452002002002042000000000000000000000FF469F0000000000000000007f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000800006000000006000806000000000000000000000000000000000000000000FFF107000000000C00800810800808A008 00800C88800000200280200200200200210200208200240200280A04A4022282220020020220020020020028060020260020 00000000000000000000FFA3C700800000000140000000000020000000000000400101044808000000100C0840A500000401 40040A000001400800084300A8000200000140000000000001020000000000000000000000FF93F600000010080480080081 0840810800800800802000B88300200200300A03A0B200A40202200043A842DA22222AA00200202A00205A0020000030020000ff4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5821881C01B0 0013800004600651680E00600440600680600C00E4B00060064800022004C6B460008C60210024A1006146106C2600600000 0000000000000000FFE9C9000002005809801801801801809801800001800010602600620600600401640600444400600020 602600004204600600642640E000042010006006046006006000000000000000000000FF2796000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000006000000006000006000000000000000000 000000000000000000000000FF8ACB00000000000000000000000000000000100000000008040008000008040008008040040000c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000000 000000000000FF5EAD000000401800C01801843801811801801001800008600008600E00600400720602420C016348407007 A460020060462044062140000022C0006006007006006000000000000000000000FF66CC008212005808C01945C818058A18 3188504F800012601651602640600420F0060460240060004060A64400260268060B60260360068321082060AE2860060060 00000000000000000000FF83AD0002000038008838018018218418418010018000006626A0E2460060040060060460048060 00006F1E8C0002200A860060180861A601A000406016426226006000000000000000000000FFEBA4010000401801905801920080c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8400E0060142 440001060064000068060A000404608600610788E000000000000000000000FFB37C018010485907C03945C4B86980781181 141D80600069914071048060441060269C6004CAE02082E1275862363E605E5600464040660A60000260C610600608E00000 0000000000000000FFC77300010000184181380180B901E0180182104180000D600001600520600402610700628508E04134 684E046086408206010000030806216080806006006006006000000000000000000000FFD988000082001920809C09E41881 881E43850001800003744000688600603612608600448EA0628008709600E08A0104A62844204240002020018060470860860040c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801A01801801 8000906047A07807806004007A16006144027808086C26806C0484688620480610000E002004236006006006046000000000 000000000004FFC2D0000020001819019801A01841821A0181182580000160271461060060048661460040A4006504016006 A0627C0206260010A801800680206400E1B6026066026000000000000000000004FF31E1000042003801001A05801801821A 09C00821800000640700620600604600600740600600600400610650400000602708E2CF0060060402000060468260060060 00000000000000000000FFEF39000004301801201809801813881845802A018000006446906806006016006026006016046400c0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF2C77000000001881829805C01841C09811C01801880010622608E8060060810060872048A100640438696620E8 A6200006DA022192100780400440E007207007026000000000000000000000FF6F7B000000003E4180581184584994594592 0E21800045600E00600650602200600602621290640C00E816144802016B3600600608E00610600F40608E00600609600000 0000000000000004FF79A4000002403801801C01805801C01801C0880580010164065264860060220062B6A0680202610C01 6206104003000086016A0100681604420502600E807007006000000000000000000004FF26B1000000201801601A01805E010020c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600300400680 6806004006804006006804006001004004806000000000000000000004FF8080200001A03800001805801809841800841825 800040600682600600600280608680720608000680685608E846000107046800124026006004006000004000056000000000 000000000000FF5B0F200001A0184004D81184380190D94190180188010D64061060063060C0800806C2404E02044C516006 C26306A0E80E10E446414007086808236110804004906000000000000000000000FF6A5A000000001D01801803801841C018 1D801803800108605403600600600000600600490003E02100600600620600644600C186204026006000026006406006006000a0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4D9458459001 5460CE0B691614E103090512046D0402600401704D5160448000460224009050060060040470010060060060000000000000 00000004FF804B00000000181000180180180180190180180180400064060064460060242000422060240062342862040060 0032E10208A006024006046004206000004004006000000000000000000004FF529800000180180000180180180180180080 1801800000600600600600600600600600600600000400600600400600000600400000400600600400600000400000600000 0000000000000004FF712C000001801C00001801801801C018018018018000006006006806006006002806006006000004000060c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF400C000000801C000018118018018018098C1821882100629E0AE16629F4202AE02F2A520602D23804F2AE0AE02684 60A40A6A0F080846076008024010004004046000000000000000000000FFE4A2000001001800209801811801811801D05881 814000630600620600610E00A10F0060048072A480612C4CC00491000604081044680608600402400088E006006000000000 000000000000FF177F00000120184A281821881801C2B8238038018000026826006286426884042284104004816004886104 044004006006008816006006006014006000004004006000000000000000000000FF629C000000001C04101841905801855800e0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800002006000 004006000006006002004000004004006000000000000000000000FFD3150000010018400018018058018019008418058000 50620E006897006A0280E00600694480400042682C40E00455680680280604280002E00140400800E0020060000000000000 00000000FF88AC00000100180060180180180180180090180180000060860070260070020000060060050040280071008060 00021003002001400000086001004000006002026000000000000000000000FF7318000000801800011809809801A09801A4 590180A0007006006C0600E109807116005006004500006006D46006088004046008022026006000024800104005006000000010c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (980180000460 0C00640608600010810000414421C0408160040180940065042200464061008A600002400800602E12600000000000000000 0000FFA4AC000241281908501C8980B889D03A2BC21B218000346D0D1074172D6D048C0822C0CAA4CB4800006A088208800B 0940A10840CD680028682080C108806A06086000000000000000000000FFAC24020080C2182402180180180381188190B80B 800001780642E106006040216A0E02601600443203608609002680000C0C409080210E04E0100242003560AE836000000000 000000000000FFA38100000080180000180180180180180180180180000060060060068060040060060060060060020060020090c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF8147000000A80800000808A0880A80088885080080008220020022020021C220240200A08202202000A14210200280802A 40A102102002302000040080322012402000000000000000000000FF5C6B0000004004822800402104001080010802280000 2080C0E080C06000208A121C520209004208000000080040C9600409048E0504860080084000010800000080000000000000 00000000FFD4D600000000000402000020260000000010040000008000000900000280000000000400201804100200004600 209460901000062A8006400020000000448301800000000000000000000000FF98FB0000A1001800001981801811801901820050c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10405000890C 208B0800814902004000800001004000000000000000000000FF998B00002100180200182181180190180181180180000064 262162260060C600600620610601641080E8A60AE14600C00654610610610652604082601040609650600000000000000000 0000FF4C2E000400A00820500D00800A10C00D12D40840800044300300300340320BAA3B13143423503021003003203012D4 334B00B423453403003011402C010A3802002000000000000000000000FF4B7F0200410200681004000000802822362020C2 0000C80E00020808800E10440020A00C00400800800A8880090002084084082080080884085100961000088088000000000000d0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100100000 1001001001000001801001001201001001009048C21001101021041000101401001000001001000000000000000000000000 FF03190008000AA08C0AA0AA0AA0AA0AA0AA0A80AA00002A80002A82002A84802A82A80800002A80002A82A8B002300A82A8 2000C82002A80200002A82A82A8AA82A8000000000000000000000FF7980000000A00A42400C00800800C00C00C00A008001 0028B2803103002A02802802002C0280280080280202A802003002842802802802B028008028010020028020000000000000 00000000FF9E030000010012002012012010014014002032010001004C0080482D004850000000C30948800C0200400090090030c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF52 9500080000000000000020040000000000020000000002D00000000000880000005200400002000000000000008200000080 01028000208000000000001001000000000000000000000000FFA1FA0000000AA0D24AA0AA2AA2AA4AA0AA0202AA00002A82 30AA82A82A83202A82A82A82282A80002A82A82A04008882A84104883002A82080002A82A92A82A82A800000000000000000 0000FF59C00000003543303543541541543543543541540000D50800D50D30D50840D51550809490D50800D50D50C28CC051 0D50D40D10500D30920900D50D50D50550550000000000000000000000FFFBCD00080000040000000020020000040000000000b0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400620640E48 400601600000E106026006006000000000000000000000FF84E000000000022520120120100120120124B201000100480080 100500491080080480508C800802800800894A40404804008820C0C840810802800800004804004000000000000000000000 FFA0D70000000008108008008008008008008808008000002092002002002002002002002002002200002002002002022002 B02402102002122000002002802002802000000000000000000000FF5DA20000006AA0800AA4AA0AA2AA0AA0AA5140AA0000 2A83202A82A82A82302A92A82A83202A80002A82A82201888882A80600880302892402002A82A82A82A82A800000000000000070c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02202211200A 28200212240248208200242801259204060214800210250204221200A000082012082002002000110000000000000000FF3E 68400C0040040440040040048040040040040002010016010210010000090011890090210290810092711480292010611800 61004001000001001001001105000000000000000000000000FFA1F3400400400C00C00C00C00D00C00C88C08C0082010030 0310300B28241342305344B1235530C100B00320A40342340B00200300A40314280110301310300300200000000000000000 0000FFB3EB00000004180102182180180580180180180180801460260364060260A611640608600E00621004630600602E0100f0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF499600 0000001801115831821811801821815821880013600640E00600608400402610620E00C30000000000441210612600640620 0090003040020014006006026000000000000000000000FF65090008001000220000001480080040400000C000000A804024 04080880080080400000082300000000000880000160402280260001060000200101002001104400A0000000000000000000 FF093200000000000200000000000200000000000001001000001082000205444942202400105044000200084C0000046210 40040E514006120000008110020080000000000000000000000000FF87AA00000002080182086080080080088880C80480000008c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (012006422000 0008000200060C6286006000000000000000000000FF62C4000014001000001801801801801801801801800000608E002006 00630E4064262C60861040000020C00460124061260A042608804600600030A000206026006000000000000000000000FFC2 1F00000008104402180180B801829801881809800000602600211615600600620621600604400000A2881460020200062020 40020406006000000004216116006140088000000000000000FFBAB20008000018010AB80990380182D80188990D88000060 0614648602609611618608E20640408000000001400A0106861561182042000000181B210418E006586000000000000000000088c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B62AC2AE2AE0 AE00602E0AE2860840002AE22622624648E32620808E20628E2AE00040E0022360462AE000000000000000000000FFCC2040 0000001A0080180180180180180980180180000068060040060062362B40260060060040000062260060160400AE00240088 E006006000006002006CA6006000000000000000000000FF99B80002800AB8018AB8AB8AB8AB8AB8AB8AB8AB80002AE2042A C2AE2AE4044FE5860062764660022AC2062062860A82163004880062C82A800210000600E40E2AE000000000000000000000 FFD485200040001801801801801801801801801801800000604400400600604400401601600E20C80000401608E04200600E0048c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF1C890000D0 0AB8008AB8AB8AB8AB8AB8058AB8AB80002AE2AE2AA2AE2AE0040062062AE2AE2250002AC2062242280880A63240C820028E 2AB0042AE0062AEA262AE000000000000000000004FF0CBB000804001A010018018018018018018018018000006006002006 006006104006206006016800004114094090046006046026154006002800027000107096006000000000000000000000FF17 60000504155C011559559559559558A19559558000556D5655255655610400649655655654E0045541145543245104064361 10C2055655240455600455700E556000000000000000000000FF9BE00000A80AB8008AB8AB8AB8AB8AB8AB8AB8AB80002AE200c8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001080262C60 0430E002006006006000000000000000000000FF4A7800000004182500180180180180180180180180000060060960060063 140140060060060820400A60040201160060060040060040060160840260A8006006006000000000000000000004FF3D0000 0004001C01001801801801801809801801800000600600600600651402E0C600600610300000601409010624000E00402000 0046006A04006000006086006000000000000000000004FF85AF000028001800801801801801801923801801800000600600 200600602628601600600600C0000041260040000064060942060D000600200400680200600E0060000000000000000000040028c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (65565562062D 655655455014810444E4A4506546110556414510544516242104104402556554556000000000000000000000FF318B800000 001801801801801801801800801801800000600410600600600400600600400001000010610C00E21604600600440600C006 0C200200600E006004006000000000000000000000FF9DC10000000858818AB8AB8AB8AB8AB8AB8AB8AB80002AE28E2262AE 2AE0040042AE2AE2AE00000020622E20823608E2AE0A40EE22028E0160000063122AE2AE2AE000000000000000000000FF9B 1400000000B811801801801801801801801801800000604600600600602434600600600624830400E086100006220006414400a8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE0000000AB8 968AB8AB8AB8AB8AB8AB8AB8AB80002AE2AC2462AE2AE2AE2AE2AE2AE2AC22601023422022610808E2AC30428E78428E2100 043861062AC2AC2AE000000000000000000004FF09BA000000001809001801801801801800801801800000609600E0060060 B600600600600020042008600C04C0062400060A400001404608000422C042004004006000000000000000000004FF6D6F00 00000AB8C10AB8AB8AB8AB8AB8AA8AB8AB80002AE2AC20E2AE2AE2AE2AE2AE2AE2AE3202802262242A402628E2AE24C0AE04 42AE2002042364262AC2AC2AE000000000000000000004FF9B790010001299459559559559559559541559558000556446540068c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (061600241900 7087006805006000000000000000000000FFBF41000000401801421E03A01C01881801803C01802100600508728700600600 7806806225026044814000044254409304400200026026206004904046806007806000000000000000000000FFA6E2000800 001801001801801A01801801801801800000600480E00600600400600600600408628A114108104020026804034046046006 14C402004316004006006000000000000000000000FFC6AF000000201848A01801801801A01A01C01C018001006804146006 80700680600600480500E00000500000E28040000408000001404600000402F046004804006000000000000000000004FFCE00e8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006006406 0044011042210B40260CE0022462C40B20561220800060401460420042A2A06210000000000000000000FF5E838000000018 01801803801A0180180180380181208060C680642681640E03740650C22640C0201140260B64560088844520000000102021 00086042004000006000000000000000000000FFA871800000001800801801E01801E01E01E01801808000602600E00602E0 2430E20624C006204001486406306086000006026130002007806080006086006006006000000000000000000000FF801580 0000401800C21C01C01A01A81C01A01C018001007104C0E047626C372471E7105016814019206A4601600626681E0160AE400018c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800180110 B8018018819118C5801901830000E00610600620600204600650650401408020010604000210004400010000600000401000 A024200002006000000000000000000000FFDB570000000018000439058018C5801803801811828000662404610600600600 60060840044440C0002086000182000006144000042106004000002004202006016400000000000000000000FF0BB2000008 00180002980380382388988182982980000060045A610620600612400624609426E008202006400102086406004486440266 02040800A0840A200400E000000000000000000000FF2F0E000000201809B01C81801801841841883B01800000E0060068960098c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04000040211A 0000022AA000000000000000000000FF3E7D00000000004000000000000000000200000000000004000000000000884B4000 10049420C000008200148000446010004046220026200080200500228480000000000000000000000000FFB0F38000000000 1400000000000000012000000000000001300000000002400000004480200A01200201280001100061001084060800060B00 00130020080050000000000000000000000000FFBED900000000181100180180380184180194B841800000602600600E0060 000042060040040842100A802408800222628401004E1064400260200C21061464C6206008000000000000000000FF53DA000058c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (565565565578 0444E0904C654E55605653455640C15652E55640620044624E486956556000000000000000000000FF9F850000000AA8828A A8AA8AA8AA8AA8808AAAAA8000AAA0822AB2AAAAB2022822AA28A4420220803225223023222AB28A2A22AA08228A10A00002 202200A3232AA000000000000000000000FFA4C0100000000029200200000400400400200000000000000000000000000100 10008005488804000080000000800000000A0201000000110000090100848200000000000000000000000000FF9763000000 0AA8C08AA8AA8AA8AA8AA8588AA8AA80002AA0522AA2AA2AA1420022AA00201250224028201224222208826222208A00A28A00d8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000A000000 0000002000000002000000000000000000000130000000000410008000000008000210000001000200010000020200000508 000020000000000000000000000000FF2BFA8800000AA8808AA8AAEAAEAA8AA8888AA8AA80002AA2AA2ABAAA2AA203AABAAA 2AA08322200022A2222224020AA2AB00208A22228A0CA00022200200A003AAA000000000000000000000FFD5580008000010 1120120140140140140240120100008044000048048050090510048410850104000100000100080048000140014300402041 000884012A5009004000000000000000000000FF086E000000555903555D55B55955D55955D55D55800155655755655755650038c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000A2B4A00A0 02002002000000000000000000FFB9350000000000000000000000000000000000000000800000000080000090010C008000 00000002020020800008000888020000220400900002000800080000000000000000000000000000FF742B00000040000400 200010000010000400400000000001000000100000000000000005000000004100002C840051000050001004044040000100 0040000000000000000000000000000000FFAC7C000000400020400400000000000024400000000080000080000100000000 00000010210805101001000900C02000002C8020100020400000090040540488000000000000000000000000FF22BE00000000b8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (30020E3D1A24 234058342A4DA0400020820032F24025D3002280003002002002002002000000000000000000FFE559004045805901805841 815004115941911901804024600604E10640615645625688C146004000046006057010114096D54507214206104000146554 916006006006000000000000000000FF9E330200000002080080010010002030000080010000804004005800004404004000 A048200A44A8000240700820004000005800244008004001800004088004000000000000000000000000FF48400020448048 808008208128021128C0908880802044200205200240222224302A11212200220000200282200010A80251228301200280200078c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010014002010 0020000100100000008000000000040010008000000040000040000040040000008068000040068040068000000000008000 00000000000000000000000000FF1772000000A00802800800880A0008080280280080000020020020020020020020020828 0250220000204A002000288082D06802026002002280802002002002002002000000000000000000FFFACA04000000001001 0000000200000000000000110050008044010040091080100140004000000800900010020080080000028080000020000000 1020110000000000000000000000000000FF9824000000800A00800C00C00800604800810800888128200222209220208A0000f8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280310002600 6004000000000000000000FF1858000001001001801101801800151801800001800002640E88E10600615600600620600600 44480840844064800A081613420010C30001002010210200014680E006000000000000000000FFDFCE088021001001081001 801800001809820001800008608600600E4060064060061000A62140000040240040000060060000C640001000001000202A 002406006006000000000000000000FF27960000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000006000000006000006000000000000000000000000000000000000000000FFD2FD00000100100004c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (140080020040 00C84404E08048020C02700040649020A001006482806006816004000000000000000000FF2B550000000000012000018018 00421801840401800000600600E00620624602708420110009004800C00400612000680480A0264922A10020200060028062 86016004000000000000000000FFFB5E0880210010058810818110040958598044D580009D63868D600E006086A072260160 3621410010413420221081610E8808C691084E1000080828EA480146006004000000000000000000FFB33300000100100100 1001801000209801200101800082600E00608600640E8465460808061042000948840060408A0006820A00800846808002000084c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0811B0092000 18008018018A2042680640E0000060060060040420C08C4206007A0020C94000040E00800010040604200600440811200780 D006000000000000000000FF29AC0000010210059A7007893094235853824191800110706F24601600701E40608411602129 03003043042060308161003CEA0680601653200018710F08E206026004000000000000000000FF8EC8000001001001A21001 A03000041883820045800000E10E00600610600600612400600840602040E02C026801300800C064214178C6002000807026 4064C6047004000000000000000000FFE3FB0000000000010000118018304019018000018A2140600700600F0870072060450044c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002016004006 000000000000000004FF5FD6000001801800801A01800A00609882883E03800000780600600080604EC06004012010004000 004046800040406804000A2E000216006400016003806006106006000000000000000004FFFA410000098418608218418008 4202583288184180006061868C60000061062261A4102008D845C04071200814800082181B008051810EBB620638E0C20862 16086006000000000000000004FF624E020008800808840801800802021820C0180180000060060860008064068A60248021 4000400002420610408000F406024086004006422010404500082506004006000000000000000000FF93A70000008408008000c4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0E0064000008 0800400804601400033E400806016000087007006006047606000000000000000000FF9DF40000018098138A1889C0804000 180082B803800120608708600008600E1060070320870AE4A404200080000042080000808088800789600400C08408610602 4006000000000000000000FFE46B000000800851010841882A2810584CE018818480096206016000C460260C629600380640 6200120D46024141C1620F8A4807A2489622E000007806012006006006000000000000000004FF1850020000840801000C41 A0080001591080582580008060060460000065370060070820A620002040228680442000100601025048028600600E0044240024c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00001200000 0018018000006006006000806806806806804806006800802801006002806006800006004806806000007000006004006004 000000000000000004FFC6B300000180184980184180500100104C0208438100012D060060000C40260460160440040D0004 080106006906209006016200804006204004116082892000006000000000000000000000FFD1B20000018119018519098090 48114000010809840012284608E000C00804906B0690480C20092082025604602E8064068C60460D488E1260000060020060 04007004000000000000000000FFDC1E000001801885901C01D008004098008059298000426026006000006016006006082100a4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060000000 00000000000000FF681E000001801840001911C15C51805854002D518280850326086500516055406526004C040244084048 508164840008460060A0004A07026006146010846004006006000000000000000004FFA5A700000180180000180180180082 180000080180404000164260400064041360064040B408C0400343000860442D600604600600604600600000600000600400 6004000000000000000004FFCEC0000001801801801801800001001000001801800000600600600000200600600600400600 0000002006006002000006000000004006004004006000002000006000000000000000000004FFAF63000001801801801C010064c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600840401205 6006080016006200156806046000007806046006046004000000000000000000FF0489000001801800001801801801800821 84040D8AA060322E2B652708E2002A606662F2AE62E43828420A10E20600602E4868AF406227826000006003506004006004 000000000000000000FF6B14000001801880001C01A00A01801800000901A24080B04634604100443650600E934154004084 48681685600410080E00040114C00604C004806006022096026002000000000000000000FF82E00000058018200018898088 01820A022028A1B000002006006000004006006286854004C8400010600008600028601612001600600600400082680C002000e4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008008018000 0180000020078060060060040060060060060040008040028068060060060000060020060060008060008040048060040000 00000000000000FF2B29000005801800001801804851A05811800201800005610620450740605601680E0210068004000541 4708614285600600680700000100E0009068062C6083006006000000000000000000FFFF86000001801800001E01A00E0180 0801E0040180002060460064060060158870062000CF20628010600000600300000720600120000000600000600280601000 6006000000000000000000FF0599000001801900001A01801801C01801820083842000E00612C0A7007422C0604708F004000014c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000000000 0000000000FF854A000161867800001801841835A0188180020180000060062042860062081262060203044040002240B600 6582016006200006210608406000006806006006006006000000000000000000FF1B76000285A83AA0229901A8CAA1922A81 A540958000843096B04A8680EA4028688E81690702C80884CC88C0E83200102ECB0820A0AA00C068002A630CC04C462B68C6 000000000000000000FFA79D000021821800001849821801809C01C00001800051640602600E04680C046406B2024D004000 B040220A6A824A03068000880C000E02600000604405411600600E000000000000000000FFB788000001801800001801A0180094c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (910E00820249 480A201C090010C800860800884800E0042890C840000000000000000000FFA60500008080080080080082088080A800818C 00800042200202200A04241280200228208204200044200304A0030000020220020200020020010620800422428021220000 00000000000000FFA22F0000038018259098280100010000018018800000280280000116D350000D048940406002440008C0 4C4800202260C080849F0400063000021006381388902B0408000000000000000000FFC05E0000000000000146900820005E 40100620400000010408090000000140A01101000408008008000100200010906408400067080006000000E10100000000840054c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (130420200100 00000004800800800000004804804811404820AA0900D54000004814000A00904800908800C248C4880000CD488000000000 0000000000FF348D000101805841811A01841801805001911A018000A16C0600610E0AE28604E10624440642420000653604 6006104406C0604E12600620600014608604E00600E226000000000000000000FF69B1000420D20D02D42848F08C148A0D08 C20820800100300310B00340382A9024020831331030012B30022034B2A130430A350200B20314300040B40B503A320A3082 000000000000000000FFC4CE0002003803C026044030800020030030040A000100880110080000802100080014881090080000d4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF87D30004104104204504004044004004044000000000801000001001801801001001101801101001010841001001 841101281001001001101001001101101800001000000000000000000000FF2AE40000A80A80100A80AA1400000AA1340A80 AA00002A8AA82A82A02A82A82A82308A02200800001000080000006A82202280A83202E82200000000002002A80102080000 00000000000000FFAC4E000200A04C08A00A00A10A00A00C08C00A00800000200280280A00200280290A40A10283280080A2 2280280200288290280280A802802800912C0A852002802842000000000000000000FF12E50002022002C4202001142000400034c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (081000000880 380000880402882100003B02682002A8AA82A8000000000000000000FFC22500000400012000000001000000004000040000 010000010000110010000010002488800480010004100C80010000A001000100800000800022080028800042104000000000 0000000000FFB29F0000A20A20880820AA0A80000AA0A80AA4AA00002A82A82A82B02A82A82A82A80402A824000822149025 00002882400282A83082A82200002202102482A8AA82A8000000000000000000FF90A3000350352204354354204200354200 3541540000550D50550D40550550D504C1080450C80840449120C00800130C10D40B30440D10D4080089052884155090050800b4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (803801850000 E00E01600642602E0060060840442060000A608404600640E50600E22E00401608E000206006006006006006000000000000 000000FFFDFA00023422C2032102002002004002012030010000005004004800804804800804804814C00800884104810800 C04400CA0C20AC48008048008110048A5004000804000000000000000000FF70FE000000800820824800800800800804800A 00800000200200200A00200200200240A10203201000A2222A200204290200A00200A04214A0000021020120020020020000 00000000000000FF73ED00008008008C0800AA0AA0000AA0A80A80AA0001AA82A9AA82A02A82A82A82A84B022009000032080074c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFE243000000800800002880800800800800020000808002208A00218220201206202210200202250044A5220020426000 6200208250620200000050201A088492002002010000000000000000FFBF7000000000040000C40040000040040040040000 2100110110840900910108128906110D1080A120104100066100100170810108000100000100150106101108100000000000 0000000000FF78B5000000800C00800D00C00800C00C00C40C00802104300340210B0134030A34D320B21304A94941300340 2003003053042003142403002811043013093103483002000000000000000000FF548100000580190182984184180180180100f4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000244805400 82A813403810100000E08600044660E006000000000000000000FF61F5000001001008021020009810001921810003800000 E0060860CE00600600405600400200502008600200010209600409021602000400500012E08E000016016006000000000000 000000FFA38000000000002804002002A0220900080800040000008300000010050100488028020200080000000000008080 0C62085200060080061202A00400002880C0000020000000000000000000FF7E6E0000038018818218210210010000018038 0002000100004802060204D00000005144C05000080C008022400001629012022E02400E0880084203000000104040000000000cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000046006 40600E00640600600600800420480020E00400200240600600E0060C20041048008020964140070064060000000000000000 00FF83BF000001001002001000043804005801802001800008E0060B600600E0260060062242A60AE0000A64CE0000960260 0602020621004601000000422610030600414E000000000000000000FFB27800000100100000100000584410B81180200180 0000621600600605610E336006284006286C00226206008022000206220140200022020CC020600630810600604600800000 0000000000FF9F020000010010400010001C18080030A190A019800000610E08602600600600418624440220512008610200008cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 1C7C0000AB0AB0880AB0AB88988B8898A98AA0AB80002262AE2262B620E1162AE2AE04008640C00040650C2AC22E28E2AEA0 608F14628E1440002AC4360042862AC086000000000000000000FF8EB8000001001002001001881901801801800001800000 600600601608600600600604E0064240100065040044C240000602600189600200400000000610C0AE004086000000000000 000000FFB0D00000AA0AA08C0AA0AB8898C98C90A98A80AB80002062AE1062A62A608E2AC2AE09080C0440600460042AA326 0882AE3C64A84162C86240002AE10616406E2AE056000000000000000000FF84CD0000000000200000018018418210058000004cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (44600680E406 1480060060000044A640602E004416000000000000000000FFB4090000AB8AB8C80AB8AB8898818008A80818AB80000062AE 2AE2A00062062AC2AE4842AC0070043260002AE0A20882AE206088A0028A2AF0042AE0460060872AE0860000000000000000 04FFB4B200000080082000080184580180400400180180000960060160001464260040063044301068000960400040040460 0601002600400600C800004006414016804406000000000000000000FFDCA200015495491015495584D83593415215595580 004D65565565404564D6554556084D5009600444E03055400C1505564885504405325540055562962444065562360000000000ccc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060060060 080060064860061560320140040061020060124000060562000880021060044C4006036006414006000000000000000000FF 500C00000080480180084180402180D000005801800000600600600000600605400600608010600000600E04A08604614E08 00460040060260000100060060060A4006000000000000000004FF50AF00000080080380080182402B815000055801800022 600600600052E0A60060062200000AE8140064CE0022100000061200200000220068040000160B6207004026000000000000 000004FF185E0000018018200018018018018C0804001801800009600600600800601600400600C00420600008E000006004002cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF3A9E 000551D51B15D51951914111815B503559558000556556556D4055255600655212251241600455244E416112350414454110 4C453052E00443655640C5560D6556000000000000000000FFCD260000098018218518018010018438020018018000006006 00600200200400400204A0280060000000160060060040040040060040040460000CE0061040060060060000000000000000 00FFB5830000AD8AD8C98AB88B88808B8818AC0A98AB80002AE2AE2AE2A02AE2AE0042AE2162022640002AE22228622608E2 0630608E2202AE20E0001042AE2862AE0042AE000000000000000000FFA4580000038018258018018400018218020018018000acc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008560404060 4408600404E006116006006004000000000000000004FF235D0004A1CE188828188B8C988E8898A84A98AB80002AE2AE2AEA A02AE2AE2AC2AA0063042AC0002AC22420600408C2AC20408E0C408C6160000862AE2242AE2AE2AC000000000000000004FF 2A0C000001801A018058058210438C180000080180000060060060120060064CE0062060220840040020801422400000A400 444000C0000060040060060A4006406006000000000000000004FF427A0000C388B88B8838AC88B0C9889AA80AB8AB80002A E2AE2AE2B22AE2AE2AE2AE2862002AC0002A82C62AA2CE4AC2AC2AC2AE3142AC1060004062AE22C2AE2AE2AE000000000000006cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F04710F004D6 48476AC636C22544C061C091500020470420C047060496800714406000046006090916206006000000000000000000FF0E1E 000401C01C00409C00821800801C00001C01800000700680700200628704700308600600400500701402C02400C210206020 B0600400600528648E102407406004000000000000000000FFDDED000011809800005840C058208018002058018001006006 006002006804006002C0601480400000400410C23400400410440605420402E0004060060010060060040000000000000000 00FF0616000405C05C24231C01841801C43C02001C01800000680600680B0020070040021560A600400480690C046100444000ecc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF87930004 01C01C20281A00801881805CA182404180200271061068060001268068270021140062008149501085000144023024062422 14000029000486102446C06000000000040000000000FF037A000081803880011800801C0180180181020180000060060062 063100AE0041161024D4006020034108000104104B2A0024002020140000002C0486012416006004000000000000000000FF A3DA000001801800003801805C21801801E03003822000E00600E40580C0141160A204200F88E000046087C040022A508600 0080000024046000006006020026006002000000000000000000FF2E8B000501C05D00401C61C23821C11C01A12401982080001cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620600611400 0050080096002226406200000000020000000000FFA75E000401C01C48641800083900003801D00009904000600642601601 600650C00600200440E4A000401448005030C04800E0884C600420A100002206302016016000080000000000000000FF1CF9 000401C01808001901063800011A41800009880001610602610404E10628400208600400C000004004012008084004102008 00244400808009800E00200E00621C080000000000000000FFE0FB000001801C8002D8AB08180001980BC88007840020E046 3068AC02640600C00E4060047140A010420425206424402C4080D61801E464200000201624014600E0040000000000000000009cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA882222022 4022AA10200A22200000A0122426622AA23220A08A0222AA40200014A2AA4022AA2AE210000000000000000000FF426A0004 01C01825A01801C4180180000380180000000000000000061104000540040484441100000444040040800040040804460080 042C80004A0000400000000080000000000000000000FF395200000000000000004000422000060000400000000000000012 280001104800005001000000004800A8128008006088020006500006000000000000130000000050000000000000000000FF E84A000201A01B00291C52401C00001C93A2C045800024600610702600204400404A10009400600000C4A400048000420020005cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7C06000555D5 5D15D55E0BC4584D955D519219558001556557D57546A0655755712645644E556001C4704551651615644440E1164D615655 6000547556415556D56406000000000000000000FF45990000AA8AA88A8AA8AC88A8C88AA8A8AAAAAA80002AAAAA2AA22A2A A2CA10AAAA04242234A00022232228A0022AA22241228A4822AA0420002022AA0A22AA2AA2C2000000000000000000FFAC7C 00040040040020004040848000040001200000008000000008101290000002108800800000000803088000404001080A0200 8002000000000090000C08000008A8000000000000000000FF9B820000AA8AAC888AAA8A8C888E8AA8A8CA88AA80002AA2AA00dcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030200100000 100000051000000440000000000000000000FF89230000000000240002080540100000021000000000800000000008400000 800540020000000002000000000100001000010400000000030002028800000001000088000000000000000000FFB6BE0000 AA8AA8C88AA920900C80EAA8ACE00EAA80002AB2AA2AA2A20022AA2AA00220322A2AA0002BA0022420020AB0022A20CA2820 AA2020002022AA2822AB2AA002000000000000000000FFC02600040040042040040040020000140220020100010048050051 0080100004080120809000000108800500009000008412004083000008800000900400D005005004000000000000000000FF003cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0200209300A0 0A20301344200000200202A00200294300200282240A44220000210302280B002200000000000000000000FFAA3400000000 00000000000000000000000002000000000A004001088000008208000088808802120000208000002008009004000800C000 80024A0800D00400880020000000000000000000FF027A010000000000000000000000000010000040000000080081080000 0000000840001400110100000401B80800000040008070040801800000000810000000000000000000000000000000FF6996 00040040040020010250042200040005200000000008010008000B00000010080911000000010012A89284284004A800004000bcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000800 800C00800800C0080282CC40800102200226200B202082002202C9200B40220808204A55A1820030020021D380A502002000 003012003603002000000000000000000000FF443A000000001801901801801951941F558418018020416407545916006116 056006C0C0944C4410006004056007406146894446147336256400506106C47416086400000000000000000000FF26060000 08000008000000000000000001002000000000001000408480C008084010A0C004224021A000647210088800000040000002 8D000228044000100004004040000000000000000000FFBCD80000000008008808008008B08C0AD2820A00802040A00A0A20007cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF061D00000000100100120100100120000000120000008000040000008000040010 00004805004000000804000000000800004806000000000000000001004800000000000000000000000000FFA5F600000000 0800800800800800800A08A00800800002200200481200200200204308220A04200840220280200A08200200200202A00A80 2000002002002002802000000000000000000000FF0FC3000008000010000000000000000004250000000000000041008040 8110080C000000000904A0080808000000000021000801000000000430001000000000000000000000000000000000FF42A800fcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60A640640400 410C08420080608408E01407E40600400800208E80200000E00622660E006050000000000000000000FFAE52000000000040 040021801801811801901A04800102600680600710E156016807509201280302006084916804800106040110917116106003 416106D5685644E000000000000000000000FFFA88000000000001080001801809881821811888900000600600600E046006 006000040050000000106404424526480026210006226246006200006006006006006000000000000000000000FF0CF50000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600000002c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018080006 01845815801891811A5180000060050000060A600690E0C710F0A34160A01060118260070060140825008028461401008065 0700648700F000000000000000000000FF3F0500000000184000000180180180180180980388000060074002178160160072 0720752700600010740020634C40600404208608200600200040608608F02620E028000000000000000000FF092800000001 01012B08218018498CD8258018080000C044544440060A600720E0044A80042000804070040368061962A621C01672822688 0210106004004007026000000000000000000000FF657D000000000201200201801801801A01A818800000026806404406000082c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000600100 4487806080000000000000000000FF03CE000000009880800001801801801081800241000000200600000604600601600402 214241200400410404000400600600008080600604600400700A007C06206000000000000000000000FFBE52000000001811 010A21809851805865863A0381808EC44444260610618E10604E52280A082B4016C0A0806804936080A3646700005E100100 70610D00400E207000000000000000000000FFD913000000001801000021E2B803841E0980B80B800131400E003806806016 00609600E01610740040C04E0130040461094C601028000600200800720400409600E000000000000000000000FFEC1A00000042c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3062440A6142 246A04006000800A26546256C04D010042368CC004096888084447206008000000000000000004FF5F9F0000000018018008 8088180180130182020000002200C400209600620600600400A0062021201042048248040063042040068042060840040068 0C10C02E506000000000000000000004FFC39B0000000018018004808818038010818000020000002004002086006006D061 4494214708208449C2040A40440060D00E050010E056204004956106466086086090000000000000000004FFAC7500000000 1C00800001801803841401C0009300000010069000060060060064068020028A240100400410440732600608400600C0064500c2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200380100080 188D801829811809800102C00400600600600600600400A04210A48020401628400E04F02400420600401680440000600400 4017806000000000000000000000FF69FE000000000001821081803803801801809801820000402410620608648700610503 20A2002044C8C08E00000602620000500010C006004085046008414016086000000000000000000000FF31C6000040000100 E01001881841803805945841800030400400402601600E006086207C0A2C72100064060042063060870C40060058960D4244 096404105D16006000000000000000000004FF5302000000000000801001801801821C01841B11800044412400400E0060060022c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006004006006 006000000000000000000004FF0B4F000000000001801A000018018018018018018000806006006006006806006004004806 806000806806006002006006806806007000006804006006006006006000000000000000000004FF42460000200000018218 01001A098058000458410000002002806006016106006086C06082042004006000A0600600200010600000E0000140840064 0C106506806000000000000000000000FF14FA000000002105801881105AC180184B101809040053204680624608280E0060 04854A0A20A08A50ED00906216517544826A06006880126822096006006006106000000000000000000000FFD0FE0000000000a2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2E2860008000 0800684601600480420E80604680608000C000006000806006006000000000000000000000FF46CA00000000180181040180 19518455041240011140CD21544144325064CE08E494C56A0833002E12E50142410E05280000680000E00101602604600600 6007006000000000000000000004FF985B00000000180180000181180180104100000300000024040C410201600644604608 610000008000601600420640454C406016006100006004006006006006006000000000000000000004FF8A18000000000001 80180000180180180080180180000060060060060060060060060000060060040060060060020000060060000060000040040062c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001801801 809800809A01950094480391688A8124AE8460061260040044C8047804D5400408A40102E800006000886200806002007006 046000000000000000000000FF116F000000001800000001801801811C000218410000280A060A60B200E2EE2AE68646C68C 62C0F00EE6BC05C20C22602005602E54E000056420006002006006406000000000000000000000FF11720000000018018002 00801901A01000110001150014300451454201651654600410614080028600604050400CD1440600610080E0001040070060 00806206826000000000000000000000FFDD5E000000001801808000809821A03021082243088002A0AC80D20AA82007006000e2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1204680C2860 00000000000000000000FFE629000000000001800001801801801801001A0000000020060040058040060060060000060060 00806004006002006006006006806000002000006802006005806000000000000000000000FF49E800000000180000000180 1911841904881861804000480640200200600680620600000490400100600CC4410801210440688700600082E00004700200 6206006000000000000000000000FF48C6000600001800000000801901801E00E01A018001804006403A4200600728600520 42C520400000624500600040600400700052F801006000006002006006206000000000000000000000FFA1F10000000018000012c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010121002080 0600008210100100410106820088230000A08008B00200820000000000000000000000FFFE35000000100145802002801801 905A60845816800000602654608420000610600482000208201000E00400602002240602E006486400402200526002406004 016000000000000000000000FF10A6000000200215A4A320A81A81A518A0201A2C0000812C4E90E90694E90642E80E029512 D22820416C24A34A208AAA2F106910086140D12A00206C4228EC44046400000000000000000000FF117700000000C0018000 0380180188380980980080004A6102C0421620600608628790100600E000006884004002203107C360400362080220500D610092c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (202802C02000 842102000000910E108008009B08802809890006C8528C00801000900800C88A200008008009209408108909C08988090002 40000000000000000000FF9025000000000800800800800804800A0080092080006A280200A00204210280200200A0020020 00702182452442212082002003002210082001042633066423202000000000000000000000FF66EB00000004380981198001 1811868318001808000000018C0906000084168402500C5010840000000064220004040058A800BE01804000802800000000 0000480000000000000000000000FFDFB90000000000020000000000000820000080000000048000200008400000828000400052c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (300280200000 0000000000000000FFDA9C00000022220232420020020022200120020A000080880C809001000800004AB090C004894B0082 4320940A48950840014820925000950801004904885000004000000000000000000000FFE8FF000000121901901881801841 84194900190B8000406494006006006206046116044004424000006826106016126126C0600E01601022600001630C006206 216000000000000000000000FF733E020000410C44C08C00C08C14D04A04C4CC00800114A0034B340352B08A903023403D52 09340928330325324320B40B01310220254110B0103430422CB002802020000000000000000000FFFF96040000218200328200d2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D50C80C81280 800C08D10C88D40D10900550830900D50B09110D50D50000000000000000000000FFBB310008004004204025104004004004 0040044400010110010000010010000011210000290894010015010290010211111490410518000010010015418010010008 00000000000000000000FFE5850008000880A80100AA0AA0AA0882AA08A08000000400302002A82A82A82A80002202282200 002408002101002402802300886102A80000022A80000002A82A8000000000000000000000FFDB8A000000200A00A08A00A0 0A00A00800A20A208000CA2A8294300280280280280280288280300091201280A90280300A902C0300A000C02900802C32430032c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0AA0AA0AA0C A09000003A02A82202A82A82A8AA80000209800400002A80500082A82104000000882002A92400022A80102A82A82A800000 0000000000000000FF3DD8000800002004020000000000002200024032000000002000000000000000010801001000000201 0028320020000020000020040800280002000040420000000800000000000000000000FF69540000000A81120880000AA0AA 0AA0AA08C08000002202A82A92A82A82A8AA82104C8C004001002A80002802A82800202002882802A82882002A80002A82A8 2A8000000000000000000000FF6D810000003503503043543543543501543103000000C90A80CD0D50D50D50D50C40D40CC000b2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (003002000000 000000000000FFB4FC00002000980192B811801881811801001801900028602600621600620600630E216286206000006244 22608608600400600608611613600000C00408600600E006000000000000000000FF286F0000002222002042102002002002 0120040A0001010800808805000800000800088010D50C00800B24940800941414D10C210B4804800C008049448050048040 04000000000000000000FFBCF7000000000824840884800800800800820840800000200208200200200200234AA022220020 8000201220200200A14202200200200215200000240A002002002002000000000000000000FF6A5100000008C0880C80640A0072c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000A05204001 40140044400086100108050000008000090000008000000000000000000000FFC90B00002000080082280080080480880090 0900880018200200210220202A00A18A08212A00210801211202200200220206200203201209208004202200264200000200 0000000000000000FFCA29400800008000008180000000000400000480000100900100108940020100002100120128100100 9000008208009081018001001001201001081001005001001000000000000000000000FFB831400000000800800800800800 800C00800C80800101300315308304204B45202314305308300915308200A43202B34344210302300340308108304301340300f2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8000C4021801 93201082AE28610620608400C1042A442013E06208607213E20678260010602809601600000214A022036006000086000000 000000000000FF17B6000000000100005800005815800000105901800000045604600648C104000004244016406000106102 2262A600201000604E086006002080002402006446000086000000000000000000FFA13E0008000000000000400000000000 4200204C10800000000204001100200400000004083002080004005000C00000883000860202803005000802800100002000 00000000000000000000FF4E2C00000000180190180900188180100000180000004040200CC4000200064402004281040000000ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF9AF020000000080004180100080184284402080580000000160061064560040002060941061168000020441020 1224200A00402600600602C800002402806006004006000000000000000000FFF76000000002280200582080180180011180 183180001080060D620610600400604C2260120062000060962360C610A1240060060060062020800020B000610E00000600 0000000000000000FF8EDF0000000008000018D4801801800081821853844001008648640600604403200408612202629000 E20600600600208422610002628650A2000120C2046006400006000000000000000000FF71E900080000008006388A803809008ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60A85564B650 4548556510556006542004550492556556554006000000000000000000FFEEFC0000000A88CC0898C98AB8AB8A802388D821 00002B022CAA62060262AC2A802C00422A22C0002AA00422220A02E2462A808E2AE0061160802AA2012AE2A62AC006000000 000000000000FF46A700000000204402181380180180000202584100002000040860060060040000040AC10200C000006204 006006006006000000006006016200002041006006004006000000000000000000FFA4B600000008C0A80C988B8AA8AB8888 018CA98580002202A621617E4142AC2A84861542202264802AA6040022025062022AC6C82AE0064840002AA1122AE2362AC0004ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C08210008000 0305520001064860060060040960100142000060400060160000040040060060060060000061140060060060060000000000 00000004FF1A250000000898A988D8218AB8AB8AB10088B0A88000200012A002261042AE2AA2AE4062903854062AE2002AE2 260500002A80C82AE0062270062AE2262AE2AE2AE006000000000000000004FFBD0200080000100180380580180180291080 1010800000010600000610600600410420610010488000615010E12600009400600600600604280000404000600600400600 0000000000000000FFBEA520000015111191192115595595403091111480001284C64284CE4565565565560064464441045500cac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF700200000000180180188180080180000080101500000860160080064160064B208600C48602400414C08210C04C00 60040880000060060C600410401400600614E006000000000000000000FFFB9B0000000310058018430008018348B5801021 000000E14600000600600600401614605010E00000401600450410E094026026006006012000246344006006006006000000 000000000004FFCD4400000002300380588D00080180001480100500000860060D001602E006006006226026026904002096 0020823564D4006220006006112C04004004806006006006000000000000000004FF019F0000000018018418018018018010002ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (082016026224 0102AC2AE2AE20000422E2862AC2AE22E2A8000000000000000004FF8FB5000000410555D55903D54D558558C35501428000 44E44C5425560175444362A642200E5100041164D013601444A44448E1305565540820044065165505564445500000000000 00000000FFCA19800000000001801801813801801801800023800001611400000600600600600400209400000400604E0460 C640E10C4260040060060B2000106016004006006000000000000000000000FF9F620000000838A98AB8498AA8AB8800118A B08100002263062A02AE1A42BE00022420410624400024422222400422623420428E2AE2AE21600005E0042AE2AE2162AE0000aac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400080000861 1400B0060068044460048004860040000068B022608804800008640400600600000500600400500708600000000000000000 0004FF206C0000000A9AA98AB8C9889AAB8A19478B008980002262442B02AE2AEAAE1D62AC2A80462AC00401420241640218 400430608C2AE2AE2000040062442AC2AE3262A8000000000000000004FFBA810008000A4001801811800801881800804010 800010000400A006226004106016116420002002206006202524102104020400006004220006106026000006084000000000 000000000004FFA7DF0000002AA0ABAAB88BAC18AB8CB808AC208980003202042A02AE2AE2AE2062AE2AE4042AA000326306006ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFDE80800800409A00201C01C01C01881C00C218008040447194015016C06C16C260155148052444004250500D408200E306 E86244027006002001056087025106802000000000000000000000FFA68C000000609801801801C0DC01901A01E020248000 1008262A220602600508E40700028E90602500500600500000400904048410680444600520610C8064070000000000000000 00000000FF05FD000800001A05A018038018018058C1808045800000802600000680600680E0060010560060002CC00210C4 424045348480240060040D40005560AC006006008000000000000000000000FFA2E7000000005801801A41C43C018118090000eac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (966461340A00 4400E00A288000502000224086002000000000000000000000FF73F9800000001844001801C00C0180181088180002200040 2630E00E1069140860160044102140011050A6203008032092A1632424600600610080829508203613224000000000000000 0000FF551E800000201800001809813801809820A03844824010702C0B4106526056A0E3154D40040C641021421002204208 602204608508600644200005000C000486802000000000000000000000FFAEB3800000001E00605811801801811840941810 040000500600608608702404608602400640C00804E20010412832A246086005046006006000106007026006002000000000001ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0080A0000708 620628682400E0080024002D414040610600042C4221002400C403600240600000010000604602A020000000000000000000 FF7123000000000400001800405885801891E218200C4002804644C02E02F10C006004142010004400144052480104012030 10840400601201412000240014E116102000000000000000000000FFC0C1000000000008001980003A918998C71218B58800 02850600602600E02410E00400610000422000400808002600200400000440600210402001001040E0060024000000000000 00000000FFA9A400000040040040582220980B00182110B81B80806402844266162274061060000A65900B40C02260420102009ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF39 5E00000048C8A8CAACC8AAA8408AA90C8AA80480006004030022AA2AB0222AA14232208A06214046A00A3C24022222A229A2 AA2AA0120480000822001422AA412000000000000000000000FFE4E9000000041A01801841801831C0182120188800009060 3444600000010E00000010040420C00208044401402000000400000400040022000244810841000002800000000000000000 0000FF092B80000040200440000200068200008400002200000482800880000002000002A800802008014040010004031008 80100200060000C8080100000040120000280000000000000000000000FFCAB300000040024C401C24209C01A81801A13880005ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100C14000080 4800414080550085400804145000000000000000000000FFD256900000731955955915C09D55D55D09F51855000144E55754 755755755755624E4450C444E080557547416446016084526157D564D6446400446456326556444000000000000000000000 FF56C7000000088AAAAAAC8A8AA8808AA8108AC80080000220924922AA2AA2822AA20A2322325020001122A220A08A2A2322 2022AA2AAAA208200000224A00AAAA002000000000000000000000FFCA460000000020000000204C04002000220040800001 000000808800000800000080008810080008000000100088520820008000000000088000088001000000089000000000000000dac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (048000800800 0000010000400010210800000011010000100A09100C0000800108420200080108100800050000000000000000000000FFBE 601000002400000004400C200000000020000800001000000080008010000005081502000080800004400B00804102000002 00000000008000028000400000100000000000000000000000FFABEF810000088EA8EAAC888048AA8AA8A08AA8008000303A AA2A22AA2AA2AA2AA00230248B2220082AA01A24222200343220A4AA2AA22208200020232203B2AA20200000000000000000 0000FF5F65800800440200200200400414400040400131000109404104080400505000400000490401000000000800004001003ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF3D6E0A 00080008002008028028008A080285284480A008204200A80200240A0020D220228220A000002502112002A421028A22822A 2C422024080020820A20A2002200000000000000000000FF2C8F000000000000200000000000008080000000000001010020 04100081000000008000200804018A0020000000080C20200808008009800002000010000000208000000000000000000000 FF89FD0100002000000000046106000000004001000000200400000400000010800000841100100140000000640000008D00 000430800080580050860400008000000000000000000000000000FF198D01000000200400000240840020020C000144000100bac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008208010800 000882000404000000000000000000000000000000FFE4F4010000018802000800820800800810A00B00800100200A00A4B2 A022030220A304210360B4000AA00245308282B00A40A00300A00210200004200360200260A000000000000000000000FFD6 4D140010401000001805805801951905855845814051412641741600E51700614E0074044960000C7D075160064D6305544D 5655751620400080608615694600E200000000000000000000FF02C902000800100000800040040000000820020308000040 04004008884000205800404B6D800608200AE888820828004420480100424010449104581400580040400000000000000000007ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF295500 0000000000000001200001001400001000000080400000000400000480080500000080500080080000480000080400400080 0004000800000000801000000000000000000000000000FFF332000000000802000802828A00800800A00800080000220A00 A80208200200200200281610A0A008A00200210284A00200300200340220202880200200200200E000000000000000000000 FFFC260400080010000080000000000002000000020000000000000940400408440940000440000012C204D0100210A8029000fac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFEEBF000000 0002002E1001003A21200000A01800000002008708608692608624600600661C60248020601400082D20800401400A416026 20200042600E106006416000000000000000000000FF9C1B000000001000001805801843801C01011D00000004030E0B6106 046A16216116087020820130A254249004B42902202408C612704691000102610F006A06006420000000000000000000FF7B 2000000000100008100100380180984480180000000080260060040060860060042261000060001060060280060201000800 160061162004000160460260C6006000000000000000000000FF409B000000000000000000000000000000000000000000000006c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8230600E2060 0000E2060870060D7000000000000000000000FF3A880000000018002018810010048019428B0CA3800000202E8262068060 D62062CE027AC61281000160A608204EA800222022C181604B8060000062060068350A6000000000000000000000FFA47400 0000001800001005001200801A228109010000002416016006106C1600610E0A60A704622002620C09208408054340B10212 E106116001016046006446006040000000000000000000FF277E040004000010001801805A03108201001200000010A02642 614401600602E006216004002408D84C26420A060640050B402160680A4122002161969A608421E2000000000000000000000086c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601600710610 600440604244000420600784400610211414400ED06006906000006016406042006000000000000000000000FFCCFE000002 0010000011008018018018A10498C3000010001604780600600C0060048860528062048068040240148248A0810006026006 006004007817A07052006000000000000000000000FFA0B7040000001810003801801800902001100A00000060A28640E546 0161060069460D610F64216906500C52C6C491C0861E68400B6042016000066106206005006E00000000000000000000FF8F 35000000000800003801802A02802205800800000000BAC780E00600682620720C806A0608A01030E2B5015904204806C0740046c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8C0400000010 000018010818408018418358018001004006216086006CB6006106206012B2708003690600220608A005024C050070030060 0408F04E406020206020000000000000000004FF4DE802000000880060180080180188180100300300000020062162061160 1600E50610790600888004654401650580600420C024806002826004086827856214206080000000000000000004FF3AB100 0000028800041420941801052049041C61000000800602610E08E44688E0060860361000600160244270C44166C008940C29 E00209200401600600618C116040000000000000000004FF0B9A000000021400001820801841C0380B40900100000100060200c6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6206016D0845 402E006006006080000000000000000000FF3AD50000000018080218018A78019401E52218010000007006306006406C0600 600480600360641100400701602612E104004434016202006001006006006004006000000000000000000000FFBDBB000000 001800041821841801170605001805002120408E80648680E00600640C2061820960054AE40E41E046C86055EA424C2A7022 0520050AE0060D6400116100000000000000000000FFA37C100000001000001E01011840883A0BA01855800010C04790E446 28620508602681644B0002ACA07547803C0640255401508401600200E48CA062AE006014006100000000000000000004FF0C0026c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006006006 002006006000006006006006006006006004006002006004004006006006006000000000000000000004FFA2130000000018 00001801800001801801801C0180000020060060040060060060068008068060040068060060060068060068040060020068 04004006006006006000000000000000000004FFA71F000000001A0020120183100020220920180180009080460160070060 0690685600201400280624A0128068062060010B0104086042006006884306106016006000000000000000000000FF284610 0000001A08221841900040A000012418558020A0510F206544114006806806C10B24102925082CC2006227036C2C4040244400a6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000180200 18000000038298A1201025882020600EB06A04204A06002006004006602004802822C2EC0608600600610480200A106004AC 4006E26006006000000000000000000000FF72470000002018001018002012018145510050C110414121064564A451641600 AA1620E8C610240000203208C004007130000C4E003006806104407006046006006000000000000000000004FF5847000000 001804001800000003841801009001000014421600600C0460C64A21260C42060020AC00228204401408E404204004002016 006004104006006006006000000000000000000004FF753000000000180000180180100180180180180180000060060060060066c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00E001016006 00600620C000000000000000000000FFA82B00000040180000100020180180020890C849802180A03601680E10500E1500B7 2B6C04106110886C0E04E2040072A00A09410A7082C06048004107006006006040000000000000000000FFB3190000004018 0000180000180180000100EA0580004A608608E4AE0A60A62A82B62AC9841862B80422CA28620C84F2A81402A81461024060 91045006017806406040000000000000000000FF849C0000000018000018000010018058110910498040016456C16054106C 56152546556456203344502492C54C0401653640652E812806016044016086A0700600E000000000000000000000FF14600000e6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1640F31600C0 0434722000400408000422604E20624201005400600A04200E114026006000000000000000000000FFA32E00000000100000 1800200801801001000001000000200600600200600680600600400400600080000000200600600600600000000000600000 0006004006006000000000000000000000FFC1DA0000002018001018002018000058108009078000A1640604620601601600 0017004CC6A06020806806806804027004404002802802106000866006A0E806004000000000000000000000FF058A000000 001800601800000E00803C01800A018000003C06407825806C46801C0600402F007A004270A740700681601420420A00A0020016c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010084040140 70000602000001003000000880088000380808000008104080190000010B0800000001450400000400188000828040000820 100400080000000000000000000000FF8D080000001010480018080418018118288E08010000206006006280024106006206 0840242E0040A0001000A4968061065062A6040016006100106016004A06026000000000000000000000FF3B510000003150 00301A2A020AA1A21A202D0A490000C93096206A84936026806006884A4C808800320308A148D40969068AE886B4090024E8 00C12126A04206CD4000000000000000000000FFADA200000000109000300010BC13909213C00101000002624602E03600630096c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2914280322B3 03002000000000000000000000FF96D900000020400020222022024020020620830C0000C10000A08800500C900089090400 00810920800948890800800810000900610940800800009001618900A00000000000000000000000FF826E01000000A80000 0800814880800810800800800000220242200200B02260340200210210A202102A0200210A30208228201200248A20201264 3086002002002000000000000000000000FF69E200000008000008101788B13918D94000188000000614A000000100420910 00800052000004000040847040200A80690680008200201000088200080C0020408000000000000000000000FFEE660000000056c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2C43002002A4 2C0080202A90280290200300288A803002842800802002802532002000000000000000000000FF15910000002000003102CC 23520224221023254C0001000005004A00800C24000894800080814840CC4904848B28C05090110A4080480088C882000004 800805000000000000000000000000FF855701000001380000185180B00D901849851911800040680640600E006006886116 44680E004540014004016216006106D06406534106006002A06016086006206000000000000000000000FF47DC0000005008 42420C828C0D40C12D04C00C04800103340300300348230B4022030030820AB00010215350308252B24B023113003433083100d6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000480341042 A82002B421024C0000808D505504C0D50D00D50C00D50C48820821400000C48C40900548D40A20D50D50540900D50550D503 10D50000000000000000000000FFB6A000080042800040042055200048041040440200010000010000000000010010010018 080C9010001801051000301290448081000010501401000801001C31800000000000000000000000FF62E000080008200010 02000900880C808008010000002E02A8AA88082A80002A81002A8328190000008610200100428A202300002A82A82000002A 82A82A80002A8000000000000000000000FF90D1000000048A00042800A00A40A00A24A00A00800100B002002142802912800036c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200200240200 2000000000000000000000FFF8B00000001044000AA0A800048408C1400880E000002212A82A82A92A8AA82A82A82A8B0108 04002A82A83002A88000010002102A90C10502002A8AA82A81202A8000000000000000000000FF851F000800012000002480 4400020920000A200000005000010008100000300000480000004004000C8940080008049000000090000001008000001000 001020000000000000000000000000FFDF260000000000000AA08A0000A80300020A809000003282A82A8AA82A92A82A82A8 2A82404000012A82A82002A8848020080A202A83000000002A92A82A80002A8000000000000000000000FF414A000000120200b6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (453443403111 02B402002013403443403003243003042889103003003403002000000000000000000000FF67D00000000000138000D18150 01813821801801840008402620621620610610608E0840141562400040842260861560060061260841161062020263160160 06026000000000000000000000FF43FB0000002C0200200201291052242202202200000088C0050040048000008010008041 44810800004804848800510934434000804A248C4800800004800895004000000000000000000000FFBA1600000000C00080 0004842A00800928840812800000280200280200200200200200200A2422088020020820020222029028D2002012412000000076c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000190300000 380000980002000800403100C00400084440885100802404000944844441002080400000C00000100A040008049001000002 0000000000000000000000FFCDD800000000004A8000A8008900808820900888800020220202200200A00218A02200201208 20205025120020120226020420022E20D2012000002022012202006000510000000000000000FF6A314008004004004E0400 40041800000000051000010010010113092810A100100102132D009089121000000009081001201001001061000089021045 001001000000000000000000000000FFAD5A400000420400C80400D00C00800800808C0080014032031430430CB03325302300f6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006086000 288000000000000000FFF8C40008000000C9868000140869800009103830020010E04E0AE40609402A00E30E0060121EC220 0581001004E60844C62462262822061A60180124962E4216036200000000000000000000FF8FD30000000801118020000018 9182405502D84000A00460060060061240C000200400620200650800004000810E0040863062265422562071000221263163 06026400000000000000000000FF339600080010000000200015000004202204800800C00A04200002000485000000C00004 200000880400201302002080400800000101004000800B0450000108090000000000000000000000FFC9CB00000004000000000ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (262060603A62 260820062AA20632610222204E2AE0001EEAAE2242AE866000000000000000000000FFF1E900000000200188000400580180 00A5801809800032600600644629600600600448610600680000600601202E0000CE00E8AA10250600680020600610400650 6000000000000000000000FF0AE60000000000018540000008AB043808033842000001600600600E04400210600602C0160A C00001009024028200400610640000A04600600000600600E006016000000000000000000000FFD834000000000001810000 011801001800001800020000E2160B600600420810E22E00404600E02028420C02000228C006006002012106036000106006008ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C3143040004 953955800028E5565564C65565544D65564515504160040C20024145565520C62CEC0E4882A65562040D4D56556557556000 000000000000000000FFC8A50000002C8001C0008A0AA831011912889893800008A2AE2AE11600E2AE2262AE20E296204000 22A2AA34C4422AA2062060102A62162AE000416AAE2B62AE086000000000000000000000FFE8864000000000018000000098 118938A980180180000020060060160060040020040868061260082163561440060022060060200260160060022060060060 06006000000000000000000000FFE9892000002A80018000A80A890198C0018C588180000062AE2AE0C64462AE33E2AE0462004ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060000000 00000000000004FFB6DC000000200001A0000408100100182880180180002420060061460060001160060000040060002022 4201600400000610608410210E006204556806006006806000000000000000000004FF227F0000000AA0018AA0E800B08108 B8008A98AB800004A2AE2AE00E2AE2A82262AE2A0AAC2A700800A08A0862AA2A829620632620A2062AF0040062AE2AE2AE2A E000000000000000000004FF0C610008000040018B202000000502184080182180002460060064061060040020040810400D 680000200200411600014E04E22401008600680000400600600740E000000000000000000000FF10BF00000035400195411400cec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408022222238 60044062AE2AE2040062AE2AE0000262AE4362AE2AE000000000000000000000FF9EAF000000000001000005805081911801 801801800000000600600600440400600600A00200620400200201650C0060060060B400400600600408C00610E006006000 000000000000000000FFAD6600000000002300002180003304002480182380000940060060060940C60062940820B034E020 09608E0220464D60060060042D6006006084206006406006006000000000000000000004FF63DD0000000000010000018210 2B840103803801800010400600620600400600600600A0000170001460062420060060560560140440260068040040060060002ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB8880832AB8 8900002262AE2AE2AE2AE2864262AE2A02082AE48808612620E04E2AE2AE2AC2282A62AC2AE20420C2AE2AC2AE2AE0000000 00000000000004FFEBE8000000001914801D559518CCB11951555955000055655655655645644655640640E44A1162A444E4 44454514156556554200454556556104014556124556556000000000000000000000FF2DD580000000180080180180580182 1851001805000011600600600600600600600600604200600001601402400400600600408001600600600008400600400600 6000000000000000000000FF009F0000000000890000898A800104388C8AB88980002202AE2AE2AE32400C2AA0642222024000aec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000000 0000000000FF7D36000000000800000004084000C11821801805800103480680680600612640600600001500400420C20289 20021060040000C0816004006004004006800006806000000000000000000004FFCE220000000008AA0000881410AB807801 8AB8C980002002AE2AE2AE2AE25611E2AE2B03242AC00044440C3267042262AC2AC2042062AC2AE0042442AE2A82AE2AE000 000000000000000004FF8F78000800001040801801803800C02001001801000000600600600600608E00610E126100040004 1000960060260060060040A8084004006004344006004006006000000000000000000004FF020C0000000010AA801AAB8098006ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (120006006087 816406006016006207006000007106017004006000000000000000000000FFC279800800001801800C00003C00C01829A018 118000C07026E0742E99F116E074C6C220768180004806E2C1201A00F307146186C0680610660080480700C0050060000000 00000000000000FF4060000000001000841600440000C00101801823800000F00712600702620602700601608002401500D0 8F0060060A600400020008400E006004006806002004006000000000000000000000FF20ED00080000100080102004940194 188DC0184180001060060060068070168C70068081000045100A40C60060D60170070040141248040064010D60060020040000eec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9801C8180308 000362261CE22620642604642E23200614C60000C09A40200210600A08C4141820080860200041060A00A008600000000000 0000000000FFC94A8000080018098010200128004020A0803901804000700700600601640620E8860064560000A12410460D 608E2860260022CA0560464061000062A600A00400E000400000000000000000FF52018000000018018212002A1C00080100 C81835800020610600650702615611604F48029640000845000700E10602608612200220640F106000005006001004006000 000000000000000000FF1D41800000000801600808105C00909849D0180180000061260060AE00782608E117142406300200001ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF01B3000008001001801202000844211048A89805100004422608E20620E02700602E00642A10C140024036006116 20602200800001201250608000E506002000006000200000000000000000FFEAC100000002101180140800D800E25101C058 A1012040401600604600648609640600008220440000C10623600608640C0802CC0420C000E4400C60060AA0801160000000 00000000000000FFD222000000020001018840000801021808809821008020200E0060060060864863064420862840005840 0230206200620000400010208000E2000AE046002058006000000000000000000000FF6FCE000000000001000C1A00182381009ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (294282C00008 400000A4000880000000000800028000004000000000000000000000FF0CDE000000081820891C888C8806806888CAA8C880 002622AA2AA2AA2AA2AA2AA2AA0422560022001221022425422AA0022222224020202AA1000022AE0023002AA00000000000 0000000000FFB515000000000011034005800020211802001820000008C00000000000000100600040404802408001410808 8108000004084014500090000100410000400150000000000000000000000000FF597580000002A082000020022110140040 00000400000000000000000000000000001300802900002802200404400003500080800484000000001200000A8000000000005ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400004000000 9004805004004005000004408004204500A3484100000000500090C004000934804000401004005014804000000000000000 000000FF31D790000014315510973584995551190BF559558000106D57556D5755655755755620641411450120C086106017 5565174254044C6457556400556556504C57556000000000000000000000FFDC1C0000000AA8848C288AC8A8008888888AA8 8880002822AAAAA2AA2AA2AA2AA2AA1023020CA00100320A28A00A2AA2CAA222AA0B22032AA0000AA2AA2AA222AAA0000000 00000000000000FF363C00800000800000400000000040202000000000002400000000000000010000001200A0040000080200dec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFA23A1080001004040040201501005400100000000000000000000000800001001000930110290000280288000040000B 50D08A80100010000000000000148080000000000000000000000000FFE80100000004400002020400204C01012420000000 000A800080080000100000000040000002050101002012809100000002001000810080040000000000001080000000000000 0000000000FF9C8F800000008CA88C88889048008428008AA8AA8001A13AAA2AB2AA2AB2AA2AA2AB012223C0200006200220 22022AB0021120322322222AA0002ABAAA2023222AA000000000000000000000FFE1CB8008000010490014404000A9420044003ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C0880E860420 4820801404008708500500005801004000000000000000000000FF8BCD000040000800900850A00828802AD094A800800024 204200322A2020134CA10200283200200034324300228201208250A2C254288310850000200232230A002000000000000000 000000FF707F00000060060000000020000000000000000000000882880509000500A08018200001008A0480008800040000 0A0208820000000240800000009800000000040000000000000000000000FF465B00000000019811011040A0000001000000 000000000800480000040000000040001000300020C100804000000000408000080400412200007C07C0800010840000000000bec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800200001 000C48000550910110110540100B00248510048A080884000008008000000004100480000008080000000000000000000000 00FF7F3900000000087080082282EC008008089EA800800020280300A12304208A08A08A08A00A4020500820421823220020 8240280200278221000050B543782002002000000000000000000000FFE15700004000180108185180385180555195580180 0024624612E52E036156256106006154506341D4C34702630611610E4D45574A60A64D000080E00754651604400000000000 0000000000FF6C8D020088001111001001010000001000000000080191413400428C4042201000400012A4A482A80242AC02007ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE07D000000000000000000000200001001001000000000 0000001000000000000000004804004800000000001000000000005005000000000000800800800800000000000000000000 000000FF406D000000001C808888AAA28800A0080880C800800000004020A00280200280202200200A012000902002202042 0420A2006042042022C00000002002002002022000000000000000000000FF32D1040090000201000000000000201080000000fec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4260064043A0 02E10701022000E020026022B42000000000000000000000FF0886000000001A008018118218018018011810018000806006 10600600E2A44860841829008260000260065162030840C6820002016846010000006A00E060060020000000000000000000 00FFFCBB000000001800101801800810C01901811901800024D0440260A610E2D404600C00600602E4112420A704634E0D50 06044A86CA6316140140A46040006C0D082000000000000000000000FFCB5A08000000180000180182180080181180184000 0000400420600E046000106104026048406100082206006006006116100026006006000400016200026024402000000000000001c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A004E026507C 060070260262460024A70034010044A600F0060550C62CE30A0040062080280000069061024A2100000000000000000000FF A538080000001800801801810881800000C0288080808C401400681604604A02641601628642200882411689600682628608 A428A07C06A800B0510087A86406012100000000000000000000FF1A29080000001C00901809800810C000888108C18000C3 48040C61261460132260060470092124105045260C610E00D03610200250653614810044080600620E102000000000000000 000000FF373E000000001800801801801801841911041001800000652674744E00600500604C0020F000618000604624E4220081c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF4242 0000000018008038018808210018018098010000425004046006006106000016204114284000090126306086006007485026 00641601000920704640F002200000000000000000000000FF73A8080000001C00801801C0C8010418018018018000004004 00612600600780080E0158140440044A08161262062040060000064464060000842860060078068000000000000000000000 00FF9E55000000001861819809823801808110BCC907802110F53605E0961C6816007006062006C1AB10A8520600680200CC 26026040026906100000071166406483212000000000000000000000FF9974000000001C01801809C21900E08000810601000041c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D61008164068 06000005406106886002326200000000000000000004FF2767000000401C01C03801B0002180180880084180000070070360 A6446B2C30A14428880D00C40420682E20E00611613720000730640700000D226806426022224000000000000000000004FF 50E0000000201A00A21801801801001801801801800008C0040068A6006A4E42C02611404404812180040E01601610C4A680 45068B494604000402600684624A007800000000000000000004FFE3C2000000001800821801801A01001857009840800008 414401680654600612410E8044840A04844082860C6C6240421608020640402612800400602600E00684600000000000000000c1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (484E10413600 684E216106CB0AC1552A1040C82489600600688E10081620E40C0060002269261060040C6006000000000000000000FFE66C 000000021C01801801A07001801001DC3800000000620600600700600C00200428080400000400200600E1040060060009A6 0071CE060000126A27606002006000000000000000000000FFDF840000002018018018218212018A1841009201800045616F A0600E38600480A084008465C800EE18A20E046F14C0E00620014605C33710000608600E006CB30040200000000000000000 00FF0A21000040011801801801800501801804820F1188005571060AE14600E24430241502049424C40022712792708434600021c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04FF747E0000 0000180180180180100180180100180180000060060060060060060060060000040000040040040020060060060000060060 06006004002006006000006006000000000000000004FFB432000000001C01001801801A01801A01A01801A0000040060060 07006806806006800804000802004804002806006806004006006806006006006806806004006006000000000000000004FF 8025000000051801001801C018018018010018011000057506C5400650E2061064160000100020A412450C8464072D604640 0826006006006004002216007140206246000000000000000000FF9295000040401801001821A2190192120280DD09A0004800a1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002604600E00 2004010046AA680A886006000000000000000000FF614E00000000199120180182F80180388098A803840102422C50648640 600680680600480000081080420C024000006006094806006F86002000000916986800006006000000000000000000FFBC5C 000000001A01001911C01801C019010149158080006454004146056206546046A004214B410411549502608040E2160040B6 006016006004904426006007006006000000000000000004FF6E7A00000000180100180182980180580080080188002AE084 05600E10615600E41601009000444020404400640004614628400600600600600442400600600400600600000000000000000061c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00500F107016 04702600280600600000EC0900204900600728680180700200200000C00400600E086006000000000000000000FF75DC0000 00001B01001801A00009801800001A08028004C01600600600600650E406486082806088D068264A40008170060220C222E8 0200200080600404E004006006000000000000000000FF8D5D0000000019010018018002018018014019880A802169862A72 0E2BE22EA0F26E20F7EAAA63B800E0C710428021F22E40A9A841600A002000106524016044006006000000000000000000FF 104D000000001801201801801811A01E01480C1195408462340070161060B6D5640648400000080450C48C44C0510070061400e1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C29800000004 5811009803881921001808A510A3800028600631612610E10621600708600644E00802004810010600600681108200E10641 04000150042A254E056006000000000000000000FF636A000000001E01801801801801001801A01201800000600600600600 6006006006006806006002800806000006006006000000006006800002004004002004006006000000000000000000FF0AAC 000000001811801911800201801801081A80000011500481484680E9A6946806002226816000D000C080A000847106402002 00680B0020005C47B4286026006006000000000000000000FFE52F00000000180160180180000180180100180010200062A50011c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0410A0440200 088020600180000000000000000000000000FF7EA10000000200002022800800000842C80000020000201410169108010000 800888120120000020140840130000800020000108908218000000410008180070318B08000000000000000000FF08100000 000019F00018018438B100180000100D80000A48040048060064944062160060068822000000A0000286086006C000060061 0608000020471600200EC26006000000000000000000FF9437000000211B20885931A03A012AB903281209800082E3048264 0E826A260062B6C4ED46102C40C96286A40A4E0CF2CE4A4A0E426A2E880800B04CD680080628640E000000000000000000FF0091c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1200B1520420 2340354215308008309301320205340248310200BD5314308142B003C13112013082000000000000000000FFF25800000020 820D4804043052002022002002000000500000E002100A8840A08820CC80C0800900808408000C08870A810F4A10A3044001 0900840880820800880000000000000000000000FFA6F8000000001800C08C02800804830C00118821800001228000200280 222280340220260294E04100211200212280A00B00200300600230A000000002012202842002000000000000000000FF7D8B 0000000020000040280010401491160E00C1000100D0000850A0D001040400400048042300082A4A04A8400000040030C0C40051c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000A12 A00800A40A00AB0A00CA8A828000902043002002802802103002803222002800902802002802103002802812D02802802800 0028028028CAA42002000000000000000000FFFC320000002012410010012032042022CD2022510000828014000004804810 80480480080080CD00004804800CB0A4500410CB2082400000490088C808000800904004000000000000000000FF33B10000 0000188B0058018010218D18C58918410000406C16C461062862062064161460060040408444441060860060068540361460 0641400000628E106026326006000000000000000000FF5D04000000400C40A00A04D42C12C04808C20C04800108A003082800d1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A80002002A03 282A8020228000000000000000000000FF0E090000001543001541543523102142222022220000500450D50550D50CC04C0C 48D40A00550200CC0D51550C10440D50C50820D20550800800450440D50C48800000000000000000000000FFBE2800000040 002000020043440440000444440200000000010010000010408000010004210A100210800180140080100100904900100100 1002000000001001100000000000000000000000FF46B80000000AA0800AA0AA0880AC0001000500000000200A802A8AA82A 82A02283A82A80C8AA00002282A82A81000182A82200100182A8000100A203A02A8300008000000000000000000000FF71CA0031c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (201201200204 2A2202A00001200200204A002002032012002002002400812012002492152000000000000000000000FF17B70000000AA280 0AA6AA00A0500C809808010000012A92A82A82A9AA8000B00AA8280098210001A012A82A8000AA82A84803002A82A8000001 2312212A8D10201000000000000000000000FF28260000000000542004000000200A00081000880001049080001000000008 8080000081088010800080000000209000000804800010000000010810080000002B0000000000000000000000FF2CDB0000 000AA28A0AA0AA08008008A2A009002800002A82A82A82A82A8308A292A83289002000802202A82A80A8AA82A81402002A8200b1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00400400C00C 40C00800D08C54C20C00904100B4330234430A24035130420B30C30130030232030024033030932420030330030030130230 4B103103003000000000000000000000FF52B900004010400180191184983180180190102184004060863060160160460062 0440620400428000600E00602600624610622600620602C080086486016026004000000000000000000000FF9C1B00000020 00240010012C02A42022444012340000804004004804000AA00A4004808004884882140800804C80005004C0092080080480 4802084904800024804800000000000000000000FFF2AF00000000001080080080081082080082C8808000002802802002000071c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001030040000 8400010000000000000000000000FF7FC30000000840000000280200010B1001101021104020000030830800044C00000420 60240805000043100000064000084A0040010400050100000030000040000000000000000000000000FFB1F1000020000000 80488080880A800908824800820040868800216203201208A0221C215A052500112042502022182022102302022012112000 0023000E2100002000500000000000000000FFAEE70000004004004004004001A44404224004000001001021031101088011 20120002929170D0010211011982010012810000010010010010090A1081049081001000000000000000000000FF8DBA000000f1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10600C006108 0262800200020060060B6046102006082036482000286000000004002000280000000000000000FFC5030000000000010418 0180190780D8398000019DC000C0842B60165140260060C804604628201830215601601E40641E20621E0C81A62620900060 60082018092000000000000000000000FFB27300000000000100384580182180192190202980000244240061060000060161 00106000312000416006526086006006206506210006012100006306128300102000000000000000000000FF935D00000000 00400280220041400020000C00D204200A0040010010300280090040006000000000020088050106428220000000220000000009c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A2108AB8AB85 1089A2488188810580005042440062AE2AE0C62AE2AA2BE2B62060000420662162262AE2AEA223262AA41622200020621C03 000C2AA2A8000000000000000000FFDDE600000000004C801801B03001804841820003800020C02400600600600600600600 600095680002600600608600600610208E000006002900096006000000002000000000000000000000FF8471000000000101 80180184982509181580515180001260962CE00600644E00600400600800650028A28A0CE0160060060080020024AE092000 0261205124A4002000000000000000000000FF3469000000000021811801805801009801820105800050E0862C60260062CE0089c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006046446114 000000000000000000000000FFCB70000000354128155955B10954B5582D9141518000554554556556556556556552546404 C8010440E10650644E5565568864345564CE550004126556456404550550000000000000000000FFDE020000002AA4828AB8 ABA010CB0889298AD029800002620E32E2AE2AC20E2AE2AA2A62A6AD62003024823063262AE2AEAA840AAAE0A622E0802AE3 040862262AA2A8000000000000000000FFD21300000000040280180182100100090182000380000060060060060000060060 0600603605640012042600E10600600643008200400600620020E0040860CA002000000000000000000000FFFA630000002A0049c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021540040808 0428E28E12E00400600604C00200609604C80404600408640E004000000000000000000004FF73B500000020021080180180 28000018CD801203800000400400600600600600600600608C82410002000400608600600690408880600610220030600601 6044006000000000000000000004FFF2260000000AA0A00AB8AB88C8AA0AB80188808980002AC2AC2AE2AE2AE2AE2AE2AE21 632420D20400003224622E2AE2AE2062242AE22620300400E2AE2260842AE2A8000000000000000004FFFDCF000000000040 801801902800841805800201800001410400600600208600600200600400090001000E04601600600600404000600610080000c9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8AB8AB88B8C9 8818AB8AD8AB80002C62862AE2AE2222AE2AE2222AE55421A0020064042AE2AE2AE2AE28C23200E2AE0160022AE00608E206 006000000000000000000000FF671500000000010D001801821841845801802801800000601600600600E00600600A00422C 0C20042A030C0060040060060040020C600630C00400642E006086014000000000000000000000FFDE5A0000000000418018 01801803809001801801800005602600600608600600610200610400000001602600600600600604410A2060060460020060 844260562A6000000000000000000004FF292B000000000005001801A41801801001843841800000600600600600600600600029c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0630E0061260 06000000000000000004FFBC3E0000000018880AA0AB8898A90898AB9130AB00002AE2AE2AE2AA2AE2AE2AE2062AE0042840 000060162AA2AE2AE2AE3242822262AE24E0042AE20E2262062AE006000000000000000004FFEE1000000000180D15415591 190D131955911155000049644655655653655655654E55600648000422A15255655055655624454040655410600455652E04 654E416006000000000000000000FF90EA00000000180500000180580500380184180100000060060060000060060060A600 62AC00800045204200600600600601403000600600600000604600E046006006000000000000000000FF775000000000000100a9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (71060A400001 620200400600600680408200E00400E00000621610E406136006000000000000000000FF6400000000001845400001841000 241C01C14001000000400400680650600600640680622F0080042A68230060000060060CF41402700612600400614682600E 006006000000000000000004FF0E3C0000000018C88AA0AB8C90880C98AB8208AB80002AC2AC2AE2AC0062AE2AE0362AE006 24000410258A2AE2AE2AE2AE2040203962AE3060042AE1063061B6206006000000000000000004FFD22F0000000018A18000 01823801005801841001000000608E00600600600600600600600002400608600600200000600608C0020D600422600600600069c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (41E11081C808 018010018001826127006009406107007A4784E2060021004020060042200078063200114060060060004060060261060060 06000000000000000000FFA2CF000004201801C04221803089A08C2FC0180581E021601700744080608C41612702E80C9124 9025302300C01E0570168815A001F08E00600001600F0AE016006006000000000000000000FF437800000040180000040180 3008049851900401020040400490700610F43600600E4070B622400500722B01400120690700F04600635441600408629651 6007007006000000000000000000FF66C0000000201800800201805042003801880001800000400400600085600600608E0000e9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601601400E00 0000000000000000FF01AC000000001800804009808881903803083805848008E21632620411624603E01E02602050600200 041000822641E01643049200442A09400200610E026106004026000000000000000000FFF36B000000001801800201881021 C00809801C01000000415480600A8471050060A64091000424300230A6B0208612652E88304CCA640602820802620608E00E 897006100010000000000000FF53D9000002481801800001811001840801901801000004C0C4006A522062062064862004A4 05241085200600244082608604200420604640000028E406406016006006000000000000000000FF663900000010180160000019c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080100100 0400060000002200A81082300A0100000000000000088000000000000000000000FF3435000000001800800001889C01C05C 35801401010008421444620000710600E20E22014002624014001000000635628E0060560442420200102260B60060060040 06080008000000000000FF399D0000000018018200018019018018019011038A2000410400612004E40E0860060104001060 9000030048831000600613628620401230410008640612600610404E000000000000000000FFC24500000000180182001180 684180182180509B8A200160460060B400E00E0C634600620008608008424C00004820604600A2061040022104822860A6010099c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000022000020 040000000000008012000008010010000000000082001000009000000010001200000008002A840000000000000000000000 0000000000000000FF4DF30000000AA8930000AA8C92A8CAA89000009880002002102AA4022AA0022AA2AA28A0022A200022 222220208A2AA2AA19A2022220422021002AA2AA2AA2AA2222AA000000000000000000FF4AE0000000000010000000004001 80182189040180001000D000041000044600000004640401400001400C094246000000000000000100008000000000000000 000000000000000000000000FF3B0000000000002000000002000200021202202400000500000000A00008900000000061300059c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2ABAAA000000 000000000000FFAFC9000000001101400401001204400201441304000000410500500000505100500400105400010300400C 8C0000805004020110001008010002804004004004110004000000000000000000FF497700000055588120055594D953D119 559359558000556557556156557556557556557D2D44610123502541655655755640E52E5565560060015575575575565565 56000000000000000000FFC7560000000AA8248000AA88ACA88AAB2491282080002AA2222AA0AA2AA3022AA2AA2CA2822AA0 012AA2A220A2AAAAA2AA2022222B24822A20012AA2AA2AA2AA2222AA000000000000000000FF397C00000000104A0004000000d9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E04400000110 48000000000441041000820000020C08000000000000000000000000000000FF405700000020008000000000004220200000 440000000000010000A08008000000000009308201010C01508000210008000200C000011000020080100100080000000000 0000000000000000FF6837000000000002000200044400040000020000000000000000041000000100080004040000800001 0800110400000000090410000000450000000000000000000000000000000000000000FF19148000000AA8288000AA888C88 88CEAA888CAA80002AA2AA2AA0032AA2AB2AA2AA28A00238220020271226208B2AA2AA2020022AA2220820002AA2AA2AA2AA0039c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001101029000 00000909440448204048440142346A82E800580840C6EDEB0300021080005000010C05210280001004004184044000000000 000000000000FF8BC9000052048908880830800B528D0A249108209000C4200340212304200A10A08234A80228200104300A 2522A2912A22402D42B0A00201000008202220008202A000000000000000000000FF31B00000000000000000000000000000 0800400000008102A80A8008488820000008000080800008C88AA00000000400001000108003000000000002000000018000 00000000000000000000FFED1D0000000501000001100001000005C02040000020001010100100000210010800000020D48400b9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF50FF0400001000000001000020102100010102040440901500010840820100821840AA80500808080200C82C80 20000050000200020001000280800020004100800000000000000000000000FF79370000000D682281280080080A868B0E84 08028220002A8270A902623092222802003D0201A08009240200240298212A0031C200A00306002806243A00200200200000 0000000000000000FF4155000054051911901851801B55951855D15821884024620F48C14F0CE414086106156086D0E1528A E09484644E956C465045565070860200020A642E40480600E000000000000000000000FF1A130200006000010090010024010079c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00001600608 6086090126146126000000046004108006006000000000000000000000FF4409000000000000000000000000000000000000 0000000000000000000000000000006000000000000000000006000000000000000000000000000000000000000000000000 000000000000FFD0D50000000000000000000010000000000004010000000000000000000800000001006804000800000004 000006000800004800000000000001000000000000800000000000000000000000FF2F570000000008A2802808800C82A00A 280028008000802008002802802002C104000020032222A1302002802802822002002002812802400028002000003002002000f9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021C5B818000 40E09600624204603EC10A000A690A9260808277C0806A668C6806A4C12006E20E90041104618190A4070060000000000000 00000000FF617E00800000388580180180106180180002180180A0A370470250CB0061451008001060928060008060040060 0080680480001B206C3603800001E11C002806006040000000000000000000FF87FC0100000058C18018018009018018038A 1A1181205460042A208A116C0A004004800886006400106500C274482460244454064160070A008040700440000610600000 0000000000000000FF97110000000098018038018218018418118019010000006084000400046000004404040026046080040005c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF894D000000001001801805801801821881A018010001A0602602685730600641604683604251641200602604010008 002482A301106007208002444106400206006000000000000000000000FF696D000000001801801805800803C05801401C03 8200907805A30C8EA8F00010200292820604600003701600000809022E416C02896086250000206801402006006000000000 000000000000FFE039000000001843805801801901C21A0900181180000860243000260B750088280280004600620008F006 44800E2400A40C2302086086100081444004500006106020000000000000000000FF71AD000000409801801841861101C1180085c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200660224 54582E04E86E22009C28680004611E206000000000000000000004FF3909008000409815801801822001A01AA90019010000 104404902106016C02A0000008688C88600C20E80200008E880026000414085106C004005460148070074060000000000000 00000000FF93870000000018018018418090038018010018010220000004202A060160120840044068848060040060820000 0082000C80001600409604000408E844143886016000000000000000000000FF728900000000100180180184990183588194 5B058020107636016106846006066FA630642224E3880564120200D601058440600965600E10041008F02202208600E000000045c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3801F0002230 162064460860278240040062918D621490F0170C680641600624D08442610604040C4045030B690604600000000000000000 0004FFF18C000000401801841C019008018C181110188190009070072060A600F40625124020600800600824688E90613000 600E444204084106000205044002126086006000000000000000000004FFE171000000001801821A01881001F01801803805 8880404024A438220C600208A002406004447C00126202080C2600040D80412400E016020104806021086006006000000000 000000000004FF3E3600800000986BA01801C21005847A2190181380000650340020028060020C644601E60409638008E15200c5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF9BAA1000002A0001800005841811821343A01C91080080400601614CB0713700688643710AC9084D02AC4200640612E846 12C024342106040508406316016006006000000000000000000000FF1ED7080000201805801801801801D81A09905C010000 80600606E08620700E01E08702E00020612100620210720602602640413C00F02600000000680A0069060060000000000000 00000000FF81A20000000A1801C018818058058219A38058B9010040649694680F14F0868030023069004560850264E20060 2098608E9841048C5006000084006052806006086000000000000000000000FF7ABF0000000018058018058408118018016A0025c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (562160442041 44000004000004106006006006006000000000000000000004FF328000000000000180000180180080180180180180000040 0600600600600600600000600600400000600600600000200600600400200200000400600600600600400000000000000000 0004FF6C95000000000001800001801800C01801001801800000400600600600600600600080600680480400680600680680 2806006804002802000004006006806006006000000000000000000004FF0F64000000400001800081A01801801C09A21841 8000C4489740740680E00604680600640202020410210A04604020611700000501202600000600600614600614400000000000a5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800022255448 A45690A912556CB0016B4004AA1511002000004004400C01680680404480040480600E00400600C000000000000000000000 FF647800000000000180000180000983050D20380B04C0386AE4A6AA6E40280202E80880680080300600000000002680C016 00680480000406000600601E806806804800000000000000000000FF48D2000000000001800001800011840800911C058800 40610451241504A546456006026020002510020CC00200000069040004060041051100054070060060060060000000000000 00000004FF673B000000000001800001800001800850803931810000E2040020860820160062B65160902A204400000001050065c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF12 5F000000000601800001801801800A010038018000A108852A94240082024062A700190400E2914252040400010030060548 0280400700000100600604400600E000000000000000000000FF706A000000000001800001801C01800001801A0100000040 2E0068160060920D601680E24C84202008C02400845004400400000008A0C202042800680600402600640000000000000000 0000FF90AD000000000001800001801C018083038018218A2001C8060460862AE62A2062A62AE0BC0A23E946463487069E20 50A4040A20112186040050306006044047007400000000000000000000FFEABA0000004000018000018004008A0A01A0380100e5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080482680688 4916140890856906CA502E80E000000000000000000000FFBBAA0000004100058000058A8009901883811815800000500720 490610C40408E48000608E0260201378460260418A004C48E2B220C244000020A0624F015206346290000000000000000000 FF7799000000000001800001800001801801A018018000804006006006006804006800006006002000006006006006000007 806000800004000000006006004007806000000000000000000000FFCE0D000000000001800001801C018A09C15119018000 02020490000608090200700680000440600080410C81000600281C40410200400291000018600E00400600600000000000000015c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000002C 3710890101000061208444405800600000360040014000000800200001A0240420028000018390000000000000000000FFD2 7100000004000000810000208010C00250200000001F0020E00000808420CA0010407C081201018000081006060180480100 300001400800090290502105400A0000000000000000000000FFD44C0400000000A982008185D82180108188989100000081 D40000D400000000600000020240600800AA120060060A002602660624C00640001000618608402600600000000000000000 0000FFB71C0000000004B1830521A05B23A15241B45B01800112893408AA562428A8446810880422C9291020240AC16C80810095c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFC33A00 0000020500900500CAAC00CA0C0C884C4C800133210BC030328AB323482003312343C8310001280B08340B02302341303340 34025010080224AB01108300A010000000000000000000FF97460000002183002002003A0440040230004200000080100080 0A00880150209608810840080821001000E28800800800100800800E88120800900A08C40A08B00008000000000000000000 FF2D7100000000000080000080080A802804840804800040500808A00300220210308018208220A080232802042082142002 28A0CA400002000000402002004002402000000000000000000000FF2EA000000000000210002200180148010142004A00000055c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2202200202A8 0000000402001102A82A8000000000000000000000FFE040000000204400800000A30A00A00A00C00B008000902802442912 802D0A802852842812002A0000200280A802882842802812C02802800800933102C12802802800000000000000000000FF77 ED000000250401400401202200200232201232000080C84C084C400048008D490480080400084000410C900C00810C881109 00895000000900C048548C4004000000000000000000000000FFDE3404000000800180000180184180390184180180000060 4600400600400E01648C006004046440B04024426006096006906206046126000100506006426C26B060800000000000000000d5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A83212802A82 080880282A82402A80082A83003204A82282A82803282A82A80002002A80282A02A92A9000000000000000000000FFF54000 00001423541541543141541543423543040000C49440B48B48550308C40450D30D405508405504D0C40D10C40900C408A8A3 0550000900100CC0A00550D50800000000000000000000FF0E58000800000400400600404000400404400400000110000180 0049001080420501001090801001801021011001001001041001000001001001001001001000000000000000000000000000 FFED2A0008000800AA0AA0AA0800AA0AA0800AA00000002202800080002A80202002002882A02A84002A8A202200A82300000035c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF1C55000000 000800800000884800800800800800800000200200A0020028024122020020A200221000200A002442082002402152002002 002400002002102002802002000000000000000000FF72D70000004AA0AA0AA0AA1000AA0AA0902AA0AA00004002A8A10200 AA82410210802882012A8400AA80302200883202A80102002A82A80000002A85800102A82A8800000000000000000000FFFE B700080040800000040002040040000800003000001000880000010010200910800000108000030008001080200802500882 00101001000003208008041000000000000000000000000000FF81370000000AA0AA0AA0AA0284AA0AA0A00AA0AA0000029200b5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010010010600 01001001001029001000000000000000000000FF105D400000400C00C00400800C00C02D10C40C10812101310300B1435430 CB50308251330320B2814530A2222312402013402433403003002801003123083003103002000000000000000000FF257500 0000021801800001801849801823805805020004602408420E00600400E22402600E02601000401409600600612610610610 648600600040600600E0AE006006000000000000000000FFDEBF0000002014014004012502014012320012010000AC880414 4928004154880834840808804800004C84910800810801150801000004804800804C34C290040040000000000000000000000075c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (041010015030 00003161000080000202000202C60A00C04900C0110020148108040400208108000100000000000000000000FFC38A000000 020000000000001820040110082005020002C42812001020000010840002E02C4504002140A8130006400040280040200100 000000000100008080080004000000000000000000FF6E6B0000000010008240048228088008208000008480002440102022 0324820024782422920824481B224210200A00209A00249A0C2300006000312162082000410002000040000000000000FF1C C74008004004004404000444004424025204090021181491649281081629201090081041101081101400200280000001000200f5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (CC0000000018 0182000180400384380008108980000064060040040162040040C049600201604000C40600220008200A20408242A0440560 0004608600E00C20C006000020000000000000FF80160008000018018180018038038018130410CD84400061D010A0040061 5240408004060668658004008A146000246304104456202004006202006406404004004006000000000000000000FFDA9B00 000000180180400580180180180300100190805260000102141060000844080000960860000800B200612640642600C00608 6106087490116026004106004086000000000000000000FFACDA00080000000002000000000004201012004409404A000800000dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408E00600000 6006000006006006000000000000000000FF7DB30000000000AB8000AB8C18AB841A018AAA0000002263124084060262202A E3662883A622600022622423608821640420644220E20A0060002AE2AE8362AA018004000000000000000000FFFB7F000000 200001800001831801901821800828000000E04220020640600000611600000E006840106104006426006044006212146106 006800006006114006004806000000000000000000FF79BA00000000180180000180200182D90C001883800010608E0A60B4 11610E00400002600211600001001610A00612A50A1340C00000400060000060064060004A0004000000000000000000FFE7008dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (14E002006000 00600C097040102108006026006086114014114134006802006007006004104006000000000000000000FF55280000004011 5580015591400B953900955555800024655248255643654255643051643404600452242844611050655611440E2264060064 04556557556556555006000000000000000000FFA3210000000010AB8000AB88B8AB809C098AA88400002A62060860A62062 AE2AE20E2AE22222600222A22432228E2A204A2260802242028060022AE2AE2C22AA242004000000000000000000FF628460 00000010018000018218A1801C49800000000001600602E00608600E00608604600250601000600410622002E00602610009004dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000020180180 000180382182182D801001800002E0060260040CE0360040A00260100960100A604610600008E00601400412404000680400 6006002000002004000000000000000004FFA57D000000001001800001830095801A00801801800000600208A00600610200 601600602444600000A10800C02602400630612440C500806404006006806000000004000000000000000004FF08C9000000 0010AB8000AB88000188B8848AB0AB8000B862AA2022AE2062022AE20628E3840178002123002322882022AA42624E006048 0070062AE2AE2AE2A82A8004000000000000000004FF4896000800401001800001800001903922801031800101604205201600cdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000006006 004106006006000000000000000000FF94C20000000898AB8000AB8818AB8AB8A985192180002AE20604623C2AE00622C286 28E2A02AE10022222220408E0042AE3260040041422AE0802AE2AE002002212184000000000000000000FF0C440000000018 01800001831801801803801005800000602E00610400614E00400E00600000608401208200C00000C00608E42400C0220060 0400600640A022102054000000000000000000FF235800000004580180000180580180180195309100000060864AE0040064 0608402004601000644008600E1462265460060041143442880060040060060C2308052204000000000000000004FF082600002dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860880840060 000020000860062064000862CC00E02400601000208400200422400E006046000000000000000004FF4DB60000000A30AB80 18AB88B8AB8AB8C18AB88C80002AE2A62162AE2AE3062AC30428E2882AA4081263162CE08E0565042AE2C40562082AA2042A A2AE32C20E08E2AE000000000000000004FF6039001000115155801955D1595595591088580180005564A620E44655604E44 244E5565485524444524D615613043600042649452E4005560045565541144A6546416000000000000000000FFDE36800000 001001801801801801801812801800800000401604600600605600605604604000200041204600644608604800601400604000adc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (041001801A01 A04001801829025C0000000060C208200200210E0000C40061040024100000462360064C00AD006144006408006200006004 10C4AE8AE006000000000000000000FFD98D000000015401801801830001801803201805000000601201200300200600600E 00601080210024890C1044000104060060163260A0006004006006046006406006000000000000000004FF955B0000000910 AB8018ABAC00AB8AB8810898E900002AE2023222AA2AA2262AA2062AE2202AA1000802040040AE4000002AE20450E1002AE0 062AE2AE2040464462AE000000000000000004FFFE2700000002100180180182180180184380182D800000400E1061060062006dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00806A060029 0E006006000000000000000000FF02A3800000001801805801E05E01849801C0180A850008640612448408E0060A600E28E0 278060800440040A4011000006006404006000002000403006006096006006000000000000000000FFEA2E800000001C81C0 3A01A01C01C01841D83D08804024E1362060570860060AE406067117046441004C0400400604846F40620C01F00000600000 E006083006816006000000000000000000FF9966000000001481A01C01800201A01D05043821080020E04241300220222741 4024006A0420200480008C40C02021001402608E00680000E005016224105806006006000000000000000000FF2DAE00080000edc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (012400E10E28 020066661442400000641604620200600000400010401E002106446006000000000000000000FFDA4F000000000801801801 800001801941041821808020600E02E2364060064002440164060200880CE51601E05E6460860A610000E000034000484046 202026236006000000000000000000FFF274000000001A01881C21801801821D05095804800004E2C008000009028E10A08E 5000820100000040AC30430704024C00610602649020A090002406006086116046500000000000000000FFF2CB8000000018 018018018038018318054019448AA01265100CB34201024680220E3000D22263400040064A60000002042460060060000060001dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000040 0000004400002200005201100880801300000D00400460104000000000300082460000400003500000001080000105403200 00000000000000000000000000FF0916000000001801801801A0180182180100180080014464280500401101060A42545080 0600000000200613620640604400608203600800C008004202006006016046280000000000000000FF94CA00000000180180 1821E0180180380310B8048D200960024005100422060040040000162AE30811214400409004610408640200628042410000 4002206046106006000000000000000000FF05510000000008019018018000018039610018418A2008610430608E02401603009dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (208A00A2AA2A A2AA000000000000000000FF959C00000000900000000002040040002400000800010000000300000800002A000000000008 0201030000000000080080000080000000C88000201000004000000804000000000000000000FFFB110000000A80AA8AA8AA 8C08AA8AA8810AA8888000C0A4024225124022AA24020028A2A218A2A032A4924E208A32A3022AA0022AA000222000222442 1402AA2AA2AA000000000000000000FF9C870000000000000000002318000000100000000000006420400428400000000088 006004044000100200200006080114000000000000000082100008008000000000000000000000000000FFC0728000000040005dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (28BB8348A000 2022AA2AA08A222213AAA23A2AA00000A0000022020132AA2AA2AA000000000000000000FFD24D0008000012010012012004 01401001001440000085012403404514C0040041340410112144C10140000004200084480041400040010080808010004040 04005004000000000000000000FF25FC100000145D55D55D55915D55955911955B45800055654C50452CC44556016556556C 5684C08850455655655645722655644755600004640012E556546557557556000000000000000000FF4EAB0000000AAAAA8A AAAAA8A8AA8AA8AC8AA88A800008200A1020020022AA29220228A2A202200022212210A08A2220022AA20A2AA000322000AB00ddc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000008 420000011400006000003008400000404004898000105612885014000402000006A000186008000000000008001000040100 8040000000000000000000FF78C600000004000020020000420040001000002A0001000120020128128000108000000008C0 05100B00000002000000400000000000000002001000D04C0800801000000000000000000000FFB5C3100000014200000000 03000000002000010000000000101100000000004200000400400400000000000000400909100000810000002C0000430000 010000000000000000000000000000FF73B38000000808AA8AA8AAE808AACAA882EAA80080012AA202202202213AAA0022AA003dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (096006507006 000000000000000000FFA0AD008080000000080000021001080001000600200000C28500400401800D824830029000D04888 44C06DA010007A040800140800420C0400A080C084000000814044000000000000000000FFF67B00000A0001120900209008 0082C90CA00884840102A0228AA50324B44A00A24200280200200008200200280201280250220204200A4820000128820120 02483002000000000000000000FF188C00000000000000000000000000002020202000008000000000400808804800008004 A0300001A30420130000540008000000008000020000800000080000800020000000000000000000FF56BA0000000000000000bdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020028402022 02002802003022802802002002802000002002002002802026000000000000000000FF4FAB00800000000000000000000000 000000000010008500C00001004000B02408300308102A41008900204008005408082082100050108004A000000000000000 0000000000000000000000FF4E8E00000000000011800080081890480680090088000220220028DA29208200248A00200200 203000201205A00201ADA220A3C201A462002201012112002402002002000000000000000000FF28F3000014000114310041 901801955F55805945E200456044556347CC62D65175460064C704549010C2040CE2060560D6D0602614E816306000097104007dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801841801881 88A001010840600400020411614441420604020609210008008800600E40C036046426006016006002006002046006026006 000000000000000000FFEAFE0000000000000000000000000000000000000000000000000000000000000000006000000000 000000000006000000006000000000000000000000000000000000000000000000000000FFDDE50000000000004000010000 0000140000000040008000040000000000000000008060040000008048040000060000000060000000000000008000000000 04000000000000000000000000FFC7F500008000000000000084080080080080080C8000202402080004882000001082002800fdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (470860060000 00000000000000FF8E98000000028100302205801805811C298CA80D0443246086000443080EF8E187965060660C60000080 1061600688481600680008605E006000A06282006002006046000000000000000000FF1F5800000005000020020180180180 9851801A0320000069000061860294010C000EA060068060208040044060A080520600E003006906006000D8642A20600602 6006000000000000000000FFFBFF000000000040000001901801809801801815000000601400400002600C0849164010C622 34300500010168C014450611700610E006026000006932D06026906006000000000000000000FF97170000000000000020010003c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600889220219 491604200025625871601708E09160E60F006002016046000000000000000000FF6F9A000000000002122001825801801801 901008808204E08E08E00004245700FA06106082226231326836C4502008320200648000600602C000006086244103006006 000000000000000000FFC3C2000000000000000001CC5811841A018818508003006124124004A2600208200685090A284A20 C360A68248A82C25040360A3896007026009007883C26106056006000000000000000000FF1E220000000000400000018818 41801881801C00808300600C804204806002022006020C82A545100C689601400E2501480C644200E10602400000600214400083c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01841801801C 19808200608021561221180E0A608B006308894040022432665040010006156C8E46E5060C60040060120464874068060000 00000000000000FF7F69000000000002000001801803801909911001C102017084C0400442684800100A4060451004800820 82004016200006006024817006106000006800006102006006000000000000000000FF070800000000000000000180181180 1841801A2180000868040040004068045040AA24E01400000400230280400040310E40600600602610608401600800780702 6006000000000000000000FF2B56000000000162022005D018058519A1841A0484C168F64E04E440800187006026006842900043c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (700600000000 0000000000FF4EAD000000004100000033803841801901901941E003826504214442206144444A0620654C08042008E08710 714690610710705494E02E294021846146005802816006000000000000000000FF8C7D0000000000000000058C18818218D1 88984180020060148080430360208100062461040082A000600E806930516840814404206307004004006004004202206006 000000000000000000FF3CC9000000000000008001801801801825801E4188220060080040268022020CA082026410224000 0220420140860A042E006114806006806000006203806002006006000000000000000000FF05E5000000000002008405B41B00c3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100004086110 0868464000D6006946006045046144006006802004000000000000000000FF6D5C0000000001000A00118018038419019059 418000336907416010D441022160042C680E884A28C0804404E026A262860868060AE81621600000741601600600A0440000 00000000000000FF1DA8000000000000000045805841821801843001800120E000802006006856806C140860400020000431 2202E006A3E22604608500600616600078620E04E002806026000000000000000000FF710C0000000000002A0001C01C0780 3A05821801904209600682601E0A240A88A8AC02604146A00C322502016008047C16364044006086046004806C14066002000023c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180190180181 0001620614650400420004240610620602444000240E00040640000600600600608600600000600200600600200400000000 0000000000FF0EAC000000000000000001801801801801801801800000600600600000400600000000600600600000400600 6000006004000006006006006004006004006006002004000000000000000000FF920E000000000000400001801801801C01 8018018003006806006800004806004804006807006000805006006806806006007006806006006000006006006006002004 000000000000000000FFDA58000000004000000201801801803801801A0180020064060464408040031220A680648603680400a3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF4281000000000000000001C01801801803941841AC0092640642E204104500D04456956D46B46A3400A90E250130 0104A600004600600E046104006040006826206206000000000000000000FFDD0E0000000000000A0001821803AA3881821D 018480AA601603600422400800883681680600680000220E4008060001060060060060860060000060000060068060040000 00000000000000FF65B1000000000000100101921A01905D11A45805C040547127406034D54128C960C6446156A9000000A9 460B0129130A120010C6006006006004446042006806002006000000000000000000FF944D000000000000040001801805850063c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06808006A00D 0400010200000E80600044600200600620E206000000000000000000FF003C000000000000000001801801E01E0180180180 038460464061070014440030040000C680000030E24E00084011142400600080200600600000422200604600200600000000 0000000000FF6E5A000000000000000001A01801801A01945A419400106C0600620290608452E2570A620622009100308444 0891800086028842024246046080006106106007026044000000000000000000FF0B98000000000000000001801C01801801 807803822000E0EEA0EBAA0062E48F638C2AE2AE2883205024E42A8AAE7A800805602084644600600000652610600605204400e3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (CD18018002A0 F216CA6856256422C4C848D104A68A0C00A32824906908906806810D269404068C6C00842A2A286A0E826826000000000000 000000FF8921000000000000000001821801401841C0588D8000026107816A0208008E90130000600E208088106484006200 22752A02600A40A0AE00600040210200E027A86316000000000000000000FFA6F90000000000000000018018010018018018 0180000060060060020070060000000060068000000020048060060060020000000020068060000020020060060020040000 00000000000000FFB61C000000000000000101901801811813901901800200640612E0069100044028808080020C022101700013c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFACB9000000000000000091820040101820020000000280100800090C41500100011400E0040040414050000100064006 700060042C10000000012000200103010E02D0000000000000000000FF110800000000000000000000000003028208260200 01420001200001A88801408000016BA00106003301100000060A0100056000408820060010000001A8800850000000000000 0000000000FF83AA04000000000004000190590300180980998180002062060B60660005020040C010004E2081900860040C 620E20608600660E00020E08600000201A106006204506000000000000000000FF958D000000000000000281C81A832519130093c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601610601600 630E41602600600008640C006486006106000000000000000000FF3BA3040000000000040400F02C80C00E00C00828800084 329208B842402D0A0822430822C324352994330341310341352302B0038C2912123009203102492003543252000000000000 000000FF3F090000000000000002004002902002002442500000140480C00000820290300A00A808014808080404A0C00980 910808808901110010800800400A80C00820000828000000000000000000FFACE30000000000000000008808008088009008 08800200A11210A21200302A0B142A002C0206200000A2020020120020020220B20231C2902200122502002C0200200200000053c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8800022A8008 0002900802482003802A82A0200420A20A202200880200002A83202A82A80200022A80280002A82A82A80000000000000000 00FFD6C7000000000000000200C00A00A00A00D00C00800080288200284B02282290281280280202228000201280AC02C02C 02802802802802C02900802C03022802802002000000000000000000FF20AE00000000000000020000140020000124D22300 00004A25354000A0C08483484480081409080010890090084091094880091000000490CA00800904A9480480100000000000 0000000000FFF775000000000000000011801831911801923901800050600640609600C00441610C01600480E00021600E0400d3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 7E6B0000000000000000AA4AA0AA0AA0AA08028800002A82400400400A00880A02A02A82502880880501102A82882200202A 82292A82A82A80802A82082A82A02A92A8000000000000000000FF46C4000000000000000354354354354354332330000055 0C08110C40C00400D20C40D10540411020450550C40950D10A50D50828D50D51510B00550B08D30550D50550000000000000 000000FF06F10008000000004004000004004004004420440003001011491481000001010011001101821800200201001021 111111001100001001001400000120001001000800000000000000000000FF45200008000000000000AA0AA0AA0AA0AA00000033c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9114A8800840 800800804A00804140805025000004000000000000000000FFB3FD000000000000000000800800800800842A008000002082 448202012202002102042002012100A02A0200200200200200211200200200210000281200250A0020020000000000000000 00FFA1F80000000000000000AA2AA0AA0AA0AA0100AA00002A81080800304114406092202882002206011010C82A80882204 002A82002A82A82A80012A92012A80102A8AA8000000000000000000FFD70000080000000000000000000000000000000200 030000C02400801291100080080210091401031010000884000400800004000000000400030000400008000008000000000000b3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010092112010 81109611001280221021001291001000048268231018200011011001001001001001101041009004000000000000000000FF 6402400000000000002000C00C00800C00C54C00800110312321148345314348300214304340314100300A00240212300250 200300300300304100B00300B003013002000000000000000000FFFC390000000000000000818D1841803801801801080043 62060C000E00600603632E20E50E02420024C4A420E00E206086006546206016006000106006206206006006000000000000 000000FF9EB30000000000002002000012002002004890010001004A208008893448D51208088008D488480812C024800A200073c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF073C 000840000008000092000010042000022080024040004040028804052040603040608040001021048001040614003020E010 0C0000100410540280308080000288000000000000000000FFE21B00000000000000000181004100180002200010002000C0 0800040C002804E04810E2084400084443284040060081041062000080080000400000002802000000000000000000000000 00FFBD970000000000000020808A080080280090880080000A200A02820A2120802C20021420C000602014A0124220024921 021020AA21241201200008A00200A432002002000000000000000000FF49744008000000000000004004000004004004000000f3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020004002280 04006000156140006006084356000000000000000000FFB3310000000000000000008018058018038C584080002860060400 444062242064540A60042C640008420E00004010204021620210A24C00E00031610404E216004516000000000000000000FF 431100080000000000012580188380180380992009C00862C60200343C610C18E2840187040A22200540020004B800601400 42160460A412641000E004026006024006000000000000000000FFCA3F000020000008000048801909825801811800140000 650420050401601405608420004400204A40408220810642E102082006006104046002026406506106044006000000000000000bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600002604 E0060060A604604632608028600408402001620E0000010C8006006400006002006006026806000000000000000000FFC7DD 2000000000000000AB8AB88A0AA0AB8AB8AB00002AE2AC2A82A40062262161C22882AE4CE0402B63443322882261060AA402 0022AE2AE0000460062AE2AE516106000000000000000000FFEFC40000000000000000008018010010018018010000006004 00000620610E006042000007026C8000002C00204600E44E404152882006006A8020640E00600642E0060000000000000000 00FFA18700000000000000000180182080080180180080000060060000141360040D621402600420604000C0861100060821008bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF5F9E0008 00000000000001801805001001001801800000600600101450611404640800600480810000400000400610E4160061140440 06006900316092006006046806000000000000000000FF5FA600000000000000015595595515515515595500005565545504 842864A434E00051628400041404C5504445104C60A45504CE4065565560844D64D6556556296556000000000000000000FF 5A4F0000000000000000AB8AB8A80AA0AB8AB8AB80002AE2AE2A82A404E2263060062CE2AE1062003262142244AE2220464A E0205102AE2AE4000062222AE2AE00622E000000000000000000FF5974400000000000000000801801001001801801800000004bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (63542CC00E00 600000628200600610E006000000000000000000FF9A8B000000000000000000801800000001801801800000600400000212 601412421000600D2002004A000610222008610E400004084006006804086002006006016006000000000000000000FF1FB1 000000000000000001801800000001001801800000600600002420E00640604400612602409000400001600600E224006154 044006006280016152006006486006000000000000000000FFDE280000000000000000AA8AB8AA0AA0AB0AB8AB80002AE2AC 2A8A9E0062B600E4942AE21709D00000C2A82360882220040A820620E2AE2AF0042262062AE2AE027AAE000000000000000000cbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000006006 0060260060000240044860C4046226516046004116050006006000006406006006004006000000000000000000FF281D0000 000000000000AB8AB88A0CA0898AB80980002AE0140000A02AE2062AE2A428E24620200230022222608E2440060AE1040042 262AE0022AE00A2AE2AE2262AE000000000000000000FF11B600000000000000000080180000004180180180000065040000 020060A600400C00610600204408000200600000C416000004004106006004006022006006006006000000000000000000FF A6D70000000000000000018018200200038018C5800000603400020800601400600002603413000005609610A2460C614620002bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (66CA00000000 0000001800001802004043801801800200602600621200614000608800600400600200000000A00000650600000600008200 4006006046006006004006000000000000000000FF6582000000000000001A018AB8822C00AB8AB8CB80002AE2AE0062282A E2AC2AE2842AE2AC20600C02E20428208E00650E2AC2462802AA2AC0002AE1062AE2AE2AC2AE000000000000000000FF9E4C 001000000000001D5415593051011195594D80005564860060A255641255644255649054C02425654E52635051603655044E 4D045255600455650E556556554556000000000000000000FF764480000000000000190980181000C001801801800200600400abc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00080602E004 8361070278A6824006000000000000000000FF96F00008000000000018318018A00040018018418001006806006004006000 0061100468041260060540560CC0260C414640414F104006006002006006006006004006000000000000000000FFFEA80000 00000000001D02201C04100401801805800200600400601600600600600600600000E0110849060060004024120040060300 0200600400648E006006005006000000000000000000FF1D960000000000000018458AB8480280AB8AB88980022AE2AC0063 A42AE2AA2AE23228E2A831600420421621628E04A0060AC2062042AE2AE0002AE0762AE2AE2AC2AE000000000000000000FF006bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (342462120080 5244804AC8620000000C42A1000B208404C846002002226008026016526AA6046006000000000000000000FF2A2980000000 00400008804418000000418018018001A2E00600708602644E007A4E2264A200440180602608C08002C00601411600F80300 4010506016206006006006000000000000000000FF4CE4800000000020000C81C01C205084018059059800A2E9540B649459 E026216206106A8206408100120400401E70400204428E80700240600128E006106C0701F006000000000000000000FF73C1 000000000000011C01801820608481C01C0180000072070A40450060044A608400F00D30608400440E42420000432600524600ebc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 001120001803009001883803800040600400602408628008602010620604428000413008000800030A084000008008126400 136006016006006016000000000000000000FF80FB000000000000001281861809501003001801888020E5C4086684206008 14638018E0262240280042403004262204C202408001420009E02000E30600600608600E000000000000000000FFBFAD0000 00000000041C00001800020201A09C81844000744F22601702602224000A04090200600025008803250608A00400C0061020 834043081060072AE506006006400040000000000000FF9084800000000000011801C018002000C180590580000060140170001bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801000000000 00000000000000000000000000000000FF749580000000000000003000020040000A00000000000000300A02080000100061 000260100880000001100080460200D0006080010048048480000000000000010000000000000000000000FF170200000000 0000040200041C01441003009801854000E08C10210C0060244000140501264042A02344000000A64B000E00C08008048621 60C00060060A6086106006200020000000000000FF33FE00000000000000042180180B01100188390588000064442424444C 62940C03440004060040080040404B0210000406124000014014046010026206406406006006000000000000000000FF29F0009bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A28A28A2222A A2A220200002204228208A3022CA2AA2A22AA0221320802AA2AA2AA2AA2A22AA000000000000000000FF3EF5000000000000 00842220022000000040000000010000000410010003200000A00001000000008800C08082200092200000100A4240800001 000001000000001004000000000000000000FF18E90000000000000CEA448AA8AACAA9208AA8AA80002AA2421020A22AA240 2C820028A2B227200050A30223248A29A2002AA23A2220026024002AA2AA2AA2AA2A02AA000000000000000000FF28CB0000 0000000004010380000180190100000000000001042080040001400460480060040000202C40241042060040000040001042005bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000888 108AACA88888AA8AACAA80002AA2AA212223AAA00228A00228A2022AA00000A0122622AA24A00A0AA2AB0120022AA0032AB2 AB2AB2AA2AA2AA000000000000000000FFF4AF00080000000000050840120040000040100100010045084009408040040041 0C00000008004101440D04004002100400000000431080000100400500480400D004000000000000000000FFC4C610000000 0000125C81D55915F33D55D55955800155755650755655601655441655744E55600924D20550611750608E5564C620411655 6300556556556D56557556000000000000000000FFE1A50000000000000888008AA8AA8AA84C8AA8AA80002AA0020322122A00dbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000040 0000020000000000000000000000FFEC5200000000000000000404005008001A000300200000080188080025014000004100 08900C00000103D1800010018010000000400400000012000628C40400000000000000000000000000FF6F72000000000000 02043040020004400000000000000000000B0080000088040350041000000000A01110888001020040200000500120000280 801000800000000000000000000000000000FFFB551000000000000041020000042002002004000000801000000810000420 0000000001480000080C0220000000100480000001050210000000000000000800000800000000000000000000FF5DDE8000003bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04454E006507 C8E22A40E4C6204406C260060D430EA9681043400014702F444006006000000000000000000000FFB61C0800000000210010 0020000020522510B0004220A800046340D4A04605D94A002E00C0880B881202010EC020090011CA5A000240880040018044 00004804044000000000000000000000FF825B1080320048C0C8095090C9108408808308D0952010A08220208A08352200A3 02822422402000493002002802A2300202A48240A008A02000123002020002002000000000000000000000FF255700000000 000020000020004020400010220000000000000080400000004C084880080001052B8008404202000000082800081000008500bbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080080080080 0808800829000900A00000280200B01001408000080204200200200082201200600280200A082083222000002AA800200228 6202000000000000000000000000FFB1501000000000400000000004000000040102002420400001220884200C3000081050 0111040548010AA0110820080540800408000310800800000000000000000000000000000000000000FF173C000000000800 818804858C40800A02804800800090300200A80A04280A10244A00200211B821182002642992812AA204208A0020000022A0 00247A0C2802002000000000000000000000FF757D1100540059419019519159518C1B0984D95192C01171071041075040C6007bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (046947006007 08E080000000000000000000FF0D1008000008180180180180100100180300B80400A022401600A40C228004000006000054 2061000062061021062260020804A620600010200020E006120006004000000000000000000000FF72090000000000000000 0000000000000000000000000000000000000000000060000060000000000000000000060000000000000000000000000000 00000000000000000000000000000000FFF5D300000000100000000100000000040000040000000000000000000008000060 00806004004800004800800806000004804000001001000000000000004000000000000000000000000000FF52410000000000fbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A408004C4123 2008650651600E0008A400234200E00108A2000060A5100006114100000000000000000000FF9754000000081821A4184180 1001B5180510B815A0800641060CF00A26E09400600E206014076008B3A106804086287202184408A0600054200232E40402 0016104000000000000000000000FFCA4D000000201801801805A01001A05A63001801A02000600620602690740C00E81600 600408600200002E00600002604000C002886000012002006000000006004000000000000000000000FFF0F7010000001841 C01801801209001801021811100008680648202000015441014748080492F430D528CEA1081010650400880E0960010024000007c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (809800023A21 851A251458750000042446401600A406070A7484A0E144106868142006004146A18CCC2560B8146700146001506004006087 126000000000000000000000FF340B0000000018018098C8221809901821801E01200180280E909001401086026004246204 C4F29000188600E208000114506000206000206048006304286056004000200000000000000000FFBEF30000000038018019 10201B11803801425801848000243730800C0108A6000425820344282A80042C4600CAB004044602A0032C61010020284069 0548E026006000200000000000000000FF3787090000001801801802001811805A0104180BA80048300E00020510022640100087c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (160040060000 00000000000000000000FF91A8000000001801809804021861821A10081809A0801025260040028A630F0868350160400002 911102070A4000000416710026116000202004A07086984037000000000000000000000000FF172200000040180180980000 1801821D04201809810000200608540408040C086426047B0720C14400029400A006081006005054846200C0000440608684 4047012000000000000000000000FF45EA000000003E01841800205AC1805800001801828000288602400800904C8868C601 680880400400E426002000A200060002A6006000000004806006014086842000000000000000000000FFAF870000000018010047c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (64A043000560 104E030088DC680611CC1410E82010400D00601702400700E020000000000000000000FFA822000000081801841822201881 85181174180180002078560164420274342262B6C47A06A00000886B2531122740652FC240942A740041640410602E004006 342100000000000000000000FF3F61000000001801C01802001A11801815011A41800410630701704220F0C4056216046146 0200300AE094800A08807416044104036A0000400410680602400F012000000000000000000000FF3134000000001801A018 00221A09801800089821A20020202600C02622E0264568840060068404064400260C4416440006025B04006001902002086000c7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00201A018418 01041A012000106006806406045002006082846440024004484012A0C1015042144100063162060060140060060061060060 40000000000000000000FF1039000000205804241880081B0591585050580504402060A8896906C0681720F032406916C8C2 1400852200443600408602108604704648E40409612E2060060A6080000000000000000000FFB17A00000000380181984401 1811801A01803A03802005600688284600644604640400600808820C00E00614000600684600401400600108600000E88624 4086416000000000000000000000FFF12C00000000180380188028980B883921201A01A6004AE08610248720600640E905010027c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600000 0000000000000000FF67C5000000001800001800001801880101809811815040603400E08E01604A2264042263004144C000 20A4004406000086000006006406006004106006206006006000000000000000000000FF80E5000000001800001800001801 8018018018010000006006006002004000006000006006004000004000004000006004000006006006004000006006006006 006000000000000000000000FF70340000000018004018000018018018018018010010006002006802806004006000006806 804000800000004006007004000006006006804004006806006007006000000000000000000000FF9D3C000000301800001800a7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A66B906A296 01626685628C0873AE0C6006206540806486786006006000000000000000000000FF17F10000000018802018002010018142 0181184115008564461469201261541564109165063148A500AC20B46A0828224601140741600600600C02610E8060060860 08000000000000000000FFA60B000000001828019A224014418202118038091CA0116202B27024106B0020686000684880C8 04202000926006A020061000060062060060050A601E906006006000000000000000000000FFF959000000001C4A40184408 1811840003905943800104650444644342640608E09480E0100A400822AC1422504040A41700032E086006406000447486000067c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C7190180510 1901040069E8021060048060028080068000060802A282605770422E29A20480600600700680400040660E00600600600000 0000000000000000FF47D6000000001800001800000801801801001E01930000701000E8054068430C085700008200600100 A84600400084200500FC06406007006028807106206006086008000000000000000000FFC0AC000000001900001800000A01 80D80000982000000462420A614812789600640632E200A0E00800640F0AE000006024806106836006004280826806086006 006000000000000000000000FF930F000000001C0000180400084180188800982280005A60B801E2986AE0AE0AF2CE66F2A200e7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806000000000 000000000000FF90730200002A192052BA40245D15A09A0BC01AA080001068A000632080F025100242810C0350EC008D6402 C268C8822806432286006A86C568004060564A680E206100000000000000000000FFE868000000001800001C001018019038 418C1809800020601521601748609000E01620612882011020200600600100E2A600402E08600E08604008EB060162860860 00000000000000000000FFE6B2000000001800001800001A01E01801E0180180000060058068020060000068060078028000 00002806006006006006004006006806006000006007807806006000000000000000000000FF9BE1000000001804001802100017c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000836060024 620020A204290308300255A010082042007003082080000000000000000000FFD6A800000004190010205598001018211102 002400000804014081084060600160404060A404C08821404104000601040110C0A000000828002000818002810000000000 0000000000000000FF20790000000000000000000260000000000800000000840100200A0028618050640000600800020006 0010330096400241000800800000000402000000080000200000000000000000000000FF894B000000121800015800001981 801821801818000020600080605400E00408882220020633000000680240600616A006A3260E016086026000806A06B060060097c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (881909901889 800008629600600652604600405400604600440040E48C896006006116D342060160061161108060A6106486006000000000 000000000000FFE7EE000000482880414C14C10C00C00C40C00C248000023002542D5300348B29250320340B4B31290C2023 44342B2CB44200212220200324340100320B002002202000000000000000000000FF65040200002042A02A022021020A2082 083002C000009008381414A0900C1880081C800C00880C50D08900000808800910400840C00200800900A00C38800E88C000 00000000000000000000FF5B21000000080800008800800800800842800900800080208300300404200000130200A05240210057c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF41B20008000AA0AA0AA0880880A00AA0042AA0A000000002A82302402202002E83802C82402A0000208D288A80 883200402200102A80001100002A82204102A8810000000000000000000000FF9895000000200800200A40A00C10C0088480 0A10800091280310200290B04300282282288280282108208240280280B002912802002002C0280080288280A8022A200000 0000000000000000FF71B00000002004004012022242034004504012020000A450008140CD00109500480C80083081480084 0C04000C40880D48004CD5004004950C00004814CA5004814000000000000000000000FF388200000004180010182190589100d7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80410D000001 0200001000000000000000001040020000220000000000000000000000FF92170000000AA0AA0AA08C0AA0AA0AA0880AA090 00003202A92400882282A82892A82A80082200001202A8300088A20008088A092A80002282002A82C90802A8341000000000 000000000000FFEEB700000035415435431033433435409015430C0000A40D50CC0400CB0C10D10C00D10890D50820A41008 400D50C40890D50520550000A40C00D50510900D51100000000000000000000000FF85530008004004004004004004004006 420004400001001000100C211010010400010011210890104010010490200811212000A000100110100100100020800101000037c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (430012000000 80100000410C8090050040008010308A091004480492C800880D4CB20104000800800C00000C44CA080080C8000000000000 00000000FF694C000000000800000840A00800800800A008D080001020028122221420020028020420820020008820020020 0200200201203200000015200080211200A002042000000000000000000000FF52090000000AA0AA0AA0C80AA0AA0AA0884A A00600002382A82B18002002A82A82A82886002081012182A82006A8238400040A00AA80002000002A80000412A828000000 0000000000000000FF167500080000000000002400000000022040002000000880000010900001400000280002000000001000b7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF35D240080000040040804858048040040140403000C108108100128942122111168000100124132900100504421100 1001001001001001009001009019001001001000000000000000000000FFFA76400000000C00450800C42C84C14C00C00820 80810C353300300302343302314214B31310343300320300240300320300302301100150300308B003103023013000000000 000000000000FF6F2D00008000980000380980181190190D001801820020600610E4AE09608620400620600620E00034C084 51400608E00600E10608000800E00000608600E006006000000000000000000000FF90D700000020040020020200040140120077c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (14220E40E006 0862064800000D640002C046104004006000000000000000000000FF9C4A0008000000000200540C00000480000001100CC0 0504A00A00001562001061203060C00204480102000080A61000300001200200000900A04500201082000000000000000000 00000000FF555300000000180002102184500209209000400804004404101080403061083160242CE10C00C0804945005080 061104000000A009001000400010008010C040008000000000000000000000FF19C400008000880000680080080C80090680 0800802000203201040440A1400204120026021B200002200202240A05210001A0020001002C20000024020020020020000100f7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (182C80000040 8600408A00001004600800633620604000605602E20644208600E00600000010200000600600600400600000000000000000 0000FF9A9200000000100002180184388D813903809880090002420644E08620420002600010630E0CE00000021600E14000 200A00E00602008000610000620600E404006040008000000000000000FF2DE100080000100200180580388988382882F810 800039400420008001001C33810000800E20601000618A0A2008346742086346298000006240404006006184006020000000 000000000000FF7D8000000000000400382990180192185084180002202041500802040A4144200450210026406220008002000fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFD763400000000000001801001801803E01001801000000608000380200228600788002609230A08001682E006200144000 054006000000006008004007806006006000000000000000000000FFD1BB0000000AB0000AB8AA0C38AB88F8810AB9408000 2AE14E2AC3142AE2222882002E81024B24002202062160881840042042AE2A82A86620002AC2AE2AE2AE2AE0000000000000 00000000FFB83D20000000000000180101180180184500190180000062420040240020820000C000000200AA001080868860 260144500C400600000000E820004006006006006000000000000000000000FFCD8100000000100000180082180182181180008fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (882002AA3242 AE2A82A82AB0002AE2AEAAC2AE2AE000000000000000000000FF379100080000180000000100400180182380180300040064 1200404400608000600E00604404400001291110002600C4160A600600000001600000400600200600700000000000000000 0000FFD857000000154800154155114155951949955945000055644A55435055200C51644E51642402401414250155015040 C552406556550550556004554556550556556000000000000000000000FF19FC0000000AB0000AB8AA4918AB8A9C890AB808 80002AE0042AB2032AE24E2AE34028E2121020402A622622628E4201202142AE2A82A80828402AC2AF2AE2AE2AE000000000004fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800010610243 40420060040065560260040140204821200080060960860460060000000020C000E00614E00E006000000000000000000000 FF55620000000008000000000000018418C180184980040062D200410A80202000603600633420410814202080002008E006 00E006000000002810006006006006006800000000000000000000FF92770000000018000000000240018018058018040004 0060060044440062020260040260000080000021140042060440020840060000000020000060060060060060000000000000 00000000FFE1390000000AA8000AA0AA2C80AB88BA0D8AB89000002AE0062AC8002AA0CE2CE28028E0000A100060BA042AC000cfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF9F C2800000021801800150001801801821801883000000411608E00600644600610202604C00C00040400E0062060160360040 06006006006000006006006006004006000000000000000000FFD89D0000000AB8000A80A80A80AB8AB88F8AB98000002262 320863062AE2862AE00428E2A02A000002220A22208E2262262C42AE0000002AA2002262AE0063262AE00000000000000000 0000FF63B1000000000800000000000001801821801821000000E00A00608E00203200600600601000030400A00210222000 600E014006000000002004086006406086006000000000000000000000FFFAED000000001800002002004001801801801813002fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E4062AC2AE00 600644A2102AE2AE3562AE2AC006000000000000000000FF844C00000000380180482400280180182180180180000160260C 60020001000060000060040080000480060244000061160860060060060044400A600628E006004006000000000000000000 FF12890000000898018AC0040A88AB8AB8958AB85180002AE2262060920AE0882AE22828E3042C45080C428630C0AE2A6086 2AE2AE0060060964802AE2AE2062AE2AC006000000000000000000FF4396001000551801950B101519559559119558350000 4C648640E44E5504365364D253654C5463403064C8516130556446408556006006554106416556046456554006000000000000afc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006887006050 20000000621442728C82E00080640600600000600E00F10F006006000004006407807007006006000000000000000000FFFB AE00080000380180200200400180182A801825800200623608E00440649002655400702414600C4860201340064060CE0060 0600600608008000600610E806004006000000000000000000FFCB97000000531C01800B00000801C01800C0181100000040 0604652000000600600400610C00E08000E108006240126C0680000680600644200880600604600600600600000000000000 0000FFCD420000002058018A82280AD8AB8AB8808AB88180002AE08624644C4AE02628E0042AE20420620003624024608E00006fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFE23980 0000001821815004001A01801C01011885008001408608643405031644844A2312C600802028C24200601000640600C00600 6000002000006206006006006006000000000000000000FFF58F800000001881803C00001841801901109801004000E04614 600200040E026006006027200101A9610813610824E045800006007806406001847006006106004006000000000000000000 FF1167800000403C01C01204001801C0182140780100201E742661E5021561665161C60170072000C08040C20060E63A7424 80008E80660620600113E007046886004006000000000000000000FFBC9C000000403841E10800000401805C20C01883810300efc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (21612E406092 2020002A6002086506106106000000000000000000FF4D9F000002001801839A030018238418C5801801082002602601608E 00E00000602600608820000800001000E02001600000E00E206088202040006000006216086006000000000000000000FFDB D60000000099818018010A18C1825923901800820008E60626E3025200A83060062A603004022020029215608621E01A0062 060060020A20001A600204600E004086000000000000000000FF7362000000401803C03A000038118018012D593500810060 0F00602450600614000A00020100010005004E4C60061065444050C691600000242040682690E88680600610000000000000001fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000804060 1000610004604C0140002040C40000060005140100000004800100C0000000000000504000000000000000000000FF61A080 000000000011060022C000000000000012000000000000002802612004602800630028023015041034840600004002000000 00485404000004C8000000010000000000000000000000FFBAA1000000201801A01C01405891801801801810050008402642 64043080100000125200200002880004062AE0061061320064060960000C220000602200E006006006080000000000000000 FF26540000046098858450050A1843801881953945882004E2160060C80461202C002200030E200040448142006140406404009fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF3C28000000 0AA8AAA8C8AA8C8AAACAA8888AA90880003022AA2AA2222AA2AA2AA2222AA28220A0200A23024C228A2AA10A2022AA2AA12B 0AA0202AACC22AA2AA0822AA000000000000000000FF184900000040000000420045200000004240002C0002000000000014 02008000100C0010290A0001200128000240000300021000000100088080000001004000800000000000000000000000FF2D 090000000AA8AA8628AA8850AA8AA88E8AA80480020A22AA2AA31008A20028820228A0521620004020520020AA2AA4022C22 AA2AA0024021022AA0122AA2AA4622AE000000000000000000FF1F4B00000020180020180180180000002000012000004080005fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000201100 91000008000800000000000000000000000000FFF3DC9000000AA8AAEA8888808CAACAA8888AA80A80022AA2ABAAA00A2AA2 8228A30A28A0030220000020022AA08BAAA0420222AB2AA2922024002AA2232AB2AA2AA2AA000000000000000000FF7D2100 0800400001200400401201201020401040000205000400400400000400511400100500020881400000804000402009080400 4400804200004801004004810004000000000000000000FFB86F000000555D55951D55D01955955911D55881800055755655 654631643455444455750441644914D40655611655701651755655644644401155654E55655755755600000000000000000000dfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000001A0020 10000404088902400808000301001080A0000040A08000000000000000000040020200000000000000000000FF0499010000 0000000040040040003B81862802002040400460008000001440010009008480060000500840240140A21300280010420000 180100000300120200000400000000000000000000FFD0EA0000004002000022204A42004000022000800000000800000040 000040020000020300280048150410000400000040300800000010020400000100800001000800000000000000000000FF03 5308000000000000000400000000002000004000080000000005000000100000C00008488104012010C0000040000D100100003fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F10000000818 0191580180194594D135CD581188825168CE15641650655784401641650E49600010680640E01645710E28442602D2000162 00006257026226006006000000000000000000FFFDE702002000002000000002021840100108140102800CC00402C0848480 8C685281B4886C2486690200002C050938844008400040480010422808002402408C44C404000000000000000000FFB03500 000010080091280080094280481082480080004020030C340A3220CB02200230202320200080200280221200281280240280 240081240000204A802002202002000000000000000000FF1F3F00000000000000000000001000064000801031001318880000bfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000080 0000000000001000000000000000000000FF41BA000000000800800800800810A2888480080084000522AA00500080200140 080210A20210200080308302201210A80208200220A000080080002084084102012206000000000000000000FF54CB040040 00014010000000000020000010020000405000000308840082B008821020004C048A30B00000A90000800000000008804800 004230820000000008000000000000000000000000FF3B47010000000880884804844A00920C00C18818810202208A802803 80200200310A08298248200005A0C280A74246211B80200206A00086200012204205A602003002000000000000000000FF57007fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (826104200886 00005711644032408A04E05080604304600600420080028800688CC06806006006000000000000000000FF8AE10000000018 0180180180380190180180182180001062960441240000240304464002060061000120060064060061020060A60000000020 0024E244004206006006000000000000000000FF61C900000000000000000000000000000000000000000000000000000060 00006000006000000002000000000006000000000000000000000000000000000000000000000000000000000000FFA98300 000000100100100100100100020020040000000010000000000068000060008060000048000040040000070000008040010000ffc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000188180 1840801800281801C158498000006046C04A0400688220088840000611240128701602840EA0100700214400040000629004 594BA05406006106000000000000000000FFC19300000004180188100080330B219811801C01A0000A63C7826CB22B082042 E2260862860068A800A0028060B61872E23860060D1100600000A1E050082006406016000000000000000000FF77B6000000 001901801A00801A01407861985891800100700E40F00E51F00000601610692E00681082088100610056641A526006960000 400000806200106186006106000000000000000000FFD319000000001801901841801815811801A09901C00002602601420800002040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000806006 046506007916000000000000000000FF95160000000410218611AA001000281AB3881D0180024062166CE0020460860768C8 81619644280800601A2C008680028626340C206E28406003016102801006406046000000000000000000FFD3810000000018 238018080019200898C1C01803808212E3261060228000062064082062060820CAA06080B0832000010E5021410071118260 2000405200600602E006000000000000000000FF4505000000001005801800003842001C01801E858321CD68160240248200 02008A20310C2ED420C24061220482408000170024A400400084602000610204148602E0A6000000000000000000FF96400000802040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0200640410E4 2E2A0408084000010C06040446044000012080204101806202082086026006000000000000000000FF1E1900000000480180 0D04820801C00809805809C00000611618400002023F00E0440CE90600024005C1A0000040C38216804240D0208008468418 71F6002006486006000000000000000000FFBC46000000000801800C00800801800911A11809800088680680C824406CC040 E004006806014082206848000006000002C86407807000084050006806006406086006000000000000000000FF1DFF000000 000801800844804805800805881801842800680601440880808400608490684600480080484680000808042200681622A04000402040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004803880900 0800A382088380D921C80000608E01E03620800A40682700646E38000074680101E00808F2070CE04020200000E084027006 100186006006000000000000000000FF36FB100000244A01840210604801809C29821E01A130027C062270020070040B7C86 44708600DB0002E12E086C27006032206227016480004230004002001046106116000080000000000000FF7C660000000008 01800802000841A01D41811841800008610F0064A240108000644682610EA4C0AA00601700622040702A506006492000A040 28004C16000C06226006000000000000000000FF9775000000000001800800820821A018218018C18010006006005514046000c02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000068070020 07006006000000000000000000FFA6CE000000000001800210200001809840829A0180020464870260064100020061062060 9050200440100600621000604200E04680680000E004006206006106006016000000000000000000FF308F0800000440058C 0020204045841885803B21910300600EA9604E007897517416056C208425008B008C88E046936006D06D0EC16C008864A845 6016802026906006000080000000000000FF9059000000200201800220100101801011D83881864100700688600E00608624 604E00E20683000008604600600602641400608C062100E8600020E20A60001E006106000000000000000000FF58C500000000202040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (625632692010 42045008268400201442B140480704E040C56004816006003006006006000000000000000000FF7CDB000000000001800800 000811805801811885835008642648401455640200E10601621004C00000000641049620600200C00E006000006000446406 002006006006000000000000000000FF46E30000000008018000000000018018000018018000006006006006000000006000 006004000004004000006000006002002006006000004004006006006006006006000000000000000000FF61AB0000000008 01800000000001A01801201801A010007006006006006004006000006804800000804004806006806002802806006000804000a02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000088000 00101821C11091822102E2CE6CE02E2AE22E2AE8EE4A702E02E7680A244C23009E2842AD2060064680202066000060038030 46006406000000000000000000FF8FC6000000000801800800040A01A11AD08C1A059101286416114494C5055492ED001165 5235000C42410EC400C00CE09201000680E04000E014006007026206087006000000000000000000FF403E00000000080180 0A10000A01D0380198BA0BB88029601600440400604080720080608260005024403600002682600200800E00600010E40022 6006006006006006000000000000000000FFA56A000000000041800800000805851B40A05851800042608605512500010E3400602040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000200 6006000000000000000000FF2A5F0000000000418008008008141D1901A81841A00000604604450480610B001006C1040490 6A00A23028810C8E806086806006A0A00094C000016402022206006006000000000000000000FF321F000000600001E00800 840800611881801C09800048645600400540080302010748028D007089002084021000016002016007000020006200006002 002026086206000000000000000000FF3EA9000000000001800000800000001831C49003910000600632E2960304A608E446 00E04634E0400022064080410A6017006806022000804010806002002006006806000000000000000000FFCB1B000000000000e02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000A802000 0068000861064160260020A62060002A6400326024004000806006000000000000000000FFCAB7000000280B41A80A8CA82A C1851D05A95A939400826CAE224CA482F025300A00808C4A082C30A86540906800806912A92A2ECC60008C6A80D06B348049 30227246000000000000000000FF5A0C000000000801800400808009081829801A01C00250600601780608628800E0810860 8220E00002F0002460492C402400210600A22040601002600092020209600E000000000000000000FF279200000000080180 0000800001001801801801A0060060060068060008000060000078020060000068008060060040000020060000008060000000102040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08808008408C 0808088C00920010310B0000C000202010010000200204224040200200200208218220210210204000210008249205240A00 2426000000000000000000FF351B0000000018018019418C1801800280004000000028000040101017E11000E40008EC0021 81000E4484000066060400080000C640008000080002005A1200400040000000000000000000FF0F50000000000000000010 00812060803400208400014002308112000066482072000060E000040810123001000E000008449208088020410281010100 0000001A8000000000000000000000FF59E60000000009A584080E802881801900841909800000604622400400008449008000902040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00000804004 000000000000000000FFF09F000000001801801885821801851801803801804080644640641610650E004004106006004400 43600440613642600640600608602040600000E106226A16086826000000000000000000FF20BE000000440C84C44C50C00C A0A04D0CF209048C0028208A80A14322B02328A2C3203A230330A908240B03300300B503022083A5221110B48008340B10B0 03403202000000000000000000FFF75A0000002C02002842002002084340025004020C4082148100C524C80800800840D002 00884830A18800E60810A008008008000106101008008008088000B1200A08000000000000000000FF8F200000000008008000502040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010910012411 41001401101080000C20101001001008001429021001001800000000000000000000FF16C40008000180AA16004000008220 00AA0AA0AA00062A82A82102104882082882302882A82A08204800A8220088220128200210200000100000190220160AA8AA 82A8000000000000000000FFA53E000000322A00A00B20A00A48900800A00A00800080280204A80AA0284304280A80280280 2010A0300300AC0288300294208280280000280880290290A002002002000000000000000000FF6EDC00000020020031420A 34C20004D2010002010000004804104944841105004884820000814800848A04900820810C81010854128000AB0800A3481000d02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04200820A200 0000000001001000001040000050001000000000000020110408010400000030050040088000000001040001009000000800 000000000000000000FFB27F0000000A80AA0A80C00A80A80002AA4AA0AA00002A82A92A80B00880082A82202A8AA8240030 1104002A00A8230210A310010200002B00002A80001082A82A82A8000000000000000000FF0C910000003003542003103103 420C01545545540000550551540500950D00D504C0D50D50D510108208A0D40930CD0A00D00C80C40800430808400D504005 50D50550000000000000000000FFD01F0008004004004044104004040102000004000003001000800401200421000101000000302040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060000 00000000000000FF647A0000002022002002222002401012012012010005005004004844C008090449148400009408308492 05114820810804090004A00804800810804810A44804805004000000000000000000FF03CD00000000080080480080080082 2800800800800000200200250A00240200200200200200A000202002002202082012002CB21220021080000024A211200200 2002000000000000000000FF2F5E0000000AC0AA0A808C0AE08A74C0AA0AA0AA00002A82A8AA90000E91A0289230288AA820 00000800B82300882202E0B201104180002200012A81004002A82A82A8000000000000000000FF594E00080004200000A00200b02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A04008210208 20820C202242204200200001000040200211A002002006000000000000000000FF4696400800000000000040000000400440 400400008108108102D2C84094A1001020021081381028201009620010001001201081001001001001001601005001001000 000000000000000000FFF58C400000020800800800800904D00C80C40C40810110B5034031020131334934324CB10B403028 40340B0820420032134030C300300308900100308B003483043002000000000000000000FFD85D0800000038019038018458 0180380590D801942040604405620E12600604408600622603600011604404430611612404600E0060C6200000406046016000702040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000418258018 0980000060040040045084860485040044445460400140400802060060401040060163144884080060861060064060060800 00000000000000FF482000080000000000000008008000C00210200210402002800000000361160264402060002000882400 005102A62100900080802082201002100C8010240000200000000000000000000000FF504200000004180180180184580388 01420A00000C200004244000002C641651629051643004400001422400442E01048800004800012051000040013400048002 0000000000000000000000FF4A8408000000280088286084088084284080A830800020A0420001645024420200000120020400f02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680600000000 0000000000FFDACD00000000180101580004580000184584180180A000600008600240011600609000604C04200000410610 64460464800160064020003000800060060960A6006006000000000000000000FF3C98000000001801043800001840001801 90380580002062000060CE006006006000402004000280004000026020134410206126006044000000086016246006006006 000000000000000000FF584700080000180102380190182001580180186190400061440046080460567880C4190224082210 44C13E43211848432009400640608C2000004560E601601E006006080000000000000000FF3DAD000000001800001841841900082040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2B40062A428E 08C28422E2AF4000020002002AE228B2E2A62AE2AE000000000000000000FF48880000000018000018000018000018038018 01C0200060070068020002860060A600282C88810000420600C00000402C106007080006000000006080A0E0060060060000 00000000000000FF82BE00000008D8AB0B58A80858820AB8898898AB80402AE2ACA043040A82062A82022A82862826002A44 2822608860600C3242AE184000C000002AE3A02262162AE2AE000000000000000000FF916620000002380000180200984800 1801803801A00400600404C12C00604600004200400601690001420000C006114026084006834004048C0000601200600E0000882040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B8018AB8AB80 002AE2A82ACAA828808628E22228AA0624100438002C2266882AC40628C2AE2940002A94042AEA108462262AEAAE00000000 0000000000FFE230000800009801821802011815801831815801800000600400C04C00608602600002712604080000615400 E04604604E00400604A0040C8880007000006006006806000000000000000000FFA7F7200000155954955954155913955951 9559558102556554554D50350056556414533506C064044480AC54615055408444C556426004D501045564428864D6557556 000000000000000000FFDDFD0000000C18AB0818A80C18A00AB8838A18ABC0802AE2A9346A022CE22E28E34E28E21431208000482040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFB497000000001803801824001801801801801801805000650C00608220600600610000608E52E08010E0A444E026 0CE006006006092112000202006228006006006006000000000000000000FF358700000000180080180000180180184B8018 01A14000600400600204002C026094002126136C0402610410604000640E006006802002000A0400614220E0060060060000 00000000000000FF0345000000001801801800001821801881801801801000600680400400620600600602601600010000E2 04016006004146044006030000000100006010126096006006000000000000000000FF3B830000000AB8AA8AB8AA0AB8CB8A00c82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (044061501120 0640E5544125540044065562C6552556552556000000000000000000FF1BAA8000000018C380180000180580100180180180 0000605400640620600600604640400200040000200408600400200600600428A02600408000610600200600200600000000 0000000000FF65A40000000AB8A98AB8800AB8AB8AB8AB8AB8AB80022AE0062162160CE2AE2AE20628E2040060000000040C 408E2061062A62AE3602020000002AE0002AE2AE2AE2AE000000000000000000FF567D000000001800801810001801801801 801801810200602614E04E02000400604A04202400020444040C0044000064AE01600600004200008400608000600600600600282040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8AA8AB81102A E1062A801808E2AE28E78608C2AC40000000205421208C2AA3BC2AE2AC0025860040002AE2362AA2AC2AA2AE000000000000 000000FF4114000800001801801C00001801801001801001804200608400610200000600600C00004820420001202C08E400 2262520A600400200400408400600E002006002006000000000000000000FFB96D0000000AB8098AB8AA0AB8A98AB0AB8AB8 AB80502AE2042AE0A60AE2AE2AE00C0AC2A80AC0802B22842262CC2AE2222AE2AC02600E0044002AE2262AA2AE2AA2AE0000 00000000000000FFEBD1000000355B55D55B54355D53955155955155810055642C526446510556536546550482150086540500a82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF8CCC000000401809C01C08401821C00005905244810588780801014009001600604C12C09000000120E08C45202C0061 0E08703101202C406005006506106106027006000000000000000000FFEA1F000800001905801824001C01800001A0000081 0000640800012420600604602C044000D2808010E0A412A44400600600600431600C00650000600E00700600680600000000 0000000000FFF543000000401C11C01C1040180180020180080180200060A6000200040006006006204804000205442C0C00 2004006004806000042426004004006086002005002006000000000000000000FF3FEC0000004ABA21AAB8804ABCAB8AA0AB00682040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000C41400000 601302A10E2020AA00600601652610C046240000000000000000FF4D96800000001801801810001C00001801905C05908005 60444884001004A010002640421600E0C08028000304842440D000682200E40E000000C06406082087000806000000000000 000000FFBD1D800000001C01841800001C02001009821D018000026084406402040206126006004046082000005446002304 004006416106004006006000256006006007004006000000000000000000FFFDB5800800401A09C21C00401A22001A09A01C 01900109704416608242E14E03E186485426892159104A2620200444404720E006004406004000006086602C07000806000000e82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (811000006016 01004051654010040400400240610822652610441450600010610000610E00E0500860044065062060464000000000000000 00FF8A7D000000401849841ACC0018A004000180989008000060000060060862060060040041061460883160900840840660 00006044012006002000486004266046144006000000000000000000FFF9C5000000081821821822201A0200880D86194902 800061960060EE60808E0060940FC10E0860005BE1162042740860001A61B400206640C00025600400240426000600000000 0000000000FF6AF9800000401C01C01C005218104430838018018003486C140084040060200802460043062360020024500300182040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF DEC6000000401A01A01801801801914000054000008000000400808802600604600800410000421010800C08000400000C00 000C0284002001000000C4220004008000000000000000000000FF8806800000000000000600400400040000100042002000 00A81200004060060060C00060280081000002800500061100C00000801000900800000004081000C00A0000000000000000 000000FFA89D000000201A01A01C08501C0401590D851800030048628000048C0000100000C415421201600000600022C0C4 016000046008042046202100006006014006016006020000000000000000FF3122000000481E11E018800418A8001801801800982040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00F4365572C4 4D4556526401556D56B07D56557D56000000000000000000FFD05B0000000AA8AA8AA8AA8AA8A8C22AAA832A8A80202AA0CA 22220228A28A28A2422AA28A2A2488C0A4C22222AA2AA3122AA2222020821120802AA08200202222A2AA0000000000000000 00FF8ECB10800040020040040040020000000052002000408010401203480200000000002000800085100804490902002800 80001008000000008100800000048001000004000000000000000000FFC9730000000AA8AA8AA8AAAAAAAA8100AA90008881 002AA2022043240CA2E82883102AA2462B20002620323002AA2222422AA23220642202A6002AA04255A60A2022AA0000000000582040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000484 000000000000000000010000081100081000000900100000080B0000500480000000410000500000000000000000000000FF 5FD48000000AA8AA8AA8AA8AA8AA8C28AA80680080032ABE0229208A0AA28A28A2AA0AA24322A0002020222220AA042203AA A0020022AA0220002AB2AA0022AA0022AA000000000000000000FFFC0F800800400400400400400404501201401220000300 4A0408C02C00000404400400000480000088100501400000000000508412C028440001005211001111101004000000000000 000000FF5826800000555D55D55D55D55D53913D55811913808055611440400651655455455615640CCA600043790444615600d82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFD446 0000000000000000002002000002A400022010484800800204080000080000204B0020100000000010030010040800280000 000000000000000880000000010020000000000000000000FF412901000000400000401000000203830048A0102000040000 4000000019400000001102001014020200A0200080040AA8038000000020000012A000003E10B00000000000000000000000 00FFC93809000040020040040040020005040008008001210000A80000202000200200002001301003000212800082004409 20000D20200000008001001000121000051000000000000000000000FF20E80000000000000000000000000000000280520000382040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A2A128020220 83002020002082142192002002000000000000000000FF4ACD140010101801801D11901801901831C898258902A8F0CE4243 4655754400411634E506C8400281614640F4960C6116CA62AE2A60A6006002844087C060A600E006000000000000000000FF ABDA0A000802800200820202100505010522601240618042080B929800821C42C2682202F822D028668230A60A6069044881 08042040000CC2814A400C340000004040000000000000000000FFBF130A0010080800800888D00C00B00808800A14808000 B03220E8C2AB22C220290F00310AC02800412002002422C9200200255254210202200004300280200200200200000000000000b82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000400080 7006006000000004004001004004004000004005004000000001000000800800800000000004000000000000000000FF3BF1 000000000800800800802800800880A30A08800102A0C2B42802002050080308402002002202082802002002002002002802 40200200202A002082002802002002000000000000000000FF656B1400080400040080040400000400000002020000000210 810D100082818280201104A13490284484214204502800502008000401000885001248082000000000000000000000000000 00FF4EAD010000014800804810C02800A3080098C800C64200B0A200200380200208288284281280200008300399A00A85A100782040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF30490100 00001801015A01801C41805C0184100521000062060404AE80640042801400E04694601082E024CD48060404060848861068 06016228000456804116006804000000000000000000FFCC8A00000000180100180180180188980590908108200060060000 064000000000A408648E01004010640400420E10014600C006006006086000086106124006006106000000000000000000FF B2FA000000000000000000000000000000000000000000000000000000600600600000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF0AF700000000100100100140000000000000000020000000f82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500600600410 600020F0364D209608E006000000000000000000FF8414000000001800001801803C41C01801901801090000700022548848 608084080300011629081009200450201014020701600600600211644800708F80600E006006000000000000000000FF2E85 008000001805003801A419018A3A27A2128180204062070010661083062DE0A9406A2641083000620C53C3066100E3084886 1A6004046010041326082024006106000000000000000000FF6703000000001801009801A05801A49841A092038000006986 40000611610610700008E8064208000261B4004066C000020060060460060060008800066260C6006086000000000000000000042040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000881006 116004100000034094084A082B404000E006806006056806006004806106446152106004000000000000000000FF8D3E0000 00001005003021803909841845A252073D204669000200004067074C60BE4C07024060C0082225026C0000640160401E32F7 84046091007046813024016006000000000000000000FFBCB00000000018010838218418118098018A15414020087001B240 408210060062A600180380640002A94400708040602400400640600208610024E016087004006086000000000000000000FF 2DEC000000001000121003C018018338C1C8D8A1050010E140284000A40000200C020401060264200320950024208002060000842040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FB3C00000000 000180000180188180C001A03801811012E400012D1014780600600E0C01148041040108860C0800000806804887A1620400 6040002026002804006016000000000000000000FF9059000000000C07800801821A1D868069A01821808080600000200140 0216C07B020000849042901004100201880804120160161063042061240A210641A087106006000000000000000000FF76EE 000000002800800C01A21801800009829849C000006111002000006406106C00200041004A0500400740542834E146104806 0070064060050A20060C6090007004000000000000000000FF77B5000000000800840803003E01804081811801800000E02000442040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006014006000 4060266421C4086016000000000000000000FF80BC000000000883822CA1089D85C0D88180341100212A760608200F400807 00E00228601010422420090100000622E03688420622E304006105207807902000106006000000000000000000FF8E300000 00004800810A01821803A01835901855C4900068D783644690614E026281816408484085924226000086086C060040860071 485160068521068A2834446016000000000000000000FFA1F5000000002800800801001801801801835C01A0000B6116016A 960A000E2860944C682000400808D20F300C46A36327115116496800006004003126442008006016000000000000000000FF00c42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060060 06006006806000005004006006806006006004000006006004006006007006006006000000000000000000FFCCC600000000 0201820201889A03801841801801A0C008600200740690004700608640F2062064465460440060064C60061068848000C630 600600F106806006D46006000000000000000000FF449A00000000C085814081801B0189180DA81A51A4002404B209684600 710EC4F40E1068168C608400C48D28E006816407406C04C4840601600602602610680E006006000000000000000000FFD5E3 000000008001800447841801881901805005000000600604201600600620680E00680002400400808928810680604620400600242040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000001 900040845805911C41D00015C000100414956457340526126556086006826000806884316201054214004209100106006005 006006807004006006000000000000000000FFDD130000000000018000018018418218958089218850230024406086016016 40E00643654E516500486414026088004004414004200006006006026006002004006006000000000000000000FF040A0000 0000080180080180180180180180100180000040000060060000060060060060060060000000040060060060060060040000 06006004006006006006006006000000000000000000FF00AE000000000801800801801801801801C014018010004000006000a42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (065260000060 0680700640E006000000000000000000FF774B000000000001800011C01C01831C09889881A82048E2260AEEA62AE22E32E7 262A66A64AE2D071467E6C878840200A00A0072A0086006041106446146006016006000000000000000000FF768500000000 0801800801C01801C43821A950219000854150416156C50D564168365561561563048460841080001422421014D002001654 600C00608E206884286006000000000000000000FFD533000000000801800A01803A01809823864823850080410020600600 688708680E00E00E006004086044800000002002A0000404001E006004026006106004006006000000000000000000FFBE1E00642040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600700780 6006006002000006000806000000806004000006006003006806806005806006000000000000000000FF2AA4000000000001 900048841845901D01A85C1185014441170068160070000001060268266A60008209A1046000254405002C12000006006800 0870063A6084006006000000000000000000FFE39C000000000001800001801801829821C01821B000005806006007C00048 48900600710E00602100500000640080440410350204000E0070290062AE806804086006000000000000000000FF11AD0000 00000001800200801801A03C01815C01A00143615740E3360494868064D648E20701648828E20FAA8081942022802856000000e42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001808838809 4A8019418218059C1801840008C112486006200000000006006606206010000A300000064404000081080006060060401464 06014000906886000000000000000000FF8B660000002A0A83A90A91C31CC9A21805B01C318401004442846A068CED09490C 96D0E8070A68080002268808068088410290000410A6816A0082F056904A8C42E086000000000000000000FFCCA600000000 084180082288380181188182588380802A8005286006206006006046026287A062800C90882308264002085060CC10040600 600008628640E024106236000000000000000000FFE6FF00000000080180080180180180180180180180000060040060060000142040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880001080888 0800800C00000000000000000000FF33A2000000000800800810800800808C00800120824000340200220208259000000218 208200264904350262210200200222201200000200210000600230A400203002000000000000000000FF98D6000000001821 9018850020A010440200200810002140200200001470060974A04280010300000240440C400021C2240010E4080020000010 CA02A0400058038228000000000000000000FF23DB0000000000040400200200004402804200040008120A0020000002700E 60E2482000005001008800800180201001084000000201110002010080000003A0480000000000000000000000FF40FA000000942040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004800880808 28480280481488890883088890C004000904004802525004890835004904000000000000000000FF1EAA0000000118018C18 03801901881805901905900000440450600601600410C00650600610600001414400610610E046404134800416806000D064 0608E426006406000000000000000000FF0F78000000480C42C00CB0D00C4082C820820C008241B0A1130232A30A2A8B2034 C3003403A134B002240B44B023443303083A020011020830D004B00320309350A002000000000000000000FFA36A00000023 02402082003882082100402002820081400804940D408182009001008008000808808188088008408008409804008008811000542040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040440040040 040040240000040000010018110D10014000010014410010D101100100901100100100104100000000150000100005100102 9408000000000000000000000000FFCCF00008001200A801A0240AA0AA2AC0AA0C209400402A82202A03204A82A828820022 82A00000002A88802202302902008302A82A80282A80004002A82001002A8000000000000000000000FF175C000000280A00 A00A04C00A00802A00A08C40808100200A80288280280302294A80280284A840802243002802802822202802000402002A00 813002822D02802C52000000000000000000FF457400000020C2042C03084014012012012412150028004885010810A0000500d42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F082A8500101 2A82A8000000000000000000FFADCC00080003000008400000000004040040C0000100001100000010020840000030010009 3000000083000080000800A0B000000000400000000200000A0050000200000000000000000000FF7E3B0000000AA0A80A80 AA0AA0AA0C80AA0AA0AA01402A82A00002B00A8AA82A80082302001200102801202C02A03285082A8AA82A80402A82010002 A80000202A92A8000000000000000000FF679D0000002043542403303543545101541003400000D50448D50C40910510D30D 00D40D40048840D41048D40D40C40C10020D50550308550A00910D50C10A00D51130000000000000000000FF68C70008004000342040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1400400420E1 080064A400C00620600608403602000000050005640608E006096006000000000000000000FF8AB900000020023420020040 14002212012012010040004804A40810820825044948900800A848028C0814814910920B08804000000800000A0000100481 0888800004000000000000000000FFD85B000000004800800800800800802800800800810000210A08E10600200200240600 600604A00800A2421420020120220020028002000000000A20024A2442002802000000000000000000FF90080000000A8080 0AE0AA0AA0AA0880AA4AA0AA0000AA822040222228828828810232A2AA4000002404802102302000002A8AA92A80B82A800000b42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (82C8008008A6 840814868082802056241701106010200010149102128004200000221A2420020022420020120000C0008000002102002412 00A002000000000000000000FF834740080000010000000040040040242040050C08010090080000C00012C9200200088029 0010210010014000B0380491021109001021031001001100029221001000000000000000000000FF668B4000000008008028 00C40C84C04C52C20C48800101345240208205310B4C24C24D22D314344124B0131221220421034430031111410410514030 12423223003002000000000000000000FFD74A00000008380183180188182180110190D801884004400414401408640400C000742040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (264020C22060 86080000000000000000FFD653000000001805055842811803821835951801880014420800620E0A00300100860264360C60 D000610040202608802414C10600044030002000E046016014486106080000000000000000FF5CC100080000001000002402 800009000011400000000000404A021025604E2061000400C00801500A83200100885104100B00002080002004A002840040 80200A0000008000000000000000FF3F3E0000000018018058010C000000008A082020000000444034001014E02615603040 000054829042C1440B000804400C3001401480000002A8230310480000080000000000000000000000FF1F1100000008288000f42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60C600680022 602004000800401604A00E000000000800002006016102006006000000000000000000FFE99B00000000D801043800801800 00180190D80181002480460B60A644002604609622E0160060400123161141060281401040860000000000000020060C4052 004006000000000000000000FF43FB0000000018010018118418080818018018238000200085007006216006407227007086 00E0000A821002010600020000420E010000000200046086006302046006008000000000000000FF7E570008000018130298 098078098118218058238E000040C055604600660016803619E20E60E0000020462140364000160042865802000801000004000c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB8AB8AA8AB0 AB8058AB8000121236D1701608E2AE2AF0C700602E2AF02040A0C624C2A022A2A82422360002A82A80012AA2AE2AC20A2AC2 AE000000000000000000FF7A12400000001801001801801801801001801801804010700400620600000600642E20E00E0060 8042024E05000008201600201400000000000000200642E002006006000000000000000000FFFA1A2000000E18AA0898AB8A B8AB8AB8AB9018AB8120004A842067060C82882884361D66062AE6020C24103042303842062122260002A82A8002AAA2AE20 42422AC2AE000000000000000000FF97D0000000001800001801801801801801821801800008400C00600E00600000020600008c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C00600400600 0000000000000000FF178E0000000AB8AB8AB8258AB8AA0AA8AB8880AB80004002544861A608828E28E00E0060862AF00808 000420222029C2002061440002A82A90002AE2AE08400E2AC2AE000000000000000000FF06D2000800001800809801801800 0008018480018040214100046026206006006006206906006000100004006000002006082086000000000800004006006086 006006000000000000000000FF69A30000001559549558B19559541549558CD155810004C5000D60365505565561061462A6 55600C09610448255044254455620600055055000555455608654E556556000000000000000000FFAF5E0000000938AB0A58004c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006004080004 01201610E4260024040000000002040CA00620408E404006000000000000000000FFA7F00000000018028018018018408258 01805801805022C0120860462060460064260160060060A04164C42C610602608E1120D60000000001400060060CC0060B40 06000000000000000000FF1A5D00000000180080191180180180180182180180A024C15220E20E400006006B263164560068 0001631408A10E02614E0C21260000000000000060060044A6004006000000000000000000FF0B4400000000180180180580 1800001801804801801008680684680604604604600684680600608022002404200000400600E20C0000000008008020064400cc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (590190595580 1155812042E2200161161105165161065061265500042205485064565462264D454600600600014420655611400A51655600 0000000000000000FF0287800000001805801801801841821001941801800005600600600600604600600600E04600000844 80104C6096006446084006006006000208006006004202006006000000000000000000FF895D0000000AB8A98AB8AB8AB884 8818AB8018AB800000602202600608E28E2CE00E0160262AE60003600C0063262060062260160000000004003122AE404626 0042AE000000000000000000FF4795000000001801801801801813810801929001810208628021631602000602610652630E002c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806006000000 000000000000FFE5E90000000ABAF1CAB80F8AB9218058AA0208AB001000627006600608E28E28E45E0464362A8008020008 0062202141040022AE0060060000001142AE4760422AE2AE000000000000000000FF5AA60008000018038018010018298298 018B5801000210611652644622002600622E02620E0040C01040000360060160960060060060040000000240060260A20460 06000000000000000000FF781A0000002AB8818AB8B18AB80B8898AB80B8AB00B030630650E4CE2AE28E2AE0862860862AC2 801042A000E2262A60162542AE0060040000802442AE08608A2AE2AE000000000000000000FF355E000000555D51D559551500ac2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0108302E8000 0080289760510720608280000005E866006402806806000000000000000000FFAFA0000000401C01C03801411E01C0180008 141514000060A604600604000600600E00E40FA2403480D22C01034100B00400380EA0708C00800500740614600700700600 0000000000000000FF98AB00080000180D801901A01813945A00082001014022E08108604642602602642601600600430241 54C52D010802288E01200600600400010A294806016206007006000000000000000000FFF052000000401C01C01A41801901 8118000080010000886008216316000006006106526B0E00000008000000600090C425542006006007000200024006286132006c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A01881811A83 000004612E006486316500000216246546D0A010202C5200E04910508610642650680200800080611624620708F206040000 000000000000FF1886800000001801803809801801841C41921909034142E1120163364201004104060060CE022408C02003 0360A010441600510E006042100000006A06346302006006000000000000000000FFC8A3800000001801811C01801851801C 41841801808124620020600E0002C60460460C60A608A0013021070400002823060040060060239002001060962160960060 06000000000000000000FFAF70800800401C01C09C11A49C059C1B818079638841016012B3654650623E436526086A0700A400ec2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF4456000000401E0388B80190180182193580583180484461022060A611642801002E44E51604E0002364044405 1604000410431601600450000002C316006416016006040000000000000000FF54F300000000180388B8038C180182182399 3805802001640020602600602600612600E00E1260C002E01402020601810001404600600020000012C20640E00610640600 0000000000000000FFC2C3000000401801A018018438DD881809801829880020E64210600E12000E20E19605600650626009 658420048663000202C08E00E0900904001C411609601A006006000000000000000000FF54D4800008401C01C41C09C21A01001c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A2BA28A23220 200211A2AA2AA2020000A000C2AA2A22022AA2AA000000000000000000FFC900000000001A01801805000000002000000000 0020000144210310406006006100520308014040004004004000114004500000000050000000040000010010000000000000 000000000000FF4B438000000000004001200000000A804013402C0108000208080040006046026420010000000300000000 020108020550020000000080000400480000000120000000000000000000000000FF6B88000008201A01C418138059119018 0180188188080060560062162401002002060060264063080860A400802648000204600630610400800000600614E0040060009c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (118B5B558001 D5610E01411435655451410450412450608950652E5464475462864C65575564B60000105575565560065575560000000000 00000000FF1A1D0000000AA8AA8AA8208AA8AA92088880C8A880802AA48250A4CA2CA2AA2AA0822820832A23202A23223322 222AA8022222AA2AA28A0004003122AA2120922AAAAA000000000000000000FF69C800800040040040040000000000044000 000000C800042052044000000002022802020800040080100001000900000001000000000000040000100000028000000000 0000000000000000FFE2C00000004AA8AAAAA8088AA8AA8148CA80008480082AA0420600000AA2882884580404302A20002B005c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF5E1A080000000000000400000400000000008000000000114021031020004000010052030900800080814000001010 0A000080000000C0000000000000000000000000000000000000000000FF93F68000000AA8AA8AACAA8AACAA8AA88E8208AA 80202AB00202600608A28A28A00E016027252200273A0320232221B0522A3AAA2AA2020001802AA2AA2AA253AAA2AA000000 000000000000FF38BE8008004004004004924010010004021214000041004010000000000004004000008041010000800800 000081000D280000040040400000C0045004120440004804000000000000000000FFDB3B880000555D55D55955F55955955900dc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80220200A003 502A02002802202000A02800002802002000000000000000000000FF0D1D0000000000000000000003280800020800800000 810128420010800080000020021D201404900400001001000008800508A8C88000000002080A400100018000000000000000 00000000FFA51D00000000000019000410000040008000E0060200000851801000000040010C006081003010000400602280 40440800000441811000010400000000A303A0000000000000000000000000FFD52000800040040040000020000000004008 200000810002080800400400000404200100000A00881000089301010201500000008000080004080008000000D000080000003c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4820C4A04880 C201208200300210280A80200202A00800204A80204245228200200A20200201208000200207316228200000000000000000 0000FFA996000010001801889815801921801C13249803840013040F424516016094D14046436136CA63282150D642F50781 6887286C8C28E006A0600008602522F2A6006000000000000000000000FFE1860200A00000A00000A00030191011A17A5181 0A00A2114422D02C809A8C2E40A01A86290102A11C4E8018088C88802405404400102000002968468C284000000000000000 000000000000FF753600000800080081080A800C00800C10840800800012040200328201201233200708200A80A040D0A30A00bc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF70130000000010010010010000000000000002002000000800000000006006006000000805004000004004004800004000 000000000800000800001000000801004000000000000000000000FFE23A000000000800802810900828A00A0080092480A0 85008A0000040120002088100B210200A00802200A00208300200200322E8020028022800020060020020020000000000000 00000000FFADF00200C00000A00001200040800000C04C020008009008012451480012B1040B40400C481415401002801008 10101520000000408020000848280D08280000A80000000000000000000000FF60EF00000000080097280C8188A0800C0080007c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (462080060368 10C4200200620080E00299EE46006000000000000000000000FFA4F3000000001801210801A01C4195194191183180000004 17500440007210140504B0620C826500B56A3244C006B010462460C401000090E20000F03004608C10622000000000000000 0000FF3A87080000009801001801831801803811005801832031000600000C45004000000C01610401600800000208409602 8106006000000080006000506080006006006000000000000000000000FFB2FA000000000000000000000000000000000000 000000000000000000600600600000000000000000000000000000000000000000000000000000000000000000000000000000fc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (840080004E09 02140804000000A2A2E2CD00E2C900114000310622E8060A729485200200600031690304E81630E000000000000000000000 FF0A8D080000001A00401801801821801E890138A380A0200216A0102582F00802828A08E14C0060805200080AA086086026 207088028100114000886129046116106440000000000000000000FF2CD9000000001801118941A29805B43805BC18018208 45010608600A20002611702000680490E00850E6A200402E02058600E0202024129161002460025065278040000000000000 00000000FF0B36000000009801001801801801AA9A2120190D8000888006006A06806206096040206A44026200000102204000022040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF65 8C000000001800E008148018058418008D184D802000000E04140000000600600402400620000610400600400E4003060060 02106A06206006006002296046106000000000000000000000FFEC1A0000000018C1000943419801901BE1803A0984200401 467361A2B0700E30625E184C04A0311140640C80662E0D0806F4611609618631610004686604603740460000000000000000 0000FF1AA7000000001A81111801801E41801803C03C01E001A0800600704A40120FC0E4864150AE11342000692D0060C610 1007006206024814004000D0F08480628700C000000000000000000000FF67EE000000001840001809401A4180180181182300822040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00610E282A0 688600410028650E026C46804200000000000000000000FF6031000000001801800800201825903811A13801B00180040640 052400600620605630C00D8040C000C08A80005602680600E002906086006080417202816926004000000000000000000000 FF9E9C000000001801800800905813811860021B018D606009670610108600AF9969020444A74A4408444202008006416E7E B0652208600611E0009060126CE006006000000000000000000000FFFDEB000000021800800800801801801800A218038000 08000F80000400654E0472000040C4148009085406114807080006406846406006006001026102106206004200000000000000422040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (011006006806 00640600F80F005220100000AC4006000006CA604600600204E00662600010E02610E122A04000000000000000000000FFFC 41000000001801820800983C41E81810A11E01A1801A931E286596000C2748662229400208840402418E2082566060A70260 0200682610E005056806806B86004000000000000000000000FFC1F5000000041848C05890841885A21C0182182B92002001 2702E24B01620E246100017090021C880040060A10260164063061062A751600404054750692600601420000000000000000 0000FF18BA000000021800A01800C05C11895C01C05905A2020002074070220000060360D44C6C12410120D3400F0808069200c22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFFB3F00 0000001801A01800801801C01201801801000000200500680200600700600600600680600080680600600680600680000480 4806806001006006006806002000000000000000000000FF54B1000000001811801808101A0182100D221031A2008C0D2E10 604601105620604620608601608408600604602600E3060C0900000406004004206A26806426400200000000000000000000 FFD07800000004384194592004DA0590120180D4858900C020064362960060060CF30F10F456046408C0688E516406946006 C00800A8815683602084E106056006008000000000000000000000FFECAE000000003801C8082000991980180B80B881800200222040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000044004206 004000016026846006002000000000000000000000FFCE52000000001811800844109851805A414011503401454008144849 0A0D0E03654648684608713124ED2634E08602600E4000808012064160004C72A6287006004000000000000000000000FFD4 1000000000180180080002188180100381100381001062A640C28441602650601604E48E40E40008600E0064064062060002 10008006006000006006006006000000000000000000000000FF28B500000000180180180080180180100180180100000020 040060020000060060060060060060000060060060060060060000000000060040000060040060060020000000000000000000a22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (870D6012D000 8600E25604E08E00020880622E0C790E00600E506006446806006001006846842006002000000000000000000000FF261800 00000019018019000018018011089830020A200AE20822EA8A2AE2AE2EE0A609E0AE2884E862E2F61A62D626620E2064E600 E00620E100606046C62006002000000000000000000000FF84D1000000001801800000801C018018018081011000324D4435 4C10510D46316556546D56D100941162864460860860D6510088CC0006004214086006006807806000000000000000000000 FF3939000000001801B800008A7821A0103396588900C020488408402400600600600600620686020008600E00700600600600622040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFDD7F000000 0018018008008018018012008010000000006000006002001006006007806006806000006006006006006006804000000002 802000006006006002000000000000000000000000FF03ED0000000018118018440119118058008180410000220044004004 006020000416446806280000206006416026026807006EBA082000806000156506506006806000000000000000000000FF65 3E000000001801E01800601801801A80A8000100021000244044058114002C00865072468100A008E107C068061070A60170 06006000006288287006A07007006000000000000000000000FF8AD4000000001901A01880001A01E01200E015019002804200e22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (092004603000 10940160728000100000000000000000000000FFD08F0000000059058818008018038098459040811C003000040040040000 1000000600650604000005600600600600600602A94004000000200000601E00431002C050000000000000000000FFBCD000 0000209AC1A24A10B09895A21821A43C21010040088CD44920C860101089168CE826D00800346C0EAB724620E88E4C20B494 4812B2A80000E8AEB16C4084C200000000000000000000FFD204000000001801888820821821B0990B08128A480010424080 EA0604600620622620620E05700000704600610610622600C2002004A000200090680602680210401000000000000000000000122040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4160B9010161 9408808A70810800200818C80580AC0000C00004800890810801080880000800844208000000000000000000FF826E000000 000800800800C28C00800A000408008009002802140004002409000022482002382000022A02012002C03002002492016202 04A003402002092002000400000000000000000000FF9472000000001801848001C000000814B0021461404001016D2A1280 0670061060400400000280108801603208201090A00850241A40084A0000018004840460490100000000000000000000FF50 3900000000000010202004420803420A4020026000C00201009010007806886380220008000101900001008200810649A01200922040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000002002 0420024820100140031500100100800040048D4844820824044820810B0081084044C90C88480488400400402CC04C90C108 40004830000920894000000000000000000000FFC3BF000000001801941801845801815801801101004800C90C4060260060 0401400604611610600808601641640651684600491401440621600008609608E00E256130000000000000000000FFE0B800 0000402D02C00C40800A04D40932AA2E40AC0830204214210B0AA292D032A320344302B08084A142103102022202C0224214 302B0C3010C4B023C23543082400000000000000000000FFDB3B0000002082A02202480802A434010048010800880848904000522040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0900810800D5 0C50D50890A00800000000000000000000FF5B4D00000040040203040040060040060240040000C800000000000100000180 10210010811010010000C9000001129001000120001000001011000101001411001000000000000000000000FFB1B9000000 0AA0A80AA0000AA0AA0AA0000AA0AA00080002A82002100882882C83002004082A00008802202382A8260AA82A8A00010400 4000402A80802A8040100000000000000000000000FFDD2F000000200A00A00B04A00800A00820C00A00A04080280280290A C0280200288A8C284280280000280280280280A0030020828CA8228A2800802C02802A12A22800000000000000000000FFEC00d22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C82A8288402 2AA23A2B0010590A002012A82282A82A90002502002A80082A82002A82082A8000000000000000000000FFA6380000000000 0000000840000000050800000041480010010210804408000000280900080000202880000000000810000010505000281400 00000080000400048000000000000000000000FFA9B50000000AA0900820A80AA0AA0AA1000AA0AA00010002A83480C8288A C82A80882A82202400000212002A82A82002A82A84092803482A80002A92482A80C02A8000000000000000000000FFE51700 00003543543543421545543540423543540000800550510420910551510C00C20940D50801040CD0D40D50C08550D504808200322040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000010180180 180180180188190D0C1801840828600C40641608600408602429411408600048609608620608620620611401600610608000 6446006006006006000000000000000000FF849600000020020C0442022012012004814012002008800804894814C2080482 4D48800880008808C4C088920001000804804244948888000800800020800800801000000000000000000000FF12E3000000 00080090880080080080082A80080080C8002002042102002002002006006006802000002022012802082002002912002042 00200000290A002142002002000000000000000000FFE1430000000AA0E06000AC0AA0AA0AA0500AA0AA40080012A920162000b22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080100110130 010000004000000000000000000000FFD21C0000000008008008208408408C080081000882200820100004C001A440001101 00100801211059200A2124020021120120C201A062002000002202382102202042050000000000000000FF6F3A0000000000 0058000240241841840048445001010011210C52242010A12282082200210080010010014012890011010C10052000000080 01121001560799021000000000000000000000FF33BB000000000802C00842C04C00C00C00C00C0090490434430930C240B1 5343250A02242301284100322300308B0230031030034024C201280103310B012003443002000000000000000000FF93D90000722040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8818021E0664 067470004463321865803081065260040A430028309001E0060246060026C2000080000000000000FFC99900000000000102 1901901903940805821809800A00400200400420831000430630608E00F04000E04203600821040600E00005402050310008 622608C00E08A106000100000000000000FF16FF0000000000001240C40040000901240A200002020D04000000004A600600 E0002803100C0040020108246008080200500090000090030210080240010010110010000000000000000000FFAFCD000000 08180380100180000000008A042021108244050825001010600E0861401083001040204004A41060040A448022001400048000f22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000011805 80180194884084992080024A600684480C0460200442060A600602280000600000600400600602610210600004E800006806 0CE0060C6006000000000000000000FF1F14000000001001022849801801805903805811812000432A116126400006006156 40E44E08604000600200600000000608600801429208202000653620604E002000000000000000000000FFC1CA0000000010 010818018458418018C1111881802000402223622E04604600B00700700600690808620220600000000E0460B008440A02AA 0000600604608600000A028000000000000000FF88DA0000000010010048458818838108010058E984221545B222C1881060000a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04556D5654E4 C6A48006000000000000000000FF6F0A0000000AB0AB0A88A18AB8AB8230A1023888800B30420E2AE2A20AE28E2AE12F20E0 2E2420202AE2AC2AE2AA2A82AE2A6AAF2A60C60A60202AE8242A6226A04004000000000000000000FF2C5A00000000000111 1801801801800020081800800B8CC00400600200000602222E03600689200000600400600200000604610788600400600000 6006006016804004000000000000000000FFAA0B0000000AB0AA0818918AB8AB901818181802804A05E0062042000882C828 800600618630A0002AE2A82AE2AC2AE2AE20EA262264322060002AE40601628624E006000000000000000000FF0703000000008a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6126136C0602 0000006002006004006006046A28326046106000006006006106402004000000000000000000FF5D610000000AA8AB8408AB 8AB8AB8AB8110900020012A061422AC04048828E28A80E0060062090082AE2AA2AE2AC2AE2AE20E0D084E30622D0142AE2AE 20E226900006000000000000000000FF0AB400000000180080480580180181180300804500800060A300500C406006007206 12740600C800006006006002000006016004016006416800006116006114092004000000000000000000FF57CB0000001549 54802955955955955885045133012040641355531015055651210650634EC2400C55655655655255055650EA0020E45654C0004a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018008018018 0181184008900000020040221060060000260421061260060100040060060040160160060060100062060160044864461161 06050014000000000000000000FFC217000000005802801801801801803915005801002012E29202600624600600622640E2 4600402000610E0060460A6006006004096046124000056116002026300324000000000000000000FFEADC00000000080090 180180180180183500581100D808E32A806812240026002206A060AE08480000600600400600600608600000610E00480C00 680614600E0C8004000000000000000000FF39E700000000180183280180180180188184892000020460020043200060060400ca2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C2AC00620222 2086000000000000000000FFF43A000000355B51955B55955955903801880150004049003250642631051655030610620655 00445504D655043651655655445054000E35000444608E52624254A4D6000000000000000000FF6CD2000000011803801801 8018009018038858018000002112006026006006004406006406040000000044006046026006004000000006000000006006 15601200244E000000000000000000FFFE740000000A98A98AA8AB8AB8AB8A18010218AE000224400220E2AE08E28E28E00E 00618E2A00002AE2262AE2862462AE2AE2A022608E20600000400622631A000004000000000000000000FFCD1A0000000008002a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (126106004009 00003100000600600400400000002610000400600428613280E00E000000000000000000FF06070000001458919C58AB8AB0 AA8558118018C000002AE2242AC4A808E28E08C00E01604E20C0002AE3842AE38E2862AC2AC3782A83862200002AE2AC4061 423B6226000000000000000000FFD18A000000401C03801C0180180182992D82B801800000228603608A02004600005644E0 3600000000600600008600600200610000834600000408C44400E002002006000000000000000000FFFEFC0000000018A180 98AB8AB8AA80092184989580802AA2262AE1162AE2AE2CC0D64C60962900102AE2162AE2163162AA2AE4042AC22E2A80002A00aa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9C03C00C02C9 900BB05A009502406B004066224A661E1D4286006806A8C01116C88502700E817067004006006006060000816036C0208300 4006000000000000000000FF1883000000001C01809C01E05205A41823800401804202100400415005008600400600E0D602 608501102E040847007816B16000000096000104027046026206006006000000000000000000FF7C84000000083805C23801 801001801825CC4222000000100C00440442600604422640F24692600000680600604682E006006084004016010000806005 02E406006106000000000000000000FFDBE8000000429C49811A018010018AB8898080080100004084004000000046404106006a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (506002084006 000000000000000000FF486B000000401C01811A8BA009408018018A5C0181001248402A450400649008C406026116202000 11434008700F486800014C028C20880202008A408E00600E222006400500040000000000FFA2B60000000018018018018248 20C258218A9844912024C14004C1104080C044C0564C652E020051004A10A8012603608080400E04620A20028004EA0E04E4 02002006000000000000000000FFEE8F000000401841801805820E40D03009E51832000009422014E00208002620432E3262 0648E020004507281096046087005117026204200401404406112106004006000000000000000000FF2D7F000000201C21A000ea2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860821400940 0041641600604000E21010005002000002600200600420E006200280020000000000FFDC39000000601F0180DC0D90180902 59018A3890820015004244400010614040404640E25643020800433004000648600800600402428008000808608040C00412 41060C0000000000000000FFBC990000000018018018018C104812380580980002000040061060266B600600408600620602 620000400010000600600800600001820208040801601026E61600E0860A0000000000000000FF4DB6000000001883803C21 8210000898AB805898840010E28E50E00E00802620402629E02608C1A810404C22E20600603051610800012200000040E000001a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (88888A8948AA 814040800254622220C31C2CA2882AA0080100C840200000210208A2AA2AA20220222222208A0000000120486522124062AA 000000000000000000FF7344000000201A018000018020000000000880090002230000040020006026004100120000000000 404284006000000104080014004000000000248020020028430000000000000000000000FFF5E90000000000000000000200 4004C0000240C401221000881001000260060062204082404C80200A80502460000000500480801102400000001005000880 80080000000000000000000000FF81D5000000201A05801AC1801901009829811801808000029201454C0204100944861460009a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4104C0040000 00000000000000FF7487000000155D55B55955931811949955885A898042444404556406156514556304104204494000D064 24517557556516556405404556000000556446446096C0D556000000000000000000FF0E300000000AA8AA8AACAA8B28888A 08AA900800810200A2AA29224208A28A2AA0D24C20120CA0002D28122AA2AAAAB28220A2AA2A23220000000A221208220208 22AA000000000000000000FF0C2D000000400400000000400420002000048020008208810800011040004000005044803100 40100500900210000000408008AC00C0000000000000840002200A0000000000000000000000FF6A760000000AA8AA8AACAA005a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00100A805020 0800800108000200C00010000000000000040250011000000000000000000000FF6ACD000000000000400400020000100000 0402080000050080000000000000400100120000000001400C80040000000000000090128120000002000108010100100000 000000000000000000FF9CD20000004AA8AACAACAA88C904800EAA880C04800220224A2AA06A08A28A0AA00E00618E242001 00300208A2AA2ABA222AB8221422020000002AA2323920022222AA000000000000000000FF59780000002004004012004004 240000010415120042004004044004200044000400000480804041000C440010048050490A1004014010000000400084000100da2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10100808B10A 42CA00C0248650A2A20CA402C0E28322ED0600200084A08200244214200208281040300A8220008020020030020020000000 00000000000000FF96AB00000000002010000002022202A0A20040080100008001800010000140020800000849C282AA0004 00000810000230010080120800A00002888008000000800000000000000000000000FF8C0B01000000400020000440000001 000003014404600805001204004008000800680004004800004010018A8C400080000000300000000000012004C0A8818080 0000000000000000000000FFDD890000004004000000000041520340000120C400C20800200004804400200002204082400B003a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF71FD01000000480016480088000A082810E80A08C8402A204A30282A08221280204200214202200900210200 245A81A42A002000002022002028202403782102002000000000000000000000FF70DB004094055830501845950332323833 953855CCA0516B06556554957C04D5611704E52C506B0004740400E80E10E40610E12828680680400008E10E216006006000 000000000000000000FF35AC0800000A800208300000200003178B02200000810080200288840081EC2A8EC46A80A8051AF1 014BA53C84408402D4001000040010464280400009101100004000000000000000000000FFB96000411204C808000842890500ba2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006000 000000000000000000000000000000000000000000000000000000000000FF62FE0000000010000000010000000000002010 0100000000000010008060060000000008008000000008040060040000000000000010010000000000048000000000000000 00000000000000FFDFAA000000000800000802A0041200A800908B42AA00953312C020041020010814000002020420008020 02C02002002002802800002002002028802022002002002000000000000000000000FF561710000015000400000010400054 00820442100100A00000848B504094C02289042B0810C0155040044008900000015080080800002002028020001000000000007a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (58A980088080 0200E006044466B070AE400427084006426000306008A008A200600600606805000200A00000A00680659610600000000000 0000000000FFF1EA000000001840001801920040001951C01909C2800AE106C1491040E4881048080C482E80E002A2E81624 8231146046087108802812012402882406001044436000020000000000000000FF6E2000000000188000B809800002009801 813841804000640E10400004004000C0A440C2860460A000650000608000410605600010000202200005210E000004006000 000000000000000000FF0C1B000000000000000000000000000000000000000000000000000000600600000000000000000000fa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF74D1000000001808103821808000003801851825C0420C410ECAE2A1928C904A20C428700A047480006040C00084 82703600A00000080712200010702B156846006200000000000000000000FF14A50000000019000158118400004018018018 5180221044065078080A6C0028201000652A00E08000E280037A140C60A60121000800070424000C729700624E52E0000200 00000000000000FF8C4600000000184000181194006250B845A0A800A68242708E02C286008006008292A3C946B060308A60 060060021044065E694082A14B002100053102006406016010000000000000000000FFA0060000000018200018018800000000062040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0402600004E8 0610600000600C00000100E00640E242206200000000000000000000FF84A700000000180810184000030020180380B00102 0000400630440000802700400400414400408400680400020004600600600000680400000580640609600214640000000000 0000000000FF4A9F0000000018000059919024C0505899882858A0C001C22604600E90703645F15616600014C0002E618682 6B0000645605000002F0070068080053420060062A6000000000000000000000FF2B110000006018400018018520000018C1 F208028081B444D600E9360204871070022160080142083060272400000860062800A004E1260A70900D601682642640E00800862040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D1004000C101 750E4143468C0416000202A1400600624880610408008602410608645000F02C00402510609221622A20E200000000000000 000000FF1E09000000001800001800000600043E01A8160161100442C6006000126206403010417000445000546084486086 806086202020086C4700210090795280700600E000000000000000000000FFC0120000000018180018404400002318698110 5100402940360179090181769864401E63E02940500268652000060060062105100961060020C50460228460168060000000 00000000000000FF66190000000218000018000000200018098050010000505006204450006006041004004C04104C00007800462040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF1A670000000018024098020000C00418458000100401806026216666806206C0600E00F00000C20804600400E01E0040 0608200000E02E10E00008E413716026016000000000000000000000FF4EFB00000004182008388000006048DAA18060B008 002C70060070062001264E2056086208854004D2700404120603600601032080670400408407680206E00308600000000000 0000000000FF8EA800000000190004184003400C04581384000A054004E50E02C08E00F8964150C320502652710109612584 6826C97807C2610012600748622000624A087006236020000000000000000000FFED0B00000000180000184004000000980100c62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600600600 6000000004004004006004002006006006000000000000000000FF9F40000000001801C00800000001801801801001800200 6006006004006006806802006006806000006006806006006806806000801004006000806006802006806006000000000000 000000FF1120000000001881849840250011A01C89A01003C80200E806246806C0884612600610640620601400E000000206 236006006800100005404404007024022006006006000000000000000000FFE1F2000000001825904904004105B0D801A430 C1A121546D36006096006B1680E92E20F04E13650308612004E046104806B46CA0028C3480E1220CE006002026D26026000000262040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (098A01227206 00E06402E20600601430600600600800680682600604600600600800060601401108E0801160040060060000000000000000 00FF1093000000001C41C05800000081809C0990900990004365460D68169402A602610044F116A170320A62802A804EC8C0 565072085100048A600600680F002804007006000000000000000000FF68860000000018018018000000238A392184112584 C010601640630641601649622000622604640040600E0065060060860260000000042060000AE08600200400600600000000 0000000000FF74DB00000000180180180000000180180180100180000060060060040000060060020060060060000060060000a62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 9869000000001801800801808101A21801801001B04080622E08605605002615608A0AE22E04E250206AAD0A000680600E02 6840200003006028807002006806806006000000000000000000FF3B49000000001801880809800081841D01C8902384A008 E49E207A8E2068AF6AE26E8FF2E60367202A674C0C66EE2EF0FE2860000C0000086058047042012006006006000000000000 000000FF0E08000000001A01A01800010081801803C01001D040006847536354CD054715651410640ED46056546010900006 0072064C604820000280400608E008A06005006806000000000000000000FF4B1E000000001821900A10000023C2B8A5801000662040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02E216456000 00800A20600003614228600808E02E000000000000000000FFDCBE000000001A01A01001800001801E01801801A000006006 8060040000060060020060060060018060040060060068060060000000000060008060028020000060060000000000000000 00FF0EF0000000001C01804801800001901815A41101820000604694E206906000806121006816E96000006104C16A260070 06046408430002C56000847012B1F004806006000000000000000000FF898E000000001801A00801E00001801883C01601A0 018078062261075003014062040070070061001270040010060444464860000000000060000AE02A0030050060060000000000e62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001004003 000060060010680000A0028001A80240006420018220880010000208300010808008080500800800000000000000000000FF A22F000000001A21804031804003801881894005800008608600600420000000600420620600602000658C00600642000620 60004401E240600000640242400000600E000000000000000000FFA2E40000002118A1A00201800501D21D21A822C180408A 6A86C86844B1680884EA40B26A2E82E940016A04809346A070261060002A0CA288E800286A0A856C00426006000000000000 000000FFF3750200000018038B342188000381180D821805930000E017006C0400688628600E00608610700030690C00000E00162040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF5F50 0000002401830422041000002003482032001420961400800000810098000010080940C40D10509000858900800808808000 880800888800D80A80808A00280120000000000000000000FF964B020000008800810800800100820820C009008200402002 282002002C4012A10410200200204000200200220200200250200002801205200104200224200882B0060000000000000000 00FFFEC50000000018002080018000800880020200C0088000820801102018E9072C12014204180900810000144060882404 40020000300400000000230030110000840010000000000000000000FFD7D00000000044500A00000800001000001000220000962040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (022A20008888 22C12800C12002912002002002000000000000000000FF44A200000020000120020000000140140120120000808080009008 0082080492092C9409009008C0004A88A2084C89100480C000820914920A009048048208AC004004000000000000000000FF F005000000001841801801800001901801909021800000690640610601640412611640624E00614040604620650642602600 60100802340960004CE014226106026086000000000000000000FF2EA7000000442908C54C14904500C00D20804C84940154 340300B00310214B00202308310324B41090348B05300301340330200042110324301000340311320280201200000000000000562040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0D50C00C00B1 0510C80D08C00C08D21440D50908910C40B08550300000048A30C10C00CA8D50CA0C00550000000000000000000000FFED90 0008004004004006000004004004006404000081001001001001000801080501001041001801001011041021000000001000 001011121000101801000001801000000000000000000000FF73EC0008000AA0000AA0A80000000AA0AA0A80A800202202A8 3602A02882E82082403002082000002A8020088300020AA88000002003001000820202A8210A002A80000000000000000000 00FF50DB000000200A00A00804A00000C00A00804A04800088280280A80A80200280280280A82284A400802802802882A02000d62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFB20B0000 000AA0000AA0A80000000AA0AA0A208680002AA2AA2AA3000C8A884030E02AA2022AA2002A84004882102A8AA82180002002 202001822208202414102A8000000000000000000000FF4ADF00080000000000020400000000000020000000200000000080 B00208000480000280A00081000002402400100408010480012800000400800000000000A8800000000000000000000000FF 1F990000000AA0000AA0AC0000000AA0AA08C0C800202A82A82A8230288AA80280082A83082A84902A80C00882802A8AA932 00002C83202082012282C82880A02A8000000000000000000000FF89EC0000003542003541502000003543541523540100CD00362040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (210904301300 305141300200B023013000000000000000000000FF79D50000000019098018018418000038CB921001028020422400400600 608400C12621441420C308406006506206006046404000414086424400004016086006006000000000000000000000FF72E2 0000002002002002010004004014002012280140800800800800800044D08C088008C8800903000AA8A20850800004144800 10C800844A008042048C0A84804800000000000000000000FFDC730000000008008008048008000008008108018000006006 00614A42200204600200600600600800200200210200200280200004209210A000112112012032002000000000000000000000b62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1080400A6126 10834000840855009012448C2062C4020010004088404090040250208008100240008000000000000000000000FF77A70000 0000088880080102080410690A822C0008010010012303020020511601034611410500002120020E210208223220200012A4 02202000112002002412002100040000000000000000FF137540080000040040040000040040040040102012200002880110 88349208201408280020001221009100009008041001000001005001001001001000009401001000000000000000000000FF DCA5400000000C00C00C00800D08440C00C02930804011210A5434D241344A5430120C20421430410D340A02B0AA1034130000762040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (690700080000 10418079058A8900001805828007840015E2CE0A641C19648004600201600660601211615A2880401060064001804044FA20 A10200200E226086046000000000000000000000FF1CF4000000000081809021909842081951024011800000600631610400 014049610222600608E00002600645600000400610000000800249200000A146424306006080000000000000000000FF54DA 0008000000C000812400012000004A002010042054002040022040E406208010008000100008120140006220120000480000 208000100100020120000000040000000000000000000000FFCDF9000000001801000001800088020120100090008051004000f62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006096402500 2AA0462022462AE2A8000000000000000000FFCE19200000000001841805800800001801001921802000600E20E08E406000 02E00400600600688000230600600608E006002001002406022A0000240E032116006000000000000000000000FFA8090000 0000100180580180180000180100D00D80004D61460260240200460860CA4A625632E42000600A2260004260060040000000 2A510100002146106026006000000000000000000000FF705E00000000100180180182180000580180940180212072970260 2420601700600B0071270260020060000804800460160040000801020020000A2016004016006000020000000000000000FF000e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5415053652E2 9434E54E44E2845541165105504C65565500000001545520045504260C44CE556550000000000000000000FF1F640000000A B0AB8A9CAD8018AA0AB8AB093489810280F447026A064AE2AE50620505602F4060402AA08A2AE2A83362AE2AE00000602610 80002AE29650220E2AF2A8000000000000000000FF0A2F400000000401811805801800001801431021802000624E22E00640 000600602400600608601000220002000000E00600600000620600028000600E40A006006000000000000000000000FF355F 0000000AB2AB8890A98008AA0AB8ABAE18418080546306086206088288206A4400E1860061002AA4220882AE0042AE2AA000008e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001801 081A058018000018010012038034206206306806046006426C0404600608E200000300026006336006004000000006004200 002096046116006000000000000000000000FFFE6C0000000AA8AB0010A98018AA0AB8AB8A110180000460060062AE08828E 8070840060060070022A80600882AE0042AE2A80010000062AF0062AA30608E2262AEAA8000000000000000000FFDC530008 00001801003801000800001801001003802000601651613400600702E894306A06156C000040200060000060060040000045 04040800000006056086006000000000000000000000FF80C200000015495514395100095415595510500B810030E1061065004e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0E0040000462 AE01E2AE2AE000000000000000000000FF1551000000004801801829041000001925041025808013611654600E4000460060 0E13610E10600401002000009604E006004000100204404004004006526006006000000000000000000000FF23D700000000 18438C5883804000001811009001805200602600600402600644610640642640E02000440E4260460060060840000140A612 C000336006006006006000000000000000000000FF768C00000000080183380100000000180101514981009368B683600420 002611602ED17336A2691000400E2000060060060040000002CC004904004046406006006000000000000000000000FF797C00ce2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C2AE01632408 609628600020604028E2062AE2AE0A600200032C24E0002062AE22E2AC2A8004000000000000000000FF0F27000000355955 04DA28150001955905951025804011611612642E5105162064D610630E50602455600E51041604655644E0005402A6146004 516556006556554004000000000000000000FF23D98000000118018010000080018018018030498080026006206006004006 4A600E00640602E00808E2960460360040060160020A0006006000046006106006000004000000000000000000FFA6280000 000A988980910188D0000AB841087099800024620640E2A608E28E1CE2260060060760002A058608E2467842AE22C0002300002e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00001801201A 00008001A01C01809C25808013711650600602400600608413610610600002E0220400060040063060041080041060001260 06104007004004000000000000000000FF4DC40000005E58AB8AB8AA0800018AB8AB893889807020660605E2AE08C28E08E2 2445604E0260002C608208E30E2AE2AE40E00661022630600031E2AE2242AE2A8004000000000000000000FF760100080000 1801901A04000001801811801901808040624600E10402002601600422E02600600200604004008600A00610600000000C21 6000006006326004004004000000000000000000FFB9D50000000018AB8AB8AA1220018AB8AB8C1903801048E0CE0862AC2C00ae2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408040601640 6002100006000000000000000000FF84A0800800401943A01D01800003C81C39A694319A2004710618641612400645E62610 600E00E04090F0060972A06028660460420E000606400004690620600B090004000000000000000000FF4494000000601802 001C00000001C09C01889901804020E24E01610400C05600608600600602621400748200084004600600600600002C004025 006C4600E015005006000000000000000000FF076000080000B800801000022001801801A218018000006026026004204026 44601640642640E00880740820614000680604600604010E02C000006006016004000006000000000000000000FF9D4A0000006e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60619E09600E 10662800610603600800600602602E0000520080C8286006016000010004000000000000000000FF6567800000001821811A 0180000B94188188B821850040608E2164060140000AE4444060464560012D6D4E2863460220062065041400060040008264 16026082B2E02E200000000000000000FFC13F8000082018A1801881800001A09A01801881800044612E44E2165045281460 042C62A602604814624E0000160210160460420000062041002262B6006002006804000000000000000000FFA5DF80001000 1E01001001800603881845805041850000600622604624428608604E4362AE09600103602E081D0800700F8060001000064000ee2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1A0180124180 2109941841801001880000602E4862040140800C60CC00602600641010E22604614004400600622C02008A00011040620E00 2004084026200000000000000000FF8CCE000000601825811C01808001805901915005840028E50604600402444020600410 E0163560404260162800002860CE0061061000024D0000156006042084410006000000000000000000FF4FAE000000001801 181C0190A005801821801041810008E00603607452400601640640E0060860000061060004102860AE44600400008A2A0000 00E006606000044016000000000000000000FFDAE3000000001803801821880081803805905013890001662608614C2942A6001e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000008A0 088000000000000000000000FF9B200000000AAC009808A88000AA8AA8AA88488800002006000182022AA288088204450048 0204002AA02208A30240A2AA2AA1420002023001C02AA2AA2022C039200A000000000000000000FF1DF10000002018458044 0180000000000000402400201301105400080040060000001301001001420000100460044400000000100000201100020000 00010000024400000000000000000000FF96A580000000011003000200000000000002800001000000200000A00060264400 A84004204084000004804060C81000000005400001100202400000000C00480080A0000000000000000000FFD20800000020009e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040004000280 01005440001020111005004001000500014400004804000915020110000000000000000000FFD033800000755D4D95595180 0555955955955825014015411412455615655420455610430450410955644E537C0613755755630600055644E20155655652 6416A06556000000000000000000FFB6080000000AA8B282A8AC8000AA8AA8AA880902814048A0CA0823022AA2AA0122AA08 20922820C02AB08A2AA2120422AA2AA41200004A2220002AB2AA2AA202202222000000000000000000FFD5ED108000000200 0004040000004000000001000000400240008000400000010000228030000401000100000088001001000030800000100080005e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000402000400 2000000000000020020020000000200000440000400420408510800000400040148000000080000008000201000000120108 008000000000000000000000FFDC3900000020004C0000000000000000000000240100110110540000000040000000130100 1000000000D0020808200800800020000100088000000000010040220000000000000000000000FFAA3D8000000AA8808AAC A88000AACAAEAA8AA899800020620640E2AA0AA28A1CE2AA00600E0760002AA20208A2C24022AA2AA20A0002222220982ABA AA2122038C22AA000000000000000000FF5D0E80080040040000020000000140100105004800000200002400500000044A0000de2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080100045800 00040000000000000000FFD555000088000052814902800808400D44800912800042AC320A30CA02700288E8860028020260 80D0320200300202A80204200A01220200A080012282802202282000020000000000000000FF72E100000000000000002002 00000AA0102840203200080000200000010D10200000000C2909003003010080000000000000000000100000000080001000 0000000000000000000000000000FF0A6600000000008038400020000210001012C05040000000008400416C013001062982 0081040000000000288000000000080000C00000080000660000628800000000000000000000000000FF9B15110000000200003e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004044051220 0808A01910020530000048400000000022A00010000004000000000000000000000000FF6352000000000000904804800800 0248008008008560022C13642002402002802C0240200220200000200221208A00228A7A2003002002802280003E03462002 102000000000000000000000FF4849000110000155A0B8A5821A10623F55A539558C0053685734515600C4D4516956026126 14C1488C70060060060160060A600700EA0680E00023628F227206006000000000000000000000FF5D8C0200000000015080 2240200E11B0033210002A81A086880840805C82240A04A12884390002A961450CD1900006102400003C005000904120800800be2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000060000000000000000000000000060060000000000000000000000000000000000000000 00000000000000000000FFB76D00000000000040000100000000020000000120000000048000000000060000000000008040 00000800006006000000000000800800000000800800800000000000000000000000000000FFB32000000000000080882080 2C044C080C242850800082300200200202210081100080200A00204100200280200200200204200200200280428002200200 2002002000000000000000000000FF73530400000000000000000000080100010800000800A100800840A1091C4892014011007e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00610400000 0000000000000000FFBB93000000000001A01801A0180000582020180180002240A2E0440640044742004624411690808084 600660001600600600614600600641400069E802E06126006000000000000000000000FFFABA010000000503841A81801900 249A40103B21A2C2AAE31600300E800000024B0508404640628840E506100106B060471060174170460240A0806420002026 206000000000000000000000FF4A4800000000000988000100180008189202180B900200604611200601010811400C214006 05004008600E016006000006044006046006006000086000152206002000000000000000000000FF687F000000000000000000fe2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (206021807406 00103620402603602628E016006080420006207006346000000000000000000000FF4C35000000080009801805881832001A 04801800A000C060879008858032308A20014CE4AE20720828600602804600609642601690780E0060890268274460062040 00000000000000000000FF7979000000000509D41A018011000458088238228C4000E40E10020C20A540002D000A600ED404 1130E29608E00E50602604603644E0260460C0002427046486206000000000000000000000FF092E0080000000079010C180 08002899828818C984800D404240E04600010E29816E80C0A68000200261064078864060468845C641600624C0009040020800012040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000B801E9 3C41200400E00C80441488080600100653445400280C20651600600700400608628600604410400401410601620604604000 0000000000000000FF208300000008024D801805801E00001801A51801000184600411411401004600408603404C10220C00 6106021006006206206306006004006004006006046006006800000000000000000000FFFFFF0180000024219218C9867800 18991D8ABA9A988058620A40E64C20A10620684AC06004886020506A0641600E00631600E016007006046611304046984806 025000000000000000000000FF34C1000000002001841B0910184C609801903CC2C48001654A00580420240FCD600A08628400812040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (304080000000 000000000000FFBED5000000000005801C018018000018218A99310805127108A09406826006044014CCC20E88320020E00E 80040C00628600482602E00C004200000106026206004020000000000000000000FF836D000000000605801A01841E00041F 0080189448820A648484E0040423164461468060044D200404600600640E08E28640600604640E02400080480600788E0040 00000000000000000000FFDF56000000000001801801C2181822B85084380000C200620542406D0820EEA038B600602522A5 488362860601060060062060469960268A446000600604E006124000000000000000000000FF818A000000000001803C014800412040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C4807106A064 0601422E00608629440FA2A04408681680E006084106000000000000000000FF222200000002044188590100180850581980 98105C20147A0008289692600680682426600402280408600620620600420620400628680E80E00000460E40E00640400000 0000000000000000FFCFF7000000000021A0780192B820483933E21A0400410B600800020E08660600200408680C08236500 680600010411600610650700E404006004814006206116104000000000000000000000FF216F0000400000058118C5801804 021801A0395545044160C022802641788E22829400DA4700209402628700600600E14E0070C6046C0624402488890600610600c12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001801001801 8000006006002006006006006006004006006000006006000000006006004006006004004000006006004006004006000000 000000000000FF3322000000000001A01801A01801401C010018018010006006002806806006006807004006806000806006 806006006006004006006006004005007007004006004006000000000000000000FFF28A0000200000058818058418010418 0120352380208061068864060461160460D620700610600C1462060000000060864060460400040020060161060061060040 06000000000000000000FFBDEE000000040401810041815E34001A43029001C100A1724E44E8A641620640E406896456046200212040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF60EF000000000009904021831AA34218192C18098A40846C061868208068868060060040060860040060060060 0602400660400E006080700004006406086806806006000000000000000000FF3A15000000000001A01C01A01841001AA110 B203C0000061568160105060B632620E88E0568462A00062B612842088E406008006040806800000C0700688600600400600 0000000000000000FF4B260000000000118018218218830298050011518B1030E00622654002E40600E12624630611600045 600640608624609604002E000086000004126006006006004006000000000000000000FFAD9000000000000180180180180100a12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601600040000 7007005006805113806288026006006007014006000000000000000000FF3872000000000401800201A01A01603883011145 90025265361032300A64A609644604624620E29008E0262000204082A6006006008002402040806806006006806026000000 000000000000FF8857000000000001801801809801015EA712F0E180822EE2A720A2886AE20EAAEAAF3BE22E02E2E023E2C6 6862A72DA6C602E006015003002510246807016046414046000000000000000000FF6147000000000001A018818118010218 810083159000C86D56326D5094ED56D5734E244556257B144C6016028220406106086006006110402044006006006006006000612040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (03C230D1C800 00600629600650630E28F94620400700600024642E00000820611608630622614210C02821240214708600E0160000000000 00000000FFADA1000000000001801A01A01A01801801A01001E0000060068060060060060060068040060060000060060078 06006006006006806002004000002002806806004006000000000000000000FFC889000000000001905C01C0180141180140 20058042806016243000A06049006006A8E90680600080605607E006026816880846044802106000146C0680F026A0600600 0000000000000000FFA634000000000001E01901809A01029801080611800300600682208100E0002460960071170260412400e12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF693D000000000002080280202220002140042080100220801800800008900E2582004800101000100005200078961A 0208200000420000020100010000519000478000000000000000000000FFE97E000000000201800011801841181801134003 8AC01460060840AE60600008608634418603600030600608E006040806082C060060022060200047400A208E006406000000 000000000000FF0559000000000141A0582982B951411B09311A058480D36B36824AD680E800846A06904936A2ED00917006 8881008A2426A54056916A0AA24800824888A0AA4EAA7206000000000000000000FF57EC0200000002038C9881801803883A00112040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (34203324A002 00A0034430024030110031234D21130A3202000000000000000000FF7EE902000000048020026124000C2004840002000002 820880240940800010100400800829000841408000D40848C000A0C25280A18AE8404800B20880800000A000000000000000 00000000FFD833000000000400940A0CD0980200081AC80800800209202211400214230000205200200220210300200A0020 0000300290900A00240280000A40A002002016002006000000000000000000FF5CE000000000002002E00002408000800020 902800020002014202000010870211200004404482800F12000160062109000100200C00108880500000082413201842080000912040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A0080028228 0AC0280A812802842802902802822800802802A0200283200288300200282A842800C0290280A80280200200000000000000 0000FF28530000000000013003412C100140104200120000429088008948808C0804808950840948488800804804800804C8 0804814005000C84C94C20910848C40804A30004000000000000000000FFBCD30000000002018A180180584190194D801001 804805600600E10644600414600644621610600014600600E004106106486C0601642C00612030E20600600640E006000000 000000000000FF1F5F000000000000C048548C0C04C00E00B2AC00880910300B34304310210B00B533103123A5313020B48300512040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF109500000000055433420220420035448C5543520040C10D40288448D50510C40C90D40CB0800800D50550911550891550 AA8D50550C088D0C41500C90C50D50410000000000000000000000FFE25900080000000040840054A0004006106004000101 0011000010010810011010010010012010100010012008010900010000010010000010090910010480010400000000000000 00000000FFF9620008000002AA0001480000000AA0C00AA0AA00882402A00602202002E82802002082004000602A82A84A82 A8440AA82202A82A80404000000302001802A8180000000000000000000000FF8BB3000000000000A54A02A14A00C008088000d12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (023320020028 0200000200200020211211200220A000000000000000000000FF90C80000000000AA0460AA0002000AA0880AA08080802AA2 92B182A82322884023222A82AA002000AA82A80C8AA80012A82A92A82A82A82A80000E03202012A818000000000000000000 0000FF5275000800000000000010150000000000000000010008000900108000100010802000800015000000100002000000 0000000000000080000000020020000001020000000000000000000000FF04360000000004AA1000AA0004000AA0A20AA0D2 00202A82412202A82202A80482282A82A8150000AA82A80892A82202A82A82A82A82A82A82004002282802A820800000000000312040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (840220A14B08 B20248314210200200A4420031091434022B348A20320302308B08900B04341100200208B003003000000000000000000000 FFE8560000001120018218018218018018B1941881082202420424401403440E4042840A600428420000609600600400E046 006206000204206000116046006006086000000000000000000000FF7A790000000000013082002D00004012212012240000 8008100C4804880844CC8908800800C88810001004820004800804800004800804000C088148008208008440000000000000 00000000FF57470000000002008208008028008008048008118040006046002002016002006006002006026000002002202000b12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF7C 1600000009002400000400000014800008000415400C00101000100500B60105301202104D048010450054E1162042000244 88110008440200008020110000100000000000000000000000FF57D70000000020008208208208508008AA80248000012010 0022E10528020130100041312100000006204240201000206200210200000200A00828200200200210200000000040000000 0000FF0BBD40080000040400040040040040040142002C01001082A100138000100009005060801005100900100800120000 9001001001001201011001400000001001001000000000000000000000FF6644400000000440800C44C00C00D50C04C0482800712040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200620608604 040A046000106004004006006410080000200000000000FF27EE0008000000018018050018830238098A38898A0034E20E2A A00811640802628600440608E01009608E1C84001461C602000610008A106060036444096182106048010000000000000000 FF727B00000000000180000104985580980180381184000062260024A00060B442E55608C006146140126116416126006016 0C600600010200E480026014306002006000000000000000000000FFCAE70008000000000000220300000100820000000000 1400C0000240130546208028140408020330010200026346320010300000120200130300110428408000000220090000000000f12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006A482A0 04628846640623E11640E2002AA2AE0880880062AE4002AE24800A80602028624622A2AE0462A8000000000000000000FF3B 7F200000000001911801801805801803820801C02240E3061000080060440060C60063060068000020062464260400070100 06000402056800026106003006056000000000000000000000FFDF4600000000000180480100182180183190B8B580820A60 360460062CE00631641608404E3460200060060060063120065460061200C048600000E05408400628600000000000000000 0000FFFACC0000000000018018410019018439158A1D01880320F10E2AC00F04600308700622509700E4000064260000104000092040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFC89400 0000000155843B559558CD955B5588904B80000C602740454820651200644655454E50600C5545565105304065564AE55610 8482C040044364CE496556556550000000000000000000FFCAA50000000000AB9018ABCAB8B18AB8C980489180C8AA68AE28 722600E2AE90E1263060261364202AA2AE08E28E0AE2AE0A62AE2802908AE00230620E2822AE20E2A8000000000000000000 FFBF6D400000000001901801801801801801824801802801600E02C00608E02209608E006006046100002006020000008006 006006220048046008086006042006006000000000000000000000FF65E90000000000AB821AAB8AB88D8ABA81841801800200892040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (148006208144 094810006086027006007000000000000000000000FF37D40000000000019018018018C90018018218098080A46A06816008 286026AA6006006406006000000006006426090006406006120014846000016016116006006000000000000000000000FFFD 020000000000AB8138AB8AB8018AB8AB801901C10048658632422004628A4460062AE8060170082A82AE0880883662AF0062 AE0002063170002A62262072AE2AE2A8000000000000000000FF508E000800000001835801801801001805911225A00000E4 07014090D0600600700E04520700680000400624604640000601200601004020502005610602E8060868000000000000000000492040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A60822066A62 8E41600E2060060461602A02AE08E08E2822AE0062AE0000041060002AE3262060442AE000000000000000000000FF18B900 00000000019218050218A1801801881001800A01601604004E01602208E14605613610628401000600040000200632600600 000440C08400601600E406006000000000000000000000FF6C0E00000000000180580111381100180182D801804800600621 01060060064262061042064360000040064460260300060140060004AC1462400061061460CE006000000000000000000000 FF899300000000000183180120180580180190A4C3C04000E02E10090702E00200ECAE00412EB4F08000400624000000000600c92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFFA1B000000 0000AB8138AB8AB8AB8AB8AB812055804054E01628220000E28C0264962AC0962862902A62AE2AE28E4062AE0842AC006206 2A80102A82AC2A62062AC000000000000000000000FF10420010000001558219158918119559558020018052016006452502 0165100C612655632650E204556556550530086556326554006536008044550454556506554000000000000000000000FF18 02800000000001880001001801801801800081810200600604A10020604430E0060064460360000160060060061040064460 0400610E00000000000400E126004000000000000000000000FF07170000000000AB8198A90410070AB8AB8019AB808A2A6200292040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001340002 08000006096016002000000000000000000000FF6FD6000000000001844001801801801801921001801801601600204E0160 0408E10600613710640410E006400000006806326005004004000084002006006126004000000000000000000000FFF1F500 00000000AB8C18AB8AB8AB8AB8AB9410AB80002A67E62022543E608C00606E2AE0060060002062AE08E0EE2D62AE0162AC00 42442A85002A82AE2262162AC000000000000000000000FF229F0000000000019038210038A18018018A805581105462B610 204A0A604000641600401600600400600600000042C00600E00400600642028400000600600E00400000000000000000000000a92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (208650642400 64060063060A630000E30620810010E206487322056006000100102002403897007800000000000000000000FF8A7E800000 020281801C2B801903C99910C04A09800050E94602225429E33458E006196087006000D068960260B6067116206806C0E016 00008008220625300E044000000000000000000000FF30A5000000020481801823801811C81821E8920D801000620608A404 00600403602622404E00E005007006040240007006000010000084208004432426106806002000000000000000000000FFE3 C0000800000201809C01801001C0180181300180C0006806152104006244426206004206436110826806026206036006013000692040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0F0000081000 018018810018098A19039AE8C9840000600E1940440A60A400644608403601E0802064060064063042060260940061006900 0027600E00E3A6004000000000000000000000FF3501000000000201801801809821C09800201805830448E0060222AC0060 0C20622600628E5264100C60B602605602712620700250622C000290010406306007016228100000000000000000FFEBCD80 0000008005840401801909801852049803904034633640210C0061142260064564260A6480A8F0162100100163161064C642 601400000040004614E006044000000000000000000000FF0215800000110005821C11E018038018048208418A2003600E2400e92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000004802A 8110300000480000000000000000000000FF0B6F000000000001800081001841841801909895850049601604410420600420 608600410621600004610E00E016024006820000280020000000456006416446006000080000000000000000FF39F6000008 000001801821955883805881825841880004630610402C11633408624611405608604050E046020300486026406104004208 548080004496104106412410000000000000000000FFE5B90000000000018018218A38939138858008218800026286004406 24E20408608666C40604653000E0060082C0086506186000006000028410006086006006206040000000000000000000FF0A00192040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A0000000410 000010000001000000400020000000008A80080000000000008000010001000000000000000000000000FF1EEB0000000000 AA8108008308AA8AA8D08A88AA00002A07E02344023E02AA0000682020000000002AA2AA08A0C80222AA0123222223000000 001021021022AE46A000000000000000000000FF05A100000000000000A00110000000002800500000000100100000840100 04088100090130100000000000446006010000B26004004128000000000240028000000000000000000000000000FFF49D80 000000000012013200C00000000200000000000000000904280000064202000202004305000000000064264800000100880900992040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08000004010A 410010000140120100408000020000000840402000003080000C0440030501005004400404801004C4100401004400000100 0410030005100000000000000000000000FF114A000000000155911955955D55B55B5111580100000140044464D60145560C 412455632450C481557D56136514556D5732705544E5460005005460D64C6556356000000000000000000000FF376F000000 0000AA80082A8428AA8AA8828A8854800054A01222211200A2AA02249220A0922820002AA2AA0AA08B2CA2AA88222A2C220A 00028142A0224022AA012000000000000000000000FF986708000000040002400000000000000304005400005402B000800000592040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8000012A8000 000000000000000000000000000000FF3BF30000000004000B20000000000000420000000002000000090008000200420200 000200430080801000040440000000010228C30000000480090028000000110000000000000000000000FF14ED0800000000 0000040000020000000001400000060100100000000100000881400001301004000000000000000000013208800801080000 00000000130800420000000000000000000000FF040B8000000004AA800CAA8AA8AAEAA888EA09AB80022A62A6323AA26A60 AA41600E2AA0060460002AA2AA28A08A2ABAAA0020020022320000002226822032AA002000000000000000000000FFB6A90000d92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C85007282802 0904C2E910C40D1010C54002888010040040040042A0004064084804404004000000000000000000FF37290280C408C0A090 4D088ACC42810890944A28AD00822D0A4360CF00340282280A206486822000882002842842A0200204280200A20220200000 2803002082002002000000000000000000FFF2C20000006000080002000000081220242000040040400040000000A808C081 0900000000000040000200000000000000800541801800830100000C20020001A00000000000000000000000FF40F9010000 0002000000620000501000042080D40140088440C00C0012840038032001010878800000000008000000000028000020000000392040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000221000004 1501000003140000820202200D04940840280A10401230280110810B11010008000880000508000000001000800340000040 880020800000000000000000000000FF5667010000000180800840808800824800800E00800300288201200202A00236B103 02240200204100200207A002002003782003003002002000182002002022002002000000000000000000FFD4A00501441145 41905B11155C45A33955B45853F5044D65554550D489450684E0564065164960000060060460040060062A62A621620642C0 804AEA05027886006006000000000000000000FF65460020000000310010470A00901036A80101800A412280040A8020644000b92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001060000060 04406006000000000000000000FF6CFF00000000000000000000000000000000000000000000000000000000000000000000 00000000000000006006000000000000000000000000000000000000000000000000000000000000FFC3C100000000040000 0400001000000000200200000080400000000000400080000100000000000000000000680600000080000080000080000080 0000001000800000000000000000000000FFAFAE000000000000800800800848CA0A20800850A8A004A842A02A0304A90200 A00202A002B02800002002002000002002002002002002002000005003006004006002000000000000000000FF67C900200000792040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (210403604626 E200216006026806006006226006017416822000C044A0586018006406000000000000000000FF0DDA000000000201803800 801A01801824801801042000208400220600040EC8232404700F01602008600608002080E04680604680E117012000064940 506011006006000000000000000000FFE1FB100000010151C05C018018118119202012918142C0E090CD2D03400886042C24 08603600643031620614083003600644E40608600600200901400800688400E006000000000000000000FF0DBB0000000000 01889800081801801808815001800210604000200A0C803608200400600644600000600600E00620400008411600E006342000f92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0B8018B5B050 41843D25800881880000201420584102C400C5400514610E10E2010C608600000000400D10790604620E4320001060020060 1408E206000000000000000000FF1FC6080000002201D01C098D1A218C9803011A01B20400F50881084012422000CC04006A 8E8862A010708611100000E02E4440A6506006022000107003006044897006000000000000000000FF3694100000010141C1 1800801801801901A0BA09820148604849010009410002408408604600600800E40601600E2260271164AF08709631201089 600A207104216006000000000000000000FF85E20000000000098D1A0588580D80981A041881C0C000A00606201EA202266000052040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (401600600001 6806000000000000000000FFE328020000000001801800881801801820C230A1A010404904004044403A0102200200604610 6408046026086007204004846106406306100000801002806880006806000000000000000000FF07EE08008000200184D800 A41B05891800815801A02004C20582408C002800802A1240600600612C00E006108001816046446046506006800004056202 286800006006000000000000000000FF015600008000000BB03CA1811A81803AB13C2CFF85801A21063946809081C002490C AB644604E00882760600760600600608600603600720A00042F182006046006006000000000000000000FFC263000000000000852040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0279478C60C0 20E106016406086006827086056106526000055056006114047046000000000000000000FFA736020000000001829800A81C 21C01C41D138048000C210422860064D6C160128A50060260A622400708650000021602E246A8E40E02E00400C00480F4068 04006006000000000000000000FF737B000000000001801820821841201A0020180980501340170018040921409129021060 0600602040EA062060060860168060160D6056006148800006A06008006006000000000000000000FF32A6100000000201A5 1A2080198180181D931AADB4000850445401BC8420100A204208700604600CA2E3060000780161464044060260068860A5C000452040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C3003584994 9A09C818A3B15208221104E546D5222211401625714E48414008EC8600680608680480620604809755400002E10701610E12 6020000000000000000000FF0811000000000181D01C01A2182180190102188282336D00435060B200303600244430E00620 E00400600602640600400478410600700600600000200702E865096006000000000000000000FF0EB2100000208221C01C29 A49C01A0980DA81A08D4420193B8266003022346AA280508600E80600708624E00000090E10600620698650F80C086602086 00611401E006000000000000000000FF50C00000000004018838008038139418A5003C20909102000308E21649700E80A35400c52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (026006006000 000000000000000000FF52520000000000018008000018010018018018018000002002006006006006004006006006000004 006006000000006004006006006006004004002002006004006000000000000000000000FF23CC0000000004018008000018 01801801801A0180100020000060068068068040060060060040020068060068068068070060060030060040020020020060 07006000000000000000000000FF019A000000400000202800A01805401A23825811A2028009020060060020024451060060 0682E00420600E028000016006046007106006004104C0602E046006006000000000000000000000FF102E0000000100200000252040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D64364145560 C6B50420006106232006317406002004226102006007006800000000000000000000FF437C0000000001A080784480990480 38058538038A102AE80420640600D20C88100600600E806000006086016006086046E1AA0600000608A0001E200200E80600 6000000000000000000000FFFE23000000000440000A00801801151931C01D4CC30051654E506106A344B450C056A0649620 604432628E9204200A6C0600200EA8E00E80C00480280F40E006007000000000000000000000FFD329000000000008000900 009801803801805800885004600400E04E08400404448609604615649000600640600E00E0060024060000C610400000200600a52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A01601801801 A01A41C02240212500E00620014000C427026036A00401047026000041006006802207802C06000000006205006884006000 000000000000000000FF010D000000000301001802801809401B0D801B0190800200062460D6050A1094401650F487028088 48E48613040000E10E012106092806802080006804A26004806000000000000000000000FFACCE000000000000200C05A01C 93401829A098A980808032AC48EBAEAA008022C3AE28E2A62883A822640E0AEA0E03FA3700350F08888E0001010064046461 04006000000000000000000000FF5370000000000080801800801C00405D15A0194191244460D515605645455434CC56D56400652040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (064560000000 00000000000000FF9942000000000101885808882824001B0188900168002A808708620704604601610600E4070A02880063 060000801264C640804614A34E2CA000000128017122086080000000000000000000FFA9D400000000000080080080080000 1A01801A01000000200400600600600780600600600600000200600600600600600480000600000600000280080100680200 6000000000000000000000FF23C5000000000011801144801001553905841001804280200C88700680004020408680700604 0000906C06607046806806222006602046002000A27094046004006000000000000000000000FF919B000000000601A0000100e52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (401800808808 621E0200101410002401A8000000300004208120808000000000000000000000FFB44B0000000800021A0080000006000028 0000000000080010000000401B084000001804400200014006206064066004C8400B400808100400000F8090490200A20080 000000000000000000FF644A00000000000181B900802828101811A11081910252A20404630600A02206440600E006080400 806006146006806224000426026206382018806020006096446000000000000000000000FF77E9020000100234A49B45A48A 084A3C31805A838002802A3482E82EA8A412C44806946826A0880001702ECA941020E816800406A060068028103488012C6A00152040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40C00D44C84D 4090034838A32238D222A413223403103A0328340000300335350300320B1124C300204B40300125300300B342A020080000 00000000000000FFA98502000001051040040A3883004002003042020000801008500068810800A088100210301108008008 00838880890800818000819040828800804908820C40085010000000000000000000FF28F5040000000088804C048208008A 280080191488002121E20A201288200210200200200200A28000200200210000A00220280200280241200040204200600280 2000000000000000000000FF8C5D0000000000200400700400410001C40CB04000000004048094003604100100810402016000952040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (82A800000000 0000000000FFB0AF000000000000A00AB0A20C02C00AB0B00C80800280240290A90280280A102802802802803081003002A4 32028CA83280280280280312288084288A802802802000000000000000000000FF516C000000000000000203310310001205 2092220142810088800009014884808910800000800C01005004801044A04880C88804000804C04A0020C805004850004800 000000000000000000FFDC34000000000201921821021803B0181182900B810200E216106206104104096016026056016008 40640600601441604644600683608614C0109040CC40600E026000000000000000000000FF4259040000010510E0C914D00D00552040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A82A82884A8 2A82202A82A92A82A82004000082502A8200AA82A8000000000000000000FFF8EF0000000005543540042802103542103082 CC0080D41230CC0CC8D48C40540C50D50D50D50800D50D50950B30A48B30890D50D50D50820C00840C49550890D505500000 00000000000000FF2D9200080000040040050000040040040044040400010818A10010801200099111090010000010020010 01001001001101000000000001101003400101001150001000000000000000000000FFF81F0008000002AA0AA0000521240A A00402200800002A01202302202A02302202202A82A82A80002A82A80880880002000602A82A82A80081000802202A82802A00d52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08C880084081 0000A0A208600608210A10210600600600200080200240220200205200200200200211220040290200214200200000000000 0000000000FF8A5A0000002000AA0AA0004AA0AA0AA0500A008A00002502003022830012202282222AA2AAAA80012A82A80E 80882A80102A82A8AA92A82501001412082A8200AA82A8000000000000000000FF32430008000000000004B00040200000C0 0420000048010000000000000100810100000000000480000000400000100000200000000000308000488080000220000000 000000000000000000FFFA4D0000002000AA0AA02A0AA0AA0AA0820920C800A02002082482484082A02202202A82A92A808000352040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF78DC400000400440C40C02C20C00C02C04CCCC008A0040B04205230300B08B4420821421031130031434D2503423 122002003003143503003023103503003003083000000000000000000000FFBD5C0000000000018119210018019118098018 2B814002620420402C28620608E0444042440061004160060160144164060863464160340160000160140560060060000000 00000000000000FFBACA00000000020120024920020140120421220100208A0814850848A508008048088008000008820050 04801025000D00800000000804844902928044804808000800000000000000000000FFAC8D0000000000008008848008008000b52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200062462200 A00001404002001001081400100000A0200000000000000000000000FFD52000000000004000808404000000002200204000 0023400844855050440043002002040031008030015002E0060402081004004A014001000008000001000010000000000000 0000000000FFFEBB00000000000982082080080488A88883880E092010228300140002200200108168104040200003200278 210821A01200202204A21201200000A38A572402142000010000000000000000FFAFE5400800400410400400400400400540 48040102800011340000010490890800000000A140100100920004122108007066108100100960102100100100500100100000752040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A1001842009 028500710604412210524731700600202000E0460C01004260A600600640600A04E000446082206244004000008000000000 000000FFAF4F0008000000098039A09950018AD80180704500002022B20464B612023660422E08618E00A128226006020008 016616182006000402026060206032006004404180180000000000000000FF88980000000000018010000018298418030110 01090040602200E04600A4060140960060362900102C60064064560040040041260200020860900860420AE1041440000000 00000000000000FF553400080008000000000001405000200A1400401220008008048010108090110100008000100080100000f52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF055D0000000000818DC8408810458AB8AB001891800072202040601623622620650E45E57E4861002AE2AE0A80882AE0 5E32E2AC0402AA006500C062AA2AE322AAE000000000000000000000FF9DA620000000021180290383180980180101380180 800970080060861061160060060260060368000060060060460064060060040AA002046A0009600300600600600000000000 0000000000FFFD040000000000438210488048A380180112102B80400024864D623601200215452650630620230000600640 62060040C410600640200250E10024600000610A004000000000000000000000FFFAC7000000080009805840801805911811000d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600610600 E006092004086800084010806C24006000000000000000000000FF85A600000000004190180091191195595515590180024C E54431635644443602421621630601250455655651011055655655655650E5504D6484944442556494D56000000000000000 000000FF00290000000004B18818898958918AB8AB08D8A3C00000A3570B732622622A22603708680614E4002AE2AE28E4AE 2AE2062262AC2022AA24E00082E2A02AE00AAAE000000000000000000000FF52E54000000004138138AB823823801801801E 05814000001400600610E00609604602602E34400000600600024000600600600000600200600040E0080060260060000000008d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (058100016110 126146006086024026C2ED0E20680400600620042000400400600622A004056B042840D50070120060000000000000000000 00FFB2410000000000C98B1804801801801801200841A0100000062162160D400E50E2960860260325000060060060060060 0610E000106006106000856004006002806000000000000000000000FFEE8A0000000001018438208A98818AB8AB0AA8D980 222A12248468062063224069061060060830042AE2AE0E80882AE2AE2262A80462AE2070040063072AE2A22AE00000000000 0000000000FF9CFD000800000005801804841001801801C4080180A204000400600610410610C80600600600080000600604004d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 0DE80000000000AB8018088018AB8AB8030888A5802000E08242644622E2043260960160460000002AE2AE28E08E30407442 E3041020A62AE00213600C2AE002226000000000000000000000FFF8570000000000019138A08C3801801801043803810000 024020E0A600608C00600630612608A0040060060004000060865060A040640400600440C40400601210E000000000000000 000000FF4B7C0000000000018418048110018018B100081180122A600810640E08604611423605640E246000006006046026 0B640E00600E0CA00E0060001061240062A2006000000000000000000000FF8B0900000000020580188880502B801801001800cd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006086002000 22628600600400200E00620000E006000000000000000000FF884C0000000018AB8830010A10AA8AB8AA80D8AB80500D428E 08600E4860362AC00610628E2560002AE2AE0AE4CE2AE2AE2220880862C62AE0002AA2162AE0882AE0060000000000000000 00FFF95300000000195595380B90515595585095591181203000401060961024124100062265165160045565561105102564 0612A43000E036556004226546552130546006000000000000000000FFDB5880000000180184180181300080180084180180 0040004620612604240000000E44E02608600200600640600600600410A24001601600600200602600242000600600000000002d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (102A40001060 0E0840A000423685740E02E001006006006046006004207011126086004000002147004210006006000000000000000000FF B3DF000000001C0101584584500180180088180080000000B020E2A604420000200630612680600400600644000000600612 2300016416006004002016002127006806000000000000000000FF0AD20000000018AB09195D8010AB0AB8AA9018AA813000 820007640621C1082AA5C60060062860042AE2AE08E28E2AE2AE00A0206460262AE0002AA3062AA0062AE006000000000000 000000FF084E0008000018018010A1051000801882801821800005430E02E00642E1460242A610600604600600600642002000ad2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFFE51 800000041810801009801001D05925E09811000248380010624E04020620022604620E006001906136480089806004002100 00F806004020004007844002006006000000000000000000FFAC58800800003A00C01801C41081AFB8038C180D12C120A542 4E6006C281C6008006D2682764641080748625644601601601283082700601C0180140468140070070060000000000000000 00FFC024000000003841249801A01484801C00901820830080C01600600680C00815400E00E12700E0040078060000000860 C62A304024680E0A4004003006284003006006000000000000000000FF0E8E000800001801021881889000A0180182D80081006d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (061000200060 26008022186006000006246064080000000000000000FF16AD0000000018898818B1802001889841808083800022E6220862 2608E21844E4B639630607600A00E046146116106106540010406016160002016286190006086004000000000000000000FF B2628000000C18008080048010038058338A380108020020862360964200864C220E0260873160201468463260064065360C 228800641600400041602E234002826006000000040000000000FF47D5800000021828850000841A05A01A81829843084010 215240643620042610204640641600641010621600844001603600B08001600600404000682622400600600600000000000000ed2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (042010040800 03300A82300504080000800000004062460002900900000000000C81000000000C0428000080000000000000000000FF20C2 0000000C181190190180508594980980808180A02265260CE04625250000E02E0160060C60000A6006106516406024000300 00620E040000016556124002106004000000020000000000FFA9740000040018818098219490098018019040018400106002 40640E1020004C630614648641604041604622002004651604002800604600802020600620C0064060040800000000000000 00FF08E10000020018018018058A808982584584001D92A009600000610600601000600640E0060060122060060002A80260001d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF89440000 0000000202004002000040008000000401010000200280000001000202A01000000002800000000000200000000800000000 001002000000009242C0000000000000000000000000FF03370000000AA88C8408C081000C8AA8AA88888881602A204A0700 003224022025C00000002AA0002AA2AA0AA0C82AA0222220002AA2AA2002003D22AA2101022AE222000000000000000000FF 9FF200000000004208500002800000000100200000800041042080A010800400000030012000000000000000600600000000 0000000000000000050000008100000010000000000000000000FF73ED80000000000004802A1020A4000000040022000001009d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20002AB2AA22 210021BAAA22228BAAA2AA000000000000000000FFFDEA800800001200004000041200401000040000000100051020032100 C044004008448020004002804804020004004088000000004004844302000005024210004000000000000000000000FF6C59 908000555951D0B903915835D5584B913911800045628E104094D4C434504004224515556000557556556515556556236001 55655644E00054655641600E556556000000000000000000FFDD6D0000000AAAA8888892902CD08AA8AA88A8AA80002B2002 08200A22210A2B200210228A2AA0812AAAAA28A28A2AA2422B20002AA2AAA8A0002022AA2800422AA2B20000000000000000005d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100018400421 400000890000210010000000050000000000820000800000208440208000000000800000000000000000000000FF58390100 004000404480100120002004C80400420080140C201004081201300002300504080000810010002400008000000C00008008 000800000C0000090000000000000000000000000000FF81EF10000000000000400202000C00000000400000000101002080 A0010000120000300120800200000000000420000000010000000000008280000000000040000000000000000000000000FF 28138000000AA88A8808B08809A08AAC028C88C88061B0300A426446203A0221A0960160462AA0012AA2AA08A08A2AA2AA2000dd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (520308802000 008000D00802815302C0980811204180A4472C0282000208AC0AC2A87000A842022004420460118480000000400001C40001 0008400485000005400040400000000000000000FF6BC2040000080000940A00A00802810804A42800A0005020821060A242 250B002C02006402812008242002A0288202300200280200A20202200080220A802002202002200000000000000000FF56DC 00000000000000000010022800200000002001400008400282000808008A01002000900A0400000000000008000000000100 200000000000000000000000000020000000000000000000FF4BEF0000000000040020004022800000080C408A0000030B08003d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0020020022A1 002082002800002002000000000000000000FFD08C10802000010801001003240000809008024020814004A80114005000C0 010408A10128041240000400440150000550000000010000000808000000800200000000000000000000000000FF4DAB0000 00000008C20E00802C00840C00E088189A218920020430020C201210280200220288308000200281202B0022AA0028020020 02002080802002003202002002000000000000000000FFB854040000100001941801D05805A0980594584B80405048541545 56546D3412430700448E0D641240600600600D04700702608720600622600080E00E006006806006000000000000000000FF00bd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (460524100400 0040200641010000E00600600600C00408600600604601600000000612601400E004000000000000000000FF6CFF00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000600600000000000000000000 0000000000000000000000000000000000000000FF93FB000000000001400201200000400000000001000000500400400000 4004804004000000004000000000006006800000000000000000004800004000800001000000000000000000000000FF769F 000000000002820800800802000A00A4B400A22010200210200A003202222123002402092088002002002000002002002002007d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000200005 891A00245801A414B9089809A040402004040004822A0011000828791528808000600690600650411400F00600620420E189 840086006444804004000000000000000000FF5C63000000200003901800861801429001200A01880000200C04000C804808 238880006000040040026006000200004004016006006004C0600000012688690C004004000000000000000000FFD9E40000 00000005801A40405801831001001811A94080700E40400E1001005004901423121000080260068402400040444060160564 0604611008044E006045004004000000000000000000FFFDE70000000000018418040010050010A91158218000090100104200fd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070260000400 0E8C6005006006000000000000000000FF8EAD000000002001805800801800805811001000880028AA1400FA140168058165 11A0001401040200600600000120220200600400600704608200A00610EA84006006000000000000000000FFE07900000011 0001801840001C00801B4100109095000014000043160060AC2460404000028004000070060310A000220200683640602600 600040802704C085106006000000000000000000FF622E000000000001821824205804801801205420A0C088910052424611 688410720002030A02003001600602604601202230600C02E0460260001024170450C4016006000000000000000000FF68D000032040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E0426C00A008 41E4026800826206080140802602086006046084006408002816007204012006000000000000000000FFE7E4000000000000 0019540018058210417430410013006406104006004402100046104002046004046806206006002022006006006107006004 A00206006006006016000000000000000000FF247F0000001081000018000038451012210011010540000000104006004152 28004600408210600408E0060C8000082012046506006846000004C00056006846106006000000000000000000FFA7370000 0000208581385EA59BA28C3D07001010A00288A00C6C81647EE00004628800060008800008E0060071468021020262D4407000832040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002044000439 01891800815002C032290010436306145124A06406A0602600E2062440940060260070261060261060030062068020049440 2600714A30A02E000000000000000000FF1577000000000200001834211C003010A400114100835068270843040064460268 0602700610051011700E00110000600600680103620600222000620F00E802092806080000000000000000FFCA6100000000 0004003A00281801A01713400080323022210400708600C00280050582480048628810EC0E10600680208210E00601620402 E05000208600E486082886080000000000000000FF9364000000000002063A808F18015014090B800069201122446184060000432040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600414680211 0086000006000000000000000000FFCAC900004000D802201911803405811821C219000092810550206916A48C8F406848A2 740604E50508702600604690684690680680620600600400600200102E10D046000000000000000000FF09B9000020200042 001800822C408410B0029000089004280524644402600A1C090C233006004A21087006007006006006066802006002C06000 606046806003402016000000000000000000FF5EF3000000008020009808801C27861008285480040105292D00620D00E082 82248608200EC0E00500E086E000C00061460160A200680425600540790688E102002916000000000000000000FF2D42000000c32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (406444416426 42605440E04E10600600240600E026006084004004004002002004004006000000000000000000FF6C470000000018000018 0180000180080180180000000040000060060000060020020060060060000060060000000060060060060060040060000040 02000004000006000000000000000000FF6D4D000000001800001801800001801A0180180000100040010068060008060028 00806006006004006006807006806807007006806806006004004002800004804006000000000000000000FF5DCD00000000 1800233801930001A0588390D8502800C0080610600680000600000208601720604C0161064001000060060061460060040000232040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000180100 0411A05800809A0564800444801460A6C00148916D5515651654654C156526250120002046926106404154006A2482680620 200400200E000000000000000000FFB25F010000001804001801000819C01908AB3931001000502602E2060000411060840C 6206106006206106A0600600200600E4068440C463400661C002602004002006000000000000000000FF803C000000001800 001C01400001805201945A45080005004F0C6A072A401004709610710E80F50008620625052021200F12700E10A0048A4801 004806802804804006000000000000000000FF994F000000001800001801800801841049801801053010030641614E00C48000a32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (026027206026 807006000000000000000000FFD21D000000001801801801A01C01601C00C09A01808004240500710700601024308C007096 0062080170060000208020260060060040560052A040600600600700400E000000000000000000FFDD22000000001801801A 01A0101100380000180284000028CE14682640A1400884070B6C062C61201465068D030002208E0868864240870040080060 02806006806006000000000000000000FF3D67000000001801801801A01401001C00009A80A8000B22DD2860AE2BAAA86C62 2C22E0AE28F02808E2AE12E68624A31E0A640F8E8026004110406042006846004006000000000000000000FF687A0000000000632040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (349070428869 0000F10E8A82888040860A62B621420D094D004848A68B28A2A46006000000000000000000FFD88B00000000100180180904 5252803B2C521800A00090680600E00608600602828723648920601022600600000008404E20600600000300400084421620 780208E4B6000000000000000000FFE19D000000001001801801001800801800C01800800880680500600600600600100400 6000806000006006006006804006006806000000004000804002806002004806000000000000000000FF05E9010000001805 801801801801045940801015854801A000006806806800042025006807046500006826306046002006026E4700400491480000e32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A000A0120000 046180090049000908500C0080086850900140050080900001080000000060064001A0800029000708040000000A000280A0 000608000000000000000000FF7A4C00000000000800010808C0821100201201000100010200010720038040208200340401 410400A10008006806000001F410D1050810408000280100400040051020000000000000000000FFA7C50040000010018118 0100382180185080888580082261000860060061064C005C0A624A00601000640608E09E004C0E006C0680C004084050C760 84202102286806000000000000000000FF0E15000000201291C81B41311A81A81A00A0AA958808C2ECACB26C4EC368C7280800132040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0640428E0060 06000000000000000000FF7D82004000420D54F48C20C12E04C08C34850CC28A8181348B08328300B22B00B12B0230322135 0881300315290301200208245202A48322302004B8A30130230B2402000000000000000000FFCCDD0000000402440C024021 020028020B2422000C000080212008008000209208A0000820B00801028880861200810800080A00200804800A8080000881 0810828880000000000000000000FF131B00000000090090080484090C800804C05802900800249252200200240200210200 2100082081002002113100082802022002101002014001004462082402102006000000000000000000FF01FE00000000009100932040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02000800002A 82A80A8088320A202A8808AA80282000002202A8200000020A20000000000000000000FF30F4000000200800A00C00B40840 820A10800A00802020A802812822A22802802802902012012A0000300280240280200A8023220024808A2800902802932A32 08A012000000000000000000FFE37000000000020200135020C11420230520320001000A0B308C090080081054CAC08088C4 A24840005004C00024890904004804804804814A4080C000804900A00904000000000000000000FF0FAF0000000018018019 039418819259011030018000006006416006406106D24006106504106000006406006014206506C4600610601400E010406200532040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C0020140AA0 C84002A400202802480082A80102103095002001091082092A82A82A94A82202282A82292A8020000001220AA82A82202482 A8000000000000000000FF1B860000002001543542102D45041102841343500080100C10890D00A20D50930808CC14490108 01550D50D31510C50540D513085503008A8800900D50CB0D20328550000000000000000000FF86DE00080000040000042049 06C040040031000841010080011010014401410400310A984080100080100100080101010000100000051115100800000100 1011900000000000000000000000FFE0AA0008000002A80AA0420000402C80600A80AA00008100002002080882A00000482200d32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (48048B400400 0000000000000000FFF4A1000000000800800800804940800800920A4A800000A00201600622200288200200622201200000 200200204200A1120020020024480A2000802802002092002802000000000000000000FFA8EE0000000000A80AA102040000 0AA08E24608000000411006422AA1898002008082A2480CC0000AA82A80888883212212A8320AA80806004003302A82A8320 2012A8000000000000000000FFF4A70008000002000000840000084020104000040020C200C0220028090000200500010080 320422000000000040000810000021000028200222428000000008801000000000000000000000FFDD180000000000AA0AA000332040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A10A1001000 0010000A10A9009021009009001041019001011001025000000000000000000000FF2DEC400000000C00D00C44820C52C54C 00C20C50902311301221213243314349350A04335344B0A10034020C30021030CB00312301314900B0010032030434030430 02000000000000000000FFF54200000200980180180180180180185380380184022444060442040864160060062040060862 002C612600642C22600648E00C046000406000126006006006086006000000000000000000FF2EDB00000000020300035133 020D20122000900040A2AA4B308C08008004C80482C080880C224A10004804A4040488080480088C004000810A080880008000b32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200004401 2008010201003025020002810854002001010003041024810000E3161003100000100084A800021010043003022000002000 0000000000000000FF391F00000000000180002404004C008021040020000203048440040004401020000400030041040052 01200C625640000000408C020000008020020200000400100000000000000000000000FFDD00000006008801084800004800 88210280B008820234202312918030A6020226030600321020000026020020404120427820020000A0302000092002428100 002006100000000000000000FF8A2E40080000040040040000040052140859040008230811480000280810A10C908820100900732040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4CE006000000 000000000000FF8E24000000001801801009801911815821800901000030000100700604001221200B4062060C6200006006 00020008440608400011434000602000802C012406106056080000000000000000FF2B7C0008040018018010490758ED8EB9 058258B309082502C204642E01206614E0CE3862260160300160060100000640060000942840106060200005824400040860 0E000000000000000000FF884C000000001821805001001801900801851843100200051648E15608648600630602E0CE0060 4022628600612E414156400100404000106208086006000144006006000000000000000000FFD14B0008000000400000200100f32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060060000 2000200600200222588000400000402E036106046006000000000000000000FFCF0C0000000898A98AB80F8018C9880811A0 08AAA0402B62020963062A22264060CE4462062AE0002AE2AE4880882222AE2AA2AE30000001400091C106326204806AAE00 0000000000000000FFD177000000021800801821829801832945950800000000E00E00608600600610622600600600680000 600604602600200600200208044003480022444E1060D4006006000000000000000000FF2720000000005803801101903825 80180980280181200000C245605601210A2520024D614E00604000600640640610C00600400404C090486020100084012006000b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801901B02401 C01200403008702600000600600400601600600000600604640600A006006000048409046841046000000004016806000000 000000000000FFF2DE000000155955155955833925A03B01940105C02250410E10E15645645615645411644E55600C556556 55051045255655655010845055200D55650050044D48F556000000000000000000FF8D88000000089AAB8AB881888889AAB8 238308AD81002A64832264162AA32A0AAD130962A62AF0422AE2AE08E0CE3222AE2AA2AE2040A048400240425622E2D62A62 AE000000000000000000FF324C600000001801801801880811B49A2380284900800164000060061000062061020261060060008b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF0875000000001003001801891001801801830A3180821040C68A60460A608E256810C2E10E0060100060062402 200960060060044320C000600800630E10400A557006000000000000000000FF2CAD000000001A010018018458358C180DA0 2005A03202400820E31601000610610410600600600000600600600600200600600410601080280080602401400400600600 0000000000000000FFCD090000000AB8A90AB8AB801881A0B0B1C90081800224C240446C062003220022244062262AF8002A E2AE0880883222AE2AE2AC0062002AB0002AE0042242A40062AE000000000000000000FFB260000800023801001831845803004b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600640400600 6006144124006000446300006006000006006006000000000000000000FF36CD0000000A90A90898A18C58AB841803088801 801022404600E2160162043842A00462AE2AE2002AE2AE0EE28E2262AE32622421E0002A65E00263262642022AE2AE000000 000000000000FF5DCD0000000050010458058118018A3911800811808210C30022602E08808C00C010086006006004006006 00004000E00600E00408600000E00400608E00C14A006006000000000000000000FF57D20000000010030018118250018098 41822945803200404E086086226046046000456006006120006006406006086006086094042000006400296006104002006000cb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (890408888100 08020630E0862061260260140060060060000060060004000060060081060C600010200022204E00A1020060060000000000 00000000FFCE530000000AA0220AA0AA0810AB8298AB0888A8813222800610600608401615428C00E2AE2AE2882AE2AE08C2 8E2262AE20420E28600009200820A0AE3022AA2AE2AE000000000000000000FF985F00000011435411410C90915591584391 2825804244808C0262261264124165442965565562A455655651013054E55644445040600045600410E40648045655655600 0000000000000000FF790480000000000000000082D001901801800805801200013404644E04E28240604452600600600000002b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF1AEA0008000000D0400001841801040801020A33809200D04E08608722702D02290E45600600620080680400400601 20061062569060002C240843220600A102006006000000000000000000FF1C9900000000040400040180D80111000100A801 804288430522602E08E28400004608600680611000600442442000200682E080006000816080883136040012006006000000 000000000000FFA88A0000000AA1100AA0AB8818AB0070AB0C4881801032440441E3064060442882060062AE2AE0002AE2AC 0CC0CE3B22AE21600027E0000060001424062D02222AE2AE000000000000000000FF9B7B000800020200020040001001801800ab2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (41401028204F 2B20043064000B2000106206416002002006000000000000000000FFD6DB8000000004018000510058018C1003848C0D8002 20A20451622600E121A0320609620D00E00101700E04C0082822260020100060401040000864060020020060060000000000 00000000FF0078800800002201A60409002803809041826AA1800286284D0C6006C0548100284600E1011060009068264040 0606201745200CC061010440010070060801D6406006000000000000000000FF29FB00000000A00040000180180300C89110 08C1852310509000601714600C0A808E20602622632C00604408400000B00710302614E40020E00400600650A00200700600006b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5805800024A2 840060260460C61A60260A60042060800860060045402F429608600602650020404804204640600A01804E41000000000000 0000FF79500000000004018000210018088830E2811837860042242C48E00E4166360560DE4060C814667810600616400601 442600604605614040400000202E286052400026000000000000000000FFA024800000000401D441131218058510018A2A01 008090600022648752600800A00441642112E00040F0A400C4C600A80E0029142962A00540C053628604E202002806208000 000000000000FFE08A8000000100018000210018018A508D90080100C210F0C005644E0A402050350410651021608101601400eb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF00AB80000000040200002000000000802801002800000005102800801300102100004500080002000000C0006006010000 1080900000004A84C01000000B00C0108000000000000000000000FFE3340000000004018001018418118010248400418100 00602801620E0060920060D400E21010645000600404400620428610208600E04000C11048C3060460000000160000000000 00000000FFA4CC0000000000018A204388B803849100900001840050E3065261264864020560042A61464360802961240140 0010404600600E54600022000000201610E208000006000000000000000000FF819100000000000180001100B80090501880001b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A222AAA2AA2 B22AA0002022A05022AA0B22222322AA000000000000000000FFD76E0000000004000000220104000A000100100000C00104 A0108080000000080000000221000008001000200200010000508A0800000028000840C00003000900100400000000000000 0000FF35430000000004A880009E8A88888C108008008100602BA1020183006123321902040004422AA0802AA2022AA6E83B 22AA2222022AA00010200224A2AA4022022222AA000000000000000000FF8C4C000000000001800000002042044004024002 00800040440200280001000200B0080544000020000008004006000000000040000000000000040000204010000000000000009b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (808134A02200 E2162AA2022322AA0479022AA6002AA2AA2AA0EA2232AA00200B2AA0000020080022AA20210221BAAA000000000000000000 FFF64880080000020000000000240200340100101100800010040404490000040050045208808044C1004810000004000805 00480000400002800000C00400010D080804000000000000000000FF6F8F90000000015580011194391380DB3313590B8002 407014424224D5654C446D56294017556081D565561561145465568440A655600004E5001255575064445465560000000000 00000000FF01720000000000AA8000A08C88C88888AA8CA8A280022A342A3020021222222422CA00B00A2AA0002AA3222AA0005b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF7A 3D0001000000044000806060002043080802000400020208000000800008020880010000A000000000000000008000000008 00000000000000A08000000000A00000000000000000000000FFD49F09000000040200002212C04801000204402200201415 1028009000008001000045000900000100000000040000080048012000000010048000100109020008000000000000000000 0000FF7E72000000000000000000000004104000010000000100000002002000005008000008054000008800000000000010 80000484010000002280003280000400B0020000000000000000000000FFE6B88100000004A88000888008C08208A88808C800db2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680780700600 6020006000A0E006006206006006000000000000000000FFFB2A0A802112000810820A00400102141900B40B08A0A88208E8 CB00000830C243040A180C0243A86A44888445740040A09040040450000042A8000080004800404004400000000000000000 FFB7370A00049008008008008C08408908C4C50940828010282220200A2B24C210243221215208A400212212002002002802 002002022800002000002003002202002002200000000000000000FF74860000000000001002102000000400000020040040 4000000001008000004000001004008001118800000402A88408000800000000400000008000008000008000000000000000003b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (003002802002 08280280000280A802002000042002002000002002000002002000002001002002002002000002000000000000000000FF68 530AC04103001001000C0400000220004104080200110210C094008008408440008C0008820140D001080000400011510008 00000000000428000080000800000004000000000000000000FFE938002000808800800800824C00E00C008048008100C028 0210200208280200246200200219A41000200200200200200A00200200200000210000200200280200200200000000000000 0000FF3BDD140005801801801A899418419519457533430540546A57005816556547147C54496D2E5164101160170060040400bb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF877A00 0001800000000021841011801883809905080005600600800600602400401240408600640000600002600622648404E04600 6000106500006006086084040006000000000000000000FFE41E000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000006000000000000000000000000000000000000000000000000000000000000 FFDDB80000000010010010000002000004010000000000004004004004804004001000004000800000800000000006000000 000800000000000000000004001000000000000000000000000000FFAD62000080800802A00A00A008002000898008049040007b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (054016026000 006240106016107106800006000000000000000000FF20B80000058000040240018A100583D911903C830020442022084062 89240280600620480691620048600420602E00610400402620600008608054412211F503004026000000000000000000FF30 59000001800000300001A1120181180B801029000018204800C8021008A844F00600600608600800688400620080E0F40060 0640600000600001C006016006024046000000000000000000FF8013000001800010020301905001C41809A0502905204075 128C644681228C8944820C54268D604810612048625001600400400E0460010060210840560060060000060000000000000000fb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (830AC0420025 A40AF340084A8E606160006002207006A1E042024046006000806008C47712206012004006000000000000000000FF9F3700 0001801845000001E41C0100141180D001E02022A12032C2020208260D600880752612600021600240F02000608204600600 6001006001006006406406080006000000000000000000FF4FD8000009801820020601013901241801A454358080106A4320 020E2420142058B000402604610009680400E02182602200404600600080600080601200600A084006000000000000000000 FF62DD00000180181008012140B811201901811C018C8024E30604120600EA062A42908A43460360200060440C600644641200072040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF6CEC000001 841821880461841049C03B4101E004100001C2C0404024200C668D60A40866260263100662027A660000618200E0A6186000 22620012E02A20610302E106000000000000000000FF5247000001801808C000010016118058098402010220004801016D44 4A108650600404400611600000640C8060062C6012016146006000006000216056506007804006000000000000000000FFAE E1000009801810842001009081831801AA00418000084A0600081420E00E40640410401600E0000878048060004460020060 06006000006008086806096086004006000000000000000000FF807D000185867989000201825805205D01C09015812000A000872040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0600610000E0 0188600210600300E046000000000000000000FFB993000001849B30A20485041801908801801049800000000EC971202060 0E15402E10001700620005600210620600600E204086006020046400816523016402A46006000000000000000000FFD61F00 0001801808800401001A00C40811C2150D8A2028004E426B0112E506054007022806A9610808702300602105601700400700 6020006000506102836082006086000000000000000000FF894D000001801821880001801801821801A81891010048449094 4004808806007B4408404624640008602282604600E0028060068060C044640004608202F80205602600000000000000000000472040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (810440600600 E14008600E40600002600600600000600630600600600002800000E40600E206000006000000000000000000FF4B89000000 245B15880009800009805852C05881844048040C48080C94643614700E006C460A620020EA0608620700600E816006006020 0002001060A6007026226006000000000000000000FFA613000001801A43A4814181DB08B008AB91305082202C1207004048 0262268050028000270A600120620600600700600600E106006000006000006002007022016006000000000000000000FF13 D5000001843801882029AC38C3802F41B884808900020020114000080006404482003206206000007016006001506006086000c72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (EA0000000018 018000018000318038C08018C18C0040201440E24402600648E09000402420620840603208600600200600600E0060004000 00004026006006006006000000000000000000FF7D0500000000180080000180000180180080180180000000040060060040 06006006006006006000006002006000006006006006006000000000004006006006000006000000000000000000FFED2F00 0000000800800001A00001C01800801801800000000500680680400600600600680700600100680200600600600680600600 6000000001004006006007006006000000000000000000FF6073000000209A0180C203140003809B0080180188000048440000272040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (608000001000 601E00E817006000000000000000000000FF7C67000000000800800285001401851694C21C0584004424545411403440D645 7446556A44C5655115604400612800042611601700E040000100036006006006000006000000000000000000FFCD2F000000 0048008821812009019A1090801821808000228602600680C80600600080400402610004640401600600000700600E006000 000000E04006006806000006000000000000000000FF56FD000000001801882201020001C4980192D80D80A11565448C010C 50834E844220156B0D0D60401061020464A950A00650600603608008000008400E00E006806006000000000000000000FFD800a72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004006806806 116303004801406805006846800006406006016000500000126046006006006002000000000000000000FF5D87000000000E 00601000A01A01A01081821801800000620D00582000484401720200E84220748000E00400702900040600680600E0000000 8100E006006806806000000000000000000000FFF44F00000000180100900380380101180BC01A059200C4604654C0842A6A 97C4605052600B04E05032602228E08002A0A688E00F00602000000800600E00600E006002000000000000000000FF6B6300 0000001801011001A05E81001829D89883980022202C29D2AD2A0EAC2AD2BA02623A28C2A94A62AA5BE28F2DA1060868070200672040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000023429221 12ADA15A41A825098C9B018000C2280682C057244CA484E82AA04926C160012C6808046A08CA401608608703600024000002 488E086006C8EC2E000000000000000000FFF49F000020001021003201C41883C29805A03851800008E0A720430408800850 440102041602600000E32430608000408604E056906000100001A0C4460170CE046102000000000000000000FF7C6B000000 001000001201801801A018018018018000002004004004000002004002002806006000806804806006004006006006006000 000000004006006006806000000000000000000000FF1F5D0000000048000010808418518350018C5811844011600480400000e72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500000000002 002902012002000000000000000000FFCF9700000000180580185404400008000A52002800000440208040140042242A0A04 004240024000A000A10101061100000200B00A8000A800000082290080A0008124000000000000000000FF94730000201080 000000020001220781400404900000100480400E083100480005680004100100000880093806DE2810090C08004400000400 00061001080C00560080000000000000000000FF57A40000000000A810F00190185180209128190180000A20042440000841 8400E0161040AE00600000600080600602480680600E016000020000E0644680601608600E000000000000000000FF335D0000172040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (461465064060 A601600000600E88E0C408600600E00E40600004000004650E00650630E006000000000000000000FF4D75000000400C44C1 28C0D40D14D48C80822812800122300B00201354B50340B83314340BA02001C4300200241301208284240384A00050000140 202280202B043282000000000000000000FFF5BB0002002403422103082022802004010022400000A00800108840C08C00D1 0000820801608000060A10001001000980810801000000000000804994000848A00E00000000000000000000FF1777000000 026800800CA003880490080020C804800040A0120230A206200204200264210200200040200202300000200200B40200200000972040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0880AC0AA082 08808800400000400200002A00008002A00000002202200B02A82A80002A8A002A80882A82200402A82A80002A80000002A8 AA82482002A8000000000000000000FFDE1E000000204800A00A00A02C40D00B10C20950800080280240200294288290210A A02802002000002042802A22802002A0A802002000000000902002002882912002000000000000000000FFAB990002002202 0420023124040242A0453154010000810CA80D080CC0CC310080008110000000000048880048048008941250040040008000 00C34804004844841000000000000000000000FFC02100000014590190180D815841801A319019418000106406D46444004000572040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002308010002 10008000000000000000000000FF51610000AA0A80CC0AA0AA0AA0280AC0AA0A812200003002402802A00302002A82082202 A82A8000AA82002A82A82A8228AA82A82A80002A80002A8A282A84882402A8000000000000000000FF0B7600015435215035 43502423122C82B02404B00000D40C00529548AC0C88C804C1020D51550000550528D50110550540900D5055000055000090 0550550900CC0550000000000000000000FF2F20000000404600400400400402400400404608000103100105181150115100 08C1011001800000800001000001001900001001800001000001000800001001090000000000000000000000FF5AEC0000AA00d72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080490480080 4000004104800204804914000000004000800000000224004A94C04000000000000000000000FFD327000000004804800800 800902840800810800800000A00240210214208200210A00200200200000282A002042002002002802002000000000802012 0020020CA000000000000000000000FFD1A50000AA0880800AA0AA0AA1000880AA00000800002801100002080002002A9220 3282A82A8000AA93502A98882A8220AA82A8AA80002A80002A89802A80600002A8000000000000000000FF38820000000004 0000000208802000000208800400000080C8800000010020028808280000000000801000001441001010208000800000000000372040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010005000004 0042044840240008000810810092D10102A90D92812050010084092010094210410014010010014000010A00016011053010 81001000000000000000000000FF4AA5000410002C00840C00800C10C54C00D24C1095003431031130834C20CB1035334334 5300A00951301308300300300308B0030024110C0001043003003003103000000000000000000000FF31BD00000001180188 98058219431019098018A1800000624602420400620640600408608610600004644602608410600640600E02600000000000 6016236114006000000000000000000000FFDC710000002202312002002002312052004A32C300008414A88D4824C088308000b72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (608605620020 4000000000000000000000FF92780000000000020500820520000440A000005000000002001101204202402102A024048024 8000120020000106010100000100000000000080000400000400080100000000000000000000FF197E000000003801829804 0000B000C0200C0040048002044412402424C00000402C148544000200030240300126000200090010020210000000020080 040000080000000000000000000000FFA750000008008800080880820812890084900988804020210200200A092102322002 10001A18240008200200200048240231200220200010000000210A08A00A400000100000000000000000FFC931000400000400772040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02610A406000 00613600404608E006004006006000000000100006006000128140000000000000000000FF1F1C00000000000100800980D8 2182090184182180000040120040042040240C60400464000060000060061040000062060840060060000800000002060060 00104100080000000000000000FF544E0000000000010878098419A3805800821903884018C00E00600604041803400C40C0 6445600010E2460A03000061060040060060800000001820061AE180064018000000000000000000FF2FEF00000000000512 190580180B80982288180D900000C2860880A000A08420429409409408620002E40604040640E00600C1060061000001000000f72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002982580180 9211801801800004400210401408610280600712E00E00600000600600200008600600200000600000000080500600600602 8000000000000000000000FF5049000000089AA80AB9018218E08B98918AB8AB800022640E00020010E0C2054004E942340F 60002AE2062AC2C82162AE2AA2AC2AE0000000004042AE2AE2AE144000000000000000000000FF6061000000005800001801 90D810801801801801800001428642000008600220408400C006016000006006004006046006002004006000000000234806 006006404C08000000000000000000FF8BE300000002000500014B80180580282B801801800010604210C14C242430154448000f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AE2AA086200 000000000000000000FFEC0F00000000580280000185580004194180180180000060944064C64340124040D4006006006000 006006004206106006002006006000000001026006006002400010000000000000000000FF45CE0002000C1B009519019099 541258A1955955800051655425022020C42E55442C40654655600055652E55453044E5565525565560000000015565565565 52485548000000000000000000FF6DF90000000A98A90AA04B88188D885C038AB8AB80002AE04212C0140063020842001462 A43060002AE2AE2AA08E2462AE2AA2AC2AE00000000008D2AE2AE2AE0102A0000000000000000000FF7EDB00020001184D00008f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C60060000060 0605200600600608E0360060000000000C60060060120A2000000000000000000000FF28F400000004588080185588080080 3801001801800044E00010E14E24603200244C00410E00600000608E00220010E00600600600600000000000680600600242 A140000000000000000000FF712E000000009805802001845001049909801801800010600442400408400600408600E00600 6000006046002006006006002000006000000000006006006002002008000000000000000000FF76930000000858298AD885 8090AB081E278AB8AB80000062AC00430404E2872AE1002A62262AE0002AE2062AA0A82262AE2AA2A82AE000000000AAE2AE004f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (805805001841 001801000000005400408602000600005600410600000000600602E0460060060060D4006000004000006006000016006000 000000000000000000FFFD100000000898AD8000018908898A98890AB8AB80001062A000410424622612000E34400E2AE000 2AE2AE38608E2AE2AE2262842AE0000000002162AE2AE332242000000000000000000000FFBBF000000000180184200100C8 03805825001801800001600020404402601248210611420600600000600600644000600600600000600000000000E0060060 82012000000000000000000000FF09080000000258048898D384084080180100180180003260080B650E096102010224044000cf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A241E0000000 00000000000000FFF73B000000001A0081090180180502182100180000002040162A401620000640610600600A0060000060 06002000002006006044006000004000122006000004006000000000000000000000FF197C0000000AB882AB08AB08988988 388B0AB8AB00002AC20602C23608800E2AE3062AE2022AE0002AE2AE28228E2AA2AE2364042AE0000040002022AE2A82260A 6000000000000000000000FF9D25000000555B51D4203592595188D915155955000003054401444011055602842E4144C255 200055655645655055655654E48C55600000400040655655044450E000000000000000000000FFC0FB000000001811804001002f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20090A648704 400804400A007281106000100000007006001000005000000000000000000000FFDD66000000025802888001001831805A25 001801000000402609650809400C08E2220070820000000060060844060040020161448060000000004A2006000000104800 000000000000000000FF4ED9000200201A01842801805805831809001801800080080D246040821546000102002045002001 006006802000802002106C1000600080400000B006800012446000000000000000000000FFC9CD0000004898E98000AB8E98 C18D18810AB8AB80002A838450600060054422600A2AE25E2AA0002AE2AE22A0AE2AA2AA3260042AE0000040001522AE2A8300af2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (218018910419 01914050A20128740320210E0440262464430D6140C8650614408842400A04F00280612000208010C0060A88864040000000 00000000000000FFFF85000000003C0100114484010582580D4918018409A2202432522104F88608420002603300C0200060 0648A0000130438160460060004020022060078A0086004000000000000000000000FFFC74000400401A014310A00200CB88 3A43089829934911303501C80B02680624411948340904610140605E80210740A02204702688614120210211680701000640 4800000000000000000000FF3AEF000000401800E20801801811881901021CC9000000420100680E40421640902388E10608006f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (014000000000 0000000000FFE244000000080001041000989949801801801801808000600409401008600022408204A01C40A00820608620 44804240040260040060000040002020A6000052000020000000000000000000FFF73E000000200403481004801883863061 8A1881880004E0940442C2236682114702032120082030046266494206004004086504006020104000482206000022008280 000000000000000000FF976D000000201A4002380A801821801883205A03800004241000E03600202E11502F086282246200 02E0070040062149120060020064000020000050164B0092005000100040000000000000FF1271000000003800209800001800ef2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000028006 080010000084000000004002440000000010010000000000000000000000FFDF280000004244040880280200800D40040000 0000000102881080300003085400000005400000000000001000260081000000100000000080000080000004C00A00000000 00000000000000FFC87F00000040044228580580180D84394592588188000362080061062464940044101060061000400264 0610010601008C026000006200000000506486008002000400080020000000000000FF7B8100000010000140180900980180 180180180380880060861064421060244CC12000E4C203241040E14620000004000410600000604000000200004E2A008201001f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C8888AAC8280 082A2302242402AAA0328AB2922AA0A292A0002AA2AA34208A20322A2AA22A2AA00022A0021022AB0000CA2AA00000000000 0000000000FF848000000020022000000000000000000020000C00000D010100040003003000005023108008800080100000 0001020088000000800000000000200000000288100000000000000000000000FF465B000000288CA8C008068808369008E8 8AA88880002B20022020022A20020022422020022020002AA2AA2122882322222AA2222AA0003A20000D62AE000402200000 000000000000000000FFA33100000000180184388001200800100000002200080040240403040140440141480C8008148000009f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF3C44000000088C208AC8808848AACAA8AA8AA86080012830022AA113202203402202002082242001AAB2AA38208A 2022222AB9032AA0002020000422AA0000022A2000000000000000000000FFE9F90000004002024041100000000200044014 4800080008548910C8800500A01004001408C000010050040002451411000041050040000000024050048000040040000000 00000000000000FF24F6000000555915F51955949955955955D558818000406C2C55782650748615650410644E4060005565 5645633451644755623455600155600008DD56000044456000000000000000000000FF6C150000000AA8A88B08408AA8C080005f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00800290040C 00800080000000000000000800040000000000000000000000000000FF182F00000000000000000000062820800810000000 00500000000000000420C60400008200200000800C0080000008802800000000000000000000000020000000000000000000 0000000000FFA3F600000022421200000405400040000000010A0000010A880008301089485400A834023004800000000005 0200090090800410800000100000081000000008008000000000000000000000FFD204000000000100202048000000000000 20000000088200200003008200010100000080001000000010000000200400000000A000000085000223000000034000000000df2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (955913840105 492690754491692DAAD10C81680E5564514860068060042AE206006084000000200000006004426006006000000000000000 000000FF73920200800000A80822030224424003C16030816940C0CC882848140400AC004CA42004298042A800442C004534 000058000404000000000028004004005004004000000000000000000000FFC2D40000100C08008008908808008A08049049 0882C00223020020C2093002002012002012022200082002002002A028028022020000002000000030020028020020000000 00000000000000FF689A0000000000000000000400000043200480040000208040100410040888508280000000108030400A003f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFFE33000000000800800800800800800801080800A0002020020000420832032422020028020128280422020020000020 02002002000000000000002002002000002000000000000000000000FF507E0201000040A008220410000200008000010028 000880903000050000C8000000200028800A8000004900004000000800000000000000002800000080080000000000000000 0000000000FF5CA1000000002C108008008C4800800800804C00800000280200202208200200214200200200A00102200200 2003802002002002000000000000002002002003002000000000000000000000FFA614000010141801801D11941809B5581500bf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (65010040CC20 400C000100200000446142007014356300000000000000000000FF33FD000000001831800081801801801021801801822002 440E1060080024024021120120004060A005601604604600400404400010002000000010600200E004006000000000000000 000000FFE41E0000000000000000000000000000000000000000000000000000000000000000000000000000000000000006 000000000000000000000000000000000000000000000000000000000000FF62890000000012000014000012002000000004 0000000050050000000040000000010040008000010000000000068000000000040000000000000000010010010000000000007f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (05800003440E 10600800614354000315412609640008603610610600202220200200004040000010600201600E5464800000000000000000 00FF96E1000100011841810029827811829001AA1A518220240802A06A4658221700F30D0428122460E006E0460262268940 040A40040A00C00000002270B282632504E000000000000000000000FF68410000000019A180025180080580100180182980 8009082240E0243041060060A420400300600000608600600010408C10500804000000000000600304644400600000000000 0000000000FFAE04000000041A01800001AC5800831005B51A4D8080504046816C2020004214A4225408C00964001061460800ff2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 7CC0000000031841911061801801883C01C21A1181000C008A18608614601229086360C09404600100600600600600200300 200600004000018001E0020A6006006000000000000000000000FF91CC000000025813E01001808801883C01D21C21882190 6932806145C0604200040204F02400602804684E00E000002002082002000000000000006082306406026000000000000000 000000FF0F3900000000390C880401811801801881881801914000C2460072000470A3050A0300442680600900600E016000 002002082806000000000000007103206406006000000000000000000000FFA19D000000041C08800481D0180380184380980000a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08208A202004 0000000000400060068060C6106008000000000000000000FF3931000002000001003801812059029F210558258000310014 097084256CCE00420600E82225654808E0268161C001A00201A00408000000002040E0068060260260000000000000000000 00FF2B7300000A000021000B058010810518410018218080024004104824504906A1442E0260C200600010E0460460060020 0200200010000000000009782CC8720D246200000000000000000000FF266000008000010100080180300900190100180180 0000CA04804404004086524906007302006000006806006000013802802000000000000000006008046084006000000000000080a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (808862004040 4024724B01A043046002026200007037026040006106006004000000000020506044107516406010000000000000000000FF 4EED000000101901802C11A01905C008014818419000404010044003926086546096C2F12608E01000600600601600600600 6005000000000001407106516104006000000000000000000000FFA37E000008001A41C00B0580180188080522DD11808013 4D1005480209620754600E20610E03632000720604E000086016206004800000000000806814406805106200000000000000 000000FF3D07000000000001003801A03001501805001889880040628442690600400E0A400640E01240601000620E0060060040a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF7D77 000000015801A00809A01901801000C034218000A00000802000242022022016203006016008006006006000006006006006 00000000000020200428C006006000000000000000000000FF8ACD00000010190BA01801A218058210109110118940116212 0400869003125021008D0924146B0080682700600E8060060060060000000000400120060042862060000000000000000000 00FFF525000000001A63A05801804801800B01009809802000F8010040820070200130020860030060800060070460060060 0600700400000000000000E106006206A06000000000000000000000FF112500000000BA09801801832941820989203E059000c0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060164060000 000000002C6A26AA4006006000000000000000000000FFD66100000000000180180180184481188400182D84003500464940 80008404002000004086236000222202006006102006026006400000000000002006004006006000000000000000000000FF E0D8000000001801800801801800001000800001800000600200200600600600600400200600600000200200600000600600 6006000000000000002004004004006000000000000000000000FF86BF000000001A01801801801800001400801001800000 68020008068068060070048000070068008028020060068060060070060000000000000020060040040060000000000000000020a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A2AE22C8EA23 E2082E92CEAA50862D60B13AA0B21AE057482106006656208000000110023102004006006000000000000000000000FF5C23 0000000002018008012158000C5E04151801B140806554814516400414492284CC45575062A140C14504E001003417006106 000000000000006000806005006000000000000000000000FFB879000000200181A018210118009238A00018818A40020004 80400000008480200485480600E04001410404600600200600E0060100000000008020240068040060000000000000000000 00FFC2BB000000000401800C21A01A00223820483881A80100028C0260305200B454B2C830604408650010202250E000002000a0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF154C0000 00001800800001011A441110051058058000006000904806107040084844814046846400004C04C070068028060460060000 00000000506C03546806006000000000000000000000FF699E0000000018018010010018000010032018018120802C810040 0300600000D00450408D147D00805005046008003406006006000000000000007002004006006000000000000000000000FF A98B00000000180000200100BA000A500113180190010000540164C840A408C242A6046246C0E02828A14A88E02020288E80 632E000000000088802083006006006000000000000000000000FFCA86000000001801005401000A000010014018298020280060a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (602600000000 000006640200E00C006000000000000000000000FF5918000000245B02A81229201B02B0120123181380008C3050C34C2303 0C02800804D04B0F0AE000D20A804C6080884306037246000000000000C26902D27204906000000000000000000000FFE05F 000000481840C242018B30286211450838C18000210304086110B0008E3280A0026026206000004024006000024006106016 00000000000010E20200F00D226000000000000000000000FF8AD7000000001801800201801800A010012018018000002806 004002000806000006004006006000804004006806804006006006000000000001802002004804006000000000000000000000e0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01244A002003 003002042022402000002282803000102103002002000000000000002042402000802000000000000000000000FF40770000 00081800113A00012001000420080020000124400000C2844C5048E044C42842040A80000201708800060400000805400000 00000000A04010840200880000000000000000000000FF4E8500000002600006000000018804000000A60400000204200C00 00101000030100110448000000500400A50006081080100208000000000000080180280140220000000000000000000000FF B8C80000001019A08840111A98360B10010218C9800040E200404036030002040004004094006000000000026806004E06860010a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002A00000000 590180580182B8018C18A9801805800044600400E00621410401415440640600600044E00E00680410600E406A8600000000 000000632C02600E026000000000000000000000FFC49D000000510C40D28C14C80C92C10C00E20AC08001903343AC352B14 2022A2220313305340200110334285200B0424A2123042000000000001843003C13522002000000000000000000000FF3CC2 0000002002002000002002002001822404020000000984B20900A08380089030C20800A00000AD0800001090820850C09000 000000000000008A00030C10040000000000000000000000FF0DC100000001084280082C844800900851000100800018204A0090a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 001041001001000000000000000000000000FFD97600000008A0A80A80AA0880CC0A80A82AA0AA00000002A8210000018000 A202000202002A80002A82A82A8AC8A20220A202A0000000000000AA80002A83402A8000000000000000000000FF1C900000 00240A00800A00A04A02A00A00800A008000152802822C02822C0A10A8D228288300200100200200200210A91201200A0000 00000000002C82802802802000000000000000000000FF9AA800000020020420220024024020220300100100004008040891 28C848C4004804810849004001001000004024800804884004000000000000000834001154804000000000000000000000FF0050a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000100100 C0AC0000000000000800800000090080000888000000000001000028000000000000000000000000000000FFA9A300000008 C0A00C00AA05200C0A80AA2AA0AA00002202202A8280280200B002080482282A80002A82A82A80882292282200C000000000 0000AA82882A82A82A8000000000000000000000FF6C290000003503141543543303103143501541540000440D40C00A30D2 0AC0CC0C10010D28D50000D50550551311440C50D48440000000000000550A80D50C08D50000000000000000000000FF7F59 00000042041260C40050048040400000040000018011010010510480D004914180110100000100180180124110000101080000d0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000200234 2012002023084022002014010000C048308008C0C8088804484881500900400100480480482480C108804B44000000000000 004825004800804000000000000000000000FF91EC00000000080080C8008808248408008008008000152002002012022022 11210228204200200000200200200200280208200A000000000000002512002002002000000000000000000000FFC6D30000 000AA0800A00AA0280400884AA0AA0AA00001102902A8200009200A002005202802A80002A82A82A82882A03203294100000 00000000AA80002A82A82A8000000000000000000000FF4F62000000004020400000004000040002400400000088801012010030a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000000424 000C2012000000110000000000000000FFEC1100000000002040140A00000040E40040452002A10012910311A10092012090 21241081080109009241031009001001001000000000000001011001001001000000000000000000000000FFDC8D00000000 0800D00C00800810C00D10C00C0894C142B00304343334331340B14300B4834D241100341344301301300B50300200004000 0001003023103003002000000000000000000000FF568E00A00005582184180B801801831845941841800008430648600600 E02608420E3040360060000D6006006006006086004006000000400000006006004006006000000000000000000000FFFA1E00b0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (640612031624 24022D642000600E00600200604400200600000000000000602400000E444000000000000000000000FF7317000000000100 00408A05008C0840218000880040040040200048500010110208000040100140020008000006100000300000000000000000 000020200020040000000000000000000000FFBF090000000218010A18000000090010899240101000034008004404544148 080484008454230280120030010006010108284000000020000000010020004000000000000000000000000000FFE92A00A0 0000A80080000080084087082680488484002821023CA00A00200204204A5E600240200000200220200044201204241201000070a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018108050 0188484B80180384580180005340042B240E0420160024024842B20060000560A600604600E0040040060000000000000060 10130090004000000000000000000000FF1C250000000018018A100580480310380180590580000042040083062220062060 000160440060000060860060002260044A420E008000000000026004420044004000088000000000000000FFA60800000000 18008A1011852910041849809811844000E24450A2861262762120C210821802E30004608600600410603400200600000000 0000006404180006204000000000000000000000FFCC65000000001881803081800820009013811801800003008402602E0000f0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00002AE00202 C2802AE000000000000000000000FF7FBA0000000048888410008C880000180180180180000558A600001200200400A4C000 600600600000602600620000600200600600000000000008E00E004004006000000000000000000000FFCD6B0000000AA081 8A80899118000898898CD8AB80000000BE1028260062362B01A01081462AE0002862162AE6CC2A62AA2AE2AE000000000000 2AE0101042602AE000000000000000000000FF4E27000000000025C00043848900243841801801800000040600610628E106 00A00E04200600600000600E0060020060020060060000000000000062A4404004006000000000000000000000FF72FB00000008a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0440A022C2AE 2AE00020620E2AE0A83A62AA2A82AE0000000000000660402AE2AA2AC000000000000000000000FFCECB0000000218200028 5180500184380180180180005060C60505405041040020020060040060001060860060061060020000060000000000000065 44402016006000000000000000000000FF30FE000000151822012955805955D559558D195580002804165572A02D452C3020 1654E5545560004D648E556130456552550556000000000000406504552556556000000000000000000000FFF34000000008 C08A8A90820208AA089CAB8898AB800005420620201202A2242A2448A5420E2AE00022E2262AE08E22E2AA2AE2AE000000000088a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000285180 1801801801801801800029600640601000800C10A0860C008600600000600600622600610610800600000000000000615200 A00202E000000000000000000000FF987B0000000000000108018A184B801A01011801800053600E09640804008C4AA40690 000600600002E08600640001600600000600000000000010E002002002006000000000000000000000FF1C970000000418A8 00580180D001801805943801800000410400010428C00600600A004004006000106026006006006002000006000000000000 406530006002006000000000000000000000FF2A6000000008B8025A18AB8010818AB8A98058AB80000042242200240042260048a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5565445524B4 034000000000000000000000FF115F00000000B80180B8098000030010018018018000214006010080004002502056002454 006000006006006006006016004006000000000000006006002106004000000000000000000000FF6CA100000003D8A80AD8 118438078098AB8AB8AB80004043040062A02A02A400400E0080062AE0002AE2AE2AE08E2AE2262402AE0000000000002AE2 122A6282106000000000000000000000FF014B0000000038020019038C98B194580100180180000440D41480000000044464 2040022E00600000600600600000601604000600000000000000600200604A484000000000000000000000FF98830000000800c8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (082060042AE0 002AE2AA2AA0AE2AA22E2042AE0000000000002AE58637A4022AC000000000000000000000FFA268000000040003C0080180 209102080180180180000840260800020081260A60802C800600600000600200240000608601600600000000000000600400 0004204000000000000000000000FF96690000000C00538C18818320B10AA8AB8AB8AB80000242AE2A02202A82AE0262002B 40862AE0002AE2AA2AA2AE2AE2A62D62AE0000000000002AE02E20002E2AC000000000000000000000FF8802000000501951 B5094590804110D155955955800004C41644854A54441241242E00232C5560005565565561505564565045560000000000000028a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800A05800C01 803009801C01800100E08700531410614520500620E087006200406455104120003027006006000000000001006004004011 804000000000000000000000FF569D0000004018ABA21803A2C001801001A01801800129600648403512E004524080056086 80600000600400400600208610E006000000000000806024804148004000000000000000000000FF8B690000000038018008 09800031801001801A01800004680604C08600400400442708622E0060010068030024000020060250060000000000000064 16102402004000000000000000000000FFE4780000004A990188B8E59800838AB0AB8AB8AB80001062AE0042142042AC01C100a8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B64864828260 00140400000000000000FF9543000000401901801005800C0180100802182584210A400048E24C5004B0890C420C04161461 28446444CC408604200692400600000000000088610600A006086000000000000000000000FF7E2C000000405801E0000180 084180100382190390A810602020200700A0000A001312120E1360D013600220200010200608580600000000000248610604 E026006000000000000000000000FFFD5B000000203801A01401A00821803001A01C418C09446E001120454424100105CB00 004680E00108F0030520060C2006044806000000000002A0600682200F106000000000000000000000FF3E890000000019010068a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (628E44E41052 62004000364B4006006006000000000002086106084082404010000000000000000000FF2E9D000000201801801041842801 889001851801800000628441204640E00E00602A02604610600008620420422008409600600600000000000000604604400A 244008000000000000000000FFEF8D000000001801C0102102080380300580990183004361440021240560064CE28241E166 20640000601409404600C246026006000000000000086006020042004000000000000000000000FFA1C70000000010018A80 11808931801008021D21800001402132EC8CB002A0400002D00D0E8B641023600400401022300E004006050000100040006400e8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2214304000A0 1180000000081100040040A40001001000140540800000000000400100060000001100000000000000020004800000100000 00000000000000000000FFD9B800000068000040408001000404000180000000000201080104080300100084A00804300000 000001080C0006088000040000000000000000000010110320108000000000000000000000FFA11F000000401A01D0001080 1905885008001841800002400600648408600210208200600600600000E00010040000448604600602800008004000641620 44120040000A0200000000000000FF2693000000001801829000815829811000001901840800C5260C600C01655221244A4D0018a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620455600000 0000000000000000FF9B990000000C08AAAA88928888A88880AA8AA8AA800832A20A2A200221222223208A2A24022AA0002A A34B2A20AA2222AA2AA2AA0000000000022AA0022422822A2000000000000000000000FF3325000000240400040022008400 20900000000000008000010010808000080802002200010000000000800A00000800010010000000000000010000002B0090 000000000000000000000000FF007D000000028AAACA88088008888800A38AA8AA80002022222B24022C2332322402202100 2AA0002AA2022026AA2222AA2022AA0000000000002AA472220052220000000000000000000000FFCBA900000000380180180098a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000090 140200010000001000000000000002000000408120000000000000000000000000FFCC980000000BCCAAE068B0CC08AA8C08 A28AAEAA80002AA3A23422223022022130030022AA2AA0012AA24220A0AA2222AA2AB2AA0000000000012AA2AA0220422AA0 00000000000000000000FFCC4500000040A20020204004440422500140140100090001208011510800040048400110550040 0100500081000110800480100400000000000300410108C004014000000000000000000000FF653500000050195591190190 3955903955755B55800055745741745642E52444493610ED57556000D56C1640E356C57556556556000000000000556556800058a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (204008804A04 00000000000000108040088040000080C20020000C00000810000400000200080000000000000000808C0800800000000000 0000000000000000FFA65901000000400000000000000204028020228000000008280002D0040200208C0000800800051080 0000288000008000000000010000000040800000000000000000000000000000000000FF3F300000002004000B0002002000 04000820000000000000081000000401280004A04C0000000001000020000000100800000000000000000001000000080408 000000000000000000000000FFA8B200000000200000000843000001200000000000080008008308901100000D081101000000d8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000000000 000000000000FFA3DB004102015C51801911905AC1A55D15155F159400515557556046556546B57084A06156006341016006 00610684600628604000000000080000620E006006006000000000000000000000FF9EA00A00000A80000800030092057810 4B483001000100402C0255008002210200048500844008300040145504000146A4004000000000000A880140800150000040 00000000000000000000FFAEF100210400CA28800C9090090084480090880C8A00D0A5032228024420831420020020832020 C8013002022082022002402040000000000000003003002802002000000000000000000000FF2F4D000000000000000200000038a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000008000 06000000000000000000000000000000000000000000000000000000000000FF6175000000002828A00800800C00C0080100 080080A089280290280200200A00220200200200280080200200200200200200200000000000100000000200200200200000 0000000000000000FF29DB0C00000A80002100040140001200121044000000C0082882082802024000000010088000004080 0000000001000540000000010000000508001100001000004000000000000000000000FF4933010000000C28908800802A00 800800C0080080A028A00208200280200A64200208200280351000200300200200200200200000000000084000300280300200b8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (843840023801 A04021655653640A0D4312D42012056007221010146006042546016046206000000000000000104800106006006000000000 000000000000FFCD0A00000000200080180180180180180200180B8400046006006082004026006502486106000000006026 00200040601600600000000000000000400A006086006000000000000000000000FF44BE0000000000000000000000000000 0180000000000000000000000000000000000000000000000000000000060000000000000000000000000000000000000000 00000000000000000000FF8BFA000000001200001000000000000001A00000000000000000000000400500400100480000000078a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF673500000000200480000181180180180004180D844005210600650004404E0864041560062240082071060040 80406016216000000000000001906016006106006000000000000000000000FFD784000000000001801801801D0393182384 9805B10020622E28E02208418202A08A2020860040401260060B222608E0B600600000055000000042800608602200600000 0000000000000000FF0A50000000000000801821801805803801813801800000600702604A00F200210802802E0600400048 6926102000166106016000000000000000854006006846006000000000000000000000FF3A1400000000000480184181180100f8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600C00080 6016006000000000000000007804006006006000000000000000000000FF642A00000000112180200183390191394B805811 81000062C6C2684C004822182030A02106602000006006004806006806006000000550000000402007106002006000000000 000000000000FF4341000020005000800001821801843805A498038C0000628702709400700004824140A006002200106006 00500000700600600000000001010000200702E006006000000000000000000000FFF9B0000040022105800001811C018419 200158898221202026A060A000480222B21480F906804C0000600600400600600600600000000000810000680612E80200600004a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01A01881A010 506926006204005800200814044246202001A0E00E0040060260460060000000000008008020060068000060000000000000 00000000FF55C9000400001885800201819927821C01803847800007E0069C614412650008004C53413F0021000060264240 50006006896010000000000004014246006000006000000000000000000000FFFF06000000008809800001801E4984D81184 5801822080401620600C4440210A988000480600400000614604440680E00610600000000800000088240409600400600000 0000000000000000FF0DD1000000040845804001E05801801809A0190180302058060060040040C6406000004006004024000084a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF6C8C000000003A95809C03C81811815801841D2984504062174EE91C9021000503C632190600600480680E40600004 604700600000001008000410104610608A006000000000000000000000FFFA8A0000000908210018A180381595584DA01803 8001826006206100000007106017008206002500407006006406006006006000000410010810A02006006002006000000000 000000000000FFAAB2000000008A01001801C01901801809801C41C0000870C6006441202426A06806A1120620288020E88E 00622801600600E008000000000000013006016802006000000000000000000000FF0059000000001B0180000180180180180044a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002007006006 006000000000000000006007002000000000000000000000000000FFC8DC00020000982880180184180182182BA008018000 00600640681080681600440E20500680608500600E0060000060060160000000000000410060060000880000000000000000 00000000FF02BE000000001C018A98438858159118018018A1E0400D6C0E056100006006104800024206006A004070060062 06006006006000000410110010C06006002000000000000000000000000000FF2C960000001059090A1901821801805801C0 1895802108E00E10600480106E60610601000600680000600600600700600600E0000000000000200020070060020060000000c4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D82988804262 062A611450E2A64CC9504060D000F10040602643240800600600608004800000000000600600600200000000000000000000 0000FF9F0B000000003809900001801841801923841883842000E0D600E0440400080044000B620000604000601600200600 6006006000000000000000006006002000000000000000000000000000FF11E1000000000800801801801801801801801801 8000006006006000000000004004004006006000006006002000006006006000000000000000006006000000000000000000 000000000000FF8D4B000000000800801801801801801C0180180180010068060060000060000048040040060068000060060024a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF50E5000200001001A02001901A0180988988B089C8000063AE2AF23A0AC2A320C2060B468640E1A828616E32225E016006 006080028000000010806006002000000000000000000000000000FFE746000000000800800005C01A25801801835815C540 40604E417545250456214D554C0150154A2C40640604C1000060460160000080400010012060060060220000000000000000 00000000FFEAC6000000200868804001801A21801801921803808010F00600640400080880400C20600056401010600600C0 06006006006000000000000000006006002000000000000000000000000000FFB60B000000021A0080000380180180B8118000a4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060060 00000000000000002006802004000000000000000000000000FF1653000000044001100005801801C05C44000C4184415460 0700E106C0100234414401405050CA0000600600400000600680600000080000000120600600402200000000000000000000 0000FFD64D000200000001200001881A21801C002208018000006046007C8702400200401408404090505000600600400600 6007006000001000000000006006804002000000000000000000000000FFBE55000000001000800003A0180580180181200B 82C140691640604A20F44A015546A4C28F2260812062A60AA0A800E0260160000080400000080060060020010000000000000064a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800082600600 600E210082804004000000004000006006040040006086006000000000000000406C26414206000000000000000000000000 FF178B000000228028B41A11933A31A35800021911824012744600EA46C2CD0A004884046C80824A00A2EC0E88884744F2A6 A06000000000000880828326C8482E000000000000000000000000FF6C6808000040360280D8818018038819418838038880 21611652608B10702228C85030001611401080600684400800601610600000000000100128200604E306A000000000000000 00000000FF4615000000000201801801801801A01801A01A018000006006806002004002004006000006004000007806804000e4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFA7 9F080000000C01810A00C20B00820801250892920800200300200206224200047A042042002101002B0208200200A0030020 00000000000000082806020002000000000000000000000000FFE7DA00000002180000780808800C00000192000040212080 8862001418400C001004484A084F8208300050430106000A000000000000000004D00000111C05A400000000000000000000 0000FF6B180000001120000800002040005000218806000C811804208882A040001150918093008010000002800000800E00 0060000000000000000100220080208008200000000000000000000000FFC2D700004000023A86988180180388BA0020180D0014a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400480400000 0000000910800B04004810000000000000000000000000FFF616000000011809001801805901941A210A1001800200600641 604E0C640E10601400C10600600008600E206086006006006000000000000308426416116206800000000000000000000000 FF26A5000040480840C34A04A00842804C00810A94B40008320A8034032130222022C35238234B308000232304B043303A42 002000000000001021002003C23082000000000000000000000000FF82E70000002082402004044022602442C02025000008 000A11010C40808C20A84000A00100800801000C08800820F20409280000000000000800848A0000080100000000000000000094a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008001001821 008011481021900801021400000001011001001000000000000000001201400041001440000000000000000000000000FF7D 090008000A80800A80AA0AA2AA0AA2A20AA0AA0008A802A82A82200400203802202A02A83008002A82A82A00A82A82A8AA80 000000000004100108082A80002A8000000000000000000000FF0529000200402A24A00800800800A00810A00800800A04B0 0300208B00B00A812912012002842400802802812802803002002000000000000A00ACA0428034C200000000000000000000 0000FF04210000002002092020010014014010012010010108805004004800AA0C808248048040009108C0805004800C01000054a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF921700 0800000082000000000000400010000200000104800000108808802000000880880081082300000000040000000100000000 0000000082080808000008000000000000000000000000FFDBBD00000008048208A0AA4AA0AA4AA0AA0AA0AA00202A12A82A 8208220A80028288210AA83081102A8AA82202A82A82A82A8000000000000010150B082A80802A8000000000000000000000 FF9B8B0002003522303341545545541543443541540100480D50D50440C00D08A50CC0540550420500550D50CD0950D50D50 550000000000000800C40540D50D40550000000000000000000000FF508C000800430030440000200400000400400600000000d4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (016000000008 250000046006016006000000000000000000000000FF606D000000203104202000001401001211200401004014C00500480C 8044848210D0834004904900804000888C0080100400400000000000091080C004804D04000000000000000000000000FF95 CB000000828A28800800000800800800800800800080200200208200200A0120020820020120080020020020020020028020 0000000000020042285200204A000000000000000000000000FFC8B50000000840000A80AA2AA0AA2AA0A20AA0AA0003200A A82A83203A8860280200240AA82202012A8AA83200A82A82A92A80000000000001000802802A80102A8000000000000000000034a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (320820820501 220021820020020E000008200200200244201A00A000080000028000010402008016100000000000000000000000FF205A40 080050040000040040240040042040040200A108900100100109D5812410090011116010A13110480E800100100100000000 0020081601021005001001000000000000000000000000FF16AA400000C00C008C0C00404C00C00C80C12C10892104B00B22 B03308305310B2830430430030C1003002092003003103002010100420101001003103503003000000000000000000000000 FFF6C3000081801845801814001801801845801905840050644610608640600420602E50C00614E00022621600600600601600b4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF71CA000001 84100100180801183480392B001801814002622600600E00448A116014082006020102496000204028004006006000000000 00040201408E204006010000000000000000000000FF082C0008800000000500100080C210A0AD84000000804200A0400030 2000104200101000001100800800200000560000800100000000000005100000802802C0000020000000000000000000FF9E 960000000818220C180800000000000180D00808002402104300502002100B42202B01500080000504200000060001000000 10000408200000000080280000000000000000000000000000FFE42F0000808010008008020008000008830108C0820001240074a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000000A A0100006206006000000000000000000000000FF259A000001801044003800001801801801855801804000600600600E0962 900024A455601608E04000600408C00600400600600000000000000825000612A0B6000000000000000000000000FFED1500 00818010000810040418018118008C180380002860860060A60C600020010240614600600000602400400022410E00600040 0000000090000206016056100040000000000000000000FF6EC40008018210010D7802021908901800091843862009601640 60864942620CA0062020A611006020E00020418600406601600020000000000000200E10C50600800000000000000000000000f4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E2A600E0082A A0044402062084002AE2AA28E4AE2AA2AE2AE0000000000001482022AE20240E000000000000000000000000FF9CE3000001 8030088008000018008018008C980180200060060060072060810002004C0006000400006002006000002006006000000000 000308008006006086000000000000000000000000FF8D880000018A80908A80AA0AB8AB8AB8A20858AB81802AE2AE2AE2A6 E04106AAA40A1002C62461002AE2AC2062AE2AA2AE2AE000000000000400042AAE042246800000000000000000000000FF84 02400001802008800000001800801811001801C000006006006006044026006000000046046A800060040460000020060060000ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (22400001A41B 058A80AA0AB8AB0ABAA28018ABC0802AE2AE2AE2262460022A805A0042062A90102AE2AA3060A82AA2AE2AE0000000000010 6074C2AE000226000000000000000000000000FFEE3E000801A04A45841800001801001801820801A0200060060060161264 4200012801411608602000600404600600200600600000000000000011700610D106000000000000000000000000FF571B00 0001908821935954155955155954804955808055655655653609623255608000C54E55610455655443655055255655600000 0000000000007556354457000000000000000000000000FF11010000018A908088A0AA0AB8AB8ABCAB8898AB80002AE2AE2A008ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000002040 6006020006000000000000000000000000FF08FF00002100084184C000001891001801801801801000600600600600C03404 E10008E006080000006002016206006006006000000000000008136006110006000000000000000000000000FF75B9000001 002811802000001801801810901001C0200060060060860942940064A05560D6000408006002096200006006006000000000 0000080460060D0096000000000000000000000000FF99570000019298C580000000180180180184D8018010006006006016 046022000004004006000100006002026006002006006000000000000280104806400806000000000000000000000000FF33004ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4104C2450102 5405564160045564964D6350456556556000000000000020416556510556000000000000000000000000FF14318000000338 0400180000180D80180100D80180820060060060060001080004120060060860140060460060060060060060000000000000 08006006010006000000000000000000000000FF55EA0000890A98898018000AB8018AB8A392B8AB80802AE2AE2AE2AE3242 040060142222AE3060222AE2862260AE2A62AE2AE0000000000000020062AE2002AE000000000000000000000000FF68A900 000500380590180000182580180888180180400060060060061040845004280020060360040060361060000160060060000000cca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00AA08188008 00000AB90B8AB8A30830AB80122AE2AE2AE2AA2AC2C61000023002AE20200C2AE2162AA0AE3222AE2AE00000000000000845 62AE4002AE000000000000000000000000FFC408000820000801C00000001829801800031001808200600600600604001608 044401600604204200602600200008600600600000000000000A0A6006020006000000000000000000000000FF261D0000AA 2808B00AA0000AB8218AB8B30A18AB80502AE2AE2AE2AE2A820622812422E2AE2320042AE2862AA2AE22E2AE2AE000000000 0000200862AE0A02AE000000000000000000000000FF43C8000114553935B558001559059559540039558040556556556556002ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (11800008200F 000007000000000000000000000000FFE027000000600800C01C00201E09C21805011001810200604F08703210421612400F 20E206004005007A86104001003006006000280008040000004006006006000000000000000000000000FF34DB0008000008 4884D800001821801801041001810200600680600300505604C5260000061340068060AE00440680A8060060000000000000 0220C00602E006000000000000000000000000FF925700000002B802C00400001901A01811209C0180220070060060020040 06D0000F150806002000006006002000102007006000000000000040126007300007000000000000000000000000FF29E70000aca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A50210482E4 2E0044000470565042C8442016106020000000000510108206006484000000000000000000000000FF6BB880000020000300 1A00001A11A018410A1AA180A044612604743028610A09242404A1165040289260A630440682280700600008000052001002 2806200004000000000000000000000000FFF0D3800104001005801800601803801821001C898A01A87C0640600505308240 7A40000096282000116006402240042007006000000000200008141096217806000000000000000000000000FF1BD3800882 401000401C00401C01C21803549C418040047106AC6404C0A862A1618514304605A05084E846002026802807006000000000006ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (441001520002 00582184985309180580005464060D62A00062920CE0A602A24E00020004601620020600400600600000000000000010004E 406304080000000000000000000000FF9059000000401100890012001823821801081803800008600608E00440208602E026 00000600400000600600400000408600604000000000017000048E24E016410000000000000000000000FF98FA0000000010 A04000080098058038890098119C0012643620600C06240604601E5824C626C02008640600C00600C0060260004000100000 000021260B000E288000000000000000000000FFB9B8800000020001C29000023801809843043801808040620F0464A0A16C00eca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006802AE1020 C2000000000000000000000000FF2FDD000000403804101800000000000001080000000000000000000400448001400814C0 00000000000000000206000000000000000000000010000000490448000000000000000000000000FFB95E80000000000804 C00000000000000182A00000C00000000000080100480000404000001300200000000900061100000000000000000002C002 8000020000000000000000000000000000FFDAC6000000200041A00800049803805881045801890000602E40601003600240 60161060864500201060260900B023410E0C600000000000040000C08610E002000000000000000000000000FFA55C000000001ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (621520655644 60005565564265564575575560000000000004C0427556126086000000000000000000000000FFD8850000000A88008AA800 0AA8AA8AA8AA9088AA80A02AA2AA2AA2A22AA10A2A23020422AA32A0002AA2AA2820AA2222AA2AA0000000000002480022AA 40A40A000000000000000000000000FF7FF20880000000D04000002000004001004000000021000800001000000000148100 049000110011000000008000080800800000000000000010010800408A48000000000000000000000000FF87F60000000A88 F54008000AA8AA8AA8AA8048AA80002AA2AA2AA2B22A24022B22920122AA2020402AA2AA2224AA3222AA2AA0000000000000009ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000000000 00000080000000010000080000081001013002000094800010800000000000040001000000000000000000000A0C00004405 00000000000000000000000000FF88BB88000004480C8808000AA8AAEAA82A8AAEAA80202AA2AA2AA203A223532020421032 AA2020012ABAAA30A0AA2A22AA2AA0000000000000021022AA00200A000000000000000000000000FFD66B80080040410140 000040100140100044040100008050050050000000448000444810040000010040040480000110048040000000000001000B 4804020900000000000000000000000000FFA4AA800000691801D55800555D55955855955B558101557557D5754E536404C0005ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800100200200 0000000000000000000000FFBD1600000000000000000000002009231000004000008001080100004400C8C4034800188004 01000A0000000010000A08000000000000000002000000800000000000000000000000000000FF6577000200000000000000 00000010002203800800002A00000000408002000C8000048000840002000000000000800000000000000000000100000000 000000000000000000000000000000FF3FFE01000008808444C00040020000000000000000010000008000C01000010882B0 4008000400088000000A00000010008000000000000002C0408800110040000000000000000000000000FFC4AB000000222000dca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04208A603808 002002082002003082000000000000000D08020000002002000000000000000000000000FFC10F000511001B158038818018 3581388570D0B5880081604F046C17A443160570AE0161070360C00C600600600F00600E0000000000000000000000000068 06000000000000000000000000FF27430800010002010000020020011090510416000800548D0411014400C86058040C1046 0410480000400000420840462C400000210020000A20010000000000000000000000000000000000FF9FE700010880091280 490080080C800A00B0490490008122428C24B200200300300208220208A04000200200200220300220000000800000000000003ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100100100000 0000200001000000000000400000400000000000000080080000080000080600000000000000000000000080000000000000 0000000000000000000000FF5703000000800800000800800820A82800808800800080208A80202000200202280280248A02 2008002002082002002002000000000040000008040000003002000000000000000000000000FFE2FC100001000000000004 0040002080050400006800008000801001408480000008000000800000000800000C10001548000000200000000020800000 000000000000000000000000000000FFCA30000000800A00800800800820802802826800800000288A002002202AC210300300bca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005016000000 000000000000000000FF6F46010001001811801800041809825801D4D005A040104206012147016406C45406156406006821 006004006046227046000000000000010001080000004006000000000000000000000000FFC2300000010018018018000018 018018118010A0000020C02E2822062C004600410E4061260060104061040160101060160400280000000001000000400140 06000000000000000000000000FFE41E00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000006000000000000000000000000000000000000000000000000000000000000FF4EA500000000140000007ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06006A000060 04006006006006000000000000001008000008006806000000000000000000000000FFBAA900000180000100180004000180 58088028A020400374164028874504840075060C620609600000600400600004702602005000000000008010002000E00E00 0000000000000000000000FF4CE5008001001808801815801A49835815009000A00008407608E32E10203632404620E83614 601AA0610604643E006016000050000500000040860001004004040000000000000000000000FFC38C000001001800001801 801A018018010A1803800024480600601608210618400E00688611662200608600E00028600E00000000000000800204000000fca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801E05809803 825800000080600680200400010484602600600E00600C006004006000006006000000000000000004000000006006000000 000000000000000000FF4ACD180001800506001834000199905820A11980800080601601A1060024C4706C8686600615E400 606006006006006006000850000118E0039020060080E004000000000000000000000000FFE9A6000001800001001E2060A0 41801850800821800000E04600600610200C807107006006007000006106046410006016001000000201000C204400090160 04040000000000000000000000FF6CB9000001880111031880014003901800E4C840000001700600200600024482620600600002a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C0200000000 00000000000000FFCEDE000000800000001801801801801801885E04E200A560C61060A40020448860178B610620E02E1060 0400630601612E000000080000000002000820106884020000000000000000000000FF2DBF000000800010001801C0182180 1801A198A0020030229741241535293483E12620E2668461000060440060800064061200000000010004000407804C607600 0000000000000000000000FF23640000000000000038000018418218018018A1A800006C0680280420620424644640640600 680400621400600620600604000000000000000408000100E004000000000000000000000000FF77EC0000000802080298810082a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E04D00700700 600601E006000000000000000904000001006004000000000000000000000000FF5C990000818018A10058018A1C018C1821 D04804120001209710240E01A1265AE006A0680FC07024006206086000006436000000000000000081148040016904000000 000000000000000000FF300E000601009E0004594A211945835889801800000010681630BC27007106407536086086106900 006006006006006006000000000550200028C00001006004100500000000000000000000FF71CA000001001809001801801C 018018018018000004942026C0A15694640E006C8E0C608604E0B008622E00620020E126080000080000001404001000A2680042a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018004018 0180000048068040068060068020060060060048010060070068060060060000000000000008000060060060000000000000 00000000000000FFB975000000209821A45891AC1803A93840020101C0000040264060160060060400CE4270168060840064 0610600000602600000000000040000000C006807000100500000000000000000000FFF3CC000080201901A01840011949A4 1890201841A200104C8E10E406016506D1640711600610E81400700600680600600600000000055100082C20600600600000 0000000000000000000000FFD98F0000018018000018042018098018018218A08000006A2600204600224600600602E1066000c2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF8DEF000000000003883803801B0188184C502829C00021000728CC4632614C13140534682640281128E05611 6001006016010408140080000000206006006000000000000000000000000000FFA0D7000000000121801801801801829880 01190392C00404B604608E00E0042000D400E0160A2500006086426046106006400000200000008000006006006000000000 000000000000000000FF8BC20000000018018018018018018018000008018000004006006006006006002006006006004000 006006006000006006000000000000000000004006006000000000000000000000000000FF587500000000180180180000180022a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0680E006000 026426080000000000001A80026006006000000000000000000000000000FFFBC9000000000001801A0000000183980A083C 09C0002AE2261263863AE2A42EF7AD23E0AE0E62A868E0F620E0260C60663080082800800085000460060060000000000000 00000000000000FFCB96000000000001801905801A41905840113CC58500154556814C56416554110054106D56210CAC0060 06806000806406000000000000000000006007006000000000000000000000000000FFF63900000000008380180200188180 1800069803822090408608800F0064048000040861062000440070068060060060460000000000000008040060060060000000a2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000180100 0080200600600600600680600600680600400000780600600600600600000000000000000000780780600000000000000000 0000000000FF47E30000000000419058000018019019400031419100002016C03046806814082004007006A0A08200601614 6000806016000400040000000802406006006000000000000000000000000000FF8432000000000001801A84001801F03800 001101E00090388F016407007004822204086137022020006046006007006006000000000000000000006006006000000000 000000000000000000FFBBE8000000000001801800000041809840309043848004E4260870CEC8E34C8100CC00E2060064080062a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF6E860000000119238019180018018419142C580100000028C600201602600642610604E046000010006006006010 03620600000000000000001000601EC06200000000000000000000000000FFECB2000040221901A23A88211911A9180A0C1A 3315008D212EA0A42604E906D56AA6A86C068908308160A750E80603724E00000000000000080082600E0060800000000000 00000000000000FF6F7608000000B84D801805803803803800005901000120200612601628600E00600E00E1164042000062 060061000061060000000000000002001161072A6200000000000000000000000000FF4872000000001801801801801E018000e2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008808010008 20000000000000000E00108000B00880000000000000000000000000FF04AE00000000080094080080480080080000020A04 00213032183002202002A0A00300200200A60100A20200200300A00200000000000000000000300200200000000000000000 0000000000FF3D63000000001A0400384785180C4000024000A000004A5000620C40488480004808F00A007C014000018060 00C60004800000000000000100000860800A0400000000000000000000000000FF28C80000000282D803000000A68048A048 52200002C00000080088218100080400000810880000000008200080068000080000000000000000400268000400000000000012a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02B255004090 0804800114304810894000004004800800804885004800005004000000000000000A00000004804828000000000000000000 000000FFF68F000100001803801821821901801842221801800015611600644640E206004816086106486520006006206006 006406000000000000000000006016146200000000000000000000000000FF3B69000000414CA8D34D0CC14804820A881149 0085212022432C2812803002443102A428230430100030830030528130020000000000000114511020034020000000000000 00000000000000FF0AC608032020600020428020030200040001030009009485008402088008008802B000010100082900080092a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF2E3900084040050040050040260000004004040000000000010090010010010000010008000010010000010010010010 00000000000000001001000001001000001000000000000000000000FF44510008800880000AA00808C0AA0AA0A000028000 802202A82A8B200083A02202A82A82A82A80002A82002A82A82A82A800000000000000006000000022000000000000000000 0000000000FF840400004C204A04A00B04A42800A00A04500800800081280280200304280280280280200300282080284B00 2802803002000000000000800800802002912500000000000000000000000000FF97BD0002002202B12002202004012010080052a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80A82A82A800 00000000000000E00008002A82A8000000000000000000000000FF2231000810004000000010020000400000048108008010 00000000000900008810010008000000200000C8000000000000000000000000000200000000000400000000000000000000 000000FFA5D700008C0AC0120AA0320880AA0AA08C00812200402A12A84802A82302A82A82A82A82A82A80102A82A82A82A8 2A82A80000000000000001000010002A82A8000000000000000000000000FFE5DE0001243503523542C43105541543343044 440020C50D50D51448C40C50450550550550D50800D51400D50B50D50D50000000000000800800800000CD0128000000000000d2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (818840006006 00E02614620E1060042060060060002062062160060060860000200200000060000160004060000000000000000000000000 00FF7ECF0000422202022002202004012010001414550080840000841005304800804005004804804888800805004A008010 04000000000000004800800000005000000800000000000000000000FFA1A4000000004920800904842800800840A1280080 2030280250200204200200280200200200200000200200200200200200000000000000200000200080200000000000000000 0000000000FF84F70000880880480AA0080C80AA4AA08A50409001010182A80482A81082A82A92A82A92A92A81002A92A82A0032a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF B5BB0000200088008208008808008008A0808900862200210210204202200221200211010200200013211200200200240204 040000000002000068A220340000040000000000000000000000FF53BC400C0000040000000000044040C4005904C00D032A 12880293010882810010312010A9089281149281240001009000000000000081001011101441001000000000000000000000 000000FFFBC0400440002C00800800908C00C10C40C00C0280013234922C341321210344B4A311355313350300B103002003 01300208000000048144300340300100B000000000000000000000000000FF1D60000000009801821841803801801901801800b2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006016008000 000000004000406618000200000000000000000000000000FF4A6600008000182102380084404184990080B80B8100506316 00604610600E08E08000614644601010E2460060000260060000000000000045000060002404000000000000000000000000 00FFBE100009000000541440400801200900A004C034008004820022041000050810048822041020044020640000000604E0 1000000000000000055002E000400000080000000000000000000000FFB79300000000580000184181384000400000002201 000000004840C84000080C828C108200040000486000028006006100080020040400400008006000008000000000000000000072a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000062860 0600600411600A002006086840006006006000006006000000000000004800006000006000000000000000000000000000FF 2E200000000208000018208000018018008C9845802000600204C00600609644610000600604E20000600600620600600600 0000000000004008006000004000000000000000000000000000FFCBC0000000000814001900810001901840801801802000 E0020C4206006006006000086006006300206086006000016206028200000000004050036000084000120000000000000000 000000FF80260008000018011018D892A10182180084194184202C600E40601609E5666064104564360260C800603600600600f2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFC9B0 0000000AC0AB8AB8320900AB8AB800889889A1202B02AA0242AE2AE2AC08E2A62AE2AE30E2202AE2AE2AE4AE2AE2AE000000 0000000040482AE2A82AF000000000000000000000000000FF7CEA000400004001801810050001801E009118018120140006 4260060060040260000060060060800060060060000060060000000000000040C00060000060000000000000000000000000 00FF93FE0000000890AB8AB8080880AB8AB80000188980802A82AE4142AE2AE2240462222AA2AE2060002AE2AE2AE0AE2AE2 AE000000000000004620AAE2A82AE000000000000000000000000000FF8F4B40020000500180190402200180180080380180000aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00006000006000006000000000000000000000000000FFF81B4000000880AA8AB80988D8AB8AB8018838AB80002062A80042 AE2AE2AC4062AE2AA2AE2C70002AE2AE2AE0A82AE2AE0000000000000070182AE2A82AE000000000000000000000000000FF 4CD1000800001000801901843801801801843825800600600410400600600420601600600602600000600600600600600600 0000000000006000006000006000000000000000000000000000FF8C120000001511549558C5901955955801823955800240 E55409455655655411655655655649600C556556556550556556000000000000006000D56550556000000000000000000000008aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00613200600 610600640000800600608400400600600000400600000000000000C040006000006000000000000000000000000000FF05CF 0000000018058018058058018018148018018080006116200006006006006122080006006040006006006206006006000000 000000084088006000116000000000000000000000000000FFD4CB000000020801801821821801801800811801A0C4086006 04A0060060064460020000060560880040060060000040060000000000000041200060000068000000000000000000000000 00FF4EF300000000400080190580380180180184180180040360045040060060041160060020060060000060060064060060004aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF8F620010 00511914D55B3455595595581415595580404D25461065565565465564464565565560405565565563505565560000000000 005482C055000654E006000004000000000000000000FFCF31800000001800801800003801801804001801800000A0160060 06006006004006006006006000006006006004006006000000000000000500006006006006000006000000000000000000FF F2120000000AA8A98AB8A98A98AB8AB8A18AB8AB80002262260002AE2AE22E2AE00E3202AE2AE7002AE2AE2AE0AE2AE2AE00 00000000002242002AE000226000000000000000000000000000FF66AE00000000180180180180180180180180180180400800caa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0020000006006006000006000000000000000000FF5D6C0000000140812AA0A82A98AB8AB8800AB0AB80022204062262AE2A E2AC2AE00E3462AE2AE0002AE2AE2AE0AC2AE2AE0000000000002A82102AE006286006000006000000000000000000FF0B56 000000023820801A00001801801920001801810000200E456006006016004116006006006000006006006000006006000000 000000000010000006006006000004000000000000000000FFE3B70000002A18CA8AB8AA0A98AB8AB8A80AB8AB80A02A20A6 3282AE2AE2AE2AE3362162AE2AE3102AE2AE2AE2AC2AE2AE0000000000002A80402AE00632E0060000060000000000000000002aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (206347106104 117106C1761690600082602E8061048070060000000000781F8000006006106006000006000000000000000000FFBCBA0000 2060C401401400009C01A01810001821800100284640A00602600C00602F0070A640600020708700E0050070060000000000 00000000000007406006000006000000000000000000FFAD4B000800034035000004201A0180184200180180C01004860920 060060040061268B600680650C80600680640480600600000000000000008C00600604E006000006000000000000000000FF 4BB0000000100001201400003801801808001C01800201404E8020068060040074060070060060000060060060040068060000aaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A4C700000000 0401A01C008C2409801800001885802020420E0200860060840062074D6C1600640020111704600404004600000000000000 84904C6516006006010006000000000000000000FF3C2E800000210041801800800041C4180A0038C3800094452600011623 6444D4E40630E016556400910006546104840806000000000200000000010006A86006000006000000000000000000FF5BB4 802000000001805800E04021D4580400110D9300025A96101C0FA0E2252262060860060362010AE0362A6004026006000000 000400400000009806006006000006000000000000000000FF89DE800020402041C01C10A0A301C83800005C0988C010500F006aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000040 28620E006006008006000000000000000000FF6D7800000840184184200082580992580002090D840048440604A156006306 00622E48E04E006000050356006004000006000000000048010100050106206006000006000000000000000000FF86940000 00401807023A00B018018A38000AE009800009C00600A00E50E2060060060460260060980260060060040060060000000000 28000430000006006006000006000000000000000000FF842400408800182140D8328099038098000000018EC00240A61962 663A611600C1FE0061C602602048E32601E00400600600000000000040000000E006206006000006000000000000000000FF00eaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AA2AA22A0122 AA2AA2AA2AA0082CA2AA2AA2AA2CA2AA00000000000000000048A2AA2AA2AE0002AA000000000000000000FFFCA100000040 1814001805843800000000022000000228800004800000000000400000000000002000600000000400600000000000000000 0000006000000000000006000000000000000000FF5D0980000000002044C600600000000000090000012202000050000000 0080530000000000000200026000000006046000000000000000000228446000000000000006000000000000000000FFC4EB 000100201801C11442C1180380980011080188C00440B60822060360060141060063060264A0280006036004020026000000001aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000711911 D53D55951D55D558003119558100307556007557556557556557556557556250517556556356516556000000000000000428 555557556556000556000000000000000000FF6EDD0000000888CC8A88AAAC8AAAAAA80008CAAA81200222AA8022AB2AA333 0A2AAA2AA2AA2AA25028A2AA2AA2AA28A2AA0000000000000002080AA2AA2AA2AA0002AA000000000000000000FF410E0800 0002202220040000000000000004200000400480000910000000000000000010008000000208008000000210000000000000 00000000004000000000000000000000000000000000FF3CA80000000EE880C808A88888AA8AA8000400AA80005002AA0522009aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002080208 00800000000000000000000000000000FF75F500000020000000000000220000000000020000004200000A88008000008010 00000000000040020800800200020000000000000000000000400000000800000000000000000000000000FF04178800000A A88A8008AAE8C8AA8AA800088CAA80200022AA6422AA2AA2AA2AB2AA2ABAAA2AA00028A2AB2AA0AA28BAAA00000000000000 002008A2AA2AB2AA0002AA000000000000000000FF5EC6000800400000404400202201201000201201000000C004C8100500 4000C00804004804804000001005004000001004000000000000000040004004004004000000000000000000000000FF5D95005aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200200202220 200200282008202200A002002002000000200000200000002002802002802002000000000000000000FF9707000000000000 0000000000002000402003040480000250800200000488100200000430400C10000000200000000000000000000000000001 800000000000000000000000000000000000FF6AAD0000000020300000400400000101000120100100088081420420400020 668000400080111000001111000010001800000000000000040400000000000400000000000000000000000000FF428B0000 000000202CC4000200004000000220000100090800000000000000000000800001000410000000000000000000000000000000daa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004608808 08880C00800B00C00800880000200200208210202200A04201A00211200060220200A2030022220080000000088004584020 2208A082802002000000000000000000FF538F0501141105018C583185581180B92D8D595593404A608E5174961164C64A7A 0600620E206208006027016006007004000000400000400800004006006006006006000000000000000000FFE04202800000 404000000310B1012830010000010200011C4406084D0A581C094A60404148000260100004C05804000084000000000020A0 00A0284005004004001800000000000000000000FF046F02810A088500922848932910814D14B50A509020422002D0A10A91003aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200600000 0000000006000000000000000000FF1838000000000000001000000000000000200200000000000000000000000000080000 0000000801007000000000806000800000000000000800006800000000000006000000000000000000FFC59C000000000208 8808202A02008088000088082080002002802A8220302224A00300200200204000228C80A20C002022010000000028240000 084000088286002002000000000000000000FF77D905000000000000001520B0000820000002003200000000220808040814 080400A00010000200800000000000001484800000000000000080000820004001800000000000000000000000FF16CF000000baa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006856406082 026000006924106006046806000000000000100010008004104046000806000000000000000000FFCE38000000000001201A 01801841801A00A11200B0408960170A0436906106C3610400690604601082000C0060060000260000000000080281004881 04004006800002000000000000000000FFF55B00002000A02100182180188180384090383080002240860080064264160860 00156446116540110444006406000006000000000040000040006024004006000002000000000000000000FFC4F200000000 0000000000000000000000000000000000000000000000000000000000000000000200600000000000600000000000000000007aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000182384100 1005801A129010208142826806846016207106006807A460060440020000860062040000020000000004D00400D340021400 6006802402000000000000000000FFA4F400000000A041801801001141805A21D01040824221611609622E4C600752E00E12 604600682802000E0862040200220000000000080C80084860C4006006002002000000000000000000FF0C550040A0000001 001A25855901815841803888B800186616026446846AEE0060B720E20208C28048EE840070061069060004000000201000A0 046044094036004006000000000000000000FF0277000100000001001801801A018018018691008400026C0600000600704600faa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0600E406006 007006000000000000000000FFE649022000000001800843021043801800001801100002680604680E80600640604E046806 04600008600600600600610E000000000000020828008016806806806426000000000000000000FF3A0F0000000000018C58 008050298119D18218018048006006E074461C604621F02700680618400088640660600480600A00040019805071810040E0 47077007006026000000000000000000FF8A9D000000000001881800809091803805F21041E100106C170000062060860070 06206006006003406106006205106002000000000280000802040406006016006006000000000000000000FF50A7020000000006a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2600600000C0 0204600600600602708600000800020000028B000205006007002006000000000000000000FF810E00002000000180180900 1801801881813040A00008E00600600620628600604604785200448800600E0060060061060000080000000202A810620680 6006006006000000000000000000FF1C6D080020000001801E08011801A0585314100000400CEC1E4BE0E605E866E8620662 602A024A6004600600780604700600000000000000080006000E206807006006000000000000000000FF1ADA080000002021 C20001101483801A02001403001020600612610E8068161264060070060D68030060060070060060060000000004000000020086a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801801803811 C21A81811401801A01600E00E006046006016007106000004280A1600600680600621400000000000800012000600600601E 006006000000000000000000FFC190000000000049801800931B89C05B41521427A06A08FC072070160274072C6806086820 10511002E0160060060060260000000200002600C9D00206087007026026000000000000000000FF4DA1000000000045801C 01101445801844809009080000604604695710641603644602640000400080600604614600700E0000000001400092000079 04406046002006400000000000000000FF5BEF000000002001841801001203801C10C55441C000226006A06006A2611600600046a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040060060040 06000000000000000000FF317100000000000080120180140180180100080180000040060030060060068030050060068060 00006806000007006006000000000800800000006806006006006006000000000000000000FFC75E00000000004080180190 1821801AA1001831C001004806C0214608500600620400602600600422600604004600642600000000000003000000000400 6046004026000000000000000000FF3B21000000000004001801845885C41805021C03883890405284A816004A16D2604004 7206806500006806001106807006000000040950C00251006D06506007046006400000000000000000FFC88800000000001100c6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600604600000 7006A01206006006000000001000000000006007006806002006000000000000000000FFFB64000000000009C01A03821811 8D1301901005800020455724640704434E304D0E05642611612500611650808E80E906080148108000020004000006106006 000806000000000000000000FF3B48000000000001001821801801801011801101894004400601615628C00602C046286016 00621004E026000246026226000000000000000000006006006006002006000000000000000000FF5EF80000000000000010 01801001801800000001800000600600200600600600200400600600600400600600000600600600000000000000000000000026a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0B001081A00A 85801B138000000016C4200601454ED2400A20E2060464A9D0600E0200A4806A8C280000000880000A200000068070070040 06000000000000000000FFC84E000000000001801085001701880801821AC380000088EA02B24E2CC80E2ACBAE6F632E0AE3 A802E0BE0C89AC02E6B4580088088000020440806006086007006006000000000000000000FFDF9A00000000002120101180 1001801905089515E040906016546506C16557540C5400641654644C516806000C2604610600000000010000100400000600 6827000006000000000000000000FF572F000000000209901101801201A218C90DE84180193940061868860060060000020000a6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (693644100600 0000000000000000FF8EA7000000000000001801801801800201801801800400600600400600600600200680680680600000 6004000006006006000000000000000000006006006006002006000000000000000000FFA74F000000000001501045841011 810A41889A419142042426486066045546004804016887286000000006000004001004000040800000000000006006006007 000000000000000000000000FF5D73000000000001C01001C01201800801C018218022080801007C8644400600432602600E 006000810006000404021004000001000000000000000006006026002000000000000000000000FFB94000000000004100120066a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (820000007000 081000006008000000000200000440006407008001110006000000000000000000FF88D00200000400120218018018158888 01A418A1800004600640400660601650200000620620600040880404094620000600000000000000000000E006A068062060 00000000000000000000FFB9EB020000040294889A51885801A0A2418C58258200816A06834406A8620600280680602E4568 08C08424200406A01016000000000400000820908806216406884C00000000000000000000FFC61F00000000042084388324 18B38C0885A1189180004A602E80400600E0C600222EA365060862A0006015080806006146000000000000000090C000061400e6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106000400228 20080200880C0080100080080080082C200800800880800604A00600900820000000000000000880B80900804144800E0000 0000000000000000FFA5460000000000A0802000A00200800800A14002800061220200B6020030060021400228021DA47830 202000000400200400000000000000000000404200280A004002000000000000000000FFA9D200000000410110C4093B240A 42144110841000001280241700100807A00006010484E00002000070084010004065800000000000000000280160060A0AA0 4A0006000000000000000000FFDF910000000000086000762002801120A402074000000000480009000088018000015008080016a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (912802000000 000000000000FFF3000000000002242012020230010001222B52290122840000C8800500100500480C804894A44840800085 00000C801404000000000000000840A048A8814004804800000000000000000000FF6E1E0000000040018C1805891A21901A 05801901800020E80610601600640E004006006206016440106C06220C0600608600000000000000040001432600680600C0 06000000000000000000FFA437000000040550804C30A0080AE14C2094C828800112324344AD034020825035222C20230C30 11202002000143503202000000000000001021103002002142283202000000000000000000FF00070000000202402C1080000096a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10D50450D505 40D10C80000000000000800830910C10450550450D50000000000000000000FF754900080000040042045440040040035000 0640000000000104100100100000151000180100100100000100000104100800000000100000100904100000000100100100 0000000000000000FFABEE0008000000881480A408C0AA0AA00000008200041802A80202A82A82A82A82802A822008800028 8B202A8A202880080000000000000000000A82002A02A82202A8000000000000000000FFAC47000000200400AA4A10A00A00 C00808C008008002C128028028028028028028430020028028108420128001028231420000000000008008108028020000020056a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0AA0200AA082 0000AA82A80202A82A82A92A80012A82402A80402C92A8AA92A82883200000000000000000000A82A9AA8AA80402C8000000 000000000000FF293E0008000000000100000100000004920002880140000000400000001001000020000808090020001000 0010080200500000000000000000002200A0100001100000000000000000000000FFDED40000000000AA0920800AA0AA0AA2 022AA08C00C12A82A82882A82A82A82A80402A82882A80102882A82A82A82882200000000000000000202882A82A8AA82882 88000000000000000000FF8C6F0000002003342043303203543540202AC0420000C50D50930D50D50550550C90D50540C40800d6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000000000 00000000FFDE6000000010590900192580180180189180191580000060260864360A60C644440600E2862060000060160060 4E00600600000000000000E40000420E000400004006000000000000000000FFBA7C0000000002012002A220020020100500 14110144000000908800800804804A0880505480082080000400000480100C000000000800000820804800000000A1480080 0000000000000000FF95D4000000200800824808800800800B08A00840800000200240200200200200214200210200200802 2802002802042082000000000000002008402002000000122022000000000000000000FFE11A0000004000AA0880000AA0AA0036a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620000041000 6000000000000020408200006406408200000006000000000000000000FF1B310000000828C98548A29C080080088002088A 810002214200201210202424202211A00200200004204C00A000002000000000008108082450000002000000414002000000 400000000000FF544E40080040040240040050044040040044040009012810082010816090011012C9021201221008189081 0110A4199004000000001040021001005009411001000000000000000000000000FF7ED8400100410C04C04C00C00C04C04C 00C00C0094012D351245308300B413013113543053043108013503003502003002000000011010523001003003001001002000b6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2888381B8540 00620A00624602601600214E00628E00609018000400200601018600810000000000610006013E4400484060200000000000 00000000FFA3B30000000018A18258048C102100985304182180000C612208600600E04204A2160060260060200004040020 06000046010000000020006400016006010010016024000000000000000000FFB57A00080400000400002A0000A00B010202 00C012401200005500202164502102A000002000002800648000000014E04000010000004000008000E3064500C00A000600 0000000000000000FF6B3E00008000800000300100104200400800000003000104A01482500C65100D0004280148000100000076a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF7265200000001080C09811401001889803809801800408E08600600004600400C00600600600680000001600410400 0084000000000000006880046007001000254044000000000000000000FFC3630000000018458258C080B8018258300A5801 800044644E00600609600410254E00600600450004608400200E046016000000000000006200006006000000106006000000 000000000000FFF05B000000001805801800801901841881103903880000640A23620E54620440200609628E0061000260C4 0020060A60060000000000800060500004460000800C6002000000200000000000FF8D81000804001881811850801807101800f6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002556557556 000000000000004200510556550550500512000000000000000000FF882E0000000018208A30910818AB8018C01318AB8000 20600E3262A822F2AE2240262AE2AE2AC2802AEAAE0052AC2AE22C0000000000000061014AE2AE2A82A92C42AE0000000000 00000000FF65094000000010208010010010018018C9043801800000628602E0000078060158460060060060000260060058 0400680400000000000000615184000600000004C022000000000000000000FFFB42000000001808881A470F18AB94588180 18AB80001565022AE2A83062AC2244062AE2AE2AC000288A260042242883240000000000000060002882AE2A82A801428800000ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180001060 861260040060060044060060060041000068060000060460060000000000000040200460060000008D004600000000000000 0000FF1E140000000018894ABCAA4AB8AB8A98040038AB8000A2E0062002AC2AEAAE3440162AE2AE2AD6042AE2AE000AAE28 E2AE0000000000000052808882AF2A92A820028A000000000000000000FF94E3000800001314008800003001809812005801 800100604601400600600409010E006006006800006006002006007006000000000000004400006006800800000006000000 000000000000FFB3DF000000001112154954155155955800111955800054E036484556556554400306556556556104516D56008ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF793A00000008104100200010904080180200180180000040844000CC00402600628600600600448404610602A116046086 000000000000004000420006000000012042000000000000000000FF06A70000000318008500240250148018290018018002 08C03608600600600C08202E00600634C00200600E10000600600E00000000000000C1000060060000000820060000000000 00000000FF01F4000000001422800000001000803841021801800200444E0120060040041520D60060060048040060060000 06006806000000000000004010200007001000002002000000000000000000FF6BD200000000180100180000180180188A09004ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE28E2AE0000 000000062A804808E2AE0060002AE28C006000000000000000FF11D200100005190293011190991195584D95515580004CA4 9030E4545564CC4460065505565544065564D640655655644E00000000000654820A55055000600644E55000400000000000 0000FF4A65800000001810814041801805801803801801800000201022600400610005600400000600400000600601600604 6006000000000006000100206006006006006004006000000000000000FF257000000000388B0800880010808AB8800AB8AB 800022420406E3042AE28622E0042AE2AE00400028E22620222628E2260000000000002A426808E2AE00000022228E00000000cea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000431013 300400701602400600200600400400600680600604600600000000000600000004000000680400C004006000000000000000 FFE5230000000AB8E88CA0888AB8898AB0618AB8AB00002AC04010222C2AE64630C2AE2AA2AE2AC0002EE2AE22E2AE28E2AE 0000000000062A84000CE2AE0060042A42CC006000000000000000FF0E2F0000001038308020230238430018818000018000 00202000600400600408A2D60000060040840060060AE0060060860000000000060001000000000060000860000040000000 00000000FF8C5C0000000AB88288008D0AB8A90AB8898AA8AB80022AA4800163342AE00C2022AE2A82AE2AC28028E2AE2A62002ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF5C 13800000121922C01009869C01C038098218219602312A9042D084D3F6068042B69D64966440400860470060040060040000 10000006440000006006007006004004006000000000000000FFA7BB000000001803A20408001C0061140980544101044250 A002E0AC02702420000720702710E20400600600600600E20E00000000000E10000000000000701400400400600000000000 0000FF314200080000180184004000182200109580000100100048402061068060C308000680600600628000600610600600 6006000000000006000550406006006004004044006000000000000000FFFFA0000000001804800002801A0180100180180100aea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (641E00000000 001E440000086006006006004004006000000000000000FF14F8000000001800801001101C01203C05801C25808030B00001 652C12A14C0240063321460860025400860060040001440200000000060005020060062060A6014084006000000000000000 FF71F880000008588084120110180181188380380190C011205050525440310608C016A028068C4048000046006484010004 000050000046080000080000006816004004006000000000000000FF8665800000045E488030039138018059058218818022 00220008520600609212C4C60061060060101060060065040060040000200000260000000800018060060040040060000000006ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002108036404 0C210004240608E0860060803000040160060000560000000000160000500060064060A6114004006000000000000000FF4D 5F0000000018008048008818C000582580185188402924000060060022160820B602602610600002010C0062260000060000 0000048600000008014000E006004004006000000000000000FF0C140000000018018228018018808010019C188D88000422 000061560162460822A64060160064000060040060261061060400000002860005280000A000E0060E410400600000000000 0000FFDAF100000000181080480D8258208810A1829901802006208802600410605644200E05645E01468000600C00E2060800eea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF2B6D00 00000AA8AACCC8D4CAA9408808AA81808C00002240000021022AA30033A1922202AA18200028A2202AA2382CA32000000000 02AA00051008848A2AE2143222AA2AA000000000000000FF5051000000000001003809801845002000000004000000800034 0408006000080044008000008000046000000100006090000000000000000200026046000080080004006000000000000000 FF2A2380000000000004022400008802800014402000001000000080A0006150000408100000240500006088000000026000 000000000000000150206206000030008006006000000000000000FF217A000000001801A20C08C418001018818118818080001ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000004 000000004000004084000000000000000000000000FF1404000000555921D55911955D01955955A45B55800254600050E556 53600E40DD56436556556200556557556556516556000000001556000500134517556436556356556000000000000000FF26 F70000000AA8AA888880AAA8088A88AA9208C880023220002122022AA02A2224232AA2AA22228028A22A2AA2A228A22A0000 000002AA0000202AA0AA2AA22022A2AA2AA000000000000000FF77AF10000000000C20042400001040000008800000000000 000400000002A40A000010080000008000000400000404000400000000000000002040402000010000000000000000000000009ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000000 300010000C8000000280020001000000020000000000001000000500040040000080000000000000000000000000FFDC2208 000000002A004022000204000000004000000000800011000004048008000000100000000000000000000000000000000000 0000000000000400800050000200000000000000000000FF01038000000AAC00888C80EAA8EC8AACAA8808AA800023200020 22AA28A00222A2AA2032AA2AA00028A2AA2AA2AA28A2AA0000000002AA00003828A08A2AA2022AA0AA2AA000000000000000 FF2079000800001000400200200004404001405401000000C0000A0050000204005001004804010000040104004004000004005ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF4438010040 084000830800C0090080080CC10A0080020C300204301280A8A280280200210A01200028A08A002082022002000000000022 08200000A002002003003002002000000000000000FF74C30000000000000000002000000001400400500000400CA00008A0 100800020928488020040400800000800000000000000000100000001000000000000000000800000000000000000000FF4B C80000000000000000000000400003100961100000100008000100320248000400000800100002000000000800000C000000 00000000440512800000000800000001000000000000000000FF57EB0000002003002204100000000002000280000000100000dea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00008001800004004000000000000000000000FF3D6300000000040080082080080A80080080082084000624020022020020 0209200200200A02202004230326294300A00200000000010208255080A062052803202002002000000000000000FFB52701 0040104001851801801881801C554CB84980001468C604602E4D654400608C28F10605600208E08E00400600780400000008 0006006802004006006005004006006000000000000000FF902E0A00800000A9000000021001028101020401020240863C02 410500009504C0E4004054204400C200848841A40400AC0000280002E810502001400002C004004004000000000000000000003ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000600000 0000000000000000006000000000006000000000000000000000006006000000000000006000000000000000FF705E000000 0002000010010000000010014000000001004000000000806000000000000000000000006000000000806800000000000000 001000006006000000800000806000000000000000FF89160000000000008008008008282008888088A8A000002000000A80 0028220822020020020A402200220040000401220200005000022A2A2002004002000000202004002000000000000000FFE6 800C01000000D000004002000524800122400020008890480408048808800001400000104000000018051040000000CC000000bea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (510000000082 01A00043841813801801901819808088680E80C00400E0220060031060460040008060049020060060060000000010040060 00800000004006602444004000000000000000FFCC87000000048001841803C018C3815801C51C0591400264560148060C88 4200609201600640C290108114000407088006000000000006206090100140045006006004000000000000000000FF4B9900 0000000001800009803801801909803881840011600600404400030255642220600E00404000044400004600000600000000 0004006400026006004016002004004000000000000000FF4818000000000000000000000000000000000000000000000000007ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040610612000 0000046004454006802000000000000000FF7DF4000000000023821811811805001821C01003800000600E80C04648100000 612680600600601000000780228400000A008000020826037040200000224005454006006000000000000000FFFB06000000 04000184181184582101391181340582410464260048260800002060C65060162162880084CE100A44090002000000000007 20608810612600580C004C46002000000000000000FFCC29000000000001A05821B01989801801BA1891980000E906004006 036A920EE21A00E026004020986004512006806146000400010415106300826406024007802014000000000000000000FF4000fea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (306CC4026212 006006006204006006810806046006000000010006206904006006006880004804006000000000000000FFCDA90000000006 45800001801803001801003009810000400400400000600400604A0260060060040060065101068060260000000008440460 10800000006000000004802000000000000000FF6570000000000001845811967819019801B03181808002E8160042869060 1404680602600618602080600600040480701200000019101661600946641E586184804016006000000000000000FFF76E00 0000000001E00001E09901001840801003880005308780C347216004007086007806006029106006002004007102008200040001a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000002980 1809801801000201001011C22050420620604E28644280600228E2870A732C0AE20608500602700600000100920F2862A022 00080070028A2C44002000000000000000FF819D000000000011800011801A038018000010498400044004204A3004780400 60C64060860260A000F21608600680608600000080080E006201A2600E004000000446006000000000000000FF9E3F000010 0000418201E1801A61C818F0007081800141458412C00002600418608E11640610601414600E864007007006000000000406 106840000000004000140006002000000000000000FF699900000000040184200180180110190102110180300840040558020081a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (807804016306 456046007814006000000000000000FF2DA9000000000001800003801801800248001015D01000024600620460608708608D 08600600E80003600610450600680400000000020E0E640510E006007003842802006000000000000000FF8C540000100000 89884021809805800230041069808005800610E40488610604E44600680620620E00E0070958060061060000000000070060 8A000800007122002006002000000000000000FF193D000000012045841801841953034001041005D0004441360068060560 5300600200780702600400701642628680611600001052004620F40228630645600A026014006000000000000000FF5B59000041a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020060060060 06006004006006004006006006000000006006006004000000006006002004000000000000000000FFFA9B00000000000100 1801801800000400001801800000600600600200680300600600600680600400600700400600600600080000600680600100 6006007007002004006000000000000000FF48A20000002022058400018418432140080018018100C4600E00600484E00E00 600600700622600C026016420006806006000000506206516110200800006016006004000000000000000000FFE253000000 210351880025811909820000041821C01001650600FC0410692610E10F08600681620400600680500400708E00081002605600c1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080001802001 801828101A204A180780904960060C702E0060044060060060D690600400600666600680600600000000680E00680480605E 006006803002006000000000000000FFC0E8000000080003A0C201A21801021882149831CC810C620708213428600414E40E 11640600680491605700F4464C6086508340006107006000000800005006002002000000000000000000FFAA550000000000 8180000380182980184800180180200060D621620403649400614620608642E02400610600600600600600000000600E0060 00006006004006002002006000000000000000FF4354000000000001001801801800800000001801800000600600200200600021a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000010040 17002006006000000000000000FF599F000000000001000011801800011808041811842080E03602E0821268140060060864 4E0064880062160072AA00654C0000008060060062A8000080006006804002000000000000000000FFA8F4000000000001A0 1801801A00081C02001C01CA0062E2AE22E292AAE28C26E2AE28603E2BE53000EDAE80E3732A60840882A000600700755000 6006007816004002006000000000000000FFAA3C000000000001A00211A01800811810249D359440016556032D4455751400 E5560D6546906804226016006C06007D56000401006006006004800080006006002802000000000000000000FFF85F00000000a1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (628600600600 420380604582E05600600600000000740620E002401080004C2E516144046000000000000000FFD1D3000000000001801801 801801801800201001C002006006002002006002006806006006004002006004006006006006000000807806806002006007 004007006804000000000000000000FFC83C0000000001050118058418008419102198538042206806006802A08800107006 81640700E000101006007002001004400001006107006000006046004006003006000000000000000000FF74640000000000 01A01801801800E01800001921D00100748600743200148184E2CF05610708780144008600600200100400040000600600600061a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020460400102 8A00000205020000000082000000000060604080008602800001000070000000080060480000000000000000000160A60292 00010220006000000000000000FFF76C000000000001800001A41825079840001015800240649641624000008230685E0060 0600440020080444600660000600000000600E206130006216004806942100006000000000000000FF3B4E040000000201A1 5A8190D81121188022B105800340F086842A02A010C301604E426A8F234910C00004807006A0101600000090680E8868288D 0C48A54006003400800000000000000000FF92FF000000000003800001801AA3821812001001800094640721610800640A3200e1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (301300280380 3483042000000000000000FF692D0000000004042003002084002005042000000000AC100104880C810C19021080201000F4 C800800040820D44800800000000000900808C00A20808800028208880800000000000000000FFE231000000000100800800 800D01800808022C80800002200200219000210200302280300203020000200401A00200200400000000200200200008C502 200006004004002000000000000000FFA63D0000000000000198819820400018900084420000010000224400706200080200 800008000088007420100020006500000000080200080008146006441000880400066000000000000000FF41B602000000000011a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002002802A00 802002203002803552000000002C82802C00802802012112883102802000000000000000FFCAE900000000000030A2000010 112020002242010000814014008A4C80100480422C00480510C80280010C01110482100400000000483480482AA44C009240 04015034800000000000000000FF22E9000000000001845841A1180100190000180180000060160162A42960440068060060 0600640000680682648400600600000000608600600012C5062260060AE004006000000000000000FF4AE4000000000704C1 0D00D20B44C28A2C428854800144BA03A4301300350B2820528220034D310100242350B023403342000001003003003309000091a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (435435433233 01541501540000D40CD14D0D50D50C48551410550550D50A00D10550CA0D40D10A88000000000848D50C00930D10510540D4 0D00D50000000000000000FF3DD7000800000400400400400000440644000400000100000080110104102100000080000100 1401000001041001000010000000001001001049001001000000001401400000000000000000FF5A4C0008000000AA0200AA 0AA0A20A80A80880AA00002A02A02A00002882A02A88802A8AA82200002A8A208A02282880000000000000002A80000880A8 200A202202002A8000000000000000FFD23D000000000200A00C00A00A00A00802200A00800880280200288084300A8020020051a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000100C2442 002000000000000000FF22F70000000000AA0200AA0AA6AA0A80024AA0AA00005402A9AA82202882002A8200AA82A82A8000 2892A82002A82883200000000002A82A81800886C82A82B11180002A8000000000000000FF28C60008000000000400000000 0000440020240000000080000000000000810001208008000000000210000080100400400000000003000000482000200408 08008028000000000000000000FFE5FB0000000000AA0CA0AA0AA0AA08C0900AA0AA00000082A82A82282882882A92C8AA8A A82A80002A82A82882A82A82200000000002A82A80002C80882A82A02400C80A8000000000000000FF0E550000000003543100d1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (530030002030 03003442003002000401441013043041002203001013003002002000000000000000FFCC4F00000004000184180180180580 18010019098C4220600614E40600610420600630620600E1000064160440040060060000000000A620640000402600054600 4046006000000000000000FF9DB800000000040030A20120000020222100120100008200000048008410D500409400400500 080080000488C804800084000000000800804828804820800004A05114800000000000000000FFD4EC000000000000800800 800800800910A00800800028A00200211200200200282200280200220004280202200204200A0000000000020020004420020031a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80300B001800 02805401002000002300002960004800880000404080280062080200000060000000000401000002000060060002A8000400 006000000000000000FF4335000000000000920800000800820831800880800000200A0C0082422182002202082082002090 002400006622002444000200300022032040000002540002006004002010000000000000FF1AA74008000004000004004204 000404005804040A210E92A10012284410291290012292094010502190056010040010000000010010092010210042210010 05001420000000000000000000FF2FED400000000400800C00C42C10800C40C48C4080811134B340315210B04B03348B04B100b1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (460844860060 08000000000000FF43B20008000000019080298A58318D590182584B934000422E01603614020A00628600E0060062200000 1C0064060084061000000000060060006686601480A6060006004000000000000000FF0FC200000000000180800190184180 180984180380000864C610610600450A10E4060B60AE00E04000004400600610000600000000000C10601001600600000641 0006002000000000000000FF8EFC0008000000080000000041100540A011402011401001000905081260001100000C054800 800020E0C0000020086080100000000010100012086006000200510300006000000000000000FFF0850000000200000018010071a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40022882A622 60022883240000002A82AE2AE620888288220AAE2142360AA000000000000000FF9134200000000023000001800811001801 801801800000600400710400400800600600600608680000000608E502040004000000000006006800046046100006944086 004000000000000000FF19E200000000000990A0018010C1803800841801800000600400624E02610200600600600600C000 02600C00604E00608E00000000000400600020600600800600C016400000000000000000FF48AD0000000000098000298211 01881840891811820200600C04624620200200608600620600641040E48400404601614600000008000400E040080000410500f1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (03931C019559 5580005525564044365325145565565565565560045165560AAD465175560000005505545560009305105505574344441500 00000000000000FFA8450000000001018CA0AB8AA28888D8018A98AB80002AE2AE2AE0342AE2A42AE2AE2AE2AE22C0002CF2 2F2AE92A28E22C0000002A82AE2AE0008AE4AE2C82AE2242262AE000000000000000FF7FD140000000000104000180002080 5A018018018000006006136084002044006006006006006000007807A028120268040000000000060060A040004000000600 408E400000000000000000FF21E70000000000958200AB8AAA430A980188B8AB80002AE2AC2AE4042882202AE2AE2AE2AEA20009a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (685400000000 0000000000FF5DE5000000000001801001801209801800801801800200200614483400600400600600600680400000600600 2016026006000000000006006000806406000806084104406000000000000000FF92300000000000AB8210AB8AB0938A9A00 8AB8AB80002AA2AE00520428A2042AE2AE2AE2AF2AD0002EEAAEA82A2628EAAE0000002A82AE2AF0000A80A82A92AE324204 0A8000000000000000FFD99E000800000021801001801805841C018058018012002006005086006014006006006006886800 006106002406047006000000000006006040206006000807105084006000000000000000FFC95D000000000155915155955D0089a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (28E226002014 2EE2A60000000000162AE00008E08E0002AE2262A40AE000000000000000FF37240000000000A38010018308159410000018 01800020A08E10600404200E00600600600600C5040061161421460060160000000004860062400200400000060160040000 00000000000000FFA04600000000000900100180590100204500180180000860460160960060820060060060063440000460 06212216006006000000000056006110206206000006086014206000000000000000FF435E00000000000110B00180184180 200100180180000060062160860220AA00600600600600500000600602A1060060060000000000060060A0200000000006810049a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (90A88AB8AA80 002042A82AE2AE2AC28A2AE2AE2AE2AE2AE28028E2AE0C822628E2A80000000002AE2AE4402AE0AE0062A82422AC2AC00000 0000000000FFB273001000000001B55355910815509930954155000001440855642855044E5565565565564C650451654600 44065164500000000000465560D0550530006550554556350000000000000000FFA675800000000001801001800881001800 80180180100D4000006000004026006006006006006000026006000106046000000000000006006100006406006000096006 004000000000000000FFF5940000000000418AB0AB8C09208098880AB8AB801006220622622428E2262AE2AE2AE2AE00406000c9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (404000000000 000000FFA1DB000000000001A0040184501584184B80000100000D6000006000004034006007007006006500006006406086 0060000000000000060062084000000040000C4006004000000000000000FF3CC50000000000ABCAA0AB8910218C58858AB8 AB80002062A82AE2A828C2042AE2AE2AE2AE2AE01828E2AE40623E2AE2A80000000002AE2AE03008E08E0042A820E2AE0AC0 00000000000000FF8D2600000000010B801001802841023002801801800028412000608600010200600600600600E0000260 0E2A8146006080000000000306006400000000006000000004000000000000000000FFF0940000000000AB8AD2AB8A284B280029a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060460062 00000000001007046000000000007800004406004000000000000000FF7A8680000000040BA09C01A40004C0DC01843A2991 0102400055E0024041A503600700740600600011600600640600600000018000051E99600040600600600000600600400000 0000000000FF532A00000000000D800401C01001E01A8188045300008A710100650403440CA060260260A620608440608640 4006096000000001000006204400020400006000200044004000000000000000FFB756000800000401800001A09101813801 80040100100060000060060440840060060060060060020260060D400600600000000000000680610602624600600000200400a9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (083807800010 228010641E00C29260604604614E40C00000608400600600600800000000008645400000600E024000082044004000000000 000000FFF071000000000001A31C01C00082801881821C00944040F041006022004028046C0E24E086026100200446206206 000240200000C0080600E43050E406204430028086004010000000000000FFB0C4800000000001801881820000A038018A18 0088A000E08042614252C200016116916C061560805102864062261104000000000004870064002204000040004024060040 00000000000000FFD5D2800000000041C11901800000811801805800802180C00000604A08402584708F08F0060CE00000640069a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF860D000000000001C01D01C02011A31801083843904001200000604C2241224060060460160140100084440060040000 4000000020010600440020621620412042E004004008000000000000FFE1D300000000000192D801140123C8180900180184 8020654800620608400202651620E0A60442C040010400600600020001000000000601600011002008C40010400400400000 0000000000FFF354000000000001803801820001C8190F05982180800020080062042B441200608600602600422800E00440 64060060104080000000060040500000200CC090200104604000000000000000FFF500000000000041A81A8188202D82990100e9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000800200224000000000014000000000000000000000FFABF50000000000AAAA8A8088C8880CC888870150800020 20002AA4042AA2A22AA2AA2AA2AA2203002EA2342021822CA0000000000002AA54200008808A2000006002142AA000000000 000000FFBA0900000000000000585182184244180010812800001000000001080040080000000000000000800061100C8240 006000000000000000480000026046090000110140004000000000000000FF970B8000000000004004022040000020420040 02000004800000024000600000000000000008802000600000000802600000000000000002822840620602000002001000600019a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 0040840001150050050050040042000001040000200000000000000000050000000040001050001040440000000000000000 00FFC036000000000155911D55F15911F5593184593180005060005564CE156515557556D565565560105365560165565560 000000000015565560201143565568004C4556356000000000000000FFA2530000000000AA8AC9108888CA8808AA900A0080 0032A0002AA02A2AA2222AA2AA2AA2AA2AA02028A2222AA21228A0000000000002AA00A2302AA2CA2320000323022AA00000 0000000000FF8F3F0000000000002444000202010000022900020000000000000000200020801000000800004080000000320099a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF A16410000000000022040000004400000404010000003280008000300000C900000080000000000000000004000000000000 0000001000000408000000000000020000000000000000000000FFDDB800000000000000400020400020002010400A000000 0000000000200000000800000000000090040000310000040000000000000000000000040240000000110000200000000000 000000FF2A429000000006AAC888AA8A88CC8AA88880882080000520012AA2820AA2022AA2AB2ABAAA2AA60028A2AA0022AA 28A0000000000002AA2AA03028A08A2AA0002022AA0AA000000000000000FFB25A00080000000120044242020141000040320059a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00029C000610 0600A40C4A08104000000000000004000000000000000000FFEF9D0A0002000000800800900810C028AC8008400500082202 0222420021220420AB202082122100AA200A00280200300B00020802300202208808A0020060060060020000000000000000 00FFC6A800000000000000000000000008000002801000010200000000008280000000000080402000020080000000000008 00800001800000000800000000000000000000000000000000000000FF8C6700000000401000000000820012431008201000 010000E0800000AC08080008000000001000000019010800004000000100001004008400400000000000008004000000000000d9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200402000082 00000100000000420000000040001000000020840555000000900000004200020000020000804200800000000000000000FF 23E3000000004010800800800800A04800802800000020305B00208A00A41208300300A00A20202001234A1834020220236F 00000421020420C0022002022002002002000000000000000000FFD2B1140004000001801801909C09825D5582585004800A 602700604611610604614600E024506100016004087006006006000000007007006088014806006005004004000000000000 000000FF52BC02A022000003001000000001109001110000602102070404C6244412D80050156241040440015490358002240039a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF8F67 0000000000000000000000000000000000000000000000000000000000000000000000000000006000000000006000000000 000000000000006006000000000000000000000000000000FF52B70000000000000000010010000000000000000002804800 0000000000000008008000000000000060008008010060000000008000000000000068060000008000008000000000000000 00FFBA6B00000000000000080080080089088080280800002020048060CE03200208200200A00E28400000220E0020044020 00080400002242082090004002000000000004000000000000000000FF9B6D02A0220000040000000000000000080000000000b9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (064100100045 86806010126006004000102006000000000000000000FFF5F4000000000001041800805A41A01A09C0108000008061050061 060122060060860160020040000A606002C606006006000100004006006000000000004020000006000000000000000000FF 9D09000000000201481801C8180180185380030021404160240064070030C601652620608202C020B2108000D00600000600 000080610F2A6B2800800000404008C016000000000000000000FFC22300000000000100180180180180190190A002000010 64044160061002060060060464120044000000000440060000060000000040060060000460060040000060060000000000000079a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00400602600 61060878060061050060001060070C0034006024200000037006006480050008017017084004000000000000000000FFBA90 000000000243A01804021A01811801A8080000020060058064460048260AE2060AF4060060208814C600A22C200525000000 9360060264C00080502140B6002004000000000000000000FFFD9F00000000000180180000182180194589480001234162C4 4074861160C600E24641610602E0404000860020040008040000800060162A734880E00600400608880C0000000000000000 00FFE6980000000400010A1800A97811845801801202200009401410F006842016006006026308004200016801904106017000f9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF8ED30000 00000001843801800801C01C2182000000020844061260160024140060260068840060000068460234060478060000000060 06206100826006006004402800000000000000000000FF5AE7000000000041801801822801E019018022C0000328400C0878 06002005806006096206006006026047012406826416000000004006507800000120006144000000000000000000000000FF 7F1D0000000000058198180118E78458A182BCA000022860050064061C60D6656466646004806040036506020104C3610D01 0010106D062DE050126086406806806004000000000000000000FF51340000000400018018020018898098419298006003000005a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (044000600642 620800E90624E084202002000000000000000000FFB212200000000001801810001801801801C25000008001420504710680 240C04E04600602500704802604E4464460260070012012060062A6881200020006024020002000000000000000000FF9DBA 000000000021801801C00641803805A00800014200480E80690680600401630604602408610804600E402046007006800A00 20600602E420006026004056026000000000000000000000FF8C8A100000580025831816C00011801A1181C8762022614804 08606E6040440460861A608601E0C000680600300700600600000000680690621042040000480E18500000000000000000000085a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00600E80E40E 926914144140806010096D060000840068548A6C46896106A16911016457006086206000000000000000000000FFD5FC0000 00008001801809880181801801821808208140400701700E00410602600E0060240464008860462166B640642E0100006C66 06006840006007457807116002000000000000000000FF462F10000802000583588280085B805C5780181000021048B62060 8600604E00E48602608412600400628600600E00E28600000102F0A701E0F1801E2800600648C002000000000000000000FF 0792400000000005889841451821E018C18817400003B0400400E20600A28408600789600500721081704600E006247006150045a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (63DB00000000 0000001801801800801801801801800000200400400000600400600600400000600000600600200400600600600600600600 6000000000006006006000000000000000000000FFF059000000000000001801A01800801801801801800000100400500080 6004806006004000006000007006002004806006806806806006806000007006007007007000000000000000000000FFC837 000008248000001849809801801805841801800080200440628600600601680601400100600400600620084404F086006006 006026046A00000100006006006000000000000000000000FF3FFD0000000000041319038C184D8018C188195180801000C500c5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (204804005000 000000006C06006000000000000000000000FFA9DE000000000002021801819800B800118C3881800000420E200080086004 046426006020006100806006004614806407004006106006016260006806007006006000000000000000000000FF55D10200 00000209001809D4390181008591390D9080A8649643214281621428E0C60B6000417000007246D360040860860840B60370 06906000008080006007006000000000000000000000FF7DD7000000002023029801801801800041801821844004E0461022 104A60C400600E2062A014604802E08E00608444E00E00C0060064A6006400006006006006006000000000000000000000FF0025a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0600E087287A 96106310004050801006006005001002002407007806027001001001006206006040000000000000000000FF95A300000000 0200801801A018018058C3901805840050200690B13700644E00602600E02028428100648E81600E0060A280200620600600 60AA000880006006006000000000000000000000FFDE8A000000000000801801821801C01901801825882122A8A60A322E20 E2AF6AE68E2AE0801AD5F802E3BE2A68862AE28A08A0AF0AE2870C715000E186006007806040000000000000000000FFB5F0 000000000000001801801800804045901811F440536457111550016335086156116550406004806C2601400C0070C600440700a5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000009 0C5801821883803811823801800040E8A652C00344EAAE04602E08621040608000E844444807007006006006124004094288 1108402060D6906500000000000000000000FF6B050000000000010018018018018018018018018001006006004000006806 006007806001806000006004804004007006006806004004005000006007006006006000000000000000000000FF93940400 0000405181181190590001015585181585001020070110070460068060060064004040000000268160168000020030068060 46016001006006006006006000000000000000000000FF85EB000000000001801801801800000001801809F02102A43700020065a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (510002020162 A6001080080010000000000000000000FFF97F00000001004A48000000A08204A00000040000030201280000008100200001 110800408000000070004106800064400800000000203801D228610E210028050280000000000000000000FFB2E700000000 0091101841A91841800283801801800080600640E2BE02600650622682630000600010080400600600000600600600420400 C40800600600E006006000000000000000000000FF596B0000000002A5209AA988DA48AD0085D01A038000142A16806AB400 680708EB0644604010E800B00004806D06A09027086886A06C26A06820A40A9084E806A06000000000000000000000FF359000e5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B20B4830C200 294088300141240220304301344348300300300308331302329344B543002810000000000000000000FF0A39000000000500 20832C2200002A404030004000088D0801231104800C00800048000009304800E90004A61040A00800004000A00800000800 868810800551201000000000000000000000FF8B3A000000040020800880C00808800A108408008008200002004002C0620A 0C200200002100800200A00100400201A006002002002002002020004402462002002000000000000000000000FFC6F00000 0000000107200194442410040C0A200200025086801804043480900290812008000904800074200001100060205100800A000015a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00200202800A 00A00A00800A00A22A008002C0AC02802802B1282A802802002C50802800802002842902803083002002C028028028128028 430C304AA42100000000000000000000FF63F100000000024040122822B20040020121100100028A49100040048048010048 0000410009484082011490C80880100C004004930800000800A24A00808880808010000000000000000000FFE7A500000000 000181180190B801801801801801800A22620640429408600604601680600001620010680603648E00600400C00600604E80 6040014006006016056000000000000000000000FF94450000000284A8940CC4840C24CA4854D40840800A08B083893802440095a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80282A80882A 82A03402A8000000000000000000FFDEC30000000003503543002241541543541000000000B10D30550D50900C10550D5055 0B48D50840D50540D40D50D10CD0800000900D50D50830930950C48D08C00550000000000000000000FFF90C000000000000 6004000400000000004000000009001000000001049000001000000000001001000100000001001001000001001001001001 001401001011000000000000000000000000FFD1570000000000880AA0820800AA2AA0AA080000000A0000202A82A8020380 2A82A8AA8000220000288A202002202A82200000000102A82A8020088088200200080220000000000000000000FF19AB00000055a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002002002002 00200000281209200200200200200000200200200000200200600E042000000000000000000000FF20F70000000000AA0AA0 024804AA4AA0AA0C400000082A82A8AA8AA82002A92A82A82A93A12A80002E92B03212A82A82A80000002A82A82A80000880 C82AA2222122A0000000000000000000FFE90200000040000200002C08840040000043240000080200010000002480210000 01000000000000001008010000020000000000420000000000200400080040148000000000000000000000FFDA4700000000 02AA0AA0CC08A0AA0AA2AA08800000002A82A92A92A82802A82A82A92A82282A80102882212282A82C82A80000002A82A82A00d5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4C04C00802C0 0C20C04D02C02C08810100310300344B00220B08B0230034C30528000030030430020030134030010C311345280140240200 2002003000000000000000000000FF2F720000000018898018098C18018C180180180194400160065441042AC02604428622 600E20622043635610602602E00602421020620600420000400E404114006000000000000000000000FF4A83000000001000 201330022201201000431001000000080000400488C800804800804808800808800004800800801005004000804804804828 C44C21001100888010000000000000000000FF7BD5000000000A00800800A10800800A0080280080008020020020020420020035a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A6246450220 2A8028008000000000000000FFEA0704000004402300000380000408010000000000A00000040200000504C0004508420016 00E4402462A8080020046008040408430020100400006016200088000000000000000000000000FF91FA0000000000888009 08880800862002802820984000A0020062862C610A02204210230200200000A41070A00200240020200000208A2264100142 13001101002000000000000000000000FF4D3E00000040044040000042042440040040044802017810F92810290001010890 310010A1220000001005431000189005005001091241108019200000000000001000000000000000000000FFD1C00200004400b5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06346286106A 4000600C016006106406406000006206002C000C04090072B70AE140010000000000000000FFBA8100000000108080194198 B97990200002D813848029002605800A01620620020600603E4D72802000045060060000060060000060AE0030A001004044 600E006080000000000000000000FF40F400000008108180180382500182802C00184580002C000600400402248E04044E00 604600710848840400600600004600600000615608315000600600E006406010000000000000000000FF9A80000000080000 00802404010210805400405004000482800C02A04080300200084204064360280960000080000860202000000004001000000075a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8AB8AA8AB0B1 8C08AA8AB8AB80000002263004462AC2862AE066226006A2602028823620E826288004A322A845E14649E0002E80880364A6 C16000000000000000000000FF64F400000000184080180080100182080080180180004020060C10B200004E00600E006006 10680004001604620604054C10200040608640680000600600E20614E000000000000000000000FF8EA10000000010008018 0180180B80D001001801800015411601240600600600030611600601600000608410609600600601600012644E0420500064 26306016206000000000000000000000FF1D0200000000100180980180900380300104980188A00044A610254A206046400000f5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070470460068 00000000000000000000FF165D000000001935955954155911944954155955800044455455244A5525545505565560075560 14516D56D555565564CF4D4550556556556040110110006007086000000000000000000000FF98CD0000000018AC8AB8AA8A B88188B8AB8AB8AB80000A02A62280062AC22E2AE2862AE0062AE0002AEA26AB600E2AE0542222A808600E02602848E2AE28 610F0A6000000000000000000000FFB886000000001800801800801803801801801801800009200600000200400600600600 680600600000680680600600680400200000600680601024004014E55622E000000000000000000000FFF81000000000188A000da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600400480402 600600C00602600E01600000600600682100042088E8AE82E000000000000000000000FF530C000000001814801800001901 8408008018018000456004082096004004004006006006806010006006104804006086804000006006004008046006206006 106000000000000000000000FF24F60000000018808AB8AA0AB8418908AA8AB8AB8000006AACA23302AAC2AC2AC2AE2AF806 2AF0042CEAAEA202AC28FA262A42A82AE2AFAAF004288488426206206800000000000000000000FF01E00000000018018018 000018238008000018018000415014802896806084006016006807006820006106005546006D071040000064069068008060008da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A81018AB8CB8 818AB8AB800002644421809E32021601C0142AE2AE2AE00028E22602420628E2262260002AE2AE1E600008E08E0060560060 00000000000000000000FF222F00000000180080180009580180180980180180005161261404420000560240060060040040 0400611648E006006086106000006006006004020440006026026000000000000000000000FF250800000004380080180202 1801821825001801800000440C00000610A0843064D60060060060000460060040AE04601601600000600620E0084060064C E49648E000000000000000000000FFEBAF00000000184080180000184D80D801001801800008400401104200200400000600004da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00600600000 0000000000000000FF574D0000000AA0AD8AA0AD8AB8AB8858A38AB8AA000024A2AE00602602A2AC4862AE2AE2AE2AE0002A E2AE0D42AE28E2AE2A60002AE2AE23600848E2CE286286286000000000000000000000FF3691000000150155954551855955 91194595595400000261164460C640E54210452655655655600455654C0B44CE5164D6446000556556416010150550526506 52E000000000000000000000FFF664000000000001800001801801851809801800000008200601610E50600200C004006006 00600000600640400600600600E00000600610600000600604602E056000000000000000000000FFBEED00000008D8AA8AB800cda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000026006 49400600600608400000700600E0100062464C649648E000000000000000000000FF2CB5000000000001801401801801809C 0180180000010020040464462060048250070060060060040060060440060060060040000060069060000400000060260260 00000000000000000000FF01EF0000000AA0038AB4898AB0AB8A18818AB8AA00002822AC74E48E0062AC04C2AE2AE2AE2AE0 0028E2AE0042AE2EE2AE22C0002AE2AE2260002CE08E01E006006000000000000000000000FFAD5C00000000000180000380 1001805811801800000030A00608620602200442000600600600600400600620400602600608E00000600600600040000000002da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3851801C09E2 3E20004010604600789748E14200E2060A642600600000600600604410620400200000600604640000000000600600600000 0000000000000000FFCB2C002000002061A80C23B41C21C01C0180391200A081210681740E206482C6702700600600640000 60061160040860040124001E704682600005E00600600E006000000000000000000000FF6C12000000002401840441C01201 A03801801802050022200C10682602201508002E0060864260044D6006024406416006005000006094004000000480006016 00E000000000000000000000FF0D8F0000000000D1A00023A0100180584D801800000003200488600615200430600600600600ada040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (506510010000 000000000000FFA0EB00000000000184120980182B8078898C1828060051206200608E04020230001620610640E000006002 04600602E0060060000063042040080C602600602E29E020000000000000000000FF4254000000000201801C838948018218 05805882000000440C53600680600682644E0064000A041020004600E10408004400280000602E00610000E3164AE2060265 08008000000000000000FFBED7000000000001C01801B22809801C098018C8000004610C09654609642E4162061462400204 0055000608E42441040400A20000602E006200000500006006006000000000000000000000FFDCC6004000000001D0080580006da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000463200100 080060001100000002084C00004060064C8490488000000000000000000000FF61DC00000000000180148381182580395390 1902020000403028601600020640005640640000010000041244608600010611600000600440420000628602E20600604000 0000000000000000FF8B310000000000018010099059018A9801841810000000400000610600208604040604E01013000820 0102006006000006006000016016106000000050106106056000000000000000000000FF5423000000000001801001801891 889821825840000000240205600600208200000602E00E0064801862CA2360061560C608E00000E4440843101100004060D600eda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000400000 0000010100000004000080220000800004020000000000004004000000000001000000000030000420008000000000000000 000000000000FFFEAC0000000000AA8C8AAA9C00AA8AA8AA8AA80000000003222AE2AA01A2024CA00A2AA28828C00028A446 2A02302CA2243360002AA10240203808C08A010000002000000000000000000000FFC8250000000000000210018000000000 0000000000000400080000001200080240000000260260000060080001000260900000000000C00080000264260000200200 00000000000000000000FF83CB00000000000000240003400000000000000000002881000000002000A04002C00000060060001da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF52B1000000000201400400003401001001401200000001500000400404000088C3108040040040000000840040 04000104004001005000088040004000040028050000000000000000000000FFB786000000000155D43D5594595595595595 5800000042644755755648E4570045565565545140005564CC556556556556554001556D5655600055411652450452E00000 0000000000000000FFAAA90000000000AA88A8AA8088AA8AA8AA8AAC00000032324A2AA2AA2822AA8020222AA2AA2AA0002A A0122AA2A228A2322220002AA24A0220002AA2CA282282282000000000000000000000FF0273000000000400208400008400009da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000004000 0000050000040810111D00000001000000000040000000000000000000FFAB82000000000200044400020000000000000000 00004400100008000001504000010000200000000000000000000200000800008000000000102200204C0490488000000000 000000000000FF78300000000000002080000140000000004000000000080000800000100000820000000000000002040110 000000000000010000000000000020000000000020020000000000000000000000FF86A50000000004AA8808AA880EAAEAAE AACAA800000010A2B22AA2AA26A20219A2AB2AA28A2AA00028A2222AA2AA28A2AA2220002AA2AA2AA00008A28A00E0560020005da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800820080021 00D40400C10414432C00500501C00C1442402404040000040000040900600010000410283040000044444040000000000000 00000000FF512200000A108200800B02D008008008000548008400042A1300208A2A208200280222A0020A20800220020000 02803002008020002002022000082002002002002000000000000000000000FF4A6C00000000000000000020000800000400 00D00140000040020000000840000000000000000442001A000000008008000000000000000000020000000002A020000000 0000000000000000FFC9BE0000000000000100000004001A800001000000019004010004000088000000408008400000000000dda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF9279100000000102000200000000000090284000002009000000800000043000080000C81000420000000400000400 0001000000040000001010000001280000004020000000000000000000FF803A000000000260810800800808800808000800 800000200200200200200200200200280200200040200200100B0020EB1100000020127625400A2002282002002000000000 000000000000FF8227000014110001801D059018098B1C04053B2984A0044037046016414824004004244004004280006004 000006006806000000006006006000004006006086006000000000000000000000FFC5E20800000000820000000010010012003da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040006040006 000000100000010000006006004446006000000000000000000000FF8B410000000000000000000000000000000000000000 0000000000000000000000000000060060000060000000000060000000000000000000000060060000000000000000000000 00000000FFCA9400000000000000000000020000000020020000000000010000000040040040040000060060000060000008 00006000000000000000000000006006000000000000000000000000000000FF7697000000000000800A0080080908080000 8810800080220600020200300200282200282400000000200A00002880308C0200200020020120005440020000060020000000bda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010104000A40 062862969884804004201138E603E00004602000001680610608001008201340A14001E04600400E00E00000000000000000 0000FF66A6000000200001801801809801821800020009800004410600E50680000000000010200600600000704000000680 6006108000004000004000000020004006016000000000000000000000FF0DE4000000000001801C00809C01821A40200109 84009004060040061000403200008420000100021000100010060000060100000220464C30020D0D20004016006000000000 000000000000FFC5110000000020210018028018038118000200418100000026514006008100000240002140040000000000007da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFB7D5000000010040849209821801811D42001901E001802106047886006000006136016006506009406006000815026084 0010008064062860204010204C6006006000000000000000000000FFBDB30000000000038218018038818098002038010040 80A0A60041260040800441168050015000081008060002040200040000800462070960100C00002B40062060000000000000 00000000FF2AF7000000004040801005801805809C0000194184800023260040060000203204060A400000000010000E0200 040200040000000240253240000C7506004246006000000000000000000000FF3CFA000000010041801A15851A158419600000fda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (460060060400 0000400500540000100011464607E000000000000000000000FF4AD300000040004180188188183180180004000580004000 0610C00E20600000600600680688600000600610940604640600000000600620700002600600600600600000000000000000 0000FF59E2000000000001001A01E03801841810000001800004800600401610688029620000604601600400605601080600 6806000040D00100000010800400006946806000000000000000000000FFC22600000006000580F805811975807A0A005801 04401A20460260460654640CC026106006006000B4602E6084049870040009302C6097016701356B860176A74060000000000003a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000020404640 788600C302085C0624604780600804600600044782E006030200006107B571290A604604E206086000000000000000000000 FF9E21000000000000051101821840025800020041000040C01600400600040200002008722E026024806806000406026006 22100002480422400102020002F006006000000000000000000000FF76980000000000038A1805001801805E00001E210000 00E08E00640600604000600C00682E00640000600600180600600620080182608E0270200062060440060060000000000000 00000000FFD5EB0000000001A1091C018C1809C4180000780100018060860CE246006C0004604C1074070C624400600608800083a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF3F 230000000000048000498D5810951A81C0140C000120605180608000522410688404604600600A0A60060568160060260080 0601615604643213600692600E086006000000000000000000FFA3F2000000200001861801801808001800401C0900001160 0E00600608402A22400518600600E04088716600000605652600000002682E41600100610601600F00600000000000000000 0000FF741A0000000000050018AD809800009880001807000108E2860C405E40784204608400600608602400708602804E80 668600000880C914004640008280187046006000000000000000000000FF99F70000002080028010018C39001438400100010043a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600444040600 6006446048006006004006006006000000000000000000FF0E21000000000000800001801800801000801000000000400000 6000000004006006006006006004006006006006002006000006004004004000000000006006006004000000000000000000 FF6D1A0000000000008002018018008012018010000000006000006000006004006805007007006000007006006806006006 000006006006806001006006006007006004000000000000000000FF2E28000000008000800101801900A038418090000000 00628028601011411444420640600609600400600600644680200604020F024804104900000C41006406006006000000000000c3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004540D0D550 916556154550546557046A4E01600650E456002205000006200A01000002000000006026006006000000000000000000FFFB D100000000800190600002181980008B8EA00A00808A6000A0408100708600400480622E0260008060060060060066040000 070068060067A8006806007006006006000000000000000000FFBE82020000000020A11000041801C4091590115004C03440 002D4100526507105000116006006806006926427006D2B0140880860D400401400200000000400600600600000000000000 0000FF391101000001200880100000182190480181500210000042C000423000E05404608C24642E32E20013600610E026000023a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF0FE100 0000000000801801801801800801D508206020A060000264010364060179480040C104180880800600644200000200000600 7806007000000001004246206004000000000000000000FF8509000000000000A00803C01C01845C0080080C0A0100634049 70B00848B602640652421600E2A0006A2E50F01200220A000006806006006020000800006816006006000000000000000000 FFD4E7000000000000880801801801C0180500080002004062A00CF22806C22F0A708E08400629E30002E4F602E00222E01B 2A828698E10700E040006006006416406006000000000000000000FFA0C1000000000001800004001801844020950052144000a3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4A0C06942922 D02A00848900A04307086824000000000000000000FFA56F00000000013180D041021881003003001000000108600040E000 00824208408708E5175160090061021030570131060000062142048340A8480228044026006004000000000000000000FF65 3900000000020080100100180100100100160000000060000060000000020040060060060060008068020020060078060000 06002002802000006006004006006004000000000000000000FF5776050000004250811801C01A41944A22C0014010404060 00047000D00006086000456000800000101004505042104002000006AC4284444800006007004006006004000000000000000063a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002080092350 088890A40350070061104064200000C040F0000900000004000500E00060C6061000400420000000000000000000FF66EE00 0000040002000000100184040002000000000050000010001180920080101800119709600000610002040800620042000028 0300288110236036001000000000000000000000000000FFFE76000000010051821089A3982100A004800000000002600040 640010013610410000600080000820080200202400411600000610002002000800E106204A86006004000000000000000000 FFB0DD000000000204B21295809A29248281B280A0000082E0210A60084A090A034C28C46800000800A0022284AB06B0140600e3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFBB0E000000 028554C84C50C88F08C82C10D420800001032841402208D0A8A2D220CB0D2082003129202102003223413C0A00100320310B 02B02910310B442003403402000000000000000000FF7CE00000001002243842402004081040102413000000008020880800 4804C042024110820830C84084128408CA00880480000200C38890C00A00884800800030884000000000000000000000FF23 2700000000000080893080084081090093002000000020400200000020028400022C20040000001030030020022120062000 0200200210240010020A410006002000000000000000000000FFD7F800000000018900300200001042008008C0C000010D080013a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006082007000 02488288288AA82A8000000000000000000000FF3C40000000400482AA8B50800A24A00A00A02A00000100A0004020008028 8288A002842842042800802002003012842883000002902912842B22A42802802002002002000000000000000000FFD7C300 00000002302022020010002000002313080000840001025000094014404CA409080400488082008400510080001400000482 0840910808804840824005004004000000000000000000FFBA8B000000100001801881A01825851883809820000050600010 600000440C00600480600C88C000146C0400400600610440800610E40648650000C0460168160060060000000000000000000093a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (82A8488000A0 01003202A82A81002C92200002A82A82A80000002880080001082C80882A92A82A8000000000000000000000FF4811000000 20025420A2A01543543542003002A00000C80550441551130CD0481208C90510510A00D11440000C40D10C40800000900B00 800B08950950C08550550000000000000000000000FF6A7D0008000004044004026000004000004404000001000000800800 040040120C110100000014010001100010010010000000010413414C1401001001000000001000000000000000000000FF10 8F0008000001000000000AA0880AA0000C002200002802A80882A8220220060008200288A88202288A2800032028833000000053a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E80000000008 02800802800800800A0080A000000005200000200200200208A0020020028020000228120000020020020020000220524020 00442002002002000000000000000000000000FF5FE60000000000400AA0800AA28C0AA4000B40AA00002102A9AA82A92215 108310482A12892882002882A00002A82882A80000000000800902400884C82A8AA82A8000000000000000000000FF3E0600 08000000000C001220000000000000A00A000002800111000040000100812004104104010204009000001002000000000002 8028048040000200141000000000000000000000000000FFBC210000000000880AA0B00AA4A80AA0000800AA00002C02A82A00d3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000900930100 4281001001001000000000000000000000FF1A26400000400CC0900808C00C00C02C04D00C20804148304111353310B49352 301300301304B00002302300108200300300301105254B05300100220B003003001000000000000000000000FF702B000000 08D80180182380182180184182301510800062902260062040260160862AE2A4004000016006000004006036044000206006 206400004086006006000000000000000000000000FF04D20000000013492002484010444000002012010000884000004004 894B50404CA4810844044880800004001004841000004000B10C0082C94A804A20804004000800000000000000000000FF740033a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108048048008 020046036040446000200248096028088000000000100000006016200028308028000000000000000000FF83A30000000001 000810310400010000200C502100000805000402C80140D00801101505260060000060000000000060240200002004002001 00006016000000000000000000000000000000FFFC1F00000008202081080284082084680280180E8E800000080820020020 0200A10210201822400000A0E400018600200A00620800A0A2022000440102140106040000000000000000000000FFF14D40 080040840000000044040040040040040104212010212090012812012210012010054090000211010010000010010014010200b3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000010018A 1800081821001009900100000020442000600602000401600604600E00601000204440008E00002E40600000400600610000 0008204036028028000000000000000000FF485E0008000010018308040918998051088C4004114000032000E2160340940C 600600600025020A00000403800601000631600000608C306282488300044606400000000000000000000000FFEBF7000000 001001801800045901841000800010020000800041642608012410608E086020400440224004040424106006006000004094 406400156406104086100000000000000000000000FFD9AE00080000000010000200A04000008002408810C04100802000480073a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0064C0000000 007007000000000000000000000000FF6F742000000018AB88C8818AB889881805B022010000002000226006200444446696 146288A886002A80060000022882260022A8206206206130CC80A8204AAE2A8200000000000000000000FFF40B0000000018 01800841801A21801851810000000002200000600605033420600E80E84004080000441640082A00690E0020000961460168 00226006104006800040000000000000000000FF639D00000000100184281200180504B0850C0000000049400010E0060840 041360465260060060800060C40A848602600400600002401414648800640602C006000110000000000000000000FF47CF0000f3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (061160460070 060068000060861400160071060040002C6506206040006006006006000048000000000000000000FFACEC00000000180190 5913955D30915825900400000055000055600635254655602755751655600455254F5484D655144E0045505240C4446014D3 0550556556550550000000000000000000FFF2BC0000000018AB8A88A38AB88B0A38A1C2800100005060002A60060AC00E00 610620E2AF2AE0802CF22E2113222AE2370022A800E04E0AE20088E2CE2CF2AE2A8280000000000000000000FF035E400000 0018AB830821801803021881C48001000000600000600600001600630E00602700630000380680100200000600200000620E000ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0018C9800805 801A4484B881804000000000480000600608203200624600680604680400210610088E20080E806000316046206034220200 006006000000000000000000000000FFF11E00000000180380C84180180080184D201200000000200000600605630200600E 00602680608004601600800604608600400000620604E200806046004806000000000000000000000000FFABBF0000000018 018A08898AB8888818118AD00000002AA0002AE0062020062AE0862AC28E28F20628AA262202260883260042A803608E1970 820880882AC2AE2A82A8000000000000000000FFC26F000800001801801811801C4081181180540000000310000160064061008ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000044060060 06000006000000000000000000FF1CFE0000000898AB8AA88B8AB9008E98110AA0AA000021E0002AE2AE2AE2022AE2AE00E2 8E28E00028E23600000E08E00E2260005460062AE00008E08E2062AE000000000000000000000000FFFC3000000000580180 080180180000380D800000000000600000600600200200600608602602600400210E00000600040610600021620600600042 0000046006000000000000000000000000FF154F00000004180180084180195280192180000000000A400000600600615200 60062260060060000460060003464460C600E0000C60B600602000624608E006000000000000000000000000FF9099000000004ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000600 60000000040000AE22008E080000006226004000000000004006000004000000000000000000FF06FE0000000AA0AA0D5889 8AB8AA0AB88182100C000022E0002AE2A804640C2AE2AC2A82AE2AE0002AC2AC0002260AC2AE2A80002AE2AE2AE0004AC0CE 2AC2AE000004000000000000000000FF40D0001000154154155910955854111943955154000048600055655054450C554556 4C85565560045504C400040611044645000001611655404055035054E556000006000000000000000000FF4A898000000000 00001801801800001843881000000000600000600040E086006004000006006000004004000096004006000000006006006000cba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000098418018 0000184394588100000360000068011140100040060000260260000040060001160040040900000060060060004240060060 07000006000000000000000000FF093E00000000000112380180180420181180103100001060000060004443208070060060 06006000044004000006444004000000006006004020004220007006000006000000000000000000FFCFC50000000AA0AB00 18CF8AB8A80AB89181D14300003040002AE2A81060402AE2AE2A828E28E00028C2AC00022648C2AC2200002AE2AE2AE04008 C08E2AE2AE000006000000000000000000FFC8DC000000000000001822801800005801801000000004600000600001602400002ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (405000480600 0004000000000000000000FF4931800000100000800001801803801801801814010000610001610002E20228E02602004E42 600808400E01000200400208050004E006006500004000006407400006000000000000000000FF03B4800000002044800001 C81881C1188380900A068004508014EC8092690308701C1100061060400444040400020C4002000000126226386000604006 007006A00006000000000000000000FF1CEE000000002400401880E818800038838098000040486808006029004820005087 00600600E08440C00640040650400C009000006424200000004050007006000006000000000000000000FF561B000800000000aba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (446086406000 04400209000602C00E1500000064040040400040084AC2CE000224000000000000000000FFC9A70000001000450810230238 0B88D8018A108A0A2012C0900066501040480063C00100265363A800400000040600402609000000600402A0880042060044 06208004000000000000000000FF2693000080000021C00000A0188184180580980001002060000061280A60C00140002AE4 1050000002400E4484821040822310000062160040203541064040268A000C000000000000000000FFC50180000000040180 010180180380980180100000204440000C600081628021480514603004005052C41444800044400A10030011600600630200006ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A04000000000 00000A000000001480000000004803502202201400060064C00060A80000080060000000000000A842042000642601000000 0040000000000000000000FF5C77000000000001081C22003C15809805881802000002E0000064000040D000430001642010 005000400A3204860A404E0000000060140501104841060040164B044C000000000000000000FF51A900008000002100B001 0098019058098318200B4000448044E0C048C4000C400010610802030000400200000600C106400000006006002000054408 154286000004000000000000000000FF792000000000000100B001049901843809801930000040620022E01024C2000B600000eba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2CA2AA000282 000000000000000000FFA4240800000004082002004004010000002002200000000001000801000088800000520004000000 000000000000201014000000000000200280400000000804000000000000000000000000FF7B2E000000000088800CCE8AA8 A80AA8AA9008AB80000020002AA00002011200048A00228828C0002AA4060005D62AA3220000002AA0120424802AA08A2002 AA000240000000000000000000FF199800000000000502100180040580000001400100002000000000000080041080042100 26026002004400000440004108000000000400108010004006120000000108000000000000000000FF25E880000000004008001ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A28A0000AA2 320003220AA2220000012AA2AA0020002AA08A2AB2A80002AA000000000000000000FF99C900080000040024440020120100 10014004010000208001004800A14044C1491402000400404000012400000400100400000000414080008000000000500400 000C000000000000000000FFAD2B000000000145953C95955955955955955C0D00005560015560005564445574CC01655455 45105564C400045415654400000055655694E048156536556556000556000000000000000000FF17600000000000AA888888 8AA8AA8AA8AA82A8AA80000A20002AA0000C24020A302248A2AA2AA2802AA00A0000022AA2320000002AA2023120282AA2CA009ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000210022200 2802100000020020000000080000240400000001000001000400000000D009000000008000C0040000801000000020000000 000000000000000000FFBD420800000000244222084004000004000005000000000000800000000110000C20348020020480 4001000000080000800000008000000D0110000200000000000000000000000000000000FF75FA0000000002000000440000 0400000000004C00000000000000000000000000000000000000100000080000802000100000000000004002400000400010 00000000000000000000000000FF1EA8800000000488C888C0CAACA8EAACAA8AA90000002AA0002AA0002ABA222AA08A0022005ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0408E0000000 00000000000000FF73D70A800048B200000008001400264000403410000024001808000001002414C084001C250CC1001404 04081880000228420811000000004020024040004844044000000000000000000000FFB8E210004021280C80090280081081 082003082210005020100000000230820A240A4123020220880B232301208202600620000A00200200280000282200200200 2000000000000000000000FF84FD00000000002000000004000000020A000008040000010044000000804001000000000100 0200000000880000000000000000000000000800A208002002000A8000000000000000000000FF9D7600000000000000000000dba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000220608 200220200202000200202204A000820002000000006000000000000000000000FF68650A800030A200000010200000220200 202400000020100000000000002000880000000040480200000000080000442C0000000000000048020000002A0001000800 000000000000000000FFF16B000000000A00806800800810800800000C0000000030E000000000300A0021020220C2312000 00200200216210210200080200260200A0590020022A2003002000000000000000000000FF3408100040015835801905841A 11C1185415104414005060A02400008C7144416416C161040042100161440961070450040000060061060040004260062072003ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010800081108 08040000C0000000000060000062060040000001001360020060420060060000000000800080400040460040281060000000 00000000000000FF435D00000000000000000000000000000000000000000000000000000000000000000000060060000000 00000000000000000000000000000000000006000000000000000000000000000000FFFB3500000000000100000100000120 0200000000000000000000000100500400080000000700600080400400080000000000000000000000480000080600000000 0800000000000000000000FFE14F000000200A00800800A00200800800200808000000208808000000200A0222028220840000bba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (602000000000 0000000000FFBC2800000010580108583180100102124008488C062002E0100000000068000261060E010602600103400000 40062860060000060428A220A070000807104000016000000000000000000000FFE7DD080000001A21001001801001003202 000A00000004600000000080660800600610402604608008E000006006406006000404004844400800044800004228006040 000000000000000000FFF102080000001831101A41200005242004402880002000600000000010694804608E844021400000 006000016906146006000006042002880488404208044400006000000000000000000000FF00410000000818018018018020007ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (68000000C024 0A20820000660063161EB00081209E01600E006000000000000000000000FF0036000000021800001401821801E098000040 14420010440000000000228000600E04200E01700000A88031408400A00200000684600601108900210110601600E0000000 00000000000000FF6843080000001800001801A4080481280020080800000960C000001000254000600EB070000100000001 004C690701200200000200615600210000C400014006006000000000000000000000FF40BC000000101C08001801804802D0 081001200000000060000000010860A000648E00600120000100200000E12602200200020082400508029044424E0240060800fba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280011E95000 0000E00000018000204471E01611602700600000000800280680480C0000144155ED00287052600000604600600000000000 0000000000FFF9BC000000023821841E81800801000004000C00000000400000000000200400680600284600600401200800 4006804814000006006006021004042407006400006000000000000000000000FFC422080000093801801801800801040000 08080000000160480000001078041069060860860460149028000460260A4904001800000240000040006401007800006000 000000000000000000FFC66200000002980000519181980582584008080020000063001800100E204208600640206E0268090007a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFF5B2000000401E0180180380D8405050800094080000046010208020000405006106203406406404100140084224 11600600000600682600251010008628500020E000000000000000000000FF412A0000002018018018918018084811121001 1000014060001000010250350A600E80200F0A702002000008C00400600600001490C2040220000082200042000060000000 00000000000000FF9A8D000000001801881809800810084888001C00000041600008000002241402600680300E8A60218200 0030C806A0400400000608681600220000A046007007806000000000000000000000FF38900000000018258A1001C00800000087a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060064060 26000004804006806000106820026086206000000000000000000000FF493B000001C019000090018A0049A21CC0011C1010 01804806208821805406086000907806206C040040C0086C2601600688001600602623634D80608648B00600E00000000000 0000000000FFD9D2000000001801801801891806001C20001C00000080400000000080100408600600200608600146001060 400410602608004E80600610200400203600E006006000000000000000000000FF0E5B000000265885809801821808021808 022840080000600000000000140400600619200E007004210208404004607006000024C040042AB4305028080268C60060000047a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001010014004 41062304C025420E0061404800D604641440C20040642600E006100506006006006020006206002006006000000000000000 000000FF43950000018018000010018000010018000008000000004006000000004006004000006006006000004002006006 006006000004004006004000004000004000006000000000000000000000FF5A5E000001801800001001C00001A018000008 0000000048060008000040060060008060070060048040020068060060068000060068060040000040060000000060000000 00000000000000FFE2E4000001841800001005802001105808045800000004400E00000000400600410040640E106806104400c7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF8A8D000001A01D000018018010010448441540801540011556510450A00556104150D1354F107124006D564D6546C061 3600020020010200400000600800690008E000000000000000000000FF5CD500002180390401300196118197E80818010E04 0038000E108000201087044000A0000650600404400600680690600600000604600602478400600680680000600000000000 0000000000FF029A080001A2182808580180000020082C2130001000C0C4360000110841262972100324060060C000714A88 601600748E030054214006026808006088006006006000000000000000000000FF2B0A00002188B8000010018000018008000027a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600E00602680 0A80284006006840004006000087006000000000000000000000FFC479000001801901001E01C00801C00A002C1000002000 2086480400209014305B100060410010000064C640622600608700100200788620700000400000040608E000000000000000 000000FF4ED9000001801A01401001801800823844215C800D0081344E010030002CA680604048E50E0063280040160B6106 40600E00000600E004006208006010802006006000000000000000000000FF7D7B000001801803001001801800C01A220098 800AA00032A62A00A88BA22E6AF6880AF2AF2A669822C2AE28723E08F28E0A83AE33E00440641880628E802C06006000000000a7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000850106 000000A48A0444C300C260008208002328A6280806D06806000A168128A2D14C00934C288A40502260000000000000000000 00FFBE01000001821800101829B23042901084010040000020445600000008414408600010A5165172880022170002AE02E3 260001040A400E025080C04080A00900006000000000000000000000FF698C00000180180000100180100180100020000000 0000400600000000600400600000180600600000000600000600600600000600200200400000400600000080600000000000 0000000000FF533A100001951950311801900801B00800005C000000051006000400800804004040006001080840006006000067a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 06950000000000A114000040B0400E0002128020000004022000000029082100010020480702638000852C00000802108000 0000040040008040200006001140250100000000000000000000FF26D8000200400000016020154080000080000084000000 0810000000020000800000100A971960118400009004000000200002000200080A0200018106001880C00000000000000000 000000FFB68F010085801808081B0988102B30001000414000002000060000000080842AC2000260000000080122066500A6 45E51600008018800201400008402E204028026000000000000000000000FF70D1040081A01B2C255801A09309854000224100e7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (50600600008E 02654640604011610600602442E080000000000000000000FFB9F0010004800C22D00888C84C409008104008A0000140022A 0000012098A20A210108A84208310010300214330302BCAA00140330300310B0090430435029028020000000000000000000 00FF8B0D00000044030422821002020021A10021200000008044C8000000C40240040800C0814C208C00B24880884900B800 40000818C00D20E008908608C0C20001004000000000000000000000FF9537020400820843800C00800800C0000000081800 004290020000000045029004C0092800004002002013002202002202000502002082102000100202180000802000000000000017a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000008000000 002200402A82A82382882880202001000002002202200002006000080000002002882082002A8000000000000000000000FF C9D2000000800A0A200A80804A00A20A00200C00000090A00200000080B002002000802042842C00022C4A80A88290A90200 0902822842A02A0080282280280A002000000000000000000000FF6C0400000100120120C2452202422130003240000000C2 400400000088455080500088000480480088C880B24829000010000850910D009508488AC8009440C4004000000000000000 000000FF2F43000001A4190103580185180183190011380A000004600600000004640600642040608C00C4100543162140060097a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF350A 0000000AA08C0AA0AA09408008A00008000000002A80000000002282A0AA82A84C8AA82A80092282A85302302282A0000300 0280002A80002502882A82002A8000000000000000000000FF71150000001542A020C2C25543523142002222000000D41000 000000D48B00550550CC0550510A21110A20A00D08CC0CC0000A48900C80810840D10B10D48D485500000000000000000000 00FFDE8D00080000040040040060040040040045000000010010000000010000108010010008000014008810010011010810 100010091014D1001011001041000151801000000000000000000000FF02740008002AA0A00A0008088088080000108000000057a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000A308308 34800848C2C800804141004800000000000000000000FF3F3300000000080280080081084080080080480080000020020000 0000200200200021200200240000200204240A00200200000240200200200008244200200A002000000000000000000000FF C1CE0000004AA0C80AA0AA0E00DC0E000002440000002A80000000001012A0AA82A8000A89288000A202A80080022A222A00 00C04802802A81C01000882A9A002A8000000000000000000000FFC61C00080040000C120010000000020000010000000000 80000000000000108000000008010400002400080B00200080080000800300502A041002004000000080000000000000000000d7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (92600000210A D001201201001009021089001009000000108000001000441009081489000201001021001000000000000000000000FF89E8 420400410C20800C10C10854C04D4AC10D1490012B10020401512A948350300104310B14311144B10B10A00A012002041402 103053103089042003003003083000000000000000000000FF14420000000058018218418218018218010218410000006206 01000000600601620800622420440008400642600600600600004E00628440604000630604602E0060000000000000000000 00FFA25400000020122020020020520220A2012882010000805004000000CAC80C0048008A004484481010C800A808A080890037a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFB3CA0008 000020001000100000901020A000200810000003300000104800204802802000860C60000400800904000000100004000004 08010210100526500200220400000000000000000000FFDF7804000000A00002100904C00D0040C002304000004400000000 804002800000100044465060004B0004054010000000020208000104000422000006000008100000000000000000000000FF C4B500000000082084080080080082080881880A800010400202800800010208A01006248440420010648228315309340240 00222A2326242000460092020102006040000100000000000000FF9CA6400C0040040000042040402040040240448008010800b7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004400C0D208 62000C040614C082006000000000000000000000FF8453000000001800881000881900841108801809020028400612010000 43062060004004060860000A200600722700F08E0102040040080260002A4028204002226020000080000000000000FF379C 00080800980180101689981692400E86198612002005460A0690500246006500000060058000602126006116386086488006 0060022940A001C40000442208E400000000000000000000FFF4E800001001380104180080180180004080D000000000000E 00000000000608600804010040000000224610E00640620610000400428028435000408608412211600000000000000000000077a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000004A006 00600004000602600810C0860060060864260001262260020060820060200A6026006000000000000000000000FF90A20000 AA0AB8AB9000AB88989188A8000790008000DF22AE000000C22286046000020288A8800080E1862260668968060002062062 52A044082000882042062AE000000000000000000000FF75EC2000000018018A200180180984080000300080002000060000 0011004600600090084004080048601690E00601620600010E14600203484201404600404E806000000000000000000000FF 669900000000180181100082382480100088180100000140060000004040164B60004100060060200204460065162460B60000f7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F76100080000 180180980080188080200080100000008000060000008001062060000100060068004CC81611408612630E0005163068008A 4008006006056114006000000000000000000000FF600F000154155833155955905881904000905800000040055600000040 0556556000D08D56D16004C4642F4462AE40611600041409425055402A55651020650CD56000000000000000000000FF6960 0000AA0ABAAA8440AA8CB8228A980088580080000022AE0000000CA24E08E0002C0ACEAAE022804246226A0EA07026000026 05628220E0202B22AE286246AAE000000000000000000000FFC9884000000018808000008298488298008310008000042006000fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2060A00CE208 0D0246044006006000000000000000000000FF9154000000001A1100180184D81080300004B8010000004006000000004006 00600001084604700000502600600634680E00022604E44800608000004048C106806000000000000000000000FF2B1A0000 000018C380180080182280880180180180008C400600000084C00600600010000680600088401600C3268063060000164060 0280402200240600602C006000000000000000000000FF0EE30000AA0AB8000AB8AB8818848A0800881001800131C2AE0000 013842AE2AE00022028E28F00822E2863B480F05F0260000860869812AD0082AA0880362042AE000000000000000000000FF008fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000160060060 0200000600601010C006006446026006000006006006002440052004006006006006000000000000000000FFBBA40000000A B8058018AA8AB8AA88180996188180004042AE0000000242AE2AE0002A828E28E0000042AE00600604600600000640610A24 60F021208E2062262AE000000000000000000000FF93A1000000001815005801801800841800011803800004400600000001 400600600000002602610449400630E1260063560000060D640200600000200010E096006000000000000000000000FFF690 0000000018A18D180180180080D0C5905849000030C00600000048400600600000000600624004400604620E34E00600032E004fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001808 00080180100180810900002380000160060000002B60060060020000060060042A400620E00608640600002610642E000300 004040004100006006000000000000000000FFC06D0000000AB8880A88258AB04388A0098AA0C380002162AE0000002862AE 2AE0022A82AE2AE2802242AE2AE08E20E0AE0002AE2AE2AE2AA0900040CC2AC3202AE006000000000000000000FF6D9C0010 00155940152955955155945823815911800014655600000000655655600255055655654401455614633641615600048E0560 0651000452251054E456556006000000000000000000FF8A668000000018000049018010018019058018018000084006000000cfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (248000080860 2C006001806004000000000000000000FF8349000800001841020CCB80109003414100002200000040000000000860060060 0600002602620010600400600E14E0060000060060040000A4046424006010006004000000000000000000FF081F00000020 1D12004801801A2400181580181080000CE00600000084680600680600000600610D00C80600632640615600000600600400 0204086004006086006004000000000000000000FFFD8E0000000AB8440888118AB9100C18418AB89080002462AE00000024 E2AE2AE0062A828E28E0002242AE2AE0061066060002AE2AE2AC2AA00870A48C2AE2362AE004000000000000000000FF61C5002fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04060A604680 00083105284D444630E00600600620002E2060144C21100000040A4046006004000000000000000000FF9CCE800040481801 8008418258120418230159010A000850400001000C020604600302010600609022F80C09600600E04641000605600E102100 002104056006006006000000000000000000FFFCA6800000413BE188CD81803A081019838038810000006000040421000807 106E4262048651640100544E40602610602600818642E00744200000208410E047006006000000000000000000FFC4440004 00003C01089C01C010200000018C000000000460800080202060A680600E082056046044086004006046006086000036084000afa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018010008 0180180B8AA009008089920004620620020000025600600600008E20650010220400E0260061060000060042060421004042 04214120146024000000000000000000FF3D040000000018010008C18AB8C59000831F000184803661C600000058016E0062 9E38066604600000002608620611E10600000610404600220010007C08408800E004000000000000000000FFE69900040040 1C00813A01801800001841801842080008600001008000608602602600000002052008610400610E34611600000624600432 20A835010404C207126004000000000000000000FFAB5D800020089800805801A41800021841801800100000700004848002006fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000412 00080000B0000000000000000000FF118980000000000400000002C0020240CA02805400001101300000000C00000002402A 00060061004A02003400081480000000004400001000100C8006008120000000000000000000000000FF19FA000000001801 001C018CB801800101040002008020408000800008600600648D48042002000000300400C0064C6006000006244004100410 0840D4004000006046000000000000000000FF277800000000180101490180190D95404B9100D00400106200400300006506 04604600011040002000254410653601600E000006006204400020050404544450016006000000000000000000FF6077000000efa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA02B0822AA 2AA00010220A08208A22A0AA0002AA10222200A0002A22AA2CA2022AA22A000000000000000000FF1FEB0000000000080804 0040002202800021201000000010800000004280010000400040040042800010008000000802000000000008000000100800 00000020004000000000000000000000FF99070000000AA8E88AACAA8808E888080089688000000422020000000022AA2AA5 02C0028828870041712205A0021026020002AA4022123462102102AA2002002AA300000000000000000000FFE71000000000 0001001001800000008001000000000042400000000041000000011000E0260260000080960003204001500000000880C803001fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (ACC0800CAA8A A8AA880CAA8C288080012AA2820000000022AB2AA2222AA28A28A2002332AA2AA0020022020002AA2AA2ABAAA0000020AA2A A2022AA2AA000000000000000000FFC203000800201004200200444400040000440021000001100C00000043100500400102 C0040040000248414004400000000000040490804044000040000040D5004004000000000000000000FF52A8100000355905 C3595595591190595590194380005564540000001075565565175565545540004C4556556336456156001556556556554400 25655655650DD56556000000000000000000FF1AD70000000AA888CAA8AA890C8A89292A88088A80005022A20000000832AA009fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020400228488 228000000000000000000000FFE3DE01000000000050000000000000000000A0A00000000018018000000000000000010000 840000000800000000801009500000400400440000000800400000000000000000000000000000FFC68A10000000022C5244 0000000000C00003004000008000500000000B10000001088000200201000010000002083480000010000000000004005484 00000121000000000000000000000000FFCA0400000020000001000000000004040000001200000000000000004000010000 00000000000000088000000120000150000000000000000008000000000008000000000000000000000000FFD0228000004A005fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5611600C4840 100040C400600E000010006001006006004000446006226A8E00E000000000000000000000FF075500200008100000000100 10800020010052110000024A9401401002C0250A40258000E42CC00004440405000000000800400000402000422810440401 4004444000000000000000000000FF64E00001280008A400488288090CA50804840800800001244200220800300280205211 30224A200002202202A002000000002001002002002000282002002002000000000000000000000000FF9202000000000000 00000000000000000060000A0001800000080080000800000000000810000008000B0000001080000000000000000000000000dfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200800A00800 800800800800000002A20200200000208000200200A04002400000200208200200080008400020200220E000400000000006 002000000000000000000000FFA76C0020000000000000002001000040000004000000000080800000048000021040000004 208800004804000000000000000000000020000028800820209000004000000000000000000000FF85360100001008601008 00800800A00800800E00800000A8120120000020C21030020021029020000020020820020000104020000025821CB58021A8 2200A002002000000000000000000000FFCBD300015000194400590590191585180504914380000164460864800060060060003fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (140140060060 00000000000000000000FF982200000000188400188180388180D0C089080500000060060060000460040062062000000000 0000200200600600001000601000600800014012C044104016016000000000000000000000FF44BD00000000000000000000 0000000000000000000000000000000000000000000000000600600000000000000000000000000000000000000000000000 0000000000000000000000000000FF0111000000000000001000000000001000000000000000000080000000000000000000 0006006800000800004004000001000000000004005000800800000000000000000000000000000000FFE27200000000080000bfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680008020010 4026026206810008402081226A005022884AC015015006006000000000000000000000FF22B8000000029880210AC5811811 80F8A6888801908021601600610000E0C41068962CC00602608022240208400439001000640111602C82243000020408510E 016000000000000000000000FF2128000000051800201801801809A018008028038000C16106806001016004006006114006 0460005020020460061000004060084470C680201080402480400600E000000000000000000000FFF282000000001840150A 01841851801C02A22A2100800060060064003061140069070040000805008420221062064080000060800065044A02004044007fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (019E78301818 80828847020110600608600800708640E4160461C730650060E0060040060000000024000661940034209022AEF070461860 00000000000000000000FF460E000000001800410823811B20241220E30801020100600610611000600E1160062864064260 0001620E224006888208002010086806022049006D5700610600E000000000000000000000FF5F9300000000180000088180 188004124020222900000C624621600080600E406406C8622014028180600E24608600040000201000680C04210050000408 5026006000000000000000000000FF31610000000018421508018258C0601000020021000000E1060064003260160062060000ffa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600000 0000000000000000FF3F3000000000184814E80582981400900483090980004DE44E02E20000604406600E0970A600E10409 680400E004818000004000E26060348560202116006826006000000000000000000000FF7BC3000000001812209809801800 013000820849000110600F00E00000640C00600E006806006000A0600481400600000000400004600C008001206046006046 006100000000000000000000FF0D32000000001800001801801A00003A82802E11080002E22E416000006944006006006006 807804006006806086000000004000016000000880406806006006006000000000000000000000FF02FE018000001800060900006040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80600E0E7216 10408600004000400100600610040004A1B6087006806000000000000000000000FFDB06000000001E00604F01801841801F 2194DC1180000064C6C0601000714600644650610720600000604680440F001800004000296034412A880800042040060060 00000000000000000000FF791A000000001802120801801A0982180000844180012462060060100062060860062370070061 0421608640400608000800500008620E040088091424024006006080000000000000000000FF5C2300000000190000080182 9800621801E01803800000780604620820F00608600652612600E00014609430400408003000480008620440200812A4060400806040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108180080194 1A03800003640650610E00610600603000404600601414000600200000600600000600080641600000614220600600600000 0000000000000000FF97BF000000001800845951901049829D41805A11A000486146816006006046486400D0400700E80080 02468024208A6806800806280894825508816012046007006000000000000000000000FFFFF6000000401800000C21C01A81 821C01C11801800022E01680E0800060062C600E00690640E0000061868041360A00000040000160C402380010280E126006 006000000000000000000000FF37A600000000194002881D88180D80D804000107800108604E08600041605402600600602600406040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000000 000000000000FFB8980000000D1804821823801011821903841822800001600611600600608E4460000A4306046140000006 01220000640600000620004C204010006002004006006000000000000000000000FF84FA0000000018008018018010010000 0100180180000040060060060060060060000040060060040000060020000060060000060000000000000060000060060060 00000000000000000000FF9F4C000000401800801C01C01001801001C01801A0000040068060060060060060008050060068 02800006802000806806800806000004804002806000006006006000000000000000000000FFD3360000000018008098018000c06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A82A01253A0E A80666F618828E088024204000C0600A806106446000000000000000000000FF85D7000000001A01801801811A01A40801A8 1800154011655700650608655708641000754600645400200600205000600600010680000000080082408612602E00600000 0000000000000000FF559B0000000838408218238D122128888101301A00008260860A601720600600604000620700600010 084600A00000600600000600020C045100006006006006006000000000000000000000FFE637000000003C00801801901841 914811A05300804034653644634654F24610E310C0C03640E014222516D4214802712615054F09020600600080601200400600206040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (804011811100 000000501600E106006046906000006000000000802D96002800026006041047400806046110006804084006006000000000 000000000000FF3108000000001801801801801801C00801E0100000000044160061062A64072063280040C1200101003004 002050006006080006001004004800047000044106226000000000000000000000FF3A1A000000001800801801C110010204 011011010CC01160A78064068060B6886000806406826448000004080200006A2E0011070000060070004061060060560060 00000000000000000000FF62B4000000001820801801821009820803821F21002028E22621E22E4EE28E62E3E82AD0AE66E100a06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF77FA040000511200909929B13A05A24A23B25A400000324C0612E0062C754600611084E000800820896B0E80A0 0092688600080E0A08CCCCCD00C349149040B7116000000000000000000000FF9453000000021080805801841A01288A1100 9B0D800100E10680602600700E016000486516516000247026202010206246400026010000000020806024A0400620600000 0000000000000000FF435C000000001000801801801201000801001801800000680600600780600600600000580700600200 4006000000006006000006000004004002004000005806006000000000000000000000FF9784000000051805801801A1180100606040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200260200000 200200000200000204A000002000100802006000000000000000000000FFA2AD00000040000100210C4B0001000011021222 00000005C000800100085100800040400700600102428C00840800002100002001811C024170408018090080C00000000000 000000000000FF967600000012800020C00000200400006009800400003402101300218202A0800100028097296020008000 0401403801007000000204A0090400020000000408208000000000000000000000FFCA2E000000041001801A4180190304E9 0B00110800008A400684680630610E046088206800100000086126006000006406000006080000000080144424004806006000e06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C18218038000 A962CE00E00600644600640028688C00C0000068064043001061062000060000064161002064160060068060000000000000 00000000FFC6FF000000400C00C40C44C48D02C20C08D14950800104200394300290388A0C2081002002083001A0B5430420 210034020810020095330434310C3003092403402000000000000000000000FFA9080200000000C02C04A00082002A020030 40100000C01000880000000400100C0088130C00C800610C40804800020280000008800840E00A00A00880A0082408000000 0000000000000000FFFF95000000080000800800840800900800842AC000000190020020020820028020001030000000000000106040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF56610008000AA0000AA0AA0AA0CA00804409008000002A82A82A80002A80402A82A8220A882882800000201A008800 00002A00002A8080000050250220208AA82A8000000000000000000000FF3495000000000800A00A00A00A00B22A20A08A00 8000003002802002802502003000802042842800C12802812020802802010802800802A3288088A892882003002000000000 000000000000FF418C00000020100020120120024020129424424B00000048040040040040548050008900048048000C0508 A04C00000000800004800A28880A48820804845004004000000000000000000000FFBBE3000000141841805881801801885000906040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040288000000 000000000080000500100120140800000000000000000000000000FF58B80000000AA0000A00AA2AA0880AA0020800AA0001 2A82A82A80002A8AA82A82A80212A82A82002202202A82A80000002A00002A82282A80203502A82A8AA8AA80000000000000 00000000FFB2450000001540003543543543103202102441540001550D50550000550510550D50CD1510550880B10910A100 40800800550800D50C50AB0800C00C10C08550D50000000000000000000000FF0D0800080000040040040000042440052041 400000008000010000000008000000013000000010831011090010010010000090010010010014130010010000000000000000506040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C20100000048 048040008040040008048AC044844C82908890800800800800000804805228800892D2880480400400400000000000000000 0000FFC253000000000000000A00800800800904900800800000200200200000200200000220280200200000200200200000 2002108002002002002240002002002800800000000000000000000000FFB34E0000000AA0000140AA0AA0880AA0300404AA 0000AA92A82A80012A8AA82A92A80102892880002302202A82A80020022200002A81802A81000002A82A82A82A8000000000 000000000000FF9D3F00080000000000000000000200A100080400000000000100000100080000000000004100020002022000d06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF7EA04008004400004A040240005840042044240000010010210012210810012010810054412C10291E9101280000000001 001091101089091041001001001005004000000000000000000000FFECDE400000400020450C00D08804C42D40C02C048001 0030930034411030034010830030135034530134030824C048200300140300B0931032030030030030030020000000000000 00000000FF90CE00000008000008180380580188180900180108002AC0240840100061260882260860040140002060062060 00006206008126206226206100006106006006006000000000000000000000FF917A0000000002002AA0002002442002114400306040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100160160000 06006004000000544004004016116000000000000000000000FF11A70008000000000000040220A192014802001004A00901 104000205000000800200003062860000000000803404000A808000000020002804820808840001001000000000000000000 0000FF1E9B00000000000000800100102580001002000008002B001008000000004011004008000604E20040408000050030 040000805009040020C240000000000000000000000000000000000000FF817F0000001A002000080088A8008B6884800806 90000024C20020080020C000020200023C0040000422124020311130020002022020220024801024C010014200200000000000b06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000600600 600000600600000640400604608049000022000010604600000600600E02C450284024050006006000000000000000000000 FF40B10000000000000018010010018838008800A5094008620600602800E00600000600400600640000000C004001047506 10000600640604040800C00C284126406000000000000000000000FF159A00080010000006182104D0438019408C00A00000 27000048000840E18400008600402010022004208450614052624660000600601C0140400245440046062860000000000000 00000000FF4FEB00000000000000182300988382981480000802002000A81000001060241001260062D0400040002104006400706040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFAD 5D40000000004000100180000180800080182280000000000040000060060000070050070463018080032480002062260000 060064460260D0006346007007006000000000000000000000FF06860000000880AA0AB8AA8460B581800418108080002002 A82A82A82AE2AC2A8006984A88AC8400030906C4C00022E00E0002AE0062A40C40D0106204200AAEAAE00000000000000000 0000FFA9EB20000004000000180082000188000002B81080000C8000000000006004000006034040000A000002D608400000 628600000600600440680005608C084006006000000000000000000000FF1F7100000000400000100110900D8258AC80004500f06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60260002AE00 6BA41870002AE0262A82AE2AE000000000000000000000FFBA9800080000000000100101184188003084C010000008000000 000000600400000643400600688024040A10A000CD629700000600608508410000401608E006006000000000000000000000 FF04990000001540921559551559558C415495410800005505505505505565545500065545565160045415560060000C6116 000556006014410400554016556556556000000000000000000000FFC51C0000000AA0AA0AB0AB8801018221008018A28000 2302A82AC2A82AE2AE2A80060052AF28E0000800220000000068260002AE00744E20C20022E3262232AF2AE000000000000000086040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00E136126000 00621600000610400600600213000202200015601600000600604E0840020C4014052006006000000000000000000000FF84 CC000000000002001000001801009800000801000000600600600000600400000600404600680611000202200114E0160000 0600600E028002004314002006006000000000000000000000FF22790000000000900010000018018C400180102980000060 06002000006006000006004806846080000002312000406B06800006006004C0452800600600080680600000000000000000 0000FFD9F90000000AA0200AB8AA0AB8AB8000AA8AB08380002AE2AE2AA2A82AE2AE2A80062AC28E28F2042202AE1060000100886040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF512480 0000000001001805825801825801813801800008600611400000600600000600000600600200000041000600600600000600 6006042008004006046006006000000000000000000000FF248B0000000000000010880018AB8C98C5801883800028620620 E0002AE0860002AE00428E28E0002002222820000060060002AE2AE30600C0102062262822AE2AE000000000000000000000 FFB1A200000000000012100400D801005800009841800004600600600000602400000645402602600400008A00A000406346 000006006086446028016086002006006000000000000000000000FF8CA100000000000000B0200C18018418558C2809000000486040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0002AE2AE2AE 00A0082AC2AE0062AE2AE000000000000000000000FFFC7100080000000112900180980000000100900100000A200E014000 0065260000063020060060040820080C200600620E00000600600E010026088144104006006000000000000000000000FFA1 7D0000000000010AB0A98898AB8888238A1083000022E20E2060002AE2AE0002AE2A82AE2AE0002AA22808200632E0A60002 AE2AE2AE2920202AC2AC28C2AE2AE000000000000000000000FF6B4D000000000001005955943954115091945953800040E5 465400005560140005560525565560044284C24100064B614600055655644652000044641644E5565560000000000000000000c86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070050000060 040800860960860064C5003406000006006006201306C2502E20044400028E04E007006000000000000000000000FF00CE00 0800000001401809821801A44845020022000015500F12600000600500080600602602600000210751080605601600000600 70068800400040060AE006006000000000000000000000FF8E30000000000001801A43C05800000911811811800000204600 0000806004000006006006006004000456020006506146000006006006440000006006406807006000000000000000000000 FF73DC0000000000010AB8818898AB8899118838D180002023C624C0002AE2AE0002AE2AE28E28E0002A810604000600661600286040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF8DBD800000 120001B01A3180D802000001A288408A004942A680684000E50608048F0064403482200C7306002406006406000896206907 022440104004024406006000000000000000000000FFE7678000000004030C3049815E50048C8D0108A0904000C116000281 02F88780000724224622600010C026102206006206000046106007142110006046007A06006000000000000000000000FF0B B2800800440001423C81C0180DAA888380089884214048468042C1026406800C162080161160000441070008060060062000 370B7706A9A008104026007007006000000000000000000000FFCDFC000000300001C01C81801800080821C200040000881200a86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060044260900 88004484544006006100000000000000000000FFC19F00000000000180182180380200C82900908100800060060060400062 8408010E0060060460021060262060C640616E00800600622600A2020802942241160D6000000000000000000000FF8EB300 00080000050018018A98E98828D300102D02200062360040080060042082061C61B602610201404610422E02600600040601 4056002102004514094086006080000000000000000000FF63AA800000000401801089801801840401800804800008080600 412100600600010602620810002088648604200628628600000611600610210843604C00445743600000000000000000000000686040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 000030402602608080612C0044485001400000004080002040400040800C8000000000000000000000000000FFB29A800000 00000800000000000982C04C02000800001000000D00000002D00000000300060062003100001081000500100000000A0000 0283004A0030000000000000000000000000000000FF4A050000000000018018098B18218A080500000A0400080226004090 00600441040608602000002080600604640414620E00000608C0060004004A8024004226306000000000000000000000FFF0 BD00000800000180192180390A0108D18101200140004006000000006304080016026308080000006526404116006006008000e86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9D0000000001 128028AA8AA82292280888088080002222AA4220002AA08A0002AA00A2AA2AA10000250204A2A230A0A20002AA0A22AA00A2 A02023223022AAAAA000000000000000000000FF2BC010800000000000040020000008000005202800000000004880010000 00000800020000004281000100080000100208000800800001000500088000000000000000000000000000000000FF3D5800 00000000608A08AA8AA8328808848928A2800020A2AA3120002AA4000002AA04228C2880001222022220120026120002AA40 22AE08600011A2002002AE2AE000000000000000000000FFC00400000000010400C00000008180000101000000000440000000186040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080002100 0000000000000000000000000000000000FFB5908800000000AA8AA8AACAA822810CAA88088880018122ABA020002AA2AA00 12AA30228A28A0002ABA23A222AA002202001AAA2AA2AA2AA20104A2AA2AA2AA2AA000000000000000000000FFE0E2800800 0000000D0401401080011140043035000008C004000001004024001004480004004203450050500000040000000805008004 B24002020014055004804000000000000000000000FFA9F0800000000155955D559559558231559011030000345556046001 55655600055741655455400154E44E456556436146000556557557554020406556557D57556000000000000000000000FFF700986040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000080 8000800000000800000000008000000000000000001000008002400000280A0000000000000000000000FFB23E0000000000 0000000004000040011000420000000010008002000000000000000000000000000000010000004000000001000000008010 000C8040400400400000000000000000000000FFA9DC00800000000000020040008008840002402400003410000D00000000 000010010300200200010000001080000500100000000008000001004A0000000800800000000000000000000000FFD4E400 000000000000000000001004400000800000000080000000008000000000001000000003000001080000005001400000000000586040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (015011004194 18B194580184194594590D8C4010648651420651010600608001601400480109600600654000605000000640600749600000 C22610400E086150000000000000000000FF9265028000000001611001008004000611030041080008C0052440000C800420 400800010C084020000018C0C00010000000002014000000428010C005004040040000000000000000000000FFC0F60500D0 1104208C0950B42804840944CC488482400823022B280233008200200080A00A00200101200A2024C08820500000024A2002 412001002002902002002128000000000000000000FFF5B1000000000200008000000000000010010228100000180000080000d86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800800000 004004004000000000000000000000FF4DCC000000000001800800800A00A00B000028110000002802002802000002002000 00200400000010200200000008200000000200200200210000400020E002002000000000000000000000FFF5710280000000 0000100005020008020824004010404000000008204880004000080000000850200000100140000000000008000400000000 00008000000000000000000000000000000000FFE7AF000000000400800800A00800880800A0082800203120624026222000 0200200100201200200108200280200048200000014202201A00240104204200A402402000000000000000000000FF38E20500386040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (168161002040 804000001468B550640100401000000601620540F029520104002C04504000000000000000000000FF3FEB02000000000180 18018010018010C1005028000004600602000000002600620000620800000000E00400608808600000000000400400600200 0044120000000000000000000000000000FF46BF000000000000000000000001800000000000000000000000000000000000 0000000006006000000000000000000000000000000000000000000000000000000000000000000000000000FF0C28000000 000400000000001001801000401000000000000000000000000000000080000600600080000100000000000000080000000000b86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000481C01801 855005881101445030020004600600000400140600E40000610020000012604E08640000200000000000640400E248106484 023406006080000000000000000000FFE3BD00000000002B8898C5801881813C4BC0904110400D68060AE04204102E806400 082A0E42640040E35000608080490000000610C006A06800300004082114284000000000000000000000FF196B0000000000 11811901801A00005831810201042000E00E8068060000060060803068060460000064842068080868080000040040060064 00038424000000000100000000000000000000FFE7A6000000000543C81801C4D8842818030210000040117016108006000400786040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08D060060000 00000000000000000000000000FFD1CA080000000401C01845807889803C4B421041904104604E1002C60083060860080022 8602640040411200602000010000010602E00601E848016016903004784000000000000000000000FFAC7300000000000180 1801EA1008001013040401800010E09600050E0080060060100020265060020050428060002A200000000408600E08700080 620700208F006000000000000000000000FFE66E000000000001C01881B4120000160140020080010861260C001400008600 60000070411080000068060060004C2000000082006054106140A0E40C083004004000000000000000000000FF9AE202000000f86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600050200E08 6000256002014280004000000487806024006C08006006442104004000000000000000000000FFDAD50000000000E3843801 831020121031811020000086680680600400012618600008700600640002E0D6A4C010064620440206166014047041806026 200206006000000000000000000000FF9D1D000000000105801803881043E011250010420000006007001006000006006000 012806806004086B03405820004020000006006004006004106046000404804000000000000000000000FF96050800000002 0180188180190020D801001400000000600602000402040610620000648602E004006006804820004000000000054024006100046040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (09841A8590B8 A0621805911115008129780780680C0C018E00600000208602E024104462064040224A0048030400F0968260C10060860023 0F006000000000000000000000FF0541000008000001801809801E01811955814431100000E0860070040400060570080038 2730600484400A005A1180613000005620640711641048E004010104084000000000000000000000FF3F3A00000000000180 180180980448BD11C050010000006006026804000006006800A1200F10720020400A004488006000020004086846846A0810 6004020001000000000000000000000000FF17B4000000040001E03801821801835A01883488000000E0060260060200460000846040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400400400480 6000000000000000000000FFF28700000000000180000B801800209A01800001010041602620600E00600800E80620614612 680400405200200642211600005600400684C0A8206106006406006000000000000000000000FF416D000000010009800501 D2D921821B4DC12651100004710E01700602600004680E004406A06824024800040416002046100007016D0610700400E006 48E09688E000000000000000000000FF99DD000010000001801803CA1807801801E01001000012602E26E604100106006000 A0220601680081C00280400000440000040740600600642410600628200400C000000000000000000000FFFBF5000000048000446040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A42262160A0 0B611254E04623289604011602684E046100006006006006006000000000000000000000FF97E00000000000098040838050 01800029800003130004E00640604604E00001621640E00E08640C00420000620600202648800608E00620600048E1060060 06006000000000000000000000FF849100000000000180000180180000180100000100000060060060060060000060060060 06006000004002000006002006000006004006004000004004004004006000000000000000000000FF4F3C00000000000180 000180180180180100000100000060068060060060000060060070068060040048000000060030060000060068060060008000c46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2001A0180198 200080A2E29A8002F0880AE0A86AE6B946E28EAEE2262BE7A80AC2880BE226A2A2BE2A900E0AE0A6027180A0608605614600 6000000000000000000000FF746D000000000221800001F010002041441120900440556500C56D1008600008E0A6C1755740 600C00604AC06106C0092600100420015420100100400600400C006020000000000000000000FFEF62000000080001800003 983049808024090008002008606000650000700000602680600604600600480080600680040600000600610680664600C006 004004006000000000000000000000FFCDDB000000100201C80031841208294301B040B1004048688E95701650654952614600246040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004004006000 000000000000000000FF45B80000000000119001518410418003148002000001406801406400006000506006027011000000 80600240600680002E000106A00816E05040906004026006006000000000000000000000FF74DC600000000001800001B014 00400022D000A882004171000060000862000AE0868055280002880060400060860028060000070030070070000060040060 2E006000000000000000000000FF283500000000004180000180180008430080C00090400A620024E31020680820604640E8 0640E00000480A40E00640110600000600494E00408080600600E086006040000000000000000000FF3FA7000000000001C000a46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108000006020 0624E26600042600008440000410002000043404400400E000000000000000000000FF6C240000000004A18221158352222D 5C08050230000094E0008C6C31006020006086806000020808A22A068AE846820CAE000A06A26886C0E8B085080488CC240A E000000000000000000000FF86AA000000000001800001801E00201903604101000020623621600600620828600E4A650750 608011200A206286480006000114014205080200100424424084406000000000000000000000FFBA85000000000001800001 801801801A01000001000080600680600600600000600600600680600080000000600600200600180400600400200000000400646040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800002810940 800040000010280206244200200000200600200000401002600A01210200220200060210200200200044600020A023006000 000000000000000000FFD86600000000000000000000600582641802200000010810006003000008010000800700060260C0 0004040A40802A4000000100008280088600000200520080240000000000000000000000FF075F0000000000000002C26400 4194008400C08000012001311910080000418010081000862865090080004000000400000000180400100401501000000000 00810000000000000000000000FFA640000800000121800009839021889800000008000000E800006020406200086806284C00e46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2082C0000000 00000000000000FF1B95000000000001A0004185380590580B102051800000600C24E0140060000060061068849045000042 06A4604600400600028E2C601604620010C406006016036000000000000000000000FFB197000000000500800680900C20C2 8CA08105040000082282082343402020C0200305340B00304830302301308324350A0010030030033030C92230334A344200 2000000000000000000000FFE1110000000002014203003002002000023103350000020608808810000028600000800B0490 0800980A41000000C04198000800A20800E008888B8840880E508A0000000000000000000000FFC23800000000008080200000146040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (101100100000 1001011000001009001001001049001001000041000000000000000000000000FF8ED00008000000AA2AA0AA10002A080088 0AA00400002A8AA82000880002A82A8000420288A880603082202A00002200000000800402002A8060220200000A00A00000 000000000000000000FF40D8000000000400800200A84A00A04C00C002808000802003032842002001002002802042042A00 882892812802882802000C12C02842802800802892812112102000000000000000000000FF2E880000000004010000012312 802302232002530000804805104A04004800004004A900040048008448000000008140000008408C8888800C0888C824D20800946040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100040020001 0000010008000281000008000000000310400002030300080000004000000000804000880002001000A02212012100000000 00000000000000FF3E970000000000AA4AA0AA0AA0A20AA0AA03208A00002A8AA8220020000AA82A80000102A82A80002A80 C02A80002A00000002802A82A82A81002A82A82A90880B0000000000000000000000FFF3C60000000003545543542502442D 03483542280000550550D00A28000550D50000880510D50800400D40D50800928800000C50910C40D50810C50C1089013014 0000000000000000000000FF220800080000000000000040041040040050040000000000011015080008010000015418010000546040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000000 0000000000FF59960000000000010012002012802012012212440000804005044800000005004000C0084484480080480000 0800908800000A0480480080082088880080002482C000000000000000000000FFD496000000000000A00800800808800800 892810800000280200A15200000200200014A00200220800210200200200200200012A002002002008002002002912102000 000000000000000000FFB7780008000000AA0AA4AA0AA0220AA0AA0000C000012A82A8290200000AA82A8000000288288400 2A86382A80022200020000402A82A82A80802202A82A8600600000000000000000000000FF9C63000000000000000000004100d46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002002203222 003022200122022022002400002002012012002100400400000000000000FF0C0800000000040042040058418050A4005014 02000102904100108100128122120000128524500100C0010080010000000010010D02112812B91610090010050040000000 00000000000000FF7326400000000420C20C10C00810C2CC20C00C14800112B5134035230011030430402030D350300104A0 03212093002022501103482103103021003013003003002000000000000000000000FFDE1600000000800180180380900180 1109029081810000600415400622020628630008620600E0A02040960062262262060202460062462463002062060060260000346040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (485000100190 A000600001008000000E00608800200400444000204614608613222E00000620E00C1044C820002003012600600000000000 0000000000FF994600080000000004400008000180808400000C010012040000002021041000009000001620644000022002 05400402004480000100480080B0480448040040010010000000000000000000FFA867400000000040000009002011840048 05011100800005202C84204400001000C010002610E14042010C000088444400140500210108020000504404004040000000 000000000000000000FF8263000000008011801802808840980880880000840008214A00200204000240200020254802001000b46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFD0FC00000000000180180180091184283300110100000061160061040000060060000D200604600000224E24E006 30802600024644613400444005402401402E006000000000000000000000FF59D00000000000018018018208820208050250 A9020020E0AE0860442000A620600002208220201000200600700600110621008602600400C00009601000000E0060802002 00000000000000FFD3E10000000000018C18019208C20329280238A5082034E4080880800504A60060000264500180000024 0608644608A0AE04000622604608600000C404184086076070000000000000000000FF92240008000000098858010008019000746040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0648E0060212 2600030652E106546420B2C225204AAEAAE000000000000000000000FF0097000000000001A01801000800002842C0103200 0000603000000000000600600000600202200008E0A680600600002600000642E00600600000600000600600600000000000 0000000000FFD1620000000000AB8018AB0A402208809080115800002AE2002A82022A80062AE2A8216A88AC800086E14604 619E81010E000016006456016008204314214A06AAE000000000000000000000FF41D5000000000401801801012001800000 A01224000000604000004A00000600600000604400484048408610622604048600008E0962062D680010008E0A610600600000f46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80188380002A E2062AE2062A80062AE2A82AE28A28B0182262062240472A88260002AE0062AE0070002202AE2AE2AE2AE000000000000000 000000FFACD6000800000201C01801040901824804000C03800000600800001000000600600040700600604010E016006C46 50000E0000260060060060080040040C4006006000000000000000000000FF0CFC000000000155C019559549441109100005 018000556500550556550006556550557552D12004C4640F55651655050E000556106554534130550550550D56D560000000 00000000000000FF732F0000000000AB8018AB89082B8888C080100000002AE2C02A83402A80062AF2A81262AEA8F002A062000c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF47B400000000000180188385588990984B00812180000060B61360220000060060000AE0060064403260062D65460002 CE000006006126106208004484404006006000000000000000000000FF0A2000000000040180180180000004004100022180 0000603600612E00000600680000604202280000E04E00F55600049600000600E00600E15090600680000600600000000000 0000000000FF5FC6000000000001801801801909801815801011800000610600600400000600600000680680600088608610 6006000006000006526006526000014004004806806000000000000000000000FF7BFE0000000004ABA018AB0AA8320CA881008c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (051652205600 055655640645642008E406412556556000000000000000000000FF03E1000000000000001801805801845805900801000000 600614602400000600600001000400400000600600002600000600000600600400645011600E082006006000000000000000 000000FF68590008000000AB8AB92188183380188182500180002AE2062062C80002AE2AE00000428E28E0000062AE006046 2000060002AE2AE00600612020403C1242AE2AE000000000000000000000FF11DC0000000000018018118000000240018848 0D800000600600600600000600600020602202210400E00600601612800600000600640E4560800AE0060960060060000000004c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8900002AE25C 22C0860002AE2AE0001E028C28C0102262AE2A80062A85060002AE2AE2AC2AE00064606E0622AE2AE0000000000000000000 00FFD1FF000000000000001805881080041801800829000000608E0161160000060060000A800000000008E00642000600A2 8600000600612E106010226124022006004000000000000000000000FFB6880000000000AA0AB8AB8218A38098C180A8AB00 002AE2862163160002AE2AE0002002AC2AC2802AE2AE2A828E2A802E0002AE2AE2AC2AE08000630420A2AE2AC00000000000 0000000000FF16970010000001541558318538441159538B090500005564465462060005565560002005505505444265561100cc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 7785000000000480001809A0180804400000380000010264A124040610008700602020208408C0040060052002A700200E00 0086206000044300084006000006004000000000000000000000FFE42B00080000040040180180908180202000D840000000 604008022C00080700600040000404440000600600054600028E0000060060048064B4004486401007004000000000000000 000000FFA697000000000000001C019458005500082C18050000806904004006000006006000012044004108116004000016 0020460000060060000060000AE007092006006000000000000000000000FF1C6C0000000000AA0AB8AB91183B9000920418002c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00E406028106 006208456408014034010316006148110000000000000000FFC27680000000000000180188182200000000180080400164C0 4C040600009600E40000201400405010E28C0000870040060000160961444B60504145044020070060000000000000000000 00FFE37A800000084000001E0188100408008000980880201160020020050000060078000002040040280070860000060060 0608000E016026106050014286200007006000000000000000000000FF3087800000082480401C09C01849C220E020980080 01086802102004090816856418000214044000116416040026004006000006106104C160024040068028070060000000000000ac6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400060A05002 8440043640E20000E02C00400000420424010E05611650800608604410E008000204520216434220000000000000000000FF 073B0008200000000218018010081A595981180900800066A606621E20020610E0000060244044000060041000664260062C 00060064060841000820040A00062A4010000000000000000000FF66E1000000000020001801821083903803805811000004 E00600E0220100860460C040418415408800608664040620409E1001064860A400458010220420200600C200000000000000 000000FF30C800000000020000180D8098418000A00358240A41086011300087000036B0620000A01440C200006A048C0096006c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFF484 0000000000000000000010018000000840920000000000100040000000000000004004004000534006000010526040000000 00000C240202000000204000000000000000000000000000FF18108000000000000000000CA09184000204800000000000B0 0302800000000000002C80060064A00004880005408082880000000002801000280900301300001280000000000000000000 00FF473A00000000000000181182104B80180380102200001160100080200000860061000061040140900071040000070064 0600008600610844420210804C008086104080088000000000000000FFCC050000400000200218058099000218018438081500ec6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (56000556D564 06556048444556555556556000000000000000000000FF080F0000000004000AA8AA88893288C8888349480000AAA22A32A1 220002AA2AA0004AA2AA2AA4A000220200028A48202A0012AA2AA31213204B28220A02A2AA292000000000000000000000FF 5FA102000000000020000000000000000002000800000000000200A800000100000000000000040000080000000080828000 0000000110000200011001000800800000000000000000000000FF3C210000000000000AB8AA80482288A8AC90082100002A A20220200A0002AA2AA0000022AA2AA0021031220000020125020002AA2AA02200A0002263C04062AE242000000000000000001c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (011000001000 0001000000880000200000000000000010000040000001000008000240008001000000000000000000000000000000FFF52A 9000000000004AACAA8AA82A8C888888888080002AA26223A4220002AA2AA0003220AA4AA0002AB2AA0000422A20020012AB 2AB0622AA0023A22AB2AA2AA2AA000000000000000000000FF83A80000000004004014010400000200400004050000804104 00441000100500400000000000000043084800002104000000100500402040040104D0051050050000000000000000000000 00FFCFB3000000000000155B55D558CD915935913B43800155650C484006001D575560014565561561095565560005175460009c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF55530000 0000000000000000000000000008008400000000080001000000000000000000000000000108000000000000000008204000 00000000000008000800088000000000000000000000FFBB050000000000000001000000000000080220000000800C109180 00000020040000001200000000000400040040000840000000000400500010420400C00020400000000000000000000000FF 4052120000000000200000000000044044000024000000000008030000100000000000820000048900080000054081028800 0800000A80000008000000000800000000000000000000000000FF11F0000000000000000400200100000000024010000080005c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006208200216 2820D82D82402182402000000000000000000000FF99CC004010105800145A01001041C01003C0110B800091601600611600 042600600602120604600028E00600600600700600002620602680600005601600682608E000000000000000000000FF974F 0020800010220000010010002010101650A90001025001014000400104004004000041410040000804084000080084000800 004001000080800801000000000000000000000000000000FFCDB20020101028002A2800800820800804A00810800008A002 00280A200482002002040822C2A02028200200200200200200000200204280280000A002002802002000000000000000000000dc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800004800000 000000000804000000004800000000000000000000000001001000804004005000004000000000000000000000FF5C930000 00000000000900800800800800800800A0004420021428020008020220020000028020000822020220020020220000020020 02402128002002002002002000000000000000000000FF1FA20020800000220000100040440400000400C820010000008008 00800800000000000000000000000000500000000100000000100200000800800000000000000000000000000000000000FF 570E000000000800200808802C3A820800C00800800020341203280200006200200200000300200009B00220205A10200200003c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (174300000030 1000001800C00900000801924051800002684600600600000680600E01000690400094612644600700610E00080600E02600 648A92C104C05404004000000000000000000000FFDAE6000000001000001000800801800821000101800801610E00601400 0006006006100016004000006206006006006006000004006088400002000000030014010000000000000000000000FF4299 0000000000000000000000018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF4079000000000000000200000201800001200000000000080000bc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02600A007410 404504024804004000000000000000000000FF654E00000010180000080040010180020108092180000360B6006006000006 00600E0800061060001424C6026006006096000006006110000088108000040004020000000000000000000000FF06460000 0010110014184085084984083995111580001164060061D600040680602600800E02610000011630600400481610080400E1 26206240804084B0C20E004000000000000000000000FF0A46000000001000001800800A10000811A2300980080060060061 0E00000600604600000604600000200600600601E80600000400600400400002600600606604E000000000000000000000FF007c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060C00160060 46000006006004006006106246106006200005C06000080224000000000004800000000000000000000000FFA75300000010 18001418C0840A09882A01D129758100B2608480690600054E6063260008060261400001160062244E418720000621E10608 618048440C00C807004000000000000000000000FF9641000000001900000880E10848420953402801800145610604E05401 000600640F8003060A600000000602E00400601610000602600C0008101070960B7006006000000000000000000000FFE6F6 0000002018000018000022800000A500080180800060170370060A814600609600148490602000200702E006A0400700000600fc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001800 001801801801801809C81E01800010680681600E00000600600640000E00622104602600600408C006001046006006026220 004004004004044020000000000000000000FFF1A20000004018000A1200A00800200805081851800088641602E006000006 60600600002600A19C13618660600640400E0001060060870261181005E0500004020000000000000000000000FFF6770000 00101800141880804803A00801450001800002F00604600400000E00600600004600E00120600688620400609620000E0465 0E20600002C80C004004004000000000000000000000FF78A0000000001800001000804B00104801820001800000620E006000026040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060069800048 0400C006004000000000000000000000FF650B0000000018000A1520000228689015819801800009E88A0070860000160060 060000268060040070661074049B418600001EA06014604045146416506006006040000000000000000000FFE76D10000000 1900000905C21903800A35C051058841006026B0E00E04804600F50604020C2B621100608E11644400580601100602600788 6A40A94004084006204000000000000000000000FF48C00000001018000000000022040000018210318000046C1600700E00 000600680620000C0062243170060068042040062000C6026204004480016806006006006000000000000000000000FF460600826040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600680600 0002000800800806006004806000000006006006806000804804004804006000000000000000000000FF88BA080000001080 040A81801902201A00801801800000604600411600004600620600084280020400002610604408608000000D024804506044 016006006006206000000000000000000000FFD5F8000000001800100A45841829889A4584590588208AE106504007048106 016816040A0A44880800088E016404006001008006406806006200D04804094804006000000000000000000000FFD7DA0000 00001800001801801A01801A11C31C01800002601207600500008600610E000006106001006006006004044007000006006000426040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00001808000C 09A20828200212D40A098000006816A060362001060265264201068820840110464A6006007110008126015006A060000000 00016000006000000000000000000000FFC05300000000180400084180580180000180480582001060060060860300062060 16010012050400000016006104006400020416406416026140004104004004006000000000000000000000FF9D7500000000 1000000801000000001800001801800000600600600600000600600600000200000400000600600400600000000400600400 6000006006000006006000000000000000000000FF1E16000000401800000801800401801801401C0180010068060060060000c26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (604100600601 6006006000000000000000000000FF6E13400000001820000801C0080181040E82109182000060812520E826050E7662AE2A 004A4802800090262CE2840172C800812602EBEF027001004084014044006000000000000000000000FFEDA1000000001000 001801800A00240000A143459540556CD000651040005700E306000516802434002355086536026100000228200A1000502D 00000008000800E000000000000000000000FF4ABE200000001040041829000A018000008981038000096560016600008076 006006100E0200000000278C01645C006000000A06046146006000004004004004006000000000000000000000FF0257000000226040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006000002 004000000803806804006000001006006006004000004004004004006000000000000000000000FFFD2F0000000010140408 01844051800000004033800001641401A00000010600600601092685200000220604684602E0000403B8600AA04069490000 00096008006000000000000000000000FF37D8000000001800000A01800800600000A00001E800007224003C5022020622E0 060010070024080000060A640600602000100600600200700000400400502400E000000000000000000000FF3F8C00000000 1000000A01000000028004013109854154E0900220800000D6886306000D0A2000400021568060B400608000000100000C0000a26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180003580510 8821901890804081800000685000688000000622624600012440600014600220640600600000043000028024440024002832 0000026000000000000000000000FF20F70400002098002C0B2DA48A2C221B308C2281800080600080625021142700744600 0AA48D68008D280AC8E826B16000080CB6806B16A36A28A14804A04924006000000000000000000000FF8E9F000000003800 00980120080000980281184380008B6A1223608600009622600620801640600040282200650E026020001004824024004080 0C602E0C0A0E0D6000000000000000000000FF8302000000001800000A01200801801800A01801800000600200600600000600626040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (900C50810810 804000000000000000000000FFD88A020000008800080808800800800802800000800000260200200200840200200200000A 05200040A40300204208210000004A04214A00A008022002002002002000000000000000000000FF2FFB0400000000000010 0300000384010400A42200010A00000600001008600008000482403840002300081883A00210000800000200100302300840 0400402C008000000000000000000000FF22EA0000000000000001B006404182800866040000010110003112280102000004 00200000020000080020000000040020000000000000000100008000480380980000000000000000000000FFFE520000000000e26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04000A008109 00D0C000804950880800000C40800CA0A00A0080094890891084C000000000000000000000FFEECC04000000180000190388 10018A188D001801800000E0A408E48401004600640602000642E000024A060860C600600000040600608E40600010600600 6016006000000000000000000000FFF9ED00000050080040AC08C22C24C00C208CC820800028220B422002101C0340382200 10A310300150B0020034030C210000115302322303348904342B313083082000000000000000000000FF8646000000302000 20820020020C2002603900400000508908C08D00200088C00020000880808800805001000808B08000000B80800C20C0088000126040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000404400500 4A00002000000001000130001000000801000000001001009001001000001001000000001001001051351101111001109001 010000000000000000000000FF131F00080008C0000840C00080AA0200480800AA00002A84202A80200002A82A82A80000B8 200202400AA82A80000002A80000002A80000000A0200200010200680000000000000000000000FF3D6E000000000800204A 10A02A00B00A20810A008001002D02803082800003002002800802922800822002802A02A4A80080088A8028129528008D28 02C42842800000000000000000000000FF1F1F0000004420002482242C1200214305445201000080480D000A14000005004000926040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400002A8B800 00000000000000000000FF78960008000000000000840B409002C49021040000000000408000880008000000000004800002 820A00010000880090000004800000A0148142400220000040080000000000000000000000FF2F840000000AA0000820A010 202A00A0AA2800AA00002A8200AA82A80002A82A82A80002A80A00002082A82A82A82A82A80002A82A848000000042008822 02A8420000000000000000000000FFAF790000001500002C82102002443000021441540000D50890550A20800550D5055080 0820D30800811550550A40B40550800848D50C08C00C008C8910CC0D08848000000000000000000000FFD84300080000000000526040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00641600000 6006046026206406206006016006086000004006026086006000000000000000000000FFD9870000000000000842C0208210 3100010512010001004140805004004005004000000800880900928804804800800004004800800810820890804948908804 048000000000000000000000FFC3370000000000000288089448808048008048008000002802002002000802002000002002 04200000200200200200200200200200250208A2000D2002442002002000000000000000000000FF23510000000AA0000500 120500220200AA2D44AA00002A92082A82A80012A82A82A80002A86087003402A92A82A82AA2A80002A82A8020200410200600d26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (208008048208 040A0000800000200220A02218601240248028240220A00001A00209A60340200200200240200200200000A0520020420020 10000000040000000000FF22354008004000000824004200004804004004A400010216A10010010010090010004006A00210 51001181110000001081201061448080001681014080111001000000000000000000000000FF9474400000420010002C00C0 0840D00C20C84D0080015030234132431030131030001020C20C300101300320240200308310340300249200B14100208200 3003002000000000000000000000FF9F760000000820000C1821845801821881821841804002C0860040060040060064A00200326040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400620418004 0000000000000000FFA145000000040000001001009001881800001003802010008E40002600010E00630000620400600202 610600610640E206006004416102046222000004004006084000000000000000000000FF2446000800000000000100010011 8B00B000011200C04281100005500105000281000000002104300C04002A0000000008000000000400008228208280120280 080000040000000000000000FF4657000000040008021001003021800120002004002029000000020000400010024004C004 1040280000004400444002000802002204100900200000000A8100000000000000000000000000FFF1C70000000C2000000800b26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (116800036046 0063120860060060360C6112036800056004504046004000000000000000000000FF27D40000000C20000010858499118019 25801801800000615604E15600000600600000405640648028401600604025600600610441444450430008012E02E0960060 00000000000000000000FF31490000000000000010098238A800B94180380180002460060064060000063060400060060262 0050E02634E20300601600600400620A0160004003260262A6406008000000020000000000FFC15900080000000000110982 38A404381400317181000900063E01161104060D60200060064360502064A600608600E20600600600E0EE0260100100141000726040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D8AB8C803308 10AB80002A822628822E0002AE2AE2A800028E28A4008142462AE0A8C0E0060064860841242044004C60162060CF2AE00000 0000000000000000FFB8A74000000000000A08010A3000042003003001800000000600800600000600600000020608648004 60860060000A6006006B0648C080004001446236086047806000000000000000000000FF9F2F0000000000000AB821041022 08C1080E10AB80002A83062003060002AE2AE2A8002244066100D042962AE002006006006216406416106120A06644104206 2AC000000000000000000000FF820020000000800000180908300182200000B001800000000610000600000600600000210600f26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000000000 000000000000FFBF290000000AA0000810AB0910320880408818AB80002AE3062262060042AE2AE2A800207C2A7004084226 2AE2AE0060060060860AE4A22AF000206304054206AAC000000000000000000000FFCDC40008000100000000551010018000 0000B001800000000C0400070040060060000000060068000461060064060C600600604603400405402001408402C4060040 00000000000000000000FFA4F3000000154000014155801944110090131155800055044E4C04CE0005565565500020864560 04C8E45655655621600600703402603255650810C004404316554000000000000000000000FFA15B0000000A40000AA90180000a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040040060060 1601600600608600C1081040200160C6006006006000000000000000000000FF73E800000000000004004590D81180582583 380180001360841260060000060060001482B60060000AC0060064C654600600602E4C424424C0100240160AE00604E00000 0000000000000000FF367C000000000000004001831888003821805801800000609600610E800006006000000006006C8400 408600600654E00600600600421400409008412E02E096006000000000000000000000FFDF98000000000000031001805801 8201148518018000006046116046004006006000000506016000C4C016006006806006006256404004004400056004504046008a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (111954151955 80004461064465565505565560001100005560040C455255648E21655055005640650650401040E44E4C655644E000000000 000000000000FF825680000000000000A001801909801800001801800000601610600600000600600008000008E000000000 006116406000000006006006006020006006006006006000000000000000000000FF661400000000000008A0819219238898 818818AB80002164202162AE2A82AE2AE0002400442AE0026042AE2AE0060062AE2AE6060040140040022863062162AE2860 00000000000000000000FF9CC9000000000000000011801880021811801801800000621000E0060000060060000000060060004a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF63F30000000000000C00AB8AA0238880840AB8AB80002463462062AE0002AE2AE0002202A80060002AC2AE2AE2 061462A82A82AE2AE4162AE0003262AE2AC2AE2AE000000000000000000000FFEFB200080000000000400185180004380000 5801800008603608600600000600600020029000600600C0020060260A60000000860AE02602E0220C400400600608600000 0000000000000000FF06030000000000000800AB8AB8238CB8B00AB8AB800030E20622E2AE2C82AE2AE0002282A82260002A C2A82AE24600E2A82A82AE2AE0A62AE00822C2AC2AE2AE2AE000000000000000000000FF32140000000000001500D380384C00ca6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (50015A621010 680000018C85645E54614150700F006113006000000000000000000000FFC7F8000000000082402481802004000080001449 82400C004080008620100000702000800B04600400482F046006006000000002406004000001815005805006806000000000 000000000000FF459F000800000000020001000111804254001001800111002015000628000000600000880242E002804006 006086547000000007006506006022005004004006006000000000000000000000FF4D4C00000000000000A0010000000200 00001C0180000261160070060310070070000800001060040040068060360160000000060060360040101160060040060060002a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080052218801 020100030006000810006200000002A0600008C3070965220060481401001060062003084865260442924460000000000000 00000000FF4AB58200000000804000010140000000C000102180204080201402060004010068080500000261000941060060 020860100000242064060520A128710700508B006000000000000000000000FF395582000000000000000100800004004004 1001800101000002020600021102600000044241608010408200620000600800005000600600C00800609620600300600000 0000000000000000FFF54D8008000000020020818000038202000015018001420001500806301009127010040B202060608100aa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFB2480000000001000800018018D401184000502195404401000004060000A010640000001611400000425622608600 6040120006006096016240004004024104006000000000000000000000FF98BF00000000000006000180188A1C7830001801 82202060061860060000B600600000000E40440001402E12604200E01000000600608C404000004004006004006000000000 000000000000FF66870000000000000800218A9821809880041919848010E20640630610000618606800011409C220004056 60601800600000000605E06450E030014004686004006000000000000000000000FF7EE58000000001000002010000018200006a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA00A142000 0002A02AA10A10200020220A2023222AE000000000000000000000FF0F150000000000000000810241018200000000000000 00800800000000000000000000042C0002804904240000040100000000100000201481200100001001100000000000000000 00000000FFBB4080000000000000004C00000180000002C00000001200201300000000B00000000001001000000001080005 205400000000000003002002081400A0028000000000000000000000000000FF1C9D0000000000000000210A980180190000 1009800000840004800600000000602800000600002008608600E20E00E0000000820960240001084842A450440C2260000000ea6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5955800044C5 044AD556000484D56000001446296000056C0E557C0621680000010755655611600055655655655655600000000000000000 0000FFCE9E00000000000000002888A8328CC8000A8CAA8000222222232AAA00122A2AA00080128322250004A0022AA33200 A00000022A2AA2122024C82A22A22C222A2AA000000000000000000000FFF33C000000000000400200220000040000000000 00001000480000010000080000000000080405002000808001500A0000800254000000000548000000000800000000000000 000000000000FFE84D0000000000000000008C882A88A8000800AA80003123923022AA0003022AA00000001222A000524102001a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF7F5D1000000000000000000200000200000000000000000140008800000000000000000888010282240020000800010000 00022880000020000A000000000000000000000000000000000000FF60048100000000000000AA88882288C8000AAEAA8000 2022022222AA00026B2AA000000322082002183A43AAA2020020000000022AA2AA4620022AA2AA2AA223AA80000000000000 00000000FFEA208008000000002004844001000000000032010000004004004805000805004000800840888000004C308050 00401001000084004020028000010010008800004000000000000000000000FF080B90000000000000055591594D91180015009a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020022020220 2200280A082000002802802002000000000000000000000000FF50EB00000000000000000000020008010820208004000000 0000020800000001000000000000002202080080000084080000000000000000004002084080000000000000000000000000 0000FF8F250100000002000000000000401423760884100100288000001010C008200001A100040000000000038088000080 1800000000800000001400208040040400000000000000000000000000FFF9BB010000000000000200004088004000000000 0000150008100000000081000000000000240000008108000148540000000100000000108540000000000088000000000000005a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800100300204 A00200206200216200200280200006011A0020020020028020A200308A0025D100A5C21C241A000000000000000000000000 FFF741140104000441801809021001A01523033C8D828001640600720500522600E024406204026002020006004006046206 80700600600E00704100C026006006000000000000000000000000FF170E0024000000010010014012001050111010000000 700018424994004004104104200004000040000510105800000000860845001000100828C442000000000000000000000000 00000000FF4B91140302000020800810C40800800800A40C12810000220A20208200240208200240220282200000080A002000da6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF61 1E00000000000000000000000180020020020100008008008000000000000000000040040040000008000000050000010000 00000800001000801000000004000000000000000000000000FFC5C5000000000000A10A00800800C8088882008C81000020 0200008A20200200200280220200300000000200200200280200200200211200200000A00200200200000000000000000000 0000FF8FBE004000000000200200000040004000200000000020001081100400000000000020000400080000080000400080 0000020140000000000000004800000000000000000000000000000000FFD3D501000000000080880080081885AC449B8882003a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00600610600 4006804042A18004004000000000000000000000000000FF2B15000000000001801804820C10000044000001884090410404 6D4C80804E10610010E04102E4C00008483240060C6A07006006426ACE50708810004400400C000000000000000000000000 FFCB09000000000001801800800821808080044001810000421410E00400000600600000600010600010008000401600E006 006206004006054400202004004000000000000000000000000000FF42990000000000000000000000018000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D04086086812 A42106006400006080A02000000006006002404A0E40408602682E00602802C086007004000000000000000000000000FFF2 64000000000001801804000011810922A0040188C0804C2E096AC200A0460A60800060200D22A000011612608A0064060065 0642632E1172D0884026006016000000000000000000000000FF71BB00000030001184180080080190304112B81180000844 D607654C01400E01603614600001404008006080600080404481400600410422410050000440410400000000000000000000 0000FF4AC1000000200001801C00820820005001211A61800060404600600400400604604608E002006002000000A061628A007a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF0E8B00 000000000188180080080A08400801000382400C600600435600A00780620000600090202422048E20A00620600620620600 4006004000104104004000000000000000000000000000FF60750000001000018C38208028A1A50840C61C01000083C45604 70020C20260A608010E0680802802202CEBAE06002441400430E0860440A6010814626806904800000000000000000000000 FF3A280000000000098038420346A0000800901D11800020688611600228392612E108036090A08280000007046000046044 01601612608C1470A0224047206007000000000000000000000000FFBDAE000000000001801A04828A0C432808808103822000fa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00508609602C 3072A044C02C004000000000000000000000000000FF2784000000000201801801801821801C01A00111800084408614C487 04600600782600620000000A03080608220611400408480610E02408680A004006006084000000000000000000000000FFC7 F2000000002001851810840830059959994049800002600E8042A600700600600610E05808200420000E0031060CC0060042 06006586046040814016006006000000000000000000000000FFE7EE000000002001801800800801802000400001800028C4 1240404610208600600000E0000A000450101600200E00600400650600600D406B054240440040040000800000000000000000066040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (029060260160 0700600600700000000010000600200610400400440600600400602400C006006004000000000000000000000000FF48C600 0000000001E3189986083800D943A1184B8000A3288280600612710600600630604008000C0402262A220606520C18420E00 6404046090A04006006106000100000000000000000000FF4C8310001000000580384000920380155100590185200108522C 701700E4160060060160014100040A000780A047C8488440C00600603420E211124024114004000000000000000000000000 FF4828000000000401C218000000004410014059018000D022864AF00602700600602600620084000810880608229600400400866040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF5E8A000001 800001801C01401801801C018010008000006806006006806007006800004002004805002007006006006006806806806804 806001006004004004000000000000000000000000FF23D1080049800403801800801A04005813C0180280A048622E20684A 006A0600600000680008400402040602684602640E20600E00400C415020406046106006000000000000000000000000FF87 A4000001800201C258C9831A29809B41825D08840105608704680684600E00680020E00040C80C800046B0E40620610690E8 06806824806B1415600400C006000000000000000000000000FF6488000020000001801C01D81B81A03801821C018000080A00466040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE12E8240060 85006004004004000000000000000000000000FF61CE008001800003801A00801040040002A01804804094EC060169025462 0E04E01014E52A116048481047026C565470A62CF4068044068040A000E000806006000000000000000000000000FF1ABC04 000180000180392180100588208882580080004060060A620601608620610020600044400402040630E00600601600614E45 614C086400406004004006000000000000000000000000FFECD1000001800001801800001800001801801000800000600600 600600600600600000600200400000200600600600600600600600600400600000600600000400000000000000000000000000c66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (184A03612602 420003684650402000000E48622E4A62AE006006884004820201806006006006000000000000000000000000FF8309400001 800001821C0280180180001320483082007018300C004608728E03C0882CE2A622C038080AB792E26E2E65F70AF20638628C 0C762004E044004006000000000000000000000000FF9A400000018000018018008012000002001306259500050440300493 0571462244400165565162C402080640641650680600600620000E201008006080800004000000000000000000000000FFAB 772000018000018438249812018022000221D9840000825062021E00E066204060024806804004038106006006006006806000266040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A0000018000 01801800A0180180180180100000008060028020060060060068000000060040000000060060060060060078060060040068 00006004004004000000000000000000000000FF13F6050001800405801900001045940110000A0580C0BC08152149824460 0600480000601610E800422006506006806016C0600620080E2048034060A0006006000000000000000000000000FF6F3C00 0001800001801800801000000608020C4A800000020404440700700641402000431600728800280680600700600700600600 3006006008026004004006000000000000000000000000FFAD860000018004018018000018000000013128018C000500480800a66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000021000 0000100000000000000000000000000000FF11DA0000018000018819429050018098001080498000D0082022000800680600 400000660612604000610640E00602602650E106480066080000244010000534000000000000000000000000FFD457040201 800201C8BB50889200201A404A034B8000208541020D0700E026824008A0CA2E806800A0494688E826D06D26CAEA0E886C46 906A80826C84814804000000000000000000000000FF0F9D000001800011801802A018200D5913A15001800114600A41202B 906A1608E1000020870CE0A808220E00721604600E00604620500620800848E00E0C0154000000000000000000000000FF5800666040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (088028420000 A48810C00800200800800A00A00B80A80808A50800B50808830840880800000000000000000000000000FF51F60000018004 08808828800000800AA8000910000000204200200010200280000040208200200010221A00210A1820020420021021120020 C040A00202A002000000000000000000000000FF34E40000000001041000000000019C415040002400002A00010080A08512 0108100000610C0840B849402018006040005802002000060040810018078C404088000000000000000000000000FF083500 00000000000420806000218200060B008000010012905400404011500184880000600481020000800000000000000002000000e66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100000140 124530129045443500B2CB0000C0480C88C80480C0040040D08008008B08000009090908209408408488048C088083080889 08B0890CC0000000000000000000000000FFA3E00000018000038018810838018A394B82102D80000840AC00453612680E80 E400046006506100206006306106106126046106006006416000436046006106000000000000000000000000FF3FAA000400 800320D20C40808D40C00800F10D00800040A2035430034121422028014032B302305110B10B0030234030135030034B34D3 0A3151083313503412000000000000000000000000FFAB340200000004402002002983402022000422030000818D08000F1400166040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C50850900C50 C90940000000000000000000000000FF07EF0008000000004000204104004000344404000000011009001001000001000041 000001001011001111001011001001001001001001001049101001001008000000000000000000000000FF408E0008000000 AA0AA0001100220840802B004000000C0A402202202202A8AA82002A80000000000002202002800000000102A80502000800 00000200200010000000000000000000000000FF6B53000000800400A00A90A4AA00A00C00800A0080008320A280290A9028 02002000802D52C02A00002802822812A12B12B02802C0A84AC02A40A4280284280A000000000000000000000000FF70560000966040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A82A9B002A82 A82200080002222B23C22AA2AA2AA2A82A82A82A80082202A82A8000000000000000000000000000FF826400080000000040 040200200040004202210C00012810010080008008010000000002C80404000000080A028020023022000040029010020043 0100020400000000000000000000000000FF58120000000000AA0AA00A0821320840800820AA00002204802A82A0220AA82A 82082A82A83284000002202A02002A82A82A82A82A82A82A80802282A82A84A0000000000000000000000000FFEE30000000 0003541540D02402D41303085002000000010510540D484D0550550548D50800D10800000D40C08848930880880D5088082000566040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000023801809 8118A180B80900188104000060140064461060040860100860060162000A000600E00602632620600642612E246410004006 016006000000000000000000000000FF5D8A00000000020140134928820044924140520100009148A500480514C805004100 8000008908008008108008408008008008008008008008A090C800800CC0000000000000000000000000FFD2050000000000 0080080480490080480C84880080000020020020920020020020500020020022000001020120120020020020020020020020 0000200200200A000000000000000000000000FF09180000000004AA0AA50006002A0D04800900AA00013202482A8230310200d66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (081080044C40 00000000000000000000000000FF1B3D00000000000280080880C8A088800080000980000A248200220009000200201800A0 0211A140001222942E828828829423A220A04210225015240211A052000000000000000000000000FF2085400C0000040044 040042000450040040041000016116010810050010010092600010A008100100000110800000000000140000020009102110 4000000000000000000000000000000000FF07FA400400024400D00C00C40800C00C00C00C00904114310308300300B00300 B30000B4B21030130002230022820820020131420924020830C300A002522002000000000000000000000000FF793A00000000366040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000601006 400000011600609E3FE01E206112006206066000402184014004408000000000000000000000FF630F000000000001803801 809085801148001003914021640804E20401401000E000006000214000000406206086206006206002006404006450000020 080004010000000000000000000000FF5FB700080000000000400801010188001002014200A05081300102300402C0130000 0880102002004A0288200000000000000208000008000400200048000000200000000000000000000000FFC9EF0000000440 200C00000010038020080001010A2001001000004000800010010010620C0004080C0000100000020220408000140148448100b66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018818310 09821002801109800004600C14608400400200E00052680600680040842600E00E02E2AE0060060D61440B68210862C60000 06000000000000000000000000FF07B300000000000180184580588180182103382380000960C200E42000600412600000E4 AE52800002011644644640600610600200400E00420045200C2A4094000000000000000000000000FFE57600000000000180 180980383000380104988100000A60C20060400063440460081160040843403410071272070070070A64020060360860000A A20800602C000000000000000000000000FF2F7600080000000180180186182A1630A00090418E000260006261946440081000766040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (604848055400 0000000000000000000000FF1AC30000AA0000AB8AB8218818238890A088B2A380002C62202472122AC2AE2260004860A610 3040A002064061060160068862AE0840960A425022E024204286000000000000000000000000FF444E4000000000018018B3 80108802300882B04B8000086020026AAA0040060060000070260020000880069061060361060A60064840040C4008006206 006006000000000000000000000000FFE46F0000AA0000AB8AB80D8811220CF088881201800021630430600C2AC2AA306000 0060060460201D00461D608618604622E2AE61660621600800640400C226000000000000000000000000FFBB84200000000000f66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106006002000 00800E0860868860860060044840062840000062C4004006000000000000000000000000FF60BC0002AA0000AB8AB8098AB0 2A08988188180380002062A63060222AE2AA2AE0002362362AF000A80017C260664068064862AC0262AE0170412AE1060582 AE000000000000000000000000FFEC12000A00000001801891855011801012041009800000600801612000400201600004E4 0C21200000088F00742EC2730E45600402404640400010609412C04C000000000000000000000000FFDE4500015400015595 5801955844111144101281800045649041700455455255600052650455601444054603621608643601655402E55420610055000e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180980000 180180380180000060060060220560060060000062160020040000164160964060061060060140C610401000625601600600 0000000000000000000000FFA49F00000000000180180194589182B8290298AB80000060AE00601610608E00600000614611 22800002A602642604E44E44E0864A40064241202C6104324094000000000000000000000000FFFF82000000000001801821 80190000180B04982180000360160CE88E00600600600000E08E0028080212A6216A0E25642EA360060140060340B0006008 2A6004000000000000000000000000FF3E68000000000001801905801801823841805B118000086006006202006002006000008e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20C2AC000000 000000000000000000FF4EDF0000000001559559558418CC11591390381180005564565564C640E556556007556110546506 0025560160160560565564CE4540485040D0046156496526000000000000000000000000FF8F258000000000018018018019 01801841801801800000608600600E00614600600600600040E0000020060060060060060061060040040040800160061060 04000000000000000000000000FF2A180000000000AB8AB8AB91582388188388180180002AE2062AE2822062262AE0002AE4 0622206000000618600608608600622E00470E04C20001E004004236000000000000000000000000FFE53B00000000000180004e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (508860100020 1649608640600610601600600200600800C254016006000000000000000000000000FF116C0000000000AB8AB8AB8AA0238A B8900AB8AB80002AE2062AE00E2AC2862AE0072AE20004E0000020065061464861860062262AC2AC2AC0202245040462AC00 0000000000000000000000FFA7BB00080000000180180180180002102183112380000060860060160A600600600600604000 E0000020062464A630648600600610400400C400286206024000000000000000000000000000FF05B40000000000AB8AB8AB 8AB82B8AB0838AB0AB80002AE22E2AE2A62AE20E2AE0062AE2A81062880022CE04E40E12E42E2AE22E2AC2AC2AC4502A602E00ce6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880001962801 800C010100046206404206006801006008886A8090000002200E64700624E2060074065047D442400008E206007004000000 000000000000000000FFBF28000400000601A0180591000000A000000001800028640401404610400088E208447001026005 002006006C060064460078B60260020C600001500D004000000000000000000000000000FF4C050008000000018018018001 0180002400000180000060160044C60040100060008071002262800022C602642E04E44E44E0860040040044840840843250 04000000000000000000000000FFE89E000000000001801801800010001810001C0180000060C60060060050260060060060002e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 00000000000000FFA7C380000800000190180194011181080014288D008021640E2AC1560AE10000624000E1004021010022 0624611610600600700E00600A20608012C44C406136100100000000000000000000FF900C80040000022180380181000408 880C000801008053600648408E0471200062802268015020000020060462060C602600E04E3160560960A802500500600400 0000000000000000000000FFEEE0800000040041E05801800042000813800801000001608610448F8270C000610188652020 800002200E00600630E00E08E00600C00000C128326406006006000000000000000000000000FF4D6A800800100581C0190100ae6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (641000400E02 610610620E00600E00600200608008022C2040C8080080000000000000000000FFDDAF000000000001081801905890002050 102009820008648E0041021560C040E40000E00000612021424610603602600600620610600608E000400104104004000000 000000000000000000FFAAEC0000000000010018018018040630A980114183000860C604624000602600E006806000002028 20800E40602600600600600600601248E618052086004000000000000000000000000000FF9F910000001400010019058038 4388100180102188200261260160401060063160060062600F820000002608600602621E1067060C40044040006020160840006e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (328A08800C08 8880002AA5622C02042202122AA2422AA00040218222C0024821424821820022AA0020020022083122422020020000000000 00000000000000FF20E500000000002000000000010980002A04004400000001080400280100000000480060003140001000 10410090400000100000100010080000048000040054000000000000000000000000FF032C80000000000000000000400180 C00000A00000000004000081000801280000818000000202400002C00204200482484280004484A02280401000C809048000 0000000000000000000000FFA329000008000001001801821801890100020003904044E00651440A0060000060210062C02B00ee6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF252F800000000355F5595591194590511390D1558001D56556D5654E55643555640C55600150621045655601 60160560565565565560565562204CC556D57156000000000000000000000000FF61960000000000C88AA8AA8CA822888880 88ACAA80002AA00220A22A2AA2A2AAA202AAA0000820002A22CA04A40A12A22A2AA2AA2AA28A20A0202232823224AA000000 000000000000000000FFBB360080000000000002004440000280200000000000000000000000000080000080001000040080 0800002404A0300480000000000280000010004000000400000000000000000000000000FF825600000000008E0AA8AA8A88001e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0002A0020420 048448428000000210000030100000000480000000000000000000000000FF82A80000000000000000000001000100000000 0000000000000001100000100000000000009300000300104100904000001000000000A00000000000000008500000000000 00000000000000FF6C599000000000AA8AACAA8A883A8808A08C08AA80002AA2AA2AA2222AA2022AA24BAAA0002120802820 02182002082082003AAA2AA0022AA20022A2AA2AA002000000000000000000000000FF4B2280080000040140140140010002 304D001400000100401108410400400480409480100004844001400008000000000000000400004012020800501101000000009e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080084084080 80A0220200228308210308000200000240200000000802220240A80200208280280280200080200280200200000000000000 0000000000FF3EA200008000000000000002000000868208A6121400020088440000C50000C00200020000080200000000C0 0100000000000040800800000000400000000000000000000000000000000000FF47D50100000000000000A0000000004148 04050400000D9100008000000000000400050000031000000010800000000000000800010228220800000040000000000000 000000000000000000FFCCAD10800000000040020000200004401202C0000001000000000000000120800120000000000210005e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF6B8C010000002000800800980812A2084AB42840822041266266AA22602062001182010002802000000010002003 80200200200200200280306000305B01A01A000000000000000000000000FFC4070001100500018018B18218018098030350 090B0149700E2268042AE1063000040200064A6000000010A474864160060060460062262270010060060060060000000000 00000000000000FF060B0000000000AA0010000010282001113810650080244D04014D0400420C0004040000008004000000 00080800801000001100000010000200400205004000000000000000000000000000FF94D40000080280008008108008008000de6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000002000000000000000000000000000000000000FF874100000000000100000100000180000000040000 0000100000000000000000000000000480500080000080000400500400400000000000080080080100080000000000000000 0000000000FFDEB4000000000000800800800220804A82C00882044002210100C04000000200020200000200200000000010 2002802002002002002002002000002402002002000000000000000000000000FF73AC0000000040B4000000000204040210 2040010100000004801404000210001000020000808000800000000000000800000000008000000400800000000800000000003e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (389011800004 648284619E00600600000400000600640000004000680204240200240203E006806800004006906006000000000000000000 000000FFD025000000000000801B0580520002181200008000000070C220400688C10614008002009714E0000000000C604F 30612714701288680608E2A8012026006004000000000000000000000000FF0DF402000000008180180100110180580004A0 00000050E00200C4060040464000000000064060000100002061060060064060020265564060004800060060040000000000 00000000000000FF7D6E0000000000000000000000018000000000000000000000000000000000000000000000000000000000be6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFA19C020000000040901801021048510080C00C2582804062120120848040060082000302061460000002000060C02000 0209280620E006286532217007006004000000000000000000000000FFB40A020000000100801805401081802000C0291180 01296022A3680410C1262200800201060162000000200860AA2022C20C200610600609635030C02608600400000000000000 0000000000FF650A0000000000008018818118018618191615118001036B424462461060460C010600014EEA600040904022 40028A2450E0020A0063EE216000002116106406000000000000000000000000FF2DDA000000200001801801A03800001803007e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500E01620600 614D009131001412016807806004000000000000000000000000FF6170020000000021801801821050100000002130000004 6806404100014006010100008426086000000010046006046086006004400000001888000006006084000000000000000000 000000FFDA8C00000000000080786380180384612090AA0181214A70421C224400E246800802180006046002800008024140 020080510006016846006400016006106086180000000000000000000000FFB757000000000000881803009E022100308488 03822108E28A01240408620702120202010620600120024000400020023000000600708630E02240408E006406000000000000fe6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3002000B6812 20400300700720000400000680630020008013412E0962460061060AE40E00620A0040960060060000000000000000000000 00FFE6EA000000000000E01821825201800005801E0180001560058020000A4806A0000700000642600021008000C4060C68 2600600400020002084000608E106004000000000000000000000000FF51D8000000000000801C01211004006401811C5180 0080701500230020400608080600000600650480804010634642681F40602474008070192100E64688600400000000000000 0000000000FFB821000000400021801C0100140982000020040002000064C7C00C002040060800000000060060000810000400016040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 20A6000000200002811801A01809801801981807800040E40220300200600600118E00000620200000088026402608748600 710602E006006010806006006006000000000000000000000000FFF57C0000000802408098018DB8040C18058038A0002122 754200010B9660060010060000074420041000410848064060064060168060469461080042C7806086000000000000000000 000000FF4DCC000000204440841831821841C53C1143101180000864D2042522316006080045050086042001310808804406 006206086086086286246080926026107806040000000000000000000000FFCA7F000000000200801841803A08201A01211000816040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006006006 006004004000006004006000000000000000000000000000FFEED10000000000018000010010018018018018018000006804 8070000060060068060000068000000000008070060060068060060060048050008068040060000000000000000000000000 00FF2C69000000100001800001801800025801A5182100001060840064812468060060060100060000040000000864060068 86006806886004404104086506086080040000000000000000000000FFCE680000000044258404498CD829891C11A03C9100 4002E034446050116806086034040106A20000310088A060461060061060060562840240000448270060000000000000000000416040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000086406660 4208202608618E0408060024000000008064064068069866A496C004004000006004006800000000000000000000000000FF 9622080000100081801004A01A00300500412801800004900B00F48220604610E85648831755201400010014F03614E42E00 E02C00400E08EA05004006006000000000000000000000000000FFA5C0000000002011801000801801802042080843800050 00820860020CE406206206000006002000100008406106006106406104014024004000106006006000000000000000000000 000000FF50A7000000000001800001001000001801801801800000600400600000600600600600000600000400000000600600c16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF2847 000000000041C00801A00800002040003801824108685208600000202610E08612820613424001000008E006096026840006 0260042A4828007006006000000000000000000000000000FF7B6F000000000041880809800E01880000103801800002690A 09EAA022A54624E44689828E0847080800C000E00E0AE28E24000F0C602C5CC4501064060060000000000000000000000000 00FF82810000000002018000000000000042402041058440110050D26B5248200E11690614044695204411000010E8065160 46406004004006006000806004006800000000000000000000000000FF0EAC0000000002019040120400118020A20602138000216040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0644A0020222 260260480A6C0400E400000000000000000000000000FFE600000000000601801001201001801801A00E0180000060028060 00005806006006000006006000000000006006006006000002002004804000006004006000000000000000000000000000FF AD4E100000104111805800C408118000001118518000D0014200E200002406006C46440006C56000800830546546C0604601 2006806006806400186006006000000800000000000000000000FFBE07000000000001801800800A00000000080885800000 808242615048230E02722680002700608108100000600740600640380700600600640000420600600000100000000000000000a16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020800028008 00800001800000902300004004400E02806402180102A00000004400980E0000120000000000000000000000000000FF86BA 02000008024180110220000D801911808881800000000004680400052E406206008006C0640000000000E026006006046002 00200620620000401400E200000000000000000000000000FF4A9E020000100021A8D28002424A351A01AAAAA38000801000 884040AC1157046B26408B064268000402808468A6906836806AA2C82886A86B00A06904A260280000000000000000000000 00FF8535000000000081A21013091100401955A00C01800034EC4A84ED0000C2060060020010061160C840000108E20E20F200616040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFE0DB0000 000042A05082000C026033C0041C020400000001001310000008100210402008409C4848030200800808980800808800BC0A 00800800800880800800000000000000000000000000FF9AED0000000000008E6888C3C802840840810902800000802608A4 26B0A00200240200000280A180000080002002002002002002402022022000302042002000000000000000000000000000FF E65900000000010000100040008180048A42002000014A144140001146020000002040020600002024000010010000816032 41400204C0180460400300200028000000000000000000000000FFA6F300000000040000005010200188002000205000013500e16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280A80280280 28408D2802802040000000000000000000000000FF137F00000000020120022C02530024021420440C0000804084AC801488 5004004900000800804800000000800808A00890890900910910908808C00800804808000000000000000000000000FF8F47 00000000400182584183100194380980982D800050E0C430600402440E4060862000160D4140000040106006506036126086 546206086010046016006000000000000000000000000000FF41C0000000000140C80D08A84C44C10D42D40C808000023C03 02BC0A303103003242001042203200450201023083023103013043003023243241503143102000000000000000000000000000116040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D08D50C00D50 800C50800D50D50810800800880A00890800D28CC0CD0C50CD0850C00D50D50420000000000000000000000000FFA9C80008 0020040000040040040000000041442000008010014910000000000000D10010015090010000010010491010090111011010 01101011011001001000000000000000000000000000FFBEFE0008000000AA0AA08008402208A2E00A806000002A82000402 202102A80008000002A82A80000000000002104402100002202202202200000002A82A8280000000000000000000000000FF 45FE000000000200A00A00A10A10A00800A00B00800000285280290282B003002452800802802810800800B2A9428D2822C400916040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (765700000000 001C6AA0AA0AA03248848008002000012A82200882A12A92A80002200002A82000000000002AA38220234220022022032022 00202402A82A82A8000000000000000000000000FF85320008000000000000A0000080004004020000000080000000000012 00000000800000000000000000002281400004A00000080000800000000C8000000088000000000000000000000000FFBFE1 0000000000C00AA0AA0AA0A20AA0B20A008A00002A82A80202A82A82A80002000002A80200100000002A82002482002C0228 2282282300404802A82A82A8000000000000000000000000FF14E400000040055435421234825435051030C30C0000550D5000516040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002482503000 003003002000000000000000000000000000FFE7D51000000018018218258098018819018319018140044056246026004006 28600608600600E0400062860060060061060060A640602E00E540006006006000000000000000000000000000FF97720000 0000140500020120020024424302A28500008048048408108048040041150008008008008000048008288208B08B09089009 00900808828800800800000000000000000000000000FF7191000000000920800800800908800810A0081080000021124020 0200200200200200200213201000200200200211200200200201201200A000102002002000000000000000000000000000FF00d16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005040001000 00108046010020004280400100040000200040200428508000000004000000000000000000000000000000FF7C7A0A000000 200082082010880288080213090700201220300020020122021020020120122420004020009A2C02B02AAA18208A50211200 26800AA402402010000000000000000000000000FF624F44080040040440040240000C40044C400424000120960D0A102140 1401201201000001001000001004040000400050000010000080001020151001000000000000000000000000000000FF5BEE 400000404C20C04C00C00808C30C10C00C40900140B10308300310300300320301202340300000300248210204220250200200316040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000804001001 9C192701184406B8C0007041844000808600201462040600600600400600401000002641645E606006106042002406006020 16605C004000010000000000000000000000FF0AB60000000010018030410C10098918020A908800800A000E002084006126 40E00E00400600408020000600600600602600600200200600644000C080504000000000000000000000000000FF80FB0008 0400008002208004803590004202005005200400002D01500003402100080400800001080000002080400080204080400004 20000100108120120020010000200000000000000000FF14520000000000240020000010018280C00081001080000080400000b16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (160160087142 8C2AC000000000000000000000000000FF125520000000180180480200100980000402080180000CA0840AC08E1040060060 0600200611680000080600620602E086106006006006106800006006004000000000000000000000000000FF78D700000000 1001821809033901841821813831800000404E40200600800600630E00400604450000000222E0CE40645602C10210A0CC24 C48014E044006000000000000000000000000000FF1DE7000000001081801801001800003881801803800000C10653204602 800608600604C08E02400000004708700709700620E0022820CE006100006200046028000000400000000000000000FF428400716040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (455655641700 65565564040020044060362060364164D44D4556556010556550554000000000000000000000000000FF25C10000000018AB 8AB89508B8A38A80AB0C5881800022222D20EAA622C2AE2AE0860022AE32E28000000321608610645612C236226104084500 0263042AE000000000000000000000000000FF53BD4000000018018028050010000000010138018000002005006046054006 0060C68020060061000010020B6286036286146006006004004280006006006000000000000000000000000000FF9DE90000 000018AB8898A008102208E088090AC78000212A04804A362242AE2AE0260022AEA060000000061C601649600660422E226200f16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018018218 03845901A00000891A01800010690E806C4E04E0060064460060040064800000000860860860861040040040040042100060 04004000000000000000000000000000FFF7890000000018AB8830B109102208C08C8018AA80002662262AE1862062AE2AE0 060062AD2A30040000040260261060262042242242AE2AF0842AC2AE2AC000000000000000000000000000FF077500080000 1801801821021011C00000001C0980000810820C2006104006006436006006006800002000006A2682688600610410C24444 4010006054004000000000000000000000000000FF2EFD00000000195593112114594C150150121D54800048954A552A0E5000096040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400008C20421 E000000000000000000000000000FF25C100000000180180D102121800041801823820800000608E02400612400600600610 6046006084040102096096016006004006016004504404246016146000000000000000000000000000FFCF7A000000003801 84082980B88980384B811901800013400601205640C00600600600608611620211000A42644644625612411610654C054088 006124006000000000000000000000000000FF40EC0000000018018080080118100458258258008000014006002006104006 00608E006006016804000002C1721723720E02C11610E004004000006000006000000000000000000000000000FF3914000000896040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A82A82262AE 48E4002A809020E10E22602E2AC22E22E2AC2AC3002AE0AC2AC004000000000000000000000000FFA79D0000001141558058 0C92284C15592990580900004564524064A61165565505504C6D2E4564065525504360364CE45600C4D64D64345245022461 56406006000000000000000000000000FFC88C80000000000188180180180100580182982580000560020560040260060000 00016006006000000040046046116006004106106004004008006004004004000000000000000000000000FF98F30000000E 98AB88180180182388988188180B80002062262942960442AE2AE2AE22E20E32600020022200600608608630C2262260040000496040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0201821C2080 080104000182880B800011600600600612600600000001400400620400242001609601700600400400400600608000601000 6000000000000000000000000000FFE81E0000000AA0AB8558498AB82308808188080180002263062062AE4062AE2A82A832 4AAC2461002A84001064060865862AC2242242AC2AC0082AE6042AC004000000000000000000000000FFB7E7000800000001 8A98C00101000018030498A380000860840A600620600600000000E00600608400200010630600608644400600610400C008 08E206120006000000000000000000000000FF0E730000000AA0AB8018950AB0AB0A98AB083891800028622E3062AE08E2AE00c96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006106006 000000000000000000000000FFEB2D800800180481C11C048008010218A48A30099000A26036006002006802500400046806 B0E0000040102A70469868C700400602E0040E4040106845404004000000000000000000000000FFFE73000000000401E058 00800801120000000003800044642600E0060070020400000840064120240020004468862062078862AC4040060062082040 01800000000000000000000000000000FF313800080000000191390280088900404A00214180008060D60B600640E8020000 000850068CE0800021104A6446C4645600610C114004004200007124004004000000000000000000000000FF44260000000000296040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005060060260 4000404002614648600600C01200200C084538404004024004000000000000000000000000FF1414800000000441A0190415 0081085810848093880000600608608211641214814004E08600E2C210601000632602628E04600644E0060061020CE21108 6140000100100000000000000000FF6EDD80000000000180380280C8010918008000019100016516056002106822CA020002 700610600000408800600600E22E8A4546406056006020086044504004000000000000000000000000FF4C6E800000000101 801800014001009940943009808000E08622600210604300000040700600600000614008600601608E02600604E02C10408000a96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (803900810843 001800004081820010600600E0A602E4800B00A002710601402080600004622610600E00600222A01600615000C400140120 000100080000000000000000FF2FB800010000000180180494481108D80800802D814000E006142406086020000000016006 04440010400800610E046486256002002006106000046114004004100000000000000000000000FF7CFC0000800000018038 008009010699E504182190A004E44600400600601400000000680600610000600000600E0060062060020020060060001040 86000006080000000000000000000000FF7C8200000000000181180080282B00180700380582000A622642C2260260A4000000696040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004802000000 00000000000000000000FFD8780000000000AA8AA8408248AA88D08088807080002AA0422007022AA2220000002202622520 008020001024020821C2202222222002002008402602102402000000000000000000000000FF1ED300000000000000013000 000100002800008300000000801280C80000000000000000060084000460000100900100001000100000004002A000801451 4004000000000000000000000000FF94DF80000000000000000208A001822004044008000000023000000000008800000010 99081201003100004A04404402500281001085500D0000340140020530000000000000000000000000FF5E0500000000004100e96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500000000100 00000400401100000001001000C0040110011080000100000000000000000000000000FF565E800000000555D5580D005055 95112915195500015565344A44465564448000005575560165015460004360364CE0165564CE4C65565562105570560570D6 000000000000000000000000FFF0C90000000000AA8AA88C8D08AA8A88C488280080002AA5022AA02A2AA2AA00000032A30A 2823002AA00020A10A22220A54A22A22A20A30A4400A302A42A02A000000000000000000000000FFA9AE0900000004000001 0028008000200200200100000000040040808011080010000048002A00010080000803000002A00000000080000000A0000200196040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4C04C0800420 2004200000008001504000080000D00000000008004485010080004A04404404500001101000000001300011400215300000 00000000000000000000FF0D4200000000000000010010000000001001000000000000000881000000000000000000000000 00000000010090010000000000000000000200000011510000000000000000000000000000FF26608000000000AA8AA84085 082A888882880EAA80002AA202032233AAA2020000002AA2AA0820002A20000020020820822AA22222A2AA2AA0002AA30300 2002000000000000000000000000FF26BB80080000040100100120100000101105108300000040140040010048050008000000996040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (011400000000 0000000000000000FF0E2C000008084802800800A00800804C00840C00800000200200300202200200000200002290200000 A04A08A122122002002002002402402800082012003003000000000000000000000000FFA6B0040000000008000000200002 00002000022804000A80000000000000000002801001000004000C0000000000000000000000000010000900000140800400 800000000000000000000000FFE3900100000000801022A00000000044820C20800000200018000000000980000001828000 00000200000000000010180000008000008008800A0000008090A8000000000000000000000000FF2B66090000000400400000596040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800800804008 000800080000000000000100000000000000800004000000000000000000000000FF180601000000088890088A800C008008 50D9E81000000080130128020021020000424880020020000020030020028020028020020020030030000020020621830000 00000000000000000000FFE9FB04001010591580180180180580504188102182000260060060040478040000861201461060 02046056006146146006006086006C0620608208680600F224000000000000000000000000FFDF5D0800800AB00100C54000 102008152C64511900007140300080040041040084252300010004001158081118008010008000000001901100100001500000d96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF917B000000000000001400000001000000200000000000000480000000000000000000080500480100 0000805004000000004000001000801000000800800000800000000000000000000000FF1CB3000080000080000800800000 A00A008210000000000002002802001006000006808002002002000002002002002802002002002002002002002002002802 000000000000000000000000FF6A761000000CD00901028A00044030200000000100002140200008040000018100000A080000396040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFE7C6000000001A11801A01881001B10A00001801000080400700621200600000000699800200600000E006 00208200620621A20600400602E04820408601E400000000000000000000000000FF709C0000000018058289104145518409 002141040000080206106106006004000106400806B260A004E00648710E486C074468070061062573103021070048000010 00000000000000000000FF7F96000000083801801840080001000840100000000000000624620630600C0200060000220060 00006026006206036046006206540006106000010004004000000000000000000000000000FF409B0000000000000000000000b96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (810060061081 01004046000206104086126000204017006404000000000000000000000000FF0911000000005001400A20200B45220932C0 18220000002306A0D09630640800048E52010200610801640401280200681400020600210400484040E004A55A04000A0000 0000000000000000FF4F48000000105005000950200A1104010091390400010820060A60862060100400064000420C602000 600608200A29600600200600000648624010C006004204000000000000000000000000FF0B61000000001A5982C90580B0B1 998820301811940011420620604A0C6100110086000002206080066024300300024024822006AA608404408004201600610000796040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008C00B04000 000000002605600604400200000700100332600400400E01600600404600F00008E00604600440E00E204004000000000000 000000000000FFD36F0000001018118218000508018009009001020001000006C06006005202008006100212006014004006 00620600608E00602000000600784002000642C005800400000000000000000000FF73F5000000085007024849829B519028 448638C1858030200707495614600600040600020A0068008564040002009840A40600260860040840000160068071040000 00000000000000000000FFCEA2000000001021200893801803652010803809880140848600400640710E10010E220082007000f96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF002C000000001801828801C01801820000B00009000100408682701620600400008600008A2072840040044CE0 16C5408401600608E11404520001600E006007000000000000000000000000FFA815000000401801800C0200081184180080 1800000001400680680E40500200008680000200420800400422610EA0C004086080006004004A4812600600C00600000000 0000000000000000FFE90A000000001BE1950860140809208C04803C70000100C10600618682400200000680011209610500 460C106086046124006018004514004020205804004806000000000000000000000000FFD43500000000380180180020080100056040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800E1040062C 610608E2B60060868058A6006006007005006806000000000000000000FF1DBB000020001A03848801AC18018098BB9C1803 0200A840C653700480600E00050601800201E8000040040070070A401400602600600400408C00600417F146540000000000 000000000000FFC155000008085801900805941829C00C05C00081000000404629E2060068860002060200220D6016004804 00608600402410610E0044040040101C4006417027800000000000000000000000FFC569000000455801820C558238818232 00851851004004402E0061064D7024010106101C93A0620400C00C10600620410C0963060061040040222070060861062A0000856040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018010000 0000060020060060000060060000000000040000060040060060060060060060060040000060060060060060040000000000 00000000FF9047000000000001800401801801801801801C0100010000060010060068000068068000008000050010060040 06006006006006006006004000006006006004007006000000000000000000FFB73E00000814A201810011B01900003A0180 1890000004000602440650600000600610004030080400000600490680604600600600600680400A28480600600600600400 0000000000000000FF8D84000020000203800223A038518498C5811844022030009600408405612800E806840290800A040000456040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF620B00000002000102200710102080909920080000000BC01602882E0069202060063880188810048002064C642600 60064066C405E206006804006806006004004006000000000000000000FF5D920280004CA001045001201040851205002802 100002402708C40602603054E0A60300401020444003060840A7007496006004006306004021104006006000006006000000 000000000000FFFCAB0000000000010010018010018019011008000040484506044056006000006006400000000406000006 004006406006086114106016014002006006006004006006000000000000000000FFD171000000000001800001801800001800c56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40400E006006 007006007004205020806006006004004006000000000000000000FF1E8A000000000001800801001A00805001A3180A0500 000016004086006100526246010050000D08110006006446C06B2E50600600620600E9100040060060078040060000000000 00000000FF2DEC000000000001800801C01A00821C01883812082000024600420602600808E4A60200200003202000C60040 862066CE08600E12648E01C110907006006004014006000000000000000000FFE43D00000000000100000180140080581105 09040540080516802D4F10E9505560D6410150102434D10006406456406116506004004024406220A000060060012240060000256040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (220000000000 060120B3506108404086008211416102000AC68AE22E00620624E8020244060060020C4A0680611611011600000000000000 0000FFA149000000000001A01001801800801801800000000000000600200200600000400600000080400200000600400600 6006006002004006004002002806807804000006000000000000000000FFBB4D050000114001801801101000001005001800 000040015610600E006100046006000000002000000006446406006006406046186824006A4038400600600122C006000000 000000000000FF2F65000000000001A01801001200401011000D010041881AC600442608F85000E09620210090202020104700a56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF3A3F02000018004000400205800000041004400000000000114982015002800010002200000000004000000A0000200200 000000228040058050280290080101000006000000000000000000FF7F9E0000000000119010011010109071411221200000 018406022026A2E00002680601008010600000012620602606610E5060020841140860000404060062900100060000000000 00000000FFAF89040000004401B092B1A81290AA3A9120833200008D0826D42C06056200856026AC0080846800200806A068 06CA6956806CA2C968A6A96920A12956D46A24A00806000000000000000000FF5DED000000480003843005849840A118419200656040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030230830C34 8300350302301108B403003892513012000000000000000000FFCA6B0000004003022902084842082C02000002410000C048 00844D808C00402040A4000800800810300C00800808880800A48E20800880A00980800800C0100800C00000000000000000 0000FF60F40000000000010008C0C00180800804080802800000202200200600210800800200200802200000029211A10200 20A200200241260200200010206A062002182002000000000000000000FFE80900000004200002B0310200600390A8218089 00001A40463000580010000010004CC64025C08100000040020040004002018010002000002003800020042460009E00000000e56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00008A0802A3 2A42802108002002802800A02C00800802852842912B028528028D280280AC008D2A428C2022802802000000000000000000 FFD2C80000002204432002080412253042010143250000C1480090490508C840004004000800908802808B48D00D08C40848 C009008008C0AC080AC00888810110004000000000000000000000FFB6610000000200119018498058C10838819018010000 0140560440A400602000680602640012E0000001162061062060264060062960560161400460564464060040060000000000 00000000FF4F29000000100520C0CC00B28C10C5082CE2AD40800130320231340A4A210100200340A02100300828120308B000156040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFA7 1000000015431435453031028C2443502A22400000C00D50100A00540540000550800D50910A00D40D00850900C808B0A90C 48910808C00C08900840CD0490000800000000000000000000FF994D00080000000040401041040040000044440200010090 000010000000110000010014090014010010010C104900100114108105100100104140900100081000100000000000000000 0000FF58AC0008000880880AA0820CE08010008A03011000000002A84001082302000002A80002A84200002A000050001000 00000C0328240248050020400000200200000000000000000000000000FF5476000000004400A00A20A00A08A48A40B00A0800956040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200211200A10 A002002000042002002092002002000000000000000000FFD6610000004AA0AA0102A20EE0AA01048002008000002002A92A 8200AA92400002A80000002A80002A82AA2002022AA2AA2022300202A82A81200002AA2ABB21000000000000000000000000 FFE8BC0008000000200000040000200080040000020000128001048051000008000000000000020000008048000240030400 000000200300100020028290001021000000000000000000000000FF4B390000000AA0AA0A02C40800AA0A20D20880D00000 2C02A82A82C8AA82800002A80000A02A80002A82A82082802A82A82082202802A82A80100A02A82A8220000000000000000000556040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000043003003 003001001001002142083001402202402402202542002102142082023000002002003003002002000000000000000000FF16 D81000000000138219498019250958458A5801010030E20E4A400601600000802042600E0160000060AE0060460860060164 2641624620E230006026046004104006000000000000000000FF599C0000002000014CC0092012012C820020C20500008848 00804804004848800000800A48800800800800940928800800820900A00800800910D1080080000480480000000000000000 0000FF58B400000000000080080080080080482C900850000004A0020021520020800000000021020024000020020120020000d56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF43FE00 004000A01002008401203203102001400500801000260400000080000900400400840000004040A00044202802800000804D 0040008050000040020000010006000000000000000000FFCAEA080000020023000868800080800846820885800000C20A28 201400000000000060200201A410012902302812902C1AC8A202012002102400403403402186042402400000000000000000 FFB2EC40080040040040A4005804004824004805000021200001005001001001101001198028081001000208000000060030 100020000280221200000000001101094000000000000000000000FF02F340004044A440C12C02C0CC08C40C00C10C02804100356040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00600E00E006 00650008720700608002000E200000000000000000FF3CF30009000000219818018C70E290D9818010A00B60240106222046 02C22825000000603E0160002A601600609610641640618618602E04609040200618E000010002000000000000000000FFDE CC00000000000180102180100C8410458010000C000800361020961541000800000060260C61001461062A60060060260060 06006056086000000006416000000402000000000000000000FF12F60009000000000200000400100A200002000001001200 C808052008008015000004008012008000000824004000802000000800000002000A0800000000000100160000000000000000b56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE030C062AC0 00200AA809C0060060020066A648241618606641622648402410602804418631E0042042AA000000000000000000FFC1C620 00000000010409018080480010008058000000002006C0222600400004000044400610680080601601208641640E08601622 6006106C000A6006006CC4844002000000000000000000FF389100000000002180383384500489384B841000000000400608 E10C00600011000000600624E00000600642024E04610645610601450C254000416236126008090006000000000000000000 FFD9470000000000418218018811008098018410C4000020400642620400642840000022610400621040F00600312700F00700756040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFB26A000000 0001559111559550C495595581300200004085565024C6555001550D5055600644E0048062C65565260A604E406456556556 55600035651651684CC54556000000000000000000FF3FDA0000000000A90A98C98A30208018A58ABCAA00012AA2AF00108E 2AC0002A0AA82040060A500000710E02010724E28604622E04C48C20C24008222E006D24A4C2AE000000000000000000FFC0 254000000000010028018010108010018A1C4800018A000702900600480080000000400600600000600600000E40E2860AE0 060060060040C8002046046504104006000000000000000000FF97A700000020028F28D8058900800250808892AA00002AA200f56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100040040041 4055654654680E886006000000000000000000FF1F17000000200201811801801905801801A812000000C0400612C8060060 000008000060060068000060860061068868860060060040040040080068168164C6016006000000000000000000FF622400 00004004ABCC30AB8AB0088AB0AB80310200000842AE2042162AE8002A82A82AE0063270000060162AE02600600608E3262A C2AC2AF0000040060060062262AE000000000000000000FF3E9A000800200201801801801114949011A0100100000000064A 00460050000080010C600641600000604611704600700E906086086026024008217007446014104006000000000000000000000d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (421620600000 00002360060840002AE0064860460260660863200440440C45000040060062262862AE000000000000000000FF21F5000000 000005905001942000045800081800000004C006000026046000000000016346204484006086056296086006006000004514 00400000E01600E10E04E006000000000000000000FFB3CB00000000000184080180188D901803043801000000400628C096 10E00000000010600E02E02000644E40604640E28E4561082D40444542B0326546546006006006000000000000000000FF40 E300000000000182000180004000180004995100000540068020D600600000000080600610E000006A56006A1625624F2261008d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F50000000018 AA0018AB8CD8498AB8818AB851000028C2AE0B42AE2AE0020060002AE2AE2AC3002AE00E20400E20E40E32E22E2AE2AE2AC0 082062C62C62AE22E2AE000000000000000000FF2E9100000000191414B95584580380C1318859550000044D565205464960 020040004C605624444455603602C216436416456446416514404040006506506436496556000000000000000000FF4C2480 0000001800141801801805801803801885000000400600400600600200600000600600401000604605442604602600608600 6006004100056006006006106006000000000000000000FFCF9E0000000000A98098AB8099219098A90098AA00002842AE02004d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600425608 654654600410C026000000000000000000FFB256000000001800009000801D45000809000021000005400604C00200600000 680000600600648000600681429600600600600000000400608001601600E116006006000000000000000000FF246F000000 0018AA0350AA8239018AB8710AA0030000244AAE4042AA2AE0000060002AE2AE2AC0002AE5063841061061260862202A82AE 2AC44032601601622622628E000000000000000000FF92900008000018200018018890298200038318010000494006012006 02600200400000628609410000628608408608608610600E08600608C0084AE04E04E106026006000000000000000000FF9200cd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106004007100 04600701400804650640604630608E026006006214084008106406006004014006000000000000000000FFFE2D8008000031 88483883801C2590A80182188005200B308E4000260060040474180269648040000262072048160064468164064760066140 0008620610622C004006000000000000000000FFF9A3000000003810141482801821C0A881020405800000180E0020070060 0000600100600E006004006006006206006006286010080080026000004006207454004006000000000000000000FFAC0F00 0800001800503000911011000903000111800008000650000200600000600000680680400A00654E04704652E48F45611000002d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000180008 180300300182288180800302202072260160062860A600620808611E00408000000608400610E0860A622611611209421000 4226206000000006000000000000000000FF3968800000001000001C0092182348002104194980000A008600220600620420 6100406006A060082860C640620612601600600640600420E05030E00600E084004100108000000000000000FF056C880000 001000021800821813120103002204028081080648000688600402728080600600E0100060860042362062D62B6416206406 126000006006506804014000000000000000000000FFF01D880000001000605801841009040805803900804114010609004600ad6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (548400320540 540120020026000000000000000000FFF9B10000000018001018001030050028090000038420401446012006486046006480 02200E20210900002620620602E0060064062060001060C0084006416100020100080000000000000000FF65FB0000000018 000059440418919109410A2031910014808C1025360165160460404800260060004100060260060860961460260161060160 000064C6086000000000000000000000000000FF050B0000000018000038A10010C9848809892101888000E00E08E0AE00E0 0E42603002602600600010810612600600600600600600E080406490414086086060020006010000000000000000FFAB8A00006d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 004C0289080280000080080480080000008408000440000048048084000000000000000000000000FFF1B60000000A900008 C0AE008812820884140800800048101242E2AA2AA2282AA00005E2724125C133A5020021021221020A222222210210202000 A01201220228628A000000000000000000FFDECD000000000000002000023001000002080044000000000640000400000000 600004000C288000006000500290000000000010010140000008000010008008008006000000000000000000FF6FED800000 0020000400001000C811203005211000002294B00800000001000060003001000402400805480300405084A841010010020800ed6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000021441 04408440D001000480000004D000044000004014000000004C000C0001000040900420040020040080080020020040010000 000104104000000000000000000000FFC2EE800000155800155925D55D558131558058A3800052FD563042CF556554556000 55455600E00144E036556216436016436456446026556008556506506454554556000000000000000000FF74280000000CA8 00088C888908208C08A880A82A80001002C20922AA2AA2A22AA00028308200200022200B22A00A20A40A30A22A22A20A20A2 102A22C22C222A22A2AA000000000000000000FF43060880000000000010080000004800000A840000000040000100000000001d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002000008004 28000000000000000000000000FFFF0A01000000000000000440040004800015211000000800005201408000000000000280 000002110084480000404284A8530108110500000208000540540100088040000000000000000000FF670500000000000000 0030000000104000000024000000080000800800000800000010100015000000008000029008000000000000000800002000 0010008010000000000000000000000000FF09978800000AA8000AA8808AA8AA8408AA800810800022A2AA043A022AA2A22A A0002032AA2020802A20022AA0420020420023223221222AA0002AA00200222222228A000000000000000000FF372C800800009d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001587000412 0000000040A008000000000000008002982B0800800124004010000800000000000000000000FFF4B2000000000080904900 8028128A0C00D008C88000102202002802A8200200224250000208200040200000200201230A00200A00280200200000302A 002002002002000000000000000000FF4DDB0000400000220000040800200002020080020041020088048020040000000000 020000000082000020000000000000000000000010000880000880000000000000000000000000000000FF51260000080001 0400020034000010A08010200000004581200407801008810000080080000100000000000000000000000000000000200A80005d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002043000100 0020120021024001004001400140000000000010008400008408000000004000000000000000000002882C00000000240008 00000000000000000000000000FF1C1D000020050204802880C489A081881A90C8208081092002842D029228020030020000 02002000002000802802002002002002002803003000803003802402003802000000000000000000FF88A000005000012388 3881C0303594B083C8B92B802010E48E02400442688400644450000600608040600080600601651600601700604612608020 602E006026806006000000000000000000FF8B2700200002820100040510100060100102260B000104406081C5441040040000dd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600200600400 4000000000000000000000FFD638000000000000000000000000000000000000000000000000000000000000600000000000 0000000000000000000000000000000000000000000000000000000006000000000000000000FFD61A000000000000001000 2000014002000000000000800000000000001000006000800000804800004000800004004004004000000000800800000800 001004004806000000000000000000FFCEA1000000000080A00A00080820880802240A128000120002002002040004802006 00000200A000002000002002002002002002002002002000002000804002802002000000000000000000FF79B30040400000003d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000A6000008 00350080490A830220400006006006386808085000006006006006000000000000000000FF65B60000000000218118010010 09000985A80A0B800000600E80620000004680600088000602000000220000600280200A0028060268860061000060104060 06006006000000000000000000FFB2B0010000000041882A14014211800A010409158000C5400E422A400440860000081001 461402A01023110174A654E00E4B6246A0E086106820926222086104006800000000000000000000FF40D300000000008180 18000A000102280108880180000040260020000040060800420000060000100020004060160062260060060260064164100000bd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2C83800E0900 96018018B180014472042A000600600608608620880620004100252000409000800002000604600E08700100610600600600 4006000000000000000000FF24A1000000000041840A0C880811821011002001800002420454882200400690001621001621 00200020200360000020020220A680680E016400804102006406006800000000000000000000FF6962000000000001808804 892801805C03029201800000C00602200200400610004F00000608032008309040E3423120022AB44641600600E2C004744A D06102006000000000000000000000FFB099008000404081882809025001120841A108918040A260362061200258A6006100007d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (044124006006 000000000000000000FF2974000000420021B01810810401000101084C81880000C28500050600600E006004000206040000 10200000408602600E086096006408006000046040814044004006000000000000000000FF7BC1000000000201A21C088880 03800801000801800000400E802806806006006026000C8600000600200000E0062060260060060060000062002060000058 00006006000000000000000000FF529601800000444180288180C9839491D1875CA18040A1E80501114681E0060060360002 960100189820181C4008380020418146026006017000A04006006406006006000000000000000000FF52610000000000018000fd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (163100000020 4008D826406286427B01008006004020144203804002006006000000000000000000FFF554000000420001904811C0342100 8905901881882020700604B0030840100060040000060002080060802040060060A600E0088802064B4000044A420AD00200 6006000000000000000000FF0961000000000603800800803A41A01041400E11800002400582C00608600200628400000E01 030000200010440E00600640E00648610004E43000400A084004006006000000000000000000FFEBF3000040000021874A04 80980181123D0708098040C0401C00428607E80200600400080662809008270049628612614F287087006040506B8801440200036040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (845C51A03809 B2B953A00000E840884806886006006086800C0E00800000684008E026206504040206008000004040805002006004006006 000000000000000000FFAC65000000002011800A93D83801801781801883800080E824084686087804606084000006040000 00200000401E006006006000000006004800004860004086004006000000000000000000FF482B00004002000D810A05801A 0180902183FA2180000565040010060060040065040214160200040020000340169860060860204009568040400148100051 06006006000000000000000000FF5B9B000000408101800849C41051A0400DD018118080106404044003014008006004010200836040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060060000 00000000000000FF38A700000000180180180180180100080080180180000040000020060060040060060000060000000060 00006006006004000006000000004000004002004006004006000000000000000000FFA50C000000001801801801C0180140 0800A01801800000400080000680700600600680100600000000600000600700600480000680080080400080400200600600 6006000000000000000000FFE81E0000000318818018C3801801811A25801C01A080106C0002510600E00C00600603000628 0004006800026006086004280946000000004000124402004086004006000000000000000000FFF5BE000000003801801C0100436040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030400608000 6006006106000946006006806000006002007006006006000000000000000000FFA314000000001805878B0F97E8141B00C2 8700E180000240000000025048140060A6A28812C00000086000006C06406C5E02061E056066016000006002006004006006 000000000000000000FFED9C008000001801800801C00801C4121000450D8C808CE009424D06036444B4E8CE410002108000 14613104601610E004221086206006824880005002006006006006000000000000000000FF58CE0000000018018008118008 41801103100001800000604000C0060061060060060C0402000000006000206006006004100006006006404000004002006000c36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20C010008003 4000010060040C42030970068000360202560002010060000060070060040000068070070042000050240060060060000000 00000000000000FF8B94000000001001801901C0180088980894580A01208C684D0048B22048330270060010060001000060 808060060060860000A6006006006022006006007004006006000000000000000000FFCF9D000000001001801A01C8180080 1C20889A0A0A8008E82427C68232C2AA2EE00E0C020E2800000060A022700E08E02408088602E00622C4C000405600700600 6006000000000000000000FF72CD000000001801800B0180082029008894434B8140127050B02152214036006856000C528000236040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6A8000000000 0000000000FF2192000000001881901001801001322804808085000080E128C0212629430F006C950408A208020044400000 E2062070060800441262860070000274540860A6096006000000000000000000FFD187000000001801801001801401000A00 8000010000006000002806004006006004000002000000004000006006006004000004806006004000004004006006006006 000000000000000000FF59B1010000001005800901C00854811290805800000000701020F003107006000006000006010000 846010006406C0640640080640680680600000680C007006006000000000000000000000FF5E1F000000001601E00A01800C00a36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108000080000 1080004805204A001010021250000094640418E106000000000000000000FFEFF20000003000002440242224540440640001 0400004100305209000801000061102001C02804000100000100004400080000001001800804020002084863200462860000 00000000000000FF13C500000000190180220380000808008080000980000066000CA2806248024004040202061000004E42 0000602602608600000400624645E00006604400600C006000000000000000000000FFB708000000001C1182A0D58D220A21 0350B422510000946A0114A202824002800824400A0AA10808894400CA692692E916020C04A06826B16A80806884806C0E8000636040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (ACA0C10D0280 012030CB44220220300340B0020012230034010CA0010030032A34A200108320344333341344AC039030830C300200000000 0000000000FF5DD40000000412802A04900402025300022A0000000080080081080084080C810A00000400800800800400D6 8D00A80D40800A00800C00A00800811484000810800850000000000000000000FF803B000000400000A00440C90000808900 80280080001C200E00700280000000200C0100020020022020002022820020020200022020220020C0003032002082002002 000000000000000000FFE33D00000000404801810850C1000024081182A300000281C42004701082800060A010102C01E20800e36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF399E000000000A00A00A00C30A8AB00A04A008008000002A28C4210281291280288A000802802800803000902842 C52D52090802802812802842802052812042C02802000000000000000000FF222F0000000014012010432032410082492282 00000103090500C8148C4004800A24000000800820800000A20A80900800C409009088008108088A00840009008288400000 00000000000000FFFA5D000000001841805885801955321805081801800012E20408C14C12688600628E0888861160004064 0055650600600620020610610E00604008602C2262160060D6000000000000000000FFE0650000000C4D00828A30954800C000136040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002A82002803 002482A02A82282A80082A82A82A90302A82A8000000000000000000FFBDAD00000040035435431030428832034C31015400 00CB0800C50450CC0CC0D10C41000D50D50840D508008C0A80D08C20450D40D40CD0C508508A1550D51440810D5000000000 0000000000FFAC8B00000020040048000041040040A000454200000100100100080010900100100180100100100128000100 1149031000001011001101001041001801000C81001000000000000000000000FFB54C0000000000AA0AA08C080000022080 0820AA0000A801500802202102202A80100002A82A80002A80000080580400000002282202A03A00002082002A021818028800936040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (88C000800000 200220A08220A09200201200200200201008200200210201211209000A002002002010002042002012002042000000000000 000000FF2D400000000000AA0002900800AA0C00AA0002AA00002A82A80103510402502C82200002A82A80000000002AA20A 2022503002202202A02A80002A82002A88802A8288000000000000000000FFBBB000000000000000004005004200C0000424 0000000002001008800000080400800000000000000000002080000001080800100080000000002080000001002200000000 00000000000000FFB0250000000000AA0324A20A20AA0802AA0804AA00002A82A84C12002002802882A80002A82A8008028000536040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF66F2000000410C20C40C00D20C12D00C00C50C02800108B10113310308301240340300B0A31028000830020020821420 2231000A112022002888403003003002502002000000000000000000FFE34E00000002180D89581381182180188B8810218B 4042444600604604600601612C00400600E00000630608600620E10600030600620642600010611454600400600600000000 0000000000FFFC3F0000000014002C405225520021420022100100010048050C482C920840840904804800804800A4800480 0820920820020900910810800820800894800444800800000000000000000000FFBCE900000000080080880080080084080000d36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000020012008 000000001000028800000008E000106106000000000000000000FFE42200000000800000300008A0B00010910C1024048012 00000200800040040162500000040160000002800800003000002884000000C0440110280088526000286006000000000000 000000FF424700000002106288880A80090088886291080000602022A045405200240A00208220A002084100082002802D82 9224A20000C2092002002000102006002006002002000000000000000000FFED6F0000004004084204004245024104404094 0008010090050890210B90002010054050A1000000001004000000008618000008008318000000001061019180000000000000336040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018800004004 20210E00C500012006426006000B0009624710700720602608002600E006006C400860061040000860820000000000000000 00FFB2FF0000000018011A10A180984008F00980010506001002000064060440E40C000600401602100000621640646601E0 1E0000060060960271300060A6000000006000000000000000000000FF845800000000180100100102188410182115002100 A002841002E04628400810440600400604100000600600610610648600000600610604700000614601400000000400000000 0000000000FF729D0000000000000000000400420201000200C211000A801000048052800804E4002400080004001100284800b36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 41B20000002890AB8898AB8898A1A8C0852000010000002AAA08A01E2041D42C82240062AE2A80003268060661067C640400 03AE22E2AC01C020644A062AE0042A8288000000000000000000FF333700000000500180180080381580400310C015000000 2000C4250604C21002481480600600084000E00621644600620E000006006006106800026046002414006004000000000000 000000FFE2D10000000418010430018218000410498201218000534004002046084044006086006006000000084006086096 0560C400000610600424401011408E0000C0000026000000000000000000FF23FD0000000018410210A1809800049109800000736040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006036000016 016116006840016010006504006046000000000000000000FF602B00000055595591015510594A149943B221550000551310 52650655551251255300243255000C55700613608600655600055654E4D65560445565405525545505320000000000000000 00FF8C3A0000000CB0AB8CC8AB8A9895880089A800CB00000422AB1220862A420028F22C0062AF2A8020226006D0EA3600E0 840002262A62242A40080852A72AF02C2AE28E000000000000000000FFF0B200000000100180280080980180201100000100 0000204300A02E00482002300400600600000000600640621650E00600000600600600601000700E0020040000020000000000f36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000042849241 56004052002806006310800814006006216206246004000000108014004824004002002006000002000000000000000000FF B75100000020180183300180180180D8D5B05005800000681400600600010604600200202000000000600690688608600400 0006006004004008004800806806006006000000000000000000FF0E040000000AB8AB8C10AB0E1889C8180101108980002A E02420E2062ACA0228A2AA0021002A90042AE00602606E84E2AC0002AE2262A42AD0042AC2A82AA2AE2A82AA000000000000 000000FF988A000000401801800001805840031841055001000051100041642601500600608200200200080000E006006007000b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF4F96 0000000898A98880198AB8D38018918AA08D80002060042242AE0062A628E2362062402A80000062AE186006086044000220 22000400400000C2222AE3060CE28E000000000000000000FFC57000000000580584214500182181180B8000018000006404 00400615401604201611600000000405600601611604630400010011000410400404408200204E0200020000000000000000 00FF5B8600000004180180000080181012382180004580000B40D409400640400600608604615000000028600642644640E0 4C0000080004D424C000484012006106406046000000000000000000FF699A00000000180180000001384202180183004180008b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 8000C004004086000026000000000000000000000000FFEDD50000000AA0AB8C088D8AB8918CB8AB0090AB00002062103202 AE31600608C22622E2A02A80002AA2A810E0CE22E2AE0002A02A02A82AC0002AC2AE2AE22E2CE2AC000000000000000000FF E67300000011411591114595590010D84195510980004D650044455640654E55054243650AD500045525504363164D600E00 055055045054400454C44E550416510550000000000000000000FF3E4200000000000180580180180180180188100180000D 6100014006002156044106006010000000002000246406106006000010008000004000004006006006006004000000000000004b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000400400440 400E40400608C0160000000020000A644640E00600000600E006006000006002006894806024000000000000000000FF9C65 00000000000182103080000102080183020180000B00C40AC00615250204410E004007000005002000217116047006800106 10600600400400400A400006440004000000000000000000FFF6E50000000AA0AB8918408AA0C78888AB8440AB800020024C 2042AE04642648C2363242A42A80002AA2A80060060862AE00022E2262AE2AC0002AC2A20AE32608E28C0000000000000000 00FF14FA0000000400218240018018020218830010410000006028092006136002000006086003000004002000006046006300cb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFDA0C0000 00000081810C2180184100B800831608804040614802408C2540100040060431061400000820400460060062000100060060 8600E010006000011014000004000000000000000000FFC2480000000104C9C41905827A21041890801D00940015E4801040 0420C00000440618301700000108202003E80690EA10808106006016444488104280006824806004000000000000000000FF 94C40000020006098010008400011000C41000400080001000006004004082204006004A070000840060082862868560860A 0206456406006104006502040044400004000000000000000000FF7F1E000000000001C0D882800249002000102000000000002b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600602644 6000006086406020006184000000000000000000FFEBA8000000010021841801021803045811081871052000623008211400 410400C0860004068401280020081060A600E2B014000E006186484280104006010000000004000000000000000000FF4AAB 000010000401802C08800020020830840082808000109002A3262AE2080040260000870A0400012300016206006002140006 206006226030006010210804086204000000000000000000FFDC890000020000218098C28000000908229480808820340220 14000604200C404406022896080000002008206286146102000506456416054400004000046014200004000000000000000000ab6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (290080000000 0060000401512200000000002A0440408130000000008080480000480100006100006006000000000000000000FFCC5D0000 100000018030000000010008400C0020004000044024200410000001408600080700200000A11000E2060062460A00062061 2610650000600E006020100004000000000000000000FFAB760000000000418018020500431448880001000D000881081020 C442C5540040260001160A00000024000060D615608620000E006006006048006086010000006404000000000000000000FF 1AE800000000000180181300980109B8810018050A0008E0002124040040A000400600000E00045000200000600E0A600220006b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (169A00000000 000000A00000000800022840800000000080C40950000B10000000A000100100000020100010004000000000001000800000 0000000080000000000000000000000000000000FF48CF0000000000AA82888A0EE90008088090309080002202AA02220028 02A22AA2AA2428028020002AA0000020020820020002222222320320000422220AA2262AA2AA000000000000000000FF777B 000000000000104000000112048004088010000009000400005004801400400408C406116000004000010110040404000110 100008008000030010406008006004000000000000000000FF80DE000000000000000020000020004028040022000000000000eb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (22A2222AA000 2AA2220AA22208A0AA000000000000000000FFA16100000000000121204321000120844140D0430000044004154905095000 0000005090310000000010000404001000480000000000000400001000100000C4220000000000000000000000FF46140000 0000015592192D9258C195390312190B0000547414424556C074AE55740F54754F55600104E0004363164D75460005465465 565560005564563564D4536556000000000000000000FF7A650000000000AAAC0888C8082ACA288C820080800030A2AA2022 2A2222AA2AA2AA0022823320002AA00030A0CA22A2820002AA2AA2A228200020A2A22AA20A08A2AA000000000000000000FF001b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000008 20C30400800000000000040800000001000000000008020000400001000008000000000000000000000000FF1CAB00000000 020009200A03205403004000204800001284A00280005010202011000010110000002400002A044040891000000000008800 0000000010200110020400000000000000000000FFCAF4000000000000000000000080004014010004000000081000000004 0508000420810100000002810000010110040040000110100000000002000100000000400000000000000000000000FFCF74 0000000004AA8208A08908048808808A48C080002020002822AA00A0020AA00A2B22222AA000182000002002082212000222009b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01C010001081 01100116800100010155153900000008005558084500050000010000000440000040040404102C48000008000A0850880000 020480028218208000000000000000000000FFF2F3094094140840840800810800800C0CA04C400120800200002522229143 00000028220240200000B4832020CA20A21610200211000211200000A006842002002240000000000000000000FFAB040002 000000001086040000800102A00C808004000000000880000008000008000001100280020000008A0C000200400400018008 40000412000200800000000000000000000000000000FF8DD40002000020000000000A010004010015400A00000800002200005b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020020000020 02802002802000000000000000000000FF73CD00800000000400400000800000000020020000000000004008080000000008 00000000000000004801000001280000000000120000000000020100048208208000000000000000000000FF05E900000600 0922802800840800800C22844852800100080020020200100200006041240200200000200208300200280200280200000290 200041B002003003002000000000000000000000FF2F231001041438418C1803811901009833003043032108020000634600 0144000020D2648F40E00000F506C86146C1643612600611000615620800E006046006006440000000000000000000FF3C9400db6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000620000010 60A60060000060560161060B6026206406010006006400100006006084000030000000000000000000FF4803000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000006000006000000000000000000000FF02390000000000000000000000000014000000010000800000000804001000 001001004004000000000800004000000000004004000000000000005000006804006000000000000000000000FF944E0000 000008208008008008808408A2A88C0580000000000042020000020000000020020020000020060A28020020028020020000003b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04001801809A 29809941081901201020004080004008610208182380800031600E0460000168070002850A60262102020000062062104044 46220006200028000000000000000000FF34C8000000001801801A11A11A21201A0120100000000000201060020000420401 008860B6006000006E06022C4600628E002002008C06066000000106006086006000000000000000000000FFCB4E04000000 1C21811821822020101840100000000090805000202E10000601000042600602600244E00652600600748E14700600000740 E05280444EC4040E406000000000000000000000FFA7F800000000180180180180001000100004005000000000000000060000bb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600040404664 6006806000000000000000000000FF7E20000000101E21805801801CA0801000C0A801000100104100490000100E00000001 6047046080006006000006006006110000000106806008086406008805000000000000000000000000FFBD28000000081813 885C85A00000E01408900885000000000000A0000004120000100061060060810460A7882405006806002880000006886000 084006036006000000000000000000000000FF6FDB040000001C41801801824410801020940A100000108008000050000002 44008004600604600045602E5120270160060A2002001206016029086556000416006000000000000000000000FF8B1D0000007b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010909006206 1861044060C60064440A610E006806020507010054256086000106000000000000000000000000FF121B0002000018058018 0180000002D620000000020000800000000C00000600005100640600600080628601700682624E1060060400060000000049 07006004006000000000000000000000FF2C2C000200001813801901808000005800400000002000000005080C0002060000 00006086106004046046006226006006006106000006800004000806000806000000000000000000000000FFC65900000400 1821901C05809C00C6391090AD0500011988008260080010060600101066268860000161071000241861860806000000861000fb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (188590182180 18491418233094004000400010024104001016021000106306007001C06046086044006006C07106000040C0621000400600 6006007C00000000000000000000FFE898000040001801D01C41801801289C01001000200001042100C10400000E0480A080 600600608400620710608C2163460860060800000160240C8006001006000000000000000000000000FFBE9D0000000018C1 889A01800001881883A01C00000000020001008000000604000000400400F00000600610611431600620600608000E000000 504006006006006000000000000000000000FF64280000400118B980D84180001580309B971860020010014106000000085600076040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006800004 000028000000000000000000FF66DC0000C02D1131811A49801A01901A41885911280004681012600404100684E00054E200 4044022020460C482601600640640600080640024A106006007006006200000000000000000000FFC9AD0000000818058098 09801841A01A01C13800000000000088500000100400006082E00E00620001F00600600400F0060060060000000060200840 06047004006000000000000000000000FFBBE940000003182DE25801821815841841911AA808001201002040300200660080 002060062160044060478364C40060A7C26206000511006094006006821106000028000000000000000000FFAB3B2081420100876040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060002140 0001610608000608600E006016000000406000114006006004006000000000000000000000FFB07200000000000180180180 1801801001001801000000600000200400000600600000600000400400600600400600600600600600000600000400600600 0006000000000000000000000000FF89B7000000001001801801801801801801201801200000600100200600000600600080 6000004000007007005006006007006006001006800000006006006002006000000000000000000000FF50D0010002200001 D21A01821C09841A05801A2100002068004068A400003700600000611000400400200600408600692604610600002600010400476040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (811801801801 21182A104B120000A00010446934400D4E004440116250006116A4640F002916006D568168060000500062AE804806000002 000800000000000000000000FFB9350000000A00018238018891C320119A020AA80000800000002806000006004060006010 08700080E00648090600680642600600051800600008C006006006006800000000000000000000FFFBB00200005418058058 41885201041A01C2C8201400082410056054101356114408C4EC2010402612700604A4464260870D70060480000962068048 06000006000000000000000000000000FFDEC30000000010018A180184981510182388088A0000452000006504000006004000c76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000040060 00000000000000000000FFFB16000000001801E01E018050812018A2D008000000000000C8E4264004820060008860400040 0000640600600600600600600600004E006028005006806006000000000000000000000000FF4E2400000000001180980180 14018096108038AB800020400802609400802800643100E40808693102480E00C08E20754E00E08700000600650000E00600 0006000000000000000000000000FFD3A0000000001001801801805D01A21920C098418A0028420013EE2C09028A88E21842 E22810C0600A608703C2A66A608E086106028A0628E000016006806006006000000000000000000000FF48D500000020081300276040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60A0C3680082 6C94C16AC7086896C06836200886806800C04A86800A84886000000000000000000000FFA4D9000090005909901809801A01 8092052C8009000040E01000601400011408600140F2080060009060240C6006006A4614E2860000060C620004E806106036 026000000000000000000000FF86560000000012018018018018018010010000010000006000806004000806006000006000 004000006004804007806006006006000006806000006006000006000000000000000000000000FF8438040000000C079018 418450511018009058040000050010006904001041006000606000406000206007406006006006416017000906806400004000a76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400494020430 20000012000020010861C1000008000800003B00404001010000800000801001A00A00000001901300100180000867880760 00000000000000000000FFFEFC0000000426002080001000080082080A410000014000000200000001984000000003A82280 00000100008000400200300000000000000000000780006010086000000000000000000000FF6BBF00001010184380190D80 51411051941008080000150000046000000C2600600000E4000060000060041262060060060461C600000600600062400604 6026100000000000000000000000FF873B0000402C9825829C81AC9C95205928202AA40000800000A2EA400000248060008A00676040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620E00E00000 0000000000000000FF57AC000008704A54A22E22C14C12D00E8ACC0D48000009208943310200040320200011224140B00100 3003113103203A0330B08200108310B0090032531031030A2000000000000000000000FFD68C000028400404000280290090 20024240A2250000000000800E00000000004000804800800C00001220810900880C00C18820200800880A00800800800800 800000000000000000000000FF321A0000800A4828C608008208040008008508C0000000801010206C000800000001042000 0120000A200A68202200200A00221A000002002000002052102002002000000000000000000000FFCEEC000000008090484000e76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A80002A8AA8 0800002A82A80881400002A83A00020202A84A80200A8000000000000000000000FF2512000000000A00A00800A20A00B00C 00800A008000802800A0A802000412802000902800002A80802002852D0300280280284A8008028028808128028024128020 00000000000000000000FF131800000000000100100120822322A04503420100000040008A080C0000A40040008548D10008 00000000C04849004000C40C80000800810C00A80800C00880C00000000000000000000000FF226E00000002180180190192 194184582120B805800042600010644600088C00600002610000650080688620400608608604605600000E0060004161060400176040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40C00AA4820A 202200000000002402800002200000002A82A82A80002A82A82282A82A82A82202400002282300002882A80A82A828800000 0000000000000000FF457F00000055415415455410032030034C5523540000800800810C500002D0800000910910D50800D5 15508108C8D50D50A00800800CC0C50800D30D50950110D30000000000000000000000FFA628000C00600400000200440410 4000080104900001001001091050001101001001001001801001001001001000001001001101001101081001041001401801 020000000000000000000000FFBD700008000AA0AA0AA0AA0920880000882800AA00000000004002A000080000000020020000976040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00000000000 000000000000FF868A0000000008008008008108048008008408048000002002042002000102002000002002002280002002 05200200200204212A002002002080012002002002022000000000000000000000FF14430000000AA0AA4AA4AA0900840AA2 C068800000000000002802080002100000002A82A82A85022A82A83802AB2A82AA39A2120002A02A85000002AA2A82A80880 00000000000000000000FF089C00080000040040000044400A03400000000000000000001401000008000000004402400002 820000004A04000000000A8408000008000280000000001220000000000000000000000000FF197C0000000AA0AA0AA0AA0800576040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (090010050000 00000000008081008048641020000028781474000000000000000000000000FFBE98400400408C20C00C40C00C08C04C20C0 0C20100130250B00900201100B0820010030031530090034032020C304201251200301201211304800200200300200200000 0000000000000000FF8D910000200058098218018018A193110984100182C004600610600600004401610000E00E40600000 600608400630634600648608628600640000602E046004006000000000000000000000FF991A000200201201201201223248 2010530033490000800800814940000854804800801001004802800804804800804800800800804810800C02AA080080080400d76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080090008084 00200400401000000D0408288420000100400000006000408040000000080010000000100000000410406000016000000000 000000000000FFED4B0000000100400000000000810C20800000400000220200010004008004080080000010080000006400 480020C40200300000100520130410000000006008006000000000000000000000FF12E00000200029188608028008248008 0012081012A010A08208010200002A00800000240236A5000021020028821928AA802E024020020020005431020227021021 00400000000000000000FFBCC7400C005804004004244004084084284004010801090009005000001001004061009001001000376040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFA73100000000182180980180180114484382103100000860160060220000005060100102044062A00060860070 1610700700700E2060060065000A5006006286086080200000000000000000FFB75A00080000182184982180198182293312 0124028024600E16202E2004B00064880080040060220060064161CE0262263065860060060062A200441640C00421600000 0000000000000000FF7C630000000018898018418038030008010080000CC040602600008E4A812201612000008412600000 6006006006036226206006006006086020404086012004400000000000000000000000FF844B00080000000000000000400000b76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600608C00600 62062A630600600E016200006506400012000000000000000000000000FF3F5D2000000018AB8AB8AB91D8859000A10988C4 80003040042AA8100000142360002AE0061162808863A64461D62AE1661064160062AE2A64003664760AAC42088000000000 000000000000FFADB2000000049801801801801853880001000C22000004E006000448000304806000006006406800416806 01602600608E2AE22600600600690008610E404142006000000000000000000000FF73AF00000008380180180194380104A8 15845011000010600600610200005210E0000000040AE0000460162C441600620600608E006006016200014206000416240000776040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (410002080000 050005001504000106084000006006406D001270060048060068060469460061100968000050060060064060000000000000 00000000FFED6A40000010595595595595595595490310414C00004CE007429404000546554000556006556284C075564464 0E5560B600E04E0064C0446104554056151246330000000000000000000000FF70080000000A58AB8AB8AB8218B182C88B8A 488180002040042AA0400002262260002AE80602600021622E0944062AE2174160060062262260802160862AE08A0AE00000 0000000000000000FF4AA700000002980180180180180100082980080180000040048800D000000F0060008060060060000A00f76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFA9D90000000C1801801801801801000041821435000003600648400400001600600000600600680401480608141600 7236286206006006000A04004AA60004C6000000000000000000000000FFF55F00000000D80180180180180180180B08D800 00001000040048000000860040000060060060000C6006004086006086806156006008006100006016406014046000000000 000000000000FFFBDB0000000018AB8AB8AB8AB8AB8AA881051C80000020000482C2A80002262AC0012AE8062AF2862162AE 22E1662AE00602E8060062A03AF0062AE0060A8104288000000000000000000000FF39070008000118018018018018010008000f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006206006026 006116006000006000004006004004004000000000000000000000FFF0B30000000AB8AB8AB8AB8AB8038418B18A58490000 30400440422000000622E0002262262AE0002AE2AE1004062AE0C600608E2AE2262200003C60064AE20608E0000000000000 00000000FF5E470000000018018018018018018000038018A300000440342541000005061060000060160060040040064400 160060260D600600600600000400601600004E400000000000000000000000FFD1810000000018018018018019298CD80980 B001000008C28408401400003600600009610600600000600610852600641620624600608E0900000544A620610604600000008f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (189500000040 0410600400028E10E00600E0060060000000022360260064861060060060080060000160460000B402000000000000000000 0000FF9A410000008AB0AB0AB8AB8AA8AB8098AB09588100002862AE2862860002262AE0062A62AE2AE0002AE2AA2AE10E2A E40E22E2262AE2A82AE0002AC2CE2AC2AC2CC000000000000000000000FF7679000000954154155955955128100101931801 000025453404E5540000464460065465565560045505500060965560164564CE556540556004406516150404510000000000 000000000000FF3DBD8000008010010018018018018458018218510000056006016054000006006006016006006000006000004f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF802E000800000A0080180180100114100002900A000032E006082126000016004004906006806000006000086427006456 486446006086080000004526405094404000000000000000000000FF67D5000000801001001C01801001415001801C400000 00600604300400000600400400F0060060008000008160960070060560060060160100000008160040040240000000000000 00000000FF4ED00000008AB0AB0AB8AB8AB8AB9018AB88388400000062AE24A20C0003B62AC0042262AE2AE0002AE2A82260 462AE18610608E2AE2262200002AC0060AC22408C000000000000000000000FF141D0008008000000018018000040120230000cf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0600E0AE0060 0600E49608E04020400E084226004000000000000000000000FF7571800001100800901801900031431020895021000020E2 4708600001000601629600C0260060C000008200000700621600640600600604642040601615440600400000000000000000 0000FF7F8F800881C89281401C8D80110130B0A084330590800660160C740000000600E00EC0500680600081F080880006C1 6A4701F20600601612600100502602D006004000000000000000000000FF1253000080208C80E01CC9C55001005080001000 00A000608600600400000600402504640600600410080011600608608680688600E48601000C800046004054004000000000002f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880028608600 60A008800E00630E00600600600000600610204601600600600600600600600000600600422E004000000000000000000000 FFE0CA0000018010030218458070C91610090419C782400063162864080200A628658600628E2060A8100004238086506086 006106086006006430024006224016004208000000000000000000FF5893800001800C20815809C0800440008093504000A0 02600E02600020000600604600400610600000040208203754E00E1260B622604600E2000100060040061040000000000000 00000000FFEDC6800001801001281A018A91080000009090009000416427046002008004006026A54246006120006002002000af6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF3F 7C80011202405400000002002802004A04003200000060060000200000200001001000000001004060A84905200004102004 400000900902C0208520006008006000000000000000000000FF99CB00000100180384180180101100104811112405000462 0640601424012620604200208630612000640600610648610E08601620602600600000800600400608400000000000000000 0000FF1E7500000100180181581581102300908200300088402861161460A011001610641200221600601000000422E01604 600604614614600601642004400624422E004208000000000000000000FF9074000001061841801803805121049023041801006f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A42A30A2222A A2A22AA24020A2CA2AA2AA2AA000000000000000000000FF0E541000002282A820000028A40000200000000A000000000002 1124000000004008008001000080200080080020800080100000800000010000080040000000000000000000000000000000 FF15520000000409008AA8AA90010010008088800100002AA2AA2AA70000050223822A2222AE2AA3004AA0021420422AA182 02208A2AA2322220001A20022AA2A22AA000000000000000000000FF70500000201101000000001121021120000041000000 006006004090000510100000010000000042006404024010000040090000000000000002004010004000004000000000000000ef6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA2AB0024A2 0002AA2AA30A2022AA2AA2000ABA232024032AA08200200A2AA2222220090A20020AA2AA0AA000000000000000000000FF34 C080082140440840140140120104100502900500000000000010040010100041100800050044000008A00003010040000401 10804000000100040000000000000000000000000000000000FF70F0808155901801D55B5584190580992D15594180005565 5651600E000D56556446547557556210156C564560965564564564CF55655654648843651655655635600000000000000000 0000FF26E600008A8908228AA8AA82A82A80A8C88828B000002AA2AA2AA02A0000222A222222A2AA2AA0200AA20A40A00A2A001f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF243800 00000A00000000000000800000200200000000000000000040500C0006000000000060000011000000000080000000000000 0000280000080001000000000000000000000000000000FFA01F01000404404040000015210C144032000042000000000012 80000000000001001480000001002000890D0520000010440341000080088280208520000000200000000000000000000000 FF7AC308000010010A0004000000200080000000100000000001400210000000000020000800800010000000000010800440 090000000010000001000010400000000000000000000000000000FF30A48000A880C8048AACAA8008509408808AA8808000009f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (506046000000 006001004000000000006000000000000000000000FF3A0D18000410002260100000151000020044A0090000500808024204 005020044004004004404151020004C04404044404800000200000D41150D0120800008020C000000000000000000000FF68 09100004000800900800800A20800804A80A00800028200200200200200200300280200282200080220A0020022020022820 42000000002800006800000000002000000000000000000000FFA20300000000000002000060000800000000020000000008 000002000000800000000000000000A80018002002000203080000000000008200A820000000180000000000000000000000005f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020002060060 02002002806006002000002006002002002002002002000000002000002000000000006000000000000000000000FF0E6300 0040000024200000200000000240000001000000000804400000102000480400000100400204080000400000000010000040 0000000002004401000080208000000000000000000000FF4D7D100020000800800800800800800820814800800000200318 2042502402042002003002C02000112002002003002002083002000000002000002010060000002000000000000000000000 FF8565000000021801921801801841801C259018010000006006006A0480488600700780400684400080641500400740608F00df6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF3FC1000000 001801821801011829001801801028800010200C0AC406002002106006000006026100006100002116106016006006000000 006000086000000000006000000000000000000000FFDAD50000000000000000000000000000000000000000006006000000 000000000000000000000000006000000000000000000000000000000000000000000000000000000000000000000000FF1D 9700000000000040000100000100100000000000000060068008008000000008000048000000010068040040010000000008 04000000000000000000000000000000000000000000000000FF1C94000000000800800800A00800800A0080080880000020003f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021000480064 20022000040080026000000000000000000000FFA88C000030049021025805001A41288A01A0140084000860000040860064 46106106800106022088820504420027486006024812100000706000516010000300406000000000000000000000FFE42C00 0000001801801801101A01123C0980100A80000060040043060060060060068008860020002464048C008600600E85680200 0000406040086000018500046000000000000000000000FF75B3000040049841C01841001801432851C01084820002200000 480600681200600610808E80020950800050004600600620600608004800620082600002000000600000000000000000000000bf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (640682F00616 684629E4260020000069065E1086026006004000200018C06080452400008000066000000000000000000000FF000B000000 000804085802A0BE00808801401801000000600A00780701620600700E006106802000000206000006206006004008200001 106000002010010000006000000000000000000000FF29D2000000003083901801C958099009258030400080042016006206 00480700604E000C16102000407000000006806006006000000280006000822200040000006000000000000000000000FF12 32000000040A00C01821889851800821001D40820002281295700600480E10600611000E80240008830020000E00600640E0007f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (530000000110 1184B80100188500090D819221000100600A70715200600600600600080600200000080200010608649621E2160000000000 00906000000040806000000000000000000000FF3246000000000800001820001808081811A41005000008600E8040020040 06806006006007002204006003840006086107104106000000400214006000000100006000000000000000000000FF106F00 0010604800821800001800005821823201800000620200400202402600610630602E08200440000280090782600600600608 0280000084086000040080206000000000000000000000FFF4540000000415610218009619D096A905821C41050005EA060000ff6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020011600400 4018000241006088000000000000000000FF3C2F000450741401601800001800042801053820000000700E0448001048444A 794681600600200480610400008628620608C006000000556415405420200000006000000000000000000000FF1FB2010000 010010021C4000180005080104190480000068020AC0C80040040060060060060222801000042412A600620E08408E100010 406288084800000080006000000000000000000000FFD98C00840000140108B8010418810288018010A1000000608604E002 00600600600600000602A080886042400C46006006404406080008088080006008000000006000000000000000000000FF130000e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100006140140 0328060860060000060C6026006006046404000800000006006006000400000000000000000000000000FF980C000011B010 15845840809A11A41A43A104030000016886842506000046400200802006406804006004806007487006286844000200D504 0C446446C00000000000000000000000000000FF8D5F00000000108B101820001808000801805D8100000060060028800060 04006206106066282000006106000107007406014006001000006000024010000000006110000000000000000000FF31C400 02000000001A3C00049814100927801C03000010E1820062208070040060070A78060120040010460A0026006006A24226000080e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100100180 180082180000000D901121084000650602200608820200005054610603600441640641640604608600600400000000600400 6006000000000000000000000000000000FFDB14000001800001801800801801801801800000800000600000200600000200 0000002006000000000006006006006006006004000000000000006006000000000000000000000000000000FFEBE0000401 801001801800801C018018018000000000006806002006800002000001002006000804006006806006006006806804000001 000004006007000000000000000000000000000000FF69FF000021A40101801800801801A05A01A4002100008060110028460040e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (166030506006 400000000000000000000000000000FFB1D900000100080180380180184001020181404184409465500C3556440500000510 00E556116414000146006117507516806806000501006284006006000080000000000000000000000000FF354E0000010020 018018018219E8074209806021000000608E70200600000000000000600640E0042070060062460060860064441000000060 04806006000000000000000000000000000000FF7AD0000001203A01841840801814100001801001000080E02800A2360008 3043050000E00690640004004602600E10E427027006440000046040006006000000000000000000000000000000FF0AFC0000c0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (024300000461 06400000800006017056806046006446000000006000006007000000000000000000000000000000FF538900000180180100 1E00801800000000001C24722011004E00208640000200044880602600040100682600600740600600600600028000628000 6006000000000000000000000000000000FFA4C0000001E0020140180080182180980000A881000004648002A23602030700 008000E30E116110000886006116886D0E0060240000000A6010286007200080000000000000000000000000FF828F000001 801101001800801801801800080985182001E2260BB22E08822E0602E828E0060A630002EA262260060AE2060260442A00010020e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B038CBB15A48 C23A0A20A34120D0488000A008A0802004200C02100108A06C26CC880092888EA8E40E80E886C4EC06000220B0E880D0E846 000400240000000000000000000000FF0B8B0000038298018418838898C188180B0812828000006006234314101106C28000 04C109000088006006026006286206886086000000826229006006000020000000000000000000000000FF11320000018010 0180180080180180180100100080000060000040040008060000008040020000000000060068060060068060040000008060 00006006001800000000000000000000000000FF0AB6000001C008814438408018041140040018008000000000082006001000a0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (021920020000 20020000000000000000000000FF200E0000400100C000A0010400A414000510128000000060068300000000046080804000 00004180006008009409008480680000000200660000008000000200000000000000000000000000FFC54200000208020058 0014000040000002000344000000600620088828024002000000064804800002E000101B010011001002000004000885A000 0060040000010000000000000000000000FF7970000001821839801883881900000121847008800010006600260400040208 000806603640000008600620601650600601E086000000006040206506100000200000000000000000000000FF61370004010060e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080002604600 4000006006106006006006106446000000006000556146020000000000000000000000000000FF56E7000400C04C30AA0C08 C40C00D20C4CCA8A10800151304303220200100200800120BA134C308110340B00248A2824832530120004012432A1803202 100000810000000000000000000000FF87CB0001002082034602004002082082D02980210000800880008800800984810800 A19000A20808900C908A0000281200860C50000020800A08C40000000001000000000000000000000000FF431D0000010468 0000482892A802882808800A128000612002442854000002000000002082186002002002002002002002002002000000002000e0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000AA0880AA0 8C0AA04000000000002A82A82202202102202A8AA82482A84000400A83180882A82A82A80000000000002200002200008000 002A8000000000000000000000FFCBD6000400A20B00800804A00C00A00A209028A080008028028020021009128000009228 02A02A00C02802C42803002802B4281200080080284088A802000000000000000000000000000000FFB3C100000128A24B00 1220201242200294230015000080080090888C84880480000080000094C8408008C0800804804804808D40000000908C0000 0000000000000000000000000000000000FFE6ED000121851801805805901943801901805925000000600620602E0002A4200010e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF20980000004301320AA4804AA0821284AA0AA0B000002A80A88C82A00402082A82A82802A80C 00102A82402A82A82A82A82A82000000002A82002200000010002A8000000000000000000000FF221600020000C084554130 3543503543000C20100000D50D50521540540D48D50D50D00D50930A00950C20808D50D50550AC08C0000800D50C40D40801 000000550000000000000000000000FF4DDA00040000000060024A0004004000004006000001001000401800009140000001 031000401401001101000000001001001080000001001001001001000000000000000000000000000000FFB6C700000000000090e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (810800030800 C00940800000805004800800000000914C10808800804800000000000000000000000000FFB5B90000008088088008288008 00840A0080005080000420024420120000120020021220025022000020020020020020020020B20000020020000020020020 00000000000000000000000000FF42160000003044800AA2800AA0D00040AA0AA08400002884A80002B05202002A82A82002 A80100080A82182AA2A92A82A82AA2500000002200103B20020000002A8000000000000000000000FF35660000002A043000 020400000000000A0082C40000000000808008000000000000010000000000200000520000001000008208000000000000010050e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (050044048000 0400000400000060060100100500100120104100102100100000110100000000008010008020028110100008000101D00100 0000000000000000000000FFBC90020440C20C00C00C22C00C40800C1082040080000120AB40310300124340300300322300 3000013403103003213402002002000113003100002203003001000000000000000000000000FF4F63000001801801801809 805881881841800001000000600615600414000600610E00E08E5061000260460062061261064164862102460060000C6006 004000000000000000000000000000FFAA480004010A322520100520022D28C0002002030000800A0088C8042908A400000400d0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (486300000000 000000000000000000FFE42800000000000800004C10000005000410008200002064160402D00A8488208320000148500400 1060000000900202000000080000000002004882A8080200000000000000000000000000FF29310400000000200000440410 0000004100000000000160D608808002042000409001011000008004E020080C04C48C000080040000340801000002000000 00000000000000000000000000FF4FB800802000080001488880282188080882004184400021026240024800041020265022 02282100002382802042082002A82202048002002101063002400000000000000000000000000000FFB0C8010401420441400030e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860160000003 0C0AE0000060060860AA00000210602000654E006000000000000000000000000000FFED5400000180180180185180180382 1801000000880040202640400611012450640610400400635008608700610204600700600A02000000630108F2A600600000 0040000000000000000000FF133B00000180181189580192086381006512A0488CC008052400414244042401414600614610 E0280002060A601609E006006786000000006000406006006080000020000000000000000000FF511C000001801801881803 841801800001054092810010400A04440A00000800600640601621600000620614604610620600600600000000600004601600b0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80080B821A00 80400500000020008060000000860070060020468860002000068060000060060A600000000000E001806007802000000000 000000000000000000FFF53C0000CD00188D8AB8AB8AA8858C806188804000002A80AA20622000002600680622220E326000 2AE0542462AA2AE2AE44E00000000222E000506006002000000000000000000000000000FF137F000001101A038018018008 2182008B82032080000040040C6800000D030060060020460868400008260060020060062262020000000068004B60060030 00000000000000000000000000FF6CB400004385582180180180081580580100200A800000640001409600001400600609400070e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFEFD3000401901C01001801801C21814008024501000000600611500100101600600702630E8460000070 86806006006006116506000006016041026846006000800000000000000000000000FF716C0005558C1D5515588595592191 25541505518000552550CD555400144A0060064D64064360041515570B65565565564065560000045460142D653600600000 0000000000000000000000FF3F6000008902B8A98AB8AB8AA88988190288801500002CE2AEA262A80002C600700629284620 F0424AE2045162A82AE2AF0060280000022A700200E28E002000000000000000000000000000FF1C7A00020101180180182900f0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620000644C14 628E00600640641600030600630000E546004000000000000000000000000000FF0902000001821A01801905800A25835840 010010800002200002480680085200600680E09608681000080529600600600649600600000410E80022E546004001000000 000000000000000000FFF52E00000190B8010018298008098000030402410000006406016004000102006806106022016000 206004006006006006806006000006006010086016006000000000000000000000000000FF6F130002AB8058AB0AB8018AA8 81880089082083000028A0A8A862AC000203006006226B17A270100A82AC4262AE2AE2AE0362AE00000422700080680600700008e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018158048018 2100000040040041460000160000000060040001000060060260000060060460040000000000000060460020060000000000 00000000000000FF5F220000898AB8A98AB8AB8AA8AB8A18A800000100002AE0AE3462A200022E0062AE2060420040E00AE4 840460662AE2AE00608600000E2AE0600A60063A4000000000000000000000000000FFF8A300000180180180180180080181 1804000121000000200000600E0001060460060461120160044000044160060060060D604600004400600440601600C00000 0000000000000000000000FF128C00002380180580180180080180580000000C00000064060AC00200000628E0061162262A0088e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFDE1A0000218018018000018018010210210018C1000004000000810600008E00800009601412000400014448 60000060060862540002000000040A6006002006000000000000000000000000FFA0950000AB8AB8AB8AB0AB8898AB0810C8 00188D00002AC0AC2A820E0002262A82A82AE22C2A82082AE2AC40E2A82AE2AE20E3340002A82A828820E28E22A006000000 000000000000000000FFC5E10001139559359541559559559139148018150000510550404456000446540550446304410484 55000E0163105565564560840000C8550504416536452006000000000000000000000000FF7F3800000180180180100180180048e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000082806000 02F016026006000020006024216006014006800000000000000000000000FFA64E000001801801800001813A0184D8228000 0380000042040022A800045400000109621400020020600214608800600620601400001000630000E5460040060000000000 00000000000000FF689E000001801801C01801D0180180181080081100000440040060000000060008000069260000140008 024168408068060B7146000000006014406016094006000000000000000000000000FFA9F90000AB8AB8AB8AB0AB8658AB8C 18808008A1000028C4AC2AE0000001862A82A82261042A80800AE2AA1062002AE2AE1062040002A02AE0001E60063240060000c8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5C2008482000 001240A410E04024912E10010804610750008010E00002600100E00610E00614000000602021600601600600000000000000 0000000000FF13E9002100001801024705811809001000C01828800024441420A0204300A608004021600610000001020E02 7001406006086004000010006000006006006006000000000000000000000000FF12FC0000000118014234A1C85B01C5D800 905800000000424C20200000000700111080E90640011816720F706981207006017404140008606100006006006007000000 000000000000000000FFAFA9008001901801C00A21C81801B01C4180000180000841040C200000100C8000001460010080040028e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF7E110000008258318019018018818438830028418A000042040CC2000A00560802200240861002A010E10C00E000 10600600600600000020E08008608600A046000000000000000000000000FF80CA0000008038018230018158038C18210A88 91000062408424402000020E00004850402E01000808010438602806E01604640C0000400061000060060020060000000000 00000000000000FFC024000000001809400889801841021011401835800008C04C0460880001460200001060061000002001 00006B00507006006126010000006020206046206026200020000000000000000000FF02EC00A100111801001805A018919000a8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (044100000000 00090310000000100000400010010000000000000000000000000000FF110400002000002205000000008401404A04410800 000060060881080000000000000905400000004060A014000000000024000000000000810000854010000000000000000000 0000000000FFA0C70000018018018018118018059018C10A8905800044408C01013000020600001012400600050040E01010 6490206006006126008000006000086026202006000020000000000000000000FFB18D00000184182182580180194180580B 0048098A001142244804001400860A042000412E00003000000021602005600600600E0000004160A02060860120062000000068e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A280880002A A2AA22222A0002020008002AA0AA0000000AA2C240A800AAA2AA22A002000000AAA00020A28A2A22AA000000000000000000 000000FFC92800004A4000000904000004000002D10800000000000000008000000000800000000200000080000084480000 0008000810000010000000800A0000000004000000000000000000000000FF585B0000C90AA8C91448AA8AA8588A48840989 0680002AA2AA2342220003220000002224020003004AA20A1020002AA2AA1020720000002223001E20022222AA0000000000 00000000000000FF39790000040000001020000000200000000000200000004004000000000108000000000008000080006000e8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF4211800080CAA8AA8008AA8AA8AA8AA82080080080000AA0AA2022320002AA0000002AA0020002000AA2120420002AA2 AA0022AA00000022A6000A20022222AA000000000000000000000000FF99C900000140100120040120140204841100002000 0000000010410000005100080000000000040000001402080080500400150000100080020000004001000400000000000000 0000000000FF5E3C000101955955845D55D559559558058538B380005563564A45460005560000005560D600020055744401 600155755643655600000054E00041653654F556000000000000000000000000FF502300008A8AA88AA088AAAAA8809008A00018e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004003000 0800000000000000000000000000000000000000000000000000FF62F40000A0002200056000000000000000026008000004 82000000400000008000008E0000000000800000000000000000000800000000910000100001000000000000000000000000 000000FF299800000200000001440040000000000A02009000000002000A8000000000000000000048000000000910140001 001000200000000000000100008540100000000000000000000000000000FF36260000304000001400000000000001001120 2400004000000001100000000000000003000000804000404100000000000B000000000010000040001001080000000000000098e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (110000001206 0060060060060060070860064060004471174165045568541004260000008060000060000060000000000000000000000000 00FF05E004014000100100400000111100000004110100000100040040000440250012840440040040010200848018040000 04400020400001000001800001008220000000000000000000000000FFB895040002810840A80800400800800850A0080000 0000080200200202200000280200200220200022308A21228231200230042220000000200000200080200000000000000000 0000000000FF411F0080000002002000002000880000000000800000000000000000000000000000000000000000000000000058e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 7592000000A00801800800200800800800801801800000000600000200600200200600600600600080200200200200308200 0002010000002000002000812000000000000000000000000000FFF1EB000000200000200000200000000000002000000080 0000004000000024000500000000000000000084800804200005000020000000000000000000000240000000000000000000 000000FF652000000080080085480000080080080080080080000407826020420020020020021C2002002001042002002002 202083000002008000112000102000002000000000000000000000000000FFAA41010005813841101800001801801851C03000d8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04622822040E 000000A06080427000006000000000000000000000000000FFDEDD00008000180184A80000180190184500808A000000002E 10640600600600600600610604E00002600630E00820600000002600000000405000C0000060000000000000000000000000 00FF7E1800000000000000000000000000000000000000000000000000000000000000000000000000000060000000000000 00000000000000000000000000000000000000000000000000000000FF4B6900000000000040000000000000000100000100 01000000000000000000004000000000000000006000800804004004000000000001000000000000004000000000000000000038e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000010164060 4600600700200704604600601040000E006040006004421006000001404080016000002000000000000000000000000000FF 3A570000D1065864000802011823809AEB0032080400000026086207116026154406006A06A26000020816B8C20CA0C00040 0704010000506028306900002100000000000000000000000000FFA1D8000001201A0080A800021801881A00A61822000100 0806406006006046806A0608648600E00000688680648403622800082E000000006000026000002000000000000000000000 000000FFEBEF000040041840A0080242184D855891802220000000000600604600600600420712704740600840008E0060A100b8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFE408 0000C09DDA8008784042181182504301D019040100000600E00611620605008610670608E06000700640441682D007400404 080600506000006500600000000000000000000000000000FF0BB2000013801922A09804031801821005001001080100004E 00F80600640610248600600601600020002610C0070540460000060900000060A02A60010001000000000000000000000000 00FF2DCF004004A01C00251822401889803000803081080080002E00600780610600380609610600600024702620F2080070 240000040000800240C0426400000000000000000000000000000000FFAA86000021801800A41800401811843800409100000078e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8F8802840000 0000E008024000006000000000000000000000000000FF438E18002185181800505804184980100830989000000090078040 0400600601000600600608618C6000E608600278E406450044000000686005104000186008020000000000000000000000FF 9C920000A0801C0082100000180382102900192400000001060040268060060008060060060060000061060A480200400200 0006000000106200004000806008040000000000000000000000FFC3CE0020808018008C1000001901801800801900000000 000780400600610600000600E00610600402001600600200600280008600010002600400400000600000000000000000000000f8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001600424600 62060A000601608680608E80040600518E00492600064C008000016006066080006008200000000000000000000000FF75E3 000002801840201800015841B15009009C48008050090604400610610640209693600610602080602608C204004110001804 000309834088007040047140000000000000000000000000FF0188000500841804045800001801801800801A140000000086 20400600600680A00600740600E00400000F0450040452102A810400000000420C0868000068000000000000000000000000 00FFE5C7000201801802001000001811801000009800000001000E20400780600600000680EA0610E010807A1680408203480004e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF023B0000 8108104000900180180180180180000100800068060460060160020060168060060060140000060060140010460068068001 000160048061060840C8400006000000000000000000FF9D7B00205501109102104192D8458B5A0990104100015460060044 07086480B4600615690700692000684684F30480000E006A168082000260A8006046044000000026000000000000000000FF 7FDB000020849888009800001801801040011810000002090680400700F00680010700600610600060600612500600410600 0004000010006020046000086000000020000000000000000000FF6CFA0020888B18004218600E1847C610615818400000800084e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (684610010800 6005406006004000000006000000000000000000FF2ACA040001001089003001801801801881801001008000620600640600 E400400206004506306420006046006004000006006406000000006000006006004000000006000000000000000000FFFFBB 0000010010000010018018018000018010018000000006006006006002006006006000006004000006006004000006006006 000000004004006006004000000006000000000000000000FF00170000010010010010018018018004018018010000000007 00600600700080600600680000680300680680600480000600600600000000400200600600400000000600000000000000000044e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A62BE22E08E 22E3CF4876AE2AE3A000E1BE0A64AC8096A6026226080001006000006146144000000006000000000000000000FF53E20000 00801820801841811801803C0194021194402062D640E4C708650600200A09610201680400000620604600800600E0060000 40004004806006006000000006000000000000000000FF6ABC2200000010022638018A189F805801803001000080680700C0 06006206002002806012016800026206206204020006006006000080804000006006006000000006000000000000000000FF F8AB002201801A038090018A1881B298338CA2090C404CE1524AE0B624612A03014E0D7026026084C485165265560495460200c4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (68EE004000C0 1930A31C01801801956245911A1180000402060060060060460070420D600400600040100600600680000680680680001000 6000406006006000000006000000000000000000FFF999000001801801801001E01801800401901009002020002E01624600 620600601600600400600000600600620600820700F007000040006000006806004000000006000000000000000000FF965F 000200401200601821809801A01A01C214031400046086C0408E8861060070A221628600E10080008E206044000006006806 0000000060000070A60A6000000006000000000000000000FFFA9E4000010010010410018018018018898210050AA02CF2AE0024e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000004000 00600600600000030E000000000000000000FF78BF000210A2BA8BAA2C29A11B218A0109A052118000480D2488603632EC2E 8CE8C28A6AD0126810890C0E0068AE0A00A6286906000000D168A08C6D46896000000826000000000000000000FFB6C60020 A3881801800801823803800001A910A3800100000C25610600610620221620E0002060000460864B620620020E0162460000 0000621021600E22600000020E000000000000000000FF1E6900000100100100020180180180000180180180000000040060 06006006000007806000006002000806006004000006006006000000006002006006004000000006000000000000000000FF00a4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (070020522222 021420028420000021030020020010168060E2000000042000082012602000000002000000000000000000FFE5FD00000000 3008080000500060100000008020000020122000008108812C50C0248A4E248201501270005187A04A04E800820000000039 84B80081C8050000000000000000000000000000FF7A0F0000200401000000004000000006000421020000400010000860A0 00800401000101008000000072888A0010200A008C0000000000000000020200088000000000000000000000000000FFD7A5 000082809847870829829801A80009890801800090004C40400600600600608220E05020600000E40620604E0000062064060064e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000101021911 8099018018218A1051821801800004C0360060868060B652690601608442602804600640E286210006006106000000156000 0160A6226000000006000000000000000000FFA491000420D00C42CA0C00920800800900C10CA4800050310340204A013803 003003943C4A803101082C9210303210043202342200000100341148300B00A000001102000000000000000000FF5BD80022 092A02102000000424822413402002C800000501808A891803520088100800008C4848088C00148048009108000009000000 00800A00F10020820000000020000000000000000000FF1841000140900880902900800C00A200908008048001084002203000e4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010014030010 01000000001000000000000000000000FFD4610008A80AA0000880000AA0AA0200000000AA00000002A82A8008AA82A8000A A82A82A82A80000A82A8000240000208000408000000020000088000020000000000000000000000000000FF1CC4000004A0 0A08A00C00C00A00B00A22B20A008000802802802C22000802A82002802802802800C02802A93002500042002A2200000090 2800C02802A12000000802000000000000000000FF22350002014002A222400120120120D309212200000000480100090400 4000848000000004004B008000048448C8848904004900000000A10A80840000880000000000000000000000000000FF3AAA0014e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000800000 0000000080000000290000020848800000000000450000208000400000000000000000000000000000FFE0340000480AA000 08A0000AA0AA0AA1000900D200010002A82A82A82A82A82212A82A82A82A82802A82A82A82482A8A488002A80000002A8080 2A8000228000000000000000000000000000FF8B3C00011415434C3542003541543002023243540000800D50D40D20550D50 AA1550D50D50D50A00D50D50840C90508500000928000000880B008C0800930000000800000000000000000000FFE5B90008 00400448440400400400400404400400000000000100100000100110000100100100100300100100110100080080100000000094e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (502012012004 01401201200308248248000000000080080000480090C004800800800882C010048009148000840048000000008008028008 00880000000800000000000000000000FF434700000400094484480080080080082280090480008020020020028020020028 02002002002400002002002042000852002002000000002300002002052000000002000000000000000000FF30BE0001040A A10C0880000AA0AA0AA0500C600000000002A82A82A92A82A82302A82A82A82A80000A82A82A82002A83008002AA0000002A 80002AA002300000000002000000000000000000FF6B9B00082020000000000000040002C1280080000000000000008009000054e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200104340200 2000041002100000000000000000FFEEFB400D80418400400412400408400400400400020100100100900100500100108100 1409021300001301019121001115124000000000001088008138000000000000000000000000000000FFB2204024004C0C40 C00C00C40C88C00D00C00C02820100300300300300300B00348B01300B053002003403103033411403032002000210003092 042002202000000002000000000000000000FF33A300000400180100180580184180184B81380180000060060560060860C6 0060260A600608620002602C20640600002600600600004008600008E426006000000006000000000000000000FFD6E8000100d4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (406046016006 00E00000E00000600600000600600600000000628024E1460060A0000006000000000000000000FFC82F0008000240001140 200CA14002002000012800A001008012E0D60800500880000202004D004008E4002A02800802000800002000200003001100 A0088030000200000000000000000000FF36B7002002140000000000000100000113003003000000000000600608014C0002 080C42040840800061542003104100A00080000000100800000C0480200000000000000000000000000000FFB61C00000000 0821800808820820804820908800840010200202200240200240402641A10200A10002200608200640020A082842000220000034e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (580801000180 1801811801951053000001201640E00600608E0540060160AE00608020000000000600000600600E00000008000028648641 0000000286000000000000000000FFC20B00000002180080A003883801809820023889000000A02E2365060A610601400624 648604608010624032630620020600702640804000400100700608C000001206080000000000000000FF0E7000098000D898 86080381194180800E03B841080020612E2062460262D21047A6186066506640000020006006100186106006008000006000 306406006090040006000000000000000000FF9568000000011901880841821801822008081801954050600608600E40620200b4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08F286208000 000286000000000000000000FF2890200242001908841801801801C03800089000000080004B00600680688204C116007886 006000000806806006000806006026000000006000016226004000000036000000000000000000FFCE1E0000460158420018 AB8AB8AB8800AA80018400002002220162AE2AE1042142AE6262062AE2000AE2AC2A8C560002AEAAE08600000003A0004060 06080000000006000000000000000000FFAFCA0000100C19408A5801801801A4200000200000001401028C60060064401050 069060068068000000040062CE000006006246000000206D0003603602400000002E000000000000000000FF364A000140010074e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0E2AEA0E2AF0 840A9AAF2A82AE801AAE2AE1060000002A90041060062AA000000006000000000000000000FFDA19000800081A0490180180 1801804001204A018000803000006806806043124806006106006C0000680200710600080700650E00000024480004605612 600000082E000000000000000000FF3CE2400410155822913955955955948154823955800054A480556556556432484446D5 644ED56284550552557556000557556216000000554304446116556000000306000000000000000000FFCD35000088021910 42B8AB8AB8AB8A98AA13083000002C82B33262AE2AE20E4002AE8CF236AAE0802AE2AE2A80070002AE2AF02600000010228100f4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02B801801801 84D901910021800000208200600600602E00400602E0060160020060A025000600000600640600000002200008E126002000 000446000000000000000000FF0909000050001C4022180180180180B800C93401800002201280400400608E835246806026 806A04000000000006000006006A46000000002B04436A2E002000001356000000000000000000FF7A4C00008400190A0038 01801801840000041001800010A5200060060060461041060040860060004060060008060000068060960000000000008861 06002000000006000000000000000000FF6A620001000AB8000898AB8AB8AB8800AB8010AB8001A028002AEAAFAAF2062050000ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (564920000000 16000000000000000000FF4EF6800000001005004801801801812805805001800000401000600600600E0440060060060060 00006086004000000006006146000000002002006006032000000006000000000000000000FFEC430000000AB8000818AB8A B8AB8C580000011B800022A2222AE2AE2AE2D60042AE2862AE2240024AE2060802AE0002AE2AE02600000020A00200600628 2000000006000000000000000000FFBF9D000000001894001801801801801833822081800010200A0040040060062D400600 600610600420001600000600000600611600000008200422621602A000000096000000000000000000FF2803000000001820008ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C2AE2AE0000A E2D64042A80002AE2AE026000000110000746006002000000006000000000000000000FFB716000800000031032801801801 80082115180380001120100060000060862240060260060260060000360A40020000060060060000000820064A6506022000 000546000000000000000000FFCAA80000000AB0490A88AB8AB8AB8A088915188980002A82A02AE2AE2AE24628C2AE2AE2AE 2AE0002AE2060B42AA0002AE2AE20E00000042200000E52E48200000054E000000000000000000FFAEA50000001540851009 55955955908912003841800044454055655055640611455628E5563160041505064145500005565564B600000044A0040160004ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (05C11A82001C 230018018000006C00206201106826027226C8BA0320620408000600E410A0210702600600002800C0040160060060000000 06000000000000000000FF2FDA000800000805044801801800005900111A03800010410000600600622E4360060020020060 0040602E44480000200600640600000014400008E12610E000000446000000000000000000FFFED7000000201131800801A0 1800040A32023801800003400800600100600690480600400700600400080610E000001006006116000000208004026216A2 2000000096000000000000000000FF6AF40000000AB1010888AB8AB8AA0888410018ED80002042202AE2AE2AE1860042AE2A00cce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C48000000640 0000000000000000FF8D3A800000281001800009A0D852000A419018880080100400040430C0600600408E0C805600605048 6316C4641201000600600600000000A000016006000000020006000000000000000000FFFEC58400A0100811000011805E49 840800001088004008400004784020700780608780210A00610824190F204002003006006006000000006000006016004000 000006000000000000000000FF6E79800880407009020101C61A81820A0290120001204050400061970071870048172432C6 9662C0027406044901011086006006000000662000066006800000040006000000000000000000FF2A6E000000400801820C002ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (10420000000E 00600410200600601600040040604052E3464C6210000006400000000000000000FF80340000000018018700218238018018 00001811088020240808608600600608E0C658C0220F420008600E04600600200601600600000000400222E0060040000000 06000000000000000000FFB1AF04004000102300818D8018098AA88980382100004022C04262081260C604446600408650C0 02000006014104480006046006000050000022006036200008000006000000000000000000FF282E80000000091190420581 1800000821131808022008A000210006006C560068162408034060C004048623600A00308701600E4002004060000863060C00ace040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000103390 5085000050000002600600000640000001400600040000600000C41454000000011000000010030042021002800000009000 0000000000000000FF9D0D80000000200A00200000003200010001002000000280000060260000000C80000C000008008020 60001400C0000000000400000000050000088120080000000440000000000000000000FF5AAC000000001945905809801808 08DD01005821804008208044021000724600600E0091024041200A648640E00E00610600600620000000600000600600E080 000006000000000000000000FFDD050000000018118008A582D8000408489298010C8021201008810604609610E106020042006ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000016000000 000000000000FF54E00000002D4840882CAAAAA8888AA88888484080000820002AA48AAAA2AA10A2AAA8A2AA2222800AA2AA 00248A082AAA2AA20A00000022208020A50A28A00000054A000000000000000000FF73EA1000000080000A00000004020204 2000002000000CC0000000000010000000040A51008001000010000000802000008000000000004000005205004080000005 40000000000000000000FF356E0000000008B08A18AA8AA8848AAA40820808800040200028C28A2AEAAA0422AA2432AA22A0 000AA2AE21200200E2AE2AE022000000312000142002242000000002000000000000000000FF44450000001300010080000000ece040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000000000 10410000000110000000200000220210320000000090000000000000000000FF32EC81000000A8AA8188AA8AA8D2D20800EA A8A8800020A00028A08A2A82AA2AB2AB2030822AA0000ABAAA2AA2220022ABAAA02200000000208000200204200000000200 0000000000000000FFE0BC80080020010404920120144000040444828C000005400000404080500040100480480110800240 1004541020454805004140000000000402000040000000000000000000000000000000FFC16B800000123D55803555D55901 80BD13B55F138000404000554557557556556D5640C456556400356557557C5614D5565564B6000000156480016036086000001ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000280200000 0000000000000000C00000000040000000000000000800000800000008000000000000000000000800000000000000000000 000000000000FF07020001000284082000060020200002000000081000200000C00100000820180808000000001000000000 000000000000000000001000100000400800000F00000000000000000000000000FF4C271000000400000000000000084125 0000020000000200000204408010000000011110280004800000010010800C08000004000000001282001081200100000004 40000000000000000000FF12710080001002000C420020002008003200000400000800000000000000000008000204000000009ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800000000 00000000FFEE2D00000182100D801801C01801801801005E898080206016804006206026007027406007106000006406546C 06504114010006416106006000006806006946000000000000000000000000FFE1F90000180114210210452040400001AB00 020000000A028C024000205085D0021C80000000400000080000400400400400000000000000000080008002040000000000 0000000000000000FFAE37000410A00C04800800800800800800A04880810000201000200300000020200240200308200000 22024A320228208200800240A082002000002002002126000000000000000000000000FFE19E000000200000200020000000005ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600000000100 4004000004000001000000004800005000000000000000000000000000FF7299000000803800000800000A00A00A00800800 900000200220C002006002002006002002006000002002002006002806000002002802002000002002002080040000000000 000000000000FF066F00000000004120020008020020028D000000000002050D040101200104000C08000000001000000000 005000004800000000000100800000000100040004000000080000000000000000FFBCDA00031080280085E87C8868008008 40806800800011A00280A003002062102002002002002000002002002003002002000002002082102000C02002002C02020000dce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01051004A000 0460168000860064060461060C60164861084200060460060000000002860068062360800120464860060400400000000000 00000000FF95F1000101801801801801001021023041000901800000610600000002610601600600E0020460000060060860 06040000000006006006100020546006006016000000000000000000000000FF41F300000000000000000000000000000000 0000000000000000600600000000000000000000000000600000000000000000000000000000000000000000000000000000 0000000000000000FFF957000000000400400400001000001000000401000000000000600600000000080000400400000000003ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF4B09400140820801009801905800855841001900800004600600000E0061060100070160220060084400060270070A 000400030200600652C00015202440A004000020000000000000000000FFA48D000001000218A0580112100180501582180A A000C04116C060001262060264860040060260000000272870070040000000280440068160B021241000241C020040000000 000000000000FFBDA920000980A8018078210010A1801019809811800080408E0060960060068068068A604A286080006046 40600611C000000052806006804000002804092804000000000000000000000000FFF1A000004984CA11C118210A5101809000bce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0060060028C2 000086006006000004006006006408040000000000000000000000FF189C000201058000015A238028919248010093A08000 49E01600E04602E7D60248061042072060000160070060060272A6000600F540860161000124000000064000000000000000 00000000FFFCD7000000000600001823882900820805601800800188780640780000780621500602DC064070020000060062 0604640600000100788480400A022010010006000040000000000000000000FFE9E6000001842801409C0180180990190100 54008000006046000221206036A0C0560AE00300600041604780720600000400010211480700610004200400800442000000007ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (980082000861 06006027A0600600600603500608EC0002600648600600228600000600400400620034600200600200000000000000000000 0000FF80A5002221818841B018018190011991D4A09822820000600682601800680660600600616288620000000680625600 200604000680400F09400081E006047842000000000000000000000000FFC0A8000100100008A358018000018000008008C5 802000E006046006806006007286884006006004006006016C0600200200000702600E102084007002007000000000000000 000000000000FF3E5B000200802809801801800001000088814021800000612781640033600602622E80600200700420002600fce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF1B5208000000005288980186C00108E055801082804083610780600000E807A0E50601408781608C020087007066007006 0000060442240961A414200208606E000028000000000000000000FF5B520000050001108218018020008000118B28209000 107006416246047116107C960950061060040160260860160040000000074041060220054020320170042200000000000000 00000000FF439E000100080200935801800004000001801080800010680600602040600700600614410600700004000628F0 0E005500020006004006000200402002046004000000000000000000000000FF9D71002221000000A01801825003805000A00002e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060040060000 00006006806004006006007006006006000000000000000000FF25E9200001200009821A8B040A0000120081180188000060 1600640015610650220600E10210600400080600604600400600000000680600600400680E0160C600604600000000000000 0000FF8373280005A05083811A0100AA10091A10841125800012600701604600600200814E10600300681404E12488710E10 4006010000406336346144406446506016046016000000000000000000FF004D00000100220090788B800009804001905800 800060600E40600608601600602600400600610000700400708608600600800600500C2060000032022660864000000000000082e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80000AE04633 60804A602688828E106306106420408486006006145486408000016006007000006806007006006006000000000000000000 FF123C040001881001801809000801011804810111804000601600601601640E400046416042046004046006486006004006 000480006006006004006006006006006006000000000000000000FF6E0B0000010000018018018008000000008008010000 0060060060000060060020060060020000000000060000060040060000000060060060000060060060060060060000000000 00000000FF7967000001801001801801800800000800800001000080600600600600700680000600600200080400600680000042e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF45 4700000180100101180420080083380280918F80201A64A608E08E2AE46E3884AF88608202626020F2C62860064A52862082 80008006806401006006406916006106000000000000000000FF69BA00000100080180180103190000113181005185402561 57456550C561160081564425565123140400060425460165560000000561560060AC00600602E00600600600000000000000 0000FF91EE000001000801A01AED0018141818819060018000606106006006806A0600080684220200300698680700200600 6006000800006006006006806006006106006006000000000000000000FF1D2A0080018410818019010008012452A080080300c2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (580600000000 2006006000006006006006006006000000000000000000FFC7A1050001140901409806A20815818A6090088100002B601664 080602600488340665204638480004002600500600E006000000002006006800806006206106006006000000000000000000 FFDC48000601801601001E00800801801810811821820000E40F00100040600700A12E806886005220026006004406204406 0000000000D68072A9006006006086006006000000000000000000FFE0B2000001000801001A00810900800B0080080B0120 0060A60562B0016ACE80220604225200E8900000068260A60060B600000004800600600000600602E00E00610600000000000022e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (284236000000 22600600640601200E0000000064022000060A600600038040601628600000620660618608600E000000000000000000FFED 170202D5A41D09921A00334B05289A48A083438000AAC4B68008A6AAEC26CA60969328B6880A808888AEC004C68460C60002 80A0692EC8E84084ED0EA46A16AA680E000000000000000000FF0778000001891821C1180880184144388584400980000040 0741601600609601524620220224000900640609000E28E0160010000AA00602748850704608F94600E32600000000000000 0000FFFF34000001801001A01801000801001A0080080180000040070060000060060048060068038000000000078008060000a2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFAF7F00 00C28308010088008108608B09A8802900800000300600400200600210300250220200201001A0A20868A65028020000001A A00212A00010A0A2022002022202000000000000000000FF01EE000020000048020100025003140003029018000050108800 601F00030868402828413422438010634100C1482080080000000140A8000210280540100228500080000000000000000000 FF6DEB00010008012044000014811000000010000000000008000160270004200009000280C0190008006010510A100408E0 0000000000000100A8000000000000000020000000000000000000FFD7CD000009809801A8581488388100901581002180000062e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000A80940C80 B00A208008C0A90830000000000000000000000000FF535500014994192182190D841901841905801909800020610608C00E 00650650681650E0060940000062D60144162460060000002160561060080060B6006106286006000000000000000000FF90 21000402C14C00A14E40C92C32C90C10D48C40800110201300308208380B00A52300314B2035091530034821430820220001 010A330300B001083403483203003002000000000000000000FF4CF60202143442804104482002042022002402C200008281 00B08980189090838AD4800800C04C008C0808000C00800804000800A40D40800800820818888C002080000000000000000000e2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010010000018 008410010010110010010010010010010088100000010010010A1001341009001011001000000000000000000000FF178900 08200000880AA08C0880A00CA0AC0200AA00002002A82880882A82A82282A81002A82A82000A8000AA82A824020000000000 80281080002A8200000200000000000000000000000000FF8DC0000400A00800A00A00A00A08A20A00A00A00800000280282 2C02800002002802A9280300280080280A003002802042000850A02802842800802812842882802802000000000000000000 FF9C7300031234A4450010422222042002023142000000930804804820804000900004840801004840C00B408050048C888C0012e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF8DB000082C 00802000002000213000400008A0000000000000000001001000090000220000000202200489000000000828000328310220 0402220000482A00A0000000000000000000000000FF37030000880000CC0AA4AA0820900A008810002A00002A82A82880A8 2A82A92002A82A81402A80002A82A82A82A8280A800003202A82A82100080104A02C82A0000000000000000000000000FF6C AC0003002A41123543103502043103282203540000550D50D30D30550551440D50810D50D50820950840550D515104800008 00840908C08800D50C80810C10800800000000000000000000FF2715000C004C2400400000428440402440452480000100000092e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (164860260060 00006016006006006006000000000000000000FF07E800045120422020000021228420C20031024A0000800800844A208048 04004800800D008048008008008048049041040000C0800800C10A10D00950890800800800000000000000000000FFE84400 010094091000080080083084082484480080000000020020020000004B000200202200200040200200200202204A00001200 200202200003220202210A002002000000000000000000FF34010000460180020AA2AA0A000409008C00008000002A92A82C 84892A82A89102A82A84082A86180A82A82A82A8248A400002102A82AA0824000020022022220020020000000000000000000052e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200600620 640214A1022121000024421025860860060000021DB02300200906360B00332310B002010000000000000000FF1643400C01 400400400400000008000400460000000000100135400120100108101800120100D0000B8081005001001200000000000008 001020000000200000400000000000000000000000FF6F87402400C00C00400C048C0848904D00C108008040001003002023 503403403082143403003040122083113513003002000002012512053050142422402522012002000000000000000000FF1E 7501000184180004380181180184185580180190000000064040060060060C6006016046496000206026026006106226000400d2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D80000098208 0A04180000100A001801004049080000000C40812800E00E00640400210802602800600600604E0060060000060065060064 8008602E02608E08E006010000000000000000FF864500080004002A0100C4108004002014100108088000041045604E0000 300000900004500200000A60100000100100200000000002900905001100304200402100A8000000000000000000FF8ACD00 C00002000002000413002002314D011001080000000015604608020002008014002410002040604014820800002000021020 0280030000100020000100200000000000000000000000FFC8A20000101009000028008008008809008048408060000042100032e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400E24680024 60B61462160460AE000000000000000000FF96F30000C180504200111200180380080113414B000000000600640000600620 600400200004E00020030C08600624600600000420052610E04008E20640E046016406000000000000000000FF0DCD000001 80184000190A0918A180D8210A088500002000260060064260260061044A200000E30015622608E306006036400006005017 5160010372070070074070AE000000000000000000FF10AC0008019069000318480018A81889350388030140200406140086 22E60619E07420244000622800801600E02601600E20000675600620607860618640664E006006180000000000000000FF8C00b2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AF09720E2AE 2AF2A92B60422AE2A430F2AF4A72AE0000042082270260020260070A702702EA06000000000000000000FFF20F4002010050 0000088982480B808810AAA80080000010048060000071460060064060010060000001061260070070060000061440060060 000CE22614EACE00E00E000000000000000000FF375B0000430408C80AB0118AB8880C4AAB95510180002A0AAE2880A82AE4 0E1262AA2AE2A8A060200AE0042462AE80EAAE0000040E0006006040106006016086786006000000000000000000FF8F4F20 0011128A0000082180084002C8018018018000010006040006006B26097002006000106800000046856006106006000006010072e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (06AB8428AA0A B0099010800008010008AB00002A82AFA8E0882AE0062272AE1060003870000A80042862AE2AE2AE00000420202617701080 6806026006006026000000000000000000FF8AC3000A01A04404000805801800101800001000000010000480604680602604 68060060000068000060170060060160060000061070963168012175364062960060CE000000000000000000FF4C49000155 910D541548258091400C3D4240095400005505565565305564164D655605635044E0145504574165565565560000064164B6 406004406116207006526526000000000000000000FF265700008D0910880AB0A18AB8AB8108AA80003280002292AE2AE28E00f2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (016024436296 0560460D60A6000000000000000000FF63890000418050000D5001840811800804114000000000008E006206006006006006 0940000062C00065000060060060060000CC14230630628008602608629620640E000000000000000000FF60AC000001C492 000000C188402984488C1348000000000006046001006806807006154D080570100000008168060060060000040C208E0070 0003622E296296316896000000000000000000FFC2E700000190000000100583180208884100080100000008060064460062 D6116006406040806000406334046006806806000004012C06C8E008486106806846846406000000000000000000FF599400000ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (545564C25325 505565441504365565565565560000404520564165240160562D6056056016000000000000000000FF752C80000080000183 180580084D845801800841800000200600620600600400601210000000600840600400600600600600000000200600600000 6006506086006006000000000000000000FFEAD400008980100000108B8018818AA8C8020088000000020428E0AE2AE2AE2A E2262062A82AE0000AE1002AE2AE2AE2AE000204202006026000006006206106006006000000000000000000FFF6A8000003 8B100000002190D043800820001844000000004602600000600600609602600000600420002800600600600600000400A056008ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (890001981889 8008800200C797408180000062AE28E08E2AE2AE2AE2022202A82AE0000AE2262AE2AA2A82AE0002A841A506346000106506 206006506546000000000000000000FF4D8D0008208C20010818058008018018008AA8000000006306006200006004006012 0060000000002000060000040060060002880822860A60004C62860064062862A6000000000000000000FF9BD90000AA8A20 018038A98AC88188988880088B00000062AE2AE0AE2AE2AC2AE2A222E2A82A82800AE32E2A82AC2AE2AE0002A80C202E40E2 8844E02E02E42E02E00E000000000000000000FF9B6A00011281000105593192A95395591580095580000060365561305565004ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8100E1E70260 06006006000000000000000000FF15C300000180000145180B821834094481C20000000000700640E00020610F00602F10A1 0808A504440007003202003006000001106006006004816016806006046006000000000000000000FF4A5B00080080000104 B843915830114009914422000000680602602600680600614710A0000022882060870028020008060000000C630610629010 612608629620640E000000000000000000FF36C900000184C001A01801C40802400041800011800000600600620080600600 680A0008008060000000160060028020060010002020560360004362160560460D60A6000000000000000000FFBB8F0000AA00cae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (620620300100 44802000070050A012E90E12000014C00612635032602E006446306026000000000000000000FF79808080010C00A9809901 800814014511014901840001682E04000000600EC1688314200200428044602610401000E006000000900086006000006016 006006026006000000000000000000FFCE2780804012008B005881C08C01801820012801820000644604600181604620F086 021001006000000046086016006006000000404016006000426006046006006006000000000000000000FFF58C8008000000 41C2380BC20821A81811020D018000016A1600640714E8260076234008810660001860068668070168060010002181066061002ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB8008050108 0002400188182111204462D633044600602620604A10A10800000040003640040001600600000004641654610041610E3564 C6016406400000000000000000FF1C1E000005800021800109001801803801000821808022602E00602601613620640E0880 8808840008E02E28834C14210604000000426E20E45004604628E08E40E006000000000000000000FF86EE00004080000582 00010108018898C100A8898A2000600641640056630600603241003011000800000600040400000600000020001600600044 E086026006026206200000000000000000FF92C380000300010B291883C52C20040000280805800000628632848E2161121000aae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (250220200250 2542000000000000000000FF0B0C00000002110002000400102200204C0000420000004000026006000000000004024D3600 40C00060200040145040000000000080500100004302D00500400D00A0000000000000000000FFB24880004008403400C040 00001000800004400000000000000060260000900000004900000880004062800A00A0050000000000040300100120000000 080290200408000000000000000000FFA1D200000180080195080902584010810180A88D0200006006000108246206106006 20284011008808E00611001000600E08000051600600E00010600600600E146026000000000000000000FF6DC80000018000006ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (516556CAC280 55655742C4145065560000001560560160800160562D6056056016000000000000000000FF94E900008890280A89088A8AA8 9088C8A088A88080002AA2AA2AA08A2AB22B2AA2AA08AA022920202AA212A8228B0822AA00000024A02A40A44044A02A02A4 2A02A00A000000000000000000FFC73E10800000000002000001402020423020128200000300040040000002800000000200 000000100000000810A00088040000002002804A00004C02800004002802A0000000000000000000FF25590000CB00984088 08C80AA8C08A08808880DC80002AA2AA28868A2AE2222AE2AA0020042262020AA04A20E2464122AA0000003825023622021800eae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000024000204 202009408800004A00000000000000300001000000000000800000000011401010000000002000500300004302D00500400D 00A0000000000000000000FF64FC888000CAA8AA88C8AA80888089880080082080000022A828A4CB2A80822A9003A03AAB22 22080AA2AA2832032432AA000000002002202618002002202102002002000000000000000000FFC87E800805049100044001 00000442041242140000000000040040410049008040002208B504450000008084D005020804000000000000000100000000 500080000000000000000000000000FFFB2B80014B955155911955D4190B9419038D58298001487556554116D56057556356001ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002002002022 000000000000000000FF0F0C00020A0000000000000000202000002000000000001808800000000000000000808080000000 000001800000000000000000000000000000800210000000000000000000000000000000FF423C0080000200020020202000 1028800002000000000000000400000000480080100804000000010000000000000008000000001000010000004100012000 00000000500000000000000000FF5A0300013040000000400008403000011404000400010088000204210004010014300B00 01090000200001030010850000000000148300100100080000080290200408000000000000000000FFCB9900000400000004009ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030020000028 0200280200200200080210200200208101200200201221A062000000000000000000FF91F3000003925901841801C0182580 D801801801840000001640404604604640400600ED5654410004655600454605510600004600610700615044600F40600600 6046000000000000000000FFE4940100110A800560404000100110A0012C200000000082AC08400080109003C80010000000 4000000808004800004004000800000000800000004504824008001800000000000000000000FF03BB000400904880820A00 800804804800800A00820000000120202204282240200280224A34208004254A0024C204A1020000420020820020A9242082005ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001000 2002010000000000006006000004000800000000804000006004004800004800000000000000800001000001000004000000 000000000000000000FF1F260000000008008008008008088008010008008000000202228102002802006002003002002000 802002006002002002000002002002002000202002000002002002000000000000000000FFD7190000010B00000000000000 0001260010400000000111540040000008800508080002000040000000100008000048040000000000000001000000000200 00200000280000000000000000FF3AE6000000800800800A00800800800800C00E00800018100230A082802642002802002000dae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (022060068000 00000000000000FF74C30800018458498010D58018418054010059218800400136000006006006102416C423050C00004010 4600008440848600000610630710E041106007416416816416000000000000000000FF20F20000B188188180100100980581 1911101009800000020600000000620E0060C608200420000010610604022402000E00008E01002642610000E04602600620 6046200000000000000000FF41F3000000000000000000000000000000000000000000000000600600000000000000000000 0000006000000000000000000000000000000000000000000000000000000000000000000000FF9F9A000000000000001000003ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C08010E00F00 008710000640030632602880000000620E082010C06424200000000000000000FF014300003184290180092CA01805814009 A89093800040000600000600600208242614608612400080014602010601002600100600612420400100610E834002016024 000000000000000000FFC7F4000081881021809001811825A11001303C100C40100E9E0360000442000030C2303014A00000 2808000C402402400E0000CE08E1041881A018E126A1250A01620EA00000000000000000FFD9AA080401801C09811001A098 01A01081211825000000082604600600680A86200E0022040000000060021042042042C6000806806A04024000066916006200bae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018018814 01800000180F8160008064060C20068042460020040000020020063020060004062A002E00E024906516106016206A860000 00000000000000FFE4BA000409A41001C03821C35865820001C6980784410100060060071441000A21871170360160008060 0600680720600640814600670016812101E02661000003489E800000000000000000FF6478000101800005883A0084180185 0001809411E00050040600600000780000A04E20600600608008800E04708600600600800580600180580000604600628004 4047200000000000000000FF7873000681C51A05900801803801800001801A01800120800600000008448301280EC0FC0600007ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (602600000000 0000000000FF86BD000001205001880011A01E218858418018018000000806006086004407B022268048060060000060C081 208E34A00E0000042060420020408060060000068C6046000000000000000000FFA57D00400501B8018000010618078E3819 869049804004000600600008410600218640400600600440001A00A00600308600002621060246200C6A680780298601E106 080000000000000000FF1FC5000021140043801001C01801809D0180990B800000002E50600610700F80A006004106402000 0060008020060021060000270470120060080A7516C8E206006006080000000000000000FF5CCC000011010801A01241001800fae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (206016006007 00600600040C006002002000006436C9802E006006000000000000000000FFC89400404180002D9080030018298019438234 0980400608D6406100885C064A2C0680608600E00400014E806917446006200084A302A24022048A69864020061061060800 00000000000000FFB501000001A450058440D0921803891841801845808000025600600600450600A02610601794002000E0 0620400648400600022611600249201001720E403106506127800000000000000000FFD6E30000038C004180001040184180 9801C012A5800000100708600000491609202540688640000420000700400708C01600000604003600202500620E112206820006e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080180000180 0000600700600600600000480600600600600000600000680100600600100700600700600000700600600600600600000000 0000000000FF71E1000001801041033088901801808841A01001810000600E00680000620001400720600600600400000100 60000068060000460160060860040B600680612E006046080000000000000000FFF006000005845003001020A238518C0E01 823855800005714600680700F0800440260A610F03602040E000206000306006200896346546C16209006146106006506106 000000000000000000FFF3C1000003801011980005803805821805E00801800000840780600610C0061000062260077060000086e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF1FF20880018A9001001800801C01800C31809A01820040502E1462408071001468CE80640604600C8A0083016801 006006000906026006806004007006006006006006000000000000000000FFC8990400018010010010008018018008018018 01800000600620600600640000400642600E0060004060100060000060060000060060060060002862060060060060060000 00000000000000FF118800000180100100100080180180080180180180000060060060000060000040060060060060040000 00006000006006000006006006006004006006006006006006000000000000000000FFB633000001801001001000A01801800046e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010069400001 06000806006086806041837006006086006046410000000000000000FFB460400001801001440000801C01800801A01C0182 000170068A60260060921041AE2462060060182A608100E00100000600008702610600610040740610651615610600000000 0000000000FF1512000001801801801801801803825B059041059400006557406540156B40856C0600614600632402050200 61400061060000060060460064450D6006406006006826208000000000000000FF83C42A0001801801A01001811801801809 80080180010060060062060060108B400610610E62600000600000600000600600000680600600600008600680600600680600c6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001C00000000 6006006000806000804006006806004000000000006000001806000006006006006000006006006006006006000000000000 000000FF6D23010401951801800800811801820C41C1180180014060564000060A6618096007147106006000000013006000 8020060000060060060060004064060062060AE086000000000000000000FF8F4B000001801001600E00801801800C01881D 01880000654620004000E0808163060060460060100062820060010020078018078060260065002862062860160060060000 00000000000000FFA700000001801C01840000801805804905805803820180E01680630080604204400782610700654082000026e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFC1150002038008818418418098418A18031448280000046036000000A0618404ED061160060840000060062060020060 0600029600648600600000600608602602644E000000000000000000FF6213080005B00A41C95B00C01C01ACAA132B3A8200 00D2615680088E336D20C364470B7206C2489088080A426C00A46036000C8EC96C0E8CE810D268A68C6B2683680E00000000 0000000000FF3543000001832A938018018919138019010018300000016206D160068060081060160060D688400000E34208 E05009210600000602614620600080EA1700E0164862A6000000000000000000FFA7A100020180000100100080180180080100a6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A0087918400 0D00A20A00900808A90C00910900880A80000000000000000000FFEE40040005800800901800880800800801008810800010 300200400310E01600202A00200200200800200E82E13620280A00000200202208A00046A012002002002012000000000000 000000FFA97200000018014F00810135008800100001004000000252000061960200000A42404006201200C000E3E014040C 5040000000085C0008030000000128028688758000000000000000000000FF0C190004000080000140040001001100080820 84000020080809600E090408201010088080250000006000C00000080C600000000081002000400002C000000000002000000066e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (130000000804 824A00934B2C820914914904900C80800A0C80488C920804000D00900890840800804800D109089109500000000000000000 00FF278B000005901805925015951901901801805801000000600608C00E1164C401611628640E08E00000602410600C04E4 060000065461061060004164060062064C6016000000000000000000FFBF23040300C00F40C08D40C00C50C48D00D48C5280 0114211300310200300B04244303300304302110311244350330214200149300340301304104313311308301344200000000 0000000000FF7BD808050022242028229000021224A3802202030000088184B08800800A6081080486481C8008009808108800e6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 03E40008004500004004002002004044004244C8000000080100124100104140101010100108100100110000100000000000 1001009001101001001001501109001000000000000000000000FFF232000A882400AA08A0040AA0AA0A00C8000090000000 02A82884A8110400080000220A202080020A80002002202002A80000280002202880022A82A8020110200200000000000000 000000FFF160000004840A00A40A0C800800A0AA00A28A208000802000802802C02802C0AA2280200A842800C029228B2802 812802000802A52802802A80802802802A42822802000000000000000000FF8BA700002130C0002012C020140120024328220016e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (240AA80002AA 00214A0424002A82AA0922C22AA2AA000000000000000000FF2C2F000C000100000420282002000A80020000040001001000 0200000000001282280010890D02020000208C00010000000002304000800203020000004A02000000000000000000000000 00FF183F0000AA1022AA0A00920AA0AA0A80AA0080040000000AA82A80882A82881302C02302A82480804A82083082A9288A A80002A84A02102081002A82A80402002A82A8000000000000000000FF6B9300013430235431030015415420231034C32000 00000550D10930C40950A00900CD0440400900D50C90410D48550D50000880928C30C88800D50D50810820D30D30000000000096e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060460040 0600600600620620410600602002E00600608608600600000620610E00600010600E006006006006000000000000000000FF 65C30000012D12002404022012012002002213120000804804844800800908A40A8081480480CC80A008088B480008C00000 0800950C40C30800800800810848800800000000000000000000FF9A6C00020080480080A920800800842800892820800000 000200224200204210A0521020020C2000002122002002822002000002202082102280002002422002002002000000000000 000000FF909D0004AA0000AA0940484AA4AA0880AA10000000010002A82880882A82000000012202A82004000A82412402A80056e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFF5F0 002000801038808800800020940804808000800000200600040200200A00234241201610600000200A012002106002001003 20300300200002300350B483043002400100000000000000FF6323400D014804004004004024000004004014000001005001 4540090010110010010850012014003810112050010010000000000002080010080804082800000000000000000000000000 00FFB7DA400440C88C50C10C00D10C00810C00D40C00810100300B00210B0030430230030830435030004030035030030030 02010002002202003011043003512142402002000000000000000000FF3F320140018018018418018058418018058118018000d6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000064964 8654E0000360660064A644630E0A0000000000000000FF697200000180180991100100004180902000004180001060260A04 0800C20200210654000608601200210610632600600600000600604600604210408610610608624E0A0000000000000000FF 761A000800004080084002008000008048000040054008013014E1560900500082000A012002050800654008054002800808 00002102205404A8510300000008500120000000000000000000FF7F27008140008000040001110000011003140000010000 00284561060000400200002040C0100240056000080100100000008000000080000000800A008000202000000000000000000036e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600604000600 600400400600000610EC0000400600610E80680600004E00E0AE0A6800006046206006306006000000000000000000FFFBED 0000018058318138010010018010238A5005800022E0060062200040520C20040040060060802002940064242A6004000486 22620640E1000065060C613602E336000000000000000000FFE30E0000018058018448210A10018A3000011009800000E406 0060061460AA01203600C05604620010620604E0060B601610100708708700E30822740740704F0070062000800000000000 00FF8EA30008018019018298250B01A180301406918F854000E31601014602628206240E000106006100084046626006006000b6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFE8B80000 AB8238838018AB8AB8AB8ABAA8103888800020E2AE2AE28EAAE2048842ACAAF2AE2A62000AE20CAAE224A56AAC0008A7206A 070064002AF1360269168A6836000000000000000000FF68CF0002018418010208A180180180180008180380008068060062 0000610C00400600780600608020000C00600401600600004E02640E20600000600601600E206006000000000000000000FF EBAD0000AB8998118058AA8AA8AB8AA88CA018ED80001C62AEA880882AE28421CAACAA82AEA361004AA066AAE01600E2AC00 00060860060062002AE00E01E646006506000000000000000000FF2AAC400001821905121800800801800800011C018000000076e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000600600690 6000006006006426006006000000000000000000FF7B764006ABA890AB8880900AA8AB8100AA821C898001AAEAAE28E2882A E0062AF2AC2AAAAE2AF0042A81062AE2AE20E2AC00042E9268060070042AEC0680E04E006026000000000000000000FF3D8F 000A01A81041349A01000801801001051A0180008070070060460070D644600600200700680000710400710410600600040E 0CE156356900004206D06006216006000000000000000000FF252A000155913155113005154955943154A2D9518000557557 556150556446556556D52557556404150426D56556CC6D560000862160C614E484554156346506136336000000000000000000f6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02640048E006 00650C006006006004000094006404006514000116106046016004046486106056056046000000000000000000FFC1050000 0182182192180202180180400A801801800000600600600602608610E00412C00600600020620400600400604400022624E2 8E28600048400E00E00620620E000000000000000000FF607000000182380104300A0018018C2000911C2180000060060460 408041460060040040060068840008440068048A6804000A8628E2D6236B0400432E326906ACEA8E000000000000000000FF 82D7000001801001A00A200008018082008038058000006006806006006C0E80600480200680640000630C80600400600400000ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (308B00015591 200D90C93191395595308095108D800055655655653040E4465521025465565540045500965562805565160003560D605641 600444E42E286056056056000000000000000000FFFD8B800001801001800851813801841900841801800000600600600600 610610000200600600400000400400600000600600040610600600600000601652E206006006000000000000000000FFAF66 0000AB8C98018098AC0C98AB88802188B88900002AE2AE28E0AE04422E2260242062AE2AE0020AE0242AE0BC2AE044000006 00600602600200E026276686086086000000000000000000FFC09900000180390D0050000038018401008418258000006006008ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106046016004 0074C6107056016046000000000000000000FF89AA0000AB8AB0AB89088D8C18AB88183110481180002AE2AE28E28E2AE226 2322AA2562A82AC0000AC2AE2AE2A82AE2AE0000060064061660002AE1062262861E6486000000000000000000FFB71D0008 018000A184080180180180004D002021800000600600600008609400222A00E0060040060004260060200060060000064063 060A6006104086006106486306000000000000000000FF603A0000AB8AB0AB9428818818AB88A8440100A380002AE2AE2AE4 AE2AE2362222AA2862AE2AC0002AC2AE2AE2A82AE2AE0000AE42E12E20E0002AC22600612E40E12E000000000000000000FF004ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (860008060120 1A6FE09C81C0000150274061D90068262082460860CE006020A02846067016066006000000000000000000FFD05500000382 2C83829C01C21E01C0B001021001802100700600E00100644600300210722010600448400608600700602620801600608E00 6025104006006006006006000000000000000000FFB3BD000801800001A3380380980184180A10B045800000600602602600 700E00A00209600000600200400600600400680600022624E28E28600280400E00E00620620E000000000000000000FFB49F 000001801C01800841A23801A15100040309800000700600600000608608200204600100400440500700600280600600011600cee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800411800801 8A880104BC218509000280C1808100610E40820600208708300A10E80610621000C5268562B74069163400062060A6006000 10212E006106406006440000000000000000FFDE1A800001801A01828C0B201801C2980A00280180000070065482209004A6 00A00200600240400041400640684200600600005601600600600880204600608E006006000000000000000000FF00008444 21800021900813001845840800084001900000600654604008208702200380610420600000404700740400700608040610E0 0600601021210E006086006006000000000000000000FFEBFB8028039A3483A80801201C01A038140A020188200071660065002ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060000440 56006006006206200000000000000000FFBD21000011901805800931845821801824104003084004640E0881264260CE2020 4240E21200600000400E0060064160060000060060064165200060064C628620E026048000000000000000FF23300000018A 180391188181180180182280300301200263064864A602242624A0A600600C04604000400E00650600614640000640614620 E08051210608621606E206000000000000000000FFF1A20400418010418028298418478018008810090A0008E10602600020 020E06220220666412402010400610640000E02610000600604600622033A11622600E006026008000000000000000FFF37A00aee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20224062AA2A E2020021002AA1A22AE0422AA2AE000002002402762100182102202282182482000000000000000000FF9E5A000000020000 00100200000002C411901000000000000002620602C1000080040000040000000044000004A0000000000110140040010080 008480100010050040000000000000000000FF876180000000A00000002000000010000200A0220000000000006026200208 4C00000001282C8500006010000008000000000240208288080400440028028020200208000000000000000000FF57870000 01821801823801801803849300050949040008E00602000000600610E28A10602610640800C54603602E00600E0A00060060006ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (558099559259 55D559558A3C819259558001557D5655411748655600C136556C0CD56400156556556516D575560003560D60560164005164 4E2C6056016056000000000000000000FFFF510002AA82A8AA8AA88C8AAAAA8808CC8088A880002AA2AA2AA08A2422CA0822 AA2AA32A22A2002AA04AAAA4122AA2AA0000AA42A12A00A20022A22202212A42A12A000000000000000000FFF58E01000014 200001040000000020844C01000000008000000002000480000C02010001240000800000000000400040000000004003002A 00800200800001004A0300000000000000000000FF91B40000AB8808AA8AA8890AA8AA8508A086488900002AE2AE28C08A0900eee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04000A802802 8020200208000000000000000000FFF2A4108000100000000000000000080100444000000080000000000002800023103100 0000000000000000000500800800000110140040010082000480100010010040000000000000000000FFAD218004AA800EAA C208AA8AAEAA820820C808AA80002A82A828A0EA2822AA4030032AB0222AA0006AA2ABAAA0032AA2AA000002002002222000 2020022126820A2082000000000000000000FF700C800A011000010004410012014024001000050001005004004440100000 034000805005100000000400804100804004000400100000000000000010508200000000000000000000000000FF77AC9001001ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000088002122 022000C8208280240340A10240020A002002A08000002002002002002002000000000000000000FFC9520000000000000000 0800028220008000800000000000000000000018000008204100004000808000008098888002280000000000000000002000 00220000000000000000000000000000FFA58C0002000000000000000684400B000800202200000A08410000000000004002 009A0000000002000800080000080000000000000000000000000040019880000080000000000000000000FFE08A00040003 200028A00040000001240A008000000000080002020100000008050000130800050000000000002800000000024020828808009ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0860800D8084 08489F6800880D80800008221A222002002002003002102003002000002002002002002002000902A2B80200000110280381 2002802002000000000000000000FF9356000401881881801809C09801081881809801800012602600400600680600632EA2 E14620608250780480EC8E51610E400416806006200000006006024106006006000000000000000000FF0C7D000001001001 0000010C3185040438004544000002148409D2006200040048051000040E4000000104100004004444000880800801010000 484800C15000800100000000000000000000FF73FB000000900900800800C00A00A00C00800A80800000224000A802202002005ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF24150000000000000002002000000000010012000001000001006006000000000800800000 000000000004000000000000000001004000000001001001000801000000000000000000000000FF520E0000008008008008 00800001A0080080080080000820262240020220060020060020060068000020070030060060020000020028020000000020 42002002002002000000000000000000FF397600000000000000000028251020065010000000008205001102004010002040 00000001120800001000000000000000000000450000000000000800000000800000000000000000000000FFC64E0000008000dee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (262D63564062 0200600010414600E006000206102006010002006006AB6844024204000000000000000000FFAEE2000001805C11A4585180 0100411040800B01800008630600004622600601680F00620684630000600000520E046106000207426456100491406D4650 6406046006000000000000000000FF890B00000D88180180188184C000001111801843000000600600020008402600624630 6006116000006000004006016006000006006006440000116006026006006306000000000000000000FF7F70000000000000 0000000000000000000000000000000000006006000000000000000000000000000000000000000000000000000000000000003ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (803101822841 831100800C01800014ECC701004000500600704680F00600600000680020E03700610608009700002601000000680C840084 000006000000000000000000FFC18B400041CC5C498089118528018290C880090480000864860804A654220710F01602E096 24610000600100722E02608600000640202630000940E20680F424004106000000000000000000FF2D3B004001C01801A030 61811408A0164488883180008050361065000060067066960020368CE5020110010840861064060000048A270C5286C05C64 A4414410000114000000000000000000FFC29420004B8418418318018010908410019118018000806046106106006426D06100bee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060164020060 06000000000000000000FF5E50002009901801E04941C40821C09201801809000004601610608180608E0060060060478060 0400600681600620600600002E006206090004006106006306046806000000000000000000FF8D1300002188181180100180 1809803144866C818000E0404702644600608E06618603202608E9000001870060162061060006243A89444204D80460E400 4000020E06000000000000000000FF1B31000621801801800801C15809C45200E00900800110C30603600000600648644E04 200E12F200008006206026106206080104A2900404190030620EC52008004116000000000000000000FF4704000011801811007ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (24AE00600C00 0041086036106106000084006884009404006004044A02882006000000000000000000FFA0F9000001821821A01043800805 841100928A8980000048060060061060068062060822060160020018268860479061060000040AE804008282006024044082 802106000000000000000000FFAEE80000018318218250338609318390008208EB00000460069E600000C0BE876856006956 02E01400601E2068060260260001060AE106040004026684808006102486000000000000000000FF6AF60000019059098C88 01800C41803001801C05802000400600600601694600680605080604600401000640600E846026000004006004000004146100fee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7BA19A018618 00800801880000C01684E00628400614F00E10A00700600000010600600600600600001C00621C0200005071240C400205A0 06000000000000000000FF8857000001825811A10011A01A1780580091080100402E400E82620180608601602719302600E0 040100060070060260060000040260050401053860C5020902022486000000000000000000FF69A7100005801C1588110184 3801C05808802B448221004146006006026216127006022006006514230100086006006006000284086144D1100C84620C00 5402102016080000000000000000FF79FB000001911B01D02001A01C81A01900800800000080500600600108600600642F020001e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600600 0000000000000000FF5CEE000000001801001C01801800001800800001800000600600600600600600400700600400280400 0800806000006006000006006006006005006006006806006006000000000000000000FFCEFF000000001210001801821A00 203801804081A04002684600600108630600402600604400200420000600600602600600040690610622600C006C07006006 106016000000000000000000FF1CDA10400C021A03501B05C03804201E09800025B40049688701640622600E01500E82E005 00AC8C028806886006006006000106826446116004846036886406006106080000000000000000FF3F3A00200980180180100081e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004080002 20600200680600000640600600600401E007004006806006000000000000000000FF16B5010000001803001A01901C212010 0508100580C100F03640E4800364460372A70B600602400094001680610604E00608141680720750E0010068060050060070 06000000000000000000FFBBD110400000180100180180180300108100100180004062061260060060860040060060C42100 04000406406006006006000006006006006004206006004006006006000000000000000000FF45F100000000100000180180 18000018008000008000006006006000006006004006006004002000000000006000006006000006006006006000006006000041e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1A2080180440 080994208260272062080B648EA0500400710C02209000100680612609605600000600600622640100600600280600600600 0000000000000000FF456B000000001801001C01801A4080188110081188A024700E20660600E2A602D0A420E2AC04A04002 020E00608606E00608020E20600644E401406006412007006106000000000000000000FF1DDE000000001000801881801910 28168D00000195400061574061101565564062D6826116416314100002046152116C560008060069168070AC046806826006 046806000000000000000000FF3FA808800000100080198188780018100100018390000660060060060060068042064A641400c1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (106406000000 000000000000FF49980000000018010018000018010008018010010000806006006000006006004002806004802000000000 006000006006000006006006006000006007002006006006000000000000000000FFEEB5004000001004801881801C45881C 04181A01800081644715010684680600720482700644E00000100480600400600600080600640650600040600600A0060260 86800000000000000000FF8CFB000000001E01001801E01889801C91201C010080006096000101007026006154006006A062 2008000502600C0264060010078060960060A8246007222006006007000000000000000000FF06F9000000001000801801800021e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (22028001C002 300810000000401A00481000021C0000200180600000000000000000000000FFDCBC080000081801885860301803000A1188 B0418000786416000000A0680640620203E01E00600000200004600000600600008620618600600021628604620608620E00 0000000000000000FF7E390800902A1B098C9A50013A89200943A4D32D000120605680088624E0268B6D02B4E8AEC16820A2 0840106AA10A68060008AEA56C96906800B068C6886D26A4E82E000000000000000000FFA58F000000009825801900121805 10081188100180000C650751601610628E20602200640610608110848820E01021650600000708602640702884E20625201600a1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200200300208 0000811028B08810C002242C8090845000040880C00814800844204900000828840820400860800800980800800800000000 000000000000FF1B17000000020840C08880C00988880903040984800000700600400200600A0221020824020020100161C2 08E08200200200000200200200200800206200A022032022000000000000000000FFFBB700008C1042800000100000051040 E8025010000002028000658E0C910110540000026138004028462C20050D5286800005004082002901100285000340081480 00000000000000000000FFFC0A0000000000062001000A4000050400010022000004090009600603108001002170008040810061e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000000000 00000000FFAE900000000002002014000452242202012002100000A54004804A00A8C004000800D14000800A008B49248050 04005004000C00A80808000C00800C109008288108C0000000000000000000FF8F7100000410580580180990580384182193 3851800011600608C00600E90614630600600600610040400C0060C48062060002C620610611604811608602610601600600 0000000000000000FFD372040200600C40844CC0A00C80D0C910C00D048001422C9300330B242003C0B01252BA3332304901 35422434133020820010030C30234030810234231130032C3002000000000000000000FF272204040040802826020840A20000e1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8550450D5155 0D50000C808908A0800C00D50880D00CC8D30C00000000000000000000FF247100080000040010C000004440000450420440 00010018010010010200010010010110000010010000018010000000000010011010010010010010010010C1121000000000 000000000000FF22CC0008AA0AA0AA0000AA08829008A0AA0AA10000000002A82884A88002A82A8AA80002A82A8000200200 2202A82A82A80000284400200000002A8030010200220258000000000000000000FF7AEF000200400A00B54800C00808A00A 00A00AA28000880000822802042800802002842803002800802812092802803002000902852D02802800802902C2A90290280011e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (820260300000 2A82A82884880012A82A82A81402A92A80002512002A82A92A92A80002AA2022AA0020002AA2AA4600A20222AA0000000000 00000000FF498400080000040041400000002004400000002000000A10000200000400000000008000000000002C08010800 00000000000028000408000000000220020000000080000000000000000000FFD1220002AA0AA0AA0402AA4A808A2AA00410 810200002A82A82A80A82882A82A82A84002A82A82004802A82A82A82A82A80002A82482A80002002A82A81084102082A800 0000000000000000FF68B50003543541540C01543343023103543542140000C10550D10930C90D50D51550348D50D50C00800091e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFBB790000218018258018140AB811805809801821100004643600400604600610608610600400600002400608610600 600608002608640600E00000E006006106406006000000000000000000FF938D000200001201253000021201000200290303 0000800804844C2000480080080484C804804A0088492C804800804804000800800800800C00800800D10800808800000000 000000000000FF307F0000008008009008000128448008508008088000002000002002B3000200200228200200200002A002 002002002002000002152002002000002002002412502002000000000000000000FF7FAD0000AA0AA0AA4002AA2800882AA10051e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (500004000800 2000C8200020110200800008900210000000000000000000000000FF5BEA0000208008A28008000EA8200008108008008040 06A00A14008200600200A10200E0020020400C241211601A23E0020810031832030020014832022031832030020000000000 00000000FFC98D400C0040040040040040040152040040440100010110055440090010214110050D16050051491050050010 91000000000200000080001000108410500400000000000000000000000000FF94E3400400C00D00C10C00400C40C20C04C0 8C00800100300300230B00302304324320301300B01300300340300322B0024003124020A210340300200300200A0020020000d1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (98028E400162 460083B600620638E2460160C820600801006600608600602600000641620610E08004E0CE29662627619630000000000000 0000FF51A00000010018039058140018818420010010A1900028600E01004000600620E30E00610008E01010201621600600 6006000006106426426130086016102086006206000000000000000000FFED140008001000040400400000900220440200C8 00002880B0206016400020000050110040110080110000420220000000000000210040340248140020050000010410080200 000000000000FF085D00000000000000800A00000808201501204008000042205462060200002A44A042000C0080A00440000031e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF98A140000192184180180000180482004180280480000020060400060060060D28160064C0086800450006006022006006 00000600E046346800306046206006006126000000000000000000FF206700000101188B8018240018218038010219208000 00000600602000600420010600601420E04000012600608C00600600034E44650600E0000465060B61364262160000000000 00000000FFBF7700000102180982184002180188182D029812800002228632620620622600200608600C2061400202060C65 4C01602600100700700700E201217106427047407006400400000000000000FF12BE00081912198988380A0018718800010000b1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (08D565560000 964161560260043561164D204648E126000000000000000000FF771C0000018C18A98AB88A0ABCCD88DC8C88D83000002A92 AF2AE08E2AF2AC3292AF2AF00700E8202212A72AF280AAE2AE0012074070B70270008974360A680742610600000000000000 0000FFA472000001801843801800001C0280180CA48A02800000300700620080700500108700700712600080108F00712200 60060002460A6406316000006046006286006206000000000000000000FF1FC30000018038058AB8880ABA8988808B8C9908 80002A8AAEA882882AEAAE802226AAE940826000190A0EAAEA42AAE2AE00004609640E40606000E10E00675609E4560000000071e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800080680680 6046006804006006806802C4680000090680682080600600000600600688680080600604A84E08640E000000000000000000 FF5BF14000018AB8118AB8880AB8A108800308100080002AE2AE28E088AAE2AE2AE22E2AE2AA007001AA820E2AE2082AE2AE 000026826006027010006406202096846036000000000000000000FF70BA00080180D8018018400018010400400018048001 0060060062470060040060060064122A600080001600601000600600011612600611600022600640A0061068060000000000 00000000FFDC720000019559019559521559311541205032A8800055655655613155655655644E556552216014550446556400f1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFC3 F200000380180180180000180502384404500280002160060260000060240160060060460062245100060064120060060002 D60060061060244561061040060C60A6000000000000000000FF5D770000018018018018000018000098000008C080000260 0600640600620C5060060060840061000000060060C000600600000624E50622628008645604E4C620E21600000000000000 0000FF59B40000018018818018020018020018000280A4800000600604620000600400688600600411601000002600610200 6006000A8E48EACE2160102AEB2E086206457086000000000000000000FFD90900000180182B801840001A110443490038080009e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E2AE00002E02 E01602608024612631003602600E000000000000000000FF825A00011395415515580195595291195084D88A000000E55655 61305564064B25565524C25561061265565561065565560002D60D628634630640E2464422462460B6000000000000000000 FFA3C58000018000018018018018048498008418000000016000006406006006100006002000006000004006006006006006 000506106506406410016406002486406146000000000000000000FFAD840000A98AB8AB8AB8000AB8A90818880898088000 0862AE28E0AE2AE0840262AE2AE20E2AE0000202AE2AE0002AE2AE00000608602E00E04000600621410E00600600000000000089e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (016804006440 0068060110060061400062000068060028120068060000D6006006006008C561060020060C6086000000000000000000FF31 F20000AB8AA0AB8AB8018AA9F08A488280504100003862AE28E08E2AE2AE2402AE2AA2402AE0102AE2AE2AA2222AE2AE0000 0648606E11E00018601606200E116406000000000000000000FF313400082180000100180180180082380490184000004C60 060064000060CE00200600201200642040E00600443400600600000620603600E0000C610E08201608E20600000000000000 0000FFF53E0000AB8AA0AB8AB8018AB8008818AC88990A00002462AE2AE0AE2AE2AE2082AE2AA2882AE4802AE2AE2AC2B42A0049e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF445B80 0C09C00401805C01809840801C20A118008000025006006186007006C8100602280080600020F4160077068870061B000682 6406006040A16086042506006006000000000000000000FF7F37000209A00001401A01C10C95800843C01000000108700600 605000710E8A000E32E21040600500702720B04310700602000602600608E004426117006026006006000000000000000000 FF2C08000801800001001801800811808C41D010480000026002026006006006140006000808806108006006002102806006 000406A4E5062A628000645648C4C620E256000000000000000000FFFCE5000001800201801801800804802810853105000000c9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000016286006 016040006086000206206006028000000000000000FF701B8000018000010258018808308048208218318000281086000006 08E006A0201610600203628000ED07108090C068060000060262AE0160B014642610609614E006200200000000000000FF9B 8D808001808041A03801A02B0A800900A8380180008040045500291068064020C648611242604100600E5008A00060060080 0620628648600004E0170C22C6006006000000000000000000FFF2D681000180802102180180580080190090580080000240 424D6001106007002347802082026020436006086006006006000016406086206000006006106006006006000000000000000029e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0041000040E0 0640604C20600604E2D000628609000820604600000630600600600000620624E406486206000000000000000000FF565300 002180000180180308002480410A8058B5100020608612000E0C63160063040864B600600000604E20014010601600000604 64D649654044E026004016046016450000000000000000FF157200002180001980586300101380108B801883080010E0060A 600E00608E0142842162AC00602807600E20402400600600000600600628621030E10632E10601620E000400000000000000 FFA1A80000018000018C180102104082100481380100A010624620E00022631604C43401A40400600004646601400408602E00a9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFA4AB0000AA 8001008AA8C808A0AA8880AA8880AE800022259228808A2AA2AE0222300020022AA0420422AE2022062AA2AA00000248206A 11A002102012450002112402000000000000000000FFE28A0000000001200000040000010040010000010000000400026006 00000040401000044400008000800000410C0000000002D00000004004004502400000000800A0000000000000000000FF38 3680000000001400004004000002000002200000000900280062260000000900802A81100002404A00001480400000000000 002485000C01200801105484C8228210000000000000000000FF2AFD0000018000018C180102000182002184180100A000E20069e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001005000000 00010500004480400140000000000000000000FF263A900555800155D5595590990B909D05955D1580001568565545575575 574D65564C7456556000D5755644C4155575560002D60D628654650040E2C648E2462460B6000000000000000000FFC86500 00AA8004428AA88A8888AA88AAAA8AA8C880003220222AA28A2AA2AA48A2A20D348A2AA4004832AB2A22432AA2AA00002A02 A0122222A024202210203202200A000000000000000000FFBEF6008000400000200000424020022030001040000140030000 40008040010010048081010044080000001050A00050000000002000300080080C000802001008820000000000000000000000e9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000100089 00004008100002000010001200810010000004002485000401000005101004C0220210000000000000000000FF449D108000 00000020000002001400212000021000000300D00004008000000000000480010000880000008108500000000000D0000000 5004084500404480000800A0000000000000000000FFFB1A8000AA8000AA8AA8AA88AE208888008AA880800000200228A08A 2A82A82222AA0822A32AA1002AA2AB2032022AA2AA00000208202A00A00008200200210A00A002000000000000000000FF2D 4C800801400208401001245000041200001000000100900000404100400482100540084100408100900500D10C80500400050019e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B2100100840A 10812800804800800810844A88884004100210215240204A002002803203082000202082A422820A214A10000204A00204A2 B0002002412002002452000000000000000000FFAA4600002209000008000040000000800000000000000000000000000000 008000008000000000800A0408008030210000400000000000000000000000800000000000000000000000000000FF058D00 0400000000004002188000004420200000000000000114000000000000000028000000000080000000000000020002000080 0000000000000000801000000080000000000000000000FF525400040000000000000000008002040C0000220000500200020099e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0800000000000000000000000000000000FF9AD5000000820C06804800800800840802A00800800100301200A00206200200 3802013002002200002002003003002022000002002002002000002002002402002002000000000000000000FFBDB9400023 85100989580188D801811C09845D119040027006084156406056006006A0740790600028650EC4E506156156500006856007 056550806006416006006456000000000000000000FFABE63001031014000000054010830202E80AB028000000420C204008 000000804820108004004101040001284054604400040001000000800000000000000200000100000000000000000000FF2C0059e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF24180000000010 0000000000000000020000000100000010000060060000050008048008000000000000040010010000040000048000040000 01001000004000000000000000000000000000FF5136000201A21A00A00800800000200800801000A0000064060A80020020 02006002002002006000002003002006002002000002002002002000002002002802002002000000000000000000FFC91A00 00042000002000001000822020B40AC02820010000012040100000008000200000050002000000005040004000200000000000d9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000380000388 1009819101001801801869000080602E0060060C6086006C0600110640600020600680702690602200082280688000402020 6004802086004A06000000000000000000FF707B00000D800005941841A40210001809911C05000000602600008640644750 6106040206006001006C4640632644602E100446006120004240D06414007487406004028000000000000000FFFDCE020001 800801801809800000001881003889000005649620040011408602E046408006006050206006006006006206000006006200 40400000608444600E00620C000000000000000000FF7F7000000000000000000000000000000000000000000000000060060039e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (30D900107004 01104C014006000000000000000000FF086B000401840401801801800A0080180B923A21900120600E4400000860AC00600D 146C0608600190500402688600600A00000A4A5206414080004484008056804006000000000000000000FFE2720200018000 00820821E40888801090909885800002E0062000060164270071262361062060000064470060060A60121004020062202062 0010610D422416004006050000000000000000FF6A5000000990040110100180104100180181381100008062860062802264 046AE344410206006028044404306286F06240000000014014144000D0420440280421480E000000000000000000FFA2BE0000b9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C60560064964 0604601000704600600600600E00100700F020204000006004046004026026000000000000000000FF8356000001800000A0 0001800800815803001000000040680780600022E80600780634E40600600000600608680620600600000610634000400021 6006046006006006000000000000000000FF7C9700000194022330902180180780B831955810800018718600620632F55442 6304806006106003645464E072060060100000900140B404400200CD1E421004004006000000000000000000FFB8AE000001 800022008841801841801020801840E800006016427A000040060464560078060060001060070262861060200000802468000079e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (808002000C01 D21C018012020C182800000260070060004462240060448464861460A904400400E006006006000006004020006028004006 007404806006000000000000000000FF67550006218000A5001001800A008018018030010280886006006086027804206824 0278461060A082400400F846406106000806404804006128004004006404006106000000000000000000FF5BF60180218000 A180101FC1081084B829001041000088602602609000609C12E00420E12600600401C02414600630608E0018060048068040 840140048260061860A6000000000000000000FF7CD5000209810400008001AA082080D84B9410100000846026046006204200f9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (105464060060 06042106000000000000000000FF1ADA000001C020111012A5981805841801801920000003602711600600400400608C8860 0600600000400500E00608E10610002620C2E41260000A4206426004606086000000000000000000FF95AA40A00180008809 2803C11A51841801005C82050008E08608E01000680450E00490620E08600400C004146846926006000006C1400E48420401 4004206804066026000000000000000000FF7E0B200001800043009001841945831510805A10020040600702650790614400 680422E1260060004040A448620E206086080216004007414010204005007405006006000000000000000000FFC7940000090005e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200400600600 0004004004006006006006000006006006004004006006006004002006000000000000000000FF36B8000001800001001801 A018018018000000008000000007006006006006002006806006800800004004806006007006000807006006004000006006 006804002006000000000000000000FF86C6000001A00000005A01801C21801808202008820000200604608000600600000E 0C689608600400E10420700612600600000600E086204404006006026406002026000000000000000000FF7D3F0140018020 C5011B4184190181188020002280004C012600640610712601008620EA2680680040602409621721680600025640621603400085e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00001C118669 43BF428001400180008A000700600600600600080E0067060868000030060060060060060008060060060060000060068070 04802006000000000000000000FF6CA8010041800201801801A0880580012320101580C00C854E32E0A804E44E4004AF0C60 461160040025448360A600704E000486806006804004806006006016006006000000000000000000FFF63F00000180200100 1881900811800001001021900040000600600640600600000641600E2060A800201400600600640600000600600600400000 6006006046002006000000000000000000FF98FA0000018000000018018018018018000000008000002006006000006006000045e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680600608600 4006000000000000000000FF5E9E000001800200005201B01891809AB2800808912080230F5360A902633620222A00834701 655000680600E126A068B600000600E107806000A0F006036006800016000000000000000000FF6BB4000001800101101001 801B21801944800A3888A02082AE2AE0A622E22E201AE23A04AE20E0A80062AC00E0A640622E001286006006004550416106 406006100106000000000000000000FF6C18000001800020805801900811A1201030A0019140040356D5655004655644050E A56156016D4C00200681654700655600000681651600600400600602E90400600E000000000000000000FFAC17008001802000c5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (406004890000 00440E12E00600602E00000628628620E00002628724640440C026000000000000000000FF0FD6000001800001001A018010 01801C0100100180000040060060000060060040060060040000000040058060060060060000060060060040000060060060 04000006000000000000000000FF1BB10000418000A0881511910911816045817A050000002006000017006006002006A900 06000000000006044806006006000006006006806000006086206056084086000000000000000000FF705800060180000180 1001E00801800401F11801E00004204600020000600604288302181600000000000400540600640780000600640E0042D0000025e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060A22240000 010E0000000000408820296007008A0806846002008812009020000028000110000000010000020040000060000010808000 0418000000000000000000FF4DAA02032180880188185180C1718800810D1029800000621602000011608600609609602604 000008808604640628600640000638658638E40014E01E006014006186000000000000000000FFEEA40200B1B12309D29821 84A341A4C28D3232918000C260AE82080EAAE126944826946AB6C40890B288A6C06AB6C86A86040AA680684E886890D16856 88E904806B16000000000000000000FF5E6100000580002380380B901209901841009023800010C206D1610600620E00E30600a5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (11304310350A 000000000000000000FF74100004492C021A2050005C000022024020A2D60000801080908840884804000A00801000A84840 800C00908889000A00000A80800808810800880AE0800A44800800000000000000000000FFE82E00048080196494A000C000 0885E810900800800000300600400A00302210200220220200200801622A00300600241A0000220020020020080020022020 00002022000000000000000000FFCD5200000210108002042000028010002102510000002A40080061962200108841001404 0040C1001641000202200001E00304000000600400900201000B0400308200000000000000000000FFEB64000004002000000065e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02802800A22A 028030020028D2800832942A02B12810832882C02882912812000000000000000000FF4D0700000120123228D00102104123 02C02042220001000004804820824C0C0009409000010048088148B0001004804A00000A00C08948840800A80C20800A0C84 08C0000000000000000000FFB0C6000243901101943801905801801815905881800000600608C04600600E00651608EA0608 40C00A400682600610603640020600600604600810600600620E006006000000000000000000FFC83D000100C20C34C00A28 A20B28D34D40C30C4C800120281300311208A00394302302300342301100B2831024020033020110830832C350B40122312B00e5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (152110314208 3143300000550550D50930021080D50890D48550550800881050D50D50550810800840AC8808890810940A00800A20D08C50 000000000000000000FF081F0008004004104122000124044004204004000001000801001041000001001001100001001001 001001001000001000001001001011001001001001141001001000000000000000000000FF3E3B0008AA0800000200AA0880 8C00000008808800002A82A82882886000002A8000220AA82A80000900002A82A82A80400000800000000000000001480E81 20240300000000000000000000FFF40A000200A54C80A00800A02A02B04A0CA40A00800080200284280288A8C2802C1280A00015e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020020020000 00000000000000FF052B0000AA0AA0460484AA2C00900AA0180AA0CC00002A9AA82884882A82A82A82A82202A82A80182A82 A82A82A82A82020003822AA5422A80082AA2AA28A2A82A82AA000000000000000000FF8561000C000B41400A420040042002 012204000400008010000002010882280002200010008000084205000000000003000002900002A024000041000829000800 0000000000000000000000FFF66F0004AA0AA0800800AA4800A00AA0820AA09000002A82A82A80882A92A82A82A82292A82A 80002A82A82A82A82A83280002302A80002A80102A82A82102A82A82A8000000000000000000FFAF7A0001542002142101540095e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (311105300300 3483550002002002002082413000012412103082002002000000000000000000FF7A4712004100380D801801901801803801 8A1801810000601640400600E51643620641628600604040400620E006000006406036006206006200006006406046006006 000000000000000000FF6A540000012002114402010294092002002002000000804004844800804804800800800804804800 804804801004000800000800800948800800800800840800800800000000000000000000FFCD450002008009209028008028 42800924800842800000200000224200200200200210A0020020000020020020020000D200205200220200200000200200200055e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000090800 00000000000004600600809024C5000A840000028800C000410400D400000040400004002140000002080808800060000000 00000000000000FF306B02000180280B0008000C4980822820830840848001210A0480024066020021022020860021203220 0209208210880220300B043402002201203103202422003002000000000000000000FF90ED400C0040040040040041050008 04C2402000002100500524400900102500102800102908540100500510100400000000000000008000100040800000000000 0000000000000000000000FF6D6E400400C00C80C00C00C40C20940D14C04800802100300301200B0030230030D20C30330800d5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (700600000000 0000000000FFE0F20008039E38098A78420098038C20A08E0045884030610620020604640E1180020764160062006105EE11 600602000E00600600E00608623000E20609E00E0162A6100000000000000000FF6A8500000980191194180C029801900009 88800903000060060A800040608E00012A08608600620000001624610600000608600601620610E080486406106216006326 000000000000000000FF476F00080800008001003000000002800A00010C00A0080000096006028100080048090490208000 00840032010820000010000020000801010834005002000008E000080000000000000000FFD5FA08002000110000000002800035e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (244846A06AAE 2A808600241649600600A000006486146B12216006000000000000000000FF86DC2000002258090210008018018020008058 10800002E00600000680600600012408E03600E801004416006006000006002006036026042C0004640608E0460160060000 00000000000000FF3AF30000010090A480580102580180182080002180000860060462000060064D00120060861462801501 260D400600023600054E40628E48008031602E4461100C62B6000000000000000000FF8D0E00000300380181180100388580 D8C3800081880040E00620620600E0060000020060064161000800060060164C10160030072270160022210370B70460041000b5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (213190013100 00C46D56D56550556D564C28C6556D574CE28440AD56556D5655042E0060060060465562040161161075540064C600000000 0000000000FF99210000AA3032C028B8AB8AD8AB8818A8C8B8098000806AAEA8E08F2AEAAF000004226A0E22628028E80F22 4AAE2A880E00084604680E1302010AE006C162222A6AA6000000000000000000FFECE5400200001020001001801801809802 82B80480000060060060010060060004040060068060000A60070040060000860004CE2AE28E00010022644622600608E006 000000000000000000FFBEF90000AA0818052C98AA8898AB8E808A8E81C78000B06AAEAC84A82AEAAE540F04226A062060000075e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF4CE2000001801220A01800833801802000A00041800080E80680600600680600020610E80600E200006806800806 0008860068860868CE0060008860061060000060C6000000000000000000FF7E6F0002AB8AB8078AB8AA8858AB8800A088A0 8300003362AE28E0882AE2AE2B009E2262AEA0700522E2AE2AA2AE2A802E0060268260062AF0041060268362A84668160000 00000000000000FF5FE2000C0183101080100080180180C205800001800044E00600604600600600A03609614710E8008025 0611000600052600608690634640690040694E006004006016000000000000000000FF1A0F000555B55909B551549319559400f5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AE0B42AE0000 0640650608E50E00600021650601620A2AE146000000000000000000FF892900004182102280102180180180B80080188500 0000600602640000600600000E4060060060040160064040060000160162D600604645608404E20600604200409600000000 0000000000FF78DE00000B81300094D80180180184180092B820800000600600600600600614808613400600610202000600 C0060004C64A600624650608640208612E2AE082006246000000000000000000FFA099000001A01090801001801801849C0A 8218100000106006046240806006810046006006146905100006004006000206006216216206006C8422F30E21600228C416000de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (88A88C80002A C2AE2AE0AE2AE2AE2A83201142AE2AE2802282AC2C42AE00020E22002E5360262843000260262263042AE00E000000000000 000000FF8D8500015583411200B11195595594295591482200005545565565305565564825485445565560064C0556406556 0004160C005604604650C00604604E4C6546556016000000000000000000FF8AB780000580000100102180180182C8018208 20000000400600600600400600001020400600600000000600600600000610028600628605400000E29610E0560060A60000 00000000000000FF42D000008198108880188B8AB8AB8818AA84181980002AE2AE28E0AE2AE2AE2402260022AE2AE2002862008de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFBFDF000201A0010900101180080180294100081000008048060060000060060030900848070064040930020030068000 160508D600600601408404E0060065060060B6000000000000000000FFC5650000E98AA1570AB0958AA8AB88881100082200 002AC2AE28E68E2AE2AE2A82202442AE2AE0003002AA01A2AE00014621000608E01E2040007060060060062AE40600000000 0000000000FF6FA00008018000200A1823801801808801800880800000400600600000400600A00000C00600628400800414 40060000A600800651600E04428428600600600C006206000000000000000000FFA09E0000898AA0010AB8818AB8AB8808C3004de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (780600010600 000600E006006000106116006206026006000000000000000000FF15DB804C89A00035060201809881828803804C00080100 52060060C6006A06C0500001120700640001100F6074470788060090862A690601454048E08F026106006006000000000000 000000FF44BF000001800020803401848D01841803021A00080030640641648002601708200000414F046004006002022007 08000E00814632600600600401600684600C006006000000000000000000FF14EF0008038000208012238008018218151338 80000000600602602600700680200002C0060060800240033420060014C6080406246D460C620008652E2AE034006206000000cde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0100205A422E 6360002042B61040980840B60062080000042446061803060000060061060B40A00860A62264242C600E2000000000000000 00FF525A800001800100854A0180080388080188890A820000688608000600600604600020000681402208600003012F0100 060C00060AE00600E00A02600E106106042106000000000000000000FF9B8C822401800009002881820A01800C01C2280080 00004026140220336006A040400080A602421000A0000000260000160000260160060044A020600600608E00200600000000 0000000000FF6DD2840511E00000800901801801810C29C008008001807046146001C8FC0600602800040600600980401600002de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 4BA300000180090180184188000582180180388184400062362300000040270261120260C600E04800600000820610800600 00060060060C608010E146106004442306400000000000000000FFB30F0000818000418AD0118020018008818C8851090011 61061000464463161044002062060062000062000200160002061400060D64464160500464160160C4002006000000000000 000000FF4F9D000081800019881805803001905885801825888004E00600E02602600E086200124206006000106204404146 00000600000600622620600000E20644E004106216000000000000000000FF65D200000180002500102B881001822853822800ade040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000A0000000 510008000280080000000004020200000000000000000000FF7AFB0000AA9C49148518AA8880AA8AA8890AA80080001C22AA 28C48A4022AE8120522022AE24208007A2D62062AA00014200000208A01A0020001020020022102AA4020000000000000000 00FF36D000000000508000800000000000100200100300000040000260062000000060440280000004004000240C40000000 100000D0000040010000448400400020006090000000000000000000FFD8AD8000000280320A200002400000004000013000 004500000062260A80003483100800001500001000100100000004C00004002405005203000801480C811000624000000000006de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (012090040040 41001004B204040B1005000100800884145004000001000280000280C000000080901080040000A0000000000000000000FF 55D5800555F5500D913555949D55D13955C339538000556556554516D5755654755445655655640020643445455600041680 005604604655600044644E4C6556516016000000000000000000FF381C0000AA8008208828AA88A8AA8AACA88AA8A8800000 22AA2AA08A0AA2AA0020822022AB28A200C8320220A2AA00020A00002A5320230AA3002222222222A22AA00A000000000000 000000FF2A960880010010A0020000204200020000100000000100100400000000100101000408100000008015008008080400ede040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF56CD 08000000011200000001020048C00000804000008000000204200008010008000000000004000089008C80000002C0000000 2405400001000801280C8000000240000000000000000000FF490F0002004000200202000400000000002004020000000000 0000000000000100000900000000800000100008000000100002D00000000002004484004000000200900000000000000000 00FF10C58080AA8AA80088A8AA8828AA8208AA8A2C8880012ABAA828A0CA2AA2AB2A22AA223AAA2AA0002A32232032AA0000 0200050208A50A2AA0000121020122AA28A142000000000000000000FF68CB80080141100000100142140100040300000400001de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (014008010008 01000140000801005044800000000000000000000000FF68BE000000A00A0080080080082180080580080080000000202120 0200000200000009200000200080220A00200220000200200A002002002080002002003002002000000000000000000000FF 618100000008020012800000000A00800824000000002002000000000218018002002000C800000001008020002805000000 0000000000000020000001000000800000000000000000000000FF2DCE000004000000000000000100000000080000000000 0000500000000000000008000000020002000000000800000000A80000800000800002000001000020000000000000000000009de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (480002420800 4024004001004800000000000000800004000800000000000000000000800000000004000000000000000000000000FF37FF 000004A008008008008009008008008008008001002002002002002002002003002000002000002002002002000002002002 002802002000002002003002002000000000000000000000FF99DA0000018818018A1801A0182B8098058A1A018000006026 C1400600600600700600E0A802600200EC9600780E4280060870160060060060020078060060048060000000000000000000 00FF1D7F000001001000011001001000009010221000000042440402C209844024004C145040000040010040044040440000005de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF57680000 0000000000000000000000000000000000000000000060060000000000000000000000000000000000000000000000000000 00000000000000000000006000000000000000000000FFC73900000000000000000000000000000000040100000000000060 06000000000000000800000000000000800000001000004000004004004000000801000800806000000000000000000000FF 9655000000801000800800C00800011000A00800800004280728800200200200200600200000200200700600700200000200 2002002002002002802002004000002000000000000000000000FF3FA600000000000000100000000000000024000000010000dde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (220491803204 20200060502469C0226800040000000000000000FF9D7D000001A01841921811801881041831C01801800000600604602600 6486406136006000046000406106006046000806002006002082802000026044027008406000000000000000000000FFDFCE 000001901805801801901A20003841931851000050600600002600700614702609610050602002621640600F000046006517 0060460164A0D06006D26144841000000000000000000000FF55CD0000498419118418018018800018018019018000026106 00040020610600600600604000610010600610610605000600600621608600600002420600600C0080000000000000000000003de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A6000006006 206407006200207000086106006406080006000084100000000000006000084202806000020000000000000000FF767E0004 01801001801905809B08821821E01800800101614614008980600600620640620000600000F08600600601028C0005060020 80400000806104904416400000000000000000000000FFFEEF000049D4111508180990184080180980988880000060860002 0600700632700E09610032602104648E08610E05102600210E402002012280486424104847010000000000000000000000FF 2BD20000018008218018418018411378018A593100006E64060260013063064060860060204060813C60062064269000040000bde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (091A00020188 0801001841801800801001801800000010600600E00680603600600614640008600420685641600601000600600400608700 E004004002004804046000000000000000000000FFAE7E0000018018016018018118809010C1803800000000610780622030 680780780640600000600401620600600600011600E40E00610610600400400642414CC06000000000000000000000FFC34D 000001800001801845801801805899A81910000101644600633620710600600680600000680004620600600601040400800C 0100704D800000615020400201E000000000000000000000FF75A3000001800001001881801831E29801881E00E000246006007de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (816006006004 007002C06400006000000000000000000000FF75AA000001810D15449C21841801801805C018008000806087006001206007 1064060261000060042A62264060060000040060840060868162040060A208E000026000000000000000000000FF3B6C0000 0180088DA41A0180180083140582381000200060060060064160060061064061000060101478860060060000040060041064 06406310004002015802006000000000000000000000FFC69A000001AD1861815801841D0082940183B986002068690700E6 0010E02611640608620000678C80640610618600810400610608601610608C004D46104042006000000000000000000000FF00fde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (069160C60000 0E80700E00080E1060460060068C69060068040D4006146004286046445806006006000000000000000000FF3960400009A0 080182180180D801801801C01820000044600EA961060860060068A60070000060000060076170060200040060048A7006CA 60002060021264CE006000000000000000000000FFD112000001840C0920D8A1803901881801C03810000128E20600E02112 E03781610640600010600788619611E00600010C006004806416706006086423086066806020000000000000000000FF01FA 000001810801801811801809831D45881910800002710604608600610603680E0060080060140160461060061001040060140003e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001801 8018018018018018018010000000006006006000006006002006006006000004006006006006006006006004004006006004 006006004004006006000000000000000000FF93C3000000001801801801801C018018018010000000006007006007006006 002006806006000804006006807006807006007007004006006004006006004000806006000000000000000000FF897C2000 00001801841831801811A81881801020000000E00644602004600684812600600600000501608610600600600E0060160048 06006006006006004112006026000000000000000000FF827B000008011811C09881811801A49C45D05110000008650C08600083e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1600602CC160 0600680400E006000000000000000000FF626B0100000218018218038018019E0001981A1880000060250060468068860008 06186106000004006A86006006806806006006064006006004006806005020806006000000000000000000FFEBF500000002 1801801C0180180180040180180000000045264A62100064A610050640601624015400650600600600608600600480700700 6005006006006002006006000000000000000000FF48D500000000180182180B801801800091801800080000600400600600 6006000006056026000004006006016406006406006004004006006004006006004026006006000000000000000000FF853D0043e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600620230E02 421600000800600600E00600600600000400700E007029806006007002000006000000000000000000FF2D5C000000001001 C09821C01805801801C05B5080010064088C62302872A60220070050460000A080600600602600604E000006004006806000 40E00600400200E046410000000000000000FF44F1000000001001801C01801A05811C81801800080000629038642E506206 44028624408E0000A8006006006206006286000005004006006000046006004006006046410000000000000000FFBEDC0000 000018018118418018018000018859508000006546046150846B4600050E00645600014D00680600E046006056006004006800c3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (40015883A8B8 8B843841801801B0A8800000816404516016006C0642700EA0A24601000202642608C08F20724620A40C2064062062020A71 16446005206406000000000000000000FF295B000000001A0180180180180180180180080000000060048060000060060048 06002006000003806006004806006006002004004006006002006006005000006006000000000000000000FF5A8701000000 1401801811C01C01808011881801800000600704040600604610300605504644000000600601700600600600200400680600 6800026006006006000006000000000000000000FFDA5C000000001001801E01801801E0000180180160000060C6000100040023e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000016802 0040706200000000000000000000FF110400202010000600A14002000000000004001000000000000960062C008848028020 8600118001000060020008200000000000600440000200000000000020046030000000000000000000FF1ACA000084081801 A8180B8018018000018029808000206098000040C0680602E80600200600000002600600400641608604661C02E006036000 3A62864CE204000506000000000000000000FFCA24000080321A31821C01A01B03AAA2B5A40A488000B268A8800886526156 88C526802816000C00A86886A4542690E89684688485682E8B6800A0EA4688EAA08008B6000000000000000000FFAA61002000a3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (812003002002 00100894204300300301300340324320320300B211083003003003323512000000000000000000FF2CBD0004004112204012 8020211036814010C2040000008000B0C800001001011024000000800810284000A08880048C508208C0800800800C408108 00800804800080000000000000000000FF27AD000000442280C20800C008828028A28A084080000225020000828070260030 0250300E00020010288640200600200220200200212A08201000A00220208000200A000000000000000000FFB30F00000002 80580000001402600802084000290000880A2000611E820200204009000020000400840A0008062008022841C100140200600063e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4A10800400A0 0800A04A00A00A208000002802842802002000002800803002800C000020030030028028028D280A8128C28A280085280280 2912842802000000000000000000FF48AB0000002012830014014010242202000002080000000000804A0000400400000480 0004800802004805001004000D48C00C80CA0A08A08802C008D0890824800000000000000000000000FFA38F000000009843 A018019218418419018059158000806B1608C00680680640680628640608840000600620620644645602E116146146406040 0160A6446024006006000000000000000000FF8B03000202140810800CA0800E90D00C20EC0C40800100300300315224200300e3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A80202A8200 288000000000000000000000FFEC7A0003543141145543541541143345541542200000550D50D10930551550550D51550800 D50A00550550D50D50800828CB0908C00A108C0800C00C10CD0D20D50800000000000000000000FF56450008000000000000 0000020440000000040000000010010012010000008000000010010014008008010010010010010010010211211410010011 010010C9041000000000000000000000FF761A0008AA0A80202AA0AA0AA0C80880AA0AA0820000AA82A82880A8AA8AA82A82 A82A80002A80002A82A82A82A8000400000420000140000200080240220210288000000000000000000000FFFF1A000200200013e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000020024 00002002002002002002012002012102102000002142002012002002000000000000000000FF9FEB0000AA1104AA0AA4AA4A A6808AA0AAAAA0CA00002A82A82880882A82A82A82A82A80002A80012A82A82A82A80022AA2402A83102022026002AA4122A 82002A8002000000000000000000FFFFDA00080002044000000040040000000040008C000080000004020080000100000000 00000000008008000000000001000000200A8000410200130080000000000000000000000000000000FF8CB60000AA4220AA 4AA0AA0AA0B00AA4AA4AA08C0000AA82A82A80A82A92A92A92A92A80002A80002A8AA82A82A80002A82882A82002082100000093e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C00C00C00840 D50800C44800800104300300A003043043003003003013003001013003003042402002002402002012403000002103003002 082002000000000000000000FFF8051040458018118018259438010038D1009801800010604604400600608600600E206006 20600024600620620614E10608E006046486006000126406046006046006000000000000000000FF60040000002142010012 0120100420020000122000000048008448208040040040008050048048008048050050048008008C08008C0848848800800A 108008A4800800000000000000000000FF5CDB0000008C0800A00800800851800801800800800080200200220200080280080053e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001302460 80000000000000000000FF87E508014400100800000210402000102000000100001200245060060001200000004000080000 004000004002002C0100000204000100000000000100C04800106000000000000000000000FFB96300200880080080182082 8C8008AC88008800800004204250C00200600200600200600600200002240200206690284208A1820632436124410A320241 2200023002400000000000000000FFB231400C10400400400400410100420000422000000100500152000102100500100918 100120100100D005005000008018000100000008001000000018420404000000000000000000000000FF8DAF400500C00C0000d3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600610010 62060061170872360060820250070060410D700600A02A023106000000000000000000FF2EE40008018518118098A1801801 88287F8638A90A0054E28610850E42600600610A00600600608020608600600600600601E60641618E586000206426426200 480026080000000000000000FFFBF6000001801803841941801801801901801803152001632E410000026086026002016086 0060404060860060460060060060060060560363104060C6046482104026300000000000000000FFDEBA00080005000C0400 0200200000008000000200C02800100064864000880C00800101000000400800000000880004080000002080000400880B030033e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB8AB8298A08 05889907800011E0062884882AE2AE8462AE2262AE0060022AE2AE2262AE0062060042121840660060020064160903042880 06000000000000000000FFA2E400000100180180180180190180281580182180000C64268400068060064168068160060068 0000600600E00628608600610204400620680004E0AE22285604402E000000000000000000FF733900000180300180180180 18038088A182589100002061160064200060060C60020860060060000060060860060360364AC04840849612E00050640601 2080006506000000000000000000FF676C000001801801809805803C01883C018058B1000000600600600E0060160860120000b3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600C0468CE00 0000000000000000FFC0C240000115595595595595580194988995592000005564575561505565574D655545655600600455 6556556556496516496556556146136004286016556226552456000000000000000000FFE0ED000001C890ABCAB8AB8AB901 8C0A898A9808800122740E2AE08F2AF2AE08F2AE2362AE0070012AF2AF2A72AF41600622C420028016806000036946000246 28E206000000000000000000FF9B5A200001601801E0180180194380084380180A8001806086006001007806007006006006 00600180780780780602604602600000041620600004E4A6001084002006000000000000000000FF5B440000018E90AB8AB80073e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000006006 00600608708604C00600234629700020620E006046043236000000000000000000FFCAED000001801001801801801801842A 418458210000006816006006006006916004096006006800006006006006C164160040060020068060000868860063160060 86000000000000000000FF17FE000001AAB0ABAAB8AB8ABAB188C8838898830000AAE20628E4882AEAAE2262AC3262AE0070 00AAEAAEAAEAAE0260262842AE2AE80E02700082E026AAE01428A106000000000000000000FFF13A00080100580180180180 1C35C1384180584000000060A7006046006007406005106806006000006006016006146D361061062034864CE8014860075200f3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B8018AA8018A B88A00002AE2AE28E08E2AE2AE2AE2262AE2AE2AE0002AE2AE2AE2AE0066064341062421060062002061061060062CE40600 0000000000000000FF4BDB000109021001801801801835800895801800000000600602600000600600608600600600624400 600600600600600600404600A04E00E02400628604604C0020D6000000000000000000FF9F47000001805001801801801901 800841801840000000600600622600600600600E00600600610000600600600652E13630C50E0C23064A60800D604E48E484 026406000000000000000000FF5ED600000100100180180180180DA0080980181000000060A6846440806006006806807006000be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000006000000 000000000000FF9EE40000AA0AA8AB8AB8AB8AB80B88980B8AB88080002AE2AE2AE2AE2AE2AE2AE2262AE2AE2AE1102AE2AE 2AE2AE22E20E2AC20A02602602600002602628C2282AC02E000000000000000000FF04C90001020089559559559558159558 15955953000055655655613055655655645655655655604455655655655645603600441241204E2CE28404E24E4564125100 D6000000000000000000FFAEEA80000000080180180180180182380180185180000060060060060040060060060060060060 0000600600600600604600408228E096516510016496026006004306000000000000000000FF0CA20000339C90AB8AB8AB8A008be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030060060060 0652E53600612AC0430648608A0D604E04C110004406000000000000000000FF99A5000400001801A01C0180183590129580 1A0100010060020064000060070060860060060042080068070068060060070040060C104F04E0000062861060020440D600 0000000000000000FFC7670000AA0AA8AB8AB8AB8AB9418011418AB88580002AE2AE28E08E2AE2AE2AE3362AE2AE2AC4002A E2AE2AE2AE1061062AC24200C40600620070600620632628C006000000000000000000FFA89C0008200048018018018018A1 8018A180180000000060060062000060060061060060060063000060060060060860860C40421022060060202860060040C4004be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801801801800 800000640650628100C02600704E00780600400000E20600600600600600600014650600E10010601644640A004006000000 000000000000FFBFF6880C02008001C01DA1A039099A5C09A09C018000A07206006007006827007027006046804040807207 10761650600F00C0108BF2871860A0016406006286004006000000000000000000FF7F26100042009C018018458018058210 09909C01000020680205600080700700680600630610400500700620700603621700E0060000064060240060060041040040 06000000000000000000FFED44000800000801801801A01901853041C01855800000600602602600480600600F006006804100cbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000000000 00000000FF3BC1000000000801883801801825805881881821820002E28605E18020608E02601E00640600E00000600E4060 0604600600400002E28600E0081A648600C01002400E000000000000000000FFAAB2800000001001821803A0180181180382 B80A88A008600208022602600600688650E0060040501064061462160060970060042060062C612000E21622608E00C02640 8000000000000000FFC795800020001201801803841901801801901A0180000060025004008168068060060060C608404080 E80608681649640600400C00600621600000E00E226002004006000000000000000000FFC076800000000001E01E01C45811002be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000052 83302000200803004803000D0528080000006200000000000000000000FF95D40000000018018A38038018418019018D1821 00C01370824001000040960461062860060160000861060A600E00600E0060060D200604E02004E10601430C0C4026008000 000000000000FF25CB0000000018018018018058018898458038819200406202090426046006006006016086006100006426 0064260060060060062061064062880060164C404001400E200000000000000000FFE8DD0000000018018018018038018818 2180189580002060022060064060060060160060860060D00060B600602600610600600408641E106200106406084224084000abe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A02004040000 0011100000000008008040000048000004008000040010040800800008082102000000080800000003040000000000000000 00000000FF62750000000A80AA8AB8AA8AA9400891400AA9A880002AEAAA28C4AA0022AE2AA2AE2AA2AE2220402AE2AA2AE2 AA1021020AA24232240200200070200231C3802AA482000000000000000000FFDDBB00000000000000000000003404009400 0004000000000602620604000000000000000001000000000000000000000000010801004804804000000002003000405000 0000000000000000FFC61280000000400000000000010000404000000000000000000060064880000000000000000802C000006be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF4C8280080020140140140120100024100040142A000100500000404090100480400480480480000100480500500400 004030900000009051000001049100400C000100000000000000000000FF0D28808000125955D55B55D55815155815555949 8001D57046554516557557556557557556556111557557D5655645643655612608604E2CE50044E24ED560245560D6000000 000000000000FF22870000002CA8AA8AA8AAAAA80AA8A80A8AA80080002AA2AA2AA08B22A2AA2AA2AAAAA2AB2AA4802AB2AA 2AA2AA22A20A04228A22A0220222A00220222222222AA02A000000000000000000FFF0AF0000000092004000000000A0000000ebe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800280820000 000000100480880000080800000220000000000000000000000000FF35CF0000001400000000002001000000400000820000 8014A00204000010008000010000000002890010008000005283300004800003004803002D04280000004004000000000000 00000000FF133A08800000400020000000003400009420004000000000080000000000000000000008000000000000000000 000000000000204300480480080000800004100000D0000000000000000000FFAAAD900000008EAA8AAEAA8AA8018AA8018A A80880002AA40228A0EA2AA2AA2ABAA82A82AA2AA0002AA2AA2ABAAA0020022AA40A0C21020020000021022AA0B20AA40200001be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000040 0538400000002410020C08400000054040100040410000480004000000010050450090100080000000400400000000000000 0000FF81AC000000C00800880800C00801800800800C10800000240300200200A000002800002000200020022A8200280240 2002020482003002002000002002002002002002000000000000000000FF6851000000202008000100000000020008100200 0000000028080000000088000001800000000282C00008A08810008000000000000800200282000000000000000000000000 000000000000FF7CDD0002801002000402000000000002220000000000800001000000000000080200400000000000800000009be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF0630000000000000004001000000000001000000200000050100400000002400040C080000000000000000000001000000 000000000000004800800000000000000000000000000000000000FFFD9D000000900800840800800800800A008008008000 00228252200200200200218200200000000000260300300200280200001A1634030020000020030020020020020000000000 00000000FF5D53000481803C01881C81C01801841A4B081809800100624E004006016096007A06006000200000046D160142 17C36006000506806007004001006007006446006006000000000000000000FF20F900000100001100200100100000000100005be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040060064000 2000010400610020600E406024006006000000000000000000FF7F7000000000000000000000000000000000000000000000 0000600600000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC4F9000000000000000000000000000400000001000000000000600600000000000000000000000000080100080000 0000000005000801000800800000800004000000000000000000000000FF4980000001800800800800800800800800000800 A00000600602000200200200280220600000000000200200200200200200000200200200200000200200200200200200000000dbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000140610651 6240406007004006006000000228804004805007106084240014116004016000046204004004006006000000000000000000 FF9D69000181A08801841881801801801931807001800000600600E00600600602700600600000000000620600401602E826 10000400408484600020E00E017006006006000000000000000000FFDE7D0002019098018818018039058C40019010150000 00641601040600600602600600600000000100640702600453653602080100E00408E0290164060060860060060000000000 00000000FF507B00000180190380390184180180004180100180000060060000000040060061060060000004500060060064003be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFA8 72000001801803809001821821811801001800920000610E0160004540060060060060000000000840064000060860061201 04016006026020446006104016006006000000000000000000FFA708000001801041801801801C0180040301180088000060 16040000007006805806006000000000106004300487806004000080C0601604602090200400681600700600000000000000 0000FFD9F8000401801801925001845903944501101804800100621600000600600600610600600000000000600602121630 740E0C004000C0020AE0A800200640E0C6006006000000000000000000FF01EB0000019C0087841901811841811C0984500900bbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (609C00000000 000600210100411C406006006046000000000000000000FF15D4000001D01901805001801A01800254001800000000600600 6006004006006306116000000000414406006206086306001000026003B02000004006804006006806000000000000000000 FF25160006018008018010018018018000000098400001806407A06020006106006006006000000006026A86006D06006006 200000200812802006884006806006006006000000000000000000FFA3810000019410418499018318018018050458200200 46626614600602F086604F86006000000000625284160807066004280014107006016000A020040840060060060000000000007be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006046006006 80E006005406246000000008805C0414600610608401020650610A848000016004044016006006000000000000000000FF2D D4000001800041803001805801805D008898208001006006006000016006084A1608610000000800400400EC860464040082 06800082208280006084404004006046000000000000000000FF0E450000018000418018018058118001002A184000008078 8780600601600600400E00600000040800400400E80620600400820000610680A22800400401400600600600000000000000 0000FFA306000001880081801981A0194195C4002118000000186086006600006E0614408600610000020020E2148061668400fbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF534A00 0001901805801C0084182D809801809903A00000610D206006006006406826006006000008C06A0404690690600640821040 6006016000006006404004006006000000000000000000FF6C7E00000180100380181B80180BC01800901802000004668600 600684400600402F406000000000A04004106006006104000006006016000000006004004015006006000000000000000000 FF3046000001801201801201C21951941C548C9800000002600EA06080027006244006016000000004004015806287506804 20000F840006100054006804214006006006000000000000000000FFFEB200000188100180180180184181180080190080200007e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006002 000000006006004006006006000000000000000000FF62850000018018018018008018018018010018018000006006006000 006006006006006006000000006004006006006006000000004004006000006006002006006006000000000000000000FFE2 86000001801801801800801801801C0180180180000060060060060060060060070060060000000068048068070070060000 00806006006000007006002007006006000000000000000000FF425B000001801C01801804801801A01801001801A0200060 4600610000E006006A16046006000004806004006406006006000000104104046004816006026006006006000000000000000087e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (068CE1500465 56806287006106020494806800006007006D06000000804002000284806006002006006006000000000000000000FF956000 218100180380188000180195C140981001800000600504E006086006006606006016020000A2608080604601600600000000 6102100000006006000806007006000000000000000000FFD1D4000001001805821800001801800000001501800000608E50 E54080632700690E0B612602054054710C0360060A754E0080B1054800000001006006006004006006000000000000000000 FF14B0004001001801901884001881800000829001840002620600600E0860060060264060060100080164244064060060060047e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF8E60000001 801801C010010018018000008010018000007006008050006486007026006086020480806026006004006006020000006002 001280006006006004006006000000000000000000FF66E9000001801801801001001801801A0101180184000264050C6100 8460360060060A6006000011006083006007806506000000006002004000006006004007006806000000000000000000FFC9 59000001801C018010010018818018A1829A01820004708E2A62AE0062860070EF3CE0AE0082A800E36E22E2260AE2AE0480 A882E002004000006006004806006006000000000000000000FFC0A2000001001C01801E000018018004000112018400007400c7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80CB6216810D 0088E956B0C806816816000000000000000000FF303A0000058C18098018C5841801A21A42091009800000E00ED060060160 8E00601020600600000028600380601682E2060000080070C6324000206006045496306306000000000000000000FFF16700 0001801801801801A01801A01A00A01001800000600600600000780600600000600600000000600600600600600600000000 6806004000006006804006006006000000000000000000FFE71E000001801801D41005401801944000201B018000046C0600 0006006046006A860460060000001060020060040060060000008071001008000060068068070060060000000000000000000027e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601E22802000 8029000000000000008228720408800070000000020440004280000400260000000000000000000000000000FFB3C9000002 2006080001440000000024F00804200001008008296047180001000201010200200000000480000000920108008000008808 2C8400408020580108000000000000000000000000FF85ED0000019018438018018198A98201019013018000806284000100 816286886002B8600600000001600200600604E0060000002142A600000024618E000014006006000000000000000000FF58 74000211805805C09C09C0DAA9A8430920112580000C6A8682088E2C6A2628EC22096C06210800816B52D26906106836010200a7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7F0004008208 30D00E90C10C40C14880C00880800000300300313201200200B00201200200100150B40332B0028230020005010C30034834 01233003003493003002000000000000000000FF58F90002082A60102010BA20204031400A20028800000840009248808050 0CB1480000C004008800FC0804890800000A00000E80800804D20800880800800C80A88880000000000000000000FF5B2600 0000A4080080800100080080080100880180000020020000020030020020020030020000020020120421828820020001081C 200200200201200200A24200220A000000000000000000FF01E60000000104001004001205000C04000000060001021000000067e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (022022000022 00004000002A82A8000000000000000000FFD8C3000200A028008A0A00800A00A00840A00A208000002002842802D02800D4 2002000002000800B02D42913002002902800000902912902840802932A22C0A802802000000000000000000FFAF6F000200 2B120120500140120021420524030B0000004000804A2080480480400080400400084085080C8408C8004C40000910A28805 008800888A00888920804804000000000000000000FFF67100000188B801801843081901921849101805800080680608C006 10600610680610600600000004600C00630610612E000000016224046000006306526026006006000000000000000000FF9F00e7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A92A82A82A8 2A80000000002A82A82282A82A82A80003280882082A80082082A82A82A82A82A8000000000000000000FF448B0003543501 540281545543543085343102100000550550D50930D01550840D515500000008008808A0C90C40550A88800450908CC0CC88 40D488A88B0C80D50D50000000000000000000FFAD0400040004220000000000040044240040040000000000010010000000 01001000800001001011001001000001801000001001041001001001081001001001001000000000000000000000FF58E400 00AA0000AA1080AA2AA0AA0A428808E0400000AA8AA82880880382A8008AA82A80000000004400002002002A8048000220000017e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000084280080 0000800800800A00800840800080080200200280200000280080000000000000200200200200200200211002230200201020 2002002002002002000000000000000000FF2F870000AA1802AA0AA2AA2AA0AA8B00A80AA08800012A92A82886892A82A82A 82A92A80000000002AA2A83222A82A82AA0002006001402A00000622AA2A82A82A82A8000000000000000000FF2260000000 0022000024000000000400000400840001001000000200020000488000000000000020010208020088800000000080420010 000000000200000048000000000000000000000000FFC2310000AA2102AA0AA2AA2AA0AA0800AA0AA0AC00002A82A82A80A80097e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000320 000004000000000000000000000000FF0D0D000410C00D00C00504C00842800C00800C008001003083002403003113093203 0030110008082132C3403003042003002100023003002800302202003003003002000000000000000000FFD49B0000018018 0180004181180182581100180180000060465440061160060060061062400000000060041061060060060060004060061060 00006026006004006006000000000000000000FF7DF500020120800100000100120021400520020200000040048448200008 04800004004000800808800804890004804800004820890850810800910800800804804804000000000000000000FF21F7000057e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (084001081000 080004100000800901100C0280000080000440310220300200100000030000000000000000000000FF849900000800000000 010000800C004000000001000000008000608611008010C20000000000000001000420008085000000000004080088000048 0080004800800800000000000000000000FF1C3A000001800890844003800D6082091C000840800040602648000200200600 20060860200000008022B6882042082802112480212002002001003052052402402012000000000000000000FFE613000580 400400400420400010180401000400000100100122430100100900100100120900000820100100100411000100000000001800d7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801001810001 801C01801914081021808000600640640630600E04620600600000080100608900E02604708608E28000600404480141702E 102202306016000000000000000000FFEBBA0000018018018080418A181190600108300982C010E006048006086606426316 0260900010000062622063161060060060000061C612700810E006606006086006000000000000000000FF8AB90000018218 11844001941921810041825011840021628601000004400600600614610000140800620050640600620600600001420620F4 50006406056004056006000000000000000000FF233B000000040000000020000008088040040000004008028004620622000037e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000461260C00 02006006000000000000000000FF2A0900028F8AB8ABA8E2C98AB8718802009818AB8000AAE826A884A8AAEAAEAAEAC6AAEA A80000007062A2316B162AE00E006000606004230060306756060C022AE2AE000000000000000000FF6EB900004180180182 0021801909810090005801800000630602020600600600602600600000080000681208600600648600600009650400C80000 6026112406006006000000000000000000FF45C7000001801001800005801805825824831001800000600E00600000600600 60160060000000200AE0020360CE00602600600004604810000012E10E2020D0006006000000000000000000FFE04C00000100b7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (610E00600080 0841006800C0600600608E006000136452006800807006117042006006000000000000000000FF8178000555955155B54355 95580191014415595580005565565561305565565564CE55655000000449650012E55655608600600055554744601421640E 207556556556000000000000000000FF772D0000898AB8AB88828B8ABA838A9CB38038AB80012AF0C6A8E08F2AF2AE2AF207 2AE2A800000002E2AA0262262AEC260060000060802A000043600620010E2AE2AE000000000000000000FF366B0000018018 01800001801941821C11001801800100700700600100500700700700700000000802700A40700600625600600000681080C00077e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000058018 09815804001A0180000060060460000060060060060060010008140073293060060062060060000040020C281520E4162960 06006006000000000000000000FF8672000201801001800201801A0182023180180180008068068062468068060069168060 0000000049600200600600688600600000609200A000086086006806006006000000000000000000FFC3570000AB8AB0AB8A A0A98AB8B78840810AB8AB80002AE2AE28E4882AE2AE2AE2262AE2A800100482604002E2AE2AE02E0060002AC22630300412 68260362AA2AE2AE000000000000000000FF6B6D000441801001840001801801802000829C0180000064160460460040060000f7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E11611625400 6006000000000000000000FF90B20000AB8818AB8000AB8AB82188D8218898AB80002AE2AE28E08E0042AE2AE2AE2AE00000 00000860221062AE2AE0062AE0002062022420000160060C60262AE2AE000000000000000000FF683E000001841801800001 801811801811001801800000600602640002600600600600600000000421620201600600600600600008C10A10A004046446 036012006006000000000000000000FF774C0000018138018000018018838459028258018000006006006026296006006006 0060000000000260884A60060064CE00600002602204200049610E206302006006000000000000000000FFD2FC0000018018000fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000006004 4A634A006000006086000006200100106004486006206026006006000000000000000000FF7B8D0000AB8AB8AB8000AA0AB9 4B8A18C50AB8AB80002AE2AE2AE4AE2AE2AE2AE2AE2AE00000600040E2AA20E2A82AE22E2A80062AA0260060004262262260 822AE2AE000000000000000000FFC61700015595395580015495581594990193595580005565565565305365565565565560 000060040160024365505564565500060CC4344160040464CE08E50A556556000000000000000000FF78AE00000180180180 000000180180B80180180100000060060060060060060060060060000060000060020C600000600600000600648642600000008fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000188380 4003801001800000600602642600600600680680600000400002E0004A60000064CE00000000630648600049610E04601200 6006000000000000000000FF7257000001801801800400001C11840011801001800100700600600000680600200600600000 6004206004016000806006001004000040026004046446097320806806000000000000000000FF4FCA0000AB8AB8AB8000AA 0AB8218880B18AB0AB80002AE2AE28E08E2AE2AE2AE2AE2AE0000060001C62A80062A82AE1062A80042AA01E11E000106006 2060062AE2AE000000000000000000FF5FEC00000180180180000080194180184D0018018000006006006000006006006006004fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006006 000000000000000000FFB13C000001801881800101801801815841800801800040604600600000608781600704610000C000 006002006001906006000100322103000000016026000002007806000000000000000000FFA3EF000405801A01800209461A 1180B823840C018000B868060064664070064068068260005C64000465C2006000C1600600148009200600014000E00E0010 07006806000000000000000000FF455C000101C01C01800010605801840003801601800100608655600100700600200600F2 28004004086004006400006006000000004200306004086016006007006006000000000000000000FF1080000401801A018000cfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000040000060 0C10E00002C00600000420C402082200006006002002006416000000000000000000FF969000000580180188000108180980 1821029801880000618677620000E0060060062164500060000062C00060807140060000044F64061200C000624602A00A00 6006000000000000000000FF383C000001C01801828001A51801820015100A018100C0E20E000006D0702604234690700000 400000604608625008604654020000431220A00009608E50220730620E000000000000000000FF4AF3000101801B01800101 803811840001040801800000602600040040610620A0060061002564000C6206006400006006000200006106A02100106006002fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00008202400C 00208000000000000060060000000000000000005200000280804A00000404A8000088410110508000490108010080000000 000000000000000000FF8A32000001801801800001801809800125029C018800206096420000316007022006406000004000 0060060063404060062A0200000010206100006016546014086006000000000000000000FF39700000018019018280219319 01850009085805854008622600041604643600224608600000400000635601601015604600000035210614E2000965060164 06406006000000000000000000FF908A000001801881900021001881809880003803822009602600600E02620E002106006000afe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D2AAA2AA0000 00000000000000FF0A750000010000000004010001400000A00400000000004804020000000000A400010040000000004A02 00000000000080000020080280000000480001000080001000000000000000000000FFF5490000AA8AA8AA8000408AA82089 08C10C880680002AA2AA28C0AA2AE2AEAAA2AE2AA00041C0001C221A00200028210200033208220200200010200210240E2A A2AA000000000000000000FF90AC000000000000000002000010008040020451800000000002640600000000600000000000 00002000400100000100000000040400200240000404404C4440000000000000000000000000FFBF050000000000000000C8006fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00008224A10 20002AA0020002022820133420000120022020C32AA2AA000000000000000000FF66B7000401001201000403201000022011 00024000008050040040400048050010050040000840000010400C08010000008000000200200C0000008111000004805004 000000000000000000FF7854000355D55D558001555558159518159159558001556556514516557557107D57556000556000 01608E436000D564560015164560464160000464CF55620C557556000000000000000000FFF2A50000AA8AAAAA800088AAA9 4A88088288AC888000AAA2AA2AA28A2AAAAA2AA2AA2AA00002200040B28220A80032A22A80022230A48A20A00042222222A000efe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020020000020 200000000008000000020000000200C800000000004002000A1A01280000201C408004010080000000400008200000000000 00000000000000FF93C300000040000000000000008203400200400000000000000004200000008810008000000000000280 404A00000004A8001040000010148000490109050050800800000000000000000000FF824B00000000020000000240001000 00B0000400000080000004000000080044800000000000000220010001000000000000011003032100000204044010020000 0000000000000000000000FF56110006AA8AA8AA8000A88AA8208848008A8CAA80002ABAA828A0CBAAA2AA0122A82AA0002A001fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (680600000000 0000000000FFD1BB000000000405001101000205004000005000000000023022C00080400404440810400000000000440010 140050080040000410400D014000804004800010004004000000000000000000FF47F1000020000200800800800800C00800 840A0080400028020020020020000000020020000000000020020020020020820020002800A0802000002002000000002002 000000000000000000FF296600000000004200400000000000000800020200000088000000000000000A000000000008002A 000000000000000000000800800000000022000000800808000000000000000000000000FF74370000000000000000800000009fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (202002002802 802002002A06002A02000000802002000000002002000000000000000000FFE67400000000000000000100000C0004102000 000000100C400440000040000040100040000000000040000000000000000000010040040040000040000000000010000000 00000000000000FF07C8000000000000800800800A0AA00C0880080080000820024120020020020020028020000080000020 0200200200280200204300301201800101A043001000002002000000000000000000FF7BF100004000002180380180180180 1811821823802000E0068040070260060860060040001000280060060260060060860060042040A400602100400600002000005fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408480180180 000060002000001060060860060040100100000060060060020060060061420020C402000000410600000000601600000000 0000000000FF7F70000000000000000000000000000000000000000000000000600600000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF4903000000000000000000000000000000 2000000000000800006006000000000004000000000000000004000000000004004004004001000000000000800800000000 000000000000000000FF703C000000000000800800000800800800801800800000200300000200200600200220000000800000dfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF21F8000100000001A518015C1011889A200019090000044826446410A86226106854286008400000006410126002 40E482402902012103004010094046800040006086500000000000000000FF27BF2000000000018018010438018018028018 81800040600600600606600600601610600020800002600284E00609210200308412481202600080460601880000E0060000 00000000000000FFBEBB000000000001A05801081901B0024184190980000C754700044F406246446C064544004803520462 8609640708000600600502400400000210400F00000000E106000000000000000000FFE7DA00000800200180182180580181003fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060020060 10400101080008020011006006001000006007000000000000000000FF9328000000000001811A41101009801C04C0180A08 0000600208E42001600610603540200020000000601010600240620000002001114084048021704E0012A000600620000000 0000000000FF3D4F00000000002180180100380180804190180380200141061080410C600700600650020000000000600240 6002806008000040A0004208028020600E000D00006007000000000000000000FF5D66400010002001805A41421B01802081 821801800034630620042E00600634640E0484001004D000630308640600400200202010012B80200000608E00000000601600bfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (841801800000 401610600000621601602700000000000428600611E002206C064060820020002140040150066800D0C06006000000000000 000000FF10CA0000100100C18018C3021001C0000580180100000460030060068064068064C4000000000000106406006802 406806006002003102204001006806800000006006000000000000000000FF67C00000800000018018010018018100218118 018020006006C46000047806007906100000000004006006202800006806006004D050121060048040068000000060060800 00000000000000FFE0AA000000000041841821045401801B82B09908080005416700601610E0060060850024000000000064007fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 04FFD8AA000000000001805801041011A01809801A02000004400700622E8060162060050060000800000060068022000072 060072C0480C04124120902006001400026006000000000000000000FFA8DC00000800000180180140100180994180180800 0002400680620000700600F405006000000004006A461020000062060060010003051140040020A600080028600600000000 0000000000FFBE05000080080005801801201021810000801809000000400600620600680610600400000000000840602680 6002006006007084004C00144000004146100100107806000000000000000000FF26210000000844218018A1001A1986414200ffe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (220600680600 648490040801240400C804006206006006000000000000000004FF4E1D0100002A0001C21A01001C01843901801801800042 000411644610608604E0C400200010000200410600201691640E007040C40002922102884004007107047006000000000000 000004FFCFAD000000020001C21800001001821880C01E00000000404300E01688608650E0B4006000000000006C86440000 08700E00600001018A00404000A006001080007006000000000000000004FF4728008100094105801804041641E078008418 0000002040361860000060169A710C006000000014206206A2080800E00640680102880304E205012006000051806006000000001040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000000004 2060060060060064044040004000005140060460060060060060020000060200000040060060060060060000000000000000 04FF48BB00000000000180180100180180180180180180000000040060000060060060040060000000040040060020060060 06006000002000000004004006006000006006000000000000000004FF3BA4000000000001801801001801C01801C0180180 0000000500600600600600600500600000000000400680280700600600600000480300000100400600600400600600000000 0000000004FFD518000000400201803A01041811801811801A03800000000400600000600F0060040060000000044040060000801040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF EFBA000000000001801801901801840421801809940020414780E100026516006026004000000516006006002006006C5600 780480400480644E000206006004006006000000000000000004FFA26F000000000021823801001A019DA051AAB809800080 000600600E0660060060041040000000000040063060060064061C6000002006006000040006006800006006000000000000 000004FF5892000000000001809803A01801802083889A09800002495415644828708608614E8484A0110106006016A0E546 40F10640600B000C05000007000006006206006006000000000000000004FFA92E0000000000A18A3801001801800001823800401040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006406042005 004004A42000044206002406006006000000000000000000FF2009600000000001801801801E01A00401801801E000A04004 0081000060060060060000000000000060060048060060060000000028070024080050060028060062060000000000000000 00FFB0AB000000000001801803301801821A2180180992008080AE02600000752E08622C8060000004890040068050060064 4E001001000006000021004086026002006116000000000000000000FFE991000000000001801805001C0180182980180180 008100BC0EE2260870461864BC22E2A020808020480E00C2A620E086200008001A064000010041060468060065160000000000c01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00A24C468308 4E0262360B68A68240000288408868AE8268C6896A1684E4CAA04812050801000A0689680CA06846040000000000000000FF BD5500000000001180190188D841801921D01CC1800010D09650608640E10600620E416000000200A3620648420E4268C650 2804150320486080AC894E245204106106000000000000000000FF4B2B000000000001801801001801A01801801801000000 0005806000006006006004006000000000004006804006006806002000000002006000000006004000006006000000000000 000000FF1970000000000101911805801801840305801801800004400640000642710600640610400010000011680694400600201040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF354D 0000000084000000221004600400201800210000080000006016A088C88680000000000002000884900400C02001202AC200 944000080010684588020040480080000000000000000000FF02F30000001800000000800002000002102000000000000048 09E00E8008008800081000000000006002001A02001C02800108004880802000000000004000000000000000000000000000 00FF81D10400000000099218118398898121C980591180002562260000204062060060060000000080000060260060060060 06006012002018808000030026316004006006020000000000000000FFB170000000108401CA1A2BC2190BB2A00D80DA018000a01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (165264440542 06AB40004A404600E106206006000000000000000000FFEF5C0400000C44A0D20C08C30844C50830A14CC080014034030030 9280280282300340200000150120312B0A314B04310300A910303852003009013503303243003002000000000000000000FF F54000000004414024020C2C20043A82024032440000D2CD80B24880020000004B80A20000020900820940800918818C18D0 14E8215061134880908A40000704A00820000000000000000000FFD37D000000000000880900800C12800A00C18880800000 001200010284682680202240C00000042000200A20202202200204310482260344200004600208A00800200200000000000000601040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00202880A82A 82A82A80A02000000000022A80002100007801C01800200A02100000000002A80000002A82A8000000000000000000FFAED8 000000400000A00B0493280080CAA4A002028000A02A12802802802000002402852000000D0080283280AC42802852852A08 808892830A02D02802002802802802800000000000000000FFD2D600000000020140123020100122020900129000008CC900 824C00004004004810904000000800000B00940910848A00A00104C0404048490102C8000000048048040000000000000000 00FF4907000000000001801885881A11901901881815800014E14E08C006426026006106086000000000806406006006116400e01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFE4150000 000000AA0AA0AA2AA0AA0AA0080AA08400002A84002A82882A8AA8AA82A82200000002802A82082400280282082080400082 882204002A02A80000002A82A8000000000000000000FF7BD10000002001541542C41101541040143543000000940B10D50D 30D50550550490C10000000D00D50850CC0AB0850810C30808010C40CB0800C10D51000800D50D50800000000000000000FF F71D000800400000000000200600400042000410000100100100104100080080080100000000100000100110150128114114 0011000001011001011001801001001000000000000000000000FFC4AC0008000002AA0AA0000000AA2900000AA02000000000101040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0100C0414080 4900800800804804800804004000000000000000FFCBB9000000000800800810800A00804812800810800000202200244200 200200200001200000050000201220200200211201220A00800A0D220010A002002002002002002000000000000000FF7172 0000000000AA4AA0802AA0AA0805806AA0C000002A81582880882A8AA8AA9AA83300018000022A83420B8282282202201D20 5E1A403001022202A80000002A82A8000000000000000000FF661500080000040040000824440044054000002A0000410020 0000000008008010200C00000000000002800000000002000002C0AA01000004820A0000000000000000000000000000000000901040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (440001061005 00100500000100100102801000004000800000000001C000061000108700005241010001000000000000000000FFB82A4000 00400C00C00D00C00C50C00C90C14C00800100300300204301300B00300300200100100101200201200214204A0031030030 4300300100B003001003003003002000000000000000FF09EC00000000180180180181580580180190180180200060041140 0600600601600600612020008802600604601620E10600601654420E00C480006006006414006006006000000000000000FF 1DB90000004010012010440010012312210002420000800A848448008000040040048800000008020009208008488488208C00501040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (95D200084000 000000200200000401004808C01004200080005062161201280000082160000000000000004000082000000000000000C024 00901202B0208200016000000000000000000000FF86F700000000000000000002802800000010C000002000000044600601 0008010000006140200000000000054008540110004810AC0C5080820080090080004000E800000000000000000000FF869B 00001000101000088084280010000C800802800002204208C02200200200600210200001018800280A002822912C22042082 40200210608009200204010C002002002000000000000000FF6314400800400400400400440402400480400404000104100500d01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04012A046100 004080106024006006006000000000000000FF37600000000018010018018018010010018098020800006082206006406406 00600E08600000800000700600300F407006022006202000026000024554446014016016006000000000000000FF7CCF0008 0000180102198185F8080060059058030C400062820000862062060260A640600000000A00600600678610640E00600019E6 5A01E07200400400200C00602E006000000000000000FFBAA2000028001809043803801814088029801009000000E4460805 081400CE04614600E000000090006006206006016016006000000100306100114004008284006046006000000000000000FF00301040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000060060060 0611600000008080400601000E40620608000402080682410000600510A94A006006006000000000000000FFC51A20000020 10AB8AB9F18AB8AA8E08ABAAB90580000D6432A88088AAEAAEAAE846A0600080010000600620244616621604031804861620 E000AAE20621A3822AE2AE006000000000000000FFF9510000000010018018118018008048018018D58000436C0204000600 600600642E0560000008000562060820AE08E00E023041506004086C00006056822012006006006000000000000000FF16F2 000000001801001803001801009001801801000000010A0064200040060061060860000004805040AE0484064060C628A10600b01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800001801 8018010018008108018018418000A820020062460060060065060060000008001148060860068065060068061110C700A801 006004045040006006006000000000000004FF5D1840000020195595595595595494C955955B558000106552D56110D56D56 D56D56A4600080040555644E1264C604604E4564D648F555512405336554425200556556006000000000000004FFB8AB0000 002010AB8AB8050AB8AB8838ABAAB8118000000142AAE08EAAEAAEAAE816AAE0000002002244B62289162170464882442020 063243002AE32C30220A2AE2AE006000000000000000FF3BC5000000001001801E01001801801801C01A018000A21002006400701040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0A0860000120 4630C08C006006006000000000000000FFCBF100000000180180180100180184180180180180001120020460200040060060 06154000000C8400400604640705684602F45204000011290442E006104094004006006000000000000000FF55CB00000020 1801801801001800814801A018018000242002806006806806806806C060000000000044D650E0C608608608610650211604 6400906002026442006006006000000000000004FF409B0000000018AB8AB8AB8AB8AA8808AB8AB8AB80018162AA28E2C82A E2AE2AE2AE0060000010062AE90640680E31630E207007008A24A070060062AE20E8022AE2AE006000000000000004FF30B000f01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E00600600600 6000006000000106006006006006104014512114006000402000106016006006000000000000000000FF6A2A0000000A98A9 8AB8210AB8C98A98AB805889800001210028E0AE03C2AE2AE2AE2AE00000000001400600600600600644631608802220E000 2262140062062AE2AE2AE000000000000000FF212F0000000058018018030018058058018138218000122082026400106006 00600600400000000444C01654601600E00601604E002480042004106110046026004006006000000000000000FFED3E0000 000018058019090018418018018C1803800020A22A0060062060060060060060000000001044C6016346346356326106226000081040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000418200018 22001801801801801840000000000400600002600600600600600000600040002610212612E12600C00208008C12A0000920 04086086006006000000000000000000FF06F70000000AB8AA0AB8AA0AB8A38838AB8AB82200003302A42AE0AE1062AE2AE2 AE2AE0000060002A820E34A30E30630E24440000222005600008220C22E2262AE2AE2A8000000000000000FF9A5400000011 5912155910155915935955951915000032042C5565303065565565565560000060040C049643241640641608442444A22040 60044424C0456456556556550000000000000000FF90A680000000180000180000181181180180191100000000040060060000881040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400520200400 6007006806000000000000000000FFB2550008000010000018000018458120018018C000004C00D402602680600600600600 60000060000004C601634634635602521424E00400400008A914116006006006000000000000000000FF8642000000001000 401800001A01800001C01804000000820600620032F00680700600600000600080001614601600F006116123084114404000 002424026116806006000000000000000000FFC8DA0000000AB0AA0AB8AA0AB8898E00AB8AB809000000001428E48E4462AE 2AE2AE2AE0000060002A80462060460560462141400462205AC0002721442063262AE2AE2A8000000000000000FF2F98000800481040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00600E402010 0060104000060060264A6096806404046004092000D00002206006002006000000000000000000FFB3678000000038004039 04021831801821C01C05000001050454630000F80780600E00600800600800000600400624600600440300401400E0001040 02442002007006000000000000000000FFFBC9800800021C20401882029D2D803801D018011000060004006086806A068070 06006000106001109006274006117007004910A06000006400004802022007007006000000000000000000FF626200010002 1620021840411C01802401801800000040000601600100620600600640600000600441080640604600610F80600442C0000800c81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000180008 9801809821811800008008000602624606400E00E2160262000060000000064C608601600602600400022200E1000824140B 6014006016100000000000000000FFB8780000000018200018000218018A1801903805080000020009600000420600600620 60003062001880062360060162260041140120160A640802200400600C00E006000000000000000000FF2A85800000001802 001800003C41804083B29801020020000E2100A720608602601601201004600000045600620610E006006004CD4100002080 20028A00E0071428AE080000000000000000FFF2E7800080003A00425820201905800221801C01080020828654040001600600281040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008008030008 006000000000000000000000FF9E0380000002200000000000000000A00000000000000C0108006026008000000000006000 0001000004C00003403403500484205001000004800A0100100100006000000000000000000000FF92000000000018000018 0002184192C045925800080000240610000040428602600640201002620011002E0060060862260060023301061020001041 040040001320C6000000000000000000FF6D0B000000001824001800093801800081801801048050000E44828600400E0162 0604A2004060000004061064860060060460000024220520102440040C4004002006000000000000000000FFBD5E0000000000a81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AA2AA0002AA1 2000020220A30A30230A22A2A022A2A032208022A2AA30A2AA2AA2AA000000000000000000FF627C00800000100020000000 00000002000010010000000030020200000804800000020000004308000020A301201281200000B40800080402000900B010 02A0000800000000000000000000FFE7D90000000880000AA8000AA8AA8A08AA8AA8AA800000602228C28A3A22AA2AE2AE2A A0002AA40000004A2420420520420820100022342BA4202022222022222AA2AA000000000000000000FF2089000000000000 000000000000000000000001000021440002600600000000000000600000024200000014801000800040011005001000000200681040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0AA8000AAEAA 888CAACAA48080002AA00228A08A2AA2A82AB2AA28A001AAA0000000020020020020022AA2022A220200200020222A202002 28A2AA000000000000000000FF4B268008000010004010002010010204010010010000214040004040001004804804000000 004000000110880000000001100004100004000020080000040000000805000000000000000000FFC1BA9000001558005558 0055595594D9559558D30001554286514156557557556556516000556000000496086416406416D5640645632650E1084464 06436016557556800000000000000000FFE1730000000AA8000AA8002AA8AA8928AA8AA8AA80000C248A2AA48A2322AA2AAA00e81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 A0208000000000000000FF856700000000000002000000800600000000000000008000010000000000000A00000000000000 00008000000800680000000800000000808000140000000000000000000000000000000000FF29A700000000000040000020 000004220020021000010005400202200010008008000000000001100004C00483403403500000900100104A048804808010 0000000800000000000000000000FF58B7100000000000000000000000000000000042000000000800000000000000000004 00000002000000105000100080000000400000C00080000800000304B0040000000000000000000000FFB6768080000AA80000181040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6C1441608001 02B600605651405600688E00410700C0A020C006800006007825A00000000000000000FF0B3C000000101101040001001225 0080100010010000004A00084800000684424000000804044440000000001100040800801001004000004400005004000014 000904010000000000000000FF7E6D000100000800A00C00400800800800D040009000002002002002002052000002002002 0021000002A280200282600200208A800802000040413002000012002002800000000000000000FFAE6E0000000A40800002 440000000020080000020300000410400040008280200080000208228220000010000150810028000000000900000280000000981040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018008018008 0080180080000020020000020020020060020028000020000000020020020020020020020020020060000020040000020020 04000000000000000000FF329C00000000000000000000100060000040000100000044000040000005040410000000040000 02000000000000804000000000804000880002824001000000000001000000000000000000FF5A7F000000000800A0080080 0DC4810800C00800800000200210200200200200200300280300200000000280200240280280200200300208200010200200 0002002002000000000000000000FFD9F9000080025801801823C09C01805801C838058C8100741640504600E0AE1269060000581040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010680001400 0000000000000000FFE3DB000000005801800801801811808000041805800008600400000000200600610608000400600000 000604640620220630620450014400E000202004000016000104000000000000000000FFF77F000000000000000000000000 0000000000000000000000006006000000000000006000000000000000000000000000000000000000000000000000000000 006000000000000000000000FF714E0000000000000000000002000000000000000000000005006006004000000000806000 800000000000004000800000001001000801000000800000000000006800000000000000000000FF31C7000000000800800800d81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006010000046 04240E12E02E00600635702A0004804340460001060000C2000000000000000000FF8357000002001801800009A01841A518 01001805800000604E106000016046846804006016006000840A541000A48028040850B61020000400280020040801060068 0C000000000000000000FF1327000000003801800001809A01881803023A1381000070A64062060060060960A60860066060 000180860020063022062062068128900E800000208400000E007044000000000000000000FF1A0A000002001C11800815C0 9801A8000410384180000261560002060060071070260008040060090014A700614F02B0560061440440051022A882A1241000381040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3801A0380180 180580000060060060060170074070040060022060000001041000040040044041E501118E0820000241462A000600600200 0000000000000000FFB877000000001901801801841A21C53801801801800000610620600002600614600400600220600002 002C0000040040040040040004470460000054065400A6006002000000000000000000FFA3C10000000018819418018A1C03 800000801801800000688E4000000430064970060008000060000001068420060060864168062522228100008044A6000046 800002000000000000000000FFE57A000000001C09801803801809810000901C4980800C600640000600600601600600080000b81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (007842000000 000000000000FF557D000000001941821801901A01900028801A858000E0E156006740202006086116006000006000400806 8C610611601614600C011F870060A00CE906400306007202000000000000000000FFE992000000001801801885A51C018020 4004194180000060060060064260460062040068800060040280041062040020040040570020228100040068060004460065 00000000000000000000FF3A09000000001801AA1801A0580580000000180180000060360860000060268160060060100060 04000006026006002106016016D46812110004046006000006006000000000000000000000FFF94C180000001801C018019000781040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000440C60 04006044005C2E13220810800C006006420106006106000000000000000000FFA5F200000000190182180180B801A2580140 180180005070074460A600600604600C00710600600404010500600402200C0840040150C400200400602600000600600500 0000000000000004FF75150100000418A1A01883C8B80180180120182180000068268061200460460064D400700600620025 00040064CC13200C0A50A400004D0160008260C6000026006045000000000000000004FFE9DF008000041801841E01A05801 A00008801801800084E00600600600600610602400600000620000082400603402604400450590001610212091602600000600f81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801801801801 8000806004226000006006006006006016002006006006806006006006080000100140404006006006046006006006006000 000000000000FFCF6B000000001900001833A11801A01801A018018000D0402581614602400603688E007002002004046106 046006826006001052852411004014006046006006006004006000000000000000FFA336000000001801A01823805DE38458 01801801800000602600E00602200600E08400710F606000000005126004006014004006682000A700000068060180060060 07000000000000000000FFA0FF000000001801A01A09841C01905A01841C058000046116006000006006006004006106006000041040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060020000000 00000000FF2F21000000001800001801801801800800001801800000640400600601608600648600608402E0040164060064 06006006000080400006000004006006006006006006002000000000000000FF5B6100000000180000180180180180180180 1801800000600400600000600600600600600600200000600600600600600600000600600200200000600600600600600400 4000000000000000FFF449000000001800201801C01801C01A01C01801800000600400600600600600680600600680200400 6006006006806006000001000802000004006006006006007006804000000000000000FFA79B000000001800021C01801A0500841040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E21608620640 E086008200201002000150006006006006006016012000000000000000FF2973000000001800001A01A01881800880401801 800000681600641000650602E016006D44006444006006006046006546000000800204804204006006806006006826200000 000000000000FFFF92000000001800141C01801A0194EB40051801800000400442600E00402600600600607478E404006806 006006106006060886102814064004106006006006006006000000000000000000FF0387000000021800201801C018018088 0000380180000068AE13612880602700603609700000604010610610600680E086008403006007002000007006806006807000441040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (81005C018001 00684600000600700602E0068000140460001061060060063060060010001002100040009060070060068000060020000000 00000000FF3A40000000001800001801801A0100080100180180000070060004010060060060060011000060880060060060 460060070000070020008042A800600600600600002620A000000000000000FF45B3000000001800601C01801801000801C0 1801800100C00C00E11000450680600E00624400644000600E00600780652600000200600200200000680700600700601600 2000000000000000FF2D5F000000001800001801801A05000821C29801800001628C29E1A700E0860062AE08E0840063300000c41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 0000FF4415000000021800413C81A09A2484024D2A192D80008B6916800906CD6026486496A00836826B408C6926C1683688 E8B60202200084020C0880104284886A16A00826D0C000000000000000FF21B7000000081800121A05821D00902481A0D801 800020642650601680600602602600648640E0102072060C6206A46A06801110B4090040C00042400C006107006496044000 000000000000FF2EBE000000001800001801801800800201801A018000006004006000006806006006807007804000006006 006006006806000802002800804000804004006006006004004000000000000000FF7C37000000041800541801801883140D00241040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00A01A21A002 00106B01744701408200120400200A042002004000000000000000FF94490000002000000022800000C00000044800000000 08000000618E5810211000180460200005A80000004601001200905000005402800200002204900000004060040000000000 00000000FF8C2900000028000002000000000040218A40208200002080002860060490010308000064000202002000002000 00000228000800A808009084000008000000000061506C8000000000000000FF44000000000318000C1801821824A0400106 1B01800044406E000010024806C86206200242004010426406186066086006010406026002402040C840040862062002040200a41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1A418000C060 46084006016806C8600604642E00610044640604601601600630020404422424E040A0600E00600620602642400000000000 0000FFE026000000200900500D008C0E40904402A0088280010C300341351334200200A01320300300320910308348314310 3032010052D12012901201002C03003003023513002000000000000000FFCBC9000000000200201103348400201241008424 0001100880900C00A1000020488080081C808800140820800A00800840820A950088112C0800805008000880800CA8000000 000000000000FF2B20000000200900108800A019029E0020801C49800002220241400200200600302640208020200208238200641040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF08910008000AA0AA0920AA0AA0AA0880842AA0AA0000AA80002880882A8AA8AA88002883A02A8000000010000020320020 020200200220290200A202200002A8288280000000000000000000FF4A6D000000200800200200000A00C00A008002008000 002C82842802802000000500842812802800802D12C52D0A8829028080308108800028000028828028028228528020000000 00000000FFD2510000000014002512014010002252350010010000000830804A2080000400484C800804800C200008408808 00808C08C809040C480C034820114014004804800800004000000000000000FFCDD40000000098000218018018838419410400e41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000280000090 30808000000020000080000000000040000000000000000000FF93980000002AA0AA0A82AA0AA4AA0820A00AA4AA00002A92 A82A84A80082A82A82A82882A02A82080002A82A82A82802A82A82A89002000080102282A80002A82882A000000000000000 0000FFBF8900000035415412035415435434C3503543540001550820D50930D50550551308D50C20D50C40800C40D10CA8C0 0AB0AA0500540D514A0A00D50C50800D50D30C90800000000000000000FF0DB4000800000000000000600000428012400000 0001000001001001121001001001021001001001001001001001001001001800401089D4140100100100100100100000000000141040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000080400084 4820900804804804800804804C108008008C0800888800800804D048008C4800004800804804800804004000000000000000 FFF0BB000000000800040200800000808808800A008000002802002002232000002002022112002000002002012002002002 00200000804A412010812002002002002112002000000000000000FF28EC0000002AA0AA48C0AA0AA2AA0800800AA0AA0000 2A82A82882884002A82A82A82882302A80000022AA2022AA2722AA2A82A80702C00002003A02A80002A82E82300000000000 00000000FF3A060000000000004020004000000000000000000000000308000200001001000040000010000000000100040000941040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF04 AA00000040040040040040050040040140140000010010015402110A10810850041810050814000000000800002001400000 10014018401000044001001010001001000000000000000000FFD40C0000004A0C00400C00C10C00C00C00C00C0080010432 0300A00312330348300200300308300000254240240215240200300300300315100101300300340201300300200000000000 0000FF120F000000001800001889801805801801001801800000600600630600600600641643630400600000600608E00620 60161060041044C6006020086006006006006006004000000000000000FF9B1000000000000020300020100022504520100000541040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600640640000 8410482000024016006016004042406000000000000000FFC70D000100000000000141800044022020100042000000022000 E1064302C01080000060000001080000000280000002080000800302205500200A0006000000406040400000000000000000 FFD9A30000000A0000000089810002000000000001000002020414E00E00020020000824E500000200000400408400000410 080810888B20910000848806000200006000000000000000000000FF99DE0000000008000018008118808018048048008000 006002204082002006002212002540142000802DB2802912CEA8A200201600200222402008001200200A00A504044000000000d41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (446410006000 28E00600600600600600602024E0260260B64B60C600408600002008C0000040960060060062960C6000000000000000FFA7 D900000000102000180180184A841821081801880002E40210200E0060160060460024461060110072CF02F0070274160060 06524020054020414006006006242506046000000000000000FF1127000100001022001901811808805805061805080002E0 0629010E40604E00603600010404600000602660660658600638631028018800000030C00600600E02000600600000000000 0000FF1FD3000000001004001821801800801801005821800000602640400004C48610E0060040040060800060060061160000341040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF1ACF00 0000001800001801801821005825801800800100600000220000600600680604320A00E0001060A62B600F0562C600400844 2086082008006006006006042004000000000000000000FFB10B0000000AB8002AB8ABAAB8C92CF8C12ABAAA800048644228 80880642AE2AE2AE2E822008E0005066863C600680625600606200A2862000003262262AE2AE288140240000000000000000 FFE613000000001800001C01801C23001C0500180080008168A284444600680680600600491024680008600E00E20600600E 006C12CA600E040821116006006006044044010000000000000000FF6545000000001000001801801800821831001801000000b41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000202226 2070092AE2AE2AE2AE2AA2A8220000000000000004FF388D000000001800001A01A01A03A01800A01A000000006086006046 0060060070060061000D684000600640600610640600500750A946445040006806006006006004000000000000000000FF2C 780000001558003559559559159519109559540000556D56D52150556D56D575565121405460144562160062C628600E0072 C711645644C0045565565565565125544D0000000000000000FF3C7F0000000AB8002AB8AB8AB88908988D8AB8AA000112E0 08ACE28E48EAAEAAE2AE28E22A40600304E956816CB723688600428802220F09000222E2AE2AE2AE2AF20CA880000000000000741040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4E0060060960 0600600600600E0062C032E02E43653634E12E20410011010804410008600600600600600610E000000000000000FF60EA00 0000001800001C01001C4180384500180080008060068420400068068060060220A6007000C4620630600620620600490092 1000906000007004006006002006816000000000000000FFB430000000001800201801A01805A41800A01A00000000600600 600600600600600600620010601001681600624608688600425001211604C800006006006006006804100000000000000000 FFE6700000000AB8000ABCABCABC89C89C88CABCAA00002AE2AE28A2882AC2AE2AEAAE28A00822F0000860A682E88E82E02E00f41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFE3AB000000 001800001801801805801800001801800000000600400400200600600600401600610040620610600602604600400400000A 002000006006006006004046100000000000000000FF8E080000000C98000AB8AB8AB8898AB8838AB80000002AE00628E0AE 1042AE2AE2AE28E2062AE00000660608600604600600C2122302203840002262AE2AE2AE28E23A226000000000000000FF49 5300000000180000180100182580184180191400000064060222004260060060060421260060040060860060060064061440 52004000014444016004006006042106006000000000000000FF8C9800000004380000180180180180180900182080000061000c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (421022242540 102AE2AE2AE2AE2AC002220000000000000000FF17E100000000180000180180182180180200192180000004260002000260 060060060000160064040C60A60460A6286086000026100002002004086006004006000084000000000000000000FF18B700 00000AB8000AB8AB8AB8898AB88C0AB8AB80002A82CE2AC4AC2AE2AE2AE2AE2CC2A62AE41004E00E24E20E00E20E2AC21622 83202822802AE2AE2AE2AE2CC28C228000000000000000FF3053001000113800155955955915955950155815800055011655 01302125565565565504C65560C42160164964160164362CC5044404C824A54444E556554556550446550000000000000000008c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400400680501 700609402000E40400620600600602E00E006400416414004004106007006116105000000000000000000000FFB3BC000000 001C00001C01801A41800004001821800000210E00420400600400600600410880628832E02E43653634E12E0060C8456096 104110006006006806004480110000000000000000FFAE50000000201800001801A01805800000001C058000000026044045 00200480600402400000600400608700600600640600600208200604C404006006006006004052000000000000000000FFB2 A80000000AB8000AB8AB8AB8C98AA0E80AB88980002A820628C08C2AA2AC2AE2AE28C2202AE0001063460861465061062AE3004c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8E8000000098 00005C80001809800000001801800040010610C30440600401680600400040620000640600608610621600248008200E0000 0044E000007006105002000000000000000000FFBF91800000009840005C0184180980180000180180000020061440440030 04106006004002006000046006106506006006006002002006000000446006007006004002000000000000000000FFE70880 0002401A20011A01C2FB81801810401C01804100100603453540300480600640C002D8600002600708627610640600614230 A204000000016006006806004002000000000000000000FF5C59000002401800401901C11801800000601C018000C028864000cc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000200050 41100060A6004024400000000000000000FF927A000000001800001801800001801800041801820020629620408420240605 800601400640629000622622E0063060860060042AC11057A1000840060060A6004184010010000000000000FF1FD7000000 001800011821800023801810023801804000C00640401402220610000650404601600000608600603E056026026044004082 082000104086006116004004000000000000000000FF9E1D000080401800201880291901800004501A01882008202E094004 017084A2600600C00020600800601600630614640610250000244C20008820640890600600402A210008000000000000FFE4002c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (110100050000 004020000000000080000000400000000008000108080080090046006000004120000000000000000000FF7E3F8000000000 0000000185200002800014C00000003480000060064400000800500060000004803280284305301483280901200082400002 00000006006000006010000000000000000000FFE929000000001800001900110843800004081001800000E0064140040040 8620200600400400650000610E00628622622608208600044200200800420008600600400C000000000000000000FF835600 010000180000184000090180000000580192404865261041042520060020060040040060000064262560560061060424064C00ac1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000AA8000A A8AA8808AACA2800108AAA80000822AA2AA2AA02B3222AA0222AA2322AA08004A00A24A20A22A20A2AA22222A12A23240022 22AB2AA2AA2AA22A000000000000000000FF8371080000000000000001000001040000200001000108880400000000000100 08000000840002000C00A00400A0080080480110000000080480004020000800000090000000000000000000FF5792000000 0AA8000AB8A20848AA8808000408AA80004122AA2AA2AA00222A2022922AA2882AA4001023420821421021022222023A6002 22A10032028A2AA2AA2AA204000000000000000000FF24610000000000000000098000000040000000000000004000004004006c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100080000040 000000000000000000000000000000FF59F58800004AA8006AA8A28888AA8908000AA8AA8001A23AAA0AA0AA0022AA2222AA 0AA2232AA00000260208200200200208222A2003222220002AA28A2AA2AA0AA222000000000000000000FF789D0000000010 002010014480012100004022010001020804000000284809000C800001050040004002001000000000400001080044001000 00014001001004000104000000000000000000FFB453000000155800355955335D55905800155D55800044655655655632C5 564D6556556454D5610021601649641645643605644652C44E456000556516557556556444000000000000000000FF8A140000ec1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (288803000000 00000000080400001A00800200001800000000200000000000000000001800000000000000000000FFA76800800000000000 000020000000020000000000000000000000000000808200080000000000000000000000008A882800000000000000000000 0000000000000000000000000000000000FF79D000000000000000000800020000800000000000000880002002002A000011 0000400010000480328128430530148328200080120010010200000000001000400108000000000000000000FF2C9C000000 4000000000000240000240000002000000000000000000010000000000000081000000000000000000400000030000010080001c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001801 001001801801A01803800000E00600600600610E08608E006026000000086206006086226056000807006004204000006006 006000000006000000000000000000FF0AE10100000000000090011030014814210011010000040004020000100444040404 004004000000000000000404111400100440001005004000004000000000000004000000000000000000FF08600000000000 0000000080080020080080080000008020028020020020000020000020220000000020028020822020060802428030010000 00002002002000000002000000000000000000FFF37300000000000000000028000000000000008200000280008000001002009c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000008060060 00000000000000000000000000FFBE0E00000000000000180000180080180100080080000020020020020020060020060020 02000000002002002002002002001002002006006000004002002000000002000000000000000000FF78A500000000000000 0001004001100000400001000000000400000000100080000000000000000000010000000100000400000000180180000000 0000000000000000000000000000000000FFF1B4000000000000010800800C00800840800800800080200204300200300201 A002002002000000002082803003002002000003002002062000003002002000000002000000000000000000FFC27B000000005c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200E00600640 04208462060860A6507106020001014003002108004000006000000006000000000000000000FFF14A000000000000001800 0038A9801841845801800040640E00600040C00614200600600608010010600640E0160160060000D000400400400000C080 00E000000406000000000000000000FF1FF10000000000000000018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000006006000000000000000000000000000FF59CE0000000000 000000018004000000000000000000004000000800000001000000000000000000000000005000000000000004800004004000dc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018400049 51801821C05C018000407216002006046026105016116016100240005A862021479060260201288160021022900060000100 00010406000000000000000000FFEA79000000000000001901800001949851881C8180000240A6006C062060060230060060 06010090126006001106246086000004804000850000044006080000000086020000000000000000FF3DF300000000000000 1801800801A11A01821901800004600680600600E00620200611681620000008690608A00E86E04600000400500016040000 C886100000010106040000000000000000FFDED3000000000000001840000801801801C818018000007146007006026046C0003c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (E84600600000 0006000000000000000000FF2044000000000000001C019A000381180180180180000C500600200704600600600740600600 000010400400100700401E0000050A7000000060006806806000001006000000000000000000FFFE71000000000000041801 804821801ED18018018000286006086204086006206006006006008028004804000106044006000084106480450200006007 006000000006000000000000000000FFED380000000000000D1800012041811B018118018000245026906006144006B15006 406806000020804084003806006806000100007B04404400016040000000001006000000000000000000FF6459000000000000bc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006007800000 0040241064060C6006000001906420C20100106006006000000006000000000000000000FFAB3E0000000000002018019424 41801A01011901800008C8270041064040060061860062864000041044144062060061061800200968000000C50060860060 00008006000000000000000000FF1245000000000000001801800801C0182304180580000060D600400400E0060068160065 0601000000410401611601643601004000610410C20000710E006000010106000000000000000000FFAC2C00000000060010 9B018508058A1801009801800000604780400680780609600680600600000400410600600600600600000004600380200404007c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (988994A0C380 1804851905800008510600610645600E08E006006A06410006906C3400611613600600100600516080002700600622600000 0106000000000000000000FF4E1C000000000140401C41C40011C49800801801800000408600600600600600600600600600 001000610400611600600610040654400A832290806026006000000016000000000000000000FFF343000000000000001C01 A00001A01940805841800020401600620600600700600E0060060000040060C62960060462CE00900600C4044B4224086016 006000000006000000000000000000FF656F000000000000001801804001801901005841800050C00600440604600680600600fc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006000000006 000000000000000000FF77B0000000000080001825800A058111018018018000806006004806006006006006007006006004 006006004916006806100406100555010044046006446000000016000000000000000000FFC1CE0000000000400138118448 098216018018018000886086004084006016806006006004006011006146004807046006000806C5000002029000E0460060 00000006000000000000000000FFBFF4000000000000043D03990101801AE080180180000040060070840040061160060064 0600000000600400600700700600000600D28000000002E01E006000000006000000000000000000FF3C7B0000000000000200021040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (048360A40565 0E08641608E086030824917000006004004006006000000006000000000000000000FF3BBF00000000000000180180080180 1001001803800000600640408600600600640600600600600048600640400600640600000000600200400000400600600000 0006000000000000000000FFFC4E000000000000001801800801801000801801800000600600400400600600600600600600 6004006006004006006006000006000000000004006006006000000006000000000000000000FFC06B000000000000001C01 800801801001801801800000600680400600600700600600600600600200680600400600600600100300100000000300600600821040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800801C01001 801C01802020608EB2448600E00E7862261AE20600E0A020E00E28420E88E28602802288E040004000006006006000000406 000000000010000000FFB0C5000000000000001A01801801801901001C018000006006006006006006026006006006806004 006006007006006006000084006906020405804006006040000006000000000000000000FFEEF4000000000000003C01A008 01801C01001803800000600600600600602606600E0060060060000860060040070060060000006060010020000040060060 00000006000000000000000000FF79A1000000000000403881803881A8B02900188180204260AE04C20621602EC8602E0B6400421040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000060000 00000000000000FF2AFE00000000000000190000590191585180190180000470460164074060062A60060060060460010465 06006007006006000087006004024000006000000000000006000000000000000000FF3AEF00000000060000180000180180 1101801801800180600680400600600700600600600400600000600600600600780600100200600000400000600000000000 0006000000000000000000FFEC92000000000000001C01800801801A01801801800000600608640600700680600608600600 60000060060048068060060000068060C0804400006006006020000406000000000010000000FF9C0500000000000040180100c21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (604000640610 6086006206000126000348804000216000006000200006000000000000000000FF7E5A0000000000A0409800209C09A81A01 923A89800002E28EA06896116296206810C86C0EA06800C46816807086CD6A86000930A40022006800206C00D06010200826 000000000000000000FF5E22000000000000003B45C458C585590580180380002860060B624602680690E52000610610E020 09634648600E00604E001C0601030E53404000600600000000010E000000000000000000FFBF4E0000000000000018018008 01801001E018018000006806004004806006006000006006006002806006004006006006000002001801806002006006000000221040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00800800000A 0980000A601220200A00A88E80E28228220200200060202220200A4020020002020030040000010004020020080000020000 00000000000000FFC5DE000000000000100401916202008400002040000000018008C1A040084008041800000C0005200000 804000000204E0000080120020080460000206406000000008000000000000000000FF2F310000000001000404A58000C006 04800000000000008000440000060800C400000000800000000281180C0000000108000018458C1117000084010628610000 0020000000000000000000FFB9E500000000002000DA00001111801841AA18818000806A0E1062449060062160000060042000a21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080400000000 0000000000FF7EDA000000000000301A230C1803A01941A01A4180000868165060C624600640620600600600608040611610 6006556126000006546124096200026106006100000006000000000000000000FF57CF000000000080432800C0AF28CA0800 C00800800100310302320B10284204B81300300300324100320344350300320200150B00AA0884104080B203402000001002 000000000000000000FF4C0200000000008021104224802D5821032002020000B00804820C10884200801020800800088800 880A00800D00BD8800000C00A0108120C801004800800000000880000000000000000000FF5860000000000000002801020800621040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001001020000 001000000800800C48341002801041040000001000000000000000000000FF0E900008000000000AA2A20040AA0AA0880AA0 AA0000800AA82200000902A82902A82A82A80000002200104002A82082A80002A02302184080002202882888000002A80000 00000000000000FF0347000000000000200010A08A00200A42A00A000000402002882912C00000808802802802802A008128 02B0280292280200000200A000822800112842842000800802000000000000000000FFF80F00000000000000100132200100 020100100100008CC004810C2082C004844000804800004900884D30849004801000000808900144284B000048008000000000e21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000400040000 000900000902000008000800000000000004000000A010100112000000009000000001048008000000000000000000000000 0000000000FF46D20000000000000AA0AA0C80AA0AA0A80AA0AA00002A82A84003202A8AA82202A82A82A80002002A82A830 8AA82A82A80012512A90800105012A82882880000002A8000000000000000000FF75E20000000000003541542C8354354330 3541540000C40D50C40950CC0550C41550D50D50800900D50C00830550408D500014415413208A0801448D30D50800800D50 000000000000000000FF935B000800000400400000402000000000400400000100100111100100080100100000100100100300121040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFCB130000000004002000112102002002000000010000004805008848800004800804004804804802804800808004 8008000000A4004144280D02004800800004004804000000000000000000FFE3A6000000000000000A00884800800844A00A 0000008000021423020020000820000020020024000020021228020060020000000000008220000020220020020020020000 00000000000000FFB1160000000000000AA4A20204AA4AA48C0AA0AA00002A82A82400102A8AA83382A82A82A80001802A82 AA2002A92AA2AA000B08AA8A09008000AA82882A80000002A8000000000000000000FFC4DE0008000000000004000000000000921040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (12012302A008 420005062B000E0220000002521020C0002002000000000000000000FF74EA40080000040040041540044040040040044000 0101500140040100100521100500100100100100001800000000800000000014400000100022440000000400100000000000 0000000000FF77AA400000000400408D20C20D00C00C00C00C00800100328308A00300300320300300300310300304200200 3042542002101023001003003003002002003003003002000000000000000000FFE95E000000000000005801001801801801 801801800000604600601600601600600600620600600000E2060063060140060001144040B424600044600600610600600600521040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801025800000 60060C400048010600614620600600600022600610601600E0160000020A2100000100006040006004006006000000000000 000000FFA6F70008000000000001459000200A204180002000000000000800203001002500080000000000404400200A0010 0100002A00003400B0240228100006006000000000000000000000000000FFED5F0000000000000101358201000000018000 4000000103000882000000000040000004001000000282000049401200000808CC800940C040008000060068008000000000 00000000000000FFACD5000000000000006810000820800800800801810000202624200A04200A00A002502002002000002800d21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFF4550000000000000010019208010A900180100180000060060842160060060021060060060062000060464000065062 2E000342092008104300006046020004006006000000000000000000FFBB5B00000000000000180188180580580180100180 8028600600602602600644600600600600600000702E00A0070070062C028401000014444000600E08004400604600000000 0000000000FF030100080000000000594001980380184180100380002860060060060020060160B610618600604001E00604 670600604E018004404650498090106000006004006026000000000000000000FF0ECE0000000000000018120010218A180100321040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (82AE31700600 022022020A2C41002A628E28E0060062AE000000000000000000FF36C2000000000000001001901801001091801801800000 70060060070070060069060060060065000060060000060262D600024800000A0AC400006006006806006006000000000000 000000FFCDA22000000000002AB8B2000AABA03AC98AB2AB8000AAEAAE60E004AAEAAE2AA3262AE0162AE5802AE2164C22AE 00E086000910A20066818000A262882880060062AE000000000000000000FF2437000000000400001A080138018018238010 0180000060060460A600600600600E0064CE00680000608E052006047006000010004486240800116000000006006006000000b21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AB80002AE2AE 2AE2AC2AE2AE2AAA262AE2AE2AF0042AE9062AE2AE00702E0002232221232810052AE28E28E0060062AE0000000000000000 00FFF1F4000800000000401401855C01455401801C01800100600600614E00600600700E0061060068000065061060068465 2E001003112906800C0080E046026006006006000000000000000000FFBE9E400000000000555D55815D55D55C45955D5580 015565565565565565565574565565565560045564565565565160060011044D422640010455655653700600655600000000 0000000000FF99870000000000000AB0A3B008AB08108D8AB8AB80002AF2AF0B64062AF2AF2AA2262AE2462AE0002AE8460000721040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 1DD700000000000012900180C80B00B001801001800000600615610600600600200600600600600000624E0CE0062064D600 030020C08010E000100046046086006006000000000000000000FFCE34000000000000001211812801001021001001800000 600600400600600600210600600600690400604600600620EA06000808008408036B06000006006006006006000000000000 000000FF14BC000000000000201001B20A01201295801A018000806806806006006806802016006006006200006496006006 946086000104900882800000806046026006006006000000000000000000FF913D0000000004000AB8A38408AB8AB8018AB800f21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (52645600048A 4324D0552004556556536450550556000000000000000000FF4FE68000000000018010018808018018018018018000006000 00608408400601600200000600600200414602600604E00600011200A04210200000E0260060000000060000000000000000 00FFFDE00000000000000110A38008210010AB8818AB80002AE2AE0042644462AE2AA2AE2AE2AE2AE0022AE0064062AE02E0 0600002008022022600222028E28E3262AE2AE000000000000000000FF6CC90000000000000050098C090114100105580180 0000600640601654E00600200600600600600400610620600610600600001004001000600400800600601600600600000000000a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002AE2A82AE4 062062AE1062AA2A82AE2AE0002AC0063062AE02610600002040021020200022428E2EE2A82A82AE000000000000000000FF D854000800000001841001884821801801851801800000600000E20600E00600600600000600600400600608600600E08600 0046106006002006006006006000000006000000000000000000FFD42E0000000000018AB0AB8308AB8AB8AB8AB8AB80002A E2A82AE0362362AE2462AE2A82AE2AE0002AC20E20E2AE28622E0002460A228422A00032628E28E2A82A82AE000000000000 000000FF784C00000000000190515584891594B95590395580005565505461161065565565525505565560045544B6056556008a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFC072 000000000001A41805801C01A01801C01C018000086003006007007006016807000886006005046406006006016006000000 2000100A6004404106006000000006000000000000000000FF146A000800000001801809932A01801801A01A018000006002 00600400400628600700000600600000424E08E0062064D600030005095204E0000140460060000010060000000000000000 00FFFD9B00000000000180100180180180180180180180010070000065360B680603600600000600600400410682680610E8 06000810284002902004084006006000000006000000000000000000FFD4C60000000000018AB0A38048AB8AB8AB8AB8AB80004a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (161480001002 80002000046120000000000006000000000000000000FF9B52800000008081881140001B13801800001841800000700080E0 06806007016006000006006000844006002286046006080008420002022000006300000000000006000000000000000000FF 9268800000010001F019518008898018018018418001017502096004044007106006101807C06000004006001D0604600610 0000144002002000006006006400001806000000000000000000FFC6BF800800000101C21003800A05C01861A01A01800108 F08040600602680608700708080620600000420700100600E80600101008080900200000640600620000100600000000000000ca1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600600 6006002006000006016000046426506106106016000006082004000000006000006000000006000000000000000000FFF9F1 0000000000018018118418858018018018018000006016046006106046000016000006006000026036002016206006000002 20A45000C002006006000000000006000000000000000000FFE11F0000000000018090118208038818298018018000006404 78600608600600008600010600E00200600E20008608620600000200202A18420A4060060000000000060000000000000000 00FF5E39800000100001801810001821801800401C018000C0600A0260060270260260170000060060000064060C20160060002a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFBB540000 0000000000800980000000001180000000000001340000002000000480040000000000004001002D40001080000001001004 50110100010006006000000000000000000000000000FF51278000000000000A00018A000000000180000000000002000002 D01400000800000000000003001482480000002404B0000008010000000400080046046000000000000000000000000000FF 859000000000000180180000100180182000180180002060064860040240060421060000060060000060060260062062060A 8006216106110410026140006000000006000000000000000000FF3D2800000008000181180000192190181000180180000000aa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C2C54443440 4400556556556000001D56000000000000000000FF8A270000000000AA8308AA8008AA8AA8A28AA8AA8000AAAB0A2AA0CA0A 2AAA2A22AA0002AA2AA50002220B1522AA2A222A0002B22A2032A224802222CA2AA0000002AA000000000000000000FF95E2 1000000000010000000480000010010000010000004000000000000005080200801001000001000000110800008080000104 01010012C080004000000001000000000000000000000000FF00BF0000000000AA8068A300A8AB8AA8B28AA8AA80002AA002 2AE00240A2AA2022AA0002AA2AA0001120020022AA00010200022223648632200032028A28A0000002AA0000000000000000006a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 1004000010000001000001010B00001000000001104B0100100000000040040000000000000000000000000000FFB9398100 000000AA8AA8A2904CAA0AA8A28AACAA00002AA2232AA2AA2AA2A82220120002AA2AA0002AA0032422AA00E0020002000002 002200002AA28A28A0000002AA000000000000000000FF2D4480080000000110000115400100100100140100008048400042 00008804810801001005004003400140A0100400800000100400410481400200C000000001001004000000000000000000FF FC2D800000000555955955001955D55955555B5580015575565565565575564578C60015575565005564B64075565444560000ea1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0D4F00000000 00000806000000020000240020100100020880000001AA80200A80208000002802A800000000000014002804100000000043 02A8000000000000000884000000000000000000FFA1C5008000008000020000400000002000000000000000000000000000 0000000000000000000000000000000601008000000000000000080000008000000000000018000000000000000000FF9130 08000000020000000809420040000820020000000008810000000008000090D00000008004000002480008002404B0000040 000048008500000000000000000800000000000000000000FF1A2A0080000000000000000400000000000000000000800010001a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (182002002000 002802002000002010082000000000000000FFD0BD00000180980182300100320380B88182B88808A180608E00602E08E28E 88E0060042000860A002008600408700E2080268050070078260A000E006006000004080004000000000000000FF67970100 02000001101001001000200445001000000005000100400444404404404400400040441000000541044014484000D0044100 00510410004000110000004010004000000000000000FF002E000000800800804800804800810C8085088010410130128020 50000512000000802400002000040082C16143002400002000C12802802000002802112000003000002000000000000000FF009a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000010 00000000000000000000004001000000000000000000000000000006006000000000000000000000000000FF32A800000080 0801000801200800800800201000000000200200200600600700200300000000200000000200240200400001080400200200 2800004002002000002000100000000000000000FFD735000004000000001400001000000001200000000100000000400000 0000004004804000000000000000405000001000000000000001000800000000000000004000004000000000000000FF2049 000000800800000C00800800A008008008000000002002002002002002003002002000002000000002203002003800002000005a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001805801 0088000509019018005018400020086416416946517207006006004000006000120116000857016001006502810102006000 006880006000007000006000000000000001FFA2BA00000180180100181000180382182A0058000000006086006406006106 106106204000016000000006208006486080006000006006006100006000006000006000006000000000000000FFBF290000 0180000000000180000000000180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000006006000000000000000000000000000FF5FAF0000018010000000018002000000018000000000000004000000da1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010060000068 00000000206040004000000000000000FF11EE000001805A01800808020905841954101840000000641300F3460060872060 360020000060001000164040D6043880006502006104006000006900000010006000204000000000000000FFA9B1000001E0 1801008001800005281011801800002000440520640628EA0600600600500010600012008610011200E00080682008A40A1A 6080006006000000006801006000000000000000FF67E300000180180100080180E801C01B0180380000000860E400601E00 60064860D620400000E0000000668081022C680000704010601695E000006006000010006000406000000000000000FFD322003a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600640680600 2100006004000006100004006000404006404006004004004006006000002820000000000000000000FF5411000001C63809 8C00018880012030018018000001004400606407607246007006002000816008000006604077007000006200002401106000 006006006000007000004000000000000000FFB4C4000001803809880511808003C039018018000000004002026006026206 02600600200910600A100006004107006000006400006004007802006806006000406000004000000000000000FF57E80000 01C018818409080048010013000018000000006002026006047046226006002890016000000006004806002000407000A02000ba1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018010000 01908001201001801000000000400010600640600600601704000000E0008080060144042460400040040000021040000040 0E006000002000000000000000000000FF130800C001801C014508098888510F149981103810000460200064160068060864 660001403E600010019680401C086100004064244006004001004006006000863000000000000000000000FF322800000180 1A01000011A00001901923C0104400002040C004610600E00610600640201040600400020720400510621000C80C40020301 4004004006006000002001000000000000000000FF6B8D000001801881000C01B04801801811801000000080600000600680007a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600080600600 6000000800002000000000000000FF6F14004001001801052001E0804101100D811004100000410210610601700600640640 7140006004110017C04806004020004800046806016004006816006001802000002000000000000000FFF54A000011A05805 010003800401031005801000000002400100600600601600E487004000006004000016104016004000114052032C02806004 006006006000002800002000000000000001FF1D2D000001001801000401A00209401441801000000042400284620E206006 00601604500801600100020600CC072442D0015008006406106001006006006000002000002000000000000000FFA7A2008000fa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806007000006 006004006007006804002006005004002806000004006006006000806006000000000000000000FF536F0000080010052008 0180080100080380180000000068060060060060060060060000060060040060161060140020060060060164870020040068 06000000004806000000000000000000FFFA48000001E05001012E0D808881050811801800000004680600600400600E80E4 06000126006004006006006007002026116016086006800005006006006000006006000000000000000000FF25B8000001A0 100100020980608100120180100000000040000060060060060061070060A00060000000060048078040000048400C68868000061040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100100380180 18038008A9823820000002600655612C10600604600E48002600600104600F48688500600708400C00400500400100480600 0001006006000000000000000000FF9B75000001801001000809880801000801801800000000600600600600600600600600 00060860041060060060460860064040040000040A4004004006006000006006000000000000000000FF181C000000001001 0008018008010000018018000000006006006006006006006006000006006000006006006004002006004004006006002000 006006000000004006000000000000000000FF9E5E000001801401000801C00801000401801800000000600600600600600600861040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (806006020000 006006000000010000000000FF1E6F000001801801800801800A0100081180180000000260062AE0A6086006026446280026 0061000A600E206086C828063C480C402006044140007006006001006016040000010000000000FF289D000200001601001C 0190580181460191380005400062560065560164560061160005560164540061068064440065560069061041441144140040 06040000006086000000000000000000FF3737000001819001010801800801180001C0180000000060060060060060060060 0E001006086006006006006024006006007006000004086006004006006000006006000000000000000000FF00CD0004000200461040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000060060 00006006006802002006006002002006806000006006000001806806000000000000000000FF43AB000000041801815C1010 1805800550445C4000000060060060170060060060060000060060000060061068070010060060062060068CE00000600000 600000700E020000000000000000FF5F7E000201801C01801800105A01800C00003800008000781600600C00782600621600 02860060800060060064060020060A60860021260244A0006000000000006086000000000000000000FFFE99000400001801 800A0180080100C809B11C00022000622700652700E217006126000856016448806106006046A0254E00400408600680600800c61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (181000001103 845002181884000040602680602480E02681610E00800600600000611E00E3000020064C4004086006204000806000000020 406206000000000000000000FFF242040220333221355A00201AA1AA04020298800000906046026C1648EA2644704E048846 94680080EAD6C8E230800A168C4A24930C040068A0046880806040B06A86000000000000000000FF04B30000018010090019 4589380B800881905820000041628E90614602608E8164864000862060800060060271005300A70068860060A65540080060 06206000016046540000000000000000FF36B4000000001401000A01800801000801A018000000006006006006006006006000261040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000008880 04810000000000000000FF31AD000020921000002A00000800801840429800000000680A00600308200E0064060400A20820 00002682102840164002032402072002806000044002002000202002020000000000000000FFA8D002000180A01800020184 A00013000580002000002803410010080011012292304200002200100000204900904805C080138040800004018000058600 60000060C0000000000000000000FFCA480000018040000280A599007C000181A02000000110088100008000100010000020 00000001400000000008012182000000300003A0818448420006606000116020780000000000000000FFA96C00000184110100a61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004804C4000 4800800905004000000050800880914800004800800001010004810000000000000000FF8DE6000001933801841823011841 84114188380400000060068060068060061160064200060060400061162060262CE006426A0E04610644C010A26306006000 08E002288000000000000000FFECE3000400C00488510800D40C8AC92C04800800000028214A203102002103003292001003 00311120320311231200354B80B103413412003321003003402001403042000000000000000000FF48130002002902212500 4320028028020120400000008088144A0301224280000080800000800880408800A20C28800038000000800C10CA0830800800661040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004224004004 0040020000000010090010000010000000011010010010010010010010110000018000011011080014010010010000010010 01000000000000000001FF85CC0008AA0880880020A20400000000A20A80000000800010AA82A8AA82A82A82A82000002A80 000002A82A82202380002A0800080220220220A20288288000000000220000000000000000FF6A74000200A22C00AC0810A0 0A80A20C10C048000000410820002802000800801000130802002800802802802812902802012482A2A81280280011282282 2801542800900000000000000001FFED1D0002002012452102012CA2542934012010000000924B140048000048048048048000e61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80002B00002A 0000000000000000FF46310008000AA002112400002000008010002000000000044100000000100100000002000000022200 00000010810010000090C0100110000022080000020000120000000000000000000000FFB4360000AA0AA0AA0A80AA0800AA 0AA0AA0AA00000012A82A02A82A92A82A92A92A82280002A80000002A84C02A02880002A8228208240AA80082A82A8288000 2A00002A8000000000000000FFC1320003542003502401542902D232234435040000012D0900550D51550550550D50510800 550800800D50D50450540000D40210A30C40D50A00C48D30D10800C10800D50000000000000000FFBC93000C00400400404200161040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006106 31601622401400400400600600400000600600600600C002006000000000000000FFBC3C0002002012012400112042002002 012010010000004890804800004804004004808804800C00800800930905044800804084A28A100048008048408400050048 04814000000000000000FF8C7F00000080000008C8008D080080081080080000008000020020028000000000001000020000 0800200200204A112006002810082142002010002002002002012002002000000000000000FF66160000AA0AA0AA0006A201 00AA0AA0A20AA00000002A82202A82A82A82A8AA8AA82200002A84100002AA2122002410022A9320040000AA82002A82882C00961040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (880080480100 180480800060122160020060860220025400022800100028028020126A480001241411211200600044000200200200240004 4000000000000000FFC1C3400988401401440504480400400400400401000100100100100100100100500506100110100100 1000000200018000000000000000001000444000001001005004000000000000000000FF7ED8400000C00C00C00C00C00C22 C00C02C00C00800100300308B003003003003003001003401001003402003203102103003080002003043001002002003003 003001002000000000000000FF574C000009801001903851089801801801801801808000600640600600608604600600004600561040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002006004000 000000000000FFBB8F000009810905801004021001801829021801800000600E006004006006406006000026400400006006 08640604E006004000010146016410022004014086002406046000000000000000FF772E0008099080000800218240200000 3185000000000000000200000402402000500005400004000060000904001500200000000004200004300000060061000060 40000000000000000000FF21CA00000180000008011380002400000380000000000000041080000000000000000000200000 00006500510810800110800900004000820000C40006006000016000800000000000000000FFC80D0000008009048229310000d61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00006046A562 8620222601214003020E014800016044022007003006000000000000000000FF20B900000002282593080193180C12500980 1801800000600600600E0060060060060000060000000064960860260A809610000A2041464A604008600600000600600600 6000000000000000FFC28100000188280190380180D840803800801803808000620604E0060064860460062A00060000B020 700700611628104601041200420E10604020E002002006006026004000000000000000FFD275000800002819803952009801 81980001180180800062060060060460C60260560005062000A02060060160860060060040001600040EA00000A00000E00600361040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00B0A3CAB801 80002AE2AEAAE2462AE2AE2AEAAE0002AE2A90022AE32E4962A6A8D04628AAC010404E22D00232628E28E0062AE2AE806000 000000000000FF198C400000401C01F01801E018000012088018018000006006006006806006806006800006000000006086 0C600600600600213022400600C000006002004006006006004000000000000000FFAB4F0001AB88D88D9508A2005B809418 B20AB80180002AE2AEAAE0242AE2AE2AEAAE0002AE2A80202AE00604600E042406262A10480006004000A262882880062AA2 AE806000000000000000FF2C90200000201A01805A10003840A11801001C018000007006006486006006006006000006000800b61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (068060000000 00000000FF09BD00002A0AA8AB8008A38418AB905AA28ABC0180002AF2AE2AEAACAAE2AEAAE2AE8002AE2A90002AE006C062 2E2262062AA00C2002AC2238002AC28A28C0072AF2AE004000000000000000FF70C0000801800821801C0184180340140180 1801800080600600711700680700600700000600004000700680600E00611600200604848510204101404604600600600600 6000000000000000FF8EE5000154154955853D5590BD55C31D449558018000556556D56557556557556D5700055655000C55 625681654E556336552C06088554542015554532554006556556804000000000000000FF644000002BCA9C898048B388982800761040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400641600602 610600A000106206012084006042004006006006454000000000000000FF3A4900000182C801820801809801001001801801 800000600600600E0060060060060000060004000063460A60062960360820300160D6086240096006006006006006086000 000000000000FF50F1000000200A018B0A11921801213000A018018001006006006006007006006006000006000800004A46 34608691680E002000026006012010006022004006006006004000000000000000FF528A00010180080180280180B8011410 118018018000006006806006006006006806000006000008006096016006006146002B24108004906000804006046006006000f61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (541559540000 5565565540965565545565560045560060845564864B65563563564D24445560165464C444E5505105505565561540000000 00000000FFC89980010184180100100180180400000100180000000060060040040060040060060040060061000061261460 060064060420800C6006006100006044004000006006004000000000000000FF91D50000AB8000AB88A8A38138190030A38A B8AB80002AE2AE2AE0A42AE2AE2AE2AE0002AE0000E02AE04E0062AE00620622238022600622600022628E2EE2AE2AE2AE00 6000000000000000FF8E3C0000001008018008098C1945131008801801800000600600640600600600600600000600000400000e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF793300002B88F8AB1610A38AB8880AB0A30AB8AA00002AE2AE2AC2AE2AE2AC2AE2AE0062AE0060802AE01E0062AC26 42063162B42002AC16E00024628C28C2A828E2AE400000000000000000FFBD770008800C18010AB0018C1900121000001800 000000600600442600600400600600400600640000600E0060060040060020100062C6014000086000000000006006204000 000000000000FF622200002B8898AB00D0AB8AB8B00AB0AB0AB8AA00002AE2AE2AC2AE2AE2AC2AE2AE0042AE0064082AE206 20E2AE28C0AE20222420E2AE21420828E28C2AC2A82AE2AE0AC000000000000000FFE72E0000540159550011558038440131008e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006004616506 14420400400001000004A004004000006006006000000000000000FFC7F40000440018051018458018008030010018000001 0060020068078070070070060870A78060040060060061040C60060064042000800840040160040040000170060000000000 00000000FF8F8400080180180108580980184000101100180000000060060040060068060060060060060064000063460A60 04096036106000050000306210016024004000026006080000000000000000FF3BF000010044180101100180180480100100 1800000000680300600400600500700600600600601000680741600400410605600808000400608014600404400000600645004e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180008008868 0200E0268C600602E80600680700600000210608640450620600610403001021442850201400C00000000602200000000000 0000FF1C10800045801801901010020808801001001800000002600B00600408680480E00600600610E00000208600632410 6106006000000008014000422004004000040804002000000000000000FF3D58800000001801811809840852001001601800 000008700F00C006006006006006006006006001806056016444006006004000004010000000402004004000046006006000 000000000000FF7A1F800801C01801805003800820003001001800000004700698480710680501700600600711600004692F00ce1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF43A300000000180100384402180080108B001800000010600200620E10600600640600410E00600000200608602C002006 006016110008404400144104004000000006006000000000000000FF71C20000018018850438918308008110031018000000 00600201624E00608614620600408E00600800610600602C4264660061060442440140500060040140000060060420000000 00000000FFCA1E00000000180501504380282400B001001802002010600601400600622C0860061041460060800460060160 0405640E14600A4841A4184080026084004000016006002000000000000000FF12DC80000010184382185000880080109109002e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A230C2002022 B02A23221540422022AA2AA0002880022AE000000000000000FFDE070000018940000000098500000C200100000000000000 0650820400020800000010000000000000600001001012010000801000408C00000013000400400002611000000000000000 0000FF7E2D80008184004413400190214C00800180000000000000000401280000C00000000100000003200063402A000000 00300C0000010000330320000006006000006440000000000000000000FF675C000001901141001900003041803801009802 082000700200600404632E0160060040060060900020060064040C200E00600200030010408020400C00400000000600600000ae1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000557906D5 7556556557D565565575575565085564864B65564063544460964D7556406500546556156800554556554000000000000000 FFE16100002A82ACA80CC8AA8A29088508AA8AA80000012AA2AA0A24022AA0222AAAAA22A2AA2AA2802AA20220A2222220AA 2AA220A2A2222022803022AA2AA0002AA2322A2000000000000000FF73DD0081000000000000010240010810000002000000 0004280000010048000000000008000000000000080008000B00000882240000001000100100002000000040000000000000 00000000FF1E2500012A90088D0008A20108009040AA8AB80000002AEAAA4021422AA5022AE2AE3242AA2AA0022AA01A0022006e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF49 7800000000000000000004808C1000000000000000000C000008000000008000000008000000000400000100001101000004 10000110108000000400000000000000050000000000000000FFC38F90802A8AA8AA8AA8A288286480482A8AA80000012AA0 222AA2AB2A82AA2A92A82AA2AA2AA00028A04A0022AA202206222003A0220225200022A0AA0AA00028A2AA20200000000000 0000FFBA25800800000201000001000025001000401400000100500080801100481100480400480400402000012014109000 C40000008490001000400004800000100000410000C000000000000000FF6B59800055955955955955111911049955F5580000ee1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600081220001 2002002010000002000000002000802000000000000000FF2F740000000000000000A0000000000002000000000002028022 82A82A80A820000000000000000000022004840000002000000800000000000000000000000000000C800000000000000000 FF251C0000002004000000020000000002800000000000000000800000000000000000000000000000080081000001000000 000000001008800000000000000000800000000000000000000000FF60041000800000000000080000000540804000000001 0000880000008000000008000000008003100003402A00000400300881201510400403081000004000000200000800000000001e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002002002 002003002000002002002000002002002802002000802802802802002000000002000000802802002000000000000000FFBF 1F000001C01001801F05001801801801800000000000008700E88F08E08E20600000680680600000600502EA0420782400E0 0C80600780400800000600000000400A006000000000000000FFB91C00000000100120104100000100110500000004000404 04444444444044004000004004004000100544004804000804000C0481081000400000000400000000480400000000000000 0000FFF783000000800C00800C00A00800800800800000020000000000000100000000000000200200200000200300200220009e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF87D400 0001800400000001800000000000000000000000000000000000000100000000000000000080600100000080000000100080 0001000000000000000000006000000000000000000000FF0EE8000000800801001800000800801801000000000000000600 2006002002002000003003004000002006000002001000002002002802002000000004000000000002002000000000000000 FF9ECF0000000010000004010000010000000000000000000000005000004004004000000000000000800000001004004004 000804000000000000000000000000004004000000000000000002FFA979000000800A00200800A00800800A008000000000005e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (184826004002 31A000000124040000086006006000000000000000FF2722000000000C01111800101801809C018000000008000006046506 006016006000406007404300800A0200700214000400403080680600028A020004000010000006006000000000000000FF7D A2000001880801041800001001801801800000000800000608E04641600640600000600600404000014200E00A0020120020 02102006204002000044400000100006006000000000000002FF2E7200000180000000000180000000000000000000000000 000000000000000000000000000000000060000000000000000000000000000000000000000000000060000000000000000000de1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (068068060060 0600600100600600600000080700700420200228600308490000200000000600000000040600E000000000000000FFDF7F00 000000180182180008B801C1180180000000000001161562B62060160060804060060062200002A70A608442000180501310 4000802488040006020010000006006000000000000000FF6B23000004000801089803800801C81801800000000000000600 6006006006006000006386A04080216002006924082001006406004042086000000084200001006006006000000040000000 FF6CC1000001C98807401805815C01901801800000000000111760701600E006206100006506004000406002F4E14C40080C003e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFCCE7000002 001801001E01801A018018010000000000001806006006806807807800006106004000006000004004407804204004005882 006000000006000000006406004000000000000000FFA638000001C01801801801800C018018018000000000000006006007 007006006000006006006000816007006004002001004001006047006000000006000000006006006000000000000000FF68 BE00000040180180180180180180180182000000000000060060060060060060000060060060010060060068840020000862 0210600600600000000600000000600600E000000020000000FFD863000001A01A01A01800000A018018018400000000000800be1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020261070060 00020006020000006006004000000000000000FFCBDF000001845A0100380180080180180100000000000800060060061460 06046080086106086110406005804080087054004052006006806000000006000000006006004000000000000000FFE82000 0000081A0121BA01804899845A01000000000008001620680600620600600002600680608020601D084C7004640000618200 77470660000C0006040000007006004000000000000000FF12E3000001901811001901881901911C05000000000000000640 6006006506016000846006204201006100124004007002006006024002006000100406000001006006004000000000000000007e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600600 6000007006806000007806005006003501046002004802006000000006000000006006004000000000000002FFDFAE000080 005801401901800C01805801800000000000000600700614610681600000600610600000610600D006302001004070804042 006000080406000000006006004000000000000000FFA6370000018218010018018008018018018000000000000006006106 08600600600000600600400000E00200000410348002510A02680600E000000006000000006006004000000000000008FF54 64000000021809001801902C01929805800000000000000E00600600600602610008608620420800680204030C022252807000fe1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (81000401C018 01801401800001C0100100000000000000060060060060060040000000060008000070060070060060068040000048000060 00000000000000006006000000000000000002FFD776000000001C01A0100180000180100100000000000000060060860060 07004000000006000000006006816006906806004000844000006000000000000000006806000000000000000002FFD0F200 0281801B01A01001800001801601000000000000000600600610600600400000100600080000E006006006A060060060D000 400101600010000000000180600600000000000000000AFF742C000001C41081001E01800801C01A0080000000000000060000011040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280400600000 0000000000006044000000000000000000FF7037000000001801801801C000A1809801020000000011028622400E00622612 C50008000E00009088680700700E00610E007004C02024006000010000000000006004020000000000000000FF8FA6000001 8018018010098200018010010000000000000006004406006006004000000006000000006206406006406006404004002004 006000000000000000006004000000000000000000FFB1460000000018018010018000018010010000000000000006006006 006006004000000006000000006006006006006006006000004000006000000000000000006006000000000000000000FF1100811040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (006006026000 000006000000007807006802006002006000002000006008000000000001006004000000000000000000FF7C94000401A018 01801001800001801001800000000008808600421600600648E28008000E00008908600620680A80788A2048012024230060 00008800000000006804020000000000000000FF0CF9000000001E01801801A00841801E0101000000000400060040060060 060240000000060000000060060060060060060048060020050A601000800000000000600C000000000000000000FF92AF00 020180180181100982082180900100000000000002060040060062060240000000060000000060060060062068460060060000411040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (020000100100 1001800001801001800000000000000600600600780600600000080600000000600600400400600680600380400000600000 0000000000006004000000000000000000FF9DF5000000401801811800000901801801840000000000000644401600604600 6000001006000000000407006004006042804000003202026000000000000000000044000000000000000000FF41DB000001 8018018018000000018018018000000000000006004006006006206000000006000000000006006804006802006800003000 08600000800000000000080C000000000000000000FF10AA000000001801801401800C21801001808000000004000600400E00c11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0E8000000000 0000002860A0000000000000000000FF895D000005801001101A0001B8018E19458000000000200086006A06A06006316000 200206480000180A061044421C6004482000004000406000000048000000000004000000000000000000FF416C0002282492 012A1800204C01B21D518000000000400AA6A065062C6236A06000400836080000900246814202ACEA04C8D0A8A95012C060 00000080000000800844000000000000000000FF1364000201803083003B45950B2980580180000000000000061160060060 0610E200000206410000206917004146806016044202005322156000200808000000D06504000000000000000000FF87360000211040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (254004008008 00808000A00804049380220058850D94C08B98A00000001000000000100810800000000000000002FFA8D200000080000000 0C01080821800800000000000000012610200208600A00400000000200000000202200301600240202200004204400200020 0080000000804202000000000000000002FF1A6C000001808180480001864480100000000000000000100108908002100008 0000000000000000016409400025018A00208268280420010000000110000000806400000000000000000000FF0A01000001 822000040025900100000098000000000000100020100000180000820000002820000000708000080040010010000001000000a11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (201201200011 20320140044100000000000008048008040048040040008008048100008408048000CC800880A090AC80880C004000000088 000000804800800000000000000000FFE5C5000001801801841A230210018C19138000000000000006006006806006316000 0000062000000062060862AC2862AE00E0C402E2B4A36000000048000000084006000000000000000000FFBEBB000404C80C 80D00800D14CC0C00C20800000000040010310210300210380220000100200000111200322280304B0034A32112030010020 0000090000000000340A000000000000000002FFA7770002283012030224C22010482022210000000000400200000104800300611040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000005480000 00550D50540000000000000000FF9EEB00040044040000000043440000060400000000000000000000010000008010000010 01000001000000001001011001001021101041010001000000000001001000000000000000000002FFF63400002A0220880A A2A20982AA0AA0C80000000000000AA82A82A8AA8AA82A80002A82A8280000288A202A02000C8010080040280280A0000000 02200000002882A82A0000000000000000FFC6A3000200B10A42A00800A20800C00802800000000100000080280000000000 2000000802040000802112812802A22C53042C00842840152000000000000000842802008000000000000000FFF70800030000e11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (80002A82A82A 8000288211A5020022AD501402800583180000000002A80000002882A82A8000000000000002FF8855000000052000000008 0204000000000000000000000001001000000000000000000000100000001000808080088080100080140040048000000000 000000800000008000000000000002FF698F00012A08A0AA0AA4AA0000AA0AA03000000000000002A82A82A82A82A82A8000 2A82A82A80002A82A02802C82A00002103082002002A00000012A80000002A82A82A8000000000000000FF05B10003542803 543545442821543545140000000000800D50550550D51551550000550D50450000D50550540C50C00C40C30C11410C90C80000111040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (019019550018 01801801800000000000610600600600600600600000008600000240E00604C11620604610400604400E0040200100400000 00006006000000000000000000FFEB9200028020520120001124840120120100000000000048048048040040048050000008 048000008000C408480090004900D0310050A0CC4000800800000000844800000000000000000000FF215700000080080080 0A008808008008D4800000000000000000000080000000000000000200000204201204A1520022822C000232000201200000 0000000000002002000000000000000000FF37F000002A0A80AA4AA0A21020AA4AA10000000000000012A92A92A82A9AA92A00911040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080000000000 6800000000000000000002FFC4D20000028111100008B6000851801801004000000000600200200200200600604000000200 0000002102002082A0208211C10220A522500030018100000000004002000000000000000002FF06890001AC400401400409 4004004004000000000001001095005005005001001000000000400000180004608060000000000200004048000001000020 000001000000000000000000000002FF4D20000000C00C00C00C00C10D20C00C00800000000100B003003083003013003001 001003000000003003003002003103011213413003002001001000000001003002000000000000000000FFB225000029801800511040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000006000012 00800602400E00E1C4002710002018006020000000000000000004000000000000000000FFFECE0000018050010011400018 2981180180000000000060060060060060561160000000060000000043060140060460141000020325003060000081000000 00004004000000000000000000FF18A300000180400400214180000000000200000000000000000000000000282000000000 00000010006400210000020030000010148040008000000000000000006000088000000000000000FF877300000180000008 00018080C00000000000000000008010000080000008000000800900C000004168008208080008409008108208008000000000d11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (B810001C01A5 1A05000000000000600610E00600600601600000000600000000400601620E00610220A00408040600000000000000000004 510C000000000000000000FFD66B0000000450210808018C3001881801800000000000600600600600600600600000000600 00020460061040C40AE04404004A0120B4002000000000000000006004000000000000000000FFFD22000001811155005815 8018018018018020000000006006006006006006406000000006000000012006444015016004010000102024012028000000 000000002004110000000000000000FFA0BF000000181021001800001801809805800000000000600601E00600600608E04000311040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000552554 000000000000000000FF8EF400012B8AB88B8808AB8830AB8B18A800000000000072AF2372AF2AF2AF2AE0000002AE000000 28F2AE22F02602E22312132D2A92022AC0000010000000012CE226000000000000000000FFD3A8000080201E01800A01A210 01801801000000000000780780780780780780600000000600000004300600708F3070830418970100120040000000000000 01802006000000000000000000FFE2C60000AB8898898018A20098AB8038AD00000000000062AE2262AE2AE2AE2A60000002 AE8000002C8AAE226D16E06A1AC80286A201162A8000000000000000288234000000000000000000FF35B2000000001803A200b11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (068000020068 0600280C0960128C4094906802006000000000000000006004000000000000000004FFAB190000AA2ABAAB8ABEA3801CAB8A B8AB0000000000006AAEAAEAAEAAEAAEAAE0000002AE0000002AA2AE2AA204A462A2104A262262222AE000000000000000A8 B2AC000000000000000004FF3E82000001C01C21C2AA01831201C05C01000000000100600610600600600600680000000700 0000006006102005106102014006006046006000000000000000006104000000000000000000FF4C9A000054555955D55955 B15955D55D55000000000000655655655655655655600000055700000051255655244400E45241644454654655600000000000711040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (925001801803 000000000000600600600600600600600000000600000002200600600614601440002401200400E000000000000000022148 000000000000000000FFC3D00000018218018008018090018018410000000000006006006006006006006000000006000000 00600610E09240E10402A48C082088106000000000000000006000000000000000000000FF8CF2000000001801A008119414 01A01A0100000000008060060060060060060070000000060000020020060060C204600421000600A0880060000008000000 00042000000000000000000000FFDF440000018018018008018150018018010000000000006006006006006006006000000000f11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002CC2A60000 00000000000000FF152A00005413095180195581515595591580000000005505565565565565565560060005560060005105 505464B25364460101125404525460000060060000005504C6000000000000000000FF72EE00000180000182380180100180 1809800000000000000600600600600600600600000600600000400000600204600611001000200204E00000600600000000 4016000000000000000000FFAE730000AB88B88D8AA8A38410AB8AB88900000000002AE2AE2AE2AE2AE2AE2AE0000002AE00 000028E2AE2262260062240C000622232423600000000000000028E210000000000000000000FF9CA600000000184580080900091040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000400000 E142146006012010002102084000006006000000044016000000000000000000FF177600002B8AA8AB9018A38AB0AB8AB901 80000000002A82AE2AE2AE2AE2AE2AE0060002AE00200028C2A82363520062362A232632834A30400000600600000028C226 000000000000000000FF884A0001000028018AB8019010018018218000000000000006006006006006006006000006004000 02000000E00600608E30022000A002004000006006000000000006000000000000000000FF1CBA0000AB8AA8AB8098AB8AB0 AB8AB82380000000002A82AE2AE2AE2AE2AE2AE0060002AE0060002AC2A82A620628E326220222230212206000006006000000891040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (01C018018000 0000000010068070070070070060070008060020100040000061500060045820A24100020060000060060000000050060000 00000000000000FFF3438000C0000801901801801C0180180180000000000010060070078070060060060010060020000050 0000700600610E002146004002004000206006000000004806000000000000000000FFD5CF00000180080180180980100180 1851800000000000000680600600600600600600080600000004400010600E40E09600210010602203400000600600000000 4086000000000000000000FF9D8E000100000801B33801801A01A0190580000000000010060068060070068060070000060000491040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (420600000000 0000000000FFCB5F0000000058018018820098018018018000000000000C0602720700610603600600000640200008400000 6000556102092102014200024040006006000000004006000000000000000000FFDA5F000141803809901804001A01801801 00000000000200062060060068060062060008060020080048000070A8006310202010206023006000006006000000404006 000000000000000000FF2C040000040018018019458010018018018000000000040006286006006006006406000006000000 004000106000046406002008102043004000086006000000404006000000000000000000FFE888000001805811C01881801400c91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00410000600C 15614611400009208E000020006004000000004016000000000000000000FFE4250000000008400219000118058018018000 0000080000060463060060860460060000060064000040000160042060040040060000061101000060040000080040060000 00000000000000FF73F9000001880808021815801801801801800000000000000600608600600601600E0000064062001040 8000E00A00602200410608048E04000000600400000800440E000000000000000000FF4A8B00000400082000184980100382 180180000000080000061060060A60062860060000060040000040001060000460020040001120060880805060040000000000291040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A90080000000 000002AA2AE2AE2AE2AE2AA2AE0002AA4020002AA0002AA5020020002220864160261220002AA2240000002AA2AA00000000 0000000000FFE3F6000001912002000009900000000141000000000000000000000000000000000000000011000000400000 0210100100100240088400100000000010000000004000000000000000000000FF0E85000001820000000001812000000014 00000000000000000000000000000000000000004200000060000000C0448428010010240090208000000100000000006000 000000000000000000FF7F8A000001904810001800001801841801800000000000040600600614600650601600000600600000a91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFB905000155931113D55955155B55D559558000000000001D5755655655755755655600155654C00055600055640E 5565144D424444454C546001556556000000157552000000000000000000FF4DC200002A80888A8AA8AA8088AACAA84A8000 0000080002AA2AB2AA2AAAAAAAA2AA0012AA0320002AA0002AA0222AA22A23204A04220A20A0002AA2AA0000002AA2AA0000 00000000000000FFE58B00000000202100100000000100100000000000010000048000008000000040000000000040000010 00000020000024004088088000000000000000000000200004000000000000000000FF513E0001AA9458A80AA8A30648AA8A00691040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001204480 880100200A0088010001000000000000200800000000000000000000FF50E400000004000000000000020000000000000000 0000080000000000000000100000000010000000000100000810004000048801000010000000000000000000000000000000 0000000000FFA5E800002A88A0888AA0A28AACAA8AACAA80000000080002A82A92A92A82A82A92A80002AA2220000AA0012A A3020022022A00002002202320002AA2AA0000000AA2A8000000000000000000FF332B000000001021001001100201201000 000000000900100500500500480480400400100410400000080000401000010410430410414404000000400400000000000400e91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0800000000000000000000000002002000002802002802082002510882802043020000002002000000000000000000000000 000000FFD42C0000000000000000000000000000000000000000000000000209A20000000000000000000000220A90000800 000000000000000800800000000000000000000204000000000000000000FF0F7F0000000000020000000000000000000000 0000000000000000000000000000000000000000000000008000010008000000000000000000000000000000000000000000 00000008000000FF32020000800000224000080000002004000000000000000001000800801001000000001000010000200000191040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFDCBC00000080080080000080080000000000000000000000000000020020000000000000020020018020030020028020 02000002000002002000003002000000000002000000000000000000FF453000000180180580000100180000000000000000 0000000000000E006000000000000006006000224A0D00600608600728D00780600602400000600600000000000200000000 0000000000FF218E000000001001000001001000000000000000000000100000040444400000000000000400000080410400 4000805004804100004840004000004004000000000404000000000010000000FFE16800000080080080000080080000000000991040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000002FF098F000001800000000001800000000000000000000000 0000000000000000000000000000004000800801000000000000001000000000800000000000000000000000000000000000 000002FF46920000008010000000010018000000000000000000000000000002002000000000000002002000006004006002 806002004002804002006000002006000000000002000000000000000000FF4F440000000006010000000000000000000000 000000000000000004004000000000000000000000000000000000000001800800000000800000001000000000000004000000591040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000600600000000000000640600002600404E0060261060044040020060060000060060000000000060000000000000000 00FF396500020000100100040040180A00000000000000000400000001460060000000000000461064000064474064064172 474A4944911456D14200007006000000000006000000000000000000FFFA6F00000180100101204000180000000000000000 0000000000000600600000000000000600400004400601600402601600601422000400410010600600000000000600000000 0000000000FF824A00000180000000000180000000000000000000000000000000000000000000000000000000000000000000d91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 9197000201801801800000001804000000000000000000000000000600600000000000100600400000200100600600600600 2014006805002000006006000000000006000000000000000002FFE154000000001A0180C600409814000000000000000004 0000000007006000000000000006106401002C4002640600F04630188C256407312000087006000000000006000000000000 000000FF5ED200000040102100000982188000002000000000000000000000A7006000000000000026206001007804A06003 A0628E82422408202C006280006006000000000006000000000000000000FFD9AD000001981041000031851900000040000000391040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (026106112217 0A4004102000006006000000000006010000000000000000FFB66A0000002018018000018018000000000000000000000000 00000600600000000000000600600080200000600600600600000F0040060020000060078000000000060000000000000000 00FF7902000001C0180180040180180000000000000000000000000000060060000000000010060060010020030060060060 07000004005006E00000006006000000000006000000000000000000FF2C2B00000000180180000180180200000000000000 000000000000060060000000000000060060000000020060060060070008050050040000000060060000000000060000000000b91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0600600000000000000600600142640604E00E0462A62B3404B4120C000000006006000000000006008000000000000000FF D649000001805801800101801800000000000000000000000000800600600800000000000600600044240000601600600604 080600C21600000000600600000000000E000000000000000000FF5ABC000400001807880401901810000080000000000000 0078000206006000000000000106074000002000206207007447C0014E404004080000006006000000000006000000000000 000000FF2779000001D01A01904011841800000100000000000000000008050610600000020000000600600000080045640600791040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF0295 0000098018018000018018000000000000000000000000000006006000000000000006004001004007006006006006000005 800205002000006006040000000006000000000000000000FFBAF00000001018818040118018000000000000000000000000 1109061060100004000001060160002060060060060060070009440110060020000060060000000000160000000000000000 00FF993000000180180180000180180000000000000008000000000000060060000000000000060060010060060060060060 06000004000006000000006006020000000006000000000000000000FFBBB00000000038018001018A18080000000000000000f91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (040000000000 04000000006000000000006006000000000000000000FF3F6B00020180180180040180000000000000000000000000000000 00000000000000000006006001004007006006006003004802000001000000006000000000006006000000000000000000FF A82D000000001C01800001800000000000000000080000000000100000000000000000000600600000680600600680680200 4002800000000000006000000000006806000000000000000000FF64D6000011801301800001800000000000000000000000 000000000000000000000000000600600040680600600600600400000000020400000000600000000000680600000000000000051040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000006006000000004006086816064000004806004002000006000000000006006000000000000000002FF14A0 00000000180180A0018020000000200000000080000000020000000000000200200006006000803214406006006004000C24 016804002000006000020000006006000000000000000002FF8FAE0000018018018000018000000000000000000000000000 0000000000000000000200060060000020840060860060020040060060000020000060000000000060060000000000000000 00FF37960000000018018000018000000000000000000000000000000000000000000000000006006000004006006006006000851040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20FF7EA20000 0000180180000180000000000000000000000000000000000000000000000018060060008020040060060044140008200068 44002400006000000020006006000000000000000000FFDF7D00000180180180000180000000000000000000800000000000 0000000000000000000600600000280C206006004002004A2280E800002000446000020000006406000000000010000040FF 7CE9000000001801800001800000000000000000000000000000000000000000000000100600600000000400600600641200 404600604000240008E008000040006006000000000000000000FFF43C00000180180180800180200000002000000000000000451040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (601310040200 4000006000000000006106000000000000000000FF115C000000200801000201800000000000000000000000000000000000 0000000000000006006000004007806807806804002000000006004000006000000000006006000000000000000000FFE7E9 0000004018018044000000000000000000000000000000040000000000000400440006006000002504007006014002004002 806000002000006800000000006006000000000008000000FF6BF40000018018018000000000000000000000000000000000 0000000000000000000000060060000020040060060048050008000068040020002AF008000000006206000000000000000000c51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000008000008000000000200080041800200060000000000000000000000000000000000000000000FFABB70000 018E282104220208000000000000000000000000000001000100000000000000A60060000040062060060060040020000102 06004000006000080000006026000000000000000000FFCD390002102C0A2110000810000000000000000000000000000002 00200000000000000906886000B2C826C26886D268228AE482A4884B12C000A8E0C808800080E846000000000000000000FF 8A5D0000018128810021438000000000000000000000000000000000000000000000010826036000005C0610E0370161128000251040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (944000020020 12000004D50000000000000000000000000000000001200000000000008800810000A00A04838910978920000D0880080C82 0000A00820008000008884000000000040000002FF6A9B000000800801000000000000000000000000000000000000020000 000000000000000200200044442000608300440280C08608300000E00008A008000000006002000000000000000002FF342B 000049808080080009A0000000000000000000000000000010000000000000000000000A00001A000008002808001CDB0250 4684004C0000000080000000000000000000000000000002FFA507000001800000000021800000000000000000000000000000a51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A2A42040000 802800000000002000000000000800000000FF04E50002002052010000012000000000000000000000000000000000000000 000000000804AA4000894904804A84804800C4C80500080D094000804800000000004804000000000000000000FF7B020000 41841001840021000000000000000000000000000000000000000000000000000600E00022420600E08E02E00640600C24E0 06224000006000000000006002000000000040000000FF9A72000400C00C0080061480000000000000000000000000000009 00810000000000001003002001083003003002103512130523002441002001002000000001003002000000000000000000FF00651040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (505500000000 00800D50C40000B10440D50420550D50050CC0D21028510000D50D50000000000550000000000800000000FFC36300040000 0400000600000000000000000000000000000000000180000000000100100100000100010100110180100110000100100010 0001001001000001000000000000000000000000FF405900002A0880880000A20AA00000000000000000000000000002A82A 80000000000002A80080000002102A80082A82A80802302084802000002A82A80000000002A8000000000000000000FFCDED 000300A20A44A000108000000000000000000000000000000000000000000000800802802000C4204A80204200280280288800e51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00002A0AA0AA 0000A20AA00000000000000000000000000012A82A80000000000002A82A80002202202A80602A82A8221AA82202A8220000 2A82A80000000002A8000000000000000000FFC16C0000000000004004100000000000000000000000000000000001000000 000000000000108000040080000091000000A80000008100040000000000000000000000000000000000000000FFBFBD0000 AA0AA0AA0000AA0AA00000000000000000000000000002A82A80000000000002A82A80002B02282A82082A82A82302A82A82 A82280002A82A80000000002A8000000000000000000FFD7DE0003543343520001441540000000000000000000000000000500151040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030000010030 03000001001000000000000002000000FF3F4700000980180180180180000000000000000000000000000000000060000000 0040600608601000440810600000400600E046006204000000006006000000000000000000000006000002FF167400030000 1201001211000000000000000000000000000000080000400000000080480480400080400080481080480088400108880408 8000804804800000800000000000000000000002FFCDB0000000800800800000800000000000000000000000000000000080 0000000000002002002000112110002500000002012002002000000000002002000000000000000000000002000000FF88BF00951040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000A0 0800800008800A00800800B20A00840800888800800000800800800000800800000000000000000000FF4B7D000000800010 001800010000040000000000000000000000000000200004000000200200200001250801608000608201C022402006000010 002006000000000000000000000002000000FF0AB00001E84014014005014000000000000000000000000000001001004000 000000000000080000004000080100540160040280110260000000000000000000000000000000000000000000FFE7540000 00C00C00C00C00C080000000000000000000000000001001002000000001003003002001003001003001003403001283003000551040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (011010210038 0000200000000000000000000000000000000060100000000060060061200060000060004060160800340220000000000060 06000018000000000000000006000000FFE0C700000080110108580100C00002000000000000000000000280000960000202 00006006006000004200006000006086410204042542020000016006000000000000000000000006000002FF355700000190 01000A000180000000000000000000000000000500001100100002000000000001000000000000002001104004100882A044 0000010000000000000000000000000000000000FF863C00000180000000010181000000000000000000000000000000000000d51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00002AE00600 00002A82A8000000000006000000FF43DB000001151A05801811000000000000000000000000000000000000600000000000 6006006000002108006000090406014132004014110000006006000000000000000000000006000000FF6D05000080001021 001801800000000000000000000000000000000000600000000000600600600014C00000600000608E084400110082000000 006006000000000000000000000006000000FF15D50000018010510418008000000000000000000000000000000000006000 00000000600600602001610000E000006006084020510000400008006006000000000000000000000006000000FF9191000000351040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006556 556000CD2D505565505504063464CA54CB144C8000557007000000550550000000000006000000FF202700012B80DC898018 AB80000000000000000000000000000008008060000000000062AE2AE000A02AA0AAE2A8A20316A2108F22EA20A200002AE0 060000002A82A8000000000006000000FFED73000100201C0180180080000000000000000000000000000008008060000000 00006006006000002000006000000136008007006822000000006806800000001800000000000006000000FFAC1100002A84 3889801AA200000000000000000000000000000000000060000000000062AE2AE000A52A202AE2A8230066224402A243362200b51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180180 00000000000000000000000000000000006000000000006006006000802800806000800406C0208E90641080800000600600 0000000000000000000006000000FFD4CD0000AA2898ABA01AA2A00000000000000000000000000000080080600000000000 62AE2AE0002A22A82AE2A82A802600222622E8222200002AE806000000AA82A8000000000006000002FFBD68000001D01845 C01C01A000000000000000000000000000000000006000000000006006006000082008006000100006116022104006110000 007006000001000000000000000006000000FFCE3E000054555955801B54800000000000000000000000000000080080600000751040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AE2AE000000 000000000000000224000002FF7FBB0000000058038018088000000000000000000000000000000000006000000000006006 00600049600000600001211400C110010100000000006006000000000000000000000004000000FF9A0E0000818218018018 0180000000000000000000000000000000000060000000000060060060000260000060001020040800040824000000000060 06000000000000000000000114000002FF4079000000045A0180181080000000000000000000000000000000000060000000 0000600600600000E00000600000208C0C8804002102080000006006000000000000000000000004000000FFE50F0000018000f51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (002AE2AE2AE0 002A40002AE0062282AC2902802282000000002AE2AE0060000060000000000002A8000020FF14FE00005413411195415400 0000000000000000000000000000000655600000000055655655600001600055200654C54C5504D650008600000055655600 6000006000000000000540000000FF32D1000001000001800009000000000000000000000000000000000600600000000000 6006006000016000006006004004004012080156000000006006006000006000000000000000000000FF938A00002B8898ED 8AB8A380000000000000000000000000000000002AE0000000002AE2AE2AE0000460002AE00022222422422027006A000000000d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800009400000 00000000000000000000000010070060000000000060070060001020008020069160060A6010104044000000006806006000 006800000000000000000000FFDF3C0001AB0AA0AB8AA0A300000000000000000000000000000000062AE0000000002AE2AE 2AE0002220002AA0063262AE2422602242040000002AE2AE0060000060000000000002A8000020FFE6C60001000000018000 0000000000000000000000000000000000060060000000000060060060002840000020060040040040000002100000000060 06006000006000000000000008000000FFF36300002B0AA0AB8AA0A300000000000000000000000000000000062AE0000000008d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060060010060 00000000000000000002FF5A3900002100000108000140000000000000000000000000000010070060000000000068068062 00002021006007004A0600200008C00400000081E806006000007000000000000000000000FF16A900004100400180000100 0000000000000000000000000000000600600000000000700604620000002000200601531214204651410600000100600600 6000007000000000000000000000FFE325000001000001800001000000000000000000000000000000000600600000000000 700600600001000000200600080600E08201410E000000806006006000006000000000000000000000FFECED000001000001004d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (600600600000 40A80040260163041AC00200A026000200006006006000006000000000000000000000FFC393000001000109000001000000 000000000000000000000004000608604001000000600680600000240080200600600620222E004086050000916026006000 806100000000000000000002FFD81C0000010020010000010000000000000000000000000000000006006000000000006816 12600000200000601600680E04614240430E000000006006006000006800000000000000000002FFB1790000010000011000 010000000000000000000000000000000006006000000000006017106000002001007816000006006100004214000000006000cd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010040000040 0000000000000000000000060060200000000060060060001142000000A60042040AC4400821042082000060460060001160 00000000000000000000FFC15100000100000180000100800000000000000000000000000200060260000080000060060260 0000400000020600800440008022201412000000600610E100006000000000000000000002FF4E9C00000100011180000100 8000000000000000000000000000000612600000000000600602600008C15000428600A19C0000962B204E28000011600608 E08008E100000000000000000002FF83E6000001000001800001002000002000000000000000000000000600600000000000002d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000000000 0000000000000000FFCB790000AA8000E90000AA80000000000000000000000000000002AE2AE0000000002AA2AA2AA00021 00003262AA2042223222063A02020000002AA2AA2AA0002AE000000000000000000040FF9380000001000002000001000000 0000000000000000000000000000000000000000000000000000120000110000020010110010008110000000000000000000 000000000000000000000022FF4D780000018000000000018000000000000000000000000000000000000000000000000000 000000008000000000088080000120000020000000000000000000000000000000000000000002FF7496000001000001800000ad1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000004000 81400400400000000C004010000001005004004000004000000000000000000000FFA0840000D58001558001558000000000 000000000000000000000556556000000000556557D560005540004355564540160C62045465560000005575575560005560 00000000000000000000FF8D930000AA8000888000AA80000000000000000000000000000002AB2AA000000000AAA2AA2AA0 00322000A222AA2AA2AA22A2A22283220000002AA2AA2AA0002AA000000000000000000000FFB25700000000000040000000 000000000000000000000000000000000000000000000008000000000040000800000802A020808800400000000100080400006d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000008010008000001080002A800042802000050800010800000000000080000080000000 0000000000000002FFF2D2000080000000000000000000000000000000000000000000100100000000000000000000000000 0000000800000410440000088020000001000800000000000000000000000000000000FF376B00002A8000AA80002A800000 00000000000000000000000012A92A80000000012AB2AA2AA0002220000022AA08208208A0602322020000012AA2AA2AA001 2AA000000000000000000000FF850D000000000003400000000000000000000000000000000000000480400000000080500500ed1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF8A3A0000000000000000000200000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF34FE0000200000200000000000200000 0000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF281C00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000008000000000FF69A900000000000000010000001d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000008 00000000000000000000000000000000800000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF96D8000020000020000000020020000000000000080000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000008000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFF8900000000000000000000002000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFAE5A0000000000000000000000002000 0000000000000000000000000000000000000000000000000000000008000000000000000000000000000000008000000000 00000000000000000000FF165100000000000000000000020020000000000000000000000000000000000000000000000000005d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFE52100000000020000000000000000000000000000000000000000000000000000000000000000000401000000 00000000400410050400000000000000000000000000000000000028000000FF35EB00000000000000000000000000000000 0000000000000000000000001000000000000010000000004000000000000101010040000000000000802000000010000000 0000000000000000FF8218000000000000000000000000000000000000000000000000000000000000000000000000000000 0000100000000000000000000000000000000100000000000000000000000050000000FF409B00000000000000000000000000dd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF80E2000000000200000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD29F0000000000000000000000000000000000000000000000000000000010000000000000080000000040 080000000000000100400000000000000080000000100000000000000000000000FFA6300000000000000000000000000000 000000000000000000000000000000000000000000000000020080000000000000A082080282000000000080200000000000003d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000080000000000000200800000000001000000000200000000001100000800000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000bd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFE986000000000000000000000020000000000000000000000000000000000000000000000000000000000000002008 0000000000000000000000000000000000000000000000000000000020FFDDB6000000000000000000000040000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000008000000000000 000000000020FF9D780000000000000000400000000000000000000000000000000000000000000000000000000000080000 010000100000060088000000000000400000000008100000000000000000000000FF6EDF0000000000000000000000000000007d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000800 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF008D00000000000000004000000000000000000000000000000100000000000000401000000000000000000100 00000000000000000100000000400000000000100000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF241F000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000800000000000000000000000000000000000000000000 000000000000FF241F000000000000000000000000000000000000000000000000000000000000000000000000000000000000031040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008028000000 FF21BA0000020000200000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000008000000000000000000FF617B0000020000000000000000000000000000000000 0000000000000000000000000000000080002000000000000200004000000000000800000000000000000000080000000000 00000000FF209C00000000002000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000831040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000001000000000000000000010020008000000000FF223F00000000000000000000000000000000000000200000 0800000000001000000800000000000000000000000000008000000000002800002000000000000800000800000000000000 0000FF1910000000000000000000000000000000000000000000000000000000000000001000000000000000000000000002 0000200000000000080000000000000000000000000000000000000000FFB8EB000000000000000000000000000000000000 004000001000000000001000000000000000040000000000000000010000800000005000004000000000001000000801004000431040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000000000008 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF68DC0000000000000000000000000000000000000000 0000000000000000000000000000000100004000000000000000000080000000000000008000000000000000000000000000 28000000FFE4430000000000000000000000000000000000000000000000000000000000000000000000000400000000000000c31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF10 8200000000000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000 00008000000000000000000000000000000000010000000000FF164000000200000000000000000000000004000000000000 0000000000000000000000000000000001000000800000000040000000000000000000000000000000000000000000006000 0008FF2868000084000020000000000024000000000000000000000000000000000000000000000000000000000000000000 00000000002880000000000000000000000000000000000004C0000000FF4B6F00000000000000000000000000000000000000231040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (005044000000 0000000000000000000000000000000000010000000000FF74D7000080000020000000000000000000000000000000000000 0000000000000000000000000000000000100000000010000000280000000000000000000000000000000000000000000000 FFF9960000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040 000000000000000000000000000000000000000000000080000000FFC2CD0000000000000000000000600000000000000000 000000000000000000000000000000000000400000000400000000040000050000000000000000000000000000000000000200a31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF3DA700000000000000000000002000000004000000000000 0000000000000000000000000000000020000000000000000000000004800000000000000000000000000000000000004000 0000FFDC0D00000000000000000000000000000000000000000000000000000000000000000000000000000080001004000000631040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF9C8600 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF9C86000000000000000000000000000000000000000000e31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000131040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000001000000000080001001000009000000000000000000000000000000200001001000000000FF59E900 0000000000000000040000000000000000000000000000000000000000000000000000020001000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000931040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFE807000010 0000000000000200000000000000000000000000000000000000000000000000000000800000000100000800800008800000 000000000000000000000000400000800800000000FF99A90004000004000000000004000000000000000000000000000000 000000000000000000000200008000900000000000800000C00000000000000000000000400000000000800800000040FF80 6A00000000040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFBC500000080004000000000000000000000000000000000000531040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000000 00000400000000200000000001041000000020FF786D00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000008000020000400000000000000000000000000000000000000000000FF5A1C00 0000000000000000000040000000000000000000000000000000000000000000000000000000000008002000800000004020 0080020020000008400000000000080000000010000000FFE03C000000000000000000000040000000000000000000000000 000000000000000000000000000000000000004001000001040000030002004000020840000000000010000004001000000000d31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000680000000000000000400000000000000000000000000000000000420200000000FF7331000000 0002000000000000000000000000000000000000000000000000000000000000000000000000000000000000040000040000 000000000000000000000000000000000040000000FF08B90000000000000000000000000000000000000000000000000000 000000000000000000000000000000040000000000300000280000000000000000000000000000000000280100000000FF04 BE0004000004000000000004000000000000000000000000000000000000000000000000000000000001000000000009010200331040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFAB3700000000040000000000040000000000000000000000000000000000 000000000000000000000000000200000000000000000A00000000000000000000000000000000000004A0000000FF806A00 0000000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA99B00000000000000000000000000000000000000000000000000b31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFED83000000 0000000000000000000000000000000000000000000000000000000000000000000000000000004000000000004000004000 000000004000000000000000000000000000000004FF18DC0002000000000000000000000000000000000000000000000000 0000000000000000000000000000000800000000004C00000000000000000000000000000000000000000A0000000000FF4000731040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000200000080000000000200000200000000000000000000000000000FFACC00000080000 8000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 00000000020000000000000000000000000000FF380A00008000000000000000009000000000000000000000000000000000 00000000000000000000000000280000000000000000200000000000000000000000000000000000000000000200FFF8EB00 040000020000000000020000000000000000000000000000000000000000000000000000000000000000000000000000000000f31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000A000000000000024020000020000000000000 00000000000000000000000802C0000000FF6A1F000108000000000000000110000000001000001000000000000000000000 0000000000000000004000400000000004100000004000000000000000020000000000000000000000000400FFA56C000000 00000000000000000000000000000000000000000000000000000000000000000000004000000000000000800C0000080000 000000000000000000000000000000200000000000FFFC130000000001180000000000000000000000000000000000000000000b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000A0100000000FF96830000000000000000000000000000000000000000000000000000000000000000 000000000000040000000000000000000000400000000000000000000000000000000000000400000000FFCB8E0000000000 0000000000000000000000000000000000000000000000000000000000000000002000000000000000000000000400000000 00000000000000000000000000240020000000FF3E9100000000000000000000000000000000000000000000000000000000 00000000000000000000000000080000000000400000280000000000200000400000000000000000000000000000FFFF1700008b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000100000000100000000000000000000000000000000000010000000000000000FF9A8800000000000000 0000002000000000000000000000000000000000000000000000008000000000000000008000002008000000000000000000 0000000000000000008000000000000000FF22B3000000000000000000002000000000000000000000000000000000000000 0000000100000000000000400000000020000000000000000000000000000000000000000000000000000001FFE529000000 00000000000000000000000000000000000000000000000000000000000000000000000800000000000004A05200000A0000004b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0020000000000000000000000000000000000000000000000000000000000000000020000020000000000080000008000000 000000000000000000000000000000FF093C0000000000000000000000000000000000000000000000000000000000000008 000000000000000000000000000000010008000000200000000020000000000000000000000000000010FF3FDA0000000000 0000000000000000000000000000000000000000000000000000000000000000000000004000000000000000000000000000 00000000000000000000000000000000000000FF43CF0000000000000000000000000000000000000000000000000000000000cb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF3D7D00000000000000000000200000000000000000000000000000000000000000000000 00000000000000000020000020000000000100000008000000000000000000000000040000000008FF882000000000800000 2000000000000000000000000000000000000000000000000800000000000000000000008000000000805000042840008000 0020000000000000080000000020000000FF2B73000000008000002000000000000000000000000000000000000000000000 0000000000000000000000000080000000000020000228000080000000000000000000080000038020000000FF0680000000002b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000100000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFB4BF00000000008000000000000000000010000008000000000000000000000000000000 00000000200000000000000400000000500000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8003000000000000000000000000000000000000000000000000000000000000006b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000000008 0000000080000000080000FFBFD8000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000200000000300000000000000000000000000000000000000000000000FF1A11000000000080000000 0000000000001000000800000000000000000000000000000000000000200000000000000080000000000000000000000000 000000000000000000000000000000FF54450000000000180000000000000000000000000000000000000000000000000000 000000000000080000000000000100000000000000000000000000000000000000000000000000000000FF409B000000000000eb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF4CFE0000004000000004000000 0040000000041004000010000000010000000010000000010000000010000000010000000010000000010000000010000000 01000000001000000001000000FF706A00000000000000000000000000000000000004000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFE75600000002000000 0020000000020000000020000000008000000008000000008000000008000000008000000008000000008000000008000000001b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000010 0000000100000000040000000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF9D2F000000008000000008 0000000080000004180000000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000000020000000020000FF247C0000000000000000000000000000000006100000000000000000000000000000009b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001001001000 000000000000000000FF81D90000000000000000000000000000000004000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF989A2000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF8A9000000000000000000000000000000000002000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF7EFF00000010000000005b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000010000000 00000000000000000000000000001000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFE8E1400400400400400400 400400400400400000000100100100100100100000000100100100100100000100100100100100100100100100100100100100db1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF4BA34004004004004004004004 0040040040040000010010010010010010010010010010010010010010010010010010010010010010010010010010010010 01001000000000000000000000FF7BDD40000000000000000000000000000040000000000000000000000000000000000000003b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF6D0000000000000000000000000000000000000000000000000000000000000000000000000000000010 01001001001001001000000000000000000000000000000000000000000000000000FF4BA340040040040040040040040040 0400400400000100100100100100100100100100100100100100100100100100100100100100100100100100100100100100 1000000000000000000000FF4BA3400400400400400400400400400400400400000100100100100100100100100100100100 1001001001001001001001001001001001001001001001001001001000000000000000000000FF409B00000000000000000000bb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100100100 1001001001001001001001000001001001000001001000000001001000000000FF0B88000400400400400400400400400400 0000000001001001001001001001001000000000000000000000000000000000000000000000000001000000000001000000 000000000000000000FF87A25004004004004004004004004004004004000001001001001001001001001001001001001001 001001001001001001001001001001001001001001001001001000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C0800000004 0000000000000000000000000000000000000000015010000100000015015012015100000000000002000000000000000000 01501501000000FFDB9240040040040040040040040040040040040000010010010010010010010010010010010010010010 01001001001001001001001001001001001001001001001001000000000000000000FFA85400000000000000000000000000 0000000000000000000000000000000000000000000000000100100100100100100100100100100100000100100100100100 1001000000000000000000FF41A200000000000000000000000000000000000000000000000000000000000000010010010000fb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000003140 1400000008FF742E00000810E2080001000000081000000003080000000400000000400000000400000000400001A00C1002 0000401A01820411A20000400000000430000000400000000421821820410000FFBFE10000101A4190000000000010180000 00002000000000000000000000000000000000000000000000900A00000800000A00900A0000000000000010000000000000 0000800A00A0690000FF78362000101C40100000000000101C00000000000000000000000000000000000000000000000000 4000100C0000000400CD02104C0000000000000210000000000000000000CC0CC0410000FF05BB00000C080348000000000000071040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D01080004001 040D00C05040D04001000000001000000001000000001080C04C05080000FF99170000020904000000000000020800000000 100000000000000000000000000000000000000000000000014000040000019A400140000000000082000000000000000000 00004001A00000FFE58E00000601810600000800000600800000021800000000200000000200000000200000000200004008 20068000060400469060468000020000008020008000020000000020460461020008FF0DC600002000C22200000000002000 000000020C00000000000000000000000000000000000000014008000080000014014000014080000000000000300080000000871040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000800B4D001800000000006F11110000000000000143FFFFFFFFFFFFFF FFFFFFFFFFFFB03D000000060002000020000000060000000020000000008000000008000000008000000008000008008001 00000800800901800900000800000001800000000800000000800B00B0080000FFC1D600000D03404C00000000000D000000 04000404000000000000000000000000000000000000003000D0050000000300054010350000000000000010000000000000 0000D00500540D0000FFA41A0000004380C1000400000000400000040410040000100000000100000000100000000100000000471040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000271040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000671040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000171040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000971040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000571040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000800B4D000400000000006FEF700000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000371040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000771040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f71040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800B4D001400 000000006FD39500000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000af1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ef1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000800B4D000C00000000006FF5C900007f1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000809040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000409040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000209040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000609040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000800B4D001C00000000006FC0BB00000000000000000000000000000000e09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000109040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000909040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000509040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000309040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000709040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f09040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000800B4D000200000000006FE6E7000000000000000000000000000000000000000000000000000000000000089040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000889040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000489040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000289040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000689040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000189040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D001200 000000006F7EC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000989040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000589040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000389040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000789040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f89040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000849040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D000A00000000006F589400000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000449040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000249040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000649040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000149040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000949040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000549040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800B4D001A00000000006F6DE6000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000349040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000749040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f49040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000800B4D000600000000006F4BBA0000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000800B4D001600000000006F77 5F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000829040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000429040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000229040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000800B4D000E00000000006F510300000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000629040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000129040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000929040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000529040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000329040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000729040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000800B4D001E00000000006F6471000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f29040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aa9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D00 0100000000006F422D0000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D001100000000006F88670000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000869040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000469040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000269040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000669040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000169040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000969040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000800B4D000900000000006FAE3B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000569040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000369040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000769040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f69040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D001900000000006F9B49000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D00050000000000 6FBD150000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000be9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000819040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000419040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000219040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000800B4D001500000000006F81F00000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000619040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000119040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000919040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000519040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000319040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000800B4D000D00000000006FA7AC00000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000719040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f19040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000899040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000499040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000299040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000699040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000800B 4D001D00000000006F92DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000199040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000999040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000599040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000399040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000799040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f99040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6FB482000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D0003000000000000859040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000459040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000259040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000659040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000159040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000959040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000800B4D001300000000006F2CAD000000000000000000000000559040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000359040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000759040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f59040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000800B4D000B00000000006F0AF10000000000000000000000000000000000000000000000000000cd9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dd9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (EFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE00800B 4D001B00000000006F3F83000000000000000000000000000000000000000000000000000000000000000000000000000000003d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF7FBFDFEFF7 FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF00bd9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F7FBFDFEFF7F BFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE007d9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7FBFDFEFF7FB FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF00fd9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FBFDFEFF7FBF DFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF F7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF00039040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (BFDFEFF7FBFD FEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDF EFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFE FF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEF F7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF 7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF700839040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0CF2ED55BE95 EDA3D2A914A83316954AE440695A0760104FEC006B003E386E1D01C3F532A956AA4084940507A83824081D205805810BCC7E 0C679C1E6001BB3060EA7594DF48030004E4200C114844E11024283B040FDBAFF3A3FD4C0015BC428C021379A60821838663 914901A44E04374883A7731104A645018449248A0800066CA11C46754211C8E41203C94421128054004DA21941D0612DF688 42048201326B9120581E2E86AA244A0D84004038006FC0C020C2060E955203532018C8001A0659C1C6192084FF499902A626 A9055CAB792B01430579CD9E00603FDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7FBFDFEFF7F00439040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000F001820100800000000000000000C06030180C06030000804000080 40000000000000180BA61084384236AA1D2A5272017CEE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE 222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22EE222EC22D86C361B0723 91C8E48D46A351A271389C4ED86C361B072391C8E48D46A351A271389C4ED86C361B072391C8E48D46A351A271389C4ED86C 361B072391C8E48D46A351A271389C4E207F83DE0FF201552AAA150000000001540AAA0500000002024102A4310C1D8C159900c39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000239040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001002000806 028006004000810000000186001833018301800C18CC6000180C060000060C1C000000300000000C0603000A801001800006 000060000001400C0000C0000618000000000018000000000000180C00000000000000180C06000000001800000000003603 00600000000000300001800000000000000000000C0000000000600040000000000000000000000000100007182018C81000 078C0018C1E0380008140037838000E2000804488000000000180000000000018000800B4D000700000000006FAD97000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C10231808F60 00184081E230000318008188000230003047A3180080623006C061820600011B0180081800004C004000788C0000C6002062 00008C003C180081800046C00002180080000C00300100D8008180C0040C4000060020003000231800118000188D80000400 046006008C6602062300003040C004801808860200000180000600060881C0014080043E8100004000060C00200040A00000 00036602000000630840830000C00CA660CC660060000600001B0840C01000000005402C00000002018321028DC6E35000DC 0001C3811803418CD80000000186000000000001000000CC79821F83C1000018000000000CC660004000600F11E00000010000639040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000300000180 00600001BC000000003040000602000C00103180006000110080000000000008040280003000800000180300002000081008 004800000100205000000AC07800180001800000C000000030103000608100280000000001C0000001800C0400000CC18031 062301A00003001800000000001840001800000218020002301A0006000000C00C2000006488418A000800120C00000020DE 000060C0000001A200000003C0600C06030180E1D338708F66021F83851A0D06834180DD080470CD1CF31C38C70E31C239C6 2C0000066301020C46C0600206080000C004001E3206002062300003040C004C0618206030010311800018218008003F010000e39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4301980C010C C46000000066000400000C0400004000000006000018006038180018000002007003000C0180C41801548F0600000000000D 8603600301000000C000B80000198C058000548E0600000000720860C0400000030100000480000084002000000000040080 0030000060006000000300000C1CE004000000000001802C00000000300000000C1800180000180C50AA0000000000000040 A005B00000C6000018000008018000700000000600000C0000F000000003C00000000100001830000000183064204000C000 001820002000000100E0000060000030000C000020000E60001000000200000850220442044201100040201C40800301800300139040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02C600018009 040C0120860C0010086020700010088710000000000000000000000000000000000000200000400000000700000080002800 00801200400041000403C500A040A0180000002118218000002006000000086080060300008000000000600C000001800000 0C06000000C000000603060C0000000000000000000000000000003800020000005030180C6008000000003000000000C000 00000000E000008100060000063018000000C10000040001820180201A000033010218008000080000018C0048C100000008 118000002003010000000C000020130040006600010C81008000C00600C003005B0C600C0000010030603186300600D0000000939040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (319800003001 80000001800018000600000331980C0600000000000000000000000000600000000600000000003060800100000000000066 300500000E34000C1C0860000060C41A0904000000060C00000C10000600806FE040C01030000004008000E0000260330000 0000C06600002000000000CC00B07938C000C0008004001980000001800C000004000000A07801000C0000C1800018200000 1F081000F000004400000E00682442200630018F0560200000040A0003000880000100821400100884408C18804000000025 00005430000201032002000080450C8000010001400A14000700200000040000000100A540C0000010300000C0033004001800539040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1FE576727DEA 2538124A24252109280C2218004117CBFDE03F2924928106000400051A140800B103C47E0467941FA010AB3120A65700DD6E 81101416B9040405E2948B1080BE0D28C008A010A044880032100201002810881028540A2320318680050F000831D00196E0 65001864824AE416971A2CC4EF764200240E49200562D1088D361054199AE0C3000C10A004998C82760048943941A25FA916 6A6D14424004080001C02042371E34CC4BC0C0B9C4F216219840A119B004CF38060000007B10DCFC69BDC9E20559AC4E1164 88000000000000000000000300000060330180000000603186000180D80C00000000C000001060000000000000000000000000d39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000C00B921D61A25AE832D85C0E436625830920C209B4566135888D24A201000000000001F89E15AE1046B 783845AB4653010E876921DA42D3C0B4F0D243B490E78169E05A876921DA42D3C0B4F0D243B490E78169E05A876921DA42D3 C0B4F0D243B490E78169E05A876921DA42D3C0B4F0D243B490E78169E05A0055155FE0055155FE0055155FE0055155FEAA00 3FCAAAA003FCAAAA003FCAAAA003FCAA557F80154557F80154557F80154557F80154FF2AAA800FF2AAA800FF2AAA800FF2AA A80008392484027048000000000000000000000000000A880552AA09AA543118874897429086577EB7DE8DF7F3FDDEFC6B8C00339040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000140012 20000201200010090003D00900580004086000C083C202486600000218000060017800001CD3C9C4E22020C819A092418592 30EA03400D54C0C60081C6085018D86983F80C00A431284CE621B215320804341446E502C0D80011018000618049604A1523 4100040204D8AB001D08A4831A1C1200000007803041A87027138E400000010110040103040000000000800402000E040200 60801000D00000080000000009CE472538000000800B4D001700000000006F6E9C0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000739040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (158000000000 204AC205041000000020208240000024801001000000000008068224100B00000560000000000812A890000002C004000000 100501122848200000136000008000000000000E444BA02E02002C0120000008000000000809E44000440004020000200001 480800001000000000461001200000000260101C482000000000000080000781000392241000510088203000000000203200 080412804000140F008C3040000001000000000008018E2833A00000020001008022000048040A0000AA13039004E1F8B174 8F31804A2070100000BA472815029033D5820C50BC404994CB80001B52AA0040420A005A9438B4C0A00400004C270103006000f39040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60218ACC043C 01C91080252230410100071100C042C05100480000822456045484104ED48801E00366311B89A320000001018100008450C5 1003710081C8A66AA01E222620190210118026013A0A4D0EA1E84100F80100000000000840800400018207F02054004F2710 0005B124082C100080000040C0A4721112808803380C0021083048804180B800000000058434D001B81478049009C4E08000 00000000000000000002000C0040000000000000000001000000000010208408210021040838088542002008048040000400 000081C88914200400000020000000081488841000002000000100000001005044AA000000002112080000100900402C0000000b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (899CE8005B30 000000000003F190CC000C000C078081206D80C0062000018460240000041C184E1148C8040C4700C060000001E0C00030C0 080410240000040814E074C0D0D20A0200018C30483CB8000F00190000003012CA6888000C206BF85EC0422CC1001002C100 800100000001809D1800000D0383005344E040420342E4416040020020080287139249900021001A2110C044660669900263 D18019A67B099E12400108A056340E0C00E0D14028221C018446A5C08244400500A31827402008000952008623023A0C8EE0 3E005022368900E6100132C3208440C1C6080104198250000060A90209508000028122860902800741010048442129028D26008b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (014007000081 61342005BA0C3EB103AC826B003ACC2680D7A031EBC086FD190B07CF14180C0A2C0A00C20504984000046A090088000105D6 02501C964000700118CA108214072110000602142EC78034084D84705D3841EB836AEDE6487C00DDC8B540285C327C00100F 33000C6402048E080002301400204880C2004202A130E84830000004896018910890080C1081A402801630000004000D2021 1029006D8662E9800473009700015004002A40201001266001E01C652800808002E84000012E410806008C0020782A024004 822C1CF045A080280610300080640891420112294AC90809C42020416114A2348C828820020114AA042B81C00000E04CDC00004b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8488160A2510 E84820DD832470050C801E0541E000C0005C1C040813ACB703801E203E000867239088540000000000008100002152080040 800134180C1218D44942D30080034C0312C002818DE460280D89AD300200640040AA9007047A8854C80E8280000000887A28 10A09F02816009C215550180CBE5122902AD0034100000920C12A830A6952533D004002C650888272421E082100208004CC0 00058422010A400F0380C406000032158001809C840C003481A000031980010610418C00103580C0760C000E065831980008 2A06ABC000C8024020028402004009284542000201000380E42201A002088002A0008050208C08050100002000000000004000cb9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9C5572880A03 966BFDD43F3B914BAF12E81DEE552A17C8ADD2A98D348D4B8D5765559955EA456204DFA443A330E01D0EB54E27168914AE47 399310A330AB38A8C40BBC50EF11A319FEDC21BF5A6CF629843C8D3A8F4BE7402B7DA0757B914E25D2E158BA7162B54A2C72 E9702E550ABDCBA75389F5BA113E914B8113A974A854260D462F560854AAF422B44B86D20974AA1D3B954803520330E6511A 914AA512A9508A453A0558A513F854AE572315400510E11CBEF33FBF41EDD2A84188004020042B21DA18E0EF169B0F40E130 3C402201101800D6402D7C216D0297EB62600D6203020006C0000001900005AE518D93780C10C0180A010007438870A51134002b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010018080000 0000000000000000000000000000000000000000000000000000000000040C728854AA510B9DCB871239740C002AAA9FEFF5 51540055003FD54AA7F800AAAA7F800AA55003FD54FF5515400002AAA9FEFF5515400002AAA9FEAA7F800AA55003FD545500 3FD54AA7F800AA002AAA9FEFF551540000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000143FB5546021E0000000402A 8540040001000040208540000954685619BD53ED43EB09AE5C7997DFA4F3ABF0DEFE299D5E2577293C1A537695066552615400ab9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6001512C8418 01620C289045C14720F06006020018003060017802041CCACA92128424C85B8CCD2B25293D0CC3198F8D64C7C201962000AA D86A31F80D1E933489932A0148E85C23080AC10CE510C1188404001020E5D8103A00420904EC01B02D4E36783C0703259BE8 1CD86C361780B181F5E05555110103425905487406050009C00000C0E10181002C300209A4C81D3151831402351A8D16BFDE 05F150000000800B4D000F00000000006FD17C00000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (F8C026840080 19A05012C04600660006076098505013602C446001F800C03328B004001060EC04B001800EC10028B4B8C060135060266220 003F00231DA040A030060C660D070C0468016003603609E402081D020067839800D401B488017601040006C3608E82001600 61011A840C031800184D800300764401800280039B00000020000860B40170023323B0494805005CA621220F958010994006 4064361B0780000C4A511510D002C200119E032011C901010008201807095601F19815DE076793D8E4C00361B01C28849408 1043C19C5C639EC6851288959010290806A9C638740E3C798CC06002001156500003186D86C36100000A3301800098049888001b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (230205310009 00004282084012EB14020B0788188FF03801E0032633DE80066130600305990C6832B0C0C8000D00D0256660510832671005 650003C024136603110C00EBC030C72118CC663718C01E4B1189498B25921150405410808F01F12C980410301B04B138349C 000291898006780440031FB0D9C1F180F1A0D86C02CA2871D3B432547304C00A9211C558C46408000C0301800032300CC90A 10780C36070B88C8426101AC604B5110D424F508C096060001446300003C1AB0518059800462B408145000180001F879800D 403B488810000D98F4000FC2CC006800EC110A160003F0000D02355800CE013140CD80B1118007E00300CCA2F00884CE8011009b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3D88244E2009 81A1404DC0C126100000007824000F061404A840D0C5060E7903C86633183DE8700804C9E4010024800C06290201A1C0F1D6 40121F89A6B01B3CF82B0E9808E8C601C480C418B41B0C047B3826407810402100E8D0200060361B0D81801D180C001D0B8F 060348E2791A9B44E54231858400210305859529280200203754A596D014E0C72B930B4FA38011EE632CBC0F4C17A9280674 2E1C1881F7FB00241D6B855689D290D4184A1997DA2294A2091A431FAC0647063BDCA6E9593000AC37AB856A58178AC604D2 F8E5EA00020C0980300020200F0403C088346A342A13000001C741A9446A55291D568D4668658ACD04BCC98152A1142A304F005b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5D8CD5E335D8 C53E31CF8C73E1C18EFC081D186634180CE60D0E004A0D17B8C40A547A1F49821011058E007E3C1E830071003EC32183DF8F 01E3406E04040D5FE01618CD80704E34C1E3C0384DA6C07800D1EC57E0C09C306C8E006D340B04600C01BF000000403C2012 1980464242003DF8D02030418221990C1A300880D90DC0010D0280023C086630180C86110804880FC660CCE0C7668C026CC0 080DE0000030C801022340E8DC200C40804060CC0600008CC00006A10C78007A88060CC1820C18D06680006C0200311A0D60 02C603110A2400CC5814000E20683D1202060C41835401C482010A28406D86C2C15628082A0A084198F000633188C1A2B19800db9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (063F5A3548E0 37CB2198FC1C0887A333833170283E000E2A5050140260000D86C4F0103C400012000000001810080454010428C1E14CC6CD 180307E4C28B8580E0603F19EF30018018000202020310D84066D8260006836690EC18300002C68044481440200103000340 0341800F003F4027068814200019BC8083378B00842F6718882512000482596A2852ECC00005A8A40598082547A0DD064031 B0C600058140180C010C01E0000315983D1630C18C40437580CC663CCA0E061831D832180C06C3F069C018006008DE0700F1 DC78DD0E00060B000171E08F00934201C00201A000108049A00009C04000680105047081818607461000E1162319D8CD5E33003b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (402000A804A8 4420114881500114004000150004000100A2440A9548A402A044221008944A251229140855021542254228508A4528954A25 422910A851089048A45288548A540A954A8052A940AA5122844AA540A944A245288448A152A054AA1528950AA512A9102215 2281022112215488450A854AA440A9548805008502A010A9502A142A814A80120044A21502954825502110A0500A914A2550 A9540A452A800A21402900024000800A8552A0500060001843018BE1E0F51EB31E02C060142423010C0DABD6780D121B108C 1E6886E00C62130620012603198C0EC019BCC40F347800A0940FBB4002078BCC9E715D90C68E3782355A4C678005EE779BCC00bb9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000408A0108840021528850A2042A00400553FCAA557FAA800AA00155FEFF2A80154FF2A 80154AA00155FE557FAA80000553FCAA557FAA80000553FCAAFF2A80154AA00155FEAA00155FEFF2A8015400553FCAA557FA A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000028550A940AA010000000000000000000005000140000000002A1 00AA012A954A85520954A0002800480140014002500A804A8152014020000201082412090408140A0140A050001400042200007b9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000180C0000000000000000000000fb9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0800800C0883 40000000007856040D1FAAF150400AF96628C00000A8384082109E504EF7708DE6885004D86025786C04C2762705E2013040 0E0801028442E5A1F8783251331F62E19100F082410B100A81004014B810950CE72010CD9A00551541803043B0E2AA551DC0 4290580828C00600002C000000A03000004080160300004800320180100280B4F507AA814552A8018000800B4D001F000000 00006F3B7A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000D8D54995C 1C1300008620000001520E04BD0000310040060000240D4912001400E0000080200101C0000C0016C2A842BA18100E100402 0000000D8000581548478728114400000300003481A8081041010004C002A8822210101601000A8004290090160550004000 0C048E52840001400012200002241702000019200001E30100502CB0021C530CA11A0100E2042A8AAFF01001F4A57F10CC82 00002D9C4507900881301B38081B018C080404214880010102020A102955FEC41180862D0002094602401B84000440110093 450B074C01805050140A300001000811FC5F04800A6FF002A982402A220086000008380C201402001419006ED1080408042000879040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (20021002800E 01000281800327130800003888344D07805500A0600812024180110060100504520000154022600104882300118000000180 2441159FAEF208600C490980000334580028807C9FC88210181044800CAC0AA490980002E44A80044E800000280005800661 11A00D40557F820B0DB010813E046180080FA3FA442820181A8764C602A0421D10800F0B2078500415019908007182A068C9 4123120C941860840658300A4000600018006000860002DB95085727300C000000B00003480A808902000C60400002058000 0240D413010C4000C20028203040000C8010688C00031880008005482812D419030AE11110A006254180C60040210180001000479040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000600800 1300381FEC2678DC860C6701C66A82B0C5E0202220C100010008001000AA0BC9A020C0808004A2800004008C08032E290842 415000005001230AA00600441200401800A8B00004080E002A8AAFF3A03C80452AA542C50400181420000018000261058000 0081000A9751FD8A082010CA0004284102A250000189542185406905028B807001AC02800123540422D2000C825010000000 006018481018430D4412C8B4410AA812488512806068041094001000C41E00182A40E202004188020204008C008820000508 00400B32D215A2061200080514212428450808100441325000220400884000212180822C29820700090108814A82C948100100c79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00CC00344000 0018A0000C00000140000001140200001003207800A8080C17CE81006A011C7C00814105F0A0200630460D01820200108410 400C0180409010181A0600C06D02C0087A756E380400C000000470158D400F12023C2081000040010100208EC860800C0000 00043C004E88000E40080098400230020A82100C44001002804C1260C4080462800380021000003202000800000290680C01 0500008000C40800210C400001410C00046504000000A10C08C04201082400013140CA6202400900010860DC4002880A5410 218200000D8000010B000008602EC9600552C51600002A014510010918567E80C00283808C22200E28180801508D80D006A800279040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8402E8003415 1E00108EA7F85426F00820054C50103028405000006080580000005420848800017026590F80028C408935C050208C058C30 0185420053B30400004080660810041066A288601C200032060084D01540A319081440208000500008B28000001800000100 0000000000411426271888251002800A0C21884248008844E43C058DC8640208558CB02B0E42430401795214008005811089 04823006B1028C00214000640614C2240098401835002C02031228C0181021004800061940280011001A21000020BE4540A0 0000C0031C10001608400011E02040C914001728060020000004000660040000180C06030180C06030180C660019800060C000a79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C87C0819C307 10CC40070602906C200210263000005C6E30993C0C4C7F310003200020884120840025100301D07470A8D82CA6784C1C8B44 0401CC000239600250008C6F97C38002A347830000E0B2307E731F175E0E37196400016511870335710006B8460CC6E37070 F9E6C040105C849202D8322C402009A60018002493181045CD005A109C881A0089CD25202442842602400310600800A25522 094E06E09048000020008281020804440000040181800400B411048EA0A068ACD0205180D90E80200022C30100050A82B3F5 9600000C410C0469288C30402DC180260174E04002101280460165884E0600920680A80440047A0208C0000004801C20280000679040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000400A530801380418302030018366498D389C31B246CC91B270C6634E0D992634E0D992C91B270C69C31B246C36649 8D389C31B246C366498D38634E0D992C91B270C6C91B270C6634E0D992366498D389C31B246C000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000142AB54A6553E944AAA2150000000001502AA815000000000224082E00091689068108400850B291 60A24AA194AA4129D463254128D4925809054494592896825A020402D42AA9782A6820DEED3608E1428D20360908B250C9FE00e79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000200180000000000000000000000000000000000000000000000000000179040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2E1545A2AA94 10FE6680400005BB31E000003EDD4EF6603DE6000008DE6101B83C10B07D8F01E0000000180000000000C501FC580000031F 63D18300C80000020000000080D239002205430658CC1C00000001883000A060000000006006480148C00600026800000146 2300004180107B1000C4001300022040000000783FDFEFF7F8008000800B4D000080000000006F8DED000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000979040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000028002B08 000100000A400000000006003C10600000080001034000080000180000003C040600000280001015000000000080058018A0 00000500000002C0003040000000C00001023212001000000800000001900000000000060004801804001B00000064000000 36420006120000800F06E05C0E00063E490C20820002800500000000100800000000906100002104C2011C4901F1833C783B 000A9000000021060900000000040000002004004F6300208018000020000442202000116008C24000000040000430800006 882406001C00126AA2A9558002102804020090291044412018008618080600180A1000021041002004020600000001F8280600579040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (080004082020 C40180000001D800080000800003C000000000001000200660000000000019800000000000100000064798F01ECB19800383 10180000000000060000100000000980000C81800000086000C008000001E0000380000001E01404000002028D706080984D 40800000000270D20C040911094183B0003F1000C3081040281402010F48035162EC18EB40031060451021040231A54A6100 401C0A402000020000028000004DA0020000401000020020000B0408006010000000800010018003003FC020400021E01F00 00080031D8DC0002280000800000E000FC0B81080010407006B041804200002B00800100000004001000562700004A00006000d79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (840C3822C060 000071FC107C0CCAE40083CD80280380000C0180F1A48006000001001B3C10336E0009800000000030118000000400884400 40000001C0183410CC1000000007E23D80090000000F00001000180800080002391000002913000040000000070030C00000 000000000011410500400000C3060000C01003A406000000C00007800008003010000000187040400880000400080000001E 100800C00000028008210004100344280C08004000000041804300044084008050220F080200800002018003000000000120 04400108940000400150000006004C08002121000069110200001800800000010180100320061007800E010000018083061300379040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000730C580D0100060C0070809800000C06400600000630020D01820000000030600C0180C00001000C0000C06F80 00005CB26400000C0000C00040038C002400403D00F0000000000000301EFC418007820003307C001980812E401A0040C006 30000007800C00201400000CF660CC000067800780061800003306001800000000780C018F0000C000CC1800618CC0030000 0C000C600C000001E30C18C06603006C00003000806380400100000000C0000018000020108230060CC000001B0000006000 40000000CC24020000000F0002011800000A034027B30C5C201A0010000000CDE0D267B300200063CC002C00800002A300F500b79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (200000000410 003C788020000020C0600000000000038800000C0200040200208008C1A030000C018C3000C08000780000000000E0400000 0000000000EC1A001002068080000000C01180000001C0040000003800000010080007000040800008000028412888262000 001A00003418A80180CDFC7C058700000000018400000D0603101001F03C6183018331990DE631063F17E80063C180CC043C C60F0190C4183F000406023078C018006000C60000000000000000100300004800000610000040013C00001E00C00001E000 60C0180C07E8060000600066000663326000180C06030180C06030180C660019800063C000CC02301000461800000C20000000779040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100311E63200 0BC062321B31780C10001100210928108010009100314229103C0008DC0C6463805C470D00940000518080823420940CB621 31421046095C4426728066F81931C6603798CCA6036BB351033112080008400000000210C990384120C083021209F0205C89 898080181124731132C7A3247AB19A0A4A08C84F25181D76A0602300080160084AF11FB389EF01F161600040000080000000 000019800000000030203D01800442E0322D8000008048000000000003000002202000010000000C800C00780198301DA980 800602A154A01C30020047811088C404030007B7D208000858221060000000000C0420044000003160001E0000800003004200f79040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1020C0002240 800087169E1A4786921C5AD23C0B50E2D43B48F02D43B48F0D23C0B50E786921C5A87169E1A4786921C5A87169E1A42D43B4 8F0D23C0B50ED23C0B50E2D43B48F087169E1A4786921C5A0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C64A252 09C040000000000000000200000000000A080550AA9C3898082BC78BC7930060DC7813D988F033F19EFC1195DE6936383DFC 83680807E48069241AAA6A0604235613FDB83F0D0290892600E1DA483423088051434DFE4C7E0C19E30798CC60A04609946C000f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000300180000000000000000000000000000000000000000000000000000000000000000060085902116B2008f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (31E000003058 0DF6602DC6400A0CDE6301E0300030798703E000000008C001800000D603FC780000031E63D183009E000000000000000826 3C0100000300600C080000000180300000600000000060043008488000000664000300C61000000180327B0C80E200011DCB 3018000000603FDFEFF7F8000000800B4D001080000000006FFED90000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180026003C18 30000058002080C000040000000000003C06031800018000183D800000000040078039E200000F000000038000306D031600 40000086311A001803009800000301B0C00000000002000780180C001B0000006000000032000002100000814F0680D06800 46304C0C0092000280020000000000080000000048E30000110A851501480020813848116080900000000186010000000004 02A954C400809CE140608000000000000442200000002A0F056000000180000610C00C04002154AA0D000A6552A95406C000 320101019009088C001008AC840000428C0014082020A8108808040204000000009804001D0AC552A8940CFE6600C00103FB00cf9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180001800000 C00008004000000040C600000000000018E000000100080000000540801002C500800182001000000000001E600008000003 1980000C40000006006000C00C30000006C00003000C01E02C00000001970F306080188E002000000001F020040205000040 815000346E00DD0730783C1E0F0785D80050E1DC38F72082084084108010CD01B0006100600006C060000600000080000017 B0060000003000000004000F06180000300002018000100080030033C0608000F1E00F2000180011F87C0001780000800000 4000FC0983000010604006F060008600005B018003000000080010007E2F00001E000000000024000F18002100001E800000002f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C80182895036 0600000C0162E9E6000400000001122804A36600150020000000B011000000200000200040000002C0000816CE0000000007 A03D00090000000F100020002408000800044A2C508A50230000800000402B0130C0000000000000002A800A001000008200 0403086003180600000200000780011000502000000010A024805180400C00080000301E20110060000060000030000C0000 A8300C100090000002800003180A85480562A1540F50300D000000000000000200000140084002112800008002A040000402 90040042108000302214009010010000000A0180A0033006A007801E0300000180030623104000100140E81800000040780000af9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (281800060C00 78019800000C06000600000630060F0180000000003060040180C18001800C0600C06FC000007EF366080100000000000001 8C000C00203C44F2000000020000100E3C6180078000033060001980000000180100C00600000003800C00100800000CF660 CC0000678007800618000033060018000000007800018F0000C000CC1800618CC00300000C000C600C000001E30C18006603 006C00000000406580800100690420C4000019803020108210020C5800001901980C618CC0600000CC66000600000F000000 18000000060437FA0C16231400100002028980F047AA0080006A894431020000000600FD060E7032C0600000A1B0137008D8006f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (402800001000 80078C00000402000680C06CF008D19830000C01803000F08000783300000000C06600000000000000D01820100186008000 0000C01980000001800C000000300000000800000F0000C1800018000020070888243000001A00000F00E20502A95E78038F 00002002010002000C040A100000E0AC6503180AA5530D64A0603E05E32142819488002E850BE1008000EA450CC400205001 500B6600C7800000000600000011830000C000004632806A60413400001E00460001E00140CC100C836C0610006000740006 0AA34000000C00030000C00030000C600018000003C000C002300000461800000C20000000000030000000000060006A286800ef9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2AA303A313A1 11A84E498C42EF13E331A8DC31944A645229046A452B04CBAF006B75E0C56E115A6552A250AE532296CE6457E9702A570ABE 4A65130BDCA6312E915E8112E9DC6E54270F47A3D26854AEDC22B44B81501974BA1D2F97C049700130E2511B934AAD36A950 8865680D40A516E875BA3526B5C00F31A114FEF32FB5C1E572A8B0380060000180000000000019800000000000203D010408 81C0201C80000180D80C0000000043000006600000010008000C000C00780118300923008006000C10300810020046811088 4404010001121000000018000000000008000C40200540000011A0081E00000000030046E000000008E01818300000000060001f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (198CC6361B0D 86C9C4E27138361B0D86C9C4E27138C964B2592633198CC69C4E27138361B0D86C633198CC6C964B2592633198CC6C964B25 929C4E27138361B0D86C00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000343FB5546021E0200008402A854000000900 02402085400009D5E8D4181542A542B9002A7479A7DAE4F2ABF0FEFF29975E2E77A83C0A413294022D4233540C5D36800A81 B65BFDCE3F7BB34FAC10F834E077261DC0E560EB855485328552A55489982ACF62044E24C2E1F1A01D0BB7CA25138B14FAC7009f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000201F8000000 000000000000000000000000000000000000000000000542A954AA552A8004D2985CEA511FB74B87106B5C18C964B2592633005f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE6301E03000 30798F07E000000018C001800000F603FC780000031E63F183019E0000000000000000063C0000000300000C0000000001C0 300000600000000060004008100C04000660000000420200008180006B1000C0000101833000000000603FDFEFF7F8000000 800B4D000880000000006F021B00000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800000800 00003C06071000038000102D0000000000800780216400000B0000000200003040020000C000000632100008020008000002 01B0C00000000004000280180C001B000000600000003442000422002001EF0740E874024630940C01120004800400000000 00080000000091610100AC940A600290002103385033618C000000000186030020000000000000C000009867006000100000 0001000000280000000C0404008051801426840A2D51002800001C00146AA552A806C008300002019001100C000210AC8000 0044880010902200A0110800000100000000009800000C150AA5502864F56780C00307FB31E0000030D80FF6603DE6C01E0C003f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00C700000000 000019E0000001800C0000000200000000C800000183001800000000001E6000180000031980000CA0100106006000C00C30 000046C00103000C01E00C00000002960F306080180C010000000002F04004020A00008102A0203B5400D10A3070381C0E07 0F9000F1C3A8709A41831060C618C0180200B018600060300E806000C400000300000067801E000000F000000030000F0600 0C00F00000078000000000010033C040000041E01E0000000011787C00005800000000006000EC0D82100010006004F06100 40000038018002100000080008005E1F000096000040000018001F180011000016800000100016003D1870000098001101C000bf9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C00600000300 0000000366000000004000003001800000000000000000000002C2004816CC0000000007E03C800E0000000F000000000000 00000010004C00000003000000000000030180C00084000010000030C10300400000C3040C0609C003700600000280000780 0000001020000000302020010180800C00100000301E00000080000040000024000800000080080000000000000000831810 0000006000000F00301800000300000300030000000000000000300000000000000000000000000000000060000020000000 000000000180000300060007801E0300000180030603000000000000C01800000200280008000080000040000000F8003000007f9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (060000063006 0F018000000800B0602C0182C18001800C1600C16FC000007EF366000000000200000001AC000C00003C00F0000000000400 301E3C6180078000033060001980000000180000C00600000007800D00301800000CF660CD00006780078006180800330620 18020000007800018F0100C000CC1800618CC00304400C000C710C000001E30C18006603006C00000000C06780C203107B0C 60CC080019803060318630060CD880001B11BA0D619DC0E00001CCEE000600100F00000018000000020037F80C6611100008 000040C180F3078C00C0C0680C003D020000000600FD860E6033C0600000C1A0216000CD8C00800C003C0200000C0060C1E600ff9040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0B00C2ACF409 619850200D09A132A8F48000781300000100C0260040000000000064183008B24600C0000002C01980000201800C00080030 0000000800000F0000C1800018000020030888241000001A0420A750A00000001E50048300000000000000000F0000100000 780C2001180000030C2000603401A00000218000000C000300000000C0000CC00000000000036600CFC00209402E45021551 A30140C000000630006040033C00001E00C60001E00000C0000C0060060000600000000600060000000C00030000C0003000 0C600018000003C000C004300000A61800000C1000000000003000000000006200600000001000060C10F0011800000C040000005040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (422950A05128 9448A45288540A5508954A0052A940825420944AA542A144A2450A9448A112A054AA150A940A251221402255229502255288 40A8450A84422400A954A801009408A012A95428042A814A80102100821102854824508014A25008814A25402950A8042280 0A21400854021002800A05528150006000018000020040021980000000400060BF018C1983C0603DE6200180D80C01000000 C300000660000000100C000C000C20780018301803008006000C003018300600E7833198CC00000000000000000018000000 006000000C0600000000000080001E00010000030066700000000C70081C38006000002040380000000000078C00000D020000805040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (349A4D269349 A4D269349A4D269349A48743A1D0E8743A1D0E8743A1D0E8743A1D0E2D168B45A2D168B45A2D168B45A2D168B45A00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000020550A940AA010000000000000000000004000100000000002A000AA102A950A 85120840A8000001480450010000502A80480052015022500205402440091028400A00420050005000440294402400A01028 5420004885528954881008104005108840AA440A9448A00200442A0028144A251029048A55221102211229108A5108914A2100405040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000201F80000000000000000000000000000000000 00000000000000000000000000000004008110A944221520010220428810783C1E0F0783C1E0F0783C1E0F0783C1E0F0D26900c05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A6C24A55365 92A1A4B4112D918485915998CA4932A68D8D549244B26538AA1549932A592A000000172520E2A954552A954C4823C9B94C4E 5CA592C4254328B65E52AD8B2E52F9ED2C6A0D2A5D4AA05800000048154AA552AAA8D400800B4D001880000000006F81CC00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000205040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C21149E4908A 13000F25632AE5328752390422913240CE65491ECA49A00000D2965310520EE4F155EAD64B11C4C00420492264553552E656 8968D06933198C2995310D74E930394C46F33265B29B332993069149ED74691D00000007EAB4AA552A9B94C933D3E4F2797D 2A4F4AA2F1E9CC9972A64942D598288AA97238D96AC4800000662CA78AA550D06D4AAE159111C552AAAD74192BA55CA2D65A 09D4963CA78B2D530BE8AA55749544C0000000D26A4B198CC9A4D2A54A66352BCA06A351A952A56F0AD58BD2124964A65329 8B4FC53AA8D4AA2B1A4AA552AA95F4A608954F21A2A964B2C548AA4AA1A48AD1246C2A1492499350690E992C954AA520AA5D00a05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (961280000644 D299D27914BAD4C9932A5554662A954CE0A529654C974D098007916BADD2564A9654C6B331592EED6C97888C452994140000 364AE5A4AA4CAA1554BB8CC552A96534255319948A74F99CBCE532A78AC9E7CBA5D2E974AA4FCEA73A65CE594F1E53C794F3 9CF2F62DA55329A5B3A4F24825079246201240CE554B1B9348752390422913240CE6534879249243A91C82114898809E2A95 83CA44C390CAE520A28925E4B39842294CA1D486801390AA9972950841E5239132653487926A43C920941E4928812402F155 2CE6108A53287521A004E42A964D41E49248F24845098805E4AA95E89A038A4D21E492490EA43400920672A9995A7948249C00605040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7752C880654F 0A400594A9993C69251654A9921264AE7A13000000033198D8762AA552C5945168B4464B294CA66128A57CFF2B19958592A9 54EA725290816B52822D682C059C56C105B8B016495B04124640595052964B2D558AC28229B4960C9652C964CA55363A648B 596421689000394A2883CB71602DB2424919016690593124B700155EA8E363416C4E393756E3B6EB65BAA574394EA2600180 B2A93B258D455491A12C64249594C5233018EA662B1704C5949894B296252999CAD2491108692AAC5329C4819452EA52AA0C ADF15A916C5E3D16CF6EA3229994713903800F432954CC552C958AA652CA58B2995B154AA5D5C95D2CA933198CE6A0FAC0D400e05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2B36CD6B64AA 44B2E67B268DA557E2AD3269532654E59333553466333A94AA6532694C9E4999C64A873A512CA433168CA265999CD4324CAA 592A41312D3478132644E002C2A9B29B4B154D2962C225EAE712A592EE53490DB49942B54D07672024CC3832A643A662AA24 4E962CA25129974980EC661D2602CE54A9A12C9133A18CA642B26000604A995149A569A534A62D1553C0952290D29A532A5C C5513110AA954B9552A00001A4AAA95F155AA6624A1932000020120BD32848A29E49168CAAA4F3A93C990C9454CA674969FE E552968AA554AA94D299239984C000024142DE23118C86A6D168FEE752958AA954AB9CB24A750012A593C8D9EECA2D024E8A00105040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A9752AAB3299 96CB15FA5932DD7F16804000426552DA0D9E54CA62AAD4B6994C8D956BF4B365D4AF52A41540F28AA5ACA658B654CB16C898 40A4239E9D49135155B6B21627152E76EB748A922CA5D7AD36AA6C4E270031134CE2A955D2C56E27992DD6E954E8ED64AC48 EBB3903CBE52740791A5F2513092E06F96C3AA428099F49F2E0A4BCB51602D2E65531557A973E148AA954C98172565519812 614CA9520614CB258A950494D22504B8253099389A4CCDD3AB2DF4C27D309F4C27D309F4C21D32C74CB5D191963A7D2F4D6E B3D0AD76625B1ED74F67DBE934AE7EAF97C563D175F67229154D29B5C898B0552C998A4554C8252C653329562A52DAECB6DA00905040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9513A752C874 BA592AB24A23D1F9DDAEFD799FCAA612AB719ED567955FAF438155AA122B9CCBA362FB5498B42095C8AD621B3C7AF57B9D0A 845223F5BAD73A85D8C8D2AB55E05002914AED40AA54B6153A11482767A894BA652D8547E516A914AAF433BE18E571AB05AA 9626969CAAE55BFDF6572AB95D49A5F09D309534A48CC9A33298AA392C864EE567B26D324653218AA0200000B805449A5489 B34994CCA84C9994C2A4D264CA9A4C985346749198CC6632A14C8592CA083299532650C984A324C828331C82A89551992AEA 35AA8AE552AA55329A138010079752A54E6E3F2A952A674B9DCEA62B155326C5B3259C034B29D2A477F16D3C5A34898F29E200505040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (60E48D139C9B 0D83909D1A8D139C9B0D83909D1A2746B60E4726C2344E2746B60E4726C2344EBB5DAED76442211088EE773B9DC110884422 BB5DAED76442211088EE773B9DC110884422BB5DAED76442211088EE773B9DC110884422BB5DAED76442211088EE773B9DC1 108844220C2FBD546001F8000000402A83400400014000502003440000DC781D089DD1ADC1B9480ADB7B1BDF0470BBF4EEFD 28B55E85B6B91C365246B5054957D254907544B80BA226C9FDF8DF2AB14AAF12F865EA5D2AB7D0AF53B9B8CA792D094DC553 1265CA912BB902A516F9F1B8D513B7DEAF47810CFAD74BBB5CEBC4FBCC2A41239D9DAD25ABE5EE5C79970E6F329B488A0D2B00d05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000E00D9C844F348BCD447351BCD42C050B08A22179089E0A17980926C21289C4E2713 89C60416A17CFAD52F85DA042248DCB4D83909D1A8D139C9B0D83909D1A8D139C9B0726C2344E2746B60E4726C2344E2746B00305040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0B2003211E14 48005280002089460A4105088304D0A0541108844ACA430144820000001201061A4098D02000070D100201EC3028001405A7 7208C0812010902000904422111A8000000000010000800B4D000480000000006FCB6B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (5826820AC072 40D030801A2506A2022111AE38062184A503800020000422490442E0900E890890000CA03B8008124CA200C0704B10080248 90C22844688CC6246E96062C621B4008922011088140305C00000004010344884D86C32204D8244182001872210CDA2542A9 45245324104824412110888C719817E2D301941C140AA6428CD668440A62749B8161622844A2000000000406100406000000 8924422111A4C41C23518313084C9CC862105C8846A210264E3A040820748890284D261314845000458A1406240060000100 08181180808345F381E40A0100D543111170E8D516894E030400809070738B85EA01508014D4098008A825421C402202A34300705040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2018002A0100 00100500180000011012488C32191426080000800810000052400119082400724880442200DC0F0050C55C4C099440800003 80680E26A309A4D18B31600F67181FA300984C26130984DA204068CC18F31830C60C318031868C0300064310E84D04D14098 0EA80220D030001C30448180E820AC07240D0308049980E8200C074105603821A260002E0C01D12035040B6B105A4201C024 AC13130603A8408034042007235A0600E830468049980E8484135502603A04024D11000070092B04C4C180EA10200D013812 0601A98504D120821A22000048BA242C01D24603A880301D4211068180006086823A880125603A09A2412411106014010C4600f05040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (688100020021 0C188024110884466271A04C220108A7322044284D18055A0040181C8811002340A0600000209027310884C620101A540835 C9A740695020C7268D0E2CC0A3E4AA052283C284138904A8401AB04A84009830E2102380C2AC40992488102E910C80D2A040 6C9130B2088D222204C24D08800A0450A814A29442810824120110881728901244822311824748034A21018904600529BC02 04528874A0510E950A2C10A13182046894400164922090120005040240A3308A512B81500200A82490A44A08028050080000 D048040224D078001A0001804000C00104083020B00060008020000000041920102955880C0404422CD1A13426D321854B8300085040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2954E4C20499 810A4048A842814C00494082C980106500A240054048345009440911C1920361000019908040804200C0940E188101178844 44343C00000487214414490B1A4B01A632444826070A928892C1091845019804499549443869731148C322B245128C2A9901 21A2F25058264C97116885409488C427A0C22700BB1C681D020000852261318E312681C820024341984C000C846442200C66 420280000804A0604011088446847671806E341A045A801321144033338D89A1C03800820F2F004000000039AC2344B30101 1088C484356C265BAC418800200D27000000005104C68100054823548144300470048221900940208012908884322140624400885040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A902011208CC 243018B4C300D00040080013164AA5534908AA5505090A2040190802582B118920201120024946210A2630A00042510A0842 458211103C35518E0244101184920908974881001000884E528348044223885200010893E7448901C2200A0C024290AA552C 11220840058521600A6572144485A2A9540000000000878488D0004010310200D2232084021002C680210048B60E213C44EE 10004862366B0010244490440001201402A440A9102A442A8100005003200A002A1190844488548080242540009081504240 01010AA384009028841A00028010B025C2000020468000210870800C168000A50905487550091205D14195C859049902E7A200485040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2910AA452215 4A25422154AA5522954AA112895422552A9542A5502954A8452A9502A442A9548A5408950A2402A914824028804A80000140 221522144A25428014A2102A9142A510A114AA452A054A2510091002400080020552A9544346084380002954A0A85D828A22 4020644226411C198310406564444101930A00C990CCC820065641008845025E2A008326003A6930503927438013019D3471 333404A1C18A2110C82506922A653044480224088926506159204546200D41402020541442814120000000E4300404422C30 204C98806A110264C09920B24800800C08000908A0440696406CD080D4C8350B0000000000D00004403203056000A46C460000c85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9DC442211088 442211088EE773B9DCBB5DAED761108844225F0517C145F0517C14F5503D540F5503D540A07AA81EAA07AA81EA0A2F828BE0 A2F828BE0A2F828BE0A2F828BEA07AA81EAA07AA81EAF5503D540F5503D5405F0517C145F0517C14285502940AA000000000 0000020000000010000400020000028950A8002895488552885420002800480550015000502A804A80520100201002010825 12090420142A0100A05200040051009500050028040A1528100AA1108040000500050000022100AA5528954A8400A1542A10 2A954AA5122950AA552A954AA552A95488152A950A2512A95488512A944AA55229448A052A910AA5522114AA4522944AA55200285040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000E001BC1E6517914CA6A351008009151880020178BC940A30080DE67354001FE555500110AA552295428052A91022052 8014110884422BB5DAED76EE773B9DC442211088442211088EE773B9DCBB5DAED76110884422110884422BB5DAED76EE773B00a85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (211E224F8442 011D000A2F829BA1F079C89E44221047482141A9401954911041600000180A1289810F0078A1042A24A5054AA7C014BEFA40 9108844220000000800B4D001480000000006F6FD00000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000685040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A4B808181631 8601A6F0311148866100D4002591393063500150860448385E181998878CC51808D4A810290642A102209042023C91429520 985430553092E026027082140892944820B2A05028551A05A5A258A94458782202CF56E9E420D95BBD5FEFF47A5C04220416 8004265B7D62FF778CDDE330892852DD0980540FD7F9FC94C71EB7C38C10422020115484146C24B808105A41088C686231A1 42110D398121A04168D0A0469E5FC983381DEEA350A84AA2B222345CDA208E4884422290CAD22A110E0C300050B0F4223E40 85C2A8140640020001E941FB68261400804021F68B4DA243243102008038C41A440004082083A988200000950024528A24A800e85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (072800428502 BC101448871CC3F3911D0EF84423C76F3100C1949701220000800A3C88D478094C8442202114915108546A24408894A01002 8068A542A150A8541A0529A512214408450A114284528850020E2450086112A0503B13329180915200EC4441069143231A89 989810200EC24143291A895918D44CC4C28000CA220099463472804AA01E398105A41289DAA4462C8C602052802089500480 4CA31A881021143291AD6140EC4CCA4702550002D11104A276A9118B23180814A0080244CDA27328503B13280000A48BD022 8F7926072CA462246463150A90076220C9FA2847A6546EC4C0A0762650008D047122A110B249A89989810200EC24411A89C800185040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (11C07E4014A0 1FEC82FBFCBC63432E064EE12261045F0B1C1B41808904A83E3006DDCE00F2B946FE5D1C1C6CE51BF9747C71B3986275F00D C6827FA807C2B6597DFEDE46865C4CA5C24D1E997C2A17E6E5C18C523C7831D9EA37F2E9187B6789DDC38771119EE31D9106 8FF3E875E6361FB75E6FF66B75B8BC7EBD068631488010581D24C2CFC419A10CA804008C43179A0CF2B701B787E195108810 BE05A984ADC1C8CDE659289B1108E480857EFD5E0F4428A77A8DC41E3F8147EFF399CDEA1D1F96814A010114464524118282 10C81C3285708448810549090EF91B85C063547BEC2E821017C14204528850085023C6880103453C1022910408A70075CCD700985040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9FC6AB32200D A2C06798DFED950A4184F103834E804760C8FCEA4CB61FAD32B8E4B21F7B260C20A0C1A020814114012C205A7CE0F27E309E 270340FC9CCC622443A635B8204CAB22321B0330227DAAD3062FDEA987E8BC2E627FB2D8470780ED0C5D19358C2230322C52 2000000E602540A114A2000453E0850284508A510A1E05111000001042001009701080005D4104422201EBD9120A2FA2900F 1001548A8D44A986052668A596886C8154461101258CA00887C82504A1C058D809988445F05220D8871B1D4241A0312482A3 6004CA281603DD98374D081944C1E3DCAE5C2B020E043003D0686547AA00478648ED161811145488801320802A513092E02100585040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (44B48C66005E 0FF60101FA7F50841BC98203318C322A13002FC6428C50F0218FD86C03505116FB5F23CD0F262B34688F0C20D488002B3D0E 63053809EFA02045DA7407B7DF8DC6E10084FC1E834CCEB0BBA81E0E7F37DEA0D1F8FC785B2583DB0F2073CC90C9079EC9EF 03EB7D8E7139845D8C31E90822914488070432D008104904281004844221E8911C04D1A1042021108D1E82448CD1A1FDAA77 6ABDDFEFD3FB7DFEFD7F974AA5F6A985FEFF331E0EC050FBFDFE273B07954A37D9DD1EEA743F9BA43150317C3E21044CA863 408410450809484114A8200421191C0A8A12634484CD013307CD340370B87359B3C68C02A844387C78101025C13B008E140100d85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C8E49688C866 2120008582247094E22C6023D060F62850A28523231403860005708E07008080C06801406213934AA576A96114C53A1D5108 2548EDE0714A35C4ED05A128E0AB3D2B81418001E4720C06131E0317D110B64708915BC477A2C10A4C08214AA8620A4C00F0 00130220078331983351200000A2F82810F11E8C1EACF061C024092A05940612D91420590296516436E884446200350E6050 20548A54422212CCD41BF4EA5E319FD881D6D00808372C840241108A4510897129500284D1A144591E968D0A354301C42209 845923F79A211428690DD880355128BE43149DCF8CF089312A2A10081ECFC0001D00CD01871E4A5042216203058612C400A200385040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (140A05028140 A0502814552ABFDFE00002A954552ABFDFE00002A954552ABFDFE00002A954552ABFDFE00002A954FF7F954AAAA5500000FF 7F954AAAA5500000FF7F954AAAA5500000FF7F954AAAA550000018002800400351552AAA150000000001542AAA1500000000 0064486800AB404B405B016E8C558295E8A7D2A8E4AB0128154725D32938336C0306E03178099E04701B00030558A9166A10 A00964220040123456120062A1432DE02C7F0C19E0F19BC1604F480A0480A40020E80210098804110A1530B03730C5E025F8 21524B70108542150010068420034000E42A246808322BD564D5A3AD86B879A210450291750E0A52B9824C9279A028014A3100b85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000C001804000278BC5E2F179B CDE05029148A05151A88020001001E4F0542A8000000001A8FB3B124AE3421AC8881223AA1945F2F97CBE5F2F97CBE5F2F97 CBE5F2F97CBEF57ABD5EAF57ABD5EAF57ABD5EAF57ABD5EAA05028140A05028140A05028140A050281400A05028140A0502800785040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A28025BEA07A A205088141A9442A55AE9002A00000108A5729806A8050A1242A452AC540A7817D540A00281EAA07A8000000800B4D000C80 000000006F555800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f85040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400088429512 E950A22D238446044BA8542811288508B4108954A0142A1540A113209059112891C7E5205D542A741FCAA893F1514CDF219A 90082752A05028552A054AA4508944485022054AA552A84098572A954AA05154522204168060044AE92669552B8D23319995 2A951F20540AB551A8CA8155229F085142A900D645821847F2A8A448EA44888C28A252A14612152A8742A130A950A1452A95 4A8552E934A251289D4FE3599452AA390ACB00F2D2BD54A0550A010080C0F04C0F670143CE16F17CA81544815007C6005560 BC250080CF00B00044144D0088A481601506CF52BC4C64867864769450199D2E265A1C3E2121BFCAED43131002FF2AA9552F00045040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (525914A84402 844A2160A0F05514A20143A41A28C4A62E255B40F2D00D14A25138944A14308894A010A68048A542A150A8542A054AA51221 4408450A114284528850221C0A1108A4B2A0D02615269142A4A209D4A0400A914A65128952A841208C40F14269148A332894 4A95410814AA7A80134A2052801EA014AA800FA4028952A844999442A52281AC8350088108A51289700A1426914AA3409854 9A44AA8A00A7528100A254AA11266510A948A06B00C549A45268D02655108146A1EAB1448A532A0549A452294CA20B25104E A500815068452A94499541A04CAA210A5500E052A110A65128952A841208C40F402A914022A8A4529A510A914564283CAC9A00845040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2944AAA542A1 FE5528B9954641E9615E28500A954A2151A944AA553A544BA512A954E9512E954265510956AA4128154AA6D2A974BE458652 C96542891496522A154EA541092AAA5A2A954A2552A912EA5509954255539974A2153DD50AA1526954281526954AA4DA6172 AD552A850424A88854A834A89540A450A9042274039543A71289D8EE791A94C194D28432AA1526554A8350B954D5341A1060 A5118956AA56AA8148A5528954BA75228D4AA1328954EB151614AA050251449414254A4A22A2A8A8865089540D9158892CAA 113B8E42A452A854A2601554A204528950A8541A9548D14194AADA079681C885416154BA4410852A854169503214161542A100445040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8140A20D0284 C5554A8954AA4D2A154A2552A9742A532A084A51C2A9508920B59D480252AD40AA5628964A8540A934884A2CC54A255080CC AA5620D5022442AD4CA2242AD5698550A854A25522914A85A0A91CAA112984622450292A2241A80D489520A114A255358742 051288508A512A154ED4002844A211220105514A61105634A0D2C0E152A004FF2AA95049B1E2E9148A45028405F32B588A78 4E02946A27E2954AA0488D5F0A80296030680D189825552A20B646513A4222A6529452A230B650626502A9902A5428900883 52A954A945281C0AA552A9D4C7551805208400891428148E8D400112214422611FCAA290D3985422002A104D8553E9F4624300c45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (954A9502A57C A05522144AA421094CA8410A954A02C9BD04AA5522950AE4C2E5C88A34208A8AA542A94C4252A8134AA60A0D14AC05269528 85530004A8351255CAA152A9948A552E9540A150A8D4AA4D12850AE6529932AA252AC14A8552A9042A5117D50B215200BEBA 0008950A25508040A94120104A8412015020000E8101815281108A152A804B916288548A552A0548A552A0548A552A954AA5 538954AA552ADD45A152A9542A550A954A2552A914AA542A9548211125542A4017D562A54208507E7C829005F15881140A11 289508174A99CC9A1122554A6442A05002512A85AC2779D0D0A040A152CA8172D954292F28C8C3B6899076854528954AA41200245040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (7000062FD607 C408C1808F20309707301A008E624D0D8800100100E0A211B3186F7781E954C77E1F106214C0C19E00183C000C23A32580FF 4FBD49E013129592F703805506615275D46A2D265748E14A851C8C322A9CCEA5118820A8442204C22572A9362654BA820FC2 AA9590A6550A954AA1498842AE5C08944B65326054A6452A894AE55048221110A8944D9241A934AB4CAE544AA512A9D4AA71 0A9006A550858CD54AA6CDA3D340F5108A211551428552A144EA149A950A1542A93299411F9022A512815416412B90002550 29740A0DAA8548A2F821749A04048D4AA55209108A550E8B85515220BCC904860B46275261AA14441694AAA40A2154AA409400a45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (EFF7FBFDFE55 2A954AA552A954AAAA552A954AA552A954000000000000000000FF7FBFDFEFF7FBFDFE552A954AA552A954AAAA552A954AA5 52A9540000000000000000000864A65209C048000000000000000000000000000A880550AADC58C600001040005B097E247E B3DEE8F7DBFC26FD19979FC736A93C08112601022010380D08003017004107C0FD9A7F43235C4437000C18424D88008A10A3 F5FEF47E8419A0F08BC1200E240B0248B52A21FC6114878040301A30F6A806B281E211FA1190081D08814A01420110BC0108 C040016151708B502BD100050321C08864220E4C26133D600A3E03D64841082060A0780FC180B39A381C2001225402A5000800645040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000F001BC1E2F128948A65329148A2512894CA45028148A4502814 140A001000000000000F8383B1000E3461A28E0C26028416FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA8 00FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF2AAA800FF7FBFDF00e45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (108506014013 8004480289002F042B8808C0280C1004028154AA5502954AA552A8000000800B4D001C80000000006FDA5500000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000145040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800800006020 080120635840834281C88CC660CC6620640F0608201B0840C230154AA555402CAA552A92018364020DC6A30000DC0003C381 1803038CDA0254880986020000092A400154AACC618A1FC7C218605CA60480000CC660004022600F106662C859801430870A 2D561280AE554095080552A95586801C33118101800C0CCC60000CAC061A0002041C10042034A090080E0603000A903001E0 002E204AA552A815000C2215C827265A84A6000B8C588400A2046821389D048117980C3821581C4E064020D03C2128054305 370B08E0462C26082A32402184514284042150B01C844C6100400216001002552A95504843800000552A954081410220081000945040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A04E08006040 20000081080552A9C4204E0601000050A914684522010C01430904824120804A840228448A710A14428510A114A264290542 6200810426906801048042A05482550E21060010293480412005482C5610102834008149A4020900AA042AB3010050091588 4C28040A044061308041180080A012A114A80123844A8040291400C5618102E0909941A0080A010A05522154784C20104600 202804A8452A3C580040A010465008100AA440A81C02302090580040A0D00205009506A412A93040130A01098402088CA010 2015426546288C620202A348041200D484051A288E0002A9558420062580A881E155CA94083808055089902A81003542E80000545040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (548A0401A501 29948025302404B1130604C09012C24C080688904AF4008041268482410000008234220000241060606009098928213100AA 4104800C09812024C48210220128204B44489A481542A96328558C100384508400884822020001588402AB1510030003C000 85302444210938808041116802220500480884212110826809830034022010422A804020142A200000010018A3C04A807080 41130900322A98340103970AA0527954985529950AA4D28850A23112354AA5D0094528A9231111E0000801801C20954AA450 801082A10090010302385400442A9558E50039454C971C100AAA10090006500A94D4CEB2215036C52883022D10400CA0552A00d45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018C81820040 D000380805570800603018154820C40000100C01880180841800403304081808000140184C238C4400C44000102041800042 0150001088050C000080430000C26602100C040030AAC50F05C363001B0C600C2815420530683586300600C085520355BA1D 0A1DC0E552A928EE02101542AC40886002552A8546A0045910EC340400180A0010000823311D0180C0194008CF06140AA550 A82D862269A3080552A8D40860480619AC01814082CC06150AA150E01064C0201550070209101010111410A283524880851A 100AA00000000000081440A212A048B0D020154AA5544221800C00201042200000141A1120100202310C00202C22000522A900345040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A0957281802 B241548696328F406430C044A6344183458944B00082402A834381C29154021840854BA1108A1CC2002E39822DC0214D0044 06101A074298403845081C4A031429CC00C142900F098329642E65131541A20009D0AA1500B14005C00330A0421880C6A421 8B4020122801008050A1406202021040E11620601C12070481C12070481C12070601C1807200300E20000D000682A1100200 04134D26C04914A61A2D908420810420042215482100010022552881088550894048050603C0003100004000780C100001E0 C1600C06080002F7000046030783060B00000C46800400D840803B3180340820006010087418CC781000833002301803110000b45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (885603D4AA6D 3A955825D22331A6510E914EA512EB54AA5D2A05D8A712B854AAC72E97C7E712A11CEEF537BE58EF77BBC0480060100D2A61 483180640C988D40A0011862B351B98000C26131E6416180D98F00008000580386066542A9558248088001A000020C1E3111 000084012008022418214E04812371BA9D0000D82400804042120400006210A83108400200C08110000006C060800A0552A8 546630219542AF37020C1E2E60000060C6183018042A15462E14224C38540E02C2EEF161C058703111082102A9F42A0362B3 07084660C8661E1902CA855288CC04305838C100C2A814A019199C150CC1904C54B30009400582D8092C0C4204C1C840990800745040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (72391C8E4D86 C361B0271389C4E8D46A351AD86C361B072391C8E48D46A351A271389C4ED86C361B072391C8E48D46A351A271389C4E143F BD546021F8000000402A8540040001000040200544000B54A8541995C2A5C2A910AAF97B1FDF2C72ABF44EFE28B5DEADF708 1C52425A94054D42C354145456800AA2B6B9FDAC1F6F908EEF03B815E24F1ABFD88572EAD8D4D94A8952C5631294CAD13A04 4BA4C2F951B8D70B9F5A2D128B1DEE756A91C8A110A9143E4E46B448A530A134AE7468974A2452B95DAA8566954AED73E95C E27D3B935A2753ABDCFE5533B75A2436F3503AF74EBF5AADD489FCEE136B915B81D2E975BC5422968AAD925874EE5766974A00f45040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000C01FA8544A25128944A25128944A25028144A25128944A25128944A20000000000000018C76885D FA512A9F5A8512795C88C964B2592633198CC69C4E27138361B0D86CC964B2592633198CC69C4E27138361B0D86CC964B259 2633198CC69C4E27138361B0D86CC964B2592633198CC69C4E27138361B0D86C72391C8E4D86C361B0271389C4E8D46A351A000c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (030080C00018 00000000000000000000000000000000800B4D000280000000006F0CA9000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1000AC8608C0 E814081E406004005848031000000005512000000002000324020DC020020004000043810053038C0009C3DA85CE0027125C 64E0D00000C0001618070282D440794BB9840000000440D0001C1005D6B854001430870A2150628000004000408000000006 401CB00000018800000C000040AC40100000402400008042A05008000013108A801001C00000200000000001001C2200CA06 061845C4600B089984112164CA553A9D4A821712083201181C8E0C446094385528854229362B10E244288440083209018055 00040AA400A059804C4C004000540020260000000A4153B000000000000800051220008010100608101201422828080A0B60004c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C0820C061000 4120500870830082000084020100804004050844100104300408010200420840A000800864010240C603603600050000001C 00060206236002301A00028001CC06236000301B001180D00014003800331B0000AA01848C069400228062301A00188D8005 00020004004190000D800200C0C068360000C3180D80D800100020014000188C068006236001400080013C180D800040C603 0001400280005CA2301B00182D8000C06C0028000000E00070206301841180D0018C060002801C000600806836002301A000 28001C400019810100000022002815002980400140800A39008000A004080008A000445068008E006811092140000840800000cc5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4E04A1027944 E03822860017B9F1AA944B0803C4A051C42A962486428164A04460010A2214E284E01800212812080204F2898029040094E0 053B00887047804604D0E001A2403184480410C0542214092158A04003001003220380050411400C64223182050331088866 2910408194900432166211C0003188CCE6010013020114000188102A84D80386B89CC21203064A80722A18040D3300000000 7800180001800000C0000000301030000000015928A12211018014F87D800C02000001000001002460204883201800000000 0018004039450C801801000A06820406080014D0CC82215000094804022110091C00000020068000E02060C5000200000000002c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (603038000085 C0B9C0220D6B854B805239B4027710911861503804900E019C18A4C289D1A2050B9D468050E86CA841639D9A20528B1C2089 6E1D00AC62A07800C02698C263105B4C600C0880010030603186340610D080002301980C011DC2E0000100EE022400000C02 202020000000060050184062310681580A11A81000030A9D4184C29900000F2601000000015D8610610300800000C088042A 25598C03A040800C0E00400000E81062F10000180306084028042A0048834441F07E00108040004000000004000000000000 0004E0020000000000518C1C0020104541201014020120000210204C00002A1000E04000000044038014E700509C449E513100ac5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (6D20C044BE35 0B83C50C0001408E04000F098080100088112884C32110894CA0000430088CC2210020400F00120300391C1A11081C088700 81D808902894062750E01C2865131540254208C0000008300220C2033002081801C6008180042A0008100020000004605002 81084116292D504B741697A5A5E9697A5A5E939504E140D89CA842005600570278C24B2C98164B4580D9242C16AB11A00300 4448400000060042601040000210000000000490402E97C1247500016034700C100481E8E0C00C06080AC4F5181426430702 4406002048EC00220090C0407265227904855341003030388E7014092A62687010DA00100D083500D480E240B04080060044006c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A21502950225 50085480500A914A2550A954A2442A800A21400940025002900AA51021500060041608A0F14420D83BB25C20D0A03C60B731 A10004806235C64541A5D9AE00408046C029150C600000010034220083221030081C750000038500400006083805160180AB B1DC6E008D900C0180318840000446420061F4A60306169B204000000C847105018000000066340300000E35034C1C4A6200 42E1C49870BA0D00000E0D020A0C90000E0102EEC3C1C020703001082102A8C40042603304815450C8EE5D149280000001DC 22705A39C220C00040000C1B9D4E8CF3984DBAF322000020C05801865C2A95C9A1021810200017080824B06001A2710E0C0000ec5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A003FCAA557F 80154557F80154557F80154557F80154FF2AAA800FF2AAA800FF2AAA800FF2AAA800285502940AA000000000000000000000 005000140000000002A000AA002A904A8052085428012001480550010000102A804A005201502244020540215001140A500A 0042805000100050229500250088142A5528004AA142A8542840081040211281408A540A0548A5520044A215089048211229 10A851228542255221548A5528854A2542211488410A8040A55209508A542A9548A542A944A85522144A2510A1140A552894 48A552A050A254209148A51288542241229502A550A95428442A9442A440A144880502950AA41289502A4408910080500140001c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D001A8D 40A05028140A05028140A05028140A05028140A05028140A00100000000000140AA010294000012A050A2052A9005F50029E A5F50029EA5F50029EA5F50029EAF505280BEF505280BEF505280BEF505280BE0A7A97D400A7A97D400A7A97D400A7A97D40 A02FBD414A02FBD414A02FBD414A02FBD4140055155FE0055155FE0055155FE0055155FEAA003FCAAAA003FCAAAA003FCAAA009c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A954AA55000 0000800B4D001280000000006FC0690000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000C0B452A95 4AA0024154AA5528944380002D9008050200002403284053078C040B66CA85F6037B329DEFE452A954C00014984737D23D64 FF57BB85E221102900FF140C8407F6F85C003C7F8DDE63F0102150AA152A140AA552A8468259389448059021442C0129C5EC 21020810E2603A51E9C3F071782010170460204001D02A5102950AA550A812DE2ABFDA6FF7FB5DE4BF3EBC9EE1C388707804 7BBF01E275FBF86C3779BF1FE3F7F9F99E441C001FAF37BBCDF81166910AAF36A9319EF36290008555F279E6CF3780C00336 18DD1AAA552A9A6DF6580000AA552A8542A040884420452A864280000006824D22834FC0032954C834A191022542A954AA4500dc5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800020402010 08040A0000A10200403001020040841080100051AA9060800021962B613C914205522918AA4708170BC110B15E085122918E A703C914B05E08858AF04288543255339E42245889D02C17AC85082470B15E20582F0442855089500A1188854F21108100EA 743C9100C658AD84F245281502A412A91C2C5788160BC110A15422543E994F205009962B412885482553FC72B05E22184F24 52E17822152A9148C553F87CCB4580058AF0432C5682512A990A87522160BC410B15E0851229182A45321148A552A8000F48 1F48620012A8142A1930140AA3E2895800500A950B0373E9FE8079309167F508A10428052A154E0782C0F80A022E18042320003c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (408241280782 8780FC1882440200002420C160411F0A11E821E28154837933DC0A01E02984C3180A01E0A07B05C0F007AA074FF5F83DF6F2 078CD98CF198FC66BE1D03D98A0553281023670B80408410A084200230810001130804220108C0008400001082642B802817 9BFD7EA755229148345341FE305F2A9D4BA57A89D6DA37318F83F669FC7AC707A89540207800180001800000C0000000B000 30150A2453C178FB6733198752DAF5D00E512A954020000000007002C00B04180000A8552A9D0AA07BCDDCE81D2815488700 2C16A8553CDDCEC663F110031C201763B1400D44AA5502064841F229542C0000150AA550E910AE573084480400016423002800bc5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (CAC758AD46BF 78341D6F357AA1D08A55BE9F83E27ABDFE9163ABD7EBC7F8A850EF5FBE97CAC7E3A80C6B773D982C26722954CA1632C46320 1B0C600C5D2A940AB0F03986300620C1CAA51389982C540CD06AA550886600502A854E8170B914AA553A8743321A6562BF41 2B194530B09C00A31D2E5B8CE31B04002F3F2A554AA552FDBEB062A3144AA550C8C6C22603598ED3E005802C2F2A954AA1E0 30E6F7052A854B261BF0A81718AA19C0C003D12A6A11AA154A01522000A215299348A1400140CA502A954AA143F1962C0020 104D01F80014020120000212617C00006C2F814A7552A9140E118A81EF21023D403C05331E0E0500F014C3780C060287FAF1007c5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A0553F9FC325 52A9DC1C618CC7E3319A0CC63F07A3570C802BE180447F9CDA6F03F8DD3E1E181C0B4F9621FC10F061BE9E6FC7FBFC78EF17 3FDC6F305AE954AA4532976AE5133950A21D08C74A21D0A07EA25DBA1062A542A0643007A8854336617DAA5F6A9FDFE7D3F9 FDFE7D7F975AA5D6AACCFEBF130F85C84643FDFA2B3180974B27DAD914AE762F95A820530D5C0C452A954A84428444AA550A 914AA552A1102A7E1FD2A21192840442753E99CC35FAD8C48C5F3CDE85F2A8843E33660010462563F81848638C0028002004 18F033BCCBE12102B83CFE61A207C0076BF978DA09B00FECF2BBF4A0CA57A8144AA7128080385D2A954FE652BCD8AA5FAC9F00fc5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (26B8DDF4080D 3F800F01E10180A4252A49462532C15800601007A1D7D9353E7A5B10C8C0B12214727B4DA0480005E23D86030197D88C01D2 81C6EB6500006AA552A804BD770C180C3062C01C00080105C081C0440A1818949608C18BB1DCEE018DC045128890AC600288 82AA2571FD3281773FCFE260000018045029954AA552A866B0502A854CB0326DD8E17F200468E058B0588E542A9F4FB778AC 44A81E2207ECC113C060F860A319E3B7FACD54A8753B1DCAF000D066B30004154AA570DC60301831D384C5532950AA7F805F CCF7BA4DFEF33082804A251830543E72A7C1E2F5DA8914320728C86E3542A992FF7F9CC96B8190CC1E737DA3C00E854389D400025040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000030551A942AA2B1552AAA150000000001542AAA1500000000009408850817 CB27C32A05C0A0532A9524A002A5F4AB310294C9A5B22940225A02050820D20512285C0D0042A49AA97E2A13120128202091 D6F834A151ECE063D9FED86088D980261000C0A264084FC886C20044221B08D249301A391A084C811C8114811C088804B49D 2525C12C8A704085CC240272C86E054200D18B805030C0862021844E7760994CB22700864050633076AA1C0C9609B618D800 0207224001109B01D600058B04422060E1D4CC06298583621080684A061AD16CA01010008207939FA537F88430E24A0FC08600825040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000030018080000000000000000000000000000 00000000000000000000000000000000000C0181100C64222CA00000224A880EC9318D938364E324C69C1B18D926364A706C C9318D938364E324C69C1B18D926364A706CC9318D938364E324C69C1B18D926364A706CC9318D938364E324C69C1B18D926 364A706C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000425040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000006F3C 3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (900300002D90 08250200002003084053058C0002851009D6025428514A80000000C0001498471550A824A6152210A000001400A5152C8406 A4D058002845089442A150280000042A0000000000464018B09040059801842C000284ACC1120060824020854284A2904802 00171320000001D0000100000000008024AC5500D4080618B982807580580717B984F2595D2E5501E200045C0E182CD60C80 23283899348544423653116477513B5EE035F20180A60798154BF34AA4008C70008000660030060000001442A4C000000000 00050800408844064420960020020004025020840A80032954C8552291002000000000000000000000000000800B4D000A8000225040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (403841021040 841080108201000968A050A1160A7028804280020010004608974A8000B854800120010C06C28804B8540005C2A400080022 00331440005081802C052800002260B05480592A0002A0008000001180000A20008900C06A288000A45829C0A2012A000000 1000982C1520164A8000A80020003C18AA2010A1160A500080002002AD54B81410182A2012D15000148010008002B0548B01 0A0582A4022C14A00100110006022170A8000B854800120010004022000000000044A9282A89410008000002103000400550 A490825500000A0552A954807120914AA4100114205028054C0693F0E825132BC84633A0A00C06040000000002800000000800a25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (02A52088E049 152A154AA540080002542A944A0552A904AA140A9540A5528550A01500840AA150A944A005089108A110A844AA1502990000 0300541B5483500A24526894AA5232840A85528910AA51209102A5420854AA722644442512A9542A00221000250289542A55 2A980BA5528954A245229502A452A8548A05000000047AA918AA51AA1548E510A144B2043A800000428150AA4522178AA550 A9802C0080000204108010884C0091033258A9002000001800805A8954801C00000484C00906080028D54E8442A110021420 1542A1402C0000000A072A657005348A000004000000C08C0E072800060400816423112880082040201008040A0000A1022000625040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (2A11AC1502E4 52A954A245AA954A8550A850AA552E954A8543A814AA772A904C24502800E04F29C343141B8C600C15000000316031C63806 20C140000321DC0E002EC16000026576025000100C00402000000010060195FB88747A47A999451128640053579D8BE4E69A 84002F570280000001ADAE60729300200000E0B481340A5FCE57A285002C5700800001602164EA040015432412A1502A5500 11028552A854801108000A81522110690302140004008000C20000000004A2A98C8E552A954A8552B954B20522814A92215C 0000522A80C0A0000000084D80954A0052A944AA5522940AA502A954A2502A8502A552F954A95528154AA552A854AA250A8500e25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (21121D442A0D 2695088052A100885528944B0550A9542A102C154AA44AA810A0412A964A8552A850AA152A944A0010C0000000381440C503 B0002A5800C602A1800054021028014200000070A2050A004226428854AA552A054AA552A054AA552A954AA5528954AA150A 8D489642A9542A5100954A2558A914AA742A9140201209340800000400844008500004000000000001140056AB8544211288 2496752E914925D2B9448C57289402E5781C5663468152CA256288B280650848C0406958A2B15528954220023058AE6B220D 455552B950AA11201548A552A940CA55280040074168C0BA5D00050AC452A950AA55A895CA8558A944BB52285D4A2550015000125040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (47BC89E0A491 21680060300D66A5526D50AA55349B40A1422876B753969089416139D6AA55AADD4EA55A8944C650AAC5600000015029442A 15482541881AAA108213CA4120881424592A0E02815371BA9D512A910A25102150810508854A0061A94402472A9540800281 9404302A814000000166B80000000CB1316CD8926D228366E158A0508A0000160E64D20D04021621056CC512C840B8510211 422550C900A860378B25A452D9766A150680000022DC3C301C31CAC8C0010010085D959548A5D2AD54A24118004000182804 AC4D1AD5C9A3380440284718884931400102AA552C916A811089567A538380080412895400002B150220100190284108854200925040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000003864A25209C040000000000000000000000000000A080550A9BC187C0083C703C7121074E07AAFDE6CF143F5 BEFD51895EE3F6E13C80100A01000C149B00802406030060B6A3FDA23F0081000A10004918347A90186B01EB51FE506180DF 80160000007102020024E4C210421C133094280102081407410007E027E020508E40000600160010660850330400A0100860 00368AC40880208040EF0123C4623100BD1AC321280468C1188010520520910A810229003111228100000320708424088586 C4002C4438010D860086088DF8570E2A0880A00900022313B357873778A53812460ED1E13100FDF2026C3B800E21832902F400525040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000180800000000000000000000000000000000000000000000000000000000 0000000C09E1188C642024380408062BA88A78438B5A4D216A1CF0873C3485A2D691E10E873C3485A2D691E10E78438B5A4D 216A1CF02D691E10E873C3485AD216A1CF078438B5A4D216A1CF078438B5A42D691E10E873C3485A00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000325040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D001A80000000006F1DFF0000000000000000b25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000725040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f25040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aa5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800B4D000680000000006FC289000000000000000000000000000000000000000000006a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000800B4D001680000000006FFE6C000000000000000000000000000000000000000000000000000000000000000000000000fa5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000865040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000465040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000265040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000665040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000800B4D000E80000000006FD8 300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000165040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000965040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000565040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000365040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000765040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f65040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000800B4D001E80000000006FED4200000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000800B4D000180000000006FCB1E000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000be5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000815040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000415040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D00 1180000000006F01540000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000215040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000615040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000115040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000915040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000515040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D000980000000006F27080000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000315040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000715040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f15040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000895040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000495040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000295040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000800B4D001980000000006F127A00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000695040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000195040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000995040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000595040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000395040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D000580000000006F3426000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000795040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f95040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000855040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000455040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000255040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000655040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000800B4D00158000000000 6F08C30000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000155040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000955040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000555040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000355040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000755040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f55040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000800B4D000D80000000006F2E9F0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000800B4D001D80000000006F1BED00000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dd5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bd5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007d5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd5040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000835040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 1624 TDI (FFFFFFFF0000007A3DB1000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000435040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK; SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-03 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (79); SDR 24 TDI (000000); RUNTEST IDLE 2 TCK 1.00E-01 SEC; //END ================================================ FILE: demo/uart_tx_9600_flash.svf ================================================ //ULX2S / ULX3S JTAG programmer v 3.0.92 (built Sep 19 2020 14:37:22) //START STATE IDLE; STATE RESET; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK; SIR 8 TDI (0e); SDR 8 TDI (01); RUNTEST IDLE 32 TCK 1.00E-01 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); STATE RESET; STATE IDLE; SIR 8 TDI(FF); RUNTEST IDLE 32 TCK; SIR 8 TDI(3A); SDR 16 TDI(68FE); RUNTEST IDLE 32 TCK; SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000001B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000801B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000401B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000c01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000201B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000a01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000601B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000e01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000101B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(20); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF2B8D000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000051B889410000006200000002000000 44C208888200000047000000DCFFFFFFFFCDBDFFFFFF008C1CCC82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF00000040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000800040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000400040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000200040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000a00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000e00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000100040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000900040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000500040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000d00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000300040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000700040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000880040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000480040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000280040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000a80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000680040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000e80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFD3590000000000000000000000000000000000000010000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000180040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000980040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000580040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000d80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000380040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000b80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF21790000000000000000000000000000000000000800000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000780040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF21790000000000000000000000 0000000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000080040 0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF20E4000000000000000000000000200000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000040040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF88920000000000000000000000000008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFF8FD0000000000000000000018 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF80CF00000000000000000000100000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF28460000000000000000840040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF4CD3000000000000400000000000000800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF82BA000000000000200000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000440040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFF0A00000000000000000000008000010000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF50DE0000000000000000000010 0000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000c40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF527600000000000000000002100000180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF98D700000000000000000000100000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF788F000000000100040000015800041800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF38A900000000000000000000240040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF2DBC000000000000000000041800001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF38B80000000000000400000018000018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF7F3D0000000001000000000138 000218000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004018000000 0008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF3D2100000000000040000000180020180000000008000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFF8FD00000000000000000000180000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFF8FD00000000000000000000180000180000000000000000000000000000000000000000000000640040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF98F5000000000000008000001800001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF217C000000000000000200001800001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF74A30000000000004000000018000818000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF59E1000000000000000000001800e40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FFC88E0000000000000000010000000018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF408100000000000001000100000008180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF3B8F00000000000000040100000000 180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000140040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFC88E000000000000000001000000001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFC3B6000000000000000021020000001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFC88E000000000000000001000000001800000000000000000000000000000000000000000000000000940040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFC88E0000000000000000010000000018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFC88E0000000000000000010000000018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF588300000000000000000000000000180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFFF1A0000000000060000200000000000540040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF208900000000000000000180000000180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF1DCF000000000000000001040000001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFC88E000000000000000001000000001800 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF55D00000000000000000010400000818000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFC36C0000000000020102000000002018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF7BD40000000000000000538800001218000000000000000000000000000000000000000000000000000000340040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF161900000000000200016308000020000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF14B300000000000000400890400000180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF269B000000000000008001400000020000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000b40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FFE574000000000000000001280000251000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF1A2D0000000000000020010200000018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF7EB80000000000000004A08820004008000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000740040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFB63A00000000040000040001000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF68E400000000000000000000000008600000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF765100000000020000000084C00000080000000000000000000000000000000000000000000000000000000000f40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF A9170000000000002000001440000AA000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFC035000000000000000000008000020000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF2E620000000000004000000000000AA0000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF10CB0000000002000000001440001100000000000c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF8C5A0000000000018000000400000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFCC6200000000020000020010000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF474100000000000080000003200000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 090F000000000000800000144000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF59CD000000000018000000004000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFABA6000000000000C004004000004000000000000000000000000000000000000000000000000000000000000000004c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFCC1A 0000000000018000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF4D0F0000000000018000000440000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF591B00000000000180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF5D2F000000000001A002002420002000000000000000cc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FFF89B00000000000180002200000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 997C000000000001800008000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF591B000000000001800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF35C2 0000000000018000800000000AA0000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF9F7A0000000000018000800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF2F8D0000000000018002D40000000AA0000000000000000000000000000000000000000000000000000000000000000000ac0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF99290000 0000000180000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF3A30000000000018000000000000AA00000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 3964000000000001800000000000200000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF5627000000000001800254000000154000000000000000006c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF919A000000000001000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B 0000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF9CF10000000000010001300000004000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9F210000 0000015580180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8B1100000000000180180180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 53030000000000AB800000000000000000000000000000000000000000000000000000000000000000000000000000000000001c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8B1100000000 0001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF81090000000000AB801801800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8B11 0000000000018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF81090000000000AB8018018000000000000000000000000000009c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF8B110000000000018018018000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB8EE0000 00000001801C0180000040000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8B1100000000000180180180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF005c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5E1400000000 0000041A01840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF526F000000000000001801800000400000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8B11 000000000001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000dc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000010400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF23D30000000000000408011000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF87100000 0000000180080180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF6D9100000000000180080188000000000000000000000000000000003c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF26660000000000A29080C680000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC80900000000 0011880020000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF69F1000000000001824010000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF05D700bc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA12B000000000155 9159558000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5A440000000000A28428888000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80DE0000 0000000004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000080040 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF432100000000 00A28A88AA800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF1C8800000000001001100000000000000000000000000000000000000000fc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF87BE000000000200800800000800800800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEAE3000000000200 0000002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF8EA40000000000004000002000002000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF389E000000020040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF47C70000000000008008 0000080080080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF4DC0000000000001C01800001801C0180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9D5700000000 000020100000000100100000000000000000000000000000000000000000000000000000000000000000000000000000000000820040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF9D5A000000000001C00000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE1C6000000000000 8000000008008008000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFED74000000000000000000600001001000000000000000000000000000000000420040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF05DD0000000000018018000810018618000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE4D70000000000000018 0040100180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFCF1400000000000000110010100180180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B0000000000c20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF4FE200000000010840188010 1801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF969E000000000000001880001801801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF293A000000000001 801800211041901800000000000000000000000000000000000000000000000000000000000000000000000000000000000000220040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (901800011801 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFE93D000000000101801800001801A018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF939D000000000001A019 0040180180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF926F000000000011801800511841B018000000000000000000000000000000000000a20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF785F000000000001901C8001180180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFD60000000000000180180030 1801A01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF0330000000000001A019640C7A01801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4D3F00000000000100620040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFAA97000000000001E00AC0099801 9818000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF0C66000000000001801804041C01A018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF7DFE0000000000018018 28201841A018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018010018008 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFF747000000000001A01801C0180180080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF783C00000000000180191190 1001A00800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF34E4000000000001801801A0182180080000000000000000000000000000000000000000120040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFF693000000000001981001801801A01800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF2104000000000201A01001C01001 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF97740000000000018010018018018018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF814E000000000001801800920040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF3120000000000001801801801001A018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF3D7400000000000180080180180180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF9D5F000000000001801001A0 100180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000520040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (11418D180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF0779000000000001801000801801801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF48DF000000000000001801801001 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF3CA3000000000000001801C00801801800000000000000000000000000000000000000000000d20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFD37A0000000000018004200400201200000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFF01800000000000000180402C0010010 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF26E4000000000200341A20B2420120100000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF42B4000000000401C09002A100320040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF2FC00000000002002A800038120020000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFDB0B000000000000940840000080808800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF3CB5000000000001800102002050 090000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF5CE60000000002004C40012212002000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF10960000000000018218239418018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8B42000000000400D00900C04C50C888000000000000000000000000000000000000000000000000720040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF48100000000003442A840031415415400000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF494600000000040041020040000040000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF39810000000000A20080000880AA0AA000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4ECD000000000208A00800A0480000f20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF02900000000000B21000000AA0AA0AA000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFDA390000000000080020000200000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF8BA20000000000A20220000AA0AA0AA0 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFEB5200000000010180180180180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF28F100000000020024400120000020000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF96B5000000000010888800800800000000000000000000000000000000000000000000000000000000008a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF9AD1000000000081A01A00200200200000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF410D000000000000800810000804000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFE6F20000000000601800000180000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFB59F000000000000C00C00C00C004000004a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF17890000000000000018008410000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFF8FE00000000000100190000100400000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFD11400000000000180190004002004000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF1721000000000001045803881C40010000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFBE5D0000000000118118A8835812042000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF11A10000000000008018108018400400000000000000000000000000000000000000000000000000000000002a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF16C1000000000144841911A959543320000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA1A30000000000A38898C18AB88A0920000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFA48600000000001088B84384180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFD3290000000000B2085805A018C02800000000aa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF967600000000000184380190580004400000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF22250000000000AA801889801CAA088000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FFAFE9000000000001841811801800040000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF612D0000000000108011138058000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF249F0000000000018018018318000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFF54D0000000000008890258298000000000000000000000000000000000000000000000000000000000000000000ea0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFCE 520000000000B30AB8C80AB80000180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF37900000000014C15591011380000180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF83FC000000000001001800001800001800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF3ACE0000000000A38AB821881800000000000000001a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF5B88000000000001001800001A00201800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF15520000000000AB0AB88C0AB8000018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF24940000000000000018420418000018000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA6 56000000000001001800041C0040180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF2DBC00000000000B10180001180000180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF8257000000000001001824001800001800000000000000000000000000000000000000000000000000000000000000005a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF898200 0000000001000000000000001800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF5D44000000000001000010001822001800100000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFF31E0000000000151000000318000018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF83FC000000000001001800001800001800000000000000da0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF0BCC0000000000010019000800000010000800000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B CA00000000000100180000000000500000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFB37700000000000100009008004406380000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA10200 00000000AA8A28000CE800090800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF2BC7000000000001011800040000050000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF133A000000000001801800000000002000000000000000000000000000000000000000000000000000000000000000000000ba0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFEA460000000000559558001158001558000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96 890000000000AA8B28000888000A280000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF4A0700000000010000000002000000000000000000000000007a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF801D00000000010001000000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF1CA600000000002A8A28000A88000AA800000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0DC8000000 000000800800A008008000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF2A9A0000000000000000002000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB0 F70000000002000000000004000000000000000000000000000000000000000000000000000000000000000000000000000000060040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE0CC000000000200800C00C00800A0000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC16A00 0000000001801801001801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF61E800000000000100000100000020000000000000000000000000860040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFEA9B000000000000001800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC916000000 000000001A012000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF1743000000000000000800800A008000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000460040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF35E10000000000 08800001181A0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF68E900000000000094580180100100000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB90200 000000001000180400100100000000000000000000000000000000000000000000000000000000000000000000000000000000c60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000180 1901001A01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFFE6B000000000001800001101801800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB3B4000000 0000018C0003001A018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF6EA8000000000000802101001801800000000000000000000000000000260040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF65430000000000119058011014018000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF913A0000000000 0180180111180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF03C300000000000180180100980180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB5A00000a60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFE72C00000000000180 B803305801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF0074000000000201801805005801800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0C09000000 000201891A01401801800000000000000000000000000000000000000000000000000000000000000000000000000000000000660040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010240001801 8018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFC16A0000000000018018010018018000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF46710000000000 31809C01401C0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF8560000000010001801801001A018000000000000000000000000000000000e60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF8EF400000000000000100180180180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF28F500000000000000 1801801801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF440C000000000400009001A01801801800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD48300000000160040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF90FE000000000000001801 801A018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF8EF40000000000000010018018018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF28F50000000000 000018018018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000960040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000010012 0180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFEEDE00000000000000100180100180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFF0D400000000000000 1801801201801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8EF400000000000000100180180180180000000000000000000000000000000000560040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF48480000000000001008AD901D418C1800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF82F5000000000000000001 8018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF44DE0000000000000008018010018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB2D3000000000000d60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF511100000000000000190C0000 4008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF137800000000006400100124288190180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFAED200000000002020 1A01023A03A0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000360040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C10C40C20CA 0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFEE3F000000000000200402200220021000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF1C090000000000000008B0 9808018008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF9FB1000000000400081800020102040000000000000000000000000000000000000000b60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FFDA61000000000100210A20A40A00A008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF1D930000000002342002883012 2900100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFF28200000000002200190388108180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFD4FD0000000000004000760040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF3BDA00000000040C3541202C031220 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF7797000000000200410040000400000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF83D30000000000000A2002 00A082000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00800800800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF32050000000004A80A22160AA0AA0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF830E0000000000C000020A0120 2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFC2790000000000CA0A22804AA0AA00000000000000000000000000000000000000000000000e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFB8D9000000000400800C00C00C00C0080000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF193700000000000184180100180180 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF99B2000000000005208089000200000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFC421000000000200800820008e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF813A000000000210021A01200200200000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF6DA50000000000000408008208008008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF7A580000000000100000001C00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (059418000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF900800000000000080990982304082100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF156C00000000000004B84410100080 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF67980000000000000058A208002208000000000000000000000000000000000000000000000000ce0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFF0D00000000000018A201908B8AB8AB800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF7237000000000001810025001801C01800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFBBF30000000000008001010418018018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFAD6B0000000000008000110458002e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF83820000000000019459551499559558000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF5DD70000000000018A388508D8AB8AB80000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFB97A00000000000180980100180180 180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFF15A000000000001801801089801801800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF74DC0000000000018AB8AB0058ABCAB800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF0B2E0000000000018118410212008018000000000000000000000000000000000000000000000000006e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF6A180000000001238A38030018010818000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF8AAA0000000000018118510559138558000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF65AC00000000011180188110182180180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE293000000000001801801025C018000ee0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF7F020000000000C98A30A10AB02B8AA00000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFECC30000000000099441490CD101914000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF3B88000000000001801011001101800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFF22D00000000000180125100104D8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF19590000000000AF8BB0070AB0018AA0000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8AF100000000004381000300103384000000000000000000000000000000000000000000000000000000009e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFD20000000000000180100104100180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF6BD200000000000180140512100180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF3797000000000101801001001401C00000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF7EDD000000000001801081001081000000005e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF366E000000000100801005001001802000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF7EB5000000000001801023001201A000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFEDC00000000000018010010810018000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFDD2B00000000000000104404000104000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF9F9200000000000080100180180100000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF81070000000000008010011A1019824000000000000000000000000000000000000000000000000000000000003e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF B724000000000042080482140000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFDD020000000000060AA906800800800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF544A0000000000000010511550540000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF6860000000000130001900000080000000000000be0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF81D50000000001110004110011080000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE14B00000000011185584941515580000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF24C40000000000408AA82094A82280000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 5FDD000000000020000300200000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFC7AA000000000000080050154000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF5F7D80000000008A82AC028008AA800000000000000000000000000000000000000000000000000000000000000000fe0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF9323 0000000000000000000010010010000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF7641000000000000800A008008008008000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000010040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF908A00000000000000000000000000100000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 62BD000000000000800A00C00800C00800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF88DE000000000001801A01801001801800000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000810040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFBA3D0000000000000000012010004000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF9F3C000000000000800C008008018008000000000000000000000000000000000000000000000000000000000000000000410040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF3F7C0000 00040009A01801C0100180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFC15D00000000001180180180100180180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 3509000000000101C01801801801801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF334A00000000000100110180000180180000000000000000c10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FFA25E000000000001801C01801001801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75B9 000000000401801801C014018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF8301000000000101801881C010018018000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000210040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF42440000 00000001901801A0120180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFA25E000000000001801C0180100180180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 49A800000004040180180100100180180000000000000000000000000000000000000000000000000000000000000000000000a10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D55E00000000 0005801801801001801800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF2FC5000000000201901801801203801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2585 000000000201E01841E010058018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF515F000000000001801801801001801800000000000000000000610040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FFCB6C0000000000040012018018018000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF515F0000 0000000180180180100180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFA27B00000000000180184180140180180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00e10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96EC00000000 0000001001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF96EC000000000000001001801801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF65ED 000000000000001401801801800000000000000000000000000000000000000000000000000000000000000000000000000000110040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000400 0010018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF6C60000000000000010018010018000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96EC0000 0000000000100180180180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF96EC0000000000000010018018018000000000000000000000000000910040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF96EC00000000000000100180180180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96EC00000000 0000001001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF561D000000000400001001801801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF561D00510040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6444000000000000 1050C58099208400000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF55110000000000000010018018008000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96EC0000 000000000010018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000d10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000280000 0002058200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF28B600000000000000000008200002000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAE2400000000 00800A9021959021000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFBE930000000000D022921132320300000000000000000000000000000000310040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF6383000000000020420C00D4CD00800000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2E74000000000200 20228A2040002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5CC30000000000400409008008408000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD7D6000000b10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF0D0C000000000310308B 24A9080080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF365C00000000024424420844020020000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF490D00000000 000000188180182180000000000000000000000000000000000000000000000000000000000000000000000000000000000000710040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00AA0AA0AA42 80AA0AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF3AE000000000035434C294450154154000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF77DB000000000000 4004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF3130000000000000000000020AA0AA000000000000000000000000000000000f10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFE3E7000000000000800800A908000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF72790000000000AA0AA0 AA1060AA0AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFAB2800000000000000002008200000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3A8C0000000000090040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF866F000000000400C00800C0 0C00400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFDB27000000000001801805911000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9F2F000000000001 200200041000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000890040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (009883800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80A9000000000000001803A012002000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF0C7F0000000000018008 8098880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFA26A0000000004004007000000000000000000000000000000000000000000000000490040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF113900000000000180188380110000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF2AFC00000000000181180180 18A0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF2111000000000001801801900040000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF54E100000000000000c90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF8FD70000000000018AB855807080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFA589000000000001C018118410400000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFC33F0000000000018019 4590900C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000290040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018814100000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF7D2500000000000195595595510C20000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFC8060000000004018ABC8182 90A2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF2B3A00000000000180180180100020000000000000000000000000000000000000000000a90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFE3C3000000000001801201001040000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFFCC6000000000201801801801204 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFECE2000000000001CAB8AB8AB0C80000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF6E10000000000001801800690040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF74FA0000000000AB8AB8AB8810000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF014700000000000180100101500000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF9E0400000000000180180184 100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF48A00000000000AA0AB8AB833000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF462F0000000001541559558C5000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFC7C4000000000000001801901000000000000000000000000000000000000000000000000000190040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFD50E0000000000000018018C12000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFAFBE000000000000001C01A150002000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF87FB0000000000AA0AB8AB80100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF97940000000000000018018100990040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF6E8100000001000004180180100000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF9E61000000000000001C85D01200400000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4B45000000000000001901841000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000590040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF550E0000000000000018058010020000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF86EB0000000000000400800010000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFBECD0000000080000200000A10000000000000000000000000000000000000000000000000000000d90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF27D800000000000000980184000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF46BF00000000000004008000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFE0E5000000000000000000001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF9D3400000000000000180180100400390040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FFE3CA000000000000001000210000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF69F40000000000000A28A30008000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF03A70000000000000018099150000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF43B200000000020000900130100000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF1C190000000000001551550C500000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFDE330000000004000A28AA83280000000000000000000000000000000000000000000000000000000000790040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF991A000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF35B5000000000000008008040000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD19E0000000000000000001140000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF0FFC8000000000000A28A2E00800000000f90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFA29500000000000000080140000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFD096000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF915B000000000000400A00200000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF7A96000000000000001801000000000000000000000000000000000000000000000000000000000000000000850040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF92910000000000000018018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF50B000000000000020180180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE69A0000000000000008000000000000000000450040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF624B00000000008000190180010000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5343000000000100201855800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFB39A000000000000000400000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF625A0000000000400019018001000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE0A10000000001200000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF70540000000000000004540000000000000000000000000000000000000000000000000000000000000000000000250040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF54 F0000000000000001C0188000800000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE95100000000000040180194001000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF93BD000000000100101801800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF521800000000000008180180000000000000000000a50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF9384000000100000201881810000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA4C1000000000000001D418200000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF5F400000000000002019418000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000650040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBA 34000000101801801C0180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFB68800000000000401980180000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF43E8000000000202001C0180000000000000000000000000000000000000000000000000000000000000000000000000e50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF313000 0000021801801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF8931000000001801801801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF89310000000018018018018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF4AF0000000001C01801881810000000000000000000000150040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF89310000000018018018018000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF35 80000000021C01C0180180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF7A30000000001801801C0180000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000950040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5B3B00 0000001801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF8B69000000001A01A01801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF3AB1000000001801801A01A00000000000000000000000000000000000000000000000000000000000000000000000000000550040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF9225000000 241A03AC02000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFC512000000011821805F418100000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF49 3A00000020180180180180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF4F2C0000004018018000004000000000000000000000000000d50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFEA1900000002000008180180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF91A100 0000000000001821808000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF4DBB000000009801000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000350040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3059000000 400C00C00C008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF042A0000000000222422C00000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7C 150000000018008208010000000000000000000000000000000000000000000000000000000000000000000000000000000000b50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D20000000000 000A20A200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE623000000200A00A00A01A0000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF988D00 0000001000210208000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF60EA00000000180184182100000000000000000000000000000000750040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFFFB50000000000000A20AA000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB1C9000000 2002003543444000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF773A0000000004004104000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3F00f50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF37CA0000000008 0081080180080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF3FD20000000000000A20A200000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80FC00 0000000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000040041040 0000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFB742000000400C00C00804C00800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC148000000 0018018018010018000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF9BDB0000000002002002100010000000000000000000000000000000008d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF1D860000000000001058018000800000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF1AA20000000000 0800180580000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA676000000000800800A0100000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC03E00004d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF5D4400000000180180 3800801900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF22C4000000001801800200001800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA2A1000000 001001080001001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001C01809A00 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF15F40000000ABA118A20A20018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA1BF0000000019 2B80001100180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF494700000000180180980180180000000000000000000000000000000000002d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FFCF55000000001805A1180180100000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFE98300000015595594 5B54801000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF4E790000002AB8C18A3AAB801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC03A00000000ad0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF1DF4000000001801C11810 8010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF896E0000002018018018018010000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB43B0000000AB8 AB8A3AA280100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018118010000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF28A40000000118018A38A38A900000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF0AB500000000B92B80 1808801000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFB82500000014180181180180500000000000000000000000000000000000000000ed0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFE4160000000C4049801800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFF5E60000000AA0AB8A38A3 0AA0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF6B2C0000000001039559541540000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA3060000000000001d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF63160000000000018018010000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFA3DB00000000000180181100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF55230000000AA0AB8A B8B30AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF6316000000000001801801000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF6316000000000001801801 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2B1D0000004000898018010000000000000000000000000000000000000000000000005d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF36340000000000018218011000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF63160000000000018018010000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE39C00000020000180000108000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF990B0000000000918000dd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF929100000000000000180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF0935000000000001820001000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFC916000000000001800001 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF5D5B0000000000010001000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF7F2B0000000000AA8A38AA8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF1A9E0000000000000098010000000000000000000000000000000000000000000000000000bd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF15C28000000006AA8A282A80000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF9D9B00000000000100100000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF0BAE000000000155955055800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFB33A0000000000AA8B28AA007d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFEC520000000000000081000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF40A700000000100000000000000100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFADA3000000000800800A00A00A0080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF2A9A00000000000000000020000000000000000000000000000000000000000000000000000000030040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF6435000000001800A00800800801800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFB39A000000000000000400000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFBBE8000000000800C00A008008008000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFC2D9000000001801801A01801C00830040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FFA1B90000000818810400010010018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFEA9B00000000000000180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000000000180000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000430040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBBB5000000041C01821807801801800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFEB70000000001881811805801801800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF58CC000000001801800201801801800000000000000000000000000000000000000000000000000000c30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFC355000000041801801A418098018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF2E2E0000000018018018058118018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF4C6C000000001A0180012180180180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF58C60000000818018082018018018000230040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF332600000000185986180180180180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFD84C000000001801801C01801801800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFED2C000000001801801881801801800000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF902B0000000318018018098018418000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFF2CC000000001801801A018018018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF954E000000001801801801E018018000000000000000000000000000000000000000000000000000000000630040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF3002000000020001C0180181000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF0A5E00000001000180181180002180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF62C1000000001801801A00801801800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFEBCB000000001841A0180180980180000000e30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF8913000000000001801801800001800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF89130000000000018018018000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF89130000000000018018018000018000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000130040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF496A00000000020180180180000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF888B00000000000198180180000180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBBD6000000000401A0180180040180000000000000000000000000000000000000000000000000000000000000930040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 2583000000000401800081800001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE752000000000001C00001800001800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF4B32000000000001A018018000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75C7000000000001801901800401800000000000530040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF4E6C000000000289A802018A028B8000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFAF22000000010005A0590B80200180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF496A00000000020180180180000180000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 5E3D0000000000020418820C2004000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF8AE100000000000000190002008A000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF3C7B000000008081880001800001000000000000000000000000000000000000000000000000000000000000000000330040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF48C1 0000000000418418218000018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF05E2000000000400D02C888404048000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF3ACF00000020020930625820020000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF57E00000000000408008018000008000000000000000b30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FFE0880000000AA0000AA0000020AA00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF ACC0000000200030A00A10940000800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF40E9000000200283200343210200000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000730040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFCE69 0000000AA0AA0A20820AA0AA0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF89760000003540103442941521540000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF93D50000000004004000504000000000000000000000000000000000000000000000000000000000000000000000000000f30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFE8D20000 0000020021000020000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF034200000000080000091480000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 69980000000AA0AA0B20200AA0AA000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFC5130000000000A4008020000000000000000000000000000b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF934B000000440400464400400400000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF1CCF 000000400C00400C00C004000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFF3860000000018400098418000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8F330000 000001000098D000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF19A400000004002000984000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF D77E000000000800002800800000000000000000000000000000000000000000000000000000000000000000000000000000004b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (515A00000000 1800009801800088000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF37260000000018000098A9800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9AEC 0000000019000000019E00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF1357000000001000000001000000000000000000000000000000cb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF5029000000001E000118018000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF487E0000 000018AA0A20AB80000200000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF05B000000000180000000180004000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF002b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF416B00000000 1800201801C00002000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF49EB000000001954145955800154000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7272 0000002018AA0ABAAB8004A8000000000000000000000000000000000000000000000000000000000000000000000000000000ab0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000041800 0118458000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFE770000000001800401A01A000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF50BA0000 0020180000180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF241F0000000018AA0AB8AB8002AA00000000000000000000000000006b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF5BF400000000000101180000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF67D00000008 98000A3809800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF9BF1000000003800001901800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF63A300eb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB71E0000000B2001 8018A00018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2DC80000000AA0018A38AA0018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA2700000 0000000195580C00180000000000000000000000000000000000000000000000000000000000000000000000000000000000001b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004040182B9 20001A0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF536500000000000180180000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF536000000040 0001811800001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF2DC80000000AA0018A38AA001800000000000000000000000000000000009b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FFE54E0000000002018520C0005800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7983000000000001 801E100038000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFA37B000000200001801800001C000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAEEF0000005b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B140000000000019018 8000184000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF632000000004000188181000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA51800000000 000184804000184000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (014401180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFA29A000000000008001800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3A01000000000001 8500400018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF35A40000000000018001000018000000000000000000000000000000000000003b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF7EBD00000000004A8AA8000AA8000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF78D30000000001008A38000AB80000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAEB90000000000bb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF60A18000000000AA8A28006A A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF8CCE000000000000001000001000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5450000000000155 9550001558000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF85240000000000004000280000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF20930000000000000080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000fb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF842D000000000001801929801801A0000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF184200000000000100020100 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFA1A8000000000000800880800800800000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF991A00000000000000070040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF354F000000000000A00801801800 C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF481B0000000000010002000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF67C90000000000008008 008008008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000870040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF3CA700000002000185008180180100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000000000180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF199A000000000000001C0000000000000000000000000000000000000000000000000000470040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF3165000000020001808001A01801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF59AD000000000011821A81801841 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF2BC50000000000018018618018018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFB24D000000000001A00400c70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFDF3B0000000000518398818018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFFCED000000000001801801A0182180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFC8AE00000002004180041180 180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000270040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF2BE4000000000041807801881801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF7383000000002001C11A15941801 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF5785000000020001841891801801800000000000000000000000000000000000000000000000a70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF2E41000000000041801881C418018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF4A7A000000002043801A038018418000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFE41A000000002001809815A0180180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF2F0D000000000001E018018000670040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF5ACB00000000380580580180180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF56C0000000001841801801801820000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF8246000000000001C1BB7D801801 800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFE85E0000000018019018018018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF294F0000000018018018018018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFEB6E000000001801A018018018000000000000000000000000000000000000000000000000000000170040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF0509000000001801C0180100180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFF130000000001801801A2980180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF2B81000000001801AE1801801800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFDA4E000000001801801C0180180000970040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF82B1000000001801800029801800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF5ACE0000000018018002018018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE9BE000000001C018018018018000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000570040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFE8D6000000201A85A2C283A9380200800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFF67A0000000B1A5180180184190002000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFF0CE000000001801801A0180180000000000000000000000000000000000000000000000000000000000d70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFD9B7000000008808866800800800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF0B79000000000002009803092080028000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF38CD0000000300200018800280120000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF8BF9000000081881000001801000000000370040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF294F0000000018018018018018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFBEA1000000408C00C42C88C1081000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF868500000000120020031020020000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF55890000000000AA0A20AA0AA180000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF09EE000000000A00A00A00A00808000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF32E1000000001200210200200222000000000000000000000000000000000000000000000000000000000000770040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFBF5A0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF0E140000000000AA0A20AA0AA0AA0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFAF8800000000035435435435404400000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF53D60000004004004004004004004000000000f70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FFE93C00000020020020020020020020000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC63E000000000000808800800800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFCE040000000000AA0B20AA0AA0AA000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF580000000040040048051041A4004000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFB4A7000000400400C80C00C04C004000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFAF6E00000000000580180180180000000000000000000000000000000000000000000000000000000000000000008f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF69 BF00000000000181400300104400000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF41E400000000004000384400002400000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFEA9B000000000000001800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF4231000000000002800888800800000000000000004f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF8D7D00000000002B80188B823800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFE0120000000000010018518018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE10E0000000000418080098018000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2B 6F00000000000180180180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF72F0000002AA2058A202188180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFE3D1000000000081808001809800000000000000000000000000000000000000000000000000000000000000000000002f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFA47900 00000AA0AB8A3AAB8AB800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF767B000000000001801833D11A00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF46230000003543559559559558000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF9F580000000AA131AB3C81823800200000000000000000af0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF74390000000000318099418038000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFDB 6A000000000001811801801C0000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE330000000000001A01801A0180020000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF335500 0000001801801801801801801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFD7A60000000000038A3901821800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFBB5700000000010180180D911800000000000000000000000000000000000000000000000000000000000000000000000000ef0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF6451000000 0018AB8B38AB8AB8018018000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF319900000000184D8018218338018018000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA4 410000000018AB8A38AB8AB80180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF375700000000190195580B90180180180000000000000000001f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFAC8D000000401949801851A0188180180000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF004400 0000001801811C01801801801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFF3A4000000001C01801801801801801800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF1F57000000 0419118402518019018018000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF3144000000041801901C018018018018000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9E EC000000001C218C1A01C0180180180000000000000000000000000000000000000000000000000000000000000000000000005f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (BF0000000018 0180000184380180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF131300000000180180195180380580380000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF2AA00 0000001801801889801803801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF971100000040180182204184180180180000000000000000000000df0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFE421000000000080001910008000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD835000000 1120000098420220000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFF8150000000010010440000010018058000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8C003f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF25DD00000008C9 508AA82A8028AA8AA80000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE10A00000000000000802000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF36C000 000006082E8A38008808AB8AB80000000000000000000000000000000000000000000000000000000000000000000000000000bf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000001 000C000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF10C70000000AA8AA8A29008AACAA8AA800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF16A6000000 0000000011001500010010000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFB1B300000015595594500B955955D558000000000000000000000000007f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF80840000000000800000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF2F1400000000000000014000000020000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB0CB0000ff0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF294F00000000180180 1801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF9266000000001101000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA5F6000000 000800A00800800800000000000000000000000000000000000000000000000000000000000000000000000000000000000000008040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF67D70000000008008008008008000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF525B0000000010 0100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA5F6000000000800A008008008000000000000000000000000000000000000808040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FFE34700000000180180800180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF736700000000181180 0001801000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFEA9B000000000000001800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000408040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF0B40000000001849800001 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2EB70000000018018018A18018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF86B90000000018 418099418018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFED0E000000001801C0180180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF294F00000000180180 1801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF470E000000001801C0000180180000000000000000000000000000000000000000208040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF434E000000001801801801A01800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF2BF6000000001801811801 8098000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFEAB20000000018018018918118000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF294F000000001800a08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFE9E4000000001801A218018098 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE80B00000000180181183180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF2F4A00000000180180 9911A0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000608040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFECE1000000000001811811811801800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF496F000000080001801801 8018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFA23E000000081801841841001800000000000000000000000000000000000000000000e08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF296D0000000000018018018018018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF496F0000000800018018018018 0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF296D00000000000180180180180180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFEB4C000000000001A000108040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF296D00000000000180180180180180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF296D000000000001801801801801800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF296D000000000001801801 801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000908040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801801800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF646A000000100001800401C018018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF414C000000000001A000018018 0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF3D7A000000400001801801C018018000000000000000000000000000000000000000000000508040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF043900000004800100000180100100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF4916000000000201AA0225A09A0180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFCF1F00000021010180181194592B800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF32CD000000000001A01A0100d08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF02D8000000000080800823880880800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF5A6200000000000004180802A0220000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF165E0000000000000059000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000308040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF30B300000000000184382180180180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF0A0F000000020400C00C80C00C0080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF2D320000002002002A024020000800000000000000000000000000000000000000000000000000b08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF47CE000000000000400400000400000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF7BE70000000AA0AA0A2008088000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFDB3B000000200000A00B20A008008000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFAA93000000200200210205224000708040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF6B5E0000000000000100300800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF76040000000AA0AA0AA0AA0AA00000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFCD1A00000035415434430424C00000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFEF75000000000000211200001200000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFAF56000000000800000800800800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF160C0000000AA0AA0A20AA0AA000000000000000000000000000000000000000000000000000000000088040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF031A0000000008000018028018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFA2880000004004105884044004000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF7315000000400C00400D40C00C0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFF6C60000000018000090018018000000888040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FFBF2800000000100000100100180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF5858000000000000001900000080000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFA5620000000000080018A0000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000488040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF87780000000019100098018259240000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFC59A0000000018000008C18019000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF64B40000000019800000218618180000000000000000000000000000000000000000000000000000000000c88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFC7800000000018040B38AB8238A200000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF5CC600000000180000880180180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFA51E0000002019020A20AB989808000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF062D000000001C20001001801C0000000000288040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FFE2AD000000001CAA0AA8AB8ABCAA000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF2152000000001850201C01A118080000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF61DB0000002019541449559559540000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFFCED00000005180001180580180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF2C8D000000001800400801C0180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE94E000000001800001A0180180000000000000000000000000000000000000000000000000000000000000000688040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 0D42000000032000154031954001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF3692000000000000001001800001800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFAA750000000818000A38058AB8000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF3C7A0000000038000008B1801800000000000000e88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF6A1D0000000AA0000A30AB8AA0018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF9CF000000008000000008180000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF0A150000000AA0000AB0AB8AA00180000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000188040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 0952000000000000001501800001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF966B000000000400009001800001800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFF687000000400000001001800001800000000000000000000000000000000000000000000000000000000000000000988040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF8A4C 0000000000000010818800019000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF29720000000000000012818000018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF369200000000000000100180000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF36E00000002002000010018000018000000000000000588040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF8E5E00000000000000110384400180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 04BF00000000000000100B902003800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFFC33000000000000001001820001800000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF805B 0000000000000011000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF8B7C00000000000000182A0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF991C0000000000000010090000058800000000000000000000000000000000000000000000000000000000000000000000388040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF36F90000 00000000055955A0015580000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF62FF0000000000000AA9088000AA80000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 43EF000000000000080000000001000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF6D5A0000000000000AA8448000AA80000000000000000000b88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF708E000000000000000000000400000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9942 80000000000002A8AA8004AA8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF57640000000000000000004000010000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000788040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF83AA0000 0000000000004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF589900000000000000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 801200000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000f88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (910000000000 0000200A00C00C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFEB74000000000000003821801800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF976E 0000000000002012000010000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF6EB7000000000000000800800800000000000000000000000000048040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF94990000000000000000004000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA2E20000 0000000000180080180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF708E00000000000000000000040000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00848040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF6AE00000000 0000401801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFFF90000000000100005801041800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000448040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 201A018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF9C80000000000800018218218000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2AED0000 0000000000380180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF02DF000000000000001C418018000000000000000000000000000000c48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FFDA4E000000000000201E0180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF32EF00000000 0000001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF32EF000000000000001801801800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF294F00248040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF793000000000100 011A418018080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF02410000000000000058198018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE94E0000 000000002019018418000000000000000000000000000000000000000000000000000000000000000000000000000000000000a48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000004018 0180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF186F00000000000000180184181000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF32EF00000000 0000001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF548300000000008000BAA180180000000000000000000000000000000000648040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF24A4000000000000400000001800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E5000000000000 0000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFE0E50000000000000000000018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF6AE000000e48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E50000000000000000 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFE0E500000000000000000000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E500000000 000000000000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000148040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFE0E5000000000000000000001800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E5000000000000 0000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFC8E3000000000000006000001800000000000000000000000000000000000000948040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF22C40000000000002000000018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E50000000000000000 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFE0E500000000000000000000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E50000000000548040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFF05800000000000A00419A00 1060000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFCBB80000001000800800102018C0000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA0E6000000010012 2500C210D810000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280200200000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF6BC70000000080800080000808080000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFD8DD0000000800000200 2001210000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF3C340000001000000000000080800000000000000000000000000000000000000000348040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF512300000000000020020220000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE0E500000000000000000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF0EE70000000800000020884108C0000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF1B300000000000000b48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF472A000000400400400400000400 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFD9280000000000000AA0400AA0000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF4EFD0000002002002003 30000A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000748040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AA0AA0000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8C5A00000000000000010000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBD9F0000000000000AA0AA0A A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF56B900000020020035421415420000000000000000000000000000000000000000000000f48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF00C2000000001805801941800001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE37E000000201200200200000201 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFC6020000000008008008008000008000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFBD9F0000000000000AA0000c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF92C60000000008008008A08000018000 0001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF5A2300000040140240641040040000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF15B1000000400C00C00C00C0 0400800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF8CAF000000001901011041000001820000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF048A000000000080000000000000 0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80FC0000000000000000080000000000000000000000000000000000000000000000000000004c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF8B330000000018018018018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF81390000000018018018018220018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFA60300000000180180180181000180000000800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE80B0000000018018098218000cc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF3B6A000000001A01A0180182220180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF8B33000000001801801801800001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFBA91000000201801801A01888001 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFA9110000000018018018018AA0018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFB162000000001801801801B100018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFFC7D000000201801801C019540018000000000000000000000000000000000000000000000000000ac8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF478A00000000190190193180000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE11000000000181381380580000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF5F31000000001801801801C00001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF3160000000001A01A01801800201006c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF0327000000155885805915800155800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF87320000000018018008018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFA02C0000000AB8318318418000AB8000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF46150000000AB8AB8AB8AB8000AB80000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF4B970000000018418A180180000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF46150000000AB8AB8AB8AB8000AB800000000000000000000000000000000000000000000000000000001c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF5D77000000001801A01809C00001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF2E33000000005801801801A00001800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8B330000000018018018018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF4F72000000001801C018018000018000009c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF8B330000000018018018018000018000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8B3300000000180180180180000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF4BFE00000000180180181180000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF8B33000000001801801801800001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF8B33000000001801801801800001800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8455000000005801801809800001800000000000000000000000000000000000000000000000000000000000dc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF646D0000001808AB9608AA8000208000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFB9CF0000000120001000000001100000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF6F7100000004000001200000000200000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFEDE100000000100180101180000100000000003c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FFA06900000015595585195580015580000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFCB850000000088AA8028AA80008A800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF6999000000400000100001000200000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF818A0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFC9898000000AAEAA804EAA8000AA8000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF519E00000042200100800100042000000000000000000000000000000000000000000000000000000000000000007c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF58AA00000000000003200000000000000000000000fc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000828040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFFCC100 0000000000402002000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF70BD0000000000000140040000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000428040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF82BA0000000000002000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF20 9300000000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6A1B00 0000000000000600000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000228040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80 FC00000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF80560000000000000000100000000000000000000000000000a28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000628040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000128040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000928040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000528040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000d28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000328040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF77DB0000000000004004000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000728040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000f28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF5B3B0000000000002002000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF77DB00000000000040 0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF77DB000000000000400400000000000000000000000000000000000000000000008a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000004a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF5B3B000000000000200200 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000002a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF77DB0000000000004004000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000aa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF92910000000000000018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF92910000000000000018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000ea8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF929100000000000000180180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF929100000000000000180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF9291000000000000001801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF9291000000000000001801001a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF9291000000000000001801800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF92910000000000000018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF92910000000000000018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF929100000000000000180180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF929100000000000000180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF9291000000000000001801800000000000000000000000000000000000000000000000000000005a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF9291000000000000001801800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF9291000000000000001801800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF92910000000000000018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF9291000000000000001801800000da8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FFD1BB0000000000000AA8AA8000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF6CDE000000000000155955800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFD1BB0000000000000AA8AA800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFDC97000000000000001001000000000000000000000000000000000000000000000000000000000000ba8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF77DB0000000000004004000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF46FA8000000000004AACAA80000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFDC9700000000000000100100000000007a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000068040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000868040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000468040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000c68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000268040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000668040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000e68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000168040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000968040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000568040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000368040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000b68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00768040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B008e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000ce8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000002e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000006e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000ee8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000009e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000005e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000003e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000be8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000fe8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000018040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000818040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000000000000 0000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF097A0000000000000000000000000000000000000008000000000000000000000000000000000000418040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000c18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000218040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000a18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000618040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000118040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000918040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000518040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000318040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000718040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000f18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000898040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000498040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000298040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000a98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000698040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000198040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000998040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000598040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000d98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000398040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000798040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF86FA000000000000000080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000f98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF8C5A00000000000000 010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000858040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000458040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000258040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000a58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000658040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000e58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000158040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000958040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000558040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000d58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000358040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000b58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000758040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000008d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000002d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000ed8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000005d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00dd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000bd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A007d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000038040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000838040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000438040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000c38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000238040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000638040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000e38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000138040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000938040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000538040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000338040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000b38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000738040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000f38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000004b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000cb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000006b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000001b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000009b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000003b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000fb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000878040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000478040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000c78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000278040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000a78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000678040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000178040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000978040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000578040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000d78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000378040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000778040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000f78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000008f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000004f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000002f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000af8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000ef8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000001f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000005f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000df8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000007f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000804040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000404040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000204040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000604040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000e04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00104040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000904040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000504040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00d04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000304040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000b04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000704040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000084040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000884040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000484040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000c84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000284040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000684040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000e84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000184040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000984040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000584040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000384040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000b84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000784040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000f84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000044040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000844040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000444040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000c44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000244040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000644040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000144040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000944040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000544040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000344040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000744040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000f44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40000c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000004c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000cc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000ac4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000006c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000001c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000009c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000dc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000003c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000007c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000fc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000824040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000424040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000224040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000a24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000624040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000e24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000124040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000924040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000524040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000d24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000324040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000724040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000008a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000002a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF00aa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000ea4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE001a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000005a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000da4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000ba4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF8C5A0000000000000001000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000007a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF8C5A000000000000000100000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000064040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000864040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000464040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000c64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000264040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000664040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000e64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000164040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000964040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000564040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000364040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000b64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000764040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000f64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000ce4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000006e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000009e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000003e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000be4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000fe4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000014040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000814040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000414040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000c14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000214040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000a14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000614040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000114040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000914040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000514040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000d14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000314040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000714040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000f14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000894040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000494040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000294040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000a94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000694040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000e94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000194040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000994040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000594040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000d94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000394040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000794040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000854040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00454040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000254040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00a54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000654040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000e54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000154040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000954040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000554040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000d54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000354040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000b54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000754040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000008d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000cd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000002d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000006d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000ed4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000009d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000005d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000003d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000bd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000034040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000834040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000434040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000c34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000234040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000634040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400e34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000134040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000934040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000534040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000334040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000b34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000734040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000f34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000004b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000cb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000ab4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000006b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000001b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000009b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000db4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000003b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000007b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000fb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000874040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000474040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000274040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000004FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000a74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000674040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000174040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000974040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000574040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000d74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000374040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000774040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00f74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000008f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B004f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000002f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000af4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000ef4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000001f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000005f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000df4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000bf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000007f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000080c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000c0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000020c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000060c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000e0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000090c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000050c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000b0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000008c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000c8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040028c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000068c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF7500e8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000098c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000058c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000038c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000b8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF83AA000000000000000040 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF83AA0000000000 00000040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000f8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000004c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000044c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000c4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000a4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000064c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000014c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000094c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000d4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000034c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000074c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000f4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000008cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000004cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ccc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000acc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ecc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000001cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000dcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF003cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000007cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00fcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000082c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000042c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000022c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000a2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000e2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000012c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000052c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000d2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000b2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000072c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000008ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000cac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000002ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000006ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000eac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000005ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000bac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000006c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000c6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF750026c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000066c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000e6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000096c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000056c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000036c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000b6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000f6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000004ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000cec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000aec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000006ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000001ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000009ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000dec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000003ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000fec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000041c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04FF75DE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000a1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000011c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0091c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000d1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0031c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000071c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000f1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000089c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000049c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000029c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000a9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000e9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000019c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000059c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000d9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000b9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000079c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000005c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000085c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000c5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000025c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000e5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000055c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000b5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40008dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000cdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00002dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000adc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000006dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000edc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000009dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000005dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ddc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000003dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000bdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000fdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000003c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000043c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000c3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000a3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000063c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000013c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000093c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000d3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000033c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000f3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000004bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000abc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF006bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ebc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000001bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B009bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000dbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000003bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF80FC00000000000000000800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF80560000000000000000100000000000000000000000000000000000000000007bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000fbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000087c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000047c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF689B600000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000027c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000a7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000e7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000017c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000057c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000d7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000b7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000077c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000008fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000002fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000afc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000efc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000005fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000bfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40007fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000002040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000802040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000402040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000c02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000202040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000602040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000e02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000102040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000902040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000502040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF80AA004000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF80820020000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000302040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000b02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000702040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000f02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000082040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000882040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000482040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000c82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000282040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000a82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000682040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000182040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000982040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000582040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000382040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000782040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000f82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF949A 0000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF949A0000 4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000842040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000442040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00c42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000242040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000a42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00642040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000142040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000942040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000542040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000d42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000342040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000742040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000f42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000008c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000004c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000002c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000ac2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000ec2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF209C00000000002000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF209C000000000020000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000001c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000005c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000dc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000007c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF80 B800000000000002000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF408500000000010002000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC49A000000000004000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF048500000000008400000000000000000000000000822040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF4013000000000600000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000422040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF44 F900000000000042000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF84DA00000000000040000000000000000000000000000000000000000000000000000000000000000000000000000000c22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFF31B00 0000000001801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF335E000000000001841800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFF31B0000000000018018000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000222040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFF31B0000000000018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF3 1B00000000000180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF31B00000000000180180000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF375A00 0000000001C01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF375A000000000001C01800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFF31B000000000001801800000000000000000000000000000000000000000000000000000000000000000000000000000000622040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFF31B000000 0000018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFF31B0000000000018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF3 1B00000000000180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF31B0000000000018018000000000000000000000000000000e22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF9D9B00000000000100100000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF614100 0000000211A01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF6E34000000000105903800000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000122040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF668C000000 0000888808000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF7A960000000000420020000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80 DE0000000000000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000922040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFF31B00000000000180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2AE000 0000000440C40800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000522040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF806A000000000400000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFEC3A000000000000A008000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000d22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF82BA00 000000000020000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000322040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8CE3000000000200001000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE69A000000 0000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000b22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFE69A0000000000000008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF482A0000000004 0040100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE22A00000000040040080000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF529A0000722040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF89A000000 020000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000401800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFAF840000000001341358000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B0000000000 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000000000000a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF62B600000000002802980000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF5FB2000000000104105800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2EDA000000008a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF5C620000000000AA4AB800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2AE20000000002000018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0FEB0000000001 5415580000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF2A6A00000000040000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000000000000000ca2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFA85B000000000001954000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF591B000000000001800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF923B0000000000000AB8000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B0000000000002a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF21BB0000000000018AA0000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF21BB0000000000018A A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF591B000000000001800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF591B000000000001800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF591B0000000000018000000000000000000000000000000000000000000000000000006a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF591B0000000000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF591B0000000000018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF991F00000010000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF691A0000000400018000ea2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF591B00000000000180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF591B000000000001800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA91E000000140001800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000000000009a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF8DDA00000000055580000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF82020000000000AA80000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF82BA000000000000200000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF53030000000000AB800000005a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF80E2000000000200000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF82020000000000AA8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF53BB0000000000012000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF809000000020000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000003a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF24EB000020000400800800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFF31B000000000001801800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF808E0000004000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF2E1B000000000000800800000000ba2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF80E20000000002000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE41A00002000000080080000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFB727000000000105801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF6C8E000000000001105000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000fa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF95400000000001218018800000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFD00B0000000000039018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF161600000001008190380000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFF31B0000000000018018000000000000062040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FFF5C90000000200D380190000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFF91800000002000B803800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFFE0F000000010001905800000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000862040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFF31B0000000000018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFF31B0000000000018018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF335E0000000000018418000000000000000000000000000000000000000000000000000000000000000000462040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFC31A00000004000180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFDF51000200200009C0180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF8C9B000000022001801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFF779000000000001C2180000000000000000c62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF31B2000001801C01801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF76430000018058098018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF312D000401C01A018018000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000262040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFF14300000180180180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF39C200000180180100180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFF14300000180180180180000000000000000000000000000000000000000000000000000000000000000000000a62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF F143000001801801801800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFF143000001801801801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFF1430000018018018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFF143000001801801801800000000000000000000662040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF3362000001801801A018000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF3362000001801801A0180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFF14300000180180180180000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 2BC0000009889801801000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFBB34000201AC1A21A23800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFEDE5000013811885909800000000000000000000000000000000000000000000000000000000000000000000000000162040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFE824 00010316028220C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF2C9B0000008018008808000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF209C00000000002000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF58FF0000000000000620000000000000000000000000962040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF95C800000100128428C00000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF C147000001801801805800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFDB33000480CA0C00C40800000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000562040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF407F 0000004004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF089A0000000000080000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8DAC000200A00A40A208000000000000000000000000000000000000000000000000000000000000000000000000000000d62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF32230000 000000AA0AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF808400000000008000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 32230000000000AA0AA000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF1FE100020020024C33400000000000000000000000000000362040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF3147000001901801801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4CE8 0000002002000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF2FD30000008008008008000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4FD10000 0081081080180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF443C00040040040040000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 2B74000400C00C00C0080000000000000000000000000000000000000000000000000000000000000000000000000000000000762040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (516800000180 1801829800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF9C88000001011011801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B 0000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF991F000000100001800000000000000000000000000000000000f62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FFA1620000018018118218000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF605E0000 018018A191580000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF11600000180180185180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF000e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA9EF0000ABAA B88190B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFF1CB000001801E01801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD6EF 0002AB8AB8478018000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001A01801 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF62580000AB8AB8AB8AB8000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF63250000 01801811A4180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF77700035595595595580000000000000000000000000000000000004e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FFDDC200004184180100180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8AE100008389 5801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFFD83000001801801401800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF314800ce2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF364B000140051955 9540000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF417A0000 098018AB8AB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFC8200000AA0AB8AB8AA00000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF561E00000A10 5801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFC8200000AA0AB8AB8AA00000000000000000000000000000000000000000ae2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FFD33B000000061801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5CAF000000403801 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5B3B0000006e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFB4280004004038001140 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF853A00000000380000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9B3900040000 180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (300011000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF42BB000000001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B3F000000001801 8040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000000000000000000000001e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFD3E10000000008BA8000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF691A0000000400018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF0A1900000009400180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF45DA00000000009e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF86AE00000015595520000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF62E700000012C8A2800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF919A000000000001 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF6A608000000AA8A28000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF55DB0000000000014000000000000000000000000000000000000000000000000000de2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF4989000000200A0080000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF80E200000000020000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF809A000000500000010000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF089A000000000008003e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF48D7000000300980910000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF9F7A000000001801C000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF42330000000000002800 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000be2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF991000000020000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF49FB00000000080080000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000007e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFE11A000000021819A02000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF82B0000000201800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF23590000000210000020000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B000000000001800000fe2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF41BF0000001418000004000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF86FA00000000180040000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF943A00000000580180000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF43330000002A1801800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF682F000000401801800400000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF943A000000005801800000000000000000000000000000000000000000000000000000000000812040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFCB870000022418818080000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF3BB4000600101E018000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF231600018000190181000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE38E0000024218018000000000412040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FFB308000000220C0180840000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF7774000080301801C00000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF591E000000101801A00000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFF13B0000000018018018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF294F000000121A018098000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF522E000100401801801C000000000000000000000000000000000000000000000000000000000000212040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF331A000000001801A0180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF3142000000001A0180180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFF13B000000001801801800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFF13B00000000180180180000000000a12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FFF13B000000001801801800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFF56A000000001801C118000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFF13B0000000018018018000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000612040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF3142000000001A0180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF88B300000000180000980000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF28C2000000001A0000180000000000000000000000000000000000000000000000000000000000000000e12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFF959000000000021840000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF9435000108049840001800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD42C0000242A5A422818000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFCBFB000010011C01801840000000000000112040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FFAB280000202012020000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF3BF80000000A080080180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF613F00000200600198402000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000912040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF1C2A000000255210001000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF9E39000000025801803800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF7B9C000100400C40CC0800000000000000000000000000000000000000000000000000000000000000000000512040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF137D0002003103542002000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF806C0004001004000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF02820000000000A200000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF542D000200300A00A00A000000000000000000d12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF32830000000400A200000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF3F1B000000022000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF5B8300000000C0AA000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000312040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF854D00000190180D8018018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF996E00020002A2080000010000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF07D00000009008008008008000000000000000000000000000000000000000000000000000000000000000000000b12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFC9 1C00000010000980200000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF07D000000090080080080080000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFF535000400400402404401000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF3072000400C00C00C00C0080000000000000000000712040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF90C9000001801800001801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFF7510000011010000510018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA95500000000002184C0000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD8 C800000180180800180180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF894900000180180180180180000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFF14C00000180182180380180000000000000000000000000000000000000000000000000000000000000000000000000092040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFB73400 0001B5594D955801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF12720002018AB8A38AB801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA341000001801E01801E018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFABF8000001AAB8A20AB801800000000000000000000000892040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFBB6B000201801811A018018000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF72 730000018AB8A38AB80180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFDD0A000001801811C0180180000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000492040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC91800 0151901801941801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF091F00000584D811815801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF8949000001801801801801800000000000000000000000000000000000000000000000000000000000000000000000000000c92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF3C030000AB 8AA0A39480AA0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF208B0001498101558521540000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF69 6700000180000180400000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF60D70000018018A38008AB8000000000000000000000000000292040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF987200000180000190000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF855C00 00AB8AA0BB8000AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF46C90000038A2001880000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBB62000001 8000038000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFAD37000001C20009C000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE1 4A00000180000182A0000000000000000000000000000000000000000000000000000000000000000000000000000000000000692040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000018000 0182000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF0C1F000001C0000240800002000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E000 0001840010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFDD6200000180000580000000000000000000000000000000000000e92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF98A4000001800000042000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0363000001 8020040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF93B10000018020018120000400000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9900192040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA5B0000AB8000 A280000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC91900 000000001180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000992040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100001100 0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF5590000155800145000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2A0A0000AA 8000A28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF001A000000000009000200000000000000000000000000000000000000592040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD0990000000000 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF2A088006AA8000A280000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF32C80000d92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF2FF100000020080080 0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF869A080000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0FE000000 080000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000392040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000400 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFAA10000000200C049008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF24DC1000000018 01801A0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA2170000001000020800000000000000000000000000000000000000000000b92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF9ADA00000000100180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF2F83000000000A00800800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB39A00000000792040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF4C6A000000021801D01800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE9EF0000044018000018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF85B0000000250 000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF35EB00008004390020181000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF27BA00000000580000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF191800004221180188180000000000000000000000000000000000000000000000052040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF9133000000001801809800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA5DB000090021901901810 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFDB330000480118018818000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3E3A000000005800852040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFC22A000000001801811C000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF2832000000001E01801A0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B00000000180180 180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000452040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF6C3C000000431819901800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFEFB3000000009801881800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF313F000000101801801800000000000000000000000000000000000000000000000000c52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF23310000000018018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF23310000000018018000018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF9B3000000002180180000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF23200000005018018000252040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE348000000001A0180000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE33A000000201801800001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF2331000000001801800001 800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF23310000000018018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF22220004000018019000018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE3330004000018018000018000000000000000000000000000000000000000000000000000652040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFEA8F000010401C5589201180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF2551000000001801E0000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF3AB1000000001800000001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFFBA000000000180010000100e52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FFA621000100004001820002000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF3CD10000000030000000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD4C0000080323B000202038000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000152040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFACD800000029028220000100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF337D00008802080080000080000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFC9F700000000006988A00800000000000000000000000000000000000000000000000000000000952040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFA32E00020022AA00B10000800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF82E0000000280200224001000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF18B10000000138018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF7A16000080400C40800400800000552040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF36A80002002803442540000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF273F00040040041040040000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFB5830000000440AA00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBBA10000000AA0A20AA000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFCE11000000008010080000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFBBA10000000AA0A20AA000000000000000000000000000000000000000000000000000000000000000352040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF17E2000400C04C80C80C000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF8BC30000098218018018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF38D800020120120020020000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFBFD10000008008108008000000000000b52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF9B9A00000800000180000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF365300000080A800800800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF503D0004015B1480480400000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000752040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF284A0000018018000818000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF4EC20000018018000010000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF9F700000001000418000800000000000000000000000000000000000000000000000000000000000000000f52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFB4DC0002018018A2001AAA00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFD8C200000184180000180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF3AC3000001893811801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFFC96000001881821901900000000000000000d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF90F9000201955955801B54000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF9B21000001903AAB8018AA0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFF15D000001E018018018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFA138000001801A1180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFD55F0000018AB8A38018AA00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF5302000001829801C01800000000000000000000000000000000000000000000000000000000000000000000004d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF DB910000AB8AB8BB97D800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFF143000001801801801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF28500000018018019038000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF3362000001801801A01800000000000000000000cd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FFC2510000AB8AB8B38AB8018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8E3E00015595594580180180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF48A800000180100180180180000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 4942000001A01801801801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF52530000AB8AB8A38AB801800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF8949000001801801801801800000000000000000000000000000000000000000000000000000000000000000000000ad2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF9CC7 000001845841801E018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF33DC000009C218018018018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF4C4800001180180180180180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF194B00000180181180180180000000000000000000006d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF384F00000180D84180980180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF D7C8000001805810003801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF90C9000001801800001801800000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3FE7 0000010058100058018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF90C90000018018000018018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF155100000181186181180180000000000000000000000000000000000000000000000000000000000000000000000000001d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF80990004 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF25AA0001948088A38AB8AA80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 8D1A000040000001800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF5CBB00000A0C2011800000000000000000000000000000009d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FFD992000400230001001000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFECB3 0001559559555559558000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFBF63000020A828AA8AA8AA8000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF089A0000 0000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF82BA00000000000020000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 1B498000AA8AA8A28AA8AA80000000000000000000000000000000000000000000000000000000000000000000000000000000dd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4C5B00000000 5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF2F83000000000A00800800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF871A0000000020000000000000000000000000000000000000003d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEF720000 00000E0080080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF13B00000000180180180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00bd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B00000000 0001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF591B000000000001800000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEC42 000000001A008008000000000000000000000000000000000000000000000000000000000000000000000000000000000000007d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001881 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2F48000000209A018018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF28BF0000 0010180000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF50860000000099000010000000000000000000000000000000000000fd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FFF14C000000001A4180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE7C300000000 5A00001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF48C0000000081A00001800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF312400032040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFCD2F000000411801 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF36BA0000000038018018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF913C0000 000018218018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000832040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400018018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF221A00000000D801A0180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF41300000000 3E01A01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFF12500000060180180180000000000000000000000000000000000000000432040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF24A2000040001201801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEF25000000009881 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF312E0000004018018018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF253A000000c32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B0000000018018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF31CA000000001C0180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2F2E00000020 988180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000232040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFF1C1000000201C01801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B000000001801 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF13B000000001801801800000000000000000000000000000000000000000000a32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFE8BB0000000018000018000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF3142000000001A018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFF13B00000000180180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B0000000000632040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF7C6700009048182182980800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF5138000600001801801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE8BB000000001800 001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (808088000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF81C50000000000018D20000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFDA270000880A18800018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFCD1D000020225A842838800000000000000000000000000000000000000000000000132040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF68BA0000404C2D40C5080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF5CE100006030024022000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF02FB000000054802801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFDCAF00000000212500932040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4D64000200200A00AC0800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF96C400000020020820D0000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFAB3B0000000098058018 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000532040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFC5240002003543542D400000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFB73D00040040040040040000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFC3010000000AA0A200000000000000000000000000000000000000000000000000000000d32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF2FD3000000800800800800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFBBA10000000AA0A20AA000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFF3A00000000AA0AA0AA000332040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFD875000400C00C00C00C000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF314700000190180180180000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFAB4A00020020021020020000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFE718000000088001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF28F3000002802800800800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF455E000404414580400400000000000000000000000000000000000000000000000000000000732040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFFDD90000018018418519000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF4EA50000018018200018800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFAEF800000100000200100400000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF1D1B0000000000058300040000f32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FFCA7E0002019218A20AB80000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFDB33000001801C00001C00000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4A46000001915809801800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF27350002019559459558000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF5E3A00000180B8ABCAB8000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF614100000180181180180000000000000000000000000000000000000000000000000000000000008b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFF14300000180180180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFF369000001A01801A0180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF71880000018ABCAB8ABC00000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF0157000001C41801801800000000004b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF545D0000018058A3807800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF6D400000018918018018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF00A50001338458119518000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF54510000AB8038A38AB80180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBDE00000959519558D180180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF9CAA000001831011801801800000000000000000000000000000000000000000000000000000000000002b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF72C2000001A13801801801800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFF14C000001921801801801800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF1BD50000AB9018AB8AB8018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF5D48000041801801801801800000000000ab2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF73490000218418018018018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5145000001BA180180180180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF1B00000081809801C0980180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFAD48000041821809801801800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFB34E000001803824001801800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF86F8000081811800211801800000000000000000000000000000000000000000000000000000000000000000eb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF58D700000002A0018480000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF098D0000018458000410018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF14C800000180180400180180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF196600000180185182180180000000000000001b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF89C700000100000900000100000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF29690000AA8148A28028AA800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFC994000000100011880000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF18D50000010000011020010000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF8BF3000555955945155D558000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF92440000AA9208AA8288AA80000000000000000000000000000000000000000000000000000000000000000000005b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF02 820000000000A200000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF209A00020000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF0918000000000010000200000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF1B498000AA8AA8A28AA8AA80000000000000000000db2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FFC4F6000001000104000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF2FD30000008008008008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80 CA00000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF2FD300000080080080080000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF513D000001801A2180180000000000000000000000000000000000000000000000000000000000000000000000000000bb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF8F2300 0001801000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF591B000000000001800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF99620000000002018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF2FD30000008008008008000000000000000000000000007b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF91DD000001C818018818000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF60 5400000190181190180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE8C300000180180000180000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF14300 0001801801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFFCFF000041801900001800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF60D7000001C01808001800000000000000000000000000000000000000000000000000000000000000000000000000000000072040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF3160000001 8018018218000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFCD460000019118018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC1 4200000184180180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF5D7E0000418219018018000000000000000000000000000000872040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFF14300000180180180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0E4704 0001911801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFF087020001801801841800000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000472040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF60DC000000 0410218018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE9470004018218218018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF1 430000018018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000c72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3B0000000018 0180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFF13B00000000180180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF313900 0400001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFF13B00000000180180180000000000000000000000000000000000272040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFF13B000000001801801800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B000000 0018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFF13B0000000018018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF100a72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE8BB0000000018 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFF1DF000000401C0180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B00 000000180180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000672040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0020245AA820 9800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFEB2E000010109801901800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF75B000000 001801E018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE85F000000401C00001800000000000000000000000000000000000000e72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF59140000000000218080000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF870B0000000080 C180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFF7B10000600E380808100000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF97F80000172040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFAF61000040400D10C0 0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF22F4000200200300200000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBD79000008 000810800800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000972040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1100A2176000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF518B000000288A008008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2CD20002002442 1030800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF01340000000418418018000000000000000000000000000000000000000000572040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FFD3800000AA0AA0AA0AA00000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFEB9900015424435400 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF443C000400400400400000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF37C60000AA00d72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFD9F9000000000810800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF9B810000AA0AA0A20AA0000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000372040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF4D5C000400400C00C0000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFA3BB00000004180100 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFF00900020020120120000000000000000000000000000000000000000000000000b72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF0F8700000000200190C000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF591B000000000001800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE77A0000000228018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF48FC000400405400772040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF4B350000000018409100000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF44BC00000002982000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFA0BF00000005580100 400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF68010002000A78A2022000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF6F27000000411801080000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF73320000000018098080000000000000000000000000000000000000000000000000000f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF1DBB000000011801AAA0000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFCC4E0002001559549540000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFB95C000000141AB380000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF8A3A00000000180080008f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFDE79000000001810C0000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF9B42000000001A01800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFB1150000004AB8A28AA000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFD8A10000000AB8A38000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF1A380000000018108000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF5B3B0000000018018000000000000000000000000000000000000000000000000000000000cf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFBA580000018AB8A300180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF3FF6000001955954001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF39C2000001801801001800002f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF39C2000001801801001800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF59C30002018018010018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF625B0000018AB8BB0018000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000af2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF9CC100001188180100180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF3B4100040980180100180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF36FE000001805901001800000000000000000000000000000000000000000000000000000000006f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFB314000001841801001900000000000000000000000800000000000000000000000000000000000000000000 0000000000000000000000000002000000000000000000000000000000000000FF81A0000001921801001808000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF3EB20000018018011018800000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF3E7E000001803901001800000000ef2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000002000000000000000000000000000000000000FF750D0001200000018000000000000000000000 0000080000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000 00000000000000FF8ED100000100100100181000000000000000000000080000000000000000000000000000000000000000 00000000000000000000000000000002000000000000000000000000000000000000FFF94B00000180180108180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0800000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF82EB0000588008AA8AB800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF67CE0000040CC0010000000000000000000000000008000000000000000000000000000000000000009f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF0AC10000AA8AA82A8AA8000000000000000000000008000000000000000000000000000000000000000000000000 000000000000000000000002000000000000000000000000000000000000FFDA930000802880000010000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF5337000155955955D5580000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFDC57000002A428AA8AA80000000000005f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF80A6000000000100000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF82BA000000000000200000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFE7520000008008000008000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF401900000200000002000000000000000000000000000000000000000000000000000000000000000000003f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFE75200000080080000080000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE752000000800800000800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFE84100000380180002180000000000000000bf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF4F0A000001001000001000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF6CC200000180180400180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000000000ff2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF E8C3000001801800001800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF36C2000001809800001800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF14C20000018118000018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF6CC200000180180400180000000000000000000000a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FFE8C30000018018000018000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFE8C300000180180000180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF E8C3000001801800001800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE7C9000001A05800001800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE7C9000001A0580000180000000000000000000000000000000000000000000000000000000000000000000000000040a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFEA9B 0000000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFEA9B0000000000000018000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFE8C30000018018000018000000000000000000000000c0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF EA9B000000000000001800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFEA9B000000000000001800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B 0000000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFEA9B0000000000000018000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFEA9B0000000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000a0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFEA9B0000 0000000000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF EA9B000000000000001800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFEA9B0000000000000018000000000000000000000000000060a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF0E0E000010112000233800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9996 0001200200901018000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFEA9B0000000000000018000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF808B0000 0000014002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFE09800000002000000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF C58D0000800020800818000000000000000000000000000000000000000000000000000000000000000000000000000000000010a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A9C00000000 0020001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFE2E6000000000100400800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF22B0 0002002000002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF741100002808800800980000000000000000000000000000000090a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF682C0000020000000160000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFDAE20000 0001020000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF18E00035034400032900000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0050a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD9980000AA0A A0000AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF9FB3000110134200140000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF807D 000400400400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200200201 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF881A0000000000008000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD9980000 AA0AA0000AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF4A3B000022000000000000000000000000000000000000000000000030a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF443C00040040040040000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBCBC00040044 0400C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF591B000000000001800000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF1E900b0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF989D000000020020 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF89A0000000200000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B0000 00000001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA91400000004 0041800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000f0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF591B000000000001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF21BB000000000001 8AA0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF591B0000000000018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B00000008a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF3B2E000200400001A000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFA85B00000000000195400000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE1C200000000 02018AA0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF5D58000400000001C00000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5969000000200201 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF21BB0000000000018AA00000000000000000000000000000000000000000000048a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF5B430000018018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF53030000000000AB8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B0000000000c8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF5B4300000180180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF515B0000018018AB800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4F73000001801955 80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C00000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFFB428000018018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF5B430000018018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF515B0000018018AB8000000000000000000000000000000000000000000000000000a8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FFE34200000182180180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFB94200000180180380000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFAB46000001941801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9F020000018018010068a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF2D55000001801801800000000000 0000000000000008000000000000000000000000000000000000000000000000000000000000000000000002000000000000 000000000000000000000000FF1F460000019018058000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF5873000001801801B000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000080000000000000000000000000000000000000000000000000000000000000000000000020000000000000000 00000000000000000000FF96950000000000A000000000000000000000000000080000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000FFE5D400000180180100000000 0000000000000000000800000000000000000000000000000000000000000000000000000000000000000000000200000000 0000000000000000000000000000FF9BCA0000018018018800000000000000000000000000000000000000000000000000000018a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFB4670000AA8AA80A800000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000002000000000000000000000000000000000000FF806A000000000400000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFABDC0000AB8AB9008000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF228E00000000001400000098a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFD4630004AAEAA8AA8000000000000000 0000000000080000000000000000000000000000000000000000000000000000000000000000000000020000000000000000 00000000000000000000FF43F400000100144000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFCC3600015595595580000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF8099000400000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000d8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF18C30000018218020000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF10CB0001010000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF415300000080080000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFF29A000080020002000000000038a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF415300000080080000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF80CA000001000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4153000000800800000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF83220000018010000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000078a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF42C300000180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF88C200002180180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF42C3000001801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF96C200004180180000000000000000f8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF42C3000001801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF42C30000018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF42C30000018018000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5C0301000180980000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBEC200000181180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF42C30000018018000000000000000000000000000000000000000000000000000000000000000000000084a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF8202010001801800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF42C3000001801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF82C8000001A018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF82C8000001A0180000000000000000000044a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5B3B00000000180180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF42C300000180180000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5B3B000000001801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF5B3B000000001801800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF5B3B00000000180180000000000000000000000000000000000000000000000000000000000000000000000024a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF5B3B0000000018018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5B3B00000000180180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000a4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF5B3B00000000180180000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5B3B000000001801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF5B3B000000001801800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA74D000000309A038000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF2C070000300219018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5B3B0000000018018000000000000000000000000000000000000000000000000000000000000000000000000000e4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF4B 6500000800088080000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFA29A00000000000200000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFFFBA0000400218010000000000000000000000000014a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF9E3A000010001801800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF9D1E000040400C008000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF92530002302890000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF50 BA0000AA04000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFB5FA00000001080080000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFBC520002002C50000000000000000000000000000000000000000000000000000000000000000000000000000000000054a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA1380000AA0AA000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF53D90001540940000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF4068000400000400000000000000000000000000000000d4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFE0E30002000002000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFA1380000AA0AA00000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF807D00 0400400400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF807D000400400400000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF709A000000040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF8C9B000000 0500000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF049B000000030000000000000000000000000000000000000074a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFA8820000000000A800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFF89A000000020000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF032E0002002AA1020000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000AA0 AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF94E100000000021400000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF37BA00 0200554154000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE11F0000000AA020000000000000000000000000000000000000008ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF806A000000 0004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8B004ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF59630000018000 0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180000180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF5963000001800001800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5963000001 8000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF59630000018000018000000000000000000000000000000000000000002ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF9976000001C000018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF59630000018000 0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF996100040180000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF59630000aca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF9968000001A0000180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF6962000001840001800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF26E5000219 9A00018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800001810000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF59630000018000018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF41750000018200 8180800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF59630000018000018000000000000000000000000000000000000000000000eca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF81DA00000400000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFDF9A00013000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF6976000001040101800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9973000001001ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA80A00008A8000AA800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF472B0000408000 AB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF02FB8000AA8004AA80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF919A00000000000100 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF0D13000155800155800000000000000000000000000000000000000000000000005ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF80E20000000002000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000dca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF808E00000040000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF8090000000200000000000000000000000000000000000000000000000000000000000bca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FFBC9A0000000100000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF82100000080800000080000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000007ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF7E0F00000811000001000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000002a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF809A00006000800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFDC9D000000010020000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000082a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF8095000000000040000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000c2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000022a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF808B0000000000000100000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF209300000000000000800000000000000000000000000000000000000000000000000000000000000062a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFBC9A00000001000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000e2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF9E9A000000008000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000092a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF809000000020000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000052a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80900000002000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF835A00000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF817A00000000080000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000032a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF808E000000400000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF416F0000004008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF42BB000000001800000000000000000000000000b2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FFFABA0000000218000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFF89A00000002000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 42BB000000001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF42BB000000001800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF42BB000000001800000000000000000000000000000000000000000000000000000000000000000000000000000000f2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF42BB 0000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF42BB0000000018000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF42BB00000000180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF42BB00000000180000000000000000000000000000000aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF835A00000000100000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 835A000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF835A000000001000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4C5B 0000000050000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF835A0000000010000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF835A00000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000004aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF839E0000 0015400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 85580000000A9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF835A00000000100000000000000000000000000000000000caa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF81180000000AA000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF81180000000AA0000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (209300000000 0000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000006aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF20930000000000000080000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00eaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000009aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B005aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000daa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000003aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000baa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000faa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000006a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000046a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000c6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000a6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000066a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000016a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000096a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000d6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000036a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000076a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000f6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000008ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000004ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000aea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000001ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000dea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000007ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000fea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000081a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000041a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000021a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000a1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000e1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000011a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000051a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000d1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000b1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000071a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000009a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000089a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000c9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000029a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000069a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000e9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000099a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000059a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000b9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000005a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000c5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0025a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000065a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00e5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000095a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000055a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000035a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000b5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000f5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000004da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000cda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000ada040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000006da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000001da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000009da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000dda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000003da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000007da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000fda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000043a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000a3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000013a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000d3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400033a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000073a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000f3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000008ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000004ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000002ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000aba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000eba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000001ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000005ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000dba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000bba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000007ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000007a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000087a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000c7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000027a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000067a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000e7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000057a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000b7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF008fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000cfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B002fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000afa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000006fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000efa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000009fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000005fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000003fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000bfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000ffa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000006040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000806040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000406040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000c06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000206040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000a06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000606040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000106040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000906040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000506040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000d06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000306040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000706040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000f06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000886040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000486040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000286040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000a86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000686040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000186040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000986040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000586040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000d86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000386040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000786040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000f86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000846040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000446040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000246040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000a46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000646040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000e46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000146040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000946040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000546040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000d46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000346040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000b46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000746040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000008c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000002c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000ec6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000005c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF097A000000000000000000000000000000000000000800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000bc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF007c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000026040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00826040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000426040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000c26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000226040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000626040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000e26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000126040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000926040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000526040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000326040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000b26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000726040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000f26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000004a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000ca6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000aa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000006a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000001a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000009a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000003a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000fa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000866040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000466040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000266040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000a66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000666040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000166040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000966040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000566040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000d66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000366040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000766040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000f66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000008e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000004e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000002e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000ae6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000ee6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000001e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000005e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000de6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000be6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000007e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000016040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000816040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000416040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000216040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000616040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000e16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000116040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000916040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000516040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00d16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000316040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000b16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00716040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000096040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000896040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000496040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000c96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000296040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000696040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000e96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000196040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000996040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000596040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000396040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000b96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000796040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000f96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000056040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000856040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000456040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000c56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000256040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000a56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000656040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000156040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000956040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000556040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000356040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000756040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000f56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000004d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000cd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000ad6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00006d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000001d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000009d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000dd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000003d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000007d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000fd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000836040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000436040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000236040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000a36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000636040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000e36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000136040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000936040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000536040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000d36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000336040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000b36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000736040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000008b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000002b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000eb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF001b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000005b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00db6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000bb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000007b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000076040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000876040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000476040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000c76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000276040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000676040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000e76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000176040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000976040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000576040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000376040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000b76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000776040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000f76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000004f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000cf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000af6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000006f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ef6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000009f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000003f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000ff6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400000e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000040e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000c0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000a0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000060e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000010e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000090e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000d0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000030e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000070e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000f0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000088e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000048e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000028e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000a8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000e8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000018e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000058e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000d8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000078e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000084e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000024e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00a4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000e4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0014e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000054e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000d4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000b4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000074e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000008ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000cce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000002ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ace040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000006ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000ece040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000009ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000005ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000003ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000bce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000fce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000002e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000c2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000062e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000092e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000032e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000b2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000f2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000004ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000cae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000aae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000006ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000001ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000009ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000dae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000003ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000007ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000fae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000086e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000046e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000026e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000a6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000016e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000d6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000076e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000008ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF004ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000002ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00aee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000eee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000001ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000005ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000dee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000bee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000007ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000001e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000081e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000c1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000021e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000061e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000e1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000091e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000051e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000031e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000b1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000009e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000c9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000069e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000099e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400059e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000039e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000b9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000f9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000005e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000045e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000c5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000a5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000065e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000015e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000095e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000d5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000035e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000075e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000f5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000008de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000004de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000002de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000ade040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ede040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000001de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000dde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000007de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00fde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000083e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0043e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000023e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000a3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000e3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000013e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000053e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000d3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000b3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000073e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000008be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000cbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000002be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000abe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000006be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000ebe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000009be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000005be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000003be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000bbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000007e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000c7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000067e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000e7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000097e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000057e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000037e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000b7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000f7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000004fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000cfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000afe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000006fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000efe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000001fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000009fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000dfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000003fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000007fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 04FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000ffe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000801040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000401040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000201040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000a01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000601040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000101040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000901040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000501040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000d01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00301040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000701040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00f01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000881040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000481040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000281040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000a81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000681040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000e81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000181040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000981040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000581040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000d81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000381040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000b81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000781040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000041040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000841040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000441040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000c41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000241040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000641040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000e41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000141040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000941040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000541040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000341040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000b41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000741040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000cc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40002c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000006c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000ec1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000009c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000005c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000003c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000bc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000fc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000021040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000821040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000421040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000c21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000221040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000a21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000621040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000121040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000921040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000521040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000d21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000321040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000721040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000f21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000004a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000aa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000001a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF009a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000001FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000da1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB003a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000007a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000001FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000fa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000861040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000461040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000261040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000a61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000661040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000001FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000001FF409B00000000000000000000000000000000000000000000000000000000000000000000e61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000000000161040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000961040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000561040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000d61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000361040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000b61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000761040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000008e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000002e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000ee1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000005e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000be1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000011040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000811040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000411040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000c11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000211040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000611040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000e11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000111040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000911040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000511040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000311040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000b11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000020000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000711040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF93BA0000000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000 00000000000000000000000000FFA6FF0000000000000000000000000000000000000000000000000000000000000000000000f11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000091040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000891040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000491040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000c91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000000000000000000 0000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF097A00000000000000000000000000 000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000291040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000a91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000000000000000000 0000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000691040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF097A000000000000000000000000000000000000000800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF097A000000000000000000000000000000 000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000191040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000991040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000591040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000d91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000391040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000791040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000f91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000851040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000451040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000251040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000a51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00651040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000151040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00951040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000551040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000d51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000351040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000751040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000f51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000008d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000004d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000002d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000ad1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000ed1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000001d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000005d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000dd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000bd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000007d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000031040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000200 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000831040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FFBCE300000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000002000000000000000001000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF1FDB000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000001000000000431040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA23C0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000200FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF0159000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000231040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF607A0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000080000000000000000000000000000000000000000000000000000000a31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9C 8600000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000631040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF9C8600 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000e31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000131040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000931040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000531040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF23FF00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF23 FF0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008000000331040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000b31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000731040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00008b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000cb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000002b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000006b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000000008 0000000080000000080000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000eb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF4CFE0000004000000004000000 0040000000041004000010000000010000000010000000010000000010000000010000000010000000010000000010000000 01000000001000000001000000FF706A00000000000000000000000000000000000004000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFE75600000002000000 0020000000020000000020000000008000000008000000008000000008000000008000000008000000008000000008000000001b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000010 0000000100000000040000000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF5C6D000000008000000008 0000000080000000180000000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000000020000000020000FF859F0000000000000000000000000000000000100000000000000000000000000000009b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF989A2000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF8A9000000000000000000000000000000000002000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF7EFF00000010000000005b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF93C300000000040040040040040040 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFB73D0004004004004004000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF53D600000040040040040040040040000000000000000000000000000000000000000000003b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000bb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF443C0004004004004000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000fb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF7EFF000000100000000100000000100000000100000000040000000040000000040000000040000000040000 0000400000000400000000400000000400000000400000000400000000400000FF997C000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000080000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000071040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000000001 000000001000000001000000001000000001000000001000000001080000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF996900000000800000000800000000800000000800000000200000000200000000200000000200000000 20000000020000000020000000020000000020000000020000000020000000020000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000871040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 1832 TDI (FFFFFFFF0000007A11110000000000000143FFFFFFFFFFFFFF FFFFFFFFFFFFE756000000020000000020000000020000000020000000008000000008000000008000000008000000008000 0000080000000080000000080000000080000000080000000080000000080000FF558E000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000C0000FF60EC000000400000000400000000400000000400000000100000000100000000100000000100000000471040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK; SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-03 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (79); SDR 24 TDI (000000); RUNTEST IDLE 2 TCK 1.00E-01 SEC; //END ================================================ FILE: demo/uart_tx_flash.svf ================================================ //ULX2S / ULX3S JTAG programmer v 3.0.92 (built Sep 19 2020 14:37:22) //START STATE IDLE; STATE RESET; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK; SIR 8 TDI (0e); SDR 8 TDI (01); RUNTEST IDLE 32 TCK 1.00E-01 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); STATE RESET; STATE IDLE; SIR 8 TDI(FF); RUNTEST IDLE 32 TCK; SIR 8 TDI(3A); SDR 16 TDI(68FE); RUNTEST IDLE 32 TCK; SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000001B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000801B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000401B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000c01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000201B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000a01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000601B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000e01B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 16 TDI(00A0) TDO(40FF) MASK(C100); SDR 32 TDI(0000101B); RUNTEST DRPAUSE 5.50E-01 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(20); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF2B8D000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000051B889410000006200000002000000 44C208888200000047000000DCFFFFFFFFCDBDFFFFFF008C1CCC82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF00000040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000800040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000400040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000200040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000a00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000600040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000e00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000100040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000900040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000500040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000d00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000300040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000700040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f00040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000880040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000480040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000280040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000a80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000680040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000e80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFD3590000000000000000000000000000000000000010000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000180040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000980040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000580040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000d80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000380040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000b80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF21790000000000000000000000000000000000000800000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000780040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF21790000000000000000000000 0000000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f80040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000080040 0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF20E4000000000000000000000000200000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000040040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF88920000000000000000000000000008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFF8FD0000000000000000000018 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF80CF00000000000000000000100000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF28460000000000000000840040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF4CD3000000000000400000000000000800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF82BA000000000000200000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000440040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000800001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFF0A00000000000000000000008000010000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF50DE0000000000000000000010 0000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000c40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF527600000000000000000002100000180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF98D700000000000000000000100000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF788F000000000100040000015800041800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF38A900000000000000000000240040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF2DBC000000000000000000041800001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF38B80000000000000400000018000018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF7F3D0000000001000000000138 000218000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004018000000 0008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF3D2100000000000040000000180020180000000008000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFF8FD00000000000000000000180000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFF8FD00000000000000000000180000180000000000000000000000000000000000000000000000640040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF98F5000000000000008000001800001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF217C000000000000000200001800001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF74A30000000000004000000018000818000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF59E1000000000000000000001800e40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FFC88E0000000000000000010000000018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF408100000000000001000100000008180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF3B8F00000000000000040100000000 180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000140040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFC88E000000000000000001000000001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFC3B6000000000000000021020000001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFC88E000000000000000001000000001800000000000000000000000000000000000000000000000000940040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFC88E0000000000000000010000000018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFC88E0000000000000000010000000018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF588300000000000000000000000000180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFFF1A0000000000060000200000000000540040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF208900000000000000000180000000180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF1DCF000000000000000001040000001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFC88E000000000000000001000000001800 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF55D00000000000000000010400000818000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFC36C0000000000020102000000002018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF7BD40000000000000000538800001218000000000000000000000000000000000000000000000000000000340040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF161900000000000200016308000020000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF14B300000000000000400890400000180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF269B000000000000008001400000020000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000b40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FFE574000000000000000001280000251000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF1A2D0000000000000020010200000018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF7EB80000000000000004A08820004008000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000740040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFB63A00000000040000040001000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF68E400000000000000000000000008600000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF765100000000020000000084C00000080000000000000000000000000000000000000000000000000000000000f40040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF A9170000000000002000001440000AA000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFC035000000000000000000008000020000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF2E620000000000004000000000000AA0000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF10CB0000000002000000001440001100000000000c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF8C5A0000000000018000000400000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFCC6200000000020000020010000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF474100000000000080000003200000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 090F000000000000800000144000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF59CD000000000018000000004000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFABA6000000000000C004004000004000000000000000000000000000000000000000000000000000000000000000004c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFCC1A 0000000000018000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF4D0F0000000000018000000440000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF591B00000000000180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF5D2F000000000001A002002420002000000000000000cc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FFF89B00000000000180002200000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 997C000000000001800008000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF591B000000000001800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF35C2 0000000000018000800000000AA0000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF9F7A0000000000018000800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF2F8D0000000000018002D40000000AA0000000000000000000000000000000000000000000000000000000000000000000ac0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF99290000 0000000180000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF3A30000000000018000000000000AA00000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 3964000000000001800000000000200000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF5627000000000001800254000000154000000000000000006c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF919A000000000001000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B 0000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF9CF10000000000010001300000004000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9F210000 0000015580180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8B1100000000000180180180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 53030000000000AB800000000000000000000000000000000000000000000000000000000000000000000000000000000000001c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8B1100000000 0001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF81090000000000AB801801800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8B11 0000000000018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF81090000000000AB8018018000000000000000000000000000009c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF8B110000000000018018018000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB8EE0000 00000001801C0180000040000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8B1100000000000180180180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF005c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5E1400000000 0000041A01840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF526F000000000000001801800000400000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8B11 000000000001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000dc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000010400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF23D30000000000000408011000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF87100000 0000000180080180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF6D9100000000000180080188000000000000000000000000000000003c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF26660000000000A29080C680000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC80900000000 0011880020000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF69F1000000000001824010000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF05D700bc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA12B000000000155 9159558000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5A440000000000A28428888000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80DE0000 0000000004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000080040 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF432100000000 00A28A88AA800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF1C8800000000001001100000000000000000000000000000000000000000fc0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF87BE000000000200800800000800800800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEAE3000000000200 0000002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF8EA40000000000004000002000002000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF389E000000020040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF47C70000000000008008 0000080080080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF4DC0000000000001C01800001801C0180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9D5700000000 000020100000000100100000000000000000000000000000000000000000000000000000000000000000000000000000000000820040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF9D5A000000000001C00000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE1C6000000000000 8000000008008008000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFED74000000000000000000600001001000000000000000000000000000000000420040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF05DD0000000000018018000810018618000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE4D70000000000000018 0040100180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFCF1400000000000000110010100180180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B0000000000c20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF4FE200000000010840188010 1801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF969E000000000000001880001801801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF293A000000000001 801800211041901800000000000000000000000000000000000000000000000000000000000000000000000000000000000000220040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (901800011801 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFE93D000000000101801800001801A018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF939D000000000001A019 0040180180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF926F000000000011801800511841B018000000000000000000000000000000000000a20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF785F000000000001901C8001180180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFD60000000000000180180030 1801A01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF0330000000000001A019640C7A01801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4D3F00000000000100620040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFAA97000000000001E00AC0099801 9818000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF0C66000000000001801804041C01A018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF7DFE0000000000018018 28201841A018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018010018008 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFF747000000000001A01801C0180180080000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF783C00000000000180191190 1001A00800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF34E4000000000001801801A0182180080000000000000000000000000000000000000000120040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFF693000000000001981001801801A01800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF2104000000000201A01001C01001 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF97740000000000018010018018018018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF814E000000000001801800920040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF3120000000000001801801801001A018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF3D7400000000000180080180180180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF9D5F000000000001801001A0 100180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000520040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (11418D180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF0779000000000001801000801801801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF48DF000000000000001801801001 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF3CA3000000000000001801C00801801800000000000000000000000000000000000000000000d20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFD37A0000000000018004200400201200000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFF01800000000000000180402C0010010 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF26E4000000000200341A20B2420120100000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF42B4000000000401C09002A100320040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF2FC00000000002002A800038120020000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFDB0B000000000000940840000080808800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF3CB5000000000001800102002050 090000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF5CE60000000002004C40012212002000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF10960000000000018218239418018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8B42000000000400D00900C04C50C888000000000000000000000000000000000000000000000000720040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF48100000000003442A840031415415400000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF494600000000040041020040000040000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF39810000000000A20080000880AA0AA000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4ECD000000000208A00800A0480000f20040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF02900000000000B21000000AA0AA0AA000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFDA390000000000080020000200000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF8BA20000000000A20220000AA0AA0AA0 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFEB5200000000010180180180180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF28F100000000020024400120000020000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF96B5000000000010888800800800000000000000000000000000000000000000000000000000000000008a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF9AD1000000000081A01A00200200200000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF410D000000000000800810000804000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFE6F20000000000601800000180000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFB59F000000000000C00C00C00C004000004a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF17890000000000000018008410000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFF8FE00000000000100190000100400000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFD11400000000000180190004002004000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF1721000000000001045803881C40010000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFBE5D0000000000118118A8835812042000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF11A10000000000008018108018400400000000000000000000000000000000000000000000000000000000002a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF16C1000000000144841911A959543320000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA1A30000000000A38898C18AB88A0920000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFA48600000000001088B84384180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFD3290000000000B2085805A018C02800000000aa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF967600000000000184380190580004400000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF22250000000000AA801889801CAA088000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FFAFE9000000000001841811801800040000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF612D0000000000108011138058000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF249F0000000000018018018318000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFF54D0000000000008890258298000000000000000000000000000000000000000000000000000000000000000000ea0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFCE 520000000000B30AB8C80AB80000180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF37900000000014C15591011380000180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF83FC000000000001001800001800001800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF3ACE0000000000A38AB821881800000000000000001a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF5B88000000000001001800001A00201800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF15520000000000AB0AB88C0AB8000018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF24940000000000000018420418000018000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA6 56000000000001001800041C0040180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF2DBC00000000000B10180001180000180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF8257000000000001001824001800001800000000000000000000000000000000000000000000000000000000000000005a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF898200 0000000001000000000000001800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF5D44000000000001000010001822001800100000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFF31E0000000000151000000318000018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF83FC000000000001001800001800001800000000000000da0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF0BCC0000000000010019000800000010000800000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B CA00000000000100180000000000500000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFB37700000000000100009008004406380000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA10200 00000000AA8A28000CE800090800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF2BC7000000000001011800040000050000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF133A000000000001801800000000002000000000000000000000000000000000000000000000000000000000000000000000ba0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFEA460000000000559558001158001558000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96 890000000000AA8B28000888000A280000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF4A0700000000010000000002000000000000000000000000007a0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF801D00000000010001000000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF1CA600000000002A8A28000A88000AA800000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0DC8000000 000000800800A008008000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF2A9A0000000000000000002000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB0 F70000000002000000000004000000000000000000000000000000000000000000000000000000000000000000000000000000060040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE0CC000000000200800C00C00800A0000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC16A00 0000000001801801001801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF61E800000000000100000100000020000000000000000000000000860040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFEA9B000000000000001800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC916000000 000000001A012000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF1743000000000000000800800A008000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000460040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF35E10000000000 08800001181A0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF68E900000000000094580180100100000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB90200 000000001000180400100100000000000000000000000000000000000000000000000000000000000000000000000000000000c60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000180 1901001A01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFFE6B000000000001800001101801800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB3B4000000 0000018C0003001A018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF6EA8000000000000802101001801800000000000000000000000000000260040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF65430000000000119058011014018000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF913A0000000000 0180180111180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF03C300000000000180180100980180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB5A00000a60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFE72C00000000000180 B803305801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF0074000000000201801805005801800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0C09000000 000201891A01401801800000000000000000000000000000000000000000000000000000000000000000000000000000000000660040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010240001801 8018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFC16A0000000000018018010018018000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF46710000000000 31809C01401C0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF8560000000010001801801001A018000000000000000000000000000000000e60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF8EF400000000000000100180180180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF28F500000000000000 1801801801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF440C000000000400009001A01801801800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD48300000000160040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF90FE000000000000001801 801A018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF8EF40000000000000010018018018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF28F50000000000 000018018018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000960040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000010012 0180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFEEDE00000000000000100180100180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFF0D400000000000000 1801801201801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8EF400000000000000100180180180180000000000000000000000000000000000560040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF48480000000000001008AD901D418C1800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF82F5000000000000000001 8018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF44DE0000000000000008018010018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB2D3000000000000d60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF511100000000000000190C0000 4008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF137800000000006400100124288190180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFAED200000000002020 1A01023A03A0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000360040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0C10C40C20CA 0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFEE3F000000000000200402200220021000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF1C090000000000000008B0 9808018008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF9FB1000000000400081800020102040000000000000000000000000000000000000000b60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FFDA61000000000100210A20A40A00A008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF1D930000000002342002883012 2900100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFF28200000000002200190388108180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFD4FD0000000000004000760040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF3BDA00000000040C3541202C031220 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF7797000000000200410040000400000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF83D30000000000000A2002 00A082000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f60040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (A00800800800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF32050000000004A80A22160AA0AA0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF830E0000000000C000020A0120 2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFC2790000000000CA0A22804AA0AA00000000000000000000000000000000000000000000000e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFB8D9000000000400800C00C00C00C0080000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF193700000000000184180100180180 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF99B2000000000005208089000200000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFC421000000000200800820008e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF813A000000000210021A01200200200000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF6DA50000000000000408008208008008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF7A580000000000100000001C00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (059418000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF900800000000000080990982304082100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF156C00000000000004B84410100080 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF67980000000000000058A208002208000000000000000000000000000000000000000000000000ce0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFF0D00000000000018A201908B8AB8AB800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF7237000000000001810025001801C01800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFBBF30000000000008001010418018018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFAD6B0000000000008000110458002e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF83820000000000019459551499559558000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF5DD70000000000018A388508D8AB8AB80000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFB97A00000000000180980100180180 180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFF15A000000000001801801089801801800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF74DC0000000000018AB8AB0058ABCAB800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF0B2E0000000000018118410212008018000000000000000000000000000000000000000000000000006e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF6A180000000001238A38030018010818000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF8AAA0000000000018118510559138558000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF65AC00000000011180188110182180180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE293000000000001801801025C018000ee0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF7F020000000000C98A30A10AB02B8AA00000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFECC30000000000099441490CD101914000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF3B88000000000001801011001101800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFF22D00000000000180125100104D8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF19590000000000AF8BB0070AB0018AA0000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF8AF100000000004381000300103384000000000000000000000000000000000000000000000000000000009e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFD20000000000000180100104100180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF6BD200000000000180140512100180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF3797000000000101801001001401C00000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF7EDD000000000001801081001081000000005e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF366E000000000100801005001001802000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF7EB5000000000001801023001201A000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFEDC00000000000018010010810018000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFDD2B00000000000000104404000104000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF9F9200000000000080100180180100000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF81070000000000008010011A1019824000000000000000000000000000000000000000000000000000000000003e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF B724000000000042080482140000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFDD020000000000060AA906800800800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF544A0000000000000010511550540000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF6860000000000130001900000080000000000000be0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF81D50000000001110004110011080000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE14B00000000011185584941515580000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF24C40000000000408AA82094A82280000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 5FDD000000000020000300200000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFC7AA000000000000080050154000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF5F7D80000000008A82AC028008AA800000000000000000000000000000000000000000000000000000000000000000fe0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF9323 0000000000000000000010010010000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF7641000000000000800A008008008008000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000010040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF908A00000000000000000000000000100000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 62BD000000000000800A00C00800C00800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF88DE000000000001801A01801001801800000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000810040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFBA3D0000000000000000012010004000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF9F3C000000000000800C008008018008000000000000000000000000000000000000000000000000000000000000000000410040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF3F7C0000 00040009A01801C0100180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFC15D00000000001180180180100180180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 3509000000000101C01801801801801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF334A00000000000100110180000180180000000000000000c10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FFA25E000000000001801C01801001801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75B9 000000000401801801C014018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF8301000000000101801881C010018018000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000210040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF42440000 00000001901801A0120180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFA25E000000000001801C0180100180180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 49A800000004040180180100100180180000000000000000000000000000000000000000000000000000000000000000000000a10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D55E00000000 0005801801801001801800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF2FC5000000000201901801801203801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2585 000000000201E01841E010058018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF515F000000000001801801801001801800000000000000000000610040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FFCB6C0000000000040012018018018000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF515F0000 0000000180180180100180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFA27B00000000000180184180140180180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00e10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96EC00000000 0000001001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF96EC000000000000001001801801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF65ED 000000000000001401801801800000000000000000000000000000000000000000000000000000000000000000000000000000110040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000400 0010018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF6C60000000000000010018010018000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96EC0000 0000000000100180180180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF96EC0000000000000010018018018000000000000000000000000000910040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF96EC00000000000000100180180180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96EC00000000 0000001001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF561D000000000400001001801801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF561D00510040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6444000000000000 1050C58099208400000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF55110000000000000010018018008000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF96EC0000 000000000010018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000d10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000280000 0002058200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF28B600000000000000000008200002000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAE2400000000 00800A9021959021000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFBE930000000000D022921132320300000000000000000000000000000000310040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF6383000000000020420C00D4CD00800000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2E74000000000200 20228A2040002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5CC30000000000400409008008408000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD7D6000000b10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF0D0C000000000310308B 24A9080080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF365C00000000024424420844020020000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF490D00000000 000000188180182180000000000000000000000000000000000000000000000000000000000000000000000000000000000000710040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00AA0AA0AA42 80AA0AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF3AE000000000035434C294450154154000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF77DB000000000000 4004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF3130000000000000000000020AA0AA000000000000000000000000000000000f10040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFE3E7000000000000800800A908000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF72790000000000AA0AA0 AA1060AA0AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFAB2800000000000000002008200000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3A8C0000000000090040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF866F000000000400C00800C0 0C00400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFDB27000000000001801805911000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9F2F000000000001 200200041000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000890040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (009883800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80A9000000000000001803A012002000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF0C7F0000000000018008 8098880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFA26A0000000004004007000000000000000000000000000000000000000000000000490040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF113900000000000180188380110000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF2AFC00000000000181180180 18A0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF2111000000000001801801900040000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF54E100000000000000c90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF8FD70000000000018AB855807080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFA589000000000001C018118410400000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFC33F0000000000018019 4590900C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000290040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018814100000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF7D2500000000000195595595510C20000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFC8060000000004018ABC8182 90A2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF2B3A00000000000180180180100020000000000000000000000000000000000000000000a90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFE3C3000000000001801201001040000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFFCC6000000000201801801801204 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFECE2000000000001CAB8AB8AB0C80000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF6E10000000000001801800690040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF74FA0000000000AB8AB8AB8810000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF014700000000000180100101500000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF9E0400000000000180180184 100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (100000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF48A00000000000AA0AB8AB833000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF462F0000000001541559558C5000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFC7C4000000000000001801901000000000000000000000000000000000000000000000000000190040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFD50E0000000000000018018C12000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFAFBE000000000000001C01A150002000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF87FB0000000000AA0AB8AB80100000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF97940000000000000018018100990040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF6E8100000001000004180180100000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF9E61000000000000001C85D01200400000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4B45000000000000001901841000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000590040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF550E0000000000000018058010020000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF86EB0000000000000400800010000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFBECD0000000080000200000A10000000000000000000000000000000000000000000000000000000d90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF27D800000000000000980184000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF46BF00000000000004008000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFE0E5000000000000000000001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF9D3400000000000000180180100400390040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FFE3CA000000000000001000210000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF69F40000000000000A28A30008000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF03A70000000000000018099150000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF43B200000000020000900130100000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF1C190000000000001551550C500000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFDE330000000004000A28AA83280000000000000000000000000000000000000000000000000000000000790040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF991A000000000000000200000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF35B5000000000000008008040000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD19E0000000000000000001140000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF0FFC8000000000000A28A2E00800000000f90040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFA29500000000000000080140000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFD096000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF915B000000000000400A00200000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF7A96000000000000001801000000000000000000000000000000000000000000000000000000000000000000850040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF92910000000000000018018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF50B000000000000020180180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE69A0000000000000008000000000000000000450040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF624B00000000008000190180010000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5343000000000100201855800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFB39A000000000000000400000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF625A0000000000400019018001000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE0A10000000001200000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF70540000000000000004540000000000000000000000000000000000000000000000000000000000000000000000250040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF54 F0000000000000001C0188000800000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE95100000000000040180194001000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF93BD000000000100101801800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF521800000000000008180180000000000000000000a50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF9384000000100000201881810000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA4C1000000000000001D418200000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF5F400000000000002019418000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000650040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBA 34000000101801801C0180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFB68800000000000401980180000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF43E8000000000202001C0180000000000000000000000000000000000000000000000000000000000000000000000000e50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF313000 0000021801801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF8931000000001801801801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF89310000000018018018018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF4AF0000000001C01801881810000000000000000000000150040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF89310000000018018018018000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF35 80000000021C01C0180180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF7A30000000001801801C0180000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000950040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5B3B00 0000001801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF8B69000000001A01A01801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF3AB1000000001801801A01A00000000000000000000000000000000000000000000000000000000000000000000000000000550040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF9225000000 241A03AC02000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFC512000000011821805F418100000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF49 3A00000020180180180180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF4F2C0000004018018000004000000000000000000000000000d50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFEA1900000002000008180180000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF91A100 0000000000001821808000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF4DBB000000009801000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000350040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3059000000 400C00C00C008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF042A0000000000222422C00000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7C 150000000018008208010000000000000000000000000000000000000000000000000000000000000000000000000000000000b50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (D20000000000 000A20A200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE623000000200A00A00A01A0000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF988D00 0000001000210208000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF60EA00000000180184182100000000000000000000000000000000750040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFFFB50000000000000A20AA000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB1C9000000 2002003543444000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF773A0000000004004104000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3F00f50040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF37CA0000000008 0081080180080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF3FD20000000000000A20A200000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80FC00 0000000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000040041040 0000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFB742000000400C00C00804C00800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC148000000 0018018018010018000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF9BDB0000000002002002100010000000000000000000000000000000008d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF1D860000000000001058018000800000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF1AA20000000000 0800180580000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA676000000000800800A0100000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC03E00004d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF5D4400000000180180 3800801900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF22C4000000001801800200001800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA2A1000000 001001080001001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001C01809A00 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF15F40000000ABA118A20A20018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA1BF0000000019 2B80001100180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF494700000000180180980180180000000000000000000000000000000000002d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FFCF55000000001805A1180180100000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFE98300000015595594 5B54801000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF4E790000002AB8C18A3AAB801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC03A00000000ad0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF1DF4000000001801C11810 8010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF896E0000002018018018018010000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB43B0000000AB8 AB8A3AA280100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018118010000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF28A40000000118018A38A38A900000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF0AB500000000B92B80 1808801000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFB82500000014180181180180500000000000000000000000000000000000000000ed0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFE4160000000C4049801800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFF5E60000000AA0AB8A38A3 0AA0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF6B2C0000000001039559541540000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA3060000000000001d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF63160000000000018018010000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFA3DB00000000000180181100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF55230000000AA0AB8A B8B30AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF6316000000000001801801000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF6316000000000001801801 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2B1D0000004000898018010000000000000000000000000000000000000000000000005d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF36340000000000018218011000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF63160000000000018018010000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE39C00000020000180000108000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF990B0000000000918000dd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF929100000000000000180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF0935000000000001820001000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFC916000000000001800001 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF5D5B0000000000010001000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF7F2B0000000000AA8A38AA8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF1A9E0000000000000098010000000000000000000000000000000000000000000000000000bd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF15C28000000006AA8A282A80000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF9D9B00000000000100100000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF0BAE000000000155955055800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFB33A0000000000AA8B28AA007d0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFEC520000000000000081000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF40A700000000100000000000000100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFADA3000000000800800A00A00A0080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF2A9A00000000000000000020000000000000000000000000000000000000000000000000000000030040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF6435000000001800A00800800801800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFB39A000000000000000400000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFBBE8000000000800C00A008008008000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFC2D9000000001801801A01801C00830040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FFA1B90000000818810400010010018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFEA9B00000000000000180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000000000180000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000430040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBBB5000000041C01821807801801800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFEB70000000001881811805801801800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF58CC000000001801800201801801800000000000000000000000000000000000000000000000000000c30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FFC355000000041801801A418098018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF2E2E0000000018018018058118018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF4C6C000000001A0180012180180180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF58C60000000818018082018018018000230040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF332600000000185986180180180180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFD84C000000001801801C01801801800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFED2C000000001801801881801801800000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF902B0000000318018018098018418000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFF2CC000000001801801A018018018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF954E000000001801801801E018018000000000000000000000000000000000000000000000000000000000630040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF3002000000020001C0180181000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF0A5E00000001000180181180002180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF62C1000000001801801A00801801800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFEBCB000000001841A0180180980180000000e30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF8913000000000001801801800001800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF89130000000000018018018000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF89130000000000018018018000018000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000130040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF496A00000000020180180180000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF888B00000000000198180180000180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBBD6000000000401A0180180040180000000000000000000000000000000000000000000000000000000000000930040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 2583000000000401800081800001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE752000000000001C00001800001800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF4B32000000000001A018018000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75C7000000000001801901800401800000000000530040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF4E6C000000000289A802018A028B8000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFAF22000000010005A0590B80200180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF496A00000000020180180180000180000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 5E3D0000000000020418820C2004000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF8AE100000000000000190002008A000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF3C7B000000008081880001800001000000000000000000000000000000000000000000000000000000000000000000330040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF48C1 0000000000418418218000018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF05E2000000000400D02C888404048000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF3ACF00000020020930625820020000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF57E00000000000408008018000008000000000000000b30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FFE0880000000AA0000AA0000020AA00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF ACC0000000200030A00A10940000800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF40E9000000200283200343210200000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000730040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFCE69 0000000AA0AA0A20820AA0AA0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF89760000003540103442941521540000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF93D50000000004004000504000000000000000000000000000000000000000000000000000000000000000000000000000f30040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFE8D20000 0000020021000020000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF034200000000080000091480000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 69980000000AA0AA0B20200AA0AA000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFC5130000000000A4008020000000000000000000000000000b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF934B000000440400464400400400000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF1CCF 000000400C00400C00C004000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFF3860000000018400098418000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8F330000 000001000098D000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF19A400000004002000984000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF D77E000000000800002800800000000000000000000000000000000000000000000000000000000000000000000000000000004b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (515A00000000 1800009801800088000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF37260000000018000098A9800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9AEC 0000000019000000019E00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF1357000000001000000001000000000000000000000000000000cb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF5029000000001E000118018000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF487E0000 000018AA0A20AB80000200000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF05B000000000180000000180004000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF002b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF416B00000000 1800201801C00002000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF49EB000000001954145955800154000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7272 0000002018AA0ABAAB8004A8000000000000000000000000000000000000000000000000000000000000000000000000000000ab0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000041800 0118458000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFE770000000001800401A01A000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF50BA0000 0020180000180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF241F0000000018AA0AB8AB8002AA00000000000000000000000000006b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF5BF400000000000101180000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF67D00000008 98000A3809800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF9BF1000000003800001901800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF63A300eb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB71E0000000B2001 8018A00018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2DC80000000AA0018A38AA0018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA2700000 0000000195580C00180000000000000000000000000000000000000000000000000000000000000000000000000000000000001b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004040182B9 20001A0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF536500000000000180180000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF536000000040 0001811800001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF2DC80000000AA0018A38AA001800000000000000000000000000000000009b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FFE54E0000000002018520C0005800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF7983000000000001 801E100038000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFA37B000000200001801800001C000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAEEF0000005b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B140000000000019018 8000184000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF632000000004000188181000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA51800000000 000184804000184000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (014401180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFA29A000000000008001800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3A01000000000001 8500400018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF35A40000000000018001000018000000000000000000000000000000000000003b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF7EBD00000000004A8AA8000AA8000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF78D30000000001008A38000AB80000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFAEB90000000000bb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF60A18000000000AA8A28006A A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF8CCE000000000000001000001000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5450000000000155 9550001558000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF85240000000000004000280000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF20930000000000000080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000fb0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF842D000000000001801929801801A0000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF184200000000000100020100 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFA1A8000000000000800880800800800000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF991A00000000000000070040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF354F000000000000A00801801800 C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF481B0000000000010002000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF67C90000000000008008 008008008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000870040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF3CA700000002000185008180180100000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000000000180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF199A000000000000001C0000000000000000000000000000000000000000000000000000470040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF3165000000020001808001A01801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF59AD000000000011821A81801841 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF2BC50000000000018018618018018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFB24D000000000001A00400c70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFDF3B0000000000518398818018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFFCED000000000001801801A0182180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFC8AE00000002004180041180 180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000270040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF2BE4000000000041807801881801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF7383000000002001C11A15941801 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF5785000000020001841891801801800000000000000000000000000000000000000000000000a70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF2E41000000000041801881C418018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF4A7A000000002043801A038018418000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFE41A000000002001809815A0180180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF2F0D000000000001E018018000670040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF5ACB00000000380580580180180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF56C0000000001841801801801820000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF8246000000000001C1BB7D801801 800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFE85E0000000018019018018018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF294F0000000018018018018018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFEB6E000000001801A018018018000000000000000000000000000000000000000000000000000000170040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF0509000000001801C0180100180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFF130000000001801801A2980180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF2B81000000001801AE1801801800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFDA4E000000001801801C0180180000970040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF82B1000000001801800029801800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF5ACE0000000018018002018018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFE9BE000000001C018018018018000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000570040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFE8D6000000201A85A2C283A9380200800000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFF67A0000000B1A5180180184190002000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFF0CE000000001801801A0180180000000000000000000000000000000000000000000000000000000000d70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFD9B7000000008808866800800800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF0B79000000000002009803092080028000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF38CD0000000300200018800280120000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF8BF9000000081881000001801000000000370040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF294F0000000018018018018018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFBEA1000000408C00C42C88C1081000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF868500000000120020031020020000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF55890000000000AA0A20AA0AA180000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF09EE000000000A00A00A00A00808000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF32E1000000001200210200200222000000000000000000000000000000000000000000000000000000000000770040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FFBF5A0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF0E140000000000AA0A20AA0AA0AA0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFAF8800000000035435435435404400000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF53D60000004004004004004004004000000000f70040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FFE93C00000020020020020020020020000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC63E000000000000808800800800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFCE040000000000AA0B20AA0AA0AA000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF580000000040040048051041A4004000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFB4A7000000400400C80C00C04C004000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFAF6E00000000000580180180180000000000000000000000000000000000000000000000000000000000000000008f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF69 BF00000000000181400300104400000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF41E400000000004000384400002400000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFEA9B000000000000001800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF4231000000000002800888800800000000000000004f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF8D7D00000000002B80188B823800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFE0120000000000010018518018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE10E0000000000418080098018000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2B 6F00000000000180180180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF72F0000002AA2058A202188180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFE3D1000000000081808001809800000000000000000000000000000000000000000000000000000000000000000000002f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFA47900 00000AA0AB8A3AAB8AB800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF767B000000000001801833D11A00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF46230000003543559559559558000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF9F580000000AA131AB3C81823800200000000000000000af0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF74390000000000318099418038000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFDB 6A000000000001811801801C0000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE330000000000001A01801A0180020000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF335500 0000001801801801801801801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFD7A60000000000038A3901821800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFBB5700000000010180180D911800000000000000000000000000000000000000000000000000000000000000000000000000ef0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF6451000000 0018AB8B38AB8AB8018018000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF319900000000184D8018218338018018000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA4 410000000018AB8A38AB8AB80180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF375700000000190195580B90180180180000000000000000001f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFAC8D000000401949801851A0188180180000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF004400 0000001801811C01801801801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFF3A4000000001C01801801801801801800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF1F57000000 0419118402518019018018000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF3144000000041801901C018018018018000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9E EC000000001C218C1A01C0180180180000000000000000000000000000000000000000000000000000000000000000000000005f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (BF0000000018 0180000184380180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF131300000000180180195180380580380000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF2AA00 0000001801801889801803801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF971100000040180182204184180180180000000000000000000000df0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFE421000000000080001910008000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD835000000 1120000098420220000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFF8150000000010010440000010018058000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8C003f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF25DD00000008C9 508AA82A8028AA8AA80000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE10A00000000000000802000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF36C000 000006082E8A38008808AB8AB80000000000000000000000000000000000000000000000000000000000000000000000000000bf0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000001 000C000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF10C70000000AA8AA8A29008AACAA8AA800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF16A6000000 0000000011001500010010000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFB1B300000015595594500B955955D558000000000000000000000000007f0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF80840000000000800000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF2F1400000000000000014000000020000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB0CB0000ff0040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF294F00000000180180 1801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF9266000000001101000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA5F6000000 000800A00800800800000000000000000000000000000000000000000000000000000000000000000000000000000000000000008040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF67D70000000008008008008008000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF525B0000000010 0100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA5F6000000000800A008008008000000000000000000000000000000000000808040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FFE34700000000180180800180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF736700000000181180 0001801000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFEA9B000000000000001800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000408040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF0B40000000001849800001 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2EB70000000018018018A18018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF86B90000000018 418099418018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFED0E000000001801C0180180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF294F00000000180180 1801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF470E000000001801C0000180180000000000000000000000000000000000000000208040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF434E000000001801801801A01800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF2BF6000000001801811801 8098000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFEAB20000000018018018918118000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF294F000000001800a08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFE9E4000000001801A218018098 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE80B00000000180181183180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF2F4A00000000180180 9911A0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000608040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFECE1000000000001811811811801800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF496F000000080001801801 8018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFA23E000000081801841841001800000000000000000000000000000000000000000000e08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF296D0000000000018018018018018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF496F0000000800018018018018 0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF296D00000000000180180180180180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFEB4C000000000001A000108040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF296D00000000000180180180180180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF296D000000000001801801801801800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF296D000000000001801801 801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000908040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (801801800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF646A000000100001800401C018018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF414C000000000001A000018018 0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF3D7A000000400001801801C018018000000000000000000000000000000000000000000000508040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF043900000004800100000180100100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF4916000000000201AA0225A09A0180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFCF1F00000021010180181194592B800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF32CD000000000001A01A0100d08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF02D8000000000080800823880880800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF5A6200000000000004180802A0220000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF165E0000000000000059000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000308040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF30B300000000000184382180180180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF0A0F000000020400C00C80C00C0080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF2D320000002002002A024020000800000000000000000000000000000000000000000000000000b08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF47CE000000000000400400000400000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF7BE70000000AA0AA0A2008088000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFDB3B000000200000A00B20A008008000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFAA93000000200200210205224000708040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF6B5E0000000000000100300800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF76040000000AA0AA0AA0AA0AA00000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFCD1A00000035415434430424C00000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f08040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFEF75000000000000211200001200000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFAF56000000000800000800800800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF160C0000000AA0AA0A20AA0AA000000000000000000000000000000000000000000000000000000000088040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF031A0000000008000018028018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFA2880000004004105884044004000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF7315000000400C00400D40C00C0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFF6C60000000018000090018018000000888040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FFBF2800000000100000100100180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF5858000000000000001900000080000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFA5620000000000080018A0000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000488040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF87780000000019100098018259240000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFC59A0000000018000008C18019000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF64B40000000019800000218618180000000000000000000000000000000000000000000000000000000000c88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFC7800000000018040B38AB8238A200000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF5CC600000000180000880180180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFA51E0000002019020A20AB989808000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF062D000000001C20001001801C0000000000288040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FFE2AD000000001CAA0AA8AB8ABCAA000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF2152000000001850201C01A118080000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF61DB0000002019541449559559540000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFFCED00000005180001180580180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF2C8D000000001800400801C0180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE94E000000001800001A0180180000000000000000000000000000000000000000000000000000000000000000688040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 0D42000000032000154031954001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF3692000000000000001001800001800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFAA750000000818000A38058AB8000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF3C7A0000000038000008B1801800000000000000e88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF6A1D0000000AA0000A30AB8AA0018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF9CF000000008000000008180000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF0A150000000AA0000AB0AB8AA00180000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000188040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 0952000000000000001501800001800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF966B000000000400009001800001800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFF687000000400000001001800001800000000000000000000000000000000000000000000000000000000000000000988040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF8A4C 0000000000000010818800019000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF29720000000000000012818000018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF369200000000000000100180000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF36E00000002002000010018000018000000000000000588040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF8E5E00000000000000110384400180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 04BF00000000000000100B902003800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFFC33000000000000001001820001800000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF805B 0000000000000011000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF8B7C00000000000000182A0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF991C0000000000000010090000058800000000000000000000000000000000000000000000000000000000000000000000388040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF36F90000 00000000055955A0015580000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF62FF0000000000000AA9088000AA80000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 43EF000000000000080000000001000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF6D5A0000000000000AA8448000AA80000000000000000000b88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF708E000000000000000000000400000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9942 80000000000002A8AA8004AA8000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF57640000000000000000004000010000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000788040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF83AA0000 0000000000004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF589900000000000000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 801200000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000f88040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (910000000000 0000200A00C00C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFEB74000000000000003821801800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF976E 0000000000002012000010000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF6EB7000000000000000800800800000000000000000000000000048040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF94990000000000000000004000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA2E20000 0000000000180080180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF708E00000000000000000000040000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00848040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF6AE00000000 0000401801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFFF90000000000100005801041800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000448040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 201A018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF9C80000000000800018218218000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2AED0000 0000000000380180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF02DF000000000000001C418018000000000000000000000000000000c48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FFDA4E000000000000201E0180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF32EF00000000 0000001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF32EF000000000000001801801800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF294F00248040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF793000000000100 011A418018080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF02410000000000000058198018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE94E0000 000000002019018418000000000000000000000000000000000000000000000000000000000000000000000000000000000000a48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000004018 0180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF186F00000000000000180184181000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF32EF00000000 0000001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF548300000000008000BAA180180000000000000000000000000000000000648040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF24A4000000000000400000001800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E5000000000000 0000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFE0E50000000000000000000018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF6AE000000e48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E50000000000000000 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFE0E500000000000000000000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E500000000 000000000000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000148040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFE0E5000000000000000000001800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E5000000000000 0000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFC8E3000000000000006000001800000000000000000000000000000000000000948040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF22C40000000000002000000018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E50000000000000000 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFE0E500000000000000000000180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E50000000000548040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFF05800000000000A00419A00 1060000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFCBB80000001000800800102018C0000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA0E6000000010012 2500C210D810000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (280200200000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF6BC70000000080800080000808080000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFD8DD0000000800000200 2001210000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF3C340000001000000000000080800000000000000000000000000000000000000000348040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF512300000000000020020220000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE0E500000000000000000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF0EE70000000800000020884108C0000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF1B300000000000000b48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF472A000000400400400400000400 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFD9280000000000000AA0400AA0000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF4EFD0000002002002003 30000A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000748040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (AA0AA0000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF8C5A00000000000000010000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBD9F0000000000000AA0AA0A A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF56B900000020020035421415420000000000000000000000000000000000000000000000f48040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF00C2000000001805801941800001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE37E000000201200200200000201 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFC6020000000008008008008000008000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFBD9F0000000000000AA0000c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF92C60000000008008008A08000018000 0001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF5A2300000040140240641040040000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF15B1000000400C00C00C00C0 0400800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF8CAF000000001901011041000001820000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF048A000000000080000000000000 0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF80FC0000000000000000080000000000000000000000000000000000000000000000000000004c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF8B330000000018018018018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF81390000000018018018018220018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFA60300000000180180180181000180000000800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE80B0000000018018098218000cc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF3B6A000000001A01A0180182220180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF8B33000000001801801801800001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFBA91000000201801801A01888001 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFA9110000000018018018018AA0018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFB162000000001801801801B100018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFFC7D000000201801801C019540018000000000000000000000000000000000000000000000000000ac8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF478A00000000190190193180000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE11000000000181381380580000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF5F31000000001801801801C00001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF3160000000001A01A01801800201006c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF0327000000155885805915800155800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF87320000000018018008018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFA02C0000000AB8318318418000AB8000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF46150000000AB8AB8AB8AB8000AB80000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF4B970000000018418A180180000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF46150000000AB8AB8AB8AB8000AB800000000000000000000000000000000000000000000000000000001c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF5D77000000001801A01809C00001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF2E33000000005801801801A00001800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8B330000000018018018018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF4F72000000001801C018018000018000009c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF8B330000000018018018018000018000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8B3300000000180180180180000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF4BFE00000000180180181180000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF8B33000000001801801801800001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF8B33000000001801801801800001800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF8455000000005801801809800001800000000000000000000000000000000000000000000000000000000000dc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF646D0000001808AB9608AA8000208000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFB9CF0000000120001000000001100000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF6F7100000004000001200000000200000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFEDE100000000100180101180000100000000003c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FFA06900000015595585195580015580000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFCB850000000088AA8028AA80008A800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF6999000000400000100001000200000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF818A0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFC9898000000AAEAA804EAA8000AA8000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF519E00000042200100800100042000000000000000000000000000000000000000000000000000000000000000007c8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF58AA00000000000003200000000000000000000000fc8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000828040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFFCC100 0000000000402002000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF70BD0000000000000140040000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000428040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF82BA0000000000002000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF20 9300000000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6A1B00 0000000000000600000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000228040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80 FC00000000000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF80560000000000000000100000000000000000000000000000a28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000628040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000128040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000928040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000528040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000d28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000328040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF77DB0000000000004004000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000728040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000f28040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF5B3B0000000000002002000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF77DB00000000000040 0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF77DB000000000000400400000000000000000000000000000000000000000000008a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000004a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF5B3B000000000000200200 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000002a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF77DB0000000000004004000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000aa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF92910000000000000018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF92910000000000000018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000ea8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF929100000000000000180180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF929100000000000000180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF9291000000000000001801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF9291000000000000001801001a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF9291000000000000001801800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF92910000000000000018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF92910000000000000018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF929100000000000000180180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF929100000000000000180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF9291000000000000001801800000000000000000000000000000000000000000000000000000005a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF9291000000000000001801800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF9291000000000000001801800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF92910000000000000018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF9291000000000000001801800000da8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FFD1BB0000000000000AA8AA8000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF6CDE000000000000155955800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFD1BB0000000000000AA8AA800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFDC97000000000000001001000000000000000000000000000000000000000000000000000000000000ba8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF77DB0000000000004004000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF46FA8000000000004AACAA80000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFDC9700000000000000100100000000007a8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000068040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000868040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000468040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000c68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000268040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000668040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000e68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000168040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000968040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000568040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000368040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000b68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00768040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f68040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B008e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000ce8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000002e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000006e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000ee8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000009e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000005e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000003e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000be8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000fe8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000018040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000818040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000000000000 0000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF097A0000000000000000000000000000000000000008000000000000000000000000000000000000418040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000c18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000218040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000a18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000618040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000118040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000918040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000518040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000318040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000718040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000f18040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000898040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000498040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000298040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000a98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000698040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000198040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000998040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000598040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000d98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000398040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000798040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF86FA000000000000000080 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000f98040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF8C5A00000000000000 010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000858040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000458040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000258040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000a58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000658040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000e58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000158040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000958040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000558040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000d58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000358040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000b58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000758040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f58040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000008d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000002d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000ed8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000005d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00dd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000bd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A007d8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000038040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000838040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000438040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000c38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000238040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000638040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000e38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000138040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000938040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000538040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000338040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000b38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000738040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000f38040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000004b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000cb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000006b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000001b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000009b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000003b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000fb8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000878040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000478040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000c78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000278040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000a78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000678040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000178040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000978040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000578040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000d78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000378040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000778040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000f78040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000008f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000004f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000002f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000af8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000ef8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000001f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000005f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000df8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000007f8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff8040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000804040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000404040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000204040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000604040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000e04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00104040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000904040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000504040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00d04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000304040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000b04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000704040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f04040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000084040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000884040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000484040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000c84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000284040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000684040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000e84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000184040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000984040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000584040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000384040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000b84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000784040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000f84040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000044040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000844040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000444040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000c44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000244040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000644040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000144040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000944040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000544040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000344040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000744040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000f44040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40000c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000004c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000cc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000ac4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000006c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ec4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000001c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000009c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000dc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000003c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000007c4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000fc4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000824040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000424040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000224040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000a24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000624040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000e24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000124040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000924040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000524040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000d24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000324040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000724040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f24040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000008a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000002a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF00aa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000ea4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE001a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000005a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000da4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000ba4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF8C5A0000000000000001000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000007a4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF8C5A000000000000000100000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fa4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000064040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000864040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000464040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000c64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000264040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000664040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000e64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000164040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000964040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000564040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000364040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000b64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000764040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000f64040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000ce4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0004FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000006e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000009e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000003e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000be4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000fe4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000014040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000814040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000414040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000c14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000214040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000a14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000614040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000114040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000914040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000514040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000d14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000314040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000714040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000f14040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000894040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000494040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000294040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000a94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000694040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000e94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000194040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000994040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000594040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000d94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000394040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000794040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f94040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000854040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00454040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000254040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00a54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000654040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000e54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000154040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000954040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000554040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000d54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000354040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000b54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000754040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f54040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000008d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000cd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000002d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ad4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000006d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000ed4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000009d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000005d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000003d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000bd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007d4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000034040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000834040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000434040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000c34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75 DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000234040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000634040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400e34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000134040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000934040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000534040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000334040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000b34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000734040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000f34040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000004b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000cb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000ab4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000006b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000001b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000009b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000db4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000003b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000007b4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000fb4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000874040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000474040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000274040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000004FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000a74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000674040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000174040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000974040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000574040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000d74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000374040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000774040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00f74040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000008f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B004f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000002f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000af4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000ef4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000001f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000005f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000df4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000bf4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000007f4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ff4040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000080c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000c0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000020c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000060c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000e0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000090c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000050c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000b0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000008c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000c8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040028c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000068c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF7500e8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000098c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000058c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000038c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000b8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF83AA000000000000000040 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF83AA0000000000 00000040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000f8c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000004c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000044c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000c4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000a4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000064c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000014c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000094c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000d4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000034c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000074c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000f4c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000008cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000004cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ccc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000acc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ecc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000001cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000dcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF003cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000007cc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00fcc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000082c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000042c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000022c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000a2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000e2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000012c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000052c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000d2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000b2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000072c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f2c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000008ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000cac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000002ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000006ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000eac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000005ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000bac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fac040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000006c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000c6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF750026c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000066c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000e6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000096c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000056c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000036c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000b6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000f6c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000004ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000cec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000004FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000aec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000006ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000001ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000009ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000dec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000003ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000fec040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000004FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000041c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (04FF75DE0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000a1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000011c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0091c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000d1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0031c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000071c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000f1c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000089c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000049c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000029c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000a9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000e9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000019c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000059c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000d9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000b9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000079c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f9c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000005c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000085c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000c5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE000000000000000000000000000000000025c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF75DE0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000e5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000055c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000b5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f5c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40008dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000cdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF75DE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00002dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000adc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF75DE0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000000000000000000000006dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000edc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000009dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000005dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ddc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000003dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000bdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007dc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000fdc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000003c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000043c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000c3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000a3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000063c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000013c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000093c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000d3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000033c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000f3c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000004bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000abc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF006bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ebc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000001bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B009bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000dbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000003bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF80FC00000000000000000800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF80560000000000000000100000000000000000000000000000000000000000007bc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000fbc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000087c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000047c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF689B600000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000027c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000a7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000e7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000017c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000057c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000d7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000b7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000077c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f7c040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000008fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000002fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000afc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000efc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000005fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000bfc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40007fc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffc040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000002040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000802040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000402040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000c02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000202040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000602040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000e02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000102040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000902040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000502040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF80AA004000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF80820020000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000302040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000b02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000702040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000f02040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000082040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000882040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000482040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000c82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000282040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000a82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000682040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000182040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000982040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000582040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF E09A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000382040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000782040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000f82040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF949A 0000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF949A0000 4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000842040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000442040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00c42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000242040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000a42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00642040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000142040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000942040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000542040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000d42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000342040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000742040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000f42040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000008c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000004c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000002c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000ac2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000ec2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF209C00000000002000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF209C000000000020000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000001c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000005c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000dc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000bc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000007c2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF80 B800000000000002000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF408500000000010002000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC49A000000000004000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF048500000000008400000000000000000000000000822040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF4013000000000600000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000422040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF44 F900000000000042000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF84DA00000000000040000000000000000000000000000000000000000000000000000000000000000000000000000000c22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFF31B00 0000000001801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF335E000000000001841800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFF31B0000000000018018000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000222040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFF31B0000000000018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF3 1B00000000000180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF31B00000000000180180000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF375A00 0000000001C01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF375A000000000001C01800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFF31B000000000001801800000000000000000000000000000000000000000000000000000000000000000000000000000000622040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FFF31B000000 0000018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFF31B0000000000018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF3 1B00000000000180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFF31B0000000000018018000000000000000000000000000000e22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF9D9B00000000000100100000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF614100 0000000211A01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF6E34000000000105903800000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000122040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF668C000000 0000888808000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF7A960000000000420020000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80 DE0000000000000400000000000000000000000000000000000000000000000000000000000000000000000000000000000000922040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFF31B00000000000180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2AE000 0000000440C40800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000522040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF806A000000000400000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFEC3A000000000000A008000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000d22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF82BA00 000000000020000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000322040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000002000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8CE3000000000200001000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE69A000000 0000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000b22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFE69A0000000000000008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF482A0000000004 0040100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFE22A00000000040040080000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF529A0000722040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF89A000000 020000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f22040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000401800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFAF840000000001341358000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B0000000000 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000000000000a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF62B600000000002802980000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B00000000000000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF5FB2000000000104105800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2EDA000000008a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF5C620000000000AA4AB800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF2AE20000000002000018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0FEB0000000001 5415580000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF2A6A00000000040000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000000000000000ca2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FFA85B000000000001954000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF591B000000000001800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF923B0000000000000AB8000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B0000000000002a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF21BB0000000000018AA0000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF21BB0000000000018A A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF591B000000000001800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF591B000000000001800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF591B0000000000018000000000000000000000000000000000000000000000000000006a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF591B0000000000018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF591B0000000000018000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF991F00000010000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF691A0000000400018000ea2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF591B00000000000180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF591B000000000001800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA91E000000140001800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000000000009a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF8DDA00000000055580000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF82020000000000AA80000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF82BA000000000000200000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF53030000000000AB800000005a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF80E2000000000200000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF82020000000000AA8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF53BB0000000000012000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF809000000020000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000003a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF24EB000020000400800800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFF31B000000000001801800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF808E0000004000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF2E1B000000000000800800000000ba2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF80E20000000002000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE41A00002000000080080000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFB727000000000105801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF6C8E000000000001105000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000fa2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF95400000000001218018800000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFD00B0000000000039018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF161600000001008190380000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFF31B0000000000018018000000000000062040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FFF5C90000000200D380190000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFF91800000002000B803800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFFE0F000000010001905800000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000862040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFF31B0000000000018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFF31B0000000000018018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF335E0000000000018418000000000000000000000000000000000000000000000000000000000000000000462040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFC31A00000004000180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFDF51000200200009C0180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF8C9B000000022001801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFF779000000000001C2180000000000000000c62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF31B2000001801C01801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF76430000018058098018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF312D000401C01A018018000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000262040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFF14300000180180180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF39C200000180180100180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFF14300000180180180180000000000000000000000000000000000000000000000000000000000000000000000a62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF F143000001801801801800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFF143000001801801801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFF1430000018018018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFF143000001801801801800000000000000000000662040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF3362000001801801A018000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF3362000001801801A0180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFF14300000180180180180000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 2BC0000009889801801000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFBB34000201AC1A21A23800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFEDE5000013811885909800000000000000000000000000000000000000000000000000000000000000000000000000162040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFE824 00010316028220C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF2C9B0000008018008808000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF209C00000000002000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF58FF0000000000000620000000000000000000000000962040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF95C800000100128428C00000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF C147000001801801805800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFDB33000480CA0C00C40800000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000562040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF407F 0000004004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF089A0000000000080000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8DAC000200A00A40A208000000000000000000000000000000000000000000000000000000000000000000000000000000d62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF32230000 000000AA0AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF808400000000008000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 32230000000000AA0AA000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF1FE100020020024C33400000000000000000000000000000362040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF3147000001901801801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4CE8 0000002002000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF2FD30000008008008008000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4FD10000 0081081080180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF443C00040040040040000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 2B74000400C00C00C0080000000000000000000000000000000000000000000000000000000000000000000000000000000000762040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (516800000180 1801829800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF9C88000001011011801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B 0000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF991F000000100001800000000000000000000000000000000000f62040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FFA1620000018018118218000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF605E0000 018018A191580000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF11600000180180185180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF000e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA9EF0000ABAA B88190B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFF1CB000001801E01801800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD6EF 0002AB8AB8478018000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000001A01801 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF62580000AB8AB8AB8AB8000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF63250000 01801811A4180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF77700035595595595580000000000000000000000000000000000004e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FFDDC200004184180100180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8AE100008389 5801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFFD83000001801801401800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF314800ce2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF364B000140051955 9540000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF417A0000 098018AB8AB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFC8200000AA0AB8AB8AA00000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF561E00000A10 5801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFC8200000AA0AB8AB8AA00000000000000000000000000000000000000000ae2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FFD33B000000061801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5CAF000000403801 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5B3B0000006e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFB4280004004038001140 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF853A00000000380000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9B3900040000 180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (300011000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF42BB000000001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF6B3F000000001801 8040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000000000000000000000001e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFD3E10000000008BA8000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF691A0000000400018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF0A1900000009400180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF45DA00000000009e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF86AE00000015595520000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF62E700000012C8A2800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF919A000000000001 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF6A608000000AA8A28000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF55DB0000000000014000000000000000000000000000000000000000000000000000de2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF4989000000200A0080000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF80E200000000020000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF809A000000500000010000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF089A000000000008003e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF48D7000000300980910000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF9F7A000000001801C000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF42330000000000002800 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000be2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF991000000020000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF49FB00000000080080000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000007e2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFE11A000000021819A02000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF82B0000000201800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF23590000000210000020000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B000000000001800000fe2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF41BF0000001418000004000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF86FA00000000180040000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF943A00000000580180000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF43330000002A1801800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF682F000000401801800400000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF943A000000005801800000000000000000000000000000000000000000000000000000000000812040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFCB870000022418818080000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF3BB4000600101E018000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF231600018000190181000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE38E0000024218018000000000412040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FFB308000000220C0180840000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF7774000080301801C00000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF591E000000101801A00000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFF13B0000000018018018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF294F000000121A018098000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF522E000100401801801C000000000000000000000000000000000000000000000000000000000000212040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF331A000000001801A0180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF3142000000001A0180180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFF13B000000001801801800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFF13B00000000180180180000000000a12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FFF13B000000001801801800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFF56A000000001801C118000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFF13B0000000018018018000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000612040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF3142000000001A0180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF88B300000000180000980000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF28C2000000001A0000180000000000000000000000000000000000000000000000000000000000000000e12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FFF959000000000021840000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF9435000108049840001800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFD42C0000242A5A422818000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FFCBFB000010011C01801840000000000000112040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FFAB280000202012020000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF3BF80000000A080080180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF613F00000200600198402000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000912040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF1C2A000000255210001000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF9E39000000025801803800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF7B9C000100400C40CC0800000000000000000000000000000000000000000000000000000000000000000000512040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF137D0002003103542002000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF806C0004001004000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF02820000000000A200000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF542D000200300A00A00A000000000000000000d12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF32830000000400A200000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF3F1B000000022000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF5B8300000000C0AA000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000312040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF854D00000190180D8018018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF996E00020002A2080000010000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF07D00000009008008008008000000000000000000000000000000000000000000000000000000000000000000000b12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FFC9 1C00000010000980200000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF07D000000090080080080080000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFF535000400400402404401000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF3072000400C00C00C00C0080000000000000000000712040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF90C9000001801800001801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFF7510000011010000510018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA95500000000002184C0000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f12040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD8 C800000180180800180180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF894900000180180180180180000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFF14C00000180182180380180000000000000000000000000000000000000000000000000000000000000000000000000092040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FFB73400 0001B5594D955801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF12720002018AB8A38AB801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA341000001801E01801E018000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFABF8000001AAB8A20AB801800000000000000000000000892040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFBB6B000201801811A018018000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF72 730000018AB8A38AB80180000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFDD0A000001801811C0180180000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000492040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC91800 0151901801941801800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF091F00000584D811815801800000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF8949000001801801801801800000000000000000000000000000000000000000000000000000000000000000000000000000c92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF3C030000AB 8AA0A39480AA0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF208B0001498101558521540000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF69 6700000180000180400000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF60D70000018018A38008AB8000000000000000000000000000292040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF987200000180000190000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF855C00 00AB8AA0BB8000AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF46C90000038A2001880000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBB62000001 8000038000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFAD37000001C20009C000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE1 4A00000180000182A0000000000000000000000000000000000000000000000000000000000000000000000000000000000000692040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400000018000 0182000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF0C1F000001C0000240800002000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0E000 0001840010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFDD6200000180000580000000000000000000000000000000000000e92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF98A4000001800000042000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0363000001 8020040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF93B10000018020018120000400000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9900192040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA5B0000AB8000 A280000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC91900 000000001180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000992040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000100001100 0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF5590000155800145000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2A0A0000AA 8000A28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF001A000000000009000200000000000000000000000000000000000000592040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD0990000000000 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF2A088006AA8000A280000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF32C80000d92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF2FF100000020080080 0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF869A080000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE0FE000000 080000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000392040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000400 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFAA10000000200C049008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF24DC1000000018 01801A0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFA2170000001000020800000000000000000000000000000000000000000000b92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF9ADA00000000100180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF2F83000000000A00800800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFB39A00000000792040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF4C6A000000021801D01800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE9EF0000044018000018000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF85B0000000250 000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f92040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (018018000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF35EB00008004390020181000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF27BA00000000580000 1800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF191800004221180188180000000000000000000000000000000000000000000000052040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF9133000000001801809800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA5DB000090021901901810 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFDB330000480118018818000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3E3A000000005800852040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFC22A000000001801811C000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF2832000000001E01801A0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B00000000180180 180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000452040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF6C3C000000431819901800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFEFB3000000009801881800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF313F000000101801801800000000000000000000000000000000000000000000000000c52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF23310000000018018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF23310000000018018000018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF9B3000000002180180000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF23200000005018018000252040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFE348000000001A0180000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE33A000000201801800001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF2331000000001801800001 800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF23310000000018018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF22220004000018019000018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE3330004000018018000018000000000000000000000000000000000000000000000000000652040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFEA8F000010401C5589201180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF2551000000001801E0000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF3AB1000000001800000001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFFBA000000000180010000100e52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FFA621000100004001820002000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF3CD10000000030000000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD4C0000080323B000202038000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000152040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFACD800000029028220000100000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF337D00008802080080000080000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFC9F700000000006988A00800000000000000000000000000000000000000000000000000000000952040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFA32E00020022AA00B10000800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF82E0000000280200224001000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF18B10000000138018000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF7A16000080400C40800400800000552040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF36A80002002803442540000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF273F00040040041040040000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFB5830000000440AA00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFBBA10000000AA0A20AA000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFCE11000000008010080000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFBBA10000000AA0A20AA000000000000000000000000000000000000000000000000000000000000000352040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF17E2000400C04C80C80C000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF8BC30000098218018018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF38D800020120120020020000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFBFD10000008008108008000000000000b52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF9B9A00000800000180000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF365300000080A800800800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF503D0004015B1480480400000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000752040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF284A0000018018000818000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF4EC20000018018000010000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF9F700000001000418000800000000000000000000000000000000000000000000000000000000000000000f52040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFB4DC0002018018A2001AAA00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFD8C200000184180000180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF3AC3000001893811801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFFC96000001881821901900000000000000000d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF90F9000201955955801B54000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF9B21000001903AAB8018AA0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFF15D000001E018018018000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFA138000001801A1180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFD55F0000018AB8A38018AA00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF5302000001829801C01800000000000000000000000000000000000000000000000000000000000000000000004d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF DB910000AB8AB8BB97D800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFF143000001801801801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF28500000018018019038000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF3362000001801801A01800000000000000000000cd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FFC2510000AB8AB8B38AB8018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF8E3E00015595594580180180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF48A800000180100180180180000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 4942000001A01801801801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF52530000AB8AB8A38AB801800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF8949000001801801801801800000000000000000000000000000000000000000000000000000000000000000000000ad2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF9CC7 000001845841801E018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF33DC000009C218018018018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF4C4800001180180180180180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF194B00000180181180180180000000000000000000006d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF384F00000180D84180980180000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF D7C8000001805810003801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF90C9000001801800001801800000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF3FE7 0000010058100058018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF90C90000018018000018018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF155100000181186181180180000000000000000000000000000000000000000000000000000000000000000000000000001d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF80990004 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF25AA0001948088A38AB8AA80000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 8D1A000040000001800000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF5CBB00000A0C2011800000000000000000000000000000009d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FFD992000400230001001000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFECB3 0001559559555559558000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFBF63000020A828AA8AA8AA8000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF089A0000 0000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF82BA00000000000020000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 1B498000AA8AA8A28AA8AA80000000000000000000000000000000000000000000000000000000000000000000000000000000dd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (4C5B00000000 5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF2F83000000000A00800800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF871A0000000020000000000000000000000000000000000000003d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEF720000 00000E0080080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF13B00000000180180180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00bd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B00000000 0001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF591B000000000001800000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEC42 000000001A008008000000000000000000000000000000000000000000000000000000000000000000000000000000000000007d2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000001881 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2F48000000209A018018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF28BF0000 0010180000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF50860000000099000010000000000000000000000000000000000000fd2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FFF14C000000001A4180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE7C300000000 5A00001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF48C0000000081A00001800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF312400032040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFCD2F000000411801 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF36BA0000000038018018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF913C0000 000018218018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000832040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (400018018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF221A00000000D801A0180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF41300000000 3E01A01800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFF12500000060180180180000000000000000000000000000000000000000432040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF24A2000040001201801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEF25000000009881 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF312E0000004018018018000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF253A000000c32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B0000000018018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF31CA000000001C0180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2F2E00000020 988180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000232040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (180180180000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFF1C1000000201C01801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B000000001801 8018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF13B000000001801801800000000000000000000000000000000000000000000a32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FFE8BB0000000018000018000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF3142000000001A018018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFF13B00000000180180180000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B0000000000632040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF7C6700009048182182980800 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF5138000600001801801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE8BB000000001800 001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (808088000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF81C50000000000018D20000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFDA270000880A18800018 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFCD1D000020225A842838800000000000000000000000000000000000000000000000132040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF68BA0000404C2D40C5080000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF5CE100006030024022000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF02FB000000054802801800000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFDCAF00000000212500932040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4D64000200200A00AC0800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF96C400000020020820D0000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFAB3B0000000098058018 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000532040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFC5240002003543542D400000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFB73D00040040040040040000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFC3010000000AA0A200000000000000000000000000000000000000000000000000000000d32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF2FD3000000800800800800000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFBBA10000000AA0A20AA000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFF3A00000000AA0AA0AA000332040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFD875000400C00C00C00C000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF314700000190180180180000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFAB4A00020020021020020000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFE718000000088001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF28F3000002802800800800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF455E000404414580400400000000000000000000000000000000000000000000000000000000732040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FFFDD90000018018418519000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF4EA50000018018200018800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFAEF800000100000200100400000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF1D1B0000000000058300040000f32040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FFCA7E0002019218A20AB80000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFDB33000001801C00001C00000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4A46000001915809801800000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF27350002019559459558000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF5E3A00000180B8ABCAB8000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF614100000180181180180000000000000000000000000000000000000000000000000000000000008b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FFF14300000180180180180000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFF369000001A01801A0180000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF71880000018ABCAB8ABC00000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF0157000001C41801801800000000004b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF545D0000018058A3807800000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF6D400000018918018018000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF00A50001338458119518000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF54510000AB8038A38AB80180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBDE00000959519558D180180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF9CAA000001831011801801800000000000000000000000000000000000000000000000000000000000002b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF72C2000001A13801801801800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFF14C000001921801801801800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF1BD50000AB9018AB8AB8018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF5D48000041801801801801800000000000ab2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF73490000218418018018018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5145000001BA180180180180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF1B00000081809801C0980180000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFAD48000041821809801801800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFB34E000001803824001801800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF86F8000081811800211801800000000000000000000000000000000000000000000000000000000000000000eb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF58D700000002A0018480000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF098D0000018458000410018000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF14C800000180180400180180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF196600000180185182180180000000000000001b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF89C700000100000900000100000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF29690000AA8148A28028AA800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFC994000000100011880000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF18D50000010000011020010000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF8BF3000555955945155D558000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF92440000AA9208AA8288AA80000000000000000000000000000000000000000000000000000000000000000000005b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF02 820000000000A200000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF209A00020000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF0918000000000010000200000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF1B498000AA8AA8A28AA8AA80000000000000000000db2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FFC4F6000001000104000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF2FD30000008008008008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF80 CA00000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF2FD300000080080080080000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF513D000001801A2180180000000000000000000000000000000000000000000000000000000000000000000000000000bb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF8F2300 0001801000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF591B000000000001800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF99620000000002018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF2FD30000008008008008000000000000000000000000007b2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF91DD000001C818018818000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF60 5400000190181190180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE8C300000180180000180000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fb2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF14300 0001801801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFFCFF000041801900001800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF60D7000001C01808001800000000000000000000000000000000000000000000000000000000000000000000000000000000072040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF3160000001 8018018218000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFCD460000019118018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFC1 4200000184180180180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF5D7E0000418219018018000000000000000000000000000000872040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFF14300000180180180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0E4704 0001911801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFF087020001801801841800000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000472040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF60DC000000 0410218018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE9470004018218218018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF1 430000018018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000c72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (3B0000000018 0180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFF13B00000000180180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF313900 0400001801801800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFF13B00000000180180180000000000000000000000000000000000272040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFF13B000000001801801800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B000000 0018018018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFF13B0000000018018018000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF100a72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE8BB0000000018 0000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFF1DF000000401C0180180000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF13B00 000000180180180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000672040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0020245AA820 9800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFEB2E000010109801901800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF75B000000 001801E018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE85F000000401C00001800000000000000000000000000000000000000e72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF59140000000000218080000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF870B0000000080 C180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFF7B10000600E380808100000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF97F80000172040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFAF61000040400D10C0 0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF22F4000200200300200000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBD79000008 000810800800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000972040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (1100A2176000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF518B000000288A008008000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF2CD20002002442 1030800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF01340000000418418018000000000000000000000000000000000000000000572040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FFD3800000AA0AA0AA0AA00000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFEB9900015424435400 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF443C000400400400400000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF37C60000AA00d72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFD9F9000000000810800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF9B810000AA0AA0A20AA0000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000372040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (004000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF4D5C000400400C00C0000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFA3BB00000004180100 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFF00900020020120120000000000000000000000000000000000000000000000000b72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF0F8700000000200190C000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF591B000000000001800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE77A0000000228018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF48FC000400405400772040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF4B350000000018409100000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF44BC00000002982000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFA0BF00000005580100 400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f72040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF68010002000A78A2022000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF6F27000000411801080000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF73320000000018098080000000000000000000000000000000000000000000000000000f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF1DBB000000011801AAA0000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFCC4E0002001559549540000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFB95C000000141AB380000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF8A3A00000000180080008f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFDE79000000001810C0000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF9B42000000001A01800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFB1150000004AB8A28AA000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFD8A10000000AB8A38000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF1A380000000018108000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF5B3B0000000018018000000000000000000000000000000000000000000000000000000000cf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFBA580000018AB8A300180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF3FF6000001955954001800000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF39C2000001801801001800002f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF39C2000001801801001800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF59C30002018018010018000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF625B0000018AB8BB0018000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000af2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF9CC100001188180100180000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF3B4100040980180100180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF36FE000001805901001800000000000000000000000000000000000000000000000000000000006f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FFB314000001841801001900000000000000000000000800000000000000000000000000000000000000000000 0000000000000000000000000002000000000000000000000000000000000000FF81A0000001921801001808000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF3EB20000018018011018800000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF3E7E000001803901001800000000ef2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000002000000000000000000000000000000000000FF750D0001200000018000000000000000000000 0000080000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000 00000000000000FF8ED100000100100100181000000000000000000000080000000000000000000000000000000000000000 00000000000000000000000000000002000000000000000000000000000000000000FFF94B00000180180108180000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0800000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF82EB0000588008AA8AB800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF67CE0000040CC0010000000000000000000000000008000000000000000000000000000000000000009f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF0AC10000AA8AA82A8AA8000000000000000000000008000000000000000000000000000000000000000000000000 000000000000000000000002000000000000000000000000000000000000FFDA930000802880000010000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF5337000155955955D5580000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFDC57000002A428AA8AA80000000000005f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF80A6000000000100000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF82BA000000000000200000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFE7520000008008000008000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF401900000200000002000000000000000000000000000000000000000000000000000000000000000000003f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFE75200000080080000080000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE752000000800800000800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFE84100000380180002180000000000000000bf2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF4F0A000001001000001000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF6CC200000180180400180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000000000ff2040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF E8C3000001801800001800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF36C2000001809800001800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF14C20000018118000018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF6CC200000180180400180000000000000000000000a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FFE8C30000018018000018000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFE8C300000180180000180000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF E8C3000001801800001800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE7C9000001A05800001800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE7C9000001A0580000180000000000000000000000000000000000000000000000000000000000000000000000000040a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FFEA9B 0000000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFEA9B0000000000000018000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE8C300000180180000180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFE8C30000018018000018000000000000000000000000c0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF EA9B000000000000001800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFEA9B000000000000001800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFEA9B 0000000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFEA9B0000000000000018000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFEA9B0000000000000018000000000000000000000000000000000000000000000000000000000000000000000000000000a0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FFEA9B0000 0000000000180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFEA9B00000000000000180000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF EA9B000000000000001800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFEA9B0000000000000018000000000000000000000000000060a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF0E0E000010112000233800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9996 0001200200901018000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FFEA9B0000000000000018000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF808B0000 0000014002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFE09800000002000000200000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF C58D0000800020800818000000000000000000000000000000000000000000000000000000000000000000000000000000000010a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (8A9C00000000 0020001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFE2E6000000000100400800000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF22B0 0002002000002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF741100002808800800980000000000000000000000000000000090a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF682C0000020000000160000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFDAE20000 0001020000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFF18E00035034400032900000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0050a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD9980000AA0A A0000AA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF9FB3000110134200140000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF807D 000400400400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000200200201 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF881A0000000000008000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFD9980000 AA0AA0000AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF4A3B000022000000000000000000000000000000000000000000000030a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF443C00040040040040000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBCBC00040044 0400C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF591B000000000001800000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFF1E900b0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF989D000000020020 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FFF89A0000000200000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B0000 00000001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFA91400000004 0041800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000f0a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF591B000000000001800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF21BB000000000001 8AA0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF591B0000000000018000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B00000008a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF3B2E000200400001A000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFA85B00000000000195400000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE1C200000000 02018AA0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF5D58000400000001C00000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5969000000200201 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF21BB0000000000018AA00000000000000000000000000000000000000000000048a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF5B430000018018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF53030000000000AB8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF591B00000000000180000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF591B0000000000c8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF5B4300000180180180000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF515B0000018018AB800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4F73000001801955 80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (C00000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFFB428000018018018000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF5B430000018018018000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF515B0000018018AB8000000000000000000000000000000000000000000000000000a8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FFE34200000182180180000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFB94200000180180380000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFAB46000001941801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9F020000018018010068a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF2D55000001801801800000000000 0000000000000008000000000000000000000000000000000000000000000000000000000000000000000002000000000000 000000000000000000000000FF1F460000019018058000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF5873000001801801B000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000080000000000000000000000000000000000000000000000000000000000000000000000020000000000000000 00000000000000000000FF96950000000000A000000000000000000000000000080000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000FFE5D400000180180100000000 0000000000000000000800000000000000000000000000000000000000000000000000000000000000000000000200000000 0000000000000000000000000000FF9BCA0000018018018800000000000000000000000000000000000000000000000000000018a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FFB4670000AA8AA80A800000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000002000000000000000000000000000000000000FF806A000000000400000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFABDC0000AB8AB9008000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF228E00000000001400000098a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FFD4630004AAEAA8AA8000000000000000 0000000000080000000000000000000000000000000000000000000000000000000000000000000000020000000000000000 00000000000000000000FF43F400000100144000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFCC3600015595595580000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF8099000400000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000d8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF18C30000018218020000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF10CB0001010000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF415300000080080000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFF29A000080020002000000000038a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF415300000080080000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF80CA000001000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF4153000000800800000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF83220000018010000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000078a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF42C300000180180000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF88C200002180180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF42C3000001801800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF96C200004180180000000000000000f8a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF42C3000001801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF42C30000018018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF42C30000018018000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5C0301000180980000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFBEC200000181180000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF42C30000018018000000000000000000000000000000000000000000000000000000000000000000000084a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF8202010001801800000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF42C3000001801800000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF82C8000001A018000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF82C8000001A0180000000000000000000044a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5B3B00000000180180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF42C300000180180000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5B3B000000001801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF5B3B000000001801800000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF5B3B00000000180180000000000000000000000000000000000000000000000000000000000000000000000024a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF5B3B0000000018018000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5B3B00000000180180000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF5B3B0000000018018000000000000000000000a4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF5B3B00000000180180000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5B3B000000001801800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF5B3B000000001801800000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FFA74D000000309A038000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF2C070000300219018000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF5B3B0000000018018000000000000000000000000000000000000000000000000000000000000000000000000000e4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF4B 6500000800088080000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFA29A00000000000200000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFFFBA0000400218010000000000000000000000000014a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF9E3A000010001801800000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF9D1E000040400C008000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF92530002302890000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF50 BA0000AA04000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFB5FA00000001080080000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFBC520002002C50000000000000000000000000000000000000000000000000000000000000000000000000000000000054a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFA1380000AA0AA000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF53D90001540940000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF4068000400000400000000000000000000000000000000d4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FFE0E30002000002000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFA1380000AA0AA00000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF807D00 0400400400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF807D000400400400000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF709A000000040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF8C9B000000 0500000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF049B000000030000000000000000000000000000000000000074a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FFA8820000000000A800000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFF89A000000020000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF032E0002002AA1020000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000AA0 AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF94E100000000021400000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF37BA00 0200554154000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE11F0000000AA020000000000000000000000000000000000000008ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF806A000000 0004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF8B004ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF59630000018000 0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000180000180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF5963000001800001800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF5963000001 8000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF59630000018000018000000000000000000000000000000000000000002ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF9976000001C000018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF59630000018000 0180000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF996100040180000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF59630000aca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF9968000001A0000180 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF6962000001840001800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF26E5000219 9A00018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (800001810000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF59630000018000018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF41750000018200 8180800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF59630000018000018000000000000000000000000000000000000000000000eca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF81DA00000400000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFDF9A00013000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF6976000001040101800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9973000001001ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFA80A00008A8000AA800000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF472B0000408000 AB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF02FB8000AA8004AA80000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF919A00000000000100 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF0D13000155800155800000000000000000000000000000000000000000000000005ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF80E20000000002000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000dca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF808E00000040000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF8090000000200000000000000000000000000000000000000000000000000000000000bca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FFBC9A0000000100000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF82100000080800000080000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000007ca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF7E0F00000811000001000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fca040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000002a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF809A00006000800000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFDC9D000000010020000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000082a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF8095000000000040000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000c2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000022a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF808B0000000000000100000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF209300000000000000800000000000000000000000000000000000000000000000000000000000000062a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFBC9A00000001000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000e2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF9E9A000000008000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000092a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF809000000020000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000052a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF80900000002000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF835A00000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF817A00000000080000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000032a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF808E000000400000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF416F0000004008000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF42BB000000001800000000000000000000000000b2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FFFABA0000000218000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFF89A00000002000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 42BB000000001800000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF42BB000000001800000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF42BB000000001800000000000000000000000000000000000000000000000000000000000000000000000000000000f2a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF42BB 0000000018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF42BB0000000018000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF42BB00000000180000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF42BB00000000180000000000000000000000000000000aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF835A00000000100000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 835A000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF835A000000001000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4C5B 0000000050000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF835A0000000010000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF835A00000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000004aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF839E0000 0015400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 85580000000A9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF835A00000000100000000000000000000000000000000000caa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF81180000000AA000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF81180000000AA0000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000aaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (209300000000 0000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000006aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF20930000000000000080000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00eaa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000009aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B005aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000daa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000003aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000baa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007aa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000faa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000006a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000046a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000c6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000a6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000066a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000016a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000096a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000d6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000036a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000076a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000f6a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000008ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000004ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000aea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000001ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000dea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000007ea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000fea040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000081a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000041a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000021a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000a1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000e1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000011a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000051a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000d1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000b1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000071a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f1a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000009a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000089a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000c9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000029a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000069a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000e9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000099a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFE09A8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000059a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000b9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f9a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000005a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000c5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF0025a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000065a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00e5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000095a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000055a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000035a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000b5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000f5a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000004da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000cda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000ada040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000006da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000001da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000009da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000dda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000003da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000007da040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000fda040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000043a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000a3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000013a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000d3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400033a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000073a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000f3a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000008ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000004ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000002ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000aba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000eba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000001ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000005ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000dba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000bba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000007ba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fba040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000007a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000087a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000c7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000027a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000067a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000e7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000057a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000b7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f7a040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF008fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000cfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B002fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000afa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000006fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000efa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000009fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000005fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000003fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000bfa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000ffa040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000006040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000806040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000406040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000c06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000206040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000a06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000606040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000106040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000906040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000506040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000d06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000306040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000706040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000f06040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000886040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000486040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000286040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000a86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000686040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000186040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000986040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000586040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000d86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000386040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000786040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000f86040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000846040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000446040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000246040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000a46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000646040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000e46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000146040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000946040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000546040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000d46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000346040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000b46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000746040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f46040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000008c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000002c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000ec6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A 8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000005c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF097A000000000000000000000000000000000000000800000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000bc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF007c6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fc6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000026040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00826040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000426040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000c26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000226040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000626040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000e26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000126040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000926040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000526040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000326040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000b26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000726040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000f26040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000004a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000ca6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000aa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000006a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000001a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000009a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000da6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000003a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007a6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000fa6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000866040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000466040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000266040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000a66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000666040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000166040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000966040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000566040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000d66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000366040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000766040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000f66040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000008e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000004e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000002e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000ae6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000ee6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000001e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000005e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000de6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000be6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000007e6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000016040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000816040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000416040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000216040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000616040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000e16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000116040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000916040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000516040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00d16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000316040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000b16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00716040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f16040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000096040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000896040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000496040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000c96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000296040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000696040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000e96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000196040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000996040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000596040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000396040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000b96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000796040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000f96040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000056040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000856040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000456040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000c56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000256040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000a56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000656040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000156040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000956040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000556040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000356040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000756040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000f56040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000004d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000cd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000ad6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00006d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ed6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000001d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000009d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000dd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000003d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000007d6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000fd6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000836040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000436040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000236040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000a36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000636040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000e36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000136040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000936040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000536040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000d36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000336040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000b36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000736040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f36040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000008b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000002b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000eb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF001b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000005b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00db6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000bb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000007b6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fb6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000076040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000876040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000476040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000c76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000276040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000676040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000e76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000176040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000976040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000576040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000376040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000b76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000776040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000f76040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000004f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000cf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000af6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000006f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ef6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000009f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000df6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000003f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bf6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000ff6040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400000e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000040e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000c0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000a0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000060e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000010e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000090e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000d0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000030e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000070e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000f0e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000088e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000048e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000028e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000a8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000e8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000018e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000058e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000d8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000078e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f8e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000084e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000024e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00a4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000e4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0014e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000054e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000d4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000b4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000074e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f4e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000008ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000cce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000002ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ace040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000006ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000ece040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000009ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000005ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000003ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000bce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007ce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000fce040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000002e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000c2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000062e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000092e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000032e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000b2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000f2e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000004ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000cae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000aae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000006ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000eae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE09A800000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000001ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000009ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000dae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000003ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000007ae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000fae040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000086e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000046e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000026e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000a6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000e6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000016e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000d6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000076e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f6e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000008ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF004ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000002ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00aee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000eee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A800000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000001ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000005ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000dee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000bee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000007ee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fee040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000001e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000081e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000c1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000021e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000061e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000e1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000091e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000051e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000031e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000b1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f1e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000009e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000c9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000069e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000099e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF400059e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000039e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000b9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000f9e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000005e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000045e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000c5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000a5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000065e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000015e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000095e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000d5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000035e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000075e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000f5e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000008de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000004de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000002de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000ade040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ede040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FFE09A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000001de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000dde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000007de040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00fde040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000083e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0043e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000023e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000a3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000e3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000013e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000053e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000d3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000b3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000073e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f3e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000008be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000cbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000002be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000abe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000006be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000ebe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000009be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000005be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000003be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000bbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007be040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fbe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000007e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000c7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000067e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000e7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000097e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000057e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000037e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000b7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000f7e040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000004fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000cfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000afe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000006fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000efe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000001fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000009fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000dfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000003fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000bfe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000007fe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 04FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000ffe040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 04FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000004FF75DE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000801040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000004FF75DE0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000401040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000201040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000a01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000601040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000101040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000901040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000501040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000d01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00301040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000004FF75DE0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000701040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF75DE00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004FF75DE000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00f01040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000881040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000481040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000281040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000a81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000681040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000e81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A80000000000000181040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000981040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000581040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000d81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000381040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000b81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000781040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF75DE00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000004FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000004FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f81040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000041040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000841040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000441040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000c41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000241040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000641040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000e41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000141040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000941040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000541040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000341040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000b41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000004FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000741040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF75DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f41040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000cc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40002c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ac1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000006c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000ec1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000009c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000005c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000dc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000003c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000bc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007c1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000fc1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000021040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000821040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000421040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000c21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000221040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000a21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000621040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000121040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000921040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000521040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000d21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000321040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000721040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000f21040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000004a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ca1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000aa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFE09A8000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ea1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000001a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF009a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000001FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000da1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB003a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ba1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000007a1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000001FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000fa1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000861040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000461040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000261040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000a61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000661040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000001FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000001FF409B00000000000000000000000000000000000000000000000000000000000000000000e61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FFBDCB000000000000000000161040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000961040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000561040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000d61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000361040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000b61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000761040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f61040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000008e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000ce1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000002e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ae1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000006e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE09A80000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000ee1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000005e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000de1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000be1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007e1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fe1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000011040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000811040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000411040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000c11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000211040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000a11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000611040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000e11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000111040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000911040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000511040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000311040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000b11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000020000 00000000000000000000000000000000000000000000000000000000000000000004FF75DE00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000004FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000711040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF93BA0000000000000000000000 0000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000 00000000000000000000000000FFA6FF0000000000000000000000000000000000000000000000000000000000000000000000f11040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000091040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000891040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000491040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000c91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000000000000000000 0000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF097A00000000000000000000000000 000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000291040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000a91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF097A0000000000000000000000000000000000 0000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000691040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF097A000000000000000000000000000000000000000800000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF097A000000000000000000000000000000 000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000191040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000991040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000591040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000d91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000391040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000791040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000f91040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000851040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000451040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000251040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000a51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF00651040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000e51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000151040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00951040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000551040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000d51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000351040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000b51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000751040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000f51040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000008d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000004d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000002d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000ad1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000ed1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000001d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000005d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000dd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000bd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000007d1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000fd1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000031040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000200 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000831040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000FFBCE300000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000002000000000000000001000000000000000 0000FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF1FDB000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000004000000000000000001000000000431040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FFA23C0000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000200FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000c31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (00000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF0159000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000 0000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000231040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF607A0000000000000000000000000000000000000000 000000000000000000000000000000000000000000000080000000000000000000000000000000000000000000000000000000a31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF9C 8600000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000631040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (0000FF9C8600 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000e31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000131040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000931040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000531040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000FF23FF00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000008000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000d31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF23 FF0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008000000331040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (9B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000b31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF4000731040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f31040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00008b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000cb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000002b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ab1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000006b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (008000000008 0000000080000000080000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000eb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF4CFE0000004000000004000000 0040000000041004000010000000010000000010000000010000000010000000010000000010000000010000000010000000 01000000001000000001000000FF706A00000000000000000000000000000000000004000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FFE75600000002000000 0020000000020000000020000000008000000008000000008000000008000000008000000008000000008000000008000000001b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (010000000010 0000000100000000040000000040000000040000000040000000040000000040000000040000000040000000040000000040 0000000400000000400000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF5C6D000000008000000008 0000000080000000180000000020000000020000000020000000020000000020000000020000000020000000020000000020 000000020000000020000000020000FF859F0000000000000000000000000000000000100000000000000000000000000000009b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF989A2000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF8A9000000000000000000000000000000000002000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000FF7EFF00000010000000005b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF93C300000000040040040040040040 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000db1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFB73D0004004004004004000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF53D600000040040040040040040040000000000000000000000000000000000000000000003b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000bb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF443C0004004004004000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007b1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B00000000000000000000000000000000000000000000000000000000000000000000000000fb1040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (000000000000 0000000000FF7EFF000000100000000100000000100000000100000000040000000040000000040000000040000000040000 0000400000000400000000400000000400000000400000000400000000400000FF997C000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000080000FF409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B000000000000000000000000071040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 2080 TDI (001000000001 000000001000000001000000001000000001000000001000000001080000FF409B0000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF996900000000800000000800000000800000000800000000200000000200000000200000000200000000 20000000020000000020000000020000000020000000020000000020000000020000FF409B00000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000871040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SDR 8 TDI(60); SDR 1832 TDI (FFFFFFFF0000007A11110000000000000143FFFFFFFFFFFFFF FFFFFFFFFFFFE756000000020000000020000000020000000020000000008000000008000000008000000008000000008000 0000080000000080000000080000000080000000080000000080000000080000FF558E000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000C0000FF60EC000000400000000400000000400000000400000000100000000100000000100000000100000000471040); RUNTEST DRPAUSE 2.00E-03 SEC; SDR 16 TDI(00A0) TDO(00FF) MASK(C100); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK; SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-03 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (79); SDR 24 TDI (000000); RUNTEST IDLE 2 TCK 1.00E-01 SEC; //END ================================================ FILE: doc/ECP5U25Pinout.csv ================================================ # Pin Out For ECP5U-25,,,,,,,,, # Revision 1.1 - Include CABGA256 package,,,,,,,,, "# Revised Oct. 17, 2017",,,,,,,,, ,,,,,,,,, PAD,Pin/Ball Function,Bank,Dual Function,Differential,High Speed,DQS,CABGA381,CSFBGA285,CABGA256 1,PL2A,7,-,True_OF_PL2B,TRUE,LDQ8,A4,C12,B1 2,PL2B,7,-,Comp_OF_PL2A,TRUE,LDQ8,A5,B12,B2 3,VSSIO7,-,-,-,-,-,-,-,- 4,PL2C,7,-,True_OF_PL2D,-,LDQ8,B5,-,C3 5,VCCIO7,-,-,-,-,-,-,-,- 6,PL2D,7,-,Comp_OF_PL2C,-,LDQ8,C5,-,D3 7,PL5A,7,-,True_OF_PL5B,TRUE,LDQ8,C4,A12,C1 8,VCCAUX,-,-,-,-,-,-,-,- 9,PL5C,7,-,True_OF_PL5D,-,LDQ8,A3,-,E3 10,PL5B,7,-,Comp_OF_PL5A,TRUE,LDQ8,B4,-,C2 11,VSS,-,-,-,-,-,-,-,- 12,PL5D,7,-,Comp_OF_PL5C,-,LDQ8,B3,-,F3 13,PL8A,7,-,True_OF_PL8B,TRUE,LDQS8,E4,D13,D1 14,VCC,-,-,-,-,-,-,-,- 15,PL8C,7,-,True_OF_PL8D,-,LDQ8,C3,-,F4 16,PL8B,7,-,Comp_OF_PL8A,TRUE,LDQSN8,D5,C13,E2 17,VSS,-,-,-,-,-,-,-,- 18,PL8D,7,-,Comp_OF_PL8C,-,LDQ8,D3,-,F5 19,PL11A,7,-,True_OF_PL11B,TRUE,LDQ8,F4,-,G5 20,VSSIO7,-,-,-,-,-,-,-,- 21,PL11C,7,-,True_OF_PL11D,-,LDQ8,E5,-,F2 22,PL11B,7,-,Comp_OF_PL11A,TRUE,LDQ8,E3,-,G4 23,VCCIO7,-,-,-,-,-,-,-,- 24,PL11D,7,-,Comp_OF_PL11C,-,LDQ8,F5,-,E1 25,PL14A,7,-,True_OF_PL14B,TRUE,LDQ20,A2,B13,F1 26,VSSIO7,-,-,-,-,-,-,-,- 27,PL14C,7,VREF1_7,True_OF_PL14D,-,LDQ20,B2,C15,G3 28,PL14B,7,-,Comp_OF_PL14A,TRUE,LDQ20,B1,A13,G2 29,VCCIO7,-,-,-,-,-,-,-,- 30,PL14D,7,-,Comp_OF_PL14C,-,LDQ20,C2,A15,H3 31,PL17A,7,-,True_OF_PL17B,TRUE,LDQ20,C1,D15,H5 32,VCCAUX,-,-,-,-,-,-,-,- 33,PL17C,7,-,True_OF_PL17D,-,LDQ20,D2,-,J4 34,PL17B,7,-,Comp_OF_PL17A,TRUE,LDQ20,D1,D16,H4 35,VSS,-,-,-,-,-,-,-,- 36,PL17D,7,-,Comp_OF_PL17C,-,LDQ20,E1,-,J5 37,PL20A,7,GR_PCLK7_1,True_OF_PL20B,TRUE,LDQS20,H4,B15,G1 38,VCC,-,-,-,-,-,-,-,- 39,PL20C,7,GR_PCLK7_0,True_OF_PL20D,-,LDQ20,H5,C16,J3 40,PL20B,7,-,Comp_OF_PL20A,TRUE,LDQSN20,G5,A16,H2 41,VSS,-,-,-,-,-,-,-,- 42,PL20D,7,-,Comp_OF_PL20C,-,LDQ20,H3,-,K3 43,PL23A,7,PCLKT7_1,True_OF_PL23B,TRUE,LDQ20,G3,A17,J1 44,VSSIO7,-,-,-,-,-,-,-,- 45,PL23C,7,PCLKT7_0,True_OF_PL23D,-,LDQ20,F2,B18,K1 46,PL23B,7,PCLKC7_1,Comp_OF_PL23A,TRUE,LDQ20,F3,B17,J2 47,VCCIO7,-,-,-,-,-,-,-,- 48,PL23D,7,PCLKC7_0,Comp_OF_PL23C,-,LDQ20,E2,C17,K2 49,PL26A,6,PCLKT6_1,True_OF_PL26B,TRUE,LDQ32,G2,D17,L1 50,VSSIO6,-,-,-,-,-,-,-,- 51,PL26C,6,PCLKT6_0,True_OF_PL26D,-,LDQ32,H2,D18,M1 52,PL26B,6,PCLKC6_1,Comp_OF_PL26A,TRUE,LDQ32,F1,C18,L2 53,VCCIO6,-,-,-,-,-,-,-,- 54,PL26D,6,PCLKC6_0,Comp_OF_PL26C,-,LDQ32,G1,F18,M2 55,PL29A,6,GR_PCLK6_0,True_OF_PL29B,TRUE,LDQ32,J4,F17,K4 56,VCCAUX,-,-,-,-,-,-,-,- 57,PL29C,6,GR_PCLK6_1,True_OF_PL29D,-,LDQ32,J3,F15,L4 58,PL29B,6,-,Comp_OF_PL29A,TRUE,LDQ32,J5,F16,K5 59,VSS,-,-,-,-,-,-,-,- 60,PL29D,6,-,Comp_OF_PL29C,-,LDQ32,K3,G16,L5 61,PL32A,6,-,True_OF_PL32B,TRUE,LDQS32,K2,G18,N1 62,VCC,-,-,-,-,-,-,-,- 63,PL32C,6,-,True_OF_PL32D,-,LDQ32,H1,-,L3 64,PL32B,6,-,Comp_OF_PL32A,TRUE,LDQSN32,J1,H17,P2 65,VSS,-,-,-,-,-,-,-,- 66,PL32D,6,-,Comp_OF_PL32C,-,LDQ32,K1,-,M3 67,PL35A,6,-,True_OF_PL35B,TRUE,LDQ32,K4,G15,P1 68,VSSIO6,-,-,-,-,-,-,-,- 69,PL35C,6,-,True_OF_PL35D,-,LDQ32,L4,H16,M4 70,PL35B,6,VREF1_6,Comp_OF_PL35A,TRUE,LDQ32,K5,H15,R1 71,VCCIO6,-,-,-,-,-,-,-,- 72,PL35D,6,-,Comp_OF_PL35C,-,LDQ32,L5,J16,N3 73,PL38A,6,-,True_OF_PL38B,TRUE,LDQ44,M4,-,N4 74,VSSIO6,-,-,-,-,-,-,-,- 75,PL38C,6,-,True_OF_PL38D,-,LDQ44,N4,J17,R2 76,PL38B,6,-,Comp_OF_PL38A,TRUE,LDQ44,N5,-,P3 77,VCCIO6,-,-,-,-,-,-,-,- 78,PL38D,6,-,Comp_OF_PL38C,-,LDQ44,P5,H18,T2 79,PL41A,6,-,True_OF_PL41B,TRUE,LDQ44,N3,J18,P4 80,VCCAUX,-,-,-,-,-,-,-,- 81,PL41C,6,-,True_OF_PL41D,-,LDQ44,L3,K16,R4 82,PL41B,6,-,Comp_OF_PL41A,TRUE,LDQ44,M3,K18,R3 83,VSS,-,-,-,-,-,-,-,- 84,PL41D,6,-,Comp_OF_PL41C,-,LDQ44,L2,K15,T3 85,PL44A,6,-,True_OF_PL44B,TRUE,LDQS44,N2,K17,R5 86,VCC,-,-,-,-,-,-,-,- 87,PL44C,6,-,True_OF_PL44D,-,LDQ44,L1,L15,M5 88,PL44B,6,-,Comp_OF_PL44A,TRUE,LDQSN44,M1,L18,T4 89,VSS,-,-,-,-,-,-,-,- 90,PL44D,6,-,Comp_OF_PL44C,-,LDQ44,N1,L16,N5 91,PL47A,6,-,True_OF_PL47B,TRUE,LDQ44,P1,-,M6 92,VSSIO6,-,-,-,-,-,-,-,- 93,PL47B,6,-,Comp_OF_PL47A,TRUE,LDQ44,P2,-,N6 94,VCCIO6,-,-,-,-,-,-,-,- 95,PL47C,6,LLC_GPLL0T_IN,True_OF_PL47D,-,LDQ44,P3,M16,P6 96,PL47D,6,LLC_GPLL0C_IN,Comp_OF_PL47C,-,LDQ44,P4,M17,P5 97,NC,-,-,-,-,-,-,-,- 98,NC,-,-,-,-,-,-,-,- 99,GND,-,-,-,-,-,-,-,- 100,VCC,-,-,-,-,-,-,-,- 101,VCC,-,-,-,-,-,-,-,- 102,VSS,-,-,-,-,-,-,-,- 103,PB4A,8,D7/IO7,True_OF_PB4B,-,-,R1,N15,T6 104,PB6A,8,D5/MISO2/IO5,True_OF_PB6B,-,-,U1,N17,R7 105,VCC,-,-,-,-,-,-,-,- 106,PB4B,8,D6/IO6,Comp_OF_PB4A,-,-,T1,N16,R6 107,PB6B,8,D4/MOSI2/IO4,Comp_OF_PB6A,-,-,V1,M18,P7 108,VSS,-,-,-,-,-,-,-,- 109,PB9A,8,D3/IO3,True_OF_PB9B,-,-,W1,N18,N7 110,PB11A,8,D1/MISO/IO1,True_OF_PB11B,-,-,V2,T18,T7 111,VSSIO8,-,-,-,-,-,-,-,- 112,PB9B,8,D2/IO2,Comp_OF_PB9A,-,-,Y2,R18,M7 113,PB11B,8,D0/MOSI/IO0,Comp_OF_PB11A,-,-,W2,U18,T8 114,VCCIO8,-,-,-,-,-,-,-,- 115,PB13A,8,SN/CSN,True_OF_PB13B,-,-,T2,R17,R8 116,PB15A,8,HOLDN/DI/BUSY/CSSPIN/CEN,True_OF_PB15B,-,-,R2,U17,N8 117,VSSIO8,-,-,-,-,-,-,-,- 118,PB13B,8,CS1N,Comp_OF_PB13A,-,-,U2,T17,P8 119,PB15B,8,DOUT/CSON,Comp_OF_PB15A,-,-,R3,V17,M8 120,VCCIO8,-,-,-,-,-,-,-,- 121,PB18A,8,WRITEN,-,-,-,T3,R16,M9 122,INITN,8,-,-,-,-,V3,V16,T9 123,VCCAUX,-,-,-,-,-,-,-,- 124,CCLK,8,MCLK/SCK,-,-,-,U3,U16,N9 125,PROGRAMN,8,-,-,-,-,W3,T15,R9 126,VSS,-,-,-,-,-,-,-,- 127,DONE,8,-,-,-,-,Y3,U15,P9 128,CFG_1,8,-,-,-,-,T4,T14,P10 129,VCC,-,-,-,-,-,-,-,- 130,CFG_2,8,-,-,-,-,R4,V15,R10 131,CFG_0,8,-,-,-,-,U4,U14,N10 132,VSS,-,-,-,-,-,-,-,- 133,TDO,40,-,-,-,-,V4,V14,M10 134,TCK,40,-,-,-,-,T5,U13,T10 135,VSSIO8,-,-,-,-,-,-,-,- 136,TDI,40,-,-,-,-,R5,T13,R11 137,TMS,40,-,-,-,-,U5,V13,T11 138,VCCIO8,-,-,-,-,-,-,-,- 139,VCC,-,-,-,-,-,-,-,- 140,VCC,-,-,-,-,-,-,-,- 141,VSS,-,-,-,-,-,-,-,- 142,VSS,-,-,-,-,-,-,-,- 143,VCC,-,-,-,-,-,-,-,- 144,VCC,-,-,-,-,-,-,-,- 145,GND,-,-,-,-,-,-,-,- 146,GND,-,-,-,-,-,-,-,- 147,RESERVED,-,-,-,-,-,W4,V12,- 148,GND,-,-,-,-,-,T7,U12,- 149,RESERVED,-,-,-,-,-,W5,V11,- 150,GND,-,-,-,-,-,-,-,- 151,GND,-,-,-,-,-,-,-,- 152,GND,-,-,-,-,-,Y5,V9,- 153,GND,-,-,-,-,-,-,-,- 154,GND,-,-,-,-,-,T8,U8,- 155,GND,-,-,-,-,-,Y6,V8,- 156,GND,-,-,-,-,-,-,-,- 157,GND,-,-,-,-,-,-,-,- 158,GND,-,-,-,-,-,Y7,V6,- 159,GND,-,-,-,-,-,-,-,- 160,GND,-,-,-,-,-,T9,U6,- 161,GND,-,-,-,-,-,Y8,V5,- 162,GND,-,-,-,-,-,-,-,- 163,GND,-,-,-,-,-,-,-,- 164,RESERVED,-,-,-,-,-,W8,V3,- 165,GND,-,-,-,-,-,T10,T5,- 166,RESERVED,-,-,-,-,-,W9,V2,- 167,GND,-,-,-,-,-,-,-,- 168,GND,-,-,-,-,-,-,-,- 169,RESERVED,-,-,-,-,-,W10,-,- 170,GND,-,-,-,-,-,-,-,- 171,RESERVED,-,-,-,-,-,W11,-,- 172,GND,-,-,-,-,-,-,-,- 173,GND,-,-,-,-,-,-,-,- 174,GND,-,-,-,-,-,Y11,U1,- 175,GND,-,-,-,-,-,-,-,- 176,GND,-,-,-,-,-,Y12,T1,- 177,VCC,-,-,-,-,-,-,-,- 178,VSS,-,-,-,-,-,-,-,- 179,VCC,-,-,-,-,-,-,-,- 180,GND,-,-,-,-,-,-,-,- 181,NC,-,-,-,-,-,-,-,- 182,NC,-,-,-,-,-,-,-,- 183,PR47D,3,LRC_GPLL0C_IN,Comp_OF_PR47C,-,RDQ44,T17,N1,P12 184,PR47C,3,LRC_GPLL0T_IN,True_OF_PR47D,-,RDQ44,U16,M1,P11 185,VCCIO3,-,-,-,-,-,-,-,- 186,PR47B,3,-,Comp_OF_PR47A,TRUE,RDQ44,U17,-,N11 187,VSSIO3,-,-,-,-,-,-,-,- 188,PR47A,3,-,True_OF_PR47B,TRUE,RDQ44,U18,-,M11 189,PR44D,3,-,Comp_OF_PR44C,-,RDQ44,T18,N2,N12 190,VSS,-,-,-,-,-,-,-,- 191,PR44B,3,-,Comp_OF_PR44A,TRUE,RDQSN44,R18,L1,T13 192,PR44C,3,-,True_OF_PR44D,-,RDQ44,U19,M2,M12 193,VCC,-,-,-,-,-,-,-,- 194,PR44A,3,-,True_OF_PR44B,TRUE,RDQS44,T19,K2,R12 195,PR41D,3,-,Comp_OF_PR41C,-,RDQ44,U20,K1,T14 196,VSS,-,-,-,-,-,-,-,- 197,PR41B,3,-,Comp_OF_PR41A,TRUE,RDQ44,R20,L3,R14 198,PR41C,3,-,True_OF_PR41D,-,RDQ44,T20,K3,R13 199,VCCAUX,-,-,-,-,-,-,-,- 200,PR41A,3,-,True_OF_PR41B,TRUE,RDQ44,P20,M3,P13 201,PR38D,3,-,Comp_OF_PR38C,-,RDQ44,P18,N3,T15 202,VCCIO3,-,-,-,-,-,-,-,- 203,PR38B,3,-,Comp_OF_PR38A,TRUE,RDQ44,N20,L4,P14 204,PR38C,3,-,True_OF_PR38D,-,RDQ44,P19,N4,R15 205,VSSIO3,-,-,-,-,-,-,-,- 206,PR38A,3,-,True_OF_PR38B,TRUE,RDQ44,N19,K4,N13 207,PR35D,3,-,Comp_OF_PR35C,-,RDQ32,R17,H1,N14 208,VCCIO3,-,-,-,-,-,-,-,- 209,PR35B,3,VREF1_3,Comp_OF_PR35A,TRUE,RDQ32,P16,J1,R16 210,PR35C,3,-,True_OF_PR35D,-,RDQ32,R16,F1,M13 211,VSSIO3,-,-,-,-,-,-,-,- 212,PR35A,3,-,True_OF_PR35B,TRUE,RDQ32,N17,J2,P16 213,PR32D,3,-,Comp_OF_PR32C,-,RDQ32,P17,-,M14 214,VSS,-,-,-,-,-,-,-,- 215,PR32B,3,-,Comp_OF_PR32A,TRUE,RDQSN32,M17,G1,P15 216,PR32C,3,-,True_OF_PR32D,-,RDQ32,N18,-,L14 217,VCC,-,-,-,-,-,-,-,- 218,PR32A,3,-,True_OF_PR32B,TRUE,RDQS32,N16,F2,N16 219,PR29D,3,-,Comp_OF_PR29C,-,RDQ32,M18,H2,L12 220,VSS,-,-,-,-,-,-,-,- 221,PR29B,3,-,Comp_OF_PR29A,TRUE,RDQ32,L17,G3,K12 222,PR29C,3,GR_PCLK3_1,True_OF_PR29D,-,RDQ32,L18,J3,L13 223,VCCAUX,-,-,-,-,-,-,-,- 224,PR29A,3,GR_PCLK3_0,True_OF_PR29B,TRUE,RDQ32,L16,H3,K13 225,PR26D,3,PCLKC3_0,Comp_OF_PR26C,-,RDQ32,M19,F3,M15 226,VCCIO3,-,-,-,-,-,-,-,- 227,PR26B,3,PCLKC3_1,Comp_OF_PR26A,TRUE,RDQ32,M20,G4,L15 228,PR26C,3,PCLKT3_0,True_OF_PR26D,-,RDQ32,L19,F4,M16 229,VSSIO3,-,-,-,-,-,-,-,- 230,PR26A,3,PCLKT3_1,True_OF_PR26B,TRUE,RDQ32,L20,H4,L16 231,PR23D,2,PCLKC2_0,Comp_OF_PR23C,-,RDQ20,K20,D1,K15 232,VCCIO2,-,-,-,-,-,-,-,- 233,PR23B,2,PCLKC2_1,Comp_OF_PR23A,TRUE,RDQ20,K19,B1,J15 234,PR23C,2,PCLKT2_0,True_OF_PR23D,-,RDQ20,J20,C1,K16 235,VSSIO2,-,-,-,-,-,-,-,- 236,PR23A,2,PCLKT2_1,True_OF_PR23B,TRUE,RDQ20,J19,D2,J16 237,PR20D,2,-,Comp_OF_PR20C,-,RDQ20,K18,-,K14 238,VSS,-,-,-,-,-,-,-,- 239,PR20B,2,-,Comp_OF_PR20A,TRUE,RDQSN20,H20,B2,H15 240,PR20C,2,GR_PCLK2_0,True_OF_PR20D,-,RDQ20,J18,A2,J14 241,VCC,-,-,-,-,-,-,-,- 242,PR20A,2,GR_PCLK2_1,True_OF_PR20B,TRUE,RDQS20,G19,A3,G16 243,PR17D,2,-,Comp_OF_PR17C,-,RDQ20,G20,-,J12 244,VSS,-,-,-,-,-,-,-,- 245,PR17B,2,-,Comp_OF_PR17A,TRUE,RDQ20,F19,C2,H13 246,PR17C,2,-,True_OF_PR17D,-,RDQ20,F20,-,J13 247,VCCAUX,-,-,-,-,-,-,-,- 248,PR17A,2,-,True_OF_PR17B,TRUE,RDQ20,E20,D3,H12 249,PR14D,2,-,Comp_OF_PR14C,-,RDQ20,E19,C3,H14 250,VCCIO2,-,-,-,-,-,-,-,- 251,PR14B,2,-,Comp_OF_PR14A,TRUE,RDQ20,D19,C4,G15 252,PR14C,2,VREF1_2,True_OF_PR14D,-,RDQ20,D20,B4,G14 253,VSSIO2,-,-,-,-,-,-,-,- 254,PR14A,2,-,True_OF_PR14B,TRUE,RDQ20,C20,D4,F16 255,PR11D,2,-,Comp_OF_PR11C,-,RDQ8,J16,-,E16 256,VCCIO2,-,-,-,-,-,-,-,- 257,PR11B,2,-,Comp_OF_PR11A,TRUE,RDQ8,H17,A4,G13 258,PR11C,2,-,True_OF_PR11D,-,RDQ8,J17,-,F15 259,VSSIO2,-,-,-,-,-,-,-,- 260,PR11A,2,-,True_OF_PR11B,TRUE,RDQ8,H18,A6,G12 261,PR8D,2,-,Comp_OF_PR8C,-,RDQ8,H16,-,F12 262,VSS,-,-,-,-,-,-,-,- 263,PR8B,2,-,Comp_OF_PR8A,TRUE,RDQSN8,G18,A7,E15 264,PR8C,2,-,True_OF_PR8D,-,RDQ8,G16,-,F13 265,VCC,-,-,-,-,-,-,-,- 266,PR8A,2,-,True_OF_PR8B,TRUE,RDQS8,F17,B6,D16 267,PR5D,2,-,Comp_OF_PR5C,-,RDQ8,F18,-,F14 268,VSS,-,-,-,-,-,-,-,- 269,PR5B,2,-,Comp_OF_PR5A,TRUE,RDQ8,E17,C6,C15 270,PR5C,2,-,True_OF_PR5D,-,RDQ8,E18,-,E14 271,VCCAUX,-,-,-,-,-,-,-,- 272,PR5A,2,-,True_OF_PR5B,TRUE,RDQ8,D18,D6,C16 273,PR2D,2,-,Comp_OF_PR2C,-,RDQ8,F16,-,D14 274,VCCIO2,-,-,-,-,-,-,-,- 275,PR2C,2,-,True_OF_PR2D,-,RDQ8,E16,-,C14 276,VSSIO2,-,-,-,-,-,-,-,- 277,PR2B,2,S0_IN,Comp_OF_PR2A,TRUE,RDQ8,D17,B7,B15 278,PR2A,2,-,True_OF_PR2B,TRUE,RDQ8,C18,C7,B16 279,GND,-,-,-,-,-,-,-,- 280,VCC,-,-,-,-,-,-,-,- 281,VSS,-,-,-,-,-,-,-,- 282,VCC,-,-,-,-,-,-,-,- 283,PT67B,1,-,Comp_OF_PT67A,-,-,B20,C8,A15 284,VCCIO1,-,-,-,-,-,-,-,- 285,PT65B,1,-,Comp_OF_PT65A,-,-,B19,-,A14 286,PT67A,1,-,True_OF_PT67B,-,-,A19,B8,B14 287,VSSIO1,-,-,-,-,-,-,-,- 288,PT65A,1,-,True_OF_PT65B,-,-,A18,-,A13 289,PT62B,1,-,Comp_OF_PT62A,-,-,B18,-,E13 290,VSS,-,-,-,-,-,-,-,- 291,PT60B,1,-,Comp_OF_PT60A,-,-,C17,-,C13 292,PT62A,1,-,True_OF_PT62B,-,-,A17,-,D13 293,VCC,-,-,-,-,-,-,-,- 294,PT60A,1,-,True_OF_PT60B,-,-,B17,-,B13 295,PT58B,1,-,Comp_OF_PT58A,-,-,D16,-,E12 296,VSS,-,-,-,-,-,-,-,- 297,PT56B,1,-,Comp_OF_PT56A,-,-,B16,-,C12 298,PT58A,1,-,True_OF_PT58B,-,-,C16,-,D12 299,VCCAUX,-,-,-,-,-,-,-,- 300,PT56A,1,-,True_OF_PT56B,-,-,A16,-,B12 301,PT53B,1,-,Comp_OF_PT53A,-,-,E15,-,A12 302,VCCIO1,-,-,-,-,-,-,-,- 303,PT51B,1,-,Comp_OF_PT51A,-,-,C15,-,E11 304,PT53A,1,-,True_OF_PT53B,-,-,D15,-,A11 305,VSSIO1,-,-,-,-,-,-,-,- 306,PT51A,1,-,True_OF_PT51B,-,-,B15,-,D11 307,PT49B,1,-,Comp_OF_PT49A,-,-,E14,-,C11 308,VCCIO1,-,-,-,-,-,-,-,- 309,PT47B,1,-,Comp_OF_PT47A,-,-,C14,-,E10 310,PT49A,1,-,True_OF_PT49B,-,-,D14,-,B11 311,VSSIO1,-,-,-,-,-,-,-,- 312,PT47A,1,-,True_OF_PT47B,-,-,A14,-,D10 313,PT44B,1,-,Comp_OF_PT44A,-,-,E13,-,C10 314,VSS,-,-,-,-,-,-,-,- 315,PT42B,1,-,Comp_OF_PT42A,-,-,C13,-,A10 316,PT44A,1,-,True_OF_PT44B,-,-,D13,-,B10 317,VCC,-,-,-,-,-,-,-,- 318,PT42A,1,-,True_OF_PT42B,-,-,B13,-,A9 319,PT40B,1,-,Comp_OF_PT40A,-,-,A13,-,E9 320,VSS,-,-,-,-,-,-,-,- 321,PT38B,1,GR_PCLK1_1,Comp_OF_PT38A,-,-,E12,-,C9 322,PT40A,1,-,True_OF_PT40B,-,-,A12,-,D9 323,VCCAUX,-,-,-,-,-,-,-,- 324,PT38A,1,GR_PCLK1_0,True_OF_PT38B,-,-,D12,-,B9 325,PT35B,1,PCLKC1_0,Comp_OF_PT35A,-,-,C12,A8,B8 326,VCCIO1,-,-,-,-,-,-,-,- 327,PT33B,1,PCLKC1_1,Comp_OF_PT33A,-,-,E11,C9,D8 328,PT35A,1,PCLKT1_0,True_OF_PT35B,-,-,B12,A9,C8 329,VSSIO1,-,-,-,-,-,-,-,- 330,PT33A,1,PCLKT1_1,True_OF_PT33B,-,-,D11,B9,E8 331,VSS,-,-,-,-,-,-,-,- 332,VCC,-,-,-,-,-,-,-,- 333,PT29B,0,PCLKC0_0,Comp_OF_PT29A,-,-,C11,C10,A8 334,VCCIO0,-,-,-,-,-,-,-,- 335,PT27B,0,PCLKC0_1,Comp_OF_PT27A,-,-,A11,A10,B7 336,PT29A,0,PCLKT0_0,True_OF_PT29B,-,-,B11,B10,A7 337,VSSIO0,-,-,-,-,-,-,-,- 338,PT27A,0,PCLKT0_1,True_OF_PT27B,-,-,A10,A11,C7 339,PT24B,0,GR_PCLK0_0,Comp_OF_PT24A,-,-,B10,-,D7 340,VSS,-,-,-,-,-,-,-,- 341,PT22B,0,-,Comp_OF_PT22A,-,-,C10,-,B6 342,PT24A,0,GR_PCLK0_1,True_OF_PT24B,-,-,A9,-,E7 343,VCC,-,-,-,-,-,-,-,- 344,PT22A,0,-,True_OF_PT22B,-,-,B9,-,C6 345,PT20B,0,-,Comp_OF_PT20A,-,-,E9,-,D6 346,VSS,-,-,-,-,-,-,-,- 347,PT18B,0,-,Comp_OF_PT18A,-,-,A8,-,A6 348,PT20A,0,-,True_OF_PT20B,-,-,D9,-,E6 349,VCCAUX,-,-,-,-,-,-,-,- 350,PT18A,0,-,True_OF_PT18B,-,-,A7,-,A5 351,PT15B,0,-,Comp_OF_PT15A,-,-,B8,-,B5 352,VCCIO0,-,-,-,-,-,-,-,- 353,PT13B,0,-,Comp_OF_PT13A,-,-,D8,-,D5 354,PT15A,0,-,True_OF_PT15B,-,-,C8,-,C5 355,VSSIO0,-,-,-,-,-,-,-,- 356,PT13A,0,-,True_OF_PT13B,-,-,E8,-,E5 357,PT11B,0,-,Comp_OF_PT11A,-,-,C7,-,B4 358,VCCIO0,-,-,-,-,-,-,-,- 359,PT9B,0,-,Comp_OF_PT9A,-,-,D7,-,D4 360,PT11A,0,-,True_OF_PT11B,-,-,C6,-,C4 361,VSSIO0,-,-,-,-,-,-,-,- 362,PT9A,0,-,True_OF_PT9B,-,-,E7,-,E4 363,PT6B,0,-,Comp_OF_PT6A,-,-,D6,-,A4 364,VSS,-,-,-,-,-,-,-,- 365,PT4B,0,-,Comp_OF_PT4A,-,-,B6,C11,B3 366,PT6A,0,-,True_OF_PT6B,-,-,E6,-,A3 367,VCC,-,-,-,-,-,-,-,- 368,PT4A,0,-,True_OF_PT4B,-,-,A6,B11,A2 369,VSS,-,-,-,-,-,-,-,- 370,VCC,-,-,-,-,-,-,-,- 371,VCC,-,-,-,-,-,-,-,- 372,GND,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,C19,G2,A16 0,GND,-,-,-,-,-,H19,L2,H16 0,GND,-,-,-,-,-,R19,B3,T16 0,GND,-,-,-,-,-,G17,E5,D15 0,GND,-,-,-,-,-,M16,F5,N15 0,GND,-,-,-,-,-,G15,K5,T12 0,GND,-,-,-,-,-,K15,L5,G10 0,GND,-,-,-,-,-,N15,F6,H10 0,GND,-,-,-,-,-,B14,G6,J10 0,GND,-,-,-,-,-,F14,H6,K10 0,GND,-,-,-,-,-,G14,J6,F9 0,GND,-,-,-,-,-,J14,K6,H9 0,GND,-,-,-,-,-,K14,L6,J9 0,GND,-,-,-,-,-,M14,M6,K9 0,GND,-,-,-,-,-,N14,E7,F8 0,GND,-,-,-,-,-,P14,F7,G8 0,GND,-,-,-,-,-,F13,G7,H8 0,GND,-,-,-,-,-,G13,H7,J8 0,GND,-,-,-,-,-,P13,J7,K8 0,GND,-,-,-,-,-,G12,K7,K7 0,GND,-,-,-,-,-,J12,L7,K6 0,GND,-,-,-,-,-,K12,M7,T5 0,GND,-,-,-,-,-,L12,N7,D2 0,GND,-,-,-,-,-,M12,E8,N2 0,GND,-,-,-,-,-,P12,F8,A1 0,GND,-,-,-,-,-,G11,G8,H1 0,GND,-,-,-,-,-,J11,H8,T1 0,GND,-,-,-,-,-,K11,J8,- 0,GND,-,-,-,-,-,L11,K8,- 0,GND,-,-,-,-,-,M11,L8,- 0,GND,-,-,-,-,-,P11,M8,- 0,GND,-,-,-,-,-,G10,N8,- 0,GND,-,-,-,-,-,J10,E9,- 0,GND,-,-,-,-,-,K10,F9,- 0,GND,-,-,-,-,-,L10,G9,- 0,GND,-,-,-,-,-,M10,H9,- 0,GND,-,-,-,-,-,G9,J9,- 0,GND,-,-,-,-,-,J9,K9,- 0,GND,-,-,-,-,-,K9,L9,- 0,GND,-,-,-,-,-,L9,M9,- 0,GND,-,-,-,-,-,M9,N9,- 0,GND,-,-,-,-,-,F8,E10,- 0,GND,-,-,-,-,-,G8,F10,- 0,GND,-,-,-,-,-,P8,G10,- 0,GND,-,-,-,-,-,B7,H10,- 0,GND,-,-,-,-,-,F7,J10,- 0,GND,-,-,-,-,-,G7,K10,- 0,GND,-,-,-,-,-,J7,L10,- 0,GND,-,-,-,-,-,K7,M10,- 0,GND,-,-,-,-,-,M7,N10,- 0,GND,-,-,-,-,-,N7,E11,- 0,GND,-,-,-,-,-,P7,F11,- 0,GND,-,-,-,-,-,G6,G11,- 0,GND,-,-,-,-,-,K6,H11,- 0,GND,-,-,-,-,-,N6,J11,- 0,GND,-,-,-,-,-,D4,K11,- 0,GND,-,-,-,-,-,G4,L11,- 0,GND,-,-,-,-,-,J2,M11,- 0,GND,-,-,-,-,-,M2,N11,- 0,GND,-,-,-,-,-,-,E12,- 0,GND,-,-,-,-,-,-,F12,- 0,GND,-,-,-,-,-,-,G12,- 0,GND,-,-,-,-,-,-,H12,- 0,GND,-,-,-,-,-,-,J12,- 0,GND,-,-,-,-,-,-,K12,- 0,GND,-,-,-,-,-,-,L12,- 0,GND,-,-,-,-,-,-,M12,- 0,GND,-,-,-,-,-,-,N12,- 0,GND,-,-,-,-,-,-,F13,- 0,GND,-,-,-,-,-,-,G13,- 0,GND,-,-,-,-,-,-,H13,- 0,GND,-,-,-,-,-,-,J13,- 0,GND,-,-,-,-,-,-,K13,- 0,GND,-,-,-,-,-,-,L13,- 0,GND,-,-,-,-,-,-,M13,- 0,GND,-,-,-,-,-,-,E14,- 0,GND,-,-,-,-,-,-,F14,- 0,GND,-,-,-,-,-,-,K14,- 0,GND,-,-,-,-,-,-,L14,- 0,GND,-,-,-,-,-,-,B16,- 0,GND,-,-,-,-,-,-,T16,- 0,GND,-,-,-,-,-,-,G17,- 0,GND,-,-,-,-,-,-,L17,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,VCC,-,-,-,-,-,H13,J4,L10 0,VCC,-,-,-,-,-,J13,M4,G9 0,VCC,-,-,-,-,-,K13,J5,L9 0,VCC,-,-,-,-,-,L13,P7,L8 0,VCC,-,-,-,-,-,M13,D8,G7 0,VCC,-,-,-,-,-,N13,D9,G6 0,VCC,-,-,-,-,-,H12,P9,- 0,VCC,-,-,-,-,-,N12,D10,- 0,VCC,-,-,-,-,-,H11,D11,- 0,VCC,-,-,-,-,-,N11,P11,- 0,VCC,-,-,-,-,-,H10,J14,- 0,VCC,-,-,-,-,-,N10,J15,- 0,VCC,-,-,-,-,-,H9,M15,- 0,VCC,-,-,-,-,-,N9,-,- 0,VCC,-,-,-,-,-,H8,-,- 0,VCC,-,-,-,-,-,J8,-,- 0,VCC,-,-,-,-,-,K8,-,- 0,VCC,-,-,-,-,-,L8,-,- 0,VCC,-,-,-,-,-,M8,-,- 0,VCC,-,-,-,-,-,N8,-,- 0,VCC,-,-,-,-,-,-,-,- 0,VCC,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,F15,E6,G11 0,VCCAUX,-,-,-,-,-,P15,N6,L7 0,VCCAUX,-,-,-,-,-,F6,E13,- 0,VCCAUX,-,-,-,-,-,P6,P13,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCAUX,-,-,-,-,-,-,-,- 0,VCCIO0,0,-,-,-,-,F10,D12,F7 0,VCCIO0,0,-,-,-,-,F9,-,F6 0,VCCIO0,0,-,-,-,-,-,-,- 0,VCCIO0,0,-,-,-,-,-,-,- 0,VCCIO0,0,-,-,-,-,-,-,- 0,VCCIO0,0,-,-,-,-,-,-,- 0,VCCIO1,1,-,-,-,-,F12,D7,F11 0,VCCIO1,1,-,-,-,-,F11,-,F10 0,VCCIO1,1,-,-,-,-,-,-,- 0,VCCIO1,1,-,-,-,-,-,-,- 0,VCCIO1,1,-,-,-,-,-,-,- 0,VCCIO1,1,-,-,-,-,-,-,- 0,VCCIO2,2,-,-,-,-,H15,G5,H11 0,VCCIO2,2,-,-,-,-,J15,H5,J11 0,VCCIO2,2,-,-,-,-,H14,-,- 0,VCCIO2,2,-,-,-,-,-,-,- 0,VCCIO2,2,-,-,-,-,-,-,- 0,VCCIO2,2,-,-,-,-,-,-,- 0,VCCIO3,3,-,-,-,-,L15,M5,K11 0,VCCIO3,3,-,-,-,-,M15,N5,L11 0,VCCIO3,3,-,-,-,-,L14,-,- 0,VCCIO3,3,-,-,-,-,-,-,- 0,VCCIO3,3,-,-,-,-,-,-,- 0,VCCIO3,3,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,R1,- 0,GND,-,-,-,-,-,V7,R2,- 0,GND,-,-,-,-,-,V8,T2,- 0,GND,-,-,-,-,-,V9,U2,- 0,GND,-,-,-,-,-,-,T3,- 0,GND,-,-,-,-,-,-,U3,- 0,GND,-,-,-,-,-,-,T4,- 0,GND,-,-,-,-,-,-,U4,- 0,GND,-,-,-,-,-,U7,V4,- 0,GND,-,-,-,-,-,U8,U5,- 0,GND,-,-,-,-,-,U9,P6,- 0,GND,-,-,-,-,-,-,T6,- 0,GND,-,-,-,-,-,U10,T7,- 0,GND,-,-,-,-,-,-,U7,- 0,GND,-,-,-,-,-,-,V7,- 0,GND,-,-,-,-,-,V20,P8,- 0,GND,-,-,-,-,-,-,T8,- 0,GND,-,-,-,-,-,-,T9,- 0,GND,-,-,-,-,-,-,U9,- 0,GND,-,-,-,-,-,V5,T10,- 0,GND,-,-,-,-,-,-,U10,- 0,GND,-,-,-,-,-,W6,V10,- 0,GND,-,-,-,-,-,-,T11,- 0,GND,-,-,-,-,-,V6,U11,- 0,GND,-,-,-,-,-,-,P12,- 0,GND,-,-,-,-,-,W7,T12,- 0,GND,-,-,-,-,-,V15,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,W16,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,V16,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,W19,-,- 0,GND,-,-,-,-,-,V19,-,- 0,GND,-,-,-,-,-,V14,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,U14,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,W15,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,U13,-,- 0,GND,-,-,-,-,-,V13,-,- 0,GND,-,-,-,-,-,U12,-,- 0,GND,-,-,-,-,-,V12,-,- 0,GND,-,-,-,-,-,W12,-,- 0,GND,-,-,-,-,-,U11,-,- 0,GND,-,-,-,-,-,U6,P10,- 0,GND,-,-,-,-,-,T6,R10,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,V10,R3,- 0,GND,-,-,-,-,-,V11,P5,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,GND,-,-,-,-,-,-,-,- 0,VCCIO8,8,-,-,-,-,P10,N13,- 0,VCCIO8,8,-,-,-,-,P9,P14,- 0,VCCIO8,8,-,-,-,-,-,-,L6 0,VCCIO8,8,-,-,-,-,-,-,- 0,VCCIO6,6,-,-,-,-,L7,M14,J7 0,VCCIO6,6,-,-,-,-,L6,N14,J6 0,VCCIO6,6,-,-,-,-,M6,-,- 0,VCCIO6,6,-,-,-,-,-,-,- 0,VCCIO6,6,-,-,-,-,-,-,- 0,VCCIO7,7,-,-,-,-,H7,G14,- 0,VCCIO7,7,-,-,-,-,H6,H14,- 0,VCCIO7,7,-,-,-,-,J6,-,- 0,VCCIO7,7,-,-,-,-,-,-,H7 0,VCCIO7,7,-,-,-,-,-,-,H6 0,VCCIO7,7,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,W20,-,- 0,NC,-,-,-,-,-,Y19,-,- 0,NC,-,-,-,-,-,V18,-,- 0,NC,-,-,-,-,-,W18,-,- 0,NC,-,-,-,-,-,K17,-,- 0,NC,-,-,-,-,-,V17,-,- 0,NC,-,-,-,-,-,W17,-,- 0,NC,-,-,-,-,-,Y17,-,- 0,NC,-,-,-,-,-,K16,-,- 0,NC,-,-,-,-,-,T16,-,- 0,NC,-,-,-,-,-,Y16,-,- 0,NC,-,-,-,-,-,A15,-,- 0,NC,-,-,-,-,-,T15,-,- 0,NC,-,-,-,-,-,U15,-,- 0,NC,-,-,-,-,-,Y15,-,- 0,NC,-,-,-,-,-,T14,-,- 0,NC,-,-,-,-,-,W14,-,- 0,NC,-,-,-,-,-,Y14,-,- 0,NC,-,-,-,-,-,T13,-,- 0,NC,-,-,-,-,-,W13,-,- 0,NC,-,-,-,-,-,T12,-,- 0,NC,-,-,-,-,-,T11,-,- 0,NC,-,-,-,-,-,D10,-,- 0,NC,-,-,-,-,-,E10,-,- 0,NC,-,-,-,-,-,C9,-,- 0,NC,-,-,-,-,-,M5,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- 0,NC,-,-,-,-,-,-,-,- ================================================ FILE: doc/LFE5U-25F-5BG256-Pinout.csv ================================================ # Pin Out For ECP5U-25,,,,,,,,,, # Revision 1.1 - Include CABGA256 package,,,,,,,,,, "# Revised Oct. 17, 2017",,,,,,,,,, ,,,,,,,,,, PAD,Bank,Pin/Ball Function,,Dual Function,,High Speed,,DQS,DESC,CABGA256 1,7,PL2A,,,/,HS+,/,LDQ8,PL2A/HS+/LDQ8,B1 2,7,PL2B,,,/,HS-,/,LDQ8,PL2B/HS-/LDQ8,B2 4,7,PL2C,,,/,+,/,LDQ8,PL2C/+/LDQ8,C3 6,7,PL2D,,,/,-,/,LDQ8,PL2D/-/LDQ8,D3 7,7,PL5A,,,/,HS+,/,LDQ8,PL5A/HS+/LDQ8,C1 9,7,PL5C,,,/,-,/,LDQ8,PL5C/-/LDQ8,E3 10,7,PL5B,,,/,HS-,/,LDQ8,PL5B/HS-/LDQ8,C2 12,7,PL5D,,,/,-,/,LDQ8,PL5D/-/LDQ8,F3 13,7,PL8A,,,/,HS+,/,LDQS8,PL8A/HS+/LDQS8,D1 15,7,PL8C,,,/,+,/,LDQ8,PL8C/+/LDQ8,F4 16,7,PL8B,,,/,HS-,/,LDQSN8,PL8B/HS-/LDQSN8,E2 18,7,PL8D,,,/,-,/,LDQ8,PL8D/-/LDQ8,F5 19,7,PL11A,,,/,HS+,/,LDQ8,PL11A/HS+/LDQ8,G5 21,7,PL11C,,,/,-,/,LDQ8,PL11C/-/LDQ8,F2 22,7,PL11B,,,/,HS-,/,LDQ8,PL11B/HS-/LDQ8,G4 24,7,PL11D,,,/,-,/,LDQ8,PL11D/-/LDQ8,E1 25,7,PL14A,,,/,HS+,/,LDQ20,PL14A/HS+/LDQ20,F1 27,7,PL14C,/,VREF1_7,/,+,/,LDQ20,PL14C/VREF1_7/+/LDQ20,G3 28,7,PL14B,,,/,HS-,/,LDQ20,PL14B/HS-/LDQ20,G2 30,7,PL14D,,,/,-,/,LDQ20,PL14D/-/LDQ20,H3 31,7,PL17A,,,/,HS+,/,LDQ20,PL17A/HS+/LDQ20,H5 33,7,PL17C,,,/,+,/,LDQ20,PL17C/+/LDQ20,J4 34,7,PL17B,,,/,HS-,/,LDQ20,PL17B/HS-/LDQ20,H4 36,7,PL17D,,,/,-,/,LDQ20,PL17D/-/LDQ20,J5 37,7,PL20A,/,GR_PCLK7_1,/,HS+,/,LDQS20,PL20A/GR_PCLK7_1/HS+/LDQS20,G1 39,7,PL20C,/,GR_PCLK7_0,/,+,/,LDQ20,PL20C/GR_PCLK7_0/+/LDQ20,J3 40,7,PL20B,,,/,HS-,/,LDQSN20,PL20B/HS-/LDQSN20,H2 42,7,PL20D,,,/,-,/,LDQ20,PL20D/-/LDQ20,K3 43,7,PL23A,/,PCLKT7_1,/,HS+,/,LDQ20,PL23A/PCLKT7_1/HS+/LDQ20,J1 45,7,PL23C,/,PCLKT7_0,/,+,/,LDQ20,PL23C/PCLKT7_0/+/LDQ20,K1 46,7,PL23B,/,PCLKC7_1,/,HS-,/,LDQ20,PL23B/PCLKC7_1/HS-/LDQ20,J2 48,7,PL23D,/,PCLKC7_0,/,-,/,LDQ20,PL23D/PCLKC7_0/-/LDQ20,K2 49,6,PL26A,/,PCLKT6_1,/,HS+,/,LDQ32,PL26A/PCLKT6_1/HS+/LDQ32,L1 51,6,PL26C,/,PCLKT6_0,/,+,/,LDQ32,PL26C/PCLKT6_0/+/LDQ32,M1 52,6,PL26B,/,PCLKC6_1,/,HS-,/,LDQ32,PL26B/PCLKC6_1/HS-/LDQ32,L2 54,6,PL26D,/,PCLKC6_0,/,-,/,LDQ32,PL26D/PCLKC6_0/-/LDQ32,M2 55,6,PL29A,/,GR_PCLK6_0,/,HS+,/,LDQ32,PL29A/GR_PCLK6_0/HS+/LDQ32,K4 57,6,PL29C,/,GR_PCLK6_1,/,+,/,LDQ32,PL29C/GR_PCLK6_1/+/LDQ32,L4 58,6,PL29B,,,/,HS-,/,LDQ32,PL29B/HS-/LDQ32,K5 60,6,PL29D,,,/,-,/,LDQ32,PL29D/-/LDQ32,L5 61,6,PL32A,,,/,HS+,/,LDQS32,PL32A/HS+/LDQS32,N1 63,6,PL32C,,,/,+,/,LDQ32,PL32C/+/LDQ32,L3 64,6,PL32B,,,/,HS-,/,LDQSN32,PL32B/HS-/LDQSN32,P2 66,6,PL32D,,,/,-,/,LDQ32,PL32D/-/LDQ32,M3 67,6,PL35A,,,/,HS+,/,LDQ32,PL35A/HS+/LDQ32,P1 69,6,PL35C,,,/,+,/,LDQ32,PL35C/+/LDQ32,M4 70,6,PL35B,/,VREF1_6,/,HS-,/,LDQ32,PL35B/VREF1_6/HS-/LDQ32,R1 72,6,PL35D,,,/,-,/,LDQ32,PL35D/-/LDQ32,N3 73,6,PL38A,,,/,HS+,/,LDQ44,PL38A/HS+/LDQ44,N4 75,6,PL38C,,,/,+,/,LDQ44,PL38C/+/LDQ44,R2 76,6,PL38B,,,/,HS-,/,LDQ44,PL38B/HS-/LDQ44,P3 78,6,PL38D,,,/,-,/,LDQ44,PL38D/-/LDQ44,T2 79,6,PL41A,,,/,HS+,/,LDQ44,PL41A/HS+/LDQ44,P4 81,6,PL41C,,,/,+,/,LDQ44,PL41C/+/LDQ44,R4 82,6,PL41B,,,/,HS-,/,LDQ44,PL41B/HS-/LDQ44,R3 84,6,PL41D,,,/,-,/,LDQ44,PL41D/-/LDQ44,T3 85,6,PL44A,,,/,HS+,/,LDQS44,PL44A/HS+/LDQS44,R5 87,6,PL44C,,,/,+,/,LDQ44,PL44C/+/LDQ44,M5 88,6,PL44B,,,/,HS-,/,LDQSN44,PL44B/HS-/LDQSN44,T4 90,6,PL44D,,,/,-,/,LDQ44,PL44D/-/LDQ44,N5 91,6,PL47A,,,/,HS+,/,LDQ44,PL47A/HS+/LDQ44,M6 93,6,PL47B,,,/,HS-,/,LDQ44,PL47B/HS-/LDQ44,N6 95,6,PL47C,/,LLC_GPLL0T_IN,/,+,/,LDQ44,PL47C/LLC_GPLL0T_IN/+/LDQ44,P6 96,6,PL47D,/,LLC_GPLL0C_IN,/,-,/,LDQ44,PL47D/LLC_GPLL0C_IN/-/LDQ44,P5 103,8,PB4A,/,D7/IO7,/,+,,,PB4A/D7/IO7/+,T6 104,8,PB6A,/,D5/MISO2/IO5,/,+,,,PB6A/D5/MISO2/IO5/+,R7 106,8,PB4B,/,D6/IO6,/,-,,,PB4B/D6/IO6/-,R6 107,8,PB6B,/,D4/MOSI2/IO4,/,-,,,PB6B/D4/MOSI2/IO4/-,P7 109,8,PB9A,/,D3/IO3,/,+,,,PB9A/D3/IO3/+,N7 110,8,PB11A,/,D1/MISO/IO1,/,+,,,PB11A/D1/MISO/IO1/+,T7 112,8,PB9B,/,D2/IO2,/,-,,,PB9B/D2/IO2/-,M7 113,8,PB11B,/,D0/MOSI/IO0,/,-,,,PB11B/D0/MOSI/IO0/-,T8 115,8,PB13A,/,SN/CSN,/,+,,,PB13A/SN/CSN/+,R8 116,8,PB15A,/,HOLDN/DI/BUSY/CSSPIN/CEN,/,+,,,PB15A/HOLDN/DI/BUSY/CSSPIN/CEN/+,N8 118,8,PB13B,/,CS1N,/,-,,,PB13B/CS1N/-,P8 119,8,PB15B,/,DOUT/CSON,/,-,,,PB15B/DOUT/CSON/-,M8 121,8,PB18A,/,WRITEN,,,,,PB18A/WRITEN,M9 122,8,INITN,,,,,,,INITN,T9 124,8,CCLK,/,MCLK/SCK,,,,,CCLK/MCLK/SCK,N9 125,8,PROGRAMN,,,,,,,PROGRAMN,R9 127,8,DONE,,,,,,,DONE,P9 128,8,CFG_1,,,,,,,CFG_1,P10 130,8,CFG_2,,,,,,,CFG_2,R10 131,8,CFG_0,,,,,,,CFG_0,N10 133,40,TDO,,,,,,,TDO,M10 134,40,TCK,,,,,,,TCK,T10 136,40,TDI,,,,,,,TDI,R11 137,40,TMS,,,,,,,TMS,T11 183,3,PR47D,/,LRC_GPLL0C_IN,/,-,/,RDQ44,PR47D/LRC_GPLL0C_IN/-/RDQ44,P12 184,3,PR47C,/,LRC_GPLL0T_IN,/,+,/,RDQ44,PR47C/LRC_GPLL0T_IN/+/RDQ44,P11 186,3,PR47B,,,/,HS-,/,RDQ44,PR47B/HS-/RDQ44,N11 188,3,PR47A,,,/,HS+,/,RDQ44,PR47A/HS+/RDQ44,M11 189,3,PR44D,,,/,-,/,RDQ44,PR44D/-/RDQ44,N12 191,3,PR44B,,,/,HS-,/,RDQSN44,PR44B/HS-/RDQSN44,T13 192,3,PR44C,,,/,+,/,RDQ44,PR44C/+/RDQ44,M12 194,3,PR44A,,,/,HS+,/,RDQS44,PR44A/HS+/RDQS44,R12 195,3,PR41D,,,/,-,/,RDQ44,PR41D/-/RDQ44,T14 197,3,PR41B,,,/,HS-,/,RDQ44,PR41B/HS-/RDQ44,R14 198,3,PR41C,,,/,+,/,RDQ44,PR41C/+/RDQ44,R13 200,3,PR41A,,,/,HS+,/,RDQ44,PR41A/HS+/RDQ44,P13 201,3,PR38D,,,/,-,/,RDQ44,PR38D/-/RDQ44,T15 203,3,PR38B,,,/,HS,/,RDQ44,PR38B/HS/RDQ44,P14 204,3,PR38C,,,/,+,/,RDQ44,PR38C/+/RDQ44,R15 206,3,PR38A,,,/,HS+,/,RDQ44,PR38A/HS+/RDQ44,N13 207,3,PR35D,,,/,-,/,RDQ32,PR35D/-/RDQ32,N14 209,3,PR35B,/,VREF1_3,/,HS-,/,RDQ32,PR35B/VREF1_3/HS-/RDQ32,R16 210,3,PR35C,,,/,+,/,RDQ32,PR35C/+/RDQ32,M13 212,3,PR35A,,,/,HS+,/,RDQ32,PR35A/HS+/RDQ32,P16 213,3,PR32D,,,/,-,/,RDQ32,PR32D/-/RDQ32,M14 215,3,PR32B,,,/,HS-,/,RDQSN32,PR32B/HS-/RDQSN32,P15 216,3,PR32C,,,/,+,/,RDQ32,PR32C/+/RDQ32,L14 218,3,PR32A,,,/,HS+,/,RDQS32,PR32A/HS+/RDQS32,N16 219,3,PR29D,,,/,-,/,RDQ32,PR29D/-/RDQ32,L12 221,3,PR29B,,,/,HS-,/,RDQ32,PR29B/HS-/RDQ32,K12 222,3,PR29C,/,GR_PCLK3_1,/,+,/,RDQ32,PR29C/GR_PCLK3_1/+/RDQ32,L13 224,3,PR29A,/,GR_PCLK3_0,/,HS+,/,RDQ32,PR29A/GR_PCLK3_0/HS+/RDQ32,K13 225,3,PR26D,/,PCLKC3_0,/,-,/,RDQ32,PR26D/PCLKC3_0/-/RDQ32,M15 227,3,PR26B,/,PCLKC3_1,/,HS-,/,RDQ32,PR26B/PCLKC3_1/HS-/RDQ32,L15 228,3,PR26C,/,PCLKT3_0,/,+,/,RDQ32,PR26C/PCLKT3_0/+/RDQ32,M16 230,3,PR26A,/,PCLKT3_1,/,HS+,/,RDQ32,PR26A/PCLKT3_1/HS+/RDQ32,L16 231,2,PR23D,/,PCLKC2_0,/,-,/,RDQ20,PR23D/PCLKC2_0/-/RDQ20,K15 233,2,PR23B,/,PCLKC2_1,/,HS-,/,RDQ20,PR23B/PCLKC2_1/HS-/RDQ20,J15 234,2,PR23C,/,PCLKT2_0,/,+,/,RDQ20,PR23C/PCLKT2_0/+/RDQ20,K16 236,2,PR23A,/,PCLKT2_1,/,HS+,/,RDQ20,PR23A/PCLKT2_1/HS+/RDQ20,J16 237,2,PR20D,,,/,-,/,RDQ20,PR20D/-/RDQ20,K14 239,2,PR20B,,,/,HS,/,RDQSN20,PR20B/HS/RDQSN20,H15 240,2,PR20C,/,GR_PCLK2_0,/,+,/,RDQ20,PR20C/GR_PCLK2_0/+/RDQ20,J14 242,2,PR20A,/,GR_PCLK2_1,/,HS+,/,RDQS20,PR20A/GR_PCLK2_1/HS+/RDQS20,G16 243,2,PR17D,,,/,-,/,RDQ20,PR17D/-/RDQ20,J12 245,2,PR17B,,,/,HS-,/,RDQ20,PR17B/HS-/RDQ20,H13 246,2,PR17C,,,/,+,/,RDQ20,PR17C/+/RDQ20,J13 248,2,PR17A,,,/,HS+,/,RDQ20,PR17A/HS+/RDQ20,H12 249,2,PR14D,,,/,-,/,RDQ20,PR14D/-/RDQ20,H14 251,2,PR14B,,,/,HS-,/,RDQ20,PR14B/HS-/RDQ20,G15 252,2,PR14C,/,VREF1_2,/,+,/,RDQ20,PR14C/VREF1_2/+/RDQ20,G14 254,2,PR14A,,,/,HS+,/,RDQ20,PR14A/HS+/RDQ20,F16 255,2,PR11D,,,/,-,/,RDQ8,PR11D/-/RDQ8,E16 257,2,PR11B,,,/,HS-,/,RDQ8,PR11B/HS-/RDQ8,G13 258,2,PR11C,,,/,+,/,RDQ8,PR11C/+/RDQ8,F15 260,2,PR11A,,,/,HS+,/,RDQ8,PR11A/HS+/RDQ8,G12 261,2,PR8D,,,/,-,/,RDQ8,PR8D/-/RDQ8,F12 263,2,PR8B,,,/,HS-,/,RDQSN8,PR8B/HS-/RDQSN8,E15 264,2,PR8C,,,/,+,/,RDQ8,PR8C/+/RDQ8,F13 266,2,PR8A,,,/,HS+,/,RDQS8,PR8A/HS+/RDQS8,D16 267,2,PR5D,,,/,-,/,RDQ8,PR5D/-/RDQ8,F14 269,2,PR5B,,,/,HS-,/,RDQ8,PR5B/HS-/RDQ8,C15 270,2,PR5C,,,/,+,/,RDQ8,PR5C/+/RDQ8,E14 272,2,PR5A,,,/,HS+,/,RDQ8,PR5A/HS+/RDQ8,C16 273,2,PR2D,,,/,-,/,RDQ8,PR2D/-/RDQ8,D14 275,2,PR2C,,,/,+,/,RDQ8,PR2C/+/RDQ8,C14 277,2,PR2B,/,S0_IN,/,HS-,/,RDQ8,PR2B/S0_IN/HS-/RDQ8,B15 278,2,PR2A,,,/,HS+,/,RDQ8,PR2A/HS+/RDQ8,B16 283,1,PT67B,,,/,-,,,PT67B/-,A15 285,1,PT65B,,,/,-,,,PT65B/-,A14 286,1,PT67A,,,/,+,,,PT67A/+,B14 288,1,PT65A,,,/,+,,,PT65A/+,A13 289,1,PT62B,,,/,-,,,PT62B/-,E13 291,1,PT60B,,,/,-,,,PT60B/-,C13 292,1,PT62A,,,/,+,,,PT62A/+,D13 294,1,PT60A,,,/,+,,,PT60A/+,B13 295,1,PT58B,,,/,-,,,PT58B/-,E12 297,1,PT56B,,,/,-,,,PT56B/-,C12 298,1,PT58A,,,/,+,,,PT58A/+,D12 300,1,PT56A,,,/,+,,,PT56A/+,B12 301,1,PT53B,,,/,-,,,PT53B/-,A12 303,1,PT51B,,,/,-,,,PT51B/-,E11 304,1,PT53A,,,/,+,,,PT53A/+,A11 306,1,PT51A,,,/,+,,,PT51A/+,D11 307,1,PT49B,,,/,-,,,PT49B/-,C11 309,1,PT47B,,,/,-,,,PT47B/-,E10 310,1,PT49A,,,/,+,,,PT49A/+,B11 312,1,PT47A,,,/,+,,,PT47A/+,D10 313,1,PT44B,,,/,-,,,PT44B/-,C10 315,1,PT42B,,,/,-,,,PT42B/-,A10 316,1,PT44A,,,/,+,,,PT44A/+,B10 318,1,PT42A,,,/,+,,,PT42A/+,A9 319,1,PT40B,,,/,-,,,PT40B/-,E9 321,1,PT38B,/,GR_PCLK1_1,/,-,,,PT38B/GR_PCLK1_1/-,C9 322,1,PT40A,,,/,+,,,PT40A/+,D9 324,1,PT38A,/,GR_PCLK1_0,/,+,,,PT38A/GR_PCLK1_0/+,B9 325,1,PT35B,/,PCLKC1_0,/,-,,,PT35B/PCLKC1_0/-,B8 327,1,PT33B,/,PCLKC1_1,/,-,,,PT33B/PCLKC1_1/-,D8 328,1,PT35A,/,PCLKT1_0,/,+,,,PT35A/PCLKT1_0/+,C8 330,1,PT33A,/,PCLKT1_1,/,+,,,PT33A/PCLKT1_1/+,E8 333,0,PT29B,/,PCLKC0_0,/,-,,,PT29B/PCLKC0_0/-,A8 335,0,PT27B,/,PCLKC0_1,/,-,,,PT27B/PCLKC0_1/-,B7 336,0,PT29A,/,PCLKT0_0,/,+,,,PT29A/PCLKT0_0/+,A7 338,0,PT27A,/,PCLKT0_1,/,+,,,PT27A/PCLKT0_1/+,C7 339,0,PT24B,/,GR_PCLK0_0,/,-,,,PT24B/GR_PCLK0_0/-,D7 341,0,PT22B,,,/,-,,,PT22B/-,B6 342,0,PT24A,/,GR_PCLK0_1,/,+,,,PT24A/GR_PCLK0_1/+,E7 344,0,PT22A,,,/,+,,,PT22A/+,C6 345,0,PT20B,,,/,-,,,PT20B/-,D6 347,0,PT18B,,,/,-,,,PT18B/-,A6 348,0,PT20A,,,/,+,,,PT20A/+,E6 350,0,PT18A,,,/,+,,,PT18A/+,A5 351,0,PT15B,,,/,-,,,PT15B/-,B5 353,0,PT13B,,,/,-,,,PT13B/-,D5 354,0,PT15A,,,/,+,,,PT15A/+,C5 356,0,PT13A,,,/,+,,,PT13A/+,E5 357,0,PT11B,,,/,-,,,PT11B/-,B4 359,0,PT9B,,,/,-,,,PT9B/-,D4 360,0,PT11A,,,/,+,,,PT11A/+,C4 362,0,PT9A,,,/,+,,,PT9A/+,E4 363,0,PT6B,,,/,-,,,PT6B/-,A4 365,0,PT4B,,,/,-,,,PT4B/-,B3 366,0,PT6A,,,/,+,,,PT6A/+,A3 368,0,PT4A,,,/,+,,,PT4A/+,A2 0,-,GND,,,,,,,GND,A16 0,-,GND,,,,,,,GND,H16 0,-,GND,,,,,,,GND,T16 0,-,GND,,,,,,,GND,D15 0,-,GND,,,,,,,GND,N15 0,-,GND,,,,,,,GND,T12 0,-,GND,,,,,,,GND,G10 0,-,GND,,,,,,,GND,H10 0,-,GND,,,,,,,GND,J10 0,-,GND,,,,,,,GND,K10 0,-,GND,,,,,,,GND,F9 0,-,GND,,,,,,,GND,H9 0,-,GND,,,,,,,GND,J9 0,-,GND,,,,,,,GND,K9 0,-,GND,,,,,,,GND,F8 0,-,GND,,,,,,,GND,G8 0,-,GND,,,,,,,GND,H8 0,-,GND,,,,,,,GND,J8 0,-,GND,,,,,,,GND,K8 0,-,GND,,,,,,,GND,K7 0,-,GND,,,,,,,GND,K6 0,-,GND,,,,,,,GND,T5 0,-,GND,,,,,,,GND,D2 0,-,GND,,,,,,,GND,N2 0,-,GND,,,,,,,GND,A1 0,-,GND,,,,,,,GND,H1 0,-,GND,,,,,,,GND,T1 0,-,VCC,,,,,,,VCC,L10 0,-,VCC,,,,,,,VCC,G9 0,-,VCC,,,,,,,VCC,L9 0,-,VCC,,,,,,,VCC,L8 0,-,VCC,,,,,,,VCC,G7 0,-,VCC,,,,,,,VCC,G6 0,-,VCCAUX,,,,,,,VCCAUX,G11 0,-,VCCAUX,,,,,,,VCCAUX,L7 0,0,VCCIO0,,,,,,,VCCIO0,F7 0,0,VCCIO0,,,,,,,VCCIO0,F6 0,1,VCCIO1,,,,,,,VCCIO1,F11 0,1,VCCIO1,,,,,,,VCCIO1,F10 0,2,VCCIO2,,,,,,,VCCIO2,H11 0,2,VCCIO2,,,,,,,VCCIO2,J11 0,3,VCCIO3,,,,,,,VCCIO3,K11 0,3,VCCIO3,,,,,,,VCCIO3,L11 0,8,VCCIO8,,,,,,,VCCIO8,L6 0,6,VCCIO6,,,,,,,VCCIO6,J7 0,6,VCCIO6,,,,,,,VCCIO6,J6 0,7,VCCIO7,,,,,,,VCCIO7,H7 0,7,VCCIO7,,,,,,,VCCIO7,H6 ================================================ FILE: firmware/README.md ================================================ this 128KB firmware include usb-hid & usb-cdc device ================================================ FILE: linux/README.md ================================================ ## How-To-Boot-Linux 1. program the bitstream `$icesprog ../demo/linux-with-litex.bit` 2. put system files into the rootdir of sdcard (the sdcard should be formatted as fat32 file system before) `$cp * ${YOUR_USB_DISK}` 3. power on iCESugar-pro, open the serial port to check the linux start up `$picocom -b 1000000 /dev/ttyACM0` ## Boot Log ``` __ _ __ _ __ / / (_) /____ | |/_/ / /__/ / __/ -_)> < /____/_/\__/\__/_/|_| Build your hardware, easily! (c) Copyright 2012-2020 Enjoy-Digital (c) Copyright 2007-2015 M-Labs BIOS built on Nov 11 2020 09:43:40 BIOS CRC passed (9f19f473) Migen git sha1: cc6e76e LiteX git sha1: 275932f5 --=============== SoC ==================-- CPU: VexRiscv_Linux @ 50MHz BUS: WISHBONE 32-bit @ 4GiB CSR: 8-bit data ROM: 64KiB SRAM: 8KiB L2: 8KiB SDRAM: 32768KiB 16-bit @ 50MT/s (CL-2 CWL-2) --========== Initialization ============-- Initializing SDRAM @0x40000000... Switching SDRAM to software control. Switching SDRAM to hardware control. Memtest at 0x40000000 (2MiB)... Write: 0x40000000-0x40200000 2MiB Read: 0x40000000-0x40200000 2MiB Memtest OK Memspeed at 0x40000000 (2MiB)... Write speed: 11MiB/s Read speed: 10MiB/s --============== Boot ==================-- Booting from serial... Press Q or ESC to abort boot completely. sL5DdSMmkekro Timeout Booting from SDCard in SPI-Mode... Booting from boot.json... Copying Image to 0x40000000 (4545524 bytes)... [########################################] Copying rootfs.cpio to 0x40800000 (8029184 bytes)... [########################################] Copying rv32.dtb to 0x41000000 (1987 bytes)... [########################################] Copying emulator.bin to 0x41100000 (9600 bytes)... [########################################] Executing booted program at 0x41100000 --============= Liftoff! ===============-- VexRiscv Machine Mode software built Mar 23 2020 16:55:03 --========== Booting Linux =============-- [ 0.000000] No DTB passed to the kernel [ 0.000000] Linux version 5.0.13 (florent@lab) (gcc version 8.3.0 (Buildroot 2019.08-rc2-00011-gad9efda578)) #1 Thu Sep 12 14:20:26 CEST 2019 [ 0.000000] earlycon: sbi0 at I/O port 0x0 (options '') [ 0.000000] printk: bootconsole [sbi0] enabled [ 0.000000] Initial ramdisk at: 0x(ptrval) (8388608 bytes) [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000040000000-0x0000000041ffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000040000000-0x0000000041ffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x0000000041ffffff] [ 0.000000] elf_hwcap is 0x1101 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 8128 [ 0.000000] Kernel command line: mem=32M@0x40000000 rootwait console=liteuart earlycon=sbi root=/dev/ram0 init=/sbin/init swiotlb=32 [ 0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000000] Sorting __ex_table... [ 0.000000] Memory: 19812K/32768K available (3415K kernel code, 148K rwdata, 509K rodata, 140K init, 216K bss, 12956K reserved, 0K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0 [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0xb8812736b, max_idle_ns: 440795202655 ns [ 0.000422] sched_clock: 64 bits at 50MHz, resolution 20ns, wraps every 4398046511100ns [ 0.004800] Console: colour dummy device 80x25 [ 0.007486] Calibrating delay loop (skipped), value calculated using timer frequency.. 100.00 BogoMIPS (lpj=200000) [ 0.009456] pid_max: default: 32768 minimum: 301 [ 0.026679] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.028428] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.121644] devtmpfs: initialized [ 0.189497] random: get_random_bytes called from setup_net+0x4c/0x188 with crng_init=0 [ 0.200282] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.202998] futex hash table entries: 256 (order: -1, 3072 bytes) [ 0.220630] NET: Registered protocol family 16 [ 0.579278] clocksource: Switched to clocksource riscv_clocksource [ 1.118845] NET: Registered protocol family 2 [ 1.149705] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes) [ 1.152735] TCP established hash table entries: 1024 (order: 0, 4096 bytes) [ 1.154585] TCP bind hash table entries: 1024 (order: 0, 4096 bytes) [ 1.156926] TCP: Hash tables configured (established 1024 bind 1024) [ 1.164153] UDP hash table entries: 256 (order: 0, 4096 bytes) [ 1.165932] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) [ 1.197310] Unpacking initramfs... [ 5.478529] Initramfs unpacking failed: junk in compressed archive [ 5.518894] workingset: timestamp_bits=30 max_order=13 bucket_order=0 [ 6.441722] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) [ 6.443061] io scheduler mq-deadline registered [ 6.444868] io scheduler kyber registered [ 9.806243] f0001000.serial: ttyLXU0 at MMIO 0xf0001000 (irq = 0, base_baud = 0) is a liteuart [ 9.809098] printk: console [liteuart0] enabled [ 9.809098] printk: console [liteuart0] enabled [ 9.810562] printk: bootconsole [sbi0] disabled [ 9.810562] printk: bootconsole [sbi0] disabled [ 9.863872] libphy: Fixed MDIO Bus: probed [ 9.874843] i2c /dev entries driver [ 9.993741] NET: Registered protocol family 10 [ 10.037459] Segment Routing with IPv6 [ 10.042318] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 10.141414] Freeing unused kernel memory: 140K [ 10.142302] This architecture does not have kernel memory protection. [ 10.144239] Run /init as init process mount: mounting tmpfs on /dev/shm failed: Invalid argument mount: mounting tmpfs on /tmp failed: Invalid argument mount: mounting tmpfs on /run failed: Invalid argument Starting syslogd: OK Starting klogd: OK Running sysctl: OK Initializing random number generator... [ 16.221885] random: dd: uninitialized urandom read (512 bytes read) done. Starting network: OK Starting dropbear sshd: [ 19.262912] random: dropbear: uninitialized urandom read (32 bytes read) OK Welcome to Buildroot buildroot login: root __ _ / / (_)__ __ ____ __ / /__/ / _ \/ // /\ \ / /____/_/_//_/\_,_//_\_\ / _ \/ _ \ __ _ __ _\___/_//_/ __ _ / / (_) /____ | |/_/__| | / /____ __ ____(_)__ _____ __ / /__/ / __/ -_)> ULX3S_25F.ys echo "hierarchy -top ULX3S_25F" >> ULX3S_25F.ys echo "synth_ecp5 -json ULX3S_25F.json" >> ULX3S_25F.ys ULX3S_25F.json: ULX3S_25F.ys $(YOSYS) -q ULX3S_25F.ys ulx3s_25f_ULX3S_25F.config: ULX3S_25F.json #$(NEXTPNR) --25k --package CABGA381 --json ULX3S_25F.json --lpf ulx3s_v20_segpdi.lpf --textcfg ulx3s_25f_ULX3S_25F.config $(NEXTPNR) --25k --package CABGA256 --json ULX3S_25F.json --lpf icesugar_pro.lpf \ --textcfg ulx3s_25f_ULX3S_25F.config ulx3s_25f_ULX3S_25F.bit: ulx3s_25f_ULX3S_25F.config $(ECPPACK) --input ulx3s_25f_ULX3S_25F.config \ --bit ulx3s_25f_ULX3S_25F.bit .PHONY: clean clean: rm -f ULX3S_25F.ys ULX3S_25F.json ulx3s_25f_ULX3S_25F.config \ ulx3s_25f_ULX3S_25F.bit ================================================ FILE: src/hdmi_test_pattern/Makefile.sim ================================================ ## ## Verilator Rules ## .PHONY: all #.DELETE_ON_ERROR: TOPMOD := DVI_3x3 TOPMOD := llhdmi TOPMOD := pattern VLOGFIL := $(TOPMOD).v VCDFILE := $(TOPMOD).vcd SIMPROG := $(TOPMOD)_tb SIMFILE := $(SIMPROG).cpp VDIRFB := ./obj_dir all: $(VCDFILE) GCC := g++ CFLAGS = -g -Wall -I$(VINC) -I $(VDIRFB) # # Modern versions of Verilator and C++ may require an -faligned-new flag # CFLAGS = -g -Wall -faligned-new -I$(VINC) -I $(VDIRFB) VERILATOR=verilator VFLAGS := -O3 -MMD --trace -Wall ## Find the directory containing the Verilog sources. This is given from ## calling: "verilator -V" and finding the VERILATOR_ROOT output line from ## within it. From this VERILATOR_ROOT value, we can find all the components ## we need here--in particular, the verilator include directory VERILATOR_ROOT ?= $(shell bash -c '$(VERILATOR) -V|grep VERILATOR_ROOT | head -1 | sed -e "s/^.*=\s*//"') ## ## The directory containing the verilator includes VINC := $(VERILATOR_ROOT)/include $(VDIRFB)/V$(TOPMOD).cpp: $(TOPMOD).v $(VERILATOR) $(VFLAGS) -cc --top-module $(TOPMOD) $(VLOGFIL) $(VDIRFB)/V$(TOPMOD)__ALL.a: $(VDIRFB)/V$(TOPMOD).cpp make --no-print-directory -C $(VDIRFB) -f V$(TOPMOD).mk $(SIMPROG): $(SIMFILE) $(VDIRFB)/V$(TOPMOD)__ALL.a $(COSIMS) $(GCC) $(CFLAGS) $(VINC)/verilated.cpp \ $(VINC)/verilated_vcd_c.cpp $(SIMFILE) $(COSIMS) \ $(VDIRFB)/V$(TOPMOD)__ALL.a -o $(SIMPROG) test: $(VCDFILE) $(VCDFILE): $(SIMPROG) ./$(SIMPROG) > image.ppm ## .PHONY: clean clean: rm -rf $(VDIRFB)/ $(SIMPROG) $(VCDFILE) image.ppm ## ## Find all of the Verilog dependencies and submodules ## DEPS := $(wildcard $(VDIRFB)/*.d) ## Include any of these submodules in the Makefile ## ... but only if we are not building the "clean" target ## which would (oops) try to build those dependencies again ## ifneq ($(MAKECMDGOALS),clean) ifneq ($(DEPS),) include $(DEPS) endif endif ================================================ FILE: src/hdmi_test_pattern/OBUFDS.v ================================================ // (c) fpga4fun.com & KNJN LLC 2013 //////////////////////////////////////////////////////////////////////// module OBUFDS( input I, // input output O, // positive output output OB // negative output ); assign O = I; assign OB = ~I; endmodule //////////////////////////////////////////////////////////////////////// ================================================ FILE: src/hdmi_test_pattern/README.md ================================================ # ULX3S HDMI Test Patterm Generator I've taken the idea of a low-level video generator from Dan Gisselquist's [llvga.v](https://github.com/ZipCPU/vgasim/blob/master/rtl/llvga.v) module and also the [HDMI code from Emard](https://github.com/DoctorWkt/Verilog_tic-tac-toe/tree/master/HDMI), and I've created a _llhdmi.v_ video generating module. I have also taken Dan Gisselquist's [vgatestsrc.v](https://github.com/ZipCPU/vgasim/blob/master/rtl/vgatestsrc.v) test pattern generator, and built a ULX3S project that displays the test pattern on the HDMI output. To do this, ```make -f UMakefile```. There is also a make with Verilator, ```make -f Makefile```. This uses the test pattern generator and produces the image file ```image.ppm```. The _dec_6_2018.jpg_ image is a photo of the first output from the project. On Dec 10, 2018, I updated the _vgatestsrc.v_ from ZipCPU, added a reset line and re-imported _TMDS_encoder.v_. This time, I decorated the file with some ```/* verilator lint_off UNOPTFLAT */``` lines because the code that sets ```q_m``` really isn't right. I've fixed this by creating separate wires and bundling them together afterwards. The _dec_10_2018.jpg_ image shows the current HDMI output from the project. ================================================ FILE: src/hdmi_test_pattern/TMDS_encoder.v ================================================ // (c) fpga4fun.com & KNJN LLC 2013 //////////////////////////////////////////////////////////////////////// module TMDS_encoder( input clk, // 250 MHz input [7:0] VD, // video data (red, green or blue) input [1:0] CD, // control data input VDE, // video data enable, to choose between CD (when VDE=0) and VD (when VDE=1) output reg [9:0] TMDS = 0 ); wire [3:0] Nb1s = {3'b0, VD[0]} + {3'b0, VD[1]} + {3'b0, VD[2]} + {3'b0, VD[3]} + {3'b0, VD[4]} + {3'b0, VD[5]} + {3'b0, VD[6]} + {3'b0, VD[7]}; wire XNOR = (Nb1s>4'd4) || (Nb1s==4'd4 && VD[0]==1'b0); // To keep Verilator happy, we create individual wires, determine // their values and then merge them into q_m[] wire QM0, QM1, QM2, QM3, QM4, QM5, QM6, QM7, QM8; assign QM0= VD[0]; assign QM1= QM0 ^ VD[1] ^ XNOR; assign QM2= QM1 ^ VD[2] ^ XNOR; assign QM3= QM2 ^ VD[3] ^ XNOR; assign QM4= QM3 ^ VD[4] ^ XNOR; assign QM5= QM4 ^ VD[5] ^ XNOR; assign QM6= QM5 ^ VD[6] ^ XNOR; assign QM7= QM6 ^ VD[7] ^ XNOR; assign QM8= ~XNOR; wire [8:0] q_m = { QM8, QM7, QM6, QM5, QM4, QM3, QM2, QM1, QM0 }; reg [3:0] balance_acc = 0; wire [3:0] balance = {3'b0, q_m[0]} + {3'b0, q_m[1]} + {3'b0, q_m[2]} + {3'b0, q_m[3]} + {3'b0, q_m[4]} + {3'b0, q_m[5]} + {3'b0, q_m[6]} + {3'b0, q_m[7]} - 4'd4; wire balance_sign_eq = (balance[3] == balance_acc[3]); wire invert_q_m = (balance==0 || balance_acc==0) ? ~q_m[8] : balance_sign_eq; wire [3:0] balance_acc_inc = balance - {3'b0, ({q_m[8] ^ ~balance_sign_eq} & ~(balance==0 || balance_acc==0)) }; wire [3:0] balance_acc_new = invert_q_m ? balance_acc-balance_acc_inc : balance_acc+balance_acc_inc; wire [9:0] TMDS_data = {invert_q_m, q_m[8], q_m[7:0] ^ {8{invert_q_m}}}; wire [9:0] TMDS_code = CD[1] ? (CD[0] ? 10'b1010101011 : 10'b0101010100) : (CD[0] ? 10'b0010101011 : 10'b1101010100); always @(posedge clk) TMDS <= VDE ? TMDS_data : TMDS_code; always @(posedge clk) balance_acc <= VDE ? balance_acc_new : 4'h0; endmodule //////////////////////////////////////////////////////////////////////// ================================================ FILE: src/hdmi_test_pattern/ULX3S_25F.json ================================================ { "creator": "Yosys 0.9+3672 (git sha1 924f1713, gcc 8.3.0-6+rpi1 -fPIC -Os)", "modules": { "\\$__ABC9_LUT5": { "attributes": { "blackbox": "00000000000000000000000000000001", "abc9_lut": "00000000000000000000000000000010", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:22.1-30.10" }, "ports": { "M0": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "C": { "direction": "input", "bits": [ 4 ] }, "B": { "direction": "input", "bits": [ 5 ] }, "A": { "direction": "input", "bits": [ 6 ] }, "Z": { "direction": "output", "bits": [ 7 ] } }, "cells": { "$specify$204": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010010111", "T_FALL_MIN": "00000000000000000000000010010111", "T_FALL_TYP": "00000000000000000000000010010111", "T_RISE_MAX": "00000000000000000000000010010111", "T_RISE_MIN": "00000000000000000000000010010111", "T_RISE_TYP": "00000000000000000000000010010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:24.9-24.25" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 7 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$specify$205": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000011101111", "T_FALL_MIN": "00000000000000000000000011101111", "T_FALL_TYP": "00000000000000000000000011101111", "T_RISE_MAX": "00000000000000000000000011101111", "T_RISE_MIN": "00000000000000000000000011101111", "T_RISE_TYP": "00000000000000000000000011101111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:25.9-25.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 7 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$206": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000101110101", "T_FALL_MIN": "00000000000000000000000101110101", "T_FALL_TYP": "00000000000000000000000101110101", "T_RISE_MAX": "00000000000000000000000101110101", "T_RISE_MIN": "00000000000000000000000101110101", "T_RISE_TYP": "00000000000000000000000101110101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:26.9-26.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 7 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$specify$207": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000111011101", "T_FALL_MIN": "00000000000000000000000111011101", "T_FALL_TYP": "00000000000000000000000111011101", "T_RISE_MAX": "00000000000000000000000111011101", "T_RISE_MIN": "00000000000000000000000111011101", "T_RISE_TYP": "00000000000000000000000111011101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:27.9-27.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 7 ], "EN": [ "1" ], "SRC": [ 5 ] } }, "$specify$208": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000111011101", "T_FALL_MIN": "00000000000000000000000111011101", "T_FALL_TYP": "00000000000000000000000111011101", "T_RISE_MAX": "00000000000000000000000111011101", "T_RISE_MIN": "00000000000000000000000111011101", "T_RISE_TYP": "00000000000000000000000111011101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:28.9-28.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 7 ], "EN": [ "1" ], "SRC": [ 6 ] } } }, "netnames": { "A": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:22.42-22.43" } }, "B": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:22.39-22.40" } }, "C": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:22.36-22.37" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:22.33-22.34" } }, "M0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:22.29-22.31" } }, "Z": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:22.52-22.53" } } } }, "\\$__ABC9_LUT6": { "attributes": { "blackbox": "00000000000000000000000000000001", "abc9_lut": "00000000000000000000000000000100", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:36.1-45.10" }, "ports": { "M1": { "direction": "input", "bits": [ 2 ] }, "M0": { "direction": "input", "bits": [ 3 ] }, "D": { "direction": "input", "bits": [ 4 ] }, "C": { "direction": "input", "bits": [ 5 ] }, "B": { "direction": "input", "bits": [ 6 ] }, "A": { "direction": "input", "bits": [ 7 ] }, "Z": { "direction": "output", "bits": [ 8 ] } }, "cells": { "$specify$209": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010010100", "T_FALL_MIN": "00000000000000000000000010010100", "T_FALL_TYP": "00000000000000000000000010010100", "T_RISE_MAX": "00000000000000000000000010010100", "T_RISE_MIN": "00000000000000000000000010010100", "T_RISE_TYP": "00000000000000000000000010010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:38.9-38.25" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 8 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$specify$210": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100100100", "T_FALL_MIN": "00000000000000000000000100100100", "T_FALL_TYP": "00000000000000000000000100100100", "T_RISE_MAX": "00000000000000000000000100100100", "T_RISE_MIN": "00000000000000000000000100100100", "T_RISE_TYP": "00000000000000000000000100100100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:39.9-39.25" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 8 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$211": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000101111100", "T_FALL_MIN": "00000000000000000000000101111100", "T_FALL_TYP": "00000000000000000000000101111100", "T_RISE_MAX": "00000000000000000000000101111100", "T_RISE_MIN": "00000000000000000000000101111100", "T_RISE_TYP": "00000000000000000000000101111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:40.9-40.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 8 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$specify$212": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001000000010", "T_FALL_MIN": "00000000000000000000001000000010", "T_FALL_TYP": "00000000000000000000001000000010", "T_RISE_MAX": "00000000000000000000001000000010", "T_RISE_MIN": "00000000000000000000001000000010", "T_RISE_TYP": "00000000000000000000001000000010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:41.9-41.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 8 ], "EN": [ "1" ], "SRC": [ 5 ] } }, "$specify$213": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001001101010", "T_FALL_MIN": "00000000000000000000001001101010", "T_FALL_TYP": "00000000000000000000001001101010", "T_RISE_MAX": "00000000000000000000001001101010", "T_RISE_MIN": "00000000000000000000001001101010", "T_RISE_TYP": "00000000000000000000001001101010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:42.9-42.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 8 ], "EN": [ "1" ], "SRC": [ 6 ] } }, "$specify$214": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001001101010", "T_FALL_MIN": "00000000000000000000001001101010", "T_FALL_TYP": "00000000000000000000001001101010", "T_RISE_MAX": "00000000000000000000001001101010", "T_RISE_MIN": "00000000000000000000001001101010", "T_RISE_TYP": "00000000000000000000001001101010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:43.9-43.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 8 ], "EN": [ "1" ], "SRC": [ 7 ] } } }, "netnames": { "A": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:36.46-36.47" } }, "B": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:36.43-36.44" } }, "C": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:36.40-36.41" } }, "D": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:36.37-36.38" } }, "M0": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:36.33-36.35" } }, "M1": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:36.29-36.31" } }, "Z": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:36.56-36.57" } } } }, "\\$__ABC9_LUT7": { "attributes": { "blackbox": "00000000000000000000000000000001", "abc9_lut": "00000000000000000000000000001000", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.1-61.10" }, "ports": { "M2": { "direction": "input", "bits": [ 2 ] }, "M1": { "direction": "input", "bits": [ 3 ] }, "M0": { "direction": "input", "bits": [ 4 ] }, "D": { "direction": "input", "bits": [ 5 ] }, "C": { "direction": "input", "bits": [ 6 ] }, "B": { "direction": "input", "bits": [ 7 ] }, "A": { "direction": "input", "bits": [ 8 ] }, "Z": { "direction": "output", "bits": [ 9 ] } }, "cells": { "$specify$215": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010010100", "T_FALL_MIN": "00000000000000000000000010010100", "T_FALL_TYP": "00000000000000000000000010010100", "T_RISE_MAX": "00000000000000000000000010010100", "T_RISE_MIN": "00000000000000000000000010010100", "T_RISE_TYP": "00000000000000000000000010010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:53.9-53.25" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 9 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$specify$216": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100100001", "T_FALL_MIN": "00000000000000000000000100100001", "T_FALL_TYP": "00000000000000000000000100100001", "T_RISE_MAX": "00000000000000000000000100100001", "T_RISE_MIN": "00000000000000000000000100100001", "T_RISE_TYP": "00000000000000000000000100100001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:54.9-54.25" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 9 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$217": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000110110001", "T_FALL_MIN": "00000000000000000000000110110001", "T_FALL_TYP": "00000000000000000000000110110001", "T_RISE_MAX": "00000000000000000000000110110001", "T_RISE_MIN": "00000000000000000000000110110001", "T_RISE_TYP": "00000000000000000000000110110001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:55.9-55.25" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 9 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$specify$218": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001000001001", "T_FALL_MIN": "00000000000000000000001000001001", "T_FALL_TYP": "00000000000000000000001000001001", "T_RISE_MAX": "00000000000000000000001000001001", "T_RISE_MIN": "00000000000000000000001000001001", "T_RISE_TYP": "00000000000000000000001000001001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:56.9-56.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 9 ], "EN": [ "1" ], "SRC": [ 5 ] } }, "$specify$219": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001010001111", "T_FALL_MIN": "00000000000000000000001010001111", "T_FALL_TYP": "00000000000000000000001010001111", "T_RISE_MAX": "00000000000000000000001010001111", "T_RISE_MIN": "00000000000000000000001010001111", "T_RISE_TYP": "00000000000000000000001010001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:57.9-57.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 9 ], "EN": [ "1" ], "SRC": [ 6 ] } }, "$specify$220": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001011110111", "T_FALL_MIN": "00000000000000000000001011110111", "T_FALL_TYP": "00000000000000000000001011110111", "T_RISE_MAX": "00000000000000000000001011110111", "T_RISE_MIN": "00000000000000000000001011110111", "T_RISE_TYP": "00000000000000000000001011110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:58.9-58.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 9 ], "EN": [ "1" ], "SRC": [ 7 ] } }, "$specify$221": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001011110111", "T_FALL_MIN": "00000000000000000000001011110111", "T_FALL_TYP": "00000000000000000000001011110111", "T_RISE_MAX": "00000000000000000000001011110111", "T_RISE_MIN": "00000000000000000000001011110111", "T_RISE_TYP": "00000000000000000000001011110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:59.9-59.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 9 ], "EN": [ "1" ], "SRC": [ 8 ] } } }, "netnames": { "A": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.50-51.51" } }, "B": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.47-51.48" } }, "C": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.44-51.45" } }, "D": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.41-51.42" } }, "M0": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.37-51.39" } }, "M1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.33-51.35" } }, "M2": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.29-51.31" } }, "Z": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:51.60-51.61" } } } }, "ALU54B": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:44.1-95.10" }, "parameter_default_values": { "CLK0_DIV": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "CLK1_DIV": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "CLK2_DIV": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "CLK3_DIV": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "FORCE_ZERO_BARREL_SHIFT": "DISABLED", "GSR": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "LEGACY": "DISABLED", "MASK01": "0x00000000000000 ", "MASKPAT": "0x00000000000000 ", "MASKPAT_SOURCE": "00000000000000000000000000000000000000000000000000000000000000000000000000000000010100110101010001000001010101000100100101000011", "MCPAT": "0x00000000000000 ", "MCPAT_SOURCE": "00000000000000000000000000000000000000000000000000000000000000000000000000000000010100110101010001000001010101000100100101000011", "REG_FLAG_CLK": "NONE", "REG_INPUTC0_CLK": "NONE", "REG_INPUTC1_CLK": "NONE", "REG_OPCODEIN_0_CE": "CE0", "REG_OPCODEIN_0_CLK": "NONE", "REG_OPCODEIN_0_RST": "RST0", "REG_OPCODEIN_1_CE": "CE0", "REG_OPCODEIN_1_CLK": "NONE", "REG_OPCODEIN_1_RST": "RST0", "REG_OPCODEOP0_0_CE": "CE0", "REG_OPCODEOP0_0_CLK": "NONE", "REG_OPCODEOP0_0_RST": "RST0", "REG_OPCODEOP0_1_CE": "CE0", "REG_OPCODEOP0_1_CLK": "NONE", "REG_OPCODEOP0_1_RST": "RST0", "REG_OPCODEOP1_0_CLK": "NONE", "REG_OUTPUT0_CLK": "NONE", "REG_OUTPUT1_CLK": "NONE", "RESETMODE": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010011010110010100111001000011", "RNDPAT": "0x00000000000000 " }, "ports": { "CLK0": { "direction": "input", "bits": [ 2 ] }, "CLK1": { "direction": "input", "bits": [ 3 ] }, "CLK2": { "direction": "input", "bits": [ 4 ] }, "CLK3": { "direction": "input", "bits": [ 5 ] }, "CE0": { "direction": "input", "bits": [ 6 ] }, "CE1": { "direction": "input", "bits": [ 7 ] }, "CE2": { "direction": "input", "bits": [ 8 ] }, "CE3": { "direction": "input", "bits": [ 9 ] }, "RST0": { "direction": "input", "bits": [ 10 ] }, "RST1": { "direction": "input", "bits": [ 11 ] }, "RST2": { "direction": "input", "bits": [ 12 ] }, "RST3": { "direction": "input", "bits": [ 13 ] }, "SIGNEDIA": { "direction": "input", "bits": [ 14 ] }, "SIGNEDIB": { "direction": "input", "bits": [ 15 ] }, "SIGNEDCIN": { "direction": "input", "bits": [ 16 ] }, "A0": { "direction": "input", "bits": [ 17 ] }, "A1": { "direction": "input", "bits": [ 18 ] }, "A2": { "direction": "input", "bits": [ 19 ] }, "A3": { "direction": "input", "bits": [ 20 ] }, "A4": { "direction": "input", "bits": [ 21 ] }, "A5": { "direction": "input", "bits": [ 22 ] }, "A6": { "direction": "input", "bits": [ 23 ] }, "A7": { "direction": "input", "bits": [ 24 ] }, "A8": { "direction": "input", "bits": [ 25 ] }, "A9": { "direction": "input", "bits": [ 26 ] }, "A10": { "direction": "input", "bits": [ 27 ] }, "A11": { "direction": "input", "bits": [ 28 ] }, "A12": { "direction": "input", "bits": [ 29 ] }, "A13": { "direction": "input", "bits": [ 30 ] }, "A14": { "direction": "input", "bits": [ 31 ] }, "A15": { "direction": "input", "bits": [ 32 ] }, "A16": { "direction": "input", "bits": [ 33 ] }, "A17": { "direction": "input", "bits": [ 34 ] }, "A18": { "direction": "input", "bits": [ 35 ] }, "A19": { "direction": "input", "bits": [ 36 ] }, "A20": { "direction": "input", "bits": [ 37 ] }, "A21": { "direction": "input", "bits": [ 38 ] }, "A22": { "direction": "input", "bits": [ 39 ] }, "A23": { "direction": "input", "bits": [ 40 ] }, "A24": { "direction": "input", "bits": [ 41 ] }, "A25": { "direction": "input", "bits": [ 42 ] }, "A26": { "direction": "input", "bits": [ 43 ] }, "A27": { "direction": "input", "bits": [ 44 ] }, "A28": { "direction": "input", "bits": [ 45 ] }, "A29": { "direction": "input", "bits": [ 46 ] }, "A30": { "direction": "input", "bits": [ 47 ] }, "A31": { "direction": "input", "bits": [ 48 ] }, "A32": { "direction": "input", "bits": [ 49 ] }, "A33": { "direction": "input", "bits": [ 50 ] }, "A34": { "direction": "input", "bits": [ 51 ] }, "A35": { "direction": "input", "bits": [ 52 ] }, "B0": { "direction": "input", "bits": [ 53 ] }, "B1": { "direction": "input", "bits": [ 54 ] }, "B2": { "direction": "input", "bits": [ 55 ] }, "B3": { "direction": "input", "bits": [ 56 ] }, "B4": { "direction": "input", "bits": [ 57 ] }, "B5": { "direction": "input", "bits": [ 58 ] }, "B6": { "direction": "input", "bits": [ 59 ] }, "B7": { "direction": "input", "bits": [ 60 ] }, "B8": { "direction": "input", "bits": [ 61 ] }, "B9": { "direction": "input", "bits": [ 62 ] }, "B10": { "direction": "input", "bits": [ 63 ] }, "B11": { "direction": "input", "bits": [ 64 ] }, "B12": { "direction": "input", "bits": [ 65 ] }, "B13": { "direction": "input", "bits": [ 66 ] }, "B14": { "direction": "input", "bits": [ 67 ] }, "B15": { "direction": "input", "bits": [ 68 ] }, "B16": { "direction": "input", "bits": [ 69 ] }, "B17": { "direction": "input", "bits": [ 70 ] }, "B18": { "direction": "input", "bits": [ 71 ] }, "B19": { "direction": "input", "bits": [ 72 ] }, "B20": { "direction": "input", "bits": [ 73 ] }, "B21": { "direction": "input", "bits": [ 74 ] }, "B22": { "direction": "input", "bits": [ 75 ] }, "B23": { "direction": "input", "bits": [ 76 ] }, "B24": { "direction": "input", "bits": [ 77 ] }, "B25": { "direction": "input", "bits": [ 78 ] }, "B26": { "direction": "input", "bits": [ 79 ] }, "B27": { "direction": "input", "bits": [ 80 ] }, "B28": { "direction": "input", "bits": [ 81 ] }, "B29": { "direction": "input", "bits": [ 82 ] }, "B30": { "direction": "input", "bits": [ 83 ] }, "B31": { "direction": "input", "bits": [ 84 ] }, "B32": { "direction": "input", "bits": [ 85 ] }, "B33": { "direction": "input", "bits": [ 86 ] }, "B34": { "direction": "input", "bits": [ 87 ] }, "B35": { "direction": "input", "bits": [ 88 ] }, "C0": { "direction": "input", "bits": [ 89 ] }, "C1": { "direction": "input", "bits": [ 90 ] }, "C2": { "direction": "input", "bits": [ 91 ] }, "C3": { "direction": "input", "bits": [ 92 ] }, "C4": { "direction": "input", "bits": [ 93 ] }, "C5": { "direction": "input", "bits": [ 94 ] }, "C6": { "direction": "input", "bits": [ 95 ] }, "C7": { "direction": "input", "bits": [ 96 ] }, "C8": { "direction": "input", "bits": [ 97 ] }, "C9": { "direction": "input", "bits": [ 98 ] }, "C10": { "direction": "input", "bits": [ 99 ] }, "C11": { "direction": "input", "bits": [ 100 ] }, "C12": { "direction": "input", "bits": [ 101 ] }, "C13": { "direction": "input", "bits": [ 102 ] }, "C14": { "direction": "input", "bits": [ 103 ] }, "C15": { "direction": "input", "bits": [ 104 ] }, "C16": { "direction": "input", "bits": [ 105 ] }, "C17": { "direction": "input", "bits": [ 106 ] }, "C18": { "direction": "input", "bits": [ 107 ] }, "C19": { "direction": "input", "bits": [ 108 ] }, "C20": { "direction": "input", "bits": [ 109 ] }, "C21": { "direction": "input", "bits": [ 110 ] }, "C22": { "direction": "input", "bits": [ 111 ] }, "C23": { "direction": "input", "bits": [ 112 ] }, "C24": { "direction": "input", "bits": [ 113 ] }, "C25": { "direction": "input", "bits": [ 114 ] }, "C26": { "direction": "input", "bits": [ 115 ] }, "C27": { "direction": "input", "bits": [ 116 ] }, "C28": { "direction": "input", "bits": [ 117 ] }, "C29": { "direction": "input", "bits": [ 118 ] }, "C30": { "direction": "input", "bits": [ 119 ] }, "C31": { "direction": "input", "bits": [ 120 ] }, "C32": { "direction": "input", "bits": [ 121 ] }, "C33": { "direction": "input", "bits": [ 122 ] }, "C34": { "direction": "input", "bits": [ 123 ] }, "C35": { "direction": "input", "bits": [ 124 ] }, "C36": { "direction": "input", "bits": [ 125 ] }, "C37": { "direction": "input", "bits": [ 126 ] }, "C38": { "direction": "input", "bits": [ 127 ] }, "C39": { "direction": "input", "bits": [ 128 ] }, "C40": { "direction": "input", "bits": [ 129 ] }, "C41": { "direction": "input", "bits": [ 130 ] }, "C42": { "direction": "input", "bits": [ 131 ] }, "C43": { "direction": "input", "bits": [ 132 ] }, "C44": { "direction": "input", "bits": [ 133 ] }, "C45": { "direction": "input", "bits": [ 134 ] }, "C46": { "direction": "input", "bits": [ 135 ] }, "C47": { "direction": "input", "bits": [ 136 ] }, "C48": { "direction": "input", "bits": [ 137 ] }, "C49": { "direction": "input", "bits": [ 138 ] }, "C50": { "direction": "input", "bits": [ 139 ] }, "C51": { "direction": "input", "bits": [ 140 ] }, "C52": { "direction": "input", "bits": [ 141 ] }, "C53": { "direction": "input", "bits": [ 142 ] }, "CFB0": { "direction": "input", "bits": [ 143 ] }, "CFB1": { "direction": "input", "bits": [ 144 ] }, "CFB2": { "direction": "input", "bits": [ 145 ] }, "CFB3": { "direction": "input", "bits": [ 146 ] }, "CFB4": { "direction": "input", "bits": [ 147 ] }, "CFB5": { "direction": "input", "bits": [ 148 ] }, "CFB6": { "direction": "input", "bits": [ 149 ] }, "CFB7": { "direction": "input", "bits": [ 150 ] }, "CFB8": { "direction": "input", "bits": [ 151 ] }, "CFB9": { "direction": "input", "bits": [ 152 ] }, "CFB10": { "direction": "input", "bits": [ 153 ] }, "CFB11": { "direction": "input", "bits": [ 154 ] }, "CFB12": { "direction": "input", "bits": [ 155 ] }, "CFB13": { "direction": "input", "bits": [ 156 ] }, "CFB14": { "direction": "input", "bits": [ 157 ] }, "CFB15": { "direction": "input", "bits": [ 158 ] }, "CFB16": { "direction": "input", "bits": [ 159 ] }, "CFB17": { "direction": "input", "bits": [ 160 ] }, "CFB18": { "direction": "input", "bits": [ 161 ] }, "CFB19": { "direction": "input", "bits": [ 162 ] }, "CFB20": { "direction": "input", "bits": [ 163 ] }, "CFB21": { "direction": "input", "bits": [ 164 ] }, "CFB22": { "direction": "input", "bits": [ 165 ] }, "CFB23": { "direction": "input", "bits": [ 166 ] }, "CFB24": { "direction": "input", "bits": [ 167 ] }, "CFB25": { "direction": "input", "bits": [ 168 ] }, "CFB26": { "direction": "input", "bits": [ 169 ] }, "CFB27": { "direction": "input", "bits": [ 170 ] }, "CFB28": { "direction": "input", "bits": [ 171 ] }, "CFB29": { "direction": "input", "bits": [ 172 ] }, "CFB30": { "direction": "input", "bits": [ 173 ] }, "CFB31": { "direction": "input", "bits": [ 174 ] }, "CFB32": { "direction": "input", "bits": [ 175 ] }, "CFB33": { "direction": "input", "bits": [ 176 ] }, "CFB34": { "direction": "input", "bits": [ 177 ] }, "CFB35": { "direction": "input", "bits": [ 178 ] }, "CFB36": { "direction": "input", "bits": [ 179 ] }, "CFB37": { "direction": "input", "bits": [ 180 ] }, "CFB38": { "direction": "input", "bits": [ 181 ] }, "CFB39": { "direction": "input", "bits": [ 182 ] }, "CFB40": { "direction": "input", "bits": [ 183 ] }, "CFB41": { "direction": "input", "bits": [ 184 ] }, "CFB42": { "direction": "input", "bits": [ 185 ] }, "CFB43": { "direction": "input", "bits": [ 186 ] }, "CFB44": { "direction": "input", "bits": [ 187 ] }, "CFB45": { "direction": "input", "bits": [ 188 ] }, "CFB46": { "direction": "input", "bits": [ 189 ] }, "CFB47": { "direction": "input", "bits": [ 190 ] }, "CFB48": { "direction": "input", "bits": [ 191 ] }, "CFB49": { "direction": "input", "bits": [ 192 ] }, "CFB50": { "direction": "input", "bits": [ 193 ] }, "CFB51": { "direction": "input", "bits": [ 194 ] }, "CFB52": { "direction": "input", "bits": [ 195 ] }, "CFB53": { "direction": "input", "bits": [ 196 ] }, "MA0": { "direction": "input", "bits": [ 197 ] }, "MA1": { "direction": "input", "bits": [ 198 ] }, "MA2": { "direction": "input", "bits": [ 199 ] }, "MA3": { "direction": "input", "bits": [ 200 ] }, "MA4": { "direction": "input", "bits": [ 201 ] }, "MA5": { "direction": "input", "bits": [ 202 ] }, "MA6": { "direction": "input", "bits": [ 203 ] }, "MA7": { "direction": "input", "bits": [ 204 ] }, "MA8": { "direction": "input", "bits": [ 205 ] }, "MA9": { "direction": "input", "bits": [ 206 ] }, "MA10": { "direction": "input", "bits": [ 207 ] }, "MA11": { "direction": "input", "bits": [ 208 ] }, "MA12": { "direction": "input", "bits": [ 209 ] }, "MA13": { "direction": "input", "bits": [ 210 ] }, "MA14": { "direction": "input", "bits": [ 211 ] }, "MA15": { "direction": "input", "bits": [ 212 ] }, "MA16": { "direction": "input", "bits": [ 213 ] }, "MA17": { "direction": "input", "bits": [ 214 ] }, "MA18": { "direction": "input", "bits": [ 215 ] }, "MA19": { "direction": "input", "bits": [ 216 ] }, "MA20": { "direction": "input", "bits": [ 217 ] }, "MA21": { "direction": "input", "bits": [ 218 ] }, "MA22": { "direction": "input", "bits": [ 219 ] }, "MA23": { "direction": "input", "bits": [ 220 ] }, "MA24": { "direction": "input", "bits": [ 221 ] }, "MA25": { "direction": "input", "bits": [ 222 ] }, "MA26": { "direction": "input", "bits": [ 223 ] }, "MA27": { "direction": "input", "bits": [ 224 ] }, "MA28": { "direction": "input", "bits": [ 225 ] }, "MA29": { "direction": "input", "bits": [ 226 ] }, "MA30": { "direction": "input", "bits": [ 227 ] }, "MA31": { "direction": "input", "bits": [ 228 ] }, "MA32": { "direction": "input", "bits": [ 229 ] }, "MA33": { "direction": "input", "bits": [ 230 ] }, "MA34": { "direction": "input", "bits": [ 231 ] }, "MA35": { "direction": "input", "bits": [ 232 ] }, "MB0": { "direction": "input", "bits": [ 233 ] }, "MB1": { "direction": "input", "bits": [ 234 ] }, "MB2": { "direction": "input", "bits": [ 235 ] }, "MB3": { "direction": "input", "bits": [ 236 ] }, "MB4": { "direction": "input", "bits": [ 237 ] }, "MB5": { "direction": "input", "bits": [ 238 ] }, "MB6": { "direction": "input", "bits": [ 239 ] }, "MB7": { "direction": "input", "bits": [ 240 ] }, "MB8": { "direction": "input", "bits": [ 241 ] }, "MB9": { "direction": "input", "bits": [ 242 ] }, "MB10": { "direction": "input", "bits": [ 243 ] }, "MB11": { "direction": "input", "bits": [ 244 ] }, "MB12": { "direction": "input", "bits": [ 245 ] }, "MB13": { "direction": "input", "bits": [ 246 ] }, "MB14": { "direction": "input", "bits": [ 247 ] }, "MB15": { "direction": "input", "bits": [ 248 ] }, "MB16": { "direction": "input", "bits": [ 249 ] }, "MB17": { "direction": "input", "bits": [ 250 ] }, "MB18": { "direction": "input", "bits": [ 251 ] }, "MB19": { "direction": "input", "bits": [ 252 ] }, "MB20": { "direction": "input", "bits": [ 253 ] }, "MB21": { "direction": "input", "bits": [ 254 ] }, "MB22": { "direction": "input", "bits": [ 255 ] }, "MB23": { "direction": "input", "bits": [ 256 ] }, "MB24": { "direction": "input", "bits": [ 257 ] }, "MB25": { "direction": "input", "bits": [ 258 ] }, "MB26": { "direction": "input", "bits": [ 259 ] }, "MB27": { "direction": "input", "bits": [ 260 ] }, "MB28": { "direction": "input", "bits": [ 261 ] }, "MB29": { "direction": "input", "bits": [ 262 ] }, "MB30": { "direction": "input", "bits": [ 263 ] }, "MB31": { "direction": "input", "bits": [ 264 ] }, "MB32": { "direction": "input", "bits": [ 265 ] }, "MB33": { "direction": "input", "bits": [ 266 ] }, "MB34": { "direction": "input", "bits": [ 267 ] }, "MB35": { "direction": "input", "bits": [ 268 ] }, "CIN0": { "direction": "input", "bits": [ 269 ] }, "CIN1": { "direction": "input", "bits": [ 270 ] }, "CIN2": { "direction": "input", "bits": [ 271 ] }, "CIN3": { "direction": "input", "bits": [ 272 ] }, "CIN4": { "direction": "input", "bits": [ 273 ] }, "CIN5": { "direction": "input", "bits": [ 274 ] }, "CIN6": { "direction": "input", "bits": [ 275 ] }, "CIN7": { "direction": "input", "bits": [ 276 ] }, "CIN8": { "direction": "input", "bits": [ 277 ] }, "CIN9": { "direction": "input", "bits": [ 278 ] }, "CIN10": { "direction": "input", "bits": [ 279 ] }, "CIN11": { "direction": "input", "bits": [ 280 ] }, "CIN12": { "direction": "input", "bits": [ 281 ] }, "CIN13": { "direction": "input", "bits": [ 282 ] }, "CIN14": { "direction": "input", "bits": [ 283 ] }, "CIN15": { "direction": "input", "bits": [ 284 ] }, "CIN16": { "direction": "input", "bits": [ 285 ] }, "CIN17": { "direction": "input", "bits": [ 286 ] }, "CIN18": { "direction": "input", "bits": [ 287 ] }, "CIN19": { "direction": "input", "bits": [ 288 ] }, "CIN20": { "direction": "input", "bits": [ 289 ] }, "CIN21": { "direction": "input", "bits": [ 290 ] }, "CIN22": { "direction": "input", "bits": [ 291 ] }, "CIN23": { "direction": "input", "bits": [ 292 ] }, "CIN24": { "direction": "input", "bits": [ 293 ] }, "CIN25": { "direction": "input", "bits": [ 294 ] }, "CIN26": { "direction": "input", "bits": [ 295 ] }, "CIN27": { "direction": "input", "bits": [ 296 ] }, "CIN28": { "direction": "input", "bits": [ 297 ] }, "CIN29": { "direction": "input", "bits": [ 298 ] }, "CIN30": { "direction": "input", "bits": [ 299 ] }, "CIN31": { "direction": "input", "bits": [ 300 ] }, "CIN32": { "direction": "input", "bits": [ 301 ] }, "CIN33": { "direction": "input", "bits": [ 302 ] }, "CIN34": { "direction": "input", "bits": [ 303 ] }, "CIN35": { "direction": "input", "bits": [ 304 ] }, "CIN36": { "direction": "input", "bits": [ 305 ] }, "CIN37": { "direction": "input", "bits": [ 306 ] }, "CIN38": { "direction": "input", "bits": [ 307 ] }, "CIN39": { "direction": "input", "bits": [ 308 ] }, "CIN40": { "direction": "input", "bits": [ 309 ] }, "CIN41": { "direction": "input", "bits": [ 310 ] }, "CIN42": { "direction": "input", "bits": [ 311 ] }, "CIN43": { "direction": "input", "bits": [ 312 ] }, "CIN44": { "direction": "input", "bits": [ 313 ] }, "CIN45": { "direction": "input", "bits": [ 314 ] }, "CIN46": { "direction": "input", "bits": [ 315 ] }, "CIN47": { "direction": "input", "bits": [ 316 ] }, "CIN48": { "direction": "input", "bits": [ 317 ] }, "CIN49": { "direction": "input", "bits": [ 318 ] }, "CIN50": { "direction": "input", "bits": [ 319 ] }, "CIN51": { "direction": "input", "bits": [ 320 ] }, "CIN52": { "direction": "input", "bits": [ 321 ] }, "CIN53": { "direction": "input", "bits": [ 322 ] }, "OP0": { "direction": "input", "bits": [ 323 ] }, "OP1": { "direction": "input", "bits": [ 324 ] }, "OP2": { "direction": "input", "bits": [ 325 ] }, "OP3": { "direction": "input", "bits": [ 326 ] }, "OP4": { "direction": "input", "bits": [ 327 ] }, "OP5": { "direction": "input", "bits": [ 328 ] }, "OP6": { "direction": "input", "bits": [ 329 ] }, "OP7": { "direction": "input", "bits": [ 330 ] }, "OP8": { "direction": "input", "bits": [ 331 ] }, "OP9": { "direction": "input", "bits": [ 332 ] }, "OP10": { "direction": "input", "bits": [ 333 ] }, "R0": { "direction": "output", "bits": [ 334 ] }, "R1": { "direction": "output", "bits": [ 335 ] }, "R2": { "direction": "output", "bits": [ 336 ] }, "R3": { "direction": "output", "bits": [ 337 ] }, "R4": { "direction": "output", "bits": [ 338 ] }, "R5": { "direction": "output", "bits": [ 339 ] }, "R6": { "direction": "output", "bits": [ 340 ] }, "R7": { "direction": "output", "bits": [ 341 ] }, "R8": { "direction": "output", "bits": [ 342 ] }, "R9": { "direction": "output", "bits": [ 343 ] }, "R10": { "direction": "output", "bits": [ 344 ] }, "R11": { "direction": "output", "bits": [ 345 ] }, "R12": { "direction": "output", "bits": [ 346 ] }, "R13": { "direction": "output", "bits": [ 347 ] }, "R14": { "direction": "output", "bits": [ 348 ] }, "R15": { "direction": "output", "bits": [ 349 ] }, "R16": { "direction": "output", "bits": [ 350 ] }, "R17": { "direction": "output", "bits": [ 351 ] }, "R18": { "direction": "output", "bits": [ 352 ] }, "R19": { "direction": "output", "bits": [ 353 ] }, "R20": { "direction": "output", "bits": [ 354 ] }, "R21": { "direction": "output", "bits": [ 355 ] }, "R22": { "direction": "output", "bits": [ 356 ] }, "R23": { "direction": "output", "bits": [ 357 ] }, "R24": { "direction": "output", "bits": [ 358 ] }, "R25": { "direction": "output", "bits": [ 359 ] }, "R26": { "direction": "output", "bits": [ 360 ] }, "R27": { "direction": "output", "bits": [ 361 ] }, "R28": { "direction": "output", "bits": [ 362 ] }, "R29": { "direction": "output", "bits": [ 363 ] }, "R30": { "direction": "output", "bits": [ 364 ] }, "R31": { "direction": "output", "bits": [ 365 ] }, "R32": { "direction": "output", "bits": [ 366 ] }, "R33": { "direction": "output", "bits": [ 367 ] }, "R34": { "direction": "output", "bits": [ 368 ] }, "R35": { "direction": "output", "bits": [ 369 ] }, "R36": { "direction": "output", "bits": [ 370 ] }, "R37": { "direction": "output", "bits": [ 371 ] }, "R38": { "direction": "output", "bits": [ 372 ] }, "R39": { "direction": "output", "bits": [ 373 ] }, "R40": { "direction": "output", "bits": [ 374 ] }, "R41": { "direction": "output", "bits": [ 375 ] }, "R42": { "direction": "output", "bits": [ 376 ] }, "R43": { "direction": "output", "bits": [ 377 ] }, "R44": { "direction": "output", "bits": [ 378 ] }, "R45": { "direction": "output", "bits": [ 379 ] }, "R46": { "direction": "output", "bits": [ 380 ] }, "R47": { "direction": "output", "bits": [ 381 ] }, "R48": { "direction": "output", "bits": [ 382 ] }, "R49": { "direction": "output", "bits": [ 383 ] }, "R50": { "direction": "output", "bits": [ 384 ] }, "R51": { "direction": "output", "bits": [ 385 ] }, "R52": { "direction": "output", "bits": [ 386 ] }, "R53": { "direction": "output", "bits": [ 387 ] }, "CO0": { "direction": "output", "bits": [ 388 ] }, "CO1": { "direction": "output", "bits": [ 389 ] }, "CO2": { "direction": "output", "bits": [ 390 ] }, "CO3": { "direction": "output", "bits": [ 391 ] }, "CO4": { "direction": "output", "bits": [ 392 ] }, "CO5": { "direction": "output", "bits": [ 393 ] }, "CO6": { "direction": "output", "bits": [ 394 ] }, "CO7": { "direction": "output", "bits": [ 395 ] }, "CO8": { "direction": "output", "bits": [ 396 ] }, "CO9": { "direction": "output", "bits": [ 397 ] }, "CO10": { "direction": "output", "bits": [ 398 ] }, "CO11": { "direction": "output", "bits": [ 399 ] }, "CO12": { "direction": "output", "bits": [ 400 ] }, "CO13": { "direction": "output", "bits": [ 401 ] }, "CO14": { "direction": "output", "bits": [ 402 ] }, "CO15": { "direction": "output", "bits": [ 403 ] }, "CO16": { "direction": "output", "bits": [ 404 ] }, "CO17": { "direction": "output", "bits": [ 405 ] }, "CO18": { "direction": "output", "bits": [ 406 ] }, "CO19": { "direction": "output", "bits": [ 407 ] }, "CO20": { "direction": "output", "bits": [ 408 ] }, "CO21": { "direction": "output", "bits": [ 409 ] }, "CO22": { "direction": "output", "bits": [ 410 ] }, "CO23": { "direction": "output", "bits": [ 411 ] }, "CO24": { "direction": "output", "bits": [ 412 ] }, "CO25": { "direction": "output", "bits": [ 413 ] }, "CO26": { "direction": "output", "bits": [ 414 ] }, "CO27": { "direction": "output", "bits": [ 415 ] }, "CO28": { "direction": "output", "bits": [ 416 ] }, "CO29": { "direction": "output", "bits": [ 417 ] }, "CO30": { "direction": "output", "bits": [ 418 ] }, "CO31": { "direction": "output", "bits": [ 419 ] }, "CO32": { "direction": "output", "bits": [ 420 ] }, "CO33": { "direction": "output", "bits": [ 421 ] }, "CO34": { "direction": "output", "bits": [ 422 ] }, "CO35": { "direction": "output", "bits": [ 423 ] }, "CO36": { "direction": "output", "bits": [ 424 ] }, "CO37": { "direction": "output", "bits": [ 425 ] }, "CO38": { "direction": "output", "bits": [ 426 ] }, "CO39": { "direction": "output", "bits": [ 427 ] }, "CO40": { "direction": "output", "bits": [ 428 ] }, "CO41": { "direction": "output", "bits": [ 429 ] }, "CO42": { "direction": "output", "bits": [ 430 ] }, "CO43": { "direction": "output", "bits": [ 431 ] }, "CO44": { "direction": "output", "bits": [ 432 ] }, "CO45": { "direction": "output", "bits": [ 433 ] }, "CO46": { "direction": "output", "bits": [ 434 ] }, "CO47": { "direction": "output", "bits": [ 435 ] }, "CO48": { "direction": "output", "bits": [ 436 ] }, "CO49": { "direction": "output", "bits": [ 437 ] }, "CO50": { "direction": "output", "bits": [ 438 ] }, "CO51": { "direction": "output", "bits": [ 439 ] }, "CO52": { "direction": "output", "bits": [ 440 ] }, "CO53": { "direction": "output", "bits": [ 441 ] }, "EQZ": { "direction": "output", "bits": [ 442 ] }, "EQZM": { "direction": "output", "bits": [ 443 ] }, "EQOM": { "direction": "output", "bits": [ 444 ] }, "EQPAT": { "direction": "output", "bits": [ 445 ] }, "EQPATB": { "direction": "output", "bits": [ 446 ] }, "OVER": { "direction": "output", "bits": [ 447 ] }, "UNDER": { "direction": "output", "bits": [ 448 ] }, "OVERUNDER": { "direction": "output", "bits": [ 449 ] }, "SIGNEDR": { "direction": "output", "bits": [ 450 ] } }, "cells": { }, "netnames": { "A0": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.8-49.10" } }, "A1": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.12-49.14" } }, "A10": { "hide_name": 0, "bits": [ 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.48-49.51" } }, "A11": { "hide_name": 0, "bits": [ 28 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.53-49.56" } }, "A12": { "hide_name": 0, "bits": [ 29 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.58-49.61" } }, "A13": { "hide_name": 0, "bits": [ 30 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.63-49.66" } }, "A14": { "hide_name": 0, "bits": [ 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.68-49.71" } }, "A15": { "hide_name": 0, "bits": [ 32 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.73-49.76" } }, "A16": { "hide_name": 0, "bits": [ 33 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.78-49.81" } }, "A17": { "hide_name": 0, "bits": [ 34 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.83-49.86" } }, "A18": { "hide_name": 0, "bits": [ 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.88-49.91" } }, "A19": { "hide_name": 0, "bits": [ 36 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.93-49.96" } }, "A2": { "hide_name": 0, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.16-49.18" } }, "A20": { "hide_name": 0, "bits": [ 37 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.98-49.101" } }, "A21": { "hide_name": 0, "bits": [ 38 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.103-49.106" } }, "A22": { "hide_name": 0, "bits": [ 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.108-49.111" } }, "A23": { "hide_name": 0, "bits": [ 40 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.113-49.116" } }, "A24": { "hide_name": 0, "bits": [ 41 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.118-49.121" } }, "A25": { "hide_name": 0, "bits": [ 42 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.123-49.126" } }, "A26": { "hide_name": 0, "bits": [ 43 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.128-49.131" } }, "A27": { "hide_name": 0, "bits": [ 44 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.133-49.136" } }, "A28": { "hide_name": 0, "bits": [ 45 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.138-49.141" } }, "A29": { "hide_name": 0, "bits": [ 46 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.143-49.146" } }, "A3": { "hide_name": 0, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.20-49.22" } }, "A30": { "hide_name": 0, "bits": [ 47 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.148-49.151" } }, "A31": { "hide_name": 0, "bits": [ 48 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.153-49.156" } }, "A32": { "hide_name": 0, "bits": [ 49 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.158-49.161" } }, "A33": { "hide_name": 0, "bits": [ 50 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.163-49.166" } }, "A34": { "hide_name": 0, "bits": [ 51 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.168-49.171" } }, "A35": { "hide_name": 0, "bits": [ 52 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.173-49.176" } }, "A4": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.24-49.26" } }, "A5": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.28-49.30" } }, "A6": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.32-49.34" } }, "A7": { "hide_name": 0, "bits": [ 24 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.36-49.38" } }, "A8": { "hide_name": 0, "bits": [ 25 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.40-49.42" } }, "A9": { "hide_name": 0, "bits": [ 26 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:49.44-49.46" } }, "B0": { "hide_name": 0, "bits": [ 53 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.8-50.10" } }, "B1": { "hide_name": 0, "bits": [ 54 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.12-50.14" } }, "B10": { "hide_name": 0, "bits": [ 63 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.48-50.51" } }, "B11": { "hide_name": 0, "bits": [ 64 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.53-50.56" } }, "B12": { "hide_name": 0, "bits": [ 65 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.58-50.61" } }, "B13": { "hide_name": 0, "bits": [ 66 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.63-50.66" } }, "B14": { "hide_name": 0, "bits": [ 67 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.68-50.71" } }, "B15": { "hide_name": 0, "bits": [ 68 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.73-50.76" } }, "B16": { "hide_name": 0, "bits": [ 69 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.78-50.81" } }, "B17": { "hide_name": 0, "bits": [ 70 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.83-50.86" } }, "B18": { "hide_name": 0, "bits": [ 71 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.88-50.91" } }, "B19": { "hide_name": 0, "bits": [ 72 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.93-50.96" } }, "B2": { "hide_name": 0, "bits": [ 55 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.16-50.18" } }, "B20": { "hide_name": 0, "bits": [ 73 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.98-50.101" } }, "B21": { "hide_name": 0, "bits": [ 74 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.103-50.106" } }, "B22": { "hide_name": 0, "bits": [ 75 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.108-50.111" } }, "B23": { "hide_name": 0, "bits": [ 76 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.113-50.116" } }, "B24": { "hide_name": 0, "bits": [ 77 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.118-50.121" } }, "B25": { "hide_name": 0, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.123-50.126" } }, "B26": { "hide_name": 0, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.128-50.131" } }, "B27": { "hide_name": 0, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.133-50.136" } }, "B28": { "hide_name": 0, "bits": [ 81 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.138-50.141" } }, "B29": { "hide_name": 0, "bits": [ 82 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.143-50.146" } }, "B3": { "hide_name": 0, "bits": [ 56 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.20-50.22" } }, "B30": { "hide_name": 0, "bits": [ 83 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.148-50.151" } }, "B31": { "hide_name": 0, "bits": [ 84 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.153-50.156" } }, "B32": { "hide_name": 0, "bits": [ 85 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.158-50.161" } }, "B33": { "hide_name": 0, "bits": [ 86 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.163-50.166" } }, "B34": { "hide_name": 0, "bits": [ 87 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.168-50.171" } }, "B35": { "hide_name": 0, "bits": [ 88 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.173-50.176" } }, "B4": { "hide_name": 0, "bits": [ 57 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.24-50.26" } }, "B5": { "hide_name": 0, "bits": [ 58 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.28-50.30" } }, "B6": { "hide_name": 0, "bits": [ 59 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.32-50.34" } }, "B7": { "hide_name": 0, "bits": [ 60 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.36-50.38" } }, "B8": { "hide_name": 0, "bits": [ 61 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.40-50.42" } }, "B9": { "hide_name": 0, "bits": [ 62 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:50.44-50.46" } }, "C0": { "hide_name": 0, "bits": [ 89 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.8-51.10" } }, "C1": { "hide_name": 0, "bits": [ 90 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.12-51.14" } }, "C10": { "hide_name": 0, "bits": [ 99 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.48-51.51" } }, "C11": { "hide_name": 0, "bits": [ 100 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.53-51.56" } }, "C12": { "hide_name": 0, "bits": [ 101 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.58-51.61" } }, "C13": { "hide_name": 0, "bits": [ 102 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.63-51.66" } }, "C14": { "hide_name": 0, "bits": [ 103 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.68-51.71" } }, "C15": { "hide_name": 0, "bits": [ 104 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.73-51.76" } }, "C16": { "hide_name": 0, "bits": [ 105 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.78-51.81" } }, "C17": { "hide_name": 0, "bits": [ 106 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.83-51.86" } }, "C18": { "hide_name": 0, "bits": [ 107 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.88-51.91" } }, "C19": { "hide_name": 0, "bits": [ 108 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.93-51.96" } }, "C2": { "hide_name": 0, "bits": [ 91 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.16-51.18" } }, "C20": { "hide_name": 0, "bits": [ 109 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.98-51.101" } }, "C21": { "hide_name": 0, "bits": [ 110 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.103-51.106" } }, "C22": { "hide_name": 0, "bits": [ 111 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.108-51.111" } }, "C23": { "hide_name": 0, "bits": [ 112 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.113-51.116" } }, "C24": { "hide_name": 0, "bits": [ 113 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.118-51.121" } }, "C25": { "hide_name": 0, "bits": [ 114 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.123-51.126" } }, "C26": { "hide_name": 0, "bits": [ 115 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.128-51.131" } }, "C27": { "hide_name": 0, "bits": [ 116 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.133-51.136" } }, "C28": { "hide_name": 0, "bits": [ 117 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.138-51.141" } }, "C29": { "hide_name": 0, "bits": [ 118 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.143-51.146" } }, "C3": { "hide_name": 0, "bits": [ 92 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.20-51.22" } }, "C30": { "hide_name": 0, "bits": [ 119 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.148-51.151" } }, "C31": { "hide_name": 0, "bits": [ 120 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.153-51.156" } }, "C32": { "hide_name": 0, "bits": [ 121 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.158-51.161" } }, "C33": { "hide_name": 0, "bits": [ 122 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.163-51.166" } }, "C34": { "hide_name": 0, "bits": [ 123 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.168-51.171" } }, "C35": { "hide_name": 0, "bits": [ 124 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.173-51.176" } }, "C36": { "hide_name": 0, "bits": [ 125 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.178-51.181" } }, "C37": { "hide_name": 0, "bits": [ 126 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.183-51.186" } }, "C38": { "hide_name": 0, "bits": [ 127 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.188-51.191" } }, "C39": { "hide_name": 0, "bits": [ 128 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.193-51.196" } }, "C4": { "hide_name": 0, "bits": [ 93 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.24-51.26" } }, "C40": { "hide_name": 0, "bits": [ 129 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.198-51.201" } }, "C41": { "hide_name": 0, "bits": [ 130 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.203-51.206" } }, "C42": { "hide_name": 0, "bits": [ 131 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.208-51.211" } }, "C43": { "hide_name": 0, "bits": [ 132 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.213-51.216" } }, "C44": { "hide_name": 0, "bits": [ 133 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.218-51.221" } }, "C45": { "hide_name": 0, "bits": [ 134 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.223-51.226" } }, "C46": { "hide_name": 0, "bits": [ 135 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.228-51.231" } }, "C47": { "hide_name": 0, "bits": [ 136 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.233-51.236" } }, "C48": { "hide_name": 0, "bits": [ 137 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.238-51.241" } }, "C49": { "hide_name": 0, "bits": [ 138 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.243-51.246" } }, "C5": { "hide_name": 0, "bits": [ 94 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.28-51.30" } }, "C50": { "hide_name": 0, "bits": [ 139 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.248-51.251" } }, "C51": { "hide_name": 0, "bits": [ 140 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.253-51.256" } }, "C52": { "hide_name": 0, "bits": [ 141 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.258-51.261" } }, "C53": { "hide_name": 0, "bits": [ 142 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.263-51.266" } }, "C6": { "hide_name": 0, "bits": [ 95 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.32-51.34" } }, "C7": { "hide_name": 0, "bits": [ 96 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.36-51.38" } }, "C8": { "hide_name": 0, "bits": [ 97 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.40-51.42" } }, "C9": { "hide_name": 0, "bits": [ 98 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:51.44-51.46" } }, "CE0": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:46.8-46.11" } }, "CE1": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:46.13-46.16" } }, "CE2": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:46.18-46.21" } }, "CE3": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:46.23-46.26" } }, "CFB0": { "hide_name": 0, "bits": [ 143 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.8-52.12" } }, "CFB1": { "hide_name": 0, "bits": [ 144 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.14-52.18" } }, "CFB10": { "hide_name": 0, "bits": [ 153 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.68-52.73" } }, "CFB11": { "hide_name": 0, "bits": [ 154 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.75-52.80" } }, "CFB12": { "hide_name": 0, "bits": [ 155 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.82-52.87" } }, "CFB13": { "hide_name": 0, "bits": [ 156 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.89-52.94" } }, "CFB14": { "hide_name": 0, "bits": [ 157 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.96-52.101" } }, "CFB15": { "hide_name": 0, "bits": [ 158 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.103-52.108" } }, "CFB16": { "hide_name": 0, "bits": [ 159 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.110-52.115" } }, "CFB17": { "hide_name": 0, "bits": [ 160 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.117-52.122" } }, "CFB18": { "hide_name": 0, "bits": [ 161 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.124-52.129" } }, "CFB19": { "hide_name": 0, "bits": [ 162 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.131-52.136" } }, "CFB2": { "hide_name": 0, "bits": [ 145 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.20-52.24" } }, "CFB20": { "hide_name": 0, "bits": [ 163 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.138-52.143" } }, "CFB21": { "hide_name": 0, "bits": [ 164 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.145-52.150" } }, "CFB22": { "hide_name": 0, "bits": [ 165 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.152-52.157" } }, "CFB23": { "hide_name": 0, "bits": [ 166 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.159-52.164" } }, "CFB24": { "hide_name": 0, "bits": [ 167 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.166-52.171" } }, "CFB25": { "hide_name": 0, "bits": [ 168 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.173-52.178" } }, "CFB26": { "hide_name": 0, "bits": [ 169 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.180-52.185" } }, "CFB27": { "hide_name": 0, "bits": [ 170 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.187-52.192" } }, "CFB28": { "hide_name": 0, "bits": [ 171 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.194-52.199" } }, "CFB29": { "hide_name": 0, "bits": [ 172 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.201-52.206" } }, "CFB3": { "hide_name": 0, "bits": [ 146 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.26-52.30" } }, "CFB30": { "hide_name": 0, "bits": [ 173 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.208-52.213" } }, "CFB31": { "hide_name": 0, "bits": [ 174 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.215-52.220" } }, "CFB32": { "hide_name": 0, "bits": [ 175 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.222-52.227" } }, "CFB33": { "hide_name": 0, "bits": [ 176 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.229-52.234" } }, "CFB34": { "hide_name": 0, "bits": [ 177 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.236-52.241" } }, "CFB35": { "hide_name": 0, "bits": [ 178 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.243-52.248" } }, "CFB36": { "hide_name": 0, "bits": [ 179 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.250-52.255" } }, "CFB37": { "hide_name": 0, "bits": [ 180 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.257-52.262" } }, "CFB38": { "hide_name": 0, "bits": [ 181 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.264-52.269" } }, "CFB39": { "hide_name": 0, "bits": [ 182 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.271-52.276" } }, "CFB4": { "hide_name": 0, "bits": [ 147 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.32-52.36" } }, "CFB40": { "hide_name": 0, "bits": [ 183 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.278-52.283" } }, "CFB41": { "hide_name": 0, "bits": [ 184 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.285-52.290" } }, "CFB42": { "hide_name": 0, "bits": [ 185 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.292-52.297" } }, "CFB43": { "hide_name": 0, "bits": [ 186 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.299-52.304" } }, "CFB44": { "hide_name": 0, "bits": [ 187 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.306-52.311" } }, "CFB45": { "hide_name": 0, "bits": [ 188 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.313-52.318" } }, "CFB46": { "hide_name": 0, "bits": [ 189 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.320-52.325" } }, "CFB47": { "hide_name": 0, "bits": [ 190 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.327-52.332" } }, "CFB48": { "hide_name": 0, "bits": [ 191 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.334-52.339" } }, "CFB49": { "hide_name": 0, "bits": [ 192 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.341-52.346" } }, "CFB5": { "hide_name": 0, "bits": [ 148 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.38-52.42" } }, "CFB50": { "hide_name": 0, "bits": [ 193 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.348-52.353" } }, "CFB51": { "hide_name": 0, "bits": [ 194 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.355-52.360" } }, "CFB52": { "hide_name": 0, "bits": [ 195 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.362-52.367" } }, "CFB53": { "hide_name": 0, "bits": [ 196 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.369-52.374" } }, "CFB6": { "hide_name": 0, "bits": [ 149 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.44-52.48" } }, "CFB7": { "hide_name": 0, "bits": [ 150 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.50-52.54" } }, "CFB8": { "hide_name": 0, "bits": [ 151 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.56-52.60" } }, "CFB9": { "hide_name": 0, "bits": [ 152 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:52.62-52.66" } }, "CIN0": { "hide_name": 0, "bits": [ 269 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.8-55.12" } }, "CIN1": { "hide_name": 0, "bits": [ 270 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.14-55.18" } }, "CIN10": { "hide_name": 0, "bits": [ 279 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.68-55.73" } }, "CIN11": { "hide_name": 0, "bits": [ 280 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.75-55.80" } }, "CIN12": { "hide_name": 0, "bits": [ 281 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.82-55.87" } }, "CIN13": { "hide_name": 0, "bits": [ 282 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.89-55.94" } }, "CIN14": { "hide_name": 0, "bits": [ 283 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.96-55.101" } }, "CIN15": { "hide_name": 0, "bits": [ 284 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.103-55.108" } }, "CIN16": { "hide_name": 0, "bits": [ 285 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.110-55.115" } }, "CIN17": { "hide_name": 0, "bits": [ 286 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.117-55.122" } }, "CIN18": { "hide_name": 0, "bits": [ 287 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.124-55.129" } }, "CIN19": { "hide_name": 0, "bits": [ 288 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.131-55.136" } }, "CIN2": { "hide_name": 0, "bits": [ 271 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.20-55.24" } }, "CIN20": { "hide_name": 0, "bits": [ 289 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.138-55.143" } }, "CIN21": { "hide_name": 0, "bits": [ 290 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.145-55.150" } }, "CIN22": { "hide_name": 0, "bits": [ 291 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.152-55.157" } }, "CIN23": { "hide_name": 0, "bits": [ 292 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.159-55.164" } }, "CIN24": { "hide_name": 0, "bits": [ 293 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.166-55.171" } }, "CIN25": { "hide_name": 0, "bits": [ 294 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.173-55.178" } }, "CIN26": { "hide_name": 0, "bits": [ 295 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.180-55.185" } }, "CIN27": { "hide_name": 0, "bits": [ 296 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.187-55.192" } }, "CIN28": { "hide_name": 0, "bits": [ 297 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.194-55.199" } }, "CIN29": { "hide_name": 0, "bits": [ 298 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.201-55.206" } }, "CIN3": { "hide_name": 0, "bits": [ 272 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.26-55.30" } }, "CIN30": { "hide_name": 0, "bits": [ 299 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.208-55.213" } }, "CIN31": { "hide_name": 0, "bits": [ 300 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.215-55.220" } }, "CIN32": { "hide_name": 0, "bits": [ 301 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.222-55.227" } }, "CIN33": { "hide_name": 0, "bits": [ 302 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.229-55.234" } }, "CIN34": { "hide_name": 0, "bits": [ 303 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.236-55.241" } }, "CIN35": { "hide_name": 0, "bits": [ 304 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.243-55.248" } }, "CIN36": { "hide_name": 0, "bits": [ 305 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.250-55.255" } }, "CIN37": { "hide_name": 0, "bits": [ 306 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.257-55.262" } }, "CIN38": { "hide_name": 0, "bits": [ 307 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.264-55.269" } }, "CIN39": { "hide_name": 0, "bits": [ 308 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.271-55.276" } }, "CIN4": { "hide_name": 0, "bits": [ 273 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.32-55.36" } }, "CIN40": { "hide_name": 0, "bits": [ 309 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.278-55.283" } }, "CIN41": { "hide_name": 0, "bits": [ 310 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.285-55.290" } }, "CIN42": { "hide_name": 0, "bits": [ 311 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.292-55.297" } }, "CIN43": { "hide_name": 0, "bits": [ 312 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.299-55.304" } }, "CIN44": { "hide_name": 0, "bits": [ 313 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.306-55.311" } }, "CIN45": { "hide_name": 0, "bits": [ 314 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.313-55.318" } }, "CIN46": { "hide_name": 0, "bits": [ 315 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.320-55.325" } }, "CIN47": { "hide_name": 0, "bits": [ 316 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.327-55.332" } }, "CIN48": { "hide_name": 0, "bits": [ 317 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.334-55.339" } }, "CIN49": { "hide_name": 0, "bits": [ 318 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.341-55.346" } }, "CIN5": { "hide_name": 0, "bits": [ 274 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.38-55.42" } }, "CIN50": { "hide_name": 0, "bits": [ 319 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.348-55.353" } }, "CIN51": { "hide_name": 0, "bits": [ 320 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.355-55.360" } }, "CIN52": { "hide_name": 0, "bits": [ 321 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.362-55.367" } }, "CIN53": { "hide_name": 0, "bits": [ 322 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.369-55.374" } }, "CIN6": { "hide_name": 0, "bits": [ 275 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.44-55.48" } }, "CIN7": { "hide_name": 0, "bits": [ 276 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.50-55.54" } }, "CIN8": { "hide_name": 0, "bits": [ 277 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.56-55.60" } }, "CIN9": { "hide_name": 0, "bits": [ 278 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:55.62-55.66" } }, "CLK0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:45.8-45.12" } }, "CLK1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:45.14-45.18" } }, "CLK2": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:45.20-45.24" } }, "CLK3": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:45.26-45.30" } }, "CO0": { "hide_name": 0, "bits": [ 388 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.9-58.12" } }, "CO1": { "hide_name": 0, "bits": [ 389 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.14-58.17" } }, "CO10": { "hide_name": 0, "bits": [ 398 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.59-58.63" } }, "CO11": { "hide_name": 0, "bits": [ 399 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.65-58.69" } }, "CO12": { "hide_name": 0, "bits": [ 400 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.71-58.75" } }, "CO13": { "hide_name": 0, "bits": [ 401 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.77-58.81" } }, "CO14": { "hide_name": 0, "bits": [ 402 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.83-58.87" } }, "CO15": { "hide_name": 0, "bits": [ 403 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.89-58.93" } }, "CO16": { "hide_name": 0, "bits": [ 404 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.95-58.99" } }, "CO17": { "hide_name": 0, "bits": [ 405 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.101-58.105" } }, "CO18": { "hide_name": 0, "bits": [ 406 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.107-58.111" } }, "CO19": { "hide_name": 0, "bits": [ 407 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.113-58.117" } }, "CO2": { "hide_name": 0, "bits": [ 390 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.19-58.22" } }, "CO20": { "hide_name": 0, "bits": [ 408 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.119-58.123" } }, "CO21": { "hide_name": 0, "bits": [ 409 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.125-58.129" } }, "CO22": { "hide_name": 0, "bits": [ 410 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.131-58.135" } }, "CO23": { "hide_name": 0, "bits": [ 411 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.137-58.141" } }, "CO24": { "hide_name": 0, "bits": [ 412 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.143-58.147" } }, "CO25": { "hide_name": 0, "bits": [ 413 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.149-58.153" } }, "CO26": { "hide_name": 0, "bits": [ 414 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.155-58.159" } }, "CO27": { "hide_name": 0, "bits": [ 415 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.161-58.165" } }, "CO28": { "hide_name": 0, "bits": [ 416 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.167-58.171" } }, "CO29": { "hide_name": 0, "bits": [ 417 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.173-58.177" } }, "CO3": { "hide_name": 0, "bits": [ 391 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.24-58.27" } }, "CO30": { "hide_name": 0, "bits": [ 418 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.179-58.183" } }, "CO31": { "hide_name": 0, "bits": [ 419 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.185-58.189" } }, "CO32": { "hide_name": 0, "bits": [ 420 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.191-58.195" } }, "CO33": { "hide_name": 0, "bits": [ 421 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.197-58.201" } }, "CO34": { "hide_name": 0, "bits": [ 422 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.203-58.207" } }, "CO35": { "hide_name": 0, "bits": [ 423 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.209-58.213" } }, "CO36": { "hide_name": 0, "bits": [ 424 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.215-58.219" } }, "CO37": { "hide_name": 0, "bits": [ 425 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.221-58.225" } }, "CO38": { "hide_name": 0, "bits": [ 426 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.227-58.231" } }, "CO39": { "hide_name": 0, "bits": [ 427 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.233-58.237" } }, "CO4": { "hide_name": 0, "bits": [ 392 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.29-58.32" } }, "CO40": { "hide_name": 0, "bits": [ 428 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.239-58.243" } }, "CO41": { "hide_name": 0, "bits": [ 429 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.245-58.249" } }, "CO42": { "hide_name": 0, "bits": [ 430 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.251-58.255" } }, "CO43": { "hide_name": 0, "bits": [ 431 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.257-58.261" } }, "CO44": { "hide_name": 0, "bits": [ 432 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.263-58.267" } }, "CO45": { "hide_name": 0, "bits": [ 433 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.269-58.273" } }, "CO46": { "hide_name": 0, "bits": [ 434 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.275-58.279" } }, "CO47": { "hide_name": 0, "bits": [ 435 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.281-58.285" } }, "CO48": { "hide_name": 0, "bits": [ 436 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.287-58.291" } }, "CO49": { "hide_name": 0, "bits": [ 437 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.293-58.297" } }, "CO5": { "hide_name": 0, "bits": [ 393 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.34-58.37" } }, "CO50": { "hide_name": 0, "bits": [ 438 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.299-58.303" } }, "CO51": { "hide_name": 0, "bits": [ 439 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.305-58.309" } }, "CO52": { "hide_name": 0, "bits": [ 440 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.311-58.315" } }, "CO53": { "hide_name": 0, "bits": [ 441 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.317-58.321" } }, "CO6": { "hide_name": 0, "bits": [ 394 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.39-58.42" } }, "CO7": { "hide_name": 0, "bits": [ 395 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.44-58.47" } }, "CO8": { "hide_name": 0, "bits": [ 396 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.49-58.52" } }, "CO9": { "hide_name": 0, "bits": [ 397 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:58.54-58.57" } }, "EQOM": { "hide_name": 0, "bits": [ 444 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:59.20-59.24" } }, "EQPAT": { "hide_name": 0, "bits": [ 445 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:59.26-59.31" } }, "EQPATB": { "hide_name": 0, "bits": [ 446 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:59.33-59.39" } }, "EQZ": { "hide_name": 0, "bits": [ 442 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:59.9-59.12" } }, "EQZM": { "hide_name": 0, "bits": [ 443 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:59.14-59.18" } }, "MA0": { "hide_name": 0, "bits": [ 197 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.8-53.11" } }, "MA1": { "hide_name": 0, "bits": [ 198 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.13-53.16" } }, "MA10": { "hide_name": 0, "bits": [ 207 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.58-53.62" } }, "MA11": { "hide_name": 0, "bits": [ 208 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.64-53.68" } }, "MA12": { "hide_name": 0, "bits": [ 209 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.70-53.74" } }, "MA13": { "hide_name": 0, "bits": [ 210 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.76-53.80" } }, "MA14": { "hide_name": 0, "bits": [ 211 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.82-53.86" } }, "MA15": { "hide_name": 0, "bits": [ 212 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.88-53.92" } }, "MA16": { "hide_name": 0, "bits": [ 213 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.94-53.98" } }, "MA17": { "hide_name": 0, "bits": [ 214 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.100-53.104" } }, "MA18": { "hide_name": 0, "bits": [ 215 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.106-53.110" } }, "MA19": { "hide_name": 0, "bits": [ 216 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.112-53.116" } }, "MA2": { "hide_name": 0, "bits": [ 199 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.18-53.21" } }, "MA20": { "hide_name": 0, "bits": [ 217 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.118-53.122" } }, "MA21": { "hide_name": 0, "bits": [ 218 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.124-53.128" } }, "MA22": { "hide_name": 0, "bits": [ 219 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.130-53.134" } }, "MA23": { "hide_name": 0, "bits": [ 220 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.136-53.140" } }, "MA24": { "hide_name": 0, "bits": [ 221 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.142-53.146" } }, "MA25": { "hide_name": 0, "bits": [ 222 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.148-53.152" } }, "MA26": { "hide_name": 0, "bits": [ 223 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.154-53.158" } }, "MA27": { "hide_name": 0, "bits": [ 224 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.160-53.164" } }, "MA28": { "hide_name": 0, "bits": [ 225 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.166-53.170" } }, "MA29": { "hide_name": 0, "bits": [ 226 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.172-53.176" } }, "MA3": { "hide_name": 0, "bits": [ 200 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.23-53.26" } }, "MA30": { "hide_name": 0, "bits": [ 227 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.178-53.182" } }, "MA31": { "hide_name": 0, "bits": [ 228 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.184-53.188" } }, "MA32": { "hide_name": 0, "bits": [ 229 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.190-53.194" } }, "MA33": { "hide_name": 0, "bits": [ 230 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.196-53.200" } }, "MA34": { "hide_name": 0, "bits": [ 231 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.202-53.206" } }, "MA35": { "hide_name": 0, "bits": [ 232 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.208-53.212" } }, "MA4": { "hide_name": 0, "bits": [ 201 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.28-53.31" } }, "MA5": { "hide_name": 0, "bits": [ 202 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.33-53.36" } }, "MA6": { "hide_name": 0, "bits": [ 203 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.38-53.41" } }, "MA7": { "hide_name": 0, "bits": [ 204 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.43-53.46" } }, "MA8": { "hide_name": 0, "bits": [ 205 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.48-53.51" } }, "MA9": { "hide_name": 0, "bits": [ 206 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:53.53-53.56" } }, "MB0": { "hide_name": 0, "bits": [ 233 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.8-54.11" } }, "MB1": { "hide_name": 0, "bits": [ 234 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.13-54.16" } }, "MB10": { "hide_name": 0, "bits": [ 243 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.58-54.62" } }, "MB11": { "hide_name": 0, "bits": [ 244 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.64-54.68" } }, "MB12": { "hide_name": 0, "bits": [ 245 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.70-54.74" } }, "MB13": { "hide_name": 0, "bits": [ 246 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.76-54.80" } }, "MB14": { "hide_name": 0, "bits": [ 247 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.82-54.86" } }, "MB15": { "hide_name": 0, "bits": [ 248 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.88-54.92" } }, "MB16": { "hide_name": 0, "bits": [ 249 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.94-54.98" } }, "MB17": { "hide_name": 0, "bits": [ 250 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.100-54.104" } }, "MB18": { "hide_name": 0, "bits": [ 251 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.106-54.110" } }, "MB19": { "hide_name": 0, "bits": [ 252 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.112-54.116" } }, "MB2": { "hide_name": 0, "bits": [ 235 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.18-54.21" } }, "MB20": { "hide_name": 0, "bits": [ 253 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.118-54.122" } }, "MB21": { "hide_name": 0, "bits": [ 254 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.124-54.128" } }, "MB22": { "hide_name": 0, "bits": [ 255 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.130-54.134" } }, "MB23": { "hide_name": 0, "bits": [ 256 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.136-54.140" } }, "MB24": { "hide_name": 0, "bits": [ 257 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.142-54.146" } }, "MB25": { "hide_name": 0, "bits": [ 258 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.148-54.152" } }, "MB26": { "hide_name": 0, "bits": [ 259 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.154-54.158" } }, "MB27": { "hide_name": 0, "bits": [ 260 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.160-54.164" } }, "MB28": { "hide_name": 0, "bits": [ 261 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.166-54.170" } }, "MB29": { "hide_name": 0, "bits": [ 262 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.172-54.176" } }, "MB3": { "hide_name": 0, "bits": [ 236 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.23-54.26" } }, "MB30": { "hide_name": 0, "bits": [ 263 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.178-54.182" } }, "MB31": { "hide_name": 0, "bits": [ 264 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.184-54.188" } }, "MB32": { "hide_name": 0, "bits": [ 265 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.190-54.194" } }, "MB33": { "hide_name": 0, "bits": [ 266 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.196-54.200" } }, "MB34": { "hide_name": 0, "bits": [ 267 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.202-54.206" } }, "MB35": { "hide_name": 0, "bits": [ 268 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.208-54.212" } }, "MB4": { "hide_name": 0, "bits": [ 237 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.28-54.31" } }, "MB5": { "hide_name": 0, "bits": [ 238 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.33-54.36" } }, "MB6": { "hide_name": 0, "bits": [ 239 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.38-54.41" } }, "MB7": { "hide_name": 0, "bits": [ 240 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.43-54.46" } }, "MB8": { "hide_name": 0, "bits": [ 241 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.48-54.51" } }, "MB9": { "hide_name": 0, "bits": [ 242 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:54.53-54.56" } }, "OP0": { "hide_name": 0, "bits": [ 323 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.8-56.11" } }, "OP1": { "hide_name": 0, "bits": [ 324 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.13-56.16" } }, "OP10": { "hide_name": 0, "bits": [ 333 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.58-56.62" } }, "OP2": { "hide_name": 0, "bits": [ 325 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.18-56.21" } }, "OP3": { "hide_name": 0, "bits": [ 326 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.23-56.26" } }, "OP4": { "hide_name": 0, "bits": [ 327 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.28-56.31" } }, "OP5": { "hide_name": 0, "bits": [ 328 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.33-56.36" } }, "OP6": { "hide_name": 0, "bits": [ 329 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.38-56.41" } }, "OP7": { "hide_name": 0, "bits": [ 330 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.43-56.46" } }, "OP8": { "hide_name": 0, "bits": [ 331 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.48-56.51" } }, "OP9": { "hide_name": 0, "bits": [ 332 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:56.53-56.56" } }, "OVER": { "hide_name": 0, "bits": [ 447 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:60.9-60.13" } }, "OVERUNDER": { "hide_name": 0, "bits": [ 449 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:60.22-60.31" } }, "R0": { "hide_name": 0, "bits": [ 334 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.9-57.11" } }, "R1": { "hide_name": 0, "bits": [ 335 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.13-57.15" } }, "R10": { "hide_name": 0, "bits": [ 344 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.49-57.52" } }, "R11": { "hide_name": 0, "bits": [ 345 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.54-57.57" } }, "R12": { "hide_name": 0, "bits": [ 346 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.59-57.62" } }, "R13": { "hide_name": 0, "bits": [ 347 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.64-57.67" } }, "R14": { "hide_name": 0, "bits": [ 348 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.69-57.72" } }, "R15": { "hide_name": 0, "bits": [ 349 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.74-57.77" } }, "R16": { "hide_name": 0, "bits": [ 350 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.79-57.82" } }, "R17": { "hide_name": 0, "bits": [ 351 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.84-57.87" } }, "R18": { "hide_name": 0, "bits": [ 352 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.89-57.92" } }, "R19": { "hide_name": 0, "bits": [ 353 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.94-57.97" } }, "R2": { "hide_name": 0, "bits": [ 336 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.17-57.19" } }, "R20": { "hide_name": 0, "bits": [ 354 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.99-57.102" } }, "R21": { "hide_name": 0, "bits": [ 355 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.104-57.107" } }, "R22": { "hide_name": 0, "bits": [ 356 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.109-57.112" } }, "R23": { "hide_name": 0, "bits": [ 357 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.114-57.117" } }, "R24": { "hide_name": 0, "bits": [ 358 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.119-57.122" } }, "R25": { "hide_name": 0, "bits": [ 359 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.124-57.127" } }, "R26": { "hide_name": 0, "bits": [ 360 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.129-57.132" } }, "R27": { "hide_name": 0, "bits": [ 361 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.134-57.137" } }, "R28": { "hide_name": 0, "bits": [ 362 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.139-57.142" } }, "R29": { "hide_name": 0, "bits": [ 363 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.144-57.147" } }, "R3": { "hide_name": 0, "bits": [ 337 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.21-57.23" } }, "R30": { "hide_name": 0, "bits": [ 364 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.149-57.152" } }, "R31": { "hide_name": 0, "bits": [ 365 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.154-57.157" } }, "R32": { "hide_name": 0, "bits": [ 366 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.159-57.162" } }, "R33": { "hide_name": 0, "bits": [ 367 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.164-57.167" } }, "R34": { "hide_name": 0, "bits": [ 368 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.169-57.172" } }, "R35": { "hide_name": 0, "bits": [ 369 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.174-57.177" } }, "R36": { "hide_name": 0, "bits": [ 370 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.179-57.182" } }, "R37": { "hide_name": 0, "bits": [ 371 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.184-57.187" } }, "R38": { "hide_name": 0, "bits": [ 372 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.189-57.192" } }, "R39": { "hide_name": 0, "bits": [ 373 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.194-57.197" } }, "R4": { "hide_name": 0, "bits": [ 338 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.25-57.27" } }, "R40": { "hide_name": 0, "bits": [ 374 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.199-57.202" } }, "R41": { "hide_name": 0, "bits": [ 375 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.204-57.207" } }, "R42": { "hide_name": 0, "bits": [ 376 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.209-57.212" } }, "R43": { "hide_name": 0, "bits": [ 377 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.214-57.217" } }, "R44": { "hide_name": 0, "bits": [ 378 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.219-57.222" } }, "R45": { "hide_name": 0, "bits": [ 379 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.224-57.227" } }, "R46": { "hide_name": 0, "bits": [ 380 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.229-57.232" } }, "R47": { "hide_name": 0, "bits": [ 381 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.234-57.237" } }, "R48": { "hide_name": 0, "bits": [ 382 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.239-57.242" } }, "R49": { "hide_name": 0, "bits": [ 383 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.244-57.247" } }, "R5": { "hide_name": 0, "bits": [ 339 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.29-57.31" } }, "R50": { "hide_name": 0, "bits": [ 384 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.249-57.252" } }, "R51": { "hide_name": 0, "bits": [ 385 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.254-57.257" } }, "R52": { "hide_name": 0, "bits": [ 386 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.259-57.262" } }, "R53": { "hide_name": 0, "bits": [ 387 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.264-57.267" } }, "R6": { "hide_name": 0, "bits": [ 340 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.33-57.35" } }, "R7": { "hide_name": 0, "bits": [ 341 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.37-57.39" } }, "R8": { "hide_name": 0, "bits": [ 342 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.41-57.43" } }, "R9": { "hide_name": 0, "bits": [ 343 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:57.45-57.47" } }, "RST0": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:47.8-47.12" } }, "RST1": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:47.14-47.18" } }, "RST2": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:47.20-47.24" } }, "RST3": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:47.26-47.30" } }, "SIGNEDCIN": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:48.28-48.37" } }, "SIGNEDIA": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:48.8-48.16" } }, "SIGNEDIB": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:48.18-48.26" } }, "SIGNEDR": { "hide_name": 0, "bits": [ 450 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:61.9-61.16" } }, "UNDER": { "hide_name": 0, "bits": [ 448 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:60.15-60.20" } } } }, "BB": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:10.1-10.154" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "T": { "direction": "input", "bits": [ 3 ] }, "O": { "direction": "output", "bits": [ 4 ] }, "B": { "direction": "inout", "bits": [ 5 ] } }, "cells": { }, "netnames": { "B": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:10.43-10.44" } }, "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:10.20-10.21" } }, "O": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:10.34-10.35" } }, "T": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:10.23-10.24" } } } }, "BBPD": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:12.1-12.154" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "T": { "direction": "input", "bits": [ 3 ] }, "O": { "direction": "output", "bits": [ 4 ] }, "B": { "direction": "inout", "bits": [ 5 ] } }, "cells": { }, "netnames": { "B": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:12.43-12.44" } }, "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:12.20-12.21" } }, "O": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:12.34-12.35" } }, "T": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:12.23-12.24" } } } }, "BBPU": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:11.1-11.154" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "T": { "direction": "input", "bits": [ 3 ] }, "O": { "direction": "output", "bits": [ 4 ] }, "B": { "direction": "inout", "bits": [ 5 ] } }, "cells": { }, "netnames": { "B": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:11.43-11.44" } }, "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:11.20-11.21" } }, "O": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:11.34-11.35" } }, "T": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:11.23-11.24" } } } }, "CCU2C": { "attributes": { "abc9_box": "00000000000000000000000000000001", "whitebox": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:76.1-134.10" }, "parameter_default_values": { "INIT0": "0000000000000000", "INIT1": "0000000000000000", "INJECT1_0": "YES", "INJECT1_1": "YES" }, "ports": { "CIN": { "direction": "input", "bits": [ 2 ] }, "A0": { "direction": "input", "bits": [ 3 ] }, "B0": { "direction": "input", "bits": [ 4 ] }, "C0": { "direction": "input", "bits": [ 5 ] }, "D0": { "direction": "input", "bits": [ 6 ] }, "A1": { "direction": "input", "bits": [ 7 ] }, "B1": { "direction": "input", "bits": [ 8 ] }, "C1": { "direction": "input", "bits": [ 9 ] }, "D1": { "direction": "input", "bits": [ 10 ] }, "S0": { "direction": "output", "bits": [ 11 ] }, "S1": { "direction": "output", "bits": [ 12 ] }, "COUT": { "direction": "output", "bits": [ 13 ] } }, "cells": { "$and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107$275": { "hide_name": 1, "type": "$and", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107.17-107.39" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 14 ], "B": [ "0" ], "Y": [ 15 ] } }, "$and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107$276": { "hide_name": 1, "type": "$and", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107.44-107.59" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 16 ], "B": [ 17 ], "Y": [ 18 ] } }, "$and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97$270": { "hide_name": 1, "type": "$and", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.17-97.39" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 19 ], "B": [ "0" ], "Y": [ 20 ] } }, "$and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97$271": { "hide_name": 1, "type": "$and", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.44-97.56" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 21 ], "B": [ 2 ], "Y": [ 22 ] } }, "$not$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107$274": { "hide_name": 1, "type": "$not", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107.17-107.24" }, "port_directions": { "A": "input", "Y": "output" }, "connections": { "A": [ 16 ], "Y": [ 14 ] } }, "$not$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97$269": { "hide_name": 1, "type": "$not", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.17-97.24" }, "port_directions": { "A": "input", "Y": "output" }, "connections": { "A": [ 21 ], "Y": [ 19 ] } }, "$or$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107$277": { "hide_name": 1, "type": "$or", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107.16-107.60" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 15 ], "B": [ 18 ], "Y": [ 13 ] } }, "$or$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97$272": { "hide_name": 1, "type": "$or", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.16-97.57" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 20 ], "B": [ 22 ], "Y": [ 17 ] } }, "$specify$225": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000101111011", "T_FALL_MIN": "00000000000000000000000101111011", "T_FALL_TYP": "00000000000000000000000101111011", "T_RISE_MAX": "00000000000000000000000101111011", "T_RISE_MIN": "00000000000000000000000101111011", "T_RISE_TYP": "00000000000000000000000101111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:110.3-110.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 11 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$226": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000101111011", "T_FALL_MIN": "00000000000000000000000101111011", "T_FALL_TYP": "00000000000000000000000101111011", "T_RISE_MAX": "00000000000000000000000101111011", "T_RISE_MIN": "00000000000000000000000101111011", "T_RISE_TYP": "00000000000000000000000101111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:111.3-111.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 11 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$specify$227": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100010011", "T_FALL_MIN": "00000000000000000000000100010011", "T_FALL_TYP": "00000000000000000000000100010011", "T_RISE_MAX": "00000000000000000000000100010011", "T_RISE_MIN": "00000000000000000000000100010011", "T_RISE_TYP": "00000000000000000000000100010011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:112.3-112.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 11 ], "EN": [ "1" ], "SRC": [ 5 ] } }, "$specify$228": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010001101", "T_FALL_MIN": "00000000000000000000000010001101", "T_FALL_TYP": "00000000000000000000000010001101", "T_RISE_MAX": "00000000000000000000000010001101", "T_RISE_MIN": "00000000000000000000000010001101", "T_RISE_TYP": "00000000000000000000000010001101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:113.3-113.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 11 ], "EN": [ "1" ], "SRC": [ 6 ] } }, "$specify$229": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100000001", "T_FALL_MIN": "00000000000000000000000100000001", "T_FALL_TYP": "00000000000000000000000100000001", "T_RISE_MAX": "00000000000000000000000100000001", "T_RISE_MIN": "00000000000000000000000100000001", "T_RISE_TYP": "00000000000000000000000100000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:114.3-114.21" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 11 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$specify$230": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001001110110", "T_FALL_MIN": "00000000000000000000001001110110", "T_FALL_TYP": "00000000000000000000001001110110", "T_RISE_MAX": "00000000000000000000001001110110", "T_RISE_MIN": "00000000000000000000001001110110", "T_RISE_TYP": "00000000000000000000001001110110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:115.3-115.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$231": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001001110110", "T_FALL_MIN": "00000000000000000000001001110110", "T_FALL_TYP": "00000000000000000000001001110110", "T_RISE_MAX": "00000000000000000000001001110110", "T_RISE_MIN": "00000000000000000000001001110110", "T_RISE_TYP": "00000000000000000000001001110110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:116.3-116.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$specify$232": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001000001110", "T_FALL_MIN": "00000000000000000000001000001110", "T_FALL_TYP": "00000000000000000000001000001110", "T_RISE_MAX": "00000000000000000000001000001110", "T_RISE_MIN": "00000000000000000000001000001110", "T_RISE_TYP": "00000000000000000000001000001110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:117.3-117.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 5 ] } }, "$specify$233": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000110001000", "T_FALL_MIN": "00000000000000000000000110001000", "T_FALL_TYP": "00000000000000000000000110001000", "T_RISE_MAX": "00000000000000000000000110001000", "T_RISE_MIN": "00000000000000000000000110001000", "T_RISE_TYP": "00000000000000000000000110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:118.3-118.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 6 ] } }, "$specify$234": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000101111011", "T_FALL_MIN": "00000000000000000000000101111011", "T_FALL_TYP": "00000000000000000000000101111011", "T_RISE_MAX": "00000000000000000000000101111011", "T_RISE_MIN": "00000000000000000000000101111011", "T_RISE_TYP": "00000000000000000000000101111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:119.3-119.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 7 ] } }, "$specify$235": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000101111011", "T_FALL_MIN": "00000000000000000000000101111011", "T_FALL_TYP": "00000000000000000000000101111011", "T_RISE_MAX": "00000000000000000000000101111011", "T_RISE_MIN": "00000000000000000000000101111011", "T_RISE_TYP": "00000000000000000000000101111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:120.3-120.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 8 ] } }, "$specify$236": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100010011", "T_FALL_MIN": "00000000000000000000000100010011", "T_FALL_TYP": "00000000000000000000000100010011", "T_RISE_MAX": "00000000000000000000000100010011", "T_RISE_MIN": "00000000000000000000000100010011", "T_RISE_TYP": "00000000000000000000000100010011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:121.3-121.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 9 ] } }, "$specify$237": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010001101", "T_FALL_MIN": "00000000000000000000000010001101", "T_FALL_TYP": "00000000000000000000000010001101", "T_RISE_MAX": "00000000000000000000000010001101", "T_RISE_MIN": "00000000000000000000000010001101", "T_RISE_TYP": "00000000000000000000000010001101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:122.3-122.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 10 ] } }, "$specify$238": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100010001", "T_FALL_MIN": "00000000000000000000000100010001", "T_FALL_TYP": "00000000000000000000000100010001", "T_RISE_MAX": "00000000000000000000000100010001", "T_RISE_MIN": "00000000000000000000000100010001", "T_RISE_TYP": "00000000000000000000000100010001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:123.3-123.21" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 12 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$specify$239": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001000000100", "T_FALL_MIN": "00000000000000000000001000000100", "T_FALL_TYP": "00000000000000000000001000000100", "T_RISE_MAX": "00000000000000000000001000000100", "T_RISE_MIN": "00000000000000000000001000000100", "T_RISE_TYP": "00000000000000000000001000000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:124.3-124.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$240": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001000000100", "T_FALL_MIN": "00000000000000000000001000000100", "T_FALL_TYP": "00000000000000000000001000000100", "T_RISE_MAX": "00000000000000000000001000000100", "T_RISE_MIN": "00000000000000000000001000000100", "T_RISE_TYP": "00000000000000000000001000000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:125.3-125.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$specify$241": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000110011100", "T_FALL_MIN": "00000000000000000000000110011100", "T_FALL_TYP": "00000000000000000000000110011100", "T_RISE_MAX": "00000000000000000000000110011100", "T_RISE_MIN": "00000000000000000000000110011100", "T_RISE_TYP": "00000000000000000000000110011100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:126.3-126.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 5 ] } }, "$specify$242": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100010110", "T_FALL_MIN": "00000000000000000000000100010110", "T_FALL_TYP": "00000000000000000000000100010110", "T_RISE_MAX": "00000000000000000000000100010110", "T_RISE_MIN": "00000000000000000000000100010110", "T_RISE_TYP": "00000000000000000000000100010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:127.3-127.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 6 ] } }, "$specify$243": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001000000100", "T_FALL_MIN": "00000000000000000000001000000100", "T_FALL_TYP": "00000000000000000000001000000100", "T_RISE_MAX": "00000000000000000000001000000100", "T_RISE_MIN": "00000000000000000000001000000100", "T_RISE_TYP": "00000000000000000000001000000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:128.3-128.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 7 ] } }, "$specify$244": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000001000000100", "T_FALL_MIN": "00000000000000000000001000000100", "T_FALL_TYP": "00000000000000000000001000000100", "T_RISE_MAX": "00000000000000000000001000000100", "T_RISE_MIN": "00000000000000000000001000000100", "T_RISE_TYP": "00000000000000000000001000000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:129.3-129.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 8 ] } }, "$specify$245": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000110011100", "T_FALL_MIN": "00000000000000000000000110011100", "T_FALL_TYP": "00000000000000000000000110011100", "T_RISE_MAX": "00000000000000000000000110011100", "T_RISE_MIN": "00000000000000000000000110011100", "T_RISE_TYP": "00000000000000000000000110011100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:130.3-130.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 9 ] } }, "$specify$246": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100010110", "T_FALL_MIN": "00000000000000000000000100010110", "T_FALL_TYP": "00000000000000000000000100010110", "T_RISE_MAX": "00000000000000000000000100010110", "T_RISE_MIN": "00000000000000000000000100010110", "T_RISE_TYP": "00000000000000000000000100010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:131.3-131.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 10 ] } }, "$specify$247": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000000101011", "T_FALL_MIN": "00000000000000000000000000101011", "T_FALL_TYP": "00000000000000000000000000101011", "T_RISE_MAX": "00000000000000000000000000101011", "T_RISE_MIN": "00000000000000000000000000101011", "T_RISE_TYP": "00000000000000000000000000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:132.3-132.22" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 13 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$xor$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:104$273": { "hide_name": 1, "type": "$xor", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:104.14-104.34" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 16 ], "B": [ "0" ], "Y": [ 12 ] } }, "$xor$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:94$268": { "hide_name": 1, "type": "$xor", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:94.14-94.34" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 21 ], "B": [ "0" ], "Y": [ 11 ] } }, "lut2_0": { "hide_name": 0, "type": "LUT2", "parameters": { "INIT": "0000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:92.28-92.62" }, "port_directions": { "A": "input", "B": "input", "Z": "output" }, "connections": { "A": [ 3 ], "B": [ 4 ], "Z": [ 23 ] } }, "lut2_1": { "hide_name": 0, "type": "LUT2", "parameters": { "INIT": "0000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:102.28-102.62" }, "port_directions": { "A": "input", "B": "input", "Z": "output" }, "connections": { "A": [ 7 ], "B": [ 8 ], "Z": [ 24 ] } }, "lut4_0": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:91.23-91.73" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 3 ], "B": [ 4 ], "C": [ 5 ], "D": [ 6 ], "Z": [ 21 ] } }, "lut4_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:101.23-101.73" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 7 ], "B": [ 8 ], "C": [ 9 ], "D": [ 10 ], "Z": [ 16 ] } } }, "netnames": { "$and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107$275_Y": { "hide_name": 1, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107.17-107.39" } }, "$and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107$276_Y": { "hide_name": 1, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107.44-107.59" } }, "$and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97$270_Y": { "hide_name": 1, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.17-97.39" } }, "$and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97$271_Y": { "hide_name": 1, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.44-97.56" } }, "$not$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107$274_Y": { "hide_name": 1, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107.17-107.24" } }, "$not$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97$269_Y": { "hide_name": 1, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.17-97.24" } }, "$or$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107$277_Y": { "hide_name": 1, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:107.16-107.60" } }, "$or$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97$272_Y": { "hide_name": 1, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.16-97.57" } }, "$xor$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:104$273_Y": { "hide_name": 1, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:104.14-104.34" } }, "$xor$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:94$268_Y": { "hide_name": 1, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:94.14-94.34" } }, "A0": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:79.9-79.11" } }, "A1": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:79.25-79.27" } }, "B0": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:79.13-79.15" } }, "B1": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:79.29-79.31" } }, "C0": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:79.17-79.19" } }, "C1": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:79.33-79.35" } }, "CIN": { "hide_name": 0, "bits": [ 2 ], "attributes": { "abc9_carry": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:78.9-78.12" } }, "COUT": { "hide_name": 0, "bits": [ 13 ], "attributes": { "abc9_carry": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:82.9-82.13" } }, "D0": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:79.21-79.23" } }, "D1": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:79.37-79.39" } }, "LUT2_0": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:90.15-90.21" } }, "LUT2_1": { "hide_name": 0, "bits": [ 24 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:100.15-100.21" } }, "LUT4_0": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:90.7-90.13" } }, "LUT4_1": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:100.7-100.13" } }, "S0": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:80.9-80.11" } }, "S1": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:80.13-80.15" } }, "cout_0": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:97.7-97.13" } }, "gated_cin_0": { "hide_name": 0, "bits": [ "0" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:93.7-93.18" } }, "gated_cin_1": { "hide_name": 0, "bits": [ "0" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:103.7-103.18" } }, "gated_lut2_0": { "hide_name": 0, "bits": [ "0" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:96.7-96.19" } }, "gated_lut2_1": { "hide_name": 0, "bits": [ "0" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:106.7-106.19" } } } }, "CLKDIVF": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:321.1-327.10" }, "parameter_default_values": { "DIV": "2.0", "GSR": "DISABLED" }, "ports": { "CLKI": { "direction": "input", "bits": [ 2 ] }, "RST": { "direction": "input", "bits": [ 3 ] }, "ALIGNWD": { "direction": "input", "bits": [ 4 ] }, "CDIVX": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "ALIGNWD": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:322.19-322.26" } }, "CDIVX": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:323.9-323.14" } }, "CLKI": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:322.8-322.12" } }, "RST": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:322.14-322.17" } } } }, "DCCA": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:344.1-348.10" }, "ports": { "CLKI": { "direction": "input", "bits": [ 2 ] }, "CE": { "direction": "input", "bits": [ 3 ] }, "CLKO": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "CE": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:345.14-345.16" } }, "CLKI": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:345.8-345.12" } }, "CLKO": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:346.9-346.13" } } } }, "DCUA": { "attributes": { "keep": "00000000000000000000000000000001", "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:351.1-659.10" }, "parameter_default_values": { "CH0_AUTO_CALIB_EN": "0b0", "CH0_AUTO_FACQ_EN": "0b0", "CH0_BAND_THRESHOLD": "0b000000", "CH0_CALIB_CK_MODE": "0b0", "CH0_CC_MATCH_1": "0b0000000000", "CH0_CC_MATCH_2": "0b0000000000", "CH0_CC_MATCH_3": "0b0000000000", "CH0_CC_MATCH_4": "0b0000000000", "CH0_CDR_CNT4SEL": "0b00", "CH0_CDR_CNT8SEL": "0b00", "CH0_CDR_MAX_RATE": "2.5", "CH0_CTC_BYPASS": "0b0", "CH0_DCOATDCFG": "0b00", "CH0_DCOATDDLY": "0b00", "CH0_DCOBYPSATD": "0b0", "CH0_DCOCALDIV": "0b000", "CH0_DCOCTLGI": "0b000", "CH0_DCODISBDAVOID": "0b0", "CH0_DCOFLTDAC": "0b00", "CH0_DCOFTNRG": "0b000", "CH0_DCOIOSTUNE": "0b000", "CH0_DCOITUNE": "0b00", "CH0_DCOITUNE4LSB": "0b000", "CH0_DCOIUPDNX2": "0b0", "CH0_DCONUOFLSB": "0b000", "CH0_DCOSCALEI": "0b00", "CH0_DCOSTARTVAL": "0b000", "CH0_DCOSTEP": "0b00", "CH0_DEC_BYPASS": "0b0", "CH0_ENABLE_CG_ALIGN": "0b0", "CH0_ENC_BYPASS": "0b0", "CH0_FF_RX_F_CLK_DIS": "0b0", "CH0_FF_RX_H_CLK_EN": "0b0", "CH0_FF_TX_F_CLK_DIS": "0b0", "CH0_FF_TX_H_CLK_EN": "0b0", "CH0_GE_AN_ENABLE": "0b0", "CH0_INVERT_RX": "0b0", "CH0_INVERT_TX": "0b0", "CH0_LDR_CORE2TX_SEL": "0b0", "CH0_LDR_RX2CORE_SEL": "0b0", "CH0_LEQ_OFFSET_SEL": "0b0", "CH0_LEQ_OFFSET_TRIM": "0b000", "CH0_LSM_DISABLE": "0b0", "CH0_MATCH_2_ENABLE": "0b0", "CH0_MATCH_4_ENABLE": "0b0", "CH0_MIN_IPG_CNT": "0b00", "CH0_PCIE_EI_EN": "0b0", "CH0_PCIE_MODE": "0b0", "CH0_PCS_DET_TIME_SEL": "0b00", "CH0_PDEN_SEL": "0b0", "CH0_PRBS_ENABLE": "0b0", "CH0_PRBS_LOCK": "0b0", "CH0_PRBS_SELECTION": "0b0", "CH0_PROTOCOL": "8B10B", "CH0_RATE_MODE_RX": "0b0", "CH0_RATE_MODE_TX": "0b0", "CH0_RCV_DCC_EN": "0b0", "CH0_REG_BAND_OFFSET": "0b0000", "CH0_REG_BAND_SEL": "0b000000", "CH0_REG_IDAC_EN": "0b0", "CH0_REG_IDAC_SEL": "0b0000000000", "CH0_REQ_EN": "0b0", "CH0_REQ_LVL_SET": "0b00", "CH0_RIO_MODE": "0b0", "CH0_RLOS_SEL": "0b0", "CH0_RPWDNB": "0b0", "CH0_RTERM_RX": "0b00000", "CH0_RTERM_TX": "0b00000", "CH0_RXIN_CM": "0b00", "CH0_RXTERM_CM": "0b00", "CH0_RX_DCO_CK_DIV": "0b000", "CH0_RX_DIV11_SEL": "0b0", "CH0_RX_GEAR_BYPASS": "0b0", "CH0_RX_GEAR_MODE": "0b0", "CH0_RX_LOS_CEQ": "0b00", "CH0_RX_LOS_EN": "0b0", "CH0_RX_LOS_HYST_EN": "0b0", "CH0_RX_LOS_LVL": "0b000", "CH0_RX_RATE_SEL": "0b0000", "CH0_RX_SB_BYPASS": "0b0", "CH0_SB_BYPASS": "0b0", "CH0_SEL_SD_RX_CLK": "0b0", "CH0_TDRV_DAT_SEL": "0b00", "CH0_TDRV_POST_EN": "0b0", "CH0_TDRV_PRE_EN": "0b0", "CH0_TDRV_SLICE0_CUR": "0b000", "CH0_TDRV_SLICE0_SEL": "0b00", "CH0_TDRV_SLICE1_CUR": "0b000", "CH0_TDRV_SLICE1_SEL": "0b00", "CH0_TDRV_SLICE2_CUR": "0b00", "CH0_TDRV_SLICE2_SEL": "0b00", "CH0_TDRV_SLICE3_CUR": "0b00", "CH0_TDRV_SLICE3_SEL": "0b00", "CH0_TDRV_SLICE4_CUR": "0b00", "CH0_TDRV_SLICE4_SEL": "0b00", "CH0_TDRV_SLICE5_CUR": "0b00", "CH0_TDRV_SLICE5_SEL": "0b00", "CH0_TPWDNB": "0b0", "CH0_TXAMPLITUDE": "0d1300", "CH0_TXDEPOST": "DISABLED", "CH0_TXDEPRE": "DISABLED", "CH0_TX_CM_SEL": "0b00", "CH0_TX_DIV11_SEL": "0b0", "CH0_TX_GEAR_BYPASS": "0b0", "CH0_TX_GEAR_MODE": "0b0", "CH0_TX_POST_SIGN": "0b0", "CH0_TX_PRE_SIGN": "0b0", "CH0_UC_MODE": "0b0", "CH0_UDF_COMMA_A": "0b0000000000", "CH0_UDF_COMMA_B": "0b0000000000", "CH0_UDF_COMMA_MASK": "0b0000000000", "CH0_WA_BYPASS": "0b0", "CH0_WA_MODE": "0b0", "CH1_AUTO_CALIB_EN": "0b0", "CH1_AUTO_FACQ_EN": "0b0", "CH1_BAND_THRESHOLD": "0b000000", "CH1_CALIB_CK_MODE": "0b0", "CH1_CC_MATCH_1": "0b0000000000", "CH1_CC_MATCH_2": "0b0000000000", "CH1_CC_MATCH_3": "0b0000000000", "CH1_CC_MATCH_4": "0b0000000000", "CH1_CDR_CNT4SEL": "0b00", "CH1_CDR_CNT8SEL": "0b00", "CH1_CDR_MAX_RATE": "2.5", "CH1_CTC_BYPASS": "0b0", "CH1_DCOATDCFG": "0b00", "CH1_DCOATDDLY": "0b00", "CH1_DCOBYPSATD": "0b0", "CH1_DCOCALDIV": "0b000", "CH1_DCOCTLGI": "0b000", "CH1_DCODISBDAVOID": "0b0", "CH1_DCOFLTDAC": "0b00", "CH1_DCOFTNRG": "0b000", "CH1_DCOIOSTUNE": "0b000", "CH1_DCOITUNE": "0b00", "CH1_DCOITUNE4LSB": "0b000", "CH1_DCOIUPDNX2": "0b0", "CH1_DCONUOFLSB": "0b000", "CH1_DCOSCALEI": "0b00", "CH1_DCOSTARTVAL": "0b000", "CH1_DCOSTEP": "0b00", "CH1_DEC_BYPASS": "0b0", "CH1_ENABLE_CG_ALIGN": "0b0", "CH1_ENC_BYPASS": "0b0", "CH1_FF_RX_F_CLK_DIS": "0b0", "CH1_FF_RX_H_CLK_EN": "0b0", "CH1_FF_TX_F_CLK_DIS": "0b0", "CH1_FF_TX_H_CLK_EN": "0b0", "CH1_GE_AN_ENABLE": "0b0", "CH1_INVERT_RX": "0b0", "CH1_INVERT_TX": "0b0", "CH1_LDR_CORE2TX_SEL": "0b0", "CH1_LDR_RX2CORE_SEL": "0b0", "CH1_LEQ_OFFSET_SEL": "0b0", "CH1_LEQ_OFFSET_TRIM": "0b000", "CH1_LSM_DISABLE": "0b0", "CH1_MATCH_2_ENABLE": "0b0", "CH1_MATCH_4_ENABLE": "0b0", "CH1_MIN_IPG_CNT": "0b00", "CH1_PCIE_EI_EN": "0b0", "CH1_PCIE_MODE": "0b0", "CH1_PCS_DET_TIME_SEL": "0b00", "CH1_PDEN_SEL": "0b0", "CH1_PRBS_ENABLE": "0b0", "CH1_PRBS_LOCK": "0b0", "CH1_PRBS_SELECTION": "0b0", "CH1_PROTOCOL": "8B10B", "CH1_RATE_MODE_RX": "0b0", "CH1_RATE_MODE_TX": "0b0", "CH1_RCV_DCC_EN": "0b0", "CH1_REG_BAND_OFFSET": "0b0000", "CH1_REG_BAND_SEL": "0b000000", "CH1_REG_IDAC_EN": "0b0", "CH1_REG_IDAC_SEL": "0b0000000000", "CH1_REQ_EN": "0b0", "CH1_REQ_LVL_SET": "0b00", "CH1_RIO_MODE": "0b0", "CH1_RLOS_SEL": "0b0", "CH1_RPWDNB": "0b0", "CH1_RTERM_RX": "0b00000", "CH1_RTERM_TX": "0b00000", "CH1_RXIN_CM": "0b00", "CH1_RXTERM_CM": "0b00", "CH1_RX_DCO_CK_DIV": "0b000", "CH1_RX_DIV11_SEL": "0b0", "CH1_RX_GEAR_BYPASS": "0b0", "CH1_RX_GEAR_MODE": "0b0", "CH1_RX_LOS_CEQ": "0b00", "CH1_RX_LOS_EN": "0b0", "CH1_RX_LOS_HYST_EN": "0b0", "CH1_RX_LOS_LVL": "0b000", "CH1_RX_RATE_SEL": "0b0000", "CH1_RX_SB_BYPASS": "0b0", "CH1_SB_BYPASS": "0b0", "CH1_SEL_SD_RX_CLK": "0b0", "CH1_TDRV_DAT_SEL": "0b00", "CH1_TDRV_POST_EN": "0b0", "CH1_TDRV_PRE_EN": "0b0", "CH1_TDRV_SLICE0_CUR": "0b000", "CH1_TDRV_SLICE0_SEL": "0b00", "CH1_TDRV_SLICE1_CUR": "0b000", "CH1_TDRV_SLICE1_SEL": "0b00", "CH1_TDRV_SLICE2_CUR": "0b00", "CH1_TDRV_SLICE2_SEL": "0b00", "CH1_TDRV_SLICE3_CUR": "0b00", "CH1_TDRV_SLICE3_SEL": "0b00", "CH1_TDRV_SLICE4_CUR": "0b00", "CH1_TDRV_SLICE4_SEL": "0b00", "CH1_TDRV_SLICE5_CUR": "0b00", "CH1_TDRV_SLICE5_SEL": "0b00", "CH1_TPWDNB": "0b0", "CH1_TXAMPLITUDE": "0d1300", "CH1_TXDEPOST": "DISABLED", "CH1_TXDEPRE": "DISABLED", "CH1_TX_CM_SEL": "0b00", "CH1_TX_DIV11_SEL": "0b0", "CH1_TX_GEAR_BYPASS": "0b0", "CH1_TX_GEAR_MODE": "0b0", "CH1_TX_POST_SIGN": "0b0", "CH1_TX_PRE_SIGN": "0b0", "CH1_UC_MODE": "0b0", "CH1_UDF_COMMA_A": "0b0000000000", "CH1_UDF_COMMA_B": "0b0000000000", "CH1_UDF_COMMA_MASK": "0b0000000000", "CH1_WA_BYPASS": "0b0", "CH1_WA_MODE": "0b0", "D_BITCLK_FROM_ND_EN": "0b0", "D_BITCLK_LOCAL_EN": "0b0", "D_BITCLK_ND_EN": "0b0", "D_BUS8BIT_SEL": "0b0", "D_CDR_LOL_SET": "0b00", "D_CMUSETBIASI": "0b00", "D_CMUSETI4CPP": "0b0000", "D_CMUSETI4CPZ": "0b0000", "D_CMUSETI4VCO": "0b00", "D_CMUSETICP4P": "0b00", "D_CMUSETICP4Z": "0b000", "D_CMUSETINITVCT": "0b00", "D_CMUSETISCL4VCO": "0b000", "D_CMUSETP1GM": "0b000", "D_CMUSETP2AGM": "0b000", "D_CMUSETZGM": "0b000", "D_DCO_CALIB_TIME_SEL": "0b00", "D_HIGH_MARK": "0b0000", "D_IB_PWDNB": "0b0", "D_ISETLOS": "0b00000000", "D_LOW_MARK": "0b0000", "D_MACROPDB": "0b0", "D_PD_ISET": "0b00", "D_PLL_LOL_SET": "0b00", "D_REFCK_MODE": "0b000", "D_REQ_ISET": "0b000", "D_RG_EN": "0b0", "D_RG_SET": "0b00", "D_RX_MAX_RATE": "2.5", "D_SETICONST_AUX": "0b00", "D_SETICONST_CH": "0b00", "D_SETIRPOLY_AUX": "0b00", "D_SETIRPOLY_CH": "0b00", "D_SETPLLRC": "0b000000", "D_SYNC_LOCAL_EN": "0b0", "D_SYNC_ND_EN": "0b0", "D_TXPLL_PWDNB": "0b0", "D_TX_MAX_RATE": "2.5", "D_TX_VCO_CK_DIV": "0b000", "D_XGE_MODE": "0b0" }, "ports": { "CH0_HDINP": { "direction": "input", "bits": [ 2 ] }, "CH1_HDINP": { "direction": "input", "bits": [ 3 ] }, "CH0_HDINN": { "direction": "input", "bits": [ 4 ] }, "CH1_HDINN": { "direction": "input", "bits": [ 5 ] }, "D_TXBIT_CLKP_FROM_ND": { "direction": "input", "bits": [ 6 ] }, "D_TXBIT_CLKN_FROM_ND": { "direction": "input", "bits": [ 7 ] }, "D_SYNC_ND": { "direction": "input", "bits": [ 8 ] }, "D_TXPLL_LOL_FROM_ND": { "direction": "input", "bits": [ 9 ] }, "CH0_RX_REFCLK": { "direction": "input", "bits": [ 10 ] }, "CH1_RX_REFCLK": { "direction": "input", "bits": [ 11 ] }, "CH0_FF_RXI_CLK": { "direction": "input", "bits": [ 12 ] }, "CH1_FF_RXI_CLK": { "direction": "input", "bits": [ 13 ] }, "CH0_FF_TXI_CLK": { "direction": "input", "bits": [ 14 ] }, "CH1_FF_TXI_CLK": { "direction": "input", "bits": [ 15 ] }, "CH0_FF_EBRD_CLK": { "direction": "input", "bits": [ 16 ] }, "CH1_FF_EBRD_CLK": { "direction": "input", "bits": [ 17 ] }, "CH0_FF_TX_D_0": { "direction": "input", "bits": [ 18 ] }, "CH1_FF_TX_D_0": { "direction": "input", "bits": [ 19 ] }, "CH0_FF_TX_D_1": { "direction": "input", "bits": [ 20 ] }, "CH1_FF_TX_D_1": { "direction": "input", "bits": [ 21 ] }, "CH0_FF_TX_D_2": { "direction": "input", "bits": [ 22 ] }, "CH1_FF_TX_D_2": { "direction": "input", "bits": [ 23 ] }, "CH0_FF_TX_D_3": { "direction": "input", "bits": [ 24 ] }, "CH1_FF_TX_D_3": { "direction": "input", "bits": [ 25 ] }, "CH0_FF_TX_D_4": { "direction": "input", "bits": [ 26 ] }, "CH1_FF_TX_D_4": { "direction": "input", "bits": [ 27 ] }, "CH0_FF_TX_D_5": { "direction": "input", "bits": [ 28 ] }, "CH1_FF_TX_D_5": { "direction": "input", "bits": [ 29 ] }, "CH0_FF_TX_D_6": { "direction": "input", "bits": [ 30 ] }, "CH1_FF_TX_D_6": { "direction": "input", "bits": [ 31 ] }, "CH0_FF_TX_D_7": { "direction": "input", "bits": [ 32 ] }, "CH1_FF_TX_D_7": { "direction": "input", "bits": [ 33 ] }, "CH0_FF_TX_D_8": { "direction": "input", "bits": [ 34 ] }, "CH1_FF_TX_D_8": { "direction": "input", "bits": [ 35 ] }, "CH0_FF_TX_D_9": { "direction": "input", "bits": [ 36 ] }, "CH1_FF_TX_D_9": { "direction": "input", "bits": [ 37 ] }, "CH0_FF_TX_D_10": { "direction": "input", "bits": [ 38 ] }, "CH1_FF_TX_D_10": { "direction": "input", "bits": [ 39 ] }, "CH0_FF_TX_D_11": { "direction": "input", "bits": [ 40 ] }, "CH1_FF_TX_D_11": { "direction": "input", "bits": [ 41 ] }, "CH0_FF_TX_D_12": { "direction": "input", "bits": [ 42 ] }, "CH1_FF_TX_D_12": { "direction": "input", "bits": [ 43 ] }, "CH0_FF_TX_D_13": { "direction": "input", "bits": [ 44 ] }, "CH1_FF_TX_D_13": { "direction": "input", "bits": [ 45 ] }, "CH0_FF_TX_D_14": { "direction": "input", "bits": [ 46 ] }, "CH1_FF_TX_D_14": { "direction": "input", "bits": [ 47 ] }, "CH0_FF_TX_D_15": { "direction": "input", "bits": [ 48 ] }, "CH1_FF_TX_D_15": { "direction": "input", "bits": [ 49 ] }, "CH0_FF_TX_D_16": { "direction": "input", "bits": [ 50 ] }, "CH1_FF_TX_D_16": { "direction": "input", "bits": [ 51 ] }, "CH0_FF_TX_D_17": { "direction": "input", "bits": [ 52 ] }, "CH1_FF_TX_D_17": { "direction": "input", "bits": [ 53 ] }, "CH0_FF_TX_D_18": { "direction": "input", "bits": [ 54 ] }, "CH1_FF_TX_D_18": { "direction": "input", "bits": [ 55 ] }, "CH0_FF_TX_D_19": { "direction": "input", "bits": [ 56 ] }, "CH1_FF_TX_D_19": { "direction": "input", "bits": [ 57 ] }, "CH0_FF_TX_D_20": { "direction": "input", "bits": [ 58 ] }, "CH1_FF_TX_D_20": { "direction": "input", "bits": [ 59 ] }, "CH0_FF_TX_D_21": { "direction": "input", "bits": [ 60 ] }, "CH1_FF_TX_D_21": { "direction": "input", "bits": [ 61 ] }, "CH0_FF_TX_D_22": { "direction": "input", "bits": [ 62 ] }, "CH1_FF_TX_D_22": { "direction": "input", "bits": [ 63 ] }, "CH0_FF_TX_D_23": { "direction": "input", "bits": [ 64 ] }, "CH1_FF_TX_D_23": { "direction": "input", "bits": [ 65 ] }, "CH0_FFC_EI_EN": { "direction": "input", "bits": [ 66 ] }, "CH1_FFC_EI_EN": { "direction": "input", "bits": [ 67 ] }, "CH0_FFC_PCIE_DET_EN": { "direction": "input", "bits": [ 68 ] }, "CH1_FFC_PCIE_DET_EN": { "direction": "input", "bits": [ 69 ] }, "CH0_FFC_PCIE_CT": { "direction": "input", "bits": [ 70 ] }, "CH1_FFC_PCIE_CT": { "direction": "input", "bits": [ 71 ] }, "CH0_FFC_SB_INV_RX": { "direction": "input", "bits": [ 72 ] }, "CH1_FFC_SB_INV_RX": { "direction": "input", "bits": [ 73 ] }, "CH0_FFC_ENABLE_CGALIGN": { "direction": "input", "bits": [ 74 ] }, "CH1_FFC_ENABLE_CGALIGN": { "direction": "input", "bits": [ 75 ] }, "CH0_FFC_SIGNAL_DETECT": { "direction": "input", "bits": [ 76 ] }, "CH1_FFC_SIGNAL_DETECT": { "direction": "input", "bits": [ 77 ] }, "CH0_FFC_FB_LOOPBACK": { "direction": "input", "bits": [ 78 ] }, "CH1_FFC_FB_LOOPBACK": { "direction": "input", "bits": [ 79 ] }, "CH0_FFC_SB_PFIFO_LP": { "direction": "input", "bits": [ 80 ] }, "CH1_FFC_SB_PFIFO_LP": { "direction": "input", "bits": [ 81 ] }, "CH0_FFC_PFIFO_CLR": { "direction": "input", "bits": [ 82 ] }, "CH1_FFC_PFIFO_CLR": { "direction": "input", "bits": [ 83 ] }, "CH0_FFC_RATE_MODE_RX": { "direction": "input", "bits": [ 84 ] }, "CH1_FFC_RATE_MODE_RX": { "direction": "input", "bits": [ 85 ] }, "CH0_FFC_RATE_MODE_TX": { "direction": "input", "bits": [ 86 ] }, "CH1_FFC_RATE_MODE_TX": { "direction": "input", "bits": [ 87 ] }, "CH0_FFC_DIV11_MODE_RX": { "direction": "input", "bits": [ 88 ] }, "CH1_FFC_DIV11_MODE_RX": { "direction": "input", "bits": [ 89 ] }, "CH0_FFC_RX_GEAR_MODE": { "direction": "input", "bits": [ 90 ] }, "CH1_FFC_RX_GEAR_MODE": { "direction": "input", "bits": [ 91 ] }, "CH0_FFC_TX_GEAR_MODE": { "direction": "input", "bits": [ 92 ] }, "CH1_FFC_TX_GEAR_MODE": { "direction": "input", "bits": [ 93 ] }, "CH0_FFC_DIV11_MODE_TX": { "direction": "input", "bits": [ 94 ] }, "CH1_FFC_DIV11_MODE_TX": { "direction": "input", "bits": [ 95 ] }, "CH0_FFC_LDR_CORE2TX_EN": { "direction": "input", "bits": [ 96 ] }, "CH1_FFC_LDR_CORE2TX_EN": { "direction": "input", "bits": [ 97 ] }, "CH0_FFC_LANE_TX_RST": { "direction": "input", "bits": [ 98 ] }, "CH1_FFC_LANE_TX_RST": { "direction": "input", "bits": [ 99 ] }, "CH0_FFC_LANE_RX_RST": { "direction": "input", "bits": [ 100 ] }, "CH1_FFC_LANE_RX_RST": { "direction": "input", "bits": [ 101 ] }, "CH0_FFC_RRST": { "direction": "input", "bits": [ 102 ] }, "CH1_FFC_RRST": { "direction": "input", "bits": [ 103 ] }, "CH0_FFC_TXPWDNB": { "direction": "input", "bits": [ 104 ] }, "CH1_FFC_TXPWDNB": { "direction": "input", "bits": [ 105 ] }, "CH0_FFC_RXPWDNB": { "direction": "input", "bits": [ 106 ] }, "CH1_FFC_RXPWDNB": { "direction": "input", "bits": [ 107 ] }, "CH0_LDR_CORE2TX": { "direction": "input", "bits": [ 108 ] }, "CH1_LDR_CORE2TX": { "direction": "input", "bits": [ 109 ] }, "D_SCIWDATA0": { "direction": "input", "bits": [ 110 ] }, "D_SCIWDATA1": { "direction": "input", "bits": [ 111 ] }, "D_SCIWDATA2": { "direction": "input", "bits": [ 112 ] }, "D_SCIWDATA3": { "direction": "input", "bits": [ 113 ] }, "D_SCIWDATA4": { "direction": "input", "bits": [ 114 ] }, "D_SCIWDATA5": { "direction": "input", "bits": [ 115 ] }, "D_SCIWDATA6": { "direction": "input", "bits": [ 116 ] }, "D_SCIWDATA7": { "direction": "input", "bits": [ 117 ] }, "D_SCIADDR0": { "direction": "input", "bits": [ 118 ] }, "D_SCIADDR1": { "direction": "input", "bits": [ 119 ] }, "D_SCIADDR2": { "direction": "input", "bits": [ 120 ] }, "D_SCIADDR3": { "direction": "input", "bits": [ 121 ] }, "D_SCIADDR4": { "direction": "input", "bits": [ 122 ] }, "D_SCIADDR5": { "direction": "input", "bits": [ 123 ] }, "D_SCIENAUX": { "direction": "input", "bits": [ 124 ] }, "D_SCISELAUX": { "direction": "input", "bits": [ 125 ] }, "CH0_SCIEN": { "direction": "input", "bits": [ 126 ] }, "CH1_SCIEN": { "direction": "input", "bits": [ 127 ] }, "CH0_SCISEL": { "direction": "input", "bits": [ 128 ] }, "CH1_SCISEL": { "direction": "input", "bits": [ 129 ] }, "D_SCIRD": { "direction": "input", "bits": [ 130 ] }, "D_SCIWSTN": { "direction": "input", "bits": [ 131 ] }, "D_CYAWSTN": { "direction": "input", "bits": [ 132 ] }, "D_FFC_SYNC_TOGGLE": { "direction": "input", "bits": [ 133 ] }, "D_FFC_DUAL_RST": { "direction": "input", "bits": [ 134 ] }, "D_FFC_MACRO_RST": { "direction": "input", "bits": [ 135 ] }, "D_FFC_MACROPDB": { "direction": "input", "bits": [ 136 ] }, "D_FFC_TRST": { "direction": "input", "bits": [ 137 ] }, "CH0_FFC_CDR_EN_BITSLIP": { "direction": "input", "bits": [ 138 ] }, "CH1_FFC_CDR_EN_BITSLIP": { "direction": "input", "bits": [ 139 ] }, "D_SCAN_ENABLE": { "direction": "input", "bits": [ 140 ] }, "D_SCAN_IN_0": { "direction": "input", "bits": [ 141 ] }, "D_SCAN_IN_1": { "direction": "input", "bits": [ 142 ] }, "D_SCAN_IN_2": { "direction": "input", "bits": [ 143 ] }, "D_SCAN_IN_3": { "direction": "input", "bits": [ 144 ] }, "D_SCAN_IN_4": { "direction": "input", "bits": [ 145 ] }, "D_SCAN_IN_5": { "direction": "input", "bits": [ 146 ] }, "D_SCAN_IN_6": { "direction": "input", "bits": [ 147 ] }, "D_SCAN_IN_7": { "direction": "input", "bits": [ 148 ] }, "D_SCAN_MODE": { "direction": "input", "bits": [ 149 ] }, "D_SCAN_RESET": { "direction": "input", "bits": [ 150 ] }, "D_CIN0": { "direction": "input", "bits": [ 151 ] }, "D_CIN1": { "direction": "input", "bits": [ 152 ] }, "D_CIN2": { "direction": "input", "bits": [ 153 ] }, "D_CIN3": { "direction": "input", "bits": [ 154 ] }, "D_CIN4": { "direction": "input", "bits": [ 155 ] }, "D_CIN5": { "direction": "input", "bits": [ 156 ] }, "D_CIN6": { "direction": "input", "bits": [ 157 ] }, "D_CIN7": { "direction": "input", "bits": [ 158 ] }, "D_CIN8": { "direction": "input", "bits": [ 159 ] }, "D_CIN9": { "direction": "input", "bits": [ 160 ] }, "D_CIN10": { "direction": "input", "bits": [ 161 ] }, "D_CIN11": { "direction": "input", "bits": [ 162 ] }, "CH0_HDOUTP": { "direction": "output", "bits": [ 163 ] }, "CH1_HDOUTP": { "direction": "output", "bits": [ 164 ] }, "CH0_HDOUTN": { "direction": "output", "bits": [ 165 ] }, "CH1_HDOUTN": { "direction": "output", "bits": [ 166 ] }, "D_TXBIT_CLKP_TO_ND": { "direction": "output", "bits": [ 167 ] }, "D_TXBIT_CLKN_TO_ND": { "direction": "output", "bits": [ 168 ] }, "D_SYNC_PULSE2ND": { "direction": "output", "bits": [ 169 ] }, "D_TXPLL_LOL_TO_ND": { "direction": "output", "bits": [ 170 ] }, "CH0_FF_RX_F_CLK": { "direction": "output", "bits": [ 171 ] }, "CH1_FF_RX_F_CLK": { "direction": "output", "bits": [ 172 ] }, "CH0_FF_RX_H_CLK": { "direction": "output", "bits": [ 173 ] }, "CH1_FF_RX_H_CLK": { "direction": "output", "bits": [ 174 ] }, "CH0_FF_TX_F_CLK": { "direction": "output", "bits": [ 175 ] }, "CH1_FF_TX_F_CLK": { "direction": "output", "bits": [ 176 ] }, "CH0_FF_TX_H_CLK": { "direction": "output", "bits": [ 177 ] }, "CH1_FF_TX_H_CLK": { "direction": "output", "bits": [ 178 ] }, "CH0_FF_RX_PCLK": { "direction": "output", "bits": [ 179 ] }, "CH1_FF_RX_PCLK": { "direction": "output", "bits": [ 180 ] }, "CH0_FF_TX_PCLK": { "direction": "output", "bits": [ 181 ] }, "CH1_FF_TX_PCLK": { "direction": "output", "bits": [ 182 ] }, "CH0_FF_RX_D_0": { "direction": "output", "bits": [ 183 ] }, "CH1_FF_RX_D_0": { "direction": "output", "bits": [ 184 ] }, "CH0_FF_RX_D_1": { "direction": "output", "bits": [ 185 ] }, "CH1_FF_RX_D_1": { "direction": "output", "bits": [ 186 ] }, "CH0_FF_RX_D_2": { "direction": "output", "bits": [ 187 ] }, "CH1_FF_RX_D_2": { "direction": "output", "bits": [ 188 ] }, "CH0_FF_RX_D_3": { "direction": "output", "bits": [ 189 ] }, "CH1_FF_RX_D_3": { "direction": "output", "bits": [ 190 ] }, "CH0_FF_RX_D_4": { "direction": "output", "bits": [ 191 ] }, "CH1_FF_RX_D_4": { "direction": "output", "bits": [ 192 ] }, "CH0_FF_RX_D_5": { "direction": "output", "bits": [ 193 ] }, "CH1_FF_RX_D_5": { "direction": "output", "bits": [ 194 ] }, "CH0_FF_RX_D_6": { "direction": "output", "bits": [ 195 ] }, "CH1_FF_RX_D_6": { "direction": "output", "bits": [ 196 ] }, "CH0_FF_RX_D_7": { "direction": "output", "bits": [ 197 ] }, "CH1_FF_RX_D_7": { "direction": "output", "bits": [ 198 ] }, "CH0_FF_RX_D_8": { "direction": "output", "bits": [ 199 ] }, "CH1_FF_RX_D_8": { "direction": "output", "bits": [ 200 ] }, "CH0_FF_RX_D_9": { "direction": "output", "bits": [ 201 ] }, "CH1_FF_RX_D_9": { "direction": "output", "bits": [ 202 ] }, "CH0_FF_RX_D_10": { "direction": "output", "bits": [ 203 ] }, "CH1_FF_RX_D_10": { "direction": "output", "bits": [ 204 ] }, "CH0_FF_RX_D_11": { "direction": "output", "bits": [ 205 ] }, "CH1_FF_RX_D_11": { "direction": "output", "bits": [ 206 ] }, "CH0_FF_RX_D_12": { "direction": "output", "bits": [ 207 ] }, "CH1_FF_RX_D_12": { "direction": "output", "bits": [ 208 ] }, "CH0_FF_RX_D_13": { "direction": "output", "bits": [ 209 ] }, "CH1_FF_RX_D_13": { "direction": "output", "bits": [ 210 ] }, "CH0_FF_RX_D_14": { "direction": "output", "bits": [ 211 ] }, "CH1_FF_RX_D_14": { "direction": "output", "bits": [ 212 ] }, "CH0_FF_RX_D_15": { "direction": "output", "bits": [ 213 ] }, "CH1_FF_RX_D_15": { "direction": "output", "bits": [ 214 ] }, "CH0_FF_RX_D_16": { "direction": "output", "bits": [ 215 ] }, "CH1_FF_RX_D_16": { "direction": "output", "bits": [ 216 ] }, "CH0_FF_RX_D_17": { "direction": "output", "bits": [ 217 ] }, "CH1_FF_RX_D_17": { "direction": "output", "bits": [ 218 ] }, "CH0_FF_RX_D_18": { "direction": "output", "bits": [ 219 ] }, "CH1_FF_RX_D_18": { "direction": "output", "bits": [ 220 ] }, "CH0_FF_RX_D_19": { "direction": "output", "bits": [ 221 ] }, "CH1_FF_RX_D_19": { "direction": "output", "bits": [ 222 ] }, "CH0_FF_RX_D_20": { "direction": "output", "bits": [ 223 ] }, "CH1_FF_RX_D_20": { "direction": "output", "bits": [ 224 ] }, "CH0_FF_RX_D_21": { "direction": "output", "bits": [ 225 ] }, "CH1_FF_RX_D_21": { "direction": "output", "bits": [ 226 ] }, "CH0_FF_RX_D_22": { "direction": "output", "bits": [ 227 ] }, "CH1_FF_RX_D_22": { "direction": "output", "bits": [ 228 ] }, "CH0_FF_RX_D_23": { "direction": "output", "bits": [ 229 ] }, "CH1_FF_RX_D_23": { "direction": "output", "bits": [ 230 ] }, "CH0_FFS_PCIE_DONE": { "direction": "output", "bits": [ 231 ] }, "CH1_FFS_PCIE_DONE": { "direction": "output", "bits": [ 232 ] }, "CH0_FFS_PCIE_CON": { "direction": "output", "bits": [ 233 ] }, "CH1_FFS_PCIE_CON": { "direction": "output", "bits": [ 234 ] }, "CH0_FFS_RLOS": { "direction": "output", "bits": [ 235 ] }, "CH1_FFS_RLOS": { "direction": "output", "bits": [ 236 ] }, "CH0_FFS_LS_SYNC_STATUS": { "direction": "output", "bits": [ 237 ] }, "CH1_FFS_LS_SYNC_STATUS": { "direction": "output", "bits": [ 238 ] }, "CH0_FFS_CC_UNDERRUN": { "direction": "output", "bits": [ 239 ] }, "CH1_FFS_CC_UNDERRUN": { "direction": "output", "bits": [ 240 ] }, "CH0_FFS_CC_OVERRUN": { "direction": "output", "bits": [ 241 ] }, "CH1_FFS_CC_OVERRUN": { "direction": "output", "bits": [ 242 ] }, "CH0_FFS_RXFBFIFO_ERROR": { "direction": "output", "bits": [ 243 ] }, "CH1_FFS_RXFBFIFO_ERROR": { "direction": "output", "bits": [ 244 ] }, "CH0_FFS_TXFBFIFO_ERROR": { "direction": "output", "bits": [ 245 ] }, "CH1_FFS_TXFBFIFO_ERROR": { "direction": "output", "bits": [ 246 ] }, "CH0_FFS_RLOL": { "direction": "output", "bits": [ 247 ] }, "CH1_FFS_RLOL": { "direction": "output", "bits": [ 248 ] }, "CH0_FFS_SKP_ADDED": { "direction": "output", "bits": [ 249 ] }, "CH1_FFS_SKP_ADDED": { "direction": "output", "bits": [ 250 ] }, "CH0_FFS_SKP_DELETED": { "direction": "output", "bits": [ 251 ] }, "CH1_FFS_SKP_DELETED": { "direction": "output", "bits": [ 252 ] }, "CH0_LDR_RX2CORE": { "direction": "output", "bits": [ 253 ] }, "CH1_LDR_RX2CORE": { "direction": "output", "bits": [ 254 ] }, "D_SCIRDATA0": { "direction": "output", "bits": [ 255 ] }, "D_SCIRDATA1": { "direction": "output", "bits": [ 256 ] }, "D_SCIRDATA2": { "direction": "output", "bits": [ 257 ] }, "D_SCIRDATA3": { "direction": "output", "bits": [ 258 ] }, "D_SCIRDATA4": { "direction": "output", "bits": [ 259 ] }, "D_SCIRDATA5": { "direction": "output", "bits": [ 260 ] }, "D_SCIRDATA6": { "direction": "output", "bits": [ 261 ] }, "D_SCIRDATA7": { "direction": "output", "bits": [ 262 ] }, "D_SCIINT": { "direction": "output", "bits": [ 263 ] }, "D_SCAN_OUT_0": { "direction": "output", "bits": [ 264 ] }, "D_SCAN_OUT_1": { "direction": "output", "bits": [ 265 ] }, "D_SCAN_OUT_2": { "direction": "output", "bits": [ 266 ] }, "D_SCAN_OUT_3": { "direction": "output", "bits": [ 267 ] }, "D_SCAN_OUT_4": { "direction": "output", "bits": [ 268 ] }, "D_SCAN_OUT_5": { "direction": "output", "bits": [ 269 ] }, "D_SCAN_OUT_6": { "direction": "output", "bits": [ 270 ] }, "D_SCAN_OUT_7": { "direction": "output", "bits": [ 271 ] }, "D_COUT0": { "direction": "output", "bits": [ 272 ] }, "D_COUT1": { "direction": "output", "bits": [ 273 ] }, "D_COUT2": { "direction": "output", "bits": [ 274 ] }, "D_COUT3": { "direction": "output", "bits": [ 275 ] }, "D_COUT4": { "direction": "output", "bits": [ 276 ] }, "D_COUT5": { "direction": "output", "bits": [ 277 ] }, "D_COUT6": { "direction": "output", "bits": [ 278 ] }, "D_COUT7": { "direction": "output", "bits": [ 279 ] }, "D_COUT8": { "direction": "output", "bits": [ 280 ] }, "D_COUT9": { "direction": "output", "bits": [ 281 ] }, "D_COUT10": { "direction": "output", "bits": [ 282 ] }, "D_COUT11": { "direction": "output", "bits": [ 283 ] }, "D_COUT12": { "direction": "output", "bits": [ 284 ] }, "D_COUT13": { "direction": "output", "bits": [ 285 ] }, "D_COUT14": { "direction": "output", "bits": [ 286 ] }, "D_COUT15": { "direction": "output", "bits": [ 287 ] }, "D_COUT16": { "direction": "output", "bits": [ 288 ] }, "D_COUT17": { "direction": "output", "bits": [ 289 ] }, "D_COUT18": { "direction": "output", "bits": [ 290 ] }, "D_COUT19": { "direction": "output", "bits": [ 291 ] }, "D_REFCLKI": { "direction": "input", "bits": [ 292 ] }, "D_FFS_PLOL": { "direction": "output", "bits": [ 293 ] } }, "cells": { }, "netnames": { "CH0_FFC_CDR_EN_BITSLIP": { "hide_name": 0, "bits": [ 138 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:369.69-369.91" } }, "CH0_FFC_DIV11_MODE_RX": { "hide_name": 0, "bits": [ 88 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.134-363.155" } }, "CH0_FFC_DIV11_MODE_TX": { "hide_name": 0, "bits": [ 94 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:364.8-364.29" } }, "CH0_FFC_EI_EN": { "hide_name": 0, "bits": [ 66 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:361.8-361.21" } }, "CH0_FFC_ENABLE_CGALIGN": { "hide_name": 0, "bits": [ 74 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:362.8-362.30" } }, "CH0_FFC_FB_LOOPBACK": { "hide_name": 0, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:362.102-362.121" } }, "CH0_FFC_LANE_RX_RST": { "hide_name": 0, "bits": [ 100 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:364.144-364.163" } }, "CH0_FFC_LANE_TX_RST": { "hide_name": 0, "bits": [ 98 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:364.102-364.121" } }, "CH0_FFC_LDR_CORE2TX_EN": { "hide_name": 0, "bits": [ 96 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:364.54-364.76" } }, "CH0_FFC_PCIE_CT": { "hide_name": 0, "bits": [ 70 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:361.80-361.95" } }, "CH0_FFC_PCIE_DET_EN": { "hide_name": 0, "bits": [ 68 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:361.38-361.57" } }, "CH0_FFC_PFIFO_CLR": { "hide_name": 0, "bits": [ 82 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.8-363.25" } }, "CH0_FFC_RATE_MODE_RX": { "hide_name": 0, "bits": [ 84 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.46-363.66" } }, "CH0_FFC_RATE_MODE_TX": { "hide_name": 0, "bits": [ 86 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.90-363.110" } }, "CH0_FFC_RRST": { "hide_name": 0, "bits": [ 102 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:365.8-365.20" } }, "CH0_FFC_RXPWDNB": { "hide_name": 0, "bits": [ 106 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:365.70-365.85" } }, "CH0_FFC_RX_GEAR_MODE": { "hide_name": 0, "bits": [ 90 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.180-363.200" } }, "CH0_FFC_SB_INV_RX": { "hide_name": 0, "bits": [ 72 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:361.114-361.131" } }, "CH0_FFC_SB_PFIFO_LP": { "hide_name": 0, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:362.144-362.163" } }, "CH0_FFC_SIGNAL_DETECT": { "hide_name": 0, "bits": [ 76 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:362.56-362.77" } }, "CH0_FFC_TXPWDNB": { "hide_name": 0, "bits": [ 104 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:365.36-365.51" } }, "CH0_FFC_TX_GEAR_MODE": { "hide_name": 0, "bits": [ 92 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.224-363.244" } }, "CH0_FFS_CC_OVERRUN": { "hide_name": 0, "bits": [ 241 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:381.127-381.145" } }, "CH0_FFS_CC_UNDERRUN": { "hide_name": 0, "bits": [ 239 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:381.85-381.104" } }, "CH0_FFS_LS_SYNC_STATUS": { "hide_name": 0, "bits": [ 237 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:381.37-381.59" } }, "CH0_FFS_PCIE_CON": { "hide_name": 0, "bits": [ 233 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:380.111-380.127" } }, "CH0_FFS_PCIE_DONE": { "hide_name": 0, "bits": [ 231 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:380.73-380.90" } }, "CH0_FFS_RLOL": { "hide_name": 0, "bits": [ 247 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:382.105-382.117" } }, "CH0_FFS_RLOS": { "hide_name": 0, "bits": [ 235 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:381.9-381.21" } }, "CH0_FFS_RXFBFIFO_ERROR": { "hide_name": 0, "bits": [ 243 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:382.9-382.31" } }, "CH0_FFS_SKP_ADDED": { "hide_name": 0, "bits": [ 249 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:382.133-382.150" } }, "CH0_FFS_SKP_DELETED": { "hide_name": 0, "bits": [ 251 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:383.9-383.28" } }, "CH0_FFS_TXFBFIFO_ERROR": { "hide_name": 0, "bits": [ 245 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:382.57-382.79" } }, "CH0_FF_EBRD_CLK": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:354.102-354.117" } }, "CH0_FF_RXI_CLK": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:354.38-354.52" } }, "CH0_FF_RX_D_0": { "hide_name": 0, "bits": [ 183 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:374.73-374.86" } }, "CH0_FF_RX_D_1": { "hide_name": 0, "bits": [ 185 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:374.103-374.116" } }, "CH0_FF_RX_D_10": { "hide_name": 0, "bits": [ 203 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:377.9-377.23" } }, "CH0_FF_RX_D_11": { "hide_name": 0, "bits": [ 205 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:377.41-377.55" } }, "CH0_FF_RX_D_12": { "hide_name": 0, "bits": [ 207 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:377.73-377.87" } }, "CH0_FF_RX_D_13": { "hide_name": 0, "bits": [ 209 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:377.105-377.119" } }, "CH0_FF_RX_D_14": { "hide_name": 0, "bits": [ 211 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:378.9-378.23" } }, "CH0_FF_RX_D_15": { "hide_name": 0, "bits": [ 213 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:378.41-378.55" } }, "CH0_FF_RX_D_16": { "hide_name": 0, "bits": [ 215 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:378.73-378.87" } }, "CH0_FF_RX_D_17": { "hide_name": 0, "bits": [ 217 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:378.105-378.119" } }, "CH0_FF_RX_D_18": { "hide_name": 0, "bits": [ 219 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:379.9-379.23" } }, "CH0_FF_RX_D_19": { "hide_name": 0, "bits": [ 221 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:379.41-379.55" } }, "CH0_FF_RX_D_2": { "hide_name": 0, "bits": [ 187 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:375.9-375.22" } }, "CH0_FF_RX_D_20": { "hide_name": 0, "bits": [ 223 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:379.73-379.87" } }, "CH0_FF_RX_D_21": { "hide_name": 0, "bits": [ 225 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:379.105-379.119" } }, "CH0_FF_RX_D_22": { "hide_name": 0, "bits": [ 227 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:380.9-380.23" } }, "CH0_FF_RX_D_23": { "hide_name": 0, "bits": [ 229 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:380.41-380.55" } }, "CH0_FF_RX_D_3": { "hide_name": 0, "bits": [ 189 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:375.39-375.52" } }, "CH0_FF_RX_D_4": { "hide_name": 0, "bits": [ 191 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:375.69-375.82" } }, "CH0_FF_RX_D_5": { "hide_name": 0, "bits": [ 193 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:375.99-375.112" } }, "CH0_FF_RX_D_6": { "hide_name": 0, "bits": [ 195 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:376.9-376.22" } }, "CH0_FF_RX_D_7": { "hide_name": 0, "bits": [ 197 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:376.39-376.52" } }, "CH0_FF_RX_D_8": { "hide_name": 0, "bits": [ 199 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:376.69-376.82" } }, "CH0_FF_RX_D_9": { "hide_name": 0, "bits": [ 201 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:376.99-376.112" } }, "CH0_FF_RX_F_CLK": { "hide_name": 0, "bits": [ 171 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:373.9-373.24" } }, "CH0_FF_RX_H_CLK": { "hide_name": 0, "bits": [ 173 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:373.43-373.58" } }, "CH0_FF_RX_PCLK": { "hide_name": 0, "bits": [ 179 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:374.9-374.23" } }, "CH0_FF_TXI_CLK": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:354.70-354.84" } }, "CH0_FF_TX_D_0": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:355.8-355.21" } }, "CH0_FF_TX_D_1": { "hide_name": 0, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:355.38-355.51" } }, "CH0_FF_TX_D_10": { "hide_name": 0, "bits": [ 38 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:357.68-357.82" } }, "CH0_FF_TX_D_11": { "hide_name": 0, "bits": [ 40 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:357.100-357.114" } }, "CH0_FF_TX_D_12": { "hide_name": 0, "bits": [ 42 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:358.8-358.22" } }, "CH0_FF_TX_D_13": { "hide_name": 0, "bits": [ 44 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:358.40-358.54" } }, "CH0_FF_TX_D_14": { "hide_name": 0, "bits": [ 46 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:358.72-358.86" } }, "CH0_FF_TX_D_15": { "hide_name": 0, "bits": [ 48 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:358.104-358.118" } }, "CH0_FF_TX_D_16": { "hide_name": 0, "bits": [ 50 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:359.8-359.22" } }, "CH0_FF_TX_D_17": { "hide_name": 0, "bits": [ 52 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:359.40-359.54" } }, "CH0_FF_TX_D_18": { "hide_name": 0, "bits": [ 54 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:359.72-359.86" } }, "CH0_FF_TX_D_19": { "hide_name": 0, "bits": [ 56 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:359.104-359.118" } }, "CH0_FF_TX_D_2": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:355.68-355.81" } }, "CH0_FF_TX_D_20": { "hide_name": 0, "bits": [ 58 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:360.8-360.22" } }, "CH0_FF_TX_D_21": { "hide_name": 0, "bits": [ 60 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:360.40-360.54" } }, "CH0_FF_TX_D_22": { "hide_name": 0, "bits": [ 62 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:360.72-360.86" } }, "CH0_FF_TX_D_23": { "hide_name": 0, "bits": [ 64 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:360.104-360.118" } }, "CH0_FF_TX_D_3": { "hide_name": 0, "bits": [ 24 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:355.98-355.111" } }, "CH0_FF_TX_D_4": { "hide_name": 0, "bits": [ 26 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:356.8-356.21" } }, "CH0_FF_TX_D_5": { "hide_name": 0, "bits": [ 28 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:356.38-356.51" } }, "CH0_FF_TX_D_6": { "hide_name": 0, "bits": [ 30 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:356.68-356.81" } }, "CH0_FF_TX_D_7": { "hide_name": 0, "bits": [ 32 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:356.98-356.111" } }, "CH0_FF_TX_D_8": { "hide_name": 0, "bits": [ 34 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:357.8-357.21" } }, "CH0_FF_TX_D_9": { "hide_name": 0, "bits": [ 36 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:357.38-357.51" } }, "CH0_FF_TX_F_CLK": { "hide_name": 0, "bits": [ 175 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:373.77-373.92" } }, "CH0_FF_TX_H_CLK": { "hide_name": 0, "bits": [ 177 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:373.111-373.126" } }, "CH0_FF_TX_PCLK": { "hide_name": 0, "bits": [ 181 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:374.41-374.55" } }, "CH0_HDINN": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:352.30-352.39" } }, "CH0_HDINP": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:352.8-352.17" } }, "CH0_HDOUTN": { "hide_name": 0, "bits": [ 165 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:372.33-372.43" } }, "CH0_HDOUTP": { "hide_name": 0, "bits": [ 163 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:372.9-372.19" } }, "CH0_LDR_CORE2TX": { "hide_name": 0, "bits": [ 108 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:365.104-365.119" } }, "CH0_LDR_RX2CORE": { "hide_name": 0, "bits": [ 253 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:383.51-383.66" } }, "CH0_RX_REFCLK": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:354.8-354.21" } }, "CH0_SCIEN": { "hide_name": 0, "bits": [ 126 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:368.8-368.17" } }, "CH0_SCISEL": { "hide_name": 0, "bits": [ 128 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:368.30-368.40" } }, "CH1_FFC_CDR_EN_BITSLIP": { "hide_name": 0, "bits": [ 139 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:369.93-369.115" } }, "CH1_FFC_DIV11_MODE_RX": { "hide_name": 0, "bits": [ 89 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.157-363.178" } }, "CH1_FFC_DIV11_MODE_TX": { "hide_name": 0, "bits": [ 95 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:364.31-364.52" } }, "CH1_FFC_EI_EN": { "hide_name": 0, "bits": [ 67 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:361.23-361.36" } }, "CH1_FFC_ENABLE_CGALIGN": { "hide_name": 0, "bits": [ 75 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:362.32-362.54" } }, "CH1_FFC_FB_LOOPBACK": { "hide_name": 0, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:362.123-362.142" } }, "CH1_FFC_LANE_RX_RST": { "hide_name": 0, "bits": [ 101 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:364.165-364.184" } }, "CH1_FFC_LANE_TX_RST": { "hide_name": 0, "bits": [ 99 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:364.123-364.142" } }, "CH1_FFC_LDR_CORE2TX_EN": { "hide_name": 0, "bits": [ 97 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:364.78-364.100" } }, "CH1_FFC_PCIE_CT": { "hide_name": 0, "bits": [ 71 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:361.97-361.112" } }, "CH1_FFC_PCIE_DET_EN": { "hide_name": 0, "bits": [ 69 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:361.59-361.78" } }, "CH1_FFC_PFIFO_CLR": { "hide_name": 0, "bits": [ 83 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.27-363.44" } }, "CH1_FFC_RATE_MODE_RX": { "hide_name": 0, "bits": [ 85 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.68-363.88" } }, "CH1_FFC_RATE_MODE_TX": { "hide_name": 0, "bits": [ 87 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.112-363.132" } }, "CH1_FFC_RRST": { "hide_name": 0, "bits": [ 103 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:365.22-365.34" } }, "CH1_FFC_RXPWDNB": { "hide_name": 0, "bits": [ 107 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:365.87-365.102" } }, "CH1_FFC_RX_GEAR_MODE": { "hide_name": 0, "bits": [ 91 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.202-363.222" } }, "CH1_FFC_SB_INV_RX": { "hide_name": 0, "bits": [ 73 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:361.133-361.150" } }, "CH1_FFC_SB_PFIFO_LP": { "hide_name": 0, "bits": [ 81 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:362.165-362.184" } }, "CH1_FFC_SIGNAL_DETECT": { "hide_name": 0, "bits": [ 77 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:362.79-362.100" } }, "CH1_FFC_TXPWDNB": { "hide_name": 0, "bits": [ 105 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:365.53-365.68" } }, "CH1_FFC_TX_GEAR_MODE": { "hide_name": 0, "bits": [ 93 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:363.246-363.266" } }, "CH1_FFS_CC_OVERRUN": { "hide_name": 0, "bits": [ 242 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:381.147-381.165" } }, "CH1_FFS_CC_UNDERRUN": { "hide_name": 0, "bits": [ 240 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:381.106-381.125" } }, "CH1_FFS_LS_SYNC_STATUS": { "hide_name": 0, "bits": [ 238 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:381.61-381.83" } }, "CH1_FFS_PCIE_CON": { "hide_name": 0, "bits": [ 234 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:380.129-380.145" } }, "CH1_FFS_PCIE_DONE": { "hide_name": 0, "bits": [ 232 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:380.92-380.109" } }, "CH1_FFS_RLOL": { "hide_name": 0, "bits": [ 248 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:382.119-382.131" } }, "CH1_FFS_RLOS": { "hide_name": 0, "bits": [ 236 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:381.23-381.35" } }, "CH1_FFS_RXFBFIFO_ERROR": { "hide_name": 0, "bits": [ 244 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:382.33-382.55" } }, "CH1_FFS_SKP_ADDED": { "hide_name": 0, "bits": [ 250 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:382.152-382.169" } }, "CH1_FFS_SKP_DELETED": { "hide_name": 0, "bits": [ 252 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:383.30-383.49" } }, "CH1_FFS_TXFBFIFO_ERROR": { "hide_name": 0, "bits": [ 246 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:382.81-382.103" } }, "CH1_FF_EBRD_CLK": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:354.119-354.134" } }, "CH1_FF_RXI_CLK": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:354.54-354.68" } }, "CH1_FF_RX_D_0": { "hide_name": 0, "bits": [ 184 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:374.88-374.101" } }, "CH1_FF_RX_D_1": { "hide_name": 0, "bits": [ 186 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:374.118-374.131" } }, "CH1_FF_RX_D_10": { "hide_name": 0, "bits": [ 204 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:377.25-377.39" } }, "CH1_FF_RX_D_11": { "hide_name": 0, "bits": [ 206 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:377.57-377.71" } }, "CH1_FF_RX_D_12": { "hide_name": 0, "bits": [ 208 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:377.89-377.103" } }, "CH1_FF_RX_D_13": { "hide_name": 0, "bits": [ 210 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:377.121-377.135" } }, "CH1_FF_RX_D_14": { "hide_name": 0, "bits": [ 212 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:378.25-378.39" } }, "CH1_FF_RX_D_15": { "hide_name": 0, "bits": [ 214 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:378.57-378.71" } }, "CH1_FF_RX_D_16": { "hide_name": 0, "bits": [ 216 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:378.89-378.103" } }, "CH1_FF_RX_D_17": { "hide_name": 0, "bits": [ 218 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:378.121-378.135" } }, "CH1_FF_RX_D_18": { "hide_name": 0, "bits": [ 220 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:379.25-379.39" } }, "CH1_FF_RX_D_19": { "hide_name": 0, "bits": [ 222 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:379.57-379.71" } }, "CH1_FF_RX_D_2": { "hide_name": 0, "bits": [ 188 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:375.24-375.37" } }, "CH1_FF_RX_D_20": { "hide_name": 0, "bits": [ 224 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:379.89-379.103" } }, "CH1_FF_RX_D_21": { "hide_name": 0, "bits": [ 226 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:379.121-379.135" } }, "CH1_FF_RX_D_22": { "hide_name": 0, "bits": [ 228 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:380.25-380.39" } }, "CH1_FF_RX_D_23": { "hide_name": 0, "bits": [ 230 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:380.57-380.71" } }, "CH1_FF_RX_D_3": { "hide_name": 0, "bits": [ 190 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:375.54-375.67" } }, "CH1_FF_RX_D_4": { "hide_name": 0, "bits": [ 192 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:375.84-375.97" } }, "CH1_FF_RX_D_5": { "hide_name": 0, "bits": [ 194 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:375.114-375.127" } }, "CH1_FF_RX_D_6": { "hide_name": 0, "bits": [ 196 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:376.24-376.37" } }, "CH1_FF_RX_D_7": { "hide_name": 0, "bits": [ 198 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:376.54-376.67" } }, "CH1_FF_RX_D_8": { "hide_name": 0, "bits": [ 200 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:376.84-376.97" } }, "CH1_FF_RX_D_9": { "hide_name": 0, "bits": [ 202 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:376.114-376.127" } }, "CH1_FF_RX_F_CLK": { "hide_name": 0, "bits": [ 172 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:373.26-373.41" } }, "CH1_FF_RX_H_CLK": { "hide_name": 0, "bits": [ 174 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:373.60-373.75" } }, "CH1_FF_RX_PCLK": { "hide_name": 0, "bits": [ 180 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:374.25-374.39" } }, "CH1_FF_TXI_CLK": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:354.86-354.100" } }, "CH1_FF_TX_D_0": { "hide_name": 0, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:355.23-355.36" } }, "CH1_FF_TX_D_1": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:355.53-355.66" } }, "CH1_FF_TX_D_10": { "hide_name": 0, "bits": [ 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:357.84-357.98" } }, "CH1_FF_TX_D_11": { "hide_name": 0, "bits": [ 41 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:357.116-357.130" } }, "CH1_FF_TX_D_12": { "hide_name": 0, "bits": [ 43 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:358.24-358.38" } }, "CH1_FF_TX_D_13": { "hide_name": 0, "bits": [ 45 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:358.56-358.70" } }, "CH1_FF_TX_D_14": { "hide_name": 0, "bits": [ 47 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:358.88-358.102" } }, "CH1_FF_TX_D_15": { "hide_name": 0, "bits": [ 49 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:358.120-358.134" } }, "CH1_FF_TX_D_16": { "hide_name": 0, "bits": [ 51 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:359.24-359.38" } }, "CH1_FF_TX_D_17": { "hide_name": 0, "bits": [ 53 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:359.56-359.70" } }, "CH1_FF_TX_D_18": { "hide_name": 0, "bits": [ 55 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:359.88-359.102" } }, "CH1_FF_TX_D_19": { "hide_name": 0, "bits": [ 57 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:359.120-359.134" } }, "CH1_FF_TX_D_2": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:355.83-355.96" } }, "CH1_FF_TX_D_20": { "hide_name": 0, "bits": [ 59 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:360.24-360.38" } }, "CH1_FF_TX_D_21": { "hide_name": 0, "bits": [ 61 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:360.56-360.70" } }, "CH1_FF_TX_D_22": { "hide_name": 0, "bits": [ 63 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:360.88-360.102" } }, "CH1_FF_TX_D_23": { "hide_name": 0, "bits": [ 65 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:360.120-360.134" } }, "CH1_FF_TX_D_3": { "hide_name": 0, "bits": [ 25 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:355.113-355.126" } }, "CH1_FF_TX_D_4": { "hide_name": 0, "bits": [ 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:356.23-356.36" } }, "CH1_FF_TX_D_5": { "hide_name": 0, "bits": [ 29 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:356.53-356.66" } }, "CH1_FF_TX_D_6": { "hide_name": 0, "bits": [ 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:356.83-356.96" } }, "CH1_FF_TX_D_7": { "hide_name": 0, "bits": [ 33 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:356.113-356.126" } }, "CH1_FF_TX_D_8": { "hide_name": 0, "bits": [ 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:357.23-357.36" } }, "CH1_FF_TX_D_9": { "hide_name": 0, "bits": [ 37 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:357.53-357.66" } }, "CH1_FF_TX_F_CLK": { "hide_name": 0, "bits": [ 176 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:373.94-373.109" } }, "CH1_FF_TX_H_CLK": { "hide_name": 0, "bits": [ 178 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:373.128-373.143" } }, "CH1_FF_TX_PCLK": { "hide_name": 0, "bits": [ 182 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:374.57-374.71" } }, "CH1_HDINN": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:352.41-352.50" } }, "CH1_HDINP": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:352.19-352.28" } }, "CH1_HDOUTN": { "hide_name": 0, "bits": [ 166 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:372.45-372.55" } }, "CH1_HDOUTP": { "hide_name": 0, "bits": [ 164 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:372.21-372.31" } }, "CH1_LDR_CORE2TX": { "hide_name": 0, "bits": [ 109 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:365.121-365.136" } }, "CH1_LDR_RX2CORE": { "hide_name": 0, "bits": [ 254 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:383.68-383.83" } }, "CH1_RX_REFCLK": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:354.23-354.36" } }, "CH1_SCIEN": { "hide_name": 0, "bits": [ 127 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:368.19-368.28" } }, "CH1_SCISEL": { "hide_name": 0, "bits": [ 129 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:368.42-368.52" } }, "D_CIN0": { "hide_name": 0, "bits": [ 151 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.22-371.28" } }, "D_CIN1": { "hide_name": 0, "bits": [ 152 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.30-371.36" } }, "D_CIN10": { "hide_name": 0, "bits": [ 161 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.101-371.108" } }, "D_CIN11": { "hide_name": 0, "bits": [ 162 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.110-371.117" } }, "D_CIN2": { "hide_name": 0, "bits": [ 153 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.38-371.44" } }, "D_CIN3": { "hide_name": 0, "bits": [ 154 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.46-371.52" } }, "D_CIN4": { "hide_name": 0, "bits": [ 155 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.54-371.60" } }, "D_CIN5": { "hide_name": 0, "bits": [ 156 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.62-371.68" } }, "D_CIN6": { "hide_name": 0, "bits": [ 157 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.70-371.76" } }, "D_CIN7": { "hide_name": 0, "bits": [ 158 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.77-371.83" } }, "D_CIN8": { "hide_name": 0, "bits": [ 159 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.85-371.91" } }, "D_CIN9": { "hide_name": 0, "bits": [ 160 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.93-371.99" } }, "D_COUT0": { "hide_name": 0, "bits": [ 272 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.9-385.16" } }, "D_COUT1": { "hide_name": 0, "bits": [ 273 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.18-385.25" } }, "D_COUT10": { "hide_name": 0, "bits": [ 282 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.99-385.107" } }, "D_COUT11": { "hide_name": 0, "bits": [ 283 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.109-385.117" } }, "D_COUT12": { "hide_name": 0, "bits": [ 284 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.119-385.127" } }, "D_COUT13": { "hide_name": 0, "bits": [ 285 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.129-385.137" } }, "D_COUT14": { "hide_name": 0, "bits": [ 286 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.139-385.147" } }, "D_COUT15": { "hide_name": 0, "bits": [ 287 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.149-385.157" } }, "D_COUT16": { "hide_name": 0, "bits": [ 288 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.159-385.167" } }, "D_COUT17": { "hide_name": 0, "bits": [ 289 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.169-385.177" } }, "D_COUT18": { "hide_name": 0, "bits": [ 290 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.179-385.187" } }, "D_COUT19": { "hide_name": 0, "bits": [ 291 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.189-385.197" } }, "D_COUT2": { "hide_name": 0, "bits": [ 274 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.27-385.34" } }, "D_COUT3": { "hide_name": 0, "bits": [ 275 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.36-385.43" } }, "D_COUT4": { "hide_name": 0, "bits": [ 276 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.45-385.52" } }, "D_COUT5": { "hide_name": 0, "bits": [ 277 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.54-385.61" } }, "D_COUT6": { "hide_name": 0, "bits": [ 278 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.63-385.70" } }, "D_COUT7": { "hide_name": 0, "bits": [ 279 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.72-385.79" } }, "D_COUT8": { "hide_name": 0, "bits": [ 280 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.81-385.88" } }, "D_COUT9": { "hide_name": 0, "bits": [ 281 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:385.90-385.97" } }, "D_CYAWSTN": { "hide_name": 0, "bits": [ 132 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:368.74-368.83" } }, "D_FFC_DUAL_RST": { "hide_name": 0, "bits": [ 134 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:369.8-369.22" } }, "D_FFC_MACROPDB": { "hide_name": 0, "bits": [ 136 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:369.41-369.55" } }, "D_FFC_MACRO_RST": { "hide_name": 0, "bits": [ 135 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:369.24-369.39" } }, "D_FFC_SYNC_TOGGLE": { "hide_name": 0, "bits": [ 133 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:368.85-368.102" } }, "D_FFC_TRST": { "hide_name": 0, "bits": [ 137 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:369.57-369.67" } }, "D_FFS_PLOL": { "hide_name": 0, "bits": [ 293 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:388.9-388.19" } }, "D_REFCLKI": { "hide_name": 0, "bits": [ 292 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:387.9-387.18" } }, "D_SCAN_ENABLE": { "hide_name": 0, "bits": [ 140 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:369.117-369.130" } }, "D_SCAN_IN_0": { "hide_name": 0, "bits": [ 141 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:369.132-369.143" } }, "D_SCAN_IN_1": { "hide_name": 0, "bits": [ 142 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:370.8-370.19" } }, "D_SCAN_IN_2": { "hide_name": 0, "bits": [ 143 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:370.21-370.32" } }, "D_SCAN_IN_3": { "hide_name": 0, "bits": [ 144 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:370.34-370.45" } }, "D_SCAN_IN_4": { "hide_name": 0, "bits": [ 145 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:370.47-370.58" } }, "D_SCAN_IN_5": { "hide_name": 0, "bits": [ 146 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:370.60-370.71" } }, "D_SCAN_IN_6": { "hide_name": 0, "bits": [ 147 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:370.73-370.84" } }, "D_SCAN_IN_7": { "hide_name": 0, "bits": [ 148 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:370.86-370.97" } }, "D_SCAN_MODE": { "hide_name": 0, "bits": [ 149 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:370.99-370.110" } }, "D_SCAN_OUT_0": { "hide_name": 0, "bits": [ 264 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.71-384.83" } }, "D_SCAN_OUT_1": { "hide_name": 0, "bits": [ 265 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.85-384.97" } }, "D_SCAN_OUT_2": { "hide_name": 0, "bits": [ 266 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.99-384.111" } }, "D_SCAN_OUT_3": { "hide_name": 0, "bits": [ 267 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.113-384.125" } }, "D_SCAN_OUT_4": { "hide_name": 0, "bits": [ 268 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.127-384.139" } }, "D_SCAN_OUT_5": { "hide_name": 0, "bits": [ 269 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.141-384.153" } }, "D_SCAN_OUT_6": { "hide_name": 0, "bits": [ 270 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.155-384.167" } }, "D_SCAN_OUT_7": { "hide_name": 0, "bits": [ 271 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.169-384.181" } }, "D_SCAN_RESET": { "hide_name": 0, "bits": [ 150 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:371.8-371.20" } }, "D_SCIADDR0": { "hide_name": 0, "bits": [ 118 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:367.8-367.18" } }, "D_SCIADDR1": { "hide_name": 0, "bits": [ 119 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:367.20-367.30" } }, "D_SCIADDR2": { "hide_name": 0, "bits": [ 120 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:367.32-367.42" } }, "D_SCIADDR3": { "hide_name": 0, "bits": [ 121 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:367.44-367.54" } }, "D_SCIADDR4": { "hide_name": 0, "bits": [ 122 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:367.56-367.66" } }, "D_SCIADDR5": { "hide_name": 0, "bits": [ 123 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:367.68-367.78" } }, "D_SCIENAUX": { "hide_name": 0, "bits": [ 124 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:367.80-367.90" } }, "D_SCIINT": { "hide_name": 0, "bits": [ 263 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.61-384.69" } }, "D_SCIRD": { "hide_name": 0, "bits": [ 130 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:368.54-368.61" } }, "D_SCIRDATA0": { "hide_name": 0, "bits": [ 255 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:383.85-383.96" } }, "D_SCIRDATA1": { "hide_name": 0, "bits": [ 256 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:383.98-383.109" } }, "D_SCIRDATA2": { "hide_name": 0, "bits": [ 257 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:383.111-383.122" } }, "D_SCIRDATA3": { "hide_name": 0, "bits": [ 258 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:383.124-383.135" } }, "D_SCIRDATA4": { "hide_name": 0, "bits": [ 259 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.9-384.20" } }, "D_SCIRDATA5": { "hide_name": 0, "bits": [ 260 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.22-384.33" } }, "D_SCIRDATA6": { "hide_name": 0, "bits": [ 261 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.35-384.46" } }, "D_SCIRDATA7": { "hide_name": 0, "bits": [ 262 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:384.48-384.59" } }, "D_SCISELAUX": { "hide_name": 0, "bits": [ 125 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:367.92-367.103" } }, "D_SCIWDATA0": { "hide_name": 0, "bits": [ 110 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:366.8-366.19" } }, "D_SCIWDATA1": { "hide_name": 0, "bits": [ 111 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:366.21-366.32" } }, "D_SCIWDATA2": { "hide_name": 0, "bits": [ 112 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:366.34-366.45" } }, "D_SCIWDATA3": { "hide_name": 0, "bits": [ 113 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:366.47-366.58" } }, "D_SCIWDATA4": { "hide_name": 0, "bits": [ 114 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:366.60-366.71" } }, "D_SCIWDATA5": { "hide_name": 0, "bits": [ 115 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:366.73-366.84" } }, "D_SCIWDATA6": { "hide_name": 0, "bits": [ 116 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:366.86-366.97" } }, "D_SCIWDATA7": { "hide_name": 0, "bits": [ 117 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:366.99-366.110" } }, "D_SCIWSTN": { "hide_name": 0, "bits": [ 131 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:368.63-368.72" } }, "D_SYNC_ND": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:353.52-353.61" } }, "D_SYNC_PULSE2ND": { "hide_name": 0, "bits": [ 169 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:372.97-372.112" } }, "D_TXBIT_CLKN_FROM_ND": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:353.30-353.50" } }, "D_TXBIT_CLKN_TO_ND": { "hide_name": 0, "bits": [ 168 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:372.77-372.95" } }, "D_TXBIT_CLKP_FROM_ND": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:353.8-353.28" } }, "D_TXBIT_CLKP_TO_ND": { "hide_name": 0, "bits": [ 167 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:372.57-372.75" } }, "D_TXPLL_LOL_FROM_ND": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:353.63-353.82" } }, "D_TXPLL_LOL_TO_ND": { "hide_name": 0, "bits": [ 170 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:372.114-372.131" } } } }, "DDRDLLA": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:312.1-318.10" }, "parameter_default_values": { "FORCE_MAX_DELAY": "NO", "GSR": "ENABLED" }, "ports": { "CLK": { "direction": "input", "bits": [ 2 ] }, "RST": { "direction": "input", "bits": [ 3 ] }, "UDDCNTLN": { "direction": "input", "bits": [ 4 ] }, "FREEZE": { "direction": "input", "bits": [ 5 ] }, "LOCK": { "direction": "output", "bits": [ 6 ] }, "DDRDEL": { "direction": "output", "bits": [ 7 ] }, "DCNTL7": { "direction": "output", "bits": [ 8 ] }, "DCNTL6": { "direction": "output", "bits": [ 9 ] }, "DCNTL5": { "direction": "output", "bits": [ 10 ] }, "DCNTL4": { "direction": "output", "bits": [ 11 ] }, "DCNTL3": { "direction": "output", "bits": [ 12 ] }, "DCNTL2": { "direction": "output", "bits": [ 13 ] }, "DCNTL1": { "direction": "output", "bits": [ 14 ] }, "DCNTL0": { "direction": "output", "bits": [ 15 ] } }, "cells": { }, "netnames": { "CLK": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:313.8-313.11" } }, "DCNTL0": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.79-314.85" } }, "DCNTL1": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.71-314.77" } }, "DCNTL2": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.63-314.69" } }, "DCNTL3": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.55-314.61" } }, "DCNTL4": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.47-314.53" } }, "DCNTL5": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.39-314.45" } }, "DCNTL6": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.31-314.37" } }, "DCNTL7": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.23-314.29" } }, "DDRDEL": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.15-314.21" } }, "FREEZE": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:313.28-313.34" } }, "LOCK": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:314.9-314.13" } }, "RST": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:313.13-313.16" } }, "UDDCNTLN": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:313.18-313.26" } } } }, "DELAYF": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:177.1-183.10" }, "parameter_default_values": { "DEL_MODE": "USER_DEFINED", "DEL_VALUE": "00000000000000000000000000000000" }, "ports": { "A": { "direction": "input", "bits": [ 2 ] }, "LOADN": { "direction": "input", "bits": [ 3 ] }, "MOVE": { "direction": "input", "bits": [ 4 ] }, "DIRECTION": { "direction": "input", "bits": [ 5 ] }, "Z": { "direction": "output", "bits": [ 6 ] }, "CFLAG": { "direction": "output", "bits": [ 7 ] } }, "cells": { }, "netnames": { "A": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:178.8-178.9" } }, "CFLAG": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:179.12-179.17" } }, "DIRECTION": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:178.24-178.33" } }, "LOADN": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:178.11-178.16" } }, "MOVE": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:178.18-178.22" } }, "Z": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:179.9-179.10" } } } }, "DELAYG": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:186.1-192.10" }, "parameter_default_values": { "DEL_MODE": "USER_DEFINED", "DEL_VALUE": "00000000000000000000000000000000" }, "ports": { "A": { "direction": "input", "bits": [ 2 ] }, "Z": { "direction": "output", "bits": [ 3 ] } }, "cells": { }, "netnames": { "A": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:187.8-187.9" } }, "Z": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:188.9-188.10" } } } }, "DP16KD": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:602.1-815.10" }, "parameter_default_values": { "ADA0MUX": "ADA0", "ADA10MUX": "ADA10", "ADA11MUX": "ADA11", "ADA12MUX": "ADA12", "ADA13MUX": "ADA13", "ADA1MUX": "ADA1", "ADA2MUX": "ADA2", "ADA3MUX": "ADA3", "ADA4MUX": "ADA4", "ADA5MUX": "ADA5", "ADA6MUX": "ADA6", "ADA7MUX": "ADA7", "ADA8MUX": "ADA8", "ADA9MUX": "ADA9", "ADB0MUX": "ADB0", "ADB10MUX": "ADB10", "ADB11MUX": "ADB11", "ADB12MUX": "ADB12", "ADB13MUX": "ADB13", "ADB1MUX": "ADB1", "ADB2MUX": "ADB2", "ADB3MUX": "ADB3", "ADB4MUX": "ADB4", "ADB5MUX": "ADB5", "ADB6MUX": "ADB6", "ADB7MUX": "ADB7", "ADB8MUX": "ADB8", "ADB9MUX": "ADB9", "ASYNC_RESET_RELEASE": "SYNC", "CEAMUX": "CEA", "CEBMUX": "CEB", "CLKAMUX": "CLKA", "CLKBMUX": "CLKB", "CSA0MUX": "CSA0", "CSA1MUX": "CSA1", "CSA2MUX": "CSA2", "CSB0MUX": "CSB0", "CSB1MUX": "CSB1", "CSB2MUX": "CSB2", "CSDECODE_A": "0b000", "CSDECODE_B": "0b000", "DATA_WIDTH_A": "00000000000000000000000000010010", "DATA_WIDTH_B": "00000000000000000000000000010010", "DIA0MUX": "DIA0", "DIA10MUX": "DIA10", "DIA11MUX": "DIA11", "DIA12MUX": "DIA12", "DIA13MUX": "DIA13", "DIA14MUX": "DIA14", "DIA15MUX": "DIA15", "DIA16MUX": "DIA16", "DIA17MUX": "DIA17", "DIA1MUX": "DIA1", "DIA2MUX": "DIA2", "DIA3MUX": "DIA3", "DIA4MUX": "DIA4", "DIA5MUX": "DIA5", "DIA6MUX": "DIA6", "DIA7MUX": "DIA7", "DIA8MUX": "DIA8", "DIA9MUX": "DIA9", "DIB0MUX": "DIB0", "DIB10MUX": "DIB10", "DIB11MUX": "DIB11", "DIB12MUX": "DIB12", "DIB13MUX": "DIB13", "DIB14MUX": "DIB14", "DIB15MUX": "DIB15", "DIB16MUX": "DIB16", "DIB17MUX": "DIB17", "DIB1MUX": "DIB1", "DIB2MUX": "DIB2", "DIB3MUX": "DIB3", "DIB4MUX": "DIB4", "DIB5MUX": "DIB5", "DIB6MUX": "DIB6", "DIB7MUX": "DIB7", "DIB8MUX": "DIB8", "DIB9MUX": "DIB9", "DOA0MUX": "DOA0", "DOA10MUX": "DOA10", "DOA11MUX": "DOA11", "DOA12MUX": "DOA12", "DOA13MUX": "DOA13", "DOA14MUX": "DOA14", "DOA15MUX": "DOA15", "DOA16MUX": "DOA16", "DOA17MUX": "DOA17", "DOA1MUX": "DOA1", "DOA2MUX": "DOA2", "DOA3MUX": "DOA3", "DOA4MUX": "DOA4", "DOA5MUX": "DOA5", "DOA6MUX": "DOA6", "DOA7MUX": "DOA7", "DOA8MUX": "DOA8", "DOA9MUX": "DOA9", "DOB0MUX": "DOB0", "DOB10MUX": "DOB10", "DOB11MUX": "DOB11", "DOB12MUX": "DOB12", "DOB13MUX": "DOB13", "DOB14MUX": "DOB14", "DOB15MUX": "DOB15", "DOB16MUX": "DOB16", "DOB17MUX": "DOB17", "DOB1MUX": "DOB1", "DOB2MUX": "DOB2", "DOB3MUX": "DOB3", "DOB4MUX": "DOB4", "DOB5MUX": "DOB5", "DOB6MUX": "DOB6", "DOB7MUX": "DOB7", "DOB8MUX": "DOB8", "DOB9MUX": "DOB9", "GSR": "ENABLED", "INITVAL_00": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_01": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_02": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_03": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_04": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_05": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_06": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_07": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_08": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_09": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0A": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0B": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0C": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0D": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0E": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0F": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_10": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_11": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_12": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_13": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_14": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_15": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_16": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_17": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_18": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_19": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1A": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1B": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1C": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1D": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1E": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1F": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_20": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_21": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_22": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_23": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_24": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_25": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_26": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_27": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_28": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_29": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2A": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2B": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2C": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2D": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2E": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2F": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_30": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_31": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_32": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_33": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_34": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_35": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_36": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_37": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_38": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_39": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3A": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3B": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3C": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3D": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3E": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3F": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "OCEAMUX": "OCEA", "OCEBMUX": "OCEB", "REGMODE_A": "NOREG", "REGMODE_B": "NOREG", "RESETMODE": "SYNC", "RSTAMUX": "RSTA", "RSTBMUX": "RSTB", "WEAMUX": "WEA", "WEBMUX": "WEB", "WID": "00000000000000000000000000000000", "WRITEMODE_A": "NORMAL", "WRITEMODE_B": "NORMAL" }, "ports": { "DIA17": { "direction": "input", "bits": [ 2 ] }, "DIA16": { "direction": "input", "bits": [ 3 ] }, "DIA15": { "direction": "input", "bits": [ 4 ] }, "DIA14": { "direction": "input", "bits": [ 5 ] }, "DIA13": { "direction": "input", "bits": [ 6 ] }, "DIA12": { "direction": "input", "bits": [ 7 ] }, "DIA11": { "direction": "input", "bits": [ 8 ] }, "DIA10": { "direction": "input", "bits": [ 9 ] }, "DIA9": { "direction": "input", "bits": [ 10 ] }, "DIA8": { "direction": "input", "bits": [ 11 ] }, "DIA7": { "direction": "input", "bits": [ 12 ] }, "DIA6": { "direction": "input", "bits": [ 13 ] }, "DIA5": { "direction": "input", "bits": [ 14 ] }, "DIA4": { "direction": "input", "bits": [ 15 ] }, "DIA3": { "direction": "input", "bits": [ 16 ] }, "DIA2": { "direction": "input", "bits": [ 17 ] }, "DIA1": { "direction": "input", "bits": [ 18 ] }, "DIA0": { "direction": "input", "bits": [ 19 ] }, "ADA13": { "direction": "input", "bits": [ 20 ] }, "ADA12": { "direction": "input", "bits": [ 21 ] }, "ADA11": { "direction": "input", "bits": [ 22 ] }, "ADA10": { "direction": "input", "bits": [ 23 ] }, "ADA9": { "direction": "input", "bits": [ 24 ] }, "ADA8": { "direction": "input", "bits": [ 25 ] }, "ADA7": { "direction": "input", "bits": [ 26 ] }, "ADA6": { "direction": "input", "bits": [ 27 ] }, "ADA5": { "direction": "input", "bits": [ 28 ] }, "ADA4": { "direction": "input", "bits": [ 29 ] }, "ADA3": { "direction": "input", "bits": [ 30 ] }, "ADA2": { "direction": "input", "bits": [ 31 ] }, "ADA1": { "direction": "input", "bits": [ 32 ] }, "ADA0": { "direction": "input", "bits": [ 33 ] }, "CEA": { "direction": "input", "bits": [ 34 ] }, "OCEA": { "direction": "input", "bits": [ 35 ] }, "CLKA": { "direction": "input", "bits": [ 36 ] }, "WEA": { "direction": "input", "bits": [ 37 ] }, "RSTA": { "direction": "input", "bits": [ 38 ] }, "CSA2": { "direction": "input", "bits": [ 39 ] }, "CSA1": { "direction": "input", "bits": [ 40 ] }, "CSA0": { "direction": "input", "bits": [ 41 ] }, "DOA17": { "direction": "output", "bits": [ 42 ] }, "DOA16": { "direction": "output", "bits": [ 43 ] }, "DOA15": { "direction": "output", "bits": [ 44 ] }, "DOA14": { "direction": "output", "bits": [ 45 ] }, "DOA13": { "direction": "output", "bits": [ 46 ] }, "DOA12": { "direction": "output", "bits": [ 47 ] }, "DOA11": { "direction": "output", "bits": [ 48 ] }, "DOA10": { "direction": "output", "bits": [ 49 ] }, "DOA9": { "direction": "output", "bits": [ 50 ] }, "DOA8": { "direction": "output", "bits": [ 51 ] }, "DOA7": { "direction": "output", "bits": [ 52 ] }, "DOA6": { "direction": "output", "bits": [ 53 ] }, "DOA5": { "direction": "output", "bits": [ 54 ] }, "DOA4": { "direction": "output", "bits": [ 55 ] }, "DOA3": { "direction": "output", "bits": [ 56 ] }, "DOA2": { "direction": "output", "bits": [ 57 ] }, "DOA1": { "direction": "output", "bits": [ 58 ] }, "DOA0": { "direction": "output", "bits": [ 59 ] }, "DIB17": { "direction": "input", "bits": [ 60 ] }, "DIB16": { "direction": "input", "bits": [ 61 ] }, "DIB15": { "direction": "input", "bits": [ 62 ] }, "DIB14": { "direction": "input", "bits": [ 63 ] }, "DIB13": { "direction": "input", "bits": [ 64 ] }, "DIB12": { "direction": "input", "bits": [ 65 ] }, "DIB11": { "direction": "input", "bits": [ 66 ] }, "DIB10": { "direction": "input", "bits": [ 67 ] }, "DIB9": { "direction": "input", "bits": [ 68 ] }, "DIB8": { "direction": "input", "bits": [ 69 ] }, "DIB7": { "direction": "input", "bits": [ 70 ] }, "DIB6": { "direction": "input", "bits": [ 71 ] }, "DIB5": { "direction": "input", "bits": [ 72 ] }, "DIB4": { "direction": "input", "bits": [ 73 ] }, "DIB3": { "direction": "input", "bits": [ 74 ] }, "DIB2": { "direction": "input", "bits": [ 75 ] }, "DIB1": { "direction": "input", "bits": [ 76 ] }, "DIB0": { "direction": "input", "bits": [ 77 ] }, "ADB13": { "direction": "input", "bits": [ 78 ] }, "ADB12": { "direction": "input", "bits": [ 79 ] }, "ADB11": { "direction": "input", "bits": [ 80 ] }, "ADB10": { "direction": "input", "bits": [ 81 ] }, "ADB9": { "direction": "input", "bits": [ 82 ] }, "ADB8": { "direction": "input", "bits": [ 83 ] }, "ADB7": { "direction": "input", "bits": [ 84 ] }, "ADB6": { "direction": "input", "bits": [ 85 ] }, "ADB5": { "direction": "input", "bits": [ 86 ] }, "ADB4": { "direction": "input", "bits": [ 87 ] }, "ADB3": { "direction": "input", "bits": [ 88 ] }, "ADB2": { "direction": "input", "bits": [ 89 ] }, "ADB1": { "direction": "input", "bits": [ 90 ] }, "ADB0": { "direction": "input", "bits": [ 91 ] }, "CEB": { "direction": "input", "bits": [ 92 ] }, "OCEB": { "direction": "input", "bits": [ 93 ] }, "CLKB": { "direction": "input", "bits": [ 94 ] }, "WEB": { "direction": "input", "bits": [ 95 ] }, "RSTB": { "direction": "input", "bits": [ 96 ] }, "CSB2": { "direction": "input", "bits": [ 97 ] }, "CSB1": { "direction": "input", "bits": [ 98 ] }, "CSB0": { "direction": "input", "bits": [ 99 ] }, "DOB17": { "direction": "output", "bits": [ 100 ] }, "DOB16": { "direction": "output", "bits": [ 101 ] }, "DOB15": { "direction": "output", "bits": [ 102 ] }, "DOB14": { "direction": "output", "bits": [ 103 ] }, "DOB13": { "direction": "output", "bits": [ 104 ] }, "DOB12": { "direction": "output", "bits": [ 105 ] }, "DOB11": { "direction": "output", "bits": [ 106 ] }, "DOB10": { "direction": "output", "bits": [ 107 ] }, "DOB9": { "direction": "output", "bits": [ 108 ] }, "DOB8": { "direction": "output", "bits": [ 109 ] }, "DOB7": { "direction": "output", "bits": [ 110 ] }, "DOB6": { "direction": "output", "bits": [ 111 ] }, "DOB5": { "direction": "output", "bits": [ 112 ] }, "DOB4": { "direction": "output", "bits": [ 113 ] }, "DOB3": { "direction": "output", "bits": [ 114 ] }, "DOB2": { "direction": "output", "bits": [ 115 ] }, "DOB1": { "direction": "output", "bits": [ 116 ] }, "DOB0": { "direction": "output", "bits": [ 117 ] } }, "cells": { }, "netnames": { "ADA0": { "hide_name": 0, "bits": [ 33 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.91-604.95" } }, "ADA1": { "hide_name": 0, "bits": [ 32 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.85-604.89" } }, "ADA10": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.30-604.35" } }, "ADA11": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.23-604.28" } }, "ADA12": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.16-604.21" } }, "ADA13": { "hide_name": 0, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.9-604.14" } }, "ADA2": { "hide_name": 0, "bits": [ 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.79-604.83" } }, "ADA3": { "hide_name": 0, "bits": [ 30 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.73-604.77" } }, "ADA4": { "hide_name": 0, "bits": [ 29 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.67-604.71" } }, "ADA5": { "hide_name": 0, "bits": [ 28 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.61-604.65" } }, "ADA6": { "hide_name": 0, "bits": [ 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.55-604.59" } }, "ADA7": { "hide_name": 0, "bits": [ 26 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.49-604.53" } }, "ADA8": { "hide_name": 0, "bits": [ 25 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.43-604.47" } }, "ADA9": { "hide_name": 0, "bits": [ 24 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:604.37-604.41" } }, "ADB0": { "hide_name": 0, "bits": [ 91 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.91-610.95" } }, "ADB1": { "hide_name": 0, "bits": [ 90 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.85-610.89" } }, "ADB10": { "hide_name": 0, "bits": [ 81 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.30-610.35" } }, "ADB11": { "hide_name": 0, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.23-610.28" } }, "ADB12": { "hide_name": 0, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.16-610.21" } }, "ADB13": { "hide_name": 0, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.9-610.14" } }, "ADB2": { "hide_name": 0, "bits": [ 89 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.79-610.83" } }, "ADB3": { "hide_name": 0, "bits": [ 88 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.73-610.77" } }, "ADB4": { "hide_name": 0, "bits": [ 87 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.67-610.71" } }, "ADB5": { "hide_name": 0, "bits": [ 86 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.61-610.65" } }, "ADB6": { "hide_name": 0, "bits": [ 85 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.55-610.59" } }, "ADB7": { "hide_name": 0, "bits": [ 84 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.49-610.53" } }, "ADB8": { "hide_name": 0, "bits": [ 83 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.43-610.47" } }, "ADB9": { "hide_name": 0, "bits": [ 82 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:610.37-610.41" } }, "CEA": { "hide_name": 0, "bits": [ 34 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:605.9-605.12" } }, "CEB": { "hide_name": 0, "bits": [ 92 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:611.9-611.12" } }, "CLKA": { "hide_name": 0, "bits": [ 36 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:605.20-605.24" } }, "CLKB": { "hide_name": 0, "bits": [ 94 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:611.20-611.24" } }, "CSA0": { "hide_name": 0, "bits": [ 41 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:606.21-606.25" } }, "CSA1": { "hide_name": 0, "bits": [ 40 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:606.15-606.19" } }, "CSA2": { "hide_name": 0, "bits": [ 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:606.9-606.13" } }, "CSB0": { "hide_name": 0, "bits": [ 99 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:612.21-612.25" } }, "CSB1": { "hide_name": 0, "bits": [ 98 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:612.15-612.19" } }, "CSB2": { "hide_name": 0, "bits": [ 97 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:612.9-612.13" } }, "DIA0": { "hide_name": 0, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.119-603.123" } }, "DIA1": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.113-603.117" } }, "DIA10": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.58-603.63" } }, "DIA11": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.51-603.56" } }, "DIA12": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.44-603.49" } }, "DIA13": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.37-603.42" } }, "DIA14": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.30-603.35" } }, "DIA15": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.23-603.28" } }, "DIA16": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.16-603.21" } }, "DIA17": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.9-603.14" } }, "DIA2": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.107-603.111" } }, "DIA3": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.101-603.105" } }, "DIA4": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.95-603.99" } }, "DIA5": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.89-603.93" } }, "DIA6": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.83-603.87" } }, "DIA7": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.77-603.81" } }, "DIA8": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.71-603.75" } }, "DIA9": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:603.65-603.69" } }, "DIB0": { "hide_name": 0, "bits": [ 77 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.119-609.123" } }, "DIB1": { "hide_name": 0, "bits": [ 76 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.113-609.117" } }, "DIB10": { "hide_name": 0, "bits": [ 67 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.58-609.63" } }, "DIB11": { "hide_name": 0, "bits": [ 66 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.51-609.56" } }, "DIB12": { "hide_name": 0, "bits": [ 65 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.44-609.49" } }, "DIB13": { "hide_name": 0, "bits": [ 64 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.37-609.42" } }, "DIB14": { "hide_name": 0, "bits": [ 63 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.30-609.35" } }, "DIB15": { "hide_name": 0, "bits": [ 62 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.23-609.28" } }, "DIB16": { "hide_name": 0, "bits": [ 61 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.16-609.21" } }, "DIB17": { "hide_name": 0, "bits": [ 60 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.9-609.14" } }, "DIB2": { "hide_name": 0, "bits": [ 75 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.107-609.111" } }, "DIB3": { "hide_name": 0, "bits": [ 74 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.101-609.105" } }, "DIB4": { "hide_name": 0, "bits": [ 73 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.95-609.99" } }, "DIB5": { "hide_name": 0, "bits": [ 72 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.89-609.93" } }, "DIB6": { "hide_name": 0, "bits": [ 71 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.83-609.87" } }, "DIB7": { "hide_name": 0, "bits": [ 70 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.77-609.81" } }, "DIB8": { "hide_name": 0, "bits": [ 69 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.71-609.75" } }, "DIB9": { "hide_name": 0, "bits": [ 68 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:609.65-609.69" } }, "DOA0": { "hide_name": 0, "bits": [ 59 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.120-607.124" } }, "DOA1": { "hide_name": 0, "bits": [ 58 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.114-607.118" } }, "DOA10": { "hide_name": 0, "bits": [ 49 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.59-607.64" } }, "DOA11": { "hide_name": 0, "bits": [ 48 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.52-607.57" } }, "DOA12": { "hide_name": 0, "bits": [ 47 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.45-607.50" } }, "DOA13": { "hide_name": 0, "bits": [ 46 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.38-607.43" } }, "DOA14": { "hide_name": 0, "bits": [ 45 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.31-607.36" } }, "DOA15": { "hide_name": 0, "bits": [ 44 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.24-607.29" } }, "DOA16": { "hide_name": 0, "bits": [ 43 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.17-607.22" } }, "DOA17": { "hide_name": 0, "bits": [ 42 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.10-607.15" } }, "DOA2": { "hide_name": 0, "bits": [ 57 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.108-607.112" } }, "DOA3": { "hide_name": 0, "bits": [ 56 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.102-607.106" } }, "DOA4": { "hide_name": 0, "bits": [ 55 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.96-607.100" } }, "DOA5": { "hide_name": 0, "bits": [ 54 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.90-607.94" } }, "DOA6": { "hide_name": 0, "bits": [ 53 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.84-607.88" } }, "DOA7": { "hide_name": 0, "bits": [ 52 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.78-607.82" } }, "DOA8": { "hide_name": 0, "bits": [ 51 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.72-607.76" } }, "DOA9": { "hide_name": 0, "bits": [ 50 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:607.66-607.70" } }, "DOB0": { "hide_name": 0, "bits": [ 117 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.120-613.124" } }, "DOB1": { "hide_name": 0, "bits": [ 116 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.114-613.118" } }, "DOB10": { "hide_name": 0, "bits": [ 107 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.59-613.64" } }, "DOB11": { "hide_name": 0, "bits": [ 106 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.52-613.57" } }, "DOB12": { "hide_name": 0, "bits": [ 105 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.45-613.50" } }, "DOB13": { "hide_name": 0, "bits": [ 104 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.38-613.43" } }, "DOB14": { "hide_name": 0, "bits": [ 103 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.31-613.36" } }, "DOB15": { "hide_name": 0, "bits": [ 102 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.24-613.29" } }, "DOB16": { "hide_name": 0, "bits": [ 101 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.17-613.22" } }, "DOB17": { "hide_name": 0, "bits": [ 100 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.10-613.15" } }, "DOB2": { "hide_name": 0, "bits": [ 115 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.108-613.112" } }, "DOB3": { "hide_name": 0, "bits": [ 114 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.102-613.106" } }, "DOB4": { "hide_name": 0, "bits": [ 113 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.96-613.100" } }, "DOB5": { "hide_name": 0, "bits": [ 112 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.90-613.94" } }, "DOB6": { "hide_name": 0, "bits": [ 111 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.84-613.88" } }, "DOB7": { "hide_name": 0, "bits": [ 110 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.78-613.82" } }, "DOB8": { "hide_name": 0, "bits": [ 109 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.72-613.76" } }, "DOB9": { "hide_name": 0, "bits": [ 108 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:613.66-613.70" } }, "OCEA": { "hide_name": 0, "bits": [ 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:605.14-605.18" } }, "OCEB": { "hide_name": 0, "bits": [ 93 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:611.14-611.18" } }, "RSTA": { "hide_name": 0, "bits": [ 38 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:605.31-605.35" } }, "RSTB": { "hide_name": 0, "bits": [ 96 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:611.31-611.35" } }, "WEA": { "hide_name": 0, "bits": [ 37 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:605.26-605.29" } }, "WEB": { "hide_name": 0, "bits": [ 95 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:611.26-611.29" } } } }, "DPR16X4C": { "attributes": { "whitebox": "00000000000000000000000000000001", "abc9_box": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:236.1-295.10" }, "parameter_default_values": { "INITVAL": "0x0000000000000000 " }, "ports": { "DI": { "direction": "input", "bits": [ 2, 3, 4, 5 ] }, "WCK": { "direction": "input", "bits": [ 6 ] }, "WRE": { "direction": "input", "bits": [ 7 ] }, "RAD": { "direction": "input", "bits": [ 8, 9, 10, 11 ] }, "WAD": { "direction": "input", "bits": [ 12, 13, 14, 15 ] }, "DO": { "direction": "output", "bits": [ 16, 17, 18, 19 ] } }, "cells": { "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$406": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110010110", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$407": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110010111", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$408": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110011000", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$409": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110011001", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$410": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110011010", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$411": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110011011", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$412": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110011100", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$413": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110011101", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$414": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110011110", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$415": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110011111", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$416": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110100000", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "1", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$417": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110100001", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "1", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$418": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110100010", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$419": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110100011", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$420": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110100100", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "1", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$memrd$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:289$405": { "hide_name": 1, "type": "$memrd", "parameters": { "ABITS": "00000000000000000000000000000100", "CLK_ENABLE": "00000000000000000000000000000000", "CLK_POLARITY": "00000000000000000000000000000000", "MEMID": "\\ram", "TRANSPARENT": "00000000000000000000000000000000", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:289.14-289.17" }, "port_directions": { "ADDR": "input", "CLK": "input", "DATA": "output", "EN": "input" }, "connections": { "ADDR": [ 8, 9, 10, 11 ], "CLK": [ "x" ], "DATA": [ 16, 17, 18, 19 ], "EN": [ "x" ] } }, "$memwr$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$421": { "hide_name": 1, "type": "$memwr", "parameters": { "ABITS": "00000000000000000000000000000100", "CLK_ENABLE": "00000000000000000000000000000000", "CLK_POLARITY": "00000000000000000000000000000000", "MEMID": "\\ram", "PRIORITY": "00000000000000000000000110100101", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "CLK": "input", "DATA": "input", "EN": "input" }, "connections": { "ADDR": [ 20, 21, 22, 23 ], "CLK": [ "x" ], "DATA": [ 24, 25, 26, 27 ], "EN": [ 28, 29, 30, 31 ] } }, "$procdff$627": { "hide_name": 1, "type": "$dff", "parameters": { "CLK_POLARITY": "1", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285.2-287.19" }, "port_directions": { "CLK": "input", "D": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "D": [ 32, 33, 34, 35 ], "Q": [ 20, 21, 22, 23 ] } }, "$procdff$628": { "hide_name": 1, "type": "$dff", "parameters": { "CLK_POLARITY": "1", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285.2-287.19" }, "port_directions": { "CLK": "input", "D": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "D": [ 36, 37, 38, 39 ], "Q": [ 24, 25, 26, 27 ] } }, "$procdff$629": { "hide_name": 1, "type": "$dff", "parameters": { "CLK_POLARITY": "1", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285.2-287.19" }, "port_directions": { "CLK": "input", "D": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "D": [ 40, 41, 42, 43 ], "Q": [ 28, 29, 30, 31 ] } }, "$procmux$435": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:286.7-286.10|/usr/local/bin/../share/yosys/ecp5/cells_sim.v:286.3-287.19" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ "0", "0", "0", "0" ], "B": [ "1", "1", "1", "1" ], "S": [ 7 ], "Y": [ 40, 41, 42, 43 ] } }, "$procmux$437": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:286.7-286.10|/usr/local/bin/../share/yosys/ecp5/cells_sim.v:286.3-287.19" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ "x", "x", "x", "x" ], "B": [ 2, 3, 4, 5 ], "S": [ 7 ], "Y": [ 36, 37, 38, 39 ] } }, "$procmux$439": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:286.7-286.10|/usr/local/bin/../share/yosys/ecp5/cells_sim.v:286.3-287.19" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ "x", "x", "x", "x" ], "B": [ 12, 13, 14, 15 ], "S": [ 7 ], "Y": [ 32, 33, 34, 35 ] } }, "$specify$252": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000100", "FULL": "1", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000100", "T_FALL_MAX": "00000000000000000000000000000000", "T_FALL_MIN": "00000000000000000000000000000000", "T_FALL_TYP": "00000000000000000000000000000000", "T_RISE_MAX": "00000000000000000000000000000000", "T_RISE_MIN": "00000000000000000000000000000000", "T_RISE_TYP": "00000000000000000000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:293.3-293.19" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 16, 17, 18, 19 ], "EN": [ "1" ], "SRC": [ 8, 9, 10, 11 ] } } }, "netnames": { "$0$memwr$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$400_ADDR[3:0]$402": { "hide_name": 1, "bits": [ 32, 33, 34, 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285.2-287.19" } }, "$0$memwr$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$400_DATA[3:0]$403": { "hide_name": 1, "bits": [ 36, 37, 38, 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285.2-287.19" } }, "$0$memwr$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$400_EN[3:0]$404": { "hide_name": 1, "bits": [ 40, 41, 42, 43 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285.2-287.19" } }, "$0\\i[31:0]": { "hide_name": 1, "bits": [ "1", "1", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$memrd$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:289$405_DATA": { "hide_name": 1, "bits": [ 16, 17, 18, 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:289.14-289.17" } }, "$memwr$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$400_ADDR": { "hide_name": 1, "bits": [ 20, 21, 22, 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$memwr$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$400_DATA": { "hide_name": 1, "bits": [ 24, 25, 26, 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$memwr$\\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$400_EN": { "hide_name": 1, "bits": [ 28, 29, 30, 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$procmux$435_Y": { "hide_name": 1, "bits": [ 40, 41, 42, 43 ], "attributes": { } }, "$procmux$436_CMP": { "hide_name": 1, "bits": [ 7 ], "attributes": { } }, "$procmux$437_Y": { "hide_name": 1, "bits": [ 36, 37, 38, 39 ], "attributes": { } }, "$procmux$438_CMP": { "hide_name": 1, "bits": [ 7 ], "attributes": { } }, "$procmux$439_Y": { "hide_name": 1, "bits": [ 32, 33, 34, 35 ], "attributes": { } }, "$procmux$440_CMP": { "hide_name": 1, "bits": [ 7 ], "attributes": { } }, "DI": { "hide_name": 0, "bits": [ 2, 3, 4, 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:237.15-237.17" } }, "DO": { "hide_name": 0, "bits": [ 16, 17, 18, 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:241.16-241.18" } }, "RAD": { "hide_name": 0, "bits": [ 8, 9, 10, 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:239.15-239.18" } }, "WAD": { "hide_name": 0, "bits": [ 12, 13, 14, 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:240.15-240.18" } }, "WCK": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:238.9-238.12" } }, "WRE": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:238.14-238.17" } }, "i": { "hide_name": 0, "bits": [ "1", "1", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "signed": 1, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:278.10-278.11" } } } }, "DQSBUFM": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:294.1-309.10" }, "parameter_default_values": { "DQS_LI_DEL_ADJ": "FACTORYONLY", "DQS_LI_DEL_VAL": "00000000000000000000000000000000", "DQS_LO_DEL_ADJ": "FACTORYONLY", "DQS_LO_DEL_VAL": "00000000000000000000000000000000", "GSR": "ENABLED" }, "ports": { "DQSI": { "direction": "input", "bits": [ 2 ] }, "READ1": { "direction": "input", "bits": [ 3 ] }, "READ0": { "direction": "input", "bits": [ 4 ] }, "READCLKSEL2": { "direction": "input", "bits": [ 5 ] }, "READCLKSEL1": { "direction": "input", "bits": [ 6 ] }, "READCLKSEL0": { "direction": "input", "bits": [ 7 ] }, "DDRDEL": { "direction": "input", "bits": [ 8 ] }, "ECLK": { "direction": "input", "bits": [ 9 ] }, "SCLK": { "direction": "input", "bits": [ 10 ] }, "DYNDELAY7": { "direction": "input", "bits": [ 11 ] }, "DYNDELAY6": { "direction": "input", "bits": [ 12 ] }, "DYNDELAY5": { "direction": "input", "bits": [ 13 ] }, "DYNDELAY4": { "direction": "input", "bits": [ 14 ] }, "DYNDELAY3": { "direction": "input", "bits": [ 15 ] }, "DYNDELAY2": { "direction": "input", "bits": [ 16 ] }, "DYNDELAY1": { "direction": "input", "bits": [ 17 ] }, "DYNDELAY0": { "direction": "input", "bits": [ 18 ] }, "RST": { "direction": "input", "bits": [ 19 ] }, "RDLOADN": { "direction": "input", "bits": [ 20 ] }, "RDMOVE": { "direction": "input", "bits": [ 21 ] }, "RDDIRECTION": { "direction": "input", "bits": [ 22 ] }, "WRLOADN": { "direction": "input", "bits": [ 23 ] }, "WRMOVE": { "direction": "input", "bits": [ 24 ] }, "WRDIRECTION": { "direction": "input", "bits": [ 25 ] }, "PAUSE": { "direction": "input", "bits": [ 26 ] }, "DQSR90": { "direction": "output", "bits": [ 27 ] }, "DQSW": { "direction": "output", "bits": [ 28 ] }, "DQSW270": { "direction": "output", "bits": [ 29 ] }, "RDPNTR2": { "direction": "output", "bits": [ 30 ] }, "RDPNTR1": { "direction": "output", "bits": [ 31 ] }, "RDPNTR0": { "direction": "output", "bits": [ 32 ] }, "WRPNTR2": { "direction": "output", "bits": [ 33 ] }, "WRPNTR1": { "direction": "output", "bits": [ 34 ] }, "WRPNTR0": { "direction": "output", "bits": [ 35 ] }, "DATAVALID": { "direction": "output", "bits": [ 36 ] }, "BURSTDET": { "direction": "output", "bits": [ 37 ] }, "RDCFLAG": { "direction": "output", "bits": [ 38 ] }, "WRCFLAG": { "direction": "output", "bits": [ 39 ] } }, "cells": { }, "netnames": { "BURSTDET": { "hide_name": 0, "bits": [ 37 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:302.20-302.28" } }, "DATAVALID": { "hide_name": 0, "bits": [ 36 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:302.9-302.18" } }, "DDRDEL": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:295.67-295.73" } }, "DQSI": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:295.8-295.12" } }, "DQSR90": { "hide_name": 0, "bits": [ 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:300.9-300.15" } }, "DQSW": { "hide_name": 0, "bits": [ 28 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:300.17-300.21" } }, "DQSW270": { "hide_name": 0, "bits": [ 29 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:300.23-300.30" } }, "DYNDELAY0": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:298.41-298.50" } }, "DYNDELAY1": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:298.30-298.39" } }, "DYNDELAY2": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:298.19-298.28" } }, "DYNDELAY3": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:298.8-298.17" } }, "DYNDELAY4": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:297.41-297.50" } }, "DYNDELAY5": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:297.30-297.39" } }, "DYNDELAY6": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:297.19-297.28" } }, "DYNDELAY7": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:297.8-297.17" } }, "ECLK": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:296.8-296.12" } }, "PAUSE": { "hide_name": 0, "bits": [ 26 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:299.73-299.78" } }, "RDCFLAG": { "hide_name": 0, "bits": [ 38 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:302.30-302.37" } }, "RDDIRECTION": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:299.30-299.41" } }, "RDLOADN": { "hide_name": 0, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:299.13-299.20" } }, "RDMOVE": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:299.22-299.28" } }, "RDPNTR0": { "hide_name": 0, "bits": [ 32 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:301.27-301.34" } }, "RDPNTR1": { "hide_name": 0, "bits": [ 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:301.18-301.25" } }, "RDPNTR2": { "hide_name": 0, "bits": [ 30 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:301.9-301.16" } }, "READ0": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:295.21-295.26" } }, "READ1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:295.14-295.19" } }, "READCLKSEL0": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:295.54-295.65" } }, "READCLKSEL1": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:295.41-295.52" } }, "READCLKSEL2": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:295.28-295.39" } }, "RST": { "hide_name": 0, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:299.8-299.11" } }, "SCLK": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:296.14-296.18" } }, "WRCFLAG": { "hide_name": 0, "bits": [ 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:302.39-302.46" } }, "WRDIRECTION": { "hide_name": 0, "bits": [ 25 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:299.60-299.71" } }, "WRLOADN": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:299.43-299.50" } }, "WRMOVE": { "hide_name": 0, "bits": [ 24 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:299.52-299.58" } }, "WRPNTR0": { "hide_name": 0, "bits": [ 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:301.54-301.61" } }, "WRPNTR1": { "hide_name": 0, "bits": [ 34 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:301.45-301.52" } }, "WRPNTR2": { "hide_name": 0, "bits": [ 33 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:301.36-301.43" } } } }, "DTR": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:146.1-150.10" }, "ports": { "STARTPULSE": { "direction": "input", "bits": [ 2 ] }, "DTROUT7": { "direction": "output", "bits": [ 3 ] }, "DTROUT6": { "direction": "output", "bits": [ 4 ] }, "DTROUT5": { "direction": "output", "bits": [ 5 ] }, "DTROUT4": { "direction": "output", "bits": [ 6 ] }, "DTROUT3": { "direction": "output", "bits": [ 7 ] }, "DTROUT2": { "direction": "output", "bits": [ 8 ] }, "DTROUT1": { "direction": "output", "bits": [ 9 ] }, "DTROUT0": { "direction": "output", "bits": [ 10 ] } }, "cells": { }, "netnames": { "DTROUT0": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:148.72-148.79" } }, "DTROUT1": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:148.63-148.70" } }, "DTROUT2": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:148.54-148.61" } }, "DTROUT3": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:148.45-148.52" } }, "DTROUT4": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:148.36-148.43" } }, "DTROUT5": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:148.27-148.34" } }, "DTROUT6": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:148.18-148.25" } }, "DTROUT7": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:148.9-148.16" } }, "STARTPULSE": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:147.8-147.18" } } } }, "ECLKBRIDGECS": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:337.1-341.10" }, "ports": { "CLK0": { "direction": "input", "bits": [ 2 ] }, "CLK1": { "direction": "input", "bits": [ 3 ] }, "SEL": { "direction": "input", "bits": [ 4 ] }, "ECSOUT": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "CLK0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:338.8-338.12" } }, "CLK1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:338.14-338.18" } }, "ECSOUT": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:339.9-339.15" } }, "SEL": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:338.20-338.23" } } } }, "ECLKSYNCB": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:330.1-334.10" }, "ports": { "ECLKI": { "direction": "input", "bits": [ 2 ] }, "STOP": { "direction": "input", "bits": [ 3 ] }, "ECLKO": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "ECLKI": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:331.8-331.13" } }, "ECLKO": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:332.9-332.14" } }, "STOP": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:331.15-331.19" } } } }, "EHXPLLL": { "attributes": { "blackbox": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:98.1-143.10" }, "parameter_default_values": { "CLKFB_DIV": "00000000000000000000000000000001", "CLKI_DIV": "00000000000000000000000000000001", "CLKOP_CPHASE": "00000000000000000000000000000000", "CLKOP_DIV": "00000000000000000000000000001000", "CLKOP_ENABLE": "ENABLED", "CLKOP_FPHASE": "00000000000000000000000000000000", "CLKOP_TRIM_DELAY": "00000000000000000000000000000000", "CLKOP_TRIM_POL": "RISING", "CLKOS2_CPHASE": "00000000000000000000000000000000", "CLKOS2_DIV": "00000000000000000000000000001000", "CLKOS2_ENABLE": "DISABLED", "CLKOS2_FPHASE": "00000000000000000000000000000000", "CLKOS3_CPHASE": "00000000000000000000000000000000", "CLKOS3_DIV": "00000000000000000000000000001000", "CLKOS3_ENABLE": "DISABLED", "CLKOS3_FPHASE": "00000000000000000000000000000000", "CLKOS_CPHASE": "00000000000000000000000000000000", "CLKOS_DIV": "00000000000000000000000000001000", "CLKOS_ENABLE": "DISABLED", "CLKOS_FPHASE": "00000000000000000000000000000000", "CLKOS_TRIM_DELAY": "00000000000000000000000000000000", "CLKOS_TRIM_POL": "RISING", "DPHASE_SOURCE": "DISABLED", "FEEDBK_PATH": "CLKOP", "INTFB_WAKE": "DISABLED", "INT_LOCK_STICKY": "ENABLED", "OUTDIVIDER_MUXA": "DIVA", "OUTDIVIDER_MUXB": "DIVB", "OUTDIVIDER_MUXC": "DIVC", "OUTDIVIDER_MUXD": "DIVD", "PLLRST_ENA": "DISABLED", "PLL_LOCK_DELAY": "00000000000000000000000011001000", "PLL_LOCK_MODE": "00000000000000000000000000000000", "REFIN_RESET": "DISABLED", "STDBY_ENABLE": "DISABLED", "SYNC_ENABLE": "DISABLED" }, "ports": { "CLKI": { "direction": "input", "bits": [ 2 ] }, "CLKFB": { "direction": "input", "bits": [ 3 ] }, "PHASESEL1": { "direction": "input", "bits": [ 4 ] }, "PHASESEL0": { "direction": "input", "bits": [ 5 ] }, "PHASEDIR": { "direction": "input", "bits": [ 6 ] }, "PHASESTEP": { "direction": "input", "bits": [ 7 ] }, "PHASELOADREG": { "direction": "input", "bits": [ 8 ] }, "STDBY": { "direction": "input", "bits": [ 9 ] }, "PLLWAKESYNC": { "direction": "input", "bits": [ 10 ] }, "RST": { "direction": "input", "bits": [ 11 ] }, "ENCLKOP": { "direction": "input", "bits": [ 12 ] }, "ENCLKOS": { "direction": "input", "bits": [ 13 ] }, "ENCLKOS2": { "direction": "input", "bits": [ 14 ] }, "ENCLKOS3": { "direction": "input", "bits": [ 15 ] }, "CLKOP": { "direction": "output", "bits": [ 16 ] }, "CLKOS": { "direction": "output", "bits": [ 17 ] }, "CLKOS2": { "direction": "output", "bits": [ 18 ] }, "CLKOS3": { "direction": "output", "bits": [ 19 ] }, "LOCK": { "direction": "output", "bits": [ 20 ] }, "INTLOCK": { "direction": "output", "bits": [ 21 ] }, "REFCLK": { "direction": "output", "bits": [ 22 ] }, "CLKINTFB": { "direction": "output", "bits": [ 23 ] } }, "cells": { }, "netnames": { "CLKFB": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:99.14-99.19" } }, "CLKI": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:99.8-99.12" } }, "CLKINTFB": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:105.17-105.25" } }, "CLKOP": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:103.9-103.14" } }, "CLKOS": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:103.16-103.21" } }, "CLKOS2": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:103.23-103.29" } }, "CLKOS3": { "hide_name": 0, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:103.31-103.37" } }, "ENCLKOP": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:102.13-102.20" } }, "ENCLKOS": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:102.22-102.29" } }, "ENCLKOS2": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:102.31-102.39" } }, "ENCLKOS3": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:102.41-102.49" } }, "INTLOCK": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:104.15-104.22" } }, "LOCK": { "hide_name": 0, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:104.9-104.13" } }, "PHASEDIR": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:100.30-100.38" } }, "PHASELOADREG": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:100.51-100.63" } }, "PHASESEL0": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:100.19-100.28" } }, "PHASESEL1": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:100.8-100.17" } }, "PHASESTEP": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:100.40-100.49" } }, "PLLWAKESYNC": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:101.15-101.26" } }, "REFCLK": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:105.9-105.15" } }, "RST": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:102.8-102.11" } }, "STDBY": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:101.8-101.13" } } } }, "EXTREFB": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:662.1-669.10" }, "parameter_default_values": { "REFCK_DCBIAS_EN": "0b0", "REFCK_PWDNB": "0b0", "REFCK_RTERM": "0b0" }, "ports": { "REFCLKP": { "direction": "input", "bits": [ 2 ] }, "REFCLKN": { "direction": "input", "bits": [ 3 ] }, "REFCLKO": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "REFCLKN": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:663.18-663.25" } }, "REFCLKO": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:664.9-664.16" } }, "REFCLKP": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:663.9-663.16" } } } }, "FD1P3AX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:2.1-2.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D": { "direction": "input", "bits": [ 2 ] }, "SP": { "direction": "input", "bits": [ 3 ] }, "CK": { "direction": "input", "bits": [ 4 ] }, "Q": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "CK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:2.33-2.35" } }, "D": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:2.26-2.27" } }, "Q": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:2.44-2.45" } }, "SP": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:2.29-2.31" } } } }, "FD1P3AY": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:3.1-3.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D": { "direction": "input", "bits": [ 2 ] }, "SP": { "direction": "input", "bits": [ 3 ] }, "CK": { "direction": "input", "bits": [ 4 ] }, "Q": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "CK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:3.33-3.35" } }, "D": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:3.26-3.27" } }, "Q": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:3.44-3.45" } }, "SP": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:3.29-3.31" } } } }, "FD1P3BX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:4.1-4.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "PD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "CK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "CK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:4.33-4.35" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:4.26-4.27" } }, "PD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:4.22-4.24" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:4.44-4.45" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:4.29-4.31" } } } }, "FD1P3DX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:5.1-5.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "CD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "CK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "CD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:5.22-5.24" } }, "CK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:5.33-5.35" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:5.26-5.27" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:5.44-5.45" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:5.29-5.31" } } } }, "FD1P3IX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:6.1-6.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "CD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "CK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "CD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:6.22-6.24" } }, "CK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:6.33-6.35" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:6.26-6.27" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:6.44-6.45" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:6.29-6.31" } } } }, "FD1P3JX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:7.1-7.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "PD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "CK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "CK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:7.33-7.35" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:7.26-7.27" } }, "PD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:7.22-7.24" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:7.44-7.45" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:7.29-7.31" } } } }, "FD1S3AX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:8.1-8.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D": { "direction": "input", "bits": [ 2 ] }, "CK": { "direction": "input", "bits": [ 3 ] }, "Q": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "CK": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:8.33-8.35" } }, "D": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:8.26-8.27" } }, "Q": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:8.44-8.45" } } } }, "FD1S3AY": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:9.1-9.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D": { "direction": "input", "bits": [ 2 ] }, "CK": { "direction": "input", "bits": [ 3 ] }, "Q": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "CK": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:9.33-9.35" } }, "D": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:9.26-9.27" } }, "Q": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:9.44-9.45" } } } }, "FD1S3BX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:10.1-10.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "PD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "CK": { "direction": "input", "bits": [ 4 ] }, "Q": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "CK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:10.33-10.35" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:10.26-10.27" } }, "PD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:10.22-10.24" } }, "Q": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:10.44-10.45" } } } }, "FD1S3DX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:11.1-11.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "CD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "CK": { "direction": "input", "bits": [ 4 ] }, "Q": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "CD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:11.22-11.24" } }, "CK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:11.33-11.35" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:11.26-11.27" } }, "Q": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:11.44-11.45" } } } }, "FD1S3IX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:12.1-12.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "CD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "CK": { "direction": "input", "bits": [ 4 ] }, "Q": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "CD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:12.22-12.24" } }, "CK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:12.33-12.35" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:12.26-12.27" } }, "Q": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:12.44-12.45" } } } }, "FD1S3JX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:13.1-13.261" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "PD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "CK": { "direction": "input", "bits": [ 4 ] }, "Q": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "CK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:13.33-13.35" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:13.26-13.27" } }, "PD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:13.22-13.24" } }, "Q": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:13.44-13.45" } } } }, "GSR": { "attributes": { "keep": "00000000000000000000000000000001", "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:688.1-691.10" }, "ports": { "GSR": { "direction": "input", "bits": [ 2 ] } }, "cells": { }, "netnames": { "GSR": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:689.8-689.11" } } } }, "IB": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:2.1-2.132" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "O": { "direction": "output", "bits": [ 3 ] } }, "cells": { }, "netnames": { "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:2.20-2.21" } }, "O": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:2.34-2.35" } } } }, "IBPD": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:4.1-4.132" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "O": { "direction": "output", "bits": [ 3 ] } }, "cells": { }, "netnames": { "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:4.20-4.21" } }, "O": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:4.34-4.35" } } } }, "IBPU": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:3.1-3.132" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "O": { "direction": "output", "bits": [ 3 ] } }, "cells": { }, "netnames": { "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:3.20-3.21" } }, "O": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:3.34-3.35" } } } }, "IDDR71B": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:211.1-216.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D": { "direction": "input", "bits": [ 2 ] }, "SCLK": { "direction": "input", "bits": [ 3 ] }, "ECLK": { "direction": "input", "bits": [ 4 ] }, "RST": { "direction": "input", "bits": [ 5 ] }, "ALIGNWD": { "direction": "input", "bits": [ 6 ] }, "Q0": { "direction": "output", "bits": [ 7 ] }, "Q1": { "direction": "output", "bits": [ 8 ] }, "Q2": { "direction": "output", "bits": [ 9 ] }, "Q3": { "direction": "output", "bits": [ 10 ] }, "Q4": { "direction": "output", "bits": [ 11 ] }, "Q5": { "direction": "output", "bits": [ 12 ] }, "Q6": { "direction": "output", "bits": [ 13 ] } }, "cells": { }, "netnames": { "ALIGNWD": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:212.28-212.35" } }, "D": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:212.8-212.9" } }, "ECLK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:212.17-212.21" } }, "Q0": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:213.9-213.11" } }, "Q1": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:213.13-213.15" } }, "Q2": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:213.17-213.19" } }, "Q3": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:213.21-213.23" } }, "Q4": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:213.25-213.27" } }, "Q5": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:213.29-213.31" } }, "Q6": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:213.33-213.35" } }, "RST": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:212.23-212.26" } }, "SCLK": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:212.11-212.15" } } } }, "IDDRX1F": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:195.1-200.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D": { "direction": "input", "bits": [ 2 ] }, "SCLK": { "direction": "input", "bits": [ 3 ] }, "RST": { "direction": "input", "bits": [ 4 ] }, "Q0": { "direction": "output", "bits": [ 5 ] }, "Q1": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "D": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:196.8-196.9" } }, "Q0": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:197.9-197.11" } }, "Q1": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:197.13-197.15" } }, "RST": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:196.17-196.20" } }, "SCLK": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:196.11-196.15" } } } }, "IDDRX2DQA": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:219.1-225.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D": { "direction": "input", "bits": [ 2 ] }, "DQSR90": { "direction": "input", "bits": [ 3 ] }, "ECLK": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "RST": { "direction": "input", "bits": [ 6 ] }, "RDPNTR2": { "direction": "input", "bits": [ 7 ] }, "RDPNTR1": { "direction": "input", "bits": [ 8 ] }, "RDPNTR0": { "direction": "input", "bits": [ 9 ] }, "WRPNTR2": { "direction": "input", "bits": [ 10 ] }, "WRPNTR1": { "direction": "input", "bits": [ 11 ] }, "WRPNTR0": { "direction": "input", "bits": [ 12 ] }, "Q0": { "direction": "output", "bits": [ 13 ] }, "Q1": { "direction": "output", "bits": [ 14 ] }, "Q2": { "direction": "output", "bits": [ 15 ] }, "Q3": { "direction": "output", "bits": [ 16 ] }, "QWL": { "direction": "output", "bits": [ 17 ] } }, "cells": { }, "netnames": { "D": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:220.8-220.9" } }, "DQSR90": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:220.11-220.17" } }, "ECLK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:220.19-220.23" } }, "Q0": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:222.9-222.11" } }, "Q1": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:222.13-222.15" } }, "Q2": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:222.17-222.19" } }, "Q3": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:222.21-222.23" } }, "QWL": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:222.25-222.28" } }, "RDPNTR0": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:221.26-221.33" } }, "RDPNTR1": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:221.17-221.24" } }, "RDPNTR2": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:221.8-221.15" } }, "RST": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:220.31-220.34" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:220.25-220.29" } }, "WRPNTR0": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:221.53-221.60" } }, "WRPNTR1": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:221.44-221.51" } }, "WRPNTR2": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:221.35-221.42" } } } }, "IDDRX2F": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:203.1-208.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D": { "direction": "input", "bits": [ 2 ] }, "SCLK": { "direction": "input", "bits": [ 3 ] }, "ECLK": { "direction": "input", "bits": [ 4 ] }, "RST": { "direction": "input", "bits": [ 5 ] }, "Q0": { "direction": "output", "bits": [ 6 ] }, "Q1": { "direction": "output", "bits": [ 7 ] }, "Q2": { "direction": "output", "bits": [ 8 ] }, "Q3": { "direction": "output", "bits": [ 9 ] } }, "cells": { }, "netnames": { "D": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:204.8-204.9" } }, "ECLK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:204.17-204.21" } }, "Q0": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:205.9-205.11" } }, "Q1": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:205.13-205.15" } }, "Q2": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:205.17-205.19" } }, "Q3": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:205.21-205.23" } }, "RST": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:204.23-204.26" } }, "SCLK": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:204.11-204.15" } } } }, "IFS1P3BX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:26.1-26.301" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "PD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:26.27-26.28" } }, "PD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:26.23-26.25" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:26.47-26.48" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:26.34-26.38" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:26.30-26.32" } } } }, "IFS1P3DX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:27.1-27.301" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "CD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "CD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:27.23-27.25" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:27.27-27.28" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:27.47-27.48" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:27.34-27.38" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:27.30-27.32" } } } }, "IFS1P3IX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:28.1-28.301" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "CD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "CD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:28.23-28.25" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:28.27-28.28" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:28.47-28.48" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:28.34-28.38" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:28.30-28.32" } } } }, "IFS1P3JX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:29.1-29.301" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "PD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:29.27-29.28" } }, "PD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:29.23-29.25" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:29.47-29.48" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:29.34-29.38" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:29.30-29.32" } } } }, "ILVDS": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:13.1-13.114" }, "ports": { "A": { "direction": "input", "bits": [ 2 ] }, "AN": { "direction": "input", "bits": [ 3 ] }, "Z": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "A": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:13.20-13.21" } }, "AN": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:13.23-13.25" } }, "Z": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:13.34-13.35" } } } }, "INV": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:422.1-424.10" }, "ports": { "A": { "direction": "input", "bits": [ 2 ] }, "Z": { "direction": "output", "bits": [ 3 ] } }, "cells": { }, "netnames": { "A": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:422.18-422.19" } }, "Z": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:422.28-422.29" } } } }, "JTAGG": { "attributes": { "keep": "00000000000000000000000000000001", "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:167.1-174.10" }, "parameter_default_values": { "ER1": "ENABLED", "ER2": "ENABLED" }, "ports": { "TCK": { "direction": "input", "bits": [ 2 ] }, "TMS": { "direction": "input", "bits": [ 3 ] }, "TDI": { "direction": "input", "bits": [ 4 ] }, "JTDO2": { "direction": "input", "bits": [ 5 ] }, "JTDO1": { "direction": "input", "bits": [ 6 ] }, "TDO": { "direction": "output", "bits": [ 7 ] }, "JTDI": { "direction": "output", "bits": [ 8 ] }, "JTCK": { "direction": "output", "bits": [ 9 ] }, "JRTI2": { "direction": "output", "bits": [ 10 ] }, "JRTI1": { "direction": "output", "bits": [ 11 ] }, "JSHIFT": { "direction": "output", "bits": [ 12 ] }, "JUPDATE": { "direction": "output", "bits": [ 13 ] }, "JRSTN": { "direction": "output", "bits": [ 14 ] }, "JCE2": { "direction": "output", "bits": [ 15 ] }, "JCE1": { "direction": "output", "bits": [ 16 ] } }, "cells": { }, "netnames": { "JCE1": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:170.39-170.43" } }, "JCE2": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:170.33-170.37" } }, "JRSTN": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:170.26-170.31" } }, "JRTI1": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:169.33-169.38" } }, "JRTI2": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:169.26-169.31" } }, "JSHIFT": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:170.9-170.15" } }, "JTCK": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:169.20-169.24" } }, "JTDI": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:169.14-169.18" } }, "JTDO1": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:168.30-168.35" } }, "JTDO2": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:168.23-168.28" } }, "JUPDATE": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:170.17-170.24" } }, "TCK": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:168.8-168.11" } }, "TDI": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:168.18-168.21" } }, "TDO": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:169.9-169.12" } }, "TMS": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:168.13-168.16" } } } }, "L6MUX21": { "attributes": { "abc9_box": "00000000000000000000000000000001", "whitebox": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:65.1-72.10" }, "ports": { "D0": { "direction": "input", "bits": [ 2 ] }, "D1": { "direction": "input", "bits": [ 3 ] }, "SD": { "direction": "input", "bits": [ 4 ] }, "Z": { "direction": "output", "bits": [ 5 ] } }, "cells": { "$specify$222": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010001100", "T_FALL_MIN": "00000000000000000000000010001100", "T_FALL_TYP": "00000000000000000000000010001100", "T_RISE_MAX": "00000000000000000000000010001100", "T_RISE_MIN": "00000000000000000000000010001100", "T_RISE_TYP": "00000000000000000000000010001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:68.3-68.19" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 5 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$specify$223": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010001101", "T_FALL_MIN": "00000000000000000000000010001101", "T_FALL_TYP": "00000000000000000000000010001101", "T_RISE_MAX": "00000000000000000000000010001101", "T_RISE_MIN": "00000000000000000000000010001101", "T_RISE_TYP": "00000000000000000000000010001101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:69.3-69.19" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 5 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$224": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010010100", "T_FALL_MIN": "00000000000000000000000010010100", "T_FALL_TYP": "00000000000000000000000010010100", "T_RISE_MAX": "00000000000000000000000010010100", "T_RISE_MIN": "00000000000000000000000010010100", "T_RISE_TYP": "00000000000000000000000010010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:70.3-70.19" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 5 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:66$267": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:66.13-66.25" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ 2 ], "B": [ 3 ], "S": [ 4 ], "Y": [ 5 ] } } }, "netnames": { "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:66$267_Y": { "hide_name": 1, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:66.13-66.25" } }, "D0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:65.23-65.25" } }, "D1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:65.27-65.29" } }, "SD": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:65.31-65.33" } }, "Z": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:65.42-65.43" } } } }, "LUT2": { "attributes": { "whitebox": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:300.1-304.10" }, "parameter_default_values": { "INIT": "0000" }, "ports": { "A": { "direction": "input", "bits": [ 2 ] }, "B": { "direction": "input", "bits": [ 3 ] }, "Z": { "direction": "output", "bits": [ 4 ] } }, "cells": { "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:302$423": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000010" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:302.21-302.55" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ "0", "0" ], "B": [ "0", "0" ], "S": [ 3 ], "Y": [ 5, 6 ] } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:303$424": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:303.21-303.55" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ 5 ], "B": [ 6 ], "S": [ 2 ], "Y": [ 4 ] } } }, "netnames": { "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:302$423_Y": { "hide_name": 1, "bits": [ 5, 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:302.21-302.55" } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:303$424_Y": { "hide_name": 1, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:303.21-303.55" } }, "A": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:300.19-300.20" } }, "B": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:300.22-300.23" } }, "Z": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:300.32-300.33" } }, "s1": { "hide_name": 0, "bits": [ 5, 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:302.16-302.18" } } } }, "LUT4": { "attributes": { "abc9_lut": "00000000000000000000000000000001", "whitebox": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:4.1-16.10" }, "parameter_default_values": { "INIT": "0000000000000000" }, "ports": { "A": { "direction": "input", "bits": [ 2 ] }, "B": { "direction": "input", "bits": [ 3 ] }, "C": { "direction": "input", "bits": [ 4 ] }, "D": { "direction": "input", "bits": [ 5 ] }, "Z": { "direction": "output", "bits": [ 6 ] } }, "cells": { "$specify$200": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010001101", "T_FALL_MIN": "00000000000000000000000010001101", "T_FALL_TYP": "00000000000000000000000010001101", "T_RISE_MAX": "00000000000000000000000010001101", "T_RISE_MIN": "00000000000000000000000010001101", "T_RISE_TYP": "00000000000000000000000010001101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:11.9-11.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 6 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$specify$201": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000100010011", "T_FALL_MIN": "00000000000000000000000100010011", "T_FALL_TYP": "00000000000000000000000100010011", "T_RISE_MAX": "00000000000000000000000100010011", "T_RISE_MIN": "00000000000000000000000100010011", "T_RISE_TYP": "00000000000000000000000100010011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:12.9-12.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 6 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$202": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000101111011", "T_FALL_MIN": "00000000000000000000000101111011", "T_FALL_TYP": "00000000000000000000000101111011", "T_RISE_MAX": "00000000000000000000000101111011", "T_RISE_MIN": "00000000000000000000000101111011", "T_RISE_TYP": "00000000000000000000000101111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:13.9-13.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 6 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$specify$203": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000101111011", "T_FALL_MIN": "00000000000000000000000101111011", "T_FALL_TYP": "00000000000000000000000101111011", "T_RISE_MAX": "00000000000000000000000101111011", "T_RISE_MIN": "00000000000000000000000101111011", "T_RISE_TYP": "00000000000000000000000101111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:14.9-14.24" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 6 ], "EN": [ "1" ], "SRC": [ 5 ] } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:6$263": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000001000" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:6.21-6.55" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ "0", "0", "0", "0", "0", "0", "0", "0" ], "B": [ "0", "0", "0", "0", "0", "0", "0", "0" ], "S": [ 5 ], "Y": [ 7, 8, 9, 10, 11, 12, 13, 14 ] } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:7$264": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:7.21-7.55" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ 7, 8, 9, 10 ], "B": [ 11, 12, 13, 14 ], "S": [ 4 ], "Y": [ 15, 16, 17, 18 ] } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:8$265": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000010" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:8.21-8.55" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ 15, 16 ], "B": [ 17, 18 ], "S": [ 3 ], "Y": [ 19, 20 ] } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:9$266": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:9.21-9.55" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ 19 ], "B": [ 20 ], "S": [ 2 ], "Y": [ 6 ] } } }, "netnames": { "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:6$263_Y": { "hide_name": 1, "bits": [ 7, 8, 9, 10, 11, 12, 13, 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:6.21-6.55" } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:7$264_Y": { "hide_name": 1, "bits": [ 15, 16, 17, 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:7.21-7.55" } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:8$265_Y": { "hide_name": 1, "bits": [ 19, 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:8.21-8.55" } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:9$266_Y": { "hide_name": 1, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:9.21-9.55" } }, "A": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:4.19-4.20" } }, "B": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:4.22-4.23" } }, "C": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:4.25-4.26" } }, "D": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:4.28-4.29" } }, "Z": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:4.38-4.39" } }, "s1": { "hide_name": 0, "bits": [ 19, 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:8.16-8.18" } }, "s2": { "hide_name": 0, "bits": [ 15, 16, 17, 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:7.16-7.18" } }, "s3": { "hide_name": 0, "bits": [ 7, 8, 9, 10, 11, 12, 13, 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:6.16-6.18" } } } }, "MULT18X18D": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:5.1-41.10" }, "parameter_default_values": { "CLK0_DIV": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "CLK1_DIV": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "CLK2_DIV": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "CLK3_DIV": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "GSR": "00000000000000000000000000000000000000000000000000000000000000000000000001000101010011100100000101000010010011000100010101000100", "REG_INPUTA_CE": "CE0", "REG_INPUTA_CLK": "NONE", "REG_INPUTA_RST": "RST0", "REG_INPUTB_CE": "CE0", "REG_INPUTB_CLK": "NONE", "REG_INPUTB_RST": "RST0", "REG_INPUTC_CLK": "NONE", "REG_OUTPUT_CLK": "NONE", "REG_PIPELINE_CE": "CE0", "REG_PIPELINE_CLK": "NONE", "REG_PIPELINE_RST": "RST0", "RESETMODE": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010011010110010100111001000011", "SOURCEB_MODE": "00000000000000000000000000000000000000000000000000000000000000000000000001000010010111110101001101001000010010010100011001010100" }, "ports": { "A0": { "direction": "input", "bits": [ 2 ] }, "A1": { "direction": "input", "bits": [ 3 ] }, "A2": { "direction": "input", "bits": [ 4 ] }, "A3": { "direction": "input", "bits": [ 5 ] }, "A4": { "direction": "input", "bits": [ 6 ] }, "A5": { "direction": "input", "bits": [ 7 ] }, "A6": { "direction": "input", "bits": [ 8 ] }, "A7": { "direction": "input", "bits": [ 9 ] }, "A8": { "direction": "input", "bits": [ 10 ] }, "A9": { "direction": "input", "bits": [ 11 ] }, "A10": { "direction": "input", "bits": [ 12 ] }, "A11": { "direction": "input", "bits": [ 13 ] }, "A12": { "direction": "input", "bits": [ 14 ] }, "A13": { "direction": "input", "bits": [ 15 ] }, "A14": { "direction": "input", "bits": [ 16 ] }, "A15": { "direction": "input", "bits": [ 17 ] }, "A16": { "direction": "input", "bits": [ 18 ] }, "A17": { "direction": "input", "bits": [ 19 ] }, "B0": { "direction": "input", "bits": [ 20 ] }, "B1": { "direction": "input", "bits": [ 21 ] }, "B2": { "direction": "input", "bits": [ 22 ] }, "B3": { "direction": "input", "bits": [ 23 ] }, "B4": { "direction": "input", "bits": [ 24 ] }, "B5": { "direction": "input", "bits": [ 25 ] }, "B6": { "direction": "input", "bits": [ 26 ] }, "B7": { "direction": "input", "bits": [ 27 ] }, "B8": { "direction": "input", "bits": [ 28 ] }, "B9": { "direction": "input", "bits": [ 29 ] }, "B10": { "direction": "input", "bits": [ 30 ] }, "B11": { "direction": "input", "bits": [ 31 ] }, "B12": { "direction": "input", "bits": [ 32 ] }, "B13": { "direction": "input", "bits": [ 33 ] }, "B14": { "direction": "input", "bits": [ 34 ] }, "B15": { "direction": "input", "bits": [ 35 ] }, "B16": { "direction": "input", "bits": [ 36 ] }, "B17": { "direction": "input", "bits": [ 37 ] }, "C0": { "direction": "input", "bits": [ 38 ] }, "C1": { "direction": "input", "bits": [ 39 ] }, "C2": { "direction": "input", "bits": [ 40 ] }, "C3": { "direction": "input", "bits": [ 41 ] }, "C4": { "direction": "input", "bits": [ 42 ] }, "C5": { "direction": "input", "bits": [ 43 ] }, "C6": { "direction": "input", "bits": [ 44 ] }, "C7": { "direction": "input", "bits": [ 45 ] }, "C8": { "direction": "input", "bits": [ 46 ] }, "C9": { "direction": "input", "bits": [ 47 ] }, "C10": { "direction": "input", "bits": [ 48 ] }, "C11": { "direction": "input", "bits": [ 49 ] }, "C12": { "direction": "input", "bits": [ 50 ] }, "C13": { "direction": "input", "bits": [ 51 ] }, "C14": { "direction": "input", "bits": [ 52 ] }, "C15": { "direction": "input", "bits": [ 53 ] }, "C16": { "direction": "input", "bits": [ 54 ] }, "C17": { "direction": "input", "bits": [ 55 ] }, "SIGNEDA": { "direction": "input", "bits": [ 56 ] }, "SIGNEDB": { "direction": "input", "bits": [ 57 ] }, "SOURCEA": { "direction": "input", "bits": [ 58 ] }, "SOURCEB": { "direction": "input", "bits": [ 59 ] }, "CLK0": { "direction": "input", "bits": [ 60 ] }, "CLK1": { "direction": "input", "bits": [ 61 ] }, "CLK2": { "direction": "input", "bits": [ 62 ] }, "CLK3": { "direction": "input", "bits": [ 63 ] }, "CE0": { "direction": "input", "bits": [ 64 ] }, "CE1": { "direction": "input", "bits": [ 65 ] }, "CE2": { "direction": "input", "bits": [ 66 ] }, "CE3": { "direction": "input", "bits": [ 67 ] }, "RST0": { "direction": "input", "bits": [ 68 ] }, "RST1": { "direction": "input", "bits": [ 69 ] }, "RST2": { "direction": "input", "bits": [ 70 ] }, "RST3": { "direction": "input", "bits": [ 71 ] }, "SRIA0": { "direction": "input", "bits": [ 72 ] }, "SRIA1": { "direction": "input", "bits": [ 73 ] }, "SRIA2": { "direction": "input", "bits": [ 74 ] }, "SRIA3": { "direction": "input", "bits": [ 75 ] }, "SRIA4": { "direction": "input", "bits": [ 76 ] }, "SRIA5": { "direction": "input", "bits": [ 77 ] }, "SRIA6": { "direction": "input", "bits": [ 78 ] }, "SRIA7": { "direction": "input", "bits": [ 79 ] }, "SRIA8": { "direction": "input", "bits": [ 80 ] }, "SRIA9": { "direction": "input", "bits": [ 81 ] }, "SRIA10": { "direction": "input", "bits": [ 82 ] }, "SRIA11": { "direction": "input", "bits": [ 83 ] }, "SRIA12": { "direction": "input", "bits": [ 84 ] }, "SRIA13": { "direction": "input", "bits": [ 85 ] }, "SRIA14": { "direction": "input", "bits": [ 86 ] }, "SRIA15": { "direction": "input", "bits": [ 87 ] }, "SRIA16": { "direction": "input", "bits": [ 88 ] }, "SRIA17": { "direction": "input", "bits": [ 89 ] }, "SRIB0": { "direction": "input", "bits": [ 90 ] }, "SRIB1": { "direction": "input", "bits": [ 91 ] }, "SRIB2": { "direction": "input", "bits": [ 92 ] }, "SRIB3": { "direction": "input", "bits": [ 93 ] }, "SRIB4": { "direction": "input", "bits": [ 94 ] }, "SRIB5": { "direction": "input", "bits": [ 95 ] }, "SRIB6": { "direction": "input", "bits": [ 96 ] }, "SRIB7": { "direction": "input", "bits": [ 97 ] }, "SRIB8": { "direction": "input", "bits": [ 98 ] }, "SRIB9": { "direction": "input", "bits": [ 99 ] }, "SRIB10": { "direction": "input", "bits": [ 100 ] }, "SRIB11": { "direction": "input", "bits": [ 101 ] }, "SRIB12": { "direction": "input", "bits": [ 102 ] }, "SRIB13": { "direction": "input", "bits": [ 103 ] }, "SRIB14": { "direction": "input", "bits": [ 104 ] }, "SRIB15": { "direction": "input", "bits": [ 105 ] }, "SRIB16": { "direction": "input", "bits": [ 106 ] }, "SRIB17": { "direction": "input", "bits": [ 107 ] }, "SROA0": { "direction": "output", "bits": [ 108 ] }, "SROA1": { "direction": "output", "bits": [ 109 ] }, "SROA2": { "direction": "output", "bits": [ 110 ] }, "SROA3": { "direction": "output", "bits": [ 111 ] }, "SROA4": { "direction": "output", "bits": [ 112 ] }, "SROA5": { "direction": "output", "bits": [ 113 ] }, "SROA6": { "direction": "output", "bits": [ 114 ] }, "SROA7": { "direction": "output", "bits": [ 115 ] }, "SROA8": { "direction": "output", "bits": [ 116 ] }, "SROA9": { "direction": "output", "bits": [ 117 ] }, "SROA10": { "direction": "output", "bits": [ 118 ] }, "SROA11": { "direction": "output", "bits": [ 119 ] }, "SROA12": { "direction": "output", "bits": [ 120 ] }, "SROA13": { "direction": "output", "bits": [ 121 ] }, "SROA14": { "direction": "output", "bits": [ 122 ] }, "SROA15": { "direction": "output", "bits": [ 123 ] }, "SROA16": { "direction": "output", "bits": [ 124 ] }, "SROA17": { "direction": "output", "bits": [ 125 ] }, "SROB0": { "direction": "output", "bits": [ 126 ] }, "SROB1": { "direction": "output", "bits": [ 127 ] }, "SROB2": { "direction": "output", "bits": [ 128 ] }, "SROB3": { "direction": "output", "bits": [ 129 ] }, "SROB4": { "direction": "output", "bits": [ 130 ] }, "SROB5": { "direction": "output", "bits": [ 131 ] }, "SROB6": { "direction": "output", "bits": [ 132 ] }, "SROB7": { "direction": "output", "bits": [ 133 ] }, "SROB8": { "direction": "output", "bits": [ 134 ] }, "SROB9": { "direction": "output", "bits": [ 135 ] }, "SROB10": { "direction": "output", "bits": [ 136 ] }, "SROB11": { "direction": "output", "bits": [ 137 ] }, "SROB12": { "direction": "output", "bits": [ 138 ] }, "SROB13": { "direction": "output", "bits": [ 139 ] }, "SROB14": { "direction": "output", "bits": [ 140 ] }, "SROB15": { "direction": "output", "bits": [ 141 ] }, "SROB16": { "direction": "output", "bits": [ 142 ] }, "SROB17": { "direction": "output", "bits": [ 143 ] }, "ROA0": { "direction": "output", "bits": [ 144 ] }, "ROA1": { "direction": "output", "bits": [ 145 ] }, "ROA2": { "direction": "output", "bits": [ 146 ] }, "ROA3": { "direction": "output", "bits": [ 147 ] }, "ROA4": { "direction": "output", "bits": [ 148 ] }, "ROA5": { "direction": "output", "bits": [ 149 ] }, "ROA6": { "direction": "output", "bits": [ 150 ] }, "ROA7": { "direction": "output", "bits": [ 151 ] }, "ROA8": { "direction": "output", "bits": [ 152 ] }, "ROA9": { "direction": "output", "bits": [ 153 ] }, "ROA10": { "direction": "output", "bits": [ 154 ] }, "ROA11": { "direction": "output", "bits": [ 155 ] }, "ROA12": { "direction": "output", "bits": [ 156 ] }, "ROA13": { "direction": "output", "bits": [ 157 ] }, "ROA14": { "direction": "output", "bits": [ 158 ] }, "ROA15": { "direction": "output", "bits": [ 159 ] }, "ROA16": { "direction": "output", "bits": [ 160 ] }, "ROA17": { "direction": "output", "bits": [ 161 ] }, "ROB0": { "direction": "output", "bits": [ 162 ] }, "ROB1": { "direction": "output", "bits": [ 163 ] }, "ROB2": { "direction": "output", "bits": [ 164 ] }, "ROB3": { "direction": "output", "bits": [ 165 ] }, "ROB4": { "direction": "output", "bits": [ 166 ] }, "ROB5": { "direction": "output", "bits": [ 167 ] }, "ROB6": { "direction": "output", "bits": [ 168 ] }, "ROB7": { "direction": "output", "bits": [ 169 ] }, "ROB8": { "direction": "output", "bits": [ 170 ] }, "ROB9": { "direction": "output", "bits": [ 171 ] }, "ROB10": { "direction": "output", "bits": [ 172 ] }, "ROB11": { "direction": "output", "bits": [ 173 ] }, "ROB12": { "direction": "output", "bits": [ 174 ] }, "ROB13": { "direction": "output", "bits": [ 175 ] }, "ROB14": { "direction": "output", "bits": [ 176 ] }, "ROB15": { "direction": "output", "bits": [ 177 ] }, "ROB16": { "direction": "output", "bits": [ 178 ] }, "ROB17": { "direction": "output", "bits": [ 179 ] }, "ROC0": { "direction": "output", "bits": [ 180 ] }, "ROC1": { "direction": "output", "bits": [ 181 ] }, "ROC2": { "direction": "output", "bits": [ 182 ] }, "ROC3": { "direction": "output", "bits": [ 183 ] }, "ROC4": { "direction": "output", "bits": [ 184 ] }, "ROC5": { "direction": "output", "bits": [ 185 ] }, "ROC6": { "direction": "output", "bits": [ 186 ] }, "ROC7": { "direction": "output", "bits": [ 187 ] }, "ROC8": { "direction": "output", "bits": [ 188 ] }, "ROC9": { "direction": "output", "bits": [ 189 ] }, "ROC10": { "direction": "output", "bits": [ 190 ] }, "ROC11": { "direction": "output", "bits": [ 191 ] }, "ROC12": { "direction": "output", "bits": [ 192 ] }, "ROC13": { "direction": "output", "bits": [ 193 ] }, "ROC14": { "direction": "output", "bits": [ 194 ] }, "ROC15": { "direction": "output", "bits": [ 195 ] }, "ROC16": { "direction": "output", "bits": [ 196 ] }, "ROC17": { "direction": "output", "bits": [ 197 ] }, "P0": { "direction": "output", "bits": [ 198 ] }, "P1": { "direction": "output", "bits": [ 199 ] }, "P2": { "direction": "output", "bits": [ 200 ] }, "P3": { "direction": "output", "bits": [ 201 ] }, "P4": { "direction": "output", "bits": [ 202 ] }, "P5": { "direction": "output", "bits": [ 203 ] }, "P6": { "direction": "output", "bits": [ 204 ] }, "P7": { "direction": "output", "bits": [ 205 ] }, "P8": { "direction": "output", "bits": [ 206 ] }, "P9": { "direction": "output", "bits": [ 207 ] }, "P10": { "direction": "output", "bits": [ 208 ] }, "P11": { "direction": "output", "bits": [ 209 ] }, "P12": { "direction": "output", "bits": [ 210 ] }, "P13": { "direction": "output", "bits": [ 211 ] }, "P14": { "direction": "output", "bits": [ 212 ] }, "P15": { "direction": "output", "bits": [ 213 ] }, "P16": { "direction": "output", "bits": [ 214 ] }, "P17": { "direction": "output", "bits": [ 215 ] }, "P18": { "direction": "output", "bits": [ 216 ] }, "P19": { "direction": "output", "bits": [ 217 ] }, "P20": { "direction": "output", "bits": [ 218 ] }, "P21": { "direction": "output", "bits": [ 219 ] }, "P22": { "direction": "output", "bits": [ 220 ] }, "P23": { "direction": "output", "bits": [ 221 ] }, "P24": { "direction": "output", "bits": [ 222 ] }, "P25": { "direction": "output", "bits": [ 223 ] }, "P26": { "direction": "output", "bits": [ 224 ] }, "P27": { "direction": "output", "bits": [ 225 ] }, "P28": { "direction": "output", "bits": [ 226 ] }, "P29": { "direction": "output", "bits": [ 227 ] }, "P30": { "direction": "output", "bits": [ 228 ] }, "P31": { "direction": "output", "bits": [ 229 ] }, "P32": { "direction": "output", "bits": [ 230 ] }, "P33": { "direction": "output", "bits": [ 231 ] }, "P34": { "direction": "output", "bits": [ 232 ] }, "P35": { "direction": "output", "bits": [ 233 ] }, "SIGNEDP": { "direction": "output", "bits": [ 234 ] } }, "cells": { }, "netnames": { "A0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.8-6.10" } }, "A1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.12-6.14" } }, "A10": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.48-6.51" } }, "A11": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.53-6.56" } }, "A12": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.58-6.61" } }, "A13": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.63-6.66" } }, "A14": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.68-6.71" } }, "A15": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.73-6.76" } }, "A16": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.78-6.81" } }, "A17": { "hide_name": 0, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.83-6.86" } }, "A2": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.16-6.18" } }, "A3": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.20-6.22" } }, "A4": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.24-6.26" } }, "A5": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.28-6.30" } }, "A6": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.32-6.34" } }, "A7": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.36-6.38" } }, "A8": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.40-6.42" } }, "A9": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:6.44-6.46" } }, "B0": { "hide_name": 0, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.8-7.10" } }, "B1": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.12-7.14" } }, "B10": { "hide_name": 0, "bits": [ 30 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.48-7.51" } }, "B11": { "hide_name": 0, "bits": [ 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.53-7.56" } }, "B12": { "hide_name": 0, "bits": [ 32 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.58-7.61" } }, "B13": { "hide_name": 0, "bits": [ 33 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.63-7.66" } }, "B14": { "hide_name": 0, "bits": [ 34 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.68-7.71" } }, "B15": { "hide_name": 0, "bits": [ 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.73-7.76" } }, "B16": { "hide_name": 0, "bits": [ 36 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.78-7.81" } }, "B17": { "hide_name": 0, "bits": [ 37 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.83-7.86" } }, "B2": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.16-7.18" } }, "B3": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.20-7.22" } }, "B4": { "hide_name": 0, "bits": [ 24 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.24-7.26" } }, "B5": { "hide_name": 0, "bits": [ 25 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.28-7.30" } }, "B6": { "hide_name": 0, "bits": [ 26 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.32-7.34" } }, "B7": { "hide_name": 0, "bits": [ 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.36-7.38" } }, "B8": { "hide_name": 0, "bits": [ 28 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.40-7.42" } }, "B9": { "hide_name": 0, "bits": [ 29 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:7.44-7.46" } }, "C0": { "hide_name": 0, "bits": [ 38 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.8-8.10" } }, "C1": { "hide_name": 0, "bits": [ 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.12-8.14" } }, "C10": { "hide_name": 0, "bits": [ 48 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.48-8.51" } }, "C11": { "hide_name": 0, "bits": [ 49 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.53-8.56" } }, "C12": { "hide_name": 0, "bits": [ 50 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.58-8.61" } }, "C13": { "hide_name": 0, "bits": [ 51 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.63-8.66" } }, "C14": { "hide_name": 0, "bits": [ 52 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.68-8.71" } }, "C15": { "hide_name": 0, "bits": [ 53 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.73-8.76" } }, "C16": { "hide_name": 0, "bits": [ 54 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.78-8.81" } }, "C17": { "hide_name": 0, "bits": [ 55 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.83-8.86" } }, "C2": { "hide_name": 0, "bits": [ 40 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.16-8.18" } }, "C3": { "hide_name": 0, "bits": [ 41 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.20-8.22" } }, "C4": { "hide_name": 0, "bits": [ 42 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.24-8.26" } }, "C5": { "hide_name": 0, "bits": [ 43 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.28-8.30" } }, "C6": { "hide_name": 0, "bits": [ 44 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.32-8.34" } }, "C7": { "hide_name": 0, "bits": [ 45 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.36-8.38" } }, "C8": { "hide_name": 0, "bits": [ 46 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.40-8.42" } }, "C9": { "hide_name": 0, "bits": [ 47 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:8.44-8.46" } }, "CE0": { "hide_name": 0, "bits": [ 64 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:11.8-11.11" } }, "CE1": { "hide_name": 0, "bits": [ 65 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:11.13-11.16" } }, "CE2": { "hide_name": 0, "bits": [ 66 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:11.18-11.21" } }, "CE3": { "hide_name": 0, "bits": [ 67 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:11.23-11.26" } }, "CLK0": { "hide_name": 0, "bits": [ 60 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:10.8-10.12" } }, "CLK1": { "hide_name": 0, "bits": [ 61 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:10.14-10.18" } }, "CLK2": { "hide_name": 0, "bits": [ 62 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:10.20-10.24" } }, "CLK3": { "hide_name": 0, "bits": [ 63 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:10.26-10.30" } }, "P0": { "hide_name": 0, "bits": [ 198 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.9-20.11" } }, "P1": { "hide_name": 0, "bits": [ 199 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.13-20.15" } }, "P10": { "hide_name": 0, "bits": [ 208 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.49-20.52" } }, "P11": { "hide_name": 0, "bits": [ 209 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.54-20.57" } }, "P12": { "hide_name": 0, "bits": [ 210 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.59-20.62" } }, "P13": { "hide_name": 0, "bits": [ 211 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.64-20.67" } }, "P14": { "hide_name": 0, "bits": [ 212 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.69-20.72" } }, "P15": { "hide_name": 0, "bits": [ 213 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.74-20.77" } }, "P16": { "hide_name": 0, "bits": [ 214 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.79-20.82" } }, "P17": { "hide_name": 0, "bits": [ 215 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.84-20.87" } }, "P18": { "hide_name": 0, "bits": [ 216 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.89-20.92" } }, "P19": { "hide_name": 0, "bits": [ 217 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.94-20.97" } }, "P2": { "hide_name": 0, "bits": [ 200 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.17-20.19" } }, "P20": { "hide_name": 0, "bits": [ 218 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.99-20.102" } }, "P21": { "hide_name": 0, "bits": [ 219 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.104-20.107" } }, "P22": { "hide_name": 0, "bits": [ 220 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.109-20.112" } }, "P23": { "hide_name": 0, "bits": [ 221 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.114-20.117" } }, "P24": { "hide_name": 0, "bits": [ 222 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.119-20.122" } }, "P25": { "hide_name": 0, "bits": [ 223 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.124-20.127" } }, "P26": { "hide_name": 0, "bits": [ 224 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.129-20.132" } }, "P27": { "hide_name": 0, "bits": [ 225 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.134-20.137" } }, "P28": { "hide_name": 0, "bits": [ 226 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.139-20.142" } }, "P29": { "hide_name": 0, "bits": [ 227 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.144-20.147" } }, "P3": { "hide_name": 0, "bits": [ 201 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.21-20.23" } }, "P30": { "hide_name": 0, "bits": [ 228 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.149-20.152" } }, "P31": { "hide_name": 0, "bits": [ 229 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.154-20.157" } }, "P32": { "hide_name": 0, "bits": [ 230 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.159-20.162" } }, "P33": { "hide_name": 0, "bits": [ 231 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.164-20.167" } }, "P34": { "hide_name": 0, "bits": [ 232 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.169-20.172" } }, "P35": { "hide_name": 0, "bits": [ 233 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.174-20.177" } }, "P4": { "hide_name": 0, "bits": [ 202 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.25-20.27" } }, "P5": { "hide_name": 0, "bits": [ 203 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.29-20.31" } }, "P6": { "hide_name": 0, "bits": [ 204 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.33-20.35" } }, "P7": { "hide_name": 0, "bits": [ 205 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.37-20.39" } }, "P8": { "hide_name": 0, "bits": [ 206 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.41-20.43" } }, "P9": { "hide_name": 0, "bits": [ 207 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:20.45-20.47" } }, "ROA0": { "hide_name": 0, "bits": [ 144 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.9-17.13" } }, "ROA1": { "hide_name": 0, "bits": [ 145 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.15-17.19" } }, "ROA10": { "hide_name": 0, "bits": [ 154 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.69-17.74" } }, "ROA11": { "hide_name": 0, "bits": [ 155 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.76-17.81" } }, "ROA12": { "hide_name": 0, "bits": [ 156 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.83-17.88" } }, "ROA13": { "hide_name": 0, "bits": [ 157 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.90-17.95" } }, "ROA14": { "hide_name": 0, "bits": [ 158 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.97-17.102" } }, "ROA15": { "hide_name": 0, "bits": [ 159 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.104-17.109" } }, "ROA16": { "hide_name": 0, "bits": [ 160 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.111-17.116" } }, "ROA17": { "hide_name": 0, "bits": [ 161 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.118-17.123" } }, "ROA2": { "hide_name": 0, "bits": [ 146 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.21-17.25" } }, "ROA3": { "hide_name": 0, "bits": [ 147 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.27-17.31" } }, "ROA4": { "hide_name": 0, "bits": [ 148 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.33-17.37" } }, "ROA5": { "hide_name": 0, "bits": [ 149 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.39-17.43" } }, "ROA6": { "hide_name": 0, "bits": [ 150 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.45-17.49" } }, "ROA7": { "hide_name": 0, "bits": [ 151 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.51-17.55" } }, "ROA8": { "hide_name": 0, "bits": [ 152 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.57-17.61" } }, "ROA9": { "hide_name": 0, "bits": [ 153 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:17.63-17.67" } }, "ROB0": { "hide_name": 0, "bits": [ 162 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.9-18.13" } }, "ROB1": { "hide_name": 0, "bits": [ 163 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.15-18.19" } }, "ROB10": { "hide_name": 0, "bits": [ 172 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.69-18.74" } }, "ROB11": { "hide_name": 0, "bits": [ 173 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.76-18.81" } }, "ROB12": { "hide_name": 0, "bits": [ 174 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.83-18.88" } }, "ROB13": { "hide_name": 0, "bits": [ 175 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.90-18.95" } }, "ROB14": { "hide_name": 0, "bits": [ 176 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.97-18.102" } }, "ROB15": { "hide_name": 0, "bits": [ 177 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.104-18.109" } }, "ROB16": { "hide_name": 0, "bits": [ 178 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.111-18.116" } }, "ROB17": { "hide_name": 0, "bits": [ 179 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.118-18.123" } }, "ROB2": { "hide_name": 0, "bits": [ 164 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.21-18.25" } }, "ROB3": { "hide_name": 0, "bits": [ 165 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.27-18.31" } }, "ROB4": { "hide_name": 0, "bits": [ 166 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.33-18.37" } }, "ROB5": { "hide_name": 0, "bits": [ 167 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.39-18.43" } }, "ROB6": { "hide_name": 0, "bits": [ 168 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.45-18.49" } }, "ROB7": { "hide_name": 0, "bits": [ 169 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.51-18.55" } }, "ROB8": { "hide_name": 0, "bits": [ 170 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.57-18.61" } }, "ROB9": { "hide_name": 0, "bits": [ 171 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:18.63-18.67" } }, "ROC0": { "hide_name": 0, "bits": [ 180 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.9-19.13" } }, "ROC1": { "hide_name": 0, "bits": [ 181 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.15-19.19" } }, "ROC10": { "hide_name": 0, "bits": [ 190 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.69-19.74" } }, "ROC11": { "hide_name": 0, "bits": [ 191 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.76-19.81" } }, "ROC12": { "hide_name": 0, "bits": [ 192 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.83-19.88" } }, "ROC13": { "hide_name": 0, "bits": [ 193 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.90-19.95" } }, "ROC14": { "hide_name": 0, "bits": [ 194 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.97-19.102" } }, "ROC15": { "hide_name": 0, "bits": [ 195 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.104-19.109" } }, "ROC16": { "hide_name": 0, "bits": [ 196 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.111-19.116" } }, "ROC17": { "hide_name": 0, "bits": [ 197 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.118-19.123" } }, "ROC2": { "hide_name": 0, "bits": [ 182 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.21-19.25" } }, "ROC3": { "hide_name": 0, "bits": [ 183 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.27-19.31" } }, "ROC4": { "hide_name": 0, "bits": [ 184 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.33-19.37" } }, "ROC5": { "hide_name": 0, "bits": [ 185 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.39-19.43" } }, "ROC6": { "hide_name": 0, "bits": [ 186 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.45-19.49" } }, "ROC7": { "hide_name": 0, "bits": [ 187 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.51-19.55" } }, "ROC8": { "hide_name": 0, "bits": [ 188 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.57-19.61" } }, "ROC9": { "hide_name": 0, "bits": [ 189 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:19.63-19.67" } }, "RST0": { "hide_name": 0, "bits": [ 68 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:12.8-12.12" } }, "RST1": { "hide_name": 0, "bits": [ 69 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:12.14-12.18" } }, "RST2": { "hide_name": 0, "bits": [ 70 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:12.20-12.24" } }, "RST3": { "hide_name": 0, "bits": [ 71 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:12.26-12.30" } }, "SIGNEDA": { "hide_name": 0, "bits": [ 56 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:9.8-9.15" } }, "SIGNEDB": { "hide_name": 0, "bits": [ 57 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:9.17-9.24" } }, "SIGNEDP": { "hide_name": 0, "bits": [ 234 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:21.9-21.16" } }, "SOURCEA": { "hide_name": 0, "bits": [ 58 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:9.26-9.33" } }, "SOURCEB": { "hide_name": 0, "bits": [ 59 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:9.35-9.42" } }, "SRIA0": { "hide_name": 0, "bits": [ 72 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.8-13.13" } }, "SRIA1": { "hide_name": 0, "bits": [ 73 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.15-13.20" } }, "SRIA10": { "hide_name": 0, "bits": [ 82 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.78-13.84" } }, "SRIA11": { "hide_name": 0, "bits": [ 83 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.86-13.92" } }, "SRIA12": { "hide_name": 0, "bits": [ 84 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.94-13.100" } }, "SRIA13": { "hide_name": 0, "bits": [ 85 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.102-13.108" } }, "SRIA14": { "hide_name": 0, "bits": [ 86 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.110-13.116" } }, "SRIA15": { "hide_name": 0, "bits": [ 87 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.118-13.124" } }, "SRIA16": { "hide_name": 0, "bits": [ 88 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.126-13.132" } }, "SRIA17": { "hide_name": 0, "bits": [ 89 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.134-13.140" } }, "SRIA2": { "hide_name": 0, "bits": [ 74 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.22-13.27" } }, "SRIA3": { "hide_name": 0, "bits": [ 75 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.29-13.34" } }, "SRIA4": { "hide_name": 0, "bits": [ 76 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.36-13.41" } }, "SRIA5": { "hide_name": 0, "bits": [ 77 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.43-13.48" } }, "SRIA6": { "hide_name": 0, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.50-13.55" } }, "SRIA7": { "hide_name": 0, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.57-13.62" } }, "SRIA8": { "hide_name": 0, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.64-13.69" } }, "SRIA9": { "hide_name": 0, "bits": [ 81 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:13.71-13.76" } }, "SRIB0": { "hide_name": 0, "bits": [ 90 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.8-14.13" } }, "SRIB1": { "hide_name": 0, "bits": [ 91 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.15-14.20" } }, "SRIB10": { "hide_name": 0, "bits": [ 100 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.78-14.84" } }, "SRIB11": { "hide_name": 0, "bits": [ 101 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.86-14.92" } }, "SRIB12": { "hide_name": 0, "bits": [ 102 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.94-14.100" } }, "SRIB13": { "hide_name": 0, "bits": [ 103 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.102-14.108" } }, "SRIB14": { "hide_name": 0, "bits": [ 104 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.110-14.116" } }, "SRIB15": { "hide_name": 0, "bits": [ 105 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.118-14.124" } }, "SRIB16": { "hide_name": 0, "bits": [ 106 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.126-14.132" } }, "SRIB17": { "hide_name": 0, "bits": [ 107 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.134-14.140" } }, "SRIB2": { "hide_name": 0, "bits": [ 92 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.22-14.27" } }, "SRIB3": { "hide_name": 0, "bits": [ 93 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.29-14.34" } }, "SRIB4": { "hide_name": 0, "bits": [ 94 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.36-14.41" } }, "SRIB5": { "hide_name": 0, "bits": [ 95 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.43-14.48" } }, "SRIB6": { "hide_name": 0, "bits": [ 96 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.50-14.55" } }, "SRIB7": { "hide_name": 0, "bits": [ 97 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.57-14.62" } }, "SRIB8": { "hide_name": 0, "bits": [ 98 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.64-14.69" } }, "SRIB9": { "hide_name": 0, "bits": [ 99 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:14.71-14.76" } }, "SROA0": { "hide_name": 0, "bits": [ 108 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.9-15.14" } }, "SROA1": { "hide_name": 0, "bits": [ 109 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.16-15.21" } }, "SROA10": { "hide_name": 0, "bits": [ 118 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.79-15.85" } }, "SROA11": { "hide_name": 0, "bits": [ 119 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.87-15.93" } }, "SROA12": { "hide_name": 0, "bits": [ 120 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.95-15.101" } }, "SROA13": { "hide_name": 0, "bits": [ 121 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.103-15.109" } }, "SROA14": { "hide_name": 0, "bits": [ 122 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.111-15.117" } }, "SROA15": { "hide_name": 0, "bits": [ 123 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.119-15.125" } }, "SROA16": { "hide_name": 0, "bits": [ 124 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.127-15.133" } }, "SROA17": { "hide_name": 0, "bits": [ 125 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.135-15.141" } }, "SROA2": { "hide_name": 0, "bits": [ 110 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.23-15.28" } }, "SROA3": { "hide_name": 0, "bits": [ 111 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.30-15.35" } }, "SROA4": { "hide_name": 0, "bits": [ 112 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.37-15.42" } }, "SROA5": { "hide_name": 0, "bits": [ 113 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.44-15.49" } }, "SROA6": { "hide_name": 0, "bits": [ 114 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.51-15.56" } }, "SROA7": { "hide_name": 0, "bits": [ 115 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.58-15.63" } }, "SROA8": { "hide_name": 0, "bits": [ 116 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.65-15.70" } }, "SROA9": { "hide_name": 0, "bits": [ 117 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:15.72-15.77" } }, "SROB0": { "hide_name": 0, "bits": [ 126 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.9-16.14" } }, "SROB1": { "hide_name": 0, "bits": [ 127 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.16-16.21" } }, "SROB10": { "hide_name": 0, "bits": [ 136 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.79-16.85" } }, "SROB11": { "hide_name": 0, "bits": [ 137 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.87-16.93" } }, "SROB12": { "hide_name": 0, "bits": [ 138 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.95-16.101" } }, "SROB13": { "hide_name": 0, "bits": [ 139 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.103-16.109" } }, "SROB14": { "hide_name": 0, "bits": [ 140 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.111-16.117" } }, "SROB15": { "hide_name": 0, "bits": [ 141 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.119-16.125" } }, "SROB16": { "hide_name": 0, "bits": [ 142 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.127-16.133" } }, "SROB17": { "hide_name": 0, "bits": [ 143 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.135-16.141" } }, "SROB2": { "hide_name": 0, "bits": [ 128 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.23-16.28" } }, "SROB3": { "hide_name": 0, "bits": [ 129 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.30-16.35" } }, "SROB4": { "hide_name": 0, "bits": [ 130 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.37-16.42" } }, "SROB5": { "hide_name": 0, "bits": [ 131 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.44-16.49" } }, "SROB6": { "hide_name": 0, "bits": [ 132 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.51-16.56" } }, "SROB7": { "hide_name": 0, "bits": [ 133 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.58-16.63" } }, "SROB8": { "hide_name": 0, "bits": [ 134 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.65-16.70" } }, "SROB9": { "hide_name": 0, "bits": [ 135 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:16.72-16.77" } } } }, "OB": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:5.1-5.132" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "O": { "direction": "output", "bits": [ 3 ] } }, "cells": { }, "netnames": { "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:5.20-5.21" } }, "O": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:5.34-5.35" } } } }, "OBCO": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:9.1-9.90" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "OT": { "direction": "output", "bits": [ 3 ] }, "OC": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:9.20-9.21" } }, "OC": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:9.38-9.40" } }, "OT": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:9.34-9.36" } } } }, "OBZ": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:6.1-6.139" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "T": { "direction": "input", "bits": [ 3 ] }, "O": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:6.20-6.21" } }, "O": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:6.34-6.35" } }, "T": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:6.23-6.24" } } } }, "OBZPD": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:8.1-8.139" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "T": { "direction": "input", "bits": [ 3 ] }, "O": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:8.20-8.21" } }, "O": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:8.34-8.35" } }, "T": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:8.23-8.24" } } } }, "OBZPU": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:7.1-7.139" }, "ports": { "I": { "direction": "input", "bits": [ 2 ] }, "T": { "direction": "input", "bits": [ 3 ] }, "O": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "I": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:7.20-7.21" } }, "O": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:7.34-7.35" } }, "T": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:7.23-7.24" } } } }, "ODDR71B": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:244.1-249.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "SCLK": { "direction": "input", "bits": [ 2 ] }, "ECLK": { "direction": "input", "bits": [ 3 ] }, "RST": { "direction": "input", "bits": [ 4 ] }, "D0": { "direction": "input", "bits": [ 5 ] }, "D1": { "direction": "input", "bits": [ 6 ] }, "D2": { "direction": "input", "bits": [ 7 ] }, "D3": { "direction": "input", "bits": [ 8 ] }, "D4": { "direction": "input", "bits": [ 9 ] }, "D5": { "direction": "input", "bits": [ 10 ] }, "D6": { "direction": "input", "bits": [ 11 ] }, "Q": { "direction": "output", "bits": [ 12 ] } }, "cells": { }, "netnames": { "D0": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.25-245.27" } }, "D1": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.29-245.31" } }, "D2": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.33-245.35" } }, "D3": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.37-245.39" } }, "D4": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.41-245.43" } }, "D5": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.45-245.47" } }, "D6": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.49-245.51" } }, "ECLK": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.14-245.18" } }, "Q": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:246.9-246.10" } }, "RST": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.20-245.23" } }, "SCLK": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:245.8-245.12" } } } }, "ODDRX1F": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:228.1-233.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "SCLK": { "direction": "input", "bits": [ 2 ] }, "RST": { "direction": "input", "bits": [ 3 ] }, "D0": { "direction": "input", "bits": [ 4 ] }, "D1": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "D0": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:229.19-229.21" } }, "D1": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:229.23-229.25" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:230.9-230.10" } }, "RST": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:229.14-229.17" } }, "SCLK": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:229.8-229.12" } } } }, "ODDRX2DQA": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:260.1-265.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D0": { "direction": "input", "bits": [ 2 ] }, "D1": { "direction": "input", "bits": [ 3 ] }, "D2": { "direction": "input", "bits": [ 4 ] }, "D3": { "direction": "input", "bits": [ 5 ] }, "RST": { "direction": "input", "bits": [ 6 ] }, "ECLK": { "direction": "input", "bits": [ 7 ] }, "SCLK": { "direction": "input", "bits": [ 8 ] }, "DQSW270": { "direction": "input", "bits": [ 9 ] }, "Q": { "direction": "output", "bits": [ 10 ] } }, "cells": { }, "netnames": { "D0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:261.8-261.10" } }, "D1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:261.12-261.14" } }, "D2": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:261.16-261.18" } }, "D3": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:261.20-261.22" } }, "DQSW270": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:261.41-261.48" } }, "ECLK": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:261.29-261.33" } }, "Q": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:262.9-262.10" } }, "RST": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:261.24-261.27" } }, "SCLK": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:261.35-261.39" } } } }, "ODDRX2DQSB": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:268.1-273.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D0": { "direction": "input", "bits": [ 2 ] }, "D1": { "direction": "input", "bits": [ 3 ] }, "D2": { "direction": "input", "bits": [ 4 ] }, "D3": { "direction": "input", "bits": [ 5 ] }, "RST": { "direction": "input", "bits": [ 6 ] }, "ECLK": { "direction": "input", "bits": [ 7 ] }, "SCLK": { "direction": "input", "bits": [ 8 ] }, "DQSW": { "direction": "input", "bits": [ 9 ] }, "Q": { "direction": "output", "bits": [ 10 ] } }, "cells": { }, "netnames": { "D0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:269.8-269.10" } }, "D1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:269.12-269.14" } }, "D2": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:269.16-269.18" } }, "D3": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:269.20-269.22" } }, "DQSW": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:269.41-269.45" } }, "ECLK": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:269.29-269.33" } }, "Q": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:270.9-270.10" } }, "RST": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:269.24-269.27" } }, "SCLK": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:269.35-269.39" } } } }, "ODDRX2F": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:236.1-241.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "SCLK": { "direction": "input", "bits": [ 2 ] }, "ECLK": { "direction": "input", "bits": [ 3 ] }, "RST": { "direction": "input", "bits": [ 4 ] }, "D0": { "direction": "input", "bits": [ 5 ] }, "D1": { "direction": "input", "bits": [ 6 ] }, "D2": { "direction": "input", "bits": [ 7 ] }, "D3": { "direction": "input", "bits": [ 8 ] }, "Q": { "direction": "output", "bits": [ 9 ] } }, "cells": { }, "netnames": { "D0": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:237.25-237.27" } }, "D1": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:237.29-237.31" } }, "D2": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:237.33-237.35" } }, "D3": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:237.37-237.39" } }, "ECLK": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:237.14-237.18" } }, "Q": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:238.9-238.10" } }, "RST": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:237.20-237.23" } }, "SCLK": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:237.8-237.12" } } } }, "OFS1P3BX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:31.1-31.302" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "PD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:31.27-31.28" } }, "PD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:31.23-31.25" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:31.47-31.48" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:31.34-31.38" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:31.30-31.32" } } } }, "OFS1P3DX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:32.1-32.302" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "CD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "CD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:32.23-32.25" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:32.27-32.28" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:32.47-32.48" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:32.34-32.38" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:32.30-32.32" } } } }, "OFS1P3IX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:33.1-33.302" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "CD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "CD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:33.23-33.25" } }, "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:33.27-33.28" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:33.47-33.48" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:33.34-33.38" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:33.30-33.32" } } } }, "OFS1P3JX": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:34.1-34.302" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "PD": { "direction": "input", "bits": [ 2 ] }, "D": { "direction": "input", "bits": [ 3 ] }, "SP": { "direction": "input", "bits": [ 4 ] }, "SCLK": { "direction": "input", "bits": [ 5 ] }, "Q": { "direction": "output", "bits": [ 6 ] } }, "cells": { }, "netnames": { "D": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:34.27-34.28" } }, "PD": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:34.23-34.25" } }, "Q": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:34.47-34.48" } }, "SCLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:34.34-34.38" } }, "SP": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_ff.vh:34.30-34.32" } } } }, "OLVDS": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:14.1-14.114" }, "ports": { "A": { "direction": "input", "bits": [ 2 ] }, "Z": { "direction": "output", "bits": [ 3 ] }, "ZN": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "A": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:14.20-14.21" } }, "Z": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:14.34-14.35" } }, "ZN": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_io.vh:14.37-14.39" } } } }, "OSCG": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:153.1-157.10" }, "parameter_default_values": { "DIV": "00000000000000000000000010000000" }, "ports": { "OSC": { "direction": "output", "bits": [ 2 ] } }, "cells": { }, "netnames": { "OSC": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:154.9-154.12" } } } }, "OSHX2A": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:252.1-257.10" }, "parameter_default_values": { "GSR": "ENABLED" }, "ports": { "D0": { "direction": "input", "bits": [ 2 ] }, "D1": { "direction": "input", "bits": [ 3 ] }, "RST": { "direction": "input", "bits": [ 4 ] }, "ECLK": { "direction": "input", "bits": [ 5 ] }, "SCLK": { "direction": "input", "bits": [ 6 ] }, "Q": { "direction": "output", "bits": [ 7 ] } }, "cells": { }, "netnames": { "D0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:253.8-253.10" } }, "D1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:253.12-253.14" } }, "ECLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:253.21-253.25" } }, "Q": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:254.9-254.10" } }, "RST": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:253.16-253.19" } }, "SCLK": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:253.27-253.31" } } } }, "PCSCLKDIV": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:672.1-677.10" }, "parameter_default_values": { "GSR": "DISABLED" }, "ports": { "CLKI": { "direction": "input", "bits": [ 2 ] }, "RST": { "direction": "input", "bits": [ 3 ] }, "SEL2": { "direction": "input", "bits": [ 4 ] }, "SEL1": { "direction": "input", "bits": [ 5 ] }, "SEL0": { "direction": "input", "bits": [ 6 ] }, "CDIV1": { "direction": "output", "bits": [ 7 ] }, "CDIVX": { "direction": "output", "bits": [ 8 ] } }, "cells": { }, "netnames": { "CDIV1": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:674.9-674.14" } }, "CDIVX": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:674.16-674.21" } }, "CLKI": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:673.8-673.12" } }, "RST": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:673.14-673.17" } }, "SEL0": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:673.31-673.35" } }, "SEL1": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:673.25-673.29" } }, "SEL2": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:673.19-673.23" } } } }, "PDPW16KD": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:701.1-791.10" }, "parameter_default_values": { "ASYNC_RESET_RELEASE": "SYNC", "CLKRMUX": "CLKR", "CLKWMUX": "CLKW", "CSDECODE_R": "0b000", "CSDECODE_W": "0b000", "DATA_WIDTH_R": "00000000000000000000000000100100", "DATA_WIDTH_W": "00000000000000000000000000100100", "GSR": "ENABLED", "INITVAL_00": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_01": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_02": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_03": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_04": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_05": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_06": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_07": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_08": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_09": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0A": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0B": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0C": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0D": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0E": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_0F": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_10": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_11": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_12": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_13": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_14": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_15": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_16": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_17": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_18": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_19": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1A": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1B": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1C": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1D": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1E": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_1F": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_20": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_21": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_22": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_23": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_24": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_25": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_26": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_27": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_28": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_29": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2A": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2B": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2C": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2D": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2E": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_2F": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_30": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_31": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_32": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_33": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_34": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_35": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_36": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_37": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_38": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_39": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3A": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3B": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3C": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3D": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3E": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INITVAL_3F": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", "INIT_DATA": "STATIC", "REGMODE": "NOREG", "RESETMODE": "SYNC" }, "ports": { "DI35": { "direction": "input", "bits": [ 2 ] }, "DI34": { "direction": "input", "bits": [ 3 ] }, "DI33": { "direction": "input", "bits": [ 4 ] }, "DI32": { "direction": "input", "bits": [ 5 ] }, "DI31": { "direction": "input", "bits": [ 6 ] }, "DI30": { "direction": "input", "bits": [ 7 ] }, "DI29": { "direction": "input", "bits": [ 8 ] }, "DI28": { "direction": "input", "bits": [ 9 ] }, "DI27": { "direction": "input", "bits": [ 10 ] }, "DI26": { "direction": "input", "bits": [ 11 ] }, "DI25": { "direction": "input", "bits": [ 12 ] }, "DI24": { "direction": "input", "bits": [ 13 ] }, "DI23": { "direction": "input", "bits": [ 14 ] }, "DI22": { "direction": "input", "bits": [ 15 ] }, "DI21": { "direction": "input", "bits": [ 16 ] }, "DI20": { "direction": "input", "bits": [ 17 ] }, "DI19": { "direction": "input", "bits": [ 18 ] }, "DI18": { "direction": "input", "bits": [ 19 ] }, "DI17": { "direction": "input", "bits": [ 20 ] }, "DI16": { "direction": "input", "bits": [ 21 ] }, "DI15": { "direction": "input", "bits": [ 22 ] }, "DI14": { "direction": "input", "bits": [ 23 ] }, "DI13": { "direction": "input", "bits": [ 24 ] }, "DI12": { "direction": "input", "bits": [ 25 ] }, "DI11": { "direction": "input", "bits": [ 26 ] }, "DI10": { "direction": "input", "bits": [ 27 ] }, "DI9": { "direction": "input", "bits": [ 28 ] }, "DI8": { "direction": "input", "bits": [ 29 ] }, "DI7": { "direction": "input", "bits": [ 30 ] }, "DI6": { "direction": "input", "bits": [ 31 ] }, "DI5": { "direction": "input", "bits": [ 32 ] }, "DI4": { "direction": "input", "bits": [ 33 ] }, "DI3": { "direction": "input", "bits": [ 34 ] }, "DI2": { "direction": "input", "bits": [ 35 ] }, "DI1": { "direction": "input", "bits": [ 36 ] }, "DI0": { "direction": "input", "bits": [ 37 ] }, "ADW8": { "direction": "input", "bits": [ 38 ] }, "ADW7": { "direction": "input", "bits": [ 39 ] }, "ADW6": { "direction": "input", "bits": [ 40 ] }, "ADW5": { "direction": "input", "bits": [ 41 ] }, "ADW4": { "direction": "input", "bits": [ 42 ] }, "ADW3": { "direction": "input", "bits": [ 43 ] }, "ADW2": { "direction": "input", "bits": [ 44 ] }, "ADW1": { "direction": "input", "bits": [ 45 ] }, "ADW0": { "direction": "input", "bits": [ 46 ] }, "BE3": { "direction": "input", "bits": [ 47 ] }, "BE2": { "direction": "input", "bits": [ 48 ] }, "BE1": { "direction": "input", "bits": [ 49 ] }, "BE0": { "direction": "input", "bits": [ 50 ] }, "CEW": { "direction": "input", "bits": [ 51 ] }, "CLKW": { "direction": "input", "bits": [ 52 ] }, "CSW2": { "direction": "input", "bits": [ 53 ] }, "CSW1": { "direction": "input", "bits": [ 54 ] }, "CSW0": { "direction": "input", "bits": [ 55 ] }, "ADR13": { "direction": "input", "bits": [ 56 ] }, "ADR12": { "direction": "input", "bits": [ 57 ] }, "ADR11": { "direction": "input", "bits": [ 58 ] }, "ADR10": { "direction": "input", "bits": [ 59 ] }, "ADR9": { "direction": "input", "bits": [ 60 ] }, "ADR8": { "direction": "input", "bits": [ 61 ] }, "ADR7": { "direction": "input", "bits": [ 62 ] }, "ADR6": { "direction": "input", "bits": [ 63 ] }, "ADR5": { "direction": "input", "bits": [ 64 ] }, "ADR4": { "direction": "input", "bits": [ 65 ] }, "ADR3": { "direction": "input", "bits": [ 66 ] }, "ADR2": { "direction": "input", "bits": [ 67 ] }, "ADR1": { "direction": "input", "bits": [ 68 ] }, "ADR0": { "direction": "input", "bits": [ 69 ] }, "CER": { "direction": "input", "bits": [ 70 ] }, "OCER": { "direction": "input", "bits": [ 71 ] }, "CLKR": { "direction": "input", "bits": [ 72 ] }, "CSR2": { "direction": "input", "bits": [ 73 ] }, "CSR1": { "direction": "input", "bits": [ 74 ] }, "CSR0": { "direction": "input", "bits": [ 75 ] }, "RST": { "direction": "input", "bits": [ 76 ] }, "DO35": { "direction": "output", "bits": [ 77 ] }, "DO34": { "direction": "output", "bits": [ 78 ] }, "DO33": { "direction": "output", "bits": [ 79 ] }, "DO32": { "direction": "output", "bits": [ 80 ] }, "DO31": { "direction": "output", "bits": [ 81 ] }, "DO30": { "direction": "output", "bits": [ 82 ] }, "DO29": { "direction": "output", "bits": [ 83 ] }, "DO28": { "direction": "output", "bits": [ 84 ] }, "DO27": { "direction": "output", "bits": [ 85 ] }, "DO26": { "direction": "output", "bits": [ 86 ] }, "DO25": { "direction": "output", "bits": [ 87 ] }, "DO24": { "direction": "output", "bits": [ 88 ] }, "DO23": { "direction": "output", "bits": [ 89 ] }, "DO22": { "direction": "output", "bits": [ 90 ] }, "DO21": { "direction": "output", "bits": [ 91 ] }, "DO20": { "direction": "output", "bits": [ 92 ] }, "DO19": { "direction": "output", "bits": [ 93 ] }, "DO18": { "direction": "output", "bits": [ 94 ] }, "DO17": { "direction": "output", "bits": [ 95 ] }, "DO16": { "direction": "output", "bits": [ 96 ] }, "DO15": { "direction": "output", "bits": [ 97 ] }, "DO14": { "direction": "output", "bits": [ 98 ] }, "DO13": { "direction": "output", "bits": [ 99 ] }, "DO12": { "direction": "output", "bits": [ 100 ] }, "DO11": { "direction": "output", "bits": [ 101 ] }, "DO10": { "direction": "output", "bits": [ 102 ] }, "DO9": { "direction": "output", "bits": [ 103 ] }, "DO8": { "direction": "output", "bits": [ 104 ] }, "DO7": { "direction": "output", "bits": [ 105 ] }, "DO6": { "direction": "output", "bits": [ 106 ] }, "DO5": { "direction": "output", "bits": [ 107 ] }, "DO4": { "direction": "output", "bits": [ 108 ] }, "DO3": { "direction": "output", "bits": [ 109 ] }, "DO2": { "direction": "output", "bits": [ 110 ] }, "DO1": { "direction": "output", "bits": [ 111 ] }, "DO0": { "direction": "output", "bits": [ 112 ] } }, "cells": { }, "netnames": { "ADR0": { "hide_name": 0, "bits": [ 69 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.90-706.94" } }, "ADR1": { "hide_name": 0, "bits": [ 68 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.84-706.88" } }, "ADR10": { "hide_name": 0, "bits": [ 59 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.29-706.34" } }, "ADR11": { "hide_name": 0, "bits": [ 58 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.22-706.27" } }, "ADR12": { "hide_name": 0, "bits": [ 57 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.15-706.20" } }, "ADR13": { "hide_name": 0, "bits": [ 56 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.8-706.13" } }, "ADR2": { "hide_name": 0, "bits": [ 67 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.78-706.82" } }, "ADR3": { "hide_name": 0, "bits": [ 66 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.72-706.76" } }, "ADR4": { "hide_name": 0, "bits": [ 65 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.66-706.70" } }, "ADR5": { "hide_name": 0, "bits": [ 64 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.60-706.64" } }, "ADR6": { "hide_name": 0, "bits": [ 63 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.54-706.58" } }, "ADR7": { "hide_name": 0, "bits": [ 62 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.48-706.52" } }, "ADR8": { "hide_name": 0, "bits": [ 61 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.42-706.46" } }, "ADR9": { "hide_name": 0, "bits": [ 60 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:706.36-706.40" } }, "ADW0": { "hide_name": 0, "bits": [ 46 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.56-704.60" } }, "ADW1": { "hide_name": 0, "bits": [ 45 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.50-704.54" } }, "ADW2": { "hide_name": 0, "bits": [ 44 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.44-704.48" } }, "ADW3": { "hide_name": 0, "bits": [ 43 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.38-704.42" } }, "ADW4": { "hide_name": 0, "bits": [ 42 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.32-704.36" } }, "ADW5": { "hide_name": 0, "bits": [ 41 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.26-704.30" } }, "ADW6": { "hide_name": 0, "bits": [ 40 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.20-704.24" } }, "ADW7": { "hide_name": 0, "bits": [ 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.14-704.18" } }, "ADW8": { "hide_name": 0, "bits": [ 38 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:704.8-704.12" } }, "BE0": { "hide_name": 0, "bits": [ 50 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.25-705.28" } }, "BE1": { "hide_name": 0, "bits": [ 49 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.20-705.23" } }, "BE2": { "hide_name": 0, "bits": [ 48 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.14-705.17" } }, "BE3": { "hide_name": 0, "bits": [ 47 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.8-705.11" } }, "CER": { "hide_name": 0, "bits": [ 70 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:707.8-707.11" } }, "CEW": { "hide_name": 0, "bits": [ 51 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.30-705.33" } }, "CLKR": { "hide_name": 0, "bits": [ 72 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:707.19-707.23" } }, "CLKW": { "hide_name": 0, "bits": [ 52 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.35-705.39" } }, "CSR0": { "hide_name": 0, "bits": [ 75 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:707.37-707.41" } }, "CSR1": { "hide_name": 0, "bits": [ 74 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:707.31-707.35" } }, "CSR2": { "hide_name": 0, "bits": [ 73 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:707.25-707.29" } }, "CSW0": { "hide_name": 0, "bits": [ 55 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.53-705.57" } }, "CSW1": { "hide_name": 0, "bits": [ 54 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.47-705.51" } }, "CSW2": { "hide_name": 0, "bits": [ 53 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:705.41-705.45" } }, "DI0": { "hide_name": 0, "bits": [ 37 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.101-703.104" } }, "DI1": { "hide_name": 0, "bits": [ 36 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.96-703.99" } }, "DI10": { "hide_name": 0, "bits": [ 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.50-703.54" } }, "DI11": { "hide_name": 0, "bits": [ 26 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.44-703.48" } }, "DI12": { "hide_name": 0, "bits": [ 25 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.38-703.42" } }, "DI13": { "hide_name": 0, "bits": [ 24 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.32-703.36" } }, "DI14": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.26-703.30" } }, "DI15": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.20-703.24" } }, "DI16": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.14-703.18" } }, "DI17": { "hide_name": 0, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.8-703.12" } }, "DI18": { "hide_name": 0, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.110-702.114" } }, "DI19": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.104-702.108" } }, "DI2": { "hide_name": 0, "bits": [ 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.91-703.94" } }, "DI20": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.98-702.102" } }, "DI21": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.92-702.96" } }, "DI22": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.86-702.90" } }, "DI23": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.80-702.84" } }, "DI24": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.74-702.78" } }, "DI25": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.68-702.72" } }, "DI26": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.62-702.66" } }, "DI27": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.56-702.60" } }, "DI28": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.50-702.54" } }, "DI29": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.44-702.48" } }, "DI3": { "hide_name": 0, "bits": [ 34 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.86-703.89" } }, "DI30": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.38-702.42" } }, "DI31": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.32-702.36" } }, "DI32": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.26-702.30" } }, "DI33": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.20-702.24" } }, "DI34": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.14-702.18" } }, "DI35": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:702.8-702.12" } }, "DI4": { "hide_name": 0, "bits": [ 33 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.81-703.84" } }, "DI5": { "hide_name": 0, "bits": [ 32 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.76-703.79" } }, "DI6": { "hide_name": 0, "bits": [ 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.71-703.74" } }, "DI7": { "hide_name": 0, "bits": [ 30 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.66-703.69" } }, "DI8": { "hide_name": 0, "bits": [ 29 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.61-703.64" } }, "DI9": { "hide_name": 0, "bits": [ 28 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:703.56-703.59" } }, "DO0": { "hide_name": 0, "bits": [ 112 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.102-709.105" } }, "DO1": { "hide_name": 0, "bits": [ 111 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.97-709.100" } }, "DO10": { "hide_name": 0, "bits": [ 102 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.51-709.55" } }, "DO11": { "hide_name": 0, "bits": [ 101 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.45-709.49" } }, "DO12": { "hide_name": 0, "bits": [ 100 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.39-709.43" } }, "DO13": { "hide_name": 0, "bits": [ 99 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.33-709.37" } }, "DO14": { "hide_name": 0, "bits": [ 98 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.27-709.31" } }, "DO15": { "hide_name": 0, "bits": [ 97 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.21-709.25" } }, "DO16": { "hide_name": 0, "bits": [ 96 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.15-709.19" } }, "DO17": { "hide_name": 0, "bits": [ 95 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.9-709.13" } }, "DO18": { "hide_name": 0, "bits": [ 94 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.111-708.115" } }, "DO19": { "hide_name": 0, "bits": [ 93 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.105-708.109" } }, "DO2": { "hide_name": 0, "bits": [ 110 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.92-709.95" } }, "DO20": { "hide_name": 0, "bits": [ 92 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.99-708.103" } }, "DO21": { "hide_name": 0, "bits": [ 91 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.93-708.97" } }, "DO22": { "hide_name": 0, "bits": [ 90 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.87-708.91" } }, "DO23": { "hide_name": 0, "bits": [ 89 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.81-708.85" } }, "DO24": { "hide_name": 0, "bits": [ 88 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.75-708.79" } }, "DO25": { "hide_name": 0, "bits": [ 87 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.69-708.73" } }, "DO26": { "hide_name": 0, "bits": [ 86 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.63-708.67" } }, "DO27": { "hide_name": 0, "bits": [ 85 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.57-708.61" } }, "DO28": { "hide_name": 0, "bits": [ 84 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.51-708.55" } }, "DO29": { "hide_name": 0, "bits": [ 83 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.45-708.49" } }, "DO3": { "hide_name": 0, "bits": [ 109 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.87-709.90" } }, "DO30": { "hide_name": 0, "bits": [ 82 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.39-708.43" } }, "DO31": { "hide_name": 0, "bits": [ 81 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.33-708.37" } }, "DO32": { "hide_name": 0, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.27-708.31" } }, "DO33": { "hide_name": 0, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.21-708.25" } }, "DO34": { "hide_name": 0, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.15-708.19" } }, "DO35": { "hide_name": 0, "bits": [ 77 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:708.9-708.13" } }, "DO4": { "hide_name": 0, "bits": [ 108 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.82-709.85" } }, "DO5": { "hide_name": 0, "bits": [ 107 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.77-709.80" } }, "DO6": { "hide_name": 0, "bits": [ 106 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.72-709.75" } }, "DO7": { "hide_name": 0, "bits": [ 105 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.67-709.70" } }, "DO8": { "hide_name": 0, "bits": [ 104 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.62-709.65" } }, "DO9": { "hide_name": 0, "bits": [ 103 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:709.57-709.60" } }, "OCER": { "hide_name": 0, "bits": [ 71 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:707.13-707.17" } }, "RST": { "hide_name": 0, "bits": [ 76 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:707.43-707.46" } } } }, "PFUMX": { "attributes": { "abc9_box": "00000000000000000000000000000001", "whitebox": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:179.1-186.10" }, "ports": { "ALUT": { "direction": "input", "bits": [ 2 ] }, "BLUT": { "direction": "input", "bits": [ 3 ] }, "C0": { "direction": "input", "bits": [ 4 ] }, "Z": { "direction": "output", "bits": [ 5 ] } }, "cells": { "$specify$248": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000001100010", "T_FALL_MIN": "00000000000000000000000001100010", "T_FALL_TYP": "00000000000000000000000001100010", "T_RISE_MAX": "00000000000000000000000001100010", "T_RISE_MIN": "00000000000000000000000001100010", "T_RISE_TYP": "00000000000000000000000001100010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:182.3-182.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 5 ], "EN": [ "1" ], "SRC": [ 2 ] } }, "$specify$249": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000001100010", "T_FALL_MIN": "00000000000000000000000001100010", "T_FALL_TYP": "00000000000000000000000001100010", "T_RISE_MAX": "00000000000000000000000001100010", "T_RISE_MIN": "00000000000000000000000001100010", "T_RISE_TYP": "00000000000000000000000001100010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:183.3-183.20" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 5 ], "EN": [ "1" ], "SRC": [ 3 ] } }, "$specify$250": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000010010111", "T_FALL_MIN": "00000000000000000000000010010111", "T_FALL_TYP": "00000000000000000000000010010111", "T_RISE_MAX": "00000000000000000000000010010111", "T_RISE_MIN": "00000000000000000000000010010111", "T_RISE_TYP": "00000000000000000000000010010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:184.3-184.19" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 5 ], "EN": [ "1" ], "SRC": [ 4 ] } }, "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:180$311": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:180.13-180.29" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ 3 ], "B": [ 2 ], "S": [ 4 ], "Y": [ 5 ] } } }, "netnames": { "$ternary$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:180$311_Y": { "hide_name": 1, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:180.13-180.29" } }, "ALUT": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:179.21-179.25" } }, "BLUT": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:179.27-179.31" } }, "C0": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:179.33-179.35" } }, "Z": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:179.44-179.45" } } } }, "PUR": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:681.1-685.10" }, "parameter_default_values": { "RST_PULSE": "00000000000000000000000000000001" }, "ports": { "PUR": { "direction": "input", "bits": [ 2 ] } }, "cells": { }, "netnames": { "PUR": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:682.8-682.11" } } } }, "SGSR": { "attributes": { "keep": "00000000000000000000000000000001", "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:694.1-697.10" }, "ports": { "GSR": { "direction": "input", "bits": [ 2 ] }, "CLK": { "direction": "input", "bits": [ 3 ] } }, "cells": { }, "netnames": { "CLK": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:695.13-695.16" } }, "GSR": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:695.8-695.11" } } } }, "TRELLIS_DPR16X4": { "attributes": { "whitebox": "00000000000000000000000000000001", "abc9_box": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:190.1-231.10" }, "parameter_default_values": { "INITVAL": "0000000000000000000000000000000000000000000000000000000000000000", "WCKMUX": "WCK", "WREMUX": "WRE" }, "ports": { "DI": { "direction": "input", "bits": [ 2, 3, 4, 5 ] }, "WAD": { "direction": "input", "bits": [ 6, 7, 8, 9 ] }, "WRE": { "direction": "input", "bits": [ 10 ] }, "WCK": { "direction": "input", "bits": [ 11 ] }, "RAD": { "direction": "input", "bits": [ 12, 13, 14, 15 ] }, "DO": { "direction": "output", "bits": [ 16, 17, 18, 19 ] } }, "cells": { "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$351": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101011111", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$352": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101100000", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$353": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101100001", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$354": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101100010", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$355": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101100011", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$356": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101100100", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$357": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101100101", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$358": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101100110", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$359": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101100111", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$360": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101101000", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$361": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101101001", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "1", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$362": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101101010", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "1", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$363": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101101011", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$364": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101101100", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$365": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101101101", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "0", "1", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$meminit$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$366": { "hide_name": 1, "type": "$meminit", "parameters": { "ABITS": "00000000000000000000000000100000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101101110", "WIDTH": "00000000000000000000000000000100", "WORDS": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "DATA": "input" }, "connections": { "ADDR": [ "1", "1", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "DATA": [ "0", "0", "0", "0" ] } }, "$memrd$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:225$350": { "hide_name": 1, "type": "$memrd", "parameters": { "ABITS": "00000000000000000000000000000100", "CLK_ENABLE": "00000000000000000000000000000000", "CLK_POLARITY": "00000000000000000000000000000000", "MEMID": "\\mem", "TRANSPARENT": "00000000000000000000000000000000", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:225.14-225.17" }, "port_directions": { "ADDR": "input", "CLK": "input", "DATA": "output", "EN": "input" }, "connections": { "ADDR": [ 12, 13, 14, 15 ], "CLK": [ "x" ], "DATA": [ 16, 17, 18, 19 ], "EN": [ "x" ] } }, "$memwr$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$367": { "hide_name": 1, "type": "$memwr", "parameters": { "ABITS": "00000000000000000000000000000100", "CLK_ENABLE": "00000000000000000000000000000000", "CLK_POLARITY": "00000000000000000000000000000000", "MEMID": "\\mem", "PRIORITY": "00000000000000000000000101101111", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" }, "port_directions": { "ADDR": "input", "CLK": "input", "DATA": "input", "EN": "input" }, "connections": { "ADDR": [ 20, 21, 22, 23 ], "CLK": [ "x" ], "DATA": [ 24, 25, 26, 27 ], "EN": [ 28, 29, 30, 31 ] } }, "$procdff$630": { "hide_name": 1, "type": "$dff", "parameters": { "CLK_POLARITY": "1", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221.2-223.19" }, "port_directions": { "CLK": "input", "D": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "D": [ 32, 33, 34, 35 ], "Q": [ 20, 21, 22, 23 ] } }, "$procdff$631": { "hide_name": 1, "type": "$dff", "parameters": { "CLK_POLARITY": "1", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221.2-223.19" }, "port_directions": { "CLK": "input", "D": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "D": [ 36, 37, 38, 39 ], "Q": [ 24, 25, 26, 27 ] } }, "$procdff$632": { "hide_name": 1, "type": "$dff", "parameters": { "CLK_POLARITY": "1", "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221.2-223.19" }, "port_directions": { "CLK": "input", "D": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "D": [ 40, 41, 42, 43 ], "Q": [ 28, 29, 30, 31 ] } }, "$procmux$441": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:222.7-222.13|/usr/local/bin/../share/yosys/ecp5/cells_sim.v:222.3-223.19" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ "0", "0", "0", "0" ], "B": [ "1", "1", "1", "1" ], "S": [ 10 ], "Y": [ 40, 41, 42, 43 ] } }, "$procmux$443": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:222.7-222.13|/usr/local/bin/../share/yosys/ecp5/cells_sim.v:222.3-223.19" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ "x", "x", "x", "x" ], "B": [ 2, 3, 4, 5 ], "S": [ 10 ], "Y": [ 36, 37, 38, 39 ] } }, "$procmux$445": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000100" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:222.7-222.13|/usr/local/bin/../share/yosys/ecp5/cells_sim.v:222.3-223.19" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ "x", "x", "x", "x" ], "B": [ 6, 7, 8, 9 ], "S": [ 10 ], "Y": [ 32, 33, 34, 35 ] } }, "$specify$251": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000100", "FULL": "1", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000100", "T_FALL_MAX": "00000000000000000000000000000000", "T_FALL_MIN": "00000000000000000000000000000000", "T_FALL_TYP": "00000000000000000000000000000000", "T_RISE_MAX": "00000000000000000000000000000000", "T_RISE_MIN": "00000000000000000000000000000000", "T_RISE_TYP": "00000000000000000000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:229.3-229.19" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 16, 17, 18, 19 ], "EN": [ "1" ], "SRC": [ 12, 13, 14, 15 ] } } }, "netnames": { "$0$memwr$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$344_ADDR[3:0]$347": { "hide_name": 1, "bits": [ 32, 33, 34, 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221.2-223.19" } }, "$0$memwr$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$344_DATA[3:0]$348": { "hide_name": 1, "bits": [ 36, 37, 38, 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221.2-223.19" } }, "$0$memwr$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$344_EN[3:0]$349": { "hide_name": 1, "bits": [ 40, 41, 42, 43 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221.2-223.19" } }, "$0\\i[31:0]": { "hide_name": 1, "bits": [ "0", "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$0\\muxwre[0:0]": { "hide_name": 1, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:213.2-219.10" } }, "$1\\muxwre[0:0]": { "hide_name": 1, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:213.2-219.10" } }, "$memrd$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:225$350_DATA": { "hide_name": 1, "bits": [ 16, 17, 18, 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:225.14-225.17" } }, "$memwr$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$344_ADDR": { "hide_name": 1, "bits": [ 20, 21, 22, 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$memwr$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$344_DATA": { "hide_name": 1, "bits": [ 24, 25, 26, 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$memwr$\\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$344_EN": { "hide_name": 1, "bits": [ 28, 29, 30, 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$procmux$441_Y": { "hide_name": 1, "bits": [ 40, 41, 42, 43 ], "attributes": { } }, "$procmux$442_CMP": { "hide_name": 1, "bits": [ 10 ], "attributes": { } }, "$procmux$443_Y": { "hide_name": 1, "bits": [ 36, 37, 38, 39 ], "attributes": { } }, "$procmux$444_CMP": { "hide_name": 1, "bits": [ 10 ], "attributes": { } }, "$procmux$445_Y": { "hide_name": 1, "bits": [ 32, 33, 34, 35 ], "attributes": { } }, "$procmux$446_CMP": { "hide_name": 1, "bits": [ 10 ], "attributes": { } }, "DI": { "hide_name": 0, "bits": [ 2, 3, 4, 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:191.15-191.17" } }, "DO": { "hide_name": 0, "bits": [ 16, 17, 18, 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:196.15-196.17" } }, "RAD": { "hide_name": 0, "bits": [ 12, 13, 14, 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:195.15-195.18" } }, "WAD": { "hide_name": 0, "bits": [ 6, 7, 8, 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:192.15-192.18" } }, "WCK": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:194.15-194.18" } }, "WRE": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:193.15-193.18" } }, "i": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "signed": 1, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:204.10-204.11" } }, "muxwck": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:210.7-210.13" } }, "muxwre": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:212.6-212.12" } } } }, "TRELLIS_FF": { "attributes": { "abc9_flop": "1", "abc9_box": "0", "whitebox": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:311.1-389.10" }, "parameter_default_values": { "CEMUX": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000110001", "CLKMUX": "CLK", "GSR": "ENABLED", "LSRMODE": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010011000101001101010010", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "ports": { "CLK": { "direction": "input", "bits": [ 2 ] }, "LSR": { "direction": "input", "bits": [ 3 ] }, "CE": { "direction": "input", "bits": [ 4 ] }, "DI": { "direction": "input", "bits": [ 5 ] }, "M": { "direction": "input", "bits": [ 6 ] }, "Q": { "direction": "output", "bits": [ 7 ] } }, "cells": { "$logic_and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:382$426": { "hide_name": 1, "type": "$logic_and", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:382.9-382.36" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ "0" ], "B": [ 3 ], "Y": [ 8 ] } }, "$logic_and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386$428": { "hide_name": 1, "type": "$logic_and", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "B_SIGNED": "00000000000000000000000000000000", "B_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386.9-386.25" }, "port_directions": { "A": "input", "B": "input", "Y": "output" }, "connections": { "A": [ 9 ], "B": [ "1" ], "Y": [ 10 ] } }, "$logic_not$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386$427": { "hide_name": 1, "type": "$logic_not", "parameters": { "A_SIGNED": "00000000000000000000000000000000", "A_WIDTH": "00000000000000000000000000000001", "Y_WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386.9-386.16" }, "port_directions": { "A": "input", "Y": "output" }, "connections": { "A": [ 3 ], "Y": [ 9 ] } }, "$procdff$626": { "hide_name": 1, "type": "$dff", "parameters": { "CLK_POLARITY": "1", "WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:350.4-354.14" }, "port_directions": { "CLK": "input", "D": "input", "Q": "output" }, "connections": { "CLK": [ 2 ], "D": [ 11 ], "Q": [ 7 ] } }, "$procmux$430": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000001" }, "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:353.14-353.19|/usr/local/bin/../share/yosys/ecp5/cells_sim.v:353.10-354.14" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ 7 ], "B": [ 5 ], "S": [ "1" ], "Y": [ 12 ] } }, "$procmux$433": { "hide_name": 1, "type": "$mux", "parameters": { "WIDTH": "00000000000000000000000000000001" }, "attributes": { "full_case": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:351.9-351.15|/usr/local/bin/../share/yosys/ecp5/cells_sim.v:351.5-354.14" }, "port_directions": { "A": "input", "B": "input", "S": "input", "Y": "output" }, "connections": { "A": [ 12 ], "B": [ "0" ], "S": [ 3 ], "Y": [ 11 ] } }, "$specify$258": { "hide_name": 1, "type": "$specrule", "parameters": { "DST_PEN": "1", "DST_POL": "1", "DST_WIDTH": "00000000000000000000000000000001", "SRC_PEN": "0", "SRC_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "TYPE": "$setup", "T_LIMIT2_MAX": "00000000000000000000000000000000", "T_LIMIT2_MIN": "00000000000000000000000000000000", "T_LIMIT2_TYP": "00000000000000000000000000000000", "T_LIMIT_MAX": "00000000000000000000000000000000", "T_LIMIT_MIN": "00000000000000000000000000000000", "T_LIMIT_TYP": "00000000000000000000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:376.5-376.32" }, "port_directions": { "DST": "input", "DST_EN": "output", "SRC": "input", "SRC_EN": "output" }, "connections": { "DST": [ 2 ], "DST_EN": [ "1" ], "SRC": [ 5 ], "SRC_EN": [ "1" ] } }, "$specify$259": { "hide_name": 1, "type": "$specrule", "parameters": { "DST_PEN": "1", "DST_POL": "1", "DST_WIDTH": "00000000000000000000000000000001", "SRC_PEN": "0", "SRC_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "TYPE": "$setup", "T_LIMIT2_MAX": "00000000000000000000000000000000", "T_LIMIT2_MIN": "00000000000000000000000000000000", "T_LIMIT2_TYP": "00000000000000000000000000000000", "T_LIMIT_MAX": "00000000000000000000000000000000", "T_LIMIT_MIN": "00000000000000000000000000000000", "T_LIMIT_TYP": "00000000000000000000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:377.5-377.32" }, "port_directions": { "DST": "input", "DST_EN": "output", "SRC": "input", "SRC_EN": "output" }, "connections": { "DST": [ 2 ], "DST_EN": [ "1" ], "SRC": [ 4 ], "SRC_EN": [ "1" ] } }, "$specify$260": { "hide_name": 1, "type": "$specrule", "parameters": { "DST_PEN": "1", "DST_POL": "1", "DST_WIDTH": "00000000000000000000000000000001", "SRC_PEN": "0", "SRC_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "TYPE": "$setup", "T_LIMIT2_MAX": "00000000000000000000000000000000", "T_LIMIT2_MIN": "00000000000000000000000000000000", "T_LIMIT2_TYP": "00000000000000000000000000000000", "T_LIMIT_MAX": "00000000000000000000000000000000", "T_LIMIT_MIN": "00000000000000000000000000000000", "T_LIMIT_TYP": "00000000000000000000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:378.5-378.33" }, "port_directions": { "DST": "input", "DST_EN": "output", "SRC": "input", "SRC_EN": "output" }, "connections": { "DST": [ 2 ], "DST_EN": [ "1" ], "SRC": [ 3 ], "SRC_EN": [ "1" ] } }, "$specify$261": { "hide_name": 1, "type": "$specify2", "parameters": { "DST_WIDTH": "00000000000000000000000000000001", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000000000000", "T_FALL_MIN": "00000000000000000000000000000000", "T_FALL_TYP": "00000000000000000000000000000000", "T_RISE_MAX": "00000000000000000000000000000000", "T_RISE_MIN": "00000000000000000000000000000000", "T_RISE_TYP": "00000000000000000000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:382.5-382.53" }, "port_directions": { "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DST": [ 7 ], "EN": [ 8 ], "SRC": [ 3 ] } }, "$specify$262": { "hide_name": 1, "type": "$specify3", "parameters": { "DAT_DST_PEN": "0", "DAT_DST_POL": "0", "DST_WIDTH": "00000000000000000000000000000001", "EDGE_EN": "1", "EDGE_POL": "1", "FULL": "0", "SRC_DST_PEN": "0", "SRC_DST_POL": "0", "SRC_WIDTH": "00000000000000000000000000000001", "T_FALL_MAX": "00000000000000000000000000000000", "T_FALL_MIN": "00000000000000000000000000000000", "T_FALL_TYP": "00000000000000000000000000000000", "T_RISE_MAX": "00000000000000000000000000000000", "T_RISE_MIN": "00000000000000000000000000000000", "T_RISE_TYP": "00000000000000000000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386.5-386.57" }, "port_directions": { "DAT": "input", "DST": "input", "EN": "input", "SRC": "input" }, "connections": { "DAT": [ 5 ], "DST": [ 7 ], "EN": [ 10 ], "SRC": [ 2 ] } } }, "netnames": { "$0\\Q[0:0]": { "hide_name": 1, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:350.4-354.14" } }, "$1\\Q[0:0]": { "hide_name": 1, "bits": [ "0" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0.0-0.0" } }, "$logic_and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:382$426_Y": { "hide_name": 1, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:382.9-382.36" } }, "$logic_and$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386$428_Y": { "hide_name": 1, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386.9-386.25" } }, "$logic_not$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386$427_Y": { "hide_name": 1, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:386.9-386.16" } }, "$procmux$430_Y": { "hide_name": 1, "bits": [ 12 ], "attributes": { } }, "$procmux$431_CMP": { "hide_name": 1, "bits": [ "1" ], "attributes": { } }, "$procmux$433_Y": { "hide_name": 1, "bits": [ 11 ], "attributes": { } }, "$procmux$434_CMP": { "hide_name": 1, "bits": [ 3 ], "attributes": { } }, "CE": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:311.35-311.37" } }, "CLK": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:311.25-311.28" } }, "DI": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:311.39-311.41" } }, "LSR": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:311.30-311.33" } }, "M": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:311.43-311.44" } }, "Q": { "hide_name": 0, "bits": [ 7 ], "attributes": { "init": "0", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:311.57-311.58" } }, "muxce": { "hide_name": 0, "bits": [ "1" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:320.7-320.12" } }, "muxclk": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:331.7-331.13" } }, "muxlsr": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:330.7-330.13" } }, "srval": { "hide_name": 0, "bits": [ "0" ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:332.7-332.12" } } } }, "TRELLIS_IO": { "attributes": { "keep": "00000000000000000000000000000001", "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:393.1-418.10" }, "parameter_default_values": { "DIR": "INPUT" }, "ports": { "B": { "direction": "inout", "bits": [ 2 ] }, "I": { "direction": "input", "bits": [ 3 ] }, "T": { "direction": "input", "bits": [ 4 ] }, "O": { "direction": "output", "bits": [ 5 ] } }, "cells": { }, "netnames": { "B": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:394.8-394.9" } }, "I": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:395.8-395.9" } }, "O": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:397.9-397.10" } }, "T": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:396.8-396.9" } } } }, "TRELLIS_RAM16X2": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:138.1-175.10" }, "parameter_default_values": { "INITVAL_0": "0000000000000000", "INITVAL_1": "0000000000000000", "WCKMUX": "WCK", "WREMUX": "WRE" }, "ports": { "DI0": { "direction": "input", "bits": [ 2 ] }, "DI1": { "direction": "input", "bits": [ 3 ] }, "WAD0": { "direction": "input", "bits": [ 4 ] }, "WAD1": { "direction": "input", "bits": [ 5 ] }, "WAD2": { "direction": "input", "bits": [ 6 ] }, "WAD3": { "direction": "input", "bits": [ 7 ] }, "WRE": { "direction": "input", "bits": [ 8 ] }, "WCK": { "direction": "input", "bits": [ 9 ] }, "RAD0": { "direction": "input", "bits": [ 10 ] }, "RAD1": { "direction": "input", "bits": [ 11 ] }, "RAD2": { "direction": "input", "bits": [ 12 ] }, "RAD3": { "direction": "input", "bits": [ 13 ] }, "DO0": { "direction": "output", "bits": [ 14 ] }, "DO1": { "direction": "output", "bits": [ 15 ] } }, "cells": { }, "netnames": { "DI0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:139.8-139.11" } }, "DI1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:139.13-139.16" } }, "DO0": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:143.9-143.12" } }, "DO1": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:143.14-143.17" } }, "RAD0": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:142.8-142.12" } }, "RAD1": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:142.14-142.18" } }, "RAD2": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:142.20-142.24" } }, "RAD3": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:142.26-142.30" } }, "WAD0": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:140.8-140.12" } }, "WAD1": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:140.14-140.18" } }, "WAD2": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:140.20-140.24" } }, "WAD3": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:140.26-140.30" } }, "WCK": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:141.13-141.16" } }, "WRE": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:141.8-141.11" } } } }, "TRELLIS_SLICE": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:428.1-599.10" }, "parameter_default_values": { "A0MUX": "A0", "A1MUX": "A1", "B0MUX": "B0", "B1MUX": "B1", "C0MUX": "C0", "C1MUX": "C1", "CCU2_INJECT1_0": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100111001001111", "CCU2_INJECT1_1": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100111001001111", "CEMUX": "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000110001", "CLKMUX": "CLK", "D0MUX": "D0", "D1MUX": "D1", "GSR": "ENABLED", "LSRMUX": "LSR", "LUT0_INITVAL": "0000000000000000", "LUT1_INITVAL": "0000000000000000", "MODE": "LOGIC", "REG0_LSRMODE": "LSR", "REG0_REGSET": "RESET", "REG0_SD": "0 ", "REG1_LSRMODE": "LSR", "REG1_REGSET": "RESET", "REG1_SD": "0 ", "SRMODE": "LSR_OVER_CE", "WCKMUX": "WCK", "WREMUX": "WRE" }, "ports": { "A0": { "direction": "input", "bits": [ 2 ] }, "B0": { "direction": "input", "bits": [ 3 ] }, "C0": { "direction": "input", "bits": [ 4 ] }, "D0": { "direction": "input", "bits": [ 5 ] }, "A1": { "direction": "input", "bits": [ 6 ] }, "B1": { "direction": "input", "bits": [ 7 ] }, "C1": { "direction": "input", "bits": [ 8 ] }, "D1": { "direction": "input", "bits": [ 9 ] }, "M0": { "direction": "input", "bits": [ 10 ] }, "M1": { "direction": "input", "bits": [ 11 ] }, "FCI": { "direction": "input", "bits": [ 12 ] }, "FXA": { "direction": "input", "bits": [ 13 ] }, "FXB": { "direction": "input", "bits": [ 14 ] }, "CLK": { "direction": "input", "bits": [ 15 ] }, "LSR": { "direction": "input", "bits": [ 16 ] }, "CE": { "direction": "input", "bits": [ 17 ] }, "DI0": { "direction": "input", "bits": [ 18 ] }, "DI1": { "direction": "input", "bits": [ 19 ] }, "WD0": { "direction": "input", "bits": [ 20 ] }, "WD1": { "direction": "input", "bits": [ 21 ] }, "WAD0": { "direction": "input", "bits": [ 22 ] }, "WAD1": { "direction": "input", "bits": [ 23 ] }, "WAD2": { "direction": "input", "bits": [ 24 ] }, "WAD3": { "direction": "input", "bits": [ 25 ] }, "WRE": { "direction": "input", "bits": [ 26 ] }, "WCK": { "direction": "input", "bits": [ 27 ] }, "F0": { "direction": "output", "bits": [ 28 ] }, "Q0": { "direction": "output", "bits": [ 29 ] }, "F1": { "direction": "output", "bits": [ 30 ] }, "Q1": { "direction": "output", "bits": [ 31 ] }, "FCO": { "direction": "output", "bits": [ 32 ] }, "OFX0": { "direction": "output", "bits": [ 33 ] }, "OFX1": { "direction": "output", "bits": [ 34 ] }, "WDO0": { "direction": "output", "bits": [ 35 ] }, "WDO1": { "direction": "output", "bits": [ 36 ] }, "WDO2": { "direction": "output", "bits": [ 37 ] }, "WDO3": { "direction": "output", "bits": [ 38 ] }, "WADO0": { "direction": "output", "bits": [ 39 ] }, "WADO1": { "direction": "output", "bits": [ 40 ] }, "WADO2": { "direction": "output", "bits": [ 41 ] }, "WADO3": { "direction": "output", "bits": [ 42 ] } }, "cells": { }, "netnames": { "A0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:429.8-429.10" } }, "A1": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:430.8-430.10" } }, "B0": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:429.12-429.14" } }, "B1": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:430.12-430.14" } }, "C0": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:429.16-429.18" } }, "C1": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:430.16-430.18" } }, "CE": { "hide_name": 0, "bits": [ 17 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:434.18-434.20" } }, "CLK": { "hide_name": 0, "bits": [ 15 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:434.8-434.11" } }, "D0": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:429.20-429.22" } }, "D1": { "hide_name": 0, "bits": [ 9 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:430.20-430.22" } }, "DI0": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:435.8-435.11" } }, "DI1": { "hide_name": 0, "bits": [ 19 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:435.13-435.16" } }, "F0": { "hide_name": 0, "bits": [ 28 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:441.9-441.11" } }, "F1": { "hide_name": 0, "bits": [ 30 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:442.9-442.11" } }, "FCI": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:432.8-432.11" } }, "FCO": { "hide_name": 0, "bits": [ 32 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:443.9-443.12" } }, "FXA": { "hide_name": 0, "bits": [ 13 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:432.13-432.16" } }, "FXB": { "hide_name": 0, "bits": [ 14 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:432.18-432.21" } }, "LSR": { "hide_name": 0, "bits": [ 16 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:434.13-434.16" } }, "M0": { "hide_name": 0, "bits": [ 10 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:431.8-431.10" } }, "M1": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:431.12-431.14" } }, "OFX0": { "hide_name": 0, "bits": [ 33 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:443.14-443.18" } }, "OFX1": { "hide_name": 0, "bits": [ 34 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:443.20-443.24" } }, "Q0": { "hide_name": 0, "bits": [ 29 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:441.13-441.15" } }, "Q1": { "hide_name": 0, "bits": [ 31 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:442.13-442.15" } }, "WAD0": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:438.8-438.12" } }, "WAD1": { "hide_name": 0, "bits": [ 23 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:438.14-438.18" } }, "WAD2": { "hide_name": 0, "bits": [ 24 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:438.20-438.24" } }, "WAD3": { "hide_name": 0, "bits": [ 25 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:438.26-438.30" } }, "WADO0": { "hide_name": 0, "bits": [ 39 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:446.9-446.14" } }, "WADO1": { "hide_name": 0, "bits": [ 40 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:446.16-446.21" } }, "WADO2": { "hide_name": 0, "bits": [ 41 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:446.23-446.28" } }, "WADO3": { "hide_name": 0, "bits": [ 42 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:446.30-446.35" } }, "WCK": { "hide_name": 0, "bits": [ 27 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:439.13-439.16" } }, "WD0": { "hide_name": 0, "bits": [ 20 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:437.8-437.11" } }, "WD1": { "hide_name": 0, "bits": [ 21 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:437.13-437.16" } }, "WDO0": { "hide_name": 0, "bits": [ 35 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:445.9-445.13" } }, "WDO1": { "hide_name": 0, "bits": [ 36 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:445.15-445.19" } }, "WDO2": { "hide_name": 0, "bits": [ 37 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:445.21-445.25" } }, "WDO3": { "hide_name": 0, "bits": [ 38 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:445.27-445.31" } }, "WRE": { "hide_name": 0, "bits": [ 26 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_sim.v:439.8-439.11" } } } }, "TSHX2DQA": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:276.1-282.10" }, "parameter_default_values": { "GSR": "ENABLED", "REGSET": "SET" }, "ports": { "T0": { "direction": "input", "bits": [ 2 ] }, "T1": { "direction": "input", "bits": [ 3 ] }, "SCLK": { "direction": "input", "bits": [ 4 ] }, "ECLK": { "direction": "input", "bits": [ 5 ] }, "DQSW270": { "direction": "input", "bits": [ 6 ] }, "RST": { "direction": "input", "bits": [ 7 ] }, "Q": { "direction": "output", "bits": [ 8 ] } }, "cells": { }, "netnames": { "DQSW270": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:277.28-277.35" } }, "ECLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:277.22-277.26" } }, "Q": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:278.9-278.10" } }, "RST": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:277.37-277.40" } }, "SCLK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:277.16-277.20" } }, "T0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:277.8-277.10" } }, "T1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:277.12-277.14" } } } }, "TSHX2DQSA": { "attributes": { "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:285.1-291.10" }, "parameter_default_values": { "GSR": "ENABLED", "REGSET": "SET" }, "ports": { "T0": { "direction": "input", "bits": [ 2 ] }, "T1": { "direction": "input", "bits": [ 3 ] }, "SCLK": { "direction": "input", "bits": [ 4 ] }, "ECLK": { "direction": "input", "bits": [ 5 ] }, "DQSW": { "direction": "input", "bits": [ 6 ] }, "RST": { "direction": "input", "bits": [ 7 ] }, "Q": { "direction": "output", "bits": [ 8 ] } }, "cells": { }, "netnames": { "DQSW": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:286.28-286.32" } }, "ECLK": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:286.22-286.26" } }, "Q": { "hide_name": 0, "bits": [ 8 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:287.9-287.10" } }, "RST": { "hide_name": 0, "bits": [ 7 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:286.34-286.37" } }, "SCLK": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:286.16-286.20" } }, "T0": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:286.8-286.10" } }, "T1": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:286.12-286.14" } } } }, "ULX3S_25F": { "attributes": { "top": "00000000000000000000000000000001", "src": "ULX3S_25F.v:3.1-54.10" }, "ports": { "clk_25mhz": { "direction": "input", "bits": [ 2 ] }, "gpdi_dp": { "direction": "output", "bits": [ 3, 4, 5, 6 ] }, "gpdi_dn": { "direction": "output", "bits": [ 7, 8, 9, 10 ] }, "wifi_gpio0": { "direction": "output", "bits": [ "1" ] } }, "cells": { "OBUFDS_blu.I_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 12 ], "LSR": [ 13 ], "Q": [ 3 ] } }, "OBUFDS_blu.I_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 14 ], "C": [ 15 ], "D": [ 16 ], "Z": [ 12 ] } }, "OBUFDS_blu.I_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 13 ] } }, "OBUFDS_blu.OB_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 3 ], "Z": [ 7 ] } }, "OBUFDS_clock.OB_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 6 ], "Z": [ 10 ] } }, "OBUFDS_grn.I_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 18 ], "LSR": [ 19 ], "Q": [ 4 ] } }, "OBUFDS_grn.I_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 20 ], "C": [ 21 ], "D": [ 16 ], "Z": [ 18 ] } }, "OBUFDS_grn.I_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 19 ] } }, "OBUFDS_grn.OB_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 4 ], "Z": [ 8 ] } }, "OBUFDS_red.I_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 22 ], "LSR": [ 23 ], "Q": [ 5 ] } }, "OBUFDS_red.I_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 24 ], "C": [ 25 ], "D": [ 16 ], "Z": [ 22 ] } }, "OBUFDS_red.I_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 23 ] } }, "OBUFDS_red.OB_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 5 ], "Z": [ 9 ] } }, "clock_instance.pll_i": { "hide_name": 0, "type": "EHXPLLL", "parameters": { "CLKFB_DIV": "00000000000000000000000000000101", "CLKI_DIV": "00000000000000000000000000000001", "CLKOP_CPHASE": "00000000000000000000000000000011", "CLKOP_DIV": "00000000000000000000000000000100", "CLKOP_ENABLE": "ENABLED", "CLKOP_FPHASE": "00000000000000000000000000000000", "CLKOS2_CPHASE": "00000000000000000000000000000000", "CLKOS2_DIV": "00000000000000000000000000010100", "CLKOS2_ENABLE": "ENABLED", "CLKOS3_CPHASE": "00000000000000000000000000000101", "CLKOS3_DIV": "00000000000000000000000000000000", "CLKOS3_ENABLE": "ENABLED", "CLKOS_CPHASE": "00000000000000000000000000000001", "CLKOS_DIV": "00000000000000000000000000000010", "CLKOS_ENABLE": "ENABLED", "CLKOS_FPHASE": "00000000000000000000000000000000", "DPHASE_SOURCE": "DISABLED", "FEEDBK_PATH": "CLKOP", "INTFB_WAKE": "DISABLED", "OUTDIVIDER_MUXA": "DIVA", "OUTDIVIDER_MUXB": "DIVB", "OUTDIVIDER_MUXC": "DIVC", "OUTDIVIDER_MUXD": "DIVD", "PLLRST_ENA": "DISABLED", "STDBY_ENABLE": "DISABLED" }, "attributes": { "ICP_CURRENT": "9", "LPF_RESISTOR": "8", "MFG_ENABLE_FILTEROPAMP": "1 ", "MFG_GMCREF_SEL": "2", "hdlname": "clock_instance pll_i", "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:12.9-16.4|clock.v:41.5-62.6" }, "port_directions": { "CLKFB": "input", "CLKI": "input", "CLKOP": "output", "CLKOS": "output", "CLKOS2": "output", "CLKOS3": "output", "ENCLKOP": "input", "ENCLKOS": "input", "ENCLKOS2": "input", "ENCLKOS3": "input", "INTLOCK": "output", "LOCK": "output", "PHASEDIR": "input", "PHASESEL0": "input", "PHASESEL1": "input", "PHASESTEP": "input", "PLLWAKESYNC": "input", "RST": "input", "STDBY": "input" }, "connections": { "CLKFB": [ 26 ], "CLKI": [ 2 ], "CLKOP": [ 26 ], "CLKOS": [ 11 ], "CLKOS2": [ 6 ], "CLKOS3": [ 27 ], "ENCLKOP": [ "0" ], "ENCLKOS": [ "0" ], "ENCLKOS2": [ "0" ], "ENCLKOS3": [ "0" ], "INTLOCK": [ 28 ], "LOCK": [ 29 ], "PHASEDIR": [ "0" ], "PHASESEL0": [ "0" ], "PHASESEL1": [ "0" ], "PHASESTEP": [ "0" ], "PLLWAKESYNC": [ "0" ], "RST": [ "0" ], "STDBY": [ "0" ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 30 ], "LSR": [ 31 ], "Q": [ 32 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 33 ], "LSR": [ 31 ], "Q": [ 34 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 35 ], "LSR": [ 31 ], "Q": [ 36 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 37 ], "LSR": [ 31 ], "Q": [ 38 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 39 ], "LSR": [ 31 ], "Q": [ 40 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 41 ], "LSR": [ 31 ], "Q": [ 42 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 43 ], "LSR": [ 31 ], "Q": [ 44 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 45 ], "LSR": [ 31 ], "Q": [ 46 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 47 ], "LSR": [ 31 ], "Q": [ 48 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:35.3-39.52|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 49 ], "LSR": [ 31 ], "Q": [ 50 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_DI_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:39.41-39.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 34 ], "B1": [ 32 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 51 ], "COUT": [ 52 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 33 ], "S1": [ 30 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_DI_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:39.41-39.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 38 ], "B1": [ 36 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 53 ], "COUT": [ 51 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 37 ], "S1": [ 35 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_DI_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:39.41-39.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 42 ], "B1": [ 40 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 54 ], "COUT": [ 53 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 41 ], "S1": [ 39 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_DI_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:39.41-39.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 46 ], "B1": [ 44 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 55 ], "COUT": [ 54 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 45 ], "S1": [ 43 ] } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_DI_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:39.41-39.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 50 ], "B1": [ 48 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ "0" ], "COUT": [ 55 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 49 ], "S1": [ 47 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 57 ], "LSR": [ 58 ], "Q": [ 59 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 60 ], "LSR": [ 61 ], "Q": [ 62 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 64 ], "Z": [ 60 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_1_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 61 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 65 ], "LSR": [ 66 ], "Q": [ 67 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_2_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 68 ], "Z": [ 65 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 66 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 69 ], "LSR": [ 70 ], "Q": [ 71 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 72 ], "Z": [ 69 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_3_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 70 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 73 ], "LSR": [ 74 ], "Q": [ 75 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_4_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 76 ], "Z": [ 73 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_4_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 74 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 77 ], "LSR": [ 78 ], "Q": [ 79 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 80 ], "Z": [ 77 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_5_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 78 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 81 ], "LSR": [ 82 ], "Q": [ 83 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_6_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 84 ], "Z": [ 81 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_6_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 82 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 85 ], "LSR": [ 86 ], "Q": [ 87 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 88 ], "Z": [ 85 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_7_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 86 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 89 ], "LSR": [ 90 ], "Q": [ 91 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_8_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 92 ], "Z": [ 89 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_8_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 90 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:41.3-46.8|/usr/local/bin/../share/yosys/ecp5/cells_map.v:88.171-88.230" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 56 ], "CLK": [ 6 ], "DI": [ 93 ], "LSR": [ 94 ], "Q": [ 95 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_9_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 96 ], "Z": [ 93 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_9_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 94 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 63 ], "D": [ 97 ], "Z": [ 57 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.41-45.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 62 ], "B1": [ 59 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 98 ], "COUT": [ 99 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 64 ], "S1": [ 97 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.41-45.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 71 ], "B1": [ 67 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 100 ], "COUT": [ 98 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 72 ], "S1": [ 68 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.41-45.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 79 ], "B1": [ 75 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 101 ], "COUT": [ 100 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 80 ], "S1": [ 76 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.41-45.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 87 ], "B1": [ 83 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 102 ], "COUT": [ 101 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 88 ], "S1": [ 84 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.41-45.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 95 ], "B1": [ 91 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ "0" ], "COUT": [ 102 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 96 ], "S1": [ 92 ] } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 58 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:55.3-56.50|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 103 ], "LSR": [ "0" ], "Q": [ 104 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 83 ], "B": [ 91 ], "C": [ 105 ], "D": [ 106 ], "Z": [ 103 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000001100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 95 ], "C": [ 87 ], "D": [ 107 ], "Z": [ 105 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 34 ], "B": [ 36 ], "C": [ 32 ], "D": [ 108 ], "Z": [ 106 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_D_CCU2C_COUT": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:56.36-56.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 62 ], "B1": [ 59 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 109 ], "COUT": [ 108 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 110 ], "S1": [ 111 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:56.36-56.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "1" ], "B0": [ 71 ], "B1": [ 67 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 112 ], "COUT": [ 109 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 113 ], "S1": [ 114 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:56.36-56.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "1" ], "B0": [ 79 ], "B1": [ 75 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 115 ], "COUT": [ 112 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 116 ], "S1": [ 117 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:56.36-56.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 87 ], "B1": [ 83 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 118 ], "COUT": [ 115 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 119 ], "S1": [ 120 ] } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:56.36-56.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 95 ], "B1": [ 91 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 118 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 121 ], "S1": [ 122 ] } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:80.3-88.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 123 ], "LSR": [ 124 ], "Q": [ 125 ] } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:80.3-88.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 126 ], "LSR": [ 124 ], "Q": [ 127 ] } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:80.3-88.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 128 ], "LSR": [ 124 ], "Q": [ 129 ] } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:80.3-88.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 130 ], "LSR": [ 124 ], "Q": [ 131 ] } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 131 ], "Z": [ 130 ] } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111111110000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 129 ], "B": [ 127 ], "C": [ 131 ], "D": [ 125 ], "Z": [ 123 ] } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_DI_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 129 ], "C": [ 131 ], "D": [ 127 ], "Z": [ 126 ] } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_DI_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 129 ], "D": [ 131 ], "Z": [ 128 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 132 ], "LSR": [ 133 ], "Q": [ 134 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 135 ], "LSR": [ 136 ], "Q": [ 137 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 138 ], "C": [ 134 ], "D": [ 16 ], "Z": [ 135 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_1_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 136 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 139 ], "LSR": [ 140 ], "Q": [ 141 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_2_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 142 ], "C": [ 137 ], "D": [ 16 ], "Z": [ 139 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 140 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 143 ], "LSR": [ 144 ], "Q": [ 145 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 146 ], "C": [ 141 ], "D": [ 16 ], "Z": [ 143 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_3_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 144 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 147 ], "LSR": [ 148 ], "Q": [ 149 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_4_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 150 ], "C": [ 145 ], "D": [ 16 ], "Z": [ 147 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_4_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 148 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 151 ], "LSR": [ 152 ], "Q": [ 153 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 154 ], "C": [ 149 ], "D": [ 16 ], "Z": [ 151 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_5_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 152 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 155 ], "LSR": [ 156 ], "Q": [ 157 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_6_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 158 ], "C": [ 153 ], "D": [ 16 ], "Z": [ 155 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_6_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 156 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 159 ], "LSR": [ 160 ], "Q": [ 161 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 162 ], "C": [ 157 ], "D": [ 16 ], "Z": [ 159 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_7_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 160 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 163 ], "LSR": [ 164 ], "Q": [ 15 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_8_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 165 ], "C": [ 161 ], "D": [ 16 ], "Z": [ 163 ] } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_8_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 164 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 166 ], "LSR": [ 133 ], "Q": [ 167 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 168 ], "LSR": [ 169 ], "Q": [ 170 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 171 ], "C": [ 167 ], "D": [ 16 ], "Z": [ 168 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_1_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 169 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 172 ], "LSR": [ 173 ], "Q": [ 174 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_2_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 175 ], "C": [ 170 ], "D": [ 16 ], "Z": [ 172 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 173 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 176 ], "LSR": [ 177 ], "Q": [ 178 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 179 ], "C": [ 174 ], "D": [ 16 ], "Z": [ 176 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_3_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 177 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 180 ], "LSR": [ 181 ], "Q": [ 182 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_4_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 183 ], "C": [ 178 ], "D": [ 16 ], "Z": [ 180 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_4_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 181 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 184 ], "LSR": [ 185 ], "Q": [ 186 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 187 ], "C": [ 182 ], "D": [ 16 ], "Z": [ 184 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_5_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 185 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 188 ], "LSR": [ 189 ], "Q": [ 190 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_6_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 191 ], "C": [ 186 ], "D": [ 16 ], "Z": [ 188 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_6_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 189 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 192 ], "LSR": [ 193 ], "Q": [ 194 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 195 ], "C": [ 190 ], "D": [ 16 ], "Z": [ 192 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_7_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 193 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 196 ], "LSR": [ 197 ], "Q": [ 21 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_8_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 198 ], "C": [ 194 ], "D": [ 16 ], "Z": [ 196 ] } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_8_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 197 ] } }, "llhdmi_instance.TMDS_shift_load_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:80.3-88.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 199 ], "LSR": [ 200 ], "Q": [ 16 ] } }, "llhdmi_instance.TMDS_shift_load_TRELLIS_FF_Q_DI_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 199 ], "D": [ 17 ], "Z": [ 124 ] } }, "llhdmi_instance.TMDS_shift_load_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 129 ], "B": [ 127 ], "C": [ 125 ], "D": [ 131 ], "Z": [ 199 ] } }, "llhdmi_instance.TMDS_shift_load_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 200 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 201 ], "LSR": [ 133 ], "Q": [ 202 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 203 ], "LSR": [ 204 ], "Q": [ 205 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 206 ], "C": [ 202 ], "D": [ 16 ], "Z": [ 203 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_1_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 204 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 207 ], "LSR": [ 208 ], "Q": [ 209 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_2_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 210 ], "C": [ 205 ], "D": [ 16 ], "Z": [ 207 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 208 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 211 ], "LSR": [ 212 ], "Q": [ 213 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 214 ], "C": [ 209 ], "D": [ 16 ], "Z": [ 211 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_3_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 212 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 215 ], "LSR": [ 216 ], "Q": [ 217 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_4_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 218 ], "C": [ 213 ], "D": [ 16 ], "Z": [ 215 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_4_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 216 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 219 ], "LSR": [ 220 ], "Q": [ 221 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 222 ], "C": [ 217 ], "D": [ 16 ], "Z": [ 219 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_5_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 220 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 223 ], "LSR": [ 224 ], "Q": [ 225 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_6_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 226 ], "C": [ 221 ], "D": [ 16 ], "Z": [ 223 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_6_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 224 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 227 ], "LSR": [ 228 ], "Q": [ 229 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 230 ], "C": [ 225 ], "D": [ 16 ], "Z": [ 227 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_7_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 228 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:94.3-104.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 11 ], "DI": [ 231 ], "LSR": [ 232 ], "Q": [ 25 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_8_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 233 ], "C": [ 229 ], "D": [ 16 ], "Z": [ 231 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_8_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 232 ] } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 17 ], "D": [ 16 ], "Z": [ 133 ] } }, "llhdmi_instance.encode_B.QM0_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 235 ], "LSR": [ 236 ], "Q": [ 237 ] } }, "llhdmi_instance.encode_B.QM0_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 240 ], "Z": [ 235 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 241 ], "LSR": [ "0" ], "Q": [ 132 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 242 ], "LSR": [ "0" ], "Q": [ 138 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011001100001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 243 ], "C": [ 244 ], "D": [ 104 ], "Z": [ 242 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 245 ], "LSR": [ "0" ], "Q": [ 142 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 246 ], "BLUT": [ 247 ], "C0": [ 104 ], "Z": [ 245 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 248 ], "C": [ 249 ], "D": [ 243 ], "Z": [ 246 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 249 ], "C": [ 250 ], "D": [ 251 ], "Z": [ 252 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 253 ], "C": [ 254 ], "D": [ 255 ], "Z": [ 249 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_SD": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 256 ], "D1": [ 257 ], "SD": [ 258 ], "Z": [ 243 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_SD_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 259 ], "D1": [ 260 ], "SD": [ 261 ], "Z": [ 257 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_SD_2": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 262 ], "D1": [ 263 ], "SD": [ 261 ], "Z": [ 256 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 264 ], "D1": [ 265 ], "SD": [ 266 ], "Z": [ 267 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 268 ], "D1": [ 269 ], "SD": [ 266 ], "Z": [ 253 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 270 ], "BLUT": [ 271 ], "C0": [ 272 ], "Z": [ 268 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001011001101001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 237 ], "B": [ 251 ], "C": [ 273 ], "D": [ 274 ], "Z": [ 270 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110100110010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 237 ], "B": [ 251 ], "C": [ 273 ], "D": [ 274 ], "Z": [ 271 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 275 ], "BLUT": [ 276 ], "C0": [ 272 ], "Z": [ 269 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110100110010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 237 ], "B": [ 251 ], "C": [ 273 ], "D": [ 274 ], "Z": [ 275 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001011001101001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 237 ], "B": [ 251 ], "C": [ 273 ], "D": [ 274 ], "Z": [ 276 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 277 ], "BLUT": [ 278 ], "C0": [ 273 ], "Z": [ 264 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001011101110001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 274 ], "B": [ 272 ], "C": [ 237 ], "D": [ 251 ], "Z": [ 277 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000100010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 274 ], "B": [ 272 ], "C": [ 237 ], "D": [ 251 ], "Z": [ 278 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 279 ], "BLUT": [ 280 ], "C0": [ 273 ], "Z": [ 265 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000100010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 274 ], "B": [ 272 ], "C": [ 237 ], "D": [ 251 ], "Z": [ 279 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001011101110001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 274 ], "B": [ 272 ], "C": [ 237 ], "D": [ 251 ], "Z": [ 280 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 253 ], "B": [ 254 ], "C": [ 255 ], "D": [ 237 ], "Z": [ 281 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 253 ], "B": [ 254 ], "C": [ 255 ], "D": [ 237 ], "Z": [ 282 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000011101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 253 ], "B": [ 254 ], "C": [ 255 ], "D": [ 237 ], "Z": [ 283 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 253 ], "B": [ 254 ], "C": [ 255 ], "D": [ 237 ], "Z": [ 284 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_4": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000011101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 253 ], "B": [ 254 ], "C": [ 255 ], "D": [ 237 ], "Z": [ 285 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111111011101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 237 ], "B": [ 251 ], "C": [ 273 ], "D": [ 266 ], "Z": [ 261 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 237 ], "B": [ 251 ], "C": [ 273 ], "D": [ 266 ], "Z": [ 258 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 286 ], "BLUT": [ 281 ], "C0": [ 267 ], "Z": [ 260 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_1": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 282 ], "BLUT": [ 287 ], "C0": [ 267 ], "Z": [ 259 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_1_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 287 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_2": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 283 ], "BLUT": [ 284 ], "C0": [ 267 ], "Z": [ 263 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_3": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 288 ], "BLUT": [ 285 ], "C0": [ 267 ], "Z": [ 262 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_3_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 288 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 286 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 244 ], "Z": [ 247 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 289 ], "LSR": [ "0" ], "Q": [ 146 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001101010101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 244 ], "B": [ 290 ], "C": [ 248 ], "D": [ 104 ], "Z": [ 289 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 291 ], "LSR": [ "0" ], "Q": [ 150 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_4_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110010101010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 244 ], "B": [ 248 ], "C": [ 292 ], "D": [ 104 ], "Z": [ 291 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 293 ], "LSR": [ "0" ], "Q": [ 154 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110001010101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 244 ], "B": [ 248 ], "C": [ 250 ], "D": [ 104 ], "Z": [ 293 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 294 ], "LSR": [ "0" ], "Q": [ 158 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_6_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110010101010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 244 ], "B": [ 248 ], "C": [ 295 ], "D": [ 104 ], "Z": [ 294 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 296 ], "LSR": [ "0" ], "Q": [ 162 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001101010101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 244 ], "B": [ 297 ], "C": [ 248 ], "D": [ 104 ], "Z": [ 296 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 297 ], "C": [ 254 ], "D": [ 273 ], "Z": [ 250 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 297 ], "D": [ 254 ], "Z": [ 298 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_C_Z_LUT4_A": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110100110010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 298 ], "B": [ 273 ], "C": [ 255 ], "D": [ 274 ], "Z": [ 290 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_C_Z_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001011001101001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 243 ], "B": [ 298 ], "C": [ 273 ], "D": [ 255 ], "Z": [ 292 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_C_Z_LUT4_D": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 243 ], "D": [ 298 ], "Z": [ 295 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 237 ], "C": [ 251 ], "D": [ 266 ], "Z": [ 297 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 299 ], "LSR": [ "0" ], "Q": [ 165 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110010101010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 244 ], "B": [ 300 ], "C": [ 301 ], "D": [ 104 ], "Z": [ 299 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_B_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 302 ], "C": [ 243 ], "D": [ 303 ], "Z": [ 300 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100101010100011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 250 ], "B": [ 301 ], "C": [ 243 ], "D": [ 251 ], "Z": [ 304 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 305 ], "D1": [ 306 ], "SD": [ 304 ], "Z": [ 307 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 308 ], "D1": [ 309 ], "SD": [ 304 ], "Z": [ 310 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_1_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 311 ], "D1": [ 312 ], "SD": [ 290 ], "Z": [ 308 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_1_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 313 ], "D1": [ 314 ], "SD": [ 290 ], "Z": [ 309 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 315 ], "D1": [ 316 ], "SD": [ 237 ], "Z": [ 305 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 317 ], "D1": [ 318 ], "SD": [ 237 ], "Z": [ 306 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 319 ], "D1": [ 320 ], "SD": [ 290 ], "Z": [ 321 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 322 ], "B": [ 323 ], "C": [ 324 ], "D": [ 325 ], "Z": [ 326 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 327 ], "BLUT": [ 328 ], "C0": [ 237 ], "Z": [ 329 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001011001101001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 252 ], "D": [ 290 ], "Z": [ 327 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110100110010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 252 ], "D": [ 290 ], "Z": [ 328 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000100000011110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 330 ], "D": [ 252 ], "Z": [ 331 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001111010000111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 330 ], "D": [ 252 ], "Z": [ 332 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110111010000111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 330 ], "D": [ 252 ], "Z": [ 333 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_2_Z_PFUMX_ALUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 333 ], "BLUT": [ 334 ], "C0": [ 290 ], "Z": [ 317 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000011111100001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 330 ], "D": [ 252 ], "Z": [ 334 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_4": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111011111100001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 330 ], "D": [ 252 ], "Z": [ 335 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_4_Z_PFUMX_ALUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 335 ], "BLUT": [ 336 ], "C0": [ 290 ], "Z": [ 316 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_5": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110000101111000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 330 ], "D": [ 252 ], "Z": [ 336 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_6": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000101111000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 330 ], "D": [ 252 ], "Z": [ 337 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_6_Z_PFUMX_ALUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 337 ], "BLUT": [ 338 ], "C0": [ 290 ], "Z": [ 315 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_7": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111100000011110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 330 ], "D": [ 252 ], "Z": [ 338 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_Z_PFUMX_ALUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 331 ], "BLUT": [ 332 ], "C0": [ 290 ], "Z": [ 318 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111011100010000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 237 ], "D": [ 330 ], "Z": [ 339 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110111111110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 237 ], "D": [ 330 ], "Z": [ 340 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_10": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000100000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 237 ], "C": [ 292 ], "D": [ 330 ], "Z": [ 341 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_10_Z_PFUMX_ALUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 341 ], "BLUT": [ 342 ], "C0": [ 252 ], "Z": [ 311 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_11": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000010110010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 237 ], "C": [ 292 ], "D": [ 330 ], "Z": [ 342 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111011100010000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 237 ], "D": [ 330 ], "Z": [ 343 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110111111110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 237 ], "D": [ 330 ], "Z": [ 344 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_4": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 237 ], "D": [ 330 ], "Z": [ 345 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_5": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111101110001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 292 ], "C": [ 237 ], "D": [ 330 ], "Z": [ 346 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_6": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0010000011111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 237 ], "C": [ 292 ], "D": [ 330 ], "Z": [ 347 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_6_Z_PFUMX_BLUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 348 ], "BLUT": [ 347 ], "C0": [ 252 ], "Z": [ 314 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_6_Z_PFUMX_BLUT_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111100001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 295 ], "C": [ 237 ], "D": [ 292 ], "Z": [ 348 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_7": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0010000011111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 237 ], "C": [ 292 ], "D": [ 330 ], "Z": [ 349 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_7_Z_PFUMX_ALUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 349 ], "BLUT": [ 350 ], "C0": [ 252 ], "Z": [ 313 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_8": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011001011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 237 ], "C": [ 292 ], "D": [ 330 ], "Z": [ 350 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_9": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000100000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 295 ], "B": [ 237 ], "C": [ 292 ], "D": [ 330 ], "Z": [ 351 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_9_Z_PFUMX_BLUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 352 ], "BLUT": [ 351 ], "C0": [ 252 ], "Z": [ 312 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_9_Z_PFUMX_BLUT_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 352 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001010010000010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 249 ], "B": [ 250 ], "C": [ 251 ], "D": [ 243 ], "Z": [ 330 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 353 ], "BLUT": [ 354 ], "C0": [ 304 ], "Z": [ 355 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_1": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 339 ], "BLUT": [ 340 ], "C0": [ 304 ], "Z": [ 356 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_2": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 343 ], "BLUT": [ 344 ], "C0": [ 304 ], "Z": [ 357 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_3": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 345 ], "BLUT": [ 346 ], "C0": [ 304 ], "Z": [ 358 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_3_Z_L6MUX21_D0": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 358 ], "D1": [ 357 ], "SD": [ 252 ], "Z": [ 319 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011111100000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 295 ], "C": [ 292 ], "D": [ 237 ], "Z": [ 353 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 354 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_Z_L6MUX21_D1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 356 ], "D1": [ 355 ], "SD": [ 252 ], "Z": [ 320 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 237 ], "D": [ 266 ], "Z": [ 301 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 359 ], "LSR": [ "0" ], "Q": [ 14 ] } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_9_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001110101010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 244 ], "B": [ 248 ], "C": [ 237 ], "D": [ 104 ], "Z": [ 359 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 360 ], "D1": [ 361 ], "SD": [ 325 ], "Z": [ 362 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 363 ], "D1": [ 364 ], "SD": [ 325 ], "Z": [ 365 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 366 ], "BLUT": [ 367 ], "C0": [ 310 ], "Z": [ 363 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111011111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 243 ], "B": [ 329 ], "C": [ 321 ], "D": [ 307 ], "Z": [ 366 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000010000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 243 ], "B": [ 329 ], "C": [ 321 ], "D": [ 307 ], "Z": [ 367 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 368 ], "BLUT": [ 369 ], "C0": [ 310 ], "Z": [ 364 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000010000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 243 ], "B": [ 329 ], "C": [ 321 ], "D": [ 307 ], "Z": [ 368 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111011111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 243 ], "B": [ 329 ], "C": [ 321 ], "D": [ 307 ], "Z": [ 369 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 370 ], "D1": [ 371 ], "SD": [ 325 ], "Z": [ 372 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 373 ], "BLUT": [ 374 ], "C0": [ 243 ], "Z": [ 370 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000001100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 329 ], "C": [ 326 ], "D": [ 310 ], "Z": [ 373 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 329 ], "C": [ 326 ], "D": [ 310 ], "Z": [ 374 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 375 ], "BLUT": [ 376 ], "C0": [ 243 ], "Z": [ 371 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 329 ], "C": [ 326 ], "D": [ 310 ], "Z": [ 375 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000001100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 329 ], "C": [ 326 ], "D": [ 310 ], "Z": [ 376 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 377 ], "D1": [ 378 ], "SD": [ 325 ], "Z": [ 379 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 380 ], "BLUT": [ 381 ], "C0": [ 243 ], "Z": [ 377 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 321 ], "B": [ 329 ], "C": [ 326 ], "D": [ 310 ], "Z": [ 380 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 321 ], "B": [ 329 ], "C": [ 326 ], "D": [ 310 ], "Z": [ 381 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 382 ], "BLUT": [ 383 ], "C0": [ 243 ], "Z": [ 378 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 321 ], "B": [ 329 ], "C": [ 326 ], "D": [ 310 ], "Z": [ 382 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 321 ], "B": [ 329 ], "C": [ 326 ], "D": [ 310 ], "Z": [ 383 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 384 ], "D1": [ 385 ], "SD": [ 325 ], "Z": [ 386 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 387 ], "D1": [ 388 ], "SD": [ 243 ], "Z": [ 384 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 389 ], "BLUT": [ 390 ], "C0": [ 310 ], "Z": [ 387 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 329 ], "Z": [ 389 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 307 ], "B": [ 321 ], "C": [ 329 ], "D": [ 326 ], "Z": [ 390 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 391 ], "BLUT": [ 392 ], "C0": [ 310 ], "Z": [ 388 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 307 ], "B": [ 321 ], "C": [ 329 ], "D": [ 326 ], "Z": [ 391 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 329 ], "Z": [ 392 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 393 ], "D1": [ 394 ], "SD": [ 243 ], "Z": [ 385 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 395 ], "BLUT": [ 396 ], "C0": [ 310 ], "Z": [ 393 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 307 ], "B": [ 321 ], "C": [ 329 ], "D": [ 326 ], "Z": [ 395 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 329 ], "Z": [ 396 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 397 ], "BLUT": [ 398 ], "C0": [ 310 ], "Z": [ 394 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 329 ], "Z": [ 397 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 307 ], "B": [ 321 ], "C": [ 329 ], "D": [ 326 ], "Z": [ 398 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 399 ], "BLUT": [ 400 ], "C0": [ 310 ], "Z": [ 360 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 243 ], "Z": [ 399 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 243 ], "Z": [ 400 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 401 ], "BLUT": [ 402 ], "C0": [ 310 ], "Z": [ 361 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 243 ], "Z": [ 401 ] } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 243 ], "Z": [ 402 ] } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 403 ], "LSR": [ 404 ], "Q": [ 325 ] } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 405 ], "LSR": [ 406 ], "Q": [ 324 ] } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_1_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 406 ] } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 407 ], "LSR": [ 408 ], "Q": [ 323 ] } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 408 ] } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:73.16-74.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 409 ], "LSR": [ 410 ], "Q": [ 322 ] } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_3_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 410 ] } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 404 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 411 ], "D": [ 302 ], "Z": [ 403 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 412 ], "C": [ 413 ], "D": [ 324 ], "Z": [ 405 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_B_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 414 ], "BLUT": [ 415 ], "C0": [ 323 ], "Z": [ 412 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_B_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110101110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 416 ], "B": [ 386 ], "C": [ 248 ], "D": [ 322 ], "Z": [ 414 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_B_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110101011111000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 416 ], "B": [ 386 ], "C": [ 248 ], "D": [ 322 ], "Z": [ 415 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 417 ], "D1": [ 418 ], "SD": [ 413 ], "Z": [ 419 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 420 ], "D1": [ 421 ], "SD": [ 413 ], "Z": [ 422 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 423 ], "BLUT": [ 424 ], "C0": [ 322 ], "Z": [ 420 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 416 ], "C": [ 248 ], "D": [ 323 ], "Z": [ 423 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111011101100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 416 ], "B": [ 248 ], "C": [ 386 ], "D": [ 323 ], "Z": [ 424 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 425 ], "BLUT": [ 426 ], "C0": [ 322 ], "Z": [ 421 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000011001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 416 ], "B": [ 248 ], "C": [ 386 ], "D": [ 323 ], "Z": [ 425 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100000011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 416 ], "C": [ 248 ], "D": [ 323 ], "Z": [ 426 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 427 ], "BLUT": [ 428 ], "C0": [ 322 ], "Z": [ 417 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011001111111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 416 ], "B": [ 248 ], "C": [ 386 ], "D": [ 323 ], "Z": [ 427 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 416 ], "C": [ 248 ], "D": [ 323 ], "Z": [ 428 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 429 ], "BLUT": [ 430 ], "C0": [ 322 ], "Z": [ 418 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 416 ], "C": [ 248 ], "D": [ 323 ], "Z": [ 429 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011001000100000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 416 ], "B": [ 248 ], "C": [ 386 ], "D": [ 323 ], "Z": [ 430 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 431 ], "D1": [ 432 ], "SD": [ 325 ], "Z": [ 413 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 433 ], "D1": [ 434 ], "SD": [ 243 ], "Z": [ 431 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 435 ], "BLUT": [ 436 ], "C0": [ 310 ], "Z": [ 433 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 321 ], "Z": [ 435 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 321 ], "B": [ 329 ], "C": [ 307 ], "D": [ 326 ], "Z": [ 436 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 437 ], "BLUT": [ 438 ], "C0": [ 310 ], "Z": [ 434 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 321 ], "B": [ 329 ], "C": [ 307 ], "D": [ 326 ], "Z": [ 437 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 321 ], "Z": [ 438 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 439 ], "D1": [ 440 ], "SD": [ 243 ], "Z": [ 432 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 441 ], "BLUT": [ 442 ], "C0": [ 310 ], "Z": [ 439 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 321 ], "B": [ 329 ], "C": [ 307 ], "D": [ 326 ], "Z": [ 441 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 321 ], "Z": [ 442 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 443 ], "BLUT": [ 444 ], "C0": [ 310 ], "Z": [ 440 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 321 ], "Z": [ 443 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 321 ], "B": [ 329 ], "C": [ 307 ], "D": [ 326 ], "Z": [ 444 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 386 ], "D": [ 322 ], "Z": [ 409 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_C_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 422 ], "D1": [ 419 ], "SD": [ 324 ], "Z": [ 411 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_D_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011101111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 329 ], "B": [ 307 ], "C": [ 321 ], "D": [ 326 ], "Z": [ 303 ] } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_D_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 310 ], "D": [ 325 ], "Z": [ 302 ] } }, "llhdmi_instance.encode_B.balance_acc_new_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 445 ], "BLUT": [ 446 ], "C0": [ 323 ], "Z": [ 407 ] } }, "llhdmi_instance.encode_B.balance_acc_new_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011111001000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 386 ], "B": [ 248 ], "C": [ 322 ], "D": [ 416 ], "Z": [ 445 ] } }, "llhdmi_instance.encode_B.balance_acc_new_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000110111110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 386 ], "B": [ 248 ], "C": [ 322 ], "D": [ 416 ], "Z": [ 446 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 447 ], "D1": [ 448 ], "SD": [ 449 ], "Z": [ 450 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 451 ], "D1": [ 452 ], "SD": [ 449 ], "Z": [ 453 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 454 ], "BLUT": [ 455 ], "C0": [ 456 ], "Z": [ 451 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 457 ], "B": [ 458 ], "C": [ 459 ], "D": [ 460 ], "Z": [ 454 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 458 ], "C": [ 459 ], "D": [ 460 ], "Z": [ 455 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 461 ], "BLUT": [ 462 ], "C0": [ 456 ], "Z": [ 452 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 459 ], "D": [ 460 ], "Z": [ 461 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 457 ], "B": [ 458 ], "C": [ 459 ], "D": [ 460 ], "Z": [ 462 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 463 ], "D1": [ 464 ], "SD": [ 449 ], "Z": [ 465 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 466 ], "BLUT": [ 467 ], "C0": [ 456 ], "Z": [ 463 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 458 ], "C": [ 460 ], "D": [ 457 ], "Z": [ 466 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101000101010101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 458 ], "C": [ 460 ], "D": [ 457 ], "Z": [ 467 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 469 ], "BLUT": [ 470 ], "C0": [ 456 ], "Z": [ 464 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011000000110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 468 ], "C": [ 460 ], "D": [ 457 ], "Z": [ 469 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 458 ], "C": [ 460 ], "D": [ 457 ], "Z": [ 470 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 471 ], "D1": [ 472 ], "SD": [ 449 ], "Z": [ 473 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 474 ], "BLUT": [ 475 ], "C0": [ 456 ], "Z": [ 471 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 458 ], "C": [ 460 ], "D": [ 457 ], "Z": [ 474 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100010101010101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 458 ], "C": [ 460 ], "D": [ 457 ], "Z": [ 475 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 476 ], "BLUT": [ 477 ], "C0": [ 456 ], "Z": [ 472 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 468 ], "Z": [ 476 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 458 ], "C": [ 460 ], "D": [ 457 ], "Z": [ 477 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_Z_L6MUX21_D0": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 473 ], "D1": [ 465 ], "SD": [ 459 ], "Z": [ 478 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 479 ], "BLUT": [ 480 ], "C0": [ 456 ], "Z": [ 447 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 457 ], "B": [ 458 ], "C": [ 459 ], "D": [ 460 ], "Z": [ 479 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 458 ], "C": [ 459 ], "D": [ 460 ], "Z": [ 480 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 481 ], "BLUT": [ 482 ], "C0": [ 456 ], "Z": [ 448 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 459 ], "D": [ 460 ], "Z": [ 481 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 457 ], "B": [ 458 ], "C": [ 459 ], "D": [ 460 ], "Z": [ 482 ] } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_Z_L6MUX21_D1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 453 ], "D1": [ 450 ], "SD": [ 483 ], "Z": [ 484 ] } }, "llhdmi_instance.encode_G.QM0_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 458 ], "B": [ 456 ], "C": [ 449 ], "D": [ 459 ], "Z": [ 485 ] } }, "llhdmi_instance.encode_G.QM0_LUT4_C_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001010000101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 458 ], "B": [ 456 ], "C": [ 449 ], "D": [ 459 ], "Z": [ 486 ] } }, "llhdmi_instance.encode_G.QM0_LUT4_C_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001010000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 457 ], "B": [ 456 ], "C": [ 449 ], "D": [ 458 ], "Z": [ 487 ] } }, "llhdmi_instance.encode_G.QM0_LUT4_C_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110101111010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 457 ], "B": [ 456 ], "C": [ 449 ], "D": [ 458 ], "Z": [ 488 ] } }, "llhdmi_instance.encode_G.QM0_LUT4_D": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 456 ], "C": [ 457 ], "D": [ 449 ], "Z": [ 489 ] } }, "llhdmi_instance.encode_G.QM0_LUT4_D_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 484 ], "C": [ 490 ], "D": [ 478 ], "Z": [ 491 ] } }, "llhdmi_instance.encode_G.QM0_LUT4_D_Z_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 484 ], "C": [ 490 ], "D": [ 478 ], "Z": [ 492 ] } }, "llhdmi_instance.encode_G.QM0_LUT4_D_Z_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 487 ], "BLUT": [ 488 ], "C0": [ 459 ], "Z": [ 493 ] } }, "llhdmi_instance.encode_G.QM0_PFUMX_C0": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 494 ], "BLUT": [ 495 ], "C0": [ 449 ], "Z": [ 496 ] } }, "llhdmi_instance.encode_G.QM0_PFUMX_C0_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011001101110001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 458 ], "B": [ 459 ], "C": [ 457 ], "D": [ 456 ], "Z": [ 494 ] } }, "llhdmi_instance.encode_G.QM0_PFUMX_C0_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 458 ], "B": [ 459 ], "C": [ 457 ], "D": [ 456 ], "Z": [ 495 ] } }, "llhdmi_instance.encode_G.QM0_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 497 ], "LSR": [ 236 ], "Q": [ 449 ] } }, "llhdmi_instance.encode_G.QM0_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 498 ], "Z": [ 497 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 499 ], "LSR": [ "0" ], "Q": [ 166 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 500 ], "LSR": [ "0" ], "Q": [ 171 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 490 ], "D": [ 104 ], "Z": [ 500 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 501 ], "LSR": [ 502 ], "Q": [ 175 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 502 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 503 ], "LSR": [ "0" ], "Q": [ 179 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 492 ], "C": [ 504 ], "D": [ 104 ], "Z": [ 503 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 505 ], "LSR": [ 506 ], "Q": [ 183 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_4_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 506 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 507 ], "LSR": [ "0" ], "Q": [ 187 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 492 ], "C": [ 508 ], "D": [ 104 ], "Z": [ 507 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 509 ], "LSR": [ 510 ], "Q": [ 191 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_6_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 510 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 511 ], "LSR": [ "0" ], "Q": [ 195 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 492 ], "C": [ 512 ], "D": [ 104 ], "Z": [ 511 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_A": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110100110010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 512 ], "B": [ 513 ], "C": [ 514 ], "D": [ 515 ], "Z": [ 516 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_A_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 449 ], "B": [ 517 ], "C": [ 513 ], "D": [ 518 ], "Z": [ 519 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_A_Z_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 449 ], "B": [ 517 ], "C": [ 513 ], "D": [ 518 ], "Z": [ 520 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 512 ], "C": [ 521 ], "D": [ 513 ], "Z": [ 508 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 522 ], "D1": [ 523 ], "SD": [ 520 ], "Z": [ 490 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 524 ], "D1": [ 525 ], "SD": [ 449 ], "Z": [ 522 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 526 ], "BLUT": [ 527 ], "C0": [ 528 ], "Z": [ 524 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000100010001110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 519 ], "B": [ 529 ], "C": [ 516 ], "D": [ 521 ], "Z": [ 526 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111011101110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 519 ], "B": [ 529 ], "C": [ 516 ], "D": [ 521 ], "Z": [ 527 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 530 ], "BLUT": [ 531 ], "C0": [ 528 ], "Z": [ 525 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111011101110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 519 ], "B": [ 529 ], "C": [ 516 ], "D": [ 521 ], "Z": [ 530 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110111011101111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 519 ], "B": [ 529 ], "C": [ 516 ], "D": [ 521 ], "Z": [ 531 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 532 ], "D1": [ 533 ], "SD": [ 449 ], "Z": [ 523 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 534 ], "BLUT": [ 535 ], "C0": [ 528 ], "Z": [ 532 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 534 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 535 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 536 ], "BLUT": [ 537 ], "C0": [ 528 ], "Z": [ 533 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 536 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 529 ], "C": [ 516 ], "D": [ 521 ], "Z": [ 537 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 449 ], "D": [ 518 ], "Z": [ 538 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 508 ], "C": [ 528 ], "D": [ 514 ], "Z": [ 504 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 516 ], "C": [ 521 ], "D": [ 528 ], "Z": [ 539 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 490 ], "C": [ 512 ], "D": [ 521 ], "Z": [ 457 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000100010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 514 ], "B": [ 515 ], "C": [ 512 ], "D": [ 513 ], "Z": [ 529 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 540 ], "D1": [ 541 ], "SD": [ 517 ], "Z": [ 459 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 542 ], "D1": [ 543 ], "SD": [ 528 ], "Z": [ 458 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 544 ], "BLUT": [ 545 ], "C0": [ 514 ], "Z": [ 542 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110000000000110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 490 ], "B": [ 508 ], "C": [ 539 ], "D": [ 517 ], "Z": [ 544 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011001100000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 490 ], "B": [ 508 ], "C": [ 539 ], "D": [ 517 ], "Z": [ 545 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 546 ], "BLUT": [ 547 ], "C0": [ 514 ], "Z": [ 543 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000100110010000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 490 ], "B": [ 508 ], "C": [ 539 ], "D": [ 517 ], "Z": [ 546 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000001001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 490 ], "B": [ 508 ], "C": [ 539 ], "D": [ 517 ], "Z": [ 547 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 548 ], "D1": [ 549 ], "SD": [ 517 ], "Z": [ 460 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 550 ], "BLUT": [ 551 ], "C0": [ 490 ], "Z": [ 548 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0010101100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 539 ], "B": [ 504 ], "C": [ 508 ], "D": [ 538 ], "Z": [ 550 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 539 ], "C": [ 504 ], "D": [ 508 ], "Z": [ 551 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 552 ], "BLUT": [ 553 ], "C0": [ 490 ], "Z": [ 549 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 539 ], "C": [ 504 ], "D": [ 508 ], "Z": [ 552 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 539 ], "B": [ 504 ], "C": [ 508 ], "D": [ 538 ], "Z": [ 553 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 554 ], "BLUT": [ 555 ], "C0": [ 490 ], "Z": [ 540 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1101010000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 539 ], "B": [ 504 ], "C": [ 508 ], "D": [ 538 ], "Z": [ 554 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 539 ], "C": [ 504 ], "D": [ 508 ], "Z": [ 555 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 556 ], "BLUT": [ 557 ], "C0": [ 490 ], "Z": [ 541 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111111110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 539 ], "C": [ 504 ], "D": [ 508 ], "Z": [ 556 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001011111101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 539 ], "B": [ 504 ], "C": [ 508 ], "D": [ 538 ], "Z": [ 557 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 560 ], "D": [ 483 ], "Z": [ 468 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 561 ], "BLUT": [ 562 ], "C0": [ 514 ], "Z": [ 456 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001011001101001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 539 ], "B": [ 490 ], "C": [ 508 ], "D": [ 517 ], "Z": [ 561 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110100110010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 539 ], "B": [ 490 ], "C": [ 508 ], "D": [ 517 ], "Z": [ 562 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 449 ], "C": [ 517 ], "D": [ 518 ], "Z": [ 512 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 563 ], "LSR": [ 564 ], "Q": [ 198 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_8_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 564 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 565 ], "LSR": [ 566 ], "Q": [ 20 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_9_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 566 ] } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 492 ], "D": [ 104 ], "Z": [ 499 ] } }, "llhdmi_instance.encode_G.TMDS_data_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 492 ], "C": [ 539 ], "D": [ 490 ], "Z": [ 501 ] } }, "llhdmi_instance.encode_G.TMDS_data_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001011001101001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 492 ], "B": [ 490 ], "C": [ 508 ], "D": [ 528 ], "Z": [ 505 ] } }, "llhdmi_instance.encode_G.TMDS_data_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 492 ], "D": [ 457 ], "Z": [ 509 ] } }, "llhdmi_instance.encode_G.TMDS_data_LUT4_Z_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 491 ], "D": [ 538 ], "Z": [ 563 ] } }, "llhdmi_instance.encode_G.TMDS_data_LUT4_Z_4": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 492 ], "D": [ 449 ], "Z": [ 565 ] } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 567 ], "LSR": [ 568 ], "Q": [ 483 ] } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 569 ], "LSR": [ 570 ], "Q": [ 560 ] } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_1_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 570 ] } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 571 ], "LSR": [ 572 ], "Q": [ 559 ] } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 572 ] } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:71.16-72.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 573 ], "LSR": [ 574 ], "Q": [ 558 ] } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_3_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 574 ] } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 568 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 575 ], "D1": [ 576 ], "SD": [ 484 ], "Z": [ 567 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 577 ], "D1": [ 578 ], "SD": [ 489 ], "Z": [ 571 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 579 ], "BLUT": [ 580 ], "C0": [ 559 ], "Z": [ 577 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0010100011010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 491 ], "B": [ 492 ], "C": [ 558 ], "D": [ 493 ], "Z": [ 579 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1101011100101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 491 ], "B": [ 492 ], "C": [ 558 ], "D": [ 493 ], "Z": [ 580 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 581 ], "BLUT": [ 582 ], "C0": [ 559 ], "Z": [ 578 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000110111110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 491 ], "B": [ 492 ], "C": [ 558 ], "D": [ 493 ], "Z": [ 581 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011111001000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 491 ], "B": [ 492 ], "C": [ 558 ], "D": [ 493 ], "Z": [ 582 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 583 ], "BLUT": [ 584 ], "C0": [ 560 ], "Z": [ 575 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111101000110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 585 ], "B": [ 586 ], "C": [ 492 ], "D": [ 587 ], "Z": [ 583 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011111100001010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 585 ], "B": [ 586 ], "C": [ 492 ], "D": [ 587 ], "Z": [ 584 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 588 ], "D1": [ 589 ], "SD": [ 493 ], "Z": [ 586 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 590 ], "D1": [ 591 ], "SD": [ 493 ], "Z": [ 585 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 592 ], "D1": [ 593 ], "SD": [ 489 ], "Z": [ 590 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 594 ], "BLUT": [ 595 ], "C0": [ 490 ], "Z": [ 592 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000001110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 594 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 595 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 596 ], "BLUT": [ 597 ], "C0": [ 490 ], "Z": [ 593 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000100000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 596 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100010001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 597 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 598 ], "D1": [ 599 ], "SD": [ 489 ], "Z": [ 591 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 600 ], "BLUT": [ 601 ], "C0": [ 490 ], "Z": [ 598 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011001100010011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 600 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001001100110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 601 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 602 ], "BLUT": [ 603 ], "C0": [ 490 ], "Z": [ 599 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111011100110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 602 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011011101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 603 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 604 ], "D1": [ 605 ], "SD": [ 460 ], "Z": [ 587 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 606 ], "BLUT": [ 607 ], "C0": [ 608 ], "Z": [ 604 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000101010101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 496 ], "B": [ 468 ], "C": [ 490 ], "D": [ 483 ], "Z": [ 606 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 496 ], "Z": [ 607 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 609 ], "BLUT": [ 610 ], "C0": [ 608 ], "Z": [ 605 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010001000101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 496 ], "B": [ 468 ], "C": [ 490 ], "D": [ 483 ], "Z": [ 609 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 496 ], "Z": [ 610 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 611 ], "D1": [ 612 ], "SD": [ 489 ], "Z": [ 588 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 613 ], "BLUT": [ 614 ], "C0": [ 490 ], "Z": [ 611 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111100011111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 613 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 614 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 615 ], "BLUT": [ 616 ], "C0": [ 490 ], "Z": [ 612 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111011111110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 615 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111011101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 616 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 617 ], "D1": [ 618 ], "SD": [ 489 ], "Z": [ 589 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 619 ], "BLUT": [ 620 ], "C0": [ 490 ], "Z": [ 617 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011001101110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 619 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111001100110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 620 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 621 ], "BLUT": [ 622 ], "C0": [ 490 ], "Z": [ 618 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000100110001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 621 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011000100010001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 559 ], "C": [ 478 ], "D": [ 484 ], "Z": [ 622 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 623 ], "BLUT": [ 624 ], "C0": [ 560 ], "Z": [ 576 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000010111001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 585 ], "B": [ 586 ], "C": [ 492 ], "D": [ 587 ], "Z": [ 623 ] } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100000011110101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 585 ], "B": [ 586 ], "C": [ 492 ], "D": [ 587 ], "Z": [ 624 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 625 ], "D": [ 626 ], "Z": [ 569 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 491 ], "C": [ 489 ], "D": [ 558 ], "Z": [ 573 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 627 ], "D1": [ 628 ], "SD": [ 490 ], "Z": [ 626 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 629 ], "D1": [ 630 ], "SD": [ 560 ], "Z": [ 625 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 631 ], "D1": [ 632 ], "SD": [ 460 ], "Z": [ 629 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 633 ], "BLUT": [ 634 ], "C0": [ 496 ], "Z": [ 631 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011111111111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 608 ], "C": [ 490 ], "D": [ 483 ], "Z": [ 633 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 634 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_C0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 485 ], "BLUT": [ 486 ], "C0": [ 457 ], "Z": [ 608 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 635 ], "BLUT": [ 636 ], "C0": [ 496 ], "Z": [ 632 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 635 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111101110111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 608 ], "C": [ 490 ], "D": [ 483 ], "Z": [ 636 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 637 ], "D1": [ 638 ], "SD": [ 460 ], "Z": [ 630 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 639 ], "BLUT": [ 640 ], "C0": [ 496 ], "Z": [ 637 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 608 ], "C": [ 490 ], "D": [ 483 ], "Z": [ 639 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 640 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 641 ], "BLUT": [ 642 ], "C0": [ 496 ], "Z": [ 638 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 641 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000010001000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 468 ], "B": [ 608 ], "C": [ 490 ], "D": [ 483 ], "Z": [ 642 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 643 ], "D1": [ 644 ], "SD": [ 559 ], "Z": [ 627 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 645 ], "BLUT": [ 646 ], "C0": [ 493 ], "Z": [ 643 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 484 ], "D": [ 478 ], "Z": [ 645 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1101101110111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 489 ], "C": [ 484 ], "D": [ 478 ], "Z": [ 646 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 647 ], "BLUT": [ 648 ], "C0": [ 493 ], "Z": [ 644 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001101110111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 489 ], "C": [ 484 ], "D": [ 478 ], "Z": [ 647 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 489 ], "C": [ 484 ], "D": [ 478 ], "Z": [ 648 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 649 ], "D1": [ 650 ], "SD": [ 559 ], "Z": [ 628 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 651 ], "BLUT": [ 652 ], "C0": [ 493 ], "Z": [ 649 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111001001110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 489 ], "C": [ 484 ], "D": [ 478 ], "Z": [ 651 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111110011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 489 ], "C": [ 484 ], "D": [ 478 ], "Z": [ 652 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 653 ], "BLUT": [ 654 ], "C0": [ 493 ], "Z": [ 650 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 484 ], "D": [ 478 ], "Z": [ 653 ] } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111111001110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 558 ], "B": [ 489 ], "C": [ 484 ], "D": [ 478 ], "Z": [ 654 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 655 ], "D1": [ 656 ], "SD": [ 657 ], "Z": [ 658 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 659 ], "D1": [ 660 ], "SD": [ 657 ], "Z": [ 661 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 662 ], "BLUT": [ 663 ], "C0": [ 664 ], "Z": [ 659 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 665 ], "B": [ 666 ], "C": [ 667 ], "D": [ 668 ], "Z": [ 662 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 666 ], "C": [ 667 ], "D": [ 668 ], "Z": [ 663 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 669 ], "BLUT": [ 670 ], "C0": [ 664 ], "Z": [ 660 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 667 ], "D": [ 668 ], "Z": [ 669 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 665 ], "B": [ 666 ], "C": [ 667 ], "D": [ 668 ], "Z": [ 670 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 671 ], "D1": [ 672 ], "SD": [ 657 ], "Z": [ 673 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 674 ], "BLUT": [ 675 ], "C0": [ 664 ], "Z": [ 671 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 666 ], "C": [ 668 ], "D": [ 665 ], "Z": [ 674 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101000101010101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 666 ], "C": [ 668 ], "D": [ 665 ], "Z": [ 675 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 677 ], "BLUT": [ 678 ], "C0": [ 664 ], "Z": [ 672 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011000000110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 676 ], "C": [ 668 ], "D": [ 665 ], "Z": [ 677 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 666 ], "C": [ 668 ], "D": [ 665 ], "Z": [ 678 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 679 ], "D1": [ 680 ], "SD": [ 657 ], "Z": [ 681 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 682 ], "BLUT": [ 683 ], "C0": [ 664 ], "Z": [ 679 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 666 ], "C": [ 668 ], "D": [ 665 ], "Z": [ 682 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100010101010101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 666 ], "C": [ 668 ], "D": [ 665 ], "Z": [ 683 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 684 ], "BLUT": [ 685 ], "C0": [ 664 ], "Z": [ 680 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 676 ], "Z": [ 684 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010101010001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 666 ], "C": [ 668 ], "D": [ 665 ], "Z": [ 685 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_Z_L6MUX21_D0": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 681 ], "D1": [ 673 ], "SD": [ 667 ], "Z": [ 686 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 687 ], "BLUT": [ 688 ], "C0": [ 664 ], "Z": [ 655 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 665 ], "B": [ 666 ], "C": [ 667 ], "D": [ 668 ], "Z": [ 687 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 666 ], "C": [ 667 ], "D": [ 668 ], "Z": [ 688 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 689 ], "BLUT": [ 690 ], "C0": [ 664 ], "Z": [ 656 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 667 ], "D": [ 668 ], "Z": [ 689 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 665 ], "B": [ 666 ], "C": [ 667 ], "D": [ 668 ], "Z": [ 690 ] } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_Z_L6MUX21_D1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 661 ], "D1": [ 658 ], "SD": [ 691 ], "Z": [ 692 ] } }, "llhdmi_instance.encode_R.QM0_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 666 ], "B": [ 664 ], "C": [ 657 ], "D": [ 667 ], "Z": [ 693 ] } }, "llhdmi_instance.encode_R.QM0_LUT4_C_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001010000101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 666 ], "B": [ 664 ], "C": [ 657 ], "D": [ 667 ], "Z": [ 694 ] } }, "llhdmi_instance.encode_R.QM0_LUT4_C_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001010000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 665 ], "B": [ 664 ], "C": [ 657 ], "D": [ 666 ], "Z": [ 695 ] } }, "llhdmi_instance.encode_R.QM0_LUT4_C_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110101111010100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 665 ], "B": [ 664 ], "C": [ 657 ], "D": [ 666 ], "Z": [ 696 ] } }, "llhdmi_instance.encode_R.QM0_LUT4_D": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 664 ], "C": [ 665 ], "D": [ 657 ], "Z": [ 697 ] } }, "llhdmi_instance.encode_R.QM0_LUT4_D_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 692 ], "C": [ 698 ], "D": [ 686 ], "Z": [ 699 ] } }, "llhdmi_instance.encode_R.QM0_LUT4_D_Z_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 692 ], "C": [ 698 ], "D": [ 686 ], "Z": [ 700 ] } }, "llhdmi_instance.encode_R.QM0_LUT4_D_Z_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 695 ], "BLUT": [ 696 ], "C0": [ 667 ], "Z": [ 701 ] } }, "llhdmi_instance.encode_R.QM0_PFUMX_C0": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 702 ], "BLUT": [ 703 ], "C0": [ 657 ], "Z": [ 704 ] } }, "llhdmi_instance.encode_R.QM0_PFUMX_C0_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011001101110001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 666 ], "B": [ 667 ], "C": [ 665 ], "D": [ 664 ], "Z": [ 702 ] } }, "llhdmi_instance.encode_R.QM0_PFUMX_C0_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 666 ], "B": [ 667 ], "C": [ 665 ], "D": [ 664 ], "Z": [ 703 ] } }, "llhdmi_instance.encode_R.QM0_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 705 ], "LSR": [ 236 ], "Q": [ 657 ] } }, "llhdmi_instance.encode_R.QM0_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 706 ], "Z": [ 705 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 707 ], "LSR": [ "0" ], "Q": [ 201 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 708 ], "LSR": [ "0" ], "Q": [ 206 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 698 ], "D": [ 104 ], "Z": [ 708 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 709 ], "LSR": [ 710 ], "Q": [ 210 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 710 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 711 ], "LSR": [ "0" ], "Q": [ 214 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 700 ], "C": [ 712 ], "D": [ 104 ], "Z": [ 711 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 713 ], "LSR": [ 714 ], "Q": [ 218 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_4_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 714 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 715 ], "LSR": [ "0" ], "Q": [ 222 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 700 ], "C": [ 716 ], "D": [ 104 ], "Z": [ 715 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 717 ], "LSR": [ 718 ], "Q": [ 226 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_6_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 718 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 719 ], "LSR": [ "0" ], "Q": [ 230 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 700 ], "C": [ 720 ], "D": [ 104 ], "Z": [ 719 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_A": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110100110010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 720 ], "B": [ 721 ], "C": [ 722 ], "D": [ 723 ], "Z": [ 724 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_A_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 657 ], "B": [ 725 ], "C": [ 721 ], "D": [ 726 ], "Z": [ 727 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_A_Z_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 657 ], "B": [ 725 ], "C": [ 721 ], "D": [ 726 ], "Z": [ 728 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011110011000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 720 ], "C": [ 729 ], "D": [ 721 ], "Z": [ 716 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 730 ], "D1": [ 731 ], "SD": [ 728 ], "Z": [ 698 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 732 ], "D1": [ 733 ], "SD": [ 657 ], "Z": [ 730 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 734 ], "BLUT": [ 735 ], "C0": [ 736 ], "Z": [ 732 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000100010001110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 727 ], "B": [ 737 ], "C": [ 724 ], "D": [ 729 ], "Z": [ 734 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111011101110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 727 ], "B": [ 737 ], "C": [ 724 ], "D": [ 729 ], "Z": [ 735 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 738 ], "BLUT": [ 739 ], "C0": [ 736 ], "Z": [ 733 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111011101110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 727 ], "B": [ 737 ], "C": [ 724 ], "D": [ 729 ], "Z": [ 738 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110111011101111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 727 ], "B": [ 737 ], "C": [ 724 ], "D": [ 729 ], "Z": [ 739 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 740 ], "D1": [ 741 ], "SD": [ 657 ], "Z": [ 731 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 742 ], "BLUT": [ 743 ], "C0": [ 736 ], "Z": [ 740 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 742 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 743 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 744 ], "BLUT": [ 745 ], "C0": [ 736 ], "Z": [ 741 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 744 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 737 ], "C": [ 724 ], "D": [ 729 ], "Z": [ 745 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 657 ], "D": [ 726 ], "Z": [ 746 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 716 ], "C": [ 736 ], "D": [ 722 ], "Z": [ 712 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 724 ], "C": [ 729 ], "D": [ 736 ], "Z": [ 747 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 698 ], "C": [ 720 ], "D": [ 729 ], "Z": [ 665 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000100010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 722 ], "B": [ 723 ], "C": [ 720 ], "D": [ 721 ], "Z": [ 737 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 748 ], "D1": [ 749 ], "SD": [ 725 ], "Z": [ 667 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 750 ], "D1": [ 751 ], "SD": [ 736 ], "Z": [ 666 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 752 ], "BLUT": [ 753 ], "C0": [ 722 ], "Z": [ 750 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110000000000110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 698 ], "B": [ 716 ], "C": [ 747 ], "D": [ 725 ], "Z": [ 752 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011001100000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 698 ], "B": [ 716 ], "C": [ 747 ], "D": [ 725 ], "Z": [ 753 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 754 ], "BLUT": [ 755 ], "C0": [ 722 ], "Z": [ 751 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000100110010000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 698 ], "B": [ 716 ], "C": [ 747 ], "D": [ 725 ], "Z": [ 754 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000001001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 698 ], "B": [ 716 ], "C": [ 747 ], "D": [ 725 ], "Z": [ 755 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 756 ], "D1": [ 757 ], "SD": [ 725 ], "Z": [ 668 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 758 ], "BLUT": [ 759 ], "C0": [ 698 ], "Z": [ 756 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0010101100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 747 ], "B": [ 712 ], "C": [ 716 ], "D": [ 746 ], "Z": [ 758 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 747 ], "C": [ 712 ], "D": [ 716 ], "Z": [ 759 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 760 ], "BLUT": [ 761 ], "C0": [ 698 ], "Z": [ 757 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 747 ], "C": [ 712 ], "D": [ 716 ], "Z": [ 760 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 747 ], "B": [ 712 ], "C": [ 716 ], "D": [ 746 ], "Z": [ 761 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 762 ], "BLUT": [ 763 ], "C0": [ 698 ], "Z": [ 748 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1101010000101011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 747 ], "B": [ 712 ], "C": [ 716 ], "D": [ 746 ], "Z": [ 762 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 747 ], "C": [ 712 ], "D": [ 716 ], "Z": [ 763 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 764 ], "BLUT": [ 765 ], "C0": [ 698 ], "Z": [ 749 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111111110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 747 ], "C": [ 712 ], "D": [ 716 ], "Z": [ 764 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001011111101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 747 ], "B": [ 712 ], "C": [ 716 ], "D": [ 746 ], "Z": [ 765 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 768 ], "D": [ 691 ], "Z": [ 676 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 769 ], "BLUT": [ 770 ], "C0": [ 722 ], "Z": [ 664 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001011001101001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 747 ], "B": [ 698 ], "C": [ 716 ], "D": [ 725 ], "Z": [ 769 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0110100110010110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 747 ], "B": [ 698 ], "C": [ 716 ], "D": [ 725 ], "Z": [ 770 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 657 ], "C": [ 725 ], "D": [ 726 ], "Z": [ 720 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 771 ], "LSR": [ 772 ], "Q": [ 233 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_8_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 772 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 773 ], "LSR": [ 774 ], "Q": [ 24 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_9_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 774 ] } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 700 ], "D": [ 104 ], "Z": [ 707 ] } }, "llhdmi_instance.encode_R.TMDS_data_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 700 ], "C": [ 747 ], "D": [ 698 ], "Z": [ 709 ] } }, "llhdmi_instance.encode_R.TMDS_data_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001011001101001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 700 ], "B": [ 698 ], "C": [ 716 ], "D": [ 736 ], "Z": [ 713 ] } }, "llhdmi_instance.encode_R.TMDS_data_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 700 ], "D": [ 665 ], "Z": [ 717 ] } }, "llhdmi_instance.encode_R.TMDS_data_LUT4_Z_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 700 ], "C": [ 698 ], "D": [ 746 ], "Z": [ 771 ] } }, "llhdmi_instance.encode_R.TMDS_data_LUT4_Z_4": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 700 ], "D": [ 657 ], "Z": [ 773 ] } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 775 ], "LSR": [ 776 ], "Q": [ 691 ] } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 777 ], "LSR": [ 778 ], "Q": [ 768 ] } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_1_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 778 ] } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 779 ], "LSR": [ 780 ], "Q": [ 767 ] } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 780 ] } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:46.1-46.67|llhdmi.v:69.16-70.73|/usr/local/bin/../share/yosys/ecp5/cells_map.v:68.164-68.215" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 781 ], "LSR": [ 782 ], "Q": [ 766 ] } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_3_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 782 ] } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 104 ], "Z": [ 776 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 783 ], "D1": [ 784 ], "SD": [ 692 ], "Z": [ 775 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 785 ], "D1": [ 786 ], "SD": [ 697 ], "Z": [ 779 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 787 ], "BLUT": [ 788 ], "C0": [ 767 ], "Z": [ 785 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0010100011010111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 699 ], "B": [ 700 ], "C": [ 766 ], "D": [ 701 ], "Z": [ 787 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1101011100101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 699 ], "B": [ 700 ], "C": [ 766 ], "D": [ 701 ], "Z": [ 788 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 789 ], "BLUT": [ 790 ], "C0": [ 767 ], "Z": [ 786 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000110111110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 699 ], "B": [ 700 ], "C": [ 766 ], "D": [ 701 ], "Z": [ 789 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011111001000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 699 ], "B": [ 700 ], "C": [ 766 ], "D": [ 701 ], "Z": [ 790 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 791 ], "BLUT": [ 792 ], "C0": [ 768 ], "Z": [ 783 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111101011000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 793 ], "B": [ 794 ], "C": [ 700 ], "D": [ 795 ], "Z": [ 791 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111100001010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 793 ], "B": [ 794 ], "C": [ 700 ], "D": [ 795 ], "Z": [ 792 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 796 ], "D1": [ 797 ], "SD": [ 701 ], "Z": [ 794 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 798 ], "D1": [ 799 ], "SD": [ 701 ], "Z": [ 793 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 800 ], "D1": [ 801 ], "SD": [ 697 ], "Z": [ 798 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 802 ], "BLUT": [ 803 ], "C0": [ 698 ], "Z": [ 800 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000001110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 802 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 803 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 804 ], "BLUT": [ 805 ], "C0": [ 698 ], "Z": [ 801 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000100000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 804 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100010001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 805 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 806 ], "D1": [ 807 ], "SD": [ 697 ], "Z": [ 799 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 808 ], "BLUT": [ 809 ], "C0": [ 698 ], "Z": [ 806 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011001100010011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 808 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001001100110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 809 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 810 ], "BLUT": [ 811 ], "C0": [ 698 ], "Z": [ 807 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111011100110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 810 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011011101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 811 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:155.21-155.62" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 812 ], "D1": [ 813 ], "SD": [ 668 ], "Z": [ 795 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 814 ], "BLUT": [ 815 ], "C0": [ 816 ], "Z": [ 812 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000101010101000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:145.39-146.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 704 ], "B": [ 676 ], "C": [ 698 ], "D": [ 691 ], "Z": [ 814 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:143.39-144.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 704 ], "Z": [ 815 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 817 ], "BLUT": [ 818 ], "C0": [ 816 ], "Z": [ 813 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010001000101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 704 ], "B": [ 676 ], "C": [ 698 ], "D": [ 691 ], "Z": [ 817 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 704 ], "Z": [ 818 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 819 ], "D1": [ 820 ], "SD": [ 697 ], "Z": [ 796 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 821 ], "BLUT": [ 822 ], "C0": [ 698 ], "Z": [ 819 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011100000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 821 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 822 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 823 ], "BLUT": [ 824 ], "C0": [ 698 ], "Z": [ 820 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000100000001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 823 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000100010001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 824 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 825 ], "D1": [ 826 ], "SD": [ 697 ], "Z": [ 797 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 827 ], "BLUT": [ 828 ], "C0": [ 698 ], "Z": [ 825 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110010001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 827 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000110011001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 828 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 829 ], "BLUT": [ 830 ], "C0": [ 698 ], "Z": [ 826 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110111011001110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 829 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111011101110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 767 ], "C": [ 686 ], "D": [ 692 ], "Z": [ 830 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:154.19-154.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 831 ], "BLUT": [ 832 ], "C0": [ 768 ], "Z": [ 784 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000010100111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:150.39-151.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 793 ], "B": [ 794 ], "C": [ 700 ], "D": [ 795 ], "Z": [ 831 ] } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011000011110101" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:148.39-149.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 793 ], "B": [ 794 ], "C": [ 700 ], "D": [ 795 ], "Z": [ 832 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 833 ], "D": [ 834 ], "Z": [ 777 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 699 ], "C": [ 697 ], "D": [ 766 ], "Z": [ 781 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 835 ], "D1": [ 836 ], "SD": [ 698 ], "Z": [ 834 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 837 ], "D1": [ 838 ], "SD": [ 768 ], "Z": [ 833 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 839 ], "D1": [ 840 ], "SD": [ 668 ], "Z": [ 837 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 841 ], "BLUT": [ 842 ], "C0": [ 704 ], "Z": [ 839 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011111111111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 816 ], "C": [ 698 ], "D": [ 691 ], "Z": [ 841 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 842 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_C0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 693 ], "BLUT": [ 694 ], "C0": [ 665 ], "Z": [ 816 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 843 ], "BLUT": [ 844 ], "C0": [ 704 ], "Z": [ 840 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 843 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111101110111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 816 ], "C": [ 698 ], "D": [ 691 ], "Z": [ 844 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 845 ], "D1": [ 846 ], "SD": [ 668 ], "Z": [ 838 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 847 ], "BLUT": [ 848 ], "C0": [ 704 ], "Z": [ 845 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 816 ], "C": [ 698 ], "D": [ 691 ], "Z": [ 847 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 848 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 849 ], "BLUT": [ 850 ], "C0": [ 704 ], "Z": [ 846 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 849 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000010001000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 676 ], "B": [ 816 ], "C": [ 698 ], "D": [ 691 ], "Z": [ 850 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 851 ], "D1": [ 852 ], "SD": [ 767 ], "Z": [ 835 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 853 ], "BLUT": [ 854 ], "C0": [ 701 ], "Z": [ 851 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:161.39-162.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 692 ], "D": [ 686 ], "Z": [ 853 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1101101110111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:159.39-160.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 697 ], "C": [ 692 ], "D": [ 686 ], "Z": [ 854 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 855 ], "BLUT": [ 856 ], "C0": [ 701 ], "Z": [ 852 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001101110111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:166.39-167.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 697 ], "C": [ 692 ], "D": [ 686 ], "Z": [ 855 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:164.39-165.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 697 ], "C": [ 692 ], "D": [ 686 ], "Z": [ 856 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:184.21-184.64" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 857 ], "D1": [ 858 ], "SD": [ 767 ], "Z": [ 836 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 859 ], "BLUT": [ 860 ], "C0": [ 701 ], "Z": [ 857 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111001001110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:171.39-172.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 697 ], "C": [ 692 ], "D": [ 686 ], "Z": [ 859 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111110011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:169.39-170.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 697 ], "C": [ 692 ], "D": [ 686 ], "Z": [ 860 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:182.19-182.65" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 861 ], "BLUT": [ 862 ], "C0": [ 701 ], "Z": [ 858 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:176.41-177.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 692 ], "D": [ 686 ], "Z": [ 861 ] } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111111001110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:174.41-175.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 766 ], "B": [ 697 ], "C": [ 692 ], "D": [ 686 ], "Z": [ 862 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:61.3-62.48|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 863 ], "LSR": [ "0" ], "Q": [ 244 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 864 ], "C": [ 865 ], "D": [ 866 ], "Z": [ 863 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_B_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 34 ], "B": [ 867 ], "C": [ 32 ], "D": [ 868 ], "Z": [ 864 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_B_LUT4_Z_B_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 38 ], "B": [ 48 ], "C": [ 46 ], "D": [ 44 ], "Z": [ 867 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_B_LUT4_Z_B_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 50 ], "B": [ 40 ], "C": [ 36 ], "D": [ 42 ], "Z": [ 868 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_COUT": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.15-62.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 34 ], "A1": [ 32 ], "B0": [ "0" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 869 ], "COUT": [ 865 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 870 ], "S1": [ 871 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.15-62.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 38 ], "A1": [ 36 ], "B0": [ "0" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 872 ], "COUT": [ 869 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 873 ], "S1": [ 874 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.15-62.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 42 ], "A1": [ 40 ], "B0": [ "1" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 872 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 875 ], "S1": [ 876 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.34-62.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 34 ], "A1": [ 32 ], "B0": [ "0" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 877 ], "COUT": [ 866 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 878 ], "S1": [ 879 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.34-62.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 38 ], "A1": [ 36 ], "B0": [ "1" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 880 ], "COUT": [ 877 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 881 ], "S1": [ 882 ] } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.34-62.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 42 ], "A1": [ 40 ], "B0": [ "1" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 880 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 883 ], "S1": [ 884 ] } }, "llhdmi_instance.o_newframe_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 885 ], "D": [ 17 ], "Z": [ 886 ] } }, "llhdmi_instance.o_newframe_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:49.3-52.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 887 ], "LSR": [ "0" ], "Q": [ 885 ] } }, "llhdmi_instance.o_newframe_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 888 ], "B": [ 889 ], "C": [ 95 ], "D": [ 79 ], "Z": [ 887 ] } }, "llhdmi_instance.o_newline_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 236 ], "D": [ 17 ], "Z": [ 890 ] } }, "llhdmi_instance.o_newline_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:49.3-52.6|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 888 ], "LSR": [ "0" ], "Q": [ 236 ] } }, "llhdmi_instance.o_rd_LUT4_D": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 891 ], "C": [ 892 ], "D": [ 234 ], "Z": [ 893 ] } }, "llhdmi_instance.o_rd_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 104 ], "D": [ 17 ], "Z": [ 234 ] } }, "llhdmi_instance.vSync_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101010111000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 248 ], "B": [ 244 ], "C": [ 894 ], "D": [ 104 ], "Z": [ 241 ] } }, "llhdmi_instance.vSync_LUT4_C_A_L6MUX21_Z": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 365 ], "D1": [ 362 ], "SD": [ 326 ], "Z": [ 248 ] } }, "llhdmi_instance.vSync_LUT4_C_A_L6MUX21_Z_1": { "hide_name": 0, "type": "L6MUX21", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:185.21-185.63" }, "port_directions": { "D0": "input", "D1": "input", "SD": "input", "Z": "output" }, "connections": { "D0": [ 379 ], "D1": [ 372 ], "SD": [ 307 ], "Z": [ 416 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:64.3-65.48|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 895 ], "LSR": [ "0" ], "Q": [ 894 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 107 ], "B": [ 896 ], "C": [ 897 ], "D": [ 898 ], "Z": [ 895 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 79 ], "C": [ 75 ], "D": [ 899 ], "Z": [ 107 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 75 ], "B": [ 900 ], "C": [ 899 ], "D": [ 91 ], "Z": [ 889 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_B_LUT4_D": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000001100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 95 ], "C": [ 91 ], "D": [ 900 ], "Z": [ 896 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_B_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 87 ], "D": [ 83 ], "Z": [ 900 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 34 ], "B": [ 901 ], "C": [ 32 ], "D": [ 902 ], "Z": [ 888 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z_B_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 36 ], "B": [ 42 ], "C": [ 40 ], "D": [ 38 ], "Z": [ 901 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z_D_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 36 ], "B": [ 903 ], "C": [ 42 ], "D": [ 902 ], "Z": [ 56 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z_D_LUT4_B_Z_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 56 ], "D": [ 17 ], "Z": [ 31 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z_D_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 40 ], "B": [ 38 ], "C": [ 32 ], "D": [ 34 ], "Z": [ 903 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z_D_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 50 ], "B": [ 48 ], "C": [ 46 ], "D": [ 44 ], "Z": [ 902 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 59 ], "B": [ 67 ], "C": [ 71 ], "D": [ 62 ], "Z": [ 899 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_B_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 67 ], "B": [ 75 ], "C": [ 896 ], "D": [ 904 ], "Z": [ 63 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_B_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 79 ], "B": [ 71 ], "C": [ 62 ], "D": [ 59 ], "Z": [ 904 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 83 ], "B": [ 105 ], "C": [ 91 ], "D": [ 905 ], "Z": [ 897 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z_D_CCU2C_COUT": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.15-65.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 62 ], "B1": [ 59 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 906 ], "COUT": [ 905 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 907 ], "S1": [ 908 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.15-65.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "1" ], "B0": [ 71 ], "B1": [ 67 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 909 ], "COUT": [ 906 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 910 ], "S1": [ 911 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.15-65.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "1" ], "B0": [ 79 ], "B1": [ 75 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 912 ], "COUT": [ 909 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 913 ], "S1": [ 914 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.15-65.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "1" ], "B0": [ 87 ], "B1": [ 83 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 915 ], "COUT": [ 912 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 916 ], "S1": [ 917 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.15-65.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "1" ], "B0": [ 95 ], "B1": [ 91 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 915 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 918 ], "S1": [ 919 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.34-65.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 62 ], "B1": [ 59 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 920 ], "COUT": [ 898 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 921 ], "S1": [ 922 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.34-65.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "1" ], "B0": [ 71 ], "B1": [ 67 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 923 ], "COUT": [ 920 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 924 ], "S1": [ 925 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.34-65.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "1" ], "B0": [ 79 ], "B1": [ 75 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 926 ], "COUT": [ 923 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 927 ], "S1": [ 928 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.34-65.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "1" ], "B0": [ 87 ], "B1": [ 83 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 929 ], "COUT": [ 926 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 930 ], "S1": [ 931 ] } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.34-65.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 95 ], "B1": [ 91 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 929 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 932 ], "S1": [ 933 ] } }, "reset_cnt_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:32.3-33.43|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 2 ], "DI": [ 934 ], "LSR": [ "0" ], "Q": [ 17 ] } }, "reset_cnt_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:32.3-33.43|/usr/local/bin/../share/yosys/ecp5/cells_map.v:36.102-36.164" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 17 ], "CLK": [ 2 ], "DI": [ 935 ], "LSR": [ "0" ], "Q": [ 936 ] } }, "reset_cnt_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 937 ], "D": [ 936 ], "Z": [ 935 ] } }, "reset_cnt_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "INV", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:32.3-33.43|/usr/local/bin/../share/yosys/ecp5/cells_map.v:36.102-36.164" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 17 ], "CLK": [ 2 ], "DI": [ 938 ], "LSR": [ "0" ], "Q": [ 937 ] } }, "reset_cnt_TRELLIS_FF_Q_2_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 937 ], "Z": [ 938 ] } }, "reset_cnt_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 936 ], "C": [ 937 ], "D": [ 17 ], "Z": [ 934 ] } }, "vgatestsrc_instance.dline_CCU2C_A0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 939 ], "A1": [ "0" ], "B0": [ 940 ], "B1": [ 941 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ "0" ], "COUT": [ 942 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 943 ], "S1": [ 944 ] } }, "vgatestsrc_instance.dline_CCU2C_A0_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 945 ], "B1": [ 946 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 947 ], "COUT": [ 948 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 949 ], "S1": [ 950 ] } }, "vgatestsrc_instance.dline_CCU2C_A0_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 951 ], "B1": [ 952 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 953 ], "COUT": [ 947 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 954 ], "S1": [ 955 ] } }, "vgatestsrc_instance.dline_CCU2C_A0_S0_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 956 ], "B1": [ 957 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 958 ], "COUT": [ 953 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 959 ], "S1": [ 960 ] } }, "vgatestsrc_instance.dline_CCU2C_A0_S0_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 961 ], "B1": [ 962 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 942 ], "COUT": [ 958 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 963 ], "S1": [ 964 ] } }, "vgatestsrc_instance.dline_CCU2C_A0_S0_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 965 ], "B1": [ 966 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 948 ], "COUT": [ 967 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 968 ], "S1": [ 969 ] } }, "vgatestsrc_instance.dline_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:105.2-109.17|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ "1" ], "LSR": [ 970 ], "Q": [ 939 ] } }, "vgatestsrc_instance.dline_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 886 ], "D": [ 236 ], "Z": [ 970 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:187.2-205.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 971 ], "LSR": [ "0" ], "Q": [ 972 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:187.2-205.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 973 ], "LSR": [ "0" ], "Q": [ 974 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:187.2-205.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 975 ], "LSR": [ "0" ], "Q": [ 976 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:187.2-205.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 977 ], "LSR": [ "0" ], "Q": [ 978 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:187.2-205.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 979 ], "LSR": [ "0" ], "Q": [ 980 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:187.2-205.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 981 ], "LSR": [ "0" ], "Q": [ 982 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:187.2-205.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 983 ], "LSR": [ "0" ], "Q": [ 984 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001001100111010" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 985 ], "B": [ 986 ], "C": [ 987 ], "D": [ 988 ], "Z": [ 979 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_DI_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101001100001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 987 ], "B": [ 986 ], "C": [ 988 ], "D": [ 985 ], "Z": [ 981 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_DI_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 987 ], "B": [ 988 ], "C": [ 986 ], "D": [ 985 ], "Z": [ 971 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_DI_LUT4_Z_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000001111111110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 988 ], "B": [ 987 ], "C": [ 985 ], "D": [ 986 ], "Z": [ 983 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_DI_LUT4_Z_4": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011111001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 988 ], "B": [ 985 ], "C": [ 987 ], "D": [ 986 ], "Z": [ 973 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_DI_LUT4_Z_5": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0101001111001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 987 ], "B": [ 985 ], "C": [ 988 ], "D": [ 986 ], "Z": [ 975 ] } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_DI_LUT4_Z_6": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000001111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 987 ], "C": [ 985 ], "D": [ 986 ], "Z": [ 977 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 989 ], "LSR": [ "0" ], "Q": [ 990 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 991 ], "LSR": [ "0" ], "Q": [ 992 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_10": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 993 ], "LSR": [ "0" ], "Q": [ 994 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_11": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 995 ], "LSR": [ "0" ], "Q": [ 996 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_12": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 997 ], "LSR": [ "0" ], "Q": [ 998 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_13": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 999 ], "LSR": [ "0" ], "Q": [ 1000 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_14": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1001 ], "LSR": [ "0" ], "Q": [ 1002 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_15": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1003 ], "LSR": [ "0" ], "Q": [ 1004 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_16": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1005 ], "LSR": [ "0" ], "Q": [ 1006 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_17": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1007 ], "LSR": [ "0" ], "Q": [ 1008 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_18": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1009 ], "LSR": [ "0" ], "Q": [ 1010 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_19": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1011 ], "LSR": [ "0" ], "Q": [ 1012 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1013 ], "LSR": [ "0" ], "Q": [ 1014 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_20": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1015 ], "LSR": [ "0" ], "Q": [ 1016 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_21": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1017 ], "LSR": [ "0" ], "Q": [ 1018 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_22": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1019 ], "LSR": [ "0" ], "Q": [ 1020 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_23": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1021 ], "LSR": [ "0" ], "Q": [ 1022 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1023 ], "LSR": [ "0" ], "Q": [ 1024 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1025 ], "LSR": [ "0" ], "Q": [ 1026 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1027 ], "LSR": [ "0" ], "Q": [ 1028 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1029 ], "LSR": [ "0" ], "Q": [ 1030 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1031 ], "LSR": [ "0" ], "Q": [ 1032 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1033 ], "LSR": [ "0" ], "Q": [ 1034 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:232.2-255.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1035 ], "LSR": [ "0" ], "Q": [ 1036 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1037 ], "B": [ 1038 ], "C": [ 1039 ], "D": [ 1040 ], "Z": [ 989 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1037 ], "C": [ 1042 ], "D": [ 1043 ], "Z": [ 991 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_10": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1043 ], "C": [ 1044 ], "D": [ 1045 ], "Z": [ 993 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_11": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1044 ], "C": [ 1046 ], "D": [ 1045 ], "Z": [ 995 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_12": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1046 ], "C": [ 1045 ], "D": [ 1047 ], "Z": [ 997 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_13": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1047 ], "C": [ 1048 ], "D": [ 1045 ], "Z": [ 999 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_14": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1048 ], "C": [ 1045 ], "D": [ 1049 ], "Z": [ 1001 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_15": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1049 ], "C": [ 1050 ], "D": [ 1045 ], "Z": [ 1003 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_16": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000101100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1038 ], "B": [ 1037 ], "C": [ 1040 ], "D": [ 1039 ], "Z": [ 1005 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_17": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100111101000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1051 ], "B": [ 1043 ], "C": [ 1041 ], "D": [ 1037 ], "Z": [ 1007 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_18": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100111101000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1051 ], "B": [ 1044 ], "C": [ 1041 ], "D": [ 1043 ], "Z": [ 1009 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_19": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100111101000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1051 ], "B": [ 1046 ], "C": [ 1041 ], "D": [ 1044 ], "Z": [ 1011 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1043 ], "C": [ 1044 ], "D": [ 1042 ], "Z": [ 1013 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_20": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100111101000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1051 ], "B": [ 1047 ], "C": [ 1041 ], "D": [ 1046 ], "Z": [ 1015 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_21": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100111101000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1051 ], "B": [ 1048 ], "C": [ 1041 ], "D": [ 1047 ], "Z": [ 1017 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_22": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100111101000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1051 ], "B": [ 1049 ], "C": [ 1041 ], "D": [ 1048 ], "Z": [ 1019 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_23": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100111101000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1051 ], "B": [ 1050 ], "C": [ 1041 ], "D": [ 1049 ], "Z": [ 1021 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1044 ], "C": [ 1046 ], "D": [ 1042 ], "Z": [ 1023 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_4": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1046 ], "C": [ 1042 ], "D": [ 1047 ], "Z": [ 1025 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_5": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1047 ], "C": [ 1048 ], "D": [ 1042 ], "Z": [ 1027 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_6": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1048 ], "C": [ 1042 ], "D": [ 1049 ], "Z": [ 1029 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_7": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1049 ], "C": [ 1050 ], "D": [ 1042 ], "Z": [ 1031 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_7_D_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100010000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1038 ], "B": [ 1039 ], "C": [ 1040 ], "D": [ 1037 ], "Z": [ 1042 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_8": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1039 ], "B": [ 1037 ], "C": [ 1040 ], "D": [ 1038 ], "Z": [ 1033 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_9": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1041 ], "B": [ 1037 ], "C": [ 1045 ], "D": [ 1043 ], "Z": [ 1035 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_9_A_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1040 ], "C": [ 1038 ], "D": [ 1039 ], "Z": [ 1041 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_9_A_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111001111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1040 ], "B": [ 1038 ], "C": [ 1037 ], "D": [ 1039 ], "Z": [ 1051 ] } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_9_C_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000001100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1040 ], "C": [ 1039 ], "D": [ 1038 ], "Z": [ 1045 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1053 ], "LSR": [ 1054 ], "Q": [ 1055 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1056 ], "LSR": [ 1057 ], "Q": [ 1058 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_10": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1059 ], "LSR": [ 1060 ], "Q": [ 1061 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_10_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1062 ], "C": [ 1063 ], "D": [ 1064 ], "Z": [ 1059 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_10_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1060 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_11": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1065 ], "LSR": [ 1066 ], "Q": [ 1067 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_11_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1068 ], "C": [ 1069 ], "D": [ 1064 ], "Z": [ 1065 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_11_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1066 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_12": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1070 ], "LSR": [ 1071 ], "Q": [ 1072 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_12_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1073 ], "C": [ 1074 ], "D": [ 1064 ], "Z": [ 1070 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_12_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1071 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_13": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1075 ], "LSR": [ 1076 ], "Q": [ 1077 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_13_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1078 ], "C": [ 1079 ], "D": [ 1064 ], "Z": [ 1075 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_13_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1076 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_14": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1080 ], "LSR": [ 1081 ], "Q": [ 1082 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_14_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1083 ], "C": [ 1084 ], "D": [ 1064 ], "Z": [ 1080 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_14_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1081 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_15": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1085 ], "LSR": [ 1086 ], "Q": [ 1087 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_15_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000011001100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1088 ], "C": [ 1089 ], "D": [ 1064 ], "Z": [ 1085 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_15_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1086 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1090 ], "C": [ 1091 ], "D": [ 1064 ], "Z": [ 1056 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_1_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1057 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1092 ], "LSR": [ 1093 ], "Q": [ 1094 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_2_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1095 ], "C": [ 1096 ], "D": [ 1064 ], "Z": [ 1092 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_2_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1093 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1097 ], "LSR": [ 1098 ], "Q": [ 1099 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1100 ], "C": [ 1101 ], "D": [ 1064 ], "Z": [ 1097 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_3_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1098 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1102 ], "LSR": [ 1103 ], "Q": [ 1104 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_4_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1105 ], "C": [ 1106 ], "D": [ 1064 ], "Z": [ 1102 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_4_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1103 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1107 ], "LSR": [ 1108 ], "Q": [ 1109 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1110 ], "C": [ 1111 ], "D": [ 1064 ], "Z": [ 1107 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_5_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1108 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1112 ], "LSR": [ 1113 ], "Q": [ 1114 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_6_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1115 ], "C": [ 1116 ], "D": [ 1064 ], "Z": [ 1112 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_6_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1113 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1117 ], "LSR": [ 1118 ], "Q": [ 1119 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1120 ], "C": [ 1121 ], "D": [ 1064 ], "Z": [ 1117 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_7_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1118 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1122 ], "LSR": [ 1123 ], "Q": [ 1124 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_8_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1125 ], "C": [ 1126 ], "D": [ 1064 ], "Z": [ 1122 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_8_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1123 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:221.2-230.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1052 ], "CLK": [ 6 ], "DI": [ 1127 ], "LSR": [ 1128 ], "Q": [ 1129 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_9_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1130 ], "C": [ 1131 ], "D": [ 1064 ], "Z": [ 1127 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_9_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1128 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_CE_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 1132 ], "BLUT": [ 1133 ], "C0": [ 236 ], "Z": [ 1052 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_CE_PFUMX_Z_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000001001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1134 ], "B": [ 1135 ], "C": [ 1064 ], "D": [ 1136 ], "Z": [ 1132 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_CE_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 1133 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100110011110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1137 ], "C": [ 1138 ], "D": [ 1064 ], "Z": [ 1053 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1119 ], "A1": [ 1114 ], "B0": [ "0" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1139 ], "COUT": [ 1140 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1120 ], "S1": [ 1115 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1129 ], "A1": [ 1124 ], "B0": [ "0" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1141 ], "COUT": [ 1139 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1130 ], "S1": [ 1125 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1067 ], "A1": [ 1061 ], "B0": [ "0" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1142 ], "COUT": [ 1141 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1068 ], "S1": [ 1062 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1077 ], "A1": [ 1072 ], "B0": [ "0" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1143 ], "COUT": [ 1142 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1078 ], "S1": [ 1073 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1058 ], "A1": [ 1055 ], "B0": [ "0" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1144 ], "COUT": [ 1145 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1090 ], "S1": [ 1137 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_5": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1099 ], "A1": [ 1094 ], "B0": [ "0" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1146 ], "COUT": [ 1144 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1100 ], "S1": [ 1095 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_6": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1109 ], "A1": [ 1104 ], "B0": [ "0" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1140 ], "COUT": [ 1146 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1110 ], "S1": [ 1105 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_7": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1087 ], "A1": [ 1082 ], "B0": [ "1" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 1143 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1089 ], "S1": [ 1083 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1119 ], "B1": [ 1114 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1147 ], "COUT": [ 1148 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1121 ], "S1": [ 1116 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1129 ], "B1": [ 1124 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1149 ], "COUT": [ 1147 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1131 ], "S1": [ 1126 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1067 ], "B1": [ 1061 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1150 ], "COUT": [ 1149 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1069 ], "S1": [ 1063 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1077 ], "B1": [ 1072 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1151 ], "COUT": [ 1150 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1079 ], "S1": [ 1074 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1058 ], "B1": [ 1055 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1152 ], "COUT": [ 1153 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1091 ], "S1": [ 1138 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_5": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1099 ], "B1": [ 1094 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1154 ], "COUT": [ 1152 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1101 ], "S1": [ 1096 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_6": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1109 ], "B1": [ 1104 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1148 ], "COUT": [ 1154 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1111 ], "S1": [ 1106 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_7": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 1087 ], "B1": [ 1082 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ "0" ], "COUT": [ 1151 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1088 ], "S1": [ 1084 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1038 ], "B1": [ 1039 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1155 ], "COUT": [ 1136 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1156 ], "S1": [ 1157 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1038 ], "A1": [ 1039 ], "B0": [ "1" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1158 ], "COUT": [ 1064 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1159 ], "S1": [ 1160 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1047 ], "A1": [ 1046 ], "B0": [ "1" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1161 ], "COUT": [ 1162 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1163 ], "S1": [ 1164 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1049 ], "A1": [ 1048 ], "B0": [ "1" ], "B1": [ "0" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1165 ], "COUT": [ 1161 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1166 ], "S1": [ 1167 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1168 ], "A1": [ 1050 ], "B0": [ "1" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1169 ], "COUT": [ 1165 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1170 ], "S1": [ 1171 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1172 ], "A1": [ 1173 ], "B0": [ "1" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1174 ], "COUT": [ 1169 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1175 ], "S1": [ 1176 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1037 ], "A1": [ 1040 ], "B0": [ "1" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1177 ], "COUT": [ 1158 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1178 ], "S1": [ 1179 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0_CCU2C_S0_5": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1044 ], "A1": [ 1043 ], "B0": [ "1" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1162 ], "COUT": [ 1177 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1180 ], "S1": [ 1181 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0_CCU2C_S0_6": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1182 ], "A1": [ 1183 ], "B0": [ "1" ], "B1": [ "1" ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 1174 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1184 ], "S1": [ 1185 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1038 ], "B1": [ 1039 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1186 ], "COUT": [ 1135 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1187 ], "S1": [ 1188 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "1" ], "B0": [ 1047 ], "B1": [ 1046 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1189 ], "COUT": [ 1190 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1191 ], "S1": [ 1192 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "1" ], "B0": [ 1049 ], "B1": [ 1048 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1193 ], "COUT": [ 1189 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1194 ], "S1": [ 1195 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1168 ], "B1": [ 1050 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1196 ], "COUT": [ 1193 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1197 ], "S1": [ 1198 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1172 ], "B1": [ 1173 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1199 ], "COUT": [ 1196 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1200 ], "S1": [ 1201 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1037 ], "B1": [ 1040 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1202 ], "COUT": [ 1186 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1203 ], "S1": [ 1204 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0_CCU2C_S0_5": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1044 ], "B1": [ 1043 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1190 ], "COUT": [ 1202 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1205 ], "S1": [ 1206 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0_CCU2C_S0_6": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1182 ], "B1": [ 1183 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 1199 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1207 ], "S1": [ 1208 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1047 ], "B1": [ 1046 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1209 ], "COUT": [ 1210 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1211 ], "S1": [ 1212 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1049 ], "B1": [ 1048 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1213 ], "COUT": [ 1209 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1214 ], "S1": [ 1215 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1168 ], "B1": [ 1050 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1216 ], "COUT": [ 1213 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1217 ], "S1": [ 1218 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1172 ], "B1": [ 1173 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1219 ], "COUT": [ 1216 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1220 ], "S1": [ 1221 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1037 ], "B1": [ 1040 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1222 ], "COUT": [ 1155 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1223 ], "S1": [ 1224 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_5": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1044 ], "B1": [ 1043 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1210 ], "COUT": [ 1222 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1225 ], "S1": [ 1226 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_6": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1182 ], "B1": [ 1183 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 1219 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1227 ], "S1": [ 1228 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1229 ], "B": [ 1230 ], "C": [ 1231 ], "D": [ 1232 ], "Z": [ 1134 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_A_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1038 ], "B": [ 1039 ], "C": [ 1049 ], "D": [ 1048 ], "Z": [ 1232 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_A_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1040 ], "B": [ 1037 ], "C": [ 1050 ], "D": [ 1046 ], "Z": [ 1231 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_A_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1183 ], "B": [ 1172 ], "C": [ 1173 ], "D": [ 1168 ], "Z": [ 1230 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_A_LUT4_Z_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1047 ], "B": [ 1044 ], "C": [ 1043 ], "D": [ 1182 ], "Z": [ 1229 ] } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_LSR_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 17 ], "Z": [ 1054 ] } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1233 ], "LSR": [ 890 ], "Q": [ 986 ] } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1234 ], "LSR": [ 890 ], "Q": [ 985 ] } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1235 ], "LSR": [ 890 ], "Q": [ 987 ] } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1236 ], "LSR": [ 890 ], "Q": [ 988 ] } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 988 ], "Z": [ 1236 ] } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111111110000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 987 ], "B": [ 988 ], "C": [ 985 ], "D": [ 986 ], "Z": [ 1233 ] } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_DI_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 987 ], "C": [ 988 ], "D": [ 985 ], "Z": [ 1234 ] } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_DI_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 987 ], "D": [ 988 ], "Z": [ 1235 ] } }, "vgatestsrc_instance.hedge_CCU2C_A0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1237 ], "A1": [ 1238 ], "B0": [ 1239 ], "B1": [ 1240 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1241 ], "COUT": [ 1242 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1243 ], "S1": [ 1244 ] } }, "vgatestsrc_instance.hedge_CCU2C_A0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1245 ], "A1": [ 1246 ], "B0": [ 1247 ], "B1": [ 1248 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1249 ], "COUT": [ 1241 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1250 ], "S1": [ 1251 ] } }, "vgatestsrc_instance.hedge_CCU2C_A0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1252 ], "A1": [ 1253 ], "B0": [ 1254 ], "B1": [ 1255 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1256 ], "COUT": [ 1249 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1257 ], "S1": [ 1258 ] } }, "vgatestsrc_instance.hedge_CCU2C_A0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1259 ], "A1": [ 1260 ], "B0": [ 1261 ], "B1": [ 1262 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1242 ], "COUT": [ 892 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1263 ], "S1": [ 1264 ] } }, "vgatestsrc_instance.hedge_CCU2C_A1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ 1265 ], "B0": [ 1266 ], "B1": [ 1267 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1268 ], "COUT": [ 1256 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1269 ], "S1": [ 1270 ] } }, "vgatestsrc_instance.hedge_LUT4_A": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011000010111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1238 ], "B": [ 1240 ], "C": [ 1254 ], "D": [ 1252 ], "Z": [ 1271 ] } }, "vgatestsrc_instance.hedge_LUT4_A_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000001001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1265 ], "B": [ 1267 ], "C": [ 1248 ], "D": [ 1246 ], "Z": [ 1272 ] } }, "vgatestsrc_instance.hedge_LUT4_A_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1253 ], "B": [ 1255 ], "C": [ 1271 ], "D": [ 1273 ], "Z": [ 1274 ] } }, "vgatestsrc_instance.hedge_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011000010111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1247 ], "B": [ 1245 ], "C": [ 1252 ], "D": [ 1254 ], "Z": [ 1275 ] } }, "vgatestsrc_instance.hedge_LUT4_B_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011000010111011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1240 ], "B": [ 1238 ], "C": [ 1245 ], "D": [ 1247 ], "Z": [ 1276 ] } }, "vgatestsrc_instance.hedge_LUT4_B_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1261 ], "B": [ 1259 ], "C": [ 1277 ], "D": [ 1272 ], "Z": [ 1273 ] } }, "vgatestsrc_instance.hedge_LUT4_B_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1262 ], "B": [ 1260 ], "C": [ 1278 ], "D": [ 1275 ], "Z": [ 891 ] } }, "vgatestsrc_instance.hedge_LUT4_B_Z_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 1274 ], "BLUT": [ 1279 ], "C0": [ 1280 ], "Z": [ 1278 ] } }, "vgatestsrc_instance.hedge_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 1279 ] } }, "vgatestsrc_instance.hedge_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1239 ], "C": [ 1237 ], "D": [ 1276 ], "Z": [ 1280 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1281 ], "LSR": [ 890 ], "Q": [ 1260 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1282 ], "LSR": [ 890 ], "Q": [ 1259 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1283 ], "LSR": [ 890 ], "Q": [ 1238 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1284 ], "LSR": [ 890 ], "Q": [ 1237 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1285 ], "LSR": [ 890 ], "Q": [ 1246 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1286 ], "LSR": [ 890 ], "Q": [ 1245 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1287 ], "LSR": [ "0" ], "Q": [ 1253 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_6_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111101011111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1288 ], "B": [ 1253 ], "C": [ 890 ], "D": [ 893 ], "Z": [ 1287 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 893 ], "CLK": [ 6 ], "DI": [ 1289 ], "LSR": [ 890 ], "Q": [ 1252 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1290 ], "LSR": [ "0" ], "Q": [ 1265 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_8_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111101011111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1291 ], "B": [ 1265 ], "C": [ 890 ], "D": [ 893 ], "Z": [ 1290 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1260 ], "B1": [ "0" ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1292 ], "COUT": [ 1293 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1281 ], "S1": [ 1294 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1238 ], "B1": [ 1259 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1295 ], "COUT": [ 1292 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1283 ], "S1": [ 1282 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1246 ], "B1": [ 1237 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1296 ], "COUT": [ 1295 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1285 ], "S1": [ 1284 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 1253 ], "B1": [ 1245 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1297 ], "COUT": [ 1296 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1288 ], "S1": [ 1286 ] } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 1265 ], "B1": [ 1252 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ "0" ], "COUT": [ 1297 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1291 ], "S1": [ 1289 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1298 ], "LSR": [ 890 ], "Q": [ 1039 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1299 ], "LSR": [ 890 ], "Q": [ 1038 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_10": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1300 ], "LSR": [ 890 ], "Q": [ 1050 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_11": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1301 ], "LSR": [ 890 ], "Q": [ 1168 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_12": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1302 ], "LSR": [ 890 ], "Q": [ 1173 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_13": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1303 ], "LSR": [ 890 ], "Q": [ 1172 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_14": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1304 ], "LSR": [ 890 ], "Q": [ 1183 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_15": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1305 ], "LSR": [ 890 ], "Q": [ 1182 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1306 ], "LSR": [ 890 ], "Q": [ 1040 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1307 ], "LSR": [ 890 ], "Q": [ 1037 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1308 ], "LSR": [ 890 ], "Q": [ 1043 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1309 ], "LSR": [ 890 ], "Q": [ 1044 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1310 ], "LSR": [ 890 ], "Q": [ 1046 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1311 ], "LSR": [ 890 ], "Q": [ 1047 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1312 ], "LSR": [ 890 ], "Q": [ 1048 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:215.2-219.27|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1313 ], "LSR": [ 890 ], "Q": [ 1049 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1047 ], "A1": [ 1046 ], "B0": [ 1119 ], "B1": [ 1114 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1314 ], "COUT": [ 1315 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1311 ], "S1": [ 1310 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1049 ], "A1": [ 1048 ], "B0": [ 1129 ], "B1": [ 1124 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1316 ], "COUT": [ 1314 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1313 ], "S1": [ 1312 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1168 ], "A1": [ 1050 ], "B0": [ 1067 ], "B1": [ 1061 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1317 ], "COUT": [ 1316 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1301 ], "S1": [ 1300 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1172 ], "A1": [ 1173 ], "B0": [ 1077 ], "B1": [ 1072 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1318 ], "COUT": [ 1317 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1303 ], "S1": [ 1302 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1038 ], "A1": [ 1039 ], "B0": [ 1058 ], "B1": [ 1055 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1319 ], "COUT": [ 1320 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1299 ], "S1": [ 1298 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_5": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1037 ], "A1": [ 1040 ], "B0": [ 1099 ], "B1": [ 1094 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1321 ], "COUT": [ 1319 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1307 ], "S1": [ 1306 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_6": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1044 ], "A1": [ 1043 ], "B0": [ 1109 ], "B1": [ 1104 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1315 ], "COUT": [ 1321 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1309 ], "S1": [ 1308 ] } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_7": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1182 ], "A1": [ 1183 ], "B0": [ 1087 ], "B1": [ 1082 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ "0" ], "COUT": [ 1318 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1305 ], "S1": [ 1304 ] } }, "vgatestsrc_instance.hpos_CCU2C_B0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1322 ], "B1": [ 1323 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 1268 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1324 ], "S1": [ 1325 ] } }, "vgatestsrc_instance.hpos_LUT4_A": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1262 ], "B": [ 1267 ], "C": [ 1254 ], "D": [ 1266 ], "Z": [ 1326 ] } }, "vgatestsrc_instance.hpos_LUT4_A_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1323 ], "B": [ 1248 ], "C": [ 1239 ], "D": [ 1261 ], "Z": [ 1327 ] } }, "vgatestsrc_instance.hpos_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1322 ], "C": [ 1323 ], "D": [ 1266 ], "Z": [ 1277 ] } }, "vgatestsrc_instance.hpos_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1327 ], "C": [ 1322 ], "D": [ 1255 ], "Z": [ 1328 ] } }, "vgatestsrc_instance.hpos_LUT4_C_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1328 ], "B": [ 1326 ], "C": [ 1240 ], "D": [ 1247 ], "Z": [ 239 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1329 ], "LSR": [ 890 ], "Q": [ 1262 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1330 ], "LSR": [ 890 ], "Q": [ 1261 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_10": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1331 ], "LSR": [ 890 ], "Q": [ 1323 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_11": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1332 ], "LSR": [ 890 ], "Q": [ 1322 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1333 ], "LSR": [ 890 ], "Q": [ 1240 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1334 ], "LSR": [ 890 ], "Q": [ 1239 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1335 ], "LSR": [ 890 ], "Q": [ 1248 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1336 ], "LSR": [ 890 ], "Q": [ 1247 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1337 ], "LSR": [ 890 ], "Q": [ 1255 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1338 ], "LSR": [ 890 ], "Q": [ 1254 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1339 ], "LSR": [ 890 ], "Q": [ 1267 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:130.2-144.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1340 ], "LSR": [ 890 ], "Q": [ 1266 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1239 ], "B1": [ 1240 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1341 ], "COUT": [ 1342 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1334 ], "S1": [ 1333 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1247 ], "B1": [ 1248 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1343 ], "COUT": [ 1341 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1336 ], "S1": [ 1335 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1254 ], "B1": [ 1255 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1344 ], "COUT": [ 1343 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1338 ], "S1": [ 1337 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1266 ], "B1": [ 1267 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1345 ], "COUT": [ 1344 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1340 ], "S1": [ 1339 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1261 ], "B1": [ 1262 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1342 ], "COUT": [ 1346 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1330 ], "S1": [ 1329 ] } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI_CCU2C_S0_5": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "0" ], "B0": [ 1322 ], "B1": [ 1323 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ "0" ], "COUT": [ 1345 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1332 ], "S1": [ 1331 ] } }, "vgatestsrc_instance.midbar_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1006 ], "C": [ 1348 ], "D": [ 1349 ], "Z": [ 1350 ] } }, "vgatestsrc_instance.midbar_LUT4_C_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1008 ], "C": [ 1348 ], "D": [ 1349 ], "Z": [ 1351 ] } }, "vgatestsrc_instance.midbar_LUT4_C_1_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000111111110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1352 ], "B": [ 1353 ], "C": [ 1354 ], "D": [ 1355 ], "Z": [ 1356 ] } }, "vgatestsrc_instance.midbar_LUT4_C_1_Z_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1110001111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1354 ], "B": [ 1353 ], "C": [ 1352 ], "D": [ 1355 ], "Z": [ 1357 ] } }, "vgatestsrc_instance.midbar_LUT4_C_D_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 1357 ], "D": [ 972 ], "Z": [ 1358 ] } }, "vgatestsrc_instance.midbar_LUT4_C_D_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1352 ], "B": [ 1353 ], "C": [ 1355 ], "D": [ 1354 ], "Z": [ 1349 ] } }, "vgatestsrc_instance.midbar_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:167.2-185.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1359 ], "LSR": [ "0" ], "Q": [ 1360 ] } }, "vgatestsrc_instance.midbar_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:167.2-185.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1361 ], "LSR": [ "0" ], "Q": [ 1362 ] } }, "vgatestsrc_instance.midbar_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:167.2-185.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1235 ], "LSR": [ "0" ], "Q": [ 1348 ] } }, "vgatestsrc_instance.midbar_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 1235 ], "D": [ 985 ], "Z": [ 1359 ] } }, "vgatestsrc_instance.midbar_TRELLIS_FF_Q_DI_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 1235 ], "D": [ 986 ], "Z": [ 1361 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1363 ], "LSR": [ 236 ], "Q": [ 723 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1364 ], "LSR": [ 236 ], "Q": [ 722 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_10": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1365 ], "LSR": [ 236 ], "Q": [ 513 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_10_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1366 ], "Z": [ 1365 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_11": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1367 ], "LSR": [ 236 ], "Q": [ 521 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_11_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1368 ], "Z": [ 1367 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_12": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1369 ], "LSR": [ 236 ], "Q": [ 517 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_12_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1370 ], "Z": [ 1369 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_13": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1371 ], "LSR": [ 236 ], "Q": [ 518 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_13_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1372 ], "Z": [ 1371 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_14": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1373 ], "LSR": [ 236 ], "Q": [ 272 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_14_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1374 ], "Z": [ 1373 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_15": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1375 ], "LSR": [ 236 ], "Q": [ 274 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_15_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1376 ], "Z": [ 1375 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_16": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1377 ], "LSR": [ 236 ], "Q": [ 255 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_16_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1378 ], "Z": [ 1377 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_17": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1379 ], "LSR": [ 236 ], "Q": [ 273 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_17_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1380 ], "Z": [ 1379 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_18": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1381 ], "LSR": [ 236 ], "Q": [ 254 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_18_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1382 ], "Z": [ 1381 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_19": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1383 ], "LSR": [ 236 ], "Q": [ 251 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_19_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1384 ], "Z": [ 1383 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_1_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1385 ], "Z": [ 1364 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1386 ], "LSR": [ 236 ], "Q": [ 736 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_20": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1387 ], "LSR": [ 236 ], "Q": [ 266 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_20_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1388 ], "Z": [ 1387 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_2_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1389 ], "Z": [ 1386 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1390 ], "LSR": [ 236 ], "Q": [ 721 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1391 ], "Z": [ 1390 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1392 ], "LSR": [ 236 ], "Q": [ 729 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_4_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1393 ], "Z": [ 1392 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1394 ], "LSR": [ 236 ], "Q": [ 725 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_5_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1395 ], "Z": [ 1394 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1396 ], "LSR": [ 236 ], "Q": [ 726 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_6_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1397 ], "Z": [ 1396 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1398 ], "LSR": [ 236 ], "Q": [ 515 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_7_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1399 ], "Z": [ 1398 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1400 ], "LSR": [ 236 ], "Q": [ 514 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_8_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1401 ], "Z": [ 1400 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:277.2-288.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 234 ], "CLK": [ 6 ], "DI": [ 1402 ], "LSR": [ 236 ], "Q": [ 528 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_9_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1403 ], "Z": [ 1402 ] } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 238 ], "C": [ 239 ], "D": [ 1404 ], "Z": [ 1363 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1405 ], "LSR": [ "0" ], "Q": [ 1404 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1406 ], "LSR": [ "0" ], "Q": [ 1385 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_10": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1407 ], "LSR": [ "0" ], "Q": [ 1403 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_11": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1408 ], "LSR": [ "0" ], "Q": [ 1366 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_12": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1409 ], "LSR": [ "0" ], "Q": [ 1368 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_13": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1410 ], "LSR": [ "0" ], "Q": [ 1370 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_14": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1411 ], "LSR": [ "0" ], "Q": [ 1372 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_15": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1412 ], "LSR": [ "0" ], "Q": [ 498 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_16": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1413 ], "LSR": [ "0" ], "Q": [ 1374 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_17": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1414 ], "LSR": [ "0" ], "Q": [ 1376 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_18": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1415 ], "LSR": [ "0" ], "Q": [ 1378 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_19": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1416 ], "LSR": [ "0" ], "Q": [ 1380 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1417 ], "LSR": [ "0" ], "Q": [ 1389 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_20": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1418 ], "LSR": [ "0" ], "Q": [ 1382 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_21": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1419 ], "LSR": [ "0" ], "Q": [ 1384 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_22": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1420 ], "LSR": [ "0" ], "Q": [ 1388 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_23": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1421 ], "LSR": [ "0" ], "Q": [ 240 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1422 ], "LSR": [ "0" ], "Q": [ 1391 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1423 ], "LSR": [ "0" ], "Q": [ 1393 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1424 ], "LSR": [ "0" ], "Q": [ 1395 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1425 ], "LSR": [ "0" ], "Q": [ 1397 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1426 ], "LSR": [ "0" ], "Q": [ 706 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1427 ], "LSR": [ "0" ], "Q": [ 1399 ] } }, "vgatestsrc_instance.pattern_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:257.2-275.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1428 ], "LSR": [ "0" ], "Q": [ 1401 ] } }, "vgatestsrc_instance.topbar_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1356 ], "B": [ 1429 ], "C": [ 1349 ], "D": [ 1360 ], "Z": [ 1430 ] } }, "vgatestsrc_instance.topbar_LUT4_B_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000011101110111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1356 ], "B": [ 1431 ], "C": [ 1349 ], "D": [ 1362 ], "Z": [ 1432 ] } }, "vgatestsrc_instance.topbar_LUT4_B_1_Z_PFUMX_BLUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 1433 ], "BLUT": [ 1432 ], "C0": [ 1358 ], "Z": [ 1434 ] } }, "vgatestsrc_instance.topbar_LUT4_B_1_Z_PFUMX_BLUT_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 1433 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111100011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1356 ], "B": [ 1435 ], "C": [ 1358 ], "D": [ 1350 ], "Z": [ 1413 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 990 ], "C": [ 1347 ], "D": [ 1436 ], "Z": [ 1405 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 992 ], "C": [ 1347 ], "D": [ 1436 ], "Z": [ 1406 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_10": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 994 ], "C": [ 1357 ], "D": [ 980 ], "Z": [ 1407 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_11": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 996 ], "C": [ 1357 ], "D": [ 982 ], "Z": [ 1408 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_12": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 998 ], "C": [ 1347 ], "D": [ 1358 ], "Z": [ 1409 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_13": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1000 ], "C": [ 1347 ], "D": [ 1358 ], "Z": [ 1410 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_14": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1002 ], "C": [ 1347 ], "D": [ 1358 ], "Z": [ 1411 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_15": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1004 ], "C": [ 1347 ], "D": [ 1358 ], "Z": [ 1412 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_16": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1010 ], "C": [ 1357 ], "D": [ 974 ], "Z": [ 1415 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_17": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1012 ], "C": [ 1357 ], "D": [ 976 ], "Z": [ 1416 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_18": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1016 ], "C": [ 1357 ], "D": [ 978 ], "Z": [ 1418 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_19": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1018 ], "C": [ 1357 ], "D": [ 978 ], "Z": [ 1419 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1014 ], "C": [ 1357 ], "D": [ 974 ], "Z": [ 1417 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_20": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1020 ], "C": [ 1357 ], "D": [ 978 ], "Z": [ 1420 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_21": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1022 ], "C": [ 1357 ], "D": [ 978 ], "Z": [ 1421 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1024 ], "C": [ 1357 ], "D": [ 976 ], "Z": [ 1422 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_4": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1026 ], "C": [ 1357 ], "D": [ 978 ], "Z": [ 1423 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_5": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1028 ], "C": [ 1357 ], "D": [ 978 ], "Z": [ 1424 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_6": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1030 ], "C": [ 1357 ], "D": [ 978 ], "Z": [ 1425 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_7": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111110001000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1347 ], "B": [ 1032 ], "C": [ 1357 ], "D": [ 978 ], "Z": [ 1426 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_8": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1034 ], "C": [ 1347 ], "D": [ 1434 ], "Z": [ 1427 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_9": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1036 ], "C": [ 1347 ], "D": [ 1434 ], "Z": [ 1428 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_PFUMX_Z": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 1437 ], "BLUT": [ 1438 ], "C0": [ 1351 ], "Z": [ 1414 ] } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_PFUMX_Z_BLUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:135.39-136.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 1438 ] } }, "vgatestsrc_instance.topbar_LUT4_B_Z_PFUMX_BLUT": { "hide_name": 0, "type": "PFUMX", "parameters": { }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:139.19-139.63" }, "port_directions": { "ALUT": "input", "BLUT": "input", "C0": "input", "Z": "output" }, "connections": { "ALUT": [ 1439 ], "BLUT": [ 1430 ], "C0": [ 1358 ], "Z": [ 1436 ] } }, "vgatestsrc_instance.topbar_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ "0" ], "Z": [ 1439 ] } }, "vgatestsrc_instance.topbar_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1111010001000100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:137.39-138.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1357 ], "B": [ 984 ], "C": [ 1435 ], "D": [ 1356 ], "Z": [ 1437 ] } }, "vgatestsrc_instance.topbar_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:147.2-165.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1440 ], "LSR": [ "0" ], "Q": [ 1429 ] } }, "vgatestsrc_instance.topbar_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:147.2-165.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1441 ], "LSR": [ "0" ], "Q": [ 1431 ] } }, "vgatestsrc_instance.topbar_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "1 ", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:147.2-165.9|/usr/local/bin/../share/yosys/ecp5/cells_map.v:16.100-16.154" }, "port_directions": { "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CLK": [ 6 ], "DI": [ 1235 ], "LSR": [ "0" ], "Q": [ 1435 ] } }, "vgatestsrc_instance.topbar_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000001111111100" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 987 ], "C": [ 988 ], "D": [ 985 ], "Z": [ 1440 ] } }, "vgatestsrc_instance.topbar_TRELLIS_FF_Q_DI_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000111111110" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 987 ], "B": [ 988 ], "C": [ 985 ], "D": [ 986 ], "Z": [ 1441 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1443 ], "LSR": [ 886 ], "Q": [ 1444 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1445 ], "LSR": [ 886 ], "Q": [ 1446 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_10": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1447 ], "LSR": [ 886 ], "Q": [ 1448 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1449 ], "LSR": [ 886 ], "Q": [ 1450 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1451 ], "LSR": [ 886 ], "Q": [ 1452 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1453 ], "LSR": [ 886 ], "Q": [ 1454 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1455 ], "LSR": [ 886 ], "Q": [ 1456 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1457 ], "LSR": [ 886 ], "Q": [ 1458 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1459 ], "LSR": [ 886 ], "Q": [ 1460 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1461 ], "LSR": [ 886 ], "Q": [ 1462 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "SET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:84.168-84.227" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1463 ], "LSR": [ 886 ], "Q": [ 1464 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1465 ], "B": [ 1466 ], "C": [ 1467 ], "D": [ 236 ], "Z": [ 1442 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011000000001011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 952 ], "B": [ 1454 ], "C": [ 951 ], "D": [ 1456 ], "Z": [ 1466 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1468 ], "B": [ 1469 ], "C": [ 1470 ], "D": [ 1471 ], "Z": [ 1465 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000001001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 957 ], "B": [ 1458 ], "C": [ 965 ], "D": [ 1446 ], "Z": [ 1471 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011000000001011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1454 ], "B": [ 952 ], "C": [ 962 ], "D": [ 1462 ], "Z": [ 1470 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 945 ], "B": [ 1452 ], "C": [ 1472 ], "D": [ 1473 ], "Z": [ 1469 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z_2_C_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011001111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 941 ], "C": [ 1448 ], "D": [ 940 ], "Z": [ 1473 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z_2_C_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1001000000001001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 961 ], "B": [ 1464 ], "C": [ 956 ], "D": [ 1460 ], "Z": [ 1472 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100001100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 946 ], "C": [ 1450 ], "D": [ 1474 ], "Z": [ 1468 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z_3_D_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1011000000001011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1448 ], "B": [ 941 ], "C": [ 966 ], "D": [ 1444 ], "Z": [ 1474 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C_CCU2C_COUT": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1446 ], "A1": [ 1444 ], "B0": [ 965 ], "B1": [ 966 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1475 ], "COUT": [ 1467 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1476 ], "S1": [ 1477 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1452 ], "A1": [ 1450 ], "B0": [ 945 ], "B1": [ 946 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1478 ], "COUT": [ 1475 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1479 ], "S1": [ 1480 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1456 ], "A1": [ 1454 ], "B0": [ 951 ], "B1": [ 952 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1481 ], "COUT": [ 1478 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1482 ], "S1": [ 1483 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1460 ], "A1": [ 1458 ], "B0": [ 956 ], "B1": [ 957 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1484 ], "COUT": [ 1481 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1485 ], "S1": [ 1486 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ 1464 ], "A1": [ 1462 ], "B0": [ 961 ], "B1": [ 962 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ 1487 ], "COUT": [ 1484 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1488 ], "S1": [ 1489 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ 1448 ], "B0": [ 940 ], "B1": [ 941 ], "C0": [ "1" ], "C1": [ "1" ], "CIN": [ "1" ], "COUT": [ 1487 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1490 ], "S1": [ 1491 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1450 ], "B1": [ 1446 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1492 ], "COUT": [ 1493 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1449 ], "S1": [ 1445 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0_1": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1454 ], "B1": [ 1452 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1494 ], "COUT": [ 1492 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1453 ], "S1": [ 1451 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0_2": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1458 ], "B1": [ 1456 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1495 ], "COUT": [ 1494 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1457 ], "S1": [ 1455 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0_3": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "1" ], "B0": [ 1462 ], "B1": [ 1460 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1496 ], "COUT": [ 1495 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1461 ], "S1": [ 1459 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0_4": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "0" ], "A1": [ "0" ], "B0": [ 1444 ], "B1": [ "0" ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ 1493 ], "COUT": [ 1497 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1443 ], "S1": [ 1498 ] } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0_5": { "hide_name": 0, "type": "CCU2C", "parameters": { "INIT0": "1001011010101010", "INIT1": "1001011010101010", "INJECT1_0": "NO", "INJECT1_1": "NO" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" }, "port_directions": { "A0": "input", "A1": "input", "B0": "input", "B1": "input", "C0": "input", "C1": "input", "CIN": "input", "COUT": "output", "D0": "input", "D1": "input", "S0": "output", "S1": "output" }, "connections": { "A0": [ "1" ], "A1": [ "1" ], "B0": [ 1448 ], "B1": [ 1464 ], "C0": [ "0" ], "C1": [ "0" ], "CIN": [ "0" ], "COUT": [ 1496 ], "D0": [ "1" ], "D1": [ "1" ], "S0": [ 1447 ], "S1": [ 1463 ] } }, "vgatestsrc_instance.yline_LUT4_A": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1354 ], "B": [ 1353 ], "C": [ 1355 ], "D": [ 1352 ], "Z": [ 1347 ] } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1499 ], "LSR": [ 886 ], "Q": [ 1355 ] } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1500 ], "LSR": [ 886 ], "Q": [ 1352 ] } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1501 ], "LSR": [ 886 ], "Q": [ 1353 ] } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 1442 ], "CLK": [ 6 ], "DI": [ 1502 ], "LSR": [ 886 ], "Q": [ 1354 ] } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_3_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000011111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:115.33-116.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ "0" ], "D": [ 1354 ], "Z": [ 1502 ] } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_DI_LUT4_Z": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0111111110000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1352 ], "B": [ 1353 ], "C": [ 1354 ], "D": [ 1355 ], "Z": [ 1499 ] } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_DI_LUT4_Z_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0011111111000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:125.33-126.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ 1353 ], "C": [ 1354 ], "D": [ 1352 ], "Z": [ 1500 ] } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_DI_LUT4_Z_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:120.33-121.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ "0" ], "B": [ "0" ], "C": [ 1353 ], "D": [ 1354 ], "Z": [ 1501 ] } }, "vgatestsrc_instance.ypos_LUT4_A": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 957 ], "B": [ 946 ], "C": [ 965 ], "D": [ 966 ], "Z": [ 1503 ] } }, "vgatestsrc_instance.ypos_LUT4_A_1": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 945 ], "B": [ 940 ], "C": [ 941 ], "D": [ 961 ], "Z": [ 1504 ] } }, "vgatestsrc_instance.ypos_LUT4_A_2": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000000000001" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 945 ], "B": [ 940 ], "C": [ 941 ], "D": [ 961 ], "Z": [ 1505 ] } }, "vgatestsrc_instance.ypos_LUT4_A_3": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "0000000100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 956 ], "B": [ 951 ], "C": [ 952 ], "D": [ 1505 ], "Z": [ 1506 ] } }, "vgatestsrc_instance.ypos_LUT4_B": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1504 ], "B": [ 956 ], "C": [ 951 ], "D": [ 952 ], "Z": [ 1507 ] } }, "vgatestsrc_instance.ypos_LUT4_C": { "hide_name": 0, "type": "LUT4", "parameters": { "INIT": "1100101000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:129.32-130.56" }, "port_directions": { "A": "input", "B": "input", "C": "input", "D": "input", "Z": "output" }, "connections": { "A": [ 1506 ], "B": [ 1507 ], "C": [ 962 ], "D": [ 1503 ], "Z": [ 238 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 969 ], "LSR": [ 886 ], "Q": [ 966 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_1": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 968 ], "LSR": [ 886 ], "Q": [ 965 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_10": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 944 ], "LSR": [ 886 ], "Q": [ 941 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_11": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 943 ], "LSR": [ 886 ], "Q": [ 940 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_2": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 950 ], "LSR": [ 886 ], "Q": [ 946 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_3": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 949 ], "LSR": [ 886 ], "Q": [ 945 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_4": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 955 ], "LSR": [ 886 ], "Q": [ 952 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_5": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 954 ], "LSR": [ 886 ], "Q": [ 951 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_6": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 960 ], "LSR": [ 886 ], "Q": [ 957 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_7": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 959 ], "LSR": [ 886 ], "Q": [ 956 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_8": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 964 ], "LSR": [ 886 ], "Q": [ 962 ] } }, "vgatestsrc_instance.ypos_TRELLIS_FF_Q_9": { "hide_name": 0, "type": "TRELLIS_FF", "parameters": { "CEMUX": "CE", "CLKMUX": "CLK", "GSR": "DISABLED", "LSRMUX": "LSR", "REGSET": "RESET", "SRMODE": "LSR_OVER_CE" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:111.2-125.5|/usr/local/bin/../share/yosys/ecp5/cells_map.v:83.170-83.229" }, "port_directions": { "CE": "input", "CLK": "input", "DI": "input", "LSR": "input", "Q": "output" }, "connections": { "CE": [ 236 ], "CLK": [ 6 ], "DI": [ 963 ], "LSR": [ 886 ], "Q": [ 961 ] } } }, "netnames": { "OBUFDS_blu.I": { "hide_name": 0, "bits": [ 3 ], "attributes": { "hdlname": "OBUFDS_blu I", "src": "ULX3S_25F.v:51.10-51.64|OBUFDS.v:5.8-5.9" } }, "OBUFDS_blu.I_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 12 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "OBUFDS_blu.I_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 13 ], "attributes": { } }, "OBUFDS_blu.O": { "hide_name": 0, "bits": [ 3 ], "attributes": { "hdlname": "OBUFDS_blu O", "src": "ULX3S_25F.v:51.10-51.64|OBUFDS.v:6.9-6.10" } }, "OBUFDS_blu.OB": { "hide_name": 0, "bits": [ 7 ], "attributes": { "hdlname": "OBUFDS_blu OB", "src": "ULX3S_25F.v:51.10-51.64|OBUFDS.v:7.9-7.11" } }, "OBUFDS_clock.I": { "hide_name": 0, "bits": [ 6 ], "attributes": { "hdlname": "OBUFDS_clock I", "src": "ULX3S_25F.v:52.10-52.70|OBUFDS.v:5.8-5.9" } }, "OBUFDS_clock.O": { "hide_name": 0, "bits": [ 6 ], "attributes": { "hdlname": "OBUFDS_clock O", "src": "ULX3S_25F.v:52.10-52.70|OBUFDS.v:6.9-6.10" } }, "OBUFDS_clock.OB": { "hide_name": 0, "bits": [ 10 ], "attributes": { "hdlname": "OBUFDS_clock OB", "src": "ULX3S_25F.v:52.10-52.70|OBUFDS.v:7.9-7.11" } }, "OBUFDS_grn.I": { "hide_name": 0, "bits": [ 4 ], "attributes": { "hdlname": "OBUFDS_grn I", "src": "ULX3S_25F.v:50.10-50.64|OBUFDS.v:5.8-5.9" } }, "OBUFDS_grn.I_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 18 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "OBUFDS_grn.I_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 19 ], "attributes": { } }, "OBUFDS_grn.O": { "hide_name": 0, "bits": [ 4 ], "attributes": { "hdlname": "OBUFDS_grn O", "src": "ULX3S_25F.v:50.10-50.64|OBUFDS.v:6.9-6.10" } }, "OBUFDS_grn.OB": { "hide_name": 0, "bits": [ 8 ], "attributes": { "hdlname": "OBUFDS_grn OB", "src": "ULX3S_25F.v:50.10-50.64|OBUFDS.v:7.9-7.11" } }, "OBUFDS_red.I": { "hide_name": 0, "bits": [ 5 ], "attributes": { "hdlname": "OBUFDS_red I", "src": "ULX3S_25F.v:49.10-49.64|OBUFDS.v:5.8-5.9" } }, "OBUFDS_red.I_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 22 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "OBUFDS_red.I_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 23 ], "attributes": { } }, "OBUFDS_red.O": { "hide_name": 0, "bits": [ 5 ], "attributes": { "hdlname": "OBUFDS_red O", "src": "ULX3S_25F.v:49.10-49.64|OBUFDS.v:6.9-6.10" } }, "OBUFDS_red.OB": { "hide_name": 0, "bits": [ 9 ], "attributes": { "hdlname": "OBUFDS_red OB", "src": "ULX3S_25F.v:49.10-49.64|OBUFDS.v:7.9-7.11" } }, "blu": { "hide_name": 0, "bits": [ 237, 266, 251, 254, 273, 255, 274, 272 ], "attributes": { "src": "ULX3S_25F.v:18.24-18.27" } }, "clk_250MHz": { "hide_name": 0, "bits": [ 11 ], "attributes": { "src": "ULX3S_25F.v:11.19-11.29" } }, "clk_25MHz": { "hide_name": 0, "bits": [ 6 ], "attributes": { "src": "ULX3S_25F.v:11.8-11.17" } }, "clk_25mhz": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "ULX3S_25F.v:4.8-4.17" } }, "clock_instance.clk_125MHz": { "hide_name": 0, "bits": [ 26 ], "attributes": { "hdlname": "clock_instance clk_125MHz", "src": "ULX3S_25F.v:12.9-16.4|clock.v:4.10-4.20" } }, "clock_instance.clk_250MHz": { "hide_name": 0, "bits": [ 11 ], "attributes": { "hdlname": "clock_instance clk_250MHz", "src": "ULX3S_25F.v:12.9-16.4|clock.v:5.10-5.20" } }, "clock_instance.clk_25MHz": { "hide_name": 0, "bits": [ 6 ], "attributes": { "hdlname": "clock_instance clk_25MHz", "src": "ULX3S_25F.v:12.9-16.4|clock.v:6.10-6.19" } }, "clock_instance.clk_83M333Hz": { "hide_name": 0, "bits": [ 27 ], "attributes": { "hdlname": "clock_instance clk_83M333Hz", "src": "ULX3S_25F.v:12.9-16.4|clock.v:7.10-7.22", "unused_bits": "0 " } }, "clock_instance.clkin_25MHz": { "hide_name": 0, "bits": [ 2 ], "attributes": { "hdlname": "clock_instance clkin_25MHz", "src": "ULX3S_25F.v:12.9-16.4|clock.v:3.9-3.20" } }, "clock_instance.int_locked": { "hide_name": 0, "bits": [ 28 ], "attributes": { "hdlname": "clock_instance int_locked", "src": "ULX3S_25F.v:12.9-16.4|clock.v:10.10-10.20", "unused_bits": "0 " } }, "clock_instance.locked": { "hide_name": 0, "bits": [ 29 ], "attributes": { "hdlname": "clock_instance locked", "src": "ULX3S_25F.v:12.9-16.4|clock.v:8.10-8.16", "unused_bits": "0 " } }, "gpdi_dn": { "hide_name": 0, "bits": [ 7, 8, 9, 10 ], "attributes": { "src": "ULX3S_25F.v:5.31-5.38" } }, "gpdi_dp": { "hide_name": 0, "bits": [ 3, 4, 5, 6 ], "attributes": { "src": "ULX3S_25F.v:5.22-5.29" } }, "grn": { "hide_name": 0, "bits": [ 449, 518, 517, 521, 513, 528, 514, 515 ], "attributes": { "src": "ULX3S_25F.v:18.19-18.22" } }, "llhdmi_instance.CounterX": { "hide_name": 0, "bits": [ 50, 48, 46, 44, 42, 40, 38, 36, 34, 32 ], "attributes": { "hdlname": "llhdmi_instance CounterX", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:31.13-31.21" } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 49, 47, 45, 43, 41, 39, 37, 35, 33, 30 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:39.41-39.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_DI_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ "0", 50, 55, 1508, 54, 1509, 53, 1510, 51, 1511 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:39.41-39.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5 7 9" } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_DI_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ 50, 55, 1508, 54, 1509, 53, 1510, 51, 1511, 52 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:39.41-39.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "2 4 6 8 9" } }, "llhdmi_instance.CounterX_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 31 ], "attributes": { } }, "llhdmi_instance.CounterY": { "hide_name": 0, "bits": [ 95, 91, 87, 83, 79, 75, 71, 67, 62, 59 ], "attributes": { "hdlname": "llhdmi_instance CounterY", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:31.23-31.31" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 60 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_1_LSR": { "hide_name": 0, "bits": [ 61 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_2_DI": { "hide_name": 0, "bits": [ 65 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 66 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 69 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_3_LSR": { "hide_name": 0, "bits": [ 70 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_4_DI": { "hide_name": 0, "bits": [ 73 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_4_LSR": { "hide_name": 0, "bits": [ 74 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 77 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_5_LSR": { "hide_name": 0, "bits": [ 78 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_6_DI": { "hide_name": 0, "bits": [ 81 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_6_LSR": { "hide_name": 0, "bits": [ 82 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 85 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_7_LSR": { "hide_name": 0, "bits": [ 86 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_8_DI": { "hide_name": 0, "bits": [ 89 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_8_LSR": { "hide_name": 0, "bits": [ 90 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_9_DI": { "hide_name": 0, "bits": [ 93 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_9_LSR": { "hide_name": 0, "bits": [ 94 ], "attributes": { } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 57 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.19-45.51" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z_D": { "hide_name": 0, "bits": [ 96, 92, 88, 84, 80, 76, 72, 68, 64, 97 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.41-45.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ "0", 95, 102, 1512, 101, 1513, 100, 1514, 98, 1515 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.41-45.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5 7 9" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ 95, 102, 1512, 101, 1513, 100, 1514, 98, 1515, 99 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:45.41-45.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "2 4 6 8 9" } }, "llhdmi_instance.CounterY_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 58 ], "attributes": { } }, "llhdmi_instance.DrawArea": { "hide_name": 0, "bits": [ 104 ], "attributes": { "hdlname": "llhdmi_instance DrawArea", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:32.21-32.29" } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 103 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:55.3-56.50" } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_C": { "hide_name": 0, "bits": [ 83, 105, 91, 905 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D": { "hide_name": 0, "bits": [ 83, 91, 105, 106 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_D": { "hide_name": 0, "bits": [ 1516, 118, 1517, 115, 1518, 112, 1519, 109, 1520, 108 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:56.36-56.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "0 2 4 6 8" } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_D_CCU2C_COUT_S0": { "hide_name": 0, "bits": [ 121, 122, 119, 120, 116, 117, 113, 114, 110, 111 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:56.36-56.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5 6 7 8 9" } }, "llhdmi_instance.DrawArea_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 1521, 118, 1517, 115, 1518, 112, 1519, 109, 1520 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:56.36-56.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9" } }, "llhdmi_instance.TMDS_blu": { "hide_name": 0, "bits": [ 14, 165, 162, 158, 154, 150, 146, 142, 138, 132 ], "attributes": { "hdlname": "llhdmi_instance TMDS_blu", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:68.34-68.42" } }, "llhdmi_instance.TMDS_grn": { "hide_name": 0, "bits": [ 20, 198, 195, 191, 187, 183, 179, 175, 171, 166 ], "attributes": { "hdlname": "llhdmi_instance TMDS_grn", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:68.24-68.32" } }, "llhdmi_instance.TMDS_mod10": { "hide_name": 0, "bits": [ 131, 129, 127, 125 ], "attributes": { "hdlname": "llhdmi_instance TMDS_mod10", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:78.13-78.23" } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 130, 129, 127, 125 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:85.49-85.64|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" } }, "llhdmi_instance.TMDS_mod10_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 130, 128, 126, 123 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:85.49-85.64|/usr/local/bin/../share/yosys/techmap.v:270.26-270.27" } }, "llhdmi_instance.TMDS_red": { "hide_name": 0, "bits": [ 24, 233, 230, 226, 222, 218, 214, 210, 206, 201 ], "attributes": { "hdlname": "llhdmi_instance TMDS_red", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:68.14-68.22" } }, "llhdmi_instance.TMDS_shift_blu": { "hide_name": 0, "bits": [ 3, 15, 161, 157, 153, 149, 145, 141, 137, 134 ], "attributes": { "hdlname": "llhdmi_instance TMDS_shift_blu", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:93.49-93.63" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 135 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_1_LSR": { "hide_name": 0, "bits": [ 136 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_2_DI": { "hide_name": 0, "bits": [ 139 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 140 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 143 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_3_LSR": { "hide_name": 0, "bits": [ 144 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_4_DI": { "hide_name": 0, "bits": [ 147 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_4_LSR": { "hide_name": 0, "bits": [ 148 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 151 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_5_LSR": { "hide_name": 0, "bits": [ 152 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_6_DI": { "hide_name": 0, "bits": [ 155 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_6_LSR": { "hide_name": 0, "bits": [ 156 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 159 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_7_LSR": { "hide_name": 0, "bits": [ 160 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_8_DI": { "hide_name": 0, "bits": [ 163 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:102.25-102.80" } }, "llhdmi_instance.TMDS_shift_blu_TRELLIS_FF_Q_8_LSR": { "hide_name": 0, "bits": [ 164 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_grn": { "hide_name": 0, "bits": [ 4, 21, 194, 190, 186, 182, 178, 174, 170, 167 ], "attributes": { "hdlname": "llhdmi_instance TMDS_shift_grn", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:93.31-93.45" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 168 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_1_LSR": { "hide_name": 0, "bits": [ 169 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_2_DI": { "hide_name": 0, "bits": [ 172 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 173 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 176 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_3_LSR": { "hide_name": 0, "bits": [ 177 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_4_DI": { "hide_name": 0, "bits": [ 180 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_4_LSR": { "hide_name": 0, "bits": [ 181 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 184 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_5_LSR": { "hide_name": 0, "bits": [ 185 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_6_DI": { "hide_name": 0, "bits": [ 188 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_6_LSR": { "hide_name": 0, "bits": [ 189 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 192 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_7_LSR": { "hide_name": 0, "bits": [ 193 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_8_DI": { "hide_name": 0, "bits": [ 196 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:101.25-101.80" } }, "llhdmi_instance.TMDS_shift_grn_TRELLIS_FF_Q_8_LSR": { "hide_name": 0, "bits": [ 197 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_load": { "hide_name": 0, "bits": [ 16 ], "attributes": { "hdlname": "llhdmi_instance TMDS_shift_load", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:79.7-79.22" } }, "llhdmi_instance.TMDS_shift_load_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 199, 17 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.TMDS_shift_load_TRELLIS_FF_Q_DI_LUT4_C_Z": { "hide_name": 0, "bits": [ 124 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_load_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 200 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red": { "hide_name": 0, "bits": [ 5, 25, 229, 225, 221, 217, 213, 209, 205, 202 ], "attributes": { "hdlname": "llhdmi_instance TMDS_shift_red", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:93.13-93.27" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 203 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_1_LSR": { "hide_name": 0, "bits": [ 204 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_2_DI": { "hide_name": 0, "bits": [ 207 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 208 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 211 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_3_LSR": { "hide_name": 0, "bits": [ 212 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_4_DI": { "hide_name": 0, "bits": [ 215 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_4_LSR": { "hide_name": 0, "bits": [ 216 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 219 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_5_LSR": { "hide_name": 0, "bits": [ 220 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_6_DI": { "hide_name": 0, "bits": [ 223 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_6_LSR": { "hide_name": 0, "bits": [ 224 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 227 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_7_LSR": { "hide_name": 0, "bits": [ 228 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_8_DI": { "hide_name": 0, "bits": [ 231 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:100.25-100.80" } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_8_LSR": { "hide_name": 0, "bits": [ 232 ], "attributes": { } }, "llhdmi_instance.TMDS_shift_red_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 133 ], "attributes": { } }, "llhdmi_instance.encode_B.CD": { "hide_name": 0, "bits": [ 244, 894 ], "attributes": { "hdlname": "llhdmi_instance encode_B CD", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:7.14-7.16|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.QM0": { "hide_name": 0, "bits": [ 237 ], "attributes": { "hdlname": "llhdmi_instance encode_B QM0", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:19.6-19.9|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.QM0_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 235 ], "attributes": { } }, "llhdmi_instance.encode_B.TMDS": { "hide_name": 0, "bits": [ 14, 165, 162, 158, 154, 150, 146, 142, 138, 132 ], "attributes": { "hdlname": "llhdmi_instance encode_B TMDS", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:9.19-9.23|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 242 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI": { "hide_name": 0, "bits": [ 245 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 246 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C": { "hide_name": 0, "bits": [ 244, 248, 249, 243, 104 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B": { "hide_name": 0, "bits": [ 253, 254, 255, 237, 267, 261, 258 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_SD_1_Z": { "hide_name": 0, "bits": [ 257 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_SD_2_Z": { "hide_name": 0, "bits": [ 256 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 268 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 270 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 271 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 269 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 275 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 276 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 264 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 277 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 278 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 265 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 279 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 280 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_1_Z": { "hide_name": 0, "bits": [ 282 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_2_Z": { "hide_name": 0, "bits": [ 283 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_3_Z": { "hide_name": 0, "bits": [ 284 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_4_Z": { "hide_name": 0, "bits": [ 285 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_LUT4_A_Z": { "hide_name": 0, "bits": [ 281 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_1_BLUT": { "hide_name": 0, "bits": [ 287 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_1_Z": { "hide_name": 0, "bits": [ 259 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_2_Z": { "hide_name": 0, "bits": [ 263 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_3_ALUT": { "hide_name": 0, "bits": [ 288 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_3_Z": { "hide_name": 0, "bits": [ 262 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_ALUT": { "hide_name": 0, "bits": [ 286 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_ALUT_LUT4_Z_C_LUT4_Z_B_PFUMX_C0_Z": { "hide_name": 0, "bits": [ 260 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_2_DI_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 247 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 289 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_4_DI": { "hide_name": 0, "bits": [ 291 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 293 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_6_DI": { "hide_name": 0, "bits": [ 294 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 296 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B": { "hide_name": 0, "bits": [ 297, 254, 273 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_B_Z": { "hide_name": 0, "bits": [ 249, 250, 251 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_C_Z": { "hide_name": 0, "bits": [ 298, 273, 255, 274 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_B_LUT4_C_Z_LUT4_D_Z": { "hide_name": 0, "bits": [ 295, 292, 252, 290, 237 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI": { "hide_name": 0, "bits": [ 299 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_B": { "hide_name": 0, "bits": [ 244, 300, 301, 104 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C": { "hide_name": 0, "bits": [ 250, 301, 243, 251 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z": { "hide_name": 0, "bits": [ 295, 237, 292, 330, 252, 290, 304 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_1_D0": { "hide_name": 0, "bits": [ 308 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_1_D1": { "hide_name": 0, "bits": [ 309 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_D0": { "hide_name": 0, "bits": [ 305 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_D1": { "hide_name": 0, "bits": [ 306 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z": { "hide_name": 0, "bits": [ 307, 321, 329, 326, 310, 243, 325 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 319 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 320 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 327 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_SD_Z_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 328 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_1_Z": { "hide_name": 0, "bits": [ 332 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_2_Z": { "hide_name": 0, "bits": [ 333 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_2_Z_PFUMX_ALUT_Z": { "hide_name": 0, "bits": [ 317 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_3_Z": { "hide_name": 0, "bits": [ 334 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_4_Z": { "hide_name": 0, "bits": [ 335 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_4_Z_PFUMX_ALUT_Z": { "hide_name": 0, "bits": [ 316 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_5_Z": { "hide_name": 0, "bits": [ 336 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_6_Z": { "hide_name": 0, "bits": [ 337 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_6_Z_PFUMX_ALUT_Z": { "hide_name": 0, "bits": [ 315 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_7_Z": { "hide_name": 0, "bits": [ 338 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_Z": { "hide_name": 0, "bits": [ 331 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_C_Z_PFUMX_ALUT_Z": { "hide_name": 0, "bits": [ 318 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_10_Z": { "hide_name": 0, "bits": [ 341 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_10_Z_PFUMX_ALUT_Z": { "hide_name": 0, "bits": [ 311 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_11_Z": { "hide_name": 0, "bits": [ 342 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_1_Z": { "hide_name": 0, "bits": [ 340 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_2_Z": { "hide_name": 0, "bits": [ 343 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_3_Z": { "hide_name": 0, "bits": [ 344 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_4_Z": { "hide_name": 0, "bits": [ 345 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_5_Z": { "hide_name": 0, "bits": [ 346 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_6_Z": { "hide_name": 0, "bits": [ 347 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_6_Z_PFUMX_BLUT_ALUT": { "hide_name": 0, "bits": [ 348 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_6_Z_PFUMX_BLUT_Z": { "hide_name": 0, "bits": [ 314 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_7_Z": { "hide_name": 0, "bits": [ 349 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_7_Z_PFUMX_ALUT_Z": { "hide_name": 0, "bits": [ 313 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_8_Z": { "hide_name": 0, "bits": [ 350 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_9_Z": { "hide_name": 0, "bits": [ 351 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_9_Z_PFUMX_BLUT_ALUT": { "hide_name": 0, "bits": [ 352 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_9_Z_PFUMX_BLUT_Z": { "hide_name": 0, "bits": [ 312 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_LUT4_D_Z": { "hide_name": 0, "bits": [ 339 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_1_Z": { "hide_name": 0, "bits": [ 356 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_2_Z": { "hide_name": 0, "bits": [ 357 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_3_Z": { "hide_name": 0, "bits": [ 358 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_ALUT": { "hide_name": 0, "bits": [ 353 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_BLUT": { "hide_name": 0, "bits": [ 354 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_8_DI_LUT4_Z_C_LUT4_B_Z_PFUMX_C0_Z": { "hide_name": 0, "bits": [ 355 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_9_DI": { "hide_name": 0, "bits": [ 359 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 241 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:45.1-45.59|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.TMDS_code": { "hide_name": 0, "bits": [ 244, 244, 1522, 244, 1522, 244, 1522, 244, 1522, 1523 ], "attributes": { "hdlname": "llhdmi_instance encode_B TMDS_code", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:43.12-43.21|llhdmi.v:73.16-74.73", "unused_bits": "2 4 6 8 9" } }, "llhdmi_instance.encode_B.VD": { "hide_name": 0, "bits": [ 237, 266, 251, 254, 273, 255, 274, 272 ], "attributes": { "hdlname": "llhdmi_instance encode_B VD", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:6.14-6.16|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.VDE": { "hide_name": 0, "bits": [ 104 ], "attributes": { "hdlname": "llhdmi_instance encode_B VDE", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:8.8-8.11|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.balance_acc": { "hide_name": 0, "bits": [ 322, 323, 324, 325 ], "attributes": { "hdlname": "llhdmi_instance encode_B balance_acc", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:31.11-31.22|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D0": { "hide_name": 0, "bits": [ 363 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 366 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 367 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D1": { "hide_name": 0, "bits": [ 364 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 368 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 369 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_1_Z": { "hide_name": 0, "bits": [ 365 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D0": { "hide_name": 0, "bits": [ 370 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 373 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 374 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D1": { "hide_name": 0, "bits": [ 371 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 375 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 376 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_2_Z": { "hide_name": 0, "bits": [ 372 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D0": { "hide_name": 0, "bits": [ 377 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 380 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 381 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D1": { "hide_name": 0, "bits": [ 378 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 382 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 383 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_3_Z": { "hide_name": 0, "bits": [ 379 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0": { "hide_name": 0, "bits": [ 384 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 387 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 389 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 390 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 388 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 391 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 392 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1": { "hide_name": 0, "bits": [ 385 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 393 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 395 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 396 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 394 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 397 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_4_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 398 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D0": { "hide_name": 0, "bits": [ 360 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 399 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 400 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D1": { "hide_name": 0, "bits": [ 361 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 401 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 402 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.balance_acc_L6MUX21_SD_Z": { "hide_name": 0, "bits": [ 362 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_1_LSR": { "hide_name": 0, "bits": [ 406 ], "attributes": { } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 408 ], "attributes": { } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_3_LSR": { "hide_name": 0, "bits": [ 410 ], "attributes": { } }, "llhdmi_instance.encode_B.balance_acc_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 404 ], "attributes": { } }, "llhdmi_instance.encode_B.balance_acc_new": { "hide_name": 0, "bits": [ 409, 407, 405, 403 ], "attributes": { "hdlname": "llhdmi_instance encode_B balance_acc_new", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:41.12-41.27|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_B": { "hide_name": 0, "bits": [ 412, 413, 324 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_B_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 414 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_B_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 415 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C": { "hide_name": 0, "bits": [ 416, 248, 386, 323, 322, 413, 324 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D0": { "hide_name": 0, "bits": [ 420 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 423 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 424 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D1": { "hide_name": 0, "bits": [ 421 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 425 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 426 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D0": { "hide_name": 0, "bits": [ 417 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 427 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 428 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D1": { "hide_name": 0, "bits": [ 418 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 429 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_SD_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 430 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 431 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 433 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 435 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 436 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 434 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 437 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 438 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 432 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 439 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 441 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 442 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 440 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 443 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 444 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_C": { "hide_name": 0, "bits": [ 411, 302 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 422 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 419 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_B.balance_acc_new_LUT4_Z_D": { "hide_name": 0, "bits": [ 302, 243, 303 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_B.balance_acc_new_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 445 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_B.balance_acc_new_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 446 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_B.clk": { "hide_name": 0, "bits": [ 6 ], "attributes": { "hdlname": "llhdmi_instance encode_B clk", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:5.8-5.11|llhdmi.v:73.16-74.73" } }, "llhdmi_instance.encode_B.q_m": { "hide_name": 0, "bits": [ 237, 1524, 1525, 1526, 1527, 1528, 1529, 1530, 1531 ], "attributes": { "hdlname": "llhdmi_instance encode_B q_m", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:29.12-29.15|llhdmi.v:73.16-74.73", "unused_bits": "1 2 3 4 5 6 7 8" } }, "llhdmi_instance.encode_G.CD": { "hide_name": 0, "bits": [ "0", "0" ], "attributes": { "hdlname": "llhdmi_instance encode_G CD", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:7.14-7.16|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.QM0": { "hide_name": 0, "bits": [ 449 ], "attributes": { "hdlname": "llhdmi_instance encode_G QM0", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:19.6-19.9|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D0": { "hide_name": 0, "bits": [ 451 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 454 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 455 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D1": { "hide_name": 0, "bits": [ 452 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 461 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 462 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_1_Z": { "hide_name": 0, "bits": [ 453 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D0": { "hide_name": 0, "bits": [ 463 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 466 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 467 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D1": { "hide_name": 0, "bits": [ 464 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 469 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 470 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_2_Z": { "hide_name": 0, "bits": [ 465 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D0": { "hide_name": 0, "bits": [ 471 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 474 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 475 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D1": { "hide_name": 0, "bits": [ 472 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 476 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 477 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_3_Z": { "hide_name": 0, "bits": [ 473 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D0": { "hide_name": 0, "bits": [ 447 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 479 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 480 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D1": { "hide_name": 0, "bits": [ 448 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 481 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 482 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_Z": { "hide_name": 0, "bits": [ 450 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_G.QM0_L6MUX21_SD_Z_L6MUX21_D1_Z": { "hide_name": 0, "bits": [ 558, 489, 484, 478, 493, 559, 490 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.QM0_LUT4_C_1_Z": { "hide_name": 0, "bits": [ 486 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_G.QM0_LUT4_C_2_Z": { "hide_name": 0, "bits": [ 487 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_G.QM0_LUT4_C_3_Z": { "hide_name": 0, "bits": [ 488 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_G.QM0_LUT4_C_Z": { "hide_name": 0, "bits": [ 485 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_G.QM0_LUT4_D_Z": { "hide_name": 0, "bits": [ 491, 492, 558, 493, 559, 489 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.QM0_PFUMX_C0_ALUT": { "hide_name": 0, "bits": [ 494 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_G.QM0_PFUMX_C0_BLUT": { "hide_name": 0, "bits": [ 495 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_G.QM0_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 497 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS": { "hide_name": 0, "bits": [ 20, 198, 195, 191, 187, 183, 179, 175, 171, 166 ], "attributes": { "hdlname": "llhdmi_instance encode_G TMDS", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:9.19-9.23|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 500 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 502 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 503 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_4_LSR": { "hide_name": 0, "bits": [ 506 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 507 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_6_LSR": { "hide_name": 0, "bits": [ 510 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 511 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C": { "hide_name": 0, "bits": [ 512, 521, 513 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_A_Z": { "hide_name": 0, "bits": [ 519, 529, 516, 521, 528, 449, 520 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z": { "hide_name": 0, "bits": [ 539, 504, 508, 538, 490, 517 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 522 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 524 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 526 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 527 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 525 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 530 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 531 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 523 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 532 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 534 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 535 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 533 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 536 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 537 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z": { "hide_name": 0, "bits": [ 468, 458, 460, 457, 456, 449, 459 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 542 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 544 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 545 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 543 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 546 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 547 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0": { "hide_name": 0, "bits": [ 548 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 550 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 551 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1": { "hide_name": 0, "bits": [ 549 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 552 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 553 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 540 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 554 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 555 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 541 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 556 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 557 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 561 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 562 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_8_LSR": { "hide_name": 0, "bits": [ 564 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_9_LSR": { "hide_name": 0, "bits": [ 566 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 499 ], "attributes": { } }, "llhdmi_instance.encode_G.TMDS_code": { "hide_name": 0, "bits": [ "0", "0", "1", "0", "1", "0", "1", "0", "1", "1" ], "attributes": { "hdlname": "llhdmi_instance encode_G TMDS_code", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:43.12-43.21|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.TMDS_data": { "hide_name": 0, "bits": [ 565, 563, 1532, 509, 1533, 505, 1534, 501, 1535, 1536 ], "attributes": { "hdlname": "llhdmi_instance encode_G TMDS_data", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:42.12-42.21|llhdmi.v:71.16-72.73", "unused_bits": "2 4 6 8 9" } }, "llhdmi_instance.encode_G.VD": { "hide_name": 0, "bits": [ 449, 518, 517, 521, 513, 528, 514, 515 ], "attributes": { "hdlname": "llhdmi_instance encode_G VD", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:6.14-6.16|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.VDE": { "hide_name": 0, "bits": [ 104 ], "attributes": { "hdlname": "llhdmi_instance encode_G VDE", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:8.8-8.11|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.balance_acc": { "hide_name": 0, "bits": [ 558, 559, 560, 483 ], "attributes": { "hdlname": "llhdmi_instance encode_G balance_acc", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:31.11-31.22|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_1_LSR": { "hide_name": 0, "bits": [ 570 ], "attributes": { } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 572 ], "attributes": { } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_3_LSR": { "hide_name": 0, "bits": [ 574 ], "attributes": { } }, "llhdmi_instance.encode_G.balance_acc_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 568 ], "attributes": { } }, "llhdmi_instance.encode_G.balance_acc_new": { "hide_name": 0, "bits": [ 573, 571, 569, 567 ], "attributes": { "hdlname": "llhdmi_instance encode_G balance_acc_new", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:41.12-41.27|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 577 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 579 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 580 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 578 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 581 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 582 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 575 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 583 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 584 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A": { "hide_name": 0, "bits": [ 585, 586, 492, 587, 560, 484 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 590 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 592 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 594 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 595 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 593 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 596 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 597 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 591 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 598 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 600 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 601 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 599 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 602 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 603 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0": { "hide_name": 0, "bits": [ 604 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 606 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 607 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1": { "hide_name": 0, "bits": [ 605 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 609 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 610 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 588 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 611 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 613 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 614 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 612 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 615 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 616 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 589 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 617 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 619 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 620 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 618 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 621 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 622 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 576 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 623 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_G.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 624 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C": { "hide_name": 0, "bits": [ 625, 626 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 629 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 631 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 633 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 634 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_C0": { "hide_name": 0, "bits": [ 468, 608, 490, 483, 496, 460, 560 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 632 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 635 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 636 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 630 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 637 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 639 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 640 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 638 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 641 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 642 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 627 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 643 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 645 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 646 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 644 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 647 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 648 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 628 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 649 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 651 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 652 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 650 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 653 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_G.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 654 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_G.clk": { "hide_name": 0, "bits": [ 6 ], "attributes": { "hdlname": "llhdmi_instance encode_G clk", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:5.8-5.11|llhdmi.v:71.16-72.73" } }, "llhdmi_instance.encode_G.invert_q_m": { "hide_name": 0, "bits": [ 1536 ], "attributes": { "hdlname": "llhdmi_instance encode_G invert_q_m", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:36.6-36.16|llhdmi.v:71.16-72.73", "unused_bits": "0 " } }, "llhdmi_instance.encode_G.q_m": { "hide_name": 0, "bits": [ 449, 1537, 1538, 1539, 1540, 1541, 1542, 1543, 1544 ], "attributes": { "hdlname": "llhdmi_instance encode_G q_m", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:29.12-29.15|llhdmi.v:71.16-72.73", "unused_bits": "1 2 3 4 5 6 7 8" } }, "llhdmi_instance.encode_R.CD": { "hide_name": 0, "bits": [ "0", "0" ], "attributes": { "hdlname": "llhdmi_instance encode_R CD", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:7.14-7.16|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.QM0": { "hide_name": 0, "bits": [ 657 ], "attributes": { "hdlname": "llhdmi_instance encode_R QM0", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:19.6-19.9|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D0": { "hide_name": 0, "bits": [ 659 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 662 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 663 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D1": { "hide_name": 0, "bits": [ 660 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 669 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 670 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_1_Z": { "hide_name": 0, "bits": [ 661 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D0": { "hide_name": 0, "bits": [ 671 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 674 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 675 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D1": { "hide_name": 0, "bits": [ 672 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 677 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 678 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_2_Z": { "hide_name": 0, "bits": [ 673 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D0": { "hide_name": 0, "bits": [ 679 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 682 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 683 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D1": { "hide_name": 0, "bits": [ 680 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 684 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 685 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_3_Z": { "hide_name": 0, "bits": [ 681 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D0": { "hide_name": 0, "bits": [ 655 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 687 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 688 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D1": { "hide_name": 0, "bits": [ 656 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 689 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 690 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_Z": { "hide_name": 0, "bits": [ 658 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_R.QM0_L6MUX21_SD_Z_L6MUX21_D1_Z": { "hide_name": 0, "bits": [ 766, 697, 692, 686, 701, 767, 698 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.QM0_LUT4_C_1_Z": { "hide_name": 0, "bits": [ 694 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_R.QM0_LUT4_C_2_Z": { "hide_name": 0, "bits": [ 695 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_R.QM0_LUT4_C_3_Z": { "hide_name": 0, "bits": [ 696 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_R.QM0_LUT4_C_Z": { "hide_name": 0, "bits": [ 693 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_R.QM0_LUT4_D_Z": { "hide_name": 0, "bits": [ 699, 700, 766, 701, 767, 697 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.QM0_PFUMX_C0_ALUT": { "hide_name": 0, "bits": [ 702 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_R.QM0_PFUMX_C0_BLUT": { "hide_name": 0, "bits": [ 703 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_R.QM0_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 705 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS": { "hide_name": 0, "bits": [ 24, 233, 230, 226, 222, 218, 214, 210, 206, 201 ], "attributes": { "hdlname": "llhdmi_instance encode_R TMDS", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:9.19-9.23|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 708 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 710 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 711 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_4_LSR": { "hide_name": 0, "bits": [ 714 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 715 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_6_LSR": { "hide_name": 0, "bits": [ 718 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 719 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C": { "hide_name": 0, "bits": [ 720, 729, 721 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_A_Z": { "hide_name": 0, "bits": [ 727, 737, 724, 729, 736, 657, 728 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z": { "hide_name": 0, "bits": [ 747, 712, 716, 746, 698, 725 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 730 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 732 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 734 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 735 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 733 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 738 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 739 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 731 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 740 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 742 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 743 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 741 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 744 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_B_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 745 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z": { "hide_name": 0, "bits": [ 676, 666, 668, 665, 664, 657, 667 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 750 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 752 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 753 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 751 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 754 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 755 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0": { "hide_name": 0, "bits": [ 756 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 758 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 759 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1": { "hide_name": 0, "bits": [ 757 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 760 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_2_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 761 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 748 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 762 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 763 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 749 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 764 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 765 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 769 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_7_DI_LUT4_Z_C_LUT4_C_Z_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 770 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_8_LSR": { "hide_name": 0, "bits": [ 772 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_9_LSR": { "hide_name": 0, "bits": [ 774 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 707 ], "attributes": { } }, "llhdmi_instance.encode_R.TMDS_code": { "hide_name": 0, "bits": [ "0", "0", "1", "0", "1", "0", "1", "0", "1", "1" ], "attributes": { "hdlname": "llhdmi_instance encode_R TMDS_code", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:43.12-43.21|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.TMDS_data": { "hide_name": 0, "bits": [ 773, 771, 1545, 717, 1546, 713, 1547, 709, 1548, 1549 ], "attributes": { "hdlname": "llhdmi_instance encode_R TMDS_data", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:42.12-42.21|llhdmi.v:69.16-70.73", "unused_bits": "2 4 6 8 9" } }, "llhdmi_instance.encode_R.VD": { "hide_name": 0, "bits": [ 657, 726, 725, 729, 721, 736, 722, 723 ], "attributes": { "hdlname": "llhdmi_instance encode_R VD", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:6.14-6.16|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.VDE": { "hide_name": 0, "bits": [ 104 ], "attributes": { "hdlname": "llhdmi_instance encode_R VDE", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:8.8-8.11|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.balance_acc": { "hide_name": 0, "bits": [ 766, 767, 768, 691 ], "attributes": { "hdlname": "llhdmi_instance encode_R balance_acc", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:31.11-31.22|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_1_LSR": { "hide_name": 0, "bits": [ 778 ], "attributes": { } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 780 ], "attributes": { } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_3_LSR": { "hide_name": 0, "bits": [ 782 ], "attributes": { } }, "llhdmi_instance.encode_R.balance_acc_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 776 ], "attributes": { } }, "llhdmi_instance.encode_R.balance_acc_new": { "hide_name": 0, "bits": [ 781, 779, 777, 775 ], "attributes": { "hdlname": "llhdmi_instance encode_R balance_acc_new", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:41.12-41.27|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 785 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 787 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 788 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 786 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 789 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_1_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 790 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 783 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 791 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 792 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A": { "hide_name": 0, "bits": [ 793, 794, 700, 795, 768, 692 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 798 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 800 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 802 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 803 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 801 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 804 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 805 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 799 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 806 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 808 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 809 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 807 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 810 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 811 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0": { "hide_name": 0, "bits": [ 812 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.34-142.36" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 814 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.22-142.24" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 815 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.18-142.20" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1": { "hide_name": 0, "bits": [ 813 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 817 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 818 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 796 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 819 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 821 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 822 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 820 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 823 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 824 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 797 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 825 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 827 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 828 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 826 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 829 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 830 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 784 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.38-142.40" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 831 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.30-142.32" } }, "llhdmi_instance.encode_R.balance_acc_new_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 832 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:142.26-142.28" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C": { "hide_name": 0, "bits": [ 833, 834 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0": { "hide_name": 0, "bits": [ 837 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 839 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 841 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 842 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_C0": { "hide_name": 0, "bits": [ 676, 816, 698, 691, 704, 668, 768 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 840 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 843 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 844 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1": { "hide_name": 0, "bits": [ 838 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 845 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 847 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 848 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 846 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 849 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 850 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 835 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.66-158.68" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 851 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.50-158.52" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 853 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.22-158.24" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 854 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.18-158.20" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 852 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.54-158.56" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 855 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.30-158.32" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 856 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.26-158.28" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 836 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.70-158.72" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0": { "hide_name": 0, "bits": [ 857 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.58-158.60" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 859 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.38-158.40" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 860 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.34-158.36" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1": { "hide_name": 0, "bits": [ 858 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.62-158.64" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 861 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.46-158.48" } }, "llhdmi_instance.encode_R.balance_acc_new_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 862 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:158.42-158.44" } }, "llhdmi_instance.encode_R.clk": { "hide_name": 0, "bits": [ 6 ], "attributes": { "hdlname": "llhdmi_instance encode_R clk", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:5.8-5.11|llhdmi.v:69.16-70.73" } }, "llhdmi_instance.encode_R.invert_q_m": { "hide_name": 0, "bits": [ 1549 ], "attributes": { "hdlname": "llhdmi_instance encode_R invert_q_m", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:36.6-36.16|llhdmi.v:69.16-70.73", "unused_bits": "0 " } }, "llhdmi_instance.encode_R.q_m": { "hide_name": 0, "bits": [ 657, 1550, 1551, 1552, 1553, 1554, 1555, 1556, 1557 ], "attributes": { "hdlname": "llhdmi_instance encode_R q_m", "src": "ULX3S_25F.v:36.10-40.49|TMDS_encoder.v:29.12-29.15|llhdmi.v:69.16-70.73", "unused_bits": "1 2 3 4 5 6 7 8" } }, "llhdmi_instance.hSync": { "hide_name": 0, "bits": [ 244 ], "attributes": { "hdlname": "llhdmi_instance hSync", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:32.7-32.12" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 863 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:61.3-62.48" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_B": { "hide_name": 0, "bits": [ 864, 865, 866 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_B_LUT4_Z_B": { "hide_name": 0, "bits": [ 34, 867, 32, 868 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_C": { "hide_name": 0, "bits": [ 42, 872, 1558, 869, 1559, 865 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.15-62.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "2 4" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_COUT_S0": { "hide_name": 0, "bits": [ 875, 876, 873, 874, 870, 871 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.15-62.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 42, 872, 1558, 869, 1559 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.15-62.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_D": { "hide_name": 0, "bits": [ 42, 880, 1560, 877, 1561, 866 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.34-62.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "2 4" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0": { "hide_name": 0, "bits": [ 883, 884, 881, 882, 878, 879 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.34-62.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5" } }, "llhdmi_instance.hSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 42, 880, 1560, 877, 1561 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:62.34-62.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5" } }, "llhdmi_instance.i_blu": { "hide_name": 0, "bits": [ 237, 266, 251, 254, 273, 255, 274, 272 ], "attributes": { "hdlname": "llhdmi_instance i_blu", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:17.20-17.25" } }, "llhdmi_instance.i_grn": { "hide_name": 0, "bits": [ 449, 518, 517, 521, 513, 528, 514, 515 ], "attributes": { "hdlname": "llhdmi_instance i_grn", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:16.20-16.25" } }, "llhdmi_instance.i_pixclk": { "hide_name": 0, "bits": [ 6 ], "attributes": { "hdlname": "llhdmi_instance i_pixclk", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:13.14-13.22" } }, "llhdmi_instance.i_red": { "hide_name": 0, "bits": [ 657, 726, 725, 729, 721, 736, 722, 723 ], "attributes": { "hdlname": "llhdmi_instance i_red", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:15.20-15.25" } }, "llhdmi_instance.i_tmdsclk": { "hide_name": 0, "bits": [ 11 ], "attributes": { "hdlname": "llhdmi_instance i_tmdsclk", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:12.14-12.23" } }, "llhdmi_instance.o_blu": { "hide_name": 0, "bits": [ 3 ], "attributes": { "hdlname": "llhdmi_instance o_blu", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:23.15-23.20" } }, "llhdmi_instance.o_grn": { "hide_name": 0, "bits": [ 4 ], "attributes": { "hdlname": "llhdmi_instance o_grn", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:22.15-22.20" } }, "llhdmi_instance.o_newframe": { "hide_name": 0, "bits": [ 885 ], "attributes": { "hdlname": "llhdmi_instance o_newframe", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:20.14-20.24" } }, "llhdmi_instance.o_newframe_LUT4_C_Z": { "hide_name": 0, "bits": [ 886, 236 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.o_newframe_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 887 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:49.3-52.6" } }, "llhdmi_instance.o_newline": { "hide_name": 0, "bits": [ 236 ], "attributes": { "hdlname": "llhdmi_instance o_newline", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:19.14-19.23" } }, "llhdmi_instance.o_rd": { "hide_name": 0, "bits": [ 234 ], "attributes": { "hdlname": "llhdmi_instance o_rd", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:18.15-18.19" } }, "llhdmi_instance.o_red": { "hide_name": 0, "bits": [ 5 ], "attributes": { "hdlname": "llhdmi_instance o_red", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:21.15-21.20" } }, "llhdmi_instance.vSync": { "hide_name": 0, "bits": [ 894 ], "attributes": { "hdlname": "llhdmi_instance vSync", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:32.14-32.19" } }, "llhdmi_instance.vSync_LUT4_C_A": { "hide_name": 0, "bits": [ 386, 248, 322, 416, 323 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 895 ], "attributes": { "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:64.3-65.48" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A": { "hide_name": 0, "bits": [ 95, 87, 107 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D": { "hide_name": 0, "bits": [ 79, 75, 899 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_B": { "hide_name": 0, "bits": [ 95, 91, 900 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z": { "hide_name": 0, "bits": [ 888, 889, 95, 79 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z_B": { "hide_name": 0, "bits": [ 34, 901, 32, 902 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z_D": { "hide_name": 0, "bits": [ 36, 903, 42, 902 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_A_LUT4_Z_D_LUT4_C_Z_LUT4_Z_D_LUT4_B_Z": { "hide_name": 0, "bits": [ 56, 17 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_B": { "hide_name": 0, "bits": [ 67, 75, 896, 904 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_B_LUT4_C_Z": { "hide_name": 0, "bits": [ 63, 97 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C": { "hide_name": 0, "bits": [ 107, 896, 897, 898 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z_D": { "hide_name": 0, "bits": [ 1562, 915, 1563, 912, 1564, 909, 1565, 906, 1566, 905 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.15-65.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "0 2 4 6 8" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z_D_CCU2C_COUT_S0": { "hide_name": 0, "bits": [ 918, 919, 916, 917, 913, 914, 910, 911, 907, 908 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.15-65.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5 6 7 8 9" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_C_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 1567, 915, 1563, 912, 1564, 909, 1565, 906, 1566 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.15-65.28|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_D": { "hide_name": 0, "bits": [ 1568, 929, 1569, 926, 1570, 923, 1571, 920, 1572, 898 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.34-65.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "0 2 4 6 8" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0": { "hide_name": 0, "bits": [ 932, 933, 930, 931, 927, 928, 924, 925, 921, 922 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.34-65.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5 6 7 8 9" } }, "llhdmi_instance.vSync_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 1573, 929, 1569, 926, 1570, 923, 1571, 920, 1572 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:36.10-40.49|llhdmi.v:65.34-65.46|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9" } }, "o_blu": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "ULX3S_25F.v:26.8-26.13" } }, "o_grn": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "ULX3S_25F.v:25.8-25.13" } }, "o_newframe": { "hide_name": 0, "bits": [ 885 ], "attributes": { "src": "ULX3S_25F.v:27.25-27.35" } }, "o_newline": { "hide_name": 0, "bits": [ 236 ], "attributes": { "src": "ULX3S_25F.v:27.14-27.23" } }, "o_rd": { "hide_name": 0, "bits": [ 234 ], "attributes": { "src": "ULX3S_25F.v:27.8-27.12" } }, "o_red": { "hide_name": 0, "bits": [ 5 ], "attributes": { "src": "ULX3S_25F.v:24.8-24.13" } }, "pixel": { "hide_name": 0, "bits": [ 237, 266, 251, 254, 273, 255, 274, 272, 449, 518, 517, 521, 513, 528, 514, 515, 657, 726, 725, 729, 721, 736, 722, 723 ], "attributes": { "src": "ULX3S_25F.v:19.15-19.20" } }, "red": { "hide_name": 0, "bits": [ 657, 726, 725, 729, 721, 736, 722, 723 ], "attributes": { "src": "ULX3S_25F.v:18.14-18.17" } }, "reset_cnt": { "hide_name": 0, "bits": [ 937, 936, 17 ], "attributes": { "src": "ULX3S_25F.v:30.13-30.22" } }, "reset_cnt_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 938, 935, 1574 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:33.29-33.42|/usr/local/bin/../share/yosys/techmap.v:270.26-270.27", "unused_bits": "2" } }, "reset_cnt_TRELLIS_FF_Q_2_DI": { "hide_name": 0, "bits": [ 938, 936, 17 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:33.29-33.42|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" } }, "reset_cnt_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 934 ], "attributes": { } }, "vgatestsrc_instance.black": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance black", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:63.24-63.29" } }, "vgatestsrc_instance.dark_gray": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "1", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance dark_gray", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:63.54-63.63" } }, "vgatestsrc_instance.darkest_gray": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "1", "0", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance darkest_gray", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:64.5-64.17" } }, "vgatestsrc_instance.dline": { "hide_name": 0, "bits": [ 939 ], "attributes": { "hdlname": "vgatestsrc_instance dline", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:104.6-104.11" } }, "vgatestsrc_instance.dline_CCU2C_A0_COUT": { "hide_name": 0, "bits": [ "0", 1575, 942, 1576, 958, 1577, 953, 1578, 947, 1579, 948, 1580 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9 11" } }, "vgatestsrc_instance.dline_CCU2C_A0_S0": { "hide_name": 0, "bits": [ 943, 944, 963, 964, 959, 960, 954, 955, 949, 950, 968, 969 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "vgatestsrc_instance.dline_CCU2C_A0_S0_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ 1575, 942, 1576, 958, 1577, 953, 1578, 947, 1579, 948, 1580, 967 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:119.11-119.43|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "0 2 4 6 8 10 11" } }, "vgatestsrc_instance.dline_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 970 ], "attributes": { "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:106.6-106.42" } }, "vgatestsrc_instance.fatbar": { "hide_name": 0, "bits": [ 978, 978, 978, 978, 976, 974, 984, 972, 972, 972, 972, 972, 982, 980, 972, 972, 978, 978, 978, 978, 976, 974, 972, 972 ], "attributes": { "hdlname": "vgatestsrc_instance fatbar", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:146.32-146.38" } }, "vgatestsrc_instance.fatbar_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 977, 975, 973, 983, 971, 981, 979 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:188.2-205.9|vgatestsrc.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "vgatestsrc_instance.gradient": { "hide_name": 0, "bits": [ 1022, 1020, 1018, 1016, 1012, 1010, 1008, 1006, 1004, 1002, 1000, 998, 996, 994, 1036, 1034, 1032, 1030, 1028, 1026, 1024, 1014, 992, 990 ], "attributes": { "hdlname": "vgatestsrc_instance gradient", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:146.40-146.48" } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1021, 1019, 1017, 1015, 1011, 1009, 1007, 1005, 1003, 1001, 999, 997, 995, 993, 1035, 1033, 1031, 1029, 1027, 1025, 1023, 1013, 991, 989 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:233.2-255.9|vgatestsrc.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_7_D": { "hide_name": 0, "bits": [ 1041, 1044, 1046, 1042 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_9_A": { "hide_name": 0, "bits": [ 1051, 1043, 1041, 1037 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.gradient_TRELLIS_FF_Q_DI_LUT4_Z_9_C": { "hide_name": 0, "bits": [ 1041, 1048, 1045, 1049 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.h_step": { "hide_name": 0, "bits": [ 1087, 1082, 1077, 1072, 1067, 1061, 1129, 1124, 1119, 1114, 1109, 1104, 1099, 1094, 1058, 1055 ], "attributes": { "hdlname": "vgatestsrc_instance h_step", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:214.27-214.33" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_10_DI": { "hide_name": 0, "bits": [ 1059 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_10_LSR": { "hide_name": 0, "bits": [ 1060 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_11_DI": { "hide_name": 0, "bits": [ 1065 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_11_LSR": { "hide_name": 0, "bits": [ 1066 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_12_DI": { "hide_name": 0, "bits": [ 1070 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_12_LSR": { "hide_name": 0, "bits": [ 1071 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_13_DI": { "hide_name": 0, "bits": [ 1075 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_13_LSR": { "hide_name": 0, "bits": [ 1076 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_14_DI": { "hide_name": 0, "bits": [ 1080 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_14_LSR": { "hide_name": 0, "bits": [ 1081 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_15_DI": { "hide_name": 0, "bits": [ 1085 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_15_LSR": { "hide_name": 0, "bits": [ 1086 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 1056 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_1_LSR": { "hide_name": 0, "bits": [ 1057 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_2_DI": { "hide_name": 0, "bits": [ 1092 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_2_LSR": { "hide_name": 0, "bits": [ 1093 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 1097 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_3_LSR": { "hide_name": 0, "bits": [ 1098 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_4_DI": { "hide_name": 0, "bits": [ 1102 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_4_LSR": { "hide_name": 0, "bits": [ 1103 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 1107 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_5_LSR": { "hide_name": 0, "bits": [ 1108 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_6_DI": { "hide_name": 0, "bits": [ 1112 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_6_LSR": { "hide_name": 0, "bits": [ 1113 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 1117 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_7_LSR": { "hide_name": 0, "bits": [ 1118 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_8_DI": { "hide_name": 0, "bits": [ 1122 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_8_LSR": { "hide_name": 0, "bits": [ 1123 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_9_DI": { "hide_name": 0, "bits": [ 1127 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_9_LSR": { "hide_name": 0, "bits": [ 1128 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_CE": { "hide_name": 0, "bits": [ 1052 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_CE_PFUMX_Z_ALUT": { "hide_name": 0, "bits": [ 1132 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_CE_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 1133 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1053 ], "attributes": { } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B": { "hide_name": 0, "bits": [ 1089, 1083, 1078, 1073, 1068, 1062, 1130, 1125, 1120, 1115, 1110, 1105, 1100, 1095, 1090, 1137 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ 1087, 1143, 1581, 1142, 1582, 1141, 1583, 1139, 1584, 1140, 1585, 1146, 1586, 1144, 1587, 1145 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "2 4 6 8 10 12 14 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_B_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 1087, 1143, 1581, 1142, 1582, 1141, 1583, 1139, 1584, 1140, 1585, 1146, 1586, 1144, 1587 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:229.14-229.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5 7 9 11 13 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C": { "hide_name": 0, "bits": [ 1088, 1084, 1079, 1074, 1069, 1063, 1131, 1126, 1121, 1116, 1111, 1106, 1101, 1096, 1091, 1138 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ 1087, 1151, 1588, 1150, 1589, 1149, 1590, 1147, 1591, 1148, 1592, 1154, 1593, 1152, 1594, 1153 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "2 4 6 8 10 12 14 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_C_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "0", 1087, 1151, 1588, 1150, 1589, 1149, 1590, 1147, 1591, 1148, 1592, 1154, 1593, 1152, 1594 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:227.14-227.27|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5 7 9 11 13 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D": { "hide_name": 0, "bits": [ 1134, 1135, 1064, 1136, 236 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0": { "hide_name": 0, "bits": [ 1184, 1185, 1175, 1176, 1170, 1171, 1166, 1167, 1163, 1164, 1180, 1181, 1178, 1179, 1159, 1160 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_1_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 1182, 1174, 1595, 1169, 1596, 1165, 1597, 1161, 1598, 1162, 1599, 1177, 1600, 1158, 1601 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:226.7-226.64|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5 7 9 11 13 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0": { "hide_name": 0, "bits": [ 1207, 1208, 1200, 1201, 1197, 1198, 1194, 1195, 1191, 1192, 1205, 1206, 1203, 1204, 1187, 1188 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_2_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 1602, 1199, 1603, 1196, 1604, 1193, 1605, 1189, 1606, 1190, 1607, 1202, 1608, 1186, 1609 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:228.12-228.51|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9 11 13 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0": { "hide_name": 0, "bits": [ 1227, 1228, 1220, 1221, 1217, 1218, 1214, 1215, 1211, 1212, 1225, 1226, 1223, 1224, 1156, 1157 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_CCU2C_COUT_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 1610, 1219, 1611, 1216, 1612, 1213, 1613, 1209, 1614, 1210, 1615, 1222, 1616, 1155, 1617 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:224.25-224.34|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9 11 13 15" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_DI_LUT4_Z_D_LUT4_Z_A": { "hide_name": 0, "bits": [ 1229, 1230, 1231, 1232 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.h_step_TRELLIS_FF_Q_LSR": { "hide_name": 0, "bits": [ 1054 ], "attributes": { } }, "vgatestsrc_instance.hbar": { "hide_name": 0, "bits": [ 988, 987, 985, 986 ], "attributes": { "hdlname": "vgatestsrc_instance hbar", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:93.20-93.24" } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 1236, 987, 985, 986 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:141.12-141.23|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_CE": { "hide_name": 0, "bits": [ 1291, 1265, 890, 893 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.hbar_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1236, 1235, 1234, 1233 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:141.12-141.23|/usr/local/bin/../share/yosys/techmap.v:270.26-270.27" } }, "vgatestsrc_instance.hedge": { "hide_name": 0, "bits": [ "0", "0", "0", 1265, 1252, 1253, 1245, 1246, 1237, 1238, 1259, 1260 ], "attributes": { "hdlname": "vgatestsrc_instance hedge", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:91.21-91.26" } }, "vgatestsrc_instance.hedge_CCU2C_A0_3_COUT": { "hide_name": 0, "bits": [ 1618, 1268, 1619, 1256, 1620, 1249, 1621, 1241, 1622, 1242, 1623, 892 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "0 2 4 6 8 10" } }, "vgatestsrc_instance.hedge_LUT4_A_2_Z": { "hide_name": 0, "bits": [ 1274 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "vgatestsrc_instance.hedge_LUT4_B_1_Z": { "hide_name": 0, "bits": [ 1239, 1237, 1276 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.hedge_LUT4_B_3_Z": { "hide_name": 0, "bits": [ 891, 892, 234 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.hedge_LUT4_B_Z": { "hide_name": 0, "bits": [ 1262, 1260, 1278, 1275 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.hedge_LUT4_B_Z_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 1279 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "vgatestsrc_instance.hedge_LUT4_C_Z": { "hide_name": 0, "bits": [ 1253, 1255, 1271, 1273, 1280 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_6_DI": { "hide_name": 0, "bits": [ 1287 ], "attributes": { } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_8_DI": { "hide_name": 0, "bits": [ 1290 ], "attributes": { } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1291, 1289, 1288, 1286, 1285, 1284, 1283, 1282, 1281 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ "0", 1265, 1297, 1624, 1296, 1625, 1295, 1626, 1292, 1627 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5 7 9" } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ 1297, 1628, 1296, 1629, 1295, 1630, 1292, 1631, 1293, 1632 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:65.22-65.25", "unused_bits": "1 3 5 7 8 9" } }, "vgatestsrc_instance.hedge_TRELLIS_FF_Q_DI_CCU2C_S0_S1": { "hide_name": 0, "bits": [ 1289, 1633, 1286, 1634, 1284, 1635, 1282, 1636, 1294, 1637 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:142.13-142.48|/usr/local/bin/../share/yosys/ecp5/arith_map.v:65.27-65.29", "unused_bits": "1 3 5 7 8 9" } }, "vgatestsrc_instance.hfrac": { "hide_name": 0, "bits": [ 1182, 1183, 1172, 1173, 1168, 1050, 1049, 1048, 1047, 1046, 1044, 1043, 1037, 1040, 1038, 1039 ], "attributes": { "hdlname": "vgatestsrc_instance hfrac", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:214.20-214.25" } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1305, 1304, 1303, 1302, 1301, 1300, 1313, 1312, 1311, 1310, 1309, 1308, 1307, 1306, 1299, 1298 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ 1638, 1318, 1639, 1317, 1640, 1316, 1641, 1314, 1642, 1315, 1643, 1321, 1644, 1319, 1645, 1320 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "0 2 4 6 8 10 12 14 15" } }, "vgatestsrc_instance.hfrac_TRELLIS_FF_Q_DI_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "0", 1638, 1318, 1639, 1317, 1640, 1316, 1641, 1314, 1642, 1315, 1643, 1321, 1644, 1319, 1645 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:219.12-219.26|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9 11 13 15" } }, "vgatestsrc_instance.hpos": { "hide_name": 0, "bits": [ 1322, 1323, 1266, 1267, 1254, 1255, 1247, 1248, 1239, 1240, 1261, 1262 ], "attributes": { "hdlname": "vgatestsrc_instance hpos", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:91.15-91.19" } }, "vgatestsrc_instance.hpos_CCU2C_B0_COUT": { "hide_name": 0, "bits": [ "1", 1646, 1268, 1619, 1256, 1620, 1249, 1621, 1241, 1622, 1242, 1623 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9 11" } }, "vgatestsrc_instance.hpos_CCU2C_B0_S0": { "hide_name": 0, "bits": [ 1324, 1325, 1269, 1270, 1257, 1258, 1250, 1251, 1243, 1244, 1263, 1264 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:139.7-139.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5 6 7 8 9 10 11" } }, "vgatestsrc_instance.hpos_LUT4_A_1_Z": { "hide_name": 0, "bits": [ 1327, 1322, 1255 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.hpos_LUT4_B_Z": { "hide_name": 0, "bits": [ 1261, 1259, 1277, 1272 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.hpos_LUT4_C_Z": { "hide_name": 0, "bits": [ 1328, 1326, 1240, 1247 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1332, 1331, 1340, 1339, 1338, 1337, 1336, 1335, 1334, 1333, 1330, 1329 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ 1322, 1345, 1647, 1344, 1648, 1343, 1649, 1341, 1650, 1342, 1651, 1346 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "2 4 6 8 10 11" } }, "vgatestsrc_instance.hpos_TRELLIS_FF_Q_DI_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "0", 1322, 1345, 1647, 1344, 1648, 1343, 1649, 1341, 1650, 1342, 1651 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:138.11-138.22|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5 7 9 11" } }, "vgatestsrc_instance.i_height": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "1", "1", "1", "1", "0", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance i_height", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:55.22-55.30" } }, "vgatestsrc_instance.i_newframe": { "hide_name": 0, "bits": [ 885 ], "attributes": { "hdlname": "vgatestsrc_instance i_newframe", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:57.31-57.41" } }, "vgatestsrc_instance.i_newline": { "hide_name": 0, "bits": [ 236 ], "attributes": { "hdlname": "vgatestsrc_instance i_newline", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:57.20-57.29" } }, "vgatestsrc_instance.i_pixclk": { "hide_name": 0, "bits": [ 6 ], "attributes": { "hdlname": "vgatestsrc_instance i_pixclk", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:53.15-53.23" } }, "vgatestsrc_instance.i_rd": { "hide_name": 0, "bits": [ 234 ], "attributes": { "hdlname": "vgatestsrc_instance i_rd", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:57.14-57.18" } }, "vgatestsrc_instance.i_width": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "0", "1", "0", "1", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance i_width", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:54.22-54.29" } }, "vgatestsrc_instance.last_width": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "0", "1", "0", "1", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance last_width", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:207.17-207.27" } }, "vgatestsrc_instance.mid_blue": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance mid_blue", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:65.25-65.33" } }, "vgatestsrc_instance.mid_cyan": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance mid_cyan", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:64.30-64.38" } }, "vgatestsrc_instance.mid_green": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance mid_green", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:65.14-65.23" } }, "vgatestsrc_instance.mid_magenta": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "1", "1" ], "attributes": { "hdlname": "vgatestsrc_instance mid_magenta", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:64.40-64.51" } }, "vgatestsrc_instance.mid_off": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance mid_off", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:66.23-66.30" } }, "vgatestsrc_instance.mid_red": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "1", "1" ], "attributes": { "hdlname": "vgatestsrc_instance mid_red", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:65.5-65.12" } }, "vgatestsrc_instance.mid_white": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "1", "1" ], "attributes": { "hdlname": "vgatestsrc_instance mid_white", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:64.19-64.28" } }, "vgatestsrc_instance.mid_yellow": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "1", "1", "0", "0", "0", "0", "0", "0", "1", "1" ], "attributes": { "hdlname": "vgatestsrc_instance mid_yellow", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:65.35-65.45" } }, "vgatestsrc_instance.midbar": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", 1348, 1348, "0", "0", "0", "0", "0", "0", 1362, 1362, "0", "0", "0", "0", "0", "0", 1360, 1360 ], "attributes": { "hdlname": "vgatestsrc_instance midbar", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:146.24-146.30" } }, "vgatestsrc_instance.midbar_LUT4_C_1_Z": { "hide_name": 0, "bits": [ 1357, 984, 1435, 1356, 1351 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.midbar_LUT4_C_A": { "hide_name": 0, "bits": [ 1347, 1022, 1357, 978 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.midbar_LUT4_C_D": { "hide_name": 0, "bits": [ 1356, 1431, 1349, 1362, 1358 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.midbar_LUT4_C_Z": { "hide_name": 0, "bits": [ 1356, 1435, 1358, 1350 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.midbar_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1235, 1361, 1359 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:168.2-185.9|vgatestsrc.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "vgatestsrc_instance.midv": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "1", "1" ], "attributes": { "hdlname": "vgatestsrc_instance midv", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:66.17-66.21" } }, "vgatestsrc_instance.o_pixel": { "hide_name": 0, "bits": [ 237, 266, 251, 254, 273, 255, 274, 272, 449, 518, 517, 521, 513, 528, 514, 515, 657, 726, 725, 729, 721, 736, 722, 723 ], "attributes": { "hdlname": "vgatestsrc_instance o_pixel", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:59.25-59.32" } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_10_DI": { "hide_name": 0, "bits": [ 1365 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_11_DI": { "hide_name": 0, "bits": [ 1367 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_12_DI": { "hide_name": 0, "bits": [ 1369 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_13_DI": { "hide_name": 0, "bits": [ 1371 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_14_DI": { "hide_name": 0, "bits": [ 1373 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_15_DI": { "hide_name": 0, "bits": [ 1375 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_16_DI": { "hide_name": 0, "bits": [ 1377 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_17_DI": { "hide_name": 0, "bits": [ 1379 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_18_DI": { "hide_name": 0, "bits": [ 1381 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_19_DI": { "hide_name": 0, "bits": [ 1383 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_1_DI": { "hide_name": 0, "bits": [ 1364 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_20_DI": { "hide_name": 0, "bits": [ 1387 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_2_DI": { "hide_name": 0, "bits": [ 1386 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 1390 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_4_DI": { "hide_name": 0, "bits": [ 1392 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_5_DI": { "hide_name": 0, "bits": [ 1394 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_6_DI": { "hide_name": 0, "bits": [ 1396 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_7_DI": { "hide_name": 0, "bits": [ 1398 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_8_DI": { "hide_name": 0, "bits": [ 1400 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_9_DI": { "hide_name": 0, "bits": [ 1402 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1363 ], "attributes": { } }, "vgatestsrc_instance.o_pixel_TRELLIS_FF_Q_DI_LUT4_Z_B": { "hide_name": 0, "bits": [ 238, 239, 1382 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.pattern": { "hide_name": 0, "bits": [ 240, 1388, 1384, 1382, 1380, 1378, 1376, 1374, 498, 1372, 1370, 1368, 1366, 1403, 1401, 1399, 706, 1397, 1395, 1393, 1391, 1389, 1385, 1404 ], "attributes": { "hdlname": "vgatestsrc_instance pattern", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:146.50-146.57" } }, "vgatestsrc_instance.purple": { "hide_name": 0, "bits": [ "1", "1", "1", "1", "1", "1", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "1", "1", "1", "1", "1", "1", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance purple", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:63.46-63.52" } }, "vgatestsrc_instance.purplish_blue": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "1", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "vgatestsrc_instance purplish_blue", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:63.31-63.44" } }, "vgatestsrc_instance.topbar": { "hide_name": 0, "bits": [ "0", "0", "0", "0", "0", "0", 1435, 1435, "0", "0", "0", "0", "0", "0", 1431, 1431, "0", "0", "0", "0", "0", "0", 1429, 1429 ], "attributes": { "hdlname": "vgatestsrc_instance topbar", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:146.16-146.22" } }, "vgatestsrc_instance.topbar_LUT4_B_1_Z": { "hide_name": 0, "bits": [ 1432 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "vgatestsrc_instance.topbar_LUT4_B_1_Z_PFUMX_BLUT_ALUT": { "hide_name": 0, "bits": [ 1433 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z": { "hide_name": 0, "bits": [ 1421, 1420, 1419, 1418, 1416, 1415, 1414, 1413, 1412, 1411, 1410, 1409, 1408, 1407, 1428, 1427, 1426, 1425, 1424, 1423, 1422, 1417, 1406, 1405 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:258.2-275.9|vgatestsrc.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_9_D": { "hide_name": 0, "bits": [ 1034, 1347, 1434 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_LUT4_Z_D": { "hide_name": 0, "bits": [ 992, 1347, 1436 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.topbar_LUT4_B_2_Z_PFUMX_Z_BLUT": { "hide_name": 0, "bits": [ 1438 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "vgatestsrc_instance.topbar_LUT4_B_Z": { "hide_name": 0, "bits": [ 1430 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.18-134.20" } }, "vgatestsrc_instance.topbar_LUT4_B_Z_PFUMX_BLUT_ALUT": { "hide_name": 0, "bits": [ 1439 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "vgatestsrc_instance.topbar_LUT4_C_Z": { "hide_name": 0, "bits": [ 1437 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:134.22-134.24" } }, "vgatestsrc_instance.topbar_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1235, 1441, 1440 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:148.2-165.9|vgatestsrc.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "vgatestsrc_instance.white": { "hide_name": 0, "bits": [ "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1" ], "attributes": { "hdlname": "vgatestsrc_instance white", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:63.17-63.22" } }, "vgatestsrc_instance.yedge": { "hide_name": 0, "bits": [ "0", 1448, 1464, 1462, 1460, 1458, 1456, 1454, 1452, 1450, 1446, 1444 ], "attributes": { "hdlname": "vgatestsrc_instance yedge", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:92.21-92.26" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE": { "hide_name": 0, "bits": [ 1442 ], "attributes": { } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A": { "hide_name": 0, "bits": [ 1465, 1466, 1467, 236 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A": { "hide_name": 0, "bits": [ 1468, 1469, 1470, 1471 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z_2_C": { "hide_name": 0, "bits": [ 945, 1452, 1472, 1473 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_A_LUT4_Z_1_A_LUT4_Z_3_D": { "hide_name": 0, "bits": [ 946, 1450, 1474 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C": { "hide_name": 0, "bits": [ 1652, 1487, 1653, 1484, 1654, 1481, 1655, 1478, 1656, 1475, 1657, 1467 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:38.23-38.25", "unused_bits": "0 2 4 6 8 10" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C_CCU2C_COUT_S0": { "hide_name": 0, "bits": [ 1490, 1491, 1488, 1489, 1485, 1486, 1482, 1483, 1479, 1480, 1476, 1477 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27", "unused_bits": "0 1 2 3 4 5 6 7 8 9 10 11" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_CE_LUT4_Z_C_CCU2C_COUT_S0_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "1", 1658, 1487, 1653, 1484, 1654, 1481, 1655, 1478, 1656, 1475, 1657 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:120.7-120.20|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "1 3 5 7 9 11" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1447, 1463, 1461, 1459, 1457, 1455, 1453, 1451, 1449, 1445, 1443 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:34.26-34.27" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0_4_COUT": { "hide_name": 0, "bits": [ 1496, 1659, 1495, 1660, 1494, 1661, 1492, 1662, 1493, 1663, 1497, 1664 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:65.22-65.25", "unused_bits": "1 3 5 7 9 10 11" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0_4_S1": { "hide_name": 0, "bits": [ 1463, 1665, 1459, 1666, 1455, 1667, 1451, 1668, 1445, 1669, 1498, 1670 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:65.27-65.29", "unused_bits": "1 3 5 7 9 10 11" } }, "vgatestsrc_instance.yedge_TRELLIS_FF_Q_DI_CCU2C_S0_COUT": { "hide_name": 0, "bits": [ "0", 1448, 1496, 1671, 1495, 1672, 1494, 1673, 1492, 1674, 1493, 1675 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:123.13-123.49|/usr/local/bin/../share/yosys/ecp5/arith_map.v:63.22-63.23", "unused_bits": "3 5 7 9 11" } }, "vgatestsrc_instance.yline": { "hide_name": 0, "bits": [ 1354, 1353, 1352, 1355 ], "attributes": { "hdlname": "vgatestsrc_instance yline", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:93.13-93.18" } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_3_DI": { "hide_name": 0, "bits": [ 1502, 1353, 1352, 1355 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:122.13-122.25|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" } }, "vgatestsrc_instance.yline_TRELLIS_FF_Q_DI": { "hide_name": 0, "bits": [ 1502, 1501, 1500, 1499 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:122.13-122.25|/usr/local/bin/../share/yosys/techmap.v:270.26-270.27" } }, "vgatestsrc_instance.ypos": { "hide_name": 0, "bits": [ 940, 941, 961, 962, 956, 957, 951, 952, 945, 946, 965, 966 ], "attributes": { "hdlname": "vgatestsrc_instance ypos", "src": "ULX3S_25F.v:43.5-47.23|vgatestsrc.v:92.15-92.19" } }, "vgatestsrc_instance.ypos_LUT4_A_1_Z": { "hide_name": 0, "bits": [ 1504, 956, 951, 952 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.ypos_LUT4_A_2_Z": { "hide_name": 0, "bits": [ 956, 951, 952, 1505 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "vgatestsrc_instance.ypos_LUT4_B_Z": { "hide_name": 0, "bits": [ 1506, 1507, 962, 1503 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:109.23-109.24" } }, "wifi_gpio0": { "hide_name": 0, "bits": [ "1" ], "attributes": { "src": "ULX3S_25F.v:6.9-6.19" } } } }, "USRMCLK": { "attributes": { "keep": "00000000000000000000000000000001", "blackbox": "00000000000000000000000000000001", "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:160.1-164.10" }, "ports": { "USRMCLKI": { "direction": "input", "bits": [ 2 ] }, "USRMCLKTS": { "direction": "input", "bits": [ 3 ] }, "USRMCLKO": { "direction": "output", "bits": [ 4 ] } }, "cells": { }, "netnames": { "USRMCLKI": { "hide_name": 0, "bits": [ 2 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:161.8-161.16" } }, "USRMCLKO": { "hide_name": 0, "bits": [ 4 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:162.9-162.17" } }, "USRMCLKTS": { "hide_name": 0, "bits": [ 3 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:161.18-161.27" } } } } } } ================================================ FILE: src/hdmi_test_pattern/ULX3S_25F.v ================================================ `default_nettype none module ULX3S_25F ( input clk_25mhz, output [3:0] gpdi_dp, gpdi_dn, output wifi_gpio0); // Tie gpio0 high, this keeps the board from rebooting assign wifi_gpio0 = 1'b1; wire clk_25MHz, clk_250MHz; clock clock_instance( .clkin_25MHz(clk_25mhz), .clk_25MHz(clk_25MHz), .clk_250MHz(clk_250MHz) ); wire [7:0] red, grn, blu; wire [23:0] pixel; assign red= pixel[23:16]; assign grn= pixel[15:8]; assign blu= pixel[7:0]; wire o_red; wire o_grn; wire o_blu; wire o_rd, o_newline, o_newframe; // A reset line that goes low after 16 ticks reg [2:0] reset_cnt = 0; wire reset = ~reset_cnt[2]; always @(posedge clk_25mhz) if (reset) reset_cnt <= reset_cnt + 1; llhdmi llhdmi_instance( .i_tmdsclk(clk_250MHz), .i_pixclk(clk_25MHz), .i_reset(reset), .i_red(red), .i_grn(grn), .i_blu(blu), .o_rd(o_rd), .o_newline(o_newline), .o_newframe(o_newframe), .o_red(o_red), .o_grn(o_grn), .o_blu(o_blu)); vgatestsrc #(.BITS_PER_COLOR(8)) vgatestsrc_instance( .i_pixclk(clk_25MHz), .i_reset(reset), .i_width(640), .i_height(480), .i_rd(o_rd), .i_newline(o_newline), .i_newframe(o_newframe), .o_pixel(pixel)); OBUFDS OBUFDS_red(.I(o_red), .O(gpdi_dp[2]), .OB(gpdi_dn[2])); OBUFDS OBUFDS_grn(.I(o_grn), .O(gpdi_dp[1]), .OB(gpdi_dn[1])); OBUFDS OBUFDS_blu(.I(o_blu), .O(gpdi_dp[0]), .OB(gpdi_dn[0])); OBUFDS OBUFDS_clock(.I(clk_25MHz), .O(gpdi_dp[3]), .OB(gpdi_dn[3])); endmodule ================================================ FILE: src/hdmi_test_pattern/ULX3S_25F.ys ================================================ read_verilog ULX3S_25F.v read_verilog llhdmi.v read_verilog vgatestsrc.v read_verilog TMDS_encoder.v read_verilog clock.v read_verilog OBUFDS.v hierarchy -top ULX3S_25F synth_ecp5 -json ULX3S_25F.json ================================================ FILE: src/hdmi_test_pattern/clock.v ================================================ module clock ( input clkin_25MHz, output clk_125MHz, output clk_250MHz, output clk_25MHz, output clk_83M333Hz, output locked ); wire int_locked; (* ICP_CURRENT="9" *) (* LPF_RESISTOR="8" *) (* MFG_ENABLE_FILTEROPAMP="1" *) (* MFG_GMCREF_SEL="2" *) EHXPLLL #( .PLLRST_ENA("DISABLED"), .INTFB_WAKE("DISABLED"), .STDBY_ENABLE("DISABLED"), .DPHASE_SOURCE("DISABLED"), .CLKOS_FPHASE(0), .CLKOP_FPHASE(0), .CLKOS3_CPHASE(5), .CLKOS2_CPHASE(0), .CLKOS_CPHASE(1), .CLKOP_CPHASE(3), .OUTDIVIDER_MUXD("DIVD"), .OUTDIVIDER_MUXC("DIVC"), .OUTDIVIDER_MUXB("DIVB"), .OUTDIVIDER_MUXA("DIVA"), .CLKOS3_ENABLE("ENABLED"), .CLKOS2_ENABLE("ENABLED"), .CLKOS_ENABLE("ENABLED"), .CLKOP_ENABLE("ENABLED"), .CLKOS3_DIV(0), .CLKOS2_DIV(20), .CLKOS_DIV(2), .CLKOP_DIV(4), .CLKFB_DIV(5), .CLKI_DIV(1), .FEEDBK_PATH("CLKOP") ) pll_i ( .CLKI(clkin_25MHz), .CLKFB(clk_125MHz), .CLKOP(clk_125MHz), .CLKOS(clk_250MHz), .CLKOS2(clk_25MHz), .CLKOS3(clk_83M333Hz), .RST(1'b0), .STDBY(1'b0), .PHASESEL0(1'b0), .PHASESEL1(1'b0), .PHASEDIR(1'b0), .PHASESTEP(1'b0), .PLLWAKESYNC(1'b0), .ENCLKOP(1'b0), .ENCLKOS(1'b0), .ENCLKOS2(1'b0), .ENCLKOS3(1'b0), .LOCK(locked), .INTLOCK(int_locked) ); endmodule ================================================ FILE: src/hdmi_test_pattern/icesugar_pro.lpf ================================================ BLOCK RESETPATHS; BLOCK ASYNCPATHS; ## ULX3S v2.x.x and v3.0.x # The clock "usb" and "gpdi" sheet #ULX3S #LOCATE COMP "clk_25mhz" SITE "G2"; #i5-v6.0 LOCATE COMP "clk_25mhz" SITE "P6"; IOBUF PORT "clk_25mhz" PULLMODE=NONE IO_TYPE=LVCMOS33; FREQUENCY PORT "clk_25mhz" 25 MHZ; #iCESugar-pro HDMI LOCATE COMP "gpdi_dp[0]" SITE "G1"; # Blue + LOCATE COMP "gpdi_dn[0]" SITE "F1"; # Blue - LOCATE COMP "gpdi_dp[1]" SITE "J1"; # Green + LOCATE COMP "gpdi_dn[1]" SITE "H2"; # Green - LOCATE COMP "gpdi_dp[2]" SITE "L1"; # Red + LOCATE COMP "gpdi_dn[2]" SITE "K2"; # Red - LOCATE COMP "gpdi_dp[3]" SITE "E2"; # Clock + LOCATE COMP "gpdi_dn[3]" SITE "D3"; # Clock - IOBUF PORT "gpdi_dp[0]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dn[0]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dp[1]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dn[1]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dp[2]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dn[2]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dp[3]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dn[3]" IO_TYPE=LVCMOS33 DRIVE=4; LOCATE COMP "wifi_gpio0" SITE "A11"; IOBUF PORT "wifi_gpio0" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; ================================================ FILE: src/hdmi_test_pattern/llhdmi.v ================================================ `default_nettype none // module llhdmi( i_tmdsclk, i_pixclk, i_reset, i_red, i_grn, i_blu, o_rd, o_newline, o_newframe, `ifdef VERILATOR o_TMDS_red, o_TMDS_grn, o_TMDS_blu, `endif o_red, o_grn, o_blu); input wire i_tmdsclk; // TMDS clock input wire i_pixclk; // Pixel clock, 10 times slower than i_tmdsclk input wire i_reset; // Reset this module when strobed high input wire [7:0] i_red; // Red green and blue colour values input wire [7:0] i_grn; // for each pixel input wire [7:0] i_blu; output wire o_rd; // True when we can accept pixel data output reg o_newline; // True on last pixel of each line output reg o_newframe; // True on last pixel of each frame output wire o_red; // Red TMDS pixel stream output wire o_grn; // Green TMDS pixel stream output wire o_blu; // Blue TMDS pixel stream `ifdef VERILATOR output wire [9:0] o_TMDS_red, o_TMDS_grn, o_TMDS_blu; assign o_TMDS_red= TMDS_red; assign o_TMDS_grn= TMDS_grn; assign o_TMDS_blu= TMDS_blu; `endif reg [9:0] CounterX, CounterY; reg hSync, vSync, DrawArea; // Keep track of the current X/Y pixel position always @(posedge i_pixclk) if (i_reset) CounterX <= 0; else CounterX <= (CounterX==799) ? 0 : CounterX+1; always @(posedge i_pixclk) if (i_reset) CounterY <= 0; else if (CounterX==799) begin CounterY <= (CounterY==524) ? 0 : CounterY+1; end // Signal end of line, end of frame always @(posedge i_pixclk) begin o_newline <= (CounterX==639) ? 1 : 0; o_newframe <= (CounterX==639) && (CounterY==479) ? 1 : 0; end // Determine when we are in a drawable area always @(posedge i_pixclk) DrawArea <= (CounterX<640) && (CounterY<480); assign o_rd= ~i_reset & DrawArea; // Generate horizontal and vertical sync pulses always @(posedge i_pixclk) hSync <= (CounterX>=656) && (CounterX<752); always @(posedge i_pixclk) vSync <= (CounterY>=490) && (CounterY<492); // Convert the 8-bit colours into 10-bit TMDS values wire [9:0] TMDS_red, TMDS_grn, TMDS_blu; TMDS_encoder encode_R(.clk(i_pixclk), .VD(i_red), .CD(2'b00), .VDE(DrawArea), .TMDS(TMDS_red)); TMDS_encoder encode_G(.clk(i_pixclk), .VD(i_grn), .CD(2'b00), .VDE(DrawArea), .TMDS(TMDS_grn)); TMDS_encoder encode_B(.clk(i_pixclk), .VD(i_blu), .CD({vSync,hSync}), .VDE(DrawArea), .TMDS(TMDS_blu)); // Strobe the TMDS_shift_load once every 10 i_tmdsclks // i.e. at the start of new pixel data reg [3:0] TMDS_mod10=0; reg TMDS_shift_load=0; always @(posedge i_tmdsclk) begin if (i_reset) begin TMDS_mod10 <= 0; TMDS_shift_load <= 0; end else begin TMDS_mod10 <= (TMDS_mod10==4'd9) ? 4'd0 : TMDS_mod10+4'd1; TMDS_shift_load <= (TMDS_mod10==4'd9); end end // Latch the TMDS colour values into three shift registers // at the start of the pixel, then shift them one bit each i_tmdsclk. // We will then output the LSB on each i_tmdsclk. reg [9:0] TMDS_shift_red=0, TMDS_shift_grn=0, TMDS_shift_blu=0; always @(posedge i_tmdsclk) begin if (i_reset) begin TMDS_shift_red <= 0; TMDS_shift_grn <= 0; TMDS_shift_blu <= 0; end else begin TMDS_shift_red <= TMDS_shift_load ? TMDS_red: {1'b0, TMDS_shift_red[9:1]}; TMDS_shift_grn <= TMDS_shift_load ? TMDS_grn: {1'b0, TMDS_shift_grn[9:1]}; TMDS_shift_blu <= TMDS_shift_load ? TMDS_blu: {1'b0, TMDS_shift_blu[9:1]}; end end // Finally output the LSB of each color bitstream assign o_red= TMDS_shift_red[0]; assign o_grn= TMDS_shift_grn[0]; assign o_blu= TMDS_shift_blu[0]; endmodule ================================================ FILE: src/hdmi_test_pattern/llhdmi_tb.cpp ================================================ #include #include #include #include #include #include #include #include #include "verilated.h" #include "Vllhdmi.h" #include "testb.h" int main(int argc, char **argv) { Verilated::commandArgs(argc, argv); TESTB *tb = new TESTB; tb->opentrace("llhdmi.vcd"); tb->m_core->i_red= 0xf0; tb->m_core->i_grn= 0x80; tb->m_core->i_blu= 0x20; tb->m_core->i_reset= 0; for (unsigned clocks=0; clocks < 4400000; clocks++) { tb->tick(); } printf("\n\nSimulation complete\n"); } ================================================ FILE: src/hdmi_test_pattern/pattern.v ================================================ `default_nettype none module pattern(input i_tmdsclk, i_pixclk, output red, grn, blu, o_rd, o_TMDS_red, o_TMDS_grn, o_TMDS_blu); wire [7:0] red, grn, blu; wire [23:0] pixel; assign red= pixel[23:16]; assign grn= pixel[15:8]; assign blu= pixel[7:0]; /* verilator lint_off UNUSED */ wire o_red; wire o_grn; wire o_blu; wire [9:0] o_TMDS_red, o_TMDS_grn, o_TMDS_blu; /* verilator lint_on UNUSED */ wire o_rd, o_newline, o_newframe; // A reset line that goes low after 16 ticks reg [2:0] reset_cnt = 0; wire reset = ~reset_cnt[2]; always @(posedge i_pixclk) if (reset) reset_cnt <= reset_cnt + 1; llhdmi llhdmi_instance( .i_tmdsclk(i_tmdsclk), .i_pixclk(i_pixclk), .i_reset(reset), .i_red(red), .i_grn(grn), .i_blu(blu), .o_rd(o_rd), .o_newline(o_newline), .o_newframe(o_newframe), .o_TMDS_red(o_TMDS_red), .o_TMDS_grn(o_TMDS_grn), .o_TMDS_blu(o_TMDS_blu), .o_red(o_red), .o_grn(o_grn), .o_blu(o_blu)); vgatestsrc #(.BITS_PER_COLOR(8)) vgatestsrc_instance( .i_pixclk(i_pixclk), .i_reset(reset), .i_width(640), .i_height(480), .i_rd(o_rd), .i_newline(o_newline), .i_newframe(o_newframe), .o_pixel(pixel)); endmodule ================================================ FILE: src/hdmi_test_pattern/pattern_tb.cpp ================================================ #include #include #include #include #include #include #include #include #include "verilated.h" #include "Vpattern.h" #include "testb.h" int main(int argc, char **argv) { Verilated::commandArgs(argc, argv); TESTB *tb = new TESTB; tb->opentrace("pattern.vcd"); int oldpixclk=0; printf("P3\n640 480\n255\n"); for (unsigned clocks=0; clocks < 4400000; clocks++) { tb->tick(); if (tb->m_core->i_pixclk && (tb->m_core->i_pixclk != oldpixclk)) { if (tb->m_core->o_rd) { #if 1 printf("%d %d %d\n", tb->m_core->red, tb->m_core->grn, tb->m_core->blu); } #else printf("%x %x %x => %x %x %x\n", tb->m_core->red, tb->m_core->grn, tb->m_core->blu, tb->m_core->o_TMDS_red, tb->m_core->o_TMDS_grn, tb->m_core->o_TMDS_blu); } #endif } oldpixclk= tb->m_core->i_pixclk; } } ================================================ FILE: src/hdmi_test_pattern/testb.h ================================================ //////////////////////////////////////////////////////////////////////////////// // // Filename: testb.h // // Project: Verilog Tutorial Example file // // Purpose: A wrapper providing a common interface to a clocked FPGA core // being exercised by Verilator. // // Creator: Dan Gisselquist, Ph.D. // Gisselquist Technology, LLC // //////////////////////////////////////////////////////////////////////////////// // // Written and distributed by Gisselquist Technology, LLC // // This program is hereby granted to the public domain. // // This program is distributed in the hope that it will be useful, but WITHOUT // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or // FITNESS FOR A PARTICULAR PURPOSE. // //////////////////////////////////////////////////////////////////////////////// // // #ifndef TESTB_H #define TESTB_H #include #include #include #define TBASSERT(TB,A) do { if (!(A)) { (TB).closetrace(); } assert(A); } while(0); template class TESTB { public: VA *m_core; VerilatedVcdC* m_trace; uint64_t m_tickcount; TESTB(void) : m_trace(NULL), m_tickcount(0l) { m_core = new VA; Verilated::traceEverOn(true); m_core->i_tmdsclk = 0; eval(); // Get our initial values set properly. } virtual ~TESTB(void) { closetrace(); delete m_core; m_core = NULL; } virtual void opentrace(const char *vcdname) { if (!m_trace) { m_trace = new VerilatedVcdC; m_core->trace(m_trace, 99); m_trace->open(vcdname); } } virtual void closetrace(void) { if (m_trace) { m_trace->close(); delete m_trace; m_trace = NULL; } } virtual void eval(void) { m_core->eval(); } virtual void tick(void) { m_tickcount++; // Make sure we have our evaluations straight before the top // of the clock. This is necessary since some of the // connection modules may have made changes, for which some // logic depends. This forces that logic to be recalculated // before the top of the clock. eval(); if (m_trace) m_trace->dump((vluint64_t)(10*m_tickcount-2)); m_core->i_pixclk = (((m_tickcount-1)%10)<5) ? 1 : 0; m_core->i_tmdsclk = 1; eval(); if (m_trace) m_trace->dump((vluint64_t)(10*m_tickcount)); m_core->i_tmdsclk = 0; eval(); if (m_trace) { m_trace->dump((vluint64_t)(10*m_tickcount+5)); m_trace->flush(); } } unsigned long tickcount(void) { return m_tickcount; } }; #endif ================================================ FILE: src/hdmi_test_pattern/ulx3s_25f_ULX3S_25F.config ================================================ .device LFE5U-25F .comment Part: LFE5U-25F-6CABGA256 .tile CIB_R10C1:CIB_LR arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 .tile CIB_R12C1:CIB_LR arc: E1_H02E0001 S1_V02N0001 arc: N1_V02N0701 S1_V02N0701 .tile CIB_R13C10:CIB_DSP arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H02W0601 arc: W1_H02W0201 N1_V02S0201 arc: W3_H06W0103 V01N0101 .tile CIB_R13C11:CIB_DSP arc: E1_H02E0701 V06S0203 arc: N1_V02N0301 H06W0003 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06W0103 .tile CIB_R13C12:CIB_DSP arc: E1_H02E0501 V06S0303 arc: S1_V02S0701 H02E0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 N1_V01S0000 .tile CIB_R13C13:CIB_DSP arc: N1_V02N0501 H02E0501 .tile CIB_R13C14:CIB_DSP arc: W1_H02W0501 V06S0303 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 V06S0103 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 V06S0303 .tile CIB_R13C15:CIB_DSP arc: S1_V02S0301 V01N0101 .tile CIB_R13C2:CIB_DSP arc: N3_V06N0003 S3_V06N0003 .tile CIB_R13C3:CIB_DSP arc: N1_V02N0601 S1_V02N0301 .tile CIB_R13C4:CIB_DSP arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 .tile CIB_R13C5:CIB_DSP arc: E1_H02E0001 N3_V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 V01N0001 .tile CIB_R13C6:CIB_DSP arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N1_V01S0000 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 .tile CIB_R13C7:CIB_DSP arc: E1_H02E0701 V06S0203 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0601 N1_V01S0000 arc: W1_H02W0501 S1_V02N0501 .tile CIB_R13C8:CIB_DSP arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 .tile CIB_R13C9:CIB_DSP arc: E1_H02E0201 V06S0103 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: S1_V02S0001 V01N0001 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0701 .tile CIB_R14C1:CIB_LR arc: JA0 V02N0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0701 E3_H06W0203 arc: S3_V06S0303 E1_H01W0100 enum: CIB.JB0MUX 0 .tile CIB_R15C1:CIB_LR arc: E1_H02E0201 E1_H01W0000 arc: N1_V02N0701 S1_V02N0601 .tile CIB_R16C1:CIB_LR arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 .tile CIB_R17C1:CIB_LR arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 E3_H06W0203 arc: N1_V02N0601 H06W0303 .tile CIB_R18C1:CIB_LR arc: E1_H02E0001 N1_V02S0001 .tile CIB_R19C1:CIB_LR arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S3_V06N0203 arc: N1_V02N0301 E3_H06W0003 .tile CIB_R1C11:CIB arc: E3_H06E0303 V06N0303 .tile CIB_R1C17:CIB arc: E3_H06E0303 W3_H06E0303 .tile CIB_R1C23:CIB arc: E3_H06E0003 W3_H06E0303 .tile CIB_R1C29:CIB arc: E3_H06E0103 W3_H06E0003 .tile CIB_R1C2:CIB arc: V01S0000 S3_V06N0103 .tile CIB_R1C35:CIB arc: E3_H06E0103 W3_H06E0103 .tile CIB_R1C41:CIB arc: E3_H06E0103 W3_H06E0103 .tile CIB_R1C47:CIB arc: E3_H06E0203 W3_H06E0103 .tile CIB_R1C53:CIB arc: JA0 H02W0701 arc: E1_H01E0101 W3_H06E0203 enum: CIB.JB0MUX 0 .tile CIB_R1C54:CIB arc: W1_H02W0701 H01E0101 .tile CIB_R20C1:CIB_LR arc: JA0 H02W0701 arc: JA3 V02N0501 arc: V01S0100 N3_V06S0303 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R21C1:CIB_LR arc: N1_V02N0501 N1_V01S0100 .tile CIB_R23C1:CIB_LR arc: H00L0000 H02W0201 arc: JA0 H00L0000 arc: S1_V02S0501 E1_H02W0501 enum: CIB.JB0MUX 0 .tile CIB_R25C1:CIB_LR_S arc: JA3 N1_V02S0501 arc: N3_V06N0203 S3_V06N0103 enum: CIB.JB3MUX 0 .tile CIB_R25C2:CIB_EBR arc: N3_V06N0003 S3_V06N0003 .tile CIB_R25C4:CIB_EBR arc: N3_V06N0003 S3_V06N0003 .tile CIB_R26C1:CIB_LR arc: JA0 E1_H02W0701 enum: CIB.JB0MUX 0 .tile CIB_R2C1:CIB_LR arc: S1_V02S0701 E1_H01W0100 .tile CIB_R31C1:CIB_LR arc: N3_V06N0103 S3_V06N0103 .tile CIB_R37C1:CIB_LR_S arc: N3_V06N0103 S3_V06N0003 .tile CIB_R37C2:CIB_EBR arc: N3_V06N0003 S3_V06N0303 .tile CIB_R37C4:CIB_EBR arc: N3_V06N0003 S3_V06N0303 .tile CIB_R43C1:CIB_LR arc: N3_V06N0003 S3_V06N0303 .tile CIB_R49C1:CIB_LR_S arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0303 JF5 arc: N3_V06N0303 JF5 .tile CIB_R49C2:CIB_PLL2 arc: H00R0100 V02S0701 arc: H01W0000 JF0 arc: JA3 V00B0000 arc: JA4 V00B0000 arc: JB1 V00B0000 arc: JB3 H00R0100 arc: JB4 V02S0701 arc: JC2 H00R0100 arc: JC3 H00R0100 arc: JC4 V02S0201 arc: JD2 V02S0201 arc: JD4 V00B0000 arc: JLSR0 V00B0000 arc: N3_V06N0203 JF4 arc: V00B0000 V02S0201 arc: PLLCSOUT_PLLREFCS CLK1_PLLREFCS .tile CIB_R49C3:CIB_PLL3 arc: JCLK0 V00B0000 arc: V00B0000 W1_H02E0601 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R49C42:VCIB_DCU0 enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C43:VCIB_DCUA enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C44:VCIB_DCUB enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C45:VCIB_DCUC enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C46:VCIB_DCUD enum: CIB.JA1MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C47:VCIB_DCUF enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C48:VCIB_DCU3 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C49:VCIB_DCU2 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C4:CIB arc: N3_V06N0303 H06E0303 .tile CIB_R49C50:VCIB_DCUG enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C51:VCIB_DCUH enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C52:VCIB_DCUI enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C53:VCIB_DCU1 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 .tile CIB_R49C69:CIB_PLL3 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R49C6:CIB_EFB0 enum: CIB.JB3MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C7:CIB_EFB1 enum: CIB.JA3MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R4C1:CIB_LR arc: JA3 N1_V02S0701 enum: CIB.JB3MUX 0 .tile CIB_R7C1:CIB_LR arc: E1_H02E0301 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 .tile CIB_R8C1:CIB_LR arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 E3_H06W0203 arc: JA3 E1_H02W0501 arc: S3_V06S0003 E3_H06W0003 enum: CIB.JB3MUX 0 .tile CIB_R9C1:CIB_LR arc: E1_H02E0001 N1_V02S0001 .tile MIB_R0C53:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.PULLMODE UP enum: PIOA.DRIVE 4 .tile MIB_R0C69:BANKREF1 enum: BANK.VCCIO 3V3 .tile MIB_R13C21:DSP_SPINE_UL0 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R13C31:CMUX_UL_0 arc: G_DCS0CLK0 G_VPFN0000 arc: G_ULPCLK0 G_HPFE0000 arc: G_ULPCLK1 G_HPFE0600 .tile MIB_R13C32:CMUX_UR_0 arc: G_DCS0CLK1 G_VPFN0000 arc: G_URPCLK0 G_HPFE0000 arc: G_URPCLK1 G_HPFE0600 .tile MIB_R13C3:DSP_SPINE_UL1 arc: G_VPTX0000 G_HPRX0000 arc: G_VPTX0100 G_HPRX0100 unknown: F2B0 unknown: F3B0 unknown: F5B0 unknown: F11B0 unknown: F13B0 .tile MIB_R14C0:PICL0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R15C0:PICL1 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DRIVE 4 .tile MIB_R1C0:BANKREF7A enum: BANK.VCCIO 3V3 .tile MIB_R1C53:PICT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R20C0:PICL0_DQS2 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R21C0:PICL1_DQS3 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DRIVE 4 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DRIVE 4 .tile MIB_R23C0:PICL0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R24C0:PICL1 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.DRIVE 4 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DRIVE 4 .tile MIB_R25C0:MIB_CIB_LR enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R25C3:LMID_0 arc: G_LDCC0CLKI G_JLLCPLL0CLKOS2 arc: G_LDCC6CLKI G_JLLCPLL0CLKOS .tile MIB_R26C0:PICL0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R27C0:PICL1 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DRIVE 4 .tile MIB_R37C31:CMUX_LL_0 arc: G_DCS1CLK0 G_VPFN0000 arc: G_LLPCLK0 G_HPFE0000 arc: G_LLPCLK1 G_HPFE0600 .tile MIB_R37C32:CMUX_LR_0 arc: G_DCS1CLK1 G_VPFN0000 arc: G_LRPCLK0 G_HPFE0000 arc: G_LRPCLK1 G_HPFE0600 .tile MIB_R3C0:PICL1 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.DRIVE 4 .tile MIB_R48C0:PICL1 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 enum: PIOC.HYSTERESIS ON enum: PIOC.PULLMODE NONE .tile MIB_R49C0:MIB_CIB_LR enum: PIOC.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R4C0:PICL2 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R50C1:BANKREF6 enum: BANK.VCCIO 3V3 .tile MIB_R50C2:PLL0_LL arc: N1_CLKFB N1_JCLKFB3 arc: N1_REFCLK1 N1_JREFCLK1_3 .tile MIB_R50C4:EFB0_PICB0 unknown: F54B1 unknown: F56B1 unknown: F82B1 unknown: F94B1 .tile MIB_R8C0:PICL0_DQS2 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R9C0:PICL1_DQS3 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DRIVE 4 .tile R10C10:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02W0601 arc: V00B0000 H02E0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 H01E0101 arc: W1_H02W0701 E1_H02W0701 arc: A2 V00B0000 arc: A3 V00B0000 arc: B2 E1_H02W0301 arc: B3 E1_H02W0301 arc: C2 V02N0601 arc: C3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 V00T0100 arc: D5 H02E0001 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 Q2 arc: LSR1 V00B0100 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00B0100 F5 arc: V00T0000 Q2 arc: W1_H02W0201 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0100000110111110 word: SLICEB.K1.INIT 1011111001000001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R10C11:PLC2 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0701 H02W0701 arc: S1_V02S0601 V01N0001 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E1_H02W0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: A1 H00L0000 arc: B1 H00R0100 arc: C1 V02N0601 arc: C2 H02W0601 arc: C3 N1_V01N0001 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D2 H02E0001 arc: D3 H00R0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0101 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q7 arc: LSR1 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 F7 arc: N1_V02N0001 F2 arc: N3_V06N0203 F7 arc: S3_V06S0203 F7 arc: V00T0100 F3 arc: W1_H02W0001 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000100000000 word: SLICEB.K0.INIT 1111000011111111 word: SLICEB.K1.INIT 1111111111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R10C12:PLC2 arc: E1_H02E0701 H01E0101 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02E0101 arc: H00R0000 E1_H02W0401 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0501 H01E0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 H01E0101 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0303 E1_H02W0501 arc: A1 H00R0000 arc: A2 E1_H01E0001 arc: A3 V00T0000 arc: A5 E1_H01W0000 arc: A7 H02E0701 arc: B1 H02W0101 arc: B2 H00R0100 arc: B3 V02S0101 arc: B5 V02S0701 arc: B7 S1_V02N0501 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 H02W0401 arc: C5 V00B0100 arc: C7 V02N0001 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 H02W0001 arc: D5 V00B0000 arc: D7 V02S0601 arc: E1_H01E0001 F3 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0100 F5 arc: H01W0100 F2 arc: M6 N1_V01N0101 arc: N1_V02N0601 F6 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000100000000 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000001001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R10C13:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 V02N0001 arc: H00R0100 V02S0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H02W0701 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02N0501 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: B2 N1_V02S0101 arc: B3 H00R0100 arc: B4 V02S0501 arc: B5 H02W0301 arc: B6 V00T0000 arc: B7 V00B0000 arc: CE1 H00L0000 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0000 Q3 arc: H01W0100 Q2 arc: LSR1 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: S1_V02S0101 Q3 arc: S1_V02S0201 Q2 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q6 arc: S1_V02S0701 Q7 arc: V01S0000 Q7 arc: V01S0100 Q5 arc: W1_H02W0001 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q7 arc: W3_H06W0203 Q7 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R10C14:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02N0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H06E0203 arc: V00B0100 E1_H02W0701 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02E0501 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: B0 H00R0100 arc: B1 E1_H02W0301 arc: B2 N1_V02S0101 arc: B3 E1_H02W0101 arc: B4 V02S0501 arc: B5 V00B0100 arc: B6 N1_V01S0000 arc: B7 H02W0301 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0000 Q5 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: S1_V02S0001 Q2 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q0 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q7 arc: S1_V02S0601 Q6 arc: S1_V02S0701 Q5 arc: S3_V06S0003 Q3 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q7 arc: S3_V06S0303 Q6 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0000 Q4 arc: V01S0100 Q5 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q1 arc: W1_H02W0201 Q2 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q7 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q1 arc: W3_H06W0203 Q7 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R10C15:PLC2 arc: E1_H02E0201 V02N0201 arc: H00R0000 H02W0601 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0501 H01E0101 arc: V00B0100 V02N0301 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0701 H01E0101 arc: A0 H00L0000 arc: A1 E1_H01E0001 arc: B0 E1_H02W0301 arc: B1 E1_H02W0101 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H00L0000 Q0 arc: H01W0000 Q0 arc: H01W0100 Q1 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q0 arc: W1_H02W0101 Q1 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R10C16:PLC2 arc: H00R0000 E1_H02W0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 E1_H02W0601 arc: V00T0000 N1_V02S0601 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V01N0101 arc: B0 V00T0000 arc: C0 H00R0100 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0001 Q0 arc: N1_V02N0201 Q0 arc: V00T0100 F1 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R10C17:PLC2 arc: H00R0000 H02W0601 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V06S0003 arc: H01W0000 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0201 W3_H06E0103 arc: B6 V02S0501 arc: C6 N1_V02S0001 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 W1_H02E0201 arc: D7 H01W0000 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR1 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: V00B0100 F7 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R10C18:PLC2 arc: W1_H02W0601 W3_H06E0303 .tile R10C2:PLC2 arc: E1_H02E0001 V02N0001 arc: H00R0100 V02S0501 arc: V00B0000 V02N0001 arc: V00T0100 N1_V02S0701 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02S0301 arc: B3 V02S0301 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR1 V00B0100 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q1 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q1 arc: V00B0100 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1011111001000001 word: SLICEA.K1.INIT 0100000110111110 word: SLICEB.K0.INIT 1101011100101000 word: SLICEB.K1.INIT 0010100011010111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R10C3:PLC2 arc: H00L0100 V02S0301 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0401 H06W0203 arc: V00T0100 V02S0501 arc: W1_H02W0601 V02S0601 arc: A7 E1_H02W0701 arc: B7 H02W0301 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D6 H02E0001 arc: D7 H00L0100 arc: E1_H01E0101 Q7 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00B0000 F6 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1001011001101001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 .tile R10C4:PLC2 arc: E1_H02E0401 V01N0001 arc: H00L0100 V02S0301 arc: N1_V02N0301 S1_V02N0201 arc: W1_H02W0301 V06S0003 arc: B0 E1_H01W0100 arc: C0 H00L0100 arc: CLK0 G_HPBX0100 arc: D0 H01E0101 arc: D1 H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0001 Q0 arc: V00T0100 F1 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R10C5:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 V01N0001 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 V02S0001 arc: H00R0000 H02W0601 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 E1_H02W0601 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N1_V01S0100 arc: B2 H00R0000 arc: C2 H00L0000 arc: CLK0 G_HPBX0100 arc: D2 N1_V01S0000 arc: D3 V02N0001 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q2 arc: LSR1 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00T0100 F3 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R10C6:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S3_V06N0203 arc: H00L0000 V02S0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0401 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H02E0401 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 N1_V02S0301 arc: V00B0100 N1_V02S0301 arc: V00T0000 S1_V02N0601 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0203 E1_H01W0000 arc: A4 V02N0301 arc: A5 V00T0000 arc: A6 V02N0101 arc: A7 V02N0101 arc: B2 V02S0101 arc: B4 E1_H02W0301 arc: B5 H00R0000 arc: B6 H02W0101 arc: B7 H02W0101 arc: C2 H00L0000 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: C6 V02N0001 arc: C7 V02N0001 arc: CLK0 G_HPBX0100 arc: D2 H02W0201 arc: D3 H02E0201 arc: D4 H00L0100 arc: D5 V00B0000 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0101 F4 arc: E1_H02E0601 F4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR1 V00T0100 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V02N0601 F6 arc: S3_V06S0103 Q2 arc: S3_V06S0303 F5 arc: V00B0000 F4 arc: V00T0100 F3 arc: V01S0000 F4 arc: V01S0100 F4 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000011101111 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1110101011111000 word: SLICED.K1.INIT 1000111110101110 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R10C7:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02E0601 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: A0 W1_H02E0701 arc: A3 W1_H02E0701 arc: A5 W1_H02E0701 arc: A6 W1_H02E0701 arc: B0 V02N0301 arc: B3 V02N0301 arc: B5 V00B0100 arc: B6 V00B0100 arc: C0 S1_V02N0401 arc: C3 S1_V02N0401 arc: C5 V00T0000 arc: C6 V00T0000 arc: D0 H01E0101 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H01E0101 arc: D4 S1_V02N0401 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 S1_V02N0401 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00L0100 arc: M6 V00T0100 arc: W1_H02W0101 F3 word: SLICEA.K0.INIT 0000111111110100 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000111111110100 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0000111111110100 word: SLICED.K0.INIT 0000111111110100 word: SLICED.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R10C8:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 E3_H06W0203 arc: H00R0000 V02N0601 arc: H00R0100 H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0701 arc: V00T0000 H02E0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: A4 V02N0301 arc: A5 V02N0301 arc: A6 V02N0301 arc: A7 V02N0301 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C2 W1_H02E0601 arc: C3 W1_H02E0601 arc: C4 W1_H02E0601 arc: C5 W1_H02E0601 arc: C6 W1_H02E0601 arc: C7 W1_H02E0601 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H02W0001 arc: M6 V00T0000 arc: V01S0100 F3 word: SLICEC.K0.INIT 1111111011111111 word: SLICEC.K1.INIT 1111111111111110 word: SLICED.K0.INIT 1111111111111110 word: SLICED.K1.INIT 1111111011111111 word: SLICEA.K0.INIT 0000001100000000 word: SLICEA.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 0000000000000011 word: SLICEB.K1.INIT 0000001100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R10C9:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 W1_H02E0101 arc: H00L0000 H02E0001 arc: H00R0000 V02N0401 arc: H00R0100 H02W0701 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 H02E0701 arc: V00T0000 V02N0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 E1_H01W0000 arc: A0 V01N0101 arc: A2 V01N0101 arc: A4 H02E0501 arc: B0 V02N0301 arc: B1 V00B0000 arc: B2 H00R0100 arc: B3 H02W0301 arc: B4 V02S0701 arc: B5 V02S0501 arc: C0 H00L0000 arc: C1 E1_H02W0401 arc: C2 H00L0100 arc: C3 V02N0601 arc: C4 V00B0100 arc: C5 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02W0001 arc: D2 H02E0201 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 V02N0401 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 F1 arc: H01W0000 Q3 arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q4 arc: V01S0000 F1 arc: V01S0100 F1 arc: W1_H02W0301 F1 word: SLICEA.K0.INIT 1111010001000100 word: SLICEA.K1.INIT 0000001100000000 word: SLICEB.K0.INIT 1111010001000100 word: SLICEB.K1.INIT 1100000011111111 word: SLICEC.K0.INIT 0000111000000000 word: SLICEC.K1.INIT 1100000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R11C10:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E3_H06W0203 arc: H00R0000 V02S0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0401 E1_H01W0000 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 H01E0101 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 arc: A0 H00R0000 arc: A2 E1_H01E0001 arc: A5 V00T0000 arc: A6 V00T0100 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 H01W0100 arc: B5 H02E0301 arc: B6 H02E0301 arc: C0 H00R0100 arc: C1 H00L0100 arc: C2 N1_V01N0001 arc: C5 V00T0100 arc: C6 V00B0100 arc: C7 E1_H01E0101 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H00R0000 arc: D2 V00B0100 arc: D3 V00T0100 arc: D5 H00R0100 arc: D6 V02S0401 arc: D7 H00L0100 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q7 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 Q5 arc: H01W0000 F2 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q3 arc: S1_V02S0201 F2 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q7 arc: S1_V02S0601 F6 arc: S1_V02S0701 Q5 arc: S3_V06S0103 F2 arc: S3_V06S0303 F6 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: V01S0000 F0 arc: V01S0100 F6 arc: W1_H02W0201 F2 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111111110000000 word: SLICEA.K0.INIT 0001000000000000 word: SLICEA.K1.INIT 0011111111000000 word: SLICEB.K0.INIT 1110001111111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0100000000000000 word: SLICED.K1.INIT 0000111111110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R11C11:PLC2 arc: H00R0100 H02E0701 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0301 H06E0003 arc: V00T0000 H02E0201 arc: W1_H02W0001 S3_V06N0003 arc: W3_H06W0003 S3_V06N0003 arc: A5 V00T0100 arc: A6 V02N0301 arc: B0 H01W0100 arc: B5 H00R0000 arc: B6 V02N0701 arc: C0 H02E0601 arc: C1 H00L0100 arc: C5 E1_H01E0101 arc: C6 V00T0000 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H00R0000 arc: D4 V00B0000 arc: D5 V02S0601 arc: D6 E1_H01W0100 arc: E1_H01E0101 Q0 arc: E1_H02E0101 F1 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q1 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 Q1 arc: LSR1 E1_H02W0301 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q5 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q1 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q4 arc: V00B0000 Q4 arc: V00T0100 Q1 arc: V01S0000 Q0 arc: V01S0100 F1 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q1 arc: W1_H02W0401 F6 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q4 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0111111110000000 word: SLICEA.K0.INIT 0011111111000000 word: SLICEA.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000011101110111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R11C12:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0501 V02S0501 arc: H00L0100 H02E0101 arc: N1_V02N0001 E1_H02W0001 arc: V00B0100 H02E0701 arc: C1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: F1 F1_SLICE arc: H01W0100 Q1 arc: MUXCLK0 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R11C13:PLC2 arc: E1_H02E0601 V02N0601 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: N1_V02N0001 H02E0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H02W0501 arc: V00B0000 V02S0201 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 N1_V01S0000 arc: A0 H02E0501 arc: A2 V00B0000 arc: A3 H00L0100 arc: A4 V00T0000 arc: A5 N1_V01S0100 arc: A6 H00R0000 arc: A7 V00T0100 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R11C14:PLC2 arc: H00L0000 V02S0201 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H02E0601 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0501 V06N0303 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 N1_V01S0000 arc: A0 H00L0000 arc: A1 H00L0100 arc: A2 V00B0000 arc: A3 H02W0501 arc: A4 V00T0000 arc: A5 N1_V01S0100 arc: A6 H00R0000 arc: A7 V00T0100 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R11C15:PLC2 arc: H00L0000 V02S0201 arc: H00L0100 V02S0101 arc: N1_V02N0301 S3_V06N0003 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 V02S0501 arc: A0 H00L0000 arc: A1 H00L0100 arc: E1_H02E0201 F2 arc: F2 F2_SLICE arc: H01W0000 F2 arc: N1_V02N0001 F2 arc: N1_V02N0201 F2 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R11C16:PLC2 arc: W3_H06W0203 S3_V06N0203 arc: B6 N1_V02S0501 arc: C6 V02S0001 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D6 H02E0201 arc: D7 V02S0401 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q6 arc: V00B0100 F7 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R11C2:PLC2 arc: N1_V02N0001 H06W0003 .tile R11C3:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 E1_H02W0401 arc: C3 V02S0401 arc: CLK0 G_HPBX0000 arc: D2 E1_H02W0001 arc: D3 V01S0100 arc: E1_H02E0301 Q3 arc: E3_H06E0003 Q3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00T0000 F2 arc: V01S0100 Q3 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1111000000001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R11C4:PLC2 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 S1_V02N0601 arc: A2 E1_H02W0701 arc: A3 E1_H02W0701 arc: A4 E1_H02W0701 arc: A5 E1_H02W0701 arc: A6 E1_H02W0701 arc: A7 E1_H02W0701 arc: B1 V00B0000 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V02N0501 arc: B5 V02N0501 arc: B6 V02N0501 arc: B7 V02N0501 arc: C1 H00R0100 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 H02E0401 arc: C7 H02E0401 arc: D1 V00B0100 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 E1_H02W0001 arc: D5 E1_H02W0001 arc: D6 E1_H02W0001 arc: D7 E1_H02W0001 arc: E1_H02E0101 F3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M1 H02E0001 arc: M2 E1_H02W0601 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H02E0001 arc: M6 V00T0000 arc: N1_V01N0001 F3 word: SLICED.K0.INIT 1111111101110001 word: SLICED.K1.INIT 0111000100000000 word: SLICEC.K0.INIT 1110111111110111 word: SLICEC.K1.INIT 1111011100010000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0011111100000011 word: SLICEB.K0.INIT 1110111111110111 word: SLICEB.K1.INIT 1111011100010000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R11C5:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02W0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 E1_H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 N1_V01S0000 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H02W0001 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 H02W0701 arc: V00B0000 W1_H02E0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0001 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0401 E1_H01W0000 arc: W3_H06W0003 S3_V06N0003 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 H02W0701 arc: A5 H02W0701 arc: A6 H02W0701 arc: A7 H02W0701 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 V00T0000 arc: D0 V02N0001 arc: D1 W1_H02E0001 arc: D2 V02N0001 arc: D3 W1_H02E0001 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 W1_H02E0601 arc: M1 E1_H02W0001 arc: M2 W1_H02E0601 arc: M3 H00R0000 arc: M4 V00B0000 arc: M5 E1_H02W0001 arc: M6 V00B0000 arc: N1_V01N0101 F3 word: SLICEA.K0.INIT 0001111010000111 word: SLICEA.K1.INIT 1000100000011110 word: SLICED.K0.INIT 0111100000011110 word: SLICED.K1.INIT 0001000101111000 word: SLICEC.K0.INIT 1110000101111000 word: SLICEC.K1.INIT 0111011111100001 word: SLICEB.K0.INIT 1000011111100001 word: SLICEB.K1.INIT 1110111010000111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R11C6:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 H01E0001 arc: H00R0000 V02S0601 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 H01E0001 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S3_V06N0203 arc: A0 E1_H02W0501 arc: A3 E1_H02W0501 arc: A5 E1_H02W0501 arc: A6 E1_H02W0501 arc: B0 V02N0101 arc: B1 E1_H02W0301 arc: B2 E1_H02W0101 arc: B3 V02N0101 arc: B4 E1_H02W0101 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 E1_H02W0301 arc: C0 V02S0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0401 arc: C3 V02S0401 arc: C4 V00B0100 arc: C5 V02S0001 arc: C6 V02S0001 arc: C7 V00B0100 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 H02E0601 arc: M1 E1_H02W0001 arc: M2 H02E0601 arc: M3 H00R0000 arc: M4 V00T0100 arc: M5 E1_H02W0001 arc: M6 V00T0100 word: SLICEA.K0.INIT 0011001000100000 word: SLICEA.K1.INIT 0000111100001100 word: SLICEB.K0.INIT 1100111111111111 word: SLICEB.K1.INIT 1011001111111011 word: SLICEC.K0.INIT 1100000011110000 word: SLICEC.K1.INIT 1000000011001000 word: SLICED.K0.INIT 1111111011101100 word: SLICED.K1.INIT 1111111111111100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R11C7:PLC2 arc: H00L0000 N1_V02S0001 arc: H00L0100 H02E0301 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0701 H06W0203 arc: V00B0000 H02E0401 arc: V00T0000 V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0501 S1_V02N0501 arc: A0 H00R0000 arc: A3 V00B0000 arc: A5 V00B0000 arc: A6 H00R0000 arc: B0 V00T0000 arc: B3 H00R0100 arc: B5 V02N0701 arc: B6 V02N0701 arc: C0 H02E0601 arc: C3 H02E0601 arc: C5 H02E0601 arc: C6 H02E0601 arc: D0 H02E0001 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H02E0001 arc: D4 V00B0000 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 H00L0100 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00T0100 word: SLICEA.K0.INIT 0101010101010100 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0101010101010100 word: SLICED.K0.INIT 0101010101010100 word: SLICED.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0101010101010100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R11C8:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 V02S0401 arc: H00L0000 E1_H02W0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 N1_V01S0100 arc: A0 V02N0701 arc: A1 V02N0501 arc: A2 E1_H02W0501 arc: A4 E1_H02W0501 arc: A5 V02N0301 arc: A7 V02N0101 arc: B0 H00R0100 arc: B1 E1_H01W0100 arc: B2 H00R0000 arc: B4 V00B0100 arc: B5 V02S0501 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 H00L0000 arc: C2 H00R0100 arc: C3 H00L0000 arc: C4 H02W0601 arc: C5 V00T0000 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V02S0201 arc: D2 H02W0201 arc: D3 V01S0100 arc: D4 H02W0201 arc: D5 H02W0001 arc: D7 V02N0401 arc: E1_H01E0001 Q4 arc: E1_H02E0101 F3 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 F3 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V02N0101 Q1 arc: V01S0000 Q7 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0100111101000100 word: SLICEC.K0.INIT 0101001100001000 word: SLICEC.K1.INIT 1000111110001000 word: SLICEA.K0.INIT 0001001100111010 word: SLICEA.K1.INIT 1000111110001000 word: SLICEB.K0.INIT 0000011100000000 word: SLICEB.K1.INIT 0000111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R11C9:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 V01N0001 arc: V00B0000 H02E0401 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: A0 H02W0701 arc: A5 V00T0100 arc: A7 H00R0000 arc: B0 V00T0000 arc: B1 V00B0000 arc: B5 H00L0000 arc: B6 E1_H02W0301 arc: B7 V01S0000 arc: C0 V02N0401 arc: C1 H00L0100 arc: C5 E1_H01E0101 arc: C6 V02N0201 arc: C7 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 V00B0100 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F1 arc: S1_V02S0701 Q7 arc: S3_V06S0103 F1 arc: S3_V06S0303 Q6 arc: V01S0000 Q5 arc: V01S0100 F1 arc: W1_H02W0101 F1 arc: W1_H02W0401 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0100111101000100 word: SLICED.K0.INIT 0000001111110000 word: SLICED.K1.INIT 1000111110001000 word: SLICEA.K0.INIT 1111010001000100 word: SLICEA.K1.INIT 1100001111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R12C10:PLC2 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 N1_V02S0201 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V02S0601 arc: A0 H00L0000 arc: A1 H00R0000 arc: A3 V02N0501 arc: A5 V00T0000 arc: A6 V02S0301 arc: A7 N1_V01N0101 arc: B0 V00B0000 arc: B1 V02N0301 arc: B3 H01W0100 arc: B5 H02E0301 arc: B6 V02S0501 arc: B7 H02W0101 arc: C0 V02N0401 arc: C1 E1_H02W0601 arc: C3 V02N0601 arc: C5 H02W0401 arc: C6 V00T0100 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 N1_V01S0000 arc: D3 H02E0201 arc: D5 N1_V02S0601 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0101 F6 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 F6 arc: H01W0100 Q5 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F6 arc: S1_V02S0201 Q2 arc: S1_V02S0501 Q7 arc: V01S0100 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000001111111110 word: SLICEA.K0.INIT 0000101100000000 word: SLICEA.K1.INIT 0000011101110111 word: SLICED.K0.INIT 0000000111111110 word: SLICED.K1.INIT 1111100011111111 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111010001000100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R12C11:PLC2 arc: E1_H02E0701 N1_V01S0100 arc: H00R0100 V02S0501 arc: N1_V02N0301 H01E0101 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0203 N1_V01S0000 arc: A4 V00B0000 arc: A7 V02S0101 arc: B1 V02S0101 arc: B4 V01S0000 arc: B7 V00T0000 arc: C1 V02S0601 arc: C3 N1_V01S0100 arc: C4 H02E0601 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D3 V02S0001 arc: D4 H01W0000 arc: D7 H00R0100 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0701 Q7 arc: S1_V02S0401 F4 arc: V01S0000 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000111111110 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001111111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000011101110111 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R12C12:PLC2 arc: N1_V02N0501 E1_H02W0501 arc: V00B0100 H02E0701 arc: N1_V02N0301 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0203 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: H01W0000 Q6 arc: H01W0100 Q0 arc: M0 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q0 arc: W1_H02W0601 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R12C13:PLC2 arc: H00L0000 N1_V02S0201 arc: H00R0000 N1_V02S0401 arc: N1_V02N0601 S1_V02N0601 arc: V00T0000 N1_V02S0601 arc: A0 V02N0501 arc: B2 H00L0000 arc: B3 N1_V02S0101 arc: B4 H00R0000 arc: B5 N1_V02S0501 arc: B6 V00T0000 arc: B7 N1_V02S0701 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 0011110000000000 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 0011110000000000 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 0011110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R12C14:PLC2 arc: H00L0000 N1_V02S0001 arc: H00R0000 N1_V02S0401 arc: V00B0000 N1_V02S0201 arc: V00T0000 N1_V02S0601 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H01W0100 arc: B0 V00B0000 arc: B1 N1_V02S0101 arc: B2 H00L0000 arc: B3 N1_V02S0301 arc: B4 H00R0000 arc: B5 N1_V02S0701 arc: B6 V00T0000 arc: B7 N1_V02S0501 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 0011110000000000 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 0011110000000000 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 0011110000000000 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R12C15:PLC2 arc: V00B0000 N1_V02S0201 arc: B0 V00B0000 arc: B1 N1_V02S0101 arc: F2 F2_SLICE arc: H01W0100 F2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0011110000000000 word: SLICEA.K1.INIT 0011110000000000 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R12C16:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0601 S1_V02N0601 .tile R12C2:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D6 V00B0000 arc: D7 H02E0001 arc: E1_H01E0101 F6 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S1_V02S0701 Q7 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1111000000001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R12C3:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0601 V02N0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0401 H06W0203 arc: N1_V02N0701 H06W0203 arc: W1_H02W0301 H01E0101 arc: W1_H02W0701 E1_H02W0701 arc: C3 V02S0401 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 E1_H02W0201 arc: E1_H01E0001 Q3 arc: E1_H02E0101 Q3 arc: E3_H06E0003 Q3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00T0000 F2 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1111000000001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R12C4:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0701 V02S0701 arc: H00L0100 H02E0101 arc: N1_V02N0501 H02W0501 arc: V00B0000 H02E0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0701 arc: A4 V00T0100 arc: A5 V00T0100 arc: B4 V02N0501 arc: B5 V02N0501 arc: C4 H02W0401 arc: C5 H02W0401 arc: C7 E1_H02W0601 arc: CLK0 G_HPBX0100 arc: D4 V00B0000 arc: D5 V00B0000 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H02E0501 F7 arc: E1_H02E0601 F4 arc: E3_H06E0203 F4 arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V02N0201 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0110100110010110 word: SLICEC.K1.INIT 1001011001101001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R12C5:PLC2 arc: E1_H02E0401 V06S0203 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0401 E1_H02W0401 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V06N0303 arc: W1_H02W0701 V06S0203 arc: A0 V02S0701 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 V00T0100 arc: A6 H02E0701 arc: A7 V00T0100 arc: B0 H02W0301 arc: B1 V00T0000 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 H02W0301 arc: B6 H02W0301 arc: B7 H02W0301 arc: C0 H00R0100 arc: C1 H02W0401 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00B0100 arc: C6 V00B0100 arc: C7 V00B0100 arc: D0 V02S0001 arc: D1 V00B0100 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V00B0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H02E0101 F3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M1 H02W0001 arc: M2 E1_H02W0601 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M5 H02W0001 arc: M6 E1_H02W0401 arc: N1_V02N0101 F3 word: SLICEC.K0.INIT 0000000000100000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1011001011111111 word: SLICEB.K1.INIT 0010000011111011 word: SLICEA.K0.INIT 0010000011111011 word: SLICEA.K1.INIT 1100111100001100 word: SLICED.K0.INIT 0000000010110010 word: SLICED.K1.INIT 0000000000100000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R12C6:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0401 E3_H06W0203 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0501 W1_H02E0501 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0101 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 H01E0001 arc: W3_H06W0203 E1_H01W0000 arc: A4 V02N0301 arc: A5 V02N0301 arc: A6 V02N0301 arc: A7 V02N0301 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 V00B0000 arc: B7 V00B0000 arc: C4 V00B0100 arc: C5 V00B0100 arc: C6 V00B0100 arc: C7 V00B0100 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V02S0601 arc: D5 V02S0601 arc: D6 V02S0601 arc: D7 V02S0601 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 W1_H02E0001 arc: M2 V00T0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M5 W1_H02E0001 arc: M6 V00T0100 arc: N1_V01N0001 F3 arc: N1_V02N0101 F3 arc: S3_V06S0003 F3 arc: V01S0000 F3 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 1111111111011111 word: SLICEC.K1.INIT 0000000000010000 word: SLICED.K0.INIT 0000000000010000 word: SLICED.K1.INIT 1111111111011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R12C7:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 V02S0701 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02W0701 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 H06E0203 arc: S1_V02S0201 V01N0001 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0501 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: A3 V00T0000 arc: B2 H00R0100 arc: B3 S1_V02N0301 arc: C2 H02W0601 arc: C3 H00L0100 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 S1_V02N0201 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0001 Q2 arc: S1_V02S0301 F3 arc: S3_V06S0103 Q2 arc: V00T0000 Q2 arc: V01S0000 Q2 word: SLICEB.K0.INIT 1111111111111100 word: SLICEB.K1.INIT 0111111011101000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R12C8:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H06W0203 arc: V00B0000 E1_H02W0601 arc: V00T0100 H02W0301 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 V06S0203 arc: A0 H02W0501 arc: A1 H00R0000 arc: A4 V02S0301 arc: A5 V00B0000 arc: A6 H02W0701 arc: A7 H00R0000 arc: B0 H02E0101 arc: B1 V00T0000 arc: B4 H02W0101 arc: B5 N1_V01S0000 arc: B6 V02N0701 arc: B7 V01S0000 arc: C0 H02W0601 arc: C1 H00L0000 arc: C3 H02E0401 arc: C4 E1_H02W0401 arc: C5 V02S0201 arc: C6 V00T0100 arc: C7 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V01S0100 arc: D3 V02S0001 arc: D4 H00R0100 arc: D5 H01W0000 arc: D6 H00L0100 arc: D7 V02S0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0701 Q5 arc: S3_V06S0103 Q1 arc: V00T0000 Q0 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0501 Q7 arc: W3_H06W0003 Q3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111111111111 word: SLICEC.K0.INIT 0101001111001100 word: SLICEC.K1.INIT 1000111110001000 word: SLICEA.K0.INIT 1111010001000100 word: SLICEA.K1.INIT 1000111110001000 word: SLICED.K0.INIT 0100111101000100 word: SLICED.K1.INIT 1000111110001000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R12C9:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 V02S0601 arc: H00L0000 E1_H02W0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H06W0203 arc: S1_V02S0001 N1_V02S0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: N1_V02N0001 W3_H06E0003 arc: A0 F7 arc: A1 H02W0501 arc: A2 N1_V02S0501 arc: A3 H02W0501 arc: A4 W1_H02E0701 arc: A5 H02W0501 arc: A6 F7 arc: A7 H02E0701 arc: B0 V00T0000 arc: B1 V02S0101 arc: B2 H00R0000 arc: B3 V02N0101 arc: B4 H00L0000 arc: B5 H02W0101 arc: B6 W1_H02E0101 arc: B7 V00B0000 arc: C0 N1_V01S0100 arc: C1 E1_H02W0601 arc: C2 H02E0401 arc: C3 V02S0401 arc: C4 V00B0100 arc: C5 V02S0001 arc: C6 V00T0100 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02W0001 arc: D2 H02W0201 arc: D3 H02E0001 arc: D4 H00R0100 arc: D5 H01W0000 arc: D6 N1_V02S0601 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F7 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q0 arc: N1_V02N0701 F7 arc: S3_V06S0003 Q3 arc: V01S0000 Q5 arc: V01S0100 Q2 arc: W1_H02W0701 F7 word: SLICEC.K0.INIT 0000011111001100 word: SLICEC.K1.INIT 1000111110001000 word: SLICEA.K0.INIT 0100111101000100 word: SLICEA.K1.INIT 0000011101110111 word: SLICED.K0.INIT 0100111101000100 word: SLICED.K1.INIT 1111111001111111 word: SLICEB.K0.INIT 1111010001000100 word: SLICEB.K1.INIT 1000111110001000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R14C10:PLC2 arc: E1_H02E0601 V06S0303 arc: N1_V02N0201 H01E0001 arc: S1_V02S0001 H01E0001 arc: S1_V02S0601 H01E0001 arc: S3_V06S0203 H01E0001 arc: V00B0000 N1_V02S0201 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 V01N0101 arc: B3 W1_H02E0301 arc: B7 W1_H02E0301 arc: C3 W1_H02E0601 arc: C5 V02N0001 arc: C7 W1_H02E0601 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 S1_V02N0401 arc: D7 V00B0000 arc: E1_H01E0101 F5 arc: E3_H06E0303 F5 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 Q7 arc: H01W0100 Q3 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F5 arc: N3_V06N0303 F5 arc: S3_V06S0303 F5 arc: W1_H02W0301 Q3 arc: W1_H02W0501 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111111111100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R14C11:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: H00L0100 W1_H02E0101 arc: H00R0000 N1_V02S0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 E3_H06W0103 arc: V00T0100 V02S0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 S1_V02N0501 arc: A2 V02S0501 arc: B2 V02S0301 arc: B3 H00L0000 arc: C2 H00L0100 arc: C3 H02E0601 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 H00R0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 Q2 arc: MUXCLK1 CLK0 arc: W1_H02W0101 Q3 word: SLICEB.K0.INIT 0000000111000000 word: SLICEB.K1.INIT 1100000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R14C12:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: H00R0000 S1_V02N0601 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 E1_H01W0000 arc: A0 V02S0701 arc: B2 E1_H02W0101 arc: B3 H00R0000 arc: B4 V02N0501 arc: B5 H02W0101 arc: B6 H02E0101 arc: B7 V02N0701 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 1001011010101010 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R14C13:PLC2 arc: E1_H02E0401 V01N0001 arc: N1_V02N0601 H06E0303 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 E1_H01W0100 arc: B0 E1_H02W0101 arc: B1 V00T0000 arc: B2 V02N0101 arc: B3 V02N0301 arc: F4 F4_SLICE arc: H01W0000 F4 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0011110000000000 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R14C14:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 W1_H02E0001 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0601 S3_V06N0303 arc: W1_H02W0101 S1_V02N0101 arc: C4 E1_H02W0401 arc: C5 H02E0401 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D3 S1_V02N0201 arc: D4 V01N0001 arc: D5 V00B0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0501 F5 arc: S3_V06S0203 Q4 arc: V00B0000 Q4 arc: V00T0100 F3 arc: V01S0000 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R14C15:PLC2 arc: E1_H02E0201 V01N0001 arc: H00L0000 S1_V02N0001 arc: H00L0100 S1_V02N0301 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H02W0201 arc: V00B0100 H02W0701 arc: W1_H02W0101 E1_H01W0100 arc: A1 V02N0501 arc: B1 S1_V02N0101 arc: C0 H02W0401 arc: C1 H00L0100 arc: CE0 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V00B0100 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 Q0 arc: S1_V02S0301 F1 arc: S3_V06S0003 Q0 arc: V01S0000 F1 arc: V01S0100 Q0 arc: W1_H02W0201 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0001000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R14C16:PLC2 arc: E1_H02E0401 H01E0001 arc: H00L0100 E1_H02W0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0401 H01E0001 arc: N1_V02N0601 W3_H06E0303 arc: A5 E1_H01W0000 arc: B5 H00R0000 arc: C4 H01E0001 arc: C5 V02N0201 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D4 H02E0201 arc: D5 V02N0601 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q4 arc: H01W0100 Q4 arc: LSR1 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S3_V06S0203 Q4 arc: V00T0100 F1 arc: V01S0100 Q4 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 0000000100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R14C17:PLC2 arc: H00L0100 H02W0301 arc: H00R0000 V02N0601 arc: C2 H02E0401 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 S1_V02N0201 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q2 arc: LSR0 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: V00T0100 F3 arc: W1_H02W0201 Q2 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R14C18:PLC2 arc: W1_H02W0301 S1_V02N0301 .tile R14C2:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: H00L0100 E1_H02W0301 arc: N1_V02N0001 H06W0003 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 S1_V02N0201 arc: V00T0100 N1_V02S0701 arc: B2 V02N0101 arc: C2 H00L0100 arc: CLK0 G_HPBX0100 arc: D2 V00T0100 arc: D3 V01S0100 arc: D5 V00B0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0100 F3 arc: LSR0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: V00B0100 F5 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R14C3:PLC2 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 H06W0003 arc: V00B0000 S1_V02N0201 arc: V00T0100 V02N0501 arc: B4 V02N0701 arc: B5 H00R0000 arc: C4 V00T0100 arc: C5 F4 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: D4 V00B0000 arc: D5 H00R0100 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 Q5 arc: H01W0000 Q5 arc: H01W0100 F3 arc: LSR0 H02E0301 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0601 F4 arc: S1_V02S0701 Q5 arc: S3_V06S0203 F4 arc: S3_V06S0303 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0011110011000011 word: SLICEC.K1.INIT 1100001100111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R14C4:PLC2 arc: N1_V02N0101 V01N0101 arc: V00B0000 V02N0001 arc: W1_H02W0301 E1_H02W0201 arc: A1 H00L0100 arc: B1 Q1 arc: B2 H01W0100 arc: C1 H00L0000 arc: C2 V02N0601 arc: C3 H00L0100 arc: CLK0 G_HPBX0100 arc: D0 Q0 arc: D1 V02N0201 arc: D2 Q2 arc: D3 V02N0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 Q2 arc: H00L0100 Q3 arc: H01W0100 Q3 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: S1_V02S0101 Q1 arc: S1_V02S0301 Q3 arc: V01S0000 Q0 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0110110011001100 word: SLICEB.K0.INIT 0011111111000000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R14C5:PLC2 arc: E1_H02E0001 V02N0001 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: W3_H06W0003 V06N0003 arc: B4 V00B0100 arc: C4 S1_V02N0201 arc: CLK0 G_HPBX0100 arc: D4 V02N0401 arc: D5 V02N0601 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR1 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: V01S0100 Q4 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R14C6:PLC2 arc: E1_H02E0001 V02S0001 arc: H00L0000 S1_V02N0201 arc: N1_V02N0501 E1_H02W0501 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 S1_V02N0301 arc: W3_H06W0003 E1_H01W0000 arc: B2 V02N0301 arc: C2 H00L0000 arc: CLK0 G_HPBX0100 arc: D1 H02E0001 arc: D2 E1_H02W0201 arc: D3 V00B0100 arc: E1_H02E0301 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00T0100 F3 arc: W1_H02W0201 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R14C7:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 N1_V02S0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02W0101 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 S1_V02N0301 arc: B4 E1_H02W0301 arc: B6 V01S0000 arc: B7 F1 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 N1_V02S0201 arc: C5 F4 arc: C6 E1_H02W0401 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 H02E0001 arc: D5 H02W0001 arc: D6 E1_H02W0201 arc: D7 H00R0100 arc: E1_H01E0001 Q5 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F4 arc: LSR0 H02E0301 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V02N0401 F6 arc: N1_V02N0601 F6 arc: S1_V02S0301 F1 arc: S3_V06S0203 F7 arc: V01S0000 F7 arc: V01S0100 F1 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0011110011000011 word: SLICED.K1.INIT 1100001100111100 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 1001011001101001 word: SLICEA.K1.INIT 0110100110010110 word: SLICEB.K0.INIT 0110100110010110 word: SLICEB.K1.INIT 1001011001101001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R14C8:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 V02N0201 arc: H00R0100 S1_V02N0501 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 H02W0601 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02W0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 H01E0001 arc: W1_H02W0701 E1_H01W0100 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A5 H02E0701 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B2 E1_H02W0301 arc: B3 E1_H02W0301 arc: B5 S1_V02N0701 arc: B6 E1_H02W0101 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: C5 V00B0100 arc: C6 V02N0001 arc: CLK0 G_HPBX0100 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D5 V02N0401 arc: D6 V01N0001 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F7 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: W1_H02W0501 F5 arc: W1_H02W0601 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010010000010 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0001011101110001 word: SLICEA.K1.INIT 0111000100010111 word: SLICEB.K0.INIT 0111000100010111 word: SLICEB.K1.INIT 0001011101110001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R14C9:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E1_H02W0101 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H01W0100 arc: A3 V00B0000 arc: B1 H02E0301 arc: B3 S1_V02N0101 arc: B5 H02E0301 arc: B7 H02E0301 arc: C1 H02E0601 arc: C3 H02E0401 arc: C5 H02E0601 arc: C7 H02E0601 arc: CE0 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 H00R0000 arc: D5 V02S0401 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: S1_V02S0301 Q1 arc: V01S0000 Q5 arc: V01S0100 Q5 arc: W1_H02W0101 Q1 arc: W1_H02W0501 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000100010000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R15C10:PLC2 arc: H00L0000 H02E0001 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 W1_H02E0601 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V06S0203 arc: E1_H01E0001 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: B4 H00L0000 arc: C4 H02W0601 arc: CLK0 G_HPBX0100 arc: D4 V00B0000 arc: D5 V02N0601 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: V00B0100 F5 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R15C11:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: W1_H02W0201 V01N0001 arc: W1_H02W0601 H01E0001 arc: A0 H02W0701 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V01S0000 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0100 Q6 arc: LSR1 H02W0501 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q3 arc: S1_V02S0001 Q2 arc: S1_V02S0401 Q6 arc: S1_V02S0601 Q4 arc: S1_V02S0701 Q7 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 Q7 arc: V01S0100 Q6 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R15C12:PLC2 arc: E1_H02E0001 V01N0001 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0701 H06W0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 V02N0301 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 E1_H02W0601 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q1 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q3 arc: S1_V02S0301 Q1 arc: S3_V06S0003 Q3 arc: S3_V06S0103 Q1 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q1 arc: W1_H02W0301 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C13:PLC2 arc: H00L0100 V02N0101 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 W1_H02E0301 arc: S1_V02S0701 H02W0701 arc: W1_H02W0301 W3_H06E0003 arc: B7 V02N0501 arc: C6 E1_H02W0401 arc: C7 E1_H01E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D5 H02W0201 arc: D6 E1_H01W0100 arc: D7 H00R0100 arc: E1_H01E0101 Q6 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: V00B0100 F5 arc: V01S0000 Q6 arc: V01S0100 F1 arc: W1_H02W0501 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0000001100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 .tile R15C14:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: H00R0000 V02S0601 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 H06W0003 arc: V00B0000 V02S0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H01W0100 arc: A0 H00R0000 arc: B2 V02N0101 arc: B3 V01N0001 arc: B4 H01E0101 arc: B5 N1_V01S0000 arc: B6 V00B0000 arc: B7 E1_H02W0301 arc: E1_H01E0001 F3 arc: E1_H02E0701 F7 arc: E3_H06E0303 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: N1_V01N0001 F5 arc: V01S0000 F2 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C15:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 N1_V01S0000 arc: H00L0000 V02N0001 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0601 N1_V01S0000 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 H01E0001 arc: B0 V02S0101 arc: B1 N1_V02S0301 arc: B2 E1_H01W0100 arc: B3 H00R0000 arc: B7 V00B0000 arc: C6 V00B0100 arc: C7 E1_H01E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D6 H00R0100 arc: D7 E1_H02W0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q6 arc: E1_H02E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR1 E1_H02W0501 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: S3_V06S0303 Q6 arc: V01S0000 F1 arc: V01S0100 Q6 arc: W1_H02W0701 F7 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0011000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R15C16:PLC2 arc: E1_H02E0201 H01E0001 arc: H00L0000 H02W0001 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0301 V01N0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H01W0000 arc: A1 H00L0000 arc: B1 H02E0101 arc: C0 H02E0401 arc: C1 N1_V01S0100 arc: CE0 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V01S0100 arc: D3 V02N0201 arc: D7 V02N0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0201 Q0 arc: S3_V06S0003 Q0 arc: V00T0100 F3 arc: V01S0000 F1 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0100000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R15C17:PLC2 arc: H00L0100 H02W0301 arc: N1_V02N0601 H06E0303 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 H01E0101 arc: C0 W1_H02E0401 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V02N0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 Q0 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0100 F1 arc: W1_H02W0001 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R15C18:PLC2 arc: W1_H02W0301 V02N0301 .tile R15C2:PLC2 arc: H00R0000 V02N0601 arc: N1_V02N0101 E1_H02W0101 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02N0601 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 V00T0000 arc: A3 V00T0000 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 V02N0401 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D5 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 Q1 arc: LSR0 V00B0100 arc: M0 H02W0601 arc: M1 E1_H02W0001 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00B0100 F5 arc: V01S0000 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0011000011110101 word: SLICEA.K1.INIT 0000010100111111 word: SLICEB.K0.INIT 1100111100001010 word: SLICEB.K1.INIT 1111101011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R15C3:PLC2 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 S1_V02N0701 arc: V00B0100 S1_V02N0101 arc: V00T0100 S1_V02N0701 arc: W1_H02W0601 V01N0001 arc: A0 E1_H02W0501 arc: A3 E1_H02W0501 arc: A4 E1_H02W0501 arc: A7 E1_H02W0501 arc: B0 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 S1_V02N0001 arc: C5 S1_V02N0201 arc: C6 S1_V02N0001 arc: C7 S1_V02N0201 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M5 H00L0100 arc: M6 V00T0100 arc: S3_V06S0003 F3 arc: V01S0100 F3 word: SLICEA.K0.INIT 1111111111010100 word: SLICEA.K1.INIT 1111111111110000 word: SLICEB.K0.INIT 1111111111000000 word: SLICEB.K1.INIT 1111111111010100 word: SLICEC.K0.INIT 0000000000101011 word: SLICEC.K1.INIT 0000000000001111 word: SLICED.K0.INIT 0000000000111111 word: SLICED.K1.INIT 0000000000101011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R15C4:PLC2 arc: H00L0100 V02S0301 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 N1_V01S0000 arc: W1_H02W0001 H01E0001 arc: A3 H00L0100 arc: B3 V02S0101 arc: C2 V02N0401 arc: C3 N1_V01S0100 arc: C7 V02N0201 arc: CLK0 G_HPBX0100 arc: D2 V00T0100 arc: D3 N1_V01S0000 arc: D5 V02N0401 arc: D7 H01W0000 arc: E1_H02E0301 Q3 arc: E3_H06E0003 Q3 arc: E3_H06E0203 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: LSR0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 F7 arc: N1_V02N0001 F2 arc: N3_V06N0003 Q3 arc: S1_V02S0301 Q3 arc: S3_V06S0003 Q3 arc: V00B0100 F5 arc: V00T0100 F3 arc: W1_H02W0101 Q3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 0000010000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R15C5:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 V01N0001 arc: N3_V06N0303 H06W0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0501 E1_H02W0401 arc: B0 H02E0301 arc: C0 N1_V01S0100 arc: CLK0 G_HPBX0100 arc: D0 H02W0201 arc: D1 S1_V02N0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0201 Q0 arc: V00T0100 F1 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R15C6:PLC2 arc: E1_H02E0301 V06S0003 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0301 W1_H02E0301 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: A2 H02W0701 arc: A4 H02W0701 arc: A6 V00T0100 arc: B2 F3 arc: B3 H00L0000 arc: B4 V02S0501 arc: B5 H02W0101 arc: B6 V01S0000 arc: C2 V02N0401 arc: C3 E1_H01W0000 arc: C4 N1_V02S0201 arc: C5 V00B0100 arc: C6 E1_H02W0401 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 H00R0000 arc: D4 H02E0001 arc: D5 H00R0100 arc: D6 H00L0100 arc: D7 H00R0100 arc: E1_H02E0701 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F6 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0601 F6 arc: V01S0000 F7 arc: W1_H02W0201 Q2 word: SLICEB.K0.INIT 0011110010101010 word: SLICEB.K1.INIT 1100001100000000 word: SLICED.K0.INIT 1100101010100011 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1100001101010101 word: SLICEC.K1.INIT 1100001100111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R15C7:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V02N0701 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0501 H02W0501 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H01W0000 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 V02N0701 arc: A0 H00L0100 arc: A3 H00L0100 arc: A4 N1_V01S0100 arc: A5 N1_V01S0100 arc: A6 N1_V01S0100 arc: B0 H00R0100 arc: B3 H00R0100 arc: B4 V02S0701 arc: B5 V02S0701 arc: B6 V02S0701 arc: C0 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 E1_H02W0601 arc: C5 E1_H02W0601 arc: C6 E1_H02W0601 arc: D0 N1_V02S0001 arc: D3 V00B0100 arc: D4 N1_V02S0601 arc: D5 N1_V02S0601 arc: D6 N1_V02S0601 arc: E1_H01E0001 F3 arc: E1_H02E0101 F3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H02W0201 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00B0000 arc: N3_V06N0003 F3 arc: S1_V02S0101 F3 word: SLICED.K0.INIT 1000000011101000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111011111111 word: SLICEC.K1.INIT 1000000011101000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111111011111111 word: SLICEA.K0.INIT 1111111011111111 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C8:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H01E0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00T0100 H02E0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 H01E0001 arc: A0 H02E0701 arc: A2 S1_V02N0701 arc: A3 E1_H02W0501 arc: A4 H02E0701 arc: A5 V00T0100 arc: A6 E1_H02W0701 arc: A7 E1_H02W0501 arc: B0 W1_H02E0301 arc: B1 H00R0100 arc: B2 N1_V02S0301 arc: B3 H01W0100 arc: B4 W1_H02E0301 arc: B5 E1_H02W0101 arc: B6 H02W0301 arc: B7 V01S0000 arc: C0 H02E0401 arc: C1 H00L0100 arc: C2 E1_H02W0601 arc: C3 H00L0000 arc: C4 V00B0100 arc: C5 V02S0201 arc: C6 V02N0001 arc: C7 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02S0201 arc: D2 N1_V02S0201 arc: D3 H00R0000 arc: D4 H02E0001 arc: D5 V00B0000 arc: D6 E1_H02W0201 arc: D7 V02S0601 arc: E1_H01E0001 F1 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: S1_V02S0501 Q7 arc: V00B0100 F5 arc: V01S0000 Q6 arc: V01S0100 F1 arc: W1_H02W0101 F1 arc: W1_H02W0501 F5 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0100111101000100 word: SLICED.K1.INIT 1000111110001000 word: SLICEB.K0.INIT 1111010001000100 word: SLICEB.K1.INIT 1000111110001000 word: SLICEA.K0.INIT 0011110001010101 word: SLICEA.K1.INIT 0011110011000011 word: SLICEC.K0.INIT 0011110010101010 word: SLICEC.K1.INIT 1001011001101001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R15C9:PLC2 arc: H00R0000 V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H01E0001 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0701 V01N0101 arc: V00B0000 S1_V02N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: A3 E1_H01E0001 arc: B0 V00B0000 arc: B3 V02S0301 arc: C0 E1_H02W0601 arc: C2 H00R0100 arc: C3 N1_V01S0100 arc: CLK0 G_HPBX0100 arc: D0 H00R0000 arc: D1 H02E0201 arc: D2 N1_V02S0001 arc: D3 V02S0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00T0100 F1 arc: V01S0000 F3 arc: W1_H02W0201 F2 arc: W3_H06W0003 F3 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0110100110010110 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R16C10:PLC2 arc: H00R0000 H02W0401 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 V02S0001 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 H01E0101 arc: A0 H00R0000 arc: A2 V02S0501 arc: A3 H02W0701 arc: A4 V00B0000 arc: A5 V02S0101 arc: A6 E1_H02W0701 arc: A7 V02S0301 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C11:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 V02S0001 arc: N1_V02N0501 H02W0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V00T0100 H02W0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: A4 H02W0701 arc: A5 V00B0000 arc: A6 H00L0000 arc: A7 H00L0000 arc: B4 V01S0000 arc: B5 N1_V02S0701 arc: B6 N1_V01S0000 arc: B7 N1_V02S0701 arc: C4 V00T0100 arc: C5 V00T0000 arc: C6 V00B0100 arc: C7 V00T0000 arc: D4 H02W0201 arc: D5 N1_V02S0401 arc: D6 V02S0401 arc: D7 N1_V02S0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: N1_V01N0001 F0 arc: V01S0000 F5 word: SLICED.K0.INIT 0001000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0100000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C12:PLC2 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0100 H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0701 N1_V01S0100 arc: A0 N1_V02S0501 arc: A3 H02E0701 arc: A5 V02S0301 arc: A6 F7 arc: A7 N1_V01S0100 arc: B0 F3 arc: B3 H00L0000 arc: B5 H02E0301 arc: B6 V02N0501 arc: B7 V01S0000 arc: C0 H02E0401 arc: C1 N1_V01N0001 arc: C3 H00L0100 arc: C5 H02E0601 arc: C6 E1_H02W0401 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H02E0201 arc: D3 N1_V01S0000 arc: D5 V00B0000 arc: D6 H02W0201 arc: D7 H00R0100 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F1 arc: N1_V02N0001 F0 arc: N1_V02N0301 F1 arc: N3_V06N0203 Q7 arc: N3_V06N0303 Q6 arc: V01S0000 F5 arc: V01S0100 Q7 arc: W1_H02W0501 Q7 arc: W3_H06W0203 Q7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0100000000000000 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 1011111111111111 word: SLICEA.K1.INIT 0000111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R16C13:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 V01N0001 arc: H00R0100 H02W0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0501 H02W0501 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02N0201 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 E1_H01W0000 arc: A0 E1_H02W0701 arc: B2 H00R0100 arc: B3 E1_H01W0100 arc: B4 N1_V01S0000 arc: B5 V02N0701 arc: B6 V00B0000 arc: B7 V02S0701 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 0011110000000000 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 0011110000000000 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R16C14:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 S1_V02N0701 arc: H00R0100 V02N0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H06E0103 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 H06E0203 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0303 N3_V06S0303 arc: A7 V00T0100 arc: B0 H00R0100 arc: B1 V02N0301 arc: B2 V02S0101 arc: B3 V02S0301 arc: B7 N1_V02S0501 arc: C6 V00T0000 arc: C7 E1_H02W0401 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D6 V02S0601 arc: D7 V00B0000 arc: E1_H02E0601 Q6 arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q6 arc: LSR1 H02E0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: V00B0000 Q6 arc: V01S0100 F7 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0100000000000000 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0011110000000000 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R16C15:PLC2 arc: E1_H02E0101 V01N0101 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N1_V01S0000 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 W1_H02E0601 arc: V00B0100 H02E0501 arc: W1_H02W0701 E1_H02W0701 arc: B1 V00T0000 arc: C0 V02S0601 arc: C1 H02E0601 arc: CE0 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00B0100 arc: D3 E1_H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0301 F1 arc: V00T0000 Q0 arc: V00T0100 F3 arc: W1_H02W0101 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0000001100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R16C16:PLC2 arc: E1_H02E0401 V02N0401 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0601 V01N0001 arc: V00T0000 V02N0401 arc: W1_H02W0401 N1_V01S0000 arc: A0 W1_H02E0701 arc: B2 H00R0100 arc: B3 Q3 arc: B4 H02E0101 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V02N0501 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 F4 arc: LSR0 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F2 arc: S1_V02S0101 Q3 arc: S1_V02S0501 Q7 arc: S1_V02S0701 Q5 arc: S3_V06S0303 Q6 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 Q3 arc: V01S0100 Q7 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 1100110000000000 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R16C17:PLC2 arc: H00R0100 V02N0501 arc: V00B0000 H02E0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H01W0100 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0100 Q2 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: S1_V02S0001 Q0 arc: S1_V02S0301 Q1 arc: V00T0000 Q0 arc: V01S0100 Q2 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R16C18:PLC2 arc: N1_V02N0301 W3_H06E0003 .tile R16C2:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 V02N0201 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02N0001 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0401 H01E0001 arc: V00T0000 V02N0401 arc: V00T0100 V02N0701 arc: A0 S1_V02N0701 arc: A3 S1_V02N0701 arc: A5 H02W0701 arc: A6 H02W0701 arc: B0 V00T0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 V00T0000 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 V02S0001 arc: C5 V02S0001 arc: C6 V02S0001 arc: C7 V02S0001 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 H02E0001 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 H02E0001 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00T0100 word: SLICEA.K0.INIT 0111111001110111 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 1111110011111111 word: SLICEB.K1.INIT 0111001001110111 word: SLICEC.K0.INIT 1100111111111111 word: SLICEC.K1.INIT 0001101110111011 word: SLICED.K0.INIT 1101101110111011 word: SLICED.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R16C3:PLC2 arc: E1_H02E0601 V02N0601 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02E0101 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 V01N0001 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 N1_V02S0601 arc: V00T0000 E1_H02W0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 N1_V02S0701 arc: A1 H00L0000 arc: A3 V00T0000 arc: A6 V00T0100 arc: B1 V00B0000 arc: B3 H00R0000 arc: B6 S1_V02N0701 arc: C1 V02N0601 arc: C3 V02N0601 arc: C6 E1_H01E0101 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H02E0001 arc: D2 E1_H02W0201 arc: D3 H02E0001 arc: D5 H02E0201 arc: D6 H02E0001 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q7 arc: E1_H02E0501 Q7 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 F1 arc: H01W0100 F6 arc: LSR1 V00B0100 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M2 E1_H02W0601 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: V00B0000 F6 arc: V00B0100 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 1111000000001111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0101010001000101 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1000101010101000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R16C4:PLC2 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: V00B0000 H02W0601 arc: V00T0000 H02W0001 arc: A0 H01E0001 arc: A3 H01E0001 arc: A4 W1_H02E0701 arc: A7 W1_H02E0701 arc: B0 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 H00R0000 arc: B7 V00B0000 arc: C0 V02N0601 arc: C3 V02N0601 arc: C4 H02E0601 arc: C7 H02E0601 arc: D0 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 W1_H02E0001 arc: D7 W1_H02E0001 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00L0100 arc: M6 V00T0000 word: SLICEA.K0.INIT 0000010001000000 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0100000000000100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1011111111111011 word: SLICEC.K0.INIT 1111101110111111 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R16C5:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: N1_V02N0201 E1_H01W0000 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 H02E0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0001 arc: W1_H02W0401 H01E0001 arc: A2 E1_H02W0701 arc: A3 E1_H02W0501 arc: A6 E1_H02W0701 arc: A7 E1_H02W0501 arc: B1 V02N0101 arc: B2 H00R0000 arc: B3 H00R0000 arc: B6 V00T0000 arc: B7 V00T0000 arc: C1 H00L0100 arc: C2 V02N0401 arc: C3 V02N0401 arc: C6 S1_V02N0201 arc: C7 S1_V02N0201 arc: CLK0 V00B0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H02E0301 Q1 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 F6 arc: M2 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q1 arc: N3_V06N0103 Q1 arc: S3_V06S0103 Q1 arc: V01S0000 Q1 arc: V01S0100 F0 arc: W1_H02W0001 F2 arc: W1_H02W0201 F2 arc: W1_H02W0601 F6 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 1111111111000000 word: SLICED.K0.INIT 0001010000101000 word: SLICED.K1.INIT 1100001000000001 word: SLICEB.K0.INIT 0111000101110111 word: SLICEB.K1.INIT 0011001101110001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R16C6:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0701 E3_H06W0203 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 E1_H01W0000 arc: V00T0100 H02E0301 arc: W3_H06W0203 E1_H01W0000 arc: B2 V02S0301 arc: C2 N1_V02S0601 arc: CLK0 G_HPBX0100 arc: D2 S1_V02N0001 arc: D3 V00T0100 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q2 arc: H01W0100 F3 arc: LSR0 H02E0501 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R16C7:PLC2 arc: E1_H02E0301 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02N0701 arc: A0 E1_H02W0501 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A4 E1_H02W0501 arc: A6 E1_H02W0501 arc: A7 E1_H02W0501 arc: B0 V02N0101 arc: B1 H00R0100 arc: B2 V02N0101 arc: B3 V02N0301 arc: B4 V02N0501 arc: B6 V02N0701 arc: B7 V02N0701 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00B0100 arc: C6 V00B0100 arc: C7 V00B0100 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 H00R0100 arc: D6 V02N0601 arc: D7 V02N0601 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: M3 H00L0000 arc: M4 V00B0000 arc: M5 H02W0001 arc: M6 V00B0000 arc: W3_H06W0003 F3 word: SLICEC.K0.INIT 0101010101010001 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0100010101010101 word: SLICED.K1.INIT 0101010101010001 word: SLICEA.K0.INIT 0101010101010100 word: SLICEA.K1.INIT 0011000000110011 word: SLICEB.K0.INIT 0101000101010101 word: SLICEB.K1.INIT 0101010101010100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R16C8:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0601 E3_H06W0303 arc: H00L0100 H02W0101 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 E1_H01W0000 arc: V00B0000 V02S0201 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 E1_H01W0000 arc: A2 V00B0000 arc: B1 V00T0000 arc: B2 H01W0100 arc: B3 N1_V02S0301 arc: B5 V02S0701 arc: B7 V02S0701 arc: C1 S1_V02N0601 arc: C2 N1_V02S0401 arc: C3 S1_V02N0601 arc: C5 V00T0100 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D2 V00B0100 arc: D3 H02W0001 arc: D5 H00L0100 arc: D7 H00R0100 arc: E1_H01E0001 Q3 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q3 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V02N0301 Q3 arc: N1_V02N0501 Q7 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q5 arc: V00B0100 Q7 arc: V01S0000 Q1 arc: W1_H02W0101 Q3 arc: W1_H02W0301 Q1 arc: W1_H02W0701 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111111111111100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 1111111111111100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R16C9:PLC2 arc: H00L0000 H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06W0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N3_V06S0003 arc: V00B0000 H02E0601 arc: V00B0100 E1_H02W0501 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0501 W3_H06E0303 arc: A0 H00L0100 arc: A2 H00L0100 arc: A3 V02N0501 arc: A4 V02S0301 arc: A5 V00T0100 arc: A6 H02W0501 arc: B0 V00B0000 arc: B1 V00T0000 arc: B2 S1_V02N0101 arc: B3 H01W0100 arc: B4 H02E0101 arc: B5 V02S0701 arc: B6 N1_V01S0000 arc: B7 H02W0101 arc: C0 V02N0401 arc: C1 H00R0100 arc: C2 H00L0000 arc: C3 H02W0401 arc: C4 V02N0201 arc: C5 H02W0401 arc: C6 S1_V02N0001 arc: C7 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00B0100 arc: D2 H02W0001 arc: D3 H00R0000 arc: D4 E1_H02W0201 arc: D5 V02N0601 arc: D6 S1_V02N0601 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q4 arc: N1_V02N0601 Q6 arc: V00T0000 Q0 arc: V01S0000 Q3 arc: W1_H02W0701 Q7 arc: W3_H06W0103 Q1 word: SLICED.K0.INIT 1100001101010101 word: SLICED.K1.INIT 0000000011111100 word: SLICEC.K0.INIT 0100111101000100 word: SLICEC.K1.INIT 1000111110001000 word: SLICEA.K0.INIT 1111010001000100 word: SLICEA.K1.INIT 1100000011111111 word: SLICEB.K0.INIT 1111010001000100 word: SLICEB.K1.INIT 1000111110001000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R17C10:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E3_H06E0303 V06S0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 E1_H01W0000 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 V06S0303 arc: B6 W1_H02E0301 arc: C6 S1_V02N0001 arc: CLK0 G_HPBX0100 arc: D6 E1_H01W0100 arc: D7 V02S0601 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR1 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: V00B0100 F7 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R17C11:PLC2 arc: E1_H02E0201 V06S0103 arc: H00L0000 H02W0201 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 V01N0001 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 N1_V02S0701 arc: A0 H00L0000 arc: A2 V00B0000 arc: A3 H02W0701 arc: A5 V00T0000 arc: A7 V00T0100 arc: B0 V02S0301 arc: B1 N1_V02S0301 arc: B2 H02E0301 arc: B3 V02S0101 arc: B5 N1_V02S0501 arc: B7 H02W0301 arc: C0 H00R0100 arc: C1 H02E0401 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C5 H02W0601 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 H00R0000 arc: D5 H02W0001 arc: D7 V02S0601 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q0 arc: H01W0100 Q1 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N3_V06N0003 Q0 arc: V01S0000 Q0 arc: V01S0100 F7 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001111100000000 word: SLICEB.K0.INIT 0101010111000011 word: SLICEB.K1.INIT 0000011100000000 word: SLICEA.K0.INIT 1110111100000000 word: SLICEA.K1.INIT 0011001100001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R17C12:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 E1_H01W0100 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0701 E1_H02W0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N1_V02S0701 .tile R17C13:PLC2 arc: H00R0000 V02N0601 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0701 H02W0701 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 H06W0203 arc: V00T0000 E1_H02W0001 arc: A0 V02S0701 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H02E0301 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V02S0501 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q3 arc: E1_H02E0001 Q2 arc: E1_H02E0301 Q3 arc: E1_H02E0401 Q4 arc: E1_H02E0501 Q7 arc: E1_H02E0601 Q6 arc: E1_H02E0701 Q5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0100 Q4 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q7 arc: S1_V02S0501 Q7 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 Q6 arc: V01S0100 Q2 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R17C14:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0301 H02W0301 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 H02E0701 arc: V00B0000 E1_H02W0601 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 V06S0203 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q0 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q2 arc: E1_H02E0301 Q3 arc: E1_H02E0601 Q4 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q4 arc: H01W0000 Q3 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q2 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q0 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q4 arc: V01S0100 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001010 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R17C15:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0501 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 W1_H02E0301 arc: W1_H02W0301 V06S0003 arc: A1 V02S0501 arc: A3 H00L0100 arc: A4 E1_H01W0000 arc: A5 V00B0000 arc: B1 Q1 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 E1_H02W0301 arc: B7 V00T0000 arc: C0 H02E0401 arc: C1 H02W0601 arc: C3 H00L0000 arc: C4 H01E0001 arc: C5 E1_H01E0101 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H00R0000 arc: D3 V02S0201 arc: D4 V02S0401 arc: D5 H01W0000 arc: D7 V02S0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F4 arc: M2 E1_H02W0601 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q1 arc: N3_V06N0003 F0 arc: S1_V02S0201 F2 arc: V01S0100 Q1 arc: W1_H02W0001 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 1111000011111111 word: SLICEA.K1.INIT 1111101011111100 word: SLICEC.K0.INIT 1001000000001001 word: SLICEC.K1.INIT 1001000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1001000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R17C16:PLC2 arc: H00L0000 W1_H02E0201 arc: H00L0100 W1_H02E0301 arc: H00R0100 V02S0701 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 V02S0101 arc: V00T0000 H02W0001 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V06S0203 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0203 V06S0203 arc: A1 H00L0100 arc: A2 V00T0000 arc: A5 N1_V02S0301 arc: A6 H02E0501 arc: A7 W1_H02E0701 arc: B1 V00T0000 arc: B2 W1_H02E0301 arc: B3 H00L0000 arc: B4 V01S0000 arc: B5 H02E0301 arc: B6 V02S0701 arc: B7 H02W0101 arc: C1 H00R0100 arc: C2 H02E0601 arc: C3 N1_V01S0100 arc: C4 S1_V02N0001 arc: C5 H01E0001 arc: C6 V00B0100 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D2 N1_V01S0000 arc: D3 V00T0100 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 V02N0401 arc: D7 V02S0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q5 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N1_V02N0601 F4 arc: N1_V02N0701 Q5 arc: N3_V06N0203 F4 arc: V00B0000 F4 arc: V00T0100 F1 arc: V01S0000 F7 arc: W1_H02W0201 F2 arc: W1_H02W0401 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1011000010111011 word: SLICEC.K0.INIT 1100111100000000 word: SLICEC.K1.INIT 1111101011111100 word: SLICED.K0.INIT 1011000010111011 word: SLICED.K1.INIT 1001000000000000 word: SLICEB.K0.INIT 1011000010111011 word: SLICEB.K1.INIT 1100001100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R17C17:PLC2 arc: N1_V02N0501 H01E0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 H01E0001 .tile R17C2:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 H02W0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 H02W0501 arc: A5 H02W0501 arc: A6 H02W0501 arc: A7 H02W0501 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 H02W0301 arc: B5 H02W0301 arc: B6 H02W0301 arc: B7 H02W0301 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02S0401 arc: C4 V02N0001 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 V00T0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 V00B0000 arc: D5 N1_V02S0601 arc: D6 V00B0000 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: M5 H00R0000 arc: M6 V00B0100 arc: N1_V02N0101 F3 arc: N1_V02N0301 F3 word: SLICEA.K0.INIT 1100111011101110 word: SLICEA.K1.INIT 1110111011001110 word: SLICEB.K0.INIT 1000110011001100 word: SLICEB.K1.INIT 1100110010001100 word: SLICED.K0.INIT 1110000000000000 word: SLICED.K1.INIT 0000000011100000 word: SLICEC.K0.INIT 0000100010001000 word: SLICEC.K1.INIT 1000100000001000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R17C3:PLC2 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 H02W0101 arc: H00R0000 V02N0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06W0203 arc: V00T0000 V02N0401 arc: V00T0100 W1_H02E0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 W1_H02E0701 arc: A5 W1_H02E0701 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B5 E1_H02W0101 arc: B6 V02S0501 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 V02N0201 arc: C5 V02N0201 arc: C6 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 V02S0401 arc: D7 E1_H02W0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 F4 arc: LSR1 V00B0100 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 H02E0601 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F6 arc: V00B0100 F7 arc: V01S0100 Q1 arc: W1_H02W0301 Q1 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1011111001000001 word: SLICEA.K1.INIT 0100000110111110 word: SLICEB.K0.INIT 1101011100101000 word: SLICEB.K1.INIT 0010100011010111 word: SLICEC.K0.INIT 1110101111010100 word: SLICEC.K1.INIT 0001010000101011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R17C4:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0501 E3_H06W0303 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02N0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02W0601 arc: V00B0000 E1_H02W0401 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0201 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 H01E0101 arc: A0 V02N0701 arc: A3 V02N0701 arc: B0 V00B0000 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0000 arc: B4 V00B0100 arc: C0 H00L0000 arc: C1 E1_H02W0401 arc: C2 E1_H02W0601 arc: C3 H00L0000 arc: C4 V00T0000 arc: CLK0 G_HPBX0100 arc: D0 V02N0201 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: D3 V02N0201 arc: D4 E1_H01W0100 arc: D5 V02N0401 arc: E1_H01E0001 F1 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: LSR1 H02W0501 arc: M0 H02E0601 arc: M1 H00L0100 arc: M2 H02E0601 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S3_V06S0203 Q4 arc: V01S0000 Q4 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0001011111101000 word: SLICEA.K1.INIT 1100111111110011 word: SLICEB.K0.INIT 0011111111111100 word: SLICEB.K1.INIT 1101010000101011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R17C5:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0601 E1_H01W0000 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 E3_H06W0003 arc: A5 V00B0000 arc: B5 H02W0301 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D5 H02E0001 arc: F5 F5_SLICE arc: H01W0100 Q5 arc: MUXCLK2 CLK0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100001110101010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R17C6:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 E1_H01W0100 arc: V00B0000 H02W0601 arc: V00B0100 V02N0301 arc: V00T0100 H02W0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 E1_H01W0000 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A2 S1_V02N0501 arc: A3 S1_V02N0701 arc: A4 V02N0101 arc: A5 V02N0101 arc: A6 H00R0000 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 S1_V02N0701 arc: B5 S1_V02N0701 arc: B6 V00B0100 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 V02N0401 arc: C3 V02N0601 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 H02E0601 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 H00R0100 arc: D5 H00R0100 arc: D6 H02E0001 arc: D7 H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F4 arc: M0 H02W0601 arc: M1 H00L0100 arc: M2 H02W0601 arc: M4 V00B0000 arc: MUXCLK3 CLK0 arc: N3_V06N0203 F7 arc: V01S0000 Q6 arc: W1_H02W0101 F1 arc: W3_H06W0103 F1 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0011110010101010 word: SLICED.K1.INIT 1111000000001111 word: SLICEC.K0.INIT 0110100110010110 word: SLICEC.K1.INIT 1001011001101001 word: SLICEB.K0.INIT 0000011001100000 word: SLICEB.K1.INIT 0110000000000110 word: SLICEA.K0.INIT 1001000000001001 word: SLICEA.K1.INIT 0000100110010000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R17C7:PLC2 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02E0001 arc: H00R0000 H02W0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H01E0101 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 V02S0601 arc: A6 N1_V01N0101 arc: B0 V00B0000 arc: B1 V00T0000 arc: B4 V02N0701 arc: B5 H00R0000 arc: B6 V00B0100 arc: B7 V00T0000 arc: C0 H00L0100 arc: C1 H02W0601 arc: C4 V02N0001 arc: C5 H02W0601 arc: C6 V02N0001 arc: C7 H02W0601 arc: CE0 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 E1_H02W0001 arc: D4 H00R0100 arc: D5 N1_V02S0401 arc: D6 H02W0201 arc: D7 H02E0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0100 Q5 arc: H01W0000 F0 arc: H01W0100 Q5 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q7 arc: N1_V02N0401 F4 arc: N1_V02N0601 F4 arc: S1_V02S0101 Q1 arc: S1_V02S0401 F6 arc: S1_V02S0501 Q5 arc: S1_V02S0601 F4 arc: V01S0000 Q1 arc: V01S0100 Q5 arc: W1_H02W0301 Q1 arc: W1_H02W0401 F4 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 1100001100111100 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K0.INIT 1100001100111100 word: SLICEC.K1.INIT 1111111111111100 word: SLICED.K0.INIT 0111000100010111 word: SLICED.K1.INIT 1111111111111100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R17C8:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0701 N3_V06S0203 arc: H00R0000 H02W0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 H06W0103 arc: V00B0100 V02S0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02N0601 arc: B0 H02W0301 arc: C0 H02E0601 arc: CLK0 G_HPBX0100 arc: D0 H00R0000 arc: D1 V00B0100 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0100 F1 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R17C9:PLC2 arc: H00L0000 H02W0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0601 N1_V01S0000 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V01N0001 arc: W1_H02W0301 E1_H01W0100 arc: A2 V02N0501 arc: A3 H02W0501 arc: A4 H02E0701 arc: A5 H02W0501 arc: B2 V02S0301 arc: B3 V02S0101 arc: B4 H02W0101 arc: B5 H02E0101 arc: B7 V00B0100 arc: C2 V02N0401 arc: C3 H00L0000 arc: C4 H02W0401 arc: C5 V00T0000 arc: C7 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 V01S0100 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 H02E0201 arc: D7 H00L0100 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q4 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q2 arc: V01S0000 Q5 arc: W1_H02W0601 Q6 word: SLICEB.K0.INIT 1111010001000100 word: SLICEB.K1.INIT 1000111110001000 word: SLICEC.K0.INIT 1111010001000100 word: SLICEC.K1.INIT 1000111110001000 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 0011110011000011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 .tile R18C10:PLC2 arc: H00R0000 V02N0401 arc: N1_V02N0401 N1_V01S0000 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0501 N1_V02S0501 arc: A0 H00R0000 arc: A2 V02N0701 arc: A3 V02S0701 arc: A4 H02W0701 arc: A5 V00T0000 arc: A6 H02W0501 arc: A7 V00T0100 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C11:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H02W0601 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V06S0203 arc: F0 F0_SLICE arc: N1_V01N0001 F0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C12:PLC2 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0501 arc: V00B0100 H02W0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: A0 V02N0701 arc: B2 H00R0100 arc: B3 H00R0000 arc: B4 V02N0501 arc: B5 V02S0701 arc: B6 H02E0101 arc: B7 V00B0100 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 0011110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R18C13:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0203 N1_V01S0000 arc: H00R0100 V02S0701 arc: N1_V02N0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: B0 H00R0100 arc: B1 E1_H02W0301 arc: B2 H02W0101 arc: B3 H02W0301 arc: F4 F4_SLICE arc: W1_H02W0601 F4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0011110000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C14:PLC2 arc: E1_H02E0701 N1_V02S0701 arc: H00R0100 H02E0701 arc: N1_V02N0701 S1_V02N0601 arc: V00B0000 V02S0201 arc: V00B0100 H02E0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V06S0003 arc: A2 V02S0501 arc: A4 N1_V01S0100 arc: A5 V00T0100 arc: B2 V02S0101 arc: B3 H00L0000 arc: B4 V02S0701 arc: B5 H00R0000 arc: C2 N1_V02S0401 arc: C3 H00R0100 arc: C4 H02E0601 arc: C5 H02E0401 arc: D2 N1_V01S0000 arc: D3 V00B0100 arc: D4 V02S0401 arc: D5 V00B0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 F2 arc: H00R0000 F4 arc: V00T0100 F3 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0100000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 1100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R18C15:PLC2 arc: E1_H02E0201 V02S0201 arc: H00R0000 V02S0401 arc: V00T0000 V02S0601 arc: V00T0100 H02W0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V06S0303 arc: A0 H02E0701 arc: A5 V02S0101 arc: A6 V00T0100 arc: A7 N1_V01S0100 arc: B2 W1_H02E0301 arc: B3 V02S0301 arc: B4 H00R0000 arc: B5 V02S0701 arc: B6 V00T0000 arc: B7 V02S0501 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 0011110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R18C16:PLC2 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 S1_V02N0601 arc: V00B0000 V02S0001 arc: V00T0000 H02W0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: A0 N1_V02S0701 arc: A1 S1_V02N0501 arc: A2 N1_V02S0501 arc: A3 V00T0000 arc: A4 V00T0100 arc: A5 N1_V02S0301 arc: B0 V00B0000 arc: B1 V02S0101 arc: B2 H00L0000 arc: B3 V02S0301 arc: B4 H00R0000 arc: B5 V02S0701 arc: F6 F6_SLICE arc: V01S0000 F6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C17:PLC2 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 N1_V02S0301 .tile R18C2:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 V02S0201 arc: H00L0000 H02E0001 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0701 S1_V02N0701 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A2 S1_V02N0701 arc: A3 S1_V02N0701 arc: A4 S1_V02N0301 arc: A5 S1_V02N0301 arc: A6 S1_V02N0301 arc: A7 S1_V02N0301 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H02W0101 arc: B3 H02W0101 arc: B4 H02W0101 arc: B5 H02W0101 arc: B6 H02W0101 arc: B7 H02W0101 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 V00T0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 H02W0001 arc: D7 H02W0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 H00R0000 arc: M6 V00B0100 arc: N1_V02N0301 F3 word: SLICEA.K0.INIT 0011011101110111 word: SLICEA.K1.INIT 0111011100110111 word: SLICEB.K0.INIT 0001001100110011 word: SLICEB.K1.INIT 0011001100010011 word: SLICEC.K0.INIT 0000000100010001 word: SLICEC.K1.INIT 0001000100000001 word: SLICED.K0.INIT 0111000000000000 word: SLICED.K1.INIT 0000000001110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R18C3:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06S0003 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E3_H06W0203 arc: H00R0100 H02W0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 H06W0203 arc: S3_V06S0203 E3_H06W0203 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V01S0100 arc: B1 H00R0100 arc: C0 E1_H02W0601 arc: C1 V02N0401 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 F0 arc: D3 H02E0201 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0101 Q1 arc: V00T0100 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1100001100111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R18C4:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V06S0003 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E1_H02W0701 arc: V00B0000 H02E0601 arc: V00T0000 V02S0401 arc: W1_H02W0701 E1_H02W0601 arc: A0 E1_H02W0501 arc: A3 E1_H02W0701 arc: A7 V02N0101 arc: B0 V00T0000 arc: B1 E1_H02W0101 arc: B2 E1_H02W0301 arc: B3 H00R0000 arc: B7 V00B0000 arc: C0 H02W0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 H02W0401 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02W0001 arc: D2 H02W0001 arc: D3 H02E0201 arc: D6 W1_H02E0201 arc: D7 V02S0601 arc: E1_H01E0101 F6 arc: E1_H02E0701 Q7 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: LSR0 H02W0301 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 H02E0601 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V02N0301 F1 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 0000000000010111 word: SLICEA.K1.INIT 0000000000001100 word: SLICEB.K0.INIT 0000000000000011 word: SLICEB.K1.INIT 0010101100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R18C5:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 E1_H01W0100 arc: H00R0100 H02E0701 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 H02W0701 arc: V00B0000 S1_V02N0201 arc: V00T0100 H02E0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 E1_H02W0301 arc: B4 V02N0701 arc: C4 V00T0100 arc: CLK0 G_HPBX0100 arc: D4 H00R0100 arc: D5 V00B0000 arc: E1_H02E0401 Q4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: V00B0100 F5 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R18C6:PLC2 arc: E3_H06E0003 N3_V06S0003 arc: H00L0100 N1_V02S0301 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06W0203 arc: V00B0100 V02S0301 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 E1_H01W0100 arc: B4 H02E0101 arc: B5 H00R0000 arc: B6 V00B0000 arc: B7 W1_H02E0101 arc: C4 V02N0201 arc: C5 V02S0001 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D4 N1_V02S0601 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0601 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F7 arc: H01W0100 Q6 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F7 arc: S1_V02S0601 F4 arc: V00B0000 F4 arc: V01S0000 Q5 arc: V01S0100 F4 arc: W1_H02W0601 F4 arc: W3_H06W0203 F4 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0011110011111111 word: SLICED.K0.INIT 0011110011111111 word: SLICED.K1.INIT 0011110011000011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R18C7:PLC2 arc: E1_H02E0401 V06S0203 arc: H00L0100 H02W0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: A2 V00B0000 arc: B2 H02W0301 arc: B3 H00L0000 arc: B4 H00R0000 arc: C2 N1_V02S0401 arc: C3 N1_V01S0100 arc: C4 V00T0000 arc: CLK0 G_HPBX0100 arc: D2 V00B0100 arc: D3 N1_V01S0000 arc: D4 H00R0100 arc: D5 H00L0100 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 F2 arc: H01W0000 F3 arc: H01W0100 F3 arc: LSR0 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F5 arc: S1_V02S0001 F2 arc: S1_V02S0601 Q4 arc: V01S0100 F2 word: SLICEB.K0.INIT 0110100110010110 word: SLICEB.K1.INIT 1100001100111100 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R18C8:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 H02E0401 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0003 E1_H01W0000 arc: CLK0 G_HPBX0100 arc: LSR1 V00B0000 arc: M2 V00T0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: S1_V02S0001 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R18C9:PLC2 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00T0100 H02E0301 arc: A3 V00T0000 arc: A6 H00L0000 arc: B1 V00B0000 arc: B2 H00R0100 arc: B3 H01W0100 arc: B6 V00B0100 arc: B7 V00B0000 arc: C1 H02E0601 arc: C2 H02E0601 arc: C3 H00L0100 arc: C6 V00T0100 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 N1_V01S0000 arc: D2 N1_V02S0201 arc: D3 V01S0100 arc: D6 H01W0000 arc: D7 V02S0601 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: V01S0000 F6 arc: V01S0100 Q1 arc: W1_H02W0001 Q2 arc: W1_H02W0101 F3 arc: W1_H02W0201 Q2 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 1111111111111100 word: SLICEB.K1.INIT 0000000100010111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1111111111111100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R19C10:PLC2 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 S1_V02N0601 .tile R19C11:PLC2 arc: E1_H02E0701 V06S0203 arc: W1_H02W0401 V06S0203 .tile R19C12:PLC2 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 H02E0701 .tile R19C16:PLC2 arc: N1_V02N0001 N1_V01S0000 .tile R19C2:PLC2 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H01E0001 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0201 N1_V02S0201 arc: V00B0000 H02E0401 arc: C2 H00L0100 arc: CE1 H02W0101 arc: CLK0 V00B0000 arc: D2 Q2 arc: D3 V01S0100 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0100 Q3 arc: MUXCLK1 CLK0 arc: V01S0100 Q3 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R19C3:PLC2 arc: H00L0100 V02S0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H06W0303 arc: V00T0000 H02W0001 arc: V00T0100 H02W0301 arc: W1_H02W0101 E1_H02W0101 arc: B6 V00T0000 arc: C6 V00T0100 arc: CLK0 G_HPBX0100 arc: D6 H00L0100 arc: D7 E1_H02W0201 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00B0100 F7 arc: V01S0000 Q6 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R19C4:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: H00L0100 S1_V02N0301 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 E1_H02W0101 arc: S1_V02S0001 N1_V02S0001 arc: V00B0000 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: B0 V00B0000 arc: C0 H00L0100 arc: CLK0 G_HPBX0100 arc: D0 V02N0001 arc: D1 H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0100 F1 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R19C5:PLC2 arc: E1_H02E0201 V06S0103 arc: H00L0100 H02E0301 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0701 E1_H01W0100 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: B0 E1_H02W0101 arc: C0 H00L0100 arc: CLK0 G_HPBX0100 arc: D0 S1_V02N0001 arc: D1 V02N0201 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0100 F1 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R19C6:PLC2 arc: H00L0000 H02E0001 arc: H00L0100 H02W0301 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 E1_H01W0100 arc: W1_H02W0101 N1_V01S0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: B2 H00L0000 arc: C2 H00L0100 arc: CLK0 G_HPBX0100 arc: D2 N1_V01S0000 arc: D3 H02E0201 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q2 arc: LSR1 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00T0100 F3 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R19C7:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: H00L0000 V02S0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0601 N1_V02S0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 S1_V02N0301 arc: A4 V02S0101 arc: A5 V02S0101 arc: A6 V02S0101 arc: A7 V02S0101 arc: B0 V00T0000 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 V00T0000 arc: C0 N1_V01S0100 arc: C4 V02S0001 arc: C5 V02S0001 arc: C6 V02S0001 arc: C7 V02S0001 arc: D0 V00T0100 arc: D4 H00R0100 arc: D5 H00R0100 arc: D6 H00R0100 arc: D7 H00R0100 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: H01W0100 F3 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00B0100 arc: N1_V01N0101 F3 arc: V01S0000 F3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1110111011101111 word: SLICEC.K1.INIT 1000111011101110 word: SLICED.K0.INIT 1000111011101110 word: SLICED.K1.INIT 1000100010001110 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R19C8:PLC2 arc: H00L0100 H02E0301 arc: H00R0000 V02S0401 arc: N1_V02N0501 V01N0101 arc: V00B0000 V02S0001 arc: B0 V00B0000 arc: C0 H00L0100 arc: CLK0 G_HPBX0100 arc: D0 S1_V02N0001 arc: D1 H00R0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0100 Q0 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0100 F1 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R19C9:PLC2 arc: W1_H02W0201 N1_V01S0000 .tile R20C10:PLC2 arc: E3_H06E0303 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V06S0203 .tile R20C11:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N3_V06N0203 S3_V06N0203 .tile R20C13:PLC2 arc: N1_V02N0601 H06E0303 .tile R20C14:PLC2 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 .tile R20C15:PLC2 arc: N1_V02N0301 N3_V06S0003 .tile R20C16:PLC2 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 W3_H06E0303 .tile R20C2:PLC2 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 N3_V06S0203 arc: W1_H02W0701 E1_H02W0701 arc: C1 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02W0201 arc: E1_H02E0301 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00T0000 F0 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 1111000000001111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R20C3:PLC2 arc: E1_H02E0401 N1_V02S0401 arc: H00L0100 H02E0301 arc: N1_V02N0601 N3_V06S0303 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N1_V02S0401 arc: B4 N1_V01S0000 arc: C4 V02N0001 arc: CLK0 G_HPBX0100 arc: D4 H00L0100 arc: D5 V00B0000 arc: D7 E1_H02W0201 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S3_V06S0203 Q4 arc: S3_V06S0303 F5 arc: V00B0000 Q4 arc: V00B0100 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R20C4:PLC2 arc: H00R0000 H02E0401 arc: N1_V02N0201 E1_H02W0201 arc: W1_H02W0701 V06S0203 arc: B2 H00R0000 arc: B3 H02W0301 arc: C2 H00L0100 arc: C3 V02N0401 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 H02W0001 arc: E3_H06E0003 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0100 F3 arc: MUXCLK1 CLK0 arc: N1_V02N0001 Q2 arc: N1_V02N0101 F3 word: SLICEB.K0.INIT 1100001111111111 word: SLICEB.K1.INIT 1100001100111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R20C5:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 S1_V02N0201 arc: H00R0000 H02W0601 arc: N1_V02N0201 S1_V02N0201 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: B5 H00R0000 arc: C5 V00T0100 arc: CLK0 G_HPBX0000 arc: D4 V02N0601 arc: D5 E1_H02W0201 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR1 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: V00B0000 F4 arc: V01S0000 Q5 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 1100001100111100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R20C6:PLC2 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: V00B0100 H02W0701 arc: W1_H02W0601 N1_V02S0601 arc: B2 H00R0000 arc: C2 H00L0100 arc: CLK0 G_HPBX0100 arc: D2 V00B0100 arc: D3 H02E0201 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: V00T0100 F3 arc: W1_H02W0201 Q2 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R20C7:PLC2 arc: E1_H02E0601 N1_V01S0000 arc: N1_V02N0001 H06E0003 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0601 N1_V02S0601 arc: C5 H02W0601 arc: CLK0 G_HPBX0000 arc: D4 W1_H02E0001 arc: D5 V02S0601 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: V00B0000 F4 arc: W1_H02W0701 Q5 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0000111111110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R20C8:PLC2 arc: V00B0100 E1_H02W0701 arc: W1_H02W0601 N1_V02S0601 arc: C1 N1_V02S0601 arc: C3 H02E0601 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 V00B0100 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0101 Q1 arc: V01S0000 Q3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R20C9:PLC2 arc: N1_V02N0601 H02W0601 .tile R21C10:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 .tile R21C12:PLC2 arc: N1_V02N0501 N3_V06S0303 .tile R21C2:PLC2 arc: S1_V02S0201 N3_V06S0103 .tile R21C3:PLC2 arc: E1_H02E0401 V06S0203 arc: N1_V02N0001 H02W0001 .tile R21C4:PLC2 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02E0401 arc: W1_H02W0001 N3_V06S0003 .tile R21C5:PLC2 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0601 S1_V02N0301 .tile R21C6:PLC2 arc: N1_V02N0301 H02W0301 .tile R21C7:PLC2 arc: N1_V02N0301 N3_V06S0003 arc: W1_H02W0301 N3_V06S0003 .tile R21C8:PLC2 arc: N1_V02N0001 N1_V01S0000 .tile R22C16:PLC2 arc: N1_V02N0501 N3_V06S0303 .tile R22C5:PLC2 arc: N1_V02N0201 N3_V06S0103 .tile R23C2:PLC2 arc: W1_H02W0201 N1_V02S0201 .tile R23C3:PLC2 arc: W1_H02W0501 V06S0303 .tile R23C5:PLC2 arc: N1_V02N0301 N3_V06S0003 .tile R26C11:PLC2 arc: N3_V06N0203 S3_V06N0203 .tile R26C14:PLC2 arc: N3_V06N0303 S3_V06N0203 .tile R26C3:PLC2 arc: W1_H02W0701 N3_V06S0203 .tile R2C2:PLC2 arc: D1 N1_V01S0000 arc: F1 F1_SLICE arc: H01W0100 F1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R31C2:PLC2 arc: N3_V06N0003 S3_V06N0003 .tile R31C4:PLC2 arc: N3_V06N0003 S3_V06N0003 .tile R32C11:PLC2 arc: N3_V06N0203 H06W0203 .tile R32C14:PLC2 arc: F7 F7_SLICE arc: N3_V06N0203 F7 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R32C2:PLC2 arc: S3_V06S0303 E3_H06W0303 .tile R32C8:PLC2 arc: W3_H06W0303 E3_H06W0203 .tile R38C2:PLC2 arc: S3_V06S0303 N3_V06S0303 .tile R43C2:PLC2 arc: N3_V06N0303 S3_V06N0203 .tile R43C4:PLC2 arc: N3_V06N0303 S3_V06N0303 .tile R44C2:PLC2 arc: S1_V02S0601 N3_V06S0303 .tile R46C2:PLC2 arc: S1_V02S0701 N1_V02S0601 .tile R48C2:PLC2 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0701 N1_V02S0701 .tile R4C11:PLC2 arc: N3_V06N0303 S3_V06N0203 .tile R5C15:PLC2 arc: S1_V02S0001 V01N0001 .tile R5C5:PLC2 arc: S1_V02S0201 S3_V06N0103 .tile R6C15:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: B4 V00B0100 arc: C4 H02W0601 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D4 V02N0401 arc: D5 E1_H02W0201 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0401 Q4 arc: S3_V06S0203 Q4 arc: V01S0100 Q4 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R6C16:PLC2 arc: H00R0100 H02E0701 arc: W1_H02W0601 S1_V02N0601 arc: B2 V02N0301 arc: C2 V02N0601 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0201 arc: D3 H02W0201 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: S1_V02S0201 Q2 arc: S3_V06S0103 Q2 arc: V00T0100 F3 arc: V01S0100 Q2 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R6C17:PLC2 arc: W1_H02W0201 S1_V02N0201 .tile R6C3:PLC2 arc: H00R0000 S1_V02N0601 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A2 S1_V02N0701 arc: A3 S1_V02N0701 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0201 arc: D3 V02N0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: LSR0 V00B0100 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0101 Q1 arc: S1_V02S0301 Q1 arc: V01S0000 Q1 word: SLICEA.K0.INIT 1100000011110101 word: SLICEA.K1.INIT 0000010111001111 word: SLICEB.K0.INIT 0011111100001010 word: SLICEB.K1.INIT 1111101000110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R6C5:PLC2 arc: W1_H02W0401 V02N0401 .tile R6C9:PLC2 arc: S1_V02S0201 V01N0001 .tile R7C10:PLC2 arc: H00R0000 S1_V02N0401 arc: S1_V02S0301 V01N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V02N0601 arc: A0 H02W0701 arc: A3 V01N0101 arc: A4 V02N0101 arc: A5 S1_V02N0301 arc: A6 V00T0100 arc: A7 H02E0701 arc: B2 V02N0301 arc: B3 S1_V02N0101 arc: B4 H00R0000 arc: B5 S1_V02N0501 arc: B6 V00T0000 arc: B7 S1_V02N0701 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R7C11:PLC2 arc: H00L0000 V02N0201 arc: H00R0000 S1_V02N0401 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02N0401 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V06N0203 arc: A0 V02N0501 arc: A1 H00L0000 arc: A2 V01N0101 arc: A3 S1_V02N0701 arc: A4 V02N0301 arc: A5 V00T0000 arc: B0 V00B0000 arc: B1 S1_V02N0301 arc: B2 V02N0101 arc: B3 S1_V02N0101 arc: B4 H00R0000 arc: B5 S1_V02N0501 arc: F6 F6_SLICE arc: W1_H02W0601 F6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R7C13:PLC2 arc: V00B0000 E1_H02W0601 arc: B6 V00B0000 arc: C6 E1_H02W0401 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D6 E1_H02W0201 arc: D7 H02W0201 arc: E1_H02E0601 Q6 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: S1_V02S0401 Q6 arc: V00B0100 F7 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R7C14:PLC2 arc: H00R0100 H02W0701 arc: W1_H02W0201 V02N0201 arc: B0 S1_V02N0301 arc: C0 V02N0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V02N0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S3_V06S0003 Q0 arc: V00T0100 F1 arc: V01S0100 Q0 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R7C15:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0701 V02N0701 arc: H00R0000 V02N0601 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 W1_H02E0601 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: B2 V02N0101 arc: C2 V02N0401 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 S1_V02N0001 arc: D3 E1_H02W0201 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0201 Q2 arc: S3_V06S0103 Q2 arc: V00T0100 F3 arc: V01S0000 Q2 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R7C16:PLC2 arc: H00R0100 H02E0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 V01N0001 arc: S1_V02S0101 N1_V01S0100 arc: V00B0000 S1_V02N0001 arc: B6 V00B0000 arc: C6 V02N0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D6 H02E0201 arc: D7 H02W0201 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S1_V02S0401 Q6 arc: S3_V06S0303 Q6 arc: V00B0100 F7 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R7C17:PLC2 arc: H00R0100 W1_H02E0701 arc: V00B0000 S1_V02N0201 arc: W1_H02W0201 V02N0201 arc: B0 V00B0000 arc: C0 S1_V02N0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 V02N0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0201 Q0 arc: S3_V06S0003 Q0 arc: V00T0100 F1 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R7C2:PLC2 arc: E1_H02E0001 V02N0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0501 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H02W0501 arc: V00B0100 V02N0101 arc: V00T0100 H02E0301 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 H02W0501 arc: A5 H02W0501 arc: A6 H02W0501 arc: A7 H02W0501 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 E1_H02W0401 arc: C5 E1_H02W0401 arc: C6 E1_H02W0401 arc: C7 E1_H02W0401 arc: D0 S1_V02N0201 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0201 arc: D4 S1_V02N0401 arc: D5 S1_V02N0401 arc: D6 S1_V02N0401 arc: D7 S1_V02N0401 arc: E1_H02E0301 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 word: SLICEA.K0.INIT 0011000100010001 word: SLICEA.K1.INIT 0001000100110001 word: SLICEB.K0.INIT 0111001100110011 word: SLICEB.K1.INIT 0011001101110011 word: SLICEC.K0.INIT 1111011101110111 word: SLICEC.K1.INIT 0111011111110111 word: SLICED.K0.INIT 0001111111111111 word: SLICED.K1.INIT 1111111100011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R7C3:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02N0201 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: W1_H02W0501 S1_V02N0501 arc: A0 V01N0101 arc: A3 V01N0101 arc: A4 S1_V02N0101 arc: A7 S1_V02N0101 arc: B0 H00R0100 arc: B3 H00R0100 arc: B4 V02N0501 arc: B7 V02N0501 arc: C0 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 E1_H02W0401 arc: C7 E1_H02W0401 arc: D0 V00B0100 arc: D3 V00B0100 arc: D4 H00L0100 arc: D7 H00L0100 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 V00B0000 arc: M5 H02E0001 arc: M6 V00B0000 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000010001000000 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0100000000000100 word: SLICEC.K0.INIT 1111101110111111 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1011111111111011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R7C4:PLC2 arc: S3_V06S0003 H06W0003 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 E1_H02W0601 arc: A1 V01N0101 arc: A3 V01N0101 arc: B1 H02E0101 arc: B3 H02E0101 arc: C1 H02W0401 arc: C3 H02W0401 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02E0001 arc: D2 V02N0201 arc: D3 H02E0001 arc: D6 H02W0201 arc: D7 H02E0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: LSR0 V00B0000 arc: M0 V00T0000 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00B0000 F6 arc: V01S0000 Q7 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0101010001000101 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1000101010101000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0000111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R7C5:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 V02N0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0401 S1_V02N0401 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 E1_H02W0101 arc: W3_H06W0103 E1_H02W0101 arc: A0 H00L0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 V00B0000 arc: A6 H00L0000 arc: A7 H00L0000 arc: B0 V02N0101 arc: B1 V00B0000 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 V02N0201 arc: C6 V02N0201 arc: C7 V02N0201 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D4 W1_H02E0201 arc: D5 V00B0000 arc: D6 W1_H02E0201 arc: D7 W1_H02E0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H00R0100 arc: M6 V00T0000 arc: S1_V02S0301 F3 arc: S3_V06S0003 F3 word: SLICEC.K0.INIT 0101010101010001 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0100010101010101 word: SLICED.K1.INIT 0101010101010001 word: SLICEA.K0.INIT 0101010101010100 word: SLICEA.K1.INIT 0011000000110011 word: SLICEB.K0.INIT 0101000101010101 word: SLICEB.K1.INIT 0101010101010100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R7C6:PLC2 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: V00T0100 H02W0101 arc: W1_H02W0601 S1_V02N0601 arc: B3 H00R0000 arc: C3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H02E0201 arc: D3 V00T0100 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: S1_V02S0301 Q3 arc: V00T0000 F2 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1100001100111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R7C7:PLC2 arc: H00L0000 V02N0201 arc: H00R0000 V02N0601 arc: S1_V02S0601 H02W0601 arc: V00T0100 H02W0101 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 S1_V02N0601 arc: A4 V02N0101 arc: A5 V02N0301 arc: A6 V02N0101 arc: A7 V02N0301 arc: B0 S1_V02N0301 arc: B4 S1_V02N0701 arc: B5 S1_V02N0501 arc: B6 S1_V02N0501 arc: B7 S1_V02N0701 arc: C0 V02N0401 arc: C4 V02N0001 arc: C5 V02N0001 arc: C6 V02N0001 arc: C7 V02N0001 arc: D0 S1_V02N0001 arc: D4 V01N0001 arc: D5 V01N0001 arc: D6 V01N0001 arc: D7 V01N0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00T0100 arc: S3_V06S0003 F3 arc: V01S0000 F3 arc: V01S0100 F3 arc: W1_H02W0101 F3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1110111011101111 word: SLICEC.K1.INIT 1000111011101110 word: SLICED.K0.INIT 1000111011101110 word: SLICED.K1.INIT 1000100010001110 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R7C8:PLC2 arc: S1_V02S0601 E1_H02W0601 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0601 E1_H02W0601 .tile R7C9:PLC2 arc: E1_H02E0701 V02N0701 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 E1_H02W0501 arc: A0 H00L0000 arc: A1 H00R0000 arc: A5 H02W0501 arc: B0 E1_H02W0301 arc: B1 V02N0301 arc: B3 E1_H02W0101 arc: B4 S1_V02N0501 arc: B5 S1_V02N0701 arc: C0 H00L0100 arc: C1 S1_V02N0601 arc: C3 E1_H02W0401 arc: C4 V02N0201 arc: C5 V00B0100 arc: D0 V01S0100 arc: D1 H02W0201 arc: D3 V02S0201 arc: D4 H02W0001 arc: D5 V02N0601 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 F1 arc: N1_V01N0001 F5 arc: S1_V02S0001 F0 arc: S1_V02S0301 F3 arc: V01S0100 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100001100000000 word: SLICEC.K0.INIT 0000000011001111 word: SLICEC.K1.INIT 1011000000001011 word: SLICEA.K0.INIT 1001000000000000 word: SLICEA.K1.INIT 1001000000001001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R8C10:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0601 S3_V06N0303 arc: H00L0000 H02E0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0501 H02W0501 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02N0701 arc: A0 H02W0501 arc: B2 V02S0301 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V01S0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q6 arc: E1_H02E0501 Q7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q2 arc: H01W0100 Q3 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q2 arc: N1_V02N0101 Q3 arc: N1_V02N0701 Q5 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 Q7 arc: V01S0100 Q4 arc: W1_H02W0401 Q4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R8C11:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: N1_V02N0101 V01N0101 arc: N1_V02N0501 H02E0501 arc: S1_V02S0601 H02E0601 arc: V00B0000 S1_V02N0001 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 H01E0101 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q3 arc: H01W0100 Q0 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q1 arc: N1_V02N0201 Q0 arc: N1_V02N0301 Q3 arc: N1_V02N0401 Q4 arc: V01S0100 Q2 arc: W1_H02W0201 Q0 arc: W1_H02W0601 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001010 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R8C12:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 H02W0301 arc: W1_H02W0201 S1_V02N0201 arc: B4 E1_H02W0301 arc: C4 V02N0201 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D4 H00L0100 arc: D5 H02E0201 arc: E1_H01E0101 Q4 arc: E1_H02E0401 Q4 arc: E3_H06E0203 Q4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: V00B0100 F5 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R8C13:PLC2 arc: H00R0000 H02E0601 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 H01E0101 arc: V00B0100 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: B6 V02N0501 arc: C6 V00B0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 E1_H02W0201 arc: D7 H02W0201 arc: E1_H02E0601 Q6 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02E0501 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V01S0000 Q6 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R8C14:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 W1_H02E0401 arc: H00R0000 H02W0601 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: B2 E1_H02W0301 arc: C2 E1_H02W0401 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 H02W0201 arc: D3 S1_V02N0201 arc: E1_H02E0201 Q2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: V00T0100 F3 arc: V01S0100 Q2 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R8C15:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02E0001 arc: H00R0000 V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: V00B0000 W1_H02E0601 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 S1_V02N0601 arc: A0 H00L0000 arc: B2 H00R0100 arc: B3 V02S0301 arc: B4 H00R0000 arc: B5 H02E0101 arc: B6 N1_V01S0000 arc: B7 V00B0000 arc: E1_H01E0001 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F2 arc: N1_V01N0001 F4 arc: N1_V02N0401 F6 arc: W1_H02W0701 F7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R8C16:PLC2 arc: H00L0000 W1_H02E0201 arc: N1_V02N0601 H01E0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0601 V01N0001 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02S0401 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 V01N0101 arc: B0 V00T0000 arc: B1 S1_V02N0301 arc: B2 E1_H01W0100 arc: B3 V02S0101 arc: B4 H00L0000 arc: B5 V02N0701 arc: B6 W1_H02E0301 arc: B7 V00B0000 arc: E1_H01E0001 F1 arc: E1_H02E0201 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F3 arc: N1_V02N0201 F0 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V01S0000 F6 arc: W1_H02W0401 F4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R8C17:PLC2 arc: H00L0000 V02N0001 arc: H00R0000 W1_H02E0601 arc: N1_V02N0201 S1_V02N0701 arc: S1_V02S0001 H01E0001 arc: V00B0000 V02S0201 arc: V00T0000 H02E0201 arc: B0 V00B0000 arc: B1 V01N0001 arc: B4 H00L0000 arc: C4 V00T0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 W1_H02E0201 arc: D5 S1_V02N0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q4 arc: LSR1 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S1_V02S0301 F1 arc: V00B0100 F5 arc: V01S0000 F0 arc: V01S0100 Q4 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R8C2:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: H00R0000 V02N0601 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 V00T0100 arc: A5 V00T0100 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B2 S1_V02N0101 arc: B3 S1_V02N0301 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02S0401 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 V00T0000 arc: D0 V02N0201 arc: D1 V02N0001 arc: D2 V02N0201 arc: D3 V02N0001 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 V02N0401 arc: D7 V02N0401 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00B0000 word: SLICEA.K0.INIT 0011011101110111 word: SLICEA.K1.INIT 0111011100110111 word: SLICEB.K0.INIT 0001001100110011 word: SLICEB.K1.INIT 0011001100010011 word: SLICEC.K0.INIT 0000000100010001 word: SLICEC.K1.INIT 0001000100000001 word: SLICED.K0.INIT 0111000000000000 word: SLICED.K1.INIT 0000000001110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R8C3:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 E1_H02W0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 W1_H02E0301 arc: W1_H02W0501 E1_H01W0100 arc: A2 V02N0501 arc: A6 H02W0701 arc: A7 H02W0701 arc: B2 H02E0101 arc: B6 V00B0000 arc: B7 V00B0000 arc: C2 H00L0100 arc: C3 N1_V01S0100 arc: C6 V00T0100 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D2 V00B0100 arc: D3 V02N0001 arc: D5 S1_V02N0601 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F5 arc: E1_H02E0001 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q3 arc: H01W0100 F6 arc: LSR1 H02W0301 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F2 arc: N1_V02N0101 F1 arc: V01S0000 Q3 arc: V01S0100 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1110101111010100 word: SLICED.K1.INIT 0001010000101011 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 1111000000001111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R8C4:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 V01N0101 arc: H00L0100 V02N0301 arc: H00R0100 E1_H02W0701 arc: H01W0100 G_HPBX0000 arc: S1_V02S0001 H06W0003 arc: V00B0100 E1_H02W0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0701 E1_H02W0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 E1_H01W0000 arc: A5 E1_H01W0000 arc: B0 E1_H01W0100 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 E1_H02W0301 arc: B5 E1_H02W0301 arc: C0 H00L0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 H02E0601 arc: C5 H02E0601 arc: CLK0 G_HPBX0100 arc: D0 N1_V01S0000 arc: D1 H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 E1_H02W0001 arc: D5 E1_H02W0001 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0000 F2 arc: LSR1 V00T0100 arc: M2 H02E0601 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 F2 arc: N1_V02N0201 F2 arc: N1_V02N0401 F4 arc: V00T0100 F1 arc: V01S0100 Q0 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0001010000101000 word: SLICEC.K1.INIT 1100001000000001 word: SLICEB.K0.INIT 0111000101110111 word: SLICEB.K1.INIT 0011001101110001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R8C5:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0001 E1_H02W0001 arc: V00B0000 S1_V02N0201 arc: V00T0000 H02E0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 H01E0101 arc: W3_H06W0003 E1_H01W0000 arc: A0 E1_H02W0701 arc: A1 E1_H02W0701 arc: A2 E1_H02W0701 arc: A3 E1_H02W0701 arc: A4 H02W0501 arc: A5 H02W0501 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 E1_H02W0301 arc: B5 E1_H02W0101 arc: B6 V00T0000 arc: C0 E1_H02W0601 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0601 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 V02N0001 arc: CLK0 G_HPBX0100 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D4 H00R0100 arc: D5 H00R0100 arc: D6 V02N0601 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q6 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M4 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V02N0101 F1 arc: N1_V02N0301 F1 arc: N1_V02N0601 F4 arc: V00B0100 F7 arc: V01S0000 F4 arc: V01S0100 F1 arc: W1_H02W0301 F1 arc: W1_H02W0601 F4 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0110100110010110 word: SLICEC.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 1001000000001001 word: SLICEA.K1.INIT 0000100110010000 word: SLICEB.K0.INIT 0000011001100000 word: SLICEB.K1.INIT 0110000000000110 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R8C6:PLC2 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02N0201 arc: V00T0000 H02W0001 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E1_H01W0100 arc: A0 E1_H02W0501 arc: A3 E1_H02W0501 arc: B0 V00B0000 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00L0000 arc: B6 W1_H02E0301 arc: C0 V02N0401 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 V02N0401 arc: C6 V02N0001 arc: CLK0 G_HPBX0100 arc: D0 E1_H02W0001 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 E1_H02W0001 arc: D6 H00L0100 arc: D7 H02E0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F7 arc: LSR0 H02E0301 arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S1_V02S0601 Q6 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000000010111 word: SLICEA.K1.INIT 0000000000001100 word: SLICEB.K0.INIT 0000000000000011 word: SLICEB.K1.INIT 0010101100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R8C7:PLC2 arc: H00R0000 V02S0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0401 E1_H02W0401 arc: V00B0000 V02N0001 arc: V00T0000 S1_V02N0401 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 N1_V01S0100 arc: A1 H00L0000 arc: A6 H00L0000 arc: B0 E1_H02W0101 arc: B1 H00R0100 arc: B3 E1_H02W0101 arc: B4 N1_V01S0000 arc: B5 E1_H02W0101 arc: B6 V00B0100 arc: B7 E1_H02W0101 arc: C0 H02W0601 arc: C1 V02N0401 arc: C2 H00L0000 arc: C3 H02W0601 arc: C4 V01N0101 arc: C5 H02W0601 arc: C6 V02N0201 arc: C7 H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 S1_V02N0001 arc: D4 V00B0000 arc: D5 V01N0001 arc: D6 H00L0100 arc: D7 H02W0201 arc: E1_H01E0001 F2 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q3 arc: H00R0100 Q7 arc: H01W0000 F2 arc: H01W0100 F4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q0 arc: N1_V02N0101 F1 arc: N1_V02N0201 Q0 arc: N1_V02N0301 F1 arc: N1_V02N0601 F6 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q3 arc: S1_V02S0201 Q0 arc: S1_V02S0701 Q5 arc: V00B0100 Q7 arc: V00T0100 Q3 arc: V01S0000 Q5 arc: V01S0100 Q7 arc: W1_H02W0501 Q7 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q7 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111111111111100 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1111111111111100 word: SLICEA.K0.INIT 1111111111111100 word: SLICEA.K1.INIT 0000000100010111 word: SLICEC.K0.INIT 1100001100111100 word: SLICEC.K1.INIT 1111111111111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C8:PLC2 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 E1_H01W0000 arc: S3_V06S0003 H01E0001 arc: V00B0100 H02E0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 S1_V02N0601 arc: A6 V02N0301 arc: B3 H00R0000 arc: B6 S1_V02N0701 arc: B7 V00B0000 arc: C3 V02N0401 arc: C6 S1_V02N0001 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 V00T0100 arc: D6 V01N0001 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00B0000 F6 arc: V00T0000 F2 arc: V00T0100 Q3 arc: W1_H02W0301 Q3 arc: W1_H02W0501 F7 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0011110011000011 word: SLICED.K0.INIT 0110100110010110 word: SLICED.K1.INIT 1100001100111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R8C9:PLC2 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 H01E0001 arc: A0 S1_V02N0501 arc: A1 H02W0501 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: A6 H02W0701 arc: A7 H02W0701 arc: B0 V00T0000 arc: B1 E1_H02W0301 arc: B2 H01W0100 arc: B3 H00L0000 arc: B6 V00B0100 arc: B7 E1_H02W0101 arc: C0 V02N0401 arc: C1 H02W0601 arc: C2 V02S0601 arc: C3 N1_V01N0001 arc: C6 E1_H02W0401 arc: C7 E1_H02W0401 arc: D0 E1_H02W0001 arc: D1 H00R0000 arc: D2 V02N0201 arc: D3 V01S0100 arc: D6 H02W0201 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F0 arc: N1_V01N0001 F1 arc: S3_V06S0103 F2 arc: V01S0100 F6 word: SLICEA.K0.INIT 1011000000001011 word: SLICEA.K1.INIT 1011000000001011 word: SLICEB.K0.INIT 1000111100000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1001000000001001 word: SLICED.K1.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R9C10:PLC2 arc: N1_V02N0301 N1_V01S0100 arc: V00B0000 E1_H02W0401 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V02N0701 arc: A0 V02S0501 arc: A2 V02N0501 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V01S0000 arc: B6 V02N0701 arc: B7 V00B0100 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q6 arc: H01W0100 Q3 arc: LSR0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q2 arc: N1_V02N0001 Q2 arc: N1_V02N0101 Q3 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q6 arc: N1_V02N0701 Q7 arc: V00B0100 Q7 arc: V01S0000 Q5 arc: V01S0100 Q6 arc: W1_H02W0301 Q3 arc: W1_H02W0601 Q4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R9C11:PLC2 arc: E1_H02E0501 V01N0101 arc: N1_V02N0701 N1_V01S0100 arc: V00B0000 V02N0001 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q0 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q2 arc: N1_V02N0001 Q2 arc: N1_V02N0101 Q3 arc: N1_V02N0201 Q0 arc: N1_V02N0301 Q1 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q5 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0100 Q1 arc: W1_H02W0201 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001010 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R9C12:PLC2 arc: E1_H02E0601 V02N0601 arc: N1_V02N0201 E1_H02W0201 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: V00B0000 H02W0401 arc: W1_H02W0101 V01N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V01N0101 arc: W3_H06W0103 V01N0101 arc: A0 H02E0501 arc: B2 V02N0101 arc: B3 V02N0301 arc: B4 H02W0301 arc: B5 V02N0501 arc: B6 V00B0000 arc: B7 V02N0701 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 0011110000000000 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 0011110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 0011110000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C13:PLC2 arc: H00L0000 V02N0201 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 H02W0401 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V01N0101 arc: B0 V02N0301 arc: B1 V02N0101 arc: B2 H00L0000 arc: B3 E1_H02W0101 arc: B4 H02W0101 arc: B5 V02N0501 arc: B6 V00B0000 arc: B7 V02N0701 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 0011110000000000 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 0011110000000000 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 0011110000000000 word: SLICEA.K0.INIT 0011110000000000 word: SLICEA.K1.INIT 0011110000000000 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R9C14:PLC2 arc: E1_H02E0701 N1_V01S0100 arc: H00R0000 W1_H02E0601 arc: N1_V02N0301 E1_H01W0100 arc: S1_V02S0501 N1_V01S0100 arc: V00B0000 V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 V01N0001 arc: B0 V00B0000 arc: B1 V02N0301 arc: B4 H02W0301 arc: C4 E1_H02W0401 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 S1_V02N0401 arc: D5 V02N0401 arc: E1_H01E0101 Q4 arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F2 arc: LSR0 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: V00B0100 F5 arc: V01S0000 Q4 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0011110000000000 word: SLICEA.K1.INIT 0011110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R9C15:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 V02N0601 arc: H00L0000 N1_V02S0201 arc: H00R0000 V02S0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: V00T0000 N1_V02S0601 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0701 V06S0203 arc: A0 V02N0701 arc: A2 V02S0701 arc: A3 V02S0501 arc: A4 V00T0000 arc: A5 V02N0301 arc: A6 H00L0000 arc: A7 H00R0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F5 arc: N1_V01N0101 F6 arc: N1_V02N0301 F3 arc: N1_V02N0601 F4 arc: W1_H02W0501 F7 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R9C16:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 V02N0001 arc: H00R0000 N1_V02S0401 arc: N1_V02N0701 S1_V02N0601 arc: V00B0000 V02S0201 arc: V00T0000 S1_V02N0601 arc: W1_H02W0401 N1_V01S0000 arc: A0 H00R0000 arc: A1 V02N0501 arc: A2 H02W0501 arc: A3 V00B0000 arc: A4 W1_H02E0701 arc: A5 V00T0000 arc: A6 H02E0501 arc: A7 H00L0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: N1_V01N0001 F7 arc: N1_V01N0101 F4 arc: N1_V02N0001 F0 arc: N1_V02N0301 F3 arc: S1_V02S0501 F5 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C17:PLC2 arc: H00L0000 N1_V02S0201 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 N1_V01S0000 arc: S1_V02S0501 H01E0101 arc: V00B0100 V02S0301 arc: W1_H02W0501 N1_V01S0100 arc: A0 H00L0000 arc: A1 E1_H01E0001 arc: B6 F1 arc: C6 V00B0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 W1_H02E0201 arc: D7 V02N0401 arc: E1_H01E0001 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR1 H02E0501 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V02N0201 F0 arc: V01S0100 Q6 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R9C2:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: H00L0000 H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H06W0303 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: V00B0100 E1_H02W0501 arc: V00T0100 V02S0701 arc: A0 E1_H02W0701 arc: A3 E1_H02W0701 arc: A5 E1_H02W0701 arc: A6 E1_H02W0701 arc: B0 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 E1_H02W0401 arc: C5 E1_H02W0401 arc: C6 E1_H02W0401 arc: C7 E1_H02W0401 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 N1_V02S0401 arc: D5 N1_V02S0401 arc: D6 N1_V02S0401 arc: D7 N1_V02S0401 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00L0100 arc: M6 V00T0100 word: SLICEA.K0.INIT 0111111001110111 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 1111110011111111 word: SLICEB.K1.INIT 0111001001110111 word: SLICEC.K0.INIT 1100111111111111 word: SLICEC.K1.INIT 0001101110111011 word: SLICED.K0.INIT 1101101110111011 word: SLICED.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R9C3:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H02W0601 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: A0 H00L0100 arc: A3 H00L0100 arc: A4 V02S0101 arc: A7 V02S0101 arc: B0 V02S0301 arc: B2 V02S0301 arc: B3 V02S0301 arc: B4 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 H02W0601 arc: C5 H02W0601 arc: C6 H02W0601 arc: C7 H02W0601 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H02E0101 F3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 E1_H02W0601 arc: M1 H02W0001 arc: M2 E1_H02W0601 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M5 H02W0001 arc: M6 E1_H02W0401 arc: N1_V01N0001 F3 word: SLICEA.K0.INIT 1111111111010100 word: SLICEA.K1.INIT 1111111111110000 word: SLICEC.K0.INIT 0000000000101011 word: SLICEC.K1.INIT 0000000000001111 word: SLICED.K0.INIT 0000000000111111 word: SLICED.K1.INIT 0000000000101011 word: SLICEB.K0.INIT 1111111111000000 word: SLICEB.K1.INIT 1111111111010100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R9C4:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 E1_H01W0000 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 H02W0701 arc: S1_V02S0301 S3_V06N0003 arc: V00T0100 H02W0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0701 arc: B0 V02N0301 arc: C0 N1_V01N0001 arc: CLK0 G_HPBX0100 arc: D0 V00T0100 arc: D1 H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0100 F1 arc: LSR0 H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 Q0 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R9C5:PLC2 arc: E1_H02E0601 V02N0601 arc: H00L0000 V02S0001 arc: H00L0100 N1_V02S0301 arc: N1_V02N0001 H02E0001 arc: S1_V02S0001 H02E0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0201 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0303 E1_H01W0100 arc: B4 W1_H02E0101 arc: B5 H00R0000 arc: B6 V00B0000 arc: B7 E1_H02W0301 arc: C3 H00L0000 arc: C4 V02S0001 arc: C5 V00T0000 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: D4 H00L0100 arc: D5 V02N0401 arc: D6 V02N0401 arc: D7 E1_H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0401 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F7 arc: H01W0100 F4 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F7 arc: N1_V02N0401 F4 arc: N1_V02N0601 Q6 arc: S3_V06S0203 F4 arc: V00B0000 F4 arc: V01S0000 Q5 arc: V01S0100 F4 arc: W1_H02W0101 Q3 arc: W1_H02W0501 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011111111 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0011110011111111 word: SLICED.K0.INIT 0011110011111111 word: SLICED.K1.INIT 0011110011000011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R9C6:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H01E0001 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 W1_H02E0101 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0201 E1_H02W0201 arc: A0 V02S0501 arc: A3 V02S0501 arc: B0 V00T0000 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00L0000 arc: B4 H00R0000 arc: B5 N1_V01S0000 arc: C0 W1_H02E0401 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 W1_H02E0401 arc: C4 V00B0100 arc: C5 F4 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H01E0101 arc: D2 H01E0101 arc: D3 V02S0001 arc: D4 H02W0001 arc: D5 H01W0000 arc: D7 V02N0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 F4 arc: LSR1 H02W0501 arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F1 arc: N1_V02N0601 F4 arc: W1_H02W0101 F1 arc: W1_H02W0301 F1 arc: W1_H02W0401 F4 arc: W1_H02W0701 Q5 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0011110011000011 word: SLICEC.K1.INIT 1100001100111100 word: SLICEA.K0.INIT 0001011111101000 word: SLICEA.K1.INIT 1100111111110011 word: SLICEB.K0.INIT 0011111111111100 word: SLICEB.K1.INIT 1101010000101011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R9C7:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: H00L0000 V02S0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0301 S3_V06N0003 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 V02S0701 arc: A0 H00L0100 arc: A4 S1_V02N0101 arc: A6 S1_V02N0101 arc: B0 H02W0301 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H00L0000 arc: B4 E1_H02W0101 arc: B5 V02N0701 arc: B6 V00B0000 arc: B7 H02E0301 arc: C0 W1_H02E0601 arc: C1 E1_H02W0601 arc: C2 H02E0601 arc: C3 N1_V01S0100 arc: C4 V02N0201 arc: C5 E1_H02W0601 arc: C6 W1_H02E0601 arc: C7 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V00T0100 arc: D2 H02W0001 arc: D3 V00B0100 arc: D4 E1_H02W0201 arc: D5 H00R0100 arc: D6 V02N0601 arc: D7 H00R0100 arc: E1_H01E0001 Q5 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q6 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F3 arc: S1_V02S0201 Q2 arc: V00T0000 Q0 arc: V01S0000 Q7 arc: V01S0100 Q4 arc: W1_H02W0301 F3 word: SLICEB.K0.INIT 1100001111111111 word: SLICEB.K1.INIT 1100001100111100 word: SLICEC.K0.INIT 1111010001000100 word: SLICEC.K1.INIT 1111111111000000 word: SLICEA.K0.INIT 1111010001000100 word: SLICEA.K1.INIT 1111111111000000 word: SLICED.K0.INIT 1111010001000100 word: SLICED.K1.INIT 1111111111000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R9C8:PLC2 arc: E1_H02E0101 V02N0101 arc: H00R0000 N1_V02S0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V02N0301 arc: A0 E1_H01E0001 arc: A7 E1_H01W0000 arc: B0 H00R0100 arc: B1 H02W0301 arc: B2 W1_H02E0101 arc: B3 H02W0301 arc: B5 H02W0301 arc: B6 H02W0301 arc: B7 E1_H02W0101 arc: C0 W1_H02E0601 arc: C1 V02N0601 arc: C2 H00L0100 arc: C3 V02N0601 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02N0201 arc: D2 V00T0100 arc: D3 V00B0100 arc: D5 H02W0001 arc: D6 H02E0001 arc: D7 V02S0401 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 Q5 arc: H01W0000 Q6 arc: H01W0100 F0 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V02N0101 Q3 arc: S3_V06S0203 F7 arc: V00T0100 Q1 arc: V01S0000 Q1 arc: V01S0100 Q6 arc: W1_H02W0101 Q1 arc: W1_H02W0201 F2 arc: W3_H06W0003 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111111111111100 word: SLICEA.K0.INIT 0111000100010111 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 1100001100111100 word: SLICEB.K1.INIT 1111111111111100 word: SLICED.K0.INIT 1111111111111100 word: SLICED.K1.INIT 1100101000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R9C9:PLC2 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 H02W0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: S3_V06S0003 W3_H06E0003 arc: A0 V02N0701 arc: A2 V00T0000 arc: A3 H02W0701 arc: A6 H00L0000 arc: A7 N1_V01N0101 arc: B0 V02N0301 arc: B1 H01W0100 arc: B2 E1_H02W0301 arc: B3 H00R0000 arc: B6 E1_H02W0301 arc: B7 H02E0101 arc: C0 E1_H02W0601 arc: C1 S1_V02N0601 arc: C2 H00L0100 arc: C3 H00R0100 arc: C6 V00T0100 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V00B0100 arc: D2 E1_H02W0001 arc: D3 F2 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F6 word: SLICEA.K0.INIT 1111010001000100 word: SLICEA.K1.INIT 1111111111000000 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0000000100000000 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile TAP_R10C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R10C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R11C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R11C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R12C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R14C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R14C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: L_HPBX0100 G_VPTX0100 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R15C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R15C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R16C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R16C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R17C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R17C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R18C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R19C4:TAP_DRIVE arc: L_HPBX0100 G_VPTX0100 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R20C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: L_HPBX0100 G_VPTX0100 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R6C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R6C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R7C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R7C4:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R8C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R8C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R9C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R9C4:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile_group MIB_R50C2:PLL0_LL MIB_R50C3:BANKREF8 word: CLKI_DIV 0000000 word: CLKFB_DIV 0000100 word: CLKOP_DIV 0000011 word: CLKOP_CPHASE 0000011 word: CLKOP_FPHASE 000 word: CLKOS_DIV 0000001 word: CLKOS_CPHASE 0000001 word: CLKOS_FPHASE 000 word: CLKOS2_DIV 0010011 word: CLKOS2_CPHASE 0000000 word: CLKOS2_FPHASE 000 word: CLKOS3_DIV 1111111 word: CLKOS3_CPHASE 0000101 word: CLKOS3_FPHASE 000 word: PLL_LOCK_MODE 000 word: KVCO 000 word: LPF_CAPACITOR 00 word: LPF_RESISTOR 0001000 word: ICP_CURRENT 01001 word: FREQ_LOCK_ACCURACY 00 word: MFG_GMC_GAIN 000 word: MFG_GMC_TEST 1110 word: MFG1_TEST 000 word: MFG2_TEST 000 word: MFG_FORCE_VFILTER 0 word: MFG_ICP_TEST 0 word: MFG_EN_UP 0 word: MFG_FLOAT_ICP 0 word: MFG_GMC_PRESET 0 word: MFG_LF_PRESET 0 word: MFG_GMC_RESET 0 word: MFG_LF_RESET 0 word: MFG_LF_RESGRND 0 word: MFG_GMCREF_SEL 10 word: MFG_ENABLE_FILTEROPAMP 1 enum: MODE EHXPLLL enum: CLKOP_ENABLE ENABLED enum: CLKOS_ENABLE ENABLED enum: CLKOS2_ENABLE ENABLED enum: CLKOS3_ENABLE ENABLED enum: FEEDBK_PATH CLKOP enum: CLKOP_TRIM_POL RISING enum: CLKOP_TRIM_DELAY 0 enum: CLKOS_TRIM_POL RISING enum: CLKOS_TRIM_DELAY 0 enum: OUTDIVIDER_MUXA DIVA enum: OUTDIVIDER_MUXB DIVB enum: OUTDIVIDER_MUXC DIVC enum: OUTDIVIDER_MUXD DIVD enum: STDBY_ENABLE DISABLED enum: REFIN_RESET DISABLED enum: SYNC_ENABLE DISABLED enum: INT_LOCK_STICKY ENABLED enum: DPHASE_SOURCE DISABLED enum: PLLRST_ENA DISABLED enum: INTFB_WAKE DISABLED ================================================ FILE: src/hdmi_test_pattern/ulx3s_v20_segpdi.lpf ================================================ BLOCK RESETPATHS; BLOCK ASYNCPATHS; ## ULX3S v2.x.x and v3.0.x # The clock "usb" and "gpdi" sheet #ULX3S #LOCATE COMP "clk_25mhz" SITE "G2"; #i5-v6.0 LOCATE COMP "clk_25mhz" SITE "P3"; IOBUF PORT "clk_25mhz" PULLMODE=NONE IO_TYPE=LVCMOS33; FREQUENCY PORT "clk_25mhz" 25 MHZ; # JTAG and SPI FLASH voltage 3.3V and options to boot from SPI flash # write to FLASH possible any time from JTAG: SYSCONFIG CONFIG_IOVOLTAGE=3.3 COMPRESS_CONFIG=ON MCCLK_FREQ=62 SLAVE_SPI_PORT=DISABLE MASTER_SPI_PORT=ENABLE SLAVE_PARALLEL_PORT=DISABLE; # write to FLASH possible from user bitstream: # SYSCONFIG CONFIG_IOVOLTAGE=3.3 COMPRESS_CONFIG=ON MCCLK_FREQ=62 SLAVE_SPI_PORT=DISABLE MASTER_SPI_PORT=DISABLE SLAVE_PARALLEL_PORT=DISABLE; ## USBSERIAL FTDI-FPGA serial port "usb" sheet LOCATE COMP "ftdi_rxd" SITE "L4"; # FPGA transmits to ftdi LOCATE COMP "ftdi_txd" SITE "M1"; # FPGA receives from ftdi LOCATE COMP "ftdi_nrts" SITE "M3"; # FPGA receives LOCATE COMP "ftdi_ndtr" SITE "N1"; # FPGA receives LOCATE COMP "ftdi_txden" SITE "L3"; # FPGA receives IOBUF PORT "ftdi_rxd" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "ftdi_txd" PULLMODE=UP IO_TYPE=LVCMOS33; IOBUF PORT "ftdi_nrts" PULLMODE=UP IO_TYPE=LVCMOS33; IOBUF PORT "ftdi_ndtr" PULLMODE=UP IO_TYPE=LVCMOS33; IOBUF PORT "ftdi_txden" PULLMODE=UP IO_TYPE=LVCMOS33; ## LED indicators "blinkey" and "gpio" sheet #LOCATE COMP "led[7]" SITE "H3"; #LOCATE COMP "led[6]" SITE "E1"; #LOCATE COMP "led[5]" SITE "E2"; #LOCATE COMP "led[4]" SITE "D1"; #LOCATE COMP "led[3]" SITE "D2"; #LOCATE COMP "led[2]" SITE "C1"; #LOCATE COMP "led[1]" SITE "C2"; #LOCATE COMP "led[0]" SITE "B2"; #IOBUF PORT "led[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "led[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "led[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "led[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "led[4]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "led[5]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "led[6]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "led[7]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; ## Pushbuttons "blinkey", "flash", "power", "gpdi" sheet LOCATE COMP "btn[0]" SITE "D6"; # BTN_PWRn (inverted logic) LOCATE COMP "btn[1]" SITE "R1"; # FIRE1 LOCATE COMP "btn[2]" SITE "T1"; # FIRE2 LOCATE COMP "btn[3]" SITE "R18"; # UP W1->R18 LOCATE COMP "btn[4]" SITE "V1"; # DOWN LOCATE COMP "btn[5]" SITE "U1"; # LEFT LOCATE COMP "btn[6]" SITE "H16"; # RIGHT Y2->H16 IOBUF PORT "btn[0]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "btn[1]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "btn[2]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "btn[3]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "btn[4]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "btn[5]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "btn[6]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; ## DIP switch "blinkey", "gpio" sheet LOCATE COMP "sw[0]" SITE "E8"; # SW1 LOCATE COMP "sw[1]" SITE "D8"; # SW2 LOCATE COMP "sw[2]" SITE "D7"; # SW3 LOCATE COMP "sw[3]" SITE "E7"; # SW4 IOBUF PORT "sw[0]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sw[1]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sw[2]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sw[3]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; ## SPI OLED DISPLAY SSD1331 (Color) or SSD1306 (B/W) "blinkey", "usb" sheet LOCATE COMP "oled_clk" SITE "P4"; LOCATE COMP "oled_mosi" SITE "P3"; LOCATE COMP "oled_dc" SITE "P1"; LOCATE COMP "oled_resn" SITE "P2"; LOCATE COMP "oled_csn" SITE "N2"; IOBUF PORT "oled_clk" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "oled_mosi" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "oled_dc" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "oled_resn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "oled_csn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; ## SPI Flash chip "flash" sheet LOCATE COMP "flash_csn" SITE "R2"; LOCATE COMP "flash_clk" SITE "U3"; LOCATE COMP "flash_mosi" SITE "W2"; LOCATE COMP "flash_miso" SITE "V2"; LOCATE COMP "flash_holdn" SITE "W1"; LOCATE COMP "flash_wpn" SITE "Y2"; #LOCATE COMP "flash_csspin" SITE "AJ3"; #LOCATE COMP "flash_initn" SITE "AG4"; #LOCATE COMP "flash_done" SITE "AJ4"; #LOCATE COMP "flash_programn" SITE "AH4"; #LOCATE COMP "flash_cfg_select[0]" SITE "AM4"; #LOCATE COMP "flash_cfg_select[1]" SITE "AL4"; #LOCATE COMP "flash_cfg_select[2]" SITE "AK4"; IOBUF PORT "flash_csn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "flash_clk" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "flash_mosi" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "flash_miso" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "flash_holdn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "flash_wpn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "flash_csspin" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "flash_initn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "flash_done" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "flash_programn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "flash_cfg_select[0]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "flash_cfg_select[1]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "flash_cfg_select[2]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; ## SD card "sdcard", "usb" sheet LOCATE COMP "sd_clk" SITE "H2"; # sd_clk WiFi_GPIO14 LOCATE COMP "sd_cmd" SITE "J1"; # sd_cmd_di (MOSI) WiFi GPIO15 LOCATE COMP "sd_d[0]" SITE "J3"; # sd_dat0_do (MISO) WiFi GPIO2 LOCATE COMP "sd_d[1]" SITE "H1"; # sd_dat1_irq WiFi GPIO4 LOCATE COMP "sd_d[2]" SITE "K1"; # sd_dat2 WiFi_GPIO12 LOCATE COMP "sd_d[3]" SITE "K2"; # sd_dat3_csn WiFi_GPIO13 LOCATE COMP "sd_wp" SITE "P5"; # not connected LOCATE COMP "sd_cdn" SITE "N5"; # not connected IOBUF PORT "sd_clk" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sd_cmd" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sd_d[0]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sd_d[1]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sd_d[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; # WiFi GPIO12 pulldown bootstrapping requirement IOBUF PORT "sd_d[3]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sd_wp" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "sd_cdn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; ## ADC SPI (MAX11123) "analog", "ram" sheet LOCATE COMP "adc_csn" SITE "R17"; LOCATE COMP "adc_mosi" SITE "R16"; LOCATE COMP "adc_miso" SITE "U16"; LOCATE COMP "adc_sclk" SITE "P17"; IOBUF PORT "adc_csn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "adc_mosi" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "adc_miso" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "adc_sclk" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; ## Audio 4-bit DAC "analog", "gpio" sheet # 4-bit mode can drive down to 75 ohm load impedance. # Lower impedance leads to IO overload, # FPGA will stop working and need reboot. # For standard 17 ohm earphones on PCB v1.7: # use bits 2,3 as input (High-Z) and drive only bits 0,1. # PCB v2.1.2 can use full 4 bits and 16mA drive for 17 ohm earphones. #LOCATE COMP "audio_l[3]" SITE "B3"; # JACK TIP (left audio) #LOCATE COMP "audio_l[2]" SITE "C3"; #LOCATE COMP "audio_l[1]" SITE "D3"; #LOCATE COMP "audio_l[0]" SITE "E4"; #LOCATE COMP "audio_r[3]" SITE "C5"; # JACK RING1 (right audio) #LOCATE COMP "audio_r[2]" SITE "D5"; #LOCATE COMP "audio_r[1]" SITE "B5"; #LOCATE COMP "audio_r[0]" SITE "A3"; #LOCATE COMP "audio_v[3]" SITE "E5"; # JACK RING2 (video or digital audio) #LOCATE COMP "audio_v[2]" SITE "F5"; #LOCATE COMP "audio_v[1]" SITE "F2"; #LOCATE COMP "audio_v[0]" SITE "H5"; #IOBUF PORT "audio_l[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_l[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_l[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_l[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_r[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_r[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_r[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_r[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_v[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_v[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_v[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; #IOBUF PORT "audio_v[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; ## WiFi ESP-32 "wifi", "usb", "flash" sheet # other pins are shared with GP/GN, SD card and JTAG LOCATE COMP "wifi_en" SITE "F1"; # enable/reset WiFi LOCATE COMP "wifi_rxd" SITE "K3"; # FPGA transmits to WiFi LOCATE COMP "wifi_txd" SITE "K4"; # FPGA receives from WiFi LOCATE COMP "wifi_gpio0" SITE "L2"; LOCATE COMP "wifi_gpio5" SITE "N4"; # WIFI LED LOCATE COMP "wifi_gpio16" SITE "L1"; # Serial1 RX LOCATE COMP "wifi_gpio17" SITE "N3"; # Serial1 TX # LOCATE COMP "prog_done" SITE "Y3"; # not GPIO, always active IOBUF PORT "wifi_en" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "wifi_rxd" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "wifi_txd" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "wifi_gpio0" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "wifi_gpio16" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "wifi_gpio17" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; # IOBUF PORT "prog_done" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; ## PCB antenna 433 MHz (may be also used for FM) "usb" sheet LOCATE COMP "ant_433mhz" SITE "G1"; IOBUF PORT "ant_433mhz" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; ## Second USB port "US2" going directly into FPGA "usb", "ram" sheet LOCATE COMP "usb_fpga_dp" SITE "E16"; # single ended or differential input only LOCATE COMP "usb_fpga_dn" SITE "F16"; IOBUF PORT "usb_fpga_dp" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; IOBUF PORT "usb_fpga_dn" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; LOCATE COMP "usb_fpga_bd_dp" SITE "D15"; # differential bidirectional LOCATE COMP "usb_fpga_bd_dn" SITE "E15"; IOBUF PORT "usb_fpga_bd_dp" PULLMODE=NONE IO_TYPE=LVCMOS33D DRIVE=4; IOBUF PORT "usb_fpga_bd_dn" PULLMODE=NONE IO_TYPE=LVCMOS33D DRIVE=4; LOCATE COMP "usb_fpga_pu_dp" SITE "B12"; # pull up/down control LOCATE COMP "usb_fpga_pu_dn" SITE "C12"; IOBUF PORT "usb_fpga_pu_dp" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; IOBUF PORT "usb_fpga_pu_dn" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16; ## JTAG ESP-32 "usb" sheet # connected to FT231X and ESP-32 # commented out because those are dedicated pins, not directly useable as GPIO # but could be used by some vendor-specific JTAG bridging (boundary scan) module #LOCATE COMP "jtag_tdi" SITE "R5"; # FTDI_nRI FPGA receives #LOCATE COMP "jtag_tdo" SITE "V4"; # FTDI_nCTS FPGA transmits #LOCATE COMP "jtag_tck" SITE "T5"; # FTDI_nDSR FPGA receives #LOCATE COMP "jtag_tms" SITE "U5"; # FTDI_nDCD FPGA receives #IOBUF PORT "jtag_tdi" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "jtag_tdo" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "jtag_tck" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "jtag_tms" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; ## SDRAM "ram" sheet # GPDI differential interface (Video) "gpdi" sheet #LOCATE COMP "gpdi_dp[0]" SITE "A16"; # Blue + #LOCATE COMP "gpdi_dn[0]" SITE "B16"; # Blue - #LOCATE COMP "gpdi_dp[1]" SITE "A14"; # Green + #LOCATE COMP "gpdi_dn[1]" SITE "C14"; # Green - #LOCATE COMP "gpdi_dp[2]" SITE "A12"; # Red + #LOCATE COMP "gpdi_dn[2]" SITE "A13"; # Red - #LOCATE COMP "gpdi_dp[3]" SITE "A17"; # Clock + #LOCATE COMP "gpdi_dn[3]" SITE "B18"; # Clock - #i5-v6.0 HDMI LOCATE COMP "gpdi_dp[0]" SITE "G19"; # Blue + LOCATE COMP "gpdi_dn[0]" SITE "H20"; # Blue - LOCATE COMP "gpdi_dp[1]" SITE "E20"; # Green + LOCATE COMP "gpdi_dn[1]" SITE "F19"; # Green - LOCATE COMP "gpdi_dp[2]" SITE "C20"; # Red + LOCATE COMP "gpdi_dn[2]" SITE "D19"; # Red - LOCATE COMP "gpdi_dp[3]" SITE "J19"; # Clock + LOCATE COMP "gpdi_dn[3]" SITE "K19"; # Clock - #i5-v6.0 PMOD-HDMI-P3a #LOCATE COMP "gpdi_dp[0]" SITE "C2"; # Blue + #LOCATE COMP "gpdi_dn[0]" SITE "E3"; # Blue - #LOCATE COMP "gpdi_dp[1]" SITE "E2"; # Green + #LOCATE COMP "gpdi_dn[1]" SITE "D2"; # Green - #LOCATE COMP "gpdi_dp[2]" SITE "D1"; # Red + #LOCATE COMP "gpdi_dn[2]" SITE "C1"; # Red - #LOCATE COMP "gpdi_dp[3]" SITE "B1"; # Clock + #LOCATE COMP "gpdi_dn[3]" SITE "A3"; # Clock - #i5-v6.0 PMOD-HDMI-P3b #LOCATE COMP "gpdi_dp[0]" SITE "B20"; # Blue + #LOCATE COMP "gpdi_dn[0]" SITE "F20"; # Blue - #LOCATE COMP "gpdi_dp[1]" SITE "A18"; # Green + #LOCATE COMP "gpdi_dn[1]" SITE "A19"; # Green - #LOCATE COMP "gpdi_dp[2]" SITE "C17"; # Red + #LOCATE COMP "gpdi_dn[2]" SITE "B18"; # Red - #LOCATE COMP "gpdi_dp[3]" SITE "B19"; # Clock + #LOCATE COMP "gpdi_dn[3]" SITE "D20"; # Clock - #LOCATE COMP "gpdi_ethp" SITE "A19"; # Ethernet + #LOCATE COMP "gpdi_ethn" SITE "B20"; # Ethernet - #LOCATE COMP "gpdi_cec" SITE "A18"; #LOCATE COMP "gpdi_sda" SITE "B19"; # I2C shared with RTC #LOCATE COMP "gpdi_scl" SITE "E12"; # I2C shared with RTC C12->E12 IOBUF PORT "gpdi_dp[0]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dn[0]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dp[1]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dn[1]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dp[2]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dn[2]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dp[3]" IO_TYPE=LVCMOS33 DRIVE=4; IOBUF PORT "gpdi_dn[3]" IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gpdi_ethp" IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gpdi_ethn" IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gpdi_cec" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gpdi_sda" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gpdi_scl" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; # GPIO (default single-ended) "gpio", "ram", "gpdi" sheet # Pins enumerated gp[0-27], gn[0-27]. # With differential mode enabled on Lattice, # gp[] (+) are used, gn[] (-) are ignored from design # as they handle inverted signal by default. # To enable differential, rename LVCMOS33->LVCMOS33D #LOCATE COMP "gp[0]" SITE "B11"; # J1_5+ GP0 #LOCATE COMP "gn[0]" SITE "C11"; # J1_5- GN0 #LOCATE COMP "gp[1]" SITE "A10"; # J1_7+ GP1 #LOCATE COMP "gn[1]" SITE "A11"; # J1_7- GN1 #LOCATE COMP "gp[2]" SITE "A9"; # J1_9+ GP2 #LOCATE COMP "gn[2]" SITE "B10"; # J1_9- GN2 #LOCATE COMP "gp[3]" SITE "B9"; # J1_11+ GP3 #LOCATE COMP "gn[3]" SITE "C10"; # J1_11- GN3 #LOCATE COMP "gp[4]" SITE "A7"; # J1_13+ GP4 #LOCATE COMP "gn[4]" SITE "A8"; # J1_13- GN4 #LOCATE COMP "gp[5]" SITE "C8"; # J1_15+ GP5 #LOCATE COMP "gn[5]" SITE "B8"; # J1_15- GN5 #LOCATE COMP "gp[6]" SITE "C6"; # J1_17+ GP6 #LOCATE COMP "gn[6]" SITE "C7"; # J1_17- GN6 #IOBUF PORT "gp[0]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[0]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[1]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[1]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[2]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[2]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[3]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[3]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[4]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[4]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[5]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[5]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[6]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[6]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #LOCATE COMP "gp[7]" SITE "A6"; # J1_23+ GP7 #LOCATE COMP "gn[7]" SITE "B6"; # J1_23- GN7 #LOCATE COMP "gp[8]" SITE "A4"; # J1_25+ GP8 #LOCATE COMP "gn[8]" SITE "A5"; # J1_25- GN8 #LOCATE COMP "gp[9]" SITE "A2"; # J1_27+ GP9 #LOCATE COMP "gn[9]" SITE "B1"; # J1_27- GN9 #LOCATE COMP "gp[10]" SITE "C4"; # J1_29+ GP10 WIFI_GPIO27 #LOCATE COMP "gn[10]" SITE "B4"; # J1_29- GN10 #LOCATE COMP "gp[11]" SITE "F4"; # J1_31+ GP11 WIFI_GPIO25 #LOCATE COMP "gn[11]" SITE "E3"; # J1_31- GN11 WIFI_GPIO26 #LOCATE COMP "gp[12]" SITE "G3"; # J1_33+ GP12 WIFI_GPIO32 #LOCATE COMP "gn[12]" SITE "F3"; # J1_33- GN12 WIFI_GPIO33 #LOCATE COMP "gp[13]" SITE "H4"; # J1_35+ GP13 WIFI_GPIO34 #LOCATE COMP "gn[13]" SITE "G5"; # J1_35- GN13 WIFI_GPIO35 #IOBUF PORT "gp[7]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[7]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[8]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[8]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[9]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[9]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[10]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[10]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[11]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[11]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[12]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[12]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[13]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[13]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #LOCATE COMP "gp[14]" SITE "U18"; # J2_5+ GP14 #LOCATE COMP "gn[14]" SITE "U17"; # J2_5- GN14 #LOCATE COMP "gp[15]" SITE "N17"; # J2_7+ GP15 #LOCATE COMP "gn[15]" SITE "P16"; # J2_7- GN15 #LOCATE COMP "gp[16]" SITE "N16"; # J2_9+ GP16 #LOCATE COMP "gn[16]" SITE "M17"; # J2_9- GN16 #LOCATE COMP "gp[17]" SITE "L16"; # J2_11+ GP17 #LOCATE COMP "gn[17]" SITE "L17"; # J2_11- GN17 #LOCATE COMP "gp[18]" SITE "H18"; # J2_13+ GP18 #LOCATE COMP "gn[18]" SITE "H17"; # J2_13- GN18 #LOCATE COMP "gp[19]" SITE "F17"; # J2_15+ GP19 #LOCATE COMP "gn[19]" SITE "G18"; # J2_15- GN19 #LOCATE COMP "gp[20]" SITE "D18"; # J2_17+ GP20 #LOCATE COMP "gn[20]" SITE "E17"; # J2_17- GN20 #IOBUF PORT "gp[14]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[14]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[15]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[15]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[16]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[16]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[17]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[17]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[18]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[18]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[19]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[19]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[20]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[20]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #LOCATE COMP "gp[21]" SITE "C18"; # J2_23+ GP21 #LOCATE COMP "gn[21]" SITE "D17"; # J2_23- GN21 #LOCATE COMP "gp[22]" SITE "B15"; # J2_25+ GP22 D15->B15 #LOCATE COMP "gn[22]" SITE "C15"; # J2_25- GN22 E15->C15 #LOCATE COMP "gp[23]" SITE "B17"; # J2_27+ GP23 #LOCATE COMP "gn[23]" SITE "C17"; # J2_27- GN23 #LOCATE COMP "gp[24]" SITE "C16"; # J2_29+ GP24 #LOCATE COMP "gn[24]" SITE "D16"; # J2_29- GN24 #LOCATE COMP "gp[25]" SITE "D14"; # J2_31+ GP25 B15->D14 #LOCATE COMP "gn[25]" SITE "E14"; # J2_31- GN25 C15->E14 #LOCATE COMP "gp[26]" SITE "B13"; # J2_33+ GP26 #LOCATE COMP "gn[26]" SITE "C13"; # J2_33- GN26 #LOCATE COMP "gp[27]" SITE "D13"; # J2_35+ GP27 #LOCATE COMP "gn[27]" SITE "E13"; # J2_35- GN27 #IOBUF PORT "gp[21]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[21]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[22]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[22]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[23]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[23]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[24]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[24]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[25]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[25]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[26]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[26]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gp[27]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; #IOBUF PORT "gn[27]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; ## PROGRAMN (reload bitstream from FLASH, exit from bootloader) # PCB v2.0.5 and higher LOCATE COMP "user_programn" SITE "M4"; IOBUF PORT "user_programn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4; ## SHUTDOWN "power", "ram" sheet (connected from PCB v1.7.5) # on PCB v1.7 shutdown is not connected to FPGA LOCATE COMP "shutdown" SITE "G16"; # FPGA receives IOBUF PORT "shutdown" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4; ================================================ FILE: src/hdmi_test_pattern/vgatestsrc.v ================================================ //////////////////////////////////////////////////////////////////////////////// // // Filename: vgatestsrc.v // // Project: vgasim, a Verilator based VGA simulator demonstration // // Purpose: To create a series of colorbars, as a testing pattern. // // Creator: Dan Gisselquist, Ph.D. // Gisselquist Technology, LLC // //////////////////////////////////////////////////////////////////////////////// // // Copyright (C) 2017-2018, Gisselquist Technology, LLC // // This program is free software (firmware): you can redistribute it and/or // modify it under the terms of the GNU General Public License as published // by the Free Software Foundation, either version 3 of the License, or (at // your option) any later version. // // This program is distributed in the hope that it will be useful, but WITHOUT // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License // for more details. // // You should have received a copy of the GNU General Public License along // with this program. (It's in the $(ROOT)/doc directory. Run make with no // target there if the PDF file isn't present.) If not, see // for a copy. // // License: GPL, v3, as defined and found on www.gnu.org, // http://www.gnu.org/licenses/gpl.html // // //////////////////////////////////////////////////////////////////////////////// // // `default_nettype none // module vgatestsrc(i_pixclk, i_reset, // External connections i_width, i_height, i_rd, i_newline, i_newframe, // VGA connections o_pixel); parameter BITS_PER_COLOR = 4, HW=12, VW=12; //HW=13,VW=11; localparam BPC = BITS_PER_COLOR, BITS_PER_PIXEL = 3 * BPC, BPP = BITS_PER_PIXEL; // input wire i_pixclk, i_reset; input wire [HW-1:0] i_width; input wire [VW-1:0] i_height; // input wire i_rd, i_newline, i_newframe; // output reg [(BPP-1):0] o_pixel; wire [BPP-1:0] white, black, purplish_blue, purple, dark_gray, darkest_gray, mid_white, mid_cyan, mid_magenta, mid_red, mid_green, mid_blue, mid_yellow; wire [BPC-1:0] midv, mid_off; assign midv = { 2'b11, {(BPC-2){1'b0}} }; assign mid_off = { (BPC){1'b0} }; assign white = {(BPP){1'b1}}; assign black = {(BPP){1'b0}}; assign purplish_blue = { {(BPC){1'b0}}, 3'b001, {(BPC-3){1'b0}}, 2'b01, {(BPC-2){1'b0}} }; assign purple = { {2'b00, {(BPC-2){1'b1}} }, {(BPC){1'b0}}, { 1'b0, {(BPC-1){1'b1}} } }; assign dark_gray = {(3){ { 4'b0010, {(BPC-4){1'b0}} } }}; assign darkest_gray = {(3){ { 4'b0001, {(BPC-4){1'b0}} } }}; assign mid_white = { midv, midv, midv }; assign mid_yellow = { midv, midv, mid_off }; assign mid_red = { midv, mid_off, mid_off }; assign mid_green = { mid_off, midv, mid_off }; assign mid_blue = { mid_off, mid_off, midv }; assign mid_cyan = { mid_off, midv, midv }; assign mid_magenta = { midv, mid_off, midv }; reg [HW-1:0] hpos, hedge; reg [VW-1:0] ypos, yedge; reg [3:0] yline, hbar; // // // 1 Border // 8 BARS // 1 short bar // 3 fat bars // 1 border // 1 gradient bar // 1 border // reg dline; always @(posedge i_pixclk) if ((i_reset)||(i_newframe)||(i_newline)) dline <= 1'b0; else if (i_rd) dline <= 1'b1; always @(posedge i_pixclk) if ((i_reset)||(i_newframe)) begin ypos <= 0; yline <= 0; yedge <= { 4'h0, i_height[(VW-1):4] }; end else if (i_newline) begin ypos <= ypos + { {(VW-1){1'h0}}, dline }; if (ypos >= yedge) begin yline <= yline + 1'b1; yedge <= yedge + { 4'h0, i_height[(VW-1):4] }; end end initial hpos = 0; initial hbar = 0; initial hedge = 0; // { 4'h0, i_width[(HW-1):4] }; always @(posedge i_pixclk) if ((i_reset)||(i_newline)) begin hpos <= 0; hbar <= 0; hedge <= { 4'h0, i_width[(HW-1):4] }; end else if (i_rd) begin hpos <= hpos + 1'b1; if (hpos >= hedge) begin hbar <= hbar + 1'b1; hedge <= hedge + { 4'h0, i_width[(HW-1):4] }; end end reg [BPP-1:0] topbar, midbar, fatbar, gradient, pattern; always @(posedge i_pixclk) case(hbar[3:0]) 4'h0: topbar <= black; 4'h1: topbar <= mid_white; 4'h2: topbar <= mid_white; 4'h3: topbar <= mid_yellow; 4'h4: topbar <= mid_yellow; 4'h5: topbar <= mid_cyan; 4'h6: topbar <= mid_cyan; 4'h7: topbar <= mid_green; 4'h8: topbar <= mid_green; 4'h9: topbar <= mid_magenta; 4'ha: topbar <= mid_magenta; 4'hb: topbar <= mid_red; 4'hc: topbar <= mid_red; 4'hd: topbar <= mid_blue; 4'he: topbar <= mid_blue; 4'hf: topbar <= black; endcase always @(posedge i_pixclk) case(hbar[3:0]) 4'h0: midbar <= black; 4'h1: midbar <= mid_blue; 4'h2: midbar <= mid_blue; 4'h3: midbar <= black; 4'h4: midbar <= black; 4'h5: midbar <= mid_magenta; 4'h6: midbar <= mid_magenta; 4'h7: midbar <= black; 4'h8: midbar <= black; 4'h9: midbar <= mid_cyan; 4'ha: midbar <= mid_cyan; 4'hb: midbar <= black; 4'hc: midbar <= black; 4'hd: midbar <= mid_white; 4'he: midbar <= mid_white; 4'hf: midbar <= black; endcase always @(posedge i_pixclk) case(hbar[3:0]) 4'h0: fatbar <= black; 4'h1: fatbar <= purplish_blue; 4'h2: fatbar <= purplish_blue; 4'h3: fatbar <= purplish_blue; 4'h4: fatbar <= white; 4'h5: fatbar <= white; 4'h6: fatbar <= white; 4'h7: fatbar <= purple; 4'h8: fatbar <= purple; 4'h9: fatbar <= purple; 4'ha: fatbar <= darkest_gray; 4'hb: fatbar <= black; 4'hc: fatbar <= dark_gray; 4'hd: fatbar <= darkest_gray; 4'he: fatbar <= black; 4'hf: fatbar <= black; endcase reg [(HW-1):0] last_width; always @(posedge i_pixclk) last_width <= i_width; // Attempt to discover 1/i_width in h_step localparam FRACB=16; // reg [(FRACB-1):0] hfrac, h_step; always @(posedge i_pixclk) if ((i_reset)||(i_newline)) hfrac <= 0; else if (i_rd) hfrac <= hfrac + h_step; always @(posedge i_pixclk) if ((i_reset)||(i_width != last_width)) h_step <= 1; else if ((i_newline)&&(hfrac > 0)) begin if (hfrac < {(FRACB){1'b1}} - { {(FRACB-HW){1'b0}}, i_width }) h_step <= h_step + 1'b1; else if (hfrac < { {(FRACB-HW){1'b0}}, i_width }) h_step <= h_step - 1'b1; end always @(posedge i_pixclk) case(hfrac[FRACB-1:FRACB-4]) 4'h0: gradient <= black; // Red 4'h1: gradient <= { 1'b0, hfrac[(FRACB-5):(FRACB-3-BPC)], {(2){mid_off}} }; 4'h2: gradient <= { 1'b1, hfrac[(FRACB-5):(FRACB-3-BPC)], {(2){mid_off}} }; 4'h3: gradient <= black; // Green 4'h4: gradient <= { mid_off, 1'b0, hfrac[(FRACB-5):(FRACB-3-BPC)], mid_off }; 4'h5: gradient <= { mid_off, 1'b1, hfrac[(FRACB-5):(FRACB-3-BPC)], mid_off }; 4'h6: gradient <= black; // Blue 4'h7: gradient <= { {(2){mid_off}}, 1'b0, hfrac[(FRACB-5):(FRACB-3-BPC)] }; 4'h8: gradient <= { {(2){mid_off}}, 1'b1, hfrac[(FRACB-5):(FRACB-3-BPC)] }; 4'h9: gradient <= black; // Gray 4'ha: gradient <= {(3){ 2'b00, hfrac[(FRACB-5):(FRACB-2-BPC)] }}; 4'hb: gradient <= {(3){ 2'b01, hfrac[(FRACB-5):(FRACB-2-BPC)] }}; 4'hc: gradient <= {(3){ 2'b10, hfrac[(FRACB-5):(FRACB-2-BPC)] }}; 4'hd: gradient <= {(3){ 2'b11, hfrac[(FRACB-5):(FRACB-2-BPC)] }}; 4'he: gradient <= black; // 4'hf: gradient <= black; endcase always @(posedge i_pixclk) case(yline) 4'h0: pattern <= black; 4'h1: pattern <= topbar; // 4'h2: pattern <= topbar; 4'h3: pattern <= topbar; 4'h4: pattern <= topbar; 4'h5: pattern <= topbar; 4'h6: pattern <= topbar; 4'h7: pattern <= topbar; 4'h8: pattern <= topbar; 4'h9: pattern <= midbar; // 4'ha: pattern <= fatbar; // 4'hb: pattern <= fatbar; 4'hc: pattern <= fatbar; 4'hd: pattern <= black; 4'he: pattern <= gradient; 4'hf: pattern <= black; endcase always @(posedge i_pixclk) if (i_newline) o_pixel <= white; else if (i_rd) begin if (hpos == i_width-12'd3) o_pixel <= white; else if ((ypos == 0)||(ypos == i_height-1)) o_pixel <= white; else o_pixel <= pattern; end endmodule ================================================ FILE: src/hdmi_test_pattern/ysgen.sh ================================================ #!/bin/sh # first file is toplevel file for file in $* do echo "read_verilog ${file}" done ================================================ FILE: src/litex_linux/README.md ================================================ # source code https://github.com/litex-hub/linux-on-litex-vexriscv.git # how to build just pick a ECP5 type board and generate the verilog source files, enter the build directory and do some little modify of the Makefile and lpf file this project is borrowed from ULX3S board in linux-on-litex-vexriscv ================================================ FILE: src/litex_linux/build_top.sh ================================================ # Autogenerated by LiteX / git: 275932f5 set -e yosys -l top.rpt top.ys nextpnr-ecp5 --json top.json --lpf top_bg256.lpf --textcfg top.config --25k --package CABGA256 --speed 6 --timing-allow-fail --seed 1 ecppack top.config --svf top.svf --bit top.bit --bootaddr 0 ================================================ FILE: src/litex_linux/mem.init ================================================ b00006f 13 13 13 13 13 13 13 fe112e23 fe512c23 fe612a23 fe712823 fea12623 feb12423 fec12223 fed12023 fce12e23 fcf12c23 fd012a23 fd112823 fdc12623 fdd12423 fde12223 fdf12023 fc010113 c4000ef 3c12083 3812283 3412303 3012383 2c12503 2812583 2412603 2012683 1c12703 1812783 1412803 1012883 c12e03 812e83 412f03 12f83 4010113 30200073 10002117 f4c10113 517 f6850513 30551073 10000517 f3c50513 10000597 2c58593 8617 b8860613 b50c63 62683 d52023 450513 460613 fedff06f 10000517 450513 10000597 34458593 b50863 52023 450513 ff5ff06f 1537 88050513 30451073 7bc010ef 6f fc002773 bc0027f3 e7f7b3 17f793 78463 47d0406f 8067 68067 fe010113 812c23 50413 6537 912a23 2b050513 58493 68593 112e23 c12623 d12423 295040ef 6537 2d850513 289040ef 639040ef 793 bc079073 30047073 100f 13 13 13 13 13 500f 2c5040ef 812683 c12603 48593 40513 f81ff0ef 6f d9010113 27212023 6937 26912223 25412c23 50493 58a13 100613 2d490593 2410513 26112623 26812423 25312e23 449020ef 2051e63 100613 48593 410513 4b9020ef 50413 2050663 6537 48593 30c50513 1dd040ef 613 2d490593 513 40d020ef 513 ac0006f 90993 1012903 6537 a0613 90693 48593 32050513 1a5040ef 90513 679040ef 10693 8637 8a05b3 410513 53d020ef 2050263 6537 34450513 179040ef 410513 729020ef 613 2d498593 f95ff06f 12783 78a63 f40433 40513 51d040ef fb5ff06f 40513 511040ef 8537 b7050513 139040ef 410513 6e9020ef 613 2d498593 513 361020ef 100513 26c12083 26812403 26412483 26012903 25c12983 25812a03 27010113 8067 50793 452503 fd010113 2812623 3312023 2912423 3212223 1412e23 1512c23 1612a23 1712823 1812623 1912423 1a12223 1b12023 2c00e93 fff00813 100f13 2000f93 3a00293 5d00393 7d00413 900993 7a883 c8f863 1158333 34303 4031c63 68e63 47a783 fff78713 479793 f686b3 fff00793 40075c63 2c12403 2812483 2412903 2012983 1c12a03 1812a83 1412b03 1012b83 c12c03 812c83 412d03 12d83 3010113 8067 2fd30263 66eea63 d00e13 fc30263 6e6c63 ff730313 ff37313 c6f7a63 d00493 3400006f df30463 2200e13 ffc318e3 188a13 147a023 2200a93 5c00b13 6600b93 7200c13 6e00d13 2f00c93 6200d93 7ae03 ce7863 1c58333 34303 12031c63 117a023 ffd00513 f55ff06f 8730a63 863e263 24530a63 5b00e13 f9c31ce3 150513 6068063 47a903 10e97e63 190e13 1c7a223 87a483 491e13 1c68e33 10e2423 10e2223 e2623 1048c63 449493 9684b3 c4aa03 1a0a13 144a623 7b00a13 100493 1430463 200493 9e2023 11e2223 127a423 7a883 188893 117a023 e9dff06f 7b00e13 f9c304e3 f0831ce3 fe0682e3 100913 830463 200913 47ae03 fffe0313 4e1e13 1c68e33 35863 fd0310e3 ffe00513 e91ff06f ff4e2a03 ff0e0493 50a0063 ff8e2e03 30e1c63 4ae03 ff2e10e3 188893 107a423 114a423 431893 11688b3 48ae03 30e0063 88ae03 10e1c63 67a423 f71ff06f fff30313 48e13 fa1ff06f fff30313 ff088893 fd031ae3 f55ff06f 7531463 2068e63 47a303 e36863 117a023 fff00513 e11ff06f 130893 117a223 431893 11688b3 300313 68a023 148a223 1c8a423 8a623 87a883 150513 f10884e3 f00682e3 489893 11688b3 c8a303 130313 68a623 eedff06f 3631663 1e0313 2c37263 67a023 658333 34303 1730a63 26be863 1930663 6cec63 1531e63 7a303 130313 67a023 e19ff06f ff6308e3 ffb306e3 117a023 ee5ff06f ff8300e3 6c6663 ffa318e3 fd5ff06f 7400493 fc9306e3 7500493 fc931ee3 2e0e13 1c7a023 400493 7ae03 4ce7063 1c58333 34303 2030a63 fd030913 ff97913 129fc63 fdf37313 fbf30313 ff37313 500913 f8696ee3 1e0e13 1c7a023 fff48493 fc0490e3 7a303 fff30313 67a023 f65ff06f 47a883 fff88893 117a423 e11ff06f e00686e3 87a883 e10882e3 489893 11688b3 8a883 fff88893 df1f78e3 47a883 fff88313 489893 11688b3 dc034ee3 ff08ae03 fffe0e13 1cf6a63 ff48ae03 10e0663 ff88ae03 e50e06e3 fff30313 ff088893 fd9ff06f 4530863 462ee63 5d30463 fe030313 ff37313 5e00913 ee696ae3 1e0e13 1c7a023 7ae03 2ce7463 1c58333 34303 30e63 1f30c63 fc6fe2e3 fd3366e3 a00913 697463 fc9310e3 69e63 fffe0e13 1c7a023 e45ff06f fe7308e3 fa8314e3 fe9ff06f 47a303 e0e370e3 130493 431313 97a223 668333 400493 932023 1132223 1c32423 32623 fbdff06f ff46a603 f60663 ff86a603 c8f604e3 fff70713 ff068693 bd1ff06f 81010113 7f212023 7e112623 7e812423 7e912223 7d312e23 7d412c23 7d512a23 7d612823 7d712623 7d812423 7d912223 7da12023 7bb12e23 6937 f0010113 100613 2d490593 28410513 630020ef 4051e63 17b7 1010713 fffff437 8a078793 e787b3 77440493 9784b3 6a37 100613 358a0593 48513 680020ef 50993 6050263 6537 358a0593 30c50513 3a4040ef 613 2d490593 513 5d4020ef 10010113 7ec12083 7e812403 7e412483 7e012903 7dc12983 7d812a03 7d412a83 7d012b03 7cc12b83 7c812c03 7c412c83 7c012d03 7bc12d83 7f010113 8067 1a37 1010713 8a0a0793 e787b3 76440693 d786b3 40000613 4b010593 48513 6e0020ef 48513 dd020ef 2d490593 613 513 554020ef fff00793 4b010513 2f12023 12c23 12e23 748030ef 8a0a0793 1010613 c787b3 7d440693 d786b3 50613 8a0a0793 1010513 a787b3 76840413 878533 2000713 4b010593 9cdff0ef ff57513 a0493 fff50793 f12623 48793 fffffb37 8a048713 1010693 8a078793 794b0413 d70733 7b4b0493 d787b3 c93 c13 b93 a93 a13 913 870433 9784b3 6db7 c12783 f94e63 ec0a08e3 98693 c8613 c0593 b8513 f8cff0ef 2000613 593 40513 77c030ef 2000613 593 48513 76c030ef 491793 8b010713 f70d33 7d4d2683 300713 190913 8e69c63 7e0d2683 100713 8e69663 7d8d2583 7dcd2603 4b010793 40513 40b60633 b785b3 744030ef 8b010793 491713 e78733 7d872583 7dc72603 4b010793 48513 40b60633 b785b3 71c030ef 67b7 800613 36478593 40513 548030ef 2050863 400613 370d8593 40513 534030ef 2051263 613 593 48513 11030ef 50993 100a93 ff97913 f0dff06f 65b7 200613 37858593 40513 4fc030ef 2051c63 7d8d2583 7dcd2603 4b010793 40513 40b60633 b785b3 69c030ef 613 593 48513 7bc030ef 50b93 fb1ff06f 65b7 200613 37c58593 40513 4b0030ef 51e63 613 593 48513 78c030ef 50c13 f81ff06f 65b7 200613 38058593 40513 480030ef 613 593 51a63 48513 75c030ef 50c93 f51ff06f 48513 74c030ef 50593 40513 e78ff0ef d20500e3 a8a13 f20a98e3 613 593 48513 724030ef 50993 100a13 f15ff06f fff00793 52023 52223 f52423 8067 6537 eb010113 38450513 14112623 14812423 14912223 15212023 13312e23 13412c23 13512a23 13612823 13712623 13812423 40040ef 6537 6437 39c50513 29040493 2c040ef 29040413 4c503 8051e63 f00027b7 8207a023 8007a823 8007aa23 8007ac23 8007ae23 8007a023 be00713 80e7a223 c737 ebc70713 80e7a423 bec737 c2070713 80e7a623 100713 82e7a023 82e7a223 b13 f0002ab7 5100493 1b00913 e00993 100a13 828aa783 82caa703 879793 e7e7b3 830aa703 879793 e7e7b3 834aa703 879793 e7e7b3 79e63 6537 3f050513 e00006f 274040ef 148493 f59ff06f 24c040ef c050e63 1f0040ef 22950063 21250e63 16407b3 107c783 aa79e63 1b0b13 b3b1e63 64b7 a93 300993 100913 500413 27848493 f0000a37 1b4040ef a10e23 1ac040ef a10ea3 1a4040ef a10f23 1c10b93 198040ef a10fa3 b8c13 b13 1c14583 1c0c13 6bb4863 1f14783 f378063 1e14783 1d14703 158593 879793 e7e7b3 879b13 87d793 fb67b3 1079b13 1f10513 10b5b13 335030ef 5650c63 194040ef 2051e63 1a8a93 28a9e63 6537 3c850513 6a9030ef 580006f f8650513 153b13 834aa223 ed9ff06f 110040ef ac01a3 1b0b13 f7dff06f 100040ef fbdff06f 4300513 164040ef f3dff06f 1f14783 10f46663 279793 9787b3 7a783 78067 4b00513 140040ef 100513 14c12083 14812403 14412483 14012903 13c12983 13812a03 13412a83 13012b03 12c12b83 12812c03 15010113 8067 2014783 2114703 1879793 1071713 e7e7b3 2314703 e7e7b3 2214703 871713 e7e7b3 ffc78793 400713 1c14683 e78633 1b8b93 d74c63 1f14783 a93 4b00513 e9279ce3 f55ff06f 7bc683 170713 d60023 fd1ff06f 2014683 2114783 4b00513 1869693 1079793 f6e6b3 2314783 f6e6b3 2214783 879793 f6e6b3 d12623 74040ef c12683 613 593 513 ab0ff0ef 4b00513 58040ef 12a2023 e2dff06f 1a8a93 ea8a84e3 5500513 eddff06f 6537 3fc50513 545030ef 513 ef5ff06f 6537 ff010113 40850513 112623 529030ef 6537 42c50513 51d030ef 8ddff0ef 6537 44850513 50d030ef 6537 400005b7 46450513 ac0ff0ef 50c63 400006b7 613 593 513 a24ff0ef c12083 6537 47050513 1010113 4d10306f fd010113 3212023 50913 6537 48850513 2912223 1412c23 1512a23 1612823 1712623 1812423 2112623 2812423 1312e23 1912223 58493 60a13 6b37 405030ef 6ab7 6bb7 6c37 4904063 2812403 2c12083 2412483 2012903 1c12983 1812a03 1412a83 1012b03 c12b83 812c03 412c83 8537 b7050513 3010113 4390306f 1000793 48413 97d463 1000413 6537 a0593 49850513 419030ef 993 6cb7 13907b3 7c583 4a4c8513 198993 3fd030ef ff3416e3 40993 1000c93 5999a63 4a0a8513 3e5030ef 993 5e00c93 13907b3 7c583 fe058793 ff7f793 4fcf063 4b0c0513 3c1030ef 198993 ff3410e3 40993 1000c93 3999863 890933 408484b3 8a0a33 f29ff06f 4acb0513 395030ef 198993 fa1ff06f 4b4b8513 385030ef fc5ff06f 4a0a8513 379030ef 198993 fc5ff06f ff010113 85b7 812423 793 d545a403 d5458593 40f585b3 513 112623 5030ef 2a41063 40593 812403 c12083 6537 4b850513 1010113 3290306f 50613 6537 40593 4d450513 315030ef 812403 c12083 6537 50050513 1010113 2fd0306f 60793 2060713 7a023 478793 fef71ce3 a5a023 2000713 54783 4e78e63 79663 513 8067 150513 fe9ff06f 178793 2c0006f 78023 68513 178793 7c683 fee68ce3 2068e63 150693 251513 a60533 f52023 7c583 fce58ae3 fc0594e3 68513 8067 150793 50023 2000713 513 fc1ff06f 8067 fd010113 2812423 2912223 8437 84b7 3212023 1312e23 2112623 50913 58993 c2040413 c5c48493 941663 513 380006f 42783 90513 c12623 47a583 589020ef c12603 2051c63 42783 98513 60593 7a783 780e7 42503 2c12083 2812403 2412483 2012903 1c12983 3010113 8067 440413 fa1ff06f 500f 8067 fe010113 6537 1212823 1312623 53850513 8937 69b7 912a23 1412423 1512223 1612023 112e23 812c23 493 d1030ef 8a37 c5c90913 6ab7 53498993 8b37 713 c20a0413 300006f 42783 c7a683 2969063 87a603 47a583 61463 98613 55ca8513 14d030ef 100713 440413 fd241ae3 70663 b70b0513 135030ef 148493 900793 faf498e3 1c12083 1812403 1412483 1012903 c12983 812a03 412a83 12b03 2010113 8067 ef010113 10513 10112623 281030ef 14783 10593 79663 65b7 53458593 6537 56850513 d1030ef 10c12083 11010113 8067 fe010113 112e23 812c23 2a04063 6537 57450513 a9030ef 1c12083 1812403 2010113 8067 58793 7a503 613 c10593 711020ef c12783 50413 7c783 78863 6537 58450513 fc1ff06f 50593 6537 59450513 59030ef ff47413 f00047b7 8087a023 fa5ff06f fe010113 112e23 812c23 912a23 100793 2a7c263 6537 5ac50513 25030ef 1c12083 1812403 1412483 2010113 8067 58413 42503 613 c10593 689020ef c12783 50493 7c783 78863 6537 5c450513 fbdff06f 442503 c10593 613 65d020ef c12783 50593 7c783 78863 6537 5d850513 f91ff06f 48513 468030ef 50593 6537 5ec50513 79c030ef f79ff06f fd010113 2112623 2812423 2912223 3212023 1312e23 100793 2a7c663 6537 6cc50513 76c030ef 2c12083 2812403 2412483 2012903 1c12983 3010113 8067 58413 50493 42503 613 c10593 5c5020ef c12783 50913 7c783 78863 6537 5c450513 fb1ff06f 442503 613 c10593 599020ef c12783 50993 7c783 78863 6537 58450513 f85ff06f 200793 100513 2f48663 842503 613 c10593 561020ef c12783 7c783 78863 6537 6f050513 f51ff06f 793 279713 1270733 f4f502e3 1372023 178793 fedff06f fd010113 2112623 2812423 2912223 3212023 1312e23 100793 2a7c663 6537 70050513 674030ef 2c12083 2812403 2412483 2012903 1c12983 3010113 8067 58413 50493 42503 613 c10593 4cd020ef c12783 50993 7c783 78863 6537 72050513 fb1ff06f 442503 613 c10593 4a1020ef c12783 50913 7c783 78863 6537 74050513 f85ff06f 200793 100513 2f48663 842503 613 c10593 469020ef c12783 7c783 78863 6537 6f050513 f51ff06f 793 279713 e986b3 e90733 f4f500e3 72703 178793 e6a023 fe5ff06f fe010113 112e23 812c23 912a23 1212823 2a04463 6537 75c50513 57c030ef 1c12083 1812403 1412483 1012903 2010113 8067 58413 50493 42503 613 c10593 3d9020ef c12783 50913 7c783 78863 6537 5c450513 fb5ff06f 100793 2f48863 442503 c10593 613 3a5020ef c12783 50593 7c783 78a63 6537 77850513 f81ff06f 400593 90613 90513 821ff0ef f71ff06f fe010113 112e23 812c23 912a23 1212823 2a04463 6537 78c50513 4c4030ef 1c12083 1812403 1412483 1012903 2010113 8067 58413 50493 42503 613 c10593 321020ef c12783 50913 7c783 78863 6537 5c450513 fb5ff06f 100793 2f48863 442503 c10593 613 2ed020ef c12783 50593 7c783 78a63 6537 7a850513 f81ff06f fff00593 90513 789030ef f75ff06f fd010113 2112623 2812423 2912223 3212023 1312e23 2a04663 6537 7b850513 40c030ef 2c12083 2812403 2412483 2012903 1c12983 3010113 8067 58413 50493 42503 613 c10593 265020ef c12783 50913 7c783 78863 6537 5c450513 fb1ff06f 442503 613 c10593 239020ef c12783 50993 7c783 78863 6537 7a850513 f85ff06f 200793 613 297d663 842503 c10593 205020ef c12783 a03633 7c783 78863 6537 7e050513 f51ff06f 98593 90513 4c5030ef f45ff06f f00007b7 100713 e7a023 8067 1005b7 40000537 6810306f f6010113 8112e23 8812c23 8912a23 9212823 9312623 793 bc079073 30046073 8437 670030ef b7040513 2fc030ef 7537 90850513 2f0030ef 7537 93050513 2e4030ef 7537 95850513 2d8030ef 7537 97c50513 2cc030ef 7537 9a050513 2c0030ef b7040513 2b8030ef 7537 9cc50513 2ac030ef 7537 9f450513 2a0030ef b7040513 298030ef 7537 a1850513 28c030ef f1cff0ef b7040513 280030ef 7537 a4050513 274030ef 7537 a5c50513 268030ef b7040513 260030ef 7537 a7850513 254030ef 75b7 7537 3200613 aac58593 abc50513 23c030ef 75b7 7537 400693 2000613 ad858593 ae450513 220030ef 7537 800593 b0850513 210030ef 7537 4000593 b2450513 200030ef 7537 800593 b3c50513 1f0030ef 7537 800593 b5450513 1e0030ef 268000ef a12623 268000ef f46b7 24068693 2d546b3 c12603 7537 85b7 b6850513 1b4030ef 250000ef 50593 7537 b9050513 1a0030ef 244000ef fff00793 f50c63 238000ef 50593 7537 b9850513 180030ef 7537 ba050513 174030ef b7040513 16c030ef 7537 ba450513 160030ef 294000ef 100793 50493 f50863 7537 bd850513 144030ef b7040513 13c030ef 2048863 7537 bf850513 12c030ef 8b4ff0ef 50a63 be8ff0ef 7537 c2c50513 114030ef b7040513 10c030ef 7537 c4450513 100030ef 7937 74b7 c7890593 c8c48513 ec030ef 79b7 4000593 4010513 50000ef 4014783 2078c63 b7040513 cc030ef 2010613 1c10593 4010513 dc4ff0ef 50593 1c12503 2010613 e48ff0ef 51663 c9098513 a0030ef c7890593 c8c48513 94030ef fadff06f fc010113 2812c23 2912a23 3212823 3312623 3412423 3512223 3612023 1712e23 1812c23 2112e23 50913 106a3 413 100004b7 a00993 7a37 d00a93 7f00b13 700b93 800c13 6f1020ef f84c783 a10623 fea78ae3 e048c23 9350a63 2a9e463 ff7502e3 3850463 c10513 791020ef c14703 8907b3 140413 e78023 fc5ff06f 1550e63 ff6510e3 fa040ce3 ca4a0513 fff40413 765020ef fa9ff06f f348c23 890433 8537 40023 b7050513 749020ef 3c12083 3812403 3412483 3012903 2c12983 2812a03 2412a83 2012b03 1c12b83 1812c03 513 4010113 8067 d00793 ef48c23 fb1ff06f 13 fff50513 fe051ce3 8067 1000513 8067 2faf537 8050513 8067 200513 8067 200513 8067 f0003737 72783 e00693 ff7f793 d78a63 7537 d72023 ca850513 7310206f 8067 f0003737 72783 100693 ff7f793 d78a63 7537 d72023 cd050513 7090206f 8067 1059713 1075713 f00037b7 875713 1059593 e7a623 105d593 b7a823 a7aa23 f00713 e7a223 100713 e7a423 8067 7537 fe010113 400005b7 cf850513 112e23 812c23 912a23 f0003437 1212823 1312623 1412423 1512223 699020ef f45ff0ef 42623 42823 e00793 42a23 5537 f42023 e2050513 400a93 eedff0ef 40000a13 1542623 1442823 42a23 b00993 1342223 100493 942423 942623 12000793 f42823 42a23 f00913 1242223 c800513 942423 ea9ff0ef 1542623 1442823 42a23 1342223 942423 42623 42823 42a23 d00993 1342223 400513 942423 e75ff0ef 42623 42823 42a23 1342223 400513 942423 e59ff0ef 2000793 42623 f42823 42a23 1242223 c800513 942423 e39ff0ef e91ff0ef 2005b7 40000537 fd030ef 50c63 40000537 613 2005b7 70c030ef 100513 1c12083 1812403 1412483 1012903 c12983 812a03 412a83 2010113 8067 354783 254703 879793 e7e7b3 154703 879793 54503 f767b3 879793 f56533 8067 50793 c50633 178793 158593 fff7c503 fff5c703 40e50533 c78463 fe0504e3 8067 1052703 ffe58593 ffe70713 e5fc63 a55783 2452503 2b787b3 a78533 8067 513 8067 52783 2078463 78713 1f00593 3a00613 170713 fff74683 2d5f663 fec69ae3 278693 d70663 fff00793 1c0006f 7c603 3000693 fff00793 d61663 e52023 793 78513 8067 2051863 793 900513 f5a023 8067 900513 793 1c12083 1812403 f5a023 2010113 8067 52783 fe010113 812c23 112e23 50413 fc0788e3 7c703 fc0704e3 455683 67d703 fae69ee3 17c503 b12623 55d010ef 157513 c12583 fa0512e3 42783 fa5ff06f 1b5c783 1a5c703 879793 e7e7b3 300713 e51e63 155c703 145c683 871713 d76733 1071713 e7e7b3 78513 8067 2852783 4b78a63 ff010113 812423 912223 112623 50413 58493 58613 2c50593 154503 100693 53d010ef 50663 100513 fff00493 2942423 c12083 812403 412483 1010113 8067 513 8067 ff010113 812423 912223 112623 fff00793 501a3 2f52423 50413 f81ff0ef 400493 6051e63 22b44783 22a44703 300493 879793 e7e7b3 1079793 ffffb737 4107d793 a5570713 4e79a63 2c44783 eb00713 50493 e78a63 1878793 ff7f793 100713 4f76663 75b7 300613 da858593 6240513 dc1ff0ef 50e63 75b7 500613 dac58593 7e40513 da9ff0ef 51e63 c12083 812403 48513 412483 1010113 8067 200493 fe5ff06f 100793 14b7f263 1052703 fe010113 812c23 112e23 912a23 1212823 1312623 50413 4e5f063 54703 200693 58493 ad70463 300693 cd70c63 2f71263 15d913 1c52783 b90933 995593 f585b3 e81ff0ef 2050463 fff00793 1c12083 1812403 1412483 1012903 c12983 78513 2010113 8067 1c42783 190993 99d593 1ff97913 1240933 f585b3 40513 2c94903 e35ff0ef fa051ce3 1ff9f993 1340433 2c44783 14f493 879793 127e7b3 48663 47d793 f99ff06f 1479793 147d793 f8dff06f 1c52783 85d593 f585b3 df1ff0ef f6051ae3 149493 2c40413 1fe4f493 940433 144783 44703 879793 e7e7b3 f55ff06f 1c52783 75d593 f585b3 db9ff0ef f2051ee3 249513 2c40413 1fc57513 a40533 c19ff0ef 451793 f89ff06f 100793 78513 8067 fe010113 1212823 1052903 812c23 912a23 112e23 1312623 2090913 2007b7 50413 52483 f96463 52c23 1842703 400513 2070863 1ff97993 8099a63 1442583 170713 e42c23 2059a63 84d703 595793 6e7ec63 42c23 400513 1c12083 1812403 1412483 1012903 c12983 2010113 8067 a4d783 995713 fff78793 e7f7b3 4079063 48513 e0dff0ef 50593 100713 200513 fab77ee3 fff00713 100513 fae588e3 104a783 faf5f0e3 b42a23 48513 b85ff0ef a42c23 2c48493 13484b3 1242823 942e23 513 f81ff06f fc010113 2112e23 2812c23 2912a23 3212823 3312623 3412423 3512223 3612023 5a023 b12623 b65ff0ef b00793 4054863 10000737 251793 10070713 e787b3 7a403 50493 c00793 2040863 c12583 85a023 44783 4079663 ff4f513 40023 a400a3 149010ef 157513 300793 4050463 3c12083 3812403 3412483 3012903 2c12983 2812a03 2412a83 2012b03 78513 4010113 8067 144503 f1010ef 157513 793 fa0514e3 fc1ff06f 593 40513 c29ff0ef 200793 6f51263 1010493 1f240913 23240a13 48993 90513 a21ff0ef a9a023 1090913 498993 ff2a16e3 1048913 100993 4a583 300513 58863 40513 bddff0ef 2a9fa63 448493 fe9912e3 400713 100793 e51c63 f4dff06f 400713 100793 f4e500e3 a7f663 d00793 f35ff06f 3844783 3744703 879793 e7e7b3 1079793 4107d793 20000713 fce79ee3 4344903 4244783 891913 f96933 91863 5040513 985ff0ef 50913 3c44483 1242a23 100713 fff48793 940123 ff7f793 2842a83 f8f76ee3 3944983 1099793 107d793 f41523 f80784e3 fff98793 137f7b3 f6079ee3 3e44783 3d44a03 879793 147e7b3 1079a13 410a5a13 10a1b13 10b5b13 1641423 fb7793 f40798e3 4044503 3f44783 851513 f56533 51663 4c40513 8f9ff0ef 3b44783 3a44703 879793 e7e7b3 f20780e3 32486b3 4b5713 f70733 d70733 f0e566e3 40e50533 33554b3 f13560e3 10000637 ff560613 ee966ae3 10637 ff560613 c967663 300993 ea8733 248493 fa87b3 2e42223 942823 1542c23 f42e23 300713 6e99a63 5744783 5644703 879793 e7e7b3 fa67b3 1079793 4107d793 ea0790e3 5840513 85dff0ef 2a42023 249493 1ff48493 94d493 e89962e3 10000737 fc75783 1340023 178793 1079793 107d793 ef71e23 f41323 100007b7 13078793 f42623 793 d89ff06f e40b06e3 f687b3 2f42023 200793 f99663 149493 fa9ff06f 2e48733 14f493 175713 9704b3 f95ff06f 19b7 ff598993 99b9b3 198993 f2dff06f fe010113 1212823 852903 812c23 912a23 112e23 1312623 1412423 52823 50493 52403 6091663 44703 200793 e7f663 2042783 4079a63 845783 2079463 200513 1c12083 1812403 1412483 1012903 c12983 812a03 2010113 8067 2042783 f4ac23 184a783 124aa23 fc0786e3 2c40413 84ae23 513 fc1ff06f 78913 a45783 fff00993 100a13 2079463 4a503 90593 9c9ff0ef 50913 3350463 f8aa78e3 1042783 fef562e3 f85ff06f 90593 40513 f4cff0ef a4ac23 f9dff06f 100513 f6dff06f fb010113 3712623 52b83 4812423 3412c23 4112623 4912223 5212023 3312e23 3512a23 3612823 3812423 3912223 3a12023 1b12e23 50413 58a13 2f00693 5c00713 a4783 8d78063 6e78e63 42423 a4703 1f00793 6e7fa63 10b37 7ab7 fffb0793 d18a8a93 f12023 42783 993 1f00493 c7ab03 2f00913 5c00c13 7f00d13 7db7 ff00c93 1a0a13 fffa4503 1c050663 1b500593 ac010ef 6050e63 1aa4fe63 1b250663 1b850463 aad6863 db4d8793 580006f 1a0a13 f79ff06f f8000793 2f405a3 40513 4812403 4c12083 4412483 4012903 3c12983 3812a03 3412a83 3012b03 2c12b83 2812c03 2412c83 2012d03 1c12d83 5010113 dfdff06f 178793 7c703 4070663 fee51ae3 600c93 4c12083 4812403 c8513 4412483 4012903 3c12983 3812a03 3412a83 3012b03 2c12b83 2812c03 2412c83 2012d03 1c12d83 5010113 8067 fb998ee3 199793 fb07b3 a79023 198993 f19ff06f 1a0a13 a4783 fec78ce3 fee78ae3 493 2000613 2e00593 199793 c099863 fb07b3 79023 f6098ce3 793 2000613 179713 eb0733 75703 178593 cc70063 79663 2e00613 c71463 34e493 2e00613 199713 eb0733 ffe75703 c70663 fff98993 fe0996e3 2040c13 2b40613 c0713 2000593 170713 feb70fa3 fec71ce3 800d93 d13 913 2000813 2e00893 b00c93 7337 178713 179793 fb07b3 7d503 6050663 1050663 5151463 4e98663 34e493 70793 fd9ff06f 2f00613 5c00713 f21ff06f 400493 f29ff06f fb0733 ffe75703 c70463 f2b714e3 fff98993 f19ff06f 58793 f2dff06f 1bd7863 ee99c63 d9d9e63 80006f d9d9463 34e493 b00d93 2044703 e500793 f71663 500793 2f40023 800793 fd9663 291913 ff97913 c97793 c00713 e78863 397793 300713 18e79c63 24e493 29405a3 40513 42d03 c15ff0ef 50c93 32051463 fff00793 2f42623 ff00993 ff00493 d00d93 1842583 d0513 d40ff0ef 50c93 30051063 1c42b03 b4783 30078a63 bb4703 e500593 3f77613 c40323 b78a63 877713 14070863 f00713 14e60863 fff00793 2f42623 2600006f e98663 34e493 f2e9eee3 291913 ff97913 98713 b00d93 800d13 ecdff06f 7f00793 4a7f463 24e793 1b500593 e12423 f12223 54d000ef 8057593 412783 812703 2000813 2e00893 7337 2058a63 7f57513 aa8533 54503 78493 50a63 dc030793 7c583 4058e63 4a59863 34e493 5f00513 340006f ff00593 fca5fce3 fffd8593 bd6863 34e493 d8d13 e49ff06f 1a405b3 855e13 3c58023 1d0d13 78493 1a407b3 2a78023 1d0d13 e25ff06f 178793 fa5ff06f fbf50793 1079793 107d793 1900593 f5e663 296913 fd1ff06f f9f50793 1079793 107d793 fcf5e0e3 fe050513 1051513 196913 1055513 fadff06f 24f793 e60796e3 197793 78463 104e493 497913 e4090ce3 84e493 e51ff06f f00713 12e61a63 2b44703 4077713 e071e63 407f713 10070463 bf7f493 1042783 db4983 2f42623 db4783 f379a63 1bb4783 1ab4703 879793 e7e7b3 e079063 b4783 cd2903 100593 3f7f793 fff78793 3b787b3 ff00893 7737 d9870713 1970733 74603 cb0633 164703 64603 871713 c76733 a058263 f12223 8f8ea63 70513 e12623 44d000ef 412783 a12423 178613 179793 f907b3 7d503 c12223 42d000ef 812583 6a59063 c12703 412603 ff00893 70593 60793 1c8c93 f9bc92e3 b4703 4077713 70c63 58a63 179793 f90933 95783 2079263 fff48493 ff4f493 40513 d28ff0ef 50c93 d60500e3 6c0006f f09786e3 ff00493 fe5ff06f 12683 fad706e3 ff1ff06f 2049863 bb0613 b0713 14d793 170713 749493 97e4b3 fff74783 f484b3 ff4f493 fec712e3 2998263 2b44783 17f793 d40796e3 b00613 c0593 b0513 8e4ff0ef d2051ce3 2b44783 20c8263 400713 aeec9ae3 47f793 ae0796e3 500c93 ae5ff06f 400c93 fddff06f 47f793 ac079ae3 644783 107f793 fe0780e3 1042783 bc503 2cb8593 1ff7f793 f585b3 9b0ff0ef a42423 9f1ff06f fd010113 a12623 1c10513 2112623 b12423 c12223 b12e23 8b8ff0ef 4054e63 100007b7 10078713 251513 e50733 72703 10078793 412603 70463 70023 c12703 70463 70023 a787b3 e7a023 513 60863 c10593 810513 cd8ff0ef 2c12083 3010113 8067 b00513 ff1ff06f f9010113 6912223 6112623 6812423 7212023 5312e23 5412c23 b12623 900493 8050a63 50413 1c10593 c10513 60913 c88ff0ef 50493 a051063 1c12783 c12583 2010513 2f12023 899ff0ef 50493 8051263 4b10783 607cc63 2614783 107f793 6079c63 1c12983 3c12a03 197913 9c503 a0593 898ff0ef a42423 1ca0513 f3dfe0ef 69d783 a42623 1342023 f41223 1240823 408a3 42e23 42a23 6c12083 6812403 48513 6012903 6412483 5c12983 5812a03 7010113 8067 600493 42023 fd5ff06f 400493 ff5ff06f fb010113 4812423 4912223 3412c23 3512a23 4112623 5212023 3312e23 3612823 3712623 3812423 3912223 3a12023 58a13 6a023 1c10593 50493 c12623 68a93 f69fe0ef 50413 8051263 114c403 6041e63 104c783 700413 17f793 6078663 c4a403 144a783 c12603 40f40433 867463 60413 20000b13 1ff00b93 100c13 fff00c93 4040063 144a783 1ff7f713 10071463 1c12703 a75983 97d713 fff98993 e9f9b3 8099063 4079a63 84a503 4ac6e63 200793 f488a3 200413 40513 4c12083 4812403 4412483 4012903 3c12983 3812a03 3412a83 3012b03 2c12b83 2812c03 2412c83 2012d03 5010113 8067 184a583 4a503 870ff0ef fa9ff06f 1951a63 100793 f488a3 100413 fa5ff06f a4ac23 1c12d03 184a583 d0513 dedfe0ef f80500e3 a98633 48bfa63 ad5783 945913 1298733 e7f463 41378933 1d4503 90693 a0593 45d000ef fa0516e3 991913 aa783 41240433 12a0a33 12787b3 faa023 144a783 1278933 124aa23 ef5ff06f c4ae23 144a783 40913 1ff7f793 40fb07b3 87f463 78913 1c4a583 1c12503 e9dfe0ef f4051ce3 1c12703 144a683 2c70713 1ff6f693 a687b3 f707b3 7c603 aa07b3 150513 c78023 fea914e3 f85ff06f fe010113 c10593 812c23 112e23 50413 d9dfe0ef 51463 42023 1c12083 1812403 2010113 8067 fd010113 1312e23 58993 c10593 2812423 3212023 2112623 2912223 1412c23 1512a23 50413 d55fe0ef 50913 e051a63 1144903 e091663 c42483 99f463 98493 1442783 42a23 2049663 913 cc0006f 513 1442783 1ff7f793 fe0786e3 1c42783 aa78a63 a42e23 ac0006f c12703 a75983 999993 6078463 fff78793 fff48713 3375733 337d6b3 4d76a63 41300733 1842583 f777b3 f42a23 40f484b3 fa0584e3 fff00a13 100a93 1442783 299ec63 f487b3 f42a23 1ff4f793 f80784e3 c12503 c21fe0ef 6050e63 94d493 a48533 f75ff06f 842583 b42c23 fbdff06f 42503 13787b3 f42a23 e4dfe0ef 413484b3 50593 3451c63 100793 f408a3 100913 2c12083 2812403 90513 2412483 2012903 1c12983 1812a03 1412a83 3010113 8067 aaf863 c12783 107a783 f56a63 200793 f408a3 200913 fbdff06f a42c23 f51ff06f fd010113 2112623 2812423 b12623 8050a63 50413 1c10593 c10513 804ff0ef 2051a63 1c12783 c12583 40513 f42023 c18ff0ef 6051863 2b40783 207c863 644783 107f793 79863 500513 42023 380006f 1c12783 1c42583 7c503 c19fe0ef a42423 1c12783 40513 67d783 f41223 ae4ff0ef 400793 fcf504e3 fc0514e3 2c12083 2812403 3010113 8067 900513 fedff06f 400793 faf502e3 fa5ff06f fe010113 c10593 812c23 112e23 50413 b3dfe0ef 51463 42023 1c12083 1812403 2010113 8067 fb010113 4912223 58493 c10593 5212023 3312e23 4112623 4812423 3412c23 3512a23 3612823 3712623 3812423 3912223 3a12023 1b12e23 50913 addfe0ef 50993 3c051863 49a63 90513 a28ff0ef 50993 3bc0006f 92b03 7a37 10ab7 ff00c13 ff00413 400513 d00b93 d98a0a13 fffa8a93 1892583 59663 16050863 1140006f b0513 b39fe0ef 10051463 1c92783 7c703 22070e63 b7c683 e500613 3f6f693 d90323 ec70e63 2e00613 ec70a63 fdf6f613 800593 eb60463 f00613 ec69863 4077693 c068a63 bf77413 1092703 d7cc03 2e92623 d7c703 d871063 1b7c703 1a7c683 871713 d76733 a071663 7c703 cb2603 100813 fbf77713 fff70713 3770733 ff00893 aa06b3 6c583 b785b3 15c683 5c583 869693 b6e6b3 6080c63 6e8e663 171593 b605b3 d59023 68813 170713 150513 fd7512e3 7c783 407f793 78e63 80c63 ff00793 2e7ec63 171713 e60733 71023 fff40413 ff47413 90513 cadfe0ef ee0502e3 92c23 400793 eaf516e3 4c0006f f48700e3 ff00413 fddff06f fb5682e3 ff5ff06f 2041663 b78693 145713 178793 741413 876433 fff7c703 e40433 ff47413 fef692e3 8c0663 fff00793 2f92623 92c83 48b23 1892783 20078063 2c92703 fff00793 16f71663 1c92403 793 713 2000593 500513 900813 b00613 2e00893 170713 e406b3 fff6c683 2b68663 a69463 e500693 1071a63 f66863 f48333 11304a3 178793 f48333 d304a3 178793 fcc714e3 f48733 704a3 164c703 14071663 12078463 ff700613 948713 800593 40960633 2e00513 1900813 74783 e606b3 10078863 1079793 107d793 1aa78263 fbf78693 1069693 106d693 d86a63 c44683 d5f6b3 68463 2078793 f706a3 170713 fc1ff06f 400513 ebdff06f a9a63 1778733 1071713 1075713 2edfe63 10a9513 1b500593 f56533 414c0433 150000ef 4ac7a63 88d7663 14487b3 855713 e78b23 a78ba3 200793 fa0a33 793 2b0b13 78a93 cca783 16787b3 7d783 fa0790e3 a0413 a8463 413 848433 40b23 eb5ff06f 2050e63 fe0404e3 14487b3 a78b23 100793 fb5ff06f 3bb7 b13 a13 a93 ff00c13 100d13 800b8b93 7ff00d93 fa1ff06f 413 fadff06f 3f00793 f48b23 100693 d486b3 68b23 c44783 79463 484a3 b44783 1c40513 f48423 e70fe0ef a4a023 1744783 1644703 879793 e7e7b3 f49323 1944783 1844703 879793 e7e7b3 f49223 90513 a3dfe0ef 400793 c4f512e3 4c12083 4812403 98513 4412483 4012903 3c12983 3812a03 3412a83 3012b03 2c12b83 2812c03 2412c83 2012d03 1c12d83 5010113 8067 1000593 e7dff06f 7f00793 a7ea63 1051793 107d793 78513 8067 10737 793 fee578e3 1b500713 fee594e3 7737 dec70713 8000613 75683 a68c63 178793 1079793 107d793 270713 fec794e3 8078793 ff7f793 fb5ff06f 7f00793 2a7f863 1b500793 2f59263 ff00793 a7ee63 77b7 dec78793 151513 a78533 f0055503 8067 513 8067 107b7 6f57e63 76b7 1051793 dec68693 1637 107d793 10068713 c56463 2f468713 75683 4068863 4d7e663 470713 ffe75603 865593 ff67613 d60833 9055a63 800613 2b66663 7637 dc860613 259593 c585b3 5a603 60067 40d50533 151513 a70533 55783 78513 8067 40d78533 157513 40a787b3 1079793 107d793 fe5ff06f ff078793 ff1ff06f fe078793 fe9ff06f fd078793 fe1ff06f fe678793 fd9ff06f 878793 fd1ff06f fb078793 fc9ff06f ffffe737 3a070713 e787b3 fb9ff06f f40596e3 161613 c70733 f41ff06f f00047b7 a7a623 800713 e7a023 1737 80170713 e7a223 100693 f0004737 872783 ff7f793 fed79ce3 1072503 ff57513 8067 f00047b7 7aa23 ff00513 fb9ff06f fe010113 812c23 912a23 112e23 50493 413 ff00513 b12623 f95ff0ef 8487b3 c12583 140413 a78023 1041793 107d793 fcb7eee3 1c12083 1812403 1412483 2010113 8067 fe010113 1851793 812c23 1212823 112e23 912a23 4187d793 50413 58913 207d063 593 3700513 fd1ff0ef a103a3 100793 4a7ee63 7f47413 c00793 6f40463 f51ff0ef f00047b7 100713 e7aa23 ff00513 f01ff0ef 1f400493 ff00513 ef5ff0ef ff00793 2f50e63 fff48493 1049493 100513 104d493 12c010ef fc049ee3 f0dff0ef ff00513 1c12083 1812403 1412483 1012903 2010113 8067 4046793 f10423 1895793 f104a3 1095793 f10523 895793 f105a3 1210623 6041863 f9500793 f106a3 493 600913 810793 9787b3 7c503 148493 e69ff0ef ff2496e3 c00793 f41863 100593 710513 e9dff0ef a00413 710513 100593 e8dff0ef 714503 1851793 4187d793 f607d4e3 fff40413 ff47413 fc041ee3 f59ff06f 800793 f41663 f8700793 f8dff06f 100793 f85ff06f fd010113 2912223 3212023 1312e23 2112623 2812423 f00047b7 7ae23 7e00713 2e7a023 3e800493 f00049b7 100913 9aa23 a00413 fff40413 ff00513 ff47413 dbdff0ef fe0418e3 129aa23 593 513 e49ff0ef 5250663 fff48493 1049493 104d493 fc0492e3 40513 2c12083 2812403 2412483 2012903 1c12983 3010113 8067 f00047b7 7ae23 300713 2e7a023 98413 fcdff06f 1aa00593 800513 df1ff0ef 50993 fb251ce3 400593 c10513 d89ff0ef 3e800493 400005b7 a900513 dcdff0ef fa050ce3 fff48493 1049493 100513 104d493 769000ef fc049ee3 f7dff06f 51863 100007b7 f07c503 8067 100513 8067 4051063 ff010113 812423 10000437 f044783 112623 78a63 ed1ff0ef 153513 ea40823 d05ff0ef f044503 c12083 812403 1010113 8067 100513 8067 fd010113 3212023 100913 d93933 1190913 2812423 90513 58413 60593 2912223 2112623 1312e23 1412c23 1512a23 1612823 1712623 1812423 68493 d01ff0ef 4051a63 1a37 18b37 fe00b93 f00049b7 800c13 801a0a13 2048263 6a0b0a93 ff00513 c35ff0ef 7750063 100513 fffa8a93 701000ef fe0a94e3 1200793 f91863 593 c00513 cadff0ef c45ff0ef 2c12083 2812403 903533 2012903 2412483 1c12983 1812a03 1412a83 1012b03 c12b83 812c03 3010113 8067 ff00793 f9a623 498613 100693 20040713 189a023 1462023 89a783 ff7f793 fed79ce3 109a783 140413 fef40fa3 fee410e3 ff00513 b95ff0ef ff00513 b8dff0ef fff48493 f45ff06f ff5f593 54783 b79463 8067 78663 150513 fedff06f 513 8067 54703 2071263 513 8067 fee68ee3 178793 7c683 fe069ae3 150513 fddff06f 58793 fedff06f b505b3 ff67613 b50663 54783 79663 513 8067 fef60ee3 150513 fe5ff06f 50793 158593 fff5c703 178793 fee78fa3 fe0718e3 8067 c50633 50793 c79463 8067 5c703 e78023 70463 158593 178793 fe5ff06f 158593 54703 fff5c783 40f707b3 1879793 4187d793 79663 150513 fe0710e3 78513 8067 713 c71863 793 78513 8067 e507b3 7c683 e587b3 7c783 40f687b3 1879793 4187d793 fc079ee3 fc068ce3 170713 fc9ff06f 50793 7c703 178693 71e63 158593 fff5c703 178793 fee78fa3 fe0718e3 8067 68793 fd9ff06f 50793 61663 8067 68793 7c703 178693 fe071ae3 c78633 158593 fff5c703 178793 fee78fa3 fc070ce3 fec796e3 78023 8067 50793 7c703 71663 40a78533 8067 178793 fedff06f fe010113 812c23 b12623 50413 112e23 fd1ff0ef c12583 a40533 ff5f593 54783 b78863 fff50513 fe857ae3 513 1c12083 1812403 2010113 8067 b505b3 50793 b78663 7c703 71663 40a78533 8067 178793 fe9ff06f 793 f50733 74683 68e63 58713 c0006f d60c63 170713 74603 fe061ae3 78513 8067 178793 fd1ff06f 713 e61663 793 200006f e507b3 e586b3 7c783 6c683 170713 40d787b3 fc078ee3 78513 8067 c50633 50793 c79463 8067 178793 feb78fa3 ff1ff06f 793 f61463 8067 f58733 74683 f50733 178793 d70023 fe5ff06f 2a5fa63 fff64693 793 fff78793 2f69663 8067 f58733 74683 f50733 178793 d70023 fef616e3 8067 793 ff5ff06f f60733 e58833 84803 e50733 1070023 fbdff06f fe010113 812c23 50413 58513 1312623 112e23 912a23 1212823 1412423 58993 e51ff0ef 4050063 50913 40513 e41ff0ef 50493 a40a33 409a0433 124f663 413 1c0006f 90613 98593 40513 fff48493 ed5ff0ef fc051ee3 40513 1c12083 1812403 1412483 1012903 c12983 812a03 2010113 8067 c50633 ff5f593 c51663 513 8067 54703 150793 feb70ae3 78513 fe5ff06f 76b7 50793 54703 19c68693 4061e63 3000513 a00613 4a71463 17c703 178513 e68633 64603 267613 60663 fe070713 ff77713 5800613 ac71063 27c703 e68733 74703 4477713 8070663 278793 1000613 513 4c0006f 1000513 fea61ae3 3000513 fea716e3 17c703 e68533 54503 257513 50663 fe070713 ff77713 5800513 fca714e3 278793 fc1ff06f 2c50533 178793 e50533 7c703 e68833 84803 4487893 88a63 487893 2088263 fd070713 fcc76ae3 58463 f5a023 8067 50793 800613 f79ff06f 287813 80663 fe070713 ff77713 fc970713 fd1ff06f 54683 2d00713 e68463 eedff06f ff010113 150513 112623 eddff0ef c12083 40a00533 1010113 8067 76b7 793 19c68693 a00593 52603 64703 e68733 74703 477713 71663 78513 8067 2b787b3 160713 e52023 64703 e787b3 fd078793 fc9ff06f 78b7 19c88893 4087313 12888e13 30463 10088e13 1087893 88463 ffe87813 ffe68313 2200e93 893 246ee263 187893 fb010113 3000f93 89463 2000f93 287893 313 88a63 8065663 40c00633 fff70713 2d00313 2087293 28863 1000893 9169c63 ffe70713 a061063 3000613 c10623 100893 88613 f8d463 78613 1187793 40c70733 c078e63 30863 b57463 650023 150513 28e63 800793 cf69863 b57663 3000793 f50023 150513 1087813 10080a63 c50633 3000693 1200006f 487893 88863 fff70713 2b00313 f75ff06f 887893 f60886e3 fff70713 2000313 f61ff06f 800893 f71696e3 fff70713 f65ff06f c10e93 893 2d67f33 188893 1e8e93 1ee0f33 f4f03 ffee8fa3 2d65f33 f4d666e3 f0613 fddff06f b7f463 778023 178793 40ff0eb3 ffd048e3 70793 75463 793 fff70713 f50533 40f70733 f2dff06f 50793 e50f33 2000393 fd1ff06f 1000793 f4f690e3 b57663 3000793 f50023 150793 b7f663 21e4783 f500a3 250513 f1dff06f b7f463 1f78023 178793 40f806b3 fed048e3 70793 75463 793 fff70713 f50533 40f70733 ef5ff06f 50793 e50833 fd5ff06f b57463 d50023 150513 40a607b3 fef8c8e3 88793 50693 fff00613 fff78793 2c79a63 1150533 50793 e50633 2000813 40f606b3 2d04c63 75463 713 e508b3 88513 5010113 8067 b6fa63 c10813 f80833 84803 1068023 168693 fb1ff06f b7f463 1078023 178793 fb9ff06f 88513 8067 ff010113 812423 112623 58413 1ec010ef 856463 fff40513 c12083 812403 1010113 8067 fc010113 2d12623 2c10693 112e23 2e12823 2f12a23 3012c23 3112e23 d12623 1ac010ef 1c12083 4010113 8067 fc010113 2d12623 2c10693 812c23 112e23 58413 2e12823 2f12a23 3012c23 3112e23 d12623 170010ef 856463 fff40513 1c12083 1812403 4010113 8067 60693 58613 800005b7 fff5c593 1440106f fc010113 2c12423 58613 800005b7 2d12623 fff5c593 2810693 112e23 2e12823 2f12a23 3012c23 3112e23 d12623 10c010ef 1c12083 4010113 8067 10000737 10472783 8100513 2f50533 361967b7 2e978793 f50533 10a72223 8067 100007b7 10a7a223 8067 7537 ff010113 2ec50513 112623 434000ef 6f 1851713 1855793 106b7 e7e7b3 f0068693 855713 d77733 e7e7b3 851513 ff0737 e57533 a7e533 8067 851793 855513 a7e533 1051513 1055513 8067 1851713 1855793 106b7 e7e7b3 f0068693 855713 d77733 e7e7b3 851513 ff0737 e57533 a7e533 8067 851793 855513 a7e533 1051513 1055513 8067 76b7 793 b505b3 2f868693 40a58733 e04663 78513 8067 150513 fff54603 87d713 879793 c74733 271713 e68733 75703 1079793 107d793 f747b3 fc5ff06f 76b7 50713 fff00793 b508b3 700813 6f868693 40e88633 4c86e63 35d713 371693 d50533 ff800693 2d70733 b705b3 2058c63 76b7 b505b3 6f868693 150513 fff54703 f74733 ff77713 271713 e68733 72703 87d793 f747b3 fcb51ee3 fff7c513 8067 74603 870713 f64633 ff67613 261613 c68633 62603 87d793 f647b3 ff974603 f64633 ff67613 261613 c68633 62603 87d793 f64633 ffa74783 c7c7b3 ff7f793 279793 f687b3 7a303 ffb74783 865613 c34333 67c7b3 ff7f793 279793 f687b3 7a603 ffc74783 835313 664633 c7c7b3 ff7f793 279793 f687b3 7a303 ffd74783 865613 c34333 67c7b3 ff7f793 279793 f687b3 7a783 ffe74603 835313 67c7b3 f64633 ff67613 261613 c68633 62303 fff74603 87d793 f34333 664633 ff67613 261613 c68633 62783 835313 67c7b3 e9dff06f 100007b7 10a7a823 8067 100007b7 10a7a623 100007b7 10b7a423 8067 ff010113 912223 ff57493 812423 50413 48513 112623 478000ef 100007b7 1107a783 78663 48513 780e7 a00793 f41663 d00513 fc1ff0ef 40513 c12083 812403 412483 1010113 8067 ff010113 812423 112623 10000437 40c000ef 50a63 812403 c12083 1010113 3a40006f 10842783 fe0782e3 780e7 fc050ee3 812403 100007b7 c12083 10c7a303 1010113 30067 ff010113 112623 3c4000ef 2051263 100007b7 1087a783 78663 780e7 a03533 c12083 1010113 8067 100513 ff1ff06f ff010113 812423 112623 50413 44503 2051063 a00513 f01ff0ef c12083 812403 100513 1010113 8067 ee9ff0ef 140413 fd5ff06f ff010113 812423 112623 50413 44503 51a63 c12083 812403 1010113 8067 eb5ff0ef 140413 fe1ff06f ef010113 58693 50613 10000593 10513 10112623 10812423 abdff0ef 10010793 50413 a787b3 10513 f0078023 f99ff0ef 40513 10c12083 10812403 11010113 8067 fc010113 2b12223 2410593 112e23 2c12423 2d12623 2e12823 2f12a23 3012c23 3112e23 b12623 f89ff0ef 1c12083 4010113 8067 f0002737 82872783 82c72503 879793 a7e7b3 83072503 879793 a7e7b3 83472503 879793 a7e533 8067 400007b7 40004737 7a683 478793 fee79ce3 8067 c737 35070713 2e50533 ff010113 812423 912223 112623 f00027b7 8207a023 8007a823 8007aa23 8007ac23 8007ae23 1855713 80e7a023 1055713 80e7a223 855713 80e7a423 80a7a623 100713 82e7a023 82e7a223 f0002437 100493 f55ff0ef 51c63 c12083 812403 412483 1010113 8067 82942223 fe1ff06f 3200713 2e50533 ff010113 812423 912223 112623 f00027b7 8207a023 8007a823 8007aa23 8007ac23 8007ae23 1855713 80e7a023 1055713 80e7a223 855713 80e7a423 80a7a623 100713 82e7a023 82e7a223 f0002437 100493 ed1ff0ef 51c63 c12083 812403 412483 1010113 8067 82942223 fe1ff06f f00027b7 40078713 7a683 478793 150513 fed50fa3 fee798e3 8067 f00017b7 107a703 277793 2078463 100005b7 f00016b7 10000637 10000837 33058593 200893 86a783 ff7f793 78863 177713 2071c63 8067 12062783 11c82503 178793 7f7f793 f50c63 12062503 6a303 12f62023 a58533 650023 116a823 fbdff06f 100713 f00017b7 100006b7 e7a823 100005b7 10000737 f0001637 33068693 11472503 1185a783 f50863 462783 ff7f793 78463 8067 11472783 f687b3 807c783 f62023 11472783 178793 7f7f793 10f72a23 fc5ff06f 30002673 10000737 867613 11c72783 70693 10000737 2060663 12072603 fef60ee3 10000737 33070713 f70733 178793 7f7f793 74503 10f6ae23 100006f 12072703 513 fcf71ce3 8067 10000737 100007b7 1207a783 11c72503 40f50533 a03533 8067 100006b7 1186a603 160793 7f7f793 300025f3 85f593 10000737 4058663 11472583 fef58ee3 bc0025f3 ffe5f813 bc081073 11472703 e61a63 f0001837 482703 ff77713 2070663 10000737 33070713 c70733 8a70023 10f6ac23 bc059073 c0006f 11472583 faf59ee3 8067 a82023 fe9ff06f 100007b7 1207a023 100007b7 1007ae23 100007b7 1007ac23 100007b7 1007aa23 f00017b7 107a703 ff77713 e7a823 300713 e7aa23 bc0027f3 17e793 bc079073 8067 100007b7 1187a783 100006b7 1146a703 fef71ee3 8067 2d2f87b7 fd010113 c5c78793 2112623 2812423 2912223 3212023 1312e23 1412c23 f12023 10223 4055863 10000737 12472783 8537 af850513 178693 12d72223 37f793 1010713 f707b3 ff07c583 bddff0ef 2c12083 2812403 2412483 2012903 1c12983 1812a03 3010113 8067 100007b7 1287a583 50413 2058a63 5f5e7b7 10078793 2f58463 2800713 2e507b3 2e51433 f12423 812623 2041263 2b7d5b3 b12423 812403 100004b7 2800913 89b7 8a37 380006f 810513 4e9000ef fe1ff06f 327e733 71863 78663 b7098513 b49ff0ef afca0513 b41ff0ef 12c4a783 178793 12f4a623 12c4a783 fc87cae3 f51ff06f 100007b7 1207a623 100007b7 12a7a423 100007b7 1207a223 6637 2050263 5f5e7b7 10078793 f50c63 8537 2d460613 2800593 b0050513 ae9ff06f 2d460513 ae1ff06f f0002737 82872783 82c72503 879793 a7e7b3 83072503 879793 a7e7b3 83472503 879793 a7e533 8067 3ff00793 50593 a7e863 8537 b0850513 a99ff06f 1007b7 f57a63 a55593 8537 b1050513 fe9ff06f 400007b7 f57a63 1455593 8537 b1850513 fd1ff06f 1e55593 8537 b2050513 fc1ff06f ff010113 812423 c586b3 60413 58613 50593 8537 b2850513 112623 a31ff0ef 40513 f7dff0ef 812403 c12083 8537 b3850513 1010113 a11ff06f ff010113 aaaab737 912223 1212023 112623 812423 50913 25d493 793 aaa70713 6979263 500f a49ff0ef aaaab737 413 793 aaa70713 4979e63 55555737 793 55570713 6979463 500f a1dff0ef 55555737 793 55570713 6979263 40513 c12083 812403 412483 12903 1010113 8067 279693 d906b3 e6a023 178793 f8dff06f 279693 d906b3 6a683 e68463 140413 178793 f8dff06f 279693 d906b3 e6a023 178793 f89ff06f 279693 d906b3 6a683 e68463 140413 178793 f85ff06f fe010113 d6b7 812c23 112e23 25d413 100793 713 868693 4871863 c12623 a12423 500f 95dff0ef 812503 c12603 d837 108b7 100793 693 713 880813 fff88893 4871a63 1c12083 1812403 68513 2010113 8067 2060a63 17d593 17f793 40f007b3 d7f7b3 b7c7b3 1079793 107d793 279593 b505b3 e5a023 170713 f81ff06f 178793 fe1ff06f 4060063 17d593 17f793 40f007b3 107f7b3 b7c7b3 1079793 107d793 279313 650333 32303 1137333 e30463 168693 170713 f71ff06f 178793 fd5ff06f fd010113 1512a23 1612823 80200ab7 8b37 2812423 2912223 3212023 1312e23 1412c23 1712623 2112623 1812423 1912223 1a12023 50493 60a13 25d993 100413 913 3a8a93 fffb0b13 8bb7 b391663 299c13 8537 c0613 48593 b4050513 d65ff0ef 8ab7 b70a8513 facff0ef 500f 80200bb7 8cb7 809ff0ef 100413 b13 913 3b8b93 fffc8c93 8d37 b391263 8537 c0613 48593 b4c50513 d19ff0ef b70a8513 f64ff0ef 2c12083 2812403 b0513 2412483 2012903 1c12983 1812a03 1412a83 1012b03 c12b83 812c03 412c83 12d03 3010113 8067 40a0063 145793 147413 40800433 1547433 f44433 291613 c487b3 87a023 16977b3 79863 48593 b40b8513 c9dff0ef 190913 f19ff06f 140413 fd5ff06f 40a0463 145793 147413 40800433 1747433 f44433 291613 c487b3 7a783 878463 1b0b13 19977b3 79863 48593 b4cd0513 c4dff0ef 190913 f19ff06f 140413 fcdff06f fd010113 2812423 1312e23 58413 50993 50593 8537 b5850513 c12623 2112623 1412c23 2912223 3212023 e58ff0ef 40513 ba5ff0ef 8537 b6c50513 e44ff0ef f00027b7 8207a023 8007a823 8007aa23 8007ac23 8007ae23 ff00713 80e7a023 10737 fff70713 80e7a223 1000737 fff70713 80e7a423 c12603 fff00713 80e7a623 100713 82e7a023 245a13 6061c63 82e7a223 b0dff0ef 50493 793 fff00693 11479063 f00027b7 100713 82e7a223 aedff0ef 50913 8537 b7450513 db8ff0ef 2faf537 8050513 2a435b3 41248633 c4b6b3 40d006b3 2a40533 7fc000ef ae9ff0ef 8537 b8450513 d88ff0ef 8537 b7050513 d7cff0ef 500f de0ff0ef f00027b7 100713 82e7a023 82e7a223 a85ff0ef 50493 793 8fa1863 f00027b7 100713 82e7a223 a69ff0ef 50913 8537 b8850513 d34ff0ef 2faf537 8050513 2a435b3 41248633 c4b6b3 40d006b3 2a40533 778000ef a65ff0ef 8537 b8450513 d04ff0ef 2812403 2c12083 2412483 2012903 1c12983 1812a03 8537 b7050513 3010113 cdcff06f 279713 e98733 d72023 178793 ef1ff06f 279713 e98733 72703 178793 f61ff06f fe010113 812c23 912a23 1212823 112e23 1312623 1412423 1512223 20000793 50913 58413 20000493 b7e463 58493 87b7 40993 87f463 89b7 8537 90593 b9850513 c5cff0ef 40513 9a9ff0ef 8537 b6c50513 c48ff0ef 48593 90513 a31ff0ef 50a93 613 98593 90513 b09ff0ef 50a13 100613 90513 40593 be9ff0ef 14a87b3 a787b3 50913 6078c63 149613 8537 265613 a8593 bac50513 becff0ef 8537 29d613 a0593 bc450513 bd8ff0ef 8537 245613 90593 bdc50513 bc4ff0ef 8537 bf450513 bb8ff0ef 513 1c12083 1812403 1412483 1012903 c12983 812a03 412a83 2010113 8067 8537 c0050513 b84ff0ef 100513 fcdff06f fc010113 2112e23 2812c23 2912a23 3212823 3312623 3412423 3512223 3612023 1712e23 1812c23 1912a23 1a12823 c12623 4c05c063 b509b3 50a13 58b13 68493 a9f663 fff54b13 fff00993 7c37 8cb7 a0413 2500b93 2000a93 19cc0c13 c0cc8c93 2b40006f 1778a63 1347463 f40023 140413 2940006f 913 2b00713 2d00613 3000593 2300513 c12683 168793 f12623 16c783 12e78e63 12f76063 13578e63 14a78063 fc0733 74703 477713 12070c63 c10513 a69fe0ef 50713 c12683 2e00613 fff00793 6c583 2c59e63 168793 f12623 16c603 cc07b3 7c783 47f793 12078463 c10513 e12423 a29fe0ef 812703 50793 55463 793 c12683 6800593 6c603 2b60263 df67593 4c00513 a58c63 5a00513 a58863 7400593 fff00813 2b61663 60813 168613 c12623 6c00613 c81c63 16c603 1061863 268693 d12623 4c00813 c12683 6c603 6e00693 2cd60a63 cc6ee63 6300693 14d60a63 ac6ea63 2d760a63 5800693 2cd60c63 1347463 1740023 c12783 140713 7c683 2c068663 1377463 d400a3 240413 14c0006f c78863 eeb794e3 196913 ec1ff06f 1096913 eb9ff06f 496913 eb1ff06f 896913 ea9ff06f 2096913 ea1ff06f 2a00613 fff00713 ecc798e3 4a703 268693 d12623 448493 ea075ee3 40e00733 1096913 eb1ff06f 2a00593 793 eeb618e3 268693 4a503 d12623 448493 ed1ff06f 6400693 d60663 6900693 f4d618e3 296913 a00693 680006f 7300693 14d60863 4c6e463 6f00693 22d60063 7000693 f2d614e3 fff00693 d71663 196913 800713 4a603 448d13 90813 1000693 40513 98593 8d9fe0ef 50413 1640006f 7500693 fad602e3 7800593 1000693 eeb610e3 4c00613 1cc81863 748493 ff84f493 848d13 4a603 1f80006f 1097913 a090c63 40793 448693 1347663 4a603 c40023 140413 e78733 408707b3 8f04e63 68493 c12783 178793 f12623 c12783 7c783 d40794e3 b0663 1b347c63 40023 41440533 3c12083 3812403 3412483 3012903 2c12983 2812a03 2412a83 2012b03 1c12b83 1812c03 1412c83 1012d03 4010113 8067 1347463 1540023 140413 fff78793 fef048e3 fff70793 e04463 100713 40e78733 170713 f51ff06f 70793 fddff06f 1347463 1540023 140413 f55ff06f 448d13 4a483 49463 c8493 78593 48513 e12423 1097913 c48fe0ef 812703 91863 70793 fff70713 2f54863 793 2a7cc63 50793 55463 793 f40433 e40733 408707b3 2f54c63 d0493 efdff06f 1347463 1540023 140413 fbdff06f f406b3 136f863 f48633 64603 c68023 178793 fb1ff06f 1347463 1540023 140413 fb9ff06f 4a783 41440733 448493 e7a023 eadff06f c13478e3 1740023 c09ff06f 4096913 1000693 e49ff06f fff78793 f12623 70413 e85ff06f 800693 e31ff06f 6c00613 448d13 e2c80ce3 fdf87613 5a00593 e2b606e3 7400613 e2c802e3 6800613 297593 e0c81ce3 4a603 1061613 59863 1065613 90813 dc5ff06f 41065613 ff5ff06f fe098fa3 e4dff06f 513 e49ff06f 50e13 4e2683 52503 793 cb6e063 2b6d8b3 313 3158733 40e686b3 100813 613 240006f 1f5de93 179713 eee7b3 1f85e93 161713 159593 eee633 181813 f04663 79a63 58863 fcd7eae3 f69463 fca5e6e3 2f6ea63 d79463 2b56663 40b50733 e53eb3 40f686b3 70513 1030733 41d686b3 c888b3 673eb3 11e88b3 70313 1f79713 15d593 b765b3 185813 1f61713 1076833 165613 c86733 17d793 fa0714e3 6e2023 11e2223 8067 313 893 f4dff06f 713 40006f fe010113 812c23 1212823 1312623 1412423 1512223 112e23 912a23 50413 58a93 60993 68a13 70913 2059c63 2069063 70863 2c577b3 72223 f72023 3345433 a93 1100006f 70663 a92023 72223 413 fc0006f a061863 69463 100073 51e63 70863 2d5f7b3 72023 f72223 34ad433 fc1ff06f fff68793 d7f733 2071263 90863 b7f7b3 a92023 f92223 a0513 2d4000ef aad433 f95ff06f 68513 22c000ef 50493 a8513 220000ef 40a48533 1e00793 a7fc63 90663 892023 1592223 413 f61ff06f 150613 2000713 40c70733 693 e418b3 cad333 ea97b3 c45433 87e7b3 c40006f 18069063 fff60793 c7f733 6071463 90863 a7f7b3 f92023 92223 100793 2f98263 98513 240000ef 2000793 40a787b3 fa97b3 a45433 87e433 aadab3 40513 1c12083 1812403 a8593 1412483 1012903 c12983 812a03 412a83 2010113 8067 60513 15c000ef 50493 a8513 150000ef 40a48533 2150613 2000813 693 11060c63 1f00793 ac7ec63 40c80833 10418b3 10a9833 c45433 693 cad333 8867b3 e13 1f7d713 131813 e86333 179793 1f8d713 e7e7b3 fff7c593 1f6d713 189893 1358833 e8e8b3 fff34713 b83833 1470733 e80833 41f85813 1387733 169693 40e78733 1c6e6b3 187e13 1487833 e7b5b3 41030833 fff60613 70793 40b80333 f8061ae3 1f6d813 189893 169693 1c6e433 1186ab3 f00900e3 e92023 692223 ef5ff06f 4000893 40c888b3 150513 11416b3 11a98b3 a45433 88e8b3 313 aad7b3 f45ff06f 68513 50000ef 50493 a8513 44000ef 40a48533 1f00793 e2a7e4e3 150613 2000793 693 f61a63 40893 313 a8793 f05ff06f 40c787b3 f418b3 cad333 fa97b3 e25ff06f ffff0737 e57733 173693 469693 1000793 40d787b3 10737 f557b3 f0070713 e7f733 173713 371713 800513 40e50533 a7d7b3 f07f513 153513 251513 d70733 400693 40a686b3 d7d7b3 e50733 c7f513 153513 200613 151513 40a606b3 d7d7b3 17d693 16c693 16f693 40d006b3 40f607b3 f6f7b3 e50533 a78533 8067 1051693 106d693 16b693 469693 d557b3 ff7f713 173713 371713 e7d7b3 d706b3 f7f713 173713 271713 e7d7b3 d706b3 37f713 173713 171713 e7d7b3 17d513 fff7c793 157613 17f793 200513 40c50533 40f007b3 f57533 d70733 e50533 8067 0 db4 df0 e54 df0 cd4 e9c 44354c73 6d4d5364 726b656b a6f 4849367a 59633747 36444944 a6f 63657845 6e697475 6f622067 6465746f 6f727020 6d617267 20746120 30257830 a0a7838 0 3d3d2d2d 3d3d3d3d 3d3d3d3d 203d3d3d 6d315b1b 7466694c 2166666f 6d305b1b 3d3d3d20 3d3d3d3d 3d3d3d3d 3d3d3d3d a2d2d 66207325 20656c69 20746f6e 6e756f66 a2e64 79706f43 20676e69 74207325 7830206f 78383025 64252820 74796220 2e297365 a2e2e 656c6966 61657220 72652064 2e726f72 a 746f6f62 6f736a2e 6e 746f6f62 73677261 0 72646461 0 3172 3272 3372 746f6f42 20676e69 6d6f7266 72657320 2e6c6169 a2e2e 73657250 20512073 4520726f 74204353 6261206f 2074726f 746f6f62 6d6f6320 74656c70 2e796c65 a 206f6f54 796e616d 6e6f6320 75636573 65766974 72726520 2c73726f 6f626120 6e697472 67 656d6954 a74756f 0 636e6143 656c6c65 a64 746f6f42 20676e69 6d6f7266 43445320 20647261 53206e69 4d2d4950 2e65646f a2e2e 746f6f42 20676e69 6d6f7266 6f6f6220 736a2e74 2e2e6e6f a2e 746f6f42 20676e69 6d6f7266 6f6f6220 69622e74 2e2e2e6e a 746f6f62 6e69622e 0 61434453 62206472 20746f6f 6c696166 a2e6465 0 6f6d654d 64207972 3a706d75 0 2578300a 20783830 20 78323025 20 202020 2e 6325 4f494220 52432053 61702043 64657373 30252820 a297838 0 4f494220 52432053 61662043 64656c69 78652820 74636570 25206465 2c783830 746f6720 38302520 a2978 65685420 73797320 206d6574 6c6c6977 6e6f6320 756e6974 62202c65 65207475 63657078 72702074 656c626f a2e736d 0 2d 74694c0a 42205865 2c534f49 61766120 62616c69 6320656c 616d6d6f 3a73646e a 34322d25 202d2073 a7325 6e656449 25203a74 73 7364656c 61763c20 3e65756c 0 6f636e49 63657272 61762074 65756c 74746553 73676e69 64654c20 6f742073 25783020 78 20637263 6464613c 73736572 6c3c203e 74676e65 3e68 6f636e49 63657272 64612074 73657264 73 6f636e49 63657272 656c2074 6874676e 0 33435243 25203a32 783830 7364656c 0 20746553 7364654c 6c617620 6575 73756c66 326c5f68 6361635f 6568 73756c46 324c2068 63616320 6568 73756c66 70635f68 63645f75 65686361 0 73756c46 50432068 61642055 63206174 65686361 0 637263 706d6f43 20657475 33435243 666f2032 70206120 20747261 7420666f 61206568 65726464 73207373 65636170 0 6e656469 74 6e656449 69666974 6f207265 68742066 79732065 6d657473 0 706c6568 0 6e697250 68742074 68207369 706c65 5f6d656d 74697277 613c2065 65726464 203e7373 6c61763c 203e6575 756f635b 5d746e 6f636e49 63657272 6f632074 746e75 5f6d656d 79706f63 73643c20 3c203e74 3e637273 6f635b20 5d746e75 0 6f636e49 63657272 65642074 6e697473 6f697461 6461206e 73657264 73 6f636e49 63657272 6f732074 65637275 64646120 73736572 0 5f6d656d 64616572 64613c20 73657264 5b203e73 676e656c 5d6874 636e490a 6572726f 6c207463 74676e65 68 5f6d656d 74736574 64613c20 203e7264 616d3c5b 7a697378 5d3e65 6f636e49 63657272 69732074 657a 5f6d656d 65657073 613c2064 3e726464 69733c20 203e657a 65723c5b 6e6f6461 5d3e796c 0 6f636e49 63657272 65722074 6e6f6461 7620796c 65756c61 0 5f6d656d 65657073 64 74736554 6d656d20 2079726f 65657073 64 5f6d656d 74736574 0 74736554 6d656d20 2079726f 65636361 7373 5f6d656d 79706f63 0 79706f43 64646120 73736572 61707320 6563 5f6d656d 74697277 65 74697257 64612065 73657264 70732073 656361 5f6d656d 64616572 0 64616552 64646120 73736572 61707320 6563 61636473 6f626472 746f 746f6f42 6f726620 4453206d 64726143 0 69726573 6f626c61 746f 746f6f42 6f726620 6553206d 6c616972 46532820 294c 6f626572 746f 6f626552 746f 61726473 65745f6d 7473 74736554 52445320 4d41 6d315b1b 20202020 20202020 20205f5f 5f205f20 2020205f 5f202020 5f5f2020 6d305b1b a 6d315b1b 20202020 2f202020 20202f20 20295f28 5f5f5f2f 207c205f 2f5f2f7c 6d305b1b a 6d315b1b 20202020 202f2020 2f5f5f2f 5f202f20 2d202f5f 203e295f 5b1b3c20 a6d30 6d315b1b 20202020 5f5f2f20 5f2f5f5f 5f5f5c2f 5f5f5c2f 7c2f5f2f 5b1b7c5f a6d30 6d315b1b 42202020 646c6975 756f7920 61682072 61776472 202c6572 69736165 1b21796c a6d305b 0 29632820 706f4320 67697279 32207468 2d323130 30323032 6a6e4520 442d796f 74696769 a6c61 29632820 706f4320 67697279 32207468 2d373030 35313032 4c2d4d20 a736261 0 4f494220 75622053 20746c69 4e206e6f 3120766f 30322031 30203032 33343a39 a30343a 0 67694d20 67206e65 73207469 3a316168 36636320 65363765 a 74694c20 67205865 73207469 3a316168 35373220 66323339 a35 3d3d2d2d 3d3d3d3d 3d3d3d3d 3d3d3d3d 5b1b203d 6f536d31 305b1b43 3d3d206d 3d3d3d3d 3d3d3d3d 3d3d3d3d 3d3d3d3d a2d2d 52786556 76637369 6e694c5f 7875 6d315b1b 1b555043 3a6d305b 73250909 25204020 7a484d64 a 48534957 454e4f42 0 6d315b1b 1b535542 3a6d305b 73250909 2d642520 20746962 64252040 a426947 0 6d315b1b 1b525343 3a6d305b 64250909 7469622d 74616420 a61 6d315b1b 1b4d4f52 3a6d305b 64250909 a42694b 0 6d315b1b 4d415253 6d305b1b 2509093a 42694b64 a 6d315b1b 5b1b324c 93a6d30 4b642509 a4269 6d315b1b 41524453 305b1b4d 9093a6d 694b6425 64252042 7469622d 25204020 2f544d64 2073 2d4c4328 6425 4c574320 64252d a29 3d3d2d2d 3d3d3d3d 3d3d3d3d 315b1b20 696e496d 6c616974 74617a69 1b6e6f69 206d305b 3d3d3d3d 3d3d3d3d 3d3d3d3d a2d2d 6f6d654d 69207972 6974696e 7a696c61 6f697461 6166206e 64656c69 a 3d3d2d2d 3d3d3d3d 3d3d3d3d 3d3d3d3d 315b1b20 6f6f426d 305b1b74 3d3d206d 3d3d3d3d 3d3d3d3d 3d3d3d3d 3d3d3d3d a2d2d 62206f4e 20746f6f 6964656d 66206d75 646e756f a 3d3d2d2d 3d3d3d3d 3d3d3d3d 203d3d3d 6d315b1b 736e6f43 1b656c6f 206d305b 3d3d3d3d 3d3d3d3d 3d3d3d3d 3d3d3d3d a2d2d 32395b1b 6c6d313b 78657469 6d305b1b 203e 73250a 6d6d6f43 20646e61 20746f6e 6e756f66 64 82008 74697753 6e696863 44532067 204d4152 73206f74 7774666f 20657261 746e6f63 2e6c6f72 a 74697753 6e696863 44532067 204d4152 68206f74 77647261 20657261 746e6f63 2e6c6f72 a 74696e49 696c6169 676e697a 52445320 40204d41 30257830 2e2e7838 a2e 41459a80 808f418e 49454545 8f8e4949 4f929290 55554f99 9b9a9959 9f9e9d9c 554f4941 a7a6a5a5 abaaa9a8 afaeadac b3b2b1b0 b7b6b5b4 bbbab9b8 bfbebdbc c3c2c1c0 c7c6c5c4 cbcac9c8 cfcecdcc d3d2d1d0 d7d6d5d4 dbdad9d8 dfdedddc e3e2e1e0 e7e6e5e4 ebeae9e8 efeeedec f3f2f1f0 f7f6f5f4 fbfaf9f8 fffefdfc 7050301 12100e09 1c181614 1e 544146 33544146 32 3c3a2a22 7f7c3f3e 0 3d3b2c2b 5d5b 39b8 39d0 39e8 39f0 39f8 3a00 3a08 3a10 3a18 fc00c7 e200e9 e000e4 e700e5 eb00ea ef00e8 ec00ee c500c4 e600c9 f400c6 f200f6 f900fb d600ff a200dc a500a3 19220a7 ed00e1 fa00f3 d100f1 ba00aa 231000bf bd00ac a100bc bb00ab 25922591 25022593 25612524 25562562 25632555 25572551 255c255d 2510255b 25342514 251c252c 253c2500 255f255e 2554255a 25662569 25502560 2567256c 25642568 25592565 25522558 256b2553 2518256a 2588250c 258c2584 25802590 df03b1 3c00393 3c303a3 3c400b5 39803a6 3b403a9 3c6221e 222903b5 b12261 22642265 23212320 224800f7 221900b0 221a00b7 b2207f a025a0 31a0061 31700e0 30700f8 100ff 1000178 1320130 1390106 14a0110 179012e 1800106 243004d 1820181 1840182 1860184 1870187 18a0189 18b018b 18e018d 190018f 1910191 1940193 19601f6 1980197 23d0198 19c019b 220019d 1a0019f 1a201a0 1a401a2 1a601a4 1a701a7 1aa01a9 1ac01ab 1ae01ac 1af01af 1b201b1 1b301b3 1b501b5 1b801b7 1ba01b8 1bc01bb 1be01bc 1c001f7 1c201c1 1c401c3 1c401c5 1c801c7 1ca01c7 1ca01cb 11001cd 101dd 1de018e 1f30112 1f10003 1f401f4 12801f8 1120222 9023a 23b2c65 23d023b 23f2c66 2410240 2460241 253010a 1810040 2550186 18a0189 18f0258 190025a 25d025c 25f025e 2610193 1940262 2650264 2670266 1960197 2c62026a 26d026c 19c026e 2710270 273019d 19f0274 2770276 2790278 27b027a 2c64027c 27f027e 28101a6 1a90282 2850284 2870286 24401ae 1b201b1 28d0245 28f028e 2910290 37b01b7 3fd0003 3ff03fe 403ac 3880386 38a0389 31103b1 203c2 3a303a3 30803c4 303cc 38e038c 3d8038f 3f20118 3f9000a 3f403f3 3f603f5 3f703f7 3fa03f9 43003fa 4500320 4600710 48a0122 4c10136 4cf010e 4c00001 14404d0 4260561 0 11d7d 1e002c63 1ea00196 1f00015a 1f100608 1f200606 1f300608 1f400608 1f510606 1f590007 1f5b1f52 1f5d1f54 1f5f1f56 6081f60 e1f70 1fbb1fba 1fc91fc8 1fcb1fca 1fdb1fda 1ff91ff8 1feb1fea 1ffb1ffa 6081f80 6081f90 6081fa0 41fb0 1fb91fb8 1fbc1fb2 11fcc 1fd01fc3 1fe00602 1fe50602 1fec0001 11ff3 214e1ffc 21320001 2102170 12184 24d02183 2c30051a 2c60042f 2c670102 2c750106 2c800102 2d000164 ff410826 31a 8080808 8080808 28282808 8082828 8080808 8080808 8080808 8080808 101010a0 10101010 10101010 10101010 4040404 4040404 10100404 10101010 41414110 1414141 1010101 1010101 1010101 1010101 10010101 10101010 42424210 2424242 2020202 2020202 2020202 2020202 10020202 8101010 0 0 0 0 0 0 0 0 101010a0 10101010 10101010 10101010 10101010 10101010 10101010 10101010 1010101 1010101 1010101 1010101 1010101 10010101 1010101 2010101 2020202 2020202 2020202 2020202 2020202 10020202 2020202 2020202 33323130 37363534 42413938 46454443 4a494847 4e4d4c4b 5251504f 56555453 5a595857 0 33323130 37363534 62613938 66656463 6a696867 6e6d6c6b 7271706f 76757473 7a797877 0 726f6241 2e646574 0 0 1021 2042 3063 4084 50a5 60c6 70e7 8108 9129 a14a b16b c18c d1ad e1ce f1ef 1231 210 3273 2252 52b5 4294 72f7 62d6 9339 8318 b37b a35a d3bd c39c f3ff e3de 2462 3443 420 1401 64e6 74c7 44a4 5485 a56a b54b 8528 9509 e5ee f5cf c5ac d58d 3653 2672 1611 630 76d7 66f6 5695 46b4 b75b a77a 9719 8738 f7df e7fe d79d c7bc 48c4 58e5 6886 78a7 840 1861 2802 3823 c9cc d9ed e98e f9af 8948 9969 a90a b92b 5af5 4ad4 7ab7 6a96 1a71 a50 3a33 2a12 dbfd cbdc fbbf eb9e 9b79 8b58 bb3b ab1a 6ca6 7c87 4ce4 5cc5 2c22 3c03 c60 1c41 edae fd8f cdec ddcd ad2a bd0b 8d68 9d49 7e97 6eb6 5ed5 4ef4 3e13 2e32 1e51 e70 ff9f efbe dfdd cffc bf1b af3a 9f59 8f78 9188 81a9 b1ca a1eb d10c c12d f14e e16f 1080 a1 30c2 20e3 5004 4025 7046 6067 83b9 9398 a3fb b3da c33d d31c e37f f35e 2b1 1290 22f3 32d2 4235 5214 6277 7256 b5ea a5cb 95a8 8589 f56e e54f d52c c50d 34e2 24c3 14a0 481 7466 6447 5424 4405 a7db b7fa 8799 97b8 e75f f77e c71d d73c 26d3 36f2 691 16b0 6657 7676 4615 5634 d94c c96d f90e e92f 99c8 89e9 b98a a9ab 5844 4865 7806 6827 18c0 8e1 3882 28a3 cb7d db5c eb3f fb1e 8bf9 9bd8 abbb bb9a 4a75 5a54 6a37 7a16 af1 1ad0 2ab3 3a92 fd2e ed0f dd6c cd4d bdaa ad8b 9de8 8dc9 7c26 6c07 5c64 4c45 3ca2 2c83 1ce0 cc1 ef1f ff3e cf5d df7c af9b bfba 8fd9 9ff8 6e17 7e36 4e55 5e74 2e93 3eb2 ed1 1ef0 0 77073096 ee0e612c 990951ba 76dc419 706af48f e963a535 9e6495a3 edb8832 79dcb8a4 e0d5e91e 97d2d988 9b64c2b 7eb17cbd e7b82d07 90bf1d91 1db71064 6ab020f2 f3b97148 84be41de 1adad47d 6ddde4eb f4d4b551 83d385c7 136c9856 646ba8c0 fd62f97a 8a65c9ec 14015c4f 63066cd9 fa0f3d63 8d080df5 3b6e20c8 4c69105e d56041e4 a2677172 3c03e4d1 4b04d447 d20d85fd a50ab56b 35b5a8fa 42b2986c dbbbc9d6 acbcf940 32d86ce3 45df5c75 dcd60dcf abd13d59 26d930ac 51de003a c8d75180 bfd06116 21b4f4b5 56b3c423 cfba9599 b8bda50f 2802b89e 5f058808 c60cd9b2 b10be924 2f6f7c87 58684c11 c1611dab b6662d3d 76dc4190 1db7106 98d220bc efd5102a 71b18589 6b6b51f 9fbfe4a5 e8b8d433 7807c9a2 f00f934 9609a88e e10e9818 7f6a0dbb 86d3d2d 91646c97 e6635c01 6b6b51f4 1c6c6162 856530d8 f262004e 6c0695ed 1b01a57b 8208f4c1 f50fc457 65b0d9c6 12b7e950 8bbeb8ea fcb9887c 62dd1ddf 15da2d49 8cd37cf3 fbd44c65 4db26158 3ab551ce a3bc0074 d4bb30e2 4adfa541 3dd895d7 a4d1c46d d3d6f4fb 4369e96a 346ed9fc ad678846 da60b8d0 44042d73 33031de5 aa0a4c5f dd0d7cc9 5005713c 270241aa be0b1010 c90c2086 5768b525 206f85b3 b966d409 ce61e49f 5edef90e 29d9c998 b0d09822 c7d7a8b4 59b33d17 2eb40d81 b7bd5c3b c0ba6cad edb88320 9abfb3b6 3b6e20c 74b1d29a ead54739 9dd277af 4db2615 73dc1683 e3630b12 94643b84 d6d6a3e 7a6a5aa8 e40ecf0b 9309ff9d a00ae27 7d079eb1 f00f9344 8708a3d2 1e01f268 6906c2fe f762575d 806567cb 196c3671 6e6b06e7 fed41b76 89d32be0 10da7a5a 67dd4acc f9b9df6f 8ebeeff9 17b7be43 60b08ed5 d6d6a3e8 a1d1937e 38d8c2c4 4fdff252 d1bb67f1 a6bc5767 3fb506dd 48b2364b d80d2bda af0a1b4c 36034af6 41047a60 df60efc3 a867df55 316e8eef 4669be79 cb61b38c bc66831a 256fd2a0 5268e236 cc0c7795 bb0b4703 220216b9 5505262f c5ba3bbe b2bd0b28 2bb45a92 5cb36a04 c2d7ffa7 b5d0cf31 2cd99e8b 5bdeae1d 9b64c2b0 ec63f226 756aa39c 26d930a 9c0906a9 eb0e363f 72076785 5005713 95bf4a82 e2b87a14 7bb12bae cb61b38 92d28e9b e5d5be0d 7cdcefb7 bdbdf21 86d3d2d4 f1d4e242 68ddb3f8 1fda836e 81be16cd f6b9265b 6fb077e1 18b74777 88085ae6 ff0f6a70 66063bca 11010b5c 8f659eff f862ae69 616bffd3 166ccf45 a00ae278 d70dd2ee 4e048354 3903b3c2 a7672661 d06016f7 4969474d 3e6e77db aed16a4a d9d65adc 40df0b66 37d83bf0 a9bcae53 debb9ec5 47b2cf7f 30b5ffe9 bdbdf21c cabac28a 53b39330 24b4a3a6 bad03605 cdd70693 54de5729 23d967bf b3667a2e c4614ab8 5d681b02 2a6f2b94 b40bbe37 c30c8ea1 5a05df1b 2d02ef8d 86325 23 732a255b 5b0d5d 42756c25 0 4b756c25 4269 4d756c25 4269 47756c25 4269 30207325 2d782578 78257830 20 d202020 0 72572020 3a657469 0 52202020 3a646165 0 736d654d 64656570 20746120 70257830 2820 2e2e2e29 a 72572020 20657469 65657073 203a64 732f 52202020 20646165 65657073 203a64 746d654d 20747365 30207461 20702578 28 75622020 72652073 73726f72 2520203a 6c252f64 a64 64612020 65207264 726f7272 25203a73 6c252f64 a64 61642020 65206174 726f7272 25203a73 6c252f64 a64 746d654d 20747365 a4f4b 746d654d 20747365 a4b4f 4c554e3c 3e4c 0 f0003020 f0003018 10000000 10000010 10000020 10000030 10000040 10000050 10000060 10000070 10000080 10000090 100000a0 100000b0 100000c0 100000d0 100000e0 1348 65f8 6600 0 4c74 6610 6620 0 1238 6630 6644 0 13c4 665c 6660 0 130c 6690 6698 0 1240 66b4 66bc 0 17d8 67fc 6808 2 1724 681c 6828 2 156c 683c 6848 2 1474 685c 6868 2 166c 687c 6888 2 ed0 689c 68a8 1 b94 68bc 68c8 1 18c0 68e0 68e8 1 18d0 68f0 68fc 5 1 0 9f19f473 ================================================ FILE: src/litex_linux/mem_1.init ================================================ ================================================ FILE: src/litex_linux/mem_2.init ================================================ 4c 69 74 65 58 20 53 6f 43 20 6f 6e 20 55 4c 58 33 53 20 32 30 32 30 2d 31 31 2d 31 31 20 30 39 3a 34 33 3a 33 34 0 ================================================ FILE: src/litex_linux/top.config ================================================ .device LFE5U-25F .comment Part: LFE5U-25F-6CABGA256 .tile CIB_R10C1:CIB_LR arc: E1_H02E0601 E3_H06W0303 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 E3_H06W0303 .tile CIB_R10C71:CIB_LR arc: N1_V01N0001 N3_V06S0003 arc: S3_V06S0103 H06E0103 .tile CIB_R11C1:CIB_LR arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 .tile CIB_R11C71:CIB_LR arc: H00R0000 W1_H02E0601 arc: JA0 H00R0000 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0103 N3_V06S0003 arc: W3_H06W0203 V06N0203 enum: CIB.JB0MUX 0 .tile CIB_R12C1:CIB_LR arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 E1_H01W0000 arc: S3_V06S0003 E3_H06W0003 .tile CIB_R12C71:CIB_LR arc: S1_V02S0501 H06E0303 arc: S3_V06S0103 N3_V06S0103 .tile CIB_R13C10:CIB_DSP arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N3_V06S0103 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 H06W0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V01N0101 arc: E1_H02E0301 W3_H06E0003 .tile CIB_R13C11:CIB_DSP arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 W1_H02E0401 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 E1_H02W0601 arc: W1_H02W0301 V02N0301 arc: E1_H02E0101 W3_H06E0103 .tile CIB_R13C12:CIB_DSP arc: E1_H02E0701 V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 V01N0001 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N1_V01S0100 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V01N0101 arc: W3_H06W0303 V06S0303 .tile CIB_R13C13:CIB_DSP arc: E1_H02E0501 V06N0303 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0101 H02W0101 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0301 V01N0101 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 .tile CIB_R13C14:CIB_DSP arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0501 V01N0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 N3_V06S0103 arc: W3_H06W0003 V06S0003 .tile CIB_R13C15:CIB_DSP arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 S1_V02N0301 arc: S1_V02S0501 V01N0101 arc: S3_V06S0103 N1_V02S0201 arc: N1_V02N0601 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 .tile CIB_R13C16:CIB_DSP arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 H06W0303 arc: W1_H02W0201 N3_V06S0103 .tile CIB_R13C17:CIB_DSP arc: E1_H02E0201 S1_V02N0201 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0301 E1_H02W0301 arc: W1_H02W0001 N1_V01S0000 .tile CIB_R13C18:CIB_DSP arc: E1_H02E0101 V06S0103 arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0101 H02W0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 V01N0001 arc: V01S0000 N3_V06S0103 arc: E3_H06E0003 W3_H06E0303 .tile CIB_R13C19:CIB_DSP arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 S3_V06N0203 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N3_V06S0303 arc: N1_V02N0401 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 .tile CIB_R13C1:CIB_LR_S arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 E3_H06W0303 .tile CIB_R13C20:CIB_DSP arc: E1_H02E0701 N3_V06S0203 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02E0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0501 N1_V02S0501 .tile CIB_R13C21:CIB_DSP arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 .tile CIB_R13C22:CIB_DSP arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0601 V06S0303 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 S3_V06N0103 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V02S0101 arc: S1_V02S0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 .tile CIB_R13C23:CIB_DSP arc: E1_H02E0001 W1_H02E0501 arc: E3_H06E0303 W1_H02E0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 H06W0203 .tile CIB_R13C24:CIB_DSP arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H06W0303 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 N1_V01S0100 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 .tile CIB_R13C25:CIB_DSP arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 S3_V06N0203 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0101 H06E0103 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0303 N1_V01S0100 arc: W1_H02W0001 S1_V02N0001 arc: E1_H01E0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 .tile CIB_R13C26:CIB_DSP arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 V06S0303 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 V01N0101 arc: S3_V06S0203 N3_V06S0203 arc: W3_H06W0203 N3_V06S0203 .tile CIB_R13C27:CIB_DSP arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02E0601 arc: W1_H02W0501 V06S0303 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0303 V06S0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 .tile CIB_R13C28:CIB_DSP arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 V06S0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: W1_H02W0001 V02S0001 arc: E3_H06E0203 W3_H06E0203 .tile CIB_R13C29:CIB_DSP arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: W1_H02W0401 E1_H02W0101 arc: E3_H06E0303 W3_H06E0303 .tile CIB_R13C2:CIB_DSP arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 .tile CIB_R13C30:CIB_DSP arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S3_V06N0203 arc: W1_H02W0101 N3_V06S0103 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 .tile CIB_R13C31:CIB_DSP arc: E1_H02E0501 S1_V02N0501 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S3_V06N0303 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 .tile CIB_R13C32:CIB_DSP arc: E3_H06E0203 S3_V06N0203 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S3_V06S0103 N1_V02S0101 .tile CIB_R13C33:CIB_DSP arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0401 N1_V02S0101 arc: W1_H02W0601 N1_V02S0601 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 .tile CIB_R13C34:CIB_DSP arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V06S0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 .tile CIB_R13C35:CIB_DSP arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 S1_V02N0301 arc: E3_H06E0003 W3_H06E0303 .tile CIB_R13C36:CIB_DSP arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S3_V06N0103 arc: E3_H06E0003 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0601 H06W0303 arc: S3_V06S0203 N1_V01S0000 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N1_V01S0100 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 .tile CIB_R13C37:CIB_DSP arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 S3_V06N0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0501 V06N0303 arc: E1_H02E0101 W3_H06E0103 arc: W3_H06W0303 N3_V06S0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 .tile CIB_R13C38:CIB_DSP arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0103 N1_V01S0100 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 V01N0101 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0303 N1_V02S0501 arc: W1_H02W0301 S1_V02N0301 arc: E3_H06E0203 W3_H06E0203 .tile CIB_R13C39:CIB_DSP arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V01N0101 arc: E3_H06E0003 S3_V06N0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 V01N0101 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H06E0103 arc: S1_V02S0701 S3_V06N0203 arc: W1_H02W0701 V02N0701 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0303 N1_V01S0100 arc: E3_H06E0103 W3_H06E0003 .tile CIB_R13C3:CIB_DSP arc: N1_V02N0001 H06W0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 .tile CIB_R13C40:CIB_DSP arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0303 V06S0303 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H01W0000 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 H02E0301 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 .tile CIB_R13C41:CIB_DSP arc: E1_H02E0201 S1_V02N0201 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 W1_H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 .tile CIB_R13C42:CIB_DSP arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0203 W1_H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 V01N0101 arc: S3_V06S0103 N1_V02S0201 arc: V01S0100 S3_V06N0303 arc: N1_V02N0601 W3_H06E0303 .tile CIB_R13C43:CIB_DSP arc: E1_H02E0001 V02N0001 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0203 S3_V06N0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 V01N0001 arc: S3_V06S0203 N1_V02S0701 arc: W1_H02W0601 N1_V01S0000 arc: E1_H01E0101 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0303 W3_H06E0303 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0303 V06S0303 arc: E3_H06E0103 W3_H06E0003 .tile CIB_R13C44:CIB_DSP arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0303 W1_H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: E1_H02E0401 W3_H06E0203 .tile CIB_R13C45:CIB_DSP arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 V06N0003 arc: E3_H06E0203 W1_H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 H06W0103 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: W1_H02W0001 V06S0003 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: W3_H06W0003 E1_H02W0301 arc: E3_H06E0103 W3_H06E0103 .tile CIB_R13C46:CIB_DSP arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 JQ6 arc: H01W0000 JQ7 arc: H01W0100 JQ4 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 JQ5 arc: W1_H02W0101 V01N0101 arc: W1_H02W0501 N1_V01S0100 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0003 E1_H02W0301 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 .tile CIB_R13C47:CIB_DSP arc: E1_H01E0101 JQ7 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 W1_H02E0501 arc: H01W0000 JQ1 arc: H01W0100 JQ3 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 JQ6 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 JQ0 arc: S3_V06S0103 JQ2 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V01S0000 JQ5 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 H01E0001 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 V06N0203 arc: E3_H06E0003 W3_H06E0003 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA0MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA2MUX 0 .tile CIB_R13C48:CIB_DSP arc: E1_H01E0001 JQ2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V06N0303 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 V01N0001 arc: H00L0100 H02E0301 arc: H00R0100 S1_V02N0501 arc: H01W0000 JQ1 arc: H01W0100 JQ0 arc: JB6 V00T0000 arc: JB7 V02N0701 arc: JD6 H00L0100 arc: JD7 H00R0100 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 JQ3 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 JQ6 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 JQ7 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 JQ5 arc: V00T0000 V02S0601 arc: V01S0000 JQ4 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 E1_H02W0701 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0103 N1_V01S0100 arc: E3_H06E0303 W3_H06E0203 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC1MUX 0 .tile CIB_R13C49:CIB_DSP arc: E1_H01E0001 JQ7 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02N0001 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0701 arc: H01W0000 JQ6 arc: JB0 V02N0301 arc: JB1 H02W0101 arc: JB2 S1_V02N0301 arc: JB3 H02E0301 arc: JB4 H02E0101 arc: JB5 H00L0000 arc: JB6 H02W0301 arc: JB7 V00B0100 arc: JD0 S1_V02N0001 arc: JD1 V02N0201 arc: JD2 H00R0000 arc: JD3 V00T0100 arc: JD4 W1_H02E0201 arc: JD5 H02W0001 arc: JD6 V02N0401 arc: JD7 H00R0100 arc: JLSR1 V00B0000 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 JQ2 arc: S1_V02S0301 JQ3 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 JQ0 arc: S3_V06S0103 JQ1 arc: S3_V06S0203 JQ4 arc: S3_V06S0303 JQ5 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02E0501 arc: V00T0100 V02N0501 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 .tile CIB_R13C4:CIB_DSP arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 V06S0003 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0301 N1_V01S0100 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: W1_H02W0701 N3_V06S0203 .tile CIB_R13C50:CIB_DSP arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 V06N0303 arc: H00L0100 H02W0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0701 arc: JB0 S1_V02N0101 arc: JB1 V02S0301 arc: JB2 H01W0100 arc: JB3 V02N0301 arc: JB4 V02N0501 arc: JB5 H02E0101 arc: JB6 H02W0101 arc: JB7 V02N0701 arc: JCE3 E1_H02W0101 arc: JD0 S1_V02N0201 arc: JD1 H00R0000 arc: JD2 H01E0101 arc: JD3 V00B0100 arc: JD4 H02W0001 arc: JD5 H02E0201 arc: JD6 H00R0100 arc: JD7 H00L0100 arc: JLSR0 H02W0501 arc: JLSR1 V00B0000 arc: N1_V01N0001 JQ1 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 JQ0 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 H02W0701 arc: V01S0000 JQ2 arc: V01S0100 JQ3 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 enum: CIB.JA7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA3MUX 0 .tile CIB_R13C51:CIB_DSP arc: E1_H01E0001 JQ5 arc: E1_H01E0101 JF3 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 JQ6 arc: E3_H06E0103 JQ2 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0701 arc: H01W0000 JF0 arc: H01W0100 JQ4 arc: JB0 H02W0301 arc: JB1 V00T0000 arc: JB2 H00R0100 arc: JB3 N1_V02S0101 arc: JB4 V00B0100 arc: JB5 V02N0701 arc: JB6 W1_H02E0301 arc: JB7 E1_H02W0301 arc: JCE0 H00R0000 arc: JD0 V02N0001 arc: JD1 V00T0100 arc: JD2 H02W0201 arc: JD3 S1_V02N0001 arc: JD4 V02N0401 arc: JD5 V01N0001 arc: JD6 E1_H02W0001 arc: JD7 H00L0100 arc: JLSR0 E1_H02W0501 arc: JLSR1 E1_H02W0501 arc: N1_V01N0001 JF6 arc: N1_V01N0101 JF7 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 JQ0 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 JF2 arc: S1_V02S0301 JQ1 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 JF5 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 JQ3 arc: S3_V06S0103 JF1 arc: S3_V06S0203 JF4 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02E0301 arc: V01S0000 JQ7 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 S3_V06N0203 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0201 W3_H06E0103 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 N3_V06S0103 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA0MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA3MUX 0 .tile CIB_R13C52:CIB_DSP arc: E1_H01E0001 JQ5 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: H00L0100 N1_V02S0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0501 arc: H01W0100 JF3 arc: JB0 H00R0100 arc: JB1 V02N0301 arc: JB2 S1_V02N0101 arc: JB3 N1_V02S0301 arc: JB4 V00B0100 arc: JB5 N1_V02S0701 arc: JB6 V00T0000 arc: JB7 H02W0101 arc: JD0 S1_V02N0201 arc: JD1 V00T0100 arc: JD2 W1_H02E0201 arc: JD3 H00R0000 arc: JD4 V00B0000 arc: JD5 S1_V02N0601 arc: JD6 H00L0100 arc: JD7 V01N0001 arc: JLSR1 H02W0501 arc: N1_V01N0001 JF4 arc: N1_V01N0101 JQ0 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 JF2 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 JF0 arc: S1_V02S0301 JQ3 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 JF7 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 JF5 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 JF1 arc: S3_V06S0203 JQ4 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 S1_V02N0501 arc: V01S0000 JF6 arc: V01S0100 JQ1 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 V06N0303 arc: E1_H02E0101 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA3MUX 0 .tile CIB_R13C53:CIB_DSP arc: E1_H01E0001 JQ0 arc: E1_H01E0101 JQ4 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 JQ6 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0203 JQ7 arc: H00L0000 H02W0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02E0701 arc: H01W0000 JF3 arc: JB2 H00L0000 arc: JB3 H01W0100 arc: JB4 W1_H02E0101 arc: JB5 N1_V02S0701 arc: JB6 V00B0000 arc: JB7 W1_H02E0301 arc: JD2 W1_H02E0001 arc: JD3 H00R0000 arc: JD4 N1_V02S0401 arc: JD5 H00R0100 arc: JD6 W1_H02E0201 arc: JD7 V02N0601 arc: JLSR0 V00B0100 arc: JLSR1 V00B0100 arc: N1_V01N0001 JF7 arc: N1_V01N0101 JQ2 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 JF1 arc: S1_V02S0201 JF2 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 JF5 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 JQ3 arc: S3_V06S0103 JQ1 arc: S3_V06S0203 JF4 arc: S3_V06S0303 JF6 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0301 arc: V01S0000 N3_V06S0103 arc: V01S0100 JF0 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 JQ5 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 .tile CIB_R13C54:CIB_DSP arc: E1_H01E0101 JF6 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 JQ5 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0501 arc: H01W0100 JF2 arc: JB0 V02S0101 arc: JB1 H02E0301 arc: JB2 H00R0100 arc: JB3 W1_H02E0301 arc: JB4 S1_V02N0501 arc: JB5 N1_V02S0501 arc: JB6 V00T0000 arc: JB7 H02W0101 arc: JD0 H02E0201 arc: JD1 N1_V02S0001 arc: JD2 H00R0000 arc: JD3 V00B0100 arc: JD4 W1_H02E0201 arc: JD5 V00B0000 arc: JD6 H02W0201 arc: JD7 H00L0100 arc: N1_V01N0001 JQ2 arc: N1_V01N0101 JQ0 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 JQ3 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 JF7 arc: S3_V06S0003 JF0 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 JF5 arc: V00B0000 H02E0601 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0001 arc: V01S0000 JQ4 arc: V01S0100 JF3 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: W3_H06W0103 JF1 arc: W3_H06W0203 JF4 arc: E3_H06E0003 W3_H06E0303 enum: CIB.JA7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA3MUX 0 .tile CIB_R13C55:CIB_DSP arc: E1_H01E0001 JF4 arc: E1_H01E0101 JF6 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S3_V06N0003 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 H02E0001 arc: H00R0100 V02N0701 arc: H01W0000 JF7 arc: H01W0100 E3_H06W0303 arc: JB0 H00R0100 arc: JB1 V02N0101 arc: JB2 V02S0101 arc: JB4 H02E0301 arc: JB5 H00L0000 arc: JB6 S1_V02N0501 arc: JB7 W1_H02E0101 arc: JCE0 H02E0101 arc: JCE1 H02E0101 arc: JCE2 H02E0101 arc: JCE3 H02E0101 arc: JD0 V02S0001 arc: JD1 V02S0201 arc: JD3 V00B0100 arc: JD4 W1_H02E0001 arc: JD5 V02N0601 arc: JD6 H02W0201 arc: JD7 H02E0201 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 JF5 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H01E0101 arc: V00B0100 V02S0101 arc: V01S0000 JQ0 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 N1_V02S0701 arc: W1_H02W0601 W3_H06E0303 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R13C56:CIB_DSP arc: E1_H01E0001 JF3 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: H00L0000 H02W0201 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0401 arc: H01W0000 JF4 arc: JB0 V00T0000 arc: JB1 V00B0000 arc: JB2 E1_H02W0301 arc: JB3 H02E0101 arc: JB4 H00L0000 arc: JB5 S1_V02N0501 arc: JB6 E1_H02W0101 arc: JB7 V00B0100 arc: JD0 V02S0001 arc: JD1 H00R0000 arc: JD2 V02N0001 arc: JD3 S1_V02N0201 arc: JD4 H02E0201 arc: JD5 N1_V02S0401 arc: JD6 H00L0100 arc: JD7 V02S0401 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 JF7 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 JF5 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 H06E0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0401 arc: V01S0000 JF2 arc: V01S0100 JF6 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 JF1 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: W3_H06W0003 JF0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA3MUX 0 .tile CIB_R13C57:CIB_DSP arc: E1_H01E0001 JF6 arc: E1_H02E0001 V01N0001 arc: H00L0000 S1_V02N0001 arc: H01W0000 JF2 arc: JB0 V00T0000 arc: JB1 H02E0301 arc: JB2 H02E0101 arc: JB3 S1_V02N0301 arc: JB5 H00L0000 arc: JD0 W1_H02E0001 arc: JD1 E1_H02W0201 arc: JD2 V00T0100 arc: JD3 V02N0201 arc: JD4 V00B0000 arc: JLSR0 H02W0501 arc: JLSR1 H02W0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 JF4 arc: S1_V02S0701 JF5 arc: S3_V06S0003 JF3 arc: S3_V06S0103 JF1 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 JF0 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 JF7 arc: W1_H02W0601 V06N0303 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA3MUX 0 .tile CIB_R13C58:CIB_DSP arc: E1_H01E0001 JF2 arc: E1_H01E0101 JF0 arc: H01W0000 JF4 arc: H01W0100 JF7 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0401 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 JF5 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 E1_H01W0100 arc: V01S0100 JF3 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 JF6 arc: W1_H02W0701 S3_V06N0203 arc: S1_V02S0601 W3_H06E0303 arc: W3_H06W0103 JF1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 .tile CIB_R13C59:CIB_DSP arc: H01W0000 JF3 arc: H01W0100 JF2 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 JF4 arc: S3_V06S0303 JF5 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 JF1 arc: W3_H06W0003 JF0 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 .tile CIB_R13C5:CIB_DSP arc: E3_H06E0103 V06S0103 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02W0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0501 V01N0101 .tile CIB_R13C60:CIB_DSP arc: N1_V02N0001 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: W1_H02W0501 S3_V06N0303 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 .tile CIB_R13C61:CIB_DSP arc: W3_H06W0303 E3_H06W0203 .tile CIB_R13C65:CIB_DSP arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 .tile CIB_R13C67:CIB_DSP arc: W3_H06W0203 S3_V06N0203 .tile CIB_R13C69:CIB_DSP arc: E1_H02E0601 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V01S0100 N3_V06S0303 .tile CIB_R13C6:CIB_DSP arc: E1_H02E0701 V02S0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0303 .tile CIB_R13C70:CIB_DSP arc: E1_H02E0301 V02S0301 arc: S1_V02S0301 N3_V06S0003 .tile CIB_R13C71:CIB_LR_S arc: H00R0000 W1_H02E0601 arc: JA0 V02S0501 arc: JA3 N1_V02S0501 arc: JB0 V00B0000 arc: JB3 H00R0000 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 H02E0301 arc: JLSR1 H02E0301 arc: N3_V06N0203 JF4 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 W1_H02E0601 arc: S1_V02S0501 W3_H06E0303 arc: W3_H06W0203 JQ4 .tile CIB_R13C7:CIB_DSP arc: E1_H02E0501 V06S0303 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 .tile CIB_R13C8:CIB_DSP arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 H02W0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0303 V06S0303 .tile CIB_R13C9:CIB_DSP arc: E1_H02E0401 V01N0001 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0301 H02W0301 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0303 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02N0701 .tile CIB_R14C71:CIB_LR arc: H00L0100 H02E0301 arc: JA0 H00L0100 arc: JA3 V02S0501 arc: JB0 W1_H02E0301 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 H02E0501 arc: JLSR1 H02E0501 arc: N3_V06N0203 JF4 arc: S3_V06S0003 N3_V06S0003 enum: CIB.JB3MUX 0 .tile CIB_R15C1:CIB_LR arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V02S0701 .tile CIB_R15C71:CIB_LR arc: S3_V06S0003 N3_V06S0303 .tile CIB_R16C1:CIB_LR arc: E1_H02E0601 E3_H06W0303 arc: N1_V02N0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 .tile CIB_R16C71:CIB_LR arc: S3_V06S0203 N3_V06S0103 .tile CIB_R17C1:CIB_LR arc: E1_H02E0301 E3_H06W0003 arc: S3_V06S0003 H06W0003 .tile CIB_R17C71:CIB_LR arc: JA0 W1_H02E0701 arc: S1_V02S0501 H02E0501 arc: S3_V06S0203 N3_V06S0103 enum: CIB.JB0MUX 0 .tile CIB_R18C1:CIB_LR arc: S3_V06S0003 N3_V06S0003 .tile CIB_R18C71:CIB_LR arc: S3_V06S0203 N3_V06S0103 arc: S1_V02S0201 W3_H06E0103 .tile CIB_R19C1:CIB_LR arc: E1_H02E0301 V06S0003 arc: S3_V06S0003 N3_V06S0303 .tile CIB_R19C71:CIB_LR arc: JA3 N1_V02S0501 arc: S3_V06S0203 N3_V06S0103 enum: CIB.JB3MUX 0 .tile CIB_R1C15:CIB arc: E3_H06E0003 V06N0003 arc: E3_H06E0203 V06N0203 .tile CIB_R1C17:CIB arc: S1_V02S0201 V01N0001 .tile CIB_R1C19:CIB arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: V01S0000 S3_V06N0103 .tile CIB_R1C21:CIB arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 .tile CIB_R1C23:CIB arc: S1_V02S0301 H06W0003 .tile CIB_R1C24:CIB arc: S1_V02S0001 H02W0001 .tile CIB_R1C25:CIB arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 .tile CIB_R1C26:CIB arc: W3_H06W0003 S3_V06N0003 .tile CIB_R1C27:CIB arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 .tile CIB_R1C28:CIB arc: E1_H02E0301 S3_V06N0003 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 S3_V06N0203 .tile CIB_R1C29:CIB arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 S3_V06N0103 .tile CIB_R1C30:CIB arc: E1_H02E0201 E3_H06W0103 arc: E3_H06E0003 W1_H02E0301 .tile CIB_R1C31:CIB arc: S1_V02S0201 H02E0201 .tile CIB_R1C33:CIB arc: S1_V02S0701 S3_V06N0203 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 .tile CIB_R1C34:CIB arc: S1_V02S0601 H02W0601 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 .tile CIB_R1C35:CIB arc: E1_H02E0601 V06N0303 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 S3_V06N0303 arc: V01S0100 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 .tile CIB_R1C36:CIB arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 H02E0601 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 .tile CIB_R1C37:CIB arc: E1_H02E0201 S1_V02N0201 .tile CIB_R1C38:CIB arc: H00L0000 H02E0201 arc: JA0 H00L0000 arc: S1_V02S0101 V01N0101 arc: S1_V02S0601 H02W0601 enum: CIB.JB0MUX 0 .tile CIB_R1C39:CIB arc: W1_H02W0601 S3_V06N0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 .tile CIB_R1C40:CIB arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 .tile CIB_R1C41:CIB arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 .tile CIB_R1C42:CIB arc: W3_H06W0003 JQ0 arc: E3_H06E0003 W3_H06E0003 .tile CIB_R1C44:CIB arc: E3_H06E0103 V06N0103 .tile CIB_R1C45:CIB arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 .tile CIB_R1C46:CIB arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 .tile CIB_R1C47:CIB arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 .tile CIB_R1C48:CIB arc: E3_H06E0003 W3_H06E0003 .tile CIB_R1C49:CIB arc: JA0 H02W0501 enum: CIB.JB0MUX 0 .tile CIB_R1C4:CIB arc: S1_V02S0101 V01N0101 .tile CIB_R1C50:CIB arc: W1_H02W0501 V02N0501 arc: E3_H06E0103 W3_H06E0103 .tile CIB_R1C51:CIB arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 .tile CIB_R1C52:CIB arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 .tile CIB_R1C53:CIB arc: E1_H02E0701 W1_H02E0601 arc: H00L0100 W1_H02E0301 arc: JA0 H00L0100 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 enum: CIB.JB0MUX 0 .tile CIB_R1C54:CIB arc: JA0 H02E0701 arc: E3_H06E0103 W3_H06E0003 enum: CIB.JB0MUX 0 .tile CIB_R1C55:CIB arc: E1_H02E0601 W1_H02E0301 .tile CIB_R1C56:CIB arc: H00R0000 H02E0601 arc: JA0 H00R0000 arc: JCLK0 G_HPBX0000 arc: JLSR0 V00B0100 arc: V00B0100 E1_H02W0701 arc: E3_H06E0103 W3_H06E0103 enum: CIB.JB0MUX 0 .tile CIB_R1C58:CIB arc: E1_H02E0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 .tile CIB_R1C59:CIB arc: E1_H02E0701 W3_H06E0203 .tile CIB_R1C60:CIB arc: JA0 H02E0701 arc: JCLK0 G_HPBX0000 arc: JLSR0 V00B0000 arc: V00B0000 W1_H02E0401 arc: E3_H06E0203 W3_H06E0103 enum: CIB.JB0MUX 0 .tile CIB_R1C62:CIB arc: E3_H06E0203 W3_H06E0103 .tile CIB_R1C64:CIB arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 .tile CIB_R1C65:CIB arc: JA0 H02W0701 arc: JCLK0 G_HPBX0000 arc: JLSR0 H02E0501 enum: CIB.JB0MUX 0 .tile CIB_R1C66:CIB arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V02N0701 arc: JA0 E1_H02W0701 arc: JCLK0 G_HPBX0000 arc: JLSR0 W1_H02E0501 arc: W1_H02W0701 W3_H06E0203 enum: CIB.JB0MUX 0 .tile CIB_R1C67:CIB arc: H00L0000 V02N0201 arc: JA0 H00L0000 arc: JCLK0 G_HPBX0000 arc: JLSR0 H02E0501 enum: CIB.JB0MUX 0 .tile CIB_R1C68:CIB arc: JA0 W1_H02E0701 arc: JCLK0 G_HPBX0000 arc: JLSR0 W1_H02E0501 arc: W1_H02W0701 W3_H06E0203 enum: CIB.JB0MUX 0 .tile CIB_R1C70:CIB arc: S1_V02S0701 W3_H06E0203 .tile CIB_R1C7:CIB arc: S1_V02S0301 S3_V06N0003 arc: V01S0000 S3_V06N0103 .tile CIB_R20C71:CIB_LR arc: JA0 S1_V02N0701 arc: JA3 V00B0000 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 W1_H02E0301 arc: JLSR1 W1_H02E0301 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 N1_V02S0201 arc: W3_H06W0203 S3_V06N0203 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R21C1:CIB_LR arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V01N0001 .tile CIB_R21C71:CIB_LR arc: S3_V06S0103 N3_V06S0003 .tile CIB_R22C1:CIB_LR arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 E3_H06W0203 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 S3_V06N0203 .tile CIB_R22C71:CIB_LR arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0301 H02E0301 arc: W3_H06W0203 S3_V06N0203 .tile CIB_R23C1:CIB_LR arc: N1_V01N0001 N3_V06S0003 .tile CIB_R23C71:CIB_LR arc: H00L0100 V02S0301 arc: JA0 H00L0100 arc: JA3 V00T0000 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 H02E0301 arc: JLSR1 H02E0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 N3_V06S0203 arc: V00T0000 H02E0201 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R24C1:CIB_LR arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: N1_V02N0401 S1_V02N0101 arc: S3_V06S0003 N3_V06S0003 .tile CIB_R24C71:CIB_LR arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 H06E0303 arc: S3_V06S0203 N3_V06S0203 .tile CIB_R25C10:CIB_EBR arc: E1_H01E0001 JF7 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V02S0701 arc: H01W0000 JF6 arc: JB6 H02E0301 arc: JB7 V00B0100 arc: JD6 V00B0000 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0203 JQ7 arc: S1_V02S0001 V01N0001 arc: S1_V02S0701 H02W0701 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0101 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 JQ7 arc: W3_H06W0303 JQ6 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD7MUX 0 .tile CIB_R25C11:CIB_EBR arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V06S0203 arc: H00L0000 H02E0001 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0501 arc: H01W0000 JQ0 arc: H01W0100 JF2 arc: JA0 V02N0701 arc: JA1 H02E0701 arc: JA2 H02W0701 arc: JA3 N1_V02S0701 arc: JA5 V02S0101 arc: JB0 V00T0000 arc: JB1 S1_V02N0101 arc: JB3 W1_H02E0101 arc: JB5 H00R0000 arc: JB7 V00B0000 arc: JC2 N1_V01S0100 arc: JC3 H00L0000 arc: JC4 V00B0100 arc: JC6 V00B0100 arc: JCLK0 G_HPBX0000 arc: JD0 V01S0100 arc: JD1 E1_H02W0201 arc: JD2 V02N0001 arc: JD4 H00R0100 arc: JD6 W1_H02E0001 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H01E0001 arc: N1_V02N0701 JF7 arc: N3_V06N0003 JF0 arc: N3_V06N0203 JF4 arc: N3_V06N0303 JF5 arc: S3_V06S0003 JF3 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 JF1 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 JF0 arc: W3_H06W0103 JQ1 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 JF6 enum: CIB.JCE0MUX 1 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C12:CIB_EBR arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 V06S0303 arc: H00R0000 H02E0401 arc: H00R0100 V02S0701 arc: H01W0000 JF1 arc: JA4 V00T0000 arc: JA5 H02E0501 arc: JA6 V00T0100 arc: JA7 H00R0000 arc: JB1 V00B0000 arc: JB3 N1_V02S0301 arc: JB5 S1_V02N0701 arc: JB7 H02E0301 arc: JC4 V02S0001 arc: JC5 S1_V02N0201 arc: JC6 H02E0601 arc: JC7 E1_H02W0601 arc: JCE1 W1_H02E0101 arc: JCLK0 G_HPBX0000 arc: JD0 W1_H02E0201 arc: JD2 E1_H02W0201 arc: JD4 N1_V02S0601 arc: JD6 H00R0100 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 JF0 arc: N3_V06N0203 JF7 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 W1_H02E0401 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 JF5 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 JF3 arc: W3_H06W0103 JF2 arc: W3_H06W0203 JF4 arc: W3_H06W0303 JF6 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R25C13:CIB_EBR arc: E1_H01E0001 JF2 arc: E1_H01E0101 JF4 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 JQ2 arc: H00L0100 S1_V02N0301 arc: H00R0100 V02S0701 arc: H01W0000 JF1 arc: H01W0100 JF0 arc: JA0 V02N0701 arc: JA1 V02N0701 arc: JA2 E1_H02W0701 arc: JA3 E1_H02W0701 arc: JA5 V02N0301 arc: JB1 E1_H02W0301 arc: JB3 H00R0100 arc: JB4 H02W0301 arc: JB5 N1_V02S0701 arc: JB7 V02N0501 arc: JC2 H00L0100 arc: JC3 H00L0100 arc: JC4 V00B0100 arc: JC6 V00B0100 arc: JCLK0 G_HPBX0000 arc: JD0 E1_H02W0201 arc: JD1 V02S0201 arc: JD2 S1_V02N0001 arc: JD4 W1_H02E0201 arc: JD6 W1_H02E0001 arc: N1_V01N0001 JF6 arc: N1_V01N0101 JQ3 arc: N1_V02N0001 JQ0 arc: N1_V02N0101 JQ1 arc: N1_V02N0201 JF0 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 JF6 arc: N1_V02N0501 JF5 arc: N1_V02N0601 JQ4 arc: N1_V02N0701 JF7 arc: N3_V06N0003 JF3 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 JQ5 arc: S1_V02S0501 JF5 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N3_V06S0303 arc: V00B0100 V02N0301 arc: V01S0000 JF7 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0501 E1_H02W0401 enum: CIB.JCE0MUX 1 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C14:CIB_EBR arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 W1_H02E0501 arc: H01W0100 JF4 arc: JA0 H00L0100 arc: JA1 H00R0000 arc: JA4 V00T0100 arc: JA5 V02S0101 arc: JA6 H00R0000 arc: JA7 V00T0100 arc: JB1 V02N0101 arc: JB3 H00R0100 arc: JB5 V02N0701 arc: JB7 H02E0301 arc: JC0 H00L0000 arc: JC1 H02E0601 arc: JC4 H02E0601 arc: JC5 V00B0100 arc: JC6 V00B0100 arc: JC7 N1_V02S0201 arc: JCLK0 G_HPBX0000 arc: JD0 W1_H02E0001 arc: JD2 W1_H02E0201 arc: JD4 V02N0601 arc: JD6 V02N0401 arc: N1_V01N0001 JF5 arc: N1_V02N0001 JF0 arc: N1_V02N0101 JF3 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 JF1 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 JF6 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 JF2 arc: N3_V06N0203 JF7 arc: N3_V06N0303 JF5 arc: S3_V06S0103 N1_V02S0101 arc: V00B0100 V02S0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 JF2 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 N3_V06S0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R25C15:CIB_EBR arc: E1_H02E0401 V06S0203 arc: E3_H06E0003 JQ3 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ5 arc: H00L0000 H02W0201 arc: H00R0100 H02W0701 arc: JA0 H00L0000 arc: JA2 V02N0701 arc: JA6 V00T0100 arc: JB1 V00B0000 arc: JC1 H00R0100 arc: JC3 H02W0401 arc: JD0 W1_H02E0201 arc: N1_V02N0201 JF0 arc: N1_V02N0301 JF1 arc: N1_V02N0401 N1_V01S0000 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 JQ2 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ6 arc: S1_V02S0001 H02W0001 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 W1_H02E0401 arc: V00T0100 H02W0301 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02N0701 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C16:CIB_EBR arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 JQ2 arc: H00R0100 S1_V02N0701 arc: JA0 H02W0501 arc: JA4 V02S0101 arc: JA6 W1_H02E0501 arc: JC1 H02W0401 arc: JC5 V00B0100 arc: JC7 H02E0401 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: N1_V02N0101 H06E0103 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ1 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: V00B0100 W1_H02E0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R25C17:CIB_EBR arc: E1_H02E0101 V02S0101 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 JQ6 arc: N1_V01N0001 JQ7 arc: N1_V01N0101 JQ5 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0601 H02E0601 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H02E0201 arc: S1_V02S0701 N1_V02S0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0203 E3_H06W0203 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R25C18:CIB_EBR arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JQ4 arc: JA0 H02E0701 arc: JA2 V00B0000 arc: JA6 S1_V02N0301 arc: JC1 W1_H02E0401 arc: JC3 S1_V02N0401 arc: N1_V01N0001 JQ1 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 JQ3 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02N0001 arc: W3_H06W0103 E3_H06W0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C19:CIB_EBR arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0203 JQ7 arc: H00L0100 H02W0301 arc: H00R0000 H02E0401 arc: JA0 H02E0701 arc: JA1 H00R0000 arc: JA2 V00T0000 arc: JA3 H00L0100 arc: JA4 V00T0100 arc: JA5 W1_H02E0501 arc: JCE1 W1_H02E0101 arc: JCLK0 G_HPBX0000 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0501 H02E0501 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 JQ6 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 H02W0401 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 H02E0001 arc: V00T0100 H02W0101 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R25C1:CIB_LR_S arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0301 N3_V06S0003 .tile CIB_R25C20:CIB_EBR arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JQ4 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: JA0 H00R0000 arc: JA2 V00B0000 arc: JA6 V00T0100 arc: JC1 H02E0401 arc: JC3 H00R0100 arc: N1_V01N0001 JQ3 arc: N1_V01N0101 JQ6 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H02E0201 arc: N3_V06N0103 JQ1 arc: N3_V06N0303 JQ5 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0501 V01N0101 arc: V00B0000 W1_H02E0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0103 V06S0103 arc: W3_H06W0303 E3_H06W0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C21:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 V01N0001 arc: H00L0100 H02E0101 arc: H00R0100 S1_V02N0501 arc: JA0 W1_H02E0501 arc: JA4 H02E0501 arc: JA6 V00T0100 arc: JC1 H00L0100 arc: JC5 N1_V02S0001 arc: JC7 V02S0001 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00T0100 H02E0301 arc: W1_H02W0101 N3_V06S0103 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0203 N1_V01S0000 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R25C22:CIB_EBR arc: E1_H01E0001 JQ2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 JQ0 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ5 arc: H00L0000 S1_V02N0001 arc: H00R0000 N1_V02S0601 arc: JA0 V02N0701 arc: JA2 V00T0000 arc: JA6 H00R0000 arc: JC1 S1_V02N0401 arc: JC3 H00L0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0003 JQ3 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ6 arc: S1_V02S0101 N1_V02S0001 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 JQ1 arc: S3_V06S0303 N1_V02S0601 arc: V00T0000 H02E0201 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0103 W3_H06E0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C23:CIB_EBR arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 JQ0 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02W0401 arc: H00R0100 N1_V02S0701 arc: JA0 H00R0000 arc: JA4 V00T0000 arc: JA6 V00T0100 arc: JC1 H00L0000 arc: JC5 V02N0001 arc: JC7 V00B0100 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 N1_V02S0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 S3_V06N0003 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0003 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R25C24:CIB_EBR arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0303 H01E0101 arc: H00R0000 H02W0601 arc: H01W0100 JQ6 arc: JA0 W1_H02E0701 arc: JA1 W1_H02E0701 arc: JA2 H02E0701 arc: JA3 H02E0701 arc: JA6 N1_V02S0101 arc: JA7 N1_V02S0101 arc: JB3 V02S0101 arc: JB5 V00B0100 arc: JB7 N1_V02S0501 arc: JC0 V02S0601 arc: JC1 V02S0601 arc: JC2 H02E0401 arc: JC3 H02E0401 arc: JCLK0 G_HPBX0000 arc: JD2 H00R0000 arc: JD4 V00B0000 arc: JD6 H02E0001 arc: JLSR1 E1_H02W0301 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 JQ7 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ2 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ5 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02E0601 arc: V00B0100 V02S0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02S0701 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C25:CIB_EBR arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 V06S0203 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W1_H02E0701 arc: H00L0100 W1_H02E0101 arc: JA0 W1_H02E0501 arc: JA1 W1_H02E0501 arc: JA4 V00T0000 arc: JA5 V00T0000 arc: JA6 V02N0101 arc: JA7 V02N0101 arc: JB1 H02E0301 arc: JC0 H00L0100 arc: JC1 H00L0100 arc: JC4 V00B0100 arc: JC5 V00B0100 arc: JC6 H02E0601 arc: JC7 H02E0601 arc: JCLK0 G_HPBX0000 arc: JD0 H02E0001 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ1 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S3_V06S0003 N3_V06S0003 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0201 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V06S0203 arc: E3_H06E0303 W3_H06E0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R25C26:CIB_EBR arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 V01N0001 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 E1_H02W0201 arc: H00R0100 N1_V02S0701 arc: H01W0000 JQ5 arc: JB5 H00L0000 arc: JB7 W1_H02E0101 arc: JD4 H00R0100 arc: JD6 H02W0001 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ6 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 JQ5 arc: W1_H02W0301 V06S0003 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0103 W3_H06E0103 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R25C27:CIB_EBR arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: H00L0000 V02N0201 arc: H00L0100 H02E0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0501 arc: JA0 V01N0101 arc: JA1 N1_V02S0501 arc: JA2 V02N0501 arc: JA3 V02S0701 arc: JA5 W1_H02E0501 arc: JB1 V00B0000 arc: JB3 V02N0101 arc: JB5 H00R0000 arc: JB7 H02E0301 arc: JC0 H02E0401 arc: JC1 H00L0000 arc: JC2 H00L0100 arc: JC3 H02W0401 arc: JC4 V00B0100 arc: JCLK0 G_HPBX0000 arc: JD0 H02E0201 arc: JD2 H02W0001 arc: JD4 H00R0100 arc: JD6 W1_H02E0201 arc: JLSR1 W1_H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 JQ4 arc: N1_V02N0001 JQ0 arc: N1_V02N0101 JQ1 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 JQ5 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ2 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ6 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 .tile CIB_R25C28:CIB_EBR arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00L0100 V02S0101 arc: H00R0100 E1_H02W0701 arc: JA0 W1_H02E0501 arc: JA1 H00L0000 arc: JA2 V00B0000 arc: JA3 W1_H02E0701 arc: JA4 V02N0101 arc: JA5 V02S0301 arc: JC0 V02N0401 arc: JC1 V02N0601 arc: JC2 H02E0601 arc: JC3 E1_H01W0000 arc: JC4 H02E0401 arc: JC5 E1_H02W0601 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: JD0 V02S0001 arc: JD1 N1_V02S0201 arc: JD6 H00L0100 arc: JD7 N1_V02S0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 JQ1 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ6 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02W0601 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R25C29:CIB_EBR arc: E1_H01E0101 JQ7 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ6 arc: H00L0000 V02N0201 arc: H00L0100 H02E0101 arc: H00R0100 E1_H02W0501 arc: H01W0100 JQ2 arc: JA0 W1_H02E0701 arc: JA1 N1_V02S0701 arc: JA2 W1_H02E0501 arc: JA3 H00L0100 arc: JA5 V00T0100 arc: JB1 H02W0101 arc: JB3 S1_V02N0301 arc: JB5 W1_H02E0301 arc: JB7 H02W0301 arc: JC0 H02E0601 arc: JC1 H00L0000 arc: JC2 N1_V01N0001 arc: JC3 V02S0401 arc: JC4 V00T0100 arc: JCLK0 G_HPBX0000 arc: JD0 V02S0001 arc: JD2 V00B0100 arc: JD4 V00B0000 arc: JD6 H00R0100 arc: JLSR1 V00T0100 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 JQ1 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 JQ3 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 JQ5 arc: N3_V06N0003 JQ0 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0301 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: H01W0000 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R25C2:CIB_EBR arc: N1_V02N0001 H06W0003 arc: N1_V02N0301 H02E0301 arc: S1_V02S0001 H02E0001 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 N3_V06S0103 .tile CIB_R25C30:CIB_EBR arc: E1_H01E0001 JQ0 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0401 V06S0203 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 H01E0101 arc: H00L0100 W1_H02E0301 arc: H00R0100 H02E0501 arc: JA0 H00L0100 arc: JA1 H02E0701 arc: JA4 V00T0000 arc: JA5 V00B0000 arc: JA6 E1_H02W0501 arc: JA7 V02N0101 arc: JB1 H00R0100 arc: JB3 V02S0301 arc: JB5 H02W0301 arc: JB7 H02E0101 arc: JC0 W1_H02E0401 arc: JC1 H02E0601 arc: JC4 V02N0201 arc: JC5 H02E0401 arc: JC6 N1_V02S0201 arc: JC7 S1_V02N0001 arc: JCE1 H02W0101 arc: JCLK0 G_HPBX0000 arc: JD0 V00T0100 arc: JD2 H02E0201 arc: JD4 V02S0601 arc: JD6 W1_H02E0001 arc: N1_V01N0001 JQ1 arc: N1_V01N0101 JQ5 arc: N1_V02N0001 JQ2 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 JQ3 arc: N1_V02N0401 JQ4 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 JQ5 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ6 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02E0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 V01N0101 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 .tile CIB_R25C31:CIB_EBR arc: E1_H02E0101 H01E0101 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 V06S0203 arc: E3_H06E0203 H01E0001 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06W0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V06S0303 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0203 V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 .tile CIB_R25C32:CIB_EBR arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0203 W1_H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N1_V02S0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0501 S1_V02N0501 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 .tile CIB_R25C33:CIB_EBR arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 JQ1 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 JQ2 arc: E3_H06E0303 JQ6 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: H01W0100 JQ7 arc: JA0 H00L0000 arc: JA1 H00L0100 arc: JA2 V00T0000 arc: JA3 V00B0000 arc: JA6 H02W0701 arc: JA7 H02W0501 arc: JB1 V02N0101 arc: JB3 W1_H02E0101 arc: JB5 V02S0701 arc: JB7 E1_H02W0101 arc: JC0 V02S0401 arc: JC1 H00R0100 arc: JC2 S1_V02N0401 arc: JC3 H02E0601 arc: JCLK0 G_HPBX0000 arc: JD0 V00B0100 arc: JD2 H00R0000 arc: JD4 N1_V02S0601 arc: JD6 H02E0001 arc: JLSR1 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 JQ0 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ5 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 V02N0601 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0501 S3_V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C34:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 H02W0201 arc: H00L0100 V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: JA0 H00R0000 arc: JA4 S1_V02N0101 arc: JA5 V02N0301 arc: JA7 V00T0100 arc: JC0 H00L0100 arc: JC1 H00L0000 arc: JC4 V00B0100 arc: JC5 V00T0000 arc: JC6 W1_H02E0401 arc: JC7 N1_V02S0001 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 V01N0101 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V06N0103 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 V02S0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R25C35:CIB_EBR arc: E1_H01E0001 JF4 arc: E1_H01E0101 JF6 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 JF2 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ5 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02N0301 arc: H00R0100 E1_H02W0501 arc: JA0 V02S0701 arc: JA1 H00L0000 arc: JA2 H02W0501 arc: JA3 H02W0701 arc: JA5 S1_V02N0101 arc: JB2 H02W0301 arc: JB4 N1_V02S0701 arc: JB5 V02S0501 arc: JB7 V00T0000 arc: JC2 H02W0601 arc: JC3 H00L0100 arc: JC4 V00B0100 arc: JC6 V00B0100 arc: JCLK0 G_HPBX0000 arc: JD2 V02N0201 arc: JD3 E1_H02W0001 arc: JD4 V00B0000 arc: JD5 H00R0100 arc: JD6 N1_V02S0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 JF3 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 JF7 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 JF5 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: V01S0100 JQ2 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JB3MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 .tile CIB_R25C36:CIB_EBR arc: E1_H01E0001 JF2 arc: E1_H01E0101 JF1 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 JF5 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 W1_H02E0001 arc: H00R0100 W1_H02E0501 arc: H01W0100 JF3 arc: JA4 V00T0000 arc: JA5 V02N0301 arc: JA6 H00L0000 arc: JA7 V02N0101 arc: JB1 N1_V02S0101 arc: JB3 H02E0101 arc: JB5 H02W0301 arc: JB7 H02E0301 arc: JC4 V00T0100 arc: JC5 H02E0401 arc: JC6 H02E0601 arc: JC7 S1_V02N0201 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: JD0 W1_H02E0201 arc: JD2 H02E0001 arc: JD4 H02E0201 arc: JD6 S1_V02N0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 JF4 arc: N1_V02N0701 JF7 arc: N3_V06N0003 JF0 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 JF6 arc: S1_V02S0001 V01N0001 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: V00T0000 V02S0601 arc: V00T0100 W1_H02E0301 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V02S0701 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0203 V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R25C37:CIB_EBR arc: E1_H01E0001 JQ6 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ5 arc: H00R0100 V02N0701 arc: H01W0000 JF0 arc: JB1 S1_V02N0101 arc: JB3 H00R0100 arc: JB5 H02E0301 arc: JB7 V00T0000 arc: JD0 H02E0201 arc: JD2 V00B0100 arc: JD4 V02S0601 arc: JD6 H02W0201 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 JF1 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 JF3 arc: N3_V06N0103 JF2 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V02S0101 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: N1_V02N0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C38:CIB_EBR arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 H01E0001 arc: H00L0000 V02S0001 arc: H00R0100 N1_V02S0701 arc: JA0 E1_H02W0501 arc: JA1 V02N0501 arc: JA2 V00T0000 arc: JA3 H02W0501 arc: JA6 H02W0701 arc: JA7 S1_V02N0101 arc: JB1 H00R0100 arc: JB3 N1_V02S0101 arc: JC0 H00L0000 arc: JC1 V02S0401 arc: JC2 H02W0601 arc: JC3 N1_V02S0601 arc: JCLK0 G_HPBX0000 arc: JD0 N1_V01S0000 arc: JD2 W1_H02E0001 arc: JLSR1 V00B0100 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 JQ2 arc: N1_V02N0101 JQ3 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: H01W0100 W3_H06E0303 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C39:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: H00L0100 V02N0101 arc: H00R0100 W1_H02E0501 arc: JA0 W1_H02E0701 arc: JA1 V02S0501 arc: JA2 N1_V02S0701 arc: JA3 V00T0000 arc: JA4 N1_V02S0101 arc: JC0 N1_V01S0100 arc: JC1 V02N0601 arc: JC2 E1_H02W0601 arc: JC3 W1_H02E0601 arc: JC4 V00T0100 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: JD6 V00B0000 arc: JD7 H00L0100 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00T0000 N1_V02S0601 arc: V00T0100 W1_H02E0101 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02S0701 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R25C3:CIB_EBR arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H06W0303 .tile CIB_R25C40:CIB_EBR arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 V02S0001 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: H01W0000 JQ4 arc: JA0 S1_V02N0501 arc: JA1 W1_H02E0501 arc: JA2 H00L0100 arc: JA3 E1_H02W0701 arc: JA6 H00R0000 arc: JA7 W1_H02E0701 arc: JB1 H02E0301 arc: JB3 V02S0101 arc: JB5 N1_V02S0701 arc: JC0 H00L0000 arc: JC1 V02S0601 arc: JC2 H02E0601 arc: JC3 W1_H02E0601 arc: JCLK0 G_HPBX0000 arc: JD0 W1_H02E0201 arc: JD2 H02E0001 arc: JD4 H00R0100 arc: JLSR1 V00B0000 arc: N1_V02N0001 JQ0 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 JQ2 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 JQ5 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0001 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 V06N0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C41:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 W1_H02E0201 arc: H00L0100 W1_H02E0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0501 arc: JA4 W1_H02E0501 arc: JA5 H02E0501 arc: JA6 H00R0000 arc: JA7 V00T0100 arc: JC0 H00L0000 arc: JC1 H00L0100 arc: JC4 V00B0100 arc: JC5 H02W0601 arc: JC6 V00T0000 arc: JC7 W1_H02E0401 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: V00B0100 W1_H02E0701 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V02N0701 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0103 V06N0103 arc: W3_H06W0303 E3_H06W0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R25C42:CIB_EBR arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ2 arc: E3_H06E0303 JQ5 arc: H00L0000 H02W0001 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 N1_V02S0701 arc: H01W0100 JQ6 arc: JA0 N1_V02S0501 arc: JA1 H00L0100 arc: JA2 V00T0000 arc: JA3 V02N0701 arc: JA6 H00R0000 arc: JA7 N1_V02S0101 arc: JB1 H00R0100 arc: JB3 H00L0000 arc: JB5 V02S0701 arc: JB7 V00B0000 arc: JC0 V02N0401 arc: JC1 W1_H02E0601 arc: JC2 V02S0401 arc: JC3 N1_V02S0401 arc: JCLK0 G_HPBX0000 arc: JD0 H02E0001 arc: JD2 V02S0201 arc: JD4 N1_V02S0601 arc: JD6 E1_H02W0001 arc: JLSR1 V00B0100 arc: N1_V01N0001 JQ7 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 JQ3 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 JQ1 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02E0201 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 S3_V06N0203 arc: E3_H06E0203 W3_H06E0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C43:CIB_EBR arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0501 arc: JA0 H00L0100 arc: JA4 V00B0000 arc: JA5 V00T0100 arc: JA7 H00R0000 arc: JC0 V02N0401 arc: JC1 H00R0100 arc: JC4 H02E0601 arc: JC5 V02S0001 arc: JC6 W1_H02E0601 arc: JC7 N1_V02S0201 arc: JCE1 W1_H02E0101 arc: JCLK0 G_HPBX0000 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 W1_H02E0401 arc: V00T0100 H02E0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 V01N0101 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V02N0701 arc: N1_V02N0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R25C44:CIB_EBR arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02W0001 arc: H00L0100 H02W0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: H01W0100 JQ4 arc: JA0 H00L0100 arc: JA1 H00L0100 arc: JA2 V00T0000 arc: JA3 V00T0000 arc: JA6 V00T0100 arc: JA7 V00T0100 arc: JB3 V02S0301 arc: JB5 H00L0000 arc: JB7 S1_V02N0701 arc: JC0 H02W0601 arc: JC1 H02W0601 arc: JC2 H00R0100 arc: JC3 H00R0100 arc: JCLK0 G_HPBX0000 arc: JD2 H00R0000 arc: JD4 S1_V02N0601 arc: JD6 V00B0000 arc: JLSR1 V00B0100 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 JQ5 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 JQ2 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ6 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C45:CIB_EBR arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 JQ0 arc: JA4 V00T0100 arc: JA5 V00T0100 arc: JA6 V02N0301 arc: JA7 V02N0301 arc: JB1 H02E0301 arc: JC4 V02S0001 arc: JC5 V02S0001 arc: JC6 V00B0100 arc: JC7 V00B0100 arc: JCLK0 G_HPBX0000 arc: JD0 H02E0001 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 JQ1 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 H06E0103 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 H02E0501 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0301 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R25C46:CIB_EBR arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 V01N0001 arc: H00L0000 V02S0001 arc: JB5 H00L0000 arc: JB7 V02S0701 arc: JD4 H02W0001 arc: JD6 H02W0201 arc: N1_V01N0001 JQ4 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 JQ5 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 H06W0103 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ6 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V06S0203 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R25C47:CIB_EBR arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 V06N0303 arc: H00L0000 W1_H02E0201 arc: H00R0100 S1_V02N0501 arc: H01W0000 JQ3 arc: H01W0100 JQ0 arc: JA0 H00L0000 arc: JA1 H00L0000 arc: JA2 V00T0000 arc: JA3 V00T0000 arc: JA6 H02W0701 arc: JA7 H02W0701 arc: JB1 V02S0301 arc: JB3 H02E0101 arc: JC0 H00R0100 arc: JC1 H00R0100 arc: JC2 E1_H02W0401 arc: JC3 E1_H02W0401 arc: JCLK0 G_HPBX0000 arc: JD0 V02S0001 arc: JD2 V00B0100 arc: JLSR1 V00B0000 arc: N1_V01N0001 JQ1 arc: N1_V01N0101 JQ2 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02W0401 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 H06E0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V01S0000 S3_V06N0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 V02N0501 arc: W3_H06W0203 V01N0001 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C48:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 N1_V01S0000 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: JA0 H02E0501 arc: JA1 V02N0701 arc: JA2 W1_H02E0501 arc: JA3 V00T0000 arc: JC0 H02E0401 arc: JC1 W1_H02E0401 arc: JC2 H00L0100 arc: JC3 H00L0000 arc: JCLK0 G_HPBX0000 arc: JD6 H02W0201 arc: JD7 V00B0000 arc: N1_V01N0001 JQ7 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 JQ6 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 E1_H02W0401 arc: V00T0000 H02E0001 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 V01N0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H01E0001 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R25C49:CIB_EBR arc: E1_H01E0001 JQ2 arc: E1_H01E0101 JQ4 arc: E1_H02E0001 JQ0 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V01N0001 arc: E3_H06E0203 V01N0001 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0101 arc: H00R0100 H02E0501 arc: H01W0000 JQ0 arc: H01W0100 JQ5 arc: JA0 E1_H02W0701 arc: JA1 E1_H02W0701 arc: JA2 V00B0000 arc: JA3 V00B0000 arc: JA6 H02W0701 arc: JA7 H02W0701 arc: JB1 H02E0101 arc: JB3 H00R0100 arc: JB5 H00L0000 arc: JC0 W1_H02E0601 arc: JC1 W1_H02E0601 arc: JC2 E1_H02W0401 arc: JC3 E1_H02W0401 arc: JCLK0 G_HPBX0000 arc: JD0 H02E0001 arc: JD2 V02N0201 arc: JD4 H00L0100 arc: JLSR1 H02E0301 arc: N1_V01N0001 JQ3 arc: N1_V01N0101 JQ1 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V01N0001 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0103 JQ1 arc: E3_H06E0103 W3_H06E0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C4:CIB_EBR arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0601 V02N0601 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0701 N3_V06S0203 arc: W1_H02W0601 N3_V06S0303 .tile CIB_R25C50:CIB_EBR arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 V01N0101 arc: JA4 V00T0100 arc: JA5 V00T0100 arc: JA6 V02N0301 arc: JA7 V02N0301 arc: JC4 H02E0401 arc: JC5 H02E0401 arc: JC6 V00B0100 arc: JC7 V00B0100 arc: JCLK0 G_HPBX0000 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 H01E0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 N1_V02S0301 arc: V00T0100 S1_V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 V02N0701 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R25C51:CIB_EBR arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 JQ2 arc: E3_H06E0303 JQ6 arc: JA0 S1_V02N0701 arc: JA1 S1_V02N0701 arc: JA2 V00B0000 arc: JA3 V00B0000 arc: JA6 H02W0701 arc: JA7 H02W0701 arc: JB1 V00T0000 arc: JB3 N1_V02S0301 arc: JB5 N1_V02S0701 arc: JB7 V00B0100 arc: JC0 H02E0601 arc: JC1 H02E0601 arc: JC2 N1_V02S0401 arc: JC3 N1_V02S0401 arc: JCLK0 G_HPBX0000 arc: JD0 H02W0001 arc: JD2 V00T0100 arc: JD4 H02W0201 arc: JD6 V02N0601 arc: JLSR1 H02W0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 JQ0 arc: N1_V02N0401 JQ4 arc: N1_V02N0501 JQ5 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 JQ7 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 JQ1 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0101 arc: W1_H02W0401 N1_V02S0401 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C52:CIB_EBR arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: H00R0000 H02W0601 arc: JA0 W1_H02E0701 arc: JA4 V02N0301 arc: JA5 W1_H02E0701 arc: JA7 H00R0000 arc: JC1 H02E0601 arc: JC4 H02E0601 arc: JC5 V00T0100 arc: JC6 V00T0100 arc: JCLK0 G_HPBX0000 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00T0100 H02W0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 V02N0701 arc: E3_H06E0003 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R25C53:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 JQ2 arc: E3_H06E0303 JQ6 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 H02E0501 arc: H01W0100 JQ4 arc: JA0 W1_H02E0701 arc: JA1 W1_H02E0701 arc: JA2 V00T0000 arc: JA3 V00T0000 arc: JA6 H02E0701 arc: JA7 H02E0701 arc: JB3 H00R0100 arc: JB5 V01S0000 arc: JB7 V00B0100 arc: JC0 H00L0100 arc: JC1 H00L0100 arc: JC2 H02W0401 arc: JC3 H02W0401 arc: JCLK0 G_HPBX0000 arc: JD2 H00R0000 arc: JD4 N1_V02S0401 arc: JD6 N1_V02S0601 arc: JLSR1 H02E0301 arc: N1_V01N0001 JQ5 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 JQ7 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0201 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 E1_H02W0301 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0001 W3_H06E0003 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 .tile CIB_R25C54:CIB_EBR arc: E1_H02E0101 JQ1 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 N3_V06S0303 arc: H01W0000 JQ0 arc: JA4 V00B0000 arc: JA5 V00B0000 arc: JA6 V00T0100 arc: JA7 V00T0100 arc: JB1 V02S0101 arc: JC4 V02S0001 arc: JC5 V02S0001 arc: JC6 N1_V02S0001 arc: JC7 N1_V02S0001 arc: JCLK0 G_HPBX0000 arc: JD0 V00B0100 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0001 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0100 H02W0301 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V02S0401 arc: E3_H06E0003 W3_H06E0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R25C55:CIB_EBR arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 V06S0203 arc: JB5 V00B0100 arc: JB7 V00T0000 arc: JD4 V02S0401 arc: JD6 V02S0601 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 JQ7 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 JQ5 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ6 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 N1_V02S0301 arc: V00T0000 W1_H02E0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V02N0301 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C56:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0103 V01N0101 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: H01W0000 JQ1 arc: JA0 H02W0701 arc: JA1 H02W0701 arc: JA2 V02S0701 arc: JA3 V02S0701 arc: JA6 E1_H02W0701 arc: JA7 E1_H02W0701 arc: JB1 H00R0100 arc: JB3 H02E0101 arc: JC0 H00L0000 arc: JC1 H00L0000 arc: JC2 W1_H02E0401 arc: JC3 W1_H02E0401 arc: JCLK0 G_HPBX0000 arc: JD0 W1_H02E0201 arc: JD2 H00R0000 arc: JLSR1 V00B0000 arc: N1_V01N0001 JQ2 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 JQ3 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 W1_H02E0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0201 W3_H06E0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C57:CIB_EBR arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: H00R0100 H02E0501 arc: JA0 H00L0100 arc: JA1 H02E0501 arc: JA2 V00T0000 arc: JA3 V00B0000 arc: JC0 H00L0100 arc: JC1 H00R0100 arc: JC2 H00L0000 arc: JC3 V02N0401 arc: JCLK0 G_HPBX0000 arc: JD6 V02S0601 arc: JD7 V02N0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 JQ7 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 H06W0203 arc: N3_V06N0303 JQ6 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00T0000 H02E0001 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N3_V06N0003 W3_H06E0003 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R25C58:CIB_EBR arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 H01E0101 arc: H00L0000 V02S0201 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0701 arc: H01W0000 JQ1 arc: H01W0100 JQ5 arc: JA0 H02W0501 arc: JA1 H02E0701 arc: JA2 V02S0701 arc: JA3 V02S0701 arc: JA6 V00T0100 arc: JA7 V00T0100 arc: JB1 H02E0301 arc: JB3 H02E0101 arc: JB5 H00R0000 arc: JC0 H00L0000 arc: JC1 H00L0000 arc: JC2 H00R0100 arc: JC3 H00R0100 arc: JCLK0 G_HPBX0000 arc: JD0 H02E0001 arc: JD2 H02E0201 arc: JD4 V00B0000 arc: JLSR1 V00B0100 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ2 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 H02E0601 arc: V00B0100 E1_H02W0701 arc: V00T0100 V02N0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0003 JQ3 arc: W3_H06W0203 JQ4 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C59:CIB_EBR arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V02N0501 arc: JA4 H02E0501 arc: JA5 H02E0501 arc: JA6 V00T0100 arc: JA7 V00T0100 arc: JC4 V02S0001 arc: JC5 V02S0001 arc: JC6 N1_V02S0001 arc: JC7 N1_V02S0001 arc: JCLK0 G_HPBX0000 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H01E0001 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 S3_V06N0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00T0100 E1_H02W0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0401 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R25C5:CIB_EBR arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 H02W0101 arc: W3_H06W0003 E3_H06W0003 .tile CIB_R25C60:CIB_EBR arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: JA0 W1_H02E0701 arc: JA1 W1_H02E0701 arc: JA2 V00T0000 arc: JA3 V00T0000 arc: JA6 H02W0701 arc: JA7 H02W0701 arc: JB1 V02N0101 arc: JB3 H00R0100 arc: JB5 V02S0701 arc: JB7 V02N0501 arc: JC0 E1_H02W0401 arc: JC1 H00L0000 arc: JC2 N1_V02S0601 arc: JC3 N1_V02S0601 arc: JCLK0 G_HPBX0000 arc: JD0 V00B0100 arc: JD2 H00R0000 arc: JD4 V02S0401 arc: JD6 H00L0100 arc: JLSR1 V00B0000 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ1 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ6 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: W1_H02W0701 V06S0203 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ2 arc: W3_H06W0203 JQ7 arc: W3_H06W0303 JQ5 arc: E3_H06E0003 W3_H06E0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C61:CIB_EBR arc: E1_H02E0201 V02N0201 arc: E1_H02E0701 V02N0701 arc: H00L0000 V02S0001 arc: JA0 N1_V02S0501 arc: JA4 V02N0101 arc: JA5 N1_V02S0301 arc: JA7 V02N0101 arc: JC1 H00L0000 arc: JC4 V02S0001 arc: JC5 V02N0001 arc: JC6 V02N0001 arc: JCLK0 G_HPBX0000 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: W1_H02W0101 V02N0101 arc: W1_H02W0701 V02N0701 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R25C62:CIB_EBR arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N1_V02S0601 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: JA0 H00R0000 arc: JA1 H00R0000 arc: JA2 H02W0701 arc: JA3 H02W0701 arc: JA6 H02E0701 arc: JA7 H02E0701 arc: JB3 S1_V02N0101 arc: JB5 V02S0701 arc: JB7 V00B0000 arc: JC0 S1_V02N0401 arc: JC1 S1_V02N0401 arc: JC2 H00R0100 arc: JC3 H00R0100 arc: JCLK0 G_HPBX0000 arc: JD2 V02S0001 arc: JD4 V02N0401 arc: JD6 V02N0601 arc: JLSR1 V00T0000 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ6 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 V02S0201 arc: V00T0000 V02S0601 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ2 arc: W3_H06W0203 JQ7 arc: W3_H06W0303 JQ5 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C63:CIB_EBR arc: E1_H02E0501 N1_V02S0501 arc: H00L0000 W1_H02E0201 arc: JA4 V02N0101 arc: JA5 V00B0000 arc: JA6 H00L0000 arc: JA7 H00L0000 arc: JB1 H02E0301 arc: JC4 V02S0001 arc: JC5 V02S0001 arc: JC6 H02W0601 arc: JC7 H02W0601 arc: JCLK0 G_HPBX0000 arc: JD0 H02E0201 arc: N3_V06N0303 H06W0303 arc: S3_V06S0003 H06E0003 arc: V00B0000 H02E0601 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V02S0701 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0003 JQ0 arc: W3_H06W0103 JQ1 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R25C64:CIB_EBR arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V06S0203 arc: H00R0100 V02S0501 arc: JB5 V02N0701 arc: JB7 V00B0000 arc: JD4 H00R0100 arc: JD6 V02N0601 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ6 arc: V00B0000 V02N0201 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0203 JQ7 arc: W3_H06W0303 JQ5 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R25C65:CIB_EBR arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: JA0 W1_H02E0701 arc: JA1 W1_H02E0701 arc: JA2 V00T0000 arc: JA3 V00T0000 arc: JA6 V02N0301 arc: JA7 V02N0301 arc: JB1 H02E0101 arc: JB3 H00R0000 arc: JC0 S1_V02N0401 arc: JC1 S1_V02N0401 arc: JC2 H00R0100 arc: JC3 H00R0100 arc: JCLK0 G_HPBX0000 arc: JD0 V00B0100 arc: JD2 H02E0201 arc: JLSR1 H02E0501 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ1 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: W3_H06W0003 JQ0 arc: W3_H06W0103 JQ2 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C66:CIB_EBR arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V02N0701 arc: H00L0000 V02S0001 arc: H00R0100 V02N0701 arc: JA0 H00L0000 arc: JA1 V02N0701 arc: JA2 V00B0000 arc: JA3 H02W0701 arc: JC0 H00L0000 arc: JC1 H00R0100 arc: JC2 W1_H02E0601 arc: JC3 H02W0401 arc: JCLK0 G_HPBX0000 arc: JD6 V02S0401 arc: JD7 N1_V02S0601 arc: V00B0000 W1_H02E0601 arc: E1_H02E0001 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0203 JQ7 arc: W3_H06W0303 JQ6 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R25C67:CIB_EBR arc: H00L0000 V02N0001 arc: H00L0100 W1_H02E0101 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0701 arc: JA0 H00L0000 arc: JA1 H00L0000 arc: JA2 W1_H02E0501 arc: JA3 W1_H02E0501 arc: JA6 S1_V02N0301 arc: JA7 S1_V02N0301 arc: JB1 H02E0301 arc: JB3 H00R0100 arc: JB5 H00R0000 arc: JC0 S1_V02N0601 arc: JC1 S1_V02N0601 arc: JC2 H00L0100 arc: JC3 H00L0100 arc: JCLK0 G_HPBX0000 arc: JD0 W1_H02E0001 arc: JD2 W1_H02E0201 arc: JD4 V02N0601 arc: JLSR1 V00B0100 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ2 arc: V00B0100 V02S0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 JQ0 arc: W3_H06W0103 JQ1 arc: W3_H06W0203 JQ4 arc: W3_H06W0303 JQ5 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R25C68:CIB_EBR arc: JA0 V02N0501 arc: JA1 V02N0501 arc: JA4 V00T0000 arc: JA5 V00T0000 arc: JA6 W1_H02E0701 arc: JA7 W1_H02E0701 arc: JC0 N1_V02S0401 arc: JC1 N1_V02S0401 arc: JC4 V00B0100 arc: JC5 V00B0100 arc: JC6 V02S0001 arc: JC7 V02S0001 arc: JCLK0 G_HPBX0000 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R25C69:CIB_EBR arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 .tile CIB_R25C6:CIB_EBR arc: E1_H01E0101 E3_H06W0203 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0303 S1_V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V06N0303 arc: W3_H06W0303 V06N0303 arc: W3_H06W0203 E3_H06W0103 .tile CIB_R25C70:CIB_EBR arc: E1_H02E0301 V02S0301 .tile CIB_R25C71:CIB_LR_S arc: JA0 N1_V02S0701 arc: JA3 V02S0501 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 H02E0301 arc: JLSR1 H02E0301 arc: S3_V06S0203 N3_V06S0203 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R25C7:CIB_EBR arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H01E0101 arc: N3_V06N0003 H06W0003 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 N1_V01S0000 arc: W1_H02W0201 V01N0001 .tile CIB_R25C8:CIB_EBR arc: E1_H02E0401 V06S0203 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 N3_V06S0203 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 E1_H02W0701 .tile CIB_R25C9:CIB_EBR arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0203 H06W0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0201 .tile CIB_R26C1:CIB_LR arc: E1_H02E0001 E1_H01W0000 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0401 S1_V02N0401 .tile CIB_R26C71:CIB_LR arc: H00L0000 V02N0201 arc: JA0 H00L0000 arc: JA3 V00B0000 arc: JB3 W1_H02E0301 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 V00B0100 arc: JLSR1 V00B0100 arc: N3_V06N0203 JQ4 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0101 arc: W3_H06W0203 S3_V06N0203 enum: CIB.JB0MUX 0 .tile CIB_R27C1:CIB_LR arc: E1_H02E0401 V02N0401 .tile CIB_R27C71:CIB_LR arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: S1_V02S0101 H02E0101 arc: S3_V06S0203 N3_V06S0103 .tile CIB_R28C1:CIB_LR arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0501 E1_H01W0100 arc: N1_V02N0401 E3_H06W0203 arc: N3_V06N0203 E3_H06W0203 .tile CIB_R28C71:CIB_LR arc: JA0 N1_V02S0701 arc: JA3 V00T0000 arc: JB0 W1_H02E0101 arc: JB3 W1_H02E0101 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 V00B0100 arc: JLSR1 V00B0100 arc: N3_V06N0203 JF4 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: W3_H06W0203 JQ4 arc: W3_H06W0303 S3_V06N0303 .tile CIB_R29C1:CIB_LR arc: E1_H02E0001 E3_H06W0003 .tile CIB_R29C71:CIB_LR arc: S1_V02S0401 N3_V06S0203 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 JQ5 .tile CIB_R2C71:CIB_LR arc: JA0 H02E0701 arc: JA3 H01E0001 arc: JB3 S1_V02N0301 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 V00B0000 arc: JLSR1 V00B0000 arc: V00B0000 V02N0201 arc: W3_H06W0203 JQ4 enum: CIB.JB0MUX 0 .tile CIB_R30C1:CIB_LR arc: S3_V06S0003 N3_V06S0003 .tile CIB_R30C71:CIB_LR arc: S3_V06S0303 N3_V06S0203 .tile CIB_R31C71:CIB_LR arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 N3_V06S0203 .tile CIB_R32C1:CIB_LR arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 E3_H06W0203 arc: N3_V06N0103 E3_H06W0103 arc: S3_V06S0203 E1_H01W0000 .tile CIB_R32C71:CIB_LR arc: JA0 V02S0701 arc: JA3 V02S0501 arc: JB0 W1_H02E0101 arc: JB3 W1_H02E0101 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 H02E0301 arc: JLSR1 H02E0301 arc: N3_V06N0203 JQ4 arc: S3_V06S0203 N3_V06S0103 arc: W3_H06W0203 JF4 .tile CIB_R33C1:CIB_LR arc: E1_H02E0001 V06S0003 arc: S1_V02S0501 E1_H01W0100 .tile CIB_R33C71:CIB_LR arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N3_V06S0203 .tile CIB_R34C1:CIB_LR arc: E1_H02E0001 S1_V02N0001 arc: N1_V02N0001 S1_V02N0001 .tile CIB_R34C71:CIB_LR arc: JA3 H02E0501 arc: N3_V06N0303 JF5 enum: CIB.JB3MUX 0 .tile CIB_R35C1:CIB_LR arc: JA3 N1_V02S0501 enum: CIB.JB3MUX 0 .tile CIB_R35C71:CIB_LR arc: JA0 V02N0501 arc: JA3 N1_V02S0701 arc: JB0 W1_H02E0101 arc: JB3 W1_H02E0101 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 V00B0100 arc: JLSR1 V00B0100 arc: N3_V06N0203 JF4 arc: S1_V02S0501 N1_V02S0501 arc: V00B0100 V02N0101 arc: W3_H06W0203 JQ4 .tile CIB_R36C1:CIB_LR arc: N1_V02N0001 N3_V06S0003 .tile CIB_R36C71:CIB_LR arc: N1_V02N0101 H02E0101 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0101 H02E0101 .tile CIB_R37C11:CIB_EBR arc: N1_V02N0101 N3_V06S0103 .tile CIB_R37C12:CIB_EBR arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 V02S0701 .tile CIB_R37C13:CIB_EBR arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JQ4 arc: H00R0000 V02S0401 arc: JA0 H00R0000 arc: JA2 E1_H02W0501 arc: JA6 V02S0301 arc: JC1 N1_V01S0100 arc: JC3 S1_V02N0401 arc: N1_V01N0001 N3_V06S0003 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ1 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C14:CIB_EBR arc: E1_H02E0401 W1_H02E0401 arc: H00R0000 H02E0601 arc: JA0 W1_H02E0701 arc: JA4 S1_V02N0301 arc: JA6 V00T0100 arc: JC1 W1_H02E0401 arc: JC5 H02E0401 arc: JC7 V02N0201 arc: JCE1 H00R0000 arc: JCLK0 G_HPBX0000 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R37C15:CIB_EBR arc: E1_H02E0401 V06S0203 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ5 arc: H00L0000 H02W0201 arc: H00R0100 H02W0701 arc: JA0 H00L0000 arc: JA2 V02N0501 arc: JA6 V02S0301 arc: JC1 H02W0601 arc: JC3 H00R0100 arc: N3_V06N0303 JQ6 arc: W1_H02W0501 V02N0501 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C16:CIB_EBR arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0601 V06S0303 arc: H00R0100 S1_V02N0501 arc: JA0 H02W0701 arc: JA4 V02S0101 arc: JA6 S1_V02N0301 arc: JC1 H02W0601 arc: JC5 W1_H02E0401 arc: JC7 H02E0401 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H02W0601 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R37C17:CIB_EBR arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ6 arc: N1_V01N0001 JQ5 arc: N1_V02N0301 N3_V06S0003 arc: N3_V06N0203 JQ7 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V01S0100 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R37C18:CIB_EBR arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 JQ0 arc: H00L0000 W1_H02E0201 arc: JA0 H00L0000 arc: JA2 V00B0000 arc: JA6 S1_V02N0301 arc: JC1 W1_H02E0601 arc: JC3 S1_V02N0601 arc: N1_V02N0201 N3_V06S0103 arc: V00B0000 V02N0201 arc: W1_H02W0601 S1_V02N0601 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C19:CIB_EBR arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 JQ7 arc: JA0 N1_V02S0701 arc: JA1 H02E0701 arc: JA2 V02S0701 arc: JA3 V00T0000 arc: JA4 V00B0000 arc: JA5 V00T0100 arc: JCE1 S1_V02N0201 arc: JCLK0 G_HPBX0000 arc: N1_V01N0101 JQ6 arc: V00B0000 W1_H02E0601 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0101 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R37C20:CIB_EBR arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ1 arc: JA0 V02S0501 arc: JA2 V00B0000 arc: JA6 H02E0701 arc: JC1 H02E0601 arc: JC3 W1_H02E0601 arc: N1_V01N0001 JQ2 arc: V00B0000 V02N0201 arc: W1_H02W0201 N1_V02S0201 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C21:CIB_EBR arc: E1_H02E0701 N1_V02S0701 arc: JA0 W1_H02E0501 arc: JA4 H02E0701 arc: JA6 N1_V02S0101 arc: JC1 N1_V02S0601 arc: JC5 V00T0100 arc: JC7 W1_H02E0401 arc: JCE1 V02S0201 arc: JCLK0 G_HPBX0000 arc: V00T0100 N1_V02S0701 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R37C22:CIB_EBR arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JQ4 arc: H00L0000 S1_V02N0201 arc: H00R0000 V02S0401 arc: JA0 H02W0501 arc: JA2 V00B0000 arc: JA6 H00R0000 arc: JC1 S1_V02N0601 arc: JC3 H00L0000 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 JQ0 arc: N1_V02N0301 JQ1 arc: N1_V02N0701 H06E0203 arc: V00B0000 V02N0201 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C23:CIB_EBR arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 W1_H02E0301 arc: H00R0100 W1_H02E0701 arc: JA0 H02W0701 arc: JA4 N1_V02S0101 arc: JA6 H02E0501 arc: JC1 H00R0100 arc: JC5 H02W0401 arc: JC7 V00T0000 arc: JCE1 H02W0101 arc: JCLK0 G_HPBX0000 arc: V00T0000 N1_V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R37C24:CIB_EBR arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: JA0 H02E0501 arc: JA2 V00B0000 arc: JA6 N1_V02S0101 arc: JC1 V02S0601 arc: JC3 H02E0601 arc: N1_V01N0101 JQ4 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ2 arc: N3_V06N0303 JQ5 arc: V00B0000 V02S0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: E3_H06E0003 W3_H06E0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C25:CIB_EBR arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ1 arc: H01W0100 E3_H06W0303 arc: JA0 H02W0501 arc: JA4 H02E0701 arc: JA6 V00T0100 arc: JC1 W1_H02E0401 arc: JC5 H02E0401 arc: JC7 H02E0601 arc: JCE1 H02E0101 arc: JCLK0 G_HPBX0000 arc: N1_V02N0201 H06E0103 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 JQ2 arc: V00T0100 H02W0101 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R37C26:CIB_EBR arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 JQ5 arc: N3_V06N0203 JQ4 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0501 N1_V02S0501 arc: E1_H01E0001 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R37C27:CIB_EBR arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 JQ4 arc: H00R0000 H02E0601 arc: JA0 H00R0000 arc: JA2 H02W0501 arc: JA6 V00T0100 arc: JC1 S1_V02N0601 arc: JC3 H02E0401 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 JQ3 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N3_V06S0303 arc: N3_V06N0103 JQ2 arc: V00T0100 S1_V02N0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C28:CIB_EBR arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0303 JQ6 arc: H00L0000 H02E0201 arc: H00L0100 W1_H02E0101 arc: H00R0000 H02E0601 arc: JA0 H02E0501 arc: JA1 H00L0000 arc: JA2 V00T0000 arc: JA3 H00L0100 arc: JA4 W1_H02E0701 arc: JA5 W1_H02E0501 arc: JCE1 H00R0000 arc: JCLK0 G_HPBX0000 arc: N1_V01N0001 JQ7 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H06E0303 arc: N3_V06N0103 H06E0103 arc: V00T0000 H02E0001 arc: W1_H02W0501 V01N0101 arc: N1_V02N0701 W3_H06E0203 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R37C29:CIB_EBR arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ2 arc: E3_H06E0303 JQ6 arc: H00L0000 V02N0001 arc: JA0 H00L0000 arc: JA2 H02E0501 arc: JA6 H02E0701 arc: JC1 H02E0601 arc: JC3 S1_V02N0601 arc: N1_V01N0001 JQ4 arc: N1_V02N0501 H06E0303 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ1 arc: N3_V06N0303 JQ5 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C30:CIB_EBR arc: H00R0000 H02W0601 arc: JA0 H02E0501 arc: JA4 V02N0101 arc: JA6 V00T0100 arc: JC1 H02E0401 arc: JC5 V00T0000 arc: JC7 V02S0201 arc: JCE1 H00R0000 arc: JCLK0 G_HPBX0000 arc: N1_V02N0101 H06W0103 arc: N3_V06N0103 H06E0103 arc: V00T0000 N1_V02S0601 arc: V00T0100 W1_H02E0301 arc: N3_V06N0203 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R37C31:CIB_EBR arc: N3_V06N0303 H06E0303 arc: W1_H02W0601 E3_H06W0303 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0303 E3_H06W0303 .tile CIB_R37C32:CIB_EBR arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0501 H06E0303 arc: N3_V06N0103 H06E0103 arc: N1_V02N0701 W3_H06E0203 .tile CIB_R37C33:CIB_EBR arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V01N0001 arc: E3_H06E0203 N1_V01S0000 arc: JA0 V02N0701 arc: JA2 V00T0000 arc: JA6 V02S0301 arc: JC1 N1_V02S0601 arc: JC3 H02E0601 arc: N1_V01N0101 JQ6 arc: N1_V02N0201 JQ2 arc: N1_V02N0301 JQ3 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 JQ7 arc: N3_V06N0003 JQ0 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ5 arc: V00T0000 V02S0601 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0103 JQ1 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C34:CIB_EBR arc: E1_H02E0401 N1_V02S0401 arc: H00L0100 H02E0301 arc: H01W0000 JQ0 arc: JA0 H02W0501 arc: JA4 V00T0000 arc: JA6 W1_H02E0501 arc: JC1 H00L0100 arc: JC5 H02E0401 arc: JC7 V00T0100 arc: JCE1 H02E0101 arc: JCLK0 G_HPBX0000 arc: V00T0000 W1_H02E0001 arc: V00T0100 N1_V02S0701 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R37C35:CIB_EBR arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 E1_H02W0001 arc: JA0 V02N0501 arc: JA2 V00T0000 arc: JA6 V00T0100 arc: JC1 H00L0000 arc: JC3 S1_V02N0401 arc: N1_V01N0101 JQ6 arc: N1_V02N0101 JQ3 arc: N1_V02N0401 JQ4 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0103 JQ2 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ5 arc: V00T0000 W1_H02E0201 arc: V00T0100 N1_V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0501 N1_V01S0100 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C36:CIB_EBR arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: JA0 H00R0000 arc: JA4 H02E0501 arc: JA6 N1_V02S0301 arc: JC1 W1_H02E0401 arc: JC5 N1_V02S0001 arc: JC7 V02S0001 arc: JCE1 H00R0100 arc: JCLK0 G_HPBX0000 arc: N1_V02N0201 JQ2 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ1 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R37C37:CIB_EBR arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 N3_V06S0203 arc: N1_V02N0401 JQ6 arc: N1_V02N0701 JQ7 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ5 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0303 E1_H02W0501 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R37C38:CIB_EBR arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 JQ1 arc: H00L0000 H02E0001 arc: H00R0000 H02E0401 arc: H01W0000 JQ0 arc: H01W0100 JQ4 arc: JA0 V02S0701 arc: JA2 V00T0000 arc: JA6 H00R0000 arc: JC1 H00L0000 arc: JC3 N1_V02S0401 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ2 arc: V00T0000 V02S0601 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C39:CIB_EBR arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0303 JQ6 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0401 arc: JA0 H00L0000 arc: JA1 H00R0000 arc: JA2 V00B0000 arc: JA3 H00L0100 arc: JA4 W1_H02E0701 arc: JA5 H02E0501 arc: JCE1 H02W0101 arc: JCLK0 G_HPBX0000 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 JQ7 arc: N1_V02N0001 H02E0001 arc: N1_V02N0401 E1_H02W0401 arc: V00B0000 V02S0201 arc: W1_H02W0501 V02S0501 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R37C3:CIB_EBR arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 .tile CIB_R37C40:CIB_EBR arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ1 arc: E3_H06E0303 JQ5 arc: JA0 H02W0701 arc: JA2 V00T0000 arc: JA6 W1_H02E0701 arc: JC1 N1_V02S0601 arc: JC3 W1_H02E0401 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ2 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ6 arc: V00T0000 W1_H02E0201 arc: W1_H02W0101 H01E0101 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C41:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: JA0 V02S0701 arc: JA4 W1_H02E0701 arc: JA6 N1_V02S0301 arc: JC1 W1_H02E0601 arc: JC5 V00T0100 arc: JC7 W1_H02E0401 arc: JCE1 W1_H02E0101 arc: JCLK0 G_HPBX0000 arc: N1_V02N0001 N1_V01S0000 arc: N3_V06N0103 E1_H01W0100 arc: V00T0100 H02W0101 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 V02N0701 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R37C42:CIB_EBR arc: E1_H02E0101 N1_V02S0101 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0501 arc: H01W0100 JQ3 arc: JA0 H00R0000 arc: JA1 H00R0000 arc: JA2 V02N0701 arc: JA3 V02N0701 arc: JA6 S1_V02N0301 arc: JA7 S1_V02N0301 arc: JB1 V02S0301 arc: JB3 H02W0101 arc: JB5 V02N0501 arc: JB7 H02W0301 arc: JC0 W1_H02E0601 arc: JC1 W1_H02E0601 arc: JC2 H00R0100 arc: JC3 H00R0100 arc: JCLK0 G_HPBX0000 arc: JD0 N1_V02S0201 arc: JD2 V00B0100 arc: JD4 V00B0000 arc: JD6 S1_V02N0601 arc: JLSR1 H02W0501 arc: N1_V02N0001 JQ2 arc: N1_V02N0501 N3_V06S0303 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ1 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ5 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: W1_H02W0101 N1_V02S0101 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C43:CIB_EBR arc: E1_H02E0201 N3_V06S0103 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0101 arc: JA0 H02W0701 arc: JA1 H00L0000 arc: JA4 V00T0100 arc: JA5 H02W0701 arc: JA6 H00L0000 arc: JA7 V00T0100 arc: JC0 W1_H02E0601 arc: JC1 H00L0100 arc: JC4 V00B0100 arc: JC5 V02S0001 arc: JC6 V02S0001 arc: JC7 W1_H02E0601 arc: JCLK0 G_HPBX0000 arc: V00B0100 N1_V02S0101 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V06S0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R37C44:CIB_EBR arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: H00L0000 H02W0201 arc: H00R0000 N1_V02S0401 arc: JA0 H02W0701 arc: JA1 H02W0701 arc: JA2 V02N0701 arc: JA3 V02N0701 arc: JA6 H00R0000 arc: JA7 H00R0000 arc: JB3 V02N0301 arc: JB5 S1_V02N0701 arc: JB7 V02N0501 arc: JC0 N1_V01N0001 arc: JC1 N1_V02S0601 arc: JC2 H00L0000 arc: JC3 H00L0000 arc: JCLK0 G_HPBX0000 arc: JD2 V02S0001 arc: JD4 H02E0201 arc: JD6 V00B0000 arc: JLSR1 V00B0100 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0701 JQ5 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ6 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: W1_H02W0701 V02N0701 arc: N3_V06N0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C45:CIB_EBR arc: E1_H02E0301 V02S0301 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 V02S0401 arc: JA4 V00B0000 arc: JA5 V00B0000 arc: JA6 N1_V02S0301 arc: JA7 N1_V02S0301 arc: JB1 V02N0101 arc: JC4 V02N0001 arc: JC5 V02N0001 arc: JC6 V02S0001 arc: JC7 V02S0001 arc: JCLK0 G_HPBX0000 arc: JD0 H00R0000 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ1 arc: N3_V06N0203 H06E0203 arc: V00B0000 H02E0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R37C46:CIB_EBR arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0303 JQ5 arc: H00L0000 V02N0001 arc: JB5 H00L0000 arc: JB7 H02E0301 arc: JD4 N1_V02S0401 arc: JD6 V00B0000 arc: N1_V02N0601 JQ6 arc: N1_V02N0701 JQ7 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 E1_H01W0100 arc: V00B0000 V02S0001 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C47:CIB_EBR arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: H01W0100 JQ3 arc: JA0 W1_H02E0701 arc: JA1 W1_H02E0701 arc: JA2 H02W0501 arc: JA3 H02W0501 arc: JA6 H02E0501 arc: JA7 H02E0501 arc: JB1 H00R0100 arc: JB3 H02E0301 arc: JC0 V02N0401 arc: JC1 V02N0401 arc: JC2 N1_V02S0601 arc: JC3 N1_V02S0601 arc: JCLK0 G_HPBX0000 arc: JD0 H00R0000 arc: JD2 V00T0100 arc: JLSR1 V00B0100 arc: N1_V02N0001 JQ0 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 JQ2 arc: N1_V02N0301 JQ1 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02N0501 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C48:CIB_EBR arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 V02N0001 arc: H00L0100 H02E0301 arc: H00R0000 N1_V02S0601 arc: JA0 H00L0000 arc: JA1 H00R0000 arc: JA2 W1_H02E0701 arc: JA3 H00L0100 arc: JC0 H00L0000 arc: JC1 N1_V02S0601 arc: JC2 E1_H02W0601 arc: JC3 H00L0100 arc: JCLK0 G_HPBX0000 arc: JD6 V02S0601 arc: JD7 H02W0001 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 JQ6 arc: N1_V02N0701 JQ7 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 E1_H01W0100 arc: W1_H02W0501 N3_V06S0303 arc: N1_V02N0501 W3_H06E0303 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R37C49:CIB_EBR arc: H00L0000 N1_V02S0201 arc: H01W0000 JQ3 arc: H01W0100 JQ2 arc: JA0 V02N0501 arc: JA1 V02N0501 arc: JA2 V00B0000 arc: JA3 V00B0000 arc: JA6 W1_H02E0701 arc: JA7 W1_H02E0701 arc: JB1 H02E0101 arc: JB3 S1_V02N0101 arc: JB5 V02S0701 arc: JC0 W1_H02E0401 arc: JC1 W1_H02E0401 arc: JC2 H00L0000 arc: JC3 H00L0000 arc: JCLK0 G_HPBX0000 arc: JD0 V02S0201 arc: JD2 V00B0100 arc: JD4 V02S0401 arc: JLSR1 V00T0000 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ1 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ5 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 H02E0201 arc: W1_H02W0001 N1_V01S0000 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C4:CIB_EBR arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 N3_V06S0303 .tile CIB_R37C50:CIB_EBR arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N1_V02S0701 arc: JA4 V00T0000 arc: JA5 V00T0000 arc: JA6 N1_V01S0100 arc: JA7 N1_V01S0100 arc: JC4 V02S0001 arc: JC5 V02S0001 arc: JC6 V02N0001 arc: JC7 V02N0001 arc: JCLK0 G_HPBX0000 arc: N1_V02N0101 E3_H06W0103 arc: N3_V06N0103 H06W0103 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0601 S1_V02N0601 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R37C51:CIB_EBR arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 JQ7 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0701 arc: JA0 V02S0701 arc: JA1 V02S0701 arc: JA2 V02N0701 arc: JA3 V02N0701 arc: JA6 H02E0701 arc: JA7 H02E0701 arc: JB1 H02W0301 arc: JB3 V02N0301 arc: JB5 V02S0501 arc: JB7 V00B0100 arc: JC0 H02E0601 arc: JC1 H02E0601 arc: JC2 H00L0100 arc: JC3 H00L0100 arc: JCLK0 G_HPBX0000 arc: JD0 S1_V02N0001 arc: JD2 H00R0000 arc: JD4 V00B0000 arc: JD6 H00R0100 arc: JLSR1 V00T0100 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 JQ3 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 JQ5 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ2 arc: N3_V06N0203 JQ4 arc: N3_V06N0303 JQ6 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0100 H02E0101 arc: W1_H02W0201 E3_H06W0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C52:CIB_EBR arc: E1_H02E0101 V06S0103 arc: H00R0000 N1_V02S0601 arc: JA0 H00R0000 arc: JA4 W1_H02E0501 arc: JA5 V00T0000 arc: JA7 W1_H02E0501 arc: JC1 H02E0601 arc: JC4 H02E0601 arc: JC5 W1_H02E0401 arc: JC6 W1_H02E0401 arc: JCLK0 G_HPBX0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: V00T0000 N1_V02S0601 arc: W1_H02W0301 N3_V06S0003 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R37C53:CIB_EBR arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0501 N1_V01S0100 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0501 arc: H01W0000 JQ4 arc: JA0 V02S0501 arc: JA1 V02S0501 arc: JA2 W1_H02E0701 arc: JA3 W1_H02E0701 arc: JA6 H00R0000 arc: JA7 H00R0000 arc: JB3 E1_H02W0301 arc: JB5 H02E0101 arc: JB7 N1_V01S0000 arc: JC0 V02N0401 arc: JC1 V02N0401 arc: JC2 N1_V02S0401 arc: JC3 N1_V02S0401 arc: JCLK0 G_HPBX0000 arc: JD2 S1_V02N0001 arc: JD4 H00L0100 arc: JD6 H00R0100 arc: JLSR1 V00T0000 arc: N1_V01N0101 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ6 arc: V00T0000 V02S0401 arc: V01S0000 N3_V06S0103 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ2 arc: W3_H06W0203 JQ4 arc: W3_H06W0303 JQ5 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C54:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 N3_V06S0103 arc: H00R0100 V02S0701 arc: JA4 V00T0100 arc: JA5 V00T0100 arc: JA6 H02E0501 arc: JA7 H02E0501 arc: JB1 H00R0100 arc: JC4 V02S0201 arc: JC5 V02S0201 arc: JC6 V00T0000 arc: JC7 V00T0000 arc: JCLK0 G_HPBX0000 arc: JD0 V00B0100 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 H06E0203 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: W3_H06W0003 JQ0 arc: W3_H06W0103 JQ1 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R37C55:CIB_EBR arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 N1_V02S0501 arc: H00L0100 H02E0301 arc: JB5 H02W0101 arc: JB7 V00B0000 arc: JD4 H00L0100 arc: JD6 H02W0001 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 N3_V06S0103 arc: N3_V06N0203 JQ7 arc: N3_V06N0303 JQ5 arc: V00B0000 V02S0001 arc: W1_H02W0301 V02S0301 arc: W3_H06W0203 JQ4 arc: W3_H06W0303 JQ6 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R37C56:CIB_EBR arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 N1_V02S0501 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0301 arc: JA0 H00L0100 arc: JA1 H00L0100 arc: JA2 H02W0501 arc: JA3 H02W0501 arc: JA6 H02E0501 arc: JA7 H02E0501 arc: JB1 V00B0000 arc: JB3 N1_V02S0301 arc: JC0 V02N0401 arc: JC1 V02N0401 arc: JC2 H00L0000 arc: JC3 H00L0000 arc: JCLK0 G_HPBX0000 arc: JD0 W1_H02E0001 arc: JD2 H02E0201 arc: JLSR1 V00B0100 arc: N1_V02N0201 N3_V06S0103 arc: N3_V06N0003 JQ0 arc: N3_V06N0103 JQ1 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ2 arc: W3_H06W0303 E3_H06W0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C57:CIB_EBR arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0001 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: JA0 H00R0000 arc: JA1 V02S0501 arc: JA2 V02N0701 arc: JA3 V00T0000 arc: JC0 H02E0401 arc: JC1 H00R0100 arc: JC2 E1_H02W0601 arc: JC3 H00L0000 arc: JCLK0 G_HPBX0000 arc: JD6 V00B0000 arc: JD7 V02S0601 arc: N3_V06N0303 JQ6 arc: V00B0000 N1_V02S0001 arc: V00T0000 H02W0001 arc: W1_H02W0501 N1_V01S0100 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0203 JQ7 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JA5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R37C58:CIB_EBR arc: E1_H02E0401 N1_V02S0401 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: JA0 W1_H02E0501 arc: JA1 W1_H02E0501 arc: JA2 H02E0701 arc: JA3 V02S0701 arc: JA6 S1_V02N0101 arc: JA7 S1_V02N0101 arc: JB1 H00R0100 arc: JB3 W1_H02E0101 arc: JB5 V02N0501 arc: JC0 H02E0601 arc: JC1 H02E0601 arc: JC2 H02W0401 arc: JC3 H02W0401 arc: JCLK0 G_HPBX0000 arc: JD0 H00R0000 arc: JD2 H02E0201 arc: JD4 V00B0000 arc: JLSR1 V00B0100 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 JQ3 arc: N3_V06N0103 JQ2 arc: S1_V02S0101 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: W1_H02W0001 V02S0001 arc: E1_H02E0001 W3_H06E0003 arc: W3_H06W0003 JQ0 arc: W3_H06W0103 JQ1 arc: W3_H06W0203 JQ4 arc: W3_H06W0303 JQ5 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C59:CIB_EBR arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 N1_V02S0001 arc: H00R0000 N1_V02S0401 arc: JA0 H00R0000 arc: JA1 H00R0000 arc: JA4 V00T0000 arc: JA5 V00T0000 arc: JA6 V02S0301 arc: JA7 V02S0301 arc: JC0 H00L0000 arc: JC1 H00L0000 arc: JC4 H02E0401 arc: JC5 H02E0401 arc: JC6 V02S0001 arc: JC7 V02S0001 arc: JCLK0 G_HPBX0000 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0303 E3_H06W0303 arc: V00T0000 W1_H02E0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0003 E3_H06W0303 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R37C60:CIB_EBR arc: E1_H01E0101 JQ6 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: H00L0000 V02S0201 arc: H00L0100 V02N0101 arc: H00R0000 H02E0601 arc: H01W0100 JQ0 arc: JA0 H00R0000 arc: JA2 H00L0100 arc: JA6 H02W0701 arc: JC1 H00L0000 arc: JC3 H02E0401 arc: N1_V01N0001 JQ5 arc: N1_V01N0101 JQ2 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 JQ4 arc: N1_V02N0501 JQ7 arc: N1_V02N0601 H01E0001 arc: W1_H02W0101 JQ1 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 E3_H06W0303 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 JQ3 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C61:CIB_EBR arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02E0001 arc: H00R0000 V02S0401 arc: JA0 H00L0000 arc: JA4 N1_V02S0101 arc: JA6 V02S0301 arc: JC1 H02E0401 arc: JC5 N1_V02S0201 arc: JC7 N1_V02S0001 arc: JCE1 H00R0000 arc: JCLK0 G_HPBX0000 arc: N1_V01N0001 JQ0 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H01E0101 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0101 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R37C62:CIB_EBR arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 V02S0101 arc: H01W0000 JQ2 arc: H01W0100 JQ3 arc: JA0 N1_V02S0501 arc: JA2 V00B0000 arc: JA6 V00T0100 arc: JC1 H00L0100 arc: JC3 S1_V02N0601 arc: N1_V01N0001 JQ4 arc: N1_V01N0101 JQ7 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 JQ6 arc: N1_V02N0701 H02E0701 arc: V00B0000 V02N0201 arc: V00T0100 S1_V02N0701 arc: W3_H06W0303 JQ5 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 .tile CIB_R37C63:CIB_EBR arc: E1_H02E0101 N3_V06S0103 arc: H00L0000 H02E0001 arc: H01W0100 JQ2 arc: JA0 H00L0000 arc: JA4 V00T0000 arc: JA6 H02E0701 arc: JC1 H02E0401 arc: JC5 N1_V02S0201 arc: JC7 H02E0601 arc: JCE1 W1_H02E0101 arc: JCLK0 G_HPBX0000 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 H06W0103 arc: V00T0000 V02N0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 JQ0 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 JQ1 arc: E3_H06E0103 W3_H06E0003 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 .tile CIB_R37C64:CIB_EBR arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: H01W0000 JQ7 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 JQ5 arc: W1_H02W0401 JQ6 arc: W3_H06W0203 JQ4 enum: CIB.JLSR1MUX 0 enum: CIB.JCLK1MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JCE0MUX 1 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R37C65:CIB_EBR arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: H01W0100 JQ4 arc: JA0 N1_V02S0501 arc: JA2 V00B0000 arc: JA6 N1_V02S0101 arc: JC1 H02E0601 arc: JC3 S1_V02N0601 arc: N1_V01N0101 JQ2 arc: N1_V02N0201 JQ0 arc: V00B0000 V02N0201 arc: W1_H02W0401 E1_H02W0401 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ1 arc: W3_H06W0303 E3_H06W0203 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C66:CIB_EBR arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 V02N0701 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0401 arc: JA0 H00L0000 arc: JA1 H00R0000 arc: JA2 S1_V02N0501 arc: JA3 H00L0100 arc: JA4 W1_H02E0701 arc: JA5 V02S0101 arc: JCE1 H02E0101 arc: JCLK0 G_HPBX0000 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 JQ7 arc: W3_H06W0303 JQ6 enum: CIB.JB5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JD7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JB7MUX 0 .tile CIB_R37C67:CIB_EBR arc: H01W0000 JQ4 arc: H01W0100 JQ2 arc: JA0 W1_H02E0501 arc: JA2 H02E0701 arc: JA6 S1_V02N0101 arc: JC1 S1_V02N0601 arc: JC3 W1_H02E0601 arc: N1_V02N0201 JQ0 arc: W1_H02W0401 JQ6 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ1 arc: W3_H06W0303 JQ5 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCLK0MUX 0 enum: CIB.JCE1MUX 1 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR0MUX 0 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB6MUX 0 .tile CIB_R37C68:CIB_EBR arc: H00L0000 V02S0201 arc: H00R0000 N1_V02S0601 arc: JA0 H00L0000 arc: JA4 V00T0100 arc: JA6 H00R0000 arc: JC1 N1_V02S0401 arc: JC5 V00T0000 arc: JC7 W1_H02E0401 arc: JCE1 H02W0101 arc: JCLK0 G_HPBX0000 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0101 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JLSR1MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD3MUX 0 .tile CIB_R37C69:CIB_EBR arc: E1_H02E0101 N3_V06S0103 arc: N1_V02N0101 N3_V06S0103 arc: W1_H02W0101 W3_H06E0103 .tile CIB_R37C71:CIB_LR_S arc: JA3 N1_V02S0501 arc: JB3 W1_H02E0101 arc: JCLK1 G_HPBX0000 arc: JLSR1 V00B0100 arc: V00B0100 V02S0101 arc: W3_H06W0203 JQ4 .tile CIB_R37C8:CIB_EBR arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 .tile CIB_R38C1:CIB_LR arc: S3_V06S0203 N3_V06S0203 .tile CIB_R38C71:CIB_LR arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 N3_V06S0203 .tile CIB_R3C1:CIB_LR arc: E1_H02E0101 V02N0101 arc: E1_H02E0701 S1_V02N0701 .tile CIB_R3C71:CIB_LR arc: N1_V02N0201 H02E0201 arc: S1_V02S0201 H02E0201 .tile CIB_R40C1:CIB_LR arc: JA0 E1_H02W0701 enum: CIB.JB0MUX 0 .tile CIB_R40C71:CIB_LR arc: JA0 H02E0501 arc: JA3 N1_V02S0701 arc: JC0 N1_V02S0401 arc: JCLK0 G_HPBX0100 arc: JCLK1 G_HPBX0000 arc: JLSR1 H02E0301 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R41C1:CIB_LR arc: JA3 H02W0701 enum: CIB.JB3MUX 0 .tile CIB_R41C71:CIB_LR arc: JA3 V00T0000 arc: JCLK1 G_HPBX0000 arc: JLSR1 V00B0000 arc: V00B0000 V02N0201 arc: V00T0000 H02E0001 enum: CIB.JB3MUX 0 .tile CIB_R42C71:CIB_LR arc: N1_V02N0201 H02E0201 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 W1_H02E0301 .tile CIB_R43C1:CIB_LR arc: JA0 V02N0701 enum: CIB.JB0MUX 0 .tile CIB_R43C71:CIB_LR arc: JA0 H02E0701 arc: JA3 V00T0000 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 V00B0000 arc: JLSR1 V00B0000 arc: V00B0000 V02S0201 arc: V00T0000 W1_H02E0201 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R44C1:CIB_LR arc: JA0 H02W0501 arc: N1_V02N0701 N3_V06S0203 enum: CIB.JB0MUX 0 .tile CIB_R44C71:CIB_LR arc: H00L0100 N1_V02S0301 arc: JA0 W1_H02E0501 arc: JA3 H00L0100 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 V00T0100 arc: JLSR1 V00T0100 arc: V00T0100 H02E0101 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R49C2:CIB_PLL2 arc: JB1 H02W0101 arc: N3_V06N0103 JQ2 arc: PLLCSOUT_PLLREFCS CLK1_PLLREFCS .tile CIB_R49C3:CIB_PLL3 arc: W1_H02W0101 N1_V02S0101 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R49C42:VCIB_DCU0 enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C43:VCIB_DCUA enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C44:VCIB_DCUB enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C45:VCIB_DCUC enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C46:VCIB_DCUD enum: CIB.JA1MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C47:VCIB_DCUF enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C48:VCIB_DCU3 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C49:VCIB_DCU2 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C50:VCIB_DCUG enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C51:VCIB_DCUH enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C52:VCIB_DCUI enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C53:VCIB_DCU1 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 .tile CIB_R49C69:CIB_PLL3 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R49C6:CIB_EFB0 enum: CIB.JB3MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C7:CIB_EFB1 enum: CIB.JA3MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R4C1:CIB_LR arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 V02N0701 arc: N1_V02N0101 E3_H06W0103 .tile CIB_R4C71:CIB_LR arc: H00R0100 H02E0501 arc: JA3 H02E0701 arc: JB3 H00R0100 arc: JCLK1 G_HPBX0000 arc: JLSR1 V00B0000 arc: N1_V02N0301 H06E0003 arc: V00B0000 V02S0201 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0203 JQ4 .tile CIB_R5C1:CIB_LR arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E1_H01W0100 arc: N1_V02N0701 S1_V02N0701 .tile CIB_R5C71:CIB_LR arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0100 W1_H02E0501 arc: JA0 H00L0000 arc: JA3 H00L0100 arc: JB3 H00R0100 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 V00B0100 arc: JLSR1 V00B0000 arc: S3_V06S0003 H06E0003 arc: V00B0000 H02E0601 arc: V00B0100 V02N0101 arc: W3_H06W0203 JQ4 enum: CIB.JB0MUX 0 .tile CIB_R6C1:CIB_LR arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 E3_H06W0303 .tile CIB_R6C71:CIB_LR arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02E0101 arc: S3_V06S0103 H06E0103 arc: W1_H02W0601 S1_V02N0601 arc: N1_V02N0301 W3_H06E0003 .tile CIB_R7C1:CIB_LR arc: N1_V02N0701 E3_H06W0203 arc: S3_V06S0203 E3_H06W0203 .tile CIB_R7C71:CIB_LR arc: S3_V06S0003 H06E0003 arc: W3_H06W0203 S3_V06N0203 .tile CIB_R8C1:CIB_LR arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 S1_V02N0601 .tile CIB_R8C71:CIB_LR arc: H00L0100 W1_H02E0101 arc: JA0 H00L0100 arc: JA3 H02E0701 arc: JB0 H02E0101 arc: JB3 H02E0101 arc: JCLK0 G_HPBX0000 arc: JCLK1 G_HPBX0000 arc: JLSR0 H02E0301 arc: JLSR1 H02E0301 arc: N1_V02N0001 H06E0003 arc: N1_V02N0601 JQ4 arc: S3_V06S0003 H06E0003 arc: W3_H06W0203 JF4 .tile CIB_R9C1:CIB_LR arc: E1_H02E0601 V02N0601 .tile CIB_R9C71:CIB_LR arc: S1_V02S0401 V01N0001 arc: S3_V06S0303 H06E0303 .tile MIB_R0C38:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R0C42:PIOT0 enum: PIOA.BASE_TYPE INPUT_LVCMOS33 enum: PIOA.HYSTERESIS ON .tile MIB_R0C49:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R0C53:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R0C54:PIOT1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R0C56:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile MIB_R0C60:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile MIB_R0C65:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile MIB_R0C66:PIOT1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 .tile MIB_R0C67:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile MIB_R0C68:PIOT1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 .tile MIB_R0C69:BANKREF1 enum: BANK.VCCIO 3V3 .tile MIB_R11C72:PICR0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R12C72:PICR1 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE UP enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.HYSTERESIS ON enum: PIOD.SLEWRATE FAST enum: PIOD.PULLMODE NONE enum: PIOD.DRIVE 4 enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.HYSTERESIS ON enum: PIOC.SLEWRATE FAST enum: PIOC.PULLMODE NONE enum: PIOC.DRIVE 4 .tile MIB_R13C21:DSP_SPINE_UL0 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R13C31:CMUX_UL_0 arc: G_DCS0CLK0 G_VPFN0000 arc: G_ULPCLK0 G_HPFE0300 arc: G_ULPCLK1 G_HPFE0600 .tile MIB_R13C32:CMUX_UR_0 arc: G_DCS0CLK1 G_VPFN0000 arc: G_URPCLK0 G_HPFE0300 arc: G_URPCLK1 G_HPFE0600 .tile MIB_R13C3:DSP_SPINE_UL1 arc: G_VPTX0000 G_HPRX0000 unknown: F2B0 unknown: F3B0 unknown: F5B0 unknown: F11B0 unknown: F13B0 .tile MIB_R13C41:DSP_SPINE_UR0 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R13C51:MIB_DSP0 arc: JMULTA0 JMUIA0 arc: JMULTA1 JMUIA1 arc: JMULTA10 JMUIA10 arc: JMULTA11 JMUIA11 arc: JMULTA12 JMUIA12 arc: JMULTA13 JMUIA13 arc: JMULTA14 JMUIA14 arc: JMULTA15 JMUIA15 arc: JMULTA2 JMUIA2 arc: JMULTA3 JMUIA3 arc: JMULTA4 JMUIA4 arc: JMULTA5 JMUIA5 arc: JMULTA6 JMUIA6 arc: JMULTA7 JMUIA7 arc: JMULTA8 JMUIA8 arc: JMULTA9 JMUIA9 .tile MIB_R13C59:DSP_SPINE_UR1 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R13C72:MIB_CIB_LR_A word: IOLOGICD.DELAY.DEL_VALUE 0000000 word: IOLOGICC.DELAY.DEL_VALUE 0000000 enum: IOLOGICD.OUTREG.REGSET SET enum: IOLOGICD.OUTREG.OUTREGMODE FF enum: IOLOGICD.CEOMUX CEMUX enum: IOLOGICD.SRMODE ASYNC enum: IOLOGICD.FF.REGSET SET enum: IOLOGICD.FF.INREGMODE FF enum: IOLOGICD.CEMUX CE enum: IOLOGICD.CEIMUX CEMUX enum: IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICD.MTDDRX.REGSET RESET enum: IOLOGICD.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICD.LSROMUX LSRMUX enum: IOLOGICD.LSRIMUX LSRMUX enum: IOLOGICD.CLKOMUX CLK enum: IOLOGICD.GSR ENABLED enum: IOLOGICD.LSRMUX LSR enum: IOLOGICD.CLKIMUX CLK enum: IOLOGICD.MODE IREG_OREG enum: IOLOGICD.DELAY.OUTDEL DISABLED enum: IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICD.IDDRXN.MODE NONE enum: IOLOGICD.ODDRXN.MODE NONE enum: IOLOGICD.MIDDRX.MODE NONE enum: IOLOGICD.MODDRX.MODE NONE enum: IOLOGICD.MTDDRX.MODE NONE enum: IOLOGICD.IOLTOMUX NONE enum: IOLOGICC.OUTREG.REGSET SET enum: IOLOGICC.OUTREG.OUTREGMODE FF enum: IOLOGICC.CEOMUX CEMUX enum: IOLOGICC.SRMODE ASYNC enum: IOLOGICC.FF.REGSET SET enum: IOLOGICC.FF.INREGMODE FF enum: IOLOGICC.CEMUX CE enum: IOLOGICC.CEIMUX CEMUX enum: IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICC.MTDDRX.REGSET RESET enum: IOLOGICC.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICC.LSROMUX LSRMUX enum: IOLOGICC.LSRIMUX LSRMUX enum: IOLOGICC.CLKOMUX CLK enum: IOLOGICC.GSR ENABLED enum: IOLOGICC.LSRMUX LSR enum: IOLOGICC.CLKIMUX CLK enum: IOLOGICC.MODE IREG_OREG enum: IOLOGICC.DELAY.OUTDEL DISABLED enum: IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICC.IDDRXN.MODE NONE enum: IOLOGICC.ODDRXN.MODE NONE enum: IOLOGICC.MIDDRX.MODE NONE enum: IOLOGICC.MODDRX.MODE NONE enum: IOLOGICC.MTDDRX.MODE NONE enum: IOLOGICC.IOLTOMUX NONE enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.DATAMUX_OREG IOLDO enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.DATAMUX_OREG IOLDO .tile MIB_R14C72:PICR0 word: IOLOGICA.DELAY.DEL_VALUE 0000000 word: IOLOGICB.DELAY.DEL_VALUE 0000000 enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.FF.REGSET SET enum: IOLOGICA.FF.INREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEIMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX LSRMUX enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX 0 enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE .tile MIB_R15C72:PICR1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.HYSTERESIS ON enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile MIB_R17C72:PICR0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R18C72:PICR1_DQS0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE UP enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.SLEWRATE FAST .tile MIB_R19C72:PICR2_DQS1 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R1C38:PICT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R1C42:PICT0 enum: PIOA.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R1C49:PICT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R1C53:PICT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R1C54:PICT1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R1C56:PICT0 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.LSROMUX LSRMUX .tile MIB_R1C60:PICT0 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.LSROMUX LSRMUX enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO .tile MIB_R1C65:PICT0 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.LSROMUX LSRMUX .tile MIB_R1C66:PICT1 word: IOLOGICB.DELAY.DEL_VALUE 0000000 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.LSRIMUX 0 enum: IOLOGICB.LSROMUX LSRMUX .tile MIB_R1C67:PICT0 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.LSROMUX LSRMUX enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO .tile MIB_R1C68:PICT1 word: IOLOGICB.DELAY.DEL_VALUE 0000000 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.LSRIMUX 0 enum: IOLOGICB.LSROMUX LSRMUX .tile MIB_R1C72:BANKREF2A enum: BANK.VCCIO 3V3 .tile MIB_R20C72:PICR0_DQS2 word: IOLOGICB.DELAY.DEL_VALUE 0000000 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX 0 enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE .tile MIB_R21C72:PICR1_DQS3 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile MIB_R23C72:PICR0 word: IOLOGICB.DELAY.DEL_VALUE 0000000 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX 0 enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE .tile MIB_R24C72:PICR1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.SLEWRATE FAST enum: PIOD.PULLMODE NONE enum: PIOD.DRIVE 4 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.SLEWRATE FAST enum: PIOC.PULLMODE NONE enum: PIOC.DRIVE 4 .tile MIB_R25C3:LMID_0 arc: G_LDCC3CLKI G_JLLCPLL0CLKOP arc: G_LDCC6CLKI G_JLLCPLL0CLKOS .tile MIB_R25C72:MIB_CIB_LR_A word: IOLOGICC.DELAY.DEL_VALUE 0000000 word: IOLOGICD.DELAY.DEL_VALUE 0000000 enum: IOLOGICC.SRMODE ASYNC enum: IOLOGICC.OUTREG.REGSET SET enum: IOLOGICC.OUTREG.OUTREGMODE FF enum: IOLOGICC.CEMUX CE enum: IOLOGICC.CEOMUX CEMUX enum: IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICC.MTDDRX.REGSET RESET enum: IOLOGICC.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICC.LSROMUX LSRMUX enum: IOLOGICC.LSRIMUX 0 enum: IOLOGICC.CLKOMUX CLK enum: IOLOGICC.GSR ENABLED enum: IOLOGICC.LSRMUX LSR enum: IOLOGICC.CLKIMUX CLK enum: IOLOGICC.MODE IREG_OREG enum: IOLOGICC.DELAY.OUTDEL DISABLED enum: IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICC.IDDRXN.MODE NONE enum: IOLOGICC.ODDRXN.MODE NONE enum: IOLOGICC.MIDDRX.MODE NONE enum: IOLOGICC.MODDRX.MODE NONE enum: IOLOGICC.MTDDRX.MODE NONE enum: IOLOGICC.IOLTOMUX NONE enum: IOLOGICD.SRMODE ASYNC enum: IOLOGICD.OUTREG.REGSET SET enum: IOLOGICD.OUTREG.OUTREGMODE FF enum: IOLOGICD.CEMUX CE enum: IOLOGICD.CEOMUX CEMUX enum: IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICD.MTDDRX.REGSET RESET enum: IOLOGICD.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICD.LSROMUX LSRMUX enum: IOLOGICD.LSRIMUX 0 enum: IOLOGICD.CLKOMUX CLK enum: IOLOGICD.GSR ENABLED enum: IOLOGICD.LSRMUX LSR enum: IOLOGICD.CLKIMUX CLK enum: IOLOGICD.MODE IREG_OREG enum: IOLOGICD.DELAY.OUTDEL DISABLED enum: IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICD.IDDRXN.MODE NONE enum: IOLOGICD.ODDRXN.MODE NONE enum: IOLOGICD.MIDDRX.MODE NONE enum: IOLOGICD.MODDRX.MODE NONE enum: IOLOGICD.MTDDRX.MODE NONE enum: IOLOGICD.IOLTOMUX NONE enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.DATAMUX_OREG IOLDO enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.DATAMUX_OREG IOLDO .tile MIB_R26C72:PICR0 word: IOLOGICA.DELAY.DEL_VALUE 0000000 word: IOLOGICB.DELAY.DEL_VALUE 0000000 enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.FF.REGSET SET enum: IOLOGICB.FF.INREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEIMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX LSRMUX enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO .tile MIB_R27C72:PICR1 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.HYSTERESIS ON enum: PIOD.SLEWRATE FAST enum: PIOD.PULLMODE NONE enum: PIOD.DRIVE 4 enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.HYSTERESIS ON enum: PIOC.SLEWRATE FAST enum: PIOC.PULLMODE NONE enum: PIOC.DRIVE 4 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 .tile MIB_R28C72:PICR2 word: IOLOGICD.DELAY.DEL_VALUE 0000000 word: IOLOGICC.DELAY.DEL_VALUE 0000000 enum: IOLOGICD.OUTREG.REGSET SET enum: IOLOGICD.OUTREG.OUTREGMODE FF enum: IOLOGICD.CEOMUX CEMUX enum: IOLOGICD.SRMODE ASYNC enum: IOLOGICD.FF.REGSET SET enum: IOLOGICD.FF.INREGMODE FF enum: IOLOGICD.CEMUX CE enum: IOLOGICD.CEIMUX CEMUX enum: IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICD.MTDDRX.REGSET RESET enum: IOLOGICD.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICD.LSROMUX LSRMUX enum: IOLOGICD.LSRIMUX LSRMUX enum: IOLOGICD.CLKOMUX CLK enum: IOLOGICD.GSR ENABLED enum: IOLOGICD.LSRMUX LSR enum: IOLOGICD.CLKIMUX CLK enum: IOLOGICD.MODE IREG_OREG enum: IOLOGICD.DELAY.OUTDEL DISABLED enum: IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICD.IDDRXN.MODE NONE enum: IOLOGICD.ODDRXN.MODE NONE enum: IOLOGICD.MIDDRX.MODE NONE enum: IOLOGICD.MODDRX.MODE NONE enum: IOLOGICD.MTDDRX.MODE NONE enum: IOLOGICD.IOLTOMUX NONE enum: IOLOGICC.OUTREG.REGSET SET enum: IOLOGICC.OUTREG.OUTREGMODE FF enum: IOLOGICC.CEOMUX CEMUX enum: IOLOGICC.SRMODE ASYNC enum: IOLOGICC.FF.REGSET SET enum: IOLOGICC.FF.INREGMODE FF enum: IOLOGICC.CEMUX CE enum: IOLOGICC.CEIMUX CEMUX enum: IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICC.MTDDRX.REGSET RESET enum: IOLOGICC.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICC.LSROMUX LSRMUX enum: IOLOGICC.LSRIMUX LSRMUX enum: IOLOGICC.CLKOMUX CLK enum: IOLOGICC.GSR ENABLED enum: IOLOGICC.LSRMUX LSR enum: IOLOGICC.CLKIMUX CLK enum: IOLOGICC.MODE IREG_OREG enum: IOLOGICC.DELAY.OUTDEL DISABLED enum: IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICC.IDDRXN.MODE NONE enum: IOLOGICC.ODDRXN.MODE NONE enum: IOLOGICC.MIDDRX.MODE NONE enum: IOLOGICC.MODDRX.MODE NONE enum: IOLOGICC.MTDDRX.MODE NONE enum: IOLOGICC.IOLTOMUX NONE enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.DATAMUX_OREG IOLDO enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.DATAMUX_OREG IOLDO .tile MIB_R29C72:PICR0 arc: JDIB JPADDIB_PIO enum: PIOB.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R2C72:PICR0 word: IOLOGICA.DELAY.DEL_VALUE 0000000 word: IOLOGICB.DELAY.DEL_VALUE 0000000 enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.FF.REGSET SET enum: IOLOGICB.FF.INREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEIMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX LSRMUX enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO .tile MIB_R30C72:PICR1_DQS0 enum: PIOB.BASE_TYPE INPUT_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE UP .tile MIB_R32C72:PICR0_DQS2 word: IOLOGICA.DELAY.DEL_VALUE 0000000 word: IOLOGICB.DELAY.DEL_VALUE 0000000 enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.FF.REGSET SET enum: IOLOGICA.FF.INREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEIMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX LSRMUX enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.FF.REGSET SET enum: IOLOGICB.FF.INREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEIMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX LSRMUX enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO .tile MIB_R33C72:PICR1_DQS3 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 enum: PIOC.HYSTERESIS ON enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.HYSTERESIS ON enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile MIB_R34C72:PICR2 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R35C0:PICL0 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R35C72:PICR0 word: IOLOGICB.DELAY.DEL_VALUE 0000000 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.FF.REGSET SET enum: IOLOGICB.FF.INREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEIMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX LSRMUX enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.FF.REGSET SET enum: IOLOGICA.FF.INREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEIMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX LSRMUX enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO .tile MIB_R36C0:PICL1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R36C72:PICR1 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.HYSTERESIS ON enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.HYSTERESIS ON enum: PIOD.SLEWRATE FAST enum: PIOD.PULLMODE NONE enum: PIOD.DRIVE 4 .tile MIB_R37C21:EBR_SPINE_LL0 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R37C31:CMUX_LL_0 arc: G_DCS1CLK0 G_VPFN0000 arc: G_LLPCLK0 G_HPFE0300 arc: G_LLPCLK1 G_HPFE0600 .tile MIB_R37C32:CMUX_LR_0 arc: G_DCS1CLK1 G_VPFN0000 arc: G_LRPCLK0 G_HPFE0300 arc: G_LRPCLK1 G_HPFE0600 .tile MIB_R37C3:EBR_SPINE_LL3 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R37C41:EBR_SPINE_LR0 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R37C59:EBR_SPINE_LR1 arc: G_VPTX0000 G_HPRX0000 arc: G_VPTX0100 G_HPRX0100 .tile MIB_R37C72:MIB_CIB_LR_A word: IOLOGICD.DELAY.DEL_VALUE 0000000 enum: IOLOGICD.OUTREG.REGSET SET enum: IOLOGICD.OUTREG.OUTREGMODE FF enum: IOLOGICD.CEOMUX CEMUX enum: IOLOGICD.SRMODE ASYNC enum: IOLOGICD.FF.REGSET SET enum: IOLOGICD.FF.INREGMODE FF enum: IOLOGICD.CEMUX CE enum: IOLOGICD.CEIMUX CEMUX enum: IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICD.MTDDRX.REGSET RESET enum: IOLOGICD.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICD.LSROMUX LSRMUX enum: IOLOGICD.LSRIMUX LSRMUX enum: IOLOGICD.CLKOMUX CLK enum: IOLOGICD.GSR ENABLED enum: IOLOGICD.LSRMUX LSR enum: IOLOGICD.CLKIMUX CLK enum: IOLOGICD.MODE IREG_OREG enum: IOLOGICD.DELAY.OUTDEL DISABLED enum: IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICD.IDDRXN.MODE NONE enum: IOLOGICD.ODDRXN.MODE NONE enum: IOLOGICD.MIDDRX.MODE NONE enum: IOLOGICD.MODDRX.MODE NONE enum: IOLOGICD.MTDDRX.MODE NONE enum: IOLOGICD.IOLTOMUX NONE enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.DATAMUX_OREG IOLDO .tile MIB_R39C0:PICL1 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R39C72:PICR1 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.SLEWRATE FAST enum: PIOD.PULLMODE NONE enum: PIOD.DRIVE 4 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.SLEWRATE FAST enum: PIOC.PULLMODE NONE enum: PIOC.DRIVE 4 .tile MIB_R3C72:PICR1 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.HYSTERESIS ON enum: PIOD.SLEWRATE FAST enum: PIOD.PULLMODE NONE enum: PIOD.DRIVE 4 .tile MIB_R40C0:PICL2 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R40C72:PICR2 word: IOLOGICC.DELAY.DEL_VALUE 0000000 word: IOLOGICD.DELAY.DEL_VALUE 0000000 enum: IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICC.MTDDRX.REGSET RESET enum: IOLOGICC.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICC.LSROMUX 0 enum: IOLOGICC.LSRIMUX 0 enum: IOLOGICC.CLKOMUX CLK enum: IOLOGICC.GSR DISABLED enum: IOLOGICC.LSRMUX LSR enum: IOLOGICC.CLKIMUX CLK enum: IOLOGICC.MODE IDDRX1_ODDRX1 enum: IOLOGICC.DELAY.OUTDEL DISABLED enum: IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICC.IDDRXN.MODE NONE enum: IOLOGICC.ODDRXN.MODE NONE enum: IOLOGICC.MIDDRX.MODE NONE enum: IOLOGICC.MODDRX.MODE NONE enum: IOLOGICC.MTDDRX.MODE NONE enum: IOLOGICC.IOLTOMUX NONE enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.DATAMUX_OREG IOLDO enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.DATAMUX_ODDR IOLDO enum: IOLOGICD.SRMODE ASYNC enum: IOLOGICD.OUTREG.REGSET SET enum: IOLOGICD.OUTREG.OUTREGMODE FF enum: IOLOGICD.CEMUX CE enum: IOLOGICD.CEOMUX CEMUX enum: IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICD.MTDDRX.REGSET RESET enum: IOLOGICD.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICD.LSROMUX LSRMUX enum: IOLOGICD.LSRIMUX 0 enum: IOLOGICD.CLKOMUX CLK enum: IOLOGICD.GSR ENABLED enum: IOLOGICD.LSRMUX LSR enum: IOLOGICD.CLKIMUX CLK enum: IOLOGICD.MODE IREG_OREG enum: IOLOGICD.DELAY.OUTDEL DISABLED enum: IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICD.IDDRXN.MODE NONE enum: IOLOGICD.ODDRXN.MODE NONE enum: IOLOGICD.MIDDRX.MODE NONE enum: IOLOGICD.MODDRX.MODE NONE enum: IOLOGICD.MTDDRX.MODE NONE enum: IOLOGICD.IOLTOMUX NONE .tile MIB_R41C0:PICL0 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R41C72:PICR0 word: IOLOGICB.DELAY.DEL_VALUE 0000000 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX 0 enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE .tile MIB_R42C0:PICL1_DQS0 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R42C72:PICR1_DQS0 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.SLEWRATE FAST enum: PIOD.PULLMODE NONE enum: PIOD.DRIVE 4 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.SLEWRATE FAST enum: PIOC.PULLMODE NONE enum: PIOC.DRIVE 4 .tile MIB_R43C0:PICL2_DQS1 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R43C72:PICR2_DQS1 word: IOLOGICC.DELAY.DEL_VALUE 0000000 word: IOLOGICD.DELAY.DEL_VALUE 0000000 enum: IOLOGICC.SRMODE ASYNC enum: IOLOGICC.OUTREG.REGSET SET enum: IOLOGICC.OUTREG.OUTREGMODE FF enum: IOLOGICC.CEMUX CE enum: IOLOGICC.CEOMUX CEMUX enum: IOLOGICC.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICC.MTDDRX.REGSET RESET enum: IOLOGICC.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICC.LSROMUX LSRMUX enum: IOLOGICC.LSRIMUX 0 enum: IOLOGICC.CLKOMUX CLK enum: IOLOGICC.GSR ENABLED enum: IOLOGICC.LSRMUX LSR enum: IOLOGICC.CLKIMUX CLK enum: IOLOGICC.MODE IREG_OREG enum: IOLOGICC.DELAY.OUTDEL DISABLED enum: IOLOGICC.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICC.IDDRXN.MODE NONE enum: IOLOGICC.ODDRXN.MODE NONE enum: IOLOGICC.MIDDRX.MODE NONE enum: IOLOGICC.MODDRX.MODE NONE enum: IOLOGICC.MTDDRX.MODE NONE enum: IOLOGICC.IOLTOMUX NONE enum: IOLOGICD.SRMODE ASYNC enum: IOLOGICD.OUTREG.REGSET SET enum: IOLOGICD.OUTREG.OUTREGMODE FF enum: IOLOGICD.CEMUX CE enum: IOLOGICD.CEOMUX CEMUX enum: IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICD.MTDDRX.REGSET RESET enum: IOLOGICD.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICD.LSROMUX LSRMUX enum: IOLOGICD.LSRIMUX 0 enum: IOLOGICD.CLKOMUX CLK enum: IOLOGICD.GSR ENABLED enum: IOLOGICD.LSRMUX LSR enum: IOLOGICD.CLKIMUX CLK enum: IOLOGICD.MODE IREG_OREG enum: IOLOGICD.DELAY.OUTDEL DISABLED enum: IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICD.IDDRXN.MODE NONE enum: IOLOGICD.ODDRXN.MODE NONE enum: IOLOGICD.MIDDRX.MODE NONE enum: IOLOGICD.MODDRX.MODE NONE enum: IOLOGICD.MTDDRX.MODE NONE enum: IOLOGICD.IOLTOMUX NONE enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.DATAMUX_OREG IOLDO enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.DATAMUX_OREG IOLDO .tile MIB_R44C0:PICL0_DQS2 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R44C72:PICR0_DQS2 word: IOLOGICB.DELAY.DEL_VALUE 0000000 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX 0 enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE .tile MIB_R45C0:PICL1_DQS3 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R45C72:PICR1_DQS3 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile MIB_R48C0:PICL1 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 enum: PIOC.HYSTERESIS ON .tile MIB_R49C0:MIB_CIB_LR enum: PIOC.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R4C72:PICR2 word: IOLOGICD.DELAY.DEL_VALUE 0000000 enum: IOLOGICD.OUTREG.REGSET SET enum: IOLOGICD.OUTREG.OUTREGMODE FF enum: IOLOGICD.CEOMUX CEMUX enum: IOLOGICD.SRMODE ASYNC enum: IOLOGICD.FF.REGSET SET enum: IOLOGICD.FF.INREGMODE FF enum: IOLOGICD.CEMUX CE enum: IOLOGICD.CEIMUX CEMUX enum: IOLOGICD.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICD.MTDDRX.REGSET RESET enum: IOLOGICD.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICD.LSROMUX LSRMUX enum: IOLOGICD.LSRIMUX LSRMUX enum: IOLOGICD.CLKOMUX CLK enum: IOLOGICD.GSR ENABLED enum: IOLOGICD.LSRMUX LSR enum: IOLOGICD.CLKIMUX CLK enum: IOLOGICD.MODE IREG_OREG enum: IOLOGICD.DELAY.OUTDEL DISABLED enum: IOLOGICD.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICD.IDDRXN.MODE NONE enum: IOLOGICD.ODDRXN.MODE NONE enum: IOLOGICD.MIDDRX.MODE NONE enum: IOLOGICD.MODDRX.MODE NONE enum: IOLOGICD.MTDDRX.MODE NONE enum: IOLOGICD.IOLTOMUX NONE enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.DATAMUX_OREG IOLDO .tile MIB_R50C1:BANKREF6 enum: BANK.VCCIO 3V3 .tile MIB_R50C2:PLL0_LL arc: N1_REFCLK1 N1_JREFCLK1_3 .tile MIB_R50C4:EFB0_PICB0 unknown: F54B1 unknown: F56B1 unknown: F82B1 unknown: F94B1 .tile MIB_R50C71:BANKREF3 enum: BANK.VCCIO 3V3 .tile MIB_R5C72:PICR0 word: IOLOGICA.DELAY.DEL_VALUE 0000000 word: IOLOGICB.DELAY.DEL_VALUE 0000000 enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX 0 enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.FF.REGSET SET enum: IOLOGICB.FF.INREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEIMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX LSRMUX enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO .tile MIB_R6C72:PICR1_DQS0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 .tile MIB_R8C72:PICR0_DQS2 word: IOLOGICB.DELAY.DEL_VALUE 0000000 word: IOLOGICA.DELAY.DEL_VALUE 0000000 enum: IOLOGICB.OUTREG.REGSET SET enum: IOLOGICB.OUTREG.OUTREGMODE FF enum: IOLOGICB.CEOMUX CEMUX enum: IOLOGICB.SRMODE ASYNC enum: IOLOGICB.FF.REGSET SET enum: IOLOGICB.FF.INREGMODE FF enum: IOLOGICB.CEMUX CE enum: IOLOGICB.CEIMUX CEMUX enum: IOLOGICB.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICB.MTDDRX.REGSET RESET enum: IOLOGICB.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICB.LSROMUX LSRMUX enum: IOLOGICB.LSRIMUX LSRMUX enum: IOLOGICB.CLKOMUX CLK enum: IOLOGICB.GSR ENABLED enum: IOLOGICB.LSRMUX LSR enum: IOLOGICB.CLKIMUX CLK enum: IOLOGICB.MODE IREG_OREG enum: IOLOGICB.DELAY.OUTDEL DISABLED enum: IOLOGICB.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICB.IDDRXN.MODE NONE enum: IOLOGICB.ODDRXN.MODE NONE enum: IOLOGICB.MIDDRX.MODE NONE enum: IOLOGICB.MODDRX.MODE NONE enum: IOLOGICB.MTDDRX.MODE NONE enum: IOLOGICB.IOLTOMUX NONE enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.DATAMUX_OREG IOLDO enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.DATAMUX_OREG IOLDO enum: IOLOGICA.OUTREG.REGSET SET enum: IOLOGICA.OUTREG.OUTREGMODE FF enum: IOLOGICA.CEOMUX CEMUX enum: IOLOGICA.SRMODE ASYNC enum: IOLOGICA.FF.REGSET SET enum: IOLOGICA.FF.INREGMODE FF enum: IOLOGICA.CEMUX CE enum: IOLOGICA.CEIMUX CEMUX enum: IOLOGICA.MIDDRX_MODDRX.WRCLKMUX NONE enum: IOLOGICA.MTDDRX.REGSET RESET enum: IOLOGICA.MTDDRX.DQSW_INVERT DISABLED enum: IOLOGICA.LSROMUX LSRMUX enum: IOLOGICA.LSRIMUX LSRMUX enum: IOLOGICA.CLKOMUX CLK enum: IOLOGICA.GSR ENABLED enum: IOLOGICA.LSRMUX LSR enum: IOLOGICA.CLKIMUX CLK enum: IOLOGICA.MODE IREG_OREG enum: IOLOGICA.DELAY.OUTDEL DISABLED enum: IOLOGICA.DELAY.WAIT_FOR_EDGE DISABLED enum: IOLOGICA.IDDRXN.MODE NONE enum: IOLOGICA.ODDRXN.MODE NONE enum: IOLOGICA.MIDDRX.MODE NONE enum: IOLOGICA.MODDRX.MODE NONE enum: IOLOGICA.MTDDRX.MODE NONE enum: IOLOGICA.IOLTOMUX NONE .tile MIB_R9C72:PICR1_DQS3 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOB.SLEWRATE FAST enum: PIOB.PULLMODE NONE enum: PIOB.DRIVE 4 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.HYSTERESIS ON enum: PIOA.SLEWRATE FAST enum: PIOA.PULLMODE NONE enum: PIOA.DRIVE 4 .tile R10C10:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0303 N3_V06S0303 arc: H00R0100 H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0301 V01N0101 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 E1_H02W0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H01W0100 arc: E1_H01E0101 W3_H06E0203 arc: A3 H01E0001 arc: A6 N1_V01N0101 arc: A7 H00R0000 arc: B3 V01N0001 arc: B6 V00B0000 arc: B7 V00B0100 arc: C1 E1_H01W0000 arc: C3 H02W0401 arc: C4 E1_H02W0401 arc: C5 V00T0000 arc: C6 V02N0001 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D3 E1_H02W0201 arc: D4 V02S0401 arc: D5 V02S0601 arc: D6 H00R0100 arc: D7 V02N0601 arc: E3_H06E0203 F7 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0100 F4 arc: LSR0 H02E0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F3 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 arc: W1_H02W0101 F1 arc: W3_H06W0203 F4 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0111111111111111 word: SLICED.K1.INIT 0000000000000001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R10C11:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 N1_V01S0000 arc: H00L0000 E1_H02W0001 arc: H00R0100 V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02E0401 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H02W0501 arc: C6 E1_H01E0101 arc: C7 S1_V02N0201 arc: CE0 H00L0000 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 V00B0000 arc: D7 V01N0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q2 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 F7 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M2 E1_H02W0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V02N0701 F7 arc: N3_V06N0203 Q4 arc: V01S0100 Q0 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R10C12:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02E0001 arc: H00L0100 S1_V02N0101 arc: H00R0100 N1_V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E1_H01W0000 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 V02N0601 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 H01E0001 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A3 H00L0100 arc: A4 V00T0000 arc: A5 S1_V02N0101 arc: B1 H00R0100 arc: B3 V02N0101 arc: B4 H00L0000 arc: B5 E1_H02W0101 arc: B7 V00B0000 arc: C1 V02N0401 arc: C2 N1_V01N0001 arc: C3 H02E0401 arc: C4 E1_H01E0101 arc: C5 H02E0401 arc: C7 V01N0101 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0201 arc: D2 S1_V02N0001 arc: D3 V00B0100 arc: D4 V02S0401 arc: D5 H02W0201 arc: D7 V02S0601 arc: E1_H01E0101 F5 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V02N0301 Q1 arc: N1_V02N0501 Q7 arc: N3_V06N0003 F3 arc: S1_V02S0501 F5 arc: S3_V06S0103 F2 arc: S3_V06S0303 F5 arc: W1_H02W0501 F5 arc: W1_H02W0601 F4 arc: W3_H06W0003 F3 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 0100000000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0100000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R10C13:PLC2 arc: E1_H02E0401 E1_H01W0000 arc: H00L0100 S1_V02N0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H06E0303 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 H02E0601 arc: V00B0100 E1_H02W0501 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A1 V01N0101 arc: A3 H00L0100 arc: A5 S1_V02N0101 arc: A6 N1_V01N0101 arc: A7 V00T0100 arc: B1 V02N0301 arc: B3 H02W0101 arc: B5 H02W0101 arc: B6 H02E0101 arc: B7 S1_V02N0701 arc: C1 E1_H01W0000 arc: C2 N1_V01N0001 arc: C3 H02W0401 arc: C4 E1_H01E0101 arc: C5 E1_H02W0401 arc: C6 V02N0001 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D2 H02E0001 arc: D3 V00B0100 arc: D4 H02E0001 arc: D5 H00R0100 arc: D6 H02E0201 arc: D7 V00B0000 arc: E1_H01E0101 F5 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F4 arc: LSR0 H02E0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q7 arc: N3_V06N0303 F5 arc: S3_V06S0003 F3 arc: S3_V06S0303 F5 arc: V00T0100 F1 arc: V01S0000 F4 arc: W1_H02W0001 F2 arc: W1_H02W0101 F3 arc: W1_H02W0501 F5 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0100000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0001000000000000 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R10C14:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 W1_H02E0401 arc: V00B0000 H02W0601 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 E3_H06W0303 arc: A3 H00L0100 arc: A7 S1_V02N0301 arc: B3 H00R0000 arc: B5 H00L0000 arc: B7 V00B0000 arc: C0 H00R0100 arc: C1 H00L0100 arc: C2 H02E0401 arc: C3 V02S0401 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V02S0001 arc: D2 V00T0100 arc: D3 H02W0201 arc: D5 V02N0601 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F1 arc: LSR1 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F1 arc: N3_V06N0003 F3 arc: N3_V06N0203 F7 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: V01S0000 F0 arc: V01S0100 F2 arc: W1_H02W0701 F7 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000011111111 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0001000000000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R10C15:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0601 H02W0601 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 V02N0001 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0601 arc: E3_H06E0303 W3_H06E0203 arc: B1 H02E0301 arc: B3 H00R0000 arc: C1 N1_V01N0001 arc: C3 H02E0601 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D3 S1_V02N0001 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H01W0000 Q6 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M4 V00B0000 arc: M6 N1_V01N0101 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N3_V06N0003 F3 arc: N3_V06N0103 F1 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R10C16:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: S3_V06S0203 H06W0203 arc: V00T0000 S1_V02N0601 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: A1 H02W0501 arc: B1 V02N0101 arc: B2 H02E0301 arc: B3 V02N0101 arc: B5 H00R0000 arc: C1 H02E0401 arc: C2 H02E0401 arc: C3 V02N0601 arc: C4 V00B0100 arc: C5 H02W0401 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 V00T0100 arc: D3 V02N0201 arc: D4 S1_V02N0401 arc: D5 H02E0201 arc: E1_H01E0001 F4 arc: E1_H02E0501 F5 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q6 arc: H01W0100 F4 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M6 W1_H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F0 arc: N3_V06N0303 F5 arc: S1_V02S0601 F4 arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 arc: V00B0100 F5 arc: V00T0100 F3 arc: V01S0000 F3 arc: V01S0100 F4 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000001100000000 word: SLICEB.K0.INIT 1100111111111111 word: SLICEB.K1.INIT 0000000000110000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111110 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R10C17:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V02N0601 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H01E0101 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H01E0001 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: A1 E1_H01E0001 arc: A4 N1_V01N0101 arc: B1 V00T0000 arc: B4 H00R0000 arc: B5 V02N0501 arc: C1 H00R0100 arc: C4 H02W0401 arc: C5 V02N0201 arc: CE1 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D4 V00B0000 arc: D5 H02E0201 arc: E1_H01E0001 Q6 arc: E1_H02E0101 F1 arc: E1_H02E0201 Q2 arc: E1_H02E0701 Q5 arc: E3_H06E0203 F4 arc: E3_H06E0303 Q5 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M2 V00B0100 arc: M6 H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q5 arc: V01S0100 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0010000010101010 word: SLICEC.K1.INIT 0000001100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R10C18:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 V02S0501 arc: E3_H06E0103 S3_V06N0103 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0301 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 N1_V02S0701 arc: W1_H02W0401 N1_V01S0000 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: B0 H00R0100 arc: B3 V02S0101 arc: B7 V00B0100 arc: C0 V02S0401 arc: C2 H00L0100 arc: C3 S1_V02N0401 arc: C6 V02N0201 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 V02N0001 arc: D3 V00T0100 arc: D6 V02N0601 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: E1_H02E0601 Q4 arc: E1_H02E0701 F7 arc: E3_H06E0003 F3 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 F0 arc: H01W0100 Q4 arc: M0 H02E0601 arc: M4 H02W0401 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F2 arc: N1_V02N0601 Q4 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: S1_V02S0601 F6 arc: S3_V06S0103 F2 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: V01S0000 F7 arc: V01S0100 F7 arc: W1_H02W0101 F3 arc: W1_H02W0601 Q4 arc: W3_H06W0003 F3 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000001100000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000001100000000 word: SLICEA.K0.INIT 0011001100110001 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R10C19:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 H01E0001 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02N0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 H02W0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0401 V02S0401 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 V01N0101 arc: A2 E1_H01E0001 arc: A3 E1_H02W0701 arc: A4 S1_V02N0101 arc: A5 V00T0100 arc: A6 F7 arc: A7 H02W0501 arc: B1 E1_H02W0301 arc: B2 H02W0101 arc: B3 V02S0301 arc: B4 H00R0000 arc: B5 H00L0000 arc: B6 W1_H02E0101 arc: B7 V00B0000 arc: C1 H02W0401 arc: C2 H02W0601 arc: C3 E1_H01W0000 arc: C4 V02N0201 arc: C5 V00T0000 arc: C6 E1_H01E0101 arc: C7 H01E0001 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 V00B0100 arc: D3 E1_H02W0001 arc: D4 E1_H02W0201 arc: D5 V02N0401 arc: D6 E1_H01W0100 arc: D7 H00R0100 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F1 arc: E3_H06E0103 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0111111111111111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0111111111111111 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R10C20:PLC2 arc: E1_H02E0601 W1_H02E0601 arc: H00R0000 S1_V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06E0203 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 E1_H02W0601 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A1 E1_H02W0501 arc: A5 V02N0101 arc: A6 V00T0100 arc: A7 H00L0000 arc: B1 E1_H02W0301 arc: B5 V02S0701 arc: B6 V02N0501 arc: B7 V00T0000 arc: C1 H00R0100 arc: C5 H02W0601 arc: C6 V01N0101 arc: C7 V02S0001 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D5 W1_H02E0201 arc: D6 V02N0401 arc: D7 H02E0001 arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F7 arc: H01W0100 F1 arc: LSR0 H02E0301 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R10C21:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 W1_H02E0101 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 E1_H02W0401 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0301 H06E0003 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 H06E0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02N0601 arc: S3_V06S0303 W3_H06E0303 arc: A5 V00T0000 arc: A7 H00L0000 arc: B5 N1_V01S0000 arc: B7 S1_V02N0501 arc: C5 W1_H02E0601 arc: C7 V00T0100 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 H02W0001 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q0 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M2 E1_H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R10C22:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0103 S3_V06N0103 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0303 H06E0303 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A7 H00L0000 arc: B7 V01S0000 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D7 H00R0100 arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 H02W0601 arc: M2 H02W0601 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: S1_V02S0201 Q2 arc: V01S0000 Q4 arc: V01S0100 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R10C23:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 S1_V02N0201 arc: H00L0100 N1_V02S0101 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: V00B0000 V02S0201 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: H01W0100 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: B3 H02E0101 arc: B6 V00B0100 arc: B7 V00B0100 arc: C3 H02E0601 arc: C6 H02E0601 arc: C7 V01N0101 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 Q2 arc: D3 V02S0201 arc: D6 V00B0000 arc: D7 S1_V02N0601 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0001 Q2 arc: S1_V02S0101 F3 arc: S1_V02S0601 F6 arc: S3_V06S0203 Q7 arc: V00B0100 Q7 arc: V00T0100 F3 arc: V01S0100 Q7 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1111110011001100 word: SLICED.K0.INIT 1111001100110011 word: SLICED.K1.INIT 1100111111001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R10C24:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 N1_V01S0000 arc: H00R0100 H02W0701 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H02W0601 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0501 S3_V06N0303 arc: V00B0000 H02W0401 arc: V00B0100 H02W0501 arc: W1_H02W0501 V02S0501 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: B7 V01S0000 arc: C1 H00R0100 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D6 E1_H01W0100 arc: D7 V00B0000 arc: E1_H01E0101 Q7 arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: LSR0 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S3_V06S0203 Q7 arc: V00T0100 F1 arc: V01S0000 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111110000 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1100111111001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 .tile R10C25:PLC2 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0401 V01N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 H02W0701 arc: B1 H00R0100 arc: B5 V02N0501 arc: C1 S1_V02N0401 arc: C4 Q4 arc: C5 V02S0001 arc: C6 H02E0601 arc: C7 V00T0000 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D4 H02W0201 arc: D5 H02W0201 arc: D6 H02W0001 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: E1_H02E0501 F7 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F1 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: V01S0000 F6 arc: V01S0100 Q5 arc: W1_H02W0401 Q4 arc: W1_H02W0501 Q5 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1111111111000011 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001000100010000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R10C26:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02N0701 arc: H00L0100 V02N0301 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 V01N0001 arc: S1_V02S0201 W1_H02E0201 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 S1_V02N0701 arc: A3 V02N0501 arc: B1 S1_V02N0101 arc: B3 H00L0000 arc: B5 V01S0000 arc: C1 V02N0601 arc: C3 H00L0100 arc: C4 V02N0001 arc: C5 V00T0000 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 H01E0101 arc: D4 V01N0001 arc: D5 E1_H01W0100 arc: D7 V01N0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: E1_H02E0001 F0 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0100 F4 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M2 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F0 arc: S3_V06S0303 Q5 arc: V01S0000 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111110000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1100111111001100 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111111111111110 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R10C27:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 V02N0101 arc: H00R0100 W1_H02E0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 W1_H02E0501 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02W0401 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0301 H01E0101 arc: E3_H06E0303 W3_H06E0203 arc: A0 H02E0701 arc: A2 V02N0501 arc: B0 V00T0000 arc: B2 H00L0000 arc: B3 H00R0000 arc: B4 V02S0501 arc: B5 V01S0000 arc: B7 V00B0100 arc: C0 V02N0401 arc: C2 H02E0401 arc: C3 H00L0000 arc: C4 V02S0001 arc: C5 H02E0401 arc: C6 Q6 arc: C7 E1_H01E0101 arc: CE0 H02W0101 arc: CE1 H00L0100 arc: CE2 S1_V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D2 V02N0201 arc: D3 V00T0100 arc: D4 V02N0601 arc: D5 V02S0601 arc: D6 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 Q6 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F5 arc: N1_V02N0001 Q0 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q4 arc: N3_V06N0303 F5 arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 arc: V00B0100 Q7 arc: V01S0000 Q3 arc: V01S0100 Q3 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1111111111000011 word: SLICEC.K0.INIT 1111110011001100 word: SLICEC.K1.INIT 0000000000001100 word: SLICEB.K0.INIT 0000010011000101 word: SLICEB.K1.INIT 1111111100110000 word: SLICEA.K0.INIT 1111111111111110 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R10C28:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02S0601 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 W1_H02E0001 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V06S0303 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 N1_V02S0501 arc: A3 V00T0000 arc: B0 F1 arc: B2 H01W0100 arc: B3 H02W0101 arc: C0 H00L0100 arc: C1 E1_H02W0601 arc: C2 H00L0000 arc: C3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H02E0001 arc: D2 H00R0000 arc: D3 V00T0100 arc: E1_H01E0001 Q6 arc: E1_H02E0101 F3 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0301 F1 arc: N3_V06N0103 F1 arc: S3_V06S0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111000001110111 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R10C29:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 V02S0601 arc: H00R0000 V02N0401 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02E0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0701 S1_V02N0701 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E3_H06E0003 Q0 arc: LSR0 H02E0501 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V00B0000 Q4 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R10C2:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 .tile R10C30:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 N1_V02S0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S1_V02N0401 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A5 V00T0000 arc: A7 V02N0101 arc: B4 V01S0000 arc: B5 H00R0000 arc: B6 V02N0701 arc: B7 H02E0101 arc: C4 V00T0100 arc: C5 H02E0601 arc: C6 V00T0100 arc: C7 V02S0201 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 V02N0601 arc: D5 H00L0100 arc: D6 H02W0001 arc: D7 V02N0401 arc: E3_H06E0203 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F5 arc: M0 V00B0000 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F7 arc: S3_V06S0303 F6 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R10C31:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0601 V02S0601 arc: H00R0000 H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H02W0401 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: B0 V00B0000 arc: C0 N1_V01N0001 arc: C1 H00L0000 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: F0 F5A_SLICE arc: H00L0000 Q2 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: V00B0000 Q4 arc: V01S0000 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0011001100001111 word: SLICEA.K1.INIT 1111111100001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R10C32:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 W1_H02E0101 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 E1_H02W0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 E1_H01E0001 arc: B1 V00B0000 arc: C1 H02E0601 arc: C3 H00R0100 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0201 arc: D3 V00B0100 arc: E1_H01E0001 Q4 arc: E1_H02E0301 F3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: M4 E1_H02W0401 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: V00B0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111111111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111010111110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R10C33:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 V06N0303 arc: H00L0100 N1_V02S0301 arc: H00R0100 H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0501 E1_H02W0501 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: CE0 H02W0101 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H02E0201 Q0 arc: E1_H02E0401 Q6 arc: E1_H02E0601 Q4 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0401 Q6 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R10C34:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06N0303 arc: H00L0000 V02N0201 arc: H00R0000 H02E0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 E1_H02W0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: A1 H01E0001 arc: A2 H01E0001 arc: B1 H02E0301 arc: B2 H02E0301 arc: B7 V00B0100 arc: C1 H00L0000 arc: C2 H00L0000 arc: C6 V00T0100 arc: C7 W1_H02E0401 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D2 H02W0201 arc: D6 W1_H02E0201 arc: D7 V01N0001 arc: E1_H01E0101 F6 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 Q4 arc: H01W0100 F1 arc: LSR0 H02W0301 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N3_V06N0103 F1 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000011111111 word: SLICED.K1.INIT 0000110000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 1000010000100001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R10C35:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 V01N0101 arc: H00L0000 H02W0201 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 E1_H02W0501 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A7 W1_H02E0501 arc: B7 V02N0701 arc: C1 H02E0401 arc: C7 V00T0100 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D7 H00R0100 arc: E1_H01E0101 F1 arc: E1_H02E0701 F7 arc: F1 F1_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q2 arc: LSR1 H02E0301 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 F1 arc: N1_V02N0301 F1 arc: S3_V06S0103 F1 arc: V01S0000 Q2 arc: V01S0100 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R10C36:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02S0001 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02W0401 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: E1_H02E0501 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: A4 V02N0101 arc: A5 N1_V01N0101 arc: A7 V02S0301 arc: B4 V00B0100 arc: B5 V02S0701 arc: B7 H02W0101 arc: C4 V01N0101 arc: C5 V02S0201 arc: C7 V00T0000 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V00T0100 arc: D2 H02W0001 arc: D3 H02E0201 arc: D4 H02W0201 arc: D5 H00R0100 arc: D7 E1_H02W0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q6 arc: H01W0100 Q4 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0000 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F4 arc: V01S0100 Q6 arc: W1_H02W0401 Q6 arc: W3_H06W0203 F4 word: SLICEC.K0.INIT 0000111000000100 word: SLICEC.K1.INIT 0001000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R10C37:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02E0601 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H01E0001 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 V00B0000 arc: B6 N1_V01S0000 arc: B7 N1_V01S0000 arc: C0 H00L0000 arc: C1 H00L0000 arc: C6 S1_V02N0001 arc: C7 S1_V02N0001 arc: D0 V00B0100 arc: D1 V00B0100 arc: D6 V01N0001 arc: D7 V01N0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 H02W0601 arc: M1 H00L0100 arc: M2 H02W0601 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: W1_H02W0101 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000100001 word: SLICEA.K1.INIT 0010000100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000100001 word: SLICED.K1.INIT 0010000100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R10C38:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 H02E0201 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0001 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V01N0001 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A6 V02S0301 arc: A7 H00R0000 arc: B0 V00B0000 arc: B1 H02W0101 arc: B3 H00R0100 arc: B5 V01S0000 arc: B6 V02N0501 arc: B7 H02E0101 arc: C0 H00L0000 arc: C1 V02S0401 arc: C3 V02S0601 arc: C5 V00T0100 arc: C6 V00T0000 arc: C7 H02E0601 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D3 H02E0001 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 H02E0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q5 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F3 arc: S1_V02S0001 F0 arc: S1_V02S0301 F1 arc: V01S0100 F1 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111111001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111111001100 word: SLICEA.K0.INIT 0000111111001100 word: SLICEA.K1.INIT 0000111111001100 word: SLICED.K0.INIT 0000001100100010 word: SLICED.K1.INIT 0000001100100010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R10C39:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0501 V01N0101 arc: H00L0000 V02S0001 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V06N0203 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0000 arc: A2 V00B0000 arc: B0 V02S0301 arc: B2 V02S0301 arc: C0 N1_V01S0100 arc: C2 N1_V01S0100 arc: D0 H01E0101 arc: D2 H01E0101 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 H01E0001 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 H02E0201 arc: M4 V00B0100 arc: M5 E1_H02W0001 arc: M6 V00B0100 word: SLICEA.K0.INIT 0000000000010101 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011101010 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R10C3:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02E0201 arc: H00R0000 H02E0401 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H06W0103 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02N0401 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q6 arc: E1_H02E0601 Q6 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M2 W1_H02E0601 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V01S0000 Q0 arc: V01S0100 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R10C40:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 V02N0401 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0301 N3_V06S0003 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0103 E3_H06W0103 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02N0001 arc: D2 E1_H02W0001 arc: D3 H02W0201 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: H01W0100 Q4 arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0303 Q6 arc: W1_H02W0101 F1 arc: W1_H02W0401 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R10C41:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V02N0701 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 N1_V02S0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: H01W0000 Q2 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q4 arc: W1_H02W0201 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R10C42:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 W1_H02E0401 arc: V00B0100 W1_H02E0701 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0701 E1_H01W0100 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 H00L0100 arc: A5 H02E0701 arc: A6 S1_V02N0101 arc: A7 S1_V02N0301 arc: B0 H00R0100 arc: B2 H01W0100 arc: B3 V02N0301 arc: B5 H00R0000 arc: B6 V01S0000 arc: B7 S1_V02N0501 arc: C0 V02N0401 arc: C2 H00L0000 arc: C3 V02N0601 arc: C5 H02E0401 arc: C6 E1_H02W0601 arc: C7 N1_V02S0001 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 H02E0201 arc: D3 V00B0100 arc: D5 V00B0000 arc: D6 H01W0000 arc: D7 N1_V02S0401 arc: E3_H06E0003 Q0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 Q3 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: S1_V02S0401 F6 arc: S3_V06S0003 Q0 arc: V01S0000 F7 arc: W3_H06W0003 Q3 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000010101010 word: SLICED.K0.INIT 0000000000001101 word: SLICED.K1.INIT 0000000000001000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1100000011111111 word: SLICEA.K0.INIT 1010000011101100 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R10C43:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 H01E0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 E1_H01W0000 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: V00T0100 H02E0101 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 V02N0401 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: A6 H00R0000 arc: A7 V02S0101 arc: B6 V00B0000 arc: B7 H02W0101 arc: C6 V00T0100 arc: C7 F6 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D6 V02N0601 arc: D7 N1_V02S0401 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0203 Q4 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: W1_H02W0601 F6 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011001010 word: SLICED.K1.INIT 1010101111101111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R10C44:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 H01E0001 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 V01N0101 arc: H00L0000 W1_H02E0001 arc: H00R0100 V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 H02E0201 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 W1_H02E0601 arc: V00B0100 E1_H02W0501 arc: V00T0100 W1_H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0101 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: B3 H02W0301 arc: B5 V00B0100 arc: B7 H02E0101 arc: C0 H00R0100 arc: C1 H00L0100 arc: C3 H00L0000 arc: C5 E1_H02W0401 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 F0 arc: D3 H02W0201 arc: D5 F0 arc: D7 F0 arc: E1_H02E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F7 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: W3_H06W0003 F3 arc: W3_H06W0103 Q1 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111100 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R10C45:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 H06E0003 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H01W0000 arc: E3_H06E0103 W3_H06E0103 arc: A0 V02S0501 arc: A1 H00L0000 arc: A3 H00L0100 arc: A4 N1_V01N0101 arc: A5 V02N0301 arc: B0 H02W0301 arc: B1 V02N0101 arc: B2 H01W0100 arc: B3 H00R0100 arc: B4 N1_V02S0701 arc: B5 V02S0701 arc: B6 E1_H02W0301 arc: B7 E1_H02W0101 arc: C0 V02N0401 arc: C1 N1_V01N0001 arc: C2 S1_V02N0401 arc: C3 V02S0601 arc: C4 V00T0000 arc: C5 V02S0201 arc: C6 V01N0101 arc: C7 W1_H02E0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V00T0100 arc: D2 E1_H02W0201 arc: D3 V00B0100 arc: D4 W1_H02E0001 arc: D5 V02N0601 arc: D6 H01W0000 arc: D7 H01W0000 arc: E1_H02E0101 F1 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F4 arc: H01W0100 Q3 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q5 arc: S1_V02S0301 Q3 arc: S3_V06S0303 F6 arc: W3_H06W0003 Q3 arc: W3_H06W0103 F2 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 1010110000000000 word: SLICEC.K1.INIT 1111100011111111 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111111111111000 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 0000101100001111 word: SLICED.K0.INIT 0000000000111111 word: SLICED.K1.INIT 0000000011001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R10C46:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 N1_V02S0401 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0003 V01N0001 arc: W3_H06W0103 E1_H01W0100 arc: A3 V02N0701 arc: B1 V02S0301 arc: B3 H00L0000 arc: C1 S1_V02N0401 arc: C3 H00L0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D3 V02N0201 arc: E3_H06E0103 F1 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: H01W0100 Q6 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0101011111011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R10C47:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 V01N0101 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02S0001 arc: V00T0000 N1_V02S0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: E1_H02E0201 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: A0 H00R0000 arc: A3 H02E0501 arc: A5 V00B0000 arc: A6 H02E0701 arc: A7 H02E0501 arc: B0 H02E0301 arc: B2 H01W0100 arc: B3 E1_H02W0101 arc: B4 V01S0000 arc: B5 H02W0301 arc: B6 H02W0101 arc: B7 S1_V02N0501 arc: C0 H00L0000 arc: C2 S1_V02N0401 arc: C3 S1_V02N0601 arc: C4 S1_V02N0001 arc: C5 V00T0100 arc: C6 S1_V02N0201 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 V02N0201 arc: D3 E1_H02W0001 arc: D4 V02N0601 arc: D5 H00L0100 arc: D6 E1_H01W0100 arc: D7 H00R0100 arc: E1_H01E0001 Q0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: V00B0100 F7 arc: V01S0000 Q5 arc: V01S0100 F6 arc: W1_H02W0501 Q5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 1000000010101010 word: SLICED.K1.INIT 1000000010101010 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111111111111000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 0011101110111011 word: SLICEA.K0.INIT 1111111111111000 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R10C48:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 V01N0101 arc: H00L0000 V02S0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 H06E0303 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V02N0701 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0303 V06S0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A6 W1_H02E0701 arc: A7 V02N0101 arc: B1 H00R0100 arc: B2 H00L0000 arc: B4 V02S0501 arc: B6 H02E0101 arc: B7 H02E0301 arc: C1 H00L0100 arc: C2 H02W0401 arc: C3 V02S0601 arc: C4 S1_V02N0201 arc: C5 V00T0100 arc: C6 H02E0401 arc: C7 H02E0401 arc: D1 W1_H02E0001 arc: D2 H00R0000 arc: D3 V00B0100 arc: D4 S1_V02N0601 arc: D5 S1_V02N0401 arc: D6 H01W0000 arc: D7 S1_V02N0401 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F2 arc: M2 V00T0000 arc: M4 V00T0000 arc: N1_V01N0001 F7 arc: W1_H02W0601 F6 word: SLICED.K0.INIT 1000000010101010 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000001111001111 word: SLICEC.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 1111000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R10C49:PLC2 arc: E1_H02E0401 V06N0203 arc: E3_H06E0103 V06S0103 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00L0100 V02N0101 arc: H00R0100 V02S0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0001 arc: V00T0100 V02S0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: A0 H02E0701 arc: A1 W1_H02E0701 arc: A3 H02E0701 arc: B0 H02E0101 arc: B1 H00R0100 arc: B2 H00L0000 arc: B3 H02E0101 arc: B6 V00B0000 arc: C0 N1_V01S0100 arc: C1 E1_H02W0401 arc: C2 H00L0100 arc: C3 V02S0401 arc: C6 E1_H02W0401 arc: C7 N1_V02S0001 arc: D0 H00R0000 arc: D1 V02S0001 arc: D2 H02W0001 arc: D3 V02S0201 arc: D6 S1_V02N0401 arc: D7 V01N0001 arc: E1_H01E0001 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: M6 V00T0100 arc: N1_V01N0101 F1 arc: S1_V02S0001 F0 arc: S1_V02S0201 F2 word: SLICEB.K0.INIT 0000000000111111 word: SLICEB.K1.INIT 1000000010101010 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000110000111111 word: SLICED.K1.INIT 1111000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R10C4:PLC2 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H02W0601 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 H02E0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H01W0000 arc: A4 V02N0301 arc: A5 W1_H02E0701 arc: A7 N1_V01N0101 arc: B4 V01S0000 arc: B5 H00L0000 arc: B7 V00T0000 arc: C4 E1_H01E0101 arc: C5 V00B0100 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H00L0100 arc: D5 V00B0000 arc: D7 H00R0100 arc: E1_H01E0101 F7 arc: E3_H06E0203 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 H01E0001 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q2 arc: S3_V06S0003 Q0 arc: V01S0000 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R10C50:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 V06S0203 arc: H00R0000 H02E0401 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: A5 V00B0000 arc: B4 V01S0000 arc: B5 H00R0000 arc: C4 E1_H02W0601 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D4 H02W0001 arc: D5 V02N0601 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR1 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: V01S0000 Q5 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111111111111000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R10C51:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 V02N0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: H01W0000 W3_H06E0103 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q2 arc: E1_H02E0601 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: H01W0100 Q2 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: S1_V02S0401 Q6 arc: V01S0000 Q2 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R10C52:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 H01E0101 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 H01E0101 arc: H00L0000 H02W0201 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 H02E0401 arc: V00T0000 V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A2 V02N0501 arc: A3 V01N0101 arc: A5 W1_H02E0501 arc: A7 V02N0101 arc: B0 H02E0101 arc: B1 V00B0000 arc: B2 H02E0301 arc: B3 H02E0101 arc: B5 E1_H02W0101 arc: B7 H02E0301 arc: C0 H00L0100 arc: C1 V02S0401 arc: C2 S1_V02N0401 arc: C3 N1_V02S0601 arc: C5 H02E0401 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 V00B0100 arc: D5 E1_H02W0201 arc: D7 H00R0100 arc: E1_H01E0001 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V00B0100 F7 arc: V00T0100 F3 arc: V01S0100 F1 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000101000001100 word: SLICEA.K0.INIT 1111111111010101 word: SLICEA.K1.INIT 0000101000001100 word: SLICEB.K0.INIT 1000000011111111 word: SLICEB.K1.INIT 0000000000010101 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 0010101111010111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R10C53:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 W1_H02E0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 H02W0701 arc: A1 N1_V02S0701 arc: A3 V00T0000 arc: A5 V00B0000 arc: A7 H02E0701 arc: B0 S1_V02N0101 arc: B1 V02N0101 arc: B3 H00R0100 arc: B5 H02E0301 arc: B7 N1_V02S0701 arc: C0 H00L0000 arc: C1 H00L0100 arc: C3 N1_V01N0001 arc: C5 H02E0601 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H00R0000 arc: D3 S1_V02N0201 arc: D5 H02W0201 arc: D7 H02W0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: M2 V00B0100 arc: M4 E1_H02W0401 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: V00T0100 F1 arc: V01S0100 F4 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1111111111010101 word: SLICEA.K1.INIT 0000110000001010 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 0010101111010111 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 0100110110110111 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0010101111010111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R10C54:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0201 H06E0103 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 H06E0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 H01E0101 arc: H01W0000 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A0 E1_H01E0001 arc: A1 S1_V02N0501 arc: A2 H01E0001 arc: A3 H02W0501 arc: A5 H02W0701 arc: A7 W1_H02E0701 arc: B0 V02N0101 arc: B1 V00T0000 arc: B2 V02N0101 arc: B3 H00R0100 arc: B4 E1_H02W0301 arc: B5 E1_H02W0101 arc: B7 S1_V02N0501 arc: C0 V02N0601 arc: C1 H00L0100 arc: C2 H00L0000 arc: C3 H00L0100 arc: C4 N1_V02S0201 arc: C5 V02N0201 arc: C7 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 H00R0000 arc: D4 V02S0601 arc: D5 H02W0001 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q0 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: S3_V06S0203 F4 arc: V00T0100 F3 arc: V01S0000 Q2 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000111111 word: SLICEC.K1.INIT 1000000010101010 word: SLICEA.K0.INIT 1111111111010101 word: SLICEA.K1.INIT 0000110000001010 word: SLICEB.K0.INIT 1111111111010101 word: SLICEB.K1.INIT 0000110000001010 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 0010101111010111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R10C55:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 V06N0203 arc: E1_H02E0701 V02S0701 arc: H00L0000 N1_V02S0001 arc: H00L0100 W1_H02E0301 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 S3_V06N0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 V02S0701 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A1 H00L0100 arc: A2 V02S0701 arc: A3 V02N0701 arc: A4 N1_V01N0101 arc: A5 N1_V02S0301 arc: A7 H02E0701 arc: B1 H00R0100 arc: B2 H02W0101 arc: B3 V02S0301 arc: B4 V02S0501 arc: B5 V00B0100 arc: B7 H02E0101 arc: C1 H00L0000 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 V00T0100 arc: C5 S1_V02N0201 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 E1_H02W0001 arc: D3 H02E0001 arc: D4 H01W0000 arc: D5 V02N0401 arc: D7 H02W0201 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F7 arc: M0 V00B0000 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F0 arc: V01S0000 F2 arc: W1_H02W0601 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000010101010 word: SLICEB.K0.INIT 1000000010101010 word: SLICEB.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1111111111010101 word: SLICEC.K1.INIT 0000110000001010 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0011100110011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R10C56:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V02S0401 arc: H00L0000 H02W0201 arc: H00L0100 H02W0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0701 H02W0701 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 V02S0701 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A1 H00L0100 arc: A5 V02S0101 arc: A7 H02E0701 arc: B1 V02S0301 arc: B2 H02E0101 arc: B5 V02S0501 arc: B6 V02N0701 arc: B7 W1_H02E0101 arc: C1 H00R0100 arc: C2 H00L0000 arc: C3 V02S0601 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 E1_H01E0101 arc: D1 H00R0000 arc: D2 V02N0001 arc: D3 S1_V02N0001 arc: D5 V02N0601 arc: D6 H01W0000 arc: D7 V02N0601 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 V00B0100 arc: M2 V00B0000 arc: N1_V01N0001 F5 arc: V01S0000 F0 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000111111 word: SLICED.K1.INIT 1000101000001010 word: SLICEB.K0.INIT 0000110000111111 word: SLICEB.K1.INIT 1111000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0010110110110111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R10C57:PLC2 arc: E1_H02E0501 V02N0501 arc: H00L0000 H02E0201 arc: H00L0100 H02W0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0401 V01N0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02W0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 E1_H02W0401 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A5 N1_V02S0101 arc: A6 V00T0100 arc: A7 V02N0101 arc: B0 V00T0000 arc: B2 H00R0100 arc: B5 S1_V02N0701 arc: B6 V01S0000 arc: B7 V02N0701 arc: C0 H00L0100 arc: C1 V02S0601 arc: C2 H00L0000 arc: C3 H00R0100 arc: C5 H02W0601 arc: C6 H02E0401 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V00B0100 arc: D2 H00R0000 arc: D3 E1_H02W0201 arc: D5 N1_V02S0601 arc: D6 H01W0000 arc: D7 N1_V02S0401 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: MUXCLK3 CLK0 arc: V01S0000 F4 arc: W1_H02W0001 F2 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1111111110110011 word: SLICED.K1.INIT 0000101000001100 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 1111000011111111 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 0011100110011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R10C58:PLC2 arc: H00L0000 V02N0201 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H02W0401 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0003 N1_V01S0000 arc: A4 S1_V02N0301 arc: A5 H02E0501 arc: A7 S1_V02N0301 arc: B4 H00L0000 arc: B5 V00B0100 arc: B7 V00B0000 arc: C4 S1_V02N0201 arc: C5 E1_H02W0601 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 H01W0000 arc: D7 V02S0401 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 F7 arc: MUXCLK2 CLK0 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000110000001010 word: SLICEC.K0.INIT 1000000011111111 word: SLICEC.K1.INIT 0000000000010011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R10C59:PLC2 arc: N1_V02N0401 E1_H02W0401 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: H01W0100 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 .tile R10C5:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 S1_V02N0601 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 H06W0003 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A7 N1_V01N0101 arc: B7 H02E0301 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: E1_H02E0701 F7 arc: F7 F7_SLICE arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M2 W1_H02E0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: S1_V02S0601 Q4 arc: S3_V06S0103 Q2 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R10C60:PLC2 arc: N1_V02N0601 H06E0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 .tile R10C61:PLC2 arc: N1_V02N0301 H01E0101 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 .tile R10C62:PLC2 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 H01E0101 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 .tile R10C63:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0601 W3_H06E0303 .tile R10C64:PLC2 arc: N1_V02N0201 H02E0201 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0303 N1_V02S0501 .tile R10C67:PLC2 arc: S3_V06S0003 W3_H06E0003 .tile R10C68:PLC2 arc: E3_H06E0103 W3_H06E0103 .tile R10C6:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0401 E3_H06W0203 arc: H00L0100 V02N0101 arc: H00R0100 E1_H02W0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0401 E1_H02W0101 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A5 V00T0000 arc: A6 H02E0701 arc: A7 S1_V02N0101 arc: B5 V01S0000 arc: B6 E1_H02W0301 arc: B7 H02E0301 arc: C5 E1_H02W0401 arc: C6 E1_H01E0101 arc: C7 W1_H02E0601 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V02N0601 arc: D6 H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F5 arc: E1_H02E0201 Q2 arc: E3_H06E0303 F6 arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 H02E0601 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: V00T0000 Q0 arc: V01S0000 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R10C70:PLC2 arc: N1_V02N0301 S1_V02N0301 .tile R10C7:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0601 V06S0303 arc: H00L0000 H02E0001 arc: H00L0100 V02N0101 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02S0301 arc: V00T0100 V02N0701 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H01E0001 arc: B1 V01N0001 arc: C1 H00L0000 arc: CE1 H02E0101 arc: CE2 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M2 H02W0601 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: S3_V06S0303 Q6 arc: V00T0000 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R10C8:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 E3_H06W0303 arc: H00L0100 V02N0301 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0201 V01N0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 E1_H02W0701 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: C3 E1_H02W0401 arc: CE0 H00L0100 arc: CE2 H00L0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D3 H02E0201 arc: F3 F3_SLICE arc: H01W0000 Q6 arc: H01W0100 F3 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V02N0101 Q3 arc: N3_V06N0003 Q3 arc: S3_V06S0003 Q0 arc: S3_V06S0203 Q4 arc: W3_H06W0003 Q3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R10C9:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 V02N0301 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H06W0103 arc: S3_V06S0203 H06W0203 arc: V00B0100 H02E0501 arc: V00T0100 V02S0501 arc: W1_H02W0101 E1_H01W0100 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0303 E3_H06W0303 arc: A7 H00L0000 arc: B7 V02S0701 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D7 W1_H02E0201 arc: E1_H01E0001 Q0 arc: E3_H06E0203 Q4 arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M2 V00T0000 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: S3_V06S0103 Q2 arc: V00T0000 Q0 arc: V01S0000 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R11C10:PLC2 arc: E1_H02E0301 V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0601 H06W0303 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H02E0601 arc: S3_V06S0103 H06W0103 arc: V00B0100 E1_H02W0701 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: C6 V00B0100 arc: C7 V02N0001 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D6 H02W0001 arc: D7 H02W0201 arc: E1_H01E0001 F7 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M2 V00T0000 arc: M4 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q4 arc: S1_V02S0701 F7 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 F7 arc: W1_H02W0501 F7 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R11C11:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: H00L0000 H02W0001 arc: H00R0100 V02N0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V06S0203 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A2 E1_H01E0001 arc: A5 V00B0000 arc: B2 F3 arc: B5 H00L0000 arc: C2 H02W0601 arc: C3 N1_V01S0100 arc: C5 V00T0000 arc: CE0 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 V00B0100 arc: D5 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H02E0201 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: V00B0000 Q6 arc: V01S0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0001001100000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R11C12:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V01N0101 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 E1_H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0001 arc: V00T0100 V02S0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02N0601 arc: N1_V02N0201 W3_H06E0103 arc: C4 V00T0100 arc: C5 V02S0201 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 V02S0401 arc: D5 H00L0100 arc: E1_H01E0101 Q0 arc: E1_H02E0401 Q6 arc: E1_H02E0701 F5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q0 arc: H01W0100 F4 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M2 H02W0601 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V02N0601 Q6 arc: S3_V06S0203 F4 arc: V01S0000 F5 arc: W1_H02W0001 Q2 arc: W1_H02W0701 F5 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000000011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R11C13:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02W0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02E0401 arc: S3_V06S0203 N1_V01S0000 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 V06N0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A3 V00B0000 arc: B3 H02E0301 arc: C3 H00L0000 arc: CE0 H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: F3 F3_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: S3_V06S0003 Q0 arc: V00B0000 Q6 arc: V01S0100 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R11C14:PLC2 arc: H00L0000 H02W0001 arc: H00R0000 V02N0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 E1_H01W0100 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 S1_V02N0201 arc: V00T0100 V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: B3 H01W0100 arc: C3 N1_V01N0001 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V02N0201 arc: D3 V02N0001 arc: E1_H01E0001 Q0 arc: E1_H02E0001 Q2 arc: E1_H02E0401 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 E1_H02W0601 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: N3_V06N0003 F3 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R11C15:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 V01N0001 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0601 E1_H02W0601 arc: V00T0100 V02N0501 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N3_V06S0303 arc: N1_V02N0301 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: H01W0100 Q6 arc: LSR1 V00T0100 arc: M0 H01E0001 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R11C16:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02S0701 arc: H00R0100 V02S0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 H02W0601 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0601 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A3 V00B0000 arc: B3 H00L0000 arc: C3 H00R0100 arc: CE0 E1_H02W0101 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: E1_H02E0301 F3 arc: F3 F3_SLICE arc: H00L0000 Q0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: V00B0000 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R11C17:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V01N0001 arc: H00L0000 H02W0201 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02E0601 arc: V00B0100 S1_V02N0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A3 V00T0000 arc: B3 V02N0301 arc: C3 H00R0100 arc: CE0 V02S0201 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: E1_H02E0301 F3 arc: F3 F3_SLICE arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V00T0000 Q0 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R11C18:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 E3_H06W0303 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 H02W0101 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02S0301 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 V01N0101 arc: A3 H02W0701 arc: A4 F5 arc: A5 W1_H02E0501 arc: A7 E1_H01W0000 arc: B0 H02E0301 arc: B1 E1_H02W0101 arc: B3 H00R0100 arc: B4 F3 arc: B5 H00L0000 arc: B7 E1_H02W0301 arc: C0 E1_H02W0601 arc: C1 N1_V01S0100 arc: C3 H02E0401 arc: C4 V00T0100 arc: C5 V00B0100 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H00R0000 arc: D3 V02N0001 arc: D4 V01N0001 arc: D5 S1_V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: V01S0100 F7 arc: W1_H02W0001 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0111111111111111 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0111111111111111 word: SLICEC.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R11C19:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02N0201 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0601 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02N0501 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V01S0000 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q3 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q4 arc: S1_V02S0001 Q2 arc: S1_V02S0301 Q3 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 Q7 arc: V01S0100 Q5 arc: W1_H02W0701 Q7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R11C20:PLC2 arc: E3_H06E0003 V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V01S0000 arc: B6 V00B0000 arc: B7 V00B0100 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: E1_H02E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q6 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: N1_V02N0501 Q7 arc: N1_V02N0601 Q4 arc: N1_V02N0701 Q5 arc: S1_V02S0201 Q0 arc: S1_V02S0301 Q1 arc: S1_V02S0701 Q5 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V01S0000 Q5 arc: V01S0100 Q0 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0501 Q7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R11C21:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 W1_H02E0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 H01E0101 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E1_H01W0100 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 V06S0303 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0303 V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 H02W0301 arc: B6 V00B0000 arc: B7 V00B0100 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q3 arc: N1_V02N0401 Q4 arc: N1_V02N0601 Q6 arc: N1_V02N0701 Q7 arc: S1_V02S0601 Q4 arc: S1_V02S0701 Q5 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 Q0 arc: W1_H02W0101 Q1 arc: W1_H02W0501 Q7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R11C22:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02N0201 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 H02E0601 arc: S3_V06S0203 N3_V06S0203 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V01S0000 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q0 arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q6 arc: S1_V02S0101 Q1 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q7 arc: S1_V02S0701 Q5 arc: S3_V06S0103 Q2 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q7 arc: V01S0100 Q5 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q3 arc: W1_H02W0401 Q6 arc: W1_H02W0701 Q7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R11C23:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0701 V06S0203 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 V02N0001 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0101 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 V02N0301 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A7 Q7 arc: B0 V00T0000 arc: B1 Q1 arc: B6 V01S0000 arc: B7 V01S0000 arc: C6 H02E0601 arc: C7 H02E0601 arc: CE0 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q1 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: V00T0000 Q0 arc: V01S0000 Q6 arc: V01S0100 Q0 word: SLICED.K0.INIT 1111001100110011 word: SLICED.K1.INIT 1111100110011001 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R11C24:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 V02N0601 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 V02N0101 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: V00T0100 H02W0101 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02N0701 arc: A2 V02N0501 arc: A5 V02N0101 arc: A6 V02N0101 arc: B0 H02W0101 arc: B2 H02W0101 arc: B4 H02W0101 arc: B5 H02W0101 arc: B6 H02W0101 arc: C0 V02N0601 arc: C1 H00L0100 arc: C2 V02N0601 arc: C3 H00R0100 arc: C4 V00B0100 arc: C5 V00T0000 arc: C6 V00B0100 arc: C7 V02N0201 arc: D0 H00R0000 arc: D1 V00T0100 arc: D2 H00R0000 arc: D3 V00B0100 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 V02N0401 arc: D7 V02N0401 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H00L0000 arc: M4 V00B0000 arc: M5 H02E0001 arc: M6 V00B0000 arc: V01S0100 F3 word: SLICEA.K0.INIT 1011101110110000 word: SLICEA.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 1010111110001100 word: SLICEB.K1.INIT 1111000011111111 word: SLICEC.K0.INIT 1111111111111100 word: SLICEC.K1.INIT 1010101010101000 word: SLICED.K0.INIT 1010100011111100 word: SLICED.K1.INIT 1111000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R11C25:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V06S0303 arc: H00R0000 E1_H02W0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 E3_H06W0103 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0601 S1_V02N0601 arc: N1_V02N0701 W3_H06E0203 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: B2 W1_H02E0101 arc: B3 W1_H02E0101 arc: C2 V02N0401 arc: C3 H02E0601 arc: D2 V02N0001 arc: D3 V02N0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 V00T0100 arc: M5 H00R0100 arc: M6 V00T0100 arc: N1_V01N0001 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111001111110000 word: SLICEB.K1.INIT 1111111100110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R11C26:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0401 V02N0401 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 V01N0101 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 N1_V02S0501 arc: E1_H02E0301 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 V02N0701 arc: A5 E1_H02W0701 arc: A6 H00L0000 arc: A7 E1_H02W0501 arc: B1 V02N0101 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 E1_H02W0301 arc: C1 W1_H02E0601 arc: C4 H02E0601 arc: C5 E1_H02W0401 arc: C6 E1_H01E0101 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D4 V02N0601 arc: D5 H02W0001 arc: D6 H02W0201 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V02N0101 F1 arc: N1_V02N0301 F1 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 1000111111111111 word: SLICED.K0.INIT 1000111111111111 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0100010001000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R11C27:PLC2 arc: E1_H02E0501 V02S0501 arc: H00L0100 V02N0301 arc: H00R0000 H02E0401 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0501 S3_V06N0303 arc: V00B0000 V02N0001 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A7 H00R0000 arc: B2 V02S0101 arc: B5 V00B0100 arc: B6 V02S0701 arc: B7 V02N0701 arc: C0 N1_V02S0401 arc: C2 H00L0100 arc: C4 V00B0100 arc: C5 V01N0101 arc: C6 N1_V02S0001 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 S1_V02N0201 arc: D4 V02S0401 arc: D5 V02N0401 arc: D6 S1_V02N0601 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F6 arc: LSR1 E1_H02W0501 arc: M0 H02W0601 arc: M1 H00R0100 arc: M2 H02W0601 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V02N0101 F1 arc: S1_V02S0601 F4 arc: S3_V06S0303 Q5 arc: V00B0100 Q5 arc: V01S0000 F1 arc: V01S0100 Q5 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1100111111001100 word: SLICED.K0.INIT 0000000000110000 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000001111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0011001100110000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R11C28:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06E0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0501 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A7 S1_V02N0301 arc: B7 V00B0000 arc: C1 V02S0601 arc: C3 V02N0401 arc: C7 E1_H02W0401 arc: D1 V00B0100 arc: D3 V02S0001 arc: D7 V02S0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: E1_H02E0101 F1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: M6 H02W0401 arc: S1_V02S0101 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111111110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R11C29:PLC2 arc: E1_H02E0401 S3_V06N0203 arc: H00L0000 V02N0001 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0201 H01E0001 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 E3_H06W0003 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: W1_H02W0001 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 H01E0101 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q0 arc: H01W0000 Q2 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M2 H02W0601 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: N3_V06N0003 Q0 arc: W1_H02W0601 Q6 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R11C2:PLC2 arc: E1_H02E0601 V02N0601 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0501 E1_H02W0501 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 H02E0501 arc: A1 E1_H01E0001 arc: B1 V00B0000 arc: C1 V02S0601 arc: CE1 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: E1_H01E0001 Q2 arc: E1_H02E0301 F1 arc: F1 F1_SLICE arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M2 H02E0601 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: S1_V02S0201 Q2 arc: V00B0000 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R11C30:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 S3_V06N0203 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 H01E0001 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: M2 V00B0100 arc: MUXCLK1 CLK0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R11C31:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 H02E0201 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 H06W0303 arc: V00B0100 V02N0301 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A2 H01E0001 arc: B0 V02S0301 arc: B2 V02N0301 arc: B3 V02N0101 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 H00L0000 arc: C3 V02N0601 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02W0201 arc: D3 V02N0201 arc: E1_H01E0001 F2 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 F3 arc: H01W0100 F3 arc: M0 V00B0100 arc: M4 H02W0401 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111110100000000 word: SLICEB.K1.INIT 0000000000110000 word: SLICEA.K0.INIT 0011001100001111 word: SLICEA.K1.INIT 1111111111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R11C32:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 V02S0501 arc: H00L0000 H02W0201 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0101 E1_H02W0101 arc: V00B0100 E1_H02W0701 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A4 W1_H02E0501 arc: A6 H02W0701 arc: A7 H02E0501 arc: B0 V00T0000 arc: B2 H00R0100 arc: B4 S1_V02N0501 arc: B6 H02W0301 arc: B7 V01S0000 arc: C0 V02N0601 arc: C2 H00L0000 arc: C3 H02W0401 arc: C4 H01E0001 arc: C6 H02E0401 arc: C7 N1_V02S0001 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D2 H02E0001 arc: D3 V02S0001 arc: D4 N1_V02S0601 arc: D6 H02W0201 arc: D7 H02E0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V00T0000 Q2 arc: V00T0100 F3 arc: V01S0000 F6 word: SLICED.K0.INIT 1110101000000000 word: SLICED.K1.INIT 1100111011111111 word: SLICEB.K0.INIT 1100000011111111 word: SLICEB.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 1100101011111111 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1000110010101010 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R11C33:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 V02S0301 arc: H00R0100 V02S0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H01E0101 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A7 E1_H02W0701 arc: B7 H02E0101 arc: C3 H00L0100 arc: C7 H02W0601 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V02S0201 arc: D7 H00R0100 arc: E1_H01E0101 Q4 arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: LSR0 V00T0100 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: V00T0100 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000010000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R11C34:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02S0001 arc: H00R0100 H02W0501 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E3_H06W0203 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02E0301 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V01N0101 arc: W3_H06W0303 E1_H02W0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 E1_H02W0701 arc: A3 V02S0501 arc: A4 V02S0101 arc: B0 V00B0000 arc: B1 V00T0000 arc: B3 V01N0001 arc: B4 H02W0101 arc: B5 H00R0000 arc: B7 H01E0101 arc: C0 H00L0000 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 H02E0401 arc: C4 V02N0001 arc: C5 E1_H02W0601 arc: C7 V00T0100 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V02S0001 arc: D2 S1_V02N0201 arc: D3 F2 arc: D4 H02W0001 arc: D5 F0 arc: D7 H00R0100 arc: E1_H02E0201 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F7 arc: H01W0100 Q4 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F2 arc: N1_V02N0001 F0 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V00B0000 F4 arc: W1_H02W0401 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011001111 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 1111010000000000 word: SLICEA.K0.INIT 0000000011010000 word: SLICEA.K1.INIT 1111110000000000 word: SLICEC.K0.INIT 0000000011100100 word: SLICEC.K1.INIT 0000001100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R11C35:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06W0203 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 N1_V02S0001 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0701 V01N0101 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: A0 H00L0100 arc: A4 V02N0301 arc: A6 V02N0301 arc: A7 V00T0100 arc: B0 H02E0101 arc: B1 H02E0101 arc: B4 W1_H02E0101 arc: B5 H02E0301 arc: B6 H02W0301 arc: B7 N1_V01S0000 arc: C0 H02E0401 arc: C1 V02S0401 arc: C4 E1_H01E0101 arc: C5 V02N0201 arc: C6 V00T0000 arc: C7 F6 arc: CE1 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 S1_V02N0201 arc: D4 V02N0601 arc: D5 H02E0201 arc: D6 V02N0601 arc: D7 H00R0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: LSR0 V00B0000 arc: M2 W1_H02E0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0701 F5 arc: S3_V06S0103 F1 arc: S3_V06S0303 F5 arc: W1_H02W0501 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0100000001010000 word: SLICEA.K1.INIT 0000000011001111 word: SLICEC.K0.INIT 1010000000100000 word: SLICEC.K1.INIT 0000001100001111 word: SLICED.K0.INIT 1000101000001010 word: SLICED.K1.INIT 1101110110001101 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R11C36:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0201 arc: H00R0000 H02W0401 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0401 H01E0001 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00T0000 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N1_V01S0100 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0100 arc: A1 V02S0701 arc: A3 V00B0000 arc: A4 H02E0701 arc: A5 V00T0100 arc: A6 V00T0100 arc: B0 V00T0000 arc: B1 H02W0301 arc: B3 H00L0000 arc: B4 E1_H02W0101 arc: B5 H00R0000 arc: B6 H02E0301 arc: C0 V02S0601 arc: C1 S1_V02N0401 arc: C3 H02E0401 arc: C4 V00B0100 arc: C5 V02N0201 arc: C6 V02S0001 arc: C7 H02E0601 arc: CE0 V02S0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02W0001 arc: D3 E1_H02W0201 arc: D4 V02N0401 arc: D5 H00R0100 arc: D6 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: E1_H02E0001 F0 arc: E3_H06E0003 F3 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0100 F7 arc: H01W0000 Q1 arc: H01W0100 Q6 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F7 arc: N1_V02N0101 Q1 arc: S3_V06S0103 Q1 arc: S3_V06S0203 F7 arc: V00B0100 F5 arc: V00T0100 Q1 arc: V01S0000 F4 arc: V01S0100 F3 arc: W1_H02W0101 Q1 arc: W1_H02W0401 F6 arc: W1_H02W0501 Q5 arc: W1_H02W0601 F6 arc: W1_H02W0701 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000111 word: SLICED.K0.INIT 0000000011100100 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0110011111101111 word: SLICEC.K1.INIT 0000000011100100 word: SLICEA.K0.INIT 1110010000000000 word: SLICEA.K1.INIT 1010100000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R11C37:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 H01E0101 arc: H00L0100 W1_H02E0101 arc: H00R0100 W1_H02E0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0501 V01N0101 arc: V00B0100 V02S0101 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 H01E0101 arc: E1_H02E0101 W3_H06E0103 arc: W3_H06W0203 E1_H02W0701 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 H02W0301 arc: B1 V02N0101 arc: B3 N1_V02S0101 arc: B6 S1_V02N0501 arc: B7 S1_V02N0501 arc: C0 H00L0100 arc: C1 V02S0401 arc: C3 E1_H02W0401 arc: C6 V02N0201 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D3 V02S0001 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: H01W0100 Q1 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F1 arc: N1_V02N0001 F0 arc: N1_V02N0301 F1 arc: S3_V06S0003 Q3 arc: S3_V06S0103 Q1 arc: V01S0000 F0 arc: V01S0100 Q6 arc: W1_H02W0601 Q6 arc: W3_H06W0003 Q3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111111001100 word: SLICEA.K0.INIT 0000111111001100 word: SLICEA.K1.INIT 0000111111001100 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0111111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R11C38:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 S1_V02N0701 arc: A7 V00T0100 arc: B1 H02E0301 arc: B7 H02E0301 arc: C1 N1_V01S0100 arc: C7 V00B0100 arc: D1 V02S0001 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 E1_H02W0601 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M5 H00L0000 arc: M6 E1_H02W0401 arc: N1_V01N0001 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010111100100011 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010111100100011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R11C39:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 S1_V02N0001 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E3_H06W0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: C0 H02E0601 arc: C1 E1_H01W0000 arc: C2 H02E0601 arc: C3 E1_H01W0000 arc: C4 H02E0601 arc: C5 E1_H02W0601 arc: C6 H02E0601 arc: C7 E1_H02W0401 arc: D0 H00R0000 arc: D1 V02S0201 arc: D2 H00R0000 arc: D3 V02S0201 arc: D4 S1_V02N0401 arc: D5 V00B0000 arc: D6 S1_V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 W1_H02E0001 arc: M6 V00B0100 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000000000001111 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 0000000011110000 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R11C3:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0401 H06W0203 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06W0203 arc: V00B0100 E1_H02W0701 arc: W1_H02W0201 V02S0201 arc: W1_H02W0601 V02S0601 arc: A5 V00T0000 arc: B5 N1_V01S0000 arc: C5 V02S0201 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D5 V02S0401 arc: E1_H01E0001 Q6 arc: E3_H06E0103 Q2 arc: F5 F5_SLICE arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M2 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: V00T0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R11C40:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 V01N0001 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 H06W0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A5 H02E0701 arc: B5 H02W0301 arc: C5 H02E0401 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02N0001 arc: D2 H02W0201 arc: D3 E1_H02W0201 arc: D5 V02N0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F5 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00B0100 arc: M6 V00T0000 arc: MUXCLK3 CLK0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000010101010 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R11C41:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0303 H01E0101 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 W1_H02E0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 H01E0001 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: H01W0000 Q4 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q2 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R11C42:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0201 arc: H00R0000 W1_H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A1 H00L0000 arc: B1 E1_H02W0101 arc: B2 H01W0100 arc: B3 W1_H02E0101 arc: B5 E1_H02W0101 arc: B6 S1_V02N0701 arc: C1 H02E0601 arc: C2 N1_V01N0001 arc: C3 H02E0401 arc: C4 V00T0100 arc: C5 E1_H02W0601 arc: C6 V02S0201 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D2 H00R0000 arc: D3 E1_H02W0201 arc: D4 V02N0401 arc: D5 W1_H02E0001 arc: D6 H01W0000 arc: D7 H00R0100 arc: E1_H01E0101 Q3 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q3 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F3 arc: N1_V02N0301 Q3 arc: S1_V02S0201 F0 arc: S3_V06S0003 Q3 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: V01S0000 F6 arc: W1_H02W0101 Q3 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 0000000000111111 word: SLICEB.K1.INIT 1100000000000000 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111111111110000 word: SLICEC.K1.INIT 0000001111001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010101111101111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R11C43:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 V01N0101 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 V01N0001 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: A0 H02E0701 arc: A1 V01N0101 arc: A2 H02E0701 arc: A3 V02S0501 arc: A5 V00T0100 arc: B0 F1 arc: B1 V02S0301 arc: B2 F3 arc: B3 W1_H02E0301 arc: B5 E1_H02W0301 arc: C0 H00L0100 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 H00L0000 arc: C5 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02S0201 arc: D2 V02N0201 arc: D3 V02S0201 arc: D5 E1_H02W0201 arc: E1_H01E0001 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: H01W0100 Q6 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q3 arc: N1_V02N0101 F1 arc: N3_V06N0103 Q1 arc: S1_V02S0001 F0 arc: V01S0000 F2 arc: W1_H02W0701 F5 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011011110111111 word: SLICEA.K0.INIT 0111011100000111 word: SLICEA.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0111011100000111 word: SLICEB.K1.INIT 0000000011001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R11C44:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 W1_H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 H02E0601 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0601 H01E0001 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0003 W3_H06E0303 arc: A0 H00L0100 arc: A1 W1_H02E0501 arc: A4 W1_H02E0701 arc: A5 S1_V02N0301 arc: A6 E1_H02W0701 arc: A7 N1_V01N0101 arc: B0 E1_H02W0301 arc: B1 V02N0101 arc: B4 E1_H02W0301 arc: B5 W1_H02E0301 arc: B6 V01S0000 arc: B7 W1_H02E0101 arc: C0 N1_V01N0001 arc: C1 H00L0000 arc: C4 V00B0100 arc: C5 V00T0000 arc: C6 V02N0001 arc: C7 H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02E0201 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 H02W0201 arc: D7 S1_V02N0401 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q1 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q2 arc: S1_V02S0201 F0 arc: S1_V02S0301 F1 arc: S3_V06S0103 Q2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F6 arc: V00B0100 F5 arc: V01S0000 F7 arc: V01S0100 Q2 arc: W1_H02W0301 F1 arc: W1_H02W0501 F5 arc: W1_H02W0701 Q7 arc: W3_H06W0203 F7 arc: W3_H06W0303 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111000000100 word: SLICED.K1.INIT 0000111000000010 word: SLICEC.K0.INIT 0101111100010011 word: SLICEC.K1.INIT 0000000011001010 word: SLICEA.K0.INIT 0101111100010011 word: SLICEA.K1.INIT 0000000011001010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R11C45:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 H02W0001 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 E1_H01W0100 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0701 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 E3_H06W0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A1 E1_H01E0001 arc: A3 E1_H02W0501 arc: A4 S1_V02N0101 arc: A5 V02S0301 arc: A6 H00L0000 arc: A7 V02S0101 arc: B0 V01N0001 arc: B1 S1_V02N0301 arc: B3 H02W0101 arc: B4 H02W0301 arc: B5 V02N0501 arc: B6 H02E0101 arc: B7 E1_H02W0101 arc: C0 E1_H02W0601 arc: C1 V02S0601 arc: C3 N1_V01N0001 arc: C4 E1_H01E0101 arc: C5 H02E0401 arc: C6 V00T0100 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 E1_H02W0001 arc: D3 V00B0100 arc: D4 H02E0201 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F5 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F7 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: N1_V02N0701 Q7 arc: S3_V06S0203 F4 arc: S3_V06S0303 F6 arc: V01S0000 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 F7 arc: W3_H06W0303 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011011110111111 word: SLICED.K0.INIT 0000111000000100 word: SLICED.K1.INIT 0000000011011000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0101111100010011 word: SLICEC.K1.INIT 0000000010101100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R11C46:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 H01E0001 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02N0001 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 V01N0101 arc: V00B0000 E1_H02W0601 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0701 V01N0101 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 S1_V02N0501 arc: A1 V02S0701 arc: A2 S1_V02N0501 arc: A3 V02S0501 arc: A6 H00L0000 arc: A7 V02N0301 arc: B0 E1_H02W0301 arc: B1 V00T0000 arc: B2 E1_H02W0301 arc: B3 H00R0000 arc: B6 V01S0000 arc: B7 V00B0000 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C2 H02W0401 arc: C3 W1_H02E0401 arc: C6 S1_V02N0201 arc: C7 W1_H02E0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 H02E0001 arc: D6 V01N0001 arc: D7 H02E0001 arc: E1_H01E0001 F3 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F7 arc: N1_V02N0301 F3 arc: N3_V06N0003 F3 arc: S1_V02S0101 F1 arc: S3_V06S0003 F0 arc: S3_V06S0103 F2 arc: S3_V06S0303 F6 arc: V01S0000 F7 arc: V01S0100 Q4 arc: W1_H02W0501 Q7 arc: W3_H06W0003 Q3 arc: W3_H06W0103 F1 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0101111100010011 word: SLICEB.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 0101111100010011 word: SLICEA.K1.INIT 0000000010101100 word: SLICED.K0.INIT 0000111000000100 word: SLICED.K1.INIT 0000000011001010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R11C47:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 N3_V06S0003 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02S0501 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0003 E1_H02W0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: A6 H00R0000 arc: B6 S1_V02N0501 arc: C6 S1_V02N0001 arc: C7 S1_V02N0201 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D6 N1_V02S0601 arc: D7 H00R0100 arc: E1_H01E0101 Q2 arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: H01W0100 Q0 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: S1_V02S0601 F6 arc: S3_V06S0003 Q0 arc: V01S0000 Q4 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 arc: W1_H02W0601 Q4 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000011101110111 word: SLICED.K1.INIT 0000000000001111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R11C48:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W1_H02E0301 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 H06W0303 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 H01E0101 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: N1_V02N0701 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A7 H02E0501 arc: B7 H02E0101 arc: C7 V00T0100 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D7 W1_H02E0001 arc: E1_H02E0201 Q2 arc: E3_H06E0203 Q4 arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: W1_H02W0001 Q2 arc: W1_H02W0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R11C49:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 H01E0001 arc: H00L0000 H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 E1_H02W0401 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 S3_V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A1 H01E0001 arc: A3 W1_H02E0501 arc: A5 V00T0000 arc: A7 H00L0000 arc: B0 V02N0101 arc: B1 S1_V02N0301 arc: B2 H01W0100 arc: B3 H02W0101 arc: B4 V00B0100 arc: B5 S1_V02N0501 arc: B6 V01S0000 arc: B7 V00B0000 arc: C0 V02N0601 arc: C1 N1_V02S0601 arc: C2 E1_H02W0601 arc: C3 N1_V01S0100 arc: C4 V02N0001 arc: C5 H02E0601 arc: C6 H02W0601 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H00R0000 arc: D2 V02N0001 arc: D3 V02S0201 arc: D4 H00L0100 arc: D5 W1_H02E0001 arc: D6 V02N0601 arc: D7 S1_V02N0601 arc: E1_H01E0001 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q3 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S3_V06S0303 F6 arc: V00B0100 Q5 arc: V01S0000 Q7 arc: V01S0100 Q1 arc: W1_H02W0301 Q3 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0010101011111111 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111111111111000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111111111111000 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111111111111000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R11C4:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V02N0701 arc: H00R0000 V02N0601 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W1_H02E0301 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H02W0401 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 H02W0001 arc: V00T0100 H02E0101 arc: W1_H02W0501 V02N0501 arc: A1 H02E0701 arc: A3 H01E0001 arc: A5 E1_H01W0000 arc: A6 N1_V01N0101 arc: A7 V02N0101 arc: B1 V00B0000 arc: B3 H02W0301 arc: B5 H00R0000 arc: B6 F1 arc: B7 V01S0000 arc: C1 V02S0601 arc: C3 V02S0401 arc: C5 V00T0100 arc: C6 V02N0001 arc: C7 H02W0601 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 N1_V02S0201 arc: D5 N1_V02S0601 arc: D6 H00R0100 arc: D7 H02E0001 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: LSR0 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F3 arc: V01S0000 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0111111111111111 word: SLICED.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R11C50:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 W1_H02E0201 arc: H00R0100 V02N0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H06W0103 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 N1_V02S0101 arc: V00T0100 H02W0101 arc: W1_H02W0101 V06N0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V01N0001 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: A1 N1_V02S0501 arc: A4 V02S0301 arc: A5 W1_H02E0501 arc: A6 W1_H02E0701 arc: A7 S1_V02N0301 arc: B1 V00B0000 arc: B4 V02N0501 arc: B5 V02N0501 arc: B6 V02N0501 arc: B7 V02N0501 arc: C1 N1_V02S0401 arc: C4 V00B0100 arc: C5 V00B0100 arc: C6 V00B0100 arc: C7 V00B0100 arc: D1 V02N0001 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 H00L0100 arc: D7 H00L0100 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: S3_V06S0303 F6 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 1111101111110000 word: SLICED.K1.INIT 1111101111110000 word: SLICEC.K0.INIT 1111101111110000 word: SLICEC.K1.INIT 1111101111110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0100000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R11C51:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 H02W0301 arc: H00R0100 H02W0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 V02S0201 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02S0701 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0301 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0303 E3_H06W0303 arc: B0 V02S0301 arc: B1 V00T0000 arc: B3 W1_H02E0101 arc: B4 V00B0100 arc: B5 V01S0000 arc: B7 N1_V02S0501 arc: C0 N1_V01N0001 arc: C1 N1_V02S0601 arc: C3 V02N0601 arc: C4 E1_H01E0101 arc: C5 N1_V02S0201 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V00T0100 arc: D3 W1_H02E0201 arc: D4 H02W0201 arc: D5 V00B0000 arc: D7 W1_H02E0201 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F7 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q3 arc: S3_V06S0303 F5 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V01S0000 Q4 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R11C52:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 H02W0201 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E1_H01W0100 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0100 V02N0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 E3_H06W0303 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0001 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A1 H02E0501 arc: A2 H02W0501 arc: A5 E1_H02W0701 arc: A7 E1_H02W0501 arc: B1 E1_H02W0101 arc: B2 V02S0301 arc: B3 H00R0000 arc: B4 V02N0501 arc: B5 V01S0000 arc: B6 H02E0101 arc: B7 S1_V02N0501 arc: C1 S1_V02N0401 arc: C2 N1_V01N0001 arc: C3 H00L0000 arc: C4 H02W0601 arc: C5 N1_V02S0201 arc: C6 V01N0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 S1_V02N0201 arc: D3 V00T0100 arc: D4 V00B0000 arc: D5 H00L0100 arc: D6 H02W0001 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 F4 arc: H01W0100 Q7 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F2 arc: S3_V06S0003 F3 arc: S3_V06S0303 Q5 arc: V01S0100 Q5 arc: W3_H06W0203 Q7 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000010101010 word: SLICEB.K0.INIT 1110011011100000 word: SLICEB.K1.INIT 0011000000000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111111111111000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111111111111000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R11C53:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 H01E0101 arc: E3_H06E0203 H01E0001 arc: H00R0100 H02E0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 H06E0303 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02N0701 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: A4 N1_V01S0100 arc: A5 V00B0000 arc: B4 V00B0100 arc: B5 H02E0301 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 H02W0601 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 V02S0001 arc: D4 V02S0601 arc: D5 S1_V02N0601 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: MUXCLK2 CLK0 arc: N1_V01N0001 F5 arc: S1_V02S0501 F7 arc: V01S0000 F2 arc: V01S0100 Q4 word: SLICEC.K0.INIT 1111111111010101 word: SLICEC.K1.INIT 0000110000001010 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R11C54:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V02N0701 arc: H00L0000 V02S0201 arc: H00L0100 V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H01E0101 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 E1_H02W0701 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 N1_V01S0000 arc: A1 H00L0000 arc: A5 H02W0701 arc: A6 H02W0701 arc: B1 H00R0100 arc: B4 V02S0701 arc: B5 H02W0301 arc: B6 H02W0101 arc: C1 W1_H02E0601 arc: C2 H02W0401 arc: C3 H00L0100 arc: C4 H02E0401 arc: C5 N1_V02S0201 arc: C6 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 W1_H02E0201 arc: D3 H00R0000 arc: D4 H02E0001 arc: D5 H02E0201 arc: D6 V02N0401 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q5 arc: S1_V02S0301 F3 arc: V01S0100 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111111111111000 word: SLICED.K0.INIT 1010000011101100 word: SLICED.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0010101111010111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R11C55:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V06N0303 arc: E3_H06E0103 H01E0101 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: A3 H00L0100 arc: A4 V00T0000 arc: A5 H02E0701 arc: A6 H00L0000 arc: A7 V00T0100 arc: B3 E1_H02W0101 arc: B4 H02W0101 arc: B5 H02W0301 arc: B6 V00B0000 arc: B7 H02E0301 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C3 H00R0100 arc: C4 S1_V02N0001 arc: C5 V00B0100 arc: C6 V02N0001 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V02S0001 arc: D3 H02E0001 arc: D4 H01W0000 arc: D5 S1_V02N0601 arc: D6 H02W0201 arc: D7 S1_V02N0601 arc: E1_H01E0001 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 F5 arc: M2 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 F0 arc: V01S0100 F1 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 word: SLICED.K0.INIT 1111111111010101 word: SLICED.K1.INIT 0000110000001010 word: SLICEC.K0.INIT 1111111111010101 word: SLICEC.K1.INIT 0000110000001010 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0010110110110111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R11C56:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 V06N0203 arc: H00L0000 S1_V02N0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02W0401 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 H01E0101 arc: E1_H02E0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A1 V02S0701 arc: A2 E1_H01E0001 arc: A3 V02S0701 arc: A6 H00R0000 arc: A7 N1_V02S0301 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H00L0000 arc: B6 N1_V01S0000 arc: B7 V02N0501 arc: C1 V02N0401 arc: C2 S1_V02N0401 arc: C3 H00L0100 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 H02E0601 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D2 V01S0100 arc: D3 S1_V02N0001 arc: D4 H02E0201 arc: D5 H02E0001 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0501 F5 arc: V01S0100 F3 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1111111110110011 word: SLICED.K1.INIT 0000110000001010 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1111111111010101 word: SLICEB.K1.INIT 0000110000001010 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0100101111010111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R11C57:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S3_V06S0303 H01E0101 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: N1_V02N0401 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0203 S3_V06N0203 arc: A1 S1_V02N0501 arc: A3 V00T0000 arc: A5 V00T0100 arc: A6 V00T0100 arc: A7 H00R0000 arc: B1 V02N0301 arc: B3 H00R0100 arc: B5 H02E0301 arc: B6 H02E0301 arc: B7 F1 arc: C1 E1_H02W0401 arc: C3 H00L0000 arc: C5 V00B0100 arc: C6 V01N0101 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D3 W1_H02E0001 arc: D5 N1_V02S0401 arc: D6 V02S0401 arc: D7 H01W0000 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F2 arc: M2 V00B0100 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1110011011100000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000110000001010 word: SLICED.K0.INIT 1000000011111111 word: SLICED.K1.INIT 0000000000010011 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0110001111010111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R11C58:PLC2 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0401 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 H02W0401 arc: V00T0000 V02S0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S3_V06N0003 arc: E1_H02E0101 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: A1 V02N0501 arc: A3 H00L0100 arc: A4 V02S0301 arc: A6 H00R0000 arc: B1 V02S0101 arc: B3 W1_H02E0101 arc: B4 W1_H02E0101 arc: B5 H00L0000 arc: B6 F3 arc: C1 H00R0100 arc: C3 H00R0100 arc: C4 V00T0000 arc: C5 V00T0100 arc: C6 V02N0001 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D3 S1_V02N0201 arc: D4 N1_V02S0401 arc: D5 V02N0601 arc: D6 V00B0000 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: N1_V02N0301 F1 arc: V00B0000 F4 arc: V00B0100 F5 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1110011011100000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1110011011100000 word: SLICEC.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 1100000000000000 word: SLICED.K0.INIT 1111111111101100 word: SLICED.K1.INIT 1111111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R11C59:PLC2 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S3_V06N0103 arc: H01W0000 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 .tile R11C5:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0601 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 E3_H06W0203 arc: CE0 E1_H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: E3_H06E0103 Q2 arc: H01W0000 Q6 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: S3_V06S0203 Q4 arc: V01S0000 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R11C60:PLC2 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0601 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W3_H06W0003 E1_H01W0000 .tile R11C61:PLC2 arc: N1_V02N0401 S3_V06N0203 arc: H01W0000 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 .tile R11C62:PLC2 arc: N1_V01N0101 S3_V06N0203 arc: S3_V06S0203 W3_H06E0203 .tile R11C63:PLC2 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0401 W3_H06E0203 .tile R11C64:PLC2 arc: N1_V02N0701 S3_V06N0203 arc: E3_H06E0103 W3_H06E0103 .tile R11C65:PLC2 arc: N1_V02N0401 S3_V06N0203 arc: W3_H06W0203 E3_H06W0203 .tile R11C67:PLC2 arc: E1_H02E0301 W3_H06E0003 .tile R11C69:PLC2 arc: E1_H02E0601 W1_H02E0301 arc: S3_V06S0103 N3_V06S0003 .tile R11C6:PLC2 arc: E3_H06E0103 S3_V06N0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 W1_H02E0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 E3_H06W0203 arc: W3_H06W0203 E3_H06W0203 arc: A3 V00B0000 arc: B3 E1_H01W0100 arc: C3 V02N0601 arc: CE0 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 E1_H02W0001 arc: F3 F3_SLICE arc: H01W0000 F3 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M4 V00B0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0201 Q0 arc: S3_V06S0003 Q0 arc: V00B0000 Q6 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R11C70:PLC2 arc: S3_V06S0103 W3_H06E0103 .tile R11C7:PLC2 arc: E1_H02E0701 E1_H01W0100 arc: N1_V02N0101 H02W0101 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 S1_V02N0701 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R11C8:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 V01N0101 arc: H00R0000 V02N0601 arc: H00R0100 H02W0501 arc: N1_V02N0301 V01N0101 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H02W0401 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H01E0101 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V06N0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E3_H06W0103 arc: A1 E1_H01E0001 arc: B1 V00B0000 arc: C1 H00R0100 arc: CE1 S1_V02N0201 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: E1_H01E0001 Q4 arc: F1 F1_SLICE arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F1 arc: V00B0000 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R11C9:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0601 V06S0303 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S3_V06N0003 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: A1 W1_H02E0701 arc: A3 V00B0000 arc: B1 H02E0301 arc: B3 H01W0100 arc: C1 H00R0100 arc: C2 H00L0100 arc: C3 H00L0000 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0001 arc: D2 V00B0100 arc: D3 H00R0000 arc: E1_H01E0001 F0 arc: E1_H02E0001 F2 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 F2 arc: H01W0000 F2 arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 arc: V00T0100 F3 arc: V01S0100 F2 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R12C10:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 H06W0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0103 E3_H06W0103 arc: A1 H00L0000 arc: A6 H02E0701 arc: A7 N1_V02S0301 arc: B1 H01W0100 arc: B6 V01S0000 arc: B7 V00T0000 arc: C1 H02E0601 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D6 E1_H01W0100 arc: D7 H00R0100 arc: E1_H01E0101 F1 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 V00B0100 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: V01S0000 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R12C11:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0601 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0301 H02E0301 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02E0601 arc: V00B0100 V02N0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02S0701 arc: W3_H06W0303 E1_H01W0100 arc: A5 N1_V01N0101 arc: B5 V01S0000 arc: C5 V02S0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: F5 F5_SLICE arc: H01W0100 F5 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M2 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: S3_V06S0003 Q0 arc: V01S0000 Q2 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R12C12:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 V02S0701 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 W1_H02E0601 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0601 arc: V00T0000 E1_H02W0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 S1_V02N0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0000 arc: M2 H02E0601 arc: M4 H02W0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: S3_V06S0203 Q4 arc: V01S0100 Q2 arc: W1_H02W0201 Q0 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R12C13:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 V02S0401 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0303 E3_H06W0303 arc: A4 H02W0701 arc: B4 S1_V02N0501 arc: C4 E1_H01E0101 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 S1_V02N0601 arc: E1_H01E0101 F5 arc: E1_H02E0601 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: LSR1 E1_H02W0501 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000011100000000 word: SLICEC.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R12C14:PLC2 arc: H00L0000 V02S0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H01W0000 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 H02E0601 arc: V00B0100 H02W0701 arc: V00T0100 H02E0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: H01W0100 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0100 arc: A1 H02E0701 arc: A2 E1_H01E0001 arc: A3 V02N0501 arc: A4 N1_V01N0101 arc: A5 H02E0501 arc: B0 V02S0101 arc: B1 H00R0100 arc: B2 V02S0301 arc: B3 S1_V02N0101 arc: B4 W1_H02E0101 arc: B5 H00R0000 arc: C0 V02N0401 arc: C1 S1_V02N0401 arc: C2 H00L0000 arc: C3 W1_H02E0401 arc: C4 H02E0401 arc: C5 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V00T0100 arc: D2 V00B0100 arc: D3 E1_H02W0201 arc: D4 H02W0201 arc: D5 V00B0000 arc: E1_H01E0001 Q3 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q5 word: SLICEA.K0.INIT 0000000000000001 word: SLICEA.K1.INIT 0111111111111111 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0111111111111111 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R12C15:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E3_H06E0303 V06N0303 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 E3_H06W0103 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A7 V02N0301 arc: B7 V00T0000 arc: C6 V02N0001 arc: C7 V00B0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 H00R0100 arc: D7 V00B0000 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H00R0100 F7 arc: H01W0000 F6 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q2 arc: N1_V02N0501 F7 arc: S3_V06S0303 F6 arc: W1_H02W0001 Q2 arc: W1_H02W0501 F7 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 1011111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R12C16:PLC2 arc: E1_H02E0501 S3_V06N0303 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 S3_V06N0303 arc: E1_H02E0301 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 .tile R12C17:PLC2 arc: E1_H02E0401 V02N0401 arc: H00L0000 H02W0201 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0501 H02E0501 arc: S3_V06S0003 H06W0003 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0701 E3_H06W0203 arc: A1 E1_H02W0701 arc: B1 V00T0000 arc: C0 E1_H01W0000 arc: C1 H00R0100 arc: C4 V02S0201 arc: C5 V00T0100 arc: CE0 V02N0201 arc: CE1 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02N0001 arc: D4 V02N0601 arc: D5 V02S0401 arc: E1_H01E0101 F4 arc: E1_H02E0001 Q2 arc: E3_H06E0003 F0 arc: E3_H06E0103 Q1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 F4 arc: H01W0000 F5 arc: H01W0100 F4 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M2 E1_H02W0601 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V02N0101 Q1 arc: N1_V02N0601 F4 arc: N3_V06N0003 F0 arc: S1_V02S0601 Q6 arc: S3_V06S0303 F5 arc: V00T0000 F0 arc: V00T0100 Q1 arc: V01S0000 Q1 arc: W3_H06W0003 F0 arc: W3_H06W0103 Q1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000100000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R12C18:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 S3_V06N0203 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0501 H01E0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02N0101 arc: V00T0100 V02N0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S1_V02N0601 arc: A3 V00B0000 arc: B3 H00R0100 arc: C3 S1_V02N0401 arc: CE0 N1_V02S0201 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: E1_H01E0001 Q0 arc: F3 F3_SLICE arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 E1_H02W0601 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q6 arc: V00B0000 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R12C19:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 V02S0001 arc: H00L0100 H02W0301 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 H02E0601 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02N0701 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0303 E3_H06W0303 arc: A1 H01E0001 arc: A5 V00T0000 arc: A6 V02S0301 arc: A7 H00L0000 arc: B0 F1 arc: B1 V02S0101 arc: B5 V02N0501 arc: B6 N1_V01S0000 arc: B7 V00B0000 arc: C0 H00R0100 arc: C1 N1_V02S0601 arc: C5 S1_V02N0001 arc: C6 V02S0001 arc: C7 H02E0601 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02E0001 arc: D5 V02S0601 arc: D6 N1_V02S0401 arc: D7 V02S0401 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: S1_V02S0201 F0 arc: S1_V02S0501 F5 arc: S3_V06S0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R12C20:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02S0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H06E0203 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 S1_V02N0601 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: A0 H02E0501 arc: A1 V02N0701 arc: A3 V02S0701 arc: A4 V02S0301 arc: A5 N1_V01S0100 arc: A7 V02S0101 arc: B0 F1 arc: B1 E1_H01W0100 arc: B3 E1_H02W0101 arc: B4 H02W0101 arc: B5 H00L0000 arc: B7 H02W0301 arc: C0 N1_V02S0601 arc: C1 N1_V02S0401 arc: C3 H00L0100 arc: C4 V02S0201 arc: C5 V00B0100 arc: C7 V00T0000 arc: D0 S1_V02N0201 arc: D1 E1_H02W0001 arc: D3 H00R0000 arc: D4 H02E0201 arc: D5 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H02E0201 F0 arc: E1_H02E0701 F5 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: H01W0100 F6 arc: M6 V00T0100 arc: N1_V02N0201 F0 arc: V01S0000 F0 arc: V01S0100 F4 arc: W1_H02W0201 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0111111100000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R12C21:PLC2 arc: E1_H02E0001 V02N0001 arc: H00L0000 H02E0001 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02E0501 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02E0101 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 H01E0001 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 N1_V02S0701 arc: A1 N1_V02S0701 arc: B0 H00R0100 arc: B1 V00T0000 arc: C0 V02S0601 arc: C1 H00L0100 arc: C3 H02E0401 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V00B0100 arc: D3 V00T0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H01W0000 F1 arc: H01W0100 F0 arc: M4 V00B0000 arc: M6 W1_H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 F3 arc: S3_V06S0303 Q6 arc: W3_H06W0003 Q3 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R12C22:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: H00L0000 H02W0201 arc: H00R0000 V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 W1_H02E0201 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A0 V02S0701 arc: A1 H00L0000 arc: A4 V02S0301 arc: A5 V00B0000 arc: B0 H00R0100 arc: B1 V00T0000 arc: B4 V01S0000 arc: B5 H02W0101 arc: C0 V02S0401 arc: C1 V02N0401 arc: C4 V00B0100 arc: C5 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H00R0000 arc: D4 N1_V02S0601 arc: D5 V02S0601 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: LSR0 H02W0501 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V02N0601 Q4 arc: V01S0000 F5 arc: W1_H02W0001 F0 word: SLICEA.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0111111111111111 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R12C23:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 E1_H01W0000 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02N0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0401 N1_V02S0101 arc: V00B0000 V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0203 V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: A3 H02W0701 arc: A5 Q5 arc: A6 V02N0101 arc: A7 H02W0701 arc: B2 H02W0301 arc: B3 H01W0100 arc: B5 V02N0701 arc: B6 V00B0000 arc: B7 V01S0000 arc: C2 S1_V02N0601 arc: C3 S1_V02N0401 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 V02N0001 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 H00L0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 V02S0001 arc: D5 V02S0601 arc: D6 E1_H01W0100 arc: D7 H00R0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q2 arc: E1_H02E0601 Q6 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 F7 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: S3_V06S0103 Q2 arc: S3_V06S0303 Q6 arc: V01S0000 Q6 arc: V01S0100 F7 arc: W1_H02W0001 Q2 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1010100011111111 word: SLICED.K1.INIT 1011111110001110 word: SLICEB.K0.INIT 0011000011111111 word: SLICEB.K1.INIT 0011001111110111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111100110011001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R12C24:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02E0001 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 H01E0101 arc: E1_H02E0701 W3_H06E0203 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 V06S0303 arc: W3_H06W0103 E3_H06W0003 arc: A1 H00L0000 arc: B1 V00B0000 arc: B5 W1_H02E0101 arc: B6 V01S0000 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 V02N0601 arc: C3 H02W0401 arc: C5 H02W0601 arc: C6 H02W0601 arc: C7 H02E0401 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V00B0100 arc: D3 V00T0100 arc: D4 H01W0000 arc: D5 V02S0601 arc: D6 V02S0601 arc: D7 W1_H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 Q4 arc: H01W0100 F0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0501 F5 arc: S3_V06S0203 Q7 arc: V01S0000 Q7 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 1111110011001100 word: SLICED.K0.INIT 1111001100110011 word: SLICED.K1.INIT 1100110011111100 word: SLICEA.K0.INIT 1111111111110000 word: SLICEA.K1.INIT 1011101110110001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R12C25:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 W1_H02E0601 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 H06E0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0001 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00R0000 arc: B1 V00B0000 arc: B7 V01S0000 arc: C1 H00L0100 arc: C6 V00T0100 arc: C7 V00T0000 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 E1_H02W0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0201 arc: D5 V02S0601 arc: D6 E1_H02W0201 arc: D7 N1_V02S0401 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F6 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F6 arc: LSR0 V00B0100 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 H02E0601 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: N1_V02N0601 F6 arc: S1_V02S0401 F6 arc: V00B0100 F7 arc: V01S0000 F6 arc: V01S0100 F1 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1111110011110000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0010001000100011 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R12C26:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 E1_H01W0000 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H01E0101 arc: V00B0000 H02E0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0401 H01E0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 H02E0501 arc: A3 W1_H02E0501 arc: A5 W1_H02E0501 arc: B1 V02N0101 arc: B3 H00R0000 arc: B5 H00R0000 arc: C0 V02N0601 arc: C1 H00L0100 arc: C2 V02N0601 arc: C3 V02N0401 arc: C5 H02E0401 arc: C6 V02N0001 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 S1_V02N0201 arc: D2 H02E0001 arc: D3 V00B0100 arc: D5 H01W0000 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F2 arc: E1_H02E0501 F7 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F0 arc: LSR1 E1_H02W0301 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 F4 arc: N1_V02N0301 F3 arc: N3_V06N0103 Q1 arc: N3_V06N0203 F4 arc: S1_V02S0201 F0 arc: S3_V06S0003 F3 arc: V01S0000 F3 arc: V01S0100 F6 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 1000100011111000 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1100010010000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0100000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R12C27:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 W1_H02E0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0601 E1_H02W0601 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 S3_V06N0303 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: A1 W1_H02E0501 arc: A3 W1_H02E0501 arc: A6 H00L0000 arc: B1 V02N0301 arc: B3 V02N0301 arc: B5 H02E0301 arc: B6 S1_V02N0701 arc: C1 N1_V01N0001 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 H02E0401 arc: C6 V00T0100 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 S1_V02N0001 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 Q5 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00B0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q5 arc: N1_V02N0401 Q4 arc: V01S0000 F3 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1111111111000011 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0111011100000111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R12C28:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0001 arc: H00L0100 V02S0101 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 V01N0001 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: CE0 H00L0000 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V02N0001 Q2 arc: S3_V06S0103 Q2 arc: S3_V06S0303 Q6 arc: V01S0000 Q4 arc: V01S0100 Q6 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R12C29:PLC2 arc: H00L0000 H02W0001 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0701 H06E0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0501 arc: V00T0100 H02W0101 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 arc: A5 V00T0000 arc: A7 N1_V01N0101 arc: B4 V01S0000 arc: B5 E1_H02W0101 arc: B6 H02E0301 arc: B7 V00B0100 arc: C4 H02E0601 arc: C5 V02N0201 arc: C6 E1_H01E0101 arc: C7 V00T0100 arc: CE0 H00L0000 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 V02N0601 arc: D6 N1_V02S0601 arc: D7 V02S0601 arc: E1_H01E0101 Q0 arc: E3_H06E0203 F4 arc: E3_H06E0303 F6 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0000 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q0 arc: V00T0000 Q2 arc: V01S0000 Q2 arc: V01S0100 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R12C2:PLC2 arc: H00R0000 H02E0401 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00T0000 V02N0601 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 E1_H02W0601 arc: M2 V00B0000 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R12C30:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 S3_V06N0203 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0203 W3_H06E0203 arc: A7 H02W0501 arc: B7 E1_H02W0301 arc: C7 V02N0201 arc: D7 S1_V02N0601 arc: F7 F7_SLICE arc: N1_V02N0501 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000010101010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R12C31:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 E1_H02W0701 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 V02N0501 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: B7 V00B0100 arc: C3 H00L0000 arc: C7 H02E0401 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: D7 V02S0601 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 Q3 arc: S3_V06S0203 Q7 arc: W3_H06W0003 F3 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100111111000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R12C32:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 W1_H02E0101 arc: H00R0000 H02W0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0701 arc: V00B0000 H02E0401 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 E1_H02W0301 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0003 E1_H02W0301 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A7 W1_H02E0501 arc: B7 W1_H02E0101 arc: C7 V02N0201 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D7 W1_H02E0201 arc: E1_H01E0101 F6 arc: E1_H02E0401 Q4 arc: E3_H06E0303 F6 arc: F6 F5D_SLICE arc: H01W0100 F6 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011001100110001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R12C33:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 E1_H01W0100 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0100 H02E0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 E1_H02W0601 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00L0000 arc: B1 V00B0000 arc: B5 V02S0701 arc: C1 H02E0601 arc: C5 H02W0601 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D5 S1_V02N0401 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F1 arc: E1_H02E0401 Q6 arc: E1_H02E0601 Q6 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: H01W0000 Q6 arc: M2 V00T0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: V01S0000 Q6 arc: W1_H02W0701 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000010000100001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R12C34:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 V02S0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H01W0000 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V02S0601 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 H01E0001 arc: A1 E1_H01E0001 arc: A3 H01E0001 arc: A4 V02N0301 arc: A7 H00R0000 arc: B0 E1_H01W0100 arc: B1 V02S0101 arc: B2 V02N0101 arc: B3 E1_H01W0100 arc: B4 H01E0101 arc: B5 H02E0301 arc: B7 V00B0100 arc: C0 N1_V02S0401 arc: C1 H00L0000 arc: C2 N1_V01N0001 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V02N0001 arc: C6 V00T0000 arc: C7 V02S0001 arc: CE1 H02E0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 H02W0201 arc: D4 H00R0100 arc: D5 V02S0401 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0000 Q6 arc: H01W0000 F5 arc: H01W0100 F4 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F5 arc: N1_V02N0101 F3 arc: S1_V02S0101 F1 arc: S3_V06S0103 F2 arc: S3_V06S0303 F5 arc: V01S0000 F7 arc: W1_H02W0301 F3 arc: W3_H06W0003 Q3 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0101010000000000 word: SLICEB.K0.INIT 0011001100001111 word: SLICEB.K1.INIT 0000000000001011 word: SLICEA.K0.INIT 1011000000000000 word: SLICEA.K1.INIT 0000000010111010 word: SLICEC.K0.INIT 0001010101010101 word: SLICEC.K1.INIT 1100111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R12C35:PLC2 arc: E1_H02E0201 V06N0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02S0101 arc: H00R0100 V02N0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 W1_H02E0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: A0 H02E0501 arc: A1 H00L0100 arc: A2 V02N0701 arc: B0 V02S0101 arc: B1 V00B0000 arc: B2 V02S0101 arc: B3 V02N0301 arc: C0 H00R0100 arc: C1 S1_V02N0601 arc: C2 H02E0401 arc: C3 V02S0601 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 F0 arc: D2 E1_H02W0201 arc: D3 N1_V02S0201 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N1_V02N0001 F2 arc: V01S0000 F1 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0101000111111011 word: SLICEA.K1.INIT 1111101100000000 word: SLICEB.K0.INIT 0000000011011111 word: SLICEB.K1.INIT 1111001111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R12C36:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0701 arc: H00R0100 V02S0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0301 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 H01E0001 arc: E3_H06E0303 W3_H06E0203 arc: A3 V00B0000 arc: B1 H02W0301 arc: B3 H00R0000 arc: C0 V02S0601 arc: C1 E1_H02W0601 arc: C3 V02S0401 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 F0 arc: D3 E1_H02W0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: E1_H02E0301 F1 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H00R0000 Q6 arc: H01W0000 F0 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 F0 arc: S3_V06S0103 F1 arc: V00B0000 Q4 arc: V01S0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0110011000100000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R12C37:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 H01E0101 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 S1_V02N0201 arc: H00L0100 S1_V02N0301 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0203 S3_V06N0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0501 arc: A1 H02W0701 arc: A7 N1_V01S0100 arc: B0 E1_H02W0101 arc: B1 V00B0000 arc: B7 V02N0701 arc: C0 H00L0100 arc: C1 H00L0000 arc: C7 V00B0100 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02W0201 arc: D7 H02E0201 arc: E1_H01E0101 Q2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0100 F0 arc: M2 W1_H02E0601 arc: M4 W1_H02E0401 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0601 F6 arc: S3_V06S0303 F6 arc: V00T0100 F1 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1001000000000000 word: SLICEA.K1.INIT 1000101011001111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R12C38:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0203 V06N0203 arc: H00L0000 V02S0201 arc: H00R0100 H02E0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 H01E0101 arc: S3_V06S0003 E3_H06W0003 arc: V00B0100 H02W0701 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 H01E0101 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: A1 H00L0100 arc: A7 V00T0100 arc: B1 V00T0000 arc: B6 V00T0000 arc: B7 V00T0000 arc: C0 V02N0601 arc: C1 N1_V01N0001 arc: C6 Q6 arc: C7 E1_H01E0101 arc: CE1 V02S0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR1 H02W0301 arc: M2 E1_H02W0601 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: S1_V02S0101 Q1 arc: V00T0000 Q0 arc: V00T0100 Q1 arc: V01S0000 Q0 arc: V01S0100 Q6 arc: W1_H02W0001 Q2 arc: W1_H02W0601 Q4 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0110101010101010 word: SLICED.K0.INIT 0011110011110000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R12C39:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 S1_V02N0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0301 H06E0003 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0701 arc: B2 H00L0000 arc: B3 H00R0000 arc: B4 S1_V02N0501 arc: B5 V02N0501 arc: B6 H02W0301 arc: B7 V00B0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F6 arc: S1_V02S0201 F2 arc: S1_V02S0701 F5 arc: V01S0000 F7 arc: V01S0100 F4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R12C3:PLC2 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 E1_H02W0701 arc: A3 V00B0000 arc: B3 H00L0000 arc: C3 V02N0601 arc: CE0 H00R0100 arc: CE2 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: E1_H02E0301 F3 arc: E3_H06E0203 Q4 arc: F3 F3_SLICE arc: H00L0000 Q0 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0201 Q0 arc: S1_V02S0601 Q4 arc: V00B0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R12C40:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0103 H06W0103 arc: V00B0000 S1_V02N0001 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V02S0601 arc: N1_V02N0101 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 arc: B0 V00B0000 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: LSR1 H02E0301 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0001 F0 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R12C41:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 N1_V01S0000 arc: H00R0100 H02W0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02W0501 arc: N3_V06N0103 H06W0103 arc: V00B0000 H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0101 V02S0101 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A3 V02S0701 arc: A5 W1_H02E0501 arc: B3 V02S0301 arc: B4 V01S0000 arc: B5 V00B0100 arc: B6 V02N0701 arc: B7 H02E0101 arc: C3 H02W0601 arc: C4 V00T0100 arc: C5 W1_H02E0401 arc: C6 V00T0100 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D3 S1_V02N0201 arc: D4 H00R0100 arc: D5 S1_V02N0601 arc: D6 E1_H01W0100 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q5 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0303 F6 arc: V01S0000 Q5 arc: V01S0100 Q7 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000010101010 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 0100110011111111 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1100000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R12C42:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 H01E0101 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: S3_V06S0003 N1_V02S0001 arc: V00B0100 V02N0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E3_H06W0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: A0 S1_V02N0501 arc: A3 S1_V02N0701 arc: B0 F3 arc: B3 H00R0100 arc: C0 H02E0601 arc: C3 W1_H02E0601 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D3 V02N0001 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: M0 E1_H02W0601 arc: M4 W1_H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0303 Q6 arc: V01S0100 Q4 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000001001000001 word: SLICEA.K0.INIT 0000000000001000 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R12C43:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 H01E0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0401 N1_V01S0000 arc: V00B0100 V02S0101 arc: V00T0100 V02S0501 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H02W0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A2 H02W0701 arc: A3 V02N0701 arc: A4 V02S0301 arc: A5 V00B0000 arc: B2 V02N0301 arc: B3 H02E0301 arc: B4 H02W0101 arc: B5 V00B0100 arc: C2 V02N0601 arc: C3 H00L0100 arc: C4 V02N0201 arc: C5 V00T0100 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H02W0201 arc: D3 H00R0000 arc: D4 V02S0401 arc: D5 V02S0601 arc: E1_H01E0001 F4 arc: E3_H06E0303 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q3 arc: M0 H02E0601 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q0 arc: N1_V02N0301 F3 arc: N3_V06N0303 Q5 arc: S3_V06S0003 Q0 arc: S3_V06S0103 F2 arc: S3_V06S0303 F5 arc: V00B0000 Q6 arc: V01S0000 F3 arc: W1_H02W0301 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0101111100010011 word: SLICEB.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 0111000011110000 word: SLICEC.K1.INIT 0000000011100010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R12C44:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 H02W0001 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0401 H01E0001 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0201 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02S0701 arc: E1_H02E0001 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: B0 V00B0000 arc: B1 V00T0000 arc: B6 V01S0000 arc: B7 V02S0501 arc: C0 N1_V01N0001 arc: C1 H02W0401 arc: C2 H00L0100 arc: C3 H00L0000 arc: C6 E1_H01E0101 arc: C7 V01N0101 arc: CE0 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 E1_H02W0001 arc: D2 H01E0101 arc: D3 H02E0001 arc: D6 H01W0000 arc: D7 W1_H02E0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0100 F0 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q6 arc: N1_V02N0401 Q6 arc: S3_V06S0103 F2 arc: S3_V06S0203 F7 arc: S3_V06S0303 Q6 arc: V01S0000 Q1 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0000000000001111 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R12C45:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: H00L0000 H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 E1_H01W0000 arc: E1_H02E0501 W3_H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: W3_H06W0103 E1_H02W0201 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: A2 H00L0100 arc: A3 V02N0701 arc: A4 V02S0101 arc: A5 S1_V02N0301 arc: A6 E1_H02W0701 arc: A7 S1_V02N0101 arc: B2 H02W0301 arc: B3 V02S0301 arc: B4 E1_H02W0301 arc: B5 E1_H02W0101 arc: B6 H02E0101 arc: B7 W1_H02E0101 arc: C2 H02E0601 arc: C3 H00R0100 arc: C4 H02W0401 arc: C5 N1_V02S0201 arc: C6 E1_H01E0101 arc: C7 V02N0001 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 V00T0100 arc: D4 E1_H01W0100 arc: D5 V02S0601 arc: D6 V02S0401 arc: D7 V02S0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q7 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V02N0101 Q3 arc: N3_V06N0303 Q5 arc: S1_V02S0601 F4 arc: S3_V06S0103 F2 arc: V01S0000 F6 arc: W1_H02W0701 F7 arc: W3_H06W0003 F3 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000010111111 word: SLICED.K1.INIT 0000000011100010 word: SLICEC.K0.INIT 0011011110111111 word: SLICEC.K1.INIT 0000000010101100 word: SLICEB.K0.INIT 0101111100010011 word: SLICEB.K1.INIT 0000000011100010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R12C46:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: V00B0000 V02N0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N1_V01S0100 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: A0 V02N0501 arc: A1 H00R0000 arc: A3 V00T0000 arc: A4 V00T0100 arc: A6 V00T0100 arc: A7 S1_V02N0301 arc: B0 E1_H02W0301 arc: B1 V00B0000 arc: B3 H00L0000 arc: B4 E1_H02W0301 arc: B5 V02S0701 arc: B6 E1_H02W0301 arc: B7 V02S0501 arc: C0 H02W0601 arc: C1 H00L0100 arc: C2 V02S0401 arc: C3 H02W0601 arc: C4 H01E0001 arc: C5 N1_V02S0001 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02S0001 arc: D2 V02S0201 arc: D3 H01E0101 arc: D4 H01W0000 arc: D5 V02N0601 arc: D6 H01W0000 arc: D7 V02S0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F1 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F2 arc: N1_V02N0001 F2 arc: N1_V02N0501 F5 arc: N3_V06N0103 Q1 arc: S1_V02S0101 F3 arc: S1_V02S0501 F5 arc: S3_V06S0003 F0 arc: S3_V06S0203 F4 arc: S3_V06S0303 F6 arc: V00B0100 F5 arc: V00T0000 F2 arc: V01S0100 F2 arc: W1_H02W0701 F5 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0101111100010011 word: SLICEC.K1.INIT 0000001111001111 word: SLICEA.K0.INIT 0101111100010011 word: SLICEA.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 0011000100100000 word: SLICED.K0.INIT 0101111100010011 word: SLICED.K1.INIT 0000000011001010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R12C47:PLC2 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 V02N0601 arc: H00L0000 H02E0001 arc: H00R0000 H02W0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 V01N0101 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0301 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 N1_V01S0100 arc: E1_H02E0501 W3_H06E0303 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0601 W3_H06E0303 arc: W3_H06W0103 E1_H02W0201 arc: E3_H06E0303 W3_H06E0203 arc: A7 H02E0501 arc: B0 H01W0100 arc: B1 V00T0000 arc: B3 N1_V02S0301 arc: B6 S1_V02N0501 arc: B7 V00B0100 arc: C0 H00L0100 arc: C1 H02W0401 arc: C3 S1_V02N0601 arc: C6 W1_H02E0601 arc: C7 V00T0100 arc: CE0 H00L0000 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 N1_V02S0001 arc: D3 H00R0000 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0101 Q4 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H00R0100 F7 arc: H01W0100 Q3 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: S3_V06S0103 F1 arc: V00T0000 Q0 arc: V01S0100 F3 arc: W3_H06W0003 Q0 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111001100000000 word: SLICED.K1.INIT 0101011100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R12C48:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 E1_H02W0001 arc: H00R0100 H02W0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 H02W0601 arc: V00B0100 H02E0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: B3 H02W0301 arc: B5 V02S0501 arc: B7 V00B0000 arc: C3 H00R0100 arc: C5 V02N0201 arc: C7 V02N0201 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D5 S1_V02N0401 arc: D7 V02N0401 arc: E3_H06E0003 Q0 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 F7 arc: M0 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: S1_V02S0301 F3 arc: S1_V02S0501 F5 arc: V01S0000 Q3 arc: V01S0100 F3 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100111111000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R12C49:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 S3_V06N0203 arc: H00L0000 H02W0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 H06E0303 arc: S3_V06S0203 E1_H01W0000 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N1_V02S0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: N3_V06N0203 W3_H06E0203 arc: W3_H06W0303 N1_V01S0100 arc: E3_H06E0003 W3_H06E0303 arc: B0 V00T0000 arc: B1 N1_V02S0101 arc: B3 H02W0101 arc: B5 H00R0000 arc: B7 V02N0701 arc: C0 N1_V01N0001 arc: C1 H00L0100 arc: C3 H00L0000 arc: C5 H02E0601 arc: C7 V00T0100 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00B0100 arc: D3 V00B0100 arc: D5 H00R0100 arc: D7 H00R0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q3 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: S1_V02S0101 Q1 arc: S1_V02S0501 Q7 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0303 F5 arc: V01S0000 F7 arc: V01S0100 Q5 arc: W3_H06W0003 F0 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R12C4:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0701 S3_V06N0203 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0501 S3_V06N0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0501 S3_V06N0303 arc: A0 H00R0000 arc: B0 F1 arc: C0 H00L0100 arc: C1 N1_V01N0001 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02N0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00B0100 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V02N0001 F0 arc: N1_V02N0201 Q2 arc: N1_V02N0601 Q4 arc: W1_H02W0601 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0001000000110000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R12C50:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 E1_H01W0000 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 N1_V02S0601 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S3_V06N0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: B0 V02S0101 arc: B1 V00B0000 arc: B3 H02E0101 arc: B5 H00L0000 arc: B7 V02N0501 arc: C0 H00L0100 arc: C1 V02N0401 arc: C3 H02E0401 arc: C5 V00B0100 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H02E0001 arc: D3 H02E0001 arc: D5 H02E0001 arc: D7 H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 Q3 arc: H01W0100 F7 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F5 arc: S1_V02S0501 Q7 arc: S1_V02S0701 F5 arc: S3_V06S0103 Q1 arc: S3_V06S0203 F7 arc: S3_V06S0303 Q5 arc: V01S0100 F1 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R12C51:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 H01E0001 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02E0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0401 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 H06E0003 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 V01N0101 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 W1_H02E0601 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 N1_V01S0100 arc: N1_V02N0501 W3_H06E0303 arc: B1 N1_V02S0101 arc: B3 V02S0301 arc: B4 V02N0701 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 V02S0501 arc: C1 V02N0601 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V00B0100 arc: C6 E1_H01E0101 arc: C7 V02S0001 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 V00B0000 arc: D5 W1_H02E0001 arc: D6 V02S0601 arc: D7 W1_H02E0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F5 arc: S1_V02S0101 Q1 arc: S1_V02S0301 F1 arc: S1_V02S0701 Q7 arc: S3_V06S0003 Q3 arc: S3_V06S0303 F5 arc: V01S0000 Q5 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R12C52:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 V06N0003 arc: H00L0000 W1_H02E0001 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02E0501 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H01E0101 arc: V00B0100 H02E0501 arc: V00T0000 V02N0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V06N0103 arc: W1_H02W0601 V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: B1 V00T0000 arc: B3 V02N0301 arc: B5 E1_H02W0101 arc: B7 V02S0501 arc: C1 S1_V02N0601 arc: C3 H00L0100 arc: C5 E1_H02W0601 arc: C7 V02S0001 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 V00B0100 arc: D5 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 F7 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q3 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F5 arc: S1_V02S0301 F1 arc: S1_V02S0501 Q7 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: V01S0000 Q5 arc: W1_H02W0301 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R12C53:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0303 V01N0101 arc: H00L0100 H02E0301 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0701 N1_V01S0100 arc: H01W0100 W3_H06E0303 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0003 W3_H06E0303 arc: A4 V00B0000 arc: A5 V00T0100 arc: B1 H02E0101 arc: B4 S1_V02N0501 arc: B5 S1_V02N0701 arc: B7 V00T0000 arc: C1 E1_H02W0401 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 W1_H02E0401 arc: C5 S1_V02N0001 arc: C7 V02N0001 arc: CE0 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 V00B0100 arc: D3 H02E0201 arc: D4 H00R0100 arc: D5 E1_H01W0100 arc: D7 H02E0001 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 Q7 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: S1_V02S0101 F3 arc: S3_V06S0103 Q1 arc: S3_V06S0203 F7 arc: V01S0100 F2 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1000000011111111 word: SLICEC.K1.INIT 0000000000010011 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R12C54:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V06N0203 arc: H00L0000 S1_V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 H01E0101 arc: V00B0000 N1_V02S0201 arc: V00T0000 H02W0201 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V06N0203 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: A2 E1_H01E0001 arc: A3 S1_V02N0701 arc: A5 S1_V02N0101 arc: A7 V02S0101 arc: B1 V02N0101 arc: B2 E1_H02W0101 arc: B3 H00R0000 arc: B5 S1_V02N0501 arc: B7 V00B0000 arc: C1 H00L0000 arc: C2 V02N0601 arc: C3 H02E0401 arc: C5 H02E0401 arc: C7 V00T0000 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D2 V01S0100 arc: D3 V02N0001 arc: D5 V02S0601 arc: D7 S1_V02N0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 F5 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V01S0100 F3 arc: W1_H02W0201 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000110000001010 word: SLICEB.K0.INIT 1111111111010101 word: SLICEB.K1.INIT 0000110000001010 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 0100101111010111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R12C55:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02N0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 N1_V01S0100 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 H01E0101 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02E0701 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V01S0000 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: W3_H06W0303 S3_V06N0303 arc: A1 H00L0100 arc: A4 V00T0000 arc: A5 S1_V02N0301 arc: B1 H02E0301 arc: B3 E1_H02W0101 arc: B4 H02W0101 arc: B5 H00L0000 arc: B7 V00B0000 arc: C1 E1_H02W0401 arc: C3 H02W0601 arc: C4 V00T0100 arc: C5 W1_H02E0401 arc: C7 N1_V02S0201 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D3 W1_H02E0201 arc: D4 H00R0100 arc: D5 V02N0601 arc: D7 W1_H02E0201 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 F7 arc: H01W0100 Q4 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0701 Q7 arc: S3_V06S0003 F3 arc: S3_V06S0203 F7 arc: V00T0000 F0 arc: W3_H06W0003 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1111111111010101 word: SLICEC.K1.INIT 0000110000001010 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0010110110110111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R12C56:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 V02N0301 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 H06E0303 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 E1_H02W0301 arc: H01W0000 W3_H06E0103 arc: S1_V02S0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A0 E1_H01E0001 arc: A1 H00L0100 arc: A5 V02N0301 arc: B0 H00R0100 arc: B1 H02E0301 arc: B5 V00B0100 arc: B7 H02W0301 arc: C0 S1_V02N0601 arc: C1 H02E0401 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C5 V00T0000 arc: C7 S1_V02N0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02N0001 arc: D2 H02E0001 arc: D3 V02S0201 arc: D5 H02E0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: S3_V06S0203 Q7 arc: V01S0100 F1 arc: W1_H02W0001 Q0 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1111111111010101 word: SLICEA.K1.INIT 0000110000001010 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 0110001111010111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R12C57:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 H02W0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 H01E0101 arc: V00B0000 E1_H02W0401 arc: V00B0100 N1_V02S0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 S3_V06N0203 arc: H01W0000 W3_H06E0103 arc: W3_H06W0103 S3_V06N0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 S1_V02N0501 arc: A1 H00L0100 arc: A2 S1_V02N0501 arc: A3 H02E0701 arc: A5 H02W0701 arc: A6 H02E0701 arc: B0 H02E0101 arc: B1 V02S0301 arc: B2 F3 arc: B3 V02N0301 arc: B5 S1_V02N0701 arc: B6 V02N0701 arc: B7 S1_V02N0701 arc: C0 S1_V02N0401 arc: C1 E1_H02W0401 arc: C2 H00R0100 arc: C3 H00L0000 arc: C5 V00B0100 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02N0001 arc: D2 S1_V02N0001 arc: D3 H00R0000 arc: D5 H02E0001 arc: D6 F2 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F7 arc: S3_V06S0203 F7 arc: V00T0100 F1 arc: W1_H02W0601 Q6 arc: W3_H06W0003 Q0 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 1000000011111111 word: SLICED.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 1111111110110011 word: SLICEA.K1.INIT 0000110000001010 word: SLICEB.K0.INIT 0000000000010011 word: SLICEB.K1.INIT 1110111001100000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 0110001111010111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R12C58:PLC2 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H01E0001 arc: S3_V06S0003 H06E0003 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: S1_V02S0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: A1 H00L0100 arc: A2 H02E0501 arc: A3 S1_V02N0701 arc: A4 V02S0101 arc: A6 H02E0501 arc: B1 H02W0101 arc: B2 W1_H02E0301 arc: B3 E1_H02W0301 arc: B4 H02W0101 arc: B5 H02E0101 arc: B6 F1 arc: C1 V02N0401 arc: C2 H02W0601 arc: C3 H02W0401 arc: C4 H02W0401 arc: C5 V00T0000 arc: C6 V02N0001 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 E1_H02W0001 arc: D4 E1_H02W0001 arc: D5 H00R0100 arc: D6 V00B0000 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q6 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 F4 arc: V00B0100 F5 arc: V00T0100 F3 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1110111001100000 word: SLICEC.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 1111111110110011 word: SLICEB.K1.INIT 0000110000001010 word: SLICED.K0.INIT 1111111111101100 word: SLICED.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R12C59:PLC2 arc: S3_V06S0103 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: H01W0000 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 .tile R12C5:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 E1_H01W0000 arc: H00L0000 H02W0001 arc: H00R0000 N1_V02S0401 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 H06E0103 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: W1_H02W0701 V02S0701 arc: A7 N1_V01N0101 arc: B7 V00T0000 arc: C7 V02N0001 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: E1_H02E0601 Q4 arc: E1_H02E0701 F7 arc: E3_H06E0203 Q4 arc: F7 F7_SLICE arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q2 arc: V00T0000 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R12C60:PLC2 arc: N1_V02N0601 S1_V02N0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 .tile R12C62:PLC2 arc: E3_H06E0303 W3_H06E0303 .tile R12C63:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R12C64:PLC2 arc: E3_H06E0003 W3_H06E0003 .tile R12C66:PLC2 arc: E3_H06E0303 W3_H06E0203 .tile R12C68:PLC2 arc: E3_H06E0303 W3_H06E0303 .tile R12C69:PLC2 arc: S3_V06S0303 H06E0303 arc: S3_V06S0003 W3_H06E0003 .tile R12C6:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0601 H06W0303 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0601 S1_V02N0601 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: H01W0000 Q6 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0001 Q2 arc: S1_V02S0601 Q4 arc: S3_V06S0103 Q2 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R12C70:PLC2 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 .tile R12C7:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0701 arc: H00R0100 H02W0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02W0501 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0100 V02N0501 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0003 E3_H06W0003 arc: A7 H00L0000 arc: B7 V00T0000 arc: C7 V02S0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D7 V02S0601 arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F7 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: S3_V06S0203 Q4 arc: V00T0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R12C8:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 S1_V02N0401 arc: H00L0100 E1_H02W0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02E0601 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A1 V02N0501 arc: A6 H02E0701 arc: A7 H00L0000 arc: B1 V00B0000 arc: B6 V00B0100 arc: B7 V00T0000 arc: C1 H00R0100 arc: C5 V02S0201 arc: C6 N1_V02S0201 arc: C7 V02S0001 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0001 arc: D5 V02S0401 arc: D6 W1_H02E0201 arc: D7 H00L0100 arc: E1_H01E0101 F5 arc: E1_H02E0701 F5 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F1 arc: LSR1 E1_H02W0301 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F5 arc: S3_V06S0303 F5 arc: V00B0100 F7 arc: V01S0000 F5 arc: W1_H02W0501 F5 arc: W1_H02W0701 F5 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000001001000001 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R12C9:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 V06S0303 arc: H00L0000 N1_V02S0201 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0303 V06S0303 arc: W3_H06W0203 E3_H06W0203 arc: A5 V00T0000 arc: B5 H00R0000 arc: C5 N1_V02S0001 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: E1_H02E0701 F5 arc: F5 F5_SLICE arc: H00R0000 Q6 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M2 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 arc: V00T0000 Q0 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R14C10:PLC2 arc: E3_H06E0003 W1_H02E0001 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02W0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N1_V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 E3_H06W0003 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V02N0501 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q2 arc: S3_V06S0203 Q4 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: V01S0100 Q7 arc: W1_H02W0001 Q2 arc: W1_H02W0101 Q3 arc: W1_H02W0301 Q1 arc: W1_H02W0701 Q5 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C11:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 N1_V02S0301 arc: E3_H06E0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V01S0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q6 arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q2 arc: N1_V02N0201 Q0 arc: N1_V02N0301 Q1 arc: N1_V02N0401 Q6 arc: S1_V02S0301 Q1 arc: S3_V06S0103 Q2 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q7 arc: V01S0100 Q6 arc: W1_H02W0001 Q0 arc: W1_H02W0301 Q3 arc: W1_H02W0501 Q7 arc: W1_H02W0601 Q4 arc: W1_H02W0701 Q5 arc: W3_H06W0003 Q3 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C12:PLC2 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: W3_H06W0303 E1_H02W0501 arc: W3_H06W0203 E3_H06W0203 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 H02E0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q5 arc: H01W0100 Q7 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q2 arc: N1_V02N0001 Q0 arc: N1_V02N0401 Q4 arc: S1_V02S0601 Q6 arc: S3_V06S0103 Q1 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q4 arc: V01S0100 Q0 arc: W1_H02W0101 Q1 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0401 Q4 arc: W1_H02W0501 Q7 arc: W1_H02W0701 Q5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C13:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 H06W0303 arc: V00T0100 V02N0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V01S0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q1 arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q2 arc: N3_V06N0303 Q6 arc: S3_V06S0103 Q1 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q7 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q3 arc: W1_H02W0201 Q2 arc: W1_H02W0401 Q6 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q4 arc: W1_H02W0701 Q7 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C14:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 E1_H01W0100 arc: W1_H02W0401 N3_V06S0203 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V02S0501 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 Q1 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q7 arc: N1_V02N0001 Q2 arc: N3_V06N0003 Q0 arc: S3_V06S0203 Q4 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q3 arc: V01S0100 Q0 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0501 Q7 arc: W1_H02W0701 Q5 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C15:PLC2 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: W3_H06W0103 E3_H06W0003 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V02S0501 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q3 arc: H01W0100 Q4 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: N1_V02N0401 Q6 arc: S1_V02S0101 Q3 arc: S1_V02S0701 Q7 arc: S3_V06S0103 Q1 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 Q6 arc: W1_H02W0101 Q1 arc: W1_H02W0201 Q0 arc: W1_H02W0501 Q5 arc: W1_H02W0701 Q7 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R14C16:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 S1_V02N0601 arc: N1_V02N0201 S1_V02N0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: W3_H06W0303 E3_H06W0303 arc: B0 V00T0000 arc: B1 Q1 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00T0000 Q0 arc: W1_H02W0001 Q0 arc: W1_H02W0301 Q1 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C17:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0501 arc: S1_V02S0001 V01N0001 arc: S1_V02S0701 V01N0101 arc: V00T0100 N1_V02S0501 arc: W1_H02W0501 W3_H06E0303 arc: A5 V00B0000 arc: B5 H00R0000 arc: C5 H02E0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V02N0601 arc: E1_H01E0001 F5 arc: F5 F5_SLICE arc: LSR0 V00T0100 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R14C18:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 H01E0001 arc: E3_H06E0003 S3_V06N0003 arc: H00R0100 N1_V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0103 H06W0103 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 H02E0301 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N1_V01S0000 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0003 E3_H06W0003 arc: A5 V00T0000 arc: B5 V00B0100 arc: C5 V02N0201 arc: CE0 H00R0100 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D5 V02S0601 arc: E1_H01E0101 F5 arc: E1_H02E0201 Q2 arc: F5 F5_SLICE arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: V00T0000 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R14C19:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: S1_V02S0401 H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0501 arc: V00T0000 H02E0201 arc: W1_H02W0301 S1_V02N0301 arc: W3_H06W0003 E3_H06W0003 arc: A1 V01N0101 arc: A2 E1_H01E0001 arc: A3 S1_V02N0701 arc: A4 F5 arc: A5 V00T0000 arc: A6 E1_H01W0000 arc: A7 H00L0000 arc: B1 N1_V02S0101 arc: B2 E1_H01W0100 arc: B3 V02S0101 arc: B4 F1 arc: B5 V02S0701 arc: B6 H02E0301 arc: B7 S1_V02N0501 arc: C1 H02E0401 arc: C2 H00R0100 arc: C3 H02E0401 arc: C4 H02E0601 arc: C5 S1_V02N0001 arc: C6 H02E0401 arc: C7 F6 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H01E0101 arc: D3 V00B0100 arc: D4 N1_V02S0401 arc: D5 N1_V02S0601 arc: D6 H02W0001 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: LSR0 W1_H02E0501 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0111111111111111 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 1000111111111111 word: SLICEB.K0.INIT 0111111111111111 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R14C20:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0303 S3_V06N0303 arc: H00R0100 V02S0701 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0100 V02N0101 arc: V00T0000 H02E0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 E3_H06W0103 arc: A3 V00B0000 arc: B3 V02S0301 arc: C3 H02E0601 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D3 H02W0201 arc: F3 F3_SLICE arc: H01W0000 Q6 arc: H01W0100 F3 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V00B0000 Q4 arc: W1_H02W0201 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R14C21:PLC2 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V01N0001 arc: H00L0000 V02N0201 arc: H00R0000 H02E0401 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 V01N0101 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A1 E1_H01E0001 arc: B1 H02W0101 arc: C1 H00L0000 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: E1_H01E0001 Q2 arc: F1 F1_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M2 H02E0601 arc: M4 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V02N0401 Q4 arc: W1_H02W0101 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R14C22:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V01N0001 arc: H00L0000 V02S0001 arc: H00L0100 V02N0301 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 N1_V02S0001 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 N1_V01S0000 arc: W3_H06W0003 E3_H06W0303 arc: A3 E1_H01E0001 arc: B3 S1_V02N0301 arc: B5 H00R0000 arc: C1 H00L0000 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 V02S0201 arc: C6 V02S0001 arc: C7 H02E0601 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D3 V02N0201 arc: D4 E1_H02W0001 arc: D5 N1_V02S0601 arc: D6 H00R0100 arc: D7 V02N0601 arc: E1_H01E0001 Q3 arc: E3_H06E0103 F1 arc: E3_H06E0203 F4 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 F7 arc: H01W0000 F7 arc: LSR0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N3_V06N0203 F4 arc: N3_V06N0303 Q5 arc: S1_V02S0501 F7 arc: S1_V02S0701 Q5 arc: S3_V06S0203 F4 arc: V00B0100 Q5 arc: V01S0000 Q3 arc: V01S0100 F7 arc: W3_H06W0203 F7 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111100110011001 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 0011001111110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R14C23:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 W1_H02E0501 arc: H00L0000 S1_V02N0201 arc: H00R0100 V02S0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 V02N0101 arc: W1_H02W0701 N3_V06S0203 arc: A3 S1_V02N0501 arc: A5 V00B0000 arc: A6 V00T0100 arc: B0 H01W0100 arc: B1 Q1 arc: B3 V01N0001 arc: B5 S1_V02N0501 arc: B6 H02E0101 arc: B7 V02N0701 arc: C0 H02E0601 arc: C1 H02E0401 arc: C3 H00L0000 arc: C5 V01N0101 arc: C6 H02W0401 arc: C7 F6 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 N1_V02S0001 arc: D3 V00B0100 arc: D5 V02S0401 arc: D6 H00L0100 arc: D7 H00R0100 arc: E1_H01E0101 F0 arc: E1_H02E0601 F4 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0100 Q1 arc: LSR0 V00T0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N3_V06N0103 Q1 arc: S1_V02S0401 F4 arc: V00T0100 Q1 arc: V01S0000 F7 word: SLICED.K0.INIT 0000000010110011 word: SLICED.K1.INIT 1111000000110000 word: SLICEA.K0.INIT 1111001100110011 word: SLICEA.K1.INIT 1100111111001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000001000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R14C24:PLC2 arc: E1_H02E0201 V02N0201 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02N0001 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0501 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 V02N0401 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 S1_V02N0401 arc: E1_H01E0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: A4 N1_V01N0101 arc: A7 Q7 arc: B0 V02S0301 arc: B2 H00R0100 arc: B4 S1_V02N0701 arc: B6 V00B0000 arc: B7 V00B0000 arc: C0 H00R0100 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 V00T0000 arc: C5 V00B0100 arc: C6 V02S0001 arc: C7 V02S0001 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 H02E0201 arc: D5 N1_V02S0401 arc: D6 H02W0201 arc: D7 H02W0201 arc: E1_H01E0101 F4 arc: E1_H02E0101 F1 arc: E1_H02E0501 Q5 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q5 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q5 arc: N1_V02N0301 F1 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 Q6 arc: V01S0100 Q7 word: SLICED.K0.INIT 1111001100110011 word: SLICED.K1.INIT 1111100110011001 word: SLICEC.K0.INIT 1010111110101100 word: SLICEC.K1.INIT 1111111111110000 word: SLICEA.K0.INIT 1100001100000000 word: SLICEA.K1.INIT 1111111100001111 word: SLICEB.K0.INIT 1100110000001111 word: SLICEB.K1.INIT 1111111100001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R14C25:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 H01E0001 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: V00B0100 V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0003 E3_H06W0003 arc: B1 H00R0100 arc: C0 H00R0100 arc: C1 H00L0100 arc: C3 H02E0601 arc: C5 H02E0601 arc: C7 H02E0601 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 V02N0401 arc: D7 V02N0401 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0100 F3 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M2 V00B0100 arc: M3 H02E0201 arc: M4 V00B0100 arc: M5 W1_H02E0001 arc: M6 V00B0100 arc: N1_V02N0101 F3 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0000000011110000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1111111111110000 word: SLICEA.K1.INIT 1111111111000011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R14C26:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 S1_V02N0001 arc: H00L0100 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06E0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 E1_H01W0000 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0103 V06S0103 arc: A3 H02E0501 arc: A4 V00B0000 arc: A5 V00T0000 arc: B3 H02E0101 arc: B4 V02S0501 arc: B5 H02W0301 arc: C2 H00L0100 arc: C3 H02E0601 arc: C4 V02N0201 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 H02E0201 arc: D5 V02S0401 arc: D6 N1_V02S0601 arc: D7 V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0601 Q4 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F1 arc: LSR0 H02E0301 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F5 arc: S1_V02S0501 F5 arc: S3_V06S0303 F5 arc: V01S0000 F7 arc: W1_H02W0101 F1 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 1000100011111000 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1111111110100110 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R14C27:PLC2 arc: H00L0000 V02N0001 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0701 H02E0701 arc: S3_V06S0303 N1_V02S0601 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A1 V02S0501 arc: A3 H02E0501 arc: A5 N1_V02S0101 arc: B1 H02E0101 arc: B3 H00R0100 arc: B5 V02N0701 arc: C1 V02N0401 arc: C3 S1_V02N0401 arc: C5 V00T0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D3 S1_V02N0001 arc: D5 V02S0401 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: H01W0100 F0 arc: M0 V00B0100 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: V00B0100 F5 arc: V01S0000 F0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010111110101100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R14C28:PLC2 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: C1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H01E0001 Q1 arc: E1_H02E0001 Q2 arc: F1 F1_SLICE arc: H00L0100 Q1 arc: H01W0100 Q1 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M2 W1_H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R14C29:PLC2 arc: H00R0000 H02W0401 arc: N1_V02N0001 H02E0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H01E0001 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: M4 E1_H02W0401 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R14C2:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 S3_V06N0003 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0501 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0100 V02N0501 arc: CE1 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: E3_H06E0103 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 V00B0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R14C30:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 E3_H06W0203 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E1_H01W0100 arc: W1_H02W0401 V01N0001 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 .tile R14C31:PLC2 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S3_V06N0103 arc: V00B0000 H02W0401 arc: W1_H02W0401 N1_V01S0000 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: H01W0100 Q2 arc: M2 V00B0000 arc: MUXCLK1 CLK0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R14C32:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0401 V01N0001 arc: E3_H06E0103 V06N0103 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02N0401 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02N0101 arc: W1_H02W0401 E1_H02W0401 arc: E3_H06E0303 W3_H06E0203 arc: C3 H00L0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V02N0201 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q0 arc: F3 F3_SLICE arc: LSR1 V00T0100 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111100001111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R14C33:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 H02W0701 arc: W1_H02W0301 V06N0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: C1 H02E0401 arc: C5 V02N0201 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D5 H00R0100 arc: E1_H02E0001 Q2 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: M2 E1_H02W0601 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N1_V02N0101 Q1 arc: N3_V06N0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R14C34:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 W1_H02E0201 arc: H00L0100 N1_V02S0101 arc: H00R0100 V02N0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 S3_V06N0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02S0101 arc: V00T0100 H02E0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 S3_V06N0203 arc: N1_V02N0701 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 S1_V02N0501 arc: A2 E1_H01E0001 arc: A4 H02E0701 arc: A7 H02E0701 arc: B0 H01W0100 arc: B2 V02S0301 arc: B3 V01N0001 arc: B4 S1_V02N0501 arc: B6 V01S0000 arc: B7 F3 arc: C0 N1_V01N0001 arc: C2 V02N0401 arc: C3 H00L0000 arc: C4 V01N0101 arc: C5 H02E0401 arc: C6 V02N0001 arc: C7 V01N0101 arc: D0 V00B0100 arc: D2 V00T0100 arc: D3 V02S0001 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 W1_H02E0001 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F7 arc: M0 V00B0000 arc: N1_V01N0001 F5 arc: N1_V02N0101 F3 arc: S1_V02S0501 F5 arc: S1_V02S0701 F5 arc: S3_V06S0003 F0 arc: S3_V06S0303 F5 arc: V00B0000 F4 arc: V01S0000 F7 arc: W1_H02W0001 F2 word: SLICEC.K0.INIT 0000001100000111 word: SLICEC.K1.INIT 0000000000001111 word: SLICEB.K0.INIT 0000010000001111 word: SLICEB.K1.INIT 0000001100001111 word: SLICED.K0.INIT 1100000011111111 word: SLICED.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 1111101110111011 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C35:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 H06W0203 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E3_H06W0203 arc: B7 V00T0000 arc: C3 N1_V02S0401 arc: C7 N1_V02S0001 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: D7 H02E0201 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q4 arc: V01S0000 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R14C36:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V06S0203 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 N1_V02S0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06E0303 arc: V00T0100 H02W0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0103 E3_H06W0003 arc: A3 E1_H01E0001 arc: B3 H00R0000 arc: B4 V01S0000 arc: B6 V00B0000 arc: C3 H00L0100 arc: C4 V00T0100 arc: C6 V02N0201 arc: CLK0 G_HPBX0000 arc: D3 E1_H02W0201 arc: D4 H02W0201 arc: D5 H00R0100 arc: D6 H02W0201 arc: D7 V02S0601 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F2 arc: E1_H02E0201 F2 arc: E3_H06E0303 Q6 arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: LSR0 H02E0301 arc: M2 N1_V01N0001 arc: M4 E1_H01E0101 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: S1_V02S0601 Q6 arc: V00B0000 Q6 arc: V00T0000 F2 arc: V01S0000 Q4 arc: W1_H02W0201 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R14C37:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 H01E0001 arc: H00L0000 W1_H02E0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0103 H06W0103 arc: V00B0000 S1_V02N0201 arc: V00T0000 H02E0001 arc: V00T0100 H02E0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: A3 E1_H01E0001 arc: A4 H02W0701 arc: A5 V00T0100 arc: B3 S1_V02N0101 arc: B4 E1_H02W0101 arc: B5 E1_H02W0301 arc: C3 H00L0000 arc: C4 V00B0100 arc: C5 H02E0401 arc: CE0 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D3 E1_H02W0001 arc: D4 V02S0401 arc: D5 H00R0100 arc: E1_H01E0001 Q6 arc: E1_H02E0001 Q0 arc: E3_H06E0303 F5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q5 arc: M0 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0001 Q0 arc: N1_V02N0301 F3 arc: S3_V06S0203 F4 arc: V00B0100 F5 arc: W1_H02W0501 F5 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000001001000001 word: SLICEC.K0.INIT 1001110110111111 word: SLICEC.K1.INIT 0000111000000100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R14C38:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V06S0203 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0103 W3_H06E0103 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A6 N1_V01N0101 arc: A7 V02S0301 arc: B0 N1_V02S0301 arc: B1 V00T0000 arc: B6 V00B0000 arc: B7 V02S0701 arc: C0 H02W0401 arc: C1 H00L0000 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H00R0000 arc: D6 V01N0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M2 W1_H02E0601 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q7 arc: N1_V02N0401 F6 arc: N3_V06N0203 Q7 arc: S1_V02S0101 F1 arc: S3_V06S0203 Q7 arc: V00B0000 Q4 arc: V01S0000 F7 arc: W3_H06W0203 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111010100110001 word: SLICEA.K1.INIT 1010001011110011 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 0100010001000111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R14C39:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: H00L0100 H02E0101 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02E0701 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02E0301 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 V02S0701 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: A3 V00T0000 arc: B0 V00T0000 arc: B3 H01W0100 arc: B4 H00R0000 arc: B6 V00B0000 arc: C0 H00L0100 arc: C3 N1_V01N0001 arc: C4 E1_H02W0601 arc: C6 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 N1_V02S0201 arc: D3 V00B0100 arc: D4 W1_H02E0201 arc: D5 H02E0001 arc: D6 W1_H02E0201 arc: D7 H00R0100 arc: E1_H01E0101 Q4 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0000 F3 arc: H01W0100 Q4 arc: LSR1 E1_H02W0501 arc: M0 V00T0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q0 arc: N1_V02N0601 Q4 arc: S3_V06S0003 Q0 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 arc: V00B0000 Q6 arc: V00T0000 Q0 arc: V01S0000 Q6 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R14C3:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 H01E0101 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: H01W0100 E3_H06W0303 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q0 arc: E1_H02E0601 Q6 arc: E3_H06E0103 Q2 arc: E3_H06E0303 Q6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 H02E0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0601 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R14C40:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 H02E0301 arc: H00R0100 V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N3_V06N0303 H06E0303 arc: S1_V02S0301 N1_V02S0301 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0001 arc: V00T0100 W1_H02E0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H01W0100 arc: E1_H02E0401 W3_H06E0203 arc: W3_H06W0303 V06S0303 arc: A6 V02S0101 arc: A7 H02E0701 arc: B1 V02S0301 arc: B2 H00L0000 arc: B4 H00R0000 arc: B6 H02E0101 arc: B7 V02N0701 arc: C1 H00L0100 arc: C2 H02W0401 arc: C4 V01N0101 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 S1_V02N0001 arc: D3 N1_V02S0001 arc: D4 S1_V02N0601 arc: D5 H02E0001 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q2 arc: E1_H02E0601 F6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M2 V00T0100 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V02N0001 Q2 arc: S1_V02S0001 Q2 arc: S1_V02S0101 F1 arc: S1_V02S0401 Q4 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q4 arc: W1_H02W0201 Q2 arc: W1_H02W0401 Q4 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111100 word: SLICED.K0.INIT 0000000000000111 word: SLICED.K1.INIT 1000000010101010 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R14C41:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02W0201 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H01W0100 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A2 V02S0501 arc: A3 V00T0000 arc: A5 V00T0100 arc: B2 E1_H02W0101 arc: B3 H02E0101 arc: B4 V02N0501 arc: B5 V01S0000 arc: C2 H00L0100 arc: C3 V02N0601 arc: C4 V02S0201 arc: C5 V00B0100 arc: CE0 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 E1_H02W0201 arc: D3 V02N0001 arc: D4 H02W0001 arc: D5 V00B0000 arc: E1_H01E0101 F4 arc: E1_H02E0501 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 F3 arc: H01W0100 F4 arc: M0 W1_H02E0601 arc: MUXCLK0 CLK0 arc: V00B0000 F4 arc: V01S0000 F2 arc: V01S0100 Q0 arc: W1_H02W0201 Q0 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1001000000000000 word: SLICEB.K1.INIT 1000001001000001 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1000000001000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R14C42:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 V06S0003 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02S0201 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H01E0101 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: E1_H02E0101 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: W3_H06W0103 V06S0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A1 H02E0701 arc: A4 V00B0000 arc: A5 V00B0000 arc: B1 H02W0301 arc: B4 H02E0301 arc: B5 H02E0301 arc: B7 V02N0701 arc: C1 H00L0000 arc: C4 V00B0100 arc: C5 V00B0100 arc: C7 N1_V02S0001 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D4 H02E0201 arc: D5 H02E0201 arc: D7 V02N0601 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F5 arc: N3_V06N0103 Q2 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111100 word: SLICEC.K0.INIT 1010111100100011 word: SLICEC.K1.INIT 1100010011110101 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000010000100001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R14C43:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 V01N0001 arc: H00L0000 W1_H02E0001 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 S1_V02N0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S3_V06N0303 arc: H01W0100 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: A3 V00B0000 arc: A4 V02S0301 arc: A5 E1_H02W0501 arc: B3 H00L0000 arc: B4 E1_H02W0101 arc: B5 H02W0301 arc: C3 E1_H02W0401 arc: C4 H02E0401 arc: C5 H02W0401 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 W1_H02E0001 arc: D3 V02S0001 arc: D4 E1_H02W0001 arc: D5 H01W0000 arc: E1_H01E0001 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F4 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F1 arc: S1_V02S0101 F1 arc: S1_V02S0301 F1 arc: S1_V02S0501 F5 arc: S3_V06S0103 Q1 arc: V01S0000 Q1 word: SLICEC.K0.INIT 1010101111101111 word: SLICEC.K1.INIT 0111000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R14C44:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 W1_H02E0301 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 V02N0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 S3_V06N0303 arc: E1_H02E0401 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: A3 V00T0000 arc: B3 V02S0101 arc: C3 H02E0601 arc: CE0 H00L0100 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 V02S0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: H01W0100 F1 arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: S1_V02S0101 Q1 arc: V00B0000 Q6 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0010000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R14C45:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N3_V06S0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02N0201 arc: H00L0100 H02E0101 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S1_V02N0301 arc: S1_V02S0201 V01N0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V01N0001 arc: H01W0000 W3_H06E0103 arc: A0 V02S0501 arc: A1 S1_V02N0501 arc: B0 H02W0301 arc: B1 H02E0301 arc: B3 V02S0301 arc: C0 N1_V01N0001 arc: C1 H00L0100 arc: C2 E1_H02W0401 arc: C3 N1_V02S0601 arc: CE0 H00R0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H00R0000 arc: D2 N1_V02S0201 arc: D3 V02S0001 arc: E1_H01E0001 F0 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F1 arc: N3_V06N0103 Q1 arc: N3_V06N0203 Q4 arc: S3_V06S0103 F1 arc: V01S0000 F2 arc: W1_H02W0301 F1 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0011000100100000 word: SLICEA.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 0000001100110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 .tile R14C46:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 W1_H02E0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 V01N0101 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0201 arc: V00T0000 H02W0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V06N0003 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 N3_V06S0303 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: A0 H02W0701 arc: A1 S1_V02N0501 arc: A2 E1_H02W0701 arc: A3 V00B0000 arc: A5 V02S0301 arc: A7 V02S0101 arc: B0 V00T0000 arc: B1 H02W0301 arc: B2 V02N0301 arc: B3 H00R0100 arc: B5 V02S0501 arc: B7 V02S0701 arc: C0 S1_V02N0601 arc: C1 H00L0100 arc: C2 N1_V01N0001 arc: C3 H00L0100 arc: C5 V02S0201 arc: C7 E1_H01E0101 arc: D0 V01S0100 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 H00R0000 arc: D5 V02S0601 arc: D7 V02S0401 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F2 arc: N1_V01N0001 F3 arc: N1_V01N0101 F5 arc: S1_V02S0501 F5 arc: S1_V02S0701 F5 arc: V01S0000 F7 arc: V01S0100 F1 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011001000010000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111111100000000 word: SLICEA.K0.INIT 1011000011110000 word: SLICEA.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0101111100010011 word: SLICEB.K1.INIT 0000000011001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R14C47:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 W1_H02E0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06E0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00T0000 H02E0201 arc: V00T0100 H02E0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 V06S0003 arc: A6 V02S0101 arc: A7 E1_H02W0501 arc: B4 W1_H02E0301 arc: B5 W1_H02E0101 arc: B6 V02S0701 arc: B7 V02N0701 arc: C2 H02W0401 arc: C3 H02E0401 arc: C4 V00B0100 arc: C5 S1_V02N0001 arc: C6 E1_H01E0101 arc: C7 V00T0100 arc: CE0 H00L0000 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 H02W0001 arc: D4 N1_V02S0401 arc: D5 N1_V02S0601 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: E3_H06E0003 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 Q0 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: N1_V02N0301 Q3 arc: S1_V02S0001 F2 arc: S1_V02S0501 F5 arc: V00B0100 F5 arc: V01S0100 Q5 arc: W1_H02W0501 F7 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0011001000010000 word: SLICED.K1.INIT 0000000011001010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R14C48:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02N0601 arc: E3_H06E0303 V01N0101 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02E0301 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0701 N1_V01S0100 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: B0 H01W0100 arc: B1 V00T0000 arc: B6 S1_V02N0501 arc: B7 E1_H02W0301 arc: C0 H02E0401 arc: C1 H00L0000 arc: C6 E1_H01E0101 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H02E0001 arc: D6 V00B0000 arc: D7 H02E0201 arc: E1_H01E0101 F7 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q7 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0003 Q0 arc: V00T0000 Q0 arc: W1_H02W0301 F1 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R14C49:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0203 H01E0001 arc: H00R0000 V02N0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V01S0100 S3_V06N0303 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0001 W3_H06E0003 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 V06N0103 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0101 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C4:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V02S0301 arc: H00L0100 H02E0101 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0501 arc: A1 H00R0000 arc: B1 V00T0000 arc: C1 H00L0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: F1 F1_SLICE arc: H00R0000 Q6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 H02W0601 arc: M4 E1_H01E0101 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0101 F1 arc: N1_V02N0401 Q4 arc: N3_V06N0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R14C50:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 N1_V02S0001 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0601 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0003 W3_H06E0303 arc: B2 H00R0100 arc: B3 W1_H02E0301 arc: C2 H00L0100 arc: C3 V02S0401 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 W1_H02E0001 arc: D3 V00B0100 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0100 F3 arc: H01W0100 Q6 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0601 Q6 arc: S1_V02S0101 F3 arc: V01S0100 Q3 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R14C51:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 V01N0001 arc: H00L0000 V02N0201 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0201 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N3_V06S0203 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0303 N1_V01S0100 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 H00L0000 arc: A2 V00B0000 arc: A4 H02W0701 arc: A7 E1_H02W0501 arc: B0 E1_H02W0301 arc: B2 E1_H01W0100 arc: B4 S1_V02N0501 arc: B5 H02W0101 arc: B7 V00T0000 arc: C0 E1_H02W0401 arc: C2 H02W0601 arc: C4 V00T0100 arc: C5 S1_V02N0201 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 H00R0000 arc: D4 V02N0401 arc: D5 N1_V02S0401 arc: D7 V02N0401 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 Q0 arc: H01W0100 Q2 arc: M0 E1_H02W0601 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V00B0100 F5 arc: V01S0100 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000110000001010 word: SLICEC.K0.INIT 0000101000001100 word: SLICEC.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 1111111111101100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111111101100 word: SLICEB.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R14C52:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E3_H06E0003 V06S0003 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 H01E0101 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 H01E0101 arc: E1_H02E0601 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A3 S1_V02N0501 arc: A5 V00T0000 arc: A6 S1_V02N0101 arc: B3 H00R0100 arc: B5 W1_H02E0101 arc: B6 V00B0000 arc: B7 V00B0100 arc: C3 S1_V02N0401 arc: C5 V01N0101 arc: C6 V01N0101 arc: C7 N1_V02S0201 arc: D3 H00R0000 arc: D5 S1_V02N0601 arc: D6 S1_V02N0601 arc: D7 N1_V02S0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: E1_H02E0701 F5 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1110111001100000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1110111001100000 word: SLICED.K0.INIT 1110111001100000 word: SLICED.K1.INIT 1100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R14C53:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02S0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 N1_V02S0701 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0003 V01N0001 arc: E3_H06E0103 W3_H06E0003 arc: A0 E1_H02W0701 arc: A2 H00L0100 arc: A3 V02S0701 arc: A4 H02W0701 arc: A5 V00T0000 arc: A6 H00L0000 arc: A7 H00R0000 arc: B2 H00R0100 arc: B3 E1_H02W0101 arc: B4 V02N0701 arc: B5 S1_V02N0701 arc: B6 H02E0101 arc: B7 W1_H02E0301 arc: E1_H01E0101 F5 arc: E1_H02E0201 F2 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: W1_H02W0401 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C54:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 H01E0101 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 H02W0401 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02W0601 arc: V00T0000 V02N0601 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: A0 H00L0100 arc: A1 N1_V02S0501 arc: A2 S1_V02N0501 arc: A3 V01N0101 arc: A4 H02E0501 arc: A5 V00B0000 arc: A6 H02E0701 arc: A7 V02N0301 arc: B0 H00R0100 arc: B1 S1_V02N0301 arc: B2 S1_V02N0101 arc: B3 H00L0000 arc: B4 H02W0301 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 S1_V02N0701 arc: E1_H01E0001 F3 arc: E1_H02E0201 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: N1_V01N0001 F7 arc: N3_V06N0003 F0 arc: N3_V06N0303 F5 arc: S1_V02S0601 F4 arc: W1_H02W0301 F1 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C55:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00L0100 V02S0101 arc: H00R0000 H02W0601 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H02W0501 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H01E0001 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0701 W3_H06E0203 arc: W3_H06W0203 V01N0001 arc: A0 V02N0701 arc: A1 V01N0101 arc: A2 N1_V02S0501 arc: A3 H00L0100 arc: A4 V02N0101 arc: A5 S1_V02N0101 arc: A6 V02N0301 arc: A7 H00L0000 arc: B0 E1_H02W0101 arc: B1 V00B0000 arc: B2 S1_V02N0301 arc: B3 E1_H01W0100 arc: B4 H00R0000 arc: B5 W1_H02E0301 arc: B6 S1_V02N0501 arc: B7 H02E0101 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: N1_V01N0001 F3 arc: N1_V02N0001 F0 arc: N1_V02N0401 F4 arc: N1_V02N0501 F5 arc: N3_V06N0103 F2 arc: N3_V06N0303 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C56:PLC2 arc: E1_H02E0401 V01N0001 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 N1_V02S0301 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 N1_V02S0201 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 H01E0001 arc: E1_H01E0101 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: A0 V02S0501 arc: A1 H02W0501 arc: A2 H00L0100 arc: A3 V00B0000 arc: A4 E1_H02W0501 arc: A5 S1_V02N0101 arc: A6 E1_H02W0701 arc: A7 E1_H01W0000 arc: B0 S1_V02N0301 arc: B1 H02W0301 arc: B2 V02S0301 arc: B3 V02N0301 arc: B4 S1_V02N0701 arc: B5 S1_V02N0501 arc: B6 E1_H02W0101 arc: B7 V00T0000 arc: E1_H01E0001 F0 arc: E1_H02E0001 F2 arc: E1_H02E0601 F6 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: N1_V01N0001 F5 arc: N3_V06N0103 F1 arc: V01S0000 F4 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C57:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0601 W1_H02E0301 arc: H00L0100 E1_H02W0101 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V02N0701 arc: N1_V02N0601 W3_H06E0303 arc: A0 F5 arc: A1 E1_H01E0001 arc: B0 E1_H02W0301 arc: B1 H02W0301 arc: C4 V00T0100 arc: C5 V00T0100 arc: C6 V00T0100 arc: C7 H02E0401 arc: D4 V00B0000 arc: D5 E1_H02W0201 arc: D6 H00L0100 arc: D7 H00R0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: N1_V01N0001 F0 arc: V01S0000 F1 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C58:PLC2 arc: E1_H02E0001 V02N0001 arc: H00L0000 V02N0201 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0601 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 H01E0101 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: A3 V01N0101 arc: A5 S1_V02N0101 arc: A6 S1_V02N0101 arc: A7 V02N0101 arc: B3 H00R0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V01S0000 arc: C3 H00L0000 arc: C5 V00T0100 arc: C6 N1_V02S0001 arc: C7 W1_H02E0601 arc: CLK0 G_HPBX0000 arc: D3 H02E0001 arc: D5 H02W0001 arc: D6 H01W0000 arc: D7 H00L0100 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 F7 arc: H01W0100 Q6 arc: MUXCLK3 CLK0 arc: V01S0000 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1110111001100000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000110000001010 word: SLICED.K0.INIT 1000000011111111 word: SLICED.K1.INIT 0000000000010011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R14C59:PLC2 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: E1_H01E0101 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 .tile R14C5:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0303 H06W0303 arc: V00B0100 W1_H02E0501 arc: V00T0100 H02W0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 H01E0001 arc: A7 H00R0000 arc: B7 W1_H02E0301 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D7 V02N0401 arc: E1_H01E0101 F7 arc: E3_H06E0103 Q2 arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q2 arc: V00B0000 Q4 arc: V01S0100 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R14C60:PLC2 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0301 H01E0101 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0101 S1_V02N0101 arc: S1_V02S0101 W3_H06E0103 .tile R14C62:PLC2 arc: S1_V02S0001 N3_V06S0003 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 .tile R14C64:PLC2 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V01S0100 N3_V06S0303 .tile R14C69:PLC2 arc: E1_H02E0301 N1_V01S0100 .tile R14C6:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E3_H06W0103 arc: H00L0100 V02N0301 arc: H00R0100 E1_H02W0501 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 E1_H02W0601 arc: A1 V02N0501 arc: A3 V00T0000 arc: A5 V02S0101 arc: A6 N1_V01N0101 arc: A7 F5 arc: B1 H00R0100 arc: B3 H02E0101 arc: B5 V00B0100 arc: B6 V02S0701 arc: B7 H01E0101 arc: C1 E1_H02W0601 arc: C3 H00L0100 arc: C5 V02S0001 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D3 H02E0201 arc: D5 V02S0601 arc: D6 V02N0601 arc: D7 V00B0000 arc: E1_H02E0301 F3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: N3_V06N0303 F6 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000010000100001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1001000000001001 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R14C70:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: S3_V06S0303 N3_V06S0303 .tile R14C7:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 V02N0001 arc: H00L0100 H02E0101 arc: H01W0100 E3_H06W0303 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 W1_H02E0701 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0103 E1_H01W0100 arc: A0 H00L0100 arc: A1 H02W0701 arc: A2 V02S0501 arc: A5 V00T0100 arc: A6 V00T0100 arc: A7 H02W0701 arc: B0 E1_H02W0101 arc: B1 H02E0101 arc: B2 H02E0301 arc: B3 H01W0100 arc: B4 V02N0701 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 E1_H02W0301 arc: C0 H00L0000 arc: C1 V02N0601 arc: C2 F4 arc: C3 W1_H02E0601 arc: C4 S1_V02N0201 arc: C5 W1_H02E0401 arc: C6 E1_H01E0101 arc: C7 E1_H02W0401 arc: D0 E1_H02W0001 arc: D1 V02N0001 arc: D2 H02E0001 arc: D3 V02N0201 arc: D4 V02S0401 arc: D5 V02N0401 arc: D6 N1_V02S0401 arc: D7 E1_H02W0001 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: N1_V01N0001 F5 arc: N1_V01N0101 F0 arc: S1_V02S0401 F6 arc: V01S0000 F1 arc: V01S0100 F2 word: SLICEA.K0.INIT 1010111100100011 word: SLICEA.K1.INIT 1010111100100011 word: SLICED.K0.INIT 1101000000000000 word: SLICED.K1.INIT 1101000011011101 word: SLICEC.K0.INIT 1100001100000000 word: SLICEC.K1.INIT 1000110000100011 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 1100001100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R14C8:PLC2 arc: N1_V02N0101 H06W0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0701 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 H02E0301 arc: B6 V00B0000 arc: B7 V00B0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q2 arc: E3_H06E0303 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q3 arc: H01W0100 Q5 arc: LSR0 V00T0100 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0501 Q7 arc: S1_V02S0601 Q6 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V01S0000 Q7 arc: V01S0100 Q3 arc: W1_H02W0201 Q2 arc: W1_H02W0401 Q6 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C9:PLC2 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: V00T0100 V02N0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V01S0000 arc: B6 V00B0000 arc: B7 V00B0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 Q3 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q1 arc: N1_V02N0501 Q7 arc: N1_V02N0601 Q6 arc: S1_V02S0101 Q1 arc: S1_V02S0401 Q6 arc: S3_V06S0103 Q1 arc: S3_V06S0203 Q7 arc: S3_V06S0303 Q6 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V01S0000 Q5 arc: V01S0100 Q4 arc: W1_H02W0201 Q2 arc: W1_H02W0501 Q5 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C10:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V06S0203 arc: E3_H06E0203 V06N0203 arc: H00L0000 V02S0201 arc: H00L0100 H02E0101 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H02E0601 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 E1_H02W0601 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V06N0203 arc: A0 H00L0000 arc: A1 H00L0100 arc: A2 V02N0501 arc: A3 H01E0001 arc: A4 V00T0000 arc: A5 V00T0100 arc: A6 V02N0301 arc: A7 V02N0101 arc: B0 H00R0100 arc: B1 V02S0101 arc: B2 N1_V02S0101 arc: B3 V02S0301 arc: B4 H00R0000 arc: B5 V02S0701 arc: B6 V00B0000 arc: B7 V02S0501 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C11:PLC2 arc: H00R0000 V02S0601 arc: N1_V02N0501 H02E0501 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V02S0601 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02E0701 arc: A1 V02N0701 arc: A2 V01N0101 arc: A3 V02N0501 arc: A4 S1_V02N0101 arc: A5 W1_H02E0701 arc: A6 H02W0701 arc: A7 V02N0101 arc: B0 V00B0000 arc: B1 N1_V02S0301 arc: B2 E1_H02W0101 arc: B3 V02S0101 arc: B4 H00R0000 arc: B5 V02S0501 arc: B6 V00T0000 arc: B7 V02S0701 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C12:PLC2 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0601 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 N1_V02S0001 arc: V00T0000 W1_H02E0001 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0203 N1_V01S0000 arc: A0 H00L0100 arc: A1 V02N0701 arc: A2 V02N0501 arc: A3 S1_V02N0501 arc: A4 V02S0101 arc: A5 V00T0000 arc: A6 N1_V02S0101 arc: A7 S1_V02N0101 arc: B0 E1_H02W0301 arc: B1 H02W0301 arc: B2 H00L0000 arc: B3 V02S0301 arc: B4 H00R0000 arc: B5 V02S0701 arc: B6 V00B0000 arc: B7 V02S0501 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C13:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0601 V02N0601 arc: H00R0000 E1_H02W0401 arc: H01W0100 E3_H06W0303 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 V02S0601 arc: W3_H06W0203 N1_V01S0000 arc: A0 H02W0701 arc: A1 V02N0701 arc: A2 V01N0101 arc: A3 V02N0501 arc: A4 E1_H02W0701 arc: A5 S1_V02N0101 arc: A6 S1_V02N0301 arc: A7 H02W0501 arc: B0 V00B0000 arc: B1 V02S0101 arc: B2 H00R0000 arc: B3 V02N0101 arc: B4 H02W0101 arc: B5 V02S0501 arc: B6 E1_H02W0301 arc: B7 V02S0701 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C14:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0401 N1_V01S0000 arc: H00L0000 V02N0201 arc: H00R0000 H02E0601 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0301 E1_H02W0301 arc: N3_V06N0103 S3_V06N0103 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00T0100 H02W0101 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 E1_H02W0601 arc: E1_H02E0601 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 W1_H02E0701 arc: A1 H00R0000 arc: A5 E1_H02W0701 arc: B0 V00B0000 arc: B1 V02S0301 arc: B5 H00L0000 arc: C5 V02N0001 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D5 H02W0201 arc: F2 F2_SLICE arc: F5 F5_SLICE arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: V01S0000 Q6 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C15:PLC2 arc: E3_H06E0003 S3_V06N0003 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0301 E1_H01W0100 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0303 V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: A3 E1_H01E0001 arc: A4 V02N0301 arc: B3 V01N0001 arc: B4 V00B0100 arc: B5 V01S0000 arc: C3 H00R0100 arc: C4 V00T0100 arc: C5 E1_H02W0601 arc: CE0 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 S1_V02N0201 arc: D4 S1_V02N0601 arc: D5 V00B0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: E1_H02E0601 F4 arc: E3_H06E0303 F5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N3_V06N0303 F5 arc: V01S0000 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0000110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R15C16:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 H02W0201 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 H02W0501 arc: V00T0100 V02N0501 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 H01E0101 arc: E3_H06E0303 W3_H06E0203 arc: B1 E1_H01W0100 arc: B5 H00L0000 arc: B7 V00B0100 arc: C1 V02N0401 arc: C3 E1_H02W0401 arc: C5 E1_H02W0601 arc: C6 H02E0601 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 E1_H02W0201 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 E1_H02W0201 arc: D6 V00B0000 arc: D7 H01W0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: E1_H02E0101 F3 arc: E3_H06E0003 F0 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H00R0100 F7 arc: H01W0000 F6 arc: H01W0100 Q0 arc: LSR0 E1_H02W0501 arc: M0 V00T0100 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V02N0001 F0 arc: N1_V02N0601 Q4 arc: N3_V06N0003 Q0 arc: N3_V06N0203 Q4 arc: S3_V06S0003 F0 arc: V01S0000 F4 arc: V01S0100 F7 arc: W1_H02W0601 F4 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111100001111 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 1111001100110000 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 .tile R15C17:PLC2 arc: E1_H02E0501 V02N0501 arc: H00L0000 H02W0201 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H02W0201 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A1 V02S0701 arc: A2 H00L0100 arc: A3 H00L0100 arc: B1 Q1 arc: B2 V02N0101 arc: B3 V02N0101 arc: B5 H02E0301 arc: B6 V01S0000 arc: C0 H00L0100 arc: C1 H02E0601 arc: C2 H00L0000 arc: C3 H00L0000 arc: C5 V02S0001 arc: C6 V02N0001 arc: C7 V02N0201 arc: CE0 H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D5 H01W0000 arc: D6 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: E1_H02E0701 Q7 arc: E3_H06E0103 F2 arc: E3_H06E0203 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q0 arc: H01W0100 Q1 arc: LSR0 H02W0301 arc: LSR1 E1_H02W0301 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q5 arc: N1_V02N0201 F2 arc: V01S0000 Q7 arc: V01S0100 Q0 arc: W1_H02W0201 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011110011110000 word: SLICED.K0.INIT 0000000011000000 word: SLICED.K1.INIT 1111111111110000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0011001100110010 word: SLICEB.K0.INIT 0000000011111110 word: SLICEB.K1.INIT 0000000001111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R15C18:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0601 E3_H06W0303 arc: H00L0100 E1_H02W0301 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H02W0601 arc: E1_H02E0501 W3_H06E0303 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q2 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 E1_H02W0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0303 Q6 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R15C19:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: H00R0000 N1_V02S0601 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0201 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A5 V00B0000 arc: B5 V01S0000 arc: C4 Q4 arc: C5 H02E0601 arc: C6 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D4 V02N0401 arc: D5 H02W0201 arc: D6 V02N0401 arc: D7 H01W0000 arc: E1_H01E0101 Q4 arc: E3_H06E0203 F7 arc: E3_H06E0303 F5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F4 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0601 F6 arc: N3_V06N0203 F7 arc: V00B0000 Q4 arc: V01S0000 Q6 arc: V01S0100 Q2 arc: W1_H02W0401 Q4 arc: W1_H02W0601 Q6 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000000001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 0000000000001101 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R15C20:PLC2 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: H00R0000 V02S0601 arc: N1_V02N0101 N1_V01S0100 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 V01N0101 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: C1 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: F1 F1_SLICE arc: H01W0000 F1 arc: H01W0100 Q1 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R15C21:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0303 W1_H02E0501 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 S3_V06N0303 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0100 N1_V02S0701 arc: W1_H02W0201 E1_H02W0201 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0501 arc: A1 V02S0501 arc: A3 V02N0501 arc: A5 E1_H02W0701 arc: A7 H00L0000 arc: B0 V00T0000 arc: B1 V00T0000 arc: B3 V01N0001 arc: B5 V02N0701 arc: B6 S1_V02N0501 arc: B7 V01S0000 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 H02E0601 arc: C3 H02E0401 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 V01S0100 arc: D5 W1_H02E0201 arc: D6 H02W0201 arc: D7 V00B0000 arc: E1_H01E0101 F1 arc: E1_H02E0101 F3 arc: E1_H02E0201 Q0 arc: E1_H02E0501 F7 arc: E3_H06E0103 F2 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0000 F4 arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q6 arc: S1_V02S0201 Q0 arc: S1_V02S0401 F4 arc: S1_V02S0601 Q6 arc: S3_V06S0203 F7 arc: V00T0000 Q0 arc: V01S0000 Q6 arc: V01S0100 F1 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1010001011110011 word: SLICED.K0.INIT 1100110011111100 word: SLICED.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 0000000011001001 word: SLICEA.K1.INIT 1100100100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010111000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R15C22:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 H02E0201 arc: H00L0100 H02W0101 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H01E0001 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H06W0103 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0501 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E3_H06W0303 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A2 W1_H02E0501 arc: A3 V00T0000 arc: A5 N1_V01N0101 arc: A7 H00L0000 arc: B1 E1_H01W0100 arc: B2 H02E0301 arc: B3 H01W0100 arc: B5 H02E0101 arc: B7 H02E0301 arc: C1 H00L0100 arc: C2 H00R0100 arc: C3 V02N0401 arc: C4 V00B0100 arc: C5 V00T0100 arc: C7 V02N0201 arc: D1 V02S0001 arc: D2 V02N0001 arc: D3 H00R0000 arc: D4 H01W0000 arc: D5 V00B0000 arc: D7 E1_H02W0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F6 arc: E1_H02E0301 F1 arc: E1_H02E0401 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: H01W0100 F2 arc: M6 H02W0401 arc: N1_V01N0101 F3 arc: V01S0100 F4 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 0000000001000000 word: SLICEB.K1.INIT 0010001100000011 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 1000100000001000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000010000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R15C23:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 V06S0103 arc: H00L0100 V02N0101 arc: H00R0000 H02W0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 N3_V06S0303 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 S1_V02N0701 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0100 arc: A1 V02N0501 arc: A2 V00B0000 arc: A4 V02N0101 arc: A5 V00B0000 arc: A6 F7 arc: B0 F3 arc: B1 V00T0000 arc: B2 H00L0000 arc: B3 V02N0301 arc: B4 F3 arc: B5 V01S0000 arc: B6 F3 arc: B7 V00B0000 arc: C0 H00R0100 arc: C1 N1_V01N0001 arc: C2 H02E0601 arc: C3 N1_V01N0001 arc: C4 V00B0100 arc: C5 H02E0601 arc: C6 S1_V02N0001 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 S1_V02N0201 arc: D2 V00T0100 arc: D3 V02N0201 arc: D4 V02N0601 arc: D5 V02N0401 arc: D6 H02E0201 arc: D7 H01W0000 arc: E1_H01E0001 F5 arc: E1_H01E0101 F1 arc: E1_H02E0301 F1 arc: E1_H02E0501 F7 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0100 F5 arc: H01W0000 Q2 arc: H01W0100 F7 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N1_V02N0701 F7 arc: S1_V02S0701 F5 arc: V00B0000 Q4 arc: V00B0100 F5 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W1_H02W0101 F3 arc: W3_H06W0103 F1 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0001000000000000 word: SLICED.K1.INIT 0000001100000000 word: SLICEB.K0.INIT 0000000011100001 word: SLICEB.K1.INIT 0000001100110000 word: SLICEA.K0.INIT 1111110011011100 word: SLICEA.K1.INIT 0100000000000000 word: SLICEC.K0.INIT 1101110011111100 word: SLICEC.K1.INIT 1110000100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R15C24:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H01E0001 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: W1_H02W0201 V02N0201 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 H00R0000 arc: A5 V00T0000 arc: A6 F7 arc: B1 H02E0101 arc: B2 V02N0101 arc: B3 Q3 arc: B5 S1_V02N0701 arc: B6 S1_V02N0501 arc: C1 E1_H02W0601 arc: C2 H00R0100 arc: C3 N1_V01S0100 arc: C5 V01N0101 arc: C6 F4 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 E1_H02W0201 arc: D3 N1_V01S0000 arc: D5 V02N0601 arc: D6 E1_H02W0201 arc: D7 H02E0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F7 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M4 H02E0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V02N0001 F2 arc: V01S0100 Q3 arc: W1_H02W0401 F6 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 1110000011000000 word: SLICED.K1.INIT 0000000000001111 word: SLICEB.K0.INIT 1111001100110011 word: SLICEB.K1.INIT 1100111111001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1110110011001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1011101100001011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R15C25:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 H01E0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 E3_H06W0203 arc: H01W0100 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: B0 V00B0000 arc: B1 V00B0000 arc: B5 H01E0101 arc: C0 H00R0100 arc: C1 H00L0100 arc: C4 V00T0100 arc: C5 F4 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D4 V02S0601 arc: D5 E1_H01W0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q6 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F4 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F1 arc: N1_V02N0301 F1 arc: N3_V06N0103 F1 arc: N3_V06N0303 F5 arc: S1_V02S0301 F1 arc: V01S0000 F1 arc: V01S0100 Q6 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 1111001100000000 word: SLICEA.K0.INIT 1111111100110000 word: SLICEA.K1.INIT 1111111100110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R15C26:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 V01N0001 arc: H00L0100 W1_H02E0101 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02E0601 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02E0701 arc: V00B0100 W1_H02E0501 arc: V00T0100 V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H01W0000 arc: A1 E1_H02W0501 arc: B1 H00R0100 arc: B3 H02E0301 arc: B5 V02N0701 arc: B7 V02N0701 arc: C1 H00L0100 arc: C2 E1_H02W0601 arc: C3 V02N0601 arc: C5 H02W0601 arc: C7 N1_V02S0001 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 N1_V01S0000 arc: D3 V00B0100 arc: D5 H02E0001 arc: D7 V02S0601 arc: E1_H01E0001 F1 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: M2 H02E0601 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111001111000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010111110101100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R15C27:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 W1_H02E0201 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H02E0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 W1_H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 E1_H02W0301 arc: H01W0000 W3_H06E0103 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: A2 V00T0000 arc: A4 H02W0501 arc: A6 V00T0100 arc: B2 H02E0301 arc: B4 S1_V02N0701 arc: B6 V02S0701 arc: C2 V02N0601 arc: C4 V02N0201 arc: C5 S1_V02N0001 arc: C6 H02E0401 arc: D2 H02E0001 arc: D4 V01N0001 arc: D5 H02E0201 arc: D6 V00B0000 arc: E1_H01E0101 F4 arc: E1_H02E0401 F4 arc: E1_H02E0501 F5 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M1 E1_H02W0001 arc: M2 E1_H02W0601 arc: M6 V00B0100 arc: N1_V02N0101 F1 arc: N3_V06N0103 F1 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 1010111110101100 word: SLICEC.K1.INIT 1111000000000000 word: SLICED.K0.INIT 1000100011111000 word: SLICED.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000110111 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C28:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N3_V06S0103 arc: H00L0100 H02E0301 arc: H00R0100 H02E0501 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06W0303 arc: V00T0000 H02E0201 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H01W0000 arc: S1_V02S0101 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: B1 S1_V02N0301 arc: C0 V02N0601 arc: C1 V02N0601 arc: C3 H02E0401 arc: C5 H02E0401 arc: C7 H02E0401 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 V02N0401 arc: D7 V02N0401 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: W1_H02W0101 F3 arc: W3_H06W0003 F3 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0000000011110000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1111111111110000 word: SLICEA.K1.INIT 1111111111000011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R15C29:PLC2 arc: E1_H02E0701 E3_H06W0203 arc: N1_V02N0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 W1_H02E0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: H01W0000 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: F3 F3_SLICE arc: H01W0100 Q3 arc: LSR1 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00T0100 Q3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R15C2:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0501 V06S0303 arc: E3_H06E0103 V06S0103 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0501 E1_H02W0501 arc: V00B0000 V02N0001 arc: V00B0100 H02E0701 arc: V00T0000 V02N0601 arc: A5 N1_V01N0101 arc: B5 H00R0000 arc: C5 V00T0000 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D5 V01N0001 arc: E3_H06E0303 Q6 arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 H02E0601 arc: M2 V00B0100 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: S1_V02S0501 F5 arc: S3_V06S0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R15C30:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: N1_V01N0001 N3_V06S0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E1_H01W0100 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0701 arc: V01S0000 S3_V06N0103 arc: H01W0100 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: B7 V00B0100 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D7 V02N0601 arc: F7 F7_SLICE arc: LSR1 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: V00B0100 Q7 arc: W3_H06W0203 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R15C31:PLC2 arc: E1_H02E0701 V06S0203 arc: H00R0000 E1_H02W0401 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 E3_H06W0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06E0203 arc: V00B0100 W1_H02E0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0301 V06S0003 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R15C32:PLC2 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02N0001 arc: H00R0000 V02N0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02W0401 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0201 E1_H01W0000 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 H02W0501 arc: C3 H00L0000 arc: C7 V02N0001 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D7 H00R0100 arc: E1_H01E0001 Q3 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R15C33:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 V02N0301 arc: H00L0000 V02N0201 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S3_V06N0003 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 H02E0401 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A5 W1_H02E0701 arc: A6 N1_V01N0101 arc: A7 V02S0301 arc: B2 H00R0000 arc: B3 H01W0100 arc: B5 S1_V02N0501 arc: B6 V02S0501 arc: B7 H02W0101 arc: C0 E1_H01W0000 arc: C1 N1_V02S0401 arc: C2 H00R0100 arc: C3 H00L0000 arc: C5 V00T0000 arc: C6 H02E0601 arc: C7 V00B0100 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 F0 arc: D2 V00T0100 arc: D3 V02S0001 arc: D5 V02N0601 arc: D6 V00B0000 arc: D7 S1_V02N0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: E3_H06E0203 F7 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0001 Q2 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q6 arc: N3_V06N0203 F7 arc: S1_V02S0001 F0 arc: S1_V02S0501 F7 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: V01S0100 F3 arc: W1_H02W0001 F0 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000001000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000000011000000 word: SLICEB.K1.INIT 0000001100110011 word: SLICED.K0.INIT 0110101010101010 word: SLICED.K1.INIT 0000001000100010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R15C34:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 E1_H02W0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 W1_H02E0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 V02S0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: B2 H02W0101 arc: B7 E1_H02W0101 arc: C1 N1_V01N0001 arc: C2 H02W0601 arc: C3 H00L0000 arc: C6 E1_H01E0101 arc: C7 F6 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0001 arc: D2 V00B0100 arc: D3 H00R0000 arc: D6 N1_V02S0401 arc: D7 H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F1 arc: E1_H02E0501 F7 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F1 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F3 arc: S1_V02S0101 F1 arc: S3_V06S0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 0000000000001100 word: SLICEB.K0.INIT 0011000000000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R15C35:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0201 H01E0001 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 N3_V06S0203 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0203 E1_H02W0401 arc: A2 S1_V02N0701 arc: A4 V00B0000 arc: A6 V00T0100 arc: A7 E1_H01W0000 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H02E0101 arc: B3 H00R0100 arc: B4 V02S0701 arc: B5 N1_V02S0701 arc: B6 V00T0000 arc: B7 V02N0501 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0000 arc: C3 H00L0100 arc: C4 H02E0601 arc: C5 N1_V02S0001 arc: C6 E1_H01E0101 arc: C7 H02W0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V02S0601 arc: D5 H02E0001 arc: D6 H02W0001 arc: D7 N1_V02S0601 arc: E1_H01E0001 F7 arc: E1_H01E0101 F1 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F5 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N3_V06N0303 F5 arc: S1_V02S0401 Q4 arc: V00B0000 Q4 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 1111111100101010 word: SLICEC.K1.INIT 1100000011111111 word: SLICED.K0.INIT 0000110001011101 word: SLICED.K1.INIT 0000011101110111 word: SLICEA.K0.INIT 1100111111001100 word: SLICEA.K1.INIT 0011001100111111 word: SLICEB.K0.INIT 1110101011000000 word: SLICEB.K1.INIT 1111111111110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R15C36:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 V06S0003 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0201 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: A1 H00L0000 arc: B1 S1_V02N0101 arc: B7 V00B0000 arc: C1 S1_V02N0401 arc: C5 S1_V02N0001 arc: C7 V01N0101 arc: CE1 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D5 H00R0100 arc: D7 H00L0100 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q2 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0701 F5 arc: V00B0100 Q7 arc: V01S0000 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R15C37:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 W1_H02E0301 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 S1_V02N0001 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 H06E0303 arc: V00B0100 W1_H02E0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 E3_H06W0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 V06S0303 arc: W3_H06W0203 E3_H06W0103 arc: A1 H00L0100 arc: A4 H02W0501 arc: A5 E1_H02W0501 arc: B1 H00R0100 arc: B4 E1_H02W0301 arc: B5 V00B0100 arc: C1 V02N0401 arc: C3 H02W0401 arc: C4 S1_V02N0201 arc: C5 E1_H01E0101 arc: CE1 E1_H02W0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 V02S0401 arc: E1_H01E0001 F5 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q3 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0203 F4 arc: V01S0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0011111100010101 word: SLICEC.K1.INIT 0111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R15C38:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 H06E0103 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0103 N3_V06S0003 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: N1_V02N0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0103 E3_H06W0103 arc: A1 E1_H01E0001 arc: A5 V02N0301 arc: B0 V00T0000 arc: B1 V02S0301 arc: B4 V00B0100 arc: B5 H02E0301 arc: C0 E1_H02W0401 arc: C1 V02S0601 arc: C4 E1_H01E0101 arc: C5 V02N0201 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H00R0000 arc: D4 H00L0100 arc: D5 V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q2 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q5 arc: M2 V00T0100 arc: M6 W1_H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N3_V06N0303 Q5 arc: S3_V06S0003 F0 arc: S3_V06S0303 F5 arc: V00B0100 Q5 arc: V01S0000 Q5 arc: V01S0100 Q6 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1000001011000011 word: SLICEC.K0.INIT 1100001100000000 word: SLICEC.K1.INIT 1101110011111100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R15C39:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 H01E0001 arc: H00R0000 H02E0401 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0501 V01N0101 arc: V00B0100 V02N0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A1 W1_H02E0701 arc: A3 H02E0501 arc: A5 W1_H02E0701 arc: A6 V00T0100 arc: B1 S1_V02N0101 arc: B2 H01W0100 arc: B3 V02N0101 arc: B5 H00R0000 arc: B6 V02S0701 arc: C1 S1_V02N0601 arc: C2 V02S0601 arc: C3 V02S0401 arc: C5 V02N0001 arc: C6 V00T0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 S1_V02N0001 arc: D3 V02S0201 arc: D5 V02N0601 arc: D6 H00R0100 arc: E1_H01E0001 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0100 F5 arc: H01W0100 Q3 arc: LSR1 H02E0301 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F1 arc: N3_V06N0003 Q3 arc: S1_V02S0001 F2 arc: W3_H06W0003 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010111110001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001000000000000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 0010101011111111 word: SLICED.K0.INIT 0101111101001100 word: SLICED.K1.INIT 1111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R15C3:PLC2 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02S0701 arc: H00R0000 V02N0601 arc: H00R0100 H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0501 H02W0501 arc: S1_V02S0201 V01N0001 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0501 E3_H06W0303 arc: A7 V02N0101 arc: B7 V02S0701 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D7 H01W0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q0 arc: E1_H02E0501 F7 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: F7 F7_SLICE arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 H02W0601 arc: M2 V00T0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000110010101111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R15C40:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 S3_V06N0103 arc: H00R0000 H02E0401 arc: H00R0100 H02E0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 H06W0103 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: W1_H02W0401 V06S0203 arc: N1_V02N0701 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: W3_H06W0203 V06S0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: A0 H00R0000 arc: A1 H00R0000 arc: A6 H00R0000 arc: A7 H00R0000 arc: B0 V02N0101 arc: B1 V02N0101 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 H02W0401 arc: C1 H02W0401 arc: C6 H02W0401 arc: C7 H02W0401 arc: D0 H02E0201 arc: D1 H02E0201 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 W1_H02E0001 arc: M6 V00T0000 word: SLICEA.K0.INIT 0000001000000001 word: SLICEA.K1.INIT 0010000000010000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000001000000001 word: SLICED.K1.INIT 0010000000010000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R15C41:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 V02N0001 arc: H00L0100 S1_V02N0101 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 V01N0001 arc: S1_V02S0501 H02W0501 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0303 H06E0303 arc: V00B0000 S1_V02N0001 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 V06N0303 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: A1 W1_H02E0701 arc: A2 W1_H02E0701 arc: A5 V00T0000 arc: B1 H02E0301 arc: B2 H02E0301 arc: B5 V02N0701 arc: B7 H02W0101 arc: C1 H00R0100 arc: C2 H00R0100 arc: C5 H02E0401 arc: C7 H02W0401 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 V00T0100 arc: D5 V02N0401 arc: D7 H02E0001 arc: E1_H01E0101 F1 arc: E3_H06E0203 Q7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0000 arc: MUXCLK3 CLK0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000101000001000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001000000001 word: SLICEB.K0.INIT 0000001000000001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R15C42:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 S3_V06N0203 arc: H00L0000 H02W0001 arc: H00L0100 V02S0101 arc: H00R0100 W1_H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 V01N0101 arc: E1_H02E0301 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A1 E1_H02W0501 arc: A2 E1_H02W0501 arc: A5 H02W0501 arc: B1 V00T0000 arc: B2 H00L0000 arc: B4 H02E0301 arc: B5 H02W0101 arc: B7 H02W0301 arc: C1 N1_V01N0001 arc: C2 N1_V01N0001 arc: C4 V02S0001 arc: C5 H02W0401 arc: C7 H02W0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 V00T0100 arc: D4 V02N0401 arc: D5 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: M0 H02E0601 arc: M1 H00L0100 arc: M2 H02E0601 arc: MUXCLK3 CLK0 arc: S3_V06S0203 Q7 arc: V00B0000 F4 arc: V01S0100 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 0000000100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001001010001 word: SLICEB.K0.INIT 1010001001010001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R15C43:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 V06S0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 V06S0303 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0101 arc: H00R0100 H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02N0001 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H01W0100 arc: N1_V02N0101 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A3 V00B0000 arc: B3 H00R0100 arc: B4 E1_H02W0101 arc: B6 E1_H02W0101 arc: C3 V02S0401 arc: C4 H02W0601 arc: C6 V01N0101 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 V02S0601 arc: D5 H00L0100 arc: D6 N1_V02S0601 arc: D7 V01N0001 arc: E1_H01E0001 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: H01W0100 F1 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: M4 W1_H02E0401 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: S1_V02S0301 Q1 arc: S3_V06S0303 F6 arc: V01S0000 Q1 arc: W1_H02W0601 F4 word: SLICEC.K0.INIT 1100111100000011 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0010111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R15C44:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 S1_V02N0101 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 E1_H02W0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0201 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: A3 V00B0000 arc: B3 V02S0301 arc: B6 V02N0701 arc: C3 H00R0100 arc: C6 V00T0000 arc: CE0 V02N0201 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 E1_H02W0201 arc: D6 V02N0601 arc: D7 N1_V02S0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q4 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00B0100 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: S1_V02S0101 Q1 arc: S3_V06S0203 Q4 arc: V01S0000 Q1 arc: W1_H02W0301 F1 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R15C45:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0103 H01E0101 arc: H00L0000 H02E0201 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 S3_V06N0203 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0501 arc: V00T0100 H02E0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 S3_V06N0203 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H02W0701 arc: B1 E1_H02W0101 arc: C1 W1_H02E0401 arc: CE0 V02S0201 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q1 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1011000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R15C46:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 V01N0001 arc: H00L0000 H02E0201 arc: H00L0100 H02W0301 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 V01N0101 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 V02S0701 arc: E1_H02E0101 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A6 H02E0701 arc: B1 V00B0000 arc: B6 V00B0100 arc: B7 H02E0301 arc: C1 W1_H02E0601 arc: C6 V00T0100 arc: C7 V00T0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F1 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q2 arc: M2 H02E0601 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: N1_V02N0001 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000000000 word: SLICED.K0.INIT 1111111011110000 word: SLICED.K1.INIT 1111110011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R15C47:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 W1_H02E0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0401 H02E0401 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 H01E0101 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A1 V01N0101 arc: A2 N1_V02S0501 arc: A3 V00T0000 arc: B1 H02W0101 arc: B2 H02W0101 arc: B3 H01W0100 arc: B7 V01S0000 arc: C1 F4 arc: C2 F4 arc: C3 N1_V01N0001 arc: C4 V00T0100 arc: C5 F4 arc: C6 W1_H02E0401 arc: C7 V00B0100 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D2 H00R0000 arc: D3 H02E0201 arc: D4 H00L0100 arc: D5 E1_H01W0100 arc: D6 H00R0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F7 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q5 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q4 arc: N3_V06N0203 Q7 arc: V01S0000 F6 arc: V01S0100 Q7 arc: W1_H02W0101 F3 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001110 word: SLICED.K0.INIT 1111111111110000 word: SLICED.K1.INIT 0000000011001111 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000000000001111 word: SLICEB.K0.INIT 0000000000001110 word: SLICEB.K1.INIT 0000000000001011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R15C48:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 E1_H02W0001 arc: H00R0100 S1_V02N0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02W0401 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0601 arc: V01S0000 S3_V06N0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A2 S1_V02N0501 arc: B2 F3 arc: B3 H00L0000 arc: C2 H02E0401 arc: C3 V02N0601 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 W1_H02E0001 arc: D3 S1_V02N0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F3 arc: E1_H02E0401 Q4 arc: E3_H06E0003 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q6 arc: M0 V00B0000 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0301 F3 arc: N1_V02N0401 Q4 arc: W1_H02W0201 F2 arc: W1_H02W0301 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0101111100010011 word: SLICEB.K1.INIT 0000000000001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R15C49:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 H01E0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S3_V06N0203 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: W3_H06W0303 V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: B2 H00R0100 arc: B3 H01W0100 arc: C2 N1_V02S0401 arc: C3 H02W0401 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 H02W0201 arc: E1_H01E0001 F3 arc: E1_H02E0001 Q0 arc: E3_H06E0303 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: M0 V00B0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R15C4:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0303 H01E0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0501 W1_H02E0501 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 H01E0001 arc: A4 H02E0701 arc: B4 V02S0701 arc: B5 V00B0100 arc: C4 H02W0601 arc: C5 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H01W0000 arc: D5 H00R0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q0 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M2 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1101000000000000 word: SLICEC.K1.INIT 1100001100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R15C50:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 W1_H02E0401 arc: H00R0100 W1_H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0103 W3_H06E0003 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: H01W0000 Q2 arc: LSR1 V00B0000 arc: M2 H02W0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: W1_H02W0001 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R15C51:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: H00L0000 W1_H02E0201 arc: H00R0000 E1_H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 V01N0001 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0101 arc: V00T0100 V02S0501 arc: W1_H02W0601 V02N0601 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0101 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: B2 V02S0301 arc: B3 H01W0100 arc: B5 H00L0000 arc: C2 N1_V02S0401 arc: C3 H02W0601 arc: C5 V00T0100 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 H00R0000 arc: D5 S1_V02N0401 arc: E1_H01E0101 Q6 arc: E3_H06E0103 Q2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0100 Q2 arc: M0 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F5 arc: N3_V06N0103 Q2 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R15C52:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02W0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0601 arc: V00T0000 H02E0001 arc: V00T0100 E1_H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 S3_V06N0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A1 H00L0100 arc: A2 H00L0100 arc: A5 V00T0100 arc: A6 E1_H01W0000 arc: B0 H01W0100 arc: B1 S1_V02N0101 arc: B2 E1_H02W0101 arc: B4 V00B0100 arc: B5 V02N0701 arc: B6 V00T0000 arc: B7 H02E0301 arc: C0 V02S0601 arc: C1 H00L0000 arc: C2 S1_V02N0401 arc: C4 W1_H02E0601 arc: C5 V02N0201 arc: C6 V02N0001 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H00R0000 arc: D2 W1_H02E0201 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 V02N0601 arc: D7 H02W0001 arc: E1_H01E0101 F6 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q1 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F7 arc: N1_V02N0701 F7 arc: V00B0100 Q5 arc: V01S0000 F7 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111111111111000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 0011101110111011 word: SLICED.K0.INIT 1110111001100000 word: SLICED.K1.INIT 0000000011000000 word: SLICEB.K0.INIT 1010000011101100 word: SLICEB.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R15C53:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 S3_V06N0303 arc: E3_H06E0203 H01E0001 arc: H00L0000 W1_H02E0001 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V02S0601 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A0 H00R0000 arc: A4 V00B0000 arc: A5 W1_H02E0701 arc: B0 V00T0000 arc: B4 H00L0000 arc: B5 H01E0101 arc: C0 H02W0401 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 V02N0201 arc: C5 V02S0001 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02N0001 arc: D2 V00B0100 arc: D3 W1_H02E0001 arc: D4 H00R0100 arc: D5 F0 arc: E1_H01E0001 F1 arc: E1_H01E0101 F2 arc: E1_H02E0601 Q6 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q6 arc: H00R0100 F5 arc: H01W0000 Q6 arc: M6 W1_H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F3 arc: V00B0000 Q6 arc: V01S0100 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1000000011111111 word: SLICEC.K1.INIT 0000000000010011 word: SLICEA.K0.INIT 0000110000001010 word: SLICEA.K1.INIT 0000000000001111 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R15C54:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 V02S0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 H01E0001 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V06S0203 arc: E1_H02E0001 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: A1 H02W0701 arc: A3 V00B0000 arc: B0 H01W0100 arc: B1 H02W0301 arc: B2 H00L0000 arc: B3 H00R0100 arc: C0 H02E0401 arc: C1 V02N0401 arc: C2 H02W0601 arc: C3 H00L0100 arc: C4 H02W0401 arc: C5 H02W0401 arc: C6 H02W0401 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V02N0201 arc: D2 H00R0000 arc: D3 H02W0001 arc: D4 W1_H02E0201 arc: D5 H02E0201 arc: D6 E1_H01W0100 arc: D7 V02N0601 arc: E1_H01E0001 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q1 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F6 arc: V01S0000 Q1 arc: V01S0100 F7 arc: W1_H02W0001 F0 arc: W1_H02W0501 F5 arc: W3_H06W0003 Q3 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111111111111000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111111111111000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R15C55:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: B5 H00R0000 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C5 S1_V02N0201 arc: C6 H02W0401 arc: C7 H02W0401 arc: D0 E1_H02W0001 arc: D1 H02W0001 arc: D2 H02E0001 arc: D3 V00B0100 arc: D5 H00R0100 arc: D6 V00B0000 arc: D7 H02E0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F5 arc: N1_V01N0101 F6 arc: N1_V02N0001 F2 arc: N1_V02N0101 F1 arc: N1_V02N0301 F3 arc: N1_V02N0701 F7 arc: S1_V02S0501 F5 arc: V01S0100 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011110000000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R15C56:PLC2 arc: E1_H02E0601 N1_V01S0000 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02W0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0701 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H02W0401 arc: A0 E1_H01E0001 arc: A1 V01N0101 arc: A3 V01N0101 arc: B0 H02W0101 arc: B1 W1_H02E0301 arc: B3 S1_V02N0301 arc: C0 H02E0401 arc: C1 E1_H02W0601 arc: C3 H02E0601 arc: C4 E1_H01E0101 arc: C5 E1_H01E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 E1_H02W0001 arc: D3 H02E0201 arc: D4 H00R0100 arc: D5 V00B0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q6 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q6 arc: H01W0100 Q6 arc: M2 E1_H02W0601 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q0 arc: V00T0100 F1 arc: V01S0100 F4 arc: W1_H02W0401 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111010101 word: SLICEA.K1.INIT 0000110000001010 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0110110100110111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R15C57:PLC2 arc: H00L0000 V02N0201 arc: H00L0100 H02W0301 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0701 arc: V00T0000 S1_V02N0401 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0701 S1_V02N0701 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0501 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0303 E1_H01W0100 arc: A2 W1_H02E0501 arc: A3 W1_H02E0501 arc: A6 H02W0501 arc: B0 F1 arc: B1 H00R0100 arc: B2 H00R0000 arc: B3 H00R0000 arc: B6 V00B0100 arc: B7 W1_H02E0301 arc: C0 N1_V01S0100 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 H00L0100 arc: C6 H02W0601 arc: C7 V02N0201 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 E1_H02W0201 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D6 H01W0000 arc: D7 F2 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M2 V00T0000 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F7 arc: N1_V02N0101 F1 arc: N3_V06N0203 F7 arc: S1_V02S0701 F7 arc: V01S0000 F1 arc: V01S0100 F6 arc: W1_H02W0101 F1 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100000011111111 word: SLICEA.K1.INIT 0000001100000000 word: SLICED.K0.INIT 0000110000001010 word: SLICED.K1.INIT 0000001100110000 word: SLICEB.K0.INIT 0111000001111111 word: SLICEB.K1.INIT 0000100011111000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R15C58:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: H00L0000 E1_H02W0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 W1_H02E0501 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 V02N0401 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 N1_V02S0701 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q2 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q0 arc: V01S0000 Q2 arc: V01S0100 Q0 arc: W1_H02W0401 Q4 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R15C59:PLC2 arc: N1_V02N0201 H02E0201 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0601 N1_V02S0301 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 .tile R15C5:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 V02S0301 arc: N1_V02N0401 H02E0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00T0000 V02N0401 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 H01E0101 arc: A1 N1_V02S0501 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A4 F7 arc: A5 H02E0501 arc: A6 H02W0501 arc: A7 V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 V02S0101 arc: B4 V00B0100 arc: B5 H00L0000 arc: B6 E1_H02W0301 arc: B7 E1_H02W0301 arc: C1 V02S0601 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 H02E0601 arc: C5 S1_V02N0001 arc: C6 W1_H02E0601 arc: C7 V00T0000 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 V02S0001 arc: D4 V00B0000 arc: D5 F0 arc: D6 V02N0401 arc: D7 E1_H02W0201 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: M0 V00T0100 arc: V00B0100 F5 arc: V00T0100 F3 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 1111010100110001 word: SLICEB.K1.INIT 1010111100100011 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 1000010000000000 word: SLICED.K0.INIT 1111010100110001 word: SLICED.K1.INIT 1000101001000101 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000110010101111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R15C60:PLC2 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0501 S1_V02N0501 .tile R15C61:PLC2 arc: S3_V06S0303 H06E0303 .tile R15C62:PLC2 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 .tile R15C64:PLC2 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: S1_V02S0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 .tile R15C67:PLC2 arc: S3_V06S0003 H06E0003 .tile R15C69:PLC2 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 .tile R15C6:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 E1_H02W0401 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: A0 E1_H02W0501 arc: A2 H02W0701 arc: A3 V01N0101 arc: A4 S1_V02N0301 arc: A5 H02E0501 arc: A6 V02S0101 arc: A7 V00T0100 arc: B2 H00L0000 arc: B3 E1_H02W0101 arc: B4 H00R0000 arc: B5 V02S0501 arc: B6 V00T0000 arc: B7 V00B0000 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C70:PLC2 arc: S3_V06S0003 N3_V06S0003 arc: N1_V02N0501 W3_H06E0303 .tile R15C7:PLC2 arc: E1_H02E0501 V02N0501 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00T0000 V02N0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: A0 H02E0701 arc: A1 H00R0000 arc: A2 V02N0701 arc: A3 V00T0000 arc: A4 V00T0100 arc: A5 H02E0501 arc: A6 W1_H02E0701 arc: A7 V02N0101 arc: B0 H02E0301 arc: B1 N1_V02S0301 arc: B2 H00L0000 arc: B3 V02S0301 arc: B4 E1_H02W0101 arc: B5 V02S0501 arc: B6 V00B0000 arc: B7 S1_V02N0701 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C8:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02W0201 arc: H00L0100 V02N0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06S0303 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: A0 V02N0701 arc: A1 H00R0000 arc: A2 H02W0701 arc: A3 H00L0100 arc: A4 V02N0101 arc: A5 V00B0000 arc: A6 V00T0100 arc: A7 S1_V02N0101 arc: B0 V00T0000 arc: B1 V02S0301 arc: B2 N1_V02S0301 arc: B3 V02S0101 arc: B4 H00L0000 arc: B5 V02S0701 arc: B6 N1_V02S0701 arc: B7 E1_H02W0101 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R15C9:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02N0201 arc: H00R0000 V02S0601 arc: N1_V02N0501 H02W0501 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02E0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0301 W3_H06E0003 arc: W3_H06W0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0000 arc: A1 V02N0501 arc: A2 N1_V02S0701 arc: A3 H02E0501 arc: A4 S1_V02N0101 arc: A5 V00T0000 arc: A6 W1_H02E0501 arc: A7 H02E0701 arc: B0 V00B0000 arc: B1 N1_V02S0301 arc: B2 E1_H02W0101 arc: B3 V02S0301 arc: B4 H00R0000 arc: B5 V02S0701 arc: B6 V00B0100 arc: B7 V02S0501 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C10:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 H02E0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0301 arc: V00T0100 H02E0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 N1_V02S0701 arc: E3_H06E0203 W3_H06E0203 arc: A3 V00B0000 arc: A5 H02E0701 arc: B3 H00R0100 arc: B5 H00L0000 arc: C3 E1_H02W0601 arc: C5 H02E0601 arc: CE0 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 W1_H02E0001 arc: D5 V02N0401 arc: E1_H02E0101 F3 arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0100 Q6 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M4 H02W0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0401 F4 arc: S1_V02S0201 Q0 arc: W1_H02W0601 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1001000000001001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R16C11:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 S1_V02N0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 W1_H02E0401 arc: V00B0100 N1_V02S0101 arc: V00T0100 H02E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: A2 V02N0501 arc: A3 V00T0000 arc: A5 H02E0501 arc: A6 N1_V02S0301 arc: A7 E1_H02W0501 arc: B2 V02S0301 arc: B3 H00R0000 arc: B5 N1_V02S0501 arc: B6 S1_V02N0701 arc: B7 V00B0100 arc: C2 N1_V01N0001 arc: C3 H02W0401 arc: C5 V02S0001 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 E1_H02W0201 arc: D3 N1_V02S0201 arc: D5 H02W0001 arc: D6 V00B0000 arc: D7 E1_H02W0001 arc: E1_H01E0101 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q0 arc: V00T0000 Q0 arc: W3_H06W0103 F2 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 1001000000000000 word: SLICEB.K0.INIT 1001000000000000 word: SLICEB.K1.INIT 1000001001000001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1001000000001001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R16C12:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0101 arc: V00T0100 H02W0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0303 N3_V06S0303 arc: A0 E1_H02W0501 arc: A1 H00L0100 arc: A7 N1_V01N0101 arc: B0 N1_V02S0301 arc: B1 H00R0100 arc: B7 H02E0301 arc: C0 H00L0000 arc: C1 V02N0401 arc: C7 E1_H02W0401 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 W1_H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F7 F7_SLICE arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M2 V00T0100 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: N3_V06N0203 F7 arc: S1_V02S0201 Q2 arc: V01S0000 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1000010010100101 word: SLICEA.K1.INIT 1100010000110001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R16C13:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N1_V01S0000 arc: H00L0100 H02E0101 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0501 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0303 N3_V06S0303 arc: W3_H06W0203 E3_H06W0203 arc: A5 V00T0000 arc: A7 H00L0000 arc: B5 V00B0100 arc: B7 V02N0701 arc: C5 H02E0601 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V02N0401 arc: D7 H00L0100 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 V00B0000 arc: M0 H02W0601 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q0 arc: N3_V06N0303 F5 arc: V00T0000 Q2 arc: W1_H02W0701 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R16C14:PLC2 arc: E1_H02E0101 V02N0101 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0100 S1_V02N0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V01N0001 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0203 W3_H06E0203 arc: A3 V00T0000 arc: A7 E1_H02W0501 arc: B3 H00R0100 arc: B7 S1_V02N0701 arc: C3 H00L0100 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D3 E1_H02W0001 arc: D7 V02N0401 arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M4 E1_H02W0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0401 F6 arc: V00T0000 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1001000000001001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R16C15:PLC2 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 N1_V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 W3_H06E0303 arc: CE0 W1_H02E0101 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q4 arc: H01W0000 Q2 arc: H01W0100 Q6 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R16C16:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 V02S0301 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V06S0203 arc: N1_V02N0701 W3_H06E0203 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0000 Q6 arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q4 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C17:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0701 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: W1_H02W0001 N3_V06S0003 arc: A4 V00T0100 arc: B1 V00B0000 arc: B4 H00L0000 arc: B7 S1_V02N0701 arc: C1 H00L0100 arc: C3 N1_V01N0001 arc: C4 V00B0100 arc: C7 F4 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02E0001 arc: D3 H02E0001 arc: D4 V02N0601 arc: D7 H00R0100 arc: E1_H01E0101 Q3 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H01W0000 Q0 arc: H01W0100 F7 arc: LSR0 E1_H02W0301 arc: LSR1 V00T0000 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N3_V06N0203 F4 arc: V00T0100 Q1 arc: V01S0000 Q1 arc: V01S0100 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0011110011110000 word: SLICEC.K0.INIT 0001000000010001 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R16C18:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0201 arc: H00R0100 H02W0701 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0501 E3_H06W0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E3_H06W0203 arc: A1 E1_H01E0001 arc: A5 V00T0100 arc: B1 H02E0301 arc: B5 S1_V02N0501 arc: C1 V02S0401 arc: C5 V00T0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D5 H00R0100 arc: E1_H01E0001 Q1 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00R0000 F4 arc: H01W0000 Q1 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N3_V06N0103 Q1 arc: S1_V02S0301 Q1 arc: S3_V06S0103 Q1 arc: W1_H02W0101 Q1 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0101010101010001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 0101010101011101 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R16C19:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 H06W0003 arc: W1_H02W0301 V02N0301 arc: W1_H02W0701 H01E0101 arc: B3 V02N0101 arc: C3 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: E1_H01E0001 F7 arc: E3_H06E0003 F3 arc: E3_H06E0203 Q7 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N3_V06N0203 F7 arc: S3_V06S0203 F7 arc: W1_H02W0501 Q7 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R16C20:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W1_H02E0101 arc: H00R0000 V02N0401 arc: N1_V01N0001 N3_V06S0003 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 E3_H06W0003 arc: V00T0100 V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: E3_H06E0203 W3_H06E0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: A6 V02N0101 arc: A7 V02N0101 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 H00L0000 arc: B3 H00R0100 arc: B6 H02W0301 arc: B7 H02W0301 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 H00L0000 arc: C6 V02N0001 arc: C7 V02N0001 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 H00R0000 arc: D5 H00R0100 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: H00R0100 Q5 arc: H01W0000 Q5 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q0 arc: S1_V02S0001 Q0 arc: S1_V02S0301 F3 arc: S1_V02S0601 F6 arc: V00T0000 Q2 word: SLICEB.K0.INIT 0110110011001001 word: SLICEB.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 1100110011001001 word: SLICEA.K1.INIT 0110110011001100 word: SLICED.K0.INIT 1100010001000100 word: SLICED.K1.INIT 0011101110111011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R16C21:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02S0201 arc: H00L0100 V02N0301 arc: H00R0000 V02S0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H02E0301 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V02N0301 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A0 E1_H01E0001 arc: A5 V02N0101 arc: A6 F7 arc: B0 S1_V02N0101 arc: B1 H01W0100 arc: B5 E1_H02W0101 arc: B6 F1 arc: B7 V01S0000 arc: C0 N1_V01S0100 arc: C1 H00L0000 arc: C4 Q4 arc: C5 V02N0201 arc: C6 V00B0100 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V01S0000 arc: D4 W1_H02E0001 arc: D5 H02W0201 arc: D6 H00L0100 arc: D7 H02E0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q0 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 Q4 arc: H01W0100 Q0 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q0 arc: S1_V02S0501 F5 arc: S1_V02S0601 Q4 arc: S1_V02S0701 F7 arc: S3_V06S0203 Q4 arc: V01S0000 Q0 arc: V01S0100 F1 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0001000000000000 word: SLICED.K1.INIT 0000001100000000 word: SLICEA.K0.INIT 1111101010111010 word: SLICEA.K1.INIT 0000001100001100 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1100010001000100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R16C22:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: H00L0100 V02S0101 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H01E0001 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0701 N1_V01S0100 arc: A4 V00B0000 arc: A5 V00B0000 arc: A6 H00L0000 arc: A7 V02N0101 arc: B4 H02W0301 arc: B5 H02W0301 arc: B6 H01E0101 arc: B7 V00T0000 arc: C0 N1_V01N0001 arc: C1 H00R0100 arc: C4 H02W0601 arc: C5 H02W0601 arc: C6 V00B0100 arc: C7 E1_H02W0601 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0001 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 V02N0601 arc: D7 S1_V02N0601 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR1 H02E0301 arc: M2 H02E0601 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F1 arc: N3_V06N0103 F1 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 arc: S3_V06S0003 F0 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1000001001000001 word: SLICED.K1.INIT 1100101000000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 1100010001000100 word: SLICEC.K1.INIT 0011101110111011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R16C23:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 E1_H02W0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 H06W0303 arc: S3_V06S0203 H06E0203 arc: V00B0000 S1_V02N0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 V02N0601 arc: E1_H02E0401 W3_H06E0203 arc: W3_H06W0103 E1_H02W0201 arc: A3 H00L0100 arc: B3 H02E0101 arc: C3 E1_H01W0000 arc: D3 V00T0100 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H00R0100 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00B0000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R16C24:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0100 H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02E0401 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02W0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: A1 H00L0100 arc: A5 V02S0101 arc: A6 V00T0100 arc: A7 H02W0701 arc: B1 H01W0100 arc: B5 H00R0000 arc: B6 V00B0000 arc: B7 V02S0501 arc: C1 H00L0000 arc: C4 V02N0001 arc: C5 V02N0201 arc: C6 H02W0601 arc: C7 N1_V02S0201 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0201 arc: D4 V02S0601 arc: D5 H00R0100 arc: D6 V02N0401 arc: D7 E1_H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E1_H02E0001 F0 arc: E3_H06E0203 F7 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F4 arc: H01W0100 F4 arc: LSR0 E1_H02W0501 arc: M0 V00T0000 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 F5 arc: N3_V06N0203 F7 arc: N3_V06N0303 F5 arc: S1_V02S0001 Q2 arc: V01S0000 F7 arc: V01S0100 F0 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0000000000010000 word: SLICED.K1.INIT 0000010000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R16C25:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 H01E0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0301 S1_V02N0301 arc: S1_V02S0001 N1_V01S0000 arc: V00B0000 H02W0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 H01E0001 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: A0 H02W0701 arc: B0 V00T0000 arc: B2 V02S0101 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V01S0000 arc: B7 V00B0100 arc: C0 H02E0601 arc: C2 H00R0100 arc: C3 N1_V01N0001 arc: C4 V00T0100 arc: C5 V01N0101 arc: C7 V00T0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 N1_V01S0000 arc: D3 S1_V02N0201 arc: D4 V02S0401 arc: D5 V01N0001 arc: D6 V02S0601 arc: D7 V02S0401 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q3 arc: H01W0100 F7 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q3 arc: N1_V02N0201 F0 arc: S1_V02S0201 F2 arc: S1_V02S0401 Q6 arc: S1_V02S0601 F4 arc: V01S0000 Q5 arc: W1_H02W0501 Q5 word: SLICEB.K0.INIT 1111001100110011 word: SLICEB.K1.INIT 1100110011111100 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1111110011001100 word: SLICEC.K0.INIT 1111001100110011 word: SLICEC.K1.INIT 1100111111001100 word: SLICEA.K0.INIT 1000110010101111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C26:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06S0203 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06W0203 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: V00T0100 H02W0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02N0701 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0203 V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: A0 H02E0701 arc: A3 V00B0000 arc: A4 H02E0501 arc: A5 H02E0501 arc: A7 E1_H01W0000 arc: B0 F1 arc: B1 V00B0000 arc: B2 F1 arc: B3 H01W0100 arc: B4 H00L0000 arc: B5 H00L0000 arc: B7 H02E0101 arc: C0 V02S0601 arc: C1 V02N0601 arc: C2 N1_V01N0001 arc: C3 H00L0000 arc: C4 Q4 arc: C5 E1_H01E0101 arc: C7 V02N0001 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 H02E0001 arc: D2 H02E0201 arc: D3 E1_H02W0001 arc: D4 V02N0401 arc: D5 V02N0401 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0301 F3 arc: E1_H02E0401 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: H00R0000 F6 arc: H01W0000 Q2 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: S1_V02S0001 Q2 arc: S1_V02S0301 F1 arc: S1_V02S0401 Q4 arc: V00B0000 Q4 arc: V01S0000 Q0 arc: W1_H02W0101 F3 arc: W1_H02W0301 F3 arc: W3_H06W0003 F3 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0011001111110011 word: SLICEB.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 1111001101110011 word: SLICEA.K1.INIT 1111110011001111 word: SLICEC.K0.INIT 0000000011100001 word: SLICEC.K1.INIT 1110000100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111001100100010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R16C27:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02E0401 arc: V00T0000 H02E0001 arc: V00T0100 V02N0501 arc: W1_H02W0401 S1_V02N0401 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: A1 W1_H02E0501 arc: A5 V02N0301 arc: B1 V00B0000 arc: B3 E1_H02W0301 arc: B5 V02N0501 arc: B6 V00T0000 arc: B7 V00T0000 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 V02S0601 arc: C5 V02S0201 arc: C6 V02N0201 arc: C7 V02N0201 arc: D1 H00R0000 arc: D2 F0 arc: D3 V00B0100 arc: D5 V02N0601 arc: D6 H02W0001 arc: D7 H00R0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F2 arc: M0 V00T0100 arc: M6 H02E0401 arc: N1_V01N0001 F0 arc: V00B0100 F5 arc: V01S0000 F6 arc: W1_H02W0301 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1110101000000000 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 1100111100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001000000000000 word: SLICED.K0.INIT 1111111100111111 word: SLICED.K1.INIT 1111111111111100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R16C28:PLC2 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02S0101 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 V02S0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0501 S1_V02N0501 arc: A1 H02E0701 arc: A5 Q5 arc: A7 V02N0301 arc: B0 V00T0000 arc: B1 V00T0000 arc: B5 H00R0000 arc: B7 H01E0101 arc: C0 H00L0100 arc: C1 H00L0100 arc: C5 V00B0100 arc: C7 V00T0100 arc: CE0 V02N0201 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D5 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q1 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: V01S0100 Q1 word: SLICEA.K0.INIT 1111001100110011 word: SLICEA.K1.INIT 1111100110011001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1110110011001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111100110011001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R16C29:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 S1_V02N0301 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0201 H06E0103 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 E3_H06W0303 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 .tile R16C2:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E3_H06W0203 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0303 S3_V06N0303 .tile R16C30:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 W1_H02E0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0201 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 .tile R16C31:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0303 S3_V06N0303 arc: H00R0100 H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q0 arc: M0 V00B0000 arc: MUXCLK0 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C32:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 H01E0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0601 arc: W1_H02W0601 N3_V06S0303 arc: E3_H06E0203 W3_H06E0103 arc: A3 V00B0000 arc: A5 V00T0000 arc: A7 S1_V02N0301 arc: B2 E1_H01W0100 arc: B3 V01N0001 arc: B5 V00B0100 arc: B7 S1_V02N0501 arc: C2 S1_V02N0601 arc: C3 H02W0601 arc: C5 V02N0001 arc: C7 H02E0601 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 E1_H02W0201 arc: D5 H02E0001 arc: D7 H02E0001 arc: E1_H01E0001 Q0 arc: E1_H02E0001 Q0 arc: E1_H02E0501 F7 arc: E3_H06E0003 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: M0 W1_H02E0601 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: S1_V02S0201 Q0 arc: S1_V02S0401 F4 arc: V00T0100 F3 arc: V01S0100 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000110000 word: SLICEB.K1.INIT 0010101000111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000010000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R16C33:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 V02N0601 arc: E3_H06E0303 W1_H02E0501 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 H02W0701 arc: V00T0100 H02E0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A7 V02N0301 arc: B5 V01S0000 arc: B7 V02N0701 arc: C5 H02E0401 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D5 H02E0201 arc: D7 S1_V02N0401 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q0 arc: E1_H02E0501 F5 arc: E3_H06E0003 Q0 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F7 arc: N1_V02N0201 Q2 arc: S1_V02S0501 F5 arc: V01S0000 Q0 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010101000101010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R16C34:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0701 H01E0101 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 H01E0101 arc: H00L0100 V02N0301 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0601 W3_H06E0303 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: A1 W1_H02E0701 arc: A3 V02N0701 arc: A5 H02W0701 arc: A6 V02N0101 arc: B1 E1_H02W0301 arc: B3 H00L0000 arc: B4 H01E0101 arc: B5 H02W0301 arc: B6 V02N0701 arc: C0 H02W0401 arc: C1 H00L0100 arc: C3 H00R0100 arc: C4 H02E0401 arc: C5 V01N0101 arc: C6 V00B0100 arc: C7 V00T0000 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 N1_V01S0000 arc: D3 V02N0001 arc: D4 V02N0401 arc: D5 E1_H02W0201 arc: D6 V00B0000 arc: D7 V02N0601 arc: E1_H01E0101 F1 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 F2 arc: H01W0100 F0 arc: M2 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F7 arc: N1_V02N0501 F7 arc: S1_V02S0401 F6 arc: S3_V06S0203 Q4 arc: V00T0100 F1 arc: V01S0000 F1 arc: W1_H02W0601 Q6 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 1100111111111111 word: SLICEC.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0000001000000011 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R16C35:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 V01N0001 arc: H00L0100 H02W0301 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0401 V01N0001 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 H00L0100 arc: A2 V01N0101 arc: A3 V01N0101 arc: A4 N1_V01N0101 arc: A6 W1_H02E0501 arc: A7 N1_V01N0101 arc: B0 H00R0100 arc: B1 W1_H02E0301 arc: B2 E1_H02W0301 arc: B3 H02E0101 arc: B4 N1_V01S0000 arc: B5 V01S0000 arc: B6 H02E0301 arc: B7 W1_H02E0101 arc: C0 W1_H02E0601 arc: C1 N1_V01S0100 arc: C2 S1_V02N0401 arc: C3 W1_H02E0401 arc: C4 V00T0000 arc: C5 F4 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: D0 H01E0101 arc: D1 W1_H02E0001 arc: D2 V01S0100 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 E1_H01W0100 arc: D6 V02S0601 arc: D7 H02E0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: N1_V01N0001 F5 arc: N1_V01N0101 F1 arc: V01S0000 F2 arc: V01S0100 F3 arc: W1_H02W0301 F1 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 1100100011111010 word: SLICEB.K1.INIT 0001000000000001 word: SLICEC.K0.INIT 0010000000000000 word: SLICEC.K1.INIT 0000000011001111 word: SLICEA.K0.INIT 1100110010000000 word: SLICEA.K1.INIT 0000010000000000 word: SLICED.K0.INIT 0000011100000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R16C36:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 N3_V06S0203 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 H02E0501 arc: V00T0000 V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V02S0701 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A1 W1_H02E0701 arc: A5 V00T0000 arc: A7 H02E0701 arc: B1 E1_H02W0301 arc: B4 H02E0301 arc: B5 S1_V02N0701 arc: B7 V00B0000 arc: C0 H00R0100 arc: C1 H00L0000 arc: C3 H02E0601 arc: C4 E1_H01E0101 arc: C5 E1_H01E0101 arc: C6 V00T0100 arc: C7 E1_H02W0401 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V01S0000 arc: D3 H02E0001 arc: D4 E1_H01W0100 arc: D5 H02W0001 arc: D6 E1_H02W0001 arc: D7 H00L0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F0 arc: E1_H02E0401 Q4 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 F1 arc: H01W0000 F6 arc: H01W0100 F5 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F6 arc: S1_V02S0401 F6 arc: V00B0000 F6 arc: V01S0000 F3 arc: W1_H02W0401 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 1111011100000000 word: SLICEC.K0.INIT 1111110011111111 word: SLICEC.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 0000010000001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R16C37:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0701 arc: V00T0100 H02E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 arc: A5 H02E0701 arc: A6 H00R0000 arc: A7 N1_V01N0101 arc: B4 V00B0100 arc: B5 H02E0301 arc: B6 E1_H02W0301 arc: B7 V00B0000 arc: C3 H00R0100 arc: C4 H02E0601 arc: C5 V02S0201 arc: C6 F4 arc: C7 H02W0601 arc: CE0 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 H01W0000 arc: D6 H02E0001 arc: D7 H00L0100 arc: E1_H01E0101 F3 arc: E3_H06E0203 F7 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F5 arc: M0 W1_H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110000 word: SLICED.K0.INIT 0100000011111111 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000001100 word: SLICEC.K1.INIT 0000000000011011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R16C38:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02N0101 arc: H00R0000 H02W0401 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06W0303 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0201 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H01W0100 arc: E1_H02E0001 W3_H06E0003 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: B0 S1_V02N0301 arc: B2 S1_V02N0301 arc: C0 H00L0100 arc: C2 V02N0601 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H00R0000 arc: D2 S1_V02N0001 arc: D3 V00B0100 arc: E1_H01E0101 F0 arc: E1_H02E0201 F2 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q2 arc: S1_V02S0601 Q4 arc: V01S0100 Q6 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000001111001111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R16C39:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 W1_H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: A0 V02S0501 arc: A2 V00B0000 arc: A4 H02W0501 arc: B0 F1 arc: B2 F3 arc: B4 S1_V02N0501 arc: B5 W1_H02E0301 arc: C0 H00L0100 arc: C1 W1_H02E0401 arc: C2 H00L0100 arc: C3 H00L0000 arc: C4 N1_V02S0001 arc: C5 V00T0100 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H00R0000 arc: D2 S1_V02N0001 arc: D3 V00B0100 arc: D4 H01W0000 arc: D5 H02W0201 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: H01W0100 F1 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F3 arc: S3_V06S0103 Q2 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0100010001000000 word: SLICEC.K1.INIT 0000000000110000 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0000000010000000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R16C3:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02E0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02W0601 arc: V00B0000 H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0401 arc: V01S0100 N3_V06S0303 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: E1_H02E0401 Q4 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 W1_H02E0601 arc: M4 E1_H01E0101 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R16C40:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02S0201 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0100 H02W0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0701 V01N0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: A1 H00L0000 arc: A5 V02S0101 arc: B0 V02N0101 arc: B1 E1_H02W0101 arc: B3 S1_V02N0301 arc: B4 V02S0501 arc: B5 H00R0000 arc: B6 V02N0501 arc: C0 V02N0601 arc: C1 S1_V02N0401 arc: C3 H00R0100 arc: C4 V02S0001 arc: C5 V00B0100 arc: C6 S1_V02N0001 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 F0 arc: D3 V00T0100 arc: D4 V02S0601 arc: D5 H02W0201 arc: D6 H02W0001 arc: D7 H02E0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F4 arc: LSR1 H02W0501 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q5 arc: N1_V02N0101 F1 arc: N1_V02N0701 Q5 arc: S1_V02S0401 F6 arc: V01S0000 F0 arc: V01S0100 F3 arc: W3_H06W0303 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100110011 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 0101000001010001 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111111111111000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R16C41:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 E1_H02W0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0701 arc: V00T0100 W1_H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 N1_V02S0501 arc: H01W0000 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: B1 V00B0000 arc: B3 H00R0000 arc: B4 V02S0501 arc: B7 V02N0501 arc: C0 H00L0100 arc: C1 W1_H02E0401 arc: C2 N1_V01N0001 arc: C3 H00R0100 arc: C4 H02W0401 arc: C7 H02W0601 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V00B0100 arc: D2 H02W0201 arc: D3 H02E0201 arc: D4 E1_H01W0100 arc: D5 V01N0001 arc: D7 H02E0201 arc: E1_H01E0001 F0 arc: E3_H06E0103 F2 arc: E3_H06E0203 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0100 F4 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q3 arc: S3_V06S0103 Q1 arc: V01S0100 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R16C42:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 V02N0201 arc: H00L0100 V02S0101 arc: H00R0100 H02W0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 V02S0701 arc: S1_V02S0301 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 N3_V06S0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: A6 H02E0701 arc: B0 S1_V02N0101 arc: B2 E1_H01W0100 arc: B4 H00L0000 arc: B6 H02E0101 arc: C0 N1_V02S0601 arc: C2 V02S0401 arc: C4 V00T0100 arc: C6 V02N0001 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 H00R0000 arc: D2 V02S0001 arc: D3 S1_V02N0001 arc: D4 H00L0100 arc: D5 V00B0000 arc: D6 H00R0100 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q6 arc: H01W0000 F6 arc: H01W0100 F6 arc: M0 H02E0601 arc: M2 V00T0000 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F0 arc: S1_V02S0401 F6 arc: V01S0000 Q6 arc: V01S0100 F6 arc: W1_H02W0601 F4 word: SLICEC.K0.INIT 1100111100000011 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011111110 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R16C43:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02N0001 arc: H00L0100 V02S0301 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 H01E0101 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: B0 E1_H02W0101 arc: B2 E1_H01W0100 arc: B4 H00L0000 arc: B6 H02E0301 arc: C0 V02N0601 arc: C2 H02E0401 arc: C4 S1_V02N0201 arc: C6 V02N0201 arc: D0 H02W0001 arc: D1 N1_V01S0000 arc: D2 N1_V02S0001 arc: D3 N1_V02S0201 arc: D4 V00B0000 arc: D5 V02S0601 arc: D6 V00B0000 arc: D7 H00L0100 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 F0 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: N1_V01N0101 F4 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0011001100001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R16C44:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 W1_H02E0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S3_V06N0203 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0003 S3_V06N0003 arc: E3_H06E0203 W3_H06E0203 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 V02N0301 arc: A5 V00T0000 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 H00L0000 arc: B5 H02E0101 arc: B6 V02S0501 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 H02W0401 arc: C5 V02S0201 arc: C6 V01N0101 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 N1_V02S0401 arc: D6 V00B0000 arc: D7 H00L0100 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 F6 arc: LSR1 W1_H02E0501 arc: M6 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0101 Q1 arc: S1_V02S0201 Q2 arc: V01S0000 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R16C45:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 S3_V06N0203 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: B0 V02N0101 arc: B2 V02N0301 arc: B4 H00L0000 arc: B6 H02W0101 arc: C0 E1_H01W0000 arc: C2 H00L0100 arc: C4 S1_V02N0001 arc: C6 V02N0001 arc: D0 E1_H02W0201 arc: D1 V00B0100 arc: D2 H00R0000 arc: D3 H02W0001 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 E1_H01W0100 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: S3_V06S0003 F0 arc: V01S0000 F6 arc: V01S0100 F4 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1100111100000011 word: SLICEA.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R16C46:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 V06S0303 arc: H00L0000 S1_V02N0201 arc: H00R0000 E1_H02W0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 W1_H02E0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: A3 E1_H02W0701 arc: B3 H00L0000 arc: B6 S1_V02N0501 arc: C3 H00R0100 arc: C6 S1_V02N0001 arc: CE0 W1_H02E0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 S1_V02N0201 arc: D3 V02N0201 arc: D6 V02N0601 arc: D7 H00L0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q1 arc: H01W0000 F6 arc: H01W0100 Q1 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F1 arc: V01S0000 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R16C47:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 S3_V06N0303 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0203 H06E0203 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V02S0601 arc: S1_V02S0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: B0 N1_V02S0301 arc: B1 H01W0100 arc: B2 H00L0000 arc: B4 H02E0301 arc: B7 S1_V02N0701 arc: C0 E1_H02W0401 arc: C1 H00R0100 arc: C2 V02N0401 arc: C4 S1_V02N0001 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02W0001 arc: D2 S1_V02N0001 arc: D3 V00B0100 arc: D4 S1_V02N0401 arc: D5 H00L0100 arc: D7 H02E0001 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q7 arc: E1_H02E0601 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 Q0 arc: M2 V00T0000 arc: M4 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 Q0 arc: N3_V06N0003 Q0 arc: S3_V06S0103 F1 arc: V01S0000 Q7 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1100111100000011 word: SLICEB.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R16C48:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 S1_V02N0501 arc: H00R0000 S1_V02N0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H01W0100 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 arc: B0 V02S0301 arc: B1 V00T0000 arc: B3 E1_H02W0101 arc: B6 H01E0101 arc: C0 H02W0601 arc: C1 N1_V02S0401 arc: C2 H00L0100 arc: C3 H02E0601 arc: C6 S1_V02N0001 arc: C7 H01E0001 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V02S0001 arc: D2 S1_V02N0201 arc: D3 H02E0001 arc: D6 V00B0000 arc: D7 S1_V02N0401 arc: E1_H02E0601 Q4 arc: E3_H06E0103 F2 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q6 arc: H01W0100 Q4 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0003 Q0 arc: S1_V02S0301 Q3 arc: S3_V06S0003 Q0 arc: V00T0000 Q0 arc: V01S0100 F1 arc: W3_H06W0003 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111110000110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000111111110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R16C49:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 H06E0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: A7 H00L0000 arc: B6 V01S0000 arc: B7 E1_H02W0101 arc: C3 S1_V02N0401 arc: C6 V02S0201 arc: C7 H02W0601 arc: CLK0 G_HPBX0000 arc: D3 V02N0201 arc: D6 H00L0100 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F3 arc: LSR1 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: V01S0000 Q7 arc: W1_H02W0301 F3 arc: W3_H06W0003 F3 arc: W3_H06W0203 Q7 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1111111111111000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R16C4:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V02S0601 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: A1 V02S0501 arc: A4 W1_H02E0501 arc: A5 N1_V01N0101 arc: A7 H02E0701 arc: B1 N1_V02S0101 arc: B4 V01S0000 arc: B5 H00L0000 arc: B7 V00T0000 arc: C1 H00L0100 arc: C4 E1_H01E0101 arc: C5 H02W0601 arc: C7 V00B0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D4 H01W0000 arc: D5 V00B0000 arc: D7 H00R0100 arc: E1_H01E0101 F1 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR1 V00T0100 arc: M2 H02E0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q2 arc: V01S0000 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R16C50:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 W1_H02E0001 arc: H00L0100 V02N0101 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: B0 S1_V02N0101 arc: B1 H01W0100 arc: B4 S1_V02N0501 arc: B5 H00R0000 arc: C0 H00L0000 arc: C1 N1_V02S0401 arc: C4 H02E0401 arc: C5 V00B0100 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0201 arc: D4 V00B0000 arc: D5 W1_H02E0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q6 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 Q0 arc: M2 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0001 Q0 arc: S3_V06S0103 F1 arc: V01S0100 Q0 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R16C51:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 V01N0001 arc: H00L0000 H02E0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: A5 V02S0101 arc: B0 W1_H02E0301 arc: B2 S1_V02N0101 arc: B3 H01W0100 arc: B5 W1_H02E0301 arc: B6 V00T0000 arc: B7 V01S0000 arc: C0 H02E0601 arc: C2 H00L0000 arc: C3 H00R0100 arc: C5 H02E0601 arc: C6 W1_H02E0401 arc: C7 V00T0100 arc: CE0 H02E0101 arc: CE1 H00L0100 arc: CE2 H02E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 S1_V02N0201 arc: D2 H00R0000 arc: D3 H02E0201 arc: D5 V00B0000 arc: D6 N1_V02S0601 arc: D7 H02E0201 arc: E1_H01E0001 F3 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N3_V06N0303 Q6 arc: S1_V02S0501 F7 arc: V01S0000 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110111001000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R16C52:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 V01N0101 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0701 V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0003 S3_V06N0003 arc: A5 V00T0000 arc: B0 V00T0000 arc: B2 H02W0301 arc: B5 S1_V02N0501 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 W1_H02E0601 arc: C5 W1_H02E0601 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02E0001 arc: D2 S1_V02N0001 arc: D3 H00R0000 arc: D5 V00B0000 arc: E1_H01E0101 Q6 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 Q5 arc: H01W0100 Q0 arc: M2 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 F1 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111111000000100 word: SLICEA.K0.INIT 1111001111000000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R16C53:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 S1_V02N0101 arc: H00R0100 V02N0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0201 arc: V00T0100 E1_H02W0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 S1_V02N0701 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A7 V02N0301 arc: B7 V00B0000 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D7 V02N0601 arc: E1_H01E0101 Q2 arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q0 arc: M0 H02E0601 arc: M2 V00B0100 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: V00B0100 Q7 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111000000010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R16C54:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V01N0101 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 V02S0201 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 W1_H02E0201 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02N0001 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N3_V06S0203 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0000 arc: A4 H02W0501 arc: A7 H02W0501 arc: B0 V00T0000 arc: B4 H02E0301 arc: B5 V00B0100 arc: B7 H02E0101 arc: C0 N1_V01N0001 arc: C4 V00T0100 arc: C5 V00T0100 arc: C7 H02W0401 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D4 V02N0401 arc: D5 S1_V02N0401 arc: D7 W1_H02E0001 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 Q2 arc: M0 H02W0601 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F7 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1110111001100000 word: SLICEC.K0.INIT 0011000000100010 word: SLICEC.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 1111111111111000 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C55:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0303 V01N0101 arc: H00R0000 V02N0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 V01N0101 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0501 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 H01E0001 arc: E3_H06E0003 W3_H06E0303 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: H01W0100 Q4 arc: M0 W1_H02E0601 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: W1_H02W0001 Q0 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C56:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 V01N0001 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02W0601 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0301 S3_V06N0003 arc: E1_H02E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: A2 V00T0000 arc: A5 W1_H02E0501 arc: A6 W1_H02E0501 arc: B2 H00L0000 arc: B5 H02E0301 arc: B6 H02E0301 arc: B7 W1_H02E0301 arc: C2 H00R0100 arc: C5 H02E0401 arc: C6 V02S0201 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D5 E1_H02W0001 arc: D6 V02S0401 arc: D7 V00B0000 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: M0 V00T0100 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q2 arc: V01S0100 F6 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1110111001100000 word: SLICED.K0.INIT 0000110000001010 word: SLICED.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 1111111111111000 word: SLICEB.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R16C57:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 N1_V01S0000 arc: E3_H06E0103 W3_H06E0103 arc: A4 E1_H02W0701 arc: A5 E1_H02W0701 arc: A7 H00L0000 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 E1_H02W0101 arc: B7 H02E0101 arc: C4 E1_H02W0401 arc: C5 E1_H02W0401 arc: C6 V02S0201 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 F4 arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: M0 H02W0601 arc: M2 V00T0100 arc: M4 H02E0401 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: N1_V02N0001 Q2 arc: V00B0000 F6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000110000000000 word: SLICED.K1.INIT 1010001010110011 word: SLICEC.K0.INIT 0101010101010111 word: SLICEC.K1.INIT 0000000000001011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R16C58:PLC2 arc: H00R0000 H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N1_V01S0000 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00T0000 V02S0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: N1_V02N0201 W3_H06E0103 arc: A0 H00R0000 arc: A4 W1_H02E0501 arc: A7 W1_H02E0501 arc: B0 H01W0100 arc: B4 V02N0501 arc: B5 W1_H02E0301 arc: B7 V02N0501 arc: C0 V02S0601 arc: C4 V02S0201 arc: C5 V00T0100 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D4 H00R0100 arc: D5 V02N0401 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: V00B0100 F5 arc: V01S0100 F4 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1110111001100000 word: SLICEC.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 1111111111101100 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C59:PLC2 arc: N1_V02N0301 H06E0003 arc: V00B0000 S1_V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 H02W0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 V06S0103 arc: A4 V00T0100 arc: A6 V00T0100 arc: B4 W1_H02E0101 arc: B6 W1_H02E0101 arc: C4 V02N0201 arc: C6 V02N0001 arc: CLK0 G_HPBX0000 arc: D4 S1_V02N0401 arc: D6 S1_V02N0601 arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: LSR0 V00B0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 1010000011101100 word: SLICEC.K1.INIT 1111111111111111 word: SLICED.K0.INIT 1010000011101100 word: SLICED.K1.INIT 1111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R16C5:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V02N0701 arc: H00R0000 H02E0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V02S0701 arc: A5 H02E0501 arc: B5 N1_V02S0701 arc: C5 V02N0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 V02S0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q2 arc: E3_H06E0003 Q0 arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M2 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1001000000001001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R16C60:PLC2 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: N1_V02N0101 W3_H06E0103 .tile R16C61:PLC2 arc: E3_H06E0003 W3_H06E0003 .tile R16C62:PLC2 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 .tile R16C63:PLC2 arc: N3_V06N0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 .tile R16C64:PLC2 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 .tile R16C66:PLC2 arc: S3_V06S0103 H06E0103 .tile R16C67:PLC2 arc: S3_V06S0103 N3_V06S0003 arc: E3_H06E0003 W3_H06E0003 .tile R16C6:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 V02S0701 arc: H00L0100 H02E0101 arc: H00R0000 V02S0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06E0303 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: A1 H00L0100 arc: A4 H02E0501 arc: A5 V00T0000 arc: A6 H00L0000 arc: A7 V02N0101 arc: B1 S1_V02N0301 arc: B4 V01S0000 arc: B5 N1_V02S0701 arc: B6 V02N0701 arc: B7 V00T0000 arc: C1 H00R0100 arc: C4 F6 arc: C5 N1_V02S0201 arc: C6 H02W0601 arc: C7 V00T0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D4 H02W0001 arc: D5 S1_V02N0601 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F7 arc: LSR0 H02E0301 arc: M0 H01E0001 arc: M2 E1_H02W0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q2 arc: V01S0000 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1000000001000000 word: SLICEC.K1.INIT 1011000000001011 word: SLICED.K0.INIT 1000010010100101 word: SLICED.K1.INIT 1111001101010001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001001010001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R16C70:PLC2 arc: S3_V06S0003 H06E0003 .tile R16C7:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 H01E0101 arc: H00L0000 H02W0001 arc: H00R0000 V02N0601 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0203 E3_H06W0203 arc: S3_V06S0103 N3_V06S0003 arc: V00B0100 W1_H02E0701 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0303 E1_H02W0501 arc: W3_H06W0203 E3_H06W0203 arc: A1 H02W0701 arc: A3 E1_H02W0701 arc: A4 N1_V01N0101 arc: A5 H02E0701 arc: A6 V02S0101 arc: A7 V00T0100 arc: B1 V02N0101 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B5 V02N0501 arc: B6 V00B0000 arc: B7 H02W0101 arc: C1 E1_H02W0601 arc: C3 H00L0000 arc: C4 V02N0201 arc: C5 V00T0000 arc: C6 W1_H02E0601 arc: C7 V02S0001 arc: D1 S1_V02N0201 arc: D3 V00B0100 arc: D4 H01W0000 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H02E0601 F6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F5 arc: N1_V01N0101 F3 arc: V00B0000 F4 arc: V00T0100 F1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000001001000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000010000100001 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R16C8:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0303 N3_V06S0303 arc: W3_H06W0203 E3_H06W0103 arc: A1 V02N0701 arc: A2 N1_V02S0701 arc: A3 W1_H02E0501 arc: A4 H02E0501 arc: A5 N1_V01N0101 arc: A7 H00R0000 arc: B1 V02S0101 arc: B2 H02E0301 arc: B3 H00R0100 arc: B4 V01S0000 arc: B5 V00B0100 arc: B7 H02E0101 arc: C1 V02N0401 arc: C2 H00L0000 arc: C3 H00L0100 arc: C4 V02S0201 arc: C5 V01N0101 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D2 V00T0100 arc: D3 W1_H02E0201 arc: D4 V00B0000 arc: D5 H02W0201 arc: D7 H02E0201 arc: E1_H01E0101 F2 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK2 CLK0 arc: N1_V01N0101 F3 arc: S3_V06S0203 Q4 arc: V00B0100 F7 arc: V01S0000 F5 arc: W1_H02W0301 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000001001000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1001000000001001 word: SLICEB.K0.INIT 1101000000001101 word: SLICEB.K1.INIT 1000010010100101 word: SLICEC.K0.INIT 1000111100001111 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R16C9:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00R0100 H02E0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V02N0701 arc: E3_H06E0303 W3_H06E0203 arc: A5 V00B0000 arc: B4 N1_V02S0701 arc: B5 V02S0701 arc: C4 V00T0000 arc: C5 V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 H01W0000 arc: D5 H02W0201 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q2 arc: E1_H02E0401 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: LSR1 H02W0301 arc: M0 H02E0601 arc: M2 V00B0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: W1_H02W0401 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100111100000000 word: SLICEC.K1.INIT 1001100100001001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R17C10:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02E0201 arc: H00R0100 V02N0501 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0103 V06S0103 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0103 W3_H06E0103 arc: A1 H00R0000 arc: A7 H00L0000 arc: B1 V00B0000 arc: B7 V00B0100 arc: C1 N1_V02S0601 arc: C7 H02W0401 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D7 H02E0001 arc: E1_H01E0001 F1 arc: E3_H06E0203 F7 arc: F1 F1_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M2 H02E0601 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q2 arc: W1_H02W0001 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R17C11:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: E3_H06E0203 S3_V06N0203 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H06W0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V02S0401 arc: W3_H06W0003 E3_H06W0003 arc: A5 H02E0701 arc: A7 H00L0000 arc: B5 H00R0000 arc: B7 H02E0101 arc: C5 H02E0601 arc: C7 V00B0100 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: D7 V00B0000 arc: E3_H06E0303 F6 arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: H01W0100 Q0 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M2 V00T0100 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R17C12:PLC2 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0203 E3_H06W0203 arc: A7 H02E0501 arc: B7 V00B0000 arc: C7 V02N0201 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D7 V02S0601 arc: E1_H02E0001 Q0 arc: E1_H02E0501 F7 arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M2 H02E0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N3_V06N0203 Q4 arc: W1_H02W0001 Q0 arc: W1_H02W0601 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R17C13:PLC2 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V01N0001 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 V01N0001 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E1_H01W0000 arc: A1 V02N0501 arc: A3 E1_H02W0501 arc: A7 H00L0000 arc: B1 E1_H01W0100 arc: B3 W1_H02E0301 arc: B7 V00T0000 arc: C1 S1_V02N0401 arc: C3 H00L0100 arc: C7 H02W0401 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D3 V00B0100 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR1 H02W0501 arc: M4 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V02N0501 F7 arc: N3_V06N0103 F1 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R17C14:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02N0201 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N1_V01S0000 arc: N3_V06N0103 H06W0103 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V06S0203 arc: W3_H06W0303 V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: H01W0000 Q0 arc: H01W0100 Q2 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N3_V06N0303 Q6 arc: V01S0100 Q4 arc: W1_H02W0001 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R17C15:PLC2 arc: E1_H02E0601 S3_V06N0303 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 N1_V02S0401 arc: S3_V06S0203 N1_V02S0701 arc: V00B0100 S1_V02N0101 arc: W1_H02W0501 V02N0501 arc: W3_H06W0103 V06S0103 arc: A4 H02E0701 arc: A5 H02E0501 arc: B0 H00R0100 arc: B1 V02N0301 arc: B4 H02W0101 arc: B5 H00R0000 arc: C0 H00L0100 arc: C1 S1_V02N0401 arc: C4 S1_V02N0001 arc: C5 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00B0100 arc: D4 V02N0401 arc: D5 V02N0601 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q5 arc: LSR1 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N3_V06N0003 F0 arc: N3_V06N0203 F4 arc: V00T0000 F0 arc: V00T0100 F1 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1100111111111111 word: SLICEA.K1.INIT 0000000000000011 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R17C16:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02N0301 arc: H00R0000 V02S0401 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 N1_V02S0101 arc: V00T0100 V02S0701 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0303 E1_H01W0100 arc: B1 V02S0101 arc: C1 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: F1 F1_SLICE arc: M2 V00B0100 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q1 arc: S1_V02S0201 Q2 arc: V01S0000 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111001111000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R17C17:PLC2 arc: E1_H02E0601 V02N0601 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0101 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: W1_H02W0401 E1_H02W0101 arc: E1_H02E0401 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: B0 H00R0100 arc: B1 V01N0001 arc: B3 S1_V02N0301 arc: B4 V01S0000 arc: B5 H02W0301 arc: C0 N1_V01N0001 arc: C1 S1_V02N0601 arc: C3 H00L0000 arc: C4 V00T0100 arc: C5 V00B0100 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00B0100 arc: D2 N1_V01S0000 arc: D3 N1_V02S0201 arc: D4 H02E0001 arc: D5 V00B0000 arc: E1_H01E0001 F1 arc: E3_H06E0103 F2 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 Q5 arc: H01W0100 F2 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q1 arc: N1_V02N0201 Q2 arc: N1_V02N0401 F4 arc: N3_V06N0103 Q1 arc: N3_V06N0203 F4 arc: N3_V06N0303 Q5 arc: S3_V06S0103 F1 arc: S3_V06S0303 F5 arc: V00T0100 Q1 arc: V01S0000 Q5 arc: V01S0100 F2 arc: W1_H02W0301 Q1 arc: W1_H02W0501 Q5 arc: W3_H06W0003 F0 arc: W3_H06W0103 Q2 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 1111110011111111 word: SLICEC.K1.INIT 1100111111000000 word: SLICEA.K0.INIT 0011111111111111 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R17C18:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02S0001 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02W0501 arc: V00T0100 E1_H02W0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0301 W3_H06E0003 arc: C6 H02E0601 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D6 E1_H02W0201 arc: D7 V00B0000 arc: E1_H01E0101 Q2 arc: E1_H02E0601 Q4 arc: E3_H06E0303 Q6 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0201 Q0 arc: V00B0000 Q6 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1111111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R17C19:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 V02S0601 arc: H00L0000 V02S0201 arc: H00L0100 V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 E3_H06W0203 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 H02E0701 arc: A5 H02E0501 arc: A6 S1_V02N0101 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H00L0000 arc: B3 H00L0000 arc: B4 E1_H02W0301 arc: B5 V02N0501 arc: B6 H01E0101 arc: B7 V00B0100 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 E1_H02W0401 arc: C5 V02S0001 arc: C6 H02E0601 arc: C7 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK1 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 E1_H02W0001 arc: D5 H00R0100 arc: D6 S1_V02N0401 arc: D7 V02N0401 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: LSR1 H02W0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: S1_V02S0701 F7 arc: V00T0100 Q3 arc: V01S0100 Q1 word: SLICED.K0.INIT 1001000000001001 word: SLICED.K1.INIT 1100101000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R17C20:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0601 H01E0001 arc: H00L0000 V02N0001 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06E0103 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 V02S0701 arc: A5 N1_V01N0101 arc: A7 V00T0100 arc: B1 H02W0101 arc: B3 N1_V02S0101 arc: B5 H02W0101 arc: B6 V00B0000 arc: B7 V00T0000 arc: C0 H00L0000 arc: C1 N1_V01N0001 arc: C3 H00L0100 arc: C4 V02S0001 arc: C5 V00T0000 arc: C6 H02E0601 arc: C7 S1_V02N0001 arc: CE2 H00R0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 E1_H02W0201 arc: D3 H02W0201 arc: D4 H00L0100 arc: D5 E1_H01W0100 arc: D6 H00R0100 arc: D7 H01W0000 arc: E1_H01E0101 F4 arc: E1_H02E0401 Q4 arc: E1_H02E0701 F5 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F3 arc: H01W0100 Q4 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: N1_V02N0601 Q4 arc: N1_V02N0701 F7 arc: S1_V02S0301 F1 arc: S1_V02S0501 F5 arc: S1_V02S0701 F5 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V00B0000 Q6 arc: V00T0000 F0 arc: V01S0000 F1 arc: V01S0100 F7 arc: W1_H02W0501 F5 arc: W1_H02W0601 Q4 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000111111 word: SLICEA.K0.INIT 0000000000001111 word: SLICEA.K1.INIT 0001000000000000 word: SLICED.K0.INIT 0011110011000011 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 1111000011111111 word: SLICEC.K1.INIT 0001000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R17C21:PLC2 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 V02N0601 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02N0301 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 V01N0001 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0001 arc: V00T0000 H02W0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0303 arc: A1 H02W0501 arc: A3 V00T0000 arc: A4 E1_H01W0000 arc: A7 H00R0000 arc: B1 V02S0101 arc: B3 H00R0100 arc: B4 H02W0101 arc: B7 H01E0101 arc: C0 H00L0100 arc: C1 N1_V01N0001 arc: C3 H00L0000 arc: C4 H02W0601 arc: C7 E1_H01E0101 arc: D0 H02E0001 arc: D1 V01S0100 arc: D3 V02N0001 arc: D4 E1_H01W0100 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 F2 arc: M2 H02E0601 arc: M4 V00B0000 arc: M6 V00T0100 arc: N1_V01N0001 F0 arc: V01S0000 F6 arc: V01S0100 F4 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000000100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000100000000 word: SLICEC.K0.INIT 1111111011111111 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000010000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R17C22:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W1_H02E0101 arc: H00L0100 V02N0301 arc: H00R0000 V02S0601 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 N1_V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H01W0100 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02S0701 arc: A1 H00L0000 arc: A4 V00T0100 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 E1_H01W0100 arc: B2 V02S0101 arc: B4 V01S0000 arc: B6 V00B0000 arc: B7 V00B0000 arc: C0 N1_V01N0001 arc: C1 H02W0601 arc: C2 H00L0100 arc: C4 V00T0000 arc: C5 V02N0201 arc: C6 Q6 arc: C7 V02S0001 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 E1_H02W0201 arc: D2 V00B0100 arc: D3 V00T0100 arc: D4 H00R0100 arc: D5 V02N0401 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0001 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H00R0100 F5 arc: H01W0000 Q3 arc: H01W0100 Q6 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: N1_V02N0201 F0 arc: N1_V02N0501 F5 arc: S3_V06S0303 F5 arc: V00B0000 Q4 arc: V00B0100 F5 arc: V00T0000 Q2 arc: V00T0100 Q3 arc: V01S0000 Q4 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0301 F1 arc: W1_H02W0601 Q4 arc: W3_H06W0003 F0 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0011110011000011 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0110110011001001 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1111111111111110 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1111000011100001 word: SLICED.K1.INIT 0111100011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R17C23:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 E1_H02W0001 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 V02N0401 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 S1_V02N0701 arc: N1_V02N0401 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 H00L0100 arc: A3 H00L0100 arc: A4 V00T0100 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 H00R0100 arc: B2 H01W0100 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V01S0000 arc: B6 V00B0000 arc: B7 V00B0000 arc: C0 N1_V01N0001 arc: C2 V02S0601 arc: C3 H02E0601 arc: C4 Q4 arc: C5 V00B0100 arc: C6 Q6 arc: C7 E1_H01E0101 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00T0100 arc: D2 E1_H02W0201 arc: D3 V01S0100 arc: D4 H02E0201 arc: D5 H02E0201 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q6 arc: E1_H02E0101 Q3 arc: E1_H02E0201 F2 arc: E1_H02E0301 F3 arc: E3_H06E0003 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H00R0100 Q5 arc: H01W0000 Q6 arc: H01W0100 Q3 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F3 arc: V00B0000 Q4 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: V01S0000 Q1 arc: V01S0100 Q4 arc: W1_H02W0001 F0 arc: W1_H02W0101 Q3 arc: W1_H02W0201 F2 word: SLICEC.K0.INIT 0111100011100001 word: SLICEC.K1.INIT 0011110011000011 word: SLICEB.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 1111111111111110 word: SLICEA.K0.INIT 0000000100000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111000011100001 word: SLICED.K1.INIT 0111100011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R17C24:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0601 H01E0001 arc: E3_H06E0203 V01N0001 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0601 N1_V01S0000 arc: V00B0000 V02S0001 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: E3_H06E0003 W3_H06E0303 arc: A0 W1_H02E0701 arc: A1 W1_H02E0701 arc: A4 V00T0000 arc: A7 H00R0000 arc: B0 H02E0301 arc: B1 H02E0301 arc: B4 S1_V02N0501 arc: B5 V01S0000 arc: B7 S1_V02N0501 arc: C0 H00L0000 arc: C1 H00L0000 arc: C4 V00B0100 arc: C5 V02N0201 arc: C7 V00B0100 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D4 V02N0401 arc: D5 E1_H01W0100 arc: D7 V02N0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M2 V00T0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F4 arc: V00B0100 F5 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 1100001100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1100010001000100 word: SLICEA.K1.INIT 0011101110111011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R17C25:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 V02N0401 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 V06N0303 arc: H00L0000 S1_V02N0001 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H06E0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 E1_H01W0100 arc: H01W0100 W3_H06E0303 arc: N1_V02N0301 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: A1 E1_H01E0001 arc: A7 Q7 arc: B1 V00T0000 arc: B2 W1_H02E0101 arc: B6 V02N0501 arc: B7 V02N0501 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 H02E0401 arc: C6 S1_V02N0001 arc: C7 S1_V02N0001 arc: CE0 V02S0201 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D2 V00B0100 arc: D3 V00T0100 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 Q1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q7 arc: N1_V02N0101 F3 arc: N3_V06N0003 F3 arc: V01S0000 Q1 arc: V01S0100 Q6 arc: W1_H02W0001 F2 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 1111001100110011 word: SLICED.K1.INIT 1111100110011001 word: SLICEB.K0.INIT 1111001100110011 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111100110011001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R17C26:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 N1_V01S0100 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 H06E0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0301 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A4 F5 arc: B2 V02S0101 arc: B3 H00L0000 arc: B4 H02E0101 arc: B5 N1_V01S0000 arc: B7 V02S0701 arc: C2 H02E0401 arc: C3 V02N0401 arc: C4 V00B0100 arc: C5 V02S0001 arc: C7 V00B0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 W1_H02E0201 arc: D4 V00B0000 arc: D5 V02S0401 arc: D7 E1_H02W0001 arc: E1_H02E0701 F5 arc: E3_H06E0003 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F3 arc: H01W0100 F4 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0501 F7 arc: S3_V06S0003 F3 arc: W3_H06W0003 F3 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0100000000000000 word: SLICEC.K1.INIT 0000001100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R17C27:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 V02N0101 arc: H00R0100 V02N0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: H01W0100 W3_H06E0303 arc: S1_V02S0401 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0303 E3_H06W0303 arc: A4 F5 arc: A7 H02W0501 arc: B1 H02W0301 arc: B4 H00L0000 arc: B5 S1_V02N0501 arc: B7 V00B0000 arc: C1 H00R0100 arc: C4 V01N0101 arc: C5 V02N0001 arc: C7 S1_V02N0001 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D4 H02E0001 arc: D5 V02N0601 arc: D7 V01N0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F5 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: LSR1 V00T0100 arc: M2 V00T0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q2 arc: N1_V02N0401 F6 arc: N3_V06N0303 F5 arc: V00T0100 F1 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K0.INIT 0000010000000000 word: SLICEC.K1.INIT 0000001100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000001000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R17C28:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 V01N0101 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02E0601 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 V06S0303 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: B2 H00R0000 arc: B3 Q3 arc: B4 V02N0701 arc: B5 V02N0701 arc: B7 V00B0000 arc: C2 H00L0100 arc: C3 N1_V01S0100 arc: C4 V00B0100 arc: C5 E1_H01E0101 arc: C7 V00B0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 N1_V02S0201 arc: D3 N1_V01S0000 arc: D4 N1_V02S0401 arc: D5 N1_V02S0601 arc: D6 V02S0401 arc: D7 N1_V02S0401 arc: E1_H01E0101 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q3 arc: H01W0100 F7 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V02N0201 F2 arc: N1_V02N0601 Q6 arc: V01S0000 F4 arc: V01S0100 Q5 arc: W1_H02W0501 Q5 arc: W1_H02W0701 Q5 word: SLICEC.K0.INIT 1111001100110011 word: SLICEC.K1.INIT 1100110011111100 word: SLICEB.K0.INIT 1111001100110011 word: SLICEB.K1.INIT 1100111111001100 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1111110011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 .tile R17C29:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0003 S3_V06N0003 arc: N3_V06N0003 S3_V06N0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 H02W0601 arc: V00T0100 V02S0701 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E3_H06W0003 arc: H01W0100 W3_H06E0303 arc: N1_V02N0301 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0303 arc: B1 H00R0100 arc: C1 H00L0100 arc: C7 V00B0100 arc: CE0 H02E0101 arc: CE2 H02W0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V01S0100 arc: D7 H01W0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0000 Q0 arc: LSR1 V00B0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N3_V06N0203 Q4 arc: S1_V02S0301 Q1 arc: S1_V02S0401 Q4 arc: S3_V06S0203 Q7 arc: V00B0100 Q7 arc: V01S0100 Q0 arc: W1_H02W0501 Q7 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0011110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 .tile R17C2:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: S1_V02S0201 V01N0001 arc: S3_V06S0103 N3_V06S0103 .tile R17C30:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0203 V01N0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0100 H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0601 S1_V02N0601 arc: S1_V02S0001 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A4 S1_V02N0301 arc: A5 H02W0501 arc: A6 E1_H02W0501 arc: A7 H00L0000 arc: B4 V00B0100 arc: B5 H02E0301 arc: B6 V00B0000 arc: B7 V00T0000 arc: C4 E1_H01E0101 arc: C5 W1_H02E0401 arc: C6 V00T0100 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 H00L0100 arc: D5 V02N0601 arc: D6 H01W0000 arc: D7 V01N0001 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F5 arc: E3_H06E0003 Q0 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F7 arc: M0 W1_H02E0601 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0203 F4 arc: S1_V02S0401 Q6 arc: S3_V06S0303 Q6 arc: V00T0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111010100110001 word: SLICEC.K1.INIT 0111000000000000 word: SLICED.K0.INIT 1010000010100011 word: SLICED.K1.INIT 0101111100110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R17C31:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 E1_H02W0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 H01E0001 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A3 H00L0100 arc: B3 H02W0101 arc: C3 H00L0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M2 E1_H02W0601 arc: M3 W1_H02E0201 arc: M4 V00B0000 arc: M5 H00R0100 arc: M6 V00B0000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111111101000101 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R17C32:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02N0601 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0201 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06W0203 arc: V00B0100 E1_H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: A0 H02E0501 arc: A3 V02N0501 arc: A5 V00T0100 arc: A6 V02N0101 arc: B0 E1_H02W0301 arc: B3 H00R0100 arc: B5 H00L0000 arc: B6 W1_H02E0101 arc: B7 V02N0701 arc: C0 H02W0401 arc: C1 E1_H02W0601 arc: C3 V02S0401 arc: C4 V00T0100 arc: C5 S1_V02N0001 arc: C6 V00T0000 arc: C7 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 V00B0100 arc: D3 H00R0000 arc: D4 H02E0201 arc: D5 H01W0000 arc: D6 H00L0100 arc: D7 V02S0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F6 arc: H01W0100 Q0 arc: LSR1 H02W0301 arc: M2 H02E0601 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F2 arc: V01S0000 F4 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 1001101010101010 word: SLICEA.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111110000000 word: SLICEC.K0.INIT 1111111111110000 word: SLICEC.K1.INIT 0010000000100010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R17C33:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 N1_V02S0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 H06W0203 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0303 E3_H06W0203 arc: A2 V00T0000 arc: A4 V02N0301 arc: A6 V02N0301 arc: B2 V02N0101 arc: B4 V01S0000 arc: B6 V02N0701 arc: C2 E1_H01W0000 arc: C4 H02W0601 arc: C6 H02W0601 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 H00R0100 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0100 F1 arc: H01W0100 F1 arc: LSR1 E1_H02W0301 arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 E1_H02W0601 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0401 Q4 arc: S1_V02S0601 Q6 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0110001000100010 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0001110100001101 word: SLICED.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111110110011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R17C34:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0203 V06N0203 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06N0203 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 N3_V06S0003 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: A5 E1_H02W0501 arc: B0 H02E0301 arc: B1 V02N0301 arc: B5 V02S0701 arc: B7 N1_V02S0701 arc: C0 H02E0401 arc: C1 H00L0000 arc: C5 V00T0000 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00B0100 arc: D5 V00B0000 arc: D6 V02N0401 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0100 Q2 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V02N0201 Q0 arc: N1_V02N0501 F7 arc: N3_V06N0003 F0 arc: S1_V02S0501 F5 arc: S3_V06S0003 F0 arc: S3_V06S0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000010000 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0000001100110011 word: SLICEA.K0.INIT 0000000000110000 word: SLICEA.K1.INIT 0000000011111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R17C35:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 N3_V06S0303 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 S1_V02N0101 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: E1_H02E0001 W3_H06E0003 arc: S1_V02S0201 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: B0 E1_H01W0100 arc: B1 V00B0000 arc: C0 H00L0100 arc: C1 N1_V01N0001 arc: C2 H00R0100 arc: C3 H00L0000 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02N0001 arc: D2 H00R0000 arc: D3 V02S0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q6 arc: E1_H02E0401 Q4 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 F2 arc: H00L0100 F1 arc: H00R0000 Q4 arc: H01W0000 Q3 arc: H01W0100 Q6 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: N3_V06N0003 F0 arc: S1_V02S0601 Q4 arc: S3_V06S0303 Q6 arc: V00B0000 Q6 arc: V01S0000 F1 arc: V01S0100 Q6 arc: W1_H02W0201 F2 arc: W3_H06W0103 F2 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 0000000000110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R17C36:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 V02N0501 arc: E3_H06E0303 H01E0101 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 H01E0101 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 V01N0101 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A6 H02W0501 arc: A7 V02S0101 arc: B5 H00L0000 arc: B6 V00B0100 arc: B7 W1_H02E0101 arc: C5 V00T0100 arc: C6 H02E0601 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 Q0 arc: E1_H02E0601 F6 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: E3_H06E0203 F7 arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F7 arc: H01W0100 Q0 arc: M0 V00T0000 arc: M2 W1_H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: N1_V02N0701 F7 arc: N3_V06N0203 F7 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q0 arc: S1_V02S0701 F5 arc: S3_V06S0203 F7 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0701 F7 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000110000000000 word: SLICED.K0.INIT 0100010101000100 word: SLICED.K1.INIT 0111000000110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R17C37:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 H02E0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 E1_H02W0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0501 E1_H02W0401 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0103 N3_V06S0103 arc: A1 H00R0000 arc: A3 H02E0501 arc: A5 H02E0501 arc: A6 E1_H02W0701 arc: B1 W1_H02E0301 arc: B3 H02E0301 arc: B5 H00L0000 arc: B6 V00B0100 arc: B7 V00T0000 arc: C1 H00L0100 arc: C3 W1_H02E0401 arc: C5 V02S0001 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H01E0101 arc: D3 H02E0001 arc: D5 V00B0000 arc: D6 H01W0000 arc: D7 H00R0100 arc: E1_H01E0101 F7 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: S1_V02S0301 F3 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000001010100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111100011111010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001100000001 word: SLICED.K0.INIT 1011000010111011 word: SLICED.K1.INIT 1100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R17C38:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 W1_H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0100 V02N0501 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0701 E1_H01W0100 arc: N3_V06N0103 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: A5 H02E0501 arc: B3 H00L0000 arc: B5 V00B0100 arc: C3 S1_V02N0601 arc: C5 S1_V02N0201 arc: CE0 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 H02E0201 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: M0 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: N3_V06N0003 F3 arc: S1_V02S0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000010101010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011001100001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R17C39:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 E1_H01W0100 arc: V00T0000 V02N0401 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0203 V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: A1 V02S0701 arc: A3 H00L0100 arc: A4 V00T0000 arc: A7 H00R0000 arc: B1 V02N0301 arc: B3 E1_H02W0301 arc: B4 H02E0301 arc: B5 H02E0101 arc: B7 V00T0000 arc: C0 N1_V01S0100 arc: C1 W1_H02E0601 arc: C3 H00L0000 arc: C4 V01N0101 arc: C5 H02E0401 arc: C7 S1_V02N0201 arc: D0 H02W0201 arc: D1 S1_V02N0001 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 F0 arc: D7 H02E0201 arc: E1_H01E0101 F2 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 F5 arc: M2 V00T0100 arc: S1_V02S0201 F2 arc: V00B0100 F7 arc: V00T0100 F1 arc: V01S0000 F4 arc: W1_H02W0001 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000001001000001 word: SLICEC.K0.INIT 1001000000000000 word: SLICEC.K1.INIT 1100001100000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1001000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R17C3:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V01N0001 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: A1 H00L0000 arc: A3 V01N0101 arc: A6 V00T0100 arc: A7 H02E0701 arc: B1 V01N0001 arc: B3 W1_H02E0301 arc: B6 F3 arc: B7 V00B0000 arc: C1 H00R0100 arc: C3 H00L0100 arc: C6 V00B0100 arc: C7 V02S0001 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D3 H00R0000 arc: D6 H01W0000 arc: D7 V02S0401 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q4 arc: LSR1 H02E0501 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: V00T0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R17C40:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 S3_V06N0203 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02N0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0701 N3_V06S0203 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: B0 V00B0000 arc: B2 H02E0101 arc: B3 V02S0301 arc: B4 H02W0101 arc: C0 H00L0100 arc: C2 W1_H02E0601 arc: C3 N1_V01S0100 arc: C4 H02W0401 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 F2 arc: D2 H02W0001 arc: D3 H02E0001 arc: D4 H00R0100 arc: D5 F2 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q2 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H00L0100 F3 arc: H01W0100 Q6 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: S3_V06S0003 F0 arc: S3_V06S0203 F4 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 1100110000001111 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 0000001111001111 word: SLICEA.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R17C41:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V06N0103 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V01N0101 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0203 E3_H06W0103 arc: A3 H00L0100 arc: A7 V02N0101 arc: B0 V01N0001 arc: B3 H00R0000 arc: B4 H02W0101 arc: B5 H02E0301 arc: B7 V00B0000 arc: C0 V02N0601 arc: C2 H00L0100 arc: C3 H00L0000 arc: C4 H02E0601 arc: C5 E1_H01E0101 arc: C6 V00T0100 arc: C7 V02S0001 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02W0001 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 H01W0000 arc: D5 V02S0601 arc: D6 S1_V02N0401 arc: D7 S1_V02N0401 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: LSR0 H02W0301 arc: M0 V00T0000 arc: M2 V00B0100 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F5 arc: V01S0100 Q4 arc: W1_H02W0001 F2 arc: W1_H02W0601 Q4 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000001111001111 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1010100000000000 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1010100000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R17C42:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 S3_V06N0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 N3_V06S0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: B0 H02E0301 arc: B2 E1_H02W0101 arc: B4 H02W0301 arc: B6 V02S0501 arc: C0 H00L0000 arc: C2 E1_H02W0401 arc: C4 E1_H02W0601 arc: C6 V02S0201 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V02N0201 arc: D2 V02S0001 arc: D3 V00T0100 arc: D4 S1_V02N0401 arc: D5 H00R0100 arc: D6 E1_H02W0001 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: H01W0100 F6 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0101 Q0 arc: S1_V02S0401 F4 arc: V01S0000 F2 arc: V01S0100 F0 arc: W1_H02W0201 F0 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 0011001100001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000110011111100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R17C43:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02N0401 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0003 S3_V06N0003 arc: A0 V02N0501 arc: A1 H00R0000 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 W1_H02E0501 arc: A5 V00B0000 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 H00L0000 arc: B5 V00B0100 arc: B6 V02N0701 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 V00T0100 arc: C5 N1_V02S0001 arc: C6 W1_H02E0401 arc: CLK1 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H00L0100 arc: D5 V02S0601 arc: D6 V02S0601 arc: D7 N1_V02S0401 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q0 arc: LSR1 H02W0501 arc: M6 V00T0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q2 arc: W1_H02W0301 Q3 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R17C44:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W1_H02E0401 arc: H00L0000 H02E0001 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0100 H02W0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V01N0001 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0401 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 V00T0100 arc: A5 H02E0501 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 H00L0000 arc: B5 S1_V02N0701 arc: B6 V00T0000 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 H02E0401 arc: C5 N1_V02S0201 arc: C6 V02S0201 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 S1_V02N0401 arc: D5 H00L0100 arc: D6 V02S0601 arc: D7 H02E0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: LSR1 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0101 Q1 arc: V00T0000 Q2 arc: V01S0100 F6 arc: W1_H02W0101 Q3 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R17C45:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 V01N0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 H02W0601 arc: V00B0100 E1_H02W0701 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0101 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0103 N1_V01S0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 S1_V02N0301 arc: A5 H02W0701 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B5 E1_H02W0101 arc: B6 V01S0000 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 N1_V02S0201 arc: C5 N1_V02S0001 arc: C6 V01N0101 arc: CLK1 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 E1_H02W0201 arc: D5 H02W0201 arc: D6 H00R0100 arc: D7 V00B0000 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 F6 arc: LSR1 H02E0501 arc: M6 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V02N0201 Q0 arc: N1_V02N0301 Q1 arc: V01S0000 Q3 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R17C46:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 V06N0203 arc: E3_H06E0303 V06N0303 arc: H00L0100 E1_H02W0301 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H01W0100 arc: E1_H01E0101 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A2 S1_V02N0701 arc: A3 S1_V02N0701 arc: A4 S1_V02N0301 arc: A5 E1_H02W0501 arc: B0 W1_H02E0301 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: B3 W1_H02E0301 arc: B4 V00B0100 arc: B5 H02W0101 arc: B6 V01S0000 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 V00T0100 arc: C5 V00T0000 arc: C6 V01N0101 arc: CLK1 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0201 arc: D4 H02W0201 arc: D5 H00R0100 arc: D6 V02N0401 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H02E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: LSR1 H02E0301 arc: M6 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: V01S0000 Q3 arc: V01S0100 Q2 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R17C47:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02S0301 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 E1_H01W0000 arc: A3 H00L0100 arc: B3 H02W0101 arc: B4 H02E0101 arc: B6 W1_H02E0101 arc: C3 N1_V02S0401 arc: C4 H02E0601 arc: C6 H01E0001 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 H02E0201 arc: D4 S1_V02N0601 arc: D5 H01W0000 arc: D6 E1_H01W0100 arc: D7 V02N0601 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 F1 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: N1_V02N0401 F4 arc: S3_V06S0303 F6 arc: V01S0000 F1 arc: V01S0100 F1 word: SLICEC.K0.INIT 0011001100001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000110010001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R17C48:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: H00L0000 V02N0001 arc: H00L0100 E1_H02W0301 arc: H00R0100 V02S0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S1_V02N0501 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 S1_V02N0201 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 N3_V06S0303 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0601 W3_H06E0303 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A3 V02S0501 arc: A7 H00L0000 arc: B3 H02W0301 arc: B4 N1_V02S0701 arc: B5 H00R0000 arc: B7 H02E0101 arc: C3 H00R0100 arc: C4 V02S0001 arc: C5 V00T0000 arc: C7 E1_H02W0401 arc: CE0 V02S0201 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 H02E0201 arc: D4 V02S0601 arc: D5 N1_V02S0601 arc: D7 H00L0100 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 F1 arc: H01W0100 F1 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0203 Q4 arc: S1_V02S0501 F7 arc: V01S0100 F1 arc: W1_H02W0301 Q1 arc: W1_H02W0701 F5 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R17C49:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0601 V02S0601 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 H02W0701 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 N3_V06S0303 arc: A1 E1_H01E0001 arc: A5 H02W0701 arc: B1 H00R0100 arc: B2 V02S0101 arc: B3 H01W0100 arc: B5 S1_V02N0501 arc: B6 S1_V02N0701 arc: C0 N1_V02S0601 arc: C1 E1_H02W0401 arc: C2 V02S0601 arc: C3 H00L0000 arc: C5 H02W0401 arc: C6 V00T0100 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02S0001 arc: D2 S1_V02N0201 arc: D3 H02W0201 arc: D5 S1_V02N0601 arc: D6 E1_H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: E1_H02E0401 Q6 arc: E3_H06E0003 F0 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: H01W0100 Q2 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 F0 arc: N3_V06N0103 Q2 arc: S1_V02S0201 F0 arc: V01S0000 F3 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011011000 word: SLICEA.K0.INIT 0000000000001111 word: SLICEA.K1.INIT 1101000010000000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R17C4:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0001 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E3_H06W0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 V02S0101 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W3_H06W0003 N3_V06S0003 arc: A5 E1_H01W0000 arc: B5 V02S0501 arc: C5 N1_V02S0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 H02E0201 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: F5 F5_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M2 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: V00B0000 Q6 arc: W1_H02W0401 Q6 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R17C50:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V06N0303 arc: W1_H02W0701 V02N0701 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: B0 H02E0101 arc: B1 H01W0100 arc: B2 V02S0101 arc: B3 H00L0000 arc: B4 V02N0701 arc: B6 N1_V02S0701 arc: B7 V01S0000 arc: C0 H00L0100 arc: C1 V02S0601 arc: C2 H00L0100 arc: C3 H00R0100 arc: C4 V02N0001 arc: C5 V00T0000 arc: C6 V02S0001 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 N1_V02S0201 arc: D2 V00B0100 arc: D3 N1_V02S0201 arc: D4 V02N0401 arc: D5 H02W0001 arc: D6 V02S0401 arc: D7 V00B0000 arc: E3_H06E0003 F3 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q2 arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V02N0401 Q6 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q2 arc: S1_V02S0501 F5 arc: V01S0000 Q6 arc: V01S0100 F7 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 0000111111110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R17C51:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 N1_V01S0000 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06E0203 arc: V00B0100 V02S0101 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 V02N0701 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: B0 H00R0100 arc: B1 V00T0000 arc: B2 V02S0301 arc: B3 H00L0000 arc: B4 E1_H02W0301 arc: B5 V01S0000 arc: B6 N1_V02S0701 arc: B7 V00B0000 arc: C0 W1_H02E0601 arc: C1 H00L0100 arc: C2 W1_H02E0601 arc: C3 V02N0401 arc: C4 V02S0001 arc: C5 V00B0100 arc: C6 V02S0001 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02W0201 arc: D2 H02E0201 arc: D3 H02W0201 arc: D4 E1_H02W0001 arc: D5 H02W0201 arc: D6 V02N0601 arc: D7 H02W0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q0 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: S1_V02S0701 F7 arc: S3_V06S0303 F5 arc: V00B0000 Q6 arc: V00T0000 Q0 arc: V01S0000 Q4 arc: V01S0100 F3 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R17C52:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H01E0101 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02S0201 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 V02S0701 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 N3_V06S0303 arc: B2 H00L0000 arc: B3 H01W0100 arc: B4 N1_V02S0501 arc: B5 V02S0501 arc: C0 E1_H02W0601 arc: C1 H00L0100 arc: C2 H02E0601 arc: C3 V02N0601 arc: C4 H02E0401 arc: C5 N1_V02S0001 arc: C6 E1_H01E0101 arc: C7 V02N0001 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 V02S0201 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 H02E0001 arc: D7 H02E0001 arc: E1_H02E0001 F0 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q2 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0501 F5 arc: S1_V02S0601 F6 arc: S1_V02S0701 F7 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R17C53:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 V02N0201 arc: H00L0100 H02E0301 arc: H00R0100 H02W0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02E0401 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 V02N0301 arc: W1_H02W0701 H01E0101 arc: W3_H06W0103 E1_H01W0100 arc: A1 V02S0701 arc: B1 W1_H02E0101 arc: B2 E1_H02W0301 arc: B4 H00L0000 arc: B5 H00R0000 arc: B6 V00T0000 arc: C1 H02W0401 arc: C2 V02N0401 arc: C3 H00L0100 arc: C4 V02S0001 arc: C5 N1_V02S0001 arc: C6 E1_H02W0401 arc: C7 E1_H02W0401 arc: CE1 H02W0101 arc: CE2 H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D3 V00T0100 arc: D4 V02N0601 arc: D5 E1_H02W0201 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 F5 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0100 F1 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F7 arc: N3_V06N0203 Q4 arc: V01S0000 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1011000010000000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 0000111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R17C54:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 W1_H02E0501 arc: V00T0000 S1_V02N0601 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A3 H02E0701 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: C3 H02E0601 arc: C4 H02E0401 arc: C5 V02N0001 arc: CE0 H02W0101 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D4 E1_H02W0001 arc: D5 H00R0100 arc: E1_H01E0001 Q4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M0 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: S1_V02S0501 F5 arc: V00T0100 Q3 arc: V01S0100 Q6 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010101110101000 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 0000111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R17C55:PLC2 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 N1_V02S0501 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02E0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02E0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 V02N0501 arc: N1_V02N0501 W3_H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: H01W0000 Q0 arc: H01W0100 Q2 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q6 arc: V01S0000 Q2 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R17C56:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: H00R0000 W1_H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q0 arc: E3_H06E0103 Q2 arc: H01W0000 Q0 arc: H01W0100 Q4 arc: M0 V00T0000 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: N1_V02N0401 Q4 arc: N1_V02N0601 Q6 arc: V01S0000 Q6 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R17C57:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 H01E0101 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02E0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0301 V01N0101 arc: N1_V02N0101 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N1_V02N0001 Q0 arc: V01S0000 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R17C58:PLC2 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0601 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0101 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0401 S1_V02N0401 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: M2 V00B0000 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R17C59:PLC2 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 H06E0103 arc: N3_V06N0303 S1_V02N0501 arc: S3_V06S0003 H06E0003 arc: W1_H02W0001 V02N0001 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 .tile R17C5:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0401 arc: H00L0000 V02N0001 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N3_V06S0303 arc: V00B0000 H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0301 arc: A7 N1_V01N0101 arc: B7 V01S0000 arc: C7 V02S0001 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: F7 F7_SLICE arc: H01W0000 Q0 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q2 arc: N1_V02N0601 Q4 arc: V01S0000 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R17C60:PLC2 arc: N3_V06N0303 S1_V02N0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0501 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0203 S3_V06N0203 .tile R17C61:PLC2 arc: N3_V06N0203 H06E0203 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S1_V02N0201 .tile R17C62:PLC2 arc: N3_V06N0203 H06E0203 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 .tile R17C63:PLC2 arc: N3_V06N0303 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 .tile R17C64:PLC2 arc: S3_V06S0303 N1_V02S0501 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 .tile R17C65:PLC2 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 .tile R17C66:PLC2 arc: S1_V02S0401 H06E0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 H06E0303 .tile R17C69:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: S3_V06S0203 N3_V06S0103 .tile R17C6:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 H02W0001 arc: H00L0100 V02S0301 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 H01E0001 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: A1 H00L0000 arc: A5 S1_V02N0101 arc: B1 V01N0001 arc: B5 H02E0301 arc: B7 E1_H02W0301 arc: C1 H00L0100 arc: C5 V01N0101 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D5 V00B0000 arc: D7 V02S0401 arc: E1_H01E0001 F7 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M2 W1_H02E0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F5 arc: N1_V02N0201 F0 arc: N3_V06N0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100001100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R17C70:PLC2 arc: E1_H02E0501 V06S0303 arc: S3_V06S0203 N3_V06S0103 .tile R17C7:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 V01N0101 arc: H00R0000 V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 E1_H01W0000 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: H01W0100 Q0 arc: LSR0 E1_H02W0501 arc: LSR1 V00B0000 arc: M0 H02W0601 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: V01S0100 Q6 arc: W1_H02W0001 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R17C8:PLC2 arc: E1_H02E0601 V02S0601 arc: H00L0100 H02W0101 arc: H00R0000 H02W0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 V01N0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 V06S0003 arc: A1 H00R0000 arc: A7 H02E0501 arc: B1 V01N0001 arc: B7 W1_H02E0301 arc: C1 H00L0100 arc: C7 W1_H02E0601 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D7 H02W0201 arc: E1_H01E0101 Q2 arc: F1 F1_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F1 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000101001000101 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000010000100001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R17C9:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0303 V01N0101 arc: H00L0100 V02N0101 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 E3_H06W0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 V06S0203 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q2 arc: E1_H02E0401 Q6 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 E1_H01E0101 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: W1_H02W0401 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R18C10:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0701 H01E0101 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02W0001 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E1_H01W0000 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: H01W0000 Q6 arc: LSR1 V00B0100 arc: M0 H02E0601 arc: M2 H02W0601 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0001 Q2 arc: N1_V02N0401 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C11:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0601 E1_H01W0000 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: H01W0000 Q4 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q2 arc: N1_V02N0601 Q6 arc: V00T0000 Q0 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C12:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 H02W0501 arc: V00T0000 H02W0001 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V06S0203 arc: A7 H00R0000 arc: B7 V01S0000 arc: C7 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D7 H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q4 arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000001010100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R18C13:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 S3_V06N0303 arc: H00L0000 H02W0001 arc: H00R0000 V02S0401 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0601 E1_H01W0000 arc: H01W0000 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: A4 V02N0101 arc: A7 N1_V01N0101 arc: B4 V00B0100 arc: B5 H02E0101 arc: B7 H01E0101 arc: C4 H02E0401 arc: C5 E1_H02W0601 arc: C7 N1_V02S0001 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 N1_V02S0401 arc: D5 V02N0601 arc: D7 N1_V02S0601 arc: E1_H02E0701 Q5 arc: E3_H06E0203 F4 arc: E3_H06E0303 Q5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q2 arc: N3_V06N0203 F7 arc: N3_V06N0303 Q5 arc: S1_V02S0401 F4 arc: V01S0000 F4 arc: W1_H02W0001 Q2 arc: W1_H02W0501 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0000110000111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R18C14:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02S0201 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E1_H01W0100 arc: V00T0000 H02E0001 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0601 E3_H06W0303 arc: H01W0100 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: W1_H02W0501 W3_H06E0303 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: H01W0000 Q6 arc: LSR0 H02E0501 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R18C15:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 N3_V06S0203 arc: E3_H06E0303 V06N0303 arc: H00L0000 N1_V02S0201 arc: H00R0100 W1_H02E0701 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0601 arc: V00B0100 H02E0501 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V06S0203 arc: A0 H02E0701 arc: A1 V02N0501 arc: B0 H00R0100 arc: B1 H02E0101 arc: C0 H00L0000 arc: C1 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V01S0100 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 F1 arc: H01W0100 Q0 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S3_V06S0003 Q0 arc: V01S0000 Q0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000010101110 word: SLICEA.K1.INIT 1010110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R18C16:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 H02W0301 arc: H00R0100 E1_H02W0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N1_V02S0001 arc: V00B0100 V02N0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S3_V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: W3_H06W0003 E1_H02W0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: B5 V00B0100 arc: C5 H02E0401 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D5 H02E0001 arc: F5 F5_SLICE arc: H01W0100 Q5 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111001111000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R18C17:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0701 E1_H01W0100 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: A7 N1_V01N0101 arc: B3 V02N0101 arc: B5 H02W0301 arc: B6 V00B0000 arc: B7 S1_V02N0701 arc: C3 H00L0000 arc: C5 E1_H02W0601 arc: C6 H02W0601 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 E1_H02W0001 arc: D6 H02E0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q3 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: V01S0000 F7 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1010000011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R18C18:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 H01E0001 arc: H00L0100 H02E0301 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02N0201 arc: V00T0100 H02E0301 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 V02N0501 arc: A3 E1_H01E0001 arc: A5 V00B0000 arc: B1 S1_V02N0301 arc: B3 Q3 arc: B5 F1 arc: C1 V02N0401 arc: C2 H00L0100 arc: C3 H02W0401 arc: C5 V01N0101 arc: C6 V00T0100 arc: C7 V00B0100 arc: CE1 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 V02N0001 arc: D3 E1_H02W0201 arc: D5 E1_H02W0001 arc: D6 H01W0000 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M4 H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F6 arc: N3_V06N0203 Q4 arc: V00B0100 Q7 arc: V01S0000 Q3 arc: V01S0100 F6 arc: W1_H02W0201 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000010100000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0110110000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111111111101111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R18C19:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 H01E0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V06S0303 arc: N3_V06N0203 W3_H06E0203 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: A0 W1_H02E0701 arc: A1 W1_H02E0701 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 V00B0000 arc: A5 V02S0301 arc: A7 V00T0100 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 E1_H02W0301 arc: B5 H00R0000 arc: B7 V00T0000 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 H02W0401 arc: C7 E1_H01E0101 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CLK1 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 V02N0601 arc: D5 V02S0401 arc: D7 H01W0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F0 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q3 arc: E3_H06E0103 F2 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q0 arc: S1_V02S0301 Q1 arc: V00T0000 Q0 arc: V00T0100 Q3 arc: V01S0000 Q1 arc: V01S0100 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000001001000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R18C20:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 S3_V06N0303 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 V01N0101 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 E1_H02W0401 arc: V00B0100 E1_H02W0701 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0203 E3_H06W0103 arc: A2 V00B0000 arc: A3 V00B0000 arc: A7 H00L0000 arc: B0 H01W0100 arc: B2 V02S0301 arc: B3 V02S0301 arc: B5 V02N0701 arc: B7 N1_V01S0000 arc: C0 H02E0401 arc: C1 N1_V01S0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 E1_H02W0401 arc: C5 H02E0401 arc: C7 E1_H01E0101 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V00T0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 H01W0000 arc: D5 F2 arc: D7 H00R0100 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H00L0100 F1 arc: H01W0000 Q5 arc: H01W0100 Q5 arc: LSR0 W1_H02E0501 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F4 arc: N3_V06N0303 F6 arc: S1_V02S0601 F4 arc: V01S0000 F3 arc: V01S0100 Q5 arc: W1_H02W0101 F3 arc: W1_H02W0201 F2 arc: W1_H02W0601 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0011110000000000 word: SLICEB.K0.INIT 1010101010001010 word: SLICEB.K1.INIT 1111111111011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010101010001010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R18C21:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 V06N0303 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0001 arc: V00T0000 E1_H02W0201 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 N3_V06S0303 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0101 W3_H06E0103 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 E3_H06W0303 arc: B3 Q3 arc: B7 V00B0100 arc: C3 H00L0000 arc: C7 V02N0201 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D2 Q2 arc: D3 H00R0000 arc: D6 V02N0401 arc: D7 V02N0601 arc: E1_H01E0101 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q2 arc: H01W0100 Q7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: S1_V02S0001 Q2 arc: S1_V02S0301 Q3 arc: S1_V02S0501 Q7 arc: S1_V02S0601 Q6 arc: S3_V06S0003 Q3 arc: V00B0100 Q7 arc: V01S0000 Q6 arc: V01S0100 Q3 arc: W1_H02W0001 Q2 arc: W1_H02W0101 Q3 arc: W1_H02W0701 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0011110011001100 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0011110011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R18C22:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 N1_V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0601 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0701 E1_H01W0100 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A5 E1_H01W0000 arc: A6 H00L0000 arc: A7 H00R0000 arc: B3 H00R0100 arc: B4 V02S0501 arc: B5 W1_H02E0301 arc: B6 H01E0101 arc: B7 H02E0301 arc: C3 S1_V02N0401 arc: C4 E1_H01E0101 arc: C5 V02N0001 arc: C6 V00B0100 arc: C7 V00T0100 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 H02W0201 arc: D4 N1_V02S0401 arc: D5 H02W0001 arc: D6 H02E0001 arc: D7 V00B0000 arc: E1_H01E0101 F5 arc: E1_H02E0401 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 F6 arc: V01S0000 F3 arc: W1_H02W0501 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111111111100 word: SLICED.K0.INIT 1000010000100001 word: SLICED.K1.INIT 1010110000000000 word: SLICEC.K0.INIT 1100000000000000 word: SLICEC.K1.INIT 1001000000001001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R18C23:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0401 H01E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 S1_V02N0601 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: W3_H06W0303 V06S0303 arc: E3_H06E0103 W3_H06E0103 arc: A0 H00L0000 arc: A1 H00L0000 arc: A4 W1_H02E0501 arc: A7 H00L0000 arc: B0 H00R0100 arc: B1 H00R0100 arc: B4 N1_V02S0501 arc: B5 V01S0000 arc: B7 H02W0101 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C4 V02N0001 arc: C5 E1_H02W0601 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D4 V00B0000 arc: D5 S1_V02N0401 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: E1_H02E0001 Q0 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0000 Q2 arc: H01W0100 F6 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M2 H02E0601 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N3_V06N0303 F5 arc: V01S0000 Q4 arc: W1_H02W0401 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1010100010101010 word: SLICEC.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111101 word: SLICEA.K0.INIT 1010100010101001 word: SLICEA.K1.INIT 0110101010101010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R18C24:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 W1_H02E0101 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02E0501 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0201 arc: V00T0000 H02E0201 arc: W1_H02W0301 N1_V02S0301 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 E1_H01E0001 arc: A4 V00B0000 arc: A6 N1_V01N0101 arc: B0 V02N0101 arc: B4 H02E0101 arc: B5 V00B0100 arc: B6 V02N0701 arc: B7 V01S0000 arc: C0 H02E0601 arc: C1 H00L0000 arc: C4 V00T0000 arc: C5 H02E0401 arc: C6 Q6 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H00R0000 arc: D3 V01S0100 arc: D4 V02S0601 arc: D5 N1_V02S0401 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F1 arc: E1_H02E0001 Q0 arc: E1_H02E0201 F0 arc: E1_H02E0301 F1 arc: E1_H02E0501 Q5 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q6 arc: H01W0100 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q7 arc: N1_V02N0001 F0 arc: N1_V02N0701 Q5 arc: N3_V06N0203 F4 arc: N3_V06N0303 Q5 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: V01S0000 Q7 arc: V01S0100 Q3 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q3 arc: W1_H02W0201 F0 arc: W1_H02W0501 Q7 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 1111111111111110 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0011001100111011 word: SLICEC.K1.INIT 1111110011000000 word: SLICED.K0.INIT 0111100011100001 word: SLICED.K1.INIT 0011110011000011 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R18C25:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 H01E0101 arc: H00L0000 H02E0001 arc: H00L0100 H02E0301 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H06E0303 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0601 V06S0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0103 arc: A4 E1_H02W0701 arc: A5 V00B0000 arc: A6 H00L0000 arc: A7 H00L0000 arc: B4 V01S0000 arc: B5 V02S0501 arc: B6 V00T0000 arc: B7 V00T0000 arc: C4 S1_V02N0001 arc: C5 H02W0601 arc: C6 V00B0100 arc: C7 V00B0100 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D4 V02N0601 arc: D5 H00L0100 arc: D6 V02S0601 arc: D7 V02S0601 arc: E1_H01E0101 F6 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M2 V00T0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F4 arc: N3_V06N0303 F5 arc: V01S0000 F5 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0401 F6 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000010100010 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1100010001000100 word: SLICED.K1.INIT 0011101110111011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R18C26:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02W0001 arc: H00L0100 V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 V01N0001 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0101 arc: E1_H01E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: A1 H02W0501 arc: A2 H00L0100 arc: A5 V00B0000 arc: B1 V02S0101 arc: B2 H00L0000 arc: B3 V02N0101 arc: B5 V02S0701 arc: C0 N1_V01N0001 arc: C1 V02S0401 arc: C2 H02W0401 arc: C3 E1_H02W0401 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 H02E0001 arc: D5 H00R0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: LSR0 E1_H02W0301 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F1 arc: N1_V02N0601 F4 arc: N3_V06N0203 F4 arc: S3_V06S0003 F3 arc: V01S0100 Q2 arc: W3_H06W0003 F0 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 1000000011001100 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1111000011111111 word: SLICEA.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R18C27:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V01N0001 arc: H00R0000 V02S0401 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06E0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E1_H01W0100 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 N1_V02S0701 arc: A1 E1_H01E0001 arc: A2 V02S0701 arc: A3 V00B0000 arc: A4 V00B0000 arc: A6 N1_V01S0100 arc: A7 H02E0701 arc: B0 V02S0101 arc: B1 V00T0000 arc: B2 V02S0301 arc: B3 H00L0000 arc: B4 H00L0000 arc: B5 V01S0000 arc: B6 V00B0100 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 N1_V01N0001 arc: C2 H00R0100 arc: C3 V02N0601 arc: C4 Q4 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 V00T0000 arc: CE0 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V02S0001 arc: D2 V00T0100 arc: D3 E1_H02W0201 arc: D4 V02N0401 arc: D5 H01W0000 arc: D6 V02S0401 arc: D7 V02S0601 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F3 arc: E1_H02E0201 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 F3 arc: H00R0100 F7 arc: H01W0000 Q0 arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F5 arc: N1_V02N0001 Q0 arc: N1_V02N0101 F1 arc: N1_V02N0601 Q4 arc: N1_V02N0701 F5 arc: V00B0000 Q6 arc: V00B0100 F5 arc: V00T0000 Q0 arc: V01S0000 Q4 arc: V01S0100 Q6 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0000101100000011 word: SLICEB.K1.INIT 1110000100000000 word: SLICED.K0.INIT 1101110011111100 word: SLICED.K1.INIT 0000000001000000 word: SLICEC.K0.INIT 0000000011100001 word: SLICEC.K1.INIT 0000001100110000 word: SLICEA.K0.INIT 1111110011011100 word: SLICEA.K1.INIT 0100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R18C28:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 V01N0001 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 W1_H02E0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: A3 H00L0100 arc: A5 S1_V02N0301 arc: A7 S1_V02N0301 arc: B3 V02S0101 arc: B5 H02W0301 arc: B7 H02W0301 arc: C3 H00R0100 arc: C5 V02N0001 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 H01E0101 arc: D5 V00B0000 arc: D7 H02E0001 arc: E1_H01E0101 Q0 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: M0 V00B0100 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q0 arc: N3_V06N0203 F7 arc: S3_V06S0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010001011110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R18C29:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 H01E0101 arc: E3_H06E0103 S3_V06N0103 arc: H00R0000 V02N0601 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S3_V06N0003 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: H01W0000 Q0 arc: M0 H02W0601 arc: M2 W1_H02E0601 arc: M4 H02E0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0001 Q2 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 arc: V01S0000 Q2 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R18C2:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 V06S0003 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0501 E1_H02W0501 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V01S0000 Q0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C30:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0701 V02S0701 arc: H00L0000 N1_V02S0201 arc: H00R0100 V02S0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 H06W0303 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0303 E3_H06W0303 arc: V00T0100 H02W0301 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 V02S0601 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: B0 E1_H02W0101 arc: B1 V00T0000 arc: B2 E1_H02W0301 arc: B3 V02S0101 arc: C0 H00L0000 arc: C1 E1_H02W0601 arc: C2 S1_V02N0401 arc: C3 E1_H02W0601 arc: C6 V00B0100 arc: C7 V02S0001 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02N0201 arc: D2 N1_V02S0201 arc: D3 W1_H02E0201 arc: D6 H02E0001 arc: D7 W1_H02E0001 arc: E1_H01E0001 F6 arc: E1_H02E0501 F7 arc: E3_H06E0003 F3 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 F7 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: N1_V02N0501 F7 arc: N3_V06N0203 F7 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: V00B0100 F7 arc: V00T0000 Q0 arc: V01S0000 Q4 arc: V01S0100 F7 arc: W1_H02W0501 F7 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1100111111000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100111111000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R18C31:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 H01E0001 arc: E1_H02E0701 V02N0701 arc: H00L0100 E1_H02W0301 arc: H00R0100 H02E0701 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06W0303 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E1_H01W0100 arc: V00T0000 V02N0401 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 N1_V01S0100 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: CE0 H00R0100 arc: CE2 H00L0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M4 E1_H01E0101 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0001 Q0 arc: V00B0000 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R18C32:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 S1_V02N0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02E0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 W3_H06E0303 arc: A1 N1_V02S0501 arc: A5 Q5 arc: A7 H00R0000 arc: B1 V02S0301 arc: B5 H00L0000 arc: B6 N1_V01S0000 arc: B7 V02S0701 arc: C1 H00L0100 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D5 W1_H02E0001 arc: D6 V00B0000 arc: D7 V02S0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: M0 H02W0601 arc: M1 H00R0100 arc: M2 H02W0601 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0701 Q5 arc: S3_V06S0103 F1 arc: V00T0100 F1 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000110000000000 word: SLICED.K0.INIT 1100111100000000 word: SLICED.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C33:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02S0601 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0303 E1_H02W0501 arc: A1 H02W0701 arc: A2 H02W0701 arc: A5 W1_H02E0701 arc: A6 V02S0101 arc: B0 H00R0100 arc: B1 V02N0301 arc: B2 V02N0301 arc: B5 V01S0000 arc: B6 V02N0501 arc: C0 H00L0100 arc: C1 H00L0000 arc: C2 H00L0000 arc: C4 H02E0601 arc: C5 V02N0201 arc: C6 E1_H01E0101 arc: C7 V00T0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D4 V02S0601 arc: D5 V00B0000 arc: D6 S1_V02N0401 arc: D7 H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E1_H02E0701 F5 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F4 arc: N1_V02N0701 Q7 arc: S1_V02S0701 F7 arc: S3_V06S0303 F6 arc: V01S0000 F4 arc: V01S0100 F1 arc: W1_H02W0701 F7 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 0000101100000000 word: SLICED.K0.INIT 1010110000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1111111111110011 word: SLICEA.K1.INIT 1111111111101111 word: SLICEB.K0.INIT 1111111111111110 word: SLICEB.K1.INIT 1111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C34:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02S0301 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0303 V06S0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A6 V02N0101 arc: B3 H00L0000 arc: B5 H00R0000 arc: B6 V00B0100 arc: B7 W1_H02E0301 arc: C0 H00L0100 arc: C1 H00R0100 arc: C3 S1_V02N0601 arc: C4 V01N0101 arc: C5 V02N0001 arc: C6 S1_V02N0201 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V00T0100 arc: D3 W1_H02E0001 arc: D4 H02W0001 arc: D5 V00B0000 arc: D6 N1_V02S0401 arc: D7 H02E0201 arc: E1_H01E0101 F1 arc: E1_H02E0101 F3 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F7 arc: H01W0100 F7 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 F5 arc: V00B0100 F7 arc: V01S0100 Q0 arc: W1_H02W0601 F4 arc: W3_H06W0003 Q0 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011111111111111 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1111111100001111 word: SLICED.K0.INIT 0000110100001111 word: SLICED.K1.INIT 0000000000000011 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000001100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R18C35:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0303 N3_V06S0303 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0301 arc: V00T0100 H02W0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N3_V06S0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 N3_V06S0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: A1 H02E0701 arc: A5 H02W0701 arc: B1 H02W0301 arc: B3 V02S0301 arc: B5 H02W0301 arc: C1 V02N0401 arc: C3 V02S0401 arc: C5 V00T0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D3 H02E0001 arc: D5 V00B0000 arc: E1_H01E0101 Q6 arc: E1_H02E0401 Q6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: H01W0100 Q6 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0101 F1 arc: W1_H02W0501 F5 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111111001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R18C36:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 V02S0201 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02E0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02S0001 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V06N0203 arc: W1_H02W0701 S3_V06N0203 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0103 N1_V01S0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A1 W1_H02E0501 arc: A3 V00B0000 arc: B1 V02S0301 arc: B3 H02E0301 arc: B4 H00L0000 arc: C1 E1_H02W0601 arc: C3 V02S0401 arc: C4 H02E0601 arc: C5 H01E0001 arc: CE2 H00L0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D3 V00B0100 arc: D4 V02S0601 arc: D5 H00R0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M0 W1_H02E0601 arc: M2 H02W0601 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: N3_V06N0203 Q4 arc: S3_V06S0303 Q6 arc: V00B0100 F5 arc: V01S0000 Q4 arc: W1_H02W0001 F0 arc: W1_H02W0601 Q6 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000110011001100 word: SLICEC.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1110101011101000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R18C37:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 H02E0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02S0301 arc: W1_H02W0601 V02S0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: A1 H01E0001 arc: A2 H00L0100 arc: A3 V00T0000 arc: A4 E1_H01W0000 arc: A5 W1_H02E0701 arc: A6 H00R0000 arc: A7 H00L0000 arc: B1 H02E0101 arc: B2 H00R0100 arc: B3 V02S0101 arc: B4 H01E0101 arc: B5 N1_V02S0501 arc: B6 S1_V02N0701 arc: B7 H02W0301 arc: C1 S1_V02N0401 arc: C2 H02E0401 arc: C3 V02N0601 arc: C4 E1_H02W0401 arc: C5 V00B0100 arc: C6 E1_H01E0101 arc: C7 F6 arc: CE1 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D2 E1_H02W0201 arc: D3 V02N0001 arc: D4 H01W0000 arc: D5 N1_V02S0401 arc: D6 V01N0001 arc: D7 H01W0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: E1_H02E0401 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q2 arc: N1_V02N0201 Q2 arc: V00T0000 Q2 arc: V01S0000 F7 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000010000100001 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 1010111100100011 word: SLICEC.K0.INIT 1101110100001101 word: SLICEC.K1.INIT 0000000011100000 word: SLICEB.K0.INIT 0100110011111111 word: SLICEB.K1.INIT 0000000000100000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R18C38:PLC2 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 V06S0003 arc: H00L0000 H02W0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0000 arc: A1 H00R0000 arc: A2 V01N0101 arc: A3 N1_V02S0701 arc: A4 E1_H01W0000 arc: A5 V00T0000 arc: A7 W1_H02E0501 arc: B0 H01W0100 arc: B1 V02S0301 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 W1_H02E0301 arc: B5 V02S0501 arc: B6 V01S0000 arc: B7 H02E0101 arc: C0 H00R0100 arc: C1 H00L0100 arc: C2 H02W0601 arc: C3 W1_H02E0601 arc: C4 E1_H01E0101 arc: C5 S1_V02N0001 arc: C6 N1_V02S0001 arc: C7 H02E0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 F0 arc: D2 S1_V02N0201 arc: D3 V00B0100 arc: D4 V01N0001 arc: D5 H01W0000 arc: D6 V02S0401 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F3 arc: E1_H02E0101 F1 arc: E1_H02E0701 F5 arc: E3_H06E0103 F1 arc: E3_H06E0203 F7 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F2 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 arc: V01S0000 F7 arc: V01S0100 F1 word: SLICEA.K0.INIT 1000010000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 1001000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 1001000000001001 word: SLICEB.K1.INIT 1000010000100001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R18C39:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0203 N1_V01S0000 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H02W0701 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 S3_V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: A3 V01N0101 arc: B3 V02S0101 arc: C3 H00R0100 arc: CE0 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D3 H02W0201 arc: F3 F3_SLICE arc: H01W0000 Q0 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F3 arc: S1_V02S0601 Q4 arc: V01S0100 Q6 arc: W1_H02W0001 Q0 arc: W1_H02W0601 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100111101000101 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R18C3:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 N3_V06S0203 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: CE0 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: N1_V02N0401 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C40:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0101 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 H01E0101 arc: V00B0000 S1_V02N0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 S3_V06N0203 arc: E1_H02E0201 W3_H06E0103 arc: N3_V06N0003 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 H02E0701 arc: A5 N1_V02S0101 arc: A6 H02W0501 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 N1_V01S0000 arc: B5 E1_H02W0301 arc: B6 H01E0101 arc: B7 S1_V02N0701 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 H02E0601 arc: C5 V00T0000 arc: C6 H02E0401 arc: C7 F6 arc: CLK1 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 H00L0100 arc: D5 V02N0601 arc: D6 S1_V02N0401 arc: D7 V02S0401 arc: E1_H01E0001 Q1 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0101 Q2 arc: N1_V02N0301 Q3 arc: N1_V02N0401 F6 arc: S3_V06S0203 F7 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 1011100000000000 word: SLICED.K1.INIT 1111000011110011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R18C41:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 V06S0103 arc: H00L0000 S1_V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0100 H02W0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06E0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 V01N0001 arc: W3_H06W0303 N3_V06S0303 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 W1_H02E0701 arc: A5 N1_V02S0101 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B4 N1_V02S0701 arc: B5 H02W0301 arc: B6 V02S0701 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 V02N0201 arc: C5 E1_H02W0601 arc: C6 V00T0000 arc: CE3 W1_H02E0101 arc: CLK1 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 H01E0101 arc: D3 H01E0101 arc: D4 H02E0001 arc: D5 V02N0601 arc: D6 H00L0100 arc: D7 H00R0100 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q3 arc: LSR1 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: N1_V01N0001 Q1 arc: S3_V06S0303 Q6 arc: V01S0100 Q0 arc: W1_H02W0001 Q2 word: SLICED.K0.INIT 1100000011110011 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R18C42:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V01N0001 arc: E3_H06E0203 V06S0203 arc: H00R0100 V02S0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0401 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A2 V02N0701 arc: B0 H02E0301 arc: B2 H00R0100 arc: B3 V02S0301 arc: B4 W1_H02E0301 arc: B6 N1_V01S0000 arc: C0 H02E0601 arc: C2 N1_V02S0601 arc: C3 N1_V01N0001 arc: C4 V00T0000 arc: C6 E1_H02W0401 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V01S0100 arc: D2 S1_V02N0201 arc: D3 F2 arc: D4 H02W0201 arc: D5 V02N0601 arc: D6 H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M4 V00B0100 arc: M6 W1_H02E0401 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F0 arc: S1_V02S0001 F2 arc: S1_V02S0201 F2 arc: S1_V02S0401 F6 arc: V01S0000 F3 arc: V01S0100 Q2 arc: W1_H02W0201 F2 arc: W1_H02W0601 F4 word: SLICEB.K0.INIT 1111111100101010 word: SLICEB.K1.INIT 0011000011111100 word: SLICEA.K0.INIT 0011001100001111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 1100111100000011 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111001100000011 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R18C43:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 V02N0301 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H01E0101 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 E1_H02W0701 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V01N0101 arc: E1_H02E0701 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0303 N3_V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A4 W1_H02E0701 arc: A5 H02E0501 arc: A7 N1_V01N0101 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B2 E1_H02W0101 arc: B3 E1_H02W0101 arc: B4 V02S0501 arc: B5 H02E0101 arc: B6 E1_H02W0301 arc: B7 W1_H02E0101 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 V00B0100 arc: C5 H01E0001 arc: C6 V02N0001 arc: C7 H02E0401 arc: CE3 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 E1_H02W0201 arc: D5 V02N0601 arc: D6 W1_H02E0001 arc: D7 H00L0100 arc: E1_H01E0101 Q3 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q1 arc: LSR1 W1_H02E0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: N1_V01N0101 Q6 arc: S1_V02S0001 Q0 arc: S1_V02S0601 Q6 arc: V01S0000 Q2 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R18C44:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 H02E0301 arc: H00R0100 V02N0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 W1_H02E0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N1_V01S0100 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0701 W3_H06E0203 arc: W3_H06W0003 V01N0001 arc: W3_H06W0203 V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A0 E1_H02W0701 arc: A1 E1_H02W0701 arc: A2 E1_H02W0701 arc: A3 E1_H02W0701 arc: A4 V02S0301 arc: A5 S1_V02N0301 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B2 E1_H02W0301 arc: B3 E1_H02W0301 arc: B4 E1_H02W0101 arc: B5 V02N0701 arc: B6 V02S0701 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 E1_H02W0401 arc: C5 V02S0201 arc: C6 V02N0201 arc: CLK1 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 V02N0401 arc: D5 V00B0000 arc: D6 V02S0401 arc: D7 H00L0100 arc: E1_H01E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: LSR1 V00B0100 arc: M6 H02E0401 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 Q3 arc: S1_V02S0401 F6 arc: V01S0100 Q1 arc: W1_H02W0201 Q2 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R18C45:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 H01E0101 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 H01E0101 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02N0701 arc: S3_V06S0203 W3_H06E0203 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A2 S1_V02N0501 arc: A3 S1_V02N0501 arc: A4 V02N0301 arc: A5 E1_H02W0501 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 V02S0701 arc: B5 V02S0501 arc: B6 V00T0000 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02S0401 arc: C4 V00T0100 arc: C5 V02S0001 arc: C6 V02S0201 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: D6 H02E0001 arc: D7 H00L0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: LSR1 W1_H02E0501 arc: M6 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: N1_V02N0301 Q1 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R18C46:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 V01N0101 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 V02N0301 arc: A5 H02W0501 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: B4 V02S0501 arc: B5 E1_H02W0301 arc: B7 V00B0100 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 V00T0100 arc: C5 H02E0401 arc: C7 S1_V02N0201 arc: CLK1 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V01S0100 arc: D3 V01S0100 arc: D4 H02W0201 arc: D5 V00B0000 arc: D7 H02E0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR1 V00T0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: S1_V02S0501 F7 arc: V01S0000 F7 arc: V01S0100 F7 arc: W1_H02W0201 Q0 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R18C47:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 H01E0001 arc: H00L0000 W1_H02E0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0601 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: A3 N1_V02S0701 arc: B0 V02S0101 arc: B1 V00T0000 arc: B3 H00R0000 arc: C0 H00L0000 arc: C1 V02S0601 arc: C3 E1_H02W0401 arc: C4 V02S0001 arc: C5 H02W0601 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V02S0001 arc: D3 V02N0001 arc: D4 H00L0100 arc: D5 V00B0000 arc: D6 H02E0001 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H02E0201 F2 arc: E1_H02E0501 F7 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: S1_V02S0101 F1 arc: S3_V06S0303 Q6 arc: V00B0000 F4 arc: V00T0000 Q0 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R18C48:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 H02E0201 arc: H00R0000 V02N0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H01E0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0401 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A1 W1_H02E0501 arc: A2 V02S0501 arc: A7 H02W0701 arc: B1 W1_H02E0101 arc: B2 V02S0301 arc: B3 H00R0100 arc: B7 H02E0101 arc: C1 H02W0601 arc: C2 H00L0000 arc: C3 V02N0401 arc: C7 V00B0100 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 V01S0100 arc: D7 H02W0001 arc: E1_H01E0001 Q4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F7 arc: V00T0100 F3 arc: V01S0000 F2 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 0000001100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R18C49:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00L0100 H02E0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0201 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: B0 H01W0100 arc: B2 S1_V02N0101 arc: B4 H02E0101 arc: B5 H00R0000 arc: B6 V02S0501 arc: B7 V00B0000 arc: C0 H00L0000 arc: C1 H00L0100 arc: C2 V02S0401 arc: C4 V02S0001 arc: C5 E1_H02W0401 arc: C6 H02W0601 arc: C7 V00B0100 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 W1_H02E0001 arc: D4 H02W0001 arc: D5 H02W0201 arc: D6 H02W0001 arc: D7 H02W0201 arc: E3_H06E0103 F1 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 Q0 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q6 arc: S3_V06S0303 F5 arc: V00B0000 Q6 arc: V01S0100 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R18C4:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 S3_V06N0303 arc: H00L0100 W1_H02E0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: W1_H02W0501 S3_V06N0303 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 H02E0601 arc: M2 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0201 Q2 arc: N1_V02N0601 Q6 arc: S3_V06S0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C50:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02S0601 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: B2 H02W0301 arc: B3 H00R0000 arc: B6 V00T0000 arc: C0 H02E0601 arc: C1 V02S0401 arc: C2 H00L0000 arc: C3 E1_H02W0401 arc: C5 V00B0100 arc: C6 V02N0201 arc: C7 V02N0201 arc: CE1 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 V02S0001 arc: D3 N1_V02S0201 arc: D5 W1_H02E0001 arc: D6 W1_H02E0201 arc: D7 W1_H02E0001 arc: E1_H01E0001 F3 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0601 Q6 arc: N3_V06N0103 Q2 arc: V01S0000 F7 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R18C51:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 V06N0303 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 V02N0301 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0203 V01N0001 arc: A0 W1_H02E0501 arc: A2 E1_H02W0701 arc: B2 H02E0301 arc: B3 W1_H02E0301 arc: B4 H00L0000 arc: B5 H02W0101 arc: B6 V00T0000 arc: B7 V00B0100 arc: CE1 S1_V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: S1_V02S0101 Q3 arc: S1_V02S0501 Q5 arc: S1_V02S0701 Q7 arc: V01S0000 Q6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C52:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0501 W1_H02E0401 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V01S0100 arc: V00T0000 V02S0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V02N0601 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: B0 E1_H02W0101 arc: B1 H00R0100 arc: B2 H00R0000 arc: B3 V02S0101 arc: B4 S1_V02N0701 arc: B5 V02N0701 arc: B6 V02S0701 arc: B7 V00T0000 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: S1_V02S0001 Q2 arc: S1_V02S0101 Q3 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q7 arc: S1_V02S0701 Q5 arc: V01S0000 Q4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C53:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V02N0301 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 V01N0101 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 H02W0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 N3_V06S0303 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: B0 S1_V02N0301 arc: B1 H00R0100 arc: B2 N1_V02S0301 arc: B3 H00L0000 arc: B4 E1_H02W0101 arc: B5 V02S0701 arc: B6 N1_V01S0000 arc: B7 V00B0100 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q3 arc: S1_V02S0201 Q2 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q6 arc: V01S0000 Q7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C54:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: H00L0000 H02W0001 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H06W0303 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 H06E0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: B0 H00R0100 arc: B1 V02N0301 arc: B2 H02E0301 arc: B3 V02S0101 arc: B4 V00B0100 arc: B5 E1_H02W0101 arc: B6 H02W0301 arc: B7 V00B0000 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q0 arc: S1_V02S0301 Q3 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q6 arc: S1_V02S0701 Q7 arc: V01S0000 Q4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C55:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 E1_H01W0000 arc: H00L0000 V02N0001 arc: H00L0100 H02E0301 arc: H00R0100 W1_H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N3_V06S0303 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 V01N0101 arc: V00B0100 V02S0301 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 V02N0501 arc: H01W0100 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: B0 H00R0100 arc: B1 H01W0100 arc: B6 S1_V02N0701 arc: B7 V01S0000 arc: C4 V00T0000 arc: C5 W1_H02E0401 arc: C6 V00B0100 arc: C7 V00T0100 arc: CE0 H00L0000 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D4 E1_H02W0001 arc: D5 E1_H02W0201 arc: D6 H00L0100 arc: D7 N1_V02S0601 arc: E1_H01E0101 F4 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N3_V06N0303 Q6 arc: S1_V02S0101 Q1 arc: V01S0000 Q6 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R18C56:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02E0401 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 V02N0001 arc: V00B0100 W1_H02E0701 arc: V00T0100 H02E0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: A3 V00B0000 arc: A5 V00T0100 arc: B0 V02N0301 arc: B3 N1_V02S0301 arc: B5 H00L0000 arc: B6 S1_V02N0501 arc: C0 H00L0100 arc: C3 W1_H02E0401 arc: C5 V00B0100 arc: C6 N1_V02S0001 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H00R0000 arc: D3 W1_H02E0001 arc: D5 H02E0201 arc: D6 E1_H02W0001 arc: D7 H02W0201 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 Q0 arc: N1_V02N0701 Q5 arc: V01S0000 Q3 arc: V01S0100 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111000000010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111111000000010 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R18C57:PLC2 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0301 H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02E0401 arc: V00B0100 V02S0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0203 N3_V06S0203 arc: B0 V00B0000 arc: B1 H01W0100 arc: B6 H02W0301 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 V02S0401 arc: C6 N1_V02S0001 arc: C7 N1_V02S0201 arc: CE0 H00R0100 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H00R0000 arc: D6 W1_H02E0001 arc: D7 N1_V02S0601 arc: E3_H06E0103 F1 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q0 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q0 arc: N1_V02N0601 Q4 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q6 arc: S3_V06S0003 Q0 arc: V01S0000 Q6 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R18C58:PLC2 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S1_V02N0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 .tile R18C59:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0001 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 .tile R18C5:PLC2 arc: E1_H02E0401 E1_H01W0000 arc: H00L0000 N1_V02S0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: S1_V02S0101 N3_V06S0103 arc: V00T0100 V02S0501 arc: V01S0000 S3_V06N0103 arc: A3 V00B0000 arc: A4 E1_H02W0701 arc: A5 E1_H01W0000 arc: B3 W1_H02E0301 arc: B4 V00B0100 arc: B5 V02N0501 arc: C3 H00R0100 arc: C4 H02W0601 arc: C5 V00T0100 arc: CE0 H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: D4 H01W0000 arc: D5 H02E0201 arc: E1_H02E0601 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0203 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 E1_H02W0601 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 arc: V00B0100 F5 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R18C60:PLC2 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06E0203 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 .tile R18C61:PLC2 arc: S3_V06S0203 W3_H06E0203 .tile R18C63:PLC2 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 H06E0203 .tile R18C65:PLC2 arc: E3_H06E0103 W3_H06E0103 .tile R18C66:PLC2 arc: S3_V06S0003 W3_H06E0003 .tile R18C69:PLC2 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 .tile R18C6:PLC2 arc: E1_H02E0701 E3_H06W0203 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 N1_V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 V02N0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02S0601 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E1_H02E0401 Q6 arc: H01W0000 Q4 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 H02W0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V02N0201 Q2 arc: V00T0000 Q0 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C7:PLC2 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H06W0103 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00T0100 H02W0101 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E1_H01W0100 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M2 W1_H02E0601 arc: M4 H02E0401 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: N3_V06N0203 Q4 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C8:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 V02N0101 arc: H00R0100 V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 H06E0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: E1_H02E0001 W3_H06E0003 arc: A7 H00R0000 arc: B7 V00T0000 arc: C7 V02N0201 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 F7 arc: LSR1 E1_H02W0501 arc: M0 H02E0601 arc: M2 V00B0100 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R18C9:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 H02E0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 E1_H01W0000 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: E3_H06E0003 Q0 arc: H01W0000 Q4 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 H02W0601 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0401 Q6 arc: V00T0000 Q2 arc: W1_H02W0001 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R19C10:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02S0201 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 H06W0303 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 N1_V01S0100 arc: W3_H06W0303 E3_H06W0303 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 H02W0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: S1_V02S0401 Q4 arc: V01S0000 Q6 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C11:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V01N0001 arc: H00L0000 H02W0201 arc: H00R0000 V02S0601 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 H02E0401 arc: V00B0100 H02W0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0401 E1_H02W0401 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0203 S3_V06N0203 arc: B3 H01W0100 arc: B5 H00L0000 arc: B7 H02W0101 arc: C3 H00L0000 arc: C5 V00T0000 arc: C7 V00B0100 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 V00B0000 arc: D7 N1_V02S0601 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0203 Q7 arc: V01S0000 Q3 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111001111000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100111111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R19C12:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 H02E0001 arc: H00R0000 V02N0401 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0203 S3_V06N0203 arc: A1 V01N0101 arc: A4 F5 arc: A5 V00T0000 arc: A7 H00R0000 arc: B1 V00B0000 arc: B4 F1 arc: B5 V02S0701 arc: B7 H02W0101 arc: C1 H00L0000 arc: C4 E1_H02W0601 arc: C5 H02E0401 arc: C7 V02N0001 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D4 V02S0601 arc: D5 H02W0201 arc: D7 H02E0201 arc: E1_H01E0101 F4 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 W1_H02E0301 arc: M2 W1_H02E0601 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N3_V06N0303 F6 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000110100001000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000110100001000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R19C13:PLC2 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 S1_V02N0001 arc: H00R0100 V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 S3_V06N0103 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 H02W0701 arc: V00T0100 V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 E1_H01W0100 arc: B0 H02E0301 arc: B1 V00T0000 arc: B4 V01S0000 arc: B6 E1_H02W0301 arc: C0 V02N0601 arc: C1 H02E0401 arc: C4 V00B0100 arc: C5 F4 arc: C6 H02W0401 arc: C7 F6 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 V01S0100 arc: D4 H02E0001 arc: D5 H01W0000 arc: D6 H02E0001 arc: D7 H00R0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F4 arc: E3_H06E0103 F1 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q6 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q4 arc: N1_V02N0701 F7 arc: N3_V06N0303 F5 arc: S1_V02S0101 F1 arc: S1_V02S0401 F4 arc: S3_V06S0103 Q2 arc: S3_V06S0203 F4 arc: V00T0000 Q0 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 0011000000111111 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000000000001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R19C14:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 W1_H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0401 W1_H02E0401 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02E0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: B5 W1_H02E0101 arc: B7 H02W0101 arc: C5 H02W0401 arc: C7 V00T0100 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D5 S1_V02N0401 arc: D7 V00B0000 arc: E1_H01E0101 Q5 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0701 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100111111000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111001111000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R19C15:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02S0201 arc: H00R0100 V02S0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02W0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0701 V06S0203 arc: N1_V02N0001 W3_H06E0003 arc: B1 V00T0000 arc: B3 H02W0101 arc: B7 V00B0000 arc: C1 H02W0401 arc: C3 H02W0401 arc: C7 V00B0100 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D3 V02N0201 arc: D7 H00R0100 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0301 Q1 arc: S1_V02S0701 Q7 arc: V01S0100 Q3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111111000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100111111000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R19C16:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 H02E0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H06E0203 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 V06S0303 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 N1_V02S0301 arc: A5 E1_H02W0701 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 V02N0501 arc: B5 W1_H02E0301 arc: B7 N1_V02S0701 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V02N0201 arc: C5 V00B0100 arc: C6 H02W0601 arc: C7 F6 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 N1_V02S0601 arc: D6 V02N0401 arc: D7 H02W0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q1 arc: E3_H06E0003 Q0 arc: E3_H06E0203 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR0 V00T0000 arc: LSR1 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q3 arc: N3_V06N0003 Q0 arc: S1_V02S0601 F6 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1111001100110011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R19C17:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02W0201 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 E3_H06W0303 arc: A2 H01E0001 arc: A6 V02N0301 arc: A7 H02W0501 arc: B1 V02S0101 arc: B2 W1_H02E0101 arc: B6 H02W0301 arc: B7 H02E0101 arc: C1 H00L0000 arc: C2 H00L0100 arc: C6 V00B0100 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CE2 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 H00R0000 arc: D6 S1_V02N0401 arc: D7 V00B0000 arc: E1_H02E0401 F6 arc: E3_H06E0103 F2 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M2 V00T0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V02N0601 Q4 arc: S1_V02S0301 Q1 arc: S3_V06S0203 Q4 arc: V01S0100 Q4 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0011111101011111 word: SLICED.K1.INIT 1100000010100000 word: SLICEB.K0.INIT 0011111101011111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R19C18:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0101 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 V01N0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N1_V01S0100 arc: S3_V06S0103 H06W0103 arc: V00B0100 H02W0701 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02S0701 arc: A1 V02S0501 arc: A2 H00L0100 arc: A3 H02E0501 arc: A5 V00T0100 arc: A7 E1_H01W0000 arc: B0 H02E0301 arc: B1 H02W0301 arc: B2 V02S0301 arc: B3 H02E0101 arc: B5 V01S0000 arc: B7 E1_H02W0101 arc: C0 H02E0601 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H02E0601 arc: C5 V00B0100 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 S1_V02N0201 arc: D5 V02N0601 arc: D7 W1_H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M4 H02W0401 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F3 arc: N1_V02N0201 F2 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q6 arc: V00T0100 F1 arc: V01S0000 F0 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 0011111101011111 word: SLICEA.K0.INIT 0011111101011111 word: SLICEA.K1.INIT 0011010111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111111111110111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R19C19:PLC2 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 N1_V02S0701 arc: N3_V06N0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 V00T0100 arc: A5 H02E0701 arc: A6 V02S0301 arc: A7 H00L0000 arc: B0 V02N0301 arc: B1 V02N0101 arc: B2 V02N0101 arc: B3 V02N0301 arc: B4 S1_V02N0701 arc: B5 H02E0301 arc: B6 V02N0701 arc: B7 S1_V02N0501 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 H02W0601 arc: C6 V02N0001 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK1 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 S1_V02N0401 arc: D5 V02N0601 arc: D6 H02W0001 arc: D7 W1_H02E0201 arc: E1_H01E0101 F6 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q3 arc: N3_V06N0003 Q0 arc: S3_V06S0103 Q2 arc: W1_H02W0101 Q1 word: SLICED.K0.INIT 1010000011000000 word: SLICED.K1.INIT 0011010111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R19C20:PLC2 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 H02W0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H02E0401 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0601 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 H02E0701 arc: A5 V00T0000 arc: A7 H02E0501 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 H00R0000 arc: B5 W1_H02E0101 arc: B7 H02E0301 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 N1_V02S0201 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CLK1 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 H02W0001 arc: D5 V00B0000 arc: D7 V02S0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q2 arc: E1_H02E0101 F1 arc: E1_H02E0201 F0 arc: E1_H02E0301 Q3 arc: E3_H06E0003 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q3 arc: LSR0 W1_H02E0501 arc: LSR1 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q0 arc: S3_V06S0103 Q2 arc: V01S0000 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R19C21:PLC2 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 H01E0001 arc: E3_H06E0003 V01N0001 arc: H00R0100 V02S0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V06S0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 W1_H02E0701 arc: A1 W1_H02E0701 arc: A2 W1_H02E0701 arc: A3 W1_H02E0701 arc: A4 W1_H02E0701 arc: A5 V02S0101 arc: A7 V00T0100 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V02N0701 arc: B7 V00T0000 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 N1_V02S0201 arc: C5 S1_V02N0001 arc: C7 E1_H01E0101 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CLK1 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V02S0601 arc: D5 H02W0001 arc: D7 F2 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F1 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q1 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q0 arc: S1_V02S0301 Q1 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R19C22:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W1_H02E0301 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02S0201 arc: V00T0000 W1_H02E0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 V02S0601 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 H01E0001 arc: A2 W1_H02E0701 arc: A3 V00T0000 arc: A5 H02E0501 arc: A6 H00R0000 arc: A7 H02E0501 arc: B1 V02S0301 arc: B2 V02N0101 arc: B3 H00R0100 arc: B5 E1_H02W0301 arc: B6 V02N0701 arc: B7 E1_H02W0301 arc: C1 W1_H02E0401 arc: C2 H00L0100 arc: C3 H02E0601 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: C7 V00T0100 arc: D1 W1_H02E0201 arc: D2 V01S0100 arc: D3 V00B0100 arc: D5 V00B0000 arc: D6 V02S0401 arc: D7 V00B0000 arc: E1_H01E0101 F7 arc: E1_H02E0001 F2 arc: E1_H02E0601 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: V00B0100 F5 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 1001000000000000 word: SLICEB.K1.INIT 1000010000000000 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 1111010100110001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000110010101111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R19C23:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0401 W1_H02E0101 arc: E3_H06E0203 V01N0001 arc: H00L0000 N1_V02S0001 arc: H00L0100 H02W0101 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0101 V01N0101 arc: S3_V06S0103 E3_H06W0103 arc: V00T0000 H02E0201 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A2 V00T0000 arc: A3 N1_V02S0501 arc: A4 V02N0301 arc: A6 N1_V01N0101 arc: A7 S1_V02N0301 arc: B0 F1 arc: B2 V02S0301 arc: B3 W1_H02E0301 arc: B4 V00B0100 arc: B6 V01S0000 arc: B7 S1_V02N0501 arc: C0 H00L0100 arc: C1 N1_V01S0100 arc: C2 V02N0601 arc: C3 H02E0601 arc: C4 W1_H02E0401 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 S1_V02N0201 arc: D0 V02N0001 arc: D1 V02S0201 arc: D2 V00T0100 arc: D3 H02E0001 arc: D4 H02W0001 arc: D5 H00R0100 arc: D6 V00B0000 arc: D7 S1_V02N0601 arc: E1_H01E0101 F7 arc: E3_H06E0003 F3 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: N1_V01N0101 F2 arc: N1_V02N0701 F5 arc: N3_V06N0103 F1 arc: N3_V06N0303 F6 arc: S1_V02S0701 F5 arc: V00B0000 F4 arc: V00B0100 F5 arc: V00T0100 F3 arc: V01S0000 F0 arc: W3_H06W0103 F1 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0111001101111111 word: SLICEC.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0111001101111111 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0100111101111111 word: SLICEB.K1.INIT 0010101010101010 word: SLICED.K0.INIT 0000100000000000 word: SLICED.K1.INIT 1011000010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R19C24:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A6 N1_V01N0101 arc: A7 H00L0000 arc: B6 V01S0000 arc: B7 H02W0301 arc: C6 H02E0401 arc: C7 H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D6 H02E0001 arc: D7 H00L0100 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q2 arc: N1_V02N0501 F7 arc: N1_V02N0601 F6 arc: V01S0000 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1000010000100001 word: SLICED.K1.INIT 1000010000100001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R19C25:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0003 N1_V02S0001 arc: V00B0000 V02N0201 arc: V00B0100 V02N0101 arc: W1_H02W0301 N1_V01S0100 arc: E1_H01E0001 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: B3 H00L0000 arc: C3 V02N0601 arc: CE0 H02E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: E1_H01E0101 Q6 arc: E1_H02E0201 Q0 arc: F3 F3_SLICE arc: M0 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0101 F3 arc: N3_V06N0003 F3 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R19C26:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 N1_V02S0201 arc: H00R0100 S1_V02N0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H01E0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 E1_H02W0401 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0301 V02S0301 arc: N1_V02N0301 W3_H06E0003 arc: W3_H06W0203 V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: CE0 W1_H02E0101 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q0 arc: E3_H06E0303 Q6 arc: H01W0100 Q4 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: S1_V02S0001 Q2 arc: V01S0000 Q6 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R19C27:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 W1_H02E0201 arc: H00L0100 H02E0301 arc: H00R0000 H02W0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 H01E0001 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0301 S1_V02N0301 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: A3 H00L0100 arc: A5 W1_H02E0501 arc: A6 E1_H02W0701 arc: B1 V02S0101 arc: B3 V02N0101 arc: B5 V01S0000 arc: B6 V02N0501 arc: C0 W1_H02E0401 arc: C1 F6 arc: C2 V02N0601 arc: C3 H02E0601 arc: C5 H02E0601 arc: C6 V00T0100 arc: C7 V00T0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02E0201 arc: D2 V00B0100 arc: D3 H00R0000 arc: D5 V00B0000 arc: D6 V02S0601 arc: D7 H01W0000 arc: E1_H01E0001 F5 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 F6 arc: H01W0100 F1 arc: LSR0 H02E0501 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S3_V06S0003 F3 arc: S3_V06S0103 F2 arc: V01S0000 F2 arc: V01S0100 F2 arc: W3_H06W0103 F2 arc: W3_H06W0203 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000100000 word: SLICED.K0.INIT 0100000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0000000000100000 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 0011001111110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R19C28:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 V06N0303 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: V00T0000 H02E0001 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H02W0601 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: A1 E1_H01E0001 arc: B1 V00T0000 arc: C1 W1_H02E0601 arc: CE1 W1_H02E0101 arc: CE2 S1_V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: E1_H01E0001 Q6 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: M2 E1_H02W0601 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0101 F1 arc: S3_V06S0103 Q2 arc: W1_H02W0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000100000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R19C29:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 N1_V01S0000 arc: H00R0100 V02N0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V01S0100 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: CE0 H02W0101 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: S3_V06S0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R19C2:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: N1_V02N0201 H02W0201 arc: S1_V02S0301 H02E0301 arc: S3_V06S0103 N1_V01S0100 .tile R19C30:PLC2 arc: E1_H02E0101 V02N0101 arc: E3_H06E0303 H01E0101 arc: H00L0100 V02S0301 arc: H00R0100 H02W0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 E1_H02W0501 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 E3_H06W0303 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0103 arc: A5 V00B0000 arc: A7 W1_H02E0701 arc: B1 V02N0301 arc: B4 N1_V01S0000 arc: B5 H02E0301 arc: B7 H01E0101 arc: C0 N1_V01S0100 arc: C1 H00L0100 arc: C4 H02E0401 arc: C5 E1_H01E0101 arc: C7 H02E0601 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V00B0100 arc: D4 V02N0601 arc: D5 V02S0401 arc: D7 H02E0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: N3_V06N0203 F4 arc: S3_V06S0003 F0 arc: S3_V06S0303 F5 arc: V01S0000 F5 arc: W3_H06W0003 F0 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000111111 word: SLICEC.K1.INIT 0111000000000000 word: SLICEA.K0.INIT 0000111111111111 word: SLICEA.K1.INIT 0011111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R19C31:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 V02N0601 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02N0201 arc: V00B0100 V02N0101 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A7 H00L0000 arc: B7 V00B0000 arc: C7 V02S0201 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D7 S1_V02N0401 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 V00B0100 arc: M5 H00L0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: N1_V02N0301 Q3 arc: N3_V06N0003 Q3 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 0111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R19C32:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 H01E0001 arc: H00L0000 N1_V02S0001 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A1 V02S0701 arc: B1 E1_H02W0101 arc: C1 N1_V01S0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: MUXCLK2 CLK0 arc: S3_V06S0103 F1 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0001000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R19C33:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0201 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H01E0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 N1_V02S0501 arc: V00T0100 S1_V02N0701 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0601 W3_H06E0303 arc: A2 V02N0501 arc: A3 V00T0000 arc: A4 H02E0701 arc: A5 H02E0501 arc: A7 H02W0501 arc: B0 E1_H02W0301 arc: B2 H02E0101 arc: B3 H01W0100 arc: B4 W1_H02E0301 arc: B5 H00L0000 arc: B7 V02S0501 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 W1_H02E0601 arc: C3 N1_V01S0100 arc: C4 E1_H02W0401 arc: C5 H01E0001 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 N1_V02S0001 arc: D2 V00T0100 arc: D3 V02S0001 arc: D4 H00R0100 arc: D5 H02E0001 arc: D7 V02N0601 arc: E1_H01E0001 F1 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 F3 arc: H01W0100 F4 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F1 arc: N1_V02N0701 F7 arc: S1_V02S0001 F2 arc: S3_V06S0103 F1 arc: V00T0000 F2 arc: V01S0000 F1 arc: V01S0100 F1 arc: W1_H02W0101 F1 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000010101010 word: SLICEC.K0.INIT 0000000100000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 1100000011001111 word: SLICEA.K1.INIT 0000111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R19C34:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 H01E0001 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 H06W0303 arc: V00B0100 V02N0301 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 S3_V06N0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 N1_V01S0100 arc: A1 V02N0501 arc: A3 E1_H01E0001 arc: A5 N1_V02S0301 arc: B1 H00R0100 arc: B3 H01W0100 arc: B4 H00L0000 arc: B5 H00R0000 arc: B6 V02S0501 arc: C0 H00L0100 arc: C1 V02N0401 arc: C3 N1_V01S0100 arc: C4 H02W0601 arc: C5 V00T0100 arc: C6 E1_H02W0401 arc: C7 E1_H01E0101 arc: CE0 V02S0201 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 S1_V02N0001 arc: D3 E1_H02W0001 arc: D4 H02E0001 arc: D5 V00B0000 arc: D6 E1_H02W0201 arc: D7 N1_V02S0601 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q6 arc: E3_H06E0103 Q1 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q1 arc: H01W0100 Q6 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q5 arc: N1_V02N0401 F4 arc: N1_V02N0601 Q6 arc: S1_V02S0201 F0 arc: S1_V02S0601 Q6 arc: V00B0000 F4 arc: V01S0000 F7 arc: V01S0100 F0 arc: W1_H02W0001 F0 arc: W1_H02W0201 F2 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000011000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000000001111 word: SLICEA.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 1100000011110000 word: SLICEC.K1.INIT 0010111100100010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R19C35:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 N1_V02S0001 arc: H00L0100 E1_H02W0101 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00L0100 arc: B1 V00B0000 arc: C1 H00L0000 arc: D1 V00B0100 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 H02E0201 arc: M4 V00T0100 arc: M5 H00R0100 arc: M6 V00T0100 arc: S1_V02S0301 F3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000010000001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R19C36:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 E1_H02W0201 arc: H00L0100 S1_V02N0301 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 E1_H02W0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H01W0100 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0201 W3_H06E0103 arc: A7 H00L0000 arc: B4 H02W0301 arc: B6 E1_H02W0301 arc: B7 E1_H02W0101 arc: C4 V00T0100 arc: C6 W1_H02E0401 arc: C7 V00T0000 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 H00L0100 arc: D5 V00B0000 arc: D6 V02S0601 arc: D7 V02S0401 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q0 arc: E3_H06E0103 Q2 arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q0 arc: M0 H02W0601 arc: M2 V00B0100 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q2 arc: S3_V06S0003 Q0 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 1101000100010001 word: SLICEC.K0.INIT 1111000000110011 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R19C37:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02N0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E3_H06W0103 arc: A1 W1_H02E0701 arc: A2 V00B0000 arc: A3 V01N0101 arc: A4 N1_V01N0101 arc: A5 H02W0701 arc: A7 E1_H01W0000 arc: B1 E1_H01W0100 arc: B2 H00R0000 arc: B3 V02N0101 arc: B4 N1_V02S0701 arc: B5 V02N0501 arc: B7 V00B0100 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 H02E0401 arc: C4 V00T0100 arc: C5 H02E0601 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V01S0100 arc: D3 V02N0201 arc: D4 W1_H02E0001 arc: D5 V02N0601 arc: D7 S1_V02N0401 arc: E1_H01E0001 F4 arc: E1_H01E0101 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0100 Q5 arc: LSR1 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q5 arc: N1_V02N0201 F2 arc: N1_V02N0501 Q5 arc: N3_V06N0303 Q5 arc: S1_V02S0501 Q5 arc: V01S0000 Q5 arc: V01S0100 F7 arc: W1_H02W0701 F5 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000001001000001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 1001000000000000 word: SLICEB.K1.INIT 1001000000001001 word: SLICEC.K0.INIT 1000000010101010 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R19C38:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 H01E0001 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02E0301 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02N0601 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A2 V00B0000 arc: A3 H02W0701 arc: B2 H02E0101 arc: B3 V02N0101 arc: C2 N1_V02S0601 arc: C3 H02E0601 arc: CE0 H00L0000 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 V00B0100 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q0 arc: E1_H02E0401 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q6 arc: H01W0100 Q0 arc: M0 E1_H02W0601 arc: M4 V00T0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q6 arc: N1_V02N0001 F2 arc: N1_V02N0401 Q6 arc: V00B0000 Q4 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1000001001000001 word: SLICEB.K1.INIT 1001000000001001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R19C39:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06N0203 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0601 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 H01E0101 arc: H01W0000 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: M0 H02E0601 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q0 arc: N1_V02N0401 Q4 arc: N1_V02N0601 Q4 arc: S3_V06S0003 Q0 arc: V01S0000 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C3:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0701 V02S0701 arc: H00R0000 V02N0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02W0601 arc: W1_H02W0201 N3_V06S0103 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: M2 H02W0601 arc: MUXCLK1 CLK0 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R19C40:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 N1_V02S0001 arc: H00L0100 H02W0101 arc: H00R0000 H02E0401 arc: H00R0100 H02E0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 V01N0001 arc: V00B0000 H02W0601 arc: V00B0100 V02N0301 arc: V00T0100 N1_V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0203 E1_H02W0401 arc: A0 H00L0100 arc: A3 N1_V02S0501 arc: A7 H02W0701 arc: B0 V00B0000 arc: B2 H02W0301 arc: B3 H00L0000 arc: B4 E1_H02W0101 arc: B6 S1_V02N0501 arc: B7 S1_V02N0701 arc: C0 N1_V01N0001 arc: C2 N1_V02S0601 arc: C3 V02S0401 arc: C4 V00T0100 arc: C6 H02E0601 arc: C7 H02E0601 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 H02W0201 arc: D3 H02E0001 arc: D4 H02E0001 arc: D5 F2 arc: D6 H00R0100 arc: D7 V02N0601 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M4 H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F7 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: V01S0100 F6 arc: W1_H02W0201 Q2 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 0000110000111111 word: SLICED.K1.INIT 1001010001001111 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000000100100011 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111010100110001 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R19C41:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E3_H06E0003 H01E0001 arc: H00L0000 V02N0001 arc: H00R0000 W1_H02E0401 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 S3_V06N0303 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0601 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 V01N0101 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: A3 V00B0000 arc: A4 S1_V02N0101 arc: A5 S1_V02N0301 arc: B3 V02N0301 arc: B4 H02E0301 arc: B5 E1_H02W0101 arc: B6 S1_V02N0501 arc: B7 V02N0701 arc: C2 H00L0000 arc: C3 E1_H02W0401 arc: C4 E1_H01E0101 arc: C5 S1_V02N0001 arc: C6 H02E0601 arc: C7 H02W0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 N1_V02S0601 arc: D5 S1_V02N0601 arc: D6 V02N0401 arc: D7 N1_V02S0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F5 arc: E1_H02E0701 F7 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: M2 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F4 arc: V01S0000 F6 arc: V01S0100 Q6 arc: W1_H02W0201 F2 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000110001 word: SLICEC.K1.INIT 1001010001001111 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 0000111100001100 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1010100000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R19C42:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H01E0001 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06E0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0601 E1_H02W0301 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0701 W3_H06E0203 arc: S1_V02S0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: B0 N1_V02S0101 arc: B2 N1_V02S0301 arc: B4 S1_V02N0501 arc: B5 V01S0000 arc: B7 E1_H02W0101 arc: C0 E1_H02W0601 arc: C2 V02S0601 arc: C4 V00B0100 arc: C5 V00T0000 arc: C7 V00B0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 E1_H02W0201 arc: D2 H00R0000 arc: D3 E1_H02W0201 arc: D4 H00L0100 arc: D5 H02E0201 arc: D7 V01N0001 arc: E1_H01E0101 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F5 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M2 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V02N0601 F4 arc: S1_V02S0201 F0 arc: V01S0000 Q4 arc: V01S0100 F2 arc: W1_H02W0401 Q4 arc: W3_H06W0203 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000011001111 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000111100001100 word: SLICEB.K0.INIT 1100111100000011 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R19C43:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V06S0303 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02S0101 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0701 V06S0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A3 H02W0701 arc: B3 W1_H02E0101 arc: B4 N1_V01S0000 arc: B7 V00B0100 arc: C3 H00L0100 arc: C4 V02N0201 arc: C7 V00T0100 arc: CE0 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D2 H01E0101 arc: D3 N1_V02S0201 arc: D4 H00R0100 arc: D5 V02N0601 arc: D6 H01W0000 arc: D7 H02E0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q1 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q6 arc: N1_V02N0101 F1 arc: N1_V02N0601 F6 arc: S1_V02S0401 F6 arc: V01S0000 Q6 arc: W1_H02W0601 F6 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000110010001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R19C44:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 W1_H02E0301 arc: H00L0100 S1_V02N0301 arc: H00R0100 V02S0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 V02N0101 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: A2 E1_H01E0001 arc: B0 H00R0100 arc: B2 H02E0301 arc: B4 V00B0100 arc: B6 E1_H02W0101 arc: B7 V00B0000 arc: C0 F4 arc: C1 H00L0000 arc: C2 V02S0601 arc: C3 H00L0100 arc: C4 E1_H02W0601 arc: C6 H02E0401 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02S0001 arc: D2 N1_V02S0001 arc: D3 W1_H02E0201 arc: D4 V02N0601 arc: D5 V02N0401 arc: D6 H02E0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 F7 arc: E1_H02E0101 F3 arc: E1_H02E0401 Q6 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F3 arc: H01W0100 Q0 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q0 arc: N1_V02N0001 F2 arc: S1_V02S0601 Q6 arc: S3_V06S0003 F3 arc: S3_V06S0303 Q6 arc: V00B0000 Q6 arc: V01S0100 F1 arc: W1_H02W0301 F3 arc: W1_H02W0401 Q6 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 1100111100000011 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1010001010000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000001111001111 word: SLICEC.K0.INIT 0000001111001111 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R19C45:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0601 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0401 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0003 H01E0001 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00T0000 H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 V02N0301 arc: A5 H02W0701 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 N1_V02S0701 arc: B5 H00R0000 arc: B6 S1_V02N0501 arc: B7 H02E0301 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 E1_H01E0101 arc: C5 H02E0601 arc: C6 V00B0100 arc: C7 V00T0000 arc: CLK1 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 H01W0000 arc: D5 E1_H02W0201 arc: D6 H00L0100 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: E1_H02E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 W1_H02E0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0101 Q3 arc: V00B0100 F7 arc: W1_H02W0001 Q2 word: SLICED.K0.INIT 1100110000001111 word: SLICED.K1.INIT 0000111100110011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R19C46:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 V02N0401 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 E1_H02W0601 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 V01N0001 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 V01N0101 arc: A3 V01N0101 arc: A4 V00T0100 arc: A5 V00B0000 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 S1_V02N0501 arc: B5 H00R0000 arc: B7 E1_H02W0101 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 H02E0401 arc: C5 V02N0001 arc: C7 V00T0000 arc: CLK1 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D4 H02E0201 arc: D5 H02W0201 arc: D7 W1_H02E0201 arc: E1_H02E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F7 arc: LSR1 H02W0301 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 F7 arc: V01S0000 Q3 arc: V01S0100 F7 arc: W1_H02W0001 Q0 arc: W1_H02W0201 Q2 arc: W1_H02W0501 F7 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R19C47:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 H01E0001 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 V01N0101 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 H06W0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: N1_V02N0301 W3_H06E0003 arc: A5 H02E0501 arc: B2 H00L0000 arc: B5 E1_H02W0301 arc: B6 S1_V02N0701 arc: B7 V01S0000 arc: C2 N1_V01N0001 arc: C5 V00B0100 arc: C6 H02E0601 arc: C7 H02E0401 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 V02N0201 arc: D5 H02E0001 arc: D6 V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F6 arc: N1_V02N0701 F7 arc: V01S0000 Q6 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000010100001100 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 0000111100001100 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000011111100 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R19C48:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 V02S0601 arc: H00R0100 V02N0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 V01N0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: N1_V02N0601 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A7 N1_V01N0101 arc: B0 N1_V02S0101 arc: B2 H00R0000 arc: B4 W1_H02E0101 arc: B7 S1_V02N0701 arc: C0 F4 arc: C2 H00L0000 arc: C3 N1_V01N0001 arc: C4 H02E0401 arc: C6 V02S0201 arc: C7 E1_H02W0401 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V00B0100 arc: D2 V02N0201 arc: D3 V02S0201 arc: D4 E1_H02W0201 arc: D5 H02E0001 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E3_H06E0003 F3 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: M0 V00T0100 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: S3_V06S0203 F7 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R19C49:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 V02N0301 arc: H00R0100 E1_H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 V01N0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0301 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S3_V06N0203 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0003 E1_H02W0001 arc: A1 H00L0000 arc: A3 E1_H01E0001 arc: A5 N1_V01N0101 arc: A7 H00R0000 arc: B0 V02S0301 arc: B1 H00R0100 arc: B2 H00R0000 arc: B3 E1_H01W0100 arc: B4 H02E0301 arc: B5 V02S0501 arc: B6 V01S0000 arc: B7 H02W0101 arc: C0 E1_H02W0601 arc: C1 H00L0100 arc: C2 E1_H02W0401 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V00B0100 arc: C6 H02E0401 arc: C7 V00B0100 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 S1_V02N0001 arc: D2 H02E0201 arc: D3 S1_V02N0001 arc: D4 H01W0000 arc: D5 V00B0000 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q0 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0000 Q6 arc: H01W0100 F7 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: S1_V02S0001 Q2 arc: S1_V02S0101 F3 arc: S1_V02S0501 F5 arc: V01S0000 Q0 arc: W1_H02W0101 F1 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0101101000111100 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0101101000111100 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0101101000111100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0101101000111100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R19C4:PLC2 arc: E1_H02E0401 S3_V06N0203 arc: H00L0000 V02N0201 arc: N1_V02N0201 H06W0103 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 S3_V06N0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 H02E0701 arc: V00T0100 E1_H02W0101 arc: W1_H02W0601 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0201 arc: D2 H02W0201 arc: D3 V00T0100 arc: E1_H02E0301 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: LSR1 V00B0100 arc: M0 H02W0601 arc: M1 H00L0000 arc: M2 H02W0601 arc: M4 W1_H02E0401 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N3_V06N0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R19C50:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02W0001 arc: H00R0000 N1_V02S0401 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V06N0303 arc: E1_H02E0001 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: W3_H06W0203 S3_V06N0203 arc: A5 H02E0501 arc: B0 V02N0301 arc: B2 V02S0301 arc: B3 H02W0101 arc: B5 H02E0301 arc: B6 V02N0501 arc: B7 V00B0100 arc: C0 V02N0601 arc: C2 E1_H02W0401 arc: C3 S1_V02N0401 arc: C5 H02E0601 arc: C6 V00T0000 arc: C7 V00T0100 arc: CE0 H00L0000 arc: CE1 S1_V02N0201 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V02S0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D5 E1_H02W0001 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0101 Q6 arc: E1_H02E0201 Q0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: M0 E1_H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q3 arc: N1_V02N0501 Q7 arc: N3_V06N0303 F5 arc: V01S0000 Q2 arc: V01S0100 Q7 arc: W1_H02W0101 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000010101010 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R19C51:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02W0101 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H06W0303 arc: V00T0000 W1_H02E0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0501 H01E0101 arc: H01W0100 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A0 H00L0100 arc: A2 V02N0501 arc: A3 V01N0101 arc: A4 W1_H02E0701 arc: A5 V00T0000 arc: A6 H02E0501 arc: A7 H00L0000 arc: B2 N1_V02S0301 arc: B3 V02S0101 arc: B4 H02E0101 arc: B5 V02S0501 arc: B6 N1_V01S0000 arc: B7 V02S0701 arc: E1_H01E0001 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: N1_V01N0001 F5 arc: W1_H02W0301 F3 arc: W1_H02W0401 F6 arc: W1_H02W0601 F4 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R19C52:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0501 V01N0101 arc: H00L0000 V02S0001 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0201 arc: V00T0000 H02E0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 W3_H06E0203 arc: A0 W1_H02E0701 arc: A1 H00L0100 arc: A2 V00T0000 arc: A3 V02N0501 arc: A4 H02E0501 arc: A5 V00B0000 arc: A6 S1_V02N0101 arc: A7 H00R0000 arc: B0 N1_V02S0301 arc: B1 V02S0301 arc: B2 H00L0000 arc: B3 V02S0101 arc: B4 N1_V01S0000 arc: B5 V02S0701 arc: B6 H02E0301 arc: B7 V02S0501 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F3 arc: N1_V01N0001 F6 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: V01S0100 F4 arc: W1_H02W0301 F1 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R19C53:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02S0201 arc: H00R0000 V02N0601 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E3_H06W0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0001 arc: V00T0000 V02S0601 arc: W1_H02W0101 N3_V06S0103 arc: N1_V02N0101 W3_H06E0103 arc: W3_H06W0303 N3_V06S0303 arc: E3_H06E0003 W3_H06E0303 arc: A0 H02E0501 arc: A1 H00R0000 arc: A2 S1_V02N0701 arc: A3 V02N0501 arc: A4 V02N0101 arc: A5 E1_H02W0701 arc: A6 S1_V02N0301 arc: A7 H02W0701 arc: B0 V00B0000 arc: B1 V02S0301 arc: B2 H00L0000 arc: B3 V02S0101 arc: B4 N1_V02S0501 arc: B5 V02S0501 arc: B6 V00T0000 arc: B7 N1_V01S0000 arc: E1_H01E0001 F4 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: S1_V02S0101 F1 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: S1_V02S0701 F5 arc: V01S0000 F6 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R19C54:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02N0001 arc: H00R0000 V02N0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0201 arc: V00T0000 V02S0601 arc: V00T0100 H02E0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V01N0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0303 N3_V06S0303 arc: E3_H06E0103 W3_H06E0103 arc: A0 H00R0000 arc: A1 V02N0701 arc: A2 H02E0701 arc: A3 E1_H02W0501 arc: A4 H02W0501 arc: A5 V02N0301 arc: A6 H00L0000 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 V02S0101 arc: B2 N1_V02S0301 arc: B3 V02S0301 arc: B4 N1_V01S0000 arc: B5 V02S0501 arc: B6 V00T0000 arc: B7 V02S0701 arc: E1_H01E0001 F2 arc: E1_H02E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0101 F1 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 arc: V01S0000 F7 arc: V01S0100 F5 word: SLICED.K0.INIT 1001011010101010 word: SLICED.K1.INIT 1001011010101010 word: SLICEC.K0.INIT 1001011010101010 word: SLICEC.K1.INIT 1001011010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R19C55:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 N1_V01S0000 arc: H00L0000 H02W0001 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0601 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E1_H02W0701 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A0 H00L0000 arc: A1 H00R0000 arc: A2 V02S0701 arc: B0 V00T0000 arc: B1 V02S0101 arc: B6 V00B0100 arc: B7 V01S0000 arc: C6 E1_H01E0101 arc: C7 E1_H01E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D6 F0 arc: D7 H00L0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H00R0000 Q6 arc: H01W0100 Q6 arc: LSR1 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: S1_V02S0001 F2 arc: V01S0000 Q6 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1100111111000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1001011010101010 word: SLICEA.K1.INIT 1001011010101010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R19C56:PLC2 arc: H00L0000 H02W0001 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V01N0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: A1 V02N0501 arc: B1 V02S0101 arc: B6 V00T0000 arc: C1 H02E0601 arc: C6 V02S0001 arc: CE0 H00L0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0101 Q1 arc: F1 F1_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q4 arc: M2 N1_V01N0001 arc: M4 E1_H01E0101 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0201 Q2 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010101010111000 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R19C57:PLC2 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E3_H06W0303 .tile R19C58:PLC2 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 S3_V06N0303 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V01S0000 S3_V06N0103 arc: V01S0100 N3_V06S0303 arc: W3_H06W0203 N3_V06S0203 .tile R19C59:PLC2 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H06W0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: W3_H06W0203 E3_H06W0103 .tile R19C5:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 V02N0001 arc: H00R0100 V02N0701 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: V00T0000 N1_V02S0601 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 N1_V01S0000 arc: CE0 H00L0000 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q6 arc: M0 V00T0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R19C60:PLC2 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0303 S3_V06N0303 .tile R19C61:PLC2 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 S3_V06N0103 arc: W3_H06W0103 E3_H06W0003 .tile R19C62:PLC2 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 S3_V06N0303 .tile R19C63:PLC2 arc: W3_H06W0303 S3_V06N0303 .tile R19C64:PLC2 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 S3_V06N0303 .tile R19C65:PLC2 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 S3_V06N0103 .tile R19C66:PLC2 arc: S3_V06S0203 N1_V02S0401 .tile R19C67:PLC2 arc: N3_V06N0203 S3_V06N0103 arc: W3_H06W0003 S3_V06N0003 .tile R19C69:PLC2 arc: N1_V02N0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 .tile R19C6:PLC2 arc: E1_H02E0101 V02N0101 arc: H00L0000 V02N0201 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 V01N0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 S1_V02N0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 E3_H06W0203 arc: A4 H02W0701 arc: A5 H02W0701 arc: A6 H02W0701 arc: B4 S1_V02N0701 arc: B5 S1_V02N0701 arc: B6 S1_V02N0701 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 H02E0401 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 arc: V01S0000 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111010100110001 word: SLICEC.K1.INIT 1111010100110001 word: SLICED.K0.INIT 1111010100110001 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C7:PLC2 arc: E1_H02E0201 V06S0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: S1_V02S0001 S3_V06N0003 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0101 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 N3_V06S0103 arc: CE0 H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: H01W0000 Q6 arc: M0 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C8:PLC2 arc: E1_H02E0001 V02S0001 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: S3_V06S0003 N1_V02S0301 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0401 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V06S0303 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R19C9:PLC2 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H02W0501 arc: S1_V02S0101 H02W0101 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0701 S3_V06N0203 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R20C10:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 S1_V02N0201 arc: H00R0100 V02N0501 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02S0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: H01W0100 W3_H06E0303 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0303 S3_V06N0303 arc: W3_H06W0003 E3_H06W0003 arc: B1 N1_V02S0301 arc: B3 H00L0000 arc: B5 H00L0000 arc: B7 N1_V01S0000 arc: C1 H00L0000 arc: C3 V02N0401 arc: C5 N1_V02S0001 arc: C7 S1_V02N0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D3 V02S0001 arc: D5 V00B0000 arc: D7 V02S0601 arc: E1_H01E0101 Q5 arc: E1_H02E0101 Q1 arc: E1_H02E0301 Q3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100111111000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R20C11:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0303 V06N0303 arc: H00L0000 H02W0001 arc: H00R0000 V02S0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 H06E0003 arc: V00B0000 V02N0001 arc: V00T0100 W1_H02E0301 arc: W1_H02W0501 V02N0501 arc: A3 V00T0000 arc: A4 N1_V01N0101 arc: B0 E1_H01W0100 arc: B2 E1_H02W0301 arc: B3 H02W0301 arc: B4 H00L0000 arc: B5 N1_V01S0000 arc: B6 H01E0101 arc: C0 H00L0000 arc: C1 E1_H01W0000 arc: C2 H02E0401 arc: C3 V02N0401 arc: C4 V00B0100 arc: C5 V00T0100 arc: C6 W1_H02E0401 arc: C7 F6 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 F0 arc: D2 V02N0001 arc: D3 S1_V02N0201 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V01N0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q6 arc: E1_H02E0001 F0 arc: E1_H02E0201 Q2 arc: E1_H02E0401 F6 arc: E1_H02E0501 F5 arc: E1_H02E0701 F7 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q2 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q5 arc: N1_V02N0001 F2 arc: N1_V02N0701 Q5 arc: N3_V06N0303 F5 arc: S1_V02S0701 F5 arc: S3_V06S0103 F2 arc: S3_V06S0303 F6 arc: V00B0100 F5 arc: V00T0000 F2 arc: V01S0000 F3 arc: V01S0100 F4 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 0100000001110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0011000000111111 word: SLICEA.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R20C12:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 N1_V02S0301 arc: H00R0100 H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 E1_H01W0100 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0301 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 N3_V06S0303 arc: E1_H02E0701 W3_H06E0203 arc: W3_H06W0003 N3_V06S0003 arc: A1 H00L0100 arc: A3 V00T0000 arc: A7 S1_V02N0101 arc: B1 H02W0101 arc: B2 W1_H02E0301 arc: B3 V02S0101 arc: B4 H02E0301 arc: B5 H00R0000 arc: B7 V02N0701 arc: C1 H02W0401 arc: C2 H02E0601 arc: C3 E1_H01W0000 arc: C4 V02N0201 arc: C5 V00T0000 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 S1_V02N0001 arc: D3 H02E0001 arc: D4 V00B0000 arc: D5 H00R0100 arc: D7 V01N0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: E1_H02E0201 Q0 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0000 F4 arc: H01W0000 F2 arc: H01W0100 Q2 arc: M0 W1_H02E0601 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0401 F4 arc: N3_V06N0303 F5 arc: S1_V02S0001 Q0 arc: S1_V02S0601 F4 arc: S3_V06S0003 F0 arc: S3_V06S0203 F4 arc: V00T0000 F2 arc: V00T0100 F3 arc: V01S0000 Q0 arc: V01S0100 Q4 arc: W1_H02W0001 Q0 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0011111100101010 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0000001100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111111110101100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 .tile R20C13:PLC2 arc: H00L0000 H02E0201 arc: H00R0000 V02N0401 arc: N1_V02N0101 H01E0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H01E0001 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 N1_V02S0401 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0003 N3_V06S0003 arc: A1 H02E0501 arc: A5 N1_V01N0101 arc: A7 H00L0000 arc: B1 V00T0000 arc: B2 N1_V02S0101 arc: B4 E1_H02W0301 arc: B5 V01S0000 arc: B7 H02E0301 arc: C1 N1_V02S0601 arc: C2 H00L0000 arc: C3 V02S0401 arc: C4 H02W0601 arc: C5 E1_H01E0101 arc: C7 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V00B0100 arc: D3 F2 arc: D4 H02E0001 arc: D5 S1_V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F4 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F4 arc: S1_V02S0601 Q4 arc: V01S0000 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0010110101111000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0100101101111000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0000000100000010 word: SLICEB.K0.INIT 0011000000111111 word: SLICEB.K1.INIT 0000000000001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R20C14:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 V06S0203 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 V02S0101 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 V01N0101 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0701 arc: E1_H02E0001 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: B1 V00T0000 arc: B3 H00R0100 arc: B7 S1_V02N0701 arc: C1 H00L0100 arc: C3 H00L0100 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D3 H02W0001 arc: D7 V00B0000 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0301 Q1 arc: W1_H02W0701 Q7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100111111000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111111000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R20C15:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 V02N0501 arc: H00L0000 H02E0001 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02S0101 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 N1_V01S0100 arc: B0 N1_V02S0301 arc: B2 H01W0100 arc: B3 V02S0301 arc: C0 H00R0100 arc: C1 H02W0401 arc: C2 V02N0401 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 S1_V02N0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V00B0100 arc: D2 V02N0001 arc: D3 N1_V02S0001 arc: D4 V02S0401 arc: D5 V02S0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F4 arc: E1_H02E0301 F1 arc: E1_H02E0701 F5 arc: E3_H06E0003 F0 arc: E3_H06E0103 F1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: H01W0100 Q3 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F3 arc: N1_V02N0001 Q0 arc: N1_V02N0301 Q3 arc: N3_V06N0003 Q3 arc: N3_V06N0103 F2 arc: S3_V06S0003 F3 arc: V01S0000 F3 arc: V01S0100 F1 arc: W1_H02W0101 F3 arc: W1_H02W0201 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000110000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R20C16:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 H01E0101 arc: H00L0000 H02W0001 arc: H00L0100 H02E0301 arc: H00R0000 V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H01E0101 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H06W0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 N1_V02S0701 arc: A1 N1_V02S0701 arc: A2 N1_V02S0701 arc: A3 N1_V02S0701 arc: A4 S1_V02N0101 arc: A5 V02N0301 arc: A7 V00T0100 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 H01W0100 arc: B3 H01W0100 arc: B4 W1_H02E0301 arc: B5 V02N0701 arc: B7 H02E0101 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V01N0101 arc: C5 E1_H02W0601 arc: C6 Q6 arc: C7 V00T0000 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE3 H00L0000 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 H02E0201 arc: D5 H00L0100 arc: D6 V02N0601 arc: D7 H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q0 arc: E1_H02E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR0 V00B0000 arc: LSR1 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q2 arc: S1_V02S0101 Q1 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1100010001000100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R20C17:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 V06N0303 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 H02E0001 arc: H00L0100 W1_H02E0301 arc: H00R0100 H02W0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 V02N0201 arc: V00T0000 V02S0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 H01E0001 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 H02E0701 arc: A5 V02N0101 arc: A6 V00T0100 arc: A7 N1_V01N0101 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 H00L0000 arc: B5 V02N0701 arc: B6 V02N0501 arc: B7 H02W0301 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 V02S0001 arc: C5 H02W0601 arc: C6 V00T0000 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 S1_V02N0601 arc: D5 H00L0100 arc: D6 V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q0 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q1 arc: LSR0 H02E0301 arc: LSR1 H02E0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q3 arc: V01S0100 Q2 word: SLICED.K0.INIT 1100000010100000 word: SLICED.K1.INIT 1100000010100000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R20C18:PLC2 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: H00L0000 W1_H02E0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 H02W0701 arc: A5 V02S0301 arc: B0 H02E0301 arc: B1 H02E0301 arc: B2 H02E0301 arc: B3 H02E0301 arc: B4 H00L0000 arc: B5 H02W0101 arc: B7 V00B0100 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 H02E0601 arc: C5 V02S0001 arc: C6 V00T0000 arc: C7 F6 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 S1_V02N0601 arc: D5 N1_V02S0601 arc: D6 V00B0000 arc: D7 H02W0201 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q0 arc: N1_V02N0701 F7 arc: N3_V06N0003 Q0 arc: S1_V02S0401 F6 arc: S1_V02S0701 F7 arc: W1_H02W0101 Q3 arc: W1_H02W0501 F7 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1111001100110011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R20C19:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 V02N0001 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 N1_V02S0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 S1_V02N0701 arc: A1 H00R0000 arc: A2 S1_V02N0701 arc: A3 S1_V02N0701 arc: A4 H02E0701 arc: A5 V02N0301 arc: A6 N1_V01N0101 arc: A7 H00L0000 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 H02W0301 arc: B5 V02S0701 arc: B6 V00B0100 arc: B7 H02W0101 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00T0000 arc: C5 H02E0601 arc: C6 N1_V02S0201 arc: C7 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 V02N0401 arc: D5 E1_H02W0201 arc: D6 V02S0401 arc: D7 H02W0001 arc: E1_H01E0001 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: LSR1 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q2 arc: N1_V02N0201 Q0 arc: S1_V02S0301 Q1 arc: V01S0000 F7 arc: V01S0100 F6 word: SLICED.K0.INIT 1100101000000000 word: SLICED.K1.INIT 1100000010100000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R20C20:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 E1_H02W0001 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02N0201 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N1_V02S0601 arc: N1_V02N0101 W3_H06E0103 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0203 W3_H06E0203 arc: A0 H01E0001 arc: A1 N1_V02S0501 arc: A3 V00T0000 arc: A7 N1_V01N0101 arc: B0 H02E0301 arc: B1 V02N0301 arc: B3 N1_V02S0301 arc: B5 H00L0000 arc: B7 F1 arc: C0 E1_H02W0401 arc: C1 H02W0601 arc: C2 H02E0401 arc: C3 F4 arc: C4 V02S0201 arc: C5 F4 arc: C7 W1_H02E0401 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 S1_V02N0001 arc: D2 V02N0001 arc: D3 V02N0201 arc: D4 V02N0601 arc: D5 V00B0000 arc: D7 H02E0001 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 F3 arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F0 arc: N1_V02N0601 F4 arc: N3_V06N0303 Q6 arc: S1_V02S0301 F3 arc: S1_V02S0701 F5 arc: S3_V06S0103 Q2 arc: S3_V06S0303 F5 arc: V01S0000 Q2 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 1111001100110011 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1100010001000100 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1010000011000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111110 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R20C21:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 N1_V02S0301 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0601 H02E0601 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 H02E0601 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 E1_H01W0000 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 V00T0100 arc: A5 V00T0000 arc: A7 N1_V01S0100 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 H02E0101 arc: B5 V02N0501 arc: B7 E1_H02W0101 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V02S0201 arc: C5 E1_H02W0401 arc: C6 V00B0100 arc: C7 F6 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CLK1 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 V02S0601 arc: D5 V02S0401 arc: D6 V02N0401 arc: D7 V01N0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F2 arc: E1_H02E0101 F3 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q2 arc: N1_V02N0301 Q3 arc: N3_V06N0303 F6 arc: S1_V02S0401 F6 arc: W1_H02W0501 F7 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R20C22:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 H02E0201 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 H02W0601 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: A2 W1_H02E0701 arc: A4 H02W0501 arc: B2 E1_H02W0301 arc: B4 V02N0701 arc: B5 H00L0000 arc: C2 H00L0100 arc: C3 H00R0100 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 W1_H02E0001 arc: D3 H02W0201 arc: D4 V02N0601 arc: D5 W1_H02E0001 arc: E1_H01E0001 F3 arc: E3_H06E0003 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 F3 arc: H01W0000 F3 arc: H01W0100 Q0 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0301 F3 arc: S1_V02S0001 F2 arc: S1_V02S0401 F4 arc: V00B0100 F5 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1111011111100110 word: SLICEC.K1.INIT 0000111100110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R20C23:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0401 V02N0401 arc: E3_H06E0103 S3_V06N0103 arc: H00R0100 H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V02S0701 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: C1 H00L0100 arc: C7 V00T0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D7 V00B0000 arc: F1 F1_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: M2 E1_H02W0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0701 F7 arc: S3_V06S0203 F7 arc: V00T0000 Q2 arc: V01S0000 Q1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R20C24:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 E1_H02W0101 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 H02W0501 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A1 V01N0101 arc: A3 E1_H01E0001 arc: B1 H00R0100 arc: B3 H01W0100 arc: B5 H00R0000 arc: B7 V02S0701 arc: C0 H00L0100 arc: C1 H00L0000 arc: C3 E1_H01W0000 arc: C5 V00T0000 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 N1_V02S0201 arc: D3 W1_H02E0201 arc: D5 V02N0401 arc: D6 H01W0000 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H00R0000 Q6 arc: H01W0000 F5 arc: H01W0100 Q6 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M2 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q1 arc: N3_V06N0103 F2 arc: N3_V06N0303 Q6 arc: S1_V02S0001 F0 arc: S1_V02S0401 Q6 arc: V01S0100 Q6 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011000000111111 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1111000100000001 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000110000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R20C25:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0101 arc: H00R0000 E1_H02W0601 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 N1_V01S0100 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06W0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 V06S0303 arc: W3_H06W0203 E3_H06W0203 arc: A3 V02S0501 arc: A5 N1_V01N0101 arc: A6 N1_V01N0101 arc: A7 V02N0101 arc: B3 E1_H02W0301 arc: B5 H00R0000 arc: B6 H01E0101 arc: B7 V00T0000 arc: C3 H02W0601 arc: C5 E1_H02W0401 arc: C6 H02E0401 arc: C7 V00B0100 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 N1_V02S0601 arc: D6 V02N0401 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: E3_H06E0203 Q7 arc: E3_H06E0303 F6 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: N3_V06N0203 Q7 arc: S3_V06S0203 Q7 arc: S3_V06S0303 F6 arc: V01S0000 Q0 arc: V01S0100 Q7 arc: W1_H02W0501 Q7 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010101010001010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010000010100011 word: SLICED.K0.INIT 1000000011110000 word: SLICED.K1.INIT 1000111110000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R20C26:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 V02N0201 arc: H00R0100 H02W0501 arc: N1_V02N0101 H01E0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0501 V01N0101 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 H01E0101 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A5 E1_H02W0701 arc: A7 H02W0701 arc: B0 V00T0000 arc: B5 E1_H02W0301 arc: B7 V00B0100 arc: C0 H00L0100 arc: C1 H00L0000 arc: C5 H02E0601 arc: C7 H02E0401 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02N0001 arc: D5 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q2 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: M2 V00T0100 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N3_V06N0203 F4 arc: V00T0000 Q0 arc: V01S0100 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1100000011111111 word: SLICEA.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R20C27:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 H02E0001 arc: H00L0100 H02W0101 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02W0601 arc: V00B0100 H02E0501 arc: V00T0100 N1_V02S0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A1 H00L0100 arc: A3 V00B0000 arc: A4 W1_H02E0501 arc: A6 N1_V02S0301 arc: A7 H00L0000 arc: B1 E1_H01W0100 arc: B3 H00R0000 arc: B4 V02N0701 arc: B5 V01S0000 arc: B6 V02N0501 arc: B7 N1_V01S0000 arc: C1 E1_H01W0000 arc: C3 H00R0100 arc: C4 V02N0201 arc: C5 V00T0100 arc: C6 N1_V02S0201 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D3 H02E0201 arc: D4 S1_V02N0401 arc: D5 E1_H02W0001 arc: D6 V00B0000 arc: D7 V02S0601 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H00R0100 F7 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M2 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S3_V06S0003 F0 arc: S3_V06S0103 F2 arc: S3_V06S0303 F5 arc: V01S0000 Q4 word: SLICEC.K0.INIT 1000000011001100 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 0000000000100000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111011101110011 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111011101110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R20C28:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 H06W0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V01N0101 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 V02N0701 arc: A4 V00B0000 arc: A5 N1_V01N0101 arc: A7 V02N0301 arc: B1 H02E0301 arc: B4 V02N0501 arc: B5 V02S0701 arc: B7 S1_V02N0501 arc: C1 V02S0401 arc: C4 N1_V02S0201 arc: C5 V00T0000 arc: C7 H02E0601 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D4 S1_V02N0601 arc: D5 N1_V02S0601 arc: D7 H00R0100 arc: E1_H02E0201 Q2 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: H01W0100 F4 arc: M2 E1_H02W0601 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: N1_V01N0101 Q2 arc: V00T0100 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R20C29:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V01N0001 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 N1_V02S0701 arc: A5 V00T0000 arc: A7 E1_H02W0701 arc: B1 S1_V02N0301 arc: B5 H00R0000 arc: B7 W1_H02E0101 arc: C1 H02E0401 arc: C5 V00T0100 arc: C7 V00B0100 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D5 H00R0100 arc: D7 H02E0001 arc: E1_H02E0201 Q2 arc: E1_H02E0501 F7 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: M0 V00B0000 arc: M2 E1_H02W0601 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: S3_V06S0203 F7 arc: V01S0000 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111010100010000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R20C2:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: H00R0100 E1_H02W0501 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 V02S0301 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R20C30:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 N1_V01S0100 arc: H00R0100 V02S0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0601 arc: W1_H02W0601 V01N0001 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 V06S0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A1 E1_H02W0501 arc: B1 V00T0000 arc: C1 E1_H02W0601 arc: D1 H02E0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: M5 H00R0100 arc: M6 V00B0100 arc: V01S0000 F3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000011100001111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C31:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 N1_V02S0001 arc: H00R0000 E1_H02W0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 E1_H02W0401 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0601 V02N0601 arc: N1_V02N0101 W3_H06E0103 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: A3 E1_H01E0001 arc: A6 H02E0501 arc: B3 H01W0100 arc: B5 V02S0501 arc: B6 V00T0000 arc: B7 V02S0701 arc: C2 H02E0601 arc: C3 H00L0000 arc: C4 E1_H01E0101 arc: C5 V02N0001 arc: C6 W1_H02E0601 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 V02S0201 arc: D4 V00B0000 arc: D5 E1_H02W0001 arc: D6 H02W0001 arc: D7 H00R0100 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F5 arc: E3_H06E0103 Q2 arc: E3_H06E0203 F4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q2 arc: N1_V02N0501 F7 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: V01S0000 Q0 arc: V01S0100 F4 arc: W1_H02W0101 F3 arc: W3_H06W0003 F3 arc: W3_H06W0103 F2 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000111111111111 word: SLICEB.K1.INIT 0001010101010101 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000111100001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R20C32:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W1_H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02W0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 S1_V02N0501 arc: E1_H02E0301 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A2 V02S0701 arc: A3 V00T0000 arc: B2 H00R0000 arc: B3 E1_H01W0100 arc: B7 V00T0000 arc: C2 H00L0100 arc: C3 V02S0601 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H02E0001 arc: D7 V02S0601 arc: E1_H01E0001 Q0 arc: E1_H02E0001 Q2 arc: E3_H06E0203 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: M0 H02W0601 arc: M4 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0601 Q4 arc: S1_V02S0601 Q4 arc: S3_V06S0203 Q4 arc: V00T0000 Q2 arc: V01S0000 Q4 arc: W1_H02W0101 F3 arc: W1_H02W0701 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 0001000000000000 word: SLICEB.K1.INIT 1010000010000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R20C33:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 V02S0201 arc: H00L0100 V02S0301 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 H02W0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V06S0203 arc: E1_H01E0101 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A2 E1_H01E0001 arc: A3 V02N0501 arc: B2 W1_H02E0301 arc: B3 H02W0301 arc: B5 H00R0000 arc: C2 H02E0601 arc: C3 H00L0100 arc: C5 H01E0001 arc: CE0 H02W0101 arc: CE1 E1_H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 E1_H02W0001 arc: D3 V00B0100 arc: D5 V02S0401 arc: E1_H01E0001 Q3 arc: E1_H02E0001 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00R0000 Q6 arc: H01W0000 F2 arc: H01W0100 Q3 arc: M0 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: V00T0000 Q0 arc: V00T0100 Q3 arc: W1_H02W0101 Q3 arc: W1_H02W0501 F5 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011000000000000 word: SLICEB.K0.INIT 0000000010111111 word: SLICEB.K1.INIT 0001000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R20C34:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 W1_H02E0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 S1_V02N0701 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 N1_V01S0000 arc: A0 H01E0001 arc: A2 V02S0501 arc: A6 H02E0501 arc: B0 V00T0000 arc: B1 V00B0000 arc: B2 S1_V02N0101 arc: B6 N1_V02S0701 arc: C0 H00L0000 arc: C1 N1_V02S0601 arc: C2 H00R0100 arc: C6 E1_H01E0101 arc: C7 N1_V02S0001 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F0 arc: D2 H00R0000 arc: D6 H00L0100 arc: D7 W1_H02E0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0201 F2 arc: E1_H02E0301 F1 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: LSR0 H02E0301 arc: M2 H02E0601 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q4 arc: N1_V02N0701 F7 arc: N3_V06N0203 F7 arc: S1_V02S0501 F7 arc: V01S0000 F7 arc: W1_H02W0201 F2 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000001000 word: SLICEA.K1.INIT 0000000011001111 word: SLICED.K0.INIT 1011000010000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0011000100010001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R20C35:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 H01E0101 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H01E0101 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H02W0601 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0003 S3_V06N0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: A0 E1_H01E0001 arc: A3 V02S0701 arc: A6 N1_V01N0101 arc: B0 V02S0301 arc: B1 H02E0301 arc: B2 H01W0100 arc: B3 H00L0000 arc: B4 V00B0100 arc: B6 V00T0000 arc: C0 N1_V02S0401 arc: C1 H00L0100 arc: C2 E1_H02W0601 arc: C3 H02W0601 arc: C4 F6 arc: C5 W1_H02E0401 arc: C6 V02S0001 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V01S0100 arc: D2 W1_H02E0001 arc: D3 S1_V02N0001 arc: D4 H00R0100 arc: D5 V02N0401 arc: D6 V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: E1_H02E0001 Q0 arc: E3_H06E0003 Q3 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0000 F4 arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V02N0101 F1 arc: N3_V06N0003 Q3 arc: V00B0100 F5 arc: V01S0000 F1 arc: V01S0100 F6 arc: W1_H02W0001 F2 arc: W1_H02W0101 F1 arc: W1_H02W0301 Q3 arc: W1_H02W0401 F6 arc: W1_H02W0701 F5 arc: W3_H06W0103 F1 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000011000000 word: SLICEB.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 1110110010100000 word: SLICEA.K1.INIT 1111001111111111 word: SLICEC.K0.INIT 1111001111111111 word: SLICEC.K1.INIT 0000000000001111 word: SLICED.K0.INIT 1000111111001111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C36:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 N1_V01S0100 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 H02W0701 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 V02S0101 arc: W1_H02W0601 H01E0001 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0401 W3_H06E0203 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: CE0 V02N0201 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q0 arc: H01W0100 Q0 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q0 arc: V00T0000 Q2 arc: V01S0100 Q0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R20C37:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02S0701 arc: E1_H02E0601 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: B2 H02E0301 arc: B3 H02E0301 arc: B5 H02W0101 arc: C2 V02S0401 arc: C3 H00L0100 arc: C5 V00T0100 arc: CE0 H00L0000 arc: CE1 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 V02S0001 arc: D5 V00B0000 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q6 arc: E3_H06E0003 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0100 Q0 arc: M0 H02E0601 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: V01S0000 Q0 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011000000111111 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000000011111100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R20C38:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 N1_V01S0000 arc: H00L0000 W1_H02E0201 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0100 H02E0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 H01E0101 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: B1 V00B0000 arc: B2 S1_V02N0101 arc: B7 E1_H02W0301 arc: C1 H02W0601 arc: C2 H00L0100 arc: C7 V02S0001 arc: CE2 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V02N0001 arc: D3 S1_V02N0001 arc: D7 F2 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 Q4 arc: H01W0100 Q4 arc: M2 V00T0100 arc: M4 W1_H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W3_H06W0203 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0011001100001111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000011001111 word: SLICEB.K0.INIT 1111000000110011 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R20C39:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 E1_H02W0101 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H01E0101 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: H01W0000 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: B5 V02S0701 arc: C3 W1_H02E0401 arc: C5 H02E0401 arc: C7 E1_H02W0601 arc: CE0 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 V00B0100 arc: D3 H02E0001 arc: D5 H00R0100 arc: D7 H02W0001 arc: E1_H01E0001 F1 arc: E1_H02E0301 Q1 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: N3_V06N0103 Q1 arc: V01S0000 F1 arc: W3_H06W0103 Q1 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011111100000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R20C3:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 V02S0401 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0601 H02W0601 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02S0601 arc: V01S0000 S3_V06N0103 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 N1_V01S0000 arc: D2 E1_H02W0001 arc: D3 V01S0100 arc: E1_H01E0001 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R20C40:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 E1_H02W0301 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: A1 H02W0501 arc: A3 H02W0501 arc: A5 H02W0501 arc: B1 H00R0100 arc: B3 H00R0100 arc: B5 W1_H02E0301 arc: B6 N1_V02S0701 arc: C1 V02N0401 arc: C3 H00L0000 arc: C5 V00T0000 arc: C6 V02S0201 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D3 E1_H02W0001 arc: D5 V00B0000 arc: D6 H00L0100 arc: D7 E1_H01W0100 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F4 arc: M0 V00T0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: S3_V06S0303 Q6 arc: V01S0000 F0 word: SLICED.K0.INIT 0000000011110011 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1110001100110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1110001100110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1110001100110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R20C41:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 S1_V02N0301 arc: H00R0100 V02S0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0601 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0701 S3_V06N0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A0 S1_V02N0501 arc: A4 V02S0301 arc: B0 H00R0100 arc: B4 H02E0101 arc: C0 H00L0100 arc: C4 V00T0000 arc: C6 V02N0201 arc: C7 V02S0201 arc: CE1 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D4 V00B0000 arc: D5 N1_V02S0601 arc: D6 V02N0401 arc: D7 H02E0001 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: M0 V00B0100 arc: M2 E1_H02W0601 arc: M4 E1_H01E0101 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q4 arc: N3_V06N0203 Q4 arc: S3_V06S0303 Q6 arc: V01S0000 F4 arc: V01S0100 Q6 arc: W1_H02W0501 F7 arc: W1_H02W0601 Q6 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 1111000111110011 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111010100110001 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R20C42:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V06S0203 arc: H00L0000 H02E0001 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0701 arc: V00T0100 H02E0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0701 V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: S1_V02S0401 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A7 H00L0000 arc: B0 E1_H01W0100 arc: B3 H00R0100 arc: B5 V00B0100 arc: B7 H02W0301 arc: C0 H00L0100 arc: C2 H02E0401 arc: C3 N1_V02S0401 arc: C5 W1_H02E0601 arc: C6 H01E0001 arc: C7 H02W0401 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 H02E0201 arc: D2 S1_V02N0201 arc: D3 H00R0000 arc: D5 V02N0401 arc: D6 V02N0601 arc: D7 V02N0601 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q3 arc: H01W0100 Q5 arc: M0 V00T0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N3_V06N0303 Q5 arc: S1_V02S0201 F0 arc: V01S0100 Q5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1010100000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R20C43:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H01E0101 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02N0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02N0601 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H01W0000 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A5 V00T0100 arc: B1 V02S0101 arc: B2 H02W0101 arc: B3 H00L0000 arc: B5 V02N0701 arc: B6 H02E0301 arc: B7 V00B0000 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 S1_V02N0201 arc: C6 E1_H01E0101 arc: C7 N1_V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V01S0100 arc: D3 N1_V02S0201 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 V02S0601 arc: D7 S1_V02N0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 F7 arc: E1_H02E0201 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q1 arc: H01W0100 F6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V02N0301 F1 arc: V01S0100 F4 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000011001111 word: SLICED.K0.INIT 1100110000001111 word: SLICED.K1.INIT 0000111100110011 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000111100001100 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1010100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R20C44:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 V06S0003 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 H01E0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 S3_V06N0203 arc: E1_H01E0001 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: S1_V02S0401 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: A3 V00B0000 arc: A5 V00B0000 arc: B0 H02W0101 arc: B3 H00L0000 arc: B5 S1_V02N0701 arc: B6 N1_V02S0701 arc: C0 H02W0601 arc: C2 H02E0601 arc: C3 S1_V02N0601 arc: C4 H02E0601 arc: C5 S1_V02N0001 arc: C6 E1_H01E0101 arc: C7 V02S0001 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00T0100 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 V02N0601 arc: D7 H02W0001 arc: E1_H01E0101 F0 arc: E1_H02E0001 F2 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: M2 W1_H02E0601 arc: M4 H02E0401 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: V01S0100 Q6 arc: W1_H02W0401 F4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000001111001111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1010100000000000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1010100000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R20C45:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V02S0601 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S1_V02N0501 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E1_H01W0000 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A1 H00L0000 arc: B0 H02W0101 arc: B1 E1_H02W0101 arc: B2 V02N0301 arc: B3 H01W0100 arc: B4 N1_V02S0501 arc: B6 V02S0701 arc: C0 H02E0601 arc: C1 N1_V02S0401 arc: C2 H02E0601 arc: C3 E1_H02W0601 arc: C4 H02W0601 arc: C6 H02E0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H00R0000 arc: D2 H02E0001 arc: D3 V00B0100 arc: D4 V02N0601 arc: D5 V02N0401 arc: D6 H00L0100 arc: D7 F2 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0000 F0 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V02N0001 F2 arc: S1_V02S0101 F1 arc: V01S0000 F6 arc: W1_H02W0601 F4 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 1100000011001111 word: SLICEA.K1.INIT 1101000100010001 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000111100001100 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R20C46:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 W1_H02E0701 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0101 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 N1_V01S0000 arc: E1_H01E0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A7 H02W0701 arc: B1 H02E0101 arc: B3 E1_H02W0301 arc: B4 H00R0000 arc: B7 V00B0000 arc: C1 H00R0100 arc: C3 H02W0401 arc: C4 V00T0100 arc: C7 V00T0000 arc: D1 V02S0201 arc: D3 V02S0201 arc: D4 S1_V02N0401 arc: D5 V02N0601 arc: D7 H02W0001 arc: E1_H01E0101 F3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F7 arc: M4 V00B0100 arc: N1_V01N0101 F3 arc: N1_V02N0101 F1 arc: N1_V02N0301 F1 arc: S1_V02S0101 F1 arc: S1_V02S0401 F4 arc: S3_V06S0103 F1 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0101111100010011 word: SLICEC.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R20C47:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 H01E0101 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A1 H00R0000 arc: A5 V02N0301 arc: B1 H00R0100 arc: B2 E1_H01W0100 arc: B5 H00L0000 arc: B6 N1_V02S0701 arc: C1 W1_H02E0601 arc: C2 H00L0100 arc: C4 H02E0401 arc: C5 S1_V02N0001 arc: C6 H02W0601 arc: C7 V00T0100 arc: CE1 V02N0201 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D2 S1_V02N0201 arc: D3 E1_H02W0001 arc: D4 H02E0001 arc: D5 H02E0001 arc: D6 V02N0401 arc: D7 H02W0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F2 arc: E3_H06E0203 F7 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: M2 V00T0000 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q6 arc: N1_V02N0201 F2 arc: S3_V06S0103 F1 arc: V01S0000 Q6 arc: V01S0100 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0101111100010011 word: SLICED.K0.INIT 0000111100000011 word: SLICED.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000110011111100 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1100100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R20C48:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02W0201 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 V02S0601 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A1 H01E0001 arc: B0 V02N0301 arc: B1 W1_H02E0301 arc: B4 H01E0101 arc: B6 V02N0501 arc: B7 H02E0101 arc: C0 H00L0000 arc: C1 H00R0100 arc: C4 E1_H02W0401 arc: C6 H02E0401 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 S1_V02N0001 arc: D4 H00L0100 arc: D5 F0 arc: D6 V00B0000 arc: D7 V02N0601 arc: E1_H01E0001 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 Q6 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M2 V00T0000 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: N1_V02N0001 F0 arc: S1_V02S0401 F4 arc: V01S0000 F7 arc: V01S0100 F6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 1100000011001111 word: SLICEA.K1.INIT 0000000001011100 word: SLICEC.K0.INIT 0000000011001111 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R20C49:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 S1_V02N0001 arc: H00L0100 S1_V02N0301 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02N0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A1 E1_H01E0001 arc: A3 H02E0701 arc: A5 E1_H02W0701 arc: A7 H00R0000 arc: B0 H02W0301 arc: B1 E1_H01W0100 arc: B3 V02S0301 arc: B5 H00L0000 arc: B6 V00B0000 arc: B7 V02N0501 arc: C0 V02S0601 arc: C1 H00L0100 arc: C3 W1_H02E0601 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 H02W0601 arc: C7 V00T0100 arc: CE0 V02N0201 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 E1_H02W0201 arc: D3 H02W0201 arc: D4 N1_V02S0601 arc: D5 N1_V02S0601 arc: D6 H02E0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: LSR1 W1_H02E0501 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F3 arc: S1_V02S0101 F1 arc: W1_H02W0401 F4 arc: W1_H02W0501 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000010101010 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0101101000111100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0101101000111100 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1110000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R20C4:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: H00R0000 H02E0401 arc: N1_V02N0201 H06W0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 S3_V06N0203 arc: A1 V02N0501 arc: A2 V02N0501 arc: B1 H02W0301 arc: B2 H02W0301 arc: B4 V02N0701 arc: B5 V00B0100 arc: C1 F4 arc: C2 F4 arc: C4 H02W0401 arc: C5 H01E0001 arc: CE2 E1_H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D2 H02W0201 arc: D4 H02E0201 arc: D5 V00B0000 arc: E1_H01E0001 Q6 arc: E1_H02E0301 F1 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 N1_V01N0001 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000110011111100 word: SLICEC.K1.INIT 0000111111001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000101011001111 word: SLICEB.K0.INIT 1000101011001111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R20C50:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 H01E0001 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 V06S0303 arc: H00L0000 S1_V02N0201 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: B1 V02S0101 arc: B2 V02S0301 arc: B3 H01W0100 arc: B4 V00B0100 arc: B5 N1_V01S0000 arc: B6 V00B0000 arc: B7 V01S0000 arc: C1 H00L0000 arc: C2 H00R0100 arc: C3 S1_V02N0401 arc: C4 V00T0000 arc: C5 V00T0100 arc: C6 H02W0601 arc: C7 E1_H02W0401 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 H02E0001 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 H02E0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q7 arc: E1_H02E0101 Q3 arc: E1_H02E0201 Q2 arc: E1_H02E0301 Q1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q4 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q3 arc: N1_V02N0101 Q1 arc: V00B0100 Q5 arc: V01S0000 Q2 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000110011 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R20C51:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 V06N0103 arc: H00L0000 H02E0201 arc: H00L0100 V02N0301 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02E0601 arc: V00B0100 V02S0301 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: E1_H02E0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: A5 H02E0501 arc: A7 H00R0000 arc: B0 W1_H02E0301 arc: B1 H02E0301 arc: B2 H00R0000 arc: B3 H00L0000 arc: B4 H02W0101 arc: B5 H01E0101 arc: B6 V00B0000 arc: B7 H02E0101 arc: C0 N1_V02S0601 arc: C1 H02W0601 arc: C2 V02S0401 arc: C3 H02W0601 arc: C4 V00T0100 arc: C5 H02W0601 arc: C6 V00B0100 arc: C7 H02W0601 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V02N0201 arc: D2 H02W0201 arc: D3 V02N0201 arc: D4 H02W0201 arc: D5 V02N0601 arc: D6 H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 F7 arc: H01W0100 Q4 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q0 arc: S1_V02S0701 F5 arc: V00T0000 Q2 arc: V01S0000 F1 arc: V01S0100 Q4 arc: W1_H02W0301 F3 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0101101000111100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0101101000111100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0101101000111100 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0101101000111100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R20C52:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 H02E0201 arc: H00L0100 H02E0301 arc: H00R0100 V02S0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02N0601 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: A5 N1_V01N0101 arc: A7 H00R0000 arc: B0 V00T0000 arc: B1 E1_H01W0100 arc: B2 V02N0301 arc: B3 H00L0000 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V01S0000 arc: B7 V00B0000 arc: C0 H00R0100 arc: C1 H02E0601 arc: C2 N1_V01S0100 arc: C3 H02E0601 arc: C4 V00T0100 arc: C5 H02E0601 arc: C6 N1_V02S0201 arc: C7 H02E0601 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 E1_H02W0001 arc: D2 V02S0201 arc: D3 E1_H02W0001 arc: D4 H02W0001 arc: D5 V02N0601 arc: D6 H02W0001 arc: D7 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 F1 arc: H01W0100 F7 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0201 Q2 arc: N1_V02N0601 Q6 arc: V00T0000 Q2 arc: V01S0000 Q0 arc: V01S0100 Q0 arc: W1_H02W0501 F5 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0101001110101100 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0101001110101100 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0101001110101100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0101001110101100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R20C53:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02W0101 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 V01N0101 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 E1_H01W0000 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: B2 H00R0100 arc: B3 S1_V02N0101 arc: B4 H02E0301 arc: B5 H00L0000 arc: B6 V00B0100 arc: B7 V01S0000 arc: C1 H00L0100 arc: C2 V02N0401 arc: C3 S1_V02N0401 arc: C4 W1_H02E0401 arc: C5 V02N0201 arc: C6 S1_V02N0001 arc: C7 H02W0401 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H02E0101 Q3 arc: E1_H02E0201 Q2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q3 arc: N1_V02N0301 F1 arc: S1_V02S0401 Q6 arc: V00B0100 Q7 arc: V01S0000 Q4 arc: V01S0100 Q6 arc: W1_H02W0501 Q7 arc: W1_H02W0601 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R20C54:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 V02N0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0301 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 H01E0001 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0303 E1_H01W0100 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: A5 N1_V01N0101 arc: A7 H02W0701 arc: B0 V01N0001 arc: B1 V02N0301 arc: B2 H00L0000 arc: B3 H02E0101 arc: B4 S1_V02N0701 arc: B5 H00R0000 arc: B6 V02S0701 arc: B7 V00B0000 arc: C0 N1_V01S0100 arc: C1 H02W0601 arc: C2 V02S0401 arc: C3 H02W0601 arc: C4 H02E0401 arc: C5 V02N0001 arc: C6 V00B0100 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V00T0100 arc: D2 H02W0001 arc: D3 V00T0100 arc: D4 H02W0001 arc: D5 H00R0100 arc: D6 H02W0001 arc: D7 H00R0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F7 arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q0 arc: V00T0000 Q2 arc: W1_H02W0301 F1 arc: W1_H02W0501 F5 arc: W3_H06W0003 F3 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0101001110101100 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0101001110101100 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0101001110101100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0101001110101100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R20C55:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02N0301 arc: H00R0100 V02S0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 H01E0101 arc: N1_V02N0401 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 E1_H01E0001 arc: A2 H02E0701 arc: B0 H00R0100 arc: B1 V00T0000 arc: B2 N1_V02S0301 arc: B3 V02S0101 arc: C0 E1_H02W0601 arc: C1 S1_V02N0401 arc: C2 E1_H02W0601 arc: C3 H00L0000 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 W1_H02E0001 arc: D2 H02E0201 arc: D3 W1_H02E0001 arc: E1_H01E0001 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 F0 arc: H01W0100 Q3 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q1 arc: S3_V06S0303 Q6 arc: V01S0100 Q4 arc: W3_H06W0003 Q3 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0011010111001010 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0011010111001010 word: SLICEB.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R20C56:PLC2 arc: H00L0000 H02E0201 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0501 H02E0501 arc: N3_V06N0003 H06W0003 arc: S1_V02S0001 H06E0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00T0100 W1_H02E0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: N1_V02N0401 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A1 E1_H01E0001 arc: A3 V02S0501 arc: A5 H02W0701 arc: B0 E1_H02W0101 arc: B1 S1_V02N0101 arc: B2 H00R0100 arc: B3 V01N0001 arc: B4 V00B0100 arc: B5 V02N0701 arc: B6 V02S0701 arc: B7 V00B0000 arc: C0 V02S0601 arc: C1 H00L0000 arc: C2 H02E0401 arc: C3 H02W0601 arc: C4 V00T0100 arc: C5 V02N0201 arc: C6 V02S0201 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0201 arc: D2 V02S0201 arc: D3 W1_H02E0201 arc: D4 V02S0601 arc: D5 W1_H02E0201 arc: D6 V02S0401 arc: D7 V02S0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q0 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V01S0000 F5 arc: V01S0100 Q7 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q7 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0101001110101100 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0101001110101100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 0100011110111000 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R20C57:PLC2 arc: N1_V02N0201 H02W0201 arc: N3_V06N0003 V01N0001 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 H01E0101 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 .tile R20C58:PLC2 arc: N1_V02N0201 N1_V01S0000 arc: N3_V06N0103 S3_V06N0003 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 H06E0303 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H01W0100 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 .tile R20C59:PLC2 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: H01W0100 W3_H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 .tile R20C5:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 S1_V02N0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 E1_H02W0101 arc: A0 H00L0100 arc: A6 V00T0100 arc: B0 V00B0000 arc: B6 V00B0000 arc: C0 H02W0601 arc: C6 H02W0601 arc: D0 V02N0001 arc: D6 V02N0601 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00B0100 word: SLICEA.K0.INIT 1010001011110011 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1010001011110011 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R20C60:PLC2 arc: S1_V02S0301 N1_V02S0201 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H06E0303 arc: W1_H02W0101 W3_H06E0103 .tile R20C62:PLC2 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: E3_H06E0003 W3_H06E0303 .tile R20C63:PLC2 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 .tile R20C64:PLC2 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 .tile R20C65:PLC2 arc: S3_V06S0003 H06E0003 arc: W3_H06W0303 E3_H06W0203 .tile R20C66:PLC2 arc: S3_V06S0103 H06E0103 .tile R20C69:PLC2 arc: E1_H02E0301 V02N0301 .tile R20C6:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V01N0101 arc: H00L0000 H02W0001 arc: H00L0100 E1_H02W0301 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: B1 H02E0301 arc: B2 H00L0000 arc: B3 H00L0000 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00T0000 arc: C5 F4 arc: C6 V00B0100 arc: C7 V00T0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 S1_V02N0601 arc: D5 S1_V02N0401 arc: D6 V00B0000 arc: D7 V02N0401 arc: E1_H02E0301 F1 arc: E1_H02E0401 Q6 arc: E1_H02E0501 Q5 arc: E3_H06E0203 Q7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: M0 H02E0601 arc: M1 V01S0100 arc: M2 H02E0601 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V02N0701 F5 arc: V01S0100 F6 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001011110011 word: SLICEB.K0.INIT 1010001011110011 word: SLICEB.K1.INIT 1010001011110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R20C7:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 V02N0401 arc: H00L0000 S1_V02N0001 arc: H00L0100 H02W0301 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 H06W0303 arc: S1_V02S0501 S3_V06N0303 arc: S3_V06S0003 H06W0003 arc: V00T0100 H02E0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 S3_V06N0103 arc: A1 V01N0101 arc: B1 W1_H02E0101 arc: C1 H02E0601 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H02E0001 arc: M6 V00T0100 arc: MUXCLK1 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C8:PLC2 arc: E1_H02E0701 W1_H02E0701 arc: H00R0100 V02N0501 arc: N1_V02N0401 W1_H02E0401 arc: S1_V02S0101 N3_V06S0103 arc: S3_V06S0003 H01E0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 E3_H06W0003 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E1_H02E0401 Q4 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 H02E0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0401 Q6 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C9:PLC2 arc: E1_H02E0301 H01E0101 arc: H00L0000 H02W0201 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0501 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0301 E1_H01W0100 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0701 arc: V00T0100 H02W0101 arc: W1_H02W0301 S1_V02N0301 arc: B3 V02S0101 arc: C3 H00L0000 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 W1_H02E0201 arc: E1_H02E0401 Q6 arc: E1_H02E0601 Q4 arc: F3 F3_SLICE arc: M0 V00B0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 Q3 arc: S3_V06S0203 Q4 arc: V01S0000 Q6 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100111111000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R21C10:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H06W0303 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00T0000 N1_V02S0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E3_H06W0203 arc: B1 V00T0000 arc: B3 H02E0101 arc: B5 V02S0501 arc: B7 V00B0000 arc: C1 H00L0000 arc: C3 H00L0000 arc: C5 V02N0201 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D3 S1_V02N0001 arc: D5 H00L0100 arc: D7 V02S0601 arc: E1_H01E0101 Q5 arc: E1_H02E0301 Q1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q7 arc: V01S0100 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100111111000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111111000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111001111000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R21C11:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00T0000 H02E0201 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0100 arc: A3 E1_H01E0001 arc: A6 V02N0301 arc: B0 V00B0000 arc: B1 V00T0000 arc: B3 H00L0000 arc: B4 H02E0301 arc: B6 V00B0000 arc: B7 H01E0101 arc: C0 V02N0401 arc: C1 H02E0401 arc: C2 V02N0601 arc: C3 N1_V01S0100 arc: C4 W1_H02E0401 arc: C5 F4 arc: C6 V00B0100 arc: C7 W1_H02E0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H02W0001 arc: D2 V02N0001 arc: D3 F2 arc: D4 H02W0001 arc: D5 E1_H01W0100 arc: D6 N1_V02S0601 arc: D7 H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q4 arc: E1_H02E0301 Q1 arc: E1_H02E0501 F5 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 Q1 arc: H01W0100 F4 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F4 arc: N1_V02N0301 F3 arc: S1_V02S0101 F1 arc: S1_V02S0501 F7 arc: S3_V06S0203 F4 arc: V00B0100 F7 arc: V01S0000 F1 arc: V01S0100 Q7 word: SLICED.K0.INIT 0100000001110000 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0000101100001000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0000000000000001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R21C12:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V06S0303 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V06S0303 arc: A1 V02N0501 arc: A2 V00B0000 arc: A3 E1_H01E0001 arc: A5 W1_H02E0501 arc: A7 N1_V01S0100 arc: B0 V02S0101 arc: B1 H00R0100 arc: B2 H02E0101 arc: B3 V02N0301 arc: B4 H01E0101 arc: B5 H02W0101 arc: B7 N1_V01S0000 arc: C0 H00L0000 arc: C1 H00L0100 arc: C2 E1_H02W0601 arc: C3 N1_V02S0601 arc: C4 V02S0001 arc: C5 F4 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V00B0100 arc: D2 S1_V02N0201 arc: D3 V00T0100 arc: D4 H02W0001 arc: D5 V01N0001 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: LSR0 E1_H02W0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F5 arc: N1_V02N0101 F3 arc: N1_V02N0701 F7 arc: S3_V06S0003 F0 arc: V00T0100 F1 arc: V01S0100 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1011010010000111 word: SLICEC.K0.INIT 0011000000111111 word: SLICEC.K1.INIT 0101111101001100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0000000000010010 word: SLICEB.K0.INIT 0010110101111000 word: SLICEB.K1.INIT 0100000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R21C13:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V06S0203 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0103 E3_H06W0003 arc: B7 V00T0000 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 E1_H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F7 arc: E1_H02E0201 Q0 arc: E1_H02E0401 Q4 arc: E3_H06E0303 F6 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: V01S0000 F7 arc: V01S0100 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0011000000111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 .tile R21C14:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 H01E0001 arc: H00L0000 V02N0001 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 S1_V02N0101 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H01W0000 arc: E1_H02E0101 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 V02N0101 arc: A5 V02S0101 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B2 E1_H02W0301 arc: B3 E1_H02W0301 arc: B4 V02S0501 arc: B5 H02E0101 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00B0100 arc: C5 V02N0201 arc: C7 H02W0601 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE3 H00R0000 arc: CLK1 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 E1_H02W0201 arc: D5 V02N0401 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F1 arc: E1_H02E0301 Q1 arc: E1_H02E0501 Q7 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: S1_V02S0001 Q0 arc: S1_V02S0701 Q7 arc: S3_V06S0103 Q1 arc: V01S0000 F0 arc: V01S0100 Q0 arc: W1_H02W0101 F1 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R21C15:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 V01N0101 arc: H00L0000 S1_V02N0201 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 H01E0001 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H01E0001 arc: A2 V01N0101 arc: A6 N1_V01N0101 arc: B1 H01W0100 arc: B2 H00L0000 arc: B3 V02N0101 arc: B4 N1_V02S0701 arc: B5 V02N0701 arc: B6 V01S0000 arc: B7 S1_V02N0701 arc: C1 H00L0100 arc: C2 H02E0601 arc: C3 W1_H02E0401 arc: C4 V00T0100 arc: C5 N1_V02S0001 arc: C6 E1_H01E0101 arc: C7 V00T0000 arc: CE2 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 W1_H02E0201 arc: D3 H00R0000 arc: D4 E1_H02W0201 arc: D5 V02N0601 arc: D6 H02E0201 arc: D7 H00R0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F3 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 F4 arc: H01W0100 F7 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F2 arc: N1_V02N0401 Q4 arc: N3_V06N0003 F0 arc: N3_V06N0203 Q4 arc: N3_V06N0303 F6 arc: V01S0000 F7 arc: V01S0100 F4 arc: W1_H02W0501 F5 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1100001100000000 word: SLICEB.K0.INIT 1000001001000001 word: SLICEB.K1.INIT 1100001100000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0000001100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R21C16:PLC2 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 V01N0101 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E3_H06W0103 arc: A6 N1_V02S0101 arc: A7 V02N0301 arc: B1 Q1 arc: B3 Q3 arc: B5 H02E0101 arc: B6 V00B0100 arc: B7 H02W0301 arc: C1 H00L0000 arc: C3 H02W0401 arc: C5 E1_H01E0101 arc: C6 H02W0601 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02E0201 arc: D2 Q2 arc: D3 H02W0001 arc: D4 V00B0000 arc: D5 N1_V02S0401 arc: D6 V02N0401 arc: D7 H00L0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0301 Q3 arc: E1_H02E0601 F6 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q4 arc: H01W0100 Q5 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q0 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q4 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q2 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q4 arc: V00B0000 Q4 arc: V01S0000 Q3 arc: V01S0100 Q3 arc: W1_H02W0201 Q0 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q4 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0011110011001100 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0011110011001100 word: SLICED.K0.INIT 1100000010100000 word: SLICED.K1.INIT 1010000011000000 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0011110011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R21C17:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: H00L0000 V02N0001 arc: H00L0100 H02W0101 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0501 arc: A1 V01N0101 arc: A6 V02N0301 arc: A7 V02N0301 arc: B0 W1_H02E0301 arc: B1 S1_V02N0301 arc: B2 N1_V02S0301 arc: B5 H00L0000 arc: B6 V02S0501 arc: B7 V02N0501 arc: C0 N1_V02S0601 arc: C1 H02W0401 arc: C2 H00L0100 arc: C3 H02W0601 arc: C5 V00T0100 arc: C6 H02W0401 arc: C7 S1_V02N0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V02N0201 arc: D2 V00B0100 arc: D3 W1_H02E0001 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V02N0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F3 arc: E1_H02E0101 F1 arc: E1_H02E0301 F3 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F3 arc: LSR0 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F6 arc: N1_V02N0101 F3 arc: N3_V06N0103 Q2 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111100110011 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1100000010100000 word: SLICED.K0.INIT 1010000011000000 word: SLICED.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R21C18:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 H01E0101 arc: H00L0100 W1_H02E0301 arc: H00R0100 V02S0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 H01E0001 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 H01E0001 arc: W3_H06W0103 E3_H06W0103 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 H02E0701 arc: A5 V02S0101 arc: A7 N1_V02S0101 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 S1_V02N0501 arc: B5 V02N0701 arc: B7 V00B0100 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V02N0001 arc: C6 Q6 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 H02W0101 arc: CLK1 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 V02N0601 arc: D5 V02N0401 arc: D6 W1_H02E0001 arc: D7 H02E0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F7 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 Q6 arc: H01W0100 Q6 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q2 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q1 arc: S1_V02S0201 F0 arc: S1_V02S0601 Q6 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 arc: V00B0000 Q6 arc: V01S0000 F1 arc: V01S0100 Q6 arc: W1_H02W0501 F7 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1100010001000100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R21C19:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V06S0303 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02N0401 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V06N0203 arc: H01W0100 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 V00B0000 arc: A5 H02E0701 arc: A7 N1_V01S0100 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B5 V00B0100 arc: B7 N1_V01S0000 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 H02W0601 arc: C5 W1_H02E0601 arc: C7 H02E0601 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CLK1 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 N1_V02S0601 arc: D5 W1_H02E0001 arc: D7 H02E0201 arc: E1_H01E0101 Q1 arc: E1_H02E0301 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: LSR0 V00T0100 arc: LSR1 H02E0501 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q2 arc: N3_V06N0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111110 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R21C20:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02W0201 arc: H00L0100 V02S0301 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0501 N3_V06S0303 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V06S0303 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V01N0101 arc: A1 V01N0101 arc: B0 V02N0101 arc: B1 V02N0301 arc: B3 Q3 arc: B5 V02S0501 arc: C0 H00L0000 arc: C1 S1_V02N0601 arc: C3 N1_V01N0001 arc: C5 V00B0100 arc: C7 E1_H01E0101 arc: CE1 H00L0100 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 S1_V02N0001 arc: D2 Q2 arc: D3 N1_V01S0000 arc: D4 V00B0000 arc: D5 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q7 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q7 arc: N1_V02N0001 Q2 arc: N1_V02N0501 Q5 arc: S1_V02S0201 Q2 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q4 arc: S1_V02S0701 Q5 arc: V00B0000 Q4 arc: V00B0100 Q5 arc: V01S0000 F1 arc: V01S0100 Q3 arc: W1_H02W0101 Q3 arc: W1_H02W0401 Q4 arc: W1_H02W0701 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0011110011001100 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0011110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R21C21:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02N0601 arc: H00L0000 V02S0201 arc: H00L0100 W1_H02E0101 arc: H00R0000 V02S0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 H02E0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02N0401 arc: V00T0100 E1_H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 N3_V06S0203 arc: E1_H02E0101 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0501 arc: A1 N1_V02S0701 arc: A4 N1_V02S0301 arc: A7 N1_V01N0101 arc: B0 V00B0000 arc: B1 V02N0101 arc: B4 H02W0301 arc: B7 F1 arc: C0 H02W0401 arc: C1 H00L0000 arc: C3 H02E0601 arc: C4 V00B0100 arc: C5 V02S0201 arc: C7 V00T0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02E0201 arc: D3 N1_V02S0001 arc: D4 V02S0401 arc: D5 H02E0201 arc: D7 H00L0100 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F0 arc: N1_V02N0301 Q3 arc: N1_V02N0601 Q6 arc: N3_V06N0303 F5 arc: V00B0100 F5 arc: W1_H02W0301 Q3 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1100000010100000 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111110 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R21C22:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 V06N0203 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 H02E0401 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V06N0203 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A4 V02N0101 arc: A6 V02N0301 arc: B0 H02E0301 arc: B4 F3 arc: B5 H00R0000 arc: B6 H02E0101 arc: C0 H00L0100 arc: C1 N1_V02S0401 arc: C2 S1_V02N0601 arc: C3 H00R0100 arc: C4 V02N0001 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H02E0201 arc: D2 V00T0100 arc: D3 H02W0201 arc: D4 F0 arc: D5 V02S0601 arc: D6 V00B0000 arc: E1_H01E0101 F3 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 F1 arc: H00R0000 Q4 arc: LSR1 H02E0501 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V02N0401 F6 arc: N3_V06N0003 F3 arc: N3_V06N0103 F1 arc: S3_V06S0303 F5 arc: V00T0000 F2 arc: V00T0100 F1 arc: V01S0100 F3 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0011111100000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1000000011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C23:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 E1_H02W0001 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 H02W0201 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0701 V06S0203 arc: H01W0000 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 H00R0000 arc: A7 H02W0701 arc: B0 V02N0301 arc: B1 N1_V02S0101 arc: B2 H01W0100 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 H02W0401 arc: C2 E1_H01W0000 arc: C7 E1_H01E0101 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V00B0100 arc: D2 S1_V02N0001 arc: D3 V00T0100 arc: D7 H00R0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F1 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0100 Q2 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: S3_V06S0303 F6 arc: V01S0000 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0100000011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R21C24:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02W0201 arc: H00L0100 H02W0101 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 V01N0101 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: B0 H01W0100 arc: B5 N1_V02S0701 arc: B6 V02N0501 arc: B7 V00T0000 arc: C0 H00L0000 arc: C1 H00L0100 arc: C5 V00T0000 arc: C6 E1_H01E0101 arc: C7 E1_H01E0101 arc: CE1 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 S1_V02N0201 arc: D5 H02E0201 arc: D6 F0 arc: D7 F0 arc: E1_H01E0001 F6 arc: E1_H01E0101 F1 arc: E1_H02E0201 F0 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M2 V00T0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F5 arc: N1_V02N0201 F0 arc: S1_V02S0201 F0 arc: S1_V02S0301 F1 arc: S3_V06S0103 Q2 arc: V01S0100 Q2 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111100110011 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0000000000001100 word: SLICED.K1.INIT 0000000000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R21C25:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 H01E0001 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0100 H02W0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0701 V02N0701 arc: W3_H06W0303 N3_V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A1 E1_H02W0701 arc: A2 H00L0100 arc: A4 S1_V02N0301 arc: A5 S1_V02N0101 arc: B1 H00R0100 arc: B2 V01N0001 arc: B4 H00L0000 arc: B5 H02E0101 arc: B7 S1_V02N0701 arc: C0 H02W0601 arc: C1 N1_V01N0001 arc: C2 H00R0100 arc: C4 V00T0000 arc: C5 V00B0100 arc: C6 S1_V02N0201 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V01S0100 arc: D2 F0 arc: D4 H00R0100 arc: D5 V02N0601 arc: D6 H01W0000 arc: D7 V02N0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 F6 arc: E1_H02E0001 F2 arc: E1_H02E0201 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F4 arc: LSR0 H02E0301 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q1 arc: N1_V02N0601 F6 arc: V00T0000 F0 arc: V01S0100 F7 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1111111011111111 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0011000011110000 word: SLICEC.K0.INIT 1000101011001111 word: SLICEC.K1.INIT 1110000011000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R21C26:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 S1_V02N0001 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 H06E0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: V00T0100 W1_H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: S1_V02S0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: A2 V00T0000 arc: A3 H02E0701 arc: A4 V00B0000 arc: A7 V02N0301 arc: B0 H02E0301 arc: B1 H02E0101 arc: B2 F3 arc: B3 H00R0100 arc: B4 V02S0501 arc: B5 H00R0000 arc: B7 F1 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C2 N1_V01S0100 arc: C3 H00L0000 arc: C4 H01E0001 arc: C5 E1_H01E0101 arc: C6 H02W0401 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 W1_H02E0001 arc: D2 H01E0101 arc: D3 V00T0100 arc: D4 V01N0001 arc: D5 H02E0201 arc: D6 N1_V02S0601 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F0 arc: E1_H02E0501 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q4 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F5 arc: N1_V02N0201 F0 arc: S3_V06S0103 Q2 arc: V00T0000 Q2 arc: V01S0000 F6 arc: W1_H02W0301 F1 word: SLICEA.K0.INIT 0000110000000000 word: SLICEA.K1.INIT 1100110011111100 word: SLICEB.K0.INIT 1111111100100000 word: SLICEB.K1.INIT 0000010000001111 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0010000000000000 word: SLICEC.K0.INIT 1100100011011000 word: SLICEC.K1.INIT 1111110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R21C27:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 N1_V01S0100 arc: H00L0000 H02E0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 H02E0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: W1_H02W0101 V06N0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0701 V02N0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H01E0001 arc: B1 H00R0100 arc: B2 H02W0101 arc: B7 H02E0301 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 V02S0601 arc: C7 V00T0000 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 H00R0000 arc: D3 H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: M2 V00B0100 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: V01S0000 Q4 arc: V01S0100 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 1111111111110000 word: SLICEA.K1.INIT 1111110011111110 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R21C28:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0601 V02S0601 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 V01N0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 H02E0501 arc: V00T0000 H02W0001 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 H01E0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: A4 E1_H01W0000 arc: A5 V02N0301 arc: A6 N1_V01N0101 arc: B4 H00L0000 arc: B5 N1_V02S0701 arc: B6 H02E0301 arc: B7 H02E0101 arc: C4 V00T0100 arc: C5 V00T0000 arc: C6 N1_V02S0001 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D4 V02N0601 arc: D5 S1_V02N0401 arc: D6 H00L0100 arc: D7 H02E0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q7 arc: E1_H02E0501 Q7 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q7 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q7 arc: M0 V00B0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q7 arc: N1_V02N0701 Q7 arc: N3_V06N0203 F7 arc: S1_V02S0701 F7 arc: V01S0000 F4 arc: V01S0100 Q0 arc: W1_H02W0001 Q2 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0000000000000011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R21C29:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 H01E0001 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E3_H06W0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A1 E1_H01E0001 arc: B1 V02N0101 arc: B2 H01W0100 arc: B4 H02W0301 arc: B6 V01S0000 arc: C1 H00R0100 arc: C2 E1_H02W0601 arc: C4 V00B0100 arc: C6 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 H00R0000 arc: D3 E1_H02W0201 arc: D4 H02E0201 arc: D5 V02N0401 arc: D6 H02E0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q4 arc: E1_H02E0301 F1 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 Q2 arc: M2 H02E0601 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0401 Q6 arc: V01S0000 Q6 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R21C2:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: H00R0000 V02N0401 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 V02N0201 arc: CE2 V02S0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 H02E0201 arc: D2 N1_V01S0000 arc: D3 V01S0100 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 H02E0401 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R21C30:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 V06S0203 arc: H00L0100 V02N0301 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06E0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 H02W0301 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0303 E1_H02W0501 arc: W3_H06W0103 E3_H06W0103 arc: B0 H02W0101 arc: B2 V02N0101 arc: B6 V02S0501 arc: C0 H02E0601 arc: C1 H02W0401 arc: C2 V02N0601 arc: C6 E1_H02W0401 arc: CE0 S1_V02N0201 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V00B0100 arc: D2 V02N0001 arc: D3 H02W0001 arc: D6 V02N0401 arc: D7 H02W0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H01W0100 F0 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 H02E0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q6 arc: S1_V02S0001 F0 arc: S1_V02S0601 Q4 arc: S3_V06S0003 F0 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000110011001100 word: SLICEA.K1.INIT 0000111111111111 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R21C31:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H01W0000 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A4 H02E0701 arc: A7 H00L0000 arc: B4 V02S0701 arc: B7 H01E0101 arc: C4 V00T0100 arc: C5 H02E0601 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 H02E0201 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q2 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: M0 E1_H02W0601 arc: M2 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F5 arc: N3_V06N0103 Q2 arc: N3_V06N0303 F5 arc: V01S0100 Q2 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000010 word: SLICEC.K1.INIT 0000000000001111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R21C32:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02N0401 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02N0201 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0401 arc: E1_H02E0401 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: B1 H02E0301 arc: B4 S1_V02N0701 arc: B5 V01S0000 arc: C1 H00L0100 arc: C4 V00T0100 arc: C5 N1_V02S0001 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE2 H00L0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D4 H02W0001 arc: D5 V02S0401 arc: E1_H02E0001 Q2 arc: E1_H02E0301 Q1 arc: E3_H06E0103 Q2 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q6 arc: M2 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q2 arc: N3_V06N0103 Q1 arc: S3_V06S0303 F5 arc: V01S0000 Q4 arc: V01S0100 Q1 arc: W1_H02W0501 F5 arc: W3_H06W0103 Q1 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1111001111111111 word: SLICEC.K1.INIT 1100000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R21C33:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02N0601 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H01W0000 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0003 W3_H06E0003 arc: B1 V02N0101 arc: B3 H02W0301 arc: B5 H00L0000 arc: B7 V00B0100 arc: C0 H00R0100 arc: C1 H00L0100 arc: C3 H02E0401 arc: C5 V00T0000 arc: C7 V02N0201 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02W0001 arc: D3 V01S0100 arc: D5 H01W0000 arc: D7 H01W0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: E1_H02E0101 F1 arc: E1_H02E0501 Q7 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q5 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F0 arc: N1_V02N0301 Q3 arc: S3_V06S0103 F1 arc: V01S0000 F1 arc: V01S0100 F1 arc: W3_H06W0003 Q3 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0011000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R21C34:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0203 N1_V01S0000 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 S3_V06N0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A1 H00L0000 arc: A5 N1_V01N0101 arc: B0 H02W0101 arc: B1 H02E0301 arc: B5 V01S0000 arc: B7 H02W0301 arc: C0 H02E0401 arc: C1 H00R0100 arc: C5 V00T0000 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 N1_V01S0000 arc: D4 V02N0401 arc: D5 E1_H02W0001 arc: D7 V02S0401 arc: E1_H01E0101 F1 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q4 arc: M2 V00T0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q2 arc: N3_V06N0003 Q0 arc: V01S0000 F7 arc: W1_H02W0401 Q4 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1010110000000000 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111110011111010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 .tile R21C35:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0103 H01E0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 E1_H02W0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: E1_H02E0101 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: A1 H00L0000 arc: A3 V02N0701 arc: B0 V02N0101 arc: B1 V00T0000 arc: B2 E1_H02W0301 arc: B3 H02E0301 arc: C0 H02E0601 arc: C1 H02W0401 arc: C2 H00R0100 arc: C3 H02W0401 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02S0201 arc: D2 V00T0100 arc: D3 V02S0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q4 arc: E1_H02E0301 F1 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 Q0 arc: H01W0100 Q6 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: N3_V06N0003 Q0 arc: N3_V06N0303 Q6 arc: V01S0100 Q2 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1010110000000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1010110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R21C36:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 S1_V02N0201 arc: H00L0100 W1_H02E0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 V06S0303 arc: A3 H02W0701 arc: B1 N1_V02S0301 arc: B3 V01N0001 arc: B5 V02S0501 arc: B6 H01E0101 arc: C1 H00L0100 arc: C3 V02N0601 arc: C5 V02S0001 arc: C6 E1_H01E0101 arc: CE1 S1_V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 V02N0001 arc: D5 H01W0000 arc: D6 V00B0000 arc: D7 H02W0201 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: H01W0100 Q5 arc: M2 V00T0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000011001111 word: SLICED.K0.INIT 1111000000110011 word: SLICED.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111110011101110 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R21C37:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 N1_V01S0000 arc: H00L0100 W1_H02E0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0601 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A3 V02S0701 arc: B3 S1_V02N0301 arc: C3 H00L0100 arc: CE0 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F1 arc: E3_H06E0103 Q1 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q6 arc: H01W0100 Q1 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: M4 W1_H02E0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: S3_V06S0203 Q4 arc: V01S0000 Q4 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R21C38:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 H01E0101 arc: H00R0100 H02W0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H02W0501 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0201 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: E1_H02E0001 W3_H06E0003 arc: W3_H06W0003 N1_V01S0000 arc: A2 H02E0501 arc: A5 V00B0000 arc: A6 N1_V02S0301 arc: B1 H00R0100 arc: B2 V02S0301 arc: B3 V02S0101 arc: B5 H02E0301 arc: B6 V02N0501 arc: C1 S1_V02N0401 arc: C2 W1_H02E0401 arc: C3 H00L0000 arc: C5 V00T0000 arc: C6 E1_H02W0401 arc: D1 V02N0201 arc: D2 V00B0100 arc: D3 V01S0100 arc: D5 V02N0601 arc: D6 H00L0100 arc: E1_H01E0101 F3 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 F2 arc: H00L0100 F1 arc: H01W0000 F3 arc: M4 V00T0100 arc: M6 V00B0100 arc: N1_V01N0001 F4 arc: N3_V06N0003 F3 arc: V01S0100 F1 arc: W1_H02W0001 F2 arc: W1_H02W0401 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000110000111111 word: SLICEB.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 1111000011110011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0110101110110000 word: SLICED.K0.INIT 1111101011111110 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C39:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 H02E0001 arc: H00L0100 H02W0301 arc: H00R0100 V02S0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0301 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V01N0101 arc: H01W0100 W3_H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: A3 W1_H02E0701 arc: A4 S1_V02N0301 arc: A6 H02W0701 arc: B3 V02S0101 arc: B4 V02N0501 arc: B6 V02S0501 arc: C3 H00L0000 arc: C4 V02S0001 arc: C6 V00T0100 arc: CE0 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D3 H02W0001 arc: D4 H00L0100 arc: D6 V02N0401 arc: E1_H01E0001 F6 arc: E3_H06E0103 F1 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F4 arc: N3_V06N0303 Q6 arc: V01S0000 Q1 arc: V01S0100 Q1 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 1111101011111110 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111111111111111 word: SLICED.K0.INIT 0100110011001100 word: SLICED.K1.INIT 1111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C3:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0401 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0001 arc: C3 H00L0100 arc: C7 S1_V02N0201 arc: D1 N1_V01S0000 arc: D2 V00B0100 arc: D3 N1_V01S0000 arc: D5 H02W0201 arc: D6 V00B0000 arc: D7 V00B0000 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H02E0001 arc: M6 V00T0000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R21C40:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 E1_H02W0201 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 H06W0203 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 V02S0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A4 V00T0100 arc: A6 V02S0301 arc: B0 W1_H02E0101 arc: B1 S1_V02N0301 arc: B2 H00R0100 arc: B3 S1_V02N0301 arc: B4 H02W0301 arc: B6 V02N0501 arc: C0 H02E0601 arc: C1 H00L0000 arc: C2 E1_H01W0000 arc: C3 W1_H02E0601 arc: C4 F6 arc: C6 N1_V02S0001 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02N0001 arc: D2 V01S0100 arc: D3 V00B0100 arc: D4 W1_H02E0201 arc: D6 H00L0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0100 F3 arc: H01W0000 F1 arc: H01W0100 F2 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: N3_V06N0203 Q4 arc: V01S0000 F4 arc: V01S0100 F3 arc: W1_H02W0301 F1 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1111000011110011 word: SLICEA.K1.INIT 0000110000111111 word: SLICEB.K0.INIT 1111000011110011 word: SLICEB.K1.INIT 0000110000111111 word: SLICED.K0.INIT 1111101011111110 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0111000011110000 word: SLICEC.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R21C41:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V06S0203 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 H02W0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 H01E0001 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 H01E0001 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 N1_V01S0000 arc: H01W0000 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A7 V02S0301 arc: B0 V02S0101 arc: B1 S1_V02N0101 arc: B2 H02E0301 arc: B5 V02N0701 arc: B7 S1_V02N0701 arc: C0 H00L0000 arc: C1 H00L0100 arc: C2 V02N0601 arc: C4 E1_H01E0101 arc: C5 H02E0601 arc: C6 V02S0001 arc: C7 V00T0000 arc: CE1 W1_H02E0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H02W0001 arc: D2 V02N0201 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 V02S0601 arc: D6 S1_V02N0401 arc: D7 S1_V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q5 arc: E1_H02E0201 F2 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F0 arc: M0 H02W0601 arc: M2 V00B0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q2 arc: N3_V06N0103 Q2 arc: W3_H06W0003 F0 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 1111001111110000 word: SLICEA.K1.INIT 1111111100001100 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1010100000000000 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R21C42:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 H02E0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 H01E0001 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H02E0501 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 H01E0101 arc: V00B0000 H02E0401 arc: V00B0100 H02E0701 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 H01E0101 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: A1 H00L0000 arc: B1 V02S0301 arc: B3 H00R0100 arc: B4 V02S0701 arc: B7 V02N0701 arc: C0 V02S0601 arc: C1 H02W0401 arc: C3 H00L0100 arc: C4 N1_V02S0001 arc: C6 H02E0601 arc: C7 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D3 H02E0201 arc: D4 N1_V02S0401 arc: D5 W1_H02E0001 arc: D6 V00B0000 arc: D7 H02E0201 arc: E1_H01E0001 F6 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: M0 H02W0601 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F0 arc: N1_V02N0301 Q3 arc: S3_V06S0203 Q7 arc: V01S0000 Q4 arc: V01S0100 Q3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000110000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 1100000011110011 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 1010100000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R21C43:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 N1_V02S0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 W1_H02E0401 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V02S0701 arc: E1_H01E0101 W3_H06E0203 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 V00T0100 arc: A5 H02E0701 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 H00L0000 arc: B5 N1_V02S0501 arc: B7 V02N0701 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 E1_H02W0401 arc: C5 V02S0001 arc: C6 V00B0100 arc: C7 V02S0201 arc: CE3 H00R0000 arc: CLK1 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 E1_H02W0201 arc: D5 N1_V02S0401 arc: D6 V00B0000 arc: D7 H00L0100 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR1 V00T0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q0 arc: V00B0100 Q7 arc: V01S0100 Q7 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R21C44:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02N0301 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N3_V06S0003 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 H06E0303 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E3_H06W0203 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: B1 E1_H02W0301 arc: B2 E1_H01W0100 arc: B6 V01S0000 arc: C1 H00L0000 arc: C2 E1_H02W0601 arc: C6 V00T0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 V02N0201 arc: D6 H00L0100 arc: D7 V02S0601 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: V01S0000 F2 arc: V01S0100 Q4 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0011001100001111 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000001111110011 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R21C45:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 V06S0003 arc: H00L0000 V02N0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H02E0401 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02S0501 arc: E1_H02E0601 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E1_H02W0001 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 N1_V02S0301 arc: A5 V00T0100 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 V00B0100 arc: B5 H00L0000 arc: B7 H02E0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 V00T0000 arc: C5 V02N0201 arc: C7 V02S0001 arc: CLK1 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: D4 V00B0000 arc: D5 H00R0100 arc: D7 S1_V02N0401 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q0 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0101 F7 arc: N3_V06N0203 F7 arc: S1_V02S0701 F7 arc: V01S0100 F7 arc: W1_H02W0701 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R21C46:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 V02N0101 arc: H00R0000 V02N0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 S3_V06N0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: A0 H02E0501 arc: A1 H02E0501 arc: A2 H02E0501 arc: A3 H02E0501 arc: A4 N1_V02S0301 arc: A5 E1_H02W0501 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B4 S1_V02N0501 arc: B5 H00R0000 arc: B6 V02S0701 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 V00T0100 arc: C5 V02N0001 arc: C6 V00T0000 arc: CLK1 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 V02N0601 arc: D7 H00L0100 arc: E1_H02E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: LSR1 W1_H02E0301 arc: M6 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q3 arc: N1_V02N0401 F6 arc: W1_H02W0201 Q2 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R21C47:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0303 H01E0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 N1_V02S0601 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N1_V01S0100 arc: N1_V02N0101 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: A1 V02S0501 arc: A7 E1_H02W0701 arc: B1 V00B0000 arc: B3 H02E0301 arc: B4 H02E0101 arc: B7 H02W0301 arc: C1 H00R0100 arc: C2 V02N0401 arc: C3 H02E0401 arc: C4 H02E0601 arc: C6 V02S0201 arc: C7 V02S0201 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 S1_V02N0001 arc: D3 H02E0201 arc: D4 H02E0001 arc: D5 H01W0000 arc: D6 S1_V02N0401 arc: D7 S1_V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: H01W0100 Q3 arc: M0 V00T0000 arc: M4 V00T0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F4 arc: N1_V02N0001 Q0 arc: S3_V06S0003 Q3 arc: V01S0000 Q3 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111111110111000 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1110000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R21C48:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: N1_V02N0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 W1_H02E0701 arc: A2 V00T0000 arc: B2 H02W0301 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 N1_V02S0701 arc: B6 H02W0101 arc: B7 V02S0501 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0501 Q7 arc: W3_H06W0003 Q3 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R21C49:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 V06N0003 arc: H00L0000 V02S0001 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H02W0401 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00T0000 H02E0201 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0001 W3_H06E0003 arc: S1_V02S0701 W3_H06E0203 arc: W3_H06W0003 E1_H02W0001 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: B0 V02S0101 arc: B1 V00B0000 arc: B2 V02S0301 arc: B3 H00R0100 arc: B4 H00L0000 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 V02S0501 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q2 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q7 arc: S1_V02S0601 Q4 arc: V01S0000 Q6 arc: V01S0100 Q3 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R21C4:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: H00L0100 V02N0301 arc: H00R0100 N1_V02S0501 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0401 V01N0001 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 E1_H02W0701 arc: A1 H02E0501 arc: A2 H02E0501 arc: B1 S1_V02N0301 arc: B2 S1_V02N0301 arc: C1 S1_V02N0601 arc: C2 S1_V02N0401 arc: D1 V00B0100 arc: D2 V00B0100 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00B0000 arc: M3 H00L0100 arc: M4 V00B0000 arc: M5 H00R0100 arc: M6 V00B0000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000100001 word: SLICEB.K0.INIT 0000000000100001 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C50:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 E1_H02W0201 arc: H00R0100 H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 E1_H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V02S0601 arc: E1_H01E0101 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: B0 V00T0000 arc: B1 H00R0100 arc: B2 E1_H02W0101 arc: B3 H02W0301 arc: B4 V00B0100 arc: B5 H00L0000 arc: B6 V00B0000 arc: B7 H02E0101 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: S1_V02S0201 Q0 arc: S3_V06S0103 Q1 arc: V01S0000 Q3 arc: W1_H02W0701 Q7 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R21C51:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 H01E0101 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 H01E0101 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: E3_H06E0103 W3_H06E0003 arc: B0 W1_H02E0301 arc: B1 H00R0100 arc: B2 H02E0301 arc: B3 H00R0000 arc: B4 H02W0301 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 H02E0101 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 Q3 arc: S3_V06S0103 Q2 arc: V01S0100 Q5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R21C52:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: H00R0100 H02E0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 E1_H02W0501 arc: N3_V06N0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: B0 V00B0000 arc: B1 V02S0101 arc: B4 V01S0000 arc: B5 H00R0000 arc: B6 V00B0100 arc: B7 H02W0101 arc: C4 S1_V02N0001 arc: C5 V01N0101 arc: C6 V02N0001 arc: C7 H02W0601 arc: CE0 E1_H02W0101 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 V02S0601 arc: D5 V02S0601 arc: D6 V02S0601 arc: D7 V02S0601 arc: E1_H01E0101 Q7 arc: E1_H02E0401 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0100 Q6 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q5 arc: V00B0100 Q7 arc: V01S0000 Q5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R21C53:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 N1_V02S0301 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0601 V02N0601 arc: S1_V02S0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: A1 H00L0000 arc: A3 V02S0701 arc: A5 V02N0301 arc: A7 H02E0701 arc: B0 V02S0301 arc: B1 V00T0000 arc: B2 V02N0301 arc: B3 H02E0301 arc: B4 H00R0000 arc: B5 W1_H02E0101 arc: B6 V01S0000 arc: B7 H01E0101 arc: C0 H02E0601 arc: C1 H00R0100 arc: C2 H00L0100 arc: C3 H00R0100 arc: C4 N1_V02S0201 arc: C5 W1_H02E0601 arc: C6 V00B0100 arc: C7 W1_H02E0401 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V00T0100 arc: D2 E1_H02W0001 arc: D3 V00T0100 arc: D4 E1_H02W0001 arc: D5 S1_V02N0601 arc: D6 E1_H02W0001 arc: D7 S1_V02N0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0000 Q6 arc: H01W0000 F1 arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: V01S0000 Q0 arc: V01S0100 Q4 arc: W1_H02W0301 F3 arc: W1_H02W0501 F7 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0101001110101100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0101001110101100 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0101001110101100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0101001110101100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R21C54:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02S0401 arc: H00L0000 E1_H02W0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 S1_V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A3 V02S0501 arc: A5 V00B0000 arc: A7 V02N0301 arc: B2 H00R0100 arc: B3 V01N0001 arc: B4 H01E0101 arc: B5 H00R0000 arc: B6 V00B0000 arc: B7 V02N0501 arc: C0 E1_H02W0401 arc: C1 H00L0100 arc: C2 N1_V02S0601 arc: C3 H00L0000 arc: C4 N1_V02S0001 arc: C5 V00T0000 arc: C6 V00B0100 arc: C7 V00T0000 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 F0 arc: D2 H02W0001 arc: D3 V00T0100 arc: D4 H02W0001 arc: D5 S1_V02N0601 arc: D6 H02W0001 arc: D7 S1_V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: N1_V02N0201 F0 arc: V00B0000 Q4 arc: V01S0100 Q6 arc: W1_H02W0101 F1 arc: W1_H02W0201 F0 arc: W1_H02W0301 F3 arc: W1_H02W0501 F5 arc: W1_H02W0701 F7 arc: W3_H06W0003 F0 arc: W3_H06W0103 F1 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0101001110101100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0101001110101100 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0101001110101100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R21C55:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 H01E0001 arc: H00L0000 H02W0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0501 arc: V00T0100 H02W0101 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 E1_H01W0100 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: A2 E1_H01E0001 arc: A4 N1_V01N0101 arc: B2 E1_H01W0100 arc: B3 V02N0301 arc: B4 H00L0000 arc: B5 V01S0000 arc: C2 V02S0601 arc: C3 S1_V02N0601 arc: C4 V00T0100 arc: C5 V02N0201 arc: CE0 H00L0100 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 H02E0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F4 arc: H01W0100 Q6 arc: M0 E1_H02W0601 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q5 arc: V01S0000 Q3 arc: V01S0100 Q0 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0001110111100010 word: SLICEC.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0001110111100010 word: SLICEB.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R21C56:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0501 V02S0501 arc: H00L0100 H02W0301 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00T0000 H02E0201 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: N1_V02N0101 W3_H06E0103 arc: W3_H06W0203 N1_V01S0000 arc: B4 V02S0701 arc: B5 V00B0100 arc: B7 H01E0101 arc: C3 H02E0401 arc: C4 V02N0001 arc: C5 V02N0201 arc: C7 V00T0100 arc: CE0 H00L0100 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 V02S0601 arc: D7 V02S0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F3 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q0 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q5 arc: N1_V02N0201 Q0 arc: N1_V02N0401 Q4 arc: N1_V02N0701 Q7 arc: V00B0100 Q7 arc: V01S0100 Q0 arc: W1_H02W0001 Q0 arc: W1_H02W0201 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R21C57:PLC2 arc: H00L0100 V02N0301 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 E1_H01W0100 arc: W1_H02W0101 H01E0101 arc: W1_H02W0601 N3_V06S0303 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0000 Q6 arc: LSR0 H02E0501 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C58:PLC2 arc: N1_V02N0201 W1_H02E0201 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V01S0000 S3_V06N0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 V02N0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 .tile R21C59:PLC2 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 .tile R21C5:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 H02W0001 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00B0100 V02S0101 arc: V00T0000 H02W0001 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 S1_V02N0001 arc: A1 H02W0501 arc: A7 H00L0000 arc: B0 V02N0301 arc: B1 E1_H02W0301 arc: B5 H02E0101 arc: B6 V00T0000 arc: B7 V00B0000 arc: C0 V02N0601 arc: C1 E1_H02W0401 arc: C5 E1_H02W0401 arc: C6 H02W0601 arc: C7 E1_H02W0601 arc: CE0 V02N0201 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 S1_V02N0201 arc: D5 H00L0100 arc: D6 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F0 arc: E1_H02E0501 Q5 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0301 F1 arc: N1_V02N0401 F6 arc: W1_H02W0701 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000110011111100 word: SLICED.K0.INIT 0000000011111100 word: SLICED.K1.INIT 0000000000001110 word: SLICEA.K0.INIT 0000111111001100 word: SLICEA.K1.INIT 1100010000000100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R21C60:PLC2 arc: S3_V06S0103 H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 .tile R21C61:PLC2 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H06E0303 .tile R21C62:PLC2 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06E0203 arc: V01S0100 N3_V06S0303 .tile R21C63:PLC2 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 .tile R21C64:PLC2 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0401 N3_V06S0203 arc: V01S0100 N3_V06S0303 arc: S3_V06S0303 W3_H06E0303 .tile R21C65:PLC2 arc: S3_V06S0203 W3_H06E0203 .tile R21C66:PLC2 arc: S3_V06S0103 H06E0103 arc: E3_H06E0003 W3_H06E0303 .tile R21C67:PLC2 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 .tile R21C69:PLC2 arc: N1_V02N0301 H06E0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 .tile R21C6:PLC2 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02N0401 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: A3 E1_H02W0501 arc: A5 E1_H02W0701 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 H00R0100 arc: B3 H01W0100 arc: B4 V00B0100 arc: B5 H02E0301 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C2 N1_V01N0001 arc: C3 N1_V02S0401 arc: C4 H02W0401 arc: C5 H02W0401 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 V00B0000 arc: D7 V02N0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F7 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q6 arc: S1_V02S0701 F7 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000110011111100 word: SLICEC.K1.INIT 1100010000000100 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0000010100000111 word: SLICEA.K1.INIT 0000010100000111 word: SLICEB.K0.INIT 0011001100111111 word: SLICEB.K1.INIT 0000010100000111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R21C70:PLC2 arc: S3_V06S0103 N3_V06S0003 .tile R21C7:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0401 V02N0401 arc: H00R0000 V02N0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02E0501 arc: V00T0100 V02S0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: A0 H00R0000 arc: A1 H00R0000 arc: A6 H00R0000 arc: A7 H00R0000 arc: B0 H00R0100 arc: B1 H00R0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C6 V00T0100 arc: C7 V00T0100 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D6 V01N0001 arc: D7 V01N0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M4 W1_H02E0401 arc: M5 H02W0001 arc: M6 W1_H02E0401 arc: N1_V01N0101 F3 word: SLICEA.K0.INIT 0000000000000001 word: SLICEA.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R21C8:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: H00L0100 V02N0301 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E1_H02W0601 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: B5 V02N0501 arc: B7 E1_H02W0301 arc: C5 H02E0401 arc: C7 H02E0401 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D5 H00L0100 arc: D7 H01W0000 arc: E1_H01E0001 F7 arc: E3_H06E0103 Q2 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0701 Q5 arc: S3_V06S0103 Q2 arc: V01S0000 Q7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000110011111100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000110011111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R21C9:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0601 V01N0001 arc: E3_H06E0103 N1_V01S0100 arc: H00R0100 S1_V02N0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0001 arc: W1_H02W0201 H01E0001 arc: W3_H06W0203 E1_H02W0701 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E1_H02E0201 Q0 arc: E1_H02E0401 Q4 arc: M0 V00B0000 arc: M2 E1_H02W0601 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0103 Q2 arc: S1_V02S0401 Q4 arc: V01S0000 Q6 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R22C10:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 H01E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H06W0203 arc: S1_V02S0301 H02W0301 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E3_H06W0003 arc: N1_V02N0101 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: A6 E1_H02W0501 arc: A7 E1_H02W0501 arc: B6 V02S0501 arc: B7 V02S0501 arc: C5 V00T0100 arc: C6 H01E0001 arc: C7 H01E0001 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D5 V02S0401 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0101 Q2 arc: E3_H06E0303 F6 arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0100 F5 arc: H01W0000 Q0 arc: M0 V00T0000 arc: M2 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V01S0000 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0000000000100011 word: SLICED.K1.INIT 0000000010001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R22C11:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V06S0203 arc: H00L0000 N1_V02S0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 S1_V02N0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 V01N0101 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 H02W0001 arc: V00T0100 V02S0501 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V06N0303 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0003 arc: A0 H02E0701 arc: A1 H02E0701 arc: A3 H02E0501 arc: A4 V02S0101 arc: A6 N1_V01N0101 arc: A7 N1_V01S0100 arc: B0 V02N0301 arc: B1 V00B0000 arc: B2 H02E0301 arc: B3 H00L0000 arc: B4 N1_V02S0501 arc: B6 V01S0000 arc: B7 V00B0000 arc: C0 H02W0401 arc: C1 S1_V02N0401 arc: C2 W1_H02E0401 arc: C3 N1_V01N0001 arc: C4 H02W0601 arc: C6 E1_H01E0101 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00B0100 arc: D2 V02S0001 arc: D3 V02N0201 arc: D4 V02S0601 arc: D6 H02E0201 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F3 arc: E1_H02E0201 F0 arc: E1_H02E0401 F6 arc: E3_H06E0003 F0 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F1 arc: S3_V06S0103 F2 arc: V01S0000 F7 arc: V01S0100 Q2 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 0100000001110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1011010010000111 word: SLICED.K0.INIT 0000000000010000 word: SLICED.K1.INIT 0000101100001000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R22C12:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 V02S0401 arc: E3_H06E0303 N1_V01S0100 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 V06N0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0501 arc: A7 H02E0501 arc: B0 H00R0100 arc: B1 V00T0000 arc: B3 H00R0000 arc: B5 H02E0101 arc: B6 H02E0301 arc: B7 H02W0101 arc: C0 W1_H02E0401 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 V02S0401 arc: C4 V02S0001 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 E1_H01E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02N0001 arc: D2 S1_V02N0201 arc: D3 V00B0100 arc: D4 S1_V02N0601 arc: D5 V02N0601 arc: D6 V00B0000 arc: D7 V02S0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 F3 arc: E1_H02E0601 F4 arc: E3_H06E0103 F2 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 F3 arc: H00R0000 Q6 arc: H01W0000 F6 arc: H01W0100 F6 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: N1_V02N0301 F1 arc: S3_V06S0303 F6 arc: V01S0000 F0 arc: V01S0100 Q0 arc: W1_H02W0001 F0 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1011010010000111 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 0011000000111111 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 0011000000111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R22C13:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 V02S0401 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 H00L0100 arc: A5 V00B0000 arc: A6 N1_V01N0101 arc: A7 V00T0100 arc: B0 H02W0301 arc: B1 V00T0000 arc: B2 H00L0000 arc: B3 H00R0000 arc: B4 H02E0101 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 V01S0000 arc: C0 V02N0401 arc: C1 N1_V01N0001 arc: C2 V02S0401 arc: C3 W1_H02E0601 arc: C4 H02W0401 arc: C5 F4 arc: C6 F4 arc: C7 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02W0001 arc: D2 V02S0001 arc: D3 S1_V02N0201 arc: D4 H02E0001 arc: D5 S1_V02N0601 arc: D6 H00R0100 arc: D7 N1_V02S0401 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F2 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q4 arc: N1_V02N0601 F4 arc: N3_V06N0203 F7 arc: S3_V06S0203 F4 arc: V00B0000 Q4 arc: V00T0100 F3 arc: V01S0000 F6 arc: V01S0100 Q0 arc: W1_H02W0201 F0 arc: W1_H02W0701 F5 word: SLICEB.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 0100000001110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 0100101101111000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 0100000001110000 word: SLICED.K0.INIT 0000101100001000 word: SLICED.K1.INIT 0001000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R22C14:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02W0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V02N0601 arc: W3_H06W0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 S1_V02N0101 arc: A5 E1_H02W0701 arc: A6 N1_V01S0100 arc: A7 N1_V01N0101 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02S0301 arc: B3 V02S0301 arc: B4 V02S0701 arc: B5 H02E0301 arc: B6 N1_V01S0000 arc: B7 H02W0301 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00B0100 arc: C5 N1_V02S0201 arc: C6 H02W0401 arc: C7 E1_H01E0101 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 E1_H02W0001 arc: D5 W1_H02E0201 arc: D6 V00B0000 arc: D7 E1_H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E1_H02E0101 Q3 arc: E1_H02E0301 Q1 arc: E1_H02E0401 F6 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: LSR1 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q2 arc: V01S0000 F3 arc: V01S0100 Q3 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 1010010100100001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R22C15:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 H02E0201 arc: H00R0100 H02W0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00T0000 H02E0201 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0401 H01E0001 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 V02S0101 arc: A5 H02E0701 arc: A7 V02S0301 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: B4 V02S0501 arc: B5 W1_H02E0101 arc: B7 V02S0701 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 E1_H02W0401 arc: C5 W1_H02E0601 arc: C7 S1_V02N0001 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CLK1 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 H02W0001 arc: D5 V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 Q3 arc: LSR0 H02W0301 arc: LSR1 H02E0501 arc: M6 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q3 arc: N3_V06N0303 F6 arc: S1_V02S0001 F0 arc: S1_V02S0201 F2 arc: S1_V02S0301 Q1 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W1_H02W0301 Q3 arc: W3_H06W0003 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0010111111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R22C16:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 S1_V02N0101 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 N1_V02S0701 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 S1_V02N0101 arc: A5 H02E0501 arc: A7 H00L0000 arc: B0 E1_H02W0301 arc: B1 E1_H02W0101 arc: B2 E1_H02W0301 arc: B3 E1_H02W0101 arc: B4 S1_V02N0501 arc: B5 V02N0701 arc: B7 H02W0301 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 V02N0001 arc: C5 W1_H02E0601 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 H02W0201 arc: D5 V02N0401 arc: D7 E1_H02W0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q1 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q1 arc: N1_V02N0301 Q3 arc: S1_V02S0001 Q2 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q0 arc: S3_V06S0103 Q2 arc: V00T0000 F2 arc: V01S0000 Q3 arc: V01S0100 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010010100100001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R22C17:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V01N0001 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02E0101 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 N1_V01S0000 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 N1_V02S0701 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 V06S0303 arc: E1_H02E0001 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 V02N0101 arc: A5 H02E0701 arc: A6 W1_H02E0701 arc: A7 W1_H02E0701 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 H00L0000 arc: B5 W1_H02E0101 arc: B6 V00B0100 arc: B7 V00T0000 arc: C0 H02E0401 arc: C1 H02E0601 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 V01N0101 arc: C5 V00T0100 arc: C6 H02W0401 arc: C7 N1_V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V01N0001 arc: D5 W1_H02E0001 arc: D6 V00B0000 arc: D7 W1_H02E0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F6 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 H02E0301 arc: LSR1 H02E0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q0 arc: N1_V02N0301 Q3 arc: S1_V02S0301 Q3 arc: V01S0000 F3 arc: V01S0100 Q2 word: SLICED.K0.INIT 1010000011000000 word: SLICED.K1.INIT 1001000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R22C18:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V01N0101 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 H06W0003 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H01E0001 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0100 H02W0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 H01E0001 arc: A1 V01N0101 arc: A3 N1_V02S0501 arc: A4 V02N0301 arc: A5 V02S0101 arc: A7 N1_V01N0101 arc: B0 V00B0000 arc: B1 V02N0101 arc: B2 H00R0100 arc: B3 H00R0000 arc: B4 H02E0301 arc: B5 N1_V01S0000 arc: B7 H02E0101 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 E1_H02W0601 arc: C3 S1_V02N0401 arc: C4 V02N0001 arc: C5 V00T0000 arc: C7 E1_H01E0101 arc: D0 V02S0201 arc: D1 V00T0100 arc: D2 N1_V02S0001 arc: D3 V01S0100 arc: D4 V01N0001 arc: D5 H00L0100 arc: D7 W1_H02E0001 arc: E1_H01E0101 F5 arc: E3_H06E0103 F2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 F3 arc: M6 V00B0100 arc: N1_V01N0101 F4 arc: N3_V06N0303 F6 arc: V00T0000 F0 arc: V01S0100 F1 word: SLICEC.K0.INIT 1000101001000101 word: SLICEC.K1.INIT 1101000000000000 word: SLICEB.K0.INIT 0011111100000000 word: SLICEB.K1.INIT 1001000000000000 word: SLICEA.K0.INIT 1100010000110001 word: SLICEA.K1.INIT 1100111101000101 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R22C19:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 H02W0301 arc: H00R0000 V02N0601 arc: H00R0100 H02W0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0301 V02N0301 arc: W1_H02W0701 S1_V02N0701 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A2 S1_V02N0701 arc: A3 S1_V02N0701 arc: A4 H02E0701 arc: A5 S1_V02N0101 arc: A6 N1_V01N0101 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 V02S0701 arc: B5 V02N0701 arc: B6 V00T0000 arc: B7 V02N0501 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V02S0001 arc: C5 H02E0401 arc: C6 E1_H01E0101 arc: C7 V02N0001 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CLK1 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 V02S0401 arc: D5 V02N0401 arc: D6 F2 arc: D7 H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F1 arc: E1_H02E0001 Q2 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q1 arc: N1_V02N0101 Q3 arc: N3_V06N0003 Q0 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q0 arc: S1_V02S0301 Q3 arc: S3_V06S0103 Q1 arc: V00T0000 Q2 arc: V01S0000 F3 arc: V01S0100 Q2 word: SLICED.K0.INIT 1000010000100001 word: SLICED.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R22C20:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0100 N1_V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 W1_H02E0401 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 H02E0701 arc: A5 H02W0701 arc: A6 V00T0100 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 N1_V02S0501 arc: B5 H00L0000 arc: B6 V02N0701 arc: B7 W1_H02E0101 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 V02S0001 arc: C5 V00T0000 arc: C6 V00B0100 arc: C7 H01E0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 V02S0401 arc: D5 H00L0100 arc: D6 V01N0001 arc: D7 S1_V02N0401 arc: E1_H01E0101 Q1 arc: E1_H02E0001 Q0 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F2 arc: LSR0 H02E0501 arc: LSR1 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q3 arc: N1_V02N0201 Q2 arc: S1_V02S0101 Q3 arc: S3_V06S0103 Q2 arc: V01S0000 F3 arc: V01S0100 Q3 word: SLICED.K0.INIT 1000010000100001 word: SLICED.K1.INIT 1100001100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R22C21:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 W1_H02E0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E3_H06W0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02S0101 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A3 V00B0000 arc: A4 N1_V01N0101 arc: A5 H02E0501 arc: A7 H00L0000 arc: B3 H00R0000 arc: B4 S1_V02N0501 arc: B5 V02S0501 arc: B7 W1_H02E0301 arc: C3 W1_H02E0601 arc: C4 V00T0000 arc: C5 V00B0100 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 H02E0201 arc: D4 V02N0601 arc: D5 V02S0401 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H02E0701 F7 arc: E3_H06E0003 Q0 arc: E3_H06E0203 F4 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: M0 H02E0601 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q5 arc: N1_V02N0001 F2 arc: S3_V06S0003 Q0 arc: V01S0000 Q5 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010000011000000 word: SLICEC.K0.INIT 1100110010000000 word: SLICEC.K1.INIT 1110101011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R22C22:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V02N0401 arc: E3_H06E0003 H01E0001 arc: H00L0000 N1_V02S0001 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H02E0301 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 V02N0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 E1_H02W0701 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A2 V00B0000 arc: A5 V00T0000 arc: A6 F5 arc: B2 H00R0100 arc: B3 H01W0100 arc: B5 V02S0501 arc: B6 V00B0000 arc: B7 V01S0000 arc: C2 H00L0000 arc: C3 V02S0601 arc: C5 V02S0201 arc: C6 V00B0100 arc: C7 H02W0601 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 S1_V02N0001 arc: D5 H02E0201 arc: D6 N1_V02S0401 arc: D7 V02S0601 arc: E1_H01E0101 F3 arc: E3_H06E0203 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: V01S0000 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011111101011111 word: SLICEB.K0.INIT 1010100010101010 word: SLICEB.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0100110011001100 word: SLICED.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R22C23:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02N0101 arc: H00R0100 N1_V02S0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0100 H02E0301 arc: W1_H02W0601 N1_V02S0601 arc: N1_V02N0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: A2 V02N0701 arc: B2 V02N0301 arc: B4 H00R0000 arc: C2 H00L0100 arc: C4 E1_H02W0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D4 H02E0201 arc: D5 E1_H02W0001 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00R0000 Q4 arc: H01W0000 Q4 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0011011100111111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R22C24:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02W0201 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 W1_H02E0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V01N0001 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: A5 V02S0301 arc: A6 H02E0501 arc: A7 H00L0000 arc: B4 V02S0701 arc: B5 H00R0000 arc: B6 H01E0101 arc: B7 W1_H02E0101 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: C6 V00T0000 arc: C7 H02W0401 arc: CE0 H02E0101 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D4 V01N0001 arc: D5 N1_V02S0601 arc: D6 H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q2 arc: E1_H02E0701 Q5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0100 Q7 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q5 arc: N1_V02N0501 Q7 arc: S1_V02S0501 Q5 arc: V01S0000 F6 arc: W1_H02W0001 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111000011101110 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 1111100011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R22C25:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 S1_V02N0401 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V02N0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q4 arc: H01W0000 Q2 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: N1_V02N0001 Q0 arc: V01S0000 Q4 arc: V01S0100 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R22C26:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 V06N0303 arc: H00L0100 H02W0101 arc: H00R0100 H02W0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 S1_V02N0701 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: A1 H02W0701 arc: A2 V02S0701 arc: A5 V00B0000 arc: A6 V02S0301 arc: B0 H00R0100 arc: B1 V00T0000 arc: B2 F3 arc: B3 H00L0000 arc: B5 H02E0301 arc: B6 H02E0101 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 E1_H01W0000 arc: C3 V02S0401 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 W1_H02E0201 arc: D5 H00L0100 arc: D6 H02E0201 arc: D7 S1_V02N0601 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q2 arc: H01W0100 Q0 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F6 arc: N1_V02N0501 F7 arc: V01S0100 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1110010011001100 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0010001110101111 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 1011000100110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R22C27:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 V02N0001 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 E1_H02W0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 V02N0701 arc: S1_V02S0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: A4 V00B0000 arc: A5 W1_H02E0701 arc: A7 H00R0000 arc: B3 H02W0301 arc: B4 V02S0701 arc: B5 H00L0000 arc: B7 H02E0301 arc: C3 F6 arc: C4 S1_V02N0001 arc: C5 V00T0100 arc: C7 F4 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D3 W1_H02E0001 arc: D4 V02N0601 arc: D5 H00R0100 arc: D7 V02S0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q1 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F5 arc: S3_V06S0103 F1 arc: V01S0000 F1 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R22C28:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 H02W0101 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 V02N0701 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A7 W1_H02E0701 arc: B3 H00R0100 arc: B7 N1_V01S0000 arc: C3 W1_H02E0601 arc: C4 W1_H02E0401 arc: C5 H02E0601 arc: C7 N1_V02S0001 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D3 H02W0201 arc: D4 H01W0000 arc: D5 H00L0100 arc: D7 V02S0401 arc: E1_H01E0101 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: H01W0100 F1 arc: LSR0 H02W0301 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: N3_V06N0303 F5 arc: S1_V02S0101 Q1 arc: S1_V02S0601 F6 arc: S3_V06S0303 F5 arc: V01S0000 F5 arc: V01S0100 F5 arc: W1_H02W0601 F4 arc: W3_H06W0103 F1 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011111111111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R22C29:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0103 H01E0101 arc: H00R0100 W1_H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 H02E0201 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H01E0001 arc: B0 V02S0301 arc: B1 H01W0100 arc: B6 V01S0000 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C6 V00T0000 arc: CE1 E1_H02W0101 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00T0100 arc: D6 V02N0401 arc: D7 H00R0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q4 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V01S0000 Q6 arc: V01S0100 F1 arc: W1_H02W0201 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0011111100000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R22C2:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 H02E0401 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N3_V06N0303 S3_V06N0303 arc: V00B0000 S1_V02N0201 arc: V00T0000 H02E0201 arc: CE2 S1_V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02E0001 arc: D2 H02W0201 arc: D3 V02N0201 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R22C30:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 V06N0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 E1_H02W0201 arc: H00L0100 S1_V02N0301 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 V01N0101 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0103 E3_H06W0103 arc: A1 V02S0501 arc: A3 V00T0000 arc: A5 S1_V02N0101 arc: B1 E1_H02W0101 arc: B3 W1_H02E0301 arc: B5 N1_V01S0000 arc: B7 H02E0101 arc: C1 W1_H02E0601 arc: C3 H00R0100 arc: C5 V00T0100 arc: C6 V02N0001 arc: C7 V01N0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D3 V00B0100 arc: D5 V00B0000 arc: D6 H00L0100 arc: D7 H02W0201 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q6 arc: LSR0 H02W0301 arc: M0 E1_H02W0601 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N3_V06N0003 F0 arc: S3_V06S0303 F5 arc: V01S0000 Q6 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0000000000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R22C31:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02E0101 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H02W0301 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 E1_H01W0100 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: A3 S1_V02N0701 arc: A4 V00T0000 arc: A5 V02S0301 arc: A7 H00R0000 arc: B3 V02N0301 arc: B4 S1_V02N0501 arc: B5 W1_H02E0301 arc: B7 V00B0100 arc: C1 E1_H02W0401 arc: C3 V02N0601 arc: C4 S1_V02N0001 arc: C5 N1_V02S0201 arc: C6 V00T0100 arc: C7 H02E0401 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D3 V02N0001 arc: D4 H00R0100 arc: D5 H00L0100 arc: D6 V02S0401 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q4 arc: E1_H02E0501 F5 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H00R0100 F5 arc: H01W0000 F1 arc: H01W0100 F6 arc: LSR0 H02E0301 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F6 arc: N1_V02N0401 F6 arc: N1_V02N0601 F6 arc: N3_V06N0303 F6 arc: S1_V02S0601 F6 arc: S3_V06S0203 F7 arc: V01S0000 F4 arc: V01S0100 F1 arc: W1_H02W0401 F4 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0111000001111100 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1111000011111111 word: SLICED.K1.INIT 0000000100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R22C32:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 V02N0101 arc: H00R0000 E1_H02W0401 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0101 H06E0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02W0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E3_H06W0203 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0003 W3_H06E0303 arc: A1 H00L0100 arc: B1 S1_V02N0301 arc: B3 H00L0000 arc: B5 E1_H02W0301 arc: B7 V02S0701 arc: C1 V02S0601 arc: C2 H00L0000 arc: C3 V02N0401 arc: C5 S1_V02N0201 arc: C7 E1_H01E0101 arc: CE0 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0001 arc: D2 H01E0101 arc: D3 V02N0001 arc: D5 V00B0000 arc: D7 V00B0000 arc: E3_H06E0203 Q7 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F2 arc: H01W0100 Q0 arc: M0 V00B0100 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0701 Q5 arc: N3_V06N0203 Q7 arc: W1_H02W0001 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111100011110000 word: SLICEB.K0.INIT 1111111111110000 word: SLICEB.K1.INIT 1111001111000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 .tile R22C33:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0601 W1_H02E0301 arc: H00L0100 N1_V02S0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 H06W0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 H02E0001 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N1_V01S0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A1 H02W0501 arc: A6 N1_V01N0101 arc: B1 V01N0001 arc: B5 V02N0501 arc: B6 N1_V02S0701 arc: C1 V02N0601 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C5 V00T0000 arc: C6 H02E0401 arc: C7 V00T0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 E1_H02W0201 arc: D3 H00R0000 arc: D5 H02W0201 arc: D6 N1_V02S0401 arc: D7 V02S0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: E1_H02E0401 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F5 arc: LSR0 H02E0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q7 arc: N1_V02N0301 F1 arc: N1_V02N0401 F6 arc: N1_V02N0601 F6 arc: N3_V06N0203 Q7 arc: V01S0000 F6 arc: W1_H02W0001 F2 arc: W3_H06W0203 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000010101010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000000000001111 word: SLICED.K0.INIT 1100110010000000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R22C34:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: E3_H06E0203 V06N0203 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 V02S0101 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 E1_H02W0601 arc: H01W0000 W3_H06E0103 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0303 W3_H06E0203 arc: A1 H00L0000 arc: A3 V00T0000 arc: A7 N1_V01N0101 arc: B0 E1_H02W0101 arc: B1 H02W0101 arc: B2 N1_V02S0101 arc: B3 V02N0101 arc: B6 V00B0100 arc: B7 H02E0101 arc: C0 V02N0401 arc: C1 H00R0100 arc: C2 S1_V02N0401 arc: C3 H00R0100 arc: C6 N1_V02S0001 arc: C7 S1_V02N0201 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V02S0201 arc: D2 H02E0201 arc: D3 V02S0201 arc: D6 H02E0201 arc: D7 V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q4 arc: E1_H02E0301 F1 arc: E1_H02E0701 F7 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q2 arc: N3_V06N0303 Q6 arc: S1_V02S0601 Q4 arc: V00T0000 Q2 arc: V01S0000 F1 arc: V01S0100 F7 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1010110000000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1010110000000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1010110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R22C35:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 H02E0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 N1_V02S0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0701 N3_V06S0203 arc: E1_H02E0401 W3_H06E0203 arc: S1_V02S0101 W3_H06E0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 N1_V02S0501 arc: A7 N1_V01N0101 arc: B0 S1_V02N0301 arc: B1 V00T0000 arc: B2 H00R0000 arc: B5 V02N0701 arc: B6 V02S0701 arc: B7 S1_V02N0501 arc: C0 V02S0601 arc: C1 H00R0100 arc: C2 V02N0401 arc: C3 N1_V01N0001 arc: C4 H02E0601 arc: C5 V02S0001 arc: C6 W1_H02E0601 arc: C7 H02W0401 arc: CE0 V02S0201 arc: CE2 N1_V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 E1_H02W0201 arc: D2 V00T0100 arc: D3 S1_V02N0001 arc: D4 F0 arc: D5 F0 arc: D6 W1_H02E0201 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q0 arc: E3_H06E0103 F1 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q4 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q6 arc: N3_V06N0303 Q6 arc: S1_V02S0301 F3 arc: S3_V06S0003 Q0 arc: S3_V06S0203 Q4 arc: V00T0000 Q0 arc: V00T0100 F3 arc: W1_H02W0401 F4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1011000110100000 word: SLICEA.K1.INIT 1100000011110000 word: SLICEC.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 0000000000110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R22C36:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 H01E0101 arc: H00L0100 S1_V02N0301 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0501 V01N0101 arc: N3_V06N0003 V01N0001 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 S1_V02N0401 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0103 E3_H06W0003 arc: A7 H02W0501 arc: B0 V00T0000 arc: B3 H02E0301 arc: B5 V00B0100 arc: B6 S1_V02N0701 arc: B7 V02S0501 arc: C0 H02W0601 arc: C3 S1_V02N0601 arc: C4 H02W0401 arc: C5 N1_V02S0001 arc: C6 V02S0001 arc: C7 V00B0100 arc: D0 S1_V02N0001 arc: D1 E1_H02W0201 arc: D3 S1_V02N0201 arc: D4 H01W0000 arc: D5 H00L0100 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: E1_H02E0401 F4 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F4 arc: M0 V00B0100 arc: N1_V01N0001 F7 arc: N1_V01N0101 F4 arc: N1_V02N0601 F6 arc: N1_V02N0701 F7 arc: S1_V02S0401 F4 arc: V01S0000 F4 arc: W1_H02W0501 F5 arc: W1_H02W0601 F4 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0000111111111111 word: SLICEC.K1.INIT 0000001100000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1010101011000000 word: SLICEA.K0.INIT 1111000000110011 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R22C37:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 W1_H02E0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02W0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 H01E0001 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: B4 H00L0000 arc: B5 H00L0000 arc: C4 H02W0401 arc: C5 V00T0100 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 H02W0001 arc: E3_H06E0003 Q0 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: M0 W1_H02E0601 arc: M2 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q0 arc: N3_V06N0303 F5 arc: S3_V06S0103 Q2 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000000011111100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R22C38:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 E1_H02W0301 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02W0501 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V06S0203 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: A0 H00L0100 arc: A1 H02W0501 arc: A2 H02E0701 arc: B0 N1_V02S0101 arc: B1 H00R0100 arc: B2 V02N0301 arc: B4 V02N0701 arc: B5 V02N0701 arc: B6 V02N0501 arc: B7 V02N0501 arc: C0 N1_V02S0401 arc: C1 S1_V02N0401 arc: C2 H00L0000 arc: C4 V02S0001 arc: C5 V00T0100 arc: C6 W1_H02E0601 arc: C7 V00T0000 arc: CE1 H02W0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V02N0001 arc: D2 V02N0201 arc: D4 W1_H02E0001 arc: D5 S1_V02N0601 arc: D6 V02N0601 arc: D7 V00B0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H01W0000 F1 arc: M2 W1_H02E0601 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q2 arc: N3_V06N0103 Q2 arc: N3_V06N0303 F6 arc: V01S0000 F6 arc: W3_H06W0203 Q4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0011001100110010 word: SLICEA.K1.INIT 1100010010000000 word: SLICED.K0.INIT 1111001111110000 word: SLICED.K1.INIT 1111111100110000 word: SLICEB.K0.INIT 0111000011110000 word: SLICEB.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000000011111100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R22C39:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 S3_V06N0303 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06W0203 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: A1 H00L0000 arc: B0 H02W0101 arc: B1 W1_H02E0301 arc: B2 H00R0100 arc: B3 E1_H02W0301 arc: B4 E1_H02W0101 arc: B5 E1_H02W0101 arc: B6 V02S0501 arc: B7 H02E0101 arc: C0 V02S0601 arc: C1 V02N0401 arc: C2 H02E0601 arc: C3 H00R0100 arc: C4 H02E0401 arc: C5 E1_H02W0601 arc: C6 V00B0100 arc: C7 H02W0601 arc: CE0 N1_V02S0201 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H00R0000 arc: D2 S1_V02N0201 arc: D3 W1_H02E0001 arc: D4 H00L0100 arc: D5 H02E0001 arc: D6 S1_V02N0601 arc: D7 H02E0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0000 F2 arc: H01W0100 F6 arc: M2 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V02N0601 F6 arc: N3_V06N0103 F2 arc: N3_V06N0303 F5 arc: S1_V02S0101 F1 arc: W3_H06W0203 Q4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1111001111000000 word: SLICEA.K1.INIT 1011100011110000 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000000011111100 word: SLICEB.K0.INIT 1111001111110000 word: SLICEB.K1.INIT 1111111100001100 word: SLICED.K0.INIT 1111001111110000 word: SLICED.K1.INIT 1111111100001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R22C3:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02W0001 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H01E0001 arc: V00B0100 H02E0501 arc: C1 H02E0401 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: H01W0100 Q6 arc: M2 W1_H02E0601 arc: M4 H02W0401 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q4 arc: W1_H02W0201 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R22C40:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 H01E0101 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V02S0601 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: B0 H00R0100 arc: B5 V02S0501 arc: B7 V02S0501 arc: C0 H02E0601 arc: C5 V02N0201 arc: C7 V02N0201 arc: CE0 H02E0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 E1_H02W0001 arc: D4 V02N0401 arc: D5 V02N0601 arc: D6 V01N0001 arc: D7 V02N0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q1 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V02N0401 Q6 arc: N3_V06N0103 Q1 arc: N3_V06N0303 Q6 arc: S3_V06S0303 Q6 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1111000011110011 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111000011110011 word: SLICEA.K0.INIT 1100111111111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R22C41:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: H00R0000 H02W0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 E1_H01W0000 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 N1_V01S0000 arc: E1_H02E0001 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0701 W3_H06E0203 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0303 V06N0303 arc: A0 F5 arc: A1 V02S0501 arc: A3 S1_V02N0701 arc: A6 V00T0100 arc: A7 H02E0501 arc: B0 S1_V02N0301 arc: B1 H02E0301 arc: B3 S1_V02N0301 arc: B4 N1_V02S0501 arc: B6 H02W0101 arc: B7 H02W0301 arc: C0 H00L0100 arc: C1 E1_H02W0601 arc: C3 H02W0601 arc: C4 S1_V02N0001 arc: C5 E1_H01E0101 arc: C6 V00T0000 arc: C7 V02N0001 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02N0201 arc: D3 V00B0100 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 V02S0401 arc: D7 S1_V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q6 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 F3 arc: H01W0100 Q4 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0501 F5 arc: S1_V02S0501 F5 arc: S1_V02S0601 Q4 arc: V00B0000 Q4 arc: V01S0000 F0 arc: V01S0100 Q4 arc: W1_H02W0401 Q6 arc: W1_H02W0701 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100010010000000 word: SLICEA.K0.INIT 1111010100110001 word: SLICEA.K1.INIT 1001010001001111 word: SLICEC.K0.INIT 0000110000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0001000000000000 word: SLICED.K1.INIT 1011000011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R22C42:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0701 V06S0203 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 S1_V02N0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V02S0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 H02E0501 arc: A3 V02S0501 arc: B1 S1_V02N0101 arc: B2 H00R0100 arc: B3 E1_H02W0101 arc: B5 W1_H02E0101 arc: B6 V02S0701 arc: B7 V02S0701 arc: C1 H02E0601 arc: C2 N1_V01N0001 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 N1_V02S0201 arc: C6 V02S0001 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 W1_H02E0201 arc: D3 H02W0001 arc: D4 E1_H02W0201 arc: D5 H02E0201 arc: D6 F2 arc: D7 H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 Q5 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V02N0401 Q6 arc: S1_V02S0701 Q5 arc: V00B0100 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111010100110000 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 0000000011110011 word: SLICEB.K1.INIT 1001010001001111 word: SLICED.K0.INIT 1111000011110011 word: SLICED.K1.INIT 1111000011110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R22C43:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 V01N0001 arc: H00L0000 V02S0001 arc: H00L0100 H02E0301 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: H01W0000 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A5 E1_H02W0701 arc: A7 E1_H02W0701 arc: B1 E1_H02W0301 arc: B3 H00R0100 arc: B5 H00L0000 arc: B7 W1_H02E0301 arc: C1 H02W0601 arc: C3 H02W0601 arc: C4 V02S0001 arc: C5 E1_H02W0601 arc: C6 V02S0001 arc: C7 E1_H02W0601 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D3 H00R0000 arc: D4 V02N0601 arc: D5 V02N0601 arc: D6 V02N0401 arc: D7 V02N0401 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 F4 arc: H01W0100 Q1 arc: LSR1 V00B0000 arc: M4 W1_H02E0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V02N0101 F1 arc: N3_V06N0003 F3 arc: N3_V06N0103 F1 arc: V01S0100 F6 arc: W1_H02W0101 Q3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000011001111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011001111 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1100100000000000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1100100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R22C44:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V01N0101 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 V01N0101 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 H02E0401 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 H06W0203 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: A5 N1_V01N0101 arc: B4 H00R0000 arc: B5 H00L0000 arc: C4 N1_V02S0201 arc: C5 W1_H02E0601 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CE2 H02E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D4 H02E0201 arc: D5 W1_H02E0201 arc: E3_H06E0203 Q4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q0 arc: M0 V00T0000 arc: M2 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0401 Q6 arc: V01S0100 Q2 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100111100000011 word: SLICEC.K1.INIT 1010110011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R22C45:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E3_H06E0103 V01N0101 arc: H00L0000 V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 W1_H02E0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: B0 E1_H01W0100 arc: B3 V02S0101 arc: B5 H00R0000 arc: B7 V00B0000 arc: C0 H00L0000 arc: C3 H00L0100 arc: C5 S1_V02N0001 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 S1_V02N0201 arc: D2 V00B0100 arc: D3 H02E0001 arc: D5 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q0 arc: E1_H02E0001 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F2 arc: M0 V00T0100 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q2 arc: N1_V02N0001 F0 arc: N1_V02N0201 F2 arc: N1_V02N0501 F7 arc: N3_V06N0203 F7 arc: N3_V06N0303 F5 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V01S0000 F5 arc: V01S0100 Q0 arc: W1_H02W0501 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1100111111000000 word: SLICEA.K0.INIT 0000110011111100 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R22C46:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N3_V06S0203 arc: H00L0100 W1_H02E0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 V01N0001 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 H01E0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 E1_H02W0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: A5 E1_H02W0701 arc: B0 H00R0100 arc: B1 V00T0000 arc: B3 H02E0301 arc: B5 E1_H02W0101 arc: B7 H02W0301 arc: C0 W1_H02E0401 arc: C1 H00L0100 arc: C3 W1_H02E0401 arc: C4 N1_V02S0201 arc: C5 N1_V02S0201 arc: C7 W1_H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V02S0201 arc: D3 V01S0100 arc: D4 V00B0000 arc: D5 V00B0000 arc: D7 E1_H02W0201 arc: E1_H01E0101 F1 arc: E1_H02E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q7 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: V00T0000 Q0 arc: V01S0000 F3 arc: V01S0100 F4 arc: W1_H02W0001 F0 arc: W1_H02W0501 F7 arc: W3_H06W0003 Q3 arc: W3_H06W0203 Q7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000011001111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011001111 word: SLICEA.K0.INIT 1100000011001111 word: SLICEA.K1.INIT 0000111100001100 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1110000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R22C47:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 V01N0101 arc: H00L0000 N1_V02S0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06W0303 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0301 E1_H02W0301 arc: W3_H06W0103 E3_H06W0003 arc: A3 H00L0100 arc: A5 V02N0301 arc: B3 H02E0101 arc: B5 H02W0101 arc: B7 S1_V02N0501 arc: C3 H00L0000 arc: C4 N1_V02S0201 arc: C5 N1_V02S0201 arc: C6 V00T0000 arc: C7 V00T0000 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D2 H01E0101 arc: D3 S1_V02N0201 arc: D4 H00R0100 arc: D5 H00R0100 arc: D6 H01W0000 arc: D7 W1_H02E0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E1_H02E0501 F7 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F1 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F1 arc: N1_V02N0701 F7 arc: S1_V02S0101 Q1 arc: V01S0000 F7 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1100000011001000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1110000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R22C48:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V01N0101 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 V01N0101 arc: H00L0000 H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02N0701 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0003 N3_V06S0003 arc: E3_H06E0303 W3_H06E0203 arc: A3 V02N0701 arc: A7 E1_H02W0501 arc: B1 H00R0100 arc: B3 E1_H02W0301 arc: B4 H02W0101 arc: B7 E1_H02W0301 arc: C0 H02E0401 arc: C1 N1_V02S0401 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V00T0100 arc: C6 V00T0000 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 W1_H02E0001 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 V02S0401 arc: D5 H02W0201 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0101 Q4 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 Q4 arc: M2 V00B0100 arc: M4 W1_H02E0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: S3_V06S0103 Q1 arc: V01S0100 Q4 arc: W1_H02W0201 F2 arc: W3_H06W0103 Q1 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1110000000000000 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1110000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R22C49:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: H00L0100 W1_H02E0101 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02E0501 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 W1_H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V02S0701 arc: E1_H02E0101 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: W3_H06W0003 N1_V01S0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: B4 S1_V02N0701 arc: B6 N1_V02S0701 arc: C0 H00L0100 arc: C1 H02W0401 arc: C2 H02E0601 arc: C3 E1_H02W0401 arc: C4 V02S0201 arc: C6 V01N0101 arc: C7 V00T0000 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 V01N0001 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V02S0401 arc: E1_H01E0101 F1 arc: E1_H02E0001 F0 arc: E1_H02E0201 F2 arc: E1_H02E0301 F3 arc: E1_H02E0701 F7 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: M4 H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0601 Q6 arc: S1_V02S0401 Q4 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1111111111000000 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R22C4:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 W1_H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 V01N0001 arc: A0 W1_H02E0701 arc: A3 H02W0701 arc: A5 W1_H02E0701 arc: A6 W1_H02E0701 arc: B0 V00B0000 arc: B3 H02E0301 arc: B5 H01E0101 arc: B6 H01E0101 arc: C0 H00R0100 arc: C2 H02E0601 arc: C3 S1_V02N0601 arc: C5 V00B0100 arc: C6 V00B0100 arc: C7 S1_V02N0201 arc: CE1 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D2 H02E0001 arc: D3 V00B0100 arc: D5 E1_H01W0100 arc: D6 E1_H01W0100 arc: D7 S1_V02N0401 arc: E3_H06E0103 Q2 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: M0 H01E0001 arc: M2 V00T0100 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V02N0001 F2 arc: N1_V02N0201 F0 arc: V00B0100 F7 arc: V01S0100 F4 word: SLICED.K0.INIT 0010000000110011 word: SLICED.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 1111111111110000 word: SLICEB.K1.INIT 1010100000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1101111111001100 word: SLICEA.K0.INIT 0010000000110011 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R22C50:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0303 V01N0101 arc: H00L0000 H02E0201 arc: H00R0000 V02S0401 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 H02E0001 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0301 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A0 S1_V02N0501 arc: A2 H02E0501 arc: B2 H02E0101 arc: B3 H00R0000 arc: B4 H02E0301 arc: B5 H00L0000 arc: B6 H01E0101 arc: B7 V00T0000 arc: E1_H01E0101 F4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F5 arc: N1_V01N0101 F3 arc: N1_V02N0201 F2 arc: N1_V02N0701 F7 arc: V01S0000 F6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R22C51:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02N0201 arc: N1_V02N0301 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0303 N1_V01S0100 arc: W3_H06W0103 E3_H06W0003 arc: B0 H02E0301 arc: B1 H02E0101 arc: B2 S1_V02N0301 arc: B3 V01N0001 arc: B4 H00L0000 arc: B5 E1_H02W0101 arc: B6 V00B0100 arc: B7 V00B0000 arc: E1_H01E0001 F3 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F2 arc: N1_V01N0001 F5 arc: N1_V02N0001 F0 arc: N1_V02N0401 F6 arc: N1_V02N0601 F4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R22C52:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00T0000 S1_V02N0401 arc: W1_H02W0301 E3_H06W0003 arc: H01W0000 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: B0 V00T0000 arc: B1 V02S0101 arc: B2 H00R0000 arc: B3 H00R0100 arc: B4 V02S0501 arc: B5 H00L0000 arc: B6 V00B0000 arc: B7 E1_H02W0101 arc: E1_H01E0001 F1 arc: E1_H02E0001 F0 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F5 arc: N1_V01N0101 F3 arc: N1_V02N0001 F2 arc: V01S0000 F4 arc: V01S0100 F7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R22C53:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0401 V02S0401 arc: H00R0000 H02E0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 S1_V02N0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: H01W0100 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: B0 H02W0301 arc: B1 V02N0301 arc: B2 S1_V02N0301 arc: B3 V02N0101 arc: B4 H02E0101 arc: B5 H00R0000 arc: B6 E1_H02W0101 arc: B7 V00B0100 arc: E1_H01E0001 F5 arc: E1_H02E0101 F1 arc: E1_H02E0201 F0 arc: E1_H02E0601 F4 arc: E3_H06E0003 F3 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F7 arc: N1_V02N0401 F6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R22C54:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 H02W0401 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: B0 H00R0100 arc: B1 W1_H02E0301 arc: B4 V01S0000 arc: B5 H00R0000 arc: B6 V00B0100 arc: B7 V00B0000 arc: C4 W1_H02E0601 arc: C5 V02S0201 arc: C6 H01E0001 arc: C7 H02E0601 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D4 N1_V02S0601 arc: D5 N1_V02S0601 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q4 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q6 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q4 arc: V00B0100 Q7 arc: V01S0000 Q5 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R22C55:PLC2 arc: H00L0000 H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 E1_H01W0000 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A0 N1_V02S0701 arc: A2 H00L0100 arc: B0 V00T0000 arc: B1 V00B0000 arc: B2 F3 arc: B3 H02W0101 arc: B5 F3 arc: C0 V02N0401 arc: C1 V02S0401 arc: C2 H00R0100 arc: C3 H02E0601 arc: C5 V00B0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H00R0000 arc: D2 F0 arc: D3 V01S0100 arc: D4 E1_H01W0100 arc: D5 F0 arc: E1_H01E0001 F3 arc: E1_H02E0101 F3 arc: E1_H02E0201 F0 arc: E1_H02E0401 F4 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0100 Q6 arc: M4 V00T0100 arc: M6 W1_H02E0401 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: V01S0000 F1 arc: V01S0100 F1 arc: W1_H02W0201 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111110 word: SLICEA.K1.INIT 0011001100001111 word: SLICEB.K0.INIT 0000000011001101 word: SLICEB.K1.INIT 0000000011000000 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111111100110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R22C56:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02E0201 arc: H00R0000 V02N0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 H02W0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: N3_V06N0003 W3_H06E0003 arc: B2 H02E0101 arc: B3 W1_H02E0301 arc: B4 W1_H02E0301 arc: B5 S1_V02N0701 arc: B7 V02S0701 arc: C2 N1_V02S0401 arc: C3 H00L0000 arc: C4 S1_V02N0001 arc: C5 H02W0401 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 V01S0100 arc: D4 H00R0100 arc: D5 V00B0000 arc: D7 H00L0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q0 arc: E1_H02E0001 F2 arc: E1_H02E0701 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H00R0100 F5 arc: H01W0000 Q0 arc: H01W0100 F4 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: V00T0100 F3 arc: V01S0000 Q0 arc: V01S0100 F5 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011000011111100 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 0000110000111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R22C57:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 V02S0001 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02W0301 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 S1_V02N0601 arc: A2 V00B0000 arc: A3 E1_H01E0001 arc: A5 S1_V02N0301 arc: B0 S1_V02N0301 arc: B2 H01W0100 arc: B3 H02E0301 arc: B5 V00B0100 arc: B7 H02E0101 arc: C0 V02S0401 arc: C2 H00R0100 arc: C3 H02W0401 arc: C5 V00T0000 arc: C7 V02N0001 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 S1_V02N0001 arc: D2 E1_H02W0001 arc: D3 H00R0000 arc: D5 V02N0601 arc: D6 V01N0001 arc: D7 H02E0201 arc: E1_H01E0001 Q2 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: H01W0100 F5 arc: M0 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: S1_V02S0201 Q2 arc: W3_H06W0003 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000010010001100 word: SLICEB.K0.INIT 0101111101001110 word: SLICEB.K1.INIT 0101010100111111 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1111111100000011 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R22C58:PLC2 arc: H00L0000 V02N0001 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0401 H06E0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 H06E0003 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 V02S0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: E3_H06E0003 W3_H06E0003 arc: A1 E1_H01E0001 arc: A3 V00B0000 arc: A5 V00B0000 arc: A7 H02E0501 arc: B0 V02N0101 arc: B1 H01W0100 arc: B3 H02E0101 arc: B4 E1_H02W0101 arc: B5 H02E0101 arc: B6 E1_H02W0101 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 H00L0100 arc: C3 V02S0401 arc: C4 V02N0001 arc: C5 V00T0000 arc: C6 H02E0401 arc: C7 V00T0100 arc: CE0 V02S0201 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H00R0000 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 S1_V02N0401 arc: D6 H02E0201 arc: D7 S1_V02N0401 arc: E1_H01E0001 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q4 arc: V01S0000 Q6 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111101110111 word: SLICED.K0.INIT 1100000011110011 word: SLICED.K1.INIT 0011001101011111 word: SLICEA.K0.INIT 0000110000001111 word: SLICEA.K1.INIT 0011001101011111 word: SLICEC.K0.INIT 0000110000001111 word: SLICEC.K1.INIT 0101010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R22C59:PLC2 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0003 E3_H06W0303 .tile R22C5:PLC2 arc: H00R0100 H02E0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 V01N0001 arc: S1_V02S0501 H02W0501 arc: S3_V06S0303 H06W0303 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0601 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0701 V02S0701 arc: B1 V00B0000 arc: C0 V02N0601 arc: C1 N1_V01N0001 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: E1_H01E0001 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 F1 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: V00B0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 0000111100110011 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R22C60:PLC2 arc: S1_V02S0301 N1_V02S0301 arc: S3_V06S0203 H06E0203 arc: W1_H02W0101 V02N0101 .tile R22C61:PLC2 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 .tile R22C62:PLC2 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V01S0100 .tile R22C64:PLC2 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0103 arc: E3_H06E0003 W3_H06E0003 .tile R22C65:PLC2 arc: W3_H06W0303 E3_H06W0203 .tile R22C66:PLC2 arc: S1_V02S0101 N3_V06S0103 .tile R22C67:PLC2 arc: S1_V02S0101 N3_V06S0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 .tile R22C6:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 N1_V01S0100 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0103 S3_V06N0103 arc: D0 H02W0001 arc: D1 V02S0201 arc: D2 V00B0100 arc: D3 E1_H02W0001 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: N1_V01N0001 F3 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R22C70:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: S1_V02S0201 H06E0103 arc: S3_V06S0303 H06E0303 arc: S3_V06S0003 W3_H06E0003 .tile R22C7:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 S3_V06N0203 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0201 S3_V06N0103 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0203 S3_V06N0203 arc: A1 E1_H01E0001 arc: A5 V02N0101 arc: A6 E1_H02W0701 arc: B1 H02W0301 arc: B4 H02W0101 arc: B5 V02N0701 arc: B6 H02E0301 arc: C1 V02S0601 arc: C4 V00B0100 arc: C5 V00B0100 arc: C6 H02W0401 arc: C7 V02N0201 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D4 H02E0201 arc: D5 H02W0201 arc: D6 H00L0100 arc: D7 H00R0100 arc: E1_H01E0001 F6 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F7 arc: M0 V00B0000 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0001 F0 arc: N1_V02N0601 F4 arc: V01S0000 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000101000101010 word: SLICED.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 0000110011111100 word: SLICEC.K1.INIT 1100010000000100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R22C8:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0203 N3_V06S0203 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02S0101 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: B5 S1_V02N0701 arc: C5 S1_V02N0001 arc: CE0 H00R0100 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D5 H02E0201 arc: F5 F5_SLICE arc: M0 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0701 Q5 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000110011111100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R22C9:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H06W0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02N0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q2 arc: E1_H02E0401 Q4 arc: E3_H06E0303 Q6 arc: M0 V00B0100 arc: M2 H02E0601 arc: M4 H02E0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: S1_V02S0401 Q4 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R23C10:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V01N0101 arc: E3_H06E0203 N1_V01S0000 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 H02W0201 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: A0 V02N0701 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V01S0000 arc: B6 V00B0000 arc: B7 V00B0100 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q3 arc: E1_H02E0601 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0001 Q2 arc: S1_V02S0401 Q6 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V01S0000 Q5 arc: V01S0100 Q7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R23C11:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N3_V06S0303 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: V00T0100 N1_V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0701 S1_V02N0701 arc: A6 N1_V01S0100 arc: B0 V00T0000 arc: B1 H00R0100 arc: B4 H02E0101 arc: B6 V00B0100 arc: C4 V00T0000 arc: C5 E1_H01E0101 arc: C6 H02W0401 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 H00L0100 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q5 arc: E3_H06E0203 F7 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H00R0100 Q5 arc: H01W0000 Q5 arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q5 arc: N3_V06N0203 F7 arc: N3_V06N0303 F6 arc: S1_V02S0401 F4 arc: V00T0000 Q0 arc: V01S0100 Q5 word: SLICED.K0.INIT 1010110000000000 word: SLICED.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1111111111110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R23C12:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 N1_V02S0401 arc: E3_H06E0203 H01E0001 arc: H00L0000 W1_H02E0001 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H06E0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E3_H06W0103 arc: A2 S1_V02N0701 arc: A5 N1_V02S0301 arc: B1 H02E0301 arc: B2 H00L0000 arc: B5 V02N0501 arc: B6 H01E0101 arc: B7 H02E0101 arc: C0 H00L0100 arc: C1 N1_V02S0401 arc: C2 N1_V02S0401 arc: C3 H02E0601 arc: C5 N1_V02S0201 arc: C6 W1_H02E0601 arc: C7 V00T0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 E1_H02W0201 arc: D2 V00B0100 arc: D3 V00B0100 arc: D5 V02S0401 arc: D6 V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E1_H02E0701 F7 arc: E3_H06E0003 F3 arc: E3_H06E0103 F2 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 Q7 arc: H01W0100 F6 arc: LSR0 H02W0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V02N0301 F1 arc: N3_V06N0003 F0 arc: S3_V06S0203 F7 arc: V01S0100 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1001000000001001 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0011000000111111 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R23C13:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 V02S0201 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 N1_V02S0701 arc: A2 V01N0101 arc: A3 V00T0000 arc: A5 S1_V02N0301 arc: A6 N1_V02S0101 arc: A7 N1_V01S0100 arc: B2 E1_H02W0101 arc: B3 H00R0000 arc: B5 H00L0000 arc: B6 S1_V02N0701 arc: B7 S1_V02N0501 arc: C2 V02S0401 arc: C3 E1_H02W0601 arc: C5 E1_H02W0401 arc: C6 H02E0401 arc: C7 H02E0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 H02W0001 arc: D5 H00L0100 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F2 arc: E1_H02E0401 F6 arc: E3_H06E0303 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F7 arc: V00T0000 Q0 arc: V01S0000 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1010110000000000 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 1001000000001001 word: SLICEB.K1.INIT 1000001001000001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1011000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R23C14:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: H00R0000 N1_V02S0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0701 S1_V02N0701 arc: A3 H02E0501 arc: A6 H00L0000 arc: A7 H00L0000 arc: B3 V02N0301 arc: B6 H02W0301 arc: B7 V00B0000 arc: C3 V02S0601 arc: C6 V02S0001 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: D6 H02E0201 arc: D7 E1_H01W0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: E3_H06E0003 F3 arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: V00B0000 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011111101011111 word: SLICED.K0.INIT 1101000011011101 word: SLICED.K1.INIT 1000110000100011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R23C15:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E3_H06E0003 V06S0003 arc: H00L0000 H02W0201 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02N0701 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 V00T0000 arc: A5 V02N0101 arc: A7 N1_V01N0101 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 N1_V02S0501 arc: B5 H02E0101 arc: B7 H02E0301 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00T0100 arc: C5 W1_H02E0601 arc: C7 E1_H01E0101 arc: CE0 N1_V02S0201 arc: CE1 N1_V02S0201 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 V00B0000 arc: D7 H02E0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q3 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q1 arc: N1_V02N0201 Q0 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q3 arc: S1_V02S0201 F2 arc: V01S0000 F7 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q3 arc: W1_H02W0301 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R23C16:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02E0001 arc: H00L0100 H02W0101 arc: H00R0000 V02N0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: A0 H00L0000 arc: A3 V00B0000 arc: B0 V00T0000 arc: B3 V02N0301 arc: C0 V02S0601 arc: C3 H00L0100 arc: C4 H02W0601 arc: C5 V02N0001 arc: C6 W1_H02E0601 arc: C7 F6 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D3 H02W0201 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 V02N0401 arc: D7 N1_V02S0401 arc: E1_H01E0001 F5 arc: E1_H01E0101 F4 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 F6 arc: LSR0 E1_H02W0301 arc: M0 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0601 F4 arc: N3_V06N0303 Q6 arc: S3_V06S0303 F6 arc: V00T0100 F3 arc: V01S0100 F6 arc: W1_H02W0401 Q6 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010000011000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 1111111111110000 word: SLICEA.K0.INIT 0101111100111111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R23C17:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02W0001 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0401 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0303 N3_V06S0303 arc: W3_H06W0003 E3_H06W0003 arc: A0 H00L0000 arc: A1 H00R0000 arc: B0 V00B0000 arc: B1 V00T0000 arc: B5 V00B0100 arc: C0 H00R0100 arc: C1 N1_V01S0100 arc: C5 V02S0001 arc: CE1 N1_V02S0201 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02E0201 arc: D4 V02S0401 arc: D5 V02N0601 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q6 arc: H01W0000 Q5 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M2 V00B0000 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q5 arc: N3_V06N0303 Q5 arc: V00B0100 Q5 arc: V00T0000 Q2 arc: V01S0000 F1 arc: V01S0100 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0011110011001100 word: SLICEA.K0.INIT 1000001001000001 word: SLICEA.K1.INIT 1000010000100001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R23C18:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02N0501 arc: H00L0000 W1_H02E0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0601 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0601 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V02S0401 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 H02W0701 arc: A5 V02S0101 arc: A7 V00T0100 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 H00L0000 arc: B5 N1_V02S0701 arc: B7 V00B0100 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 H01E0001 arc: C5 V02N0001 arc: C7 E1_H01E0101 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CLK1 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 H02E0201 arc: D5 E1_H01W0100 arc: D7 V02S0601 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q3 arc: N1_V02N0001 F2 arc: N1_V02N0301 Q1 arc: N3_V06N0003 Q0 arc: S1_V02S0001 Q0 arc: S3_V06S0003 Q3 arc: V00T0100 Q3 arc: V01S0000 F7 arc: V01S0100 Q1 arc: W1_H02W0001 Q0 arc: W1_H02W0201 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000110010101111 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R23C19:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 H02W0301 arc: H00R0000 H02W0601 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 H01E0001 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0701 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 V02N0701 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 E1_H02W0701 arc: A5 V02S0101 arc: A7 V00T0100 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H02W0101 arc: B3 H02W0101 arc: B4 N1_V02S0701 arc: B5 N1_V02S0501 arc: B7 V00T0000 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 V02N0001 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK1 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 V02S0401 arc: D5 V02N0601 arc: D7 F2 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q1 arc: E1_H02E0201 Q2 arc: E1_H02E0301 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: LSR0 H02E0501 arc: LSR1 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F0 arc: N1_V02N0501 F7 arc: S1_V02S0301 Q3 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 Q2 arc: V01S0100 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R23C20:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 W1_H02E0101 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0701 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0301 W3_H06E0003 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 H02W0701 arc: A5 V00T0000 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 V02S0501 arc: B5 V02N0701 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V02S0001 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE3 H02W0101 arc: CLK1 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 N1_V02S0201 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: D4 N1_V02S0401 arc: D5 H00R0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q1 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q2 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q0 arc: N1_V02N0001 F0 arc: N1_V02N0101 F1 arc: S1_V02S0001 Q0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R23C21:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0203 N1_V01S0000 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0003 H06W0003 arc: V00B0000 W1_H02E0401 arc: V00T0100 H02E0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 V02N0701 arc: E3_H06E0103 W3_H06E0003 arc: A5 S1_V02N0301 arc: A7 H00L0000 arc: B5 W1_H02E0101 arc: B7 V00T0000 arc: C4 V00B0100 arc: C5 E1_H01E0101 arc: C7 H01E0001 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D4 V02N0401 arc: D5 V02N0601 arc: D7 H02E0201 arc: E1_H01E0101 F7 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: V00B0100 F5 arc: V00T0000 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 1101000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R23C22:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 V01N0001 arc: H00L0100 V02N0101 arc: H00R0100 V02N0701 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: N1_V02N0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A4 N1_V01N0101 arc: B4 S1_V02N0501 arc: C4 H02E0401 arc: C5 V00B0100 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D4 V02N0401 arc: D5 N1_V02S0401 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q5 arc: E1_H02E0401 Q4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: M0 V00T0100 arc: M2 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q5 arc: S1_V02S0501 Q5 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q4 arc: V01S0100 Q0 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1110101011000000 word: SLICEC.K1.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R23C23:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 H01E0101 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 V02N0601 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A5 V00T0000 arc: A7 N1_V01N0101 arc: B3 H01W0100 arc: B5 H02E0101 arc: B6 V00B0100 arc: B7 V01S0000 arc: C2 H00L0000 arc: C3 N1_V01N0001 arc: C5 V00T0100 arc: C6 E1_H02W0401 arc: C7 E1_H01E0101 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 E1_H02W0201 arc: D5 H00R0100 arc: D6 H02W0201 arc: D7 E1_H02W0001 arc: E1_H01E0001 F7 arc: E1_H02E0001 Q0 arc: E1_H02E0101 F3 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: M0 H02E0601 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F2 arc: S3_V06S0003 F3 arc: V01S0000 F6 arc: V01S0100 F3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0011000000000000 word: SLICED.K1.INIT 0000000000010101 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0000001100001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R23C24:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: H00R0100 V02S0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 H02E0601 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 N1_V02S0301 arc: V00T0100 H02W0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A1 E1_H01E0001 arc: A4 V02N0301 arc: A6 H02E0501 arc: B0 H01W0100 arc: B1 H00R0100 arc: B2 H01W0100 arc: B3 H00R0000 arc: B4 V02S0501 arc: B5 E1_H02W0101 arc: B6 V01S0000 arc: B7 E1_H02W0101 arc: C0 H00L0100 arc: C1 E1_H02W0401 arc: C2 V02S0401 arc: C3 V02N0601 arc: C4 V00B0100 arc: C5 H01E0001 arc: C6 E1_H01E0101 arc: C7 H01E0001 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V02S0001 arc: D2 V00T0100 arc: D3 V02S0001 arc: D4 V02S0601 arc: D5 W1_H02E0001 arc: D6 H00R0100 arc: D7 W1_H02E0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: E1_H02E0001 F2 arc: E1_H02E0201 F2 arc: E1_H02E0501 F7 arc: E1_H02E0701 F5 arc: E3_H06E0203 F7 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 F6 arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F4 arc: N1_V02N0701 F7 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: V01S0000 Q1 arc: V01S0100 Q3 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0011000000000000 word: SLICEB.K1.INIT 1111000000110011 word: SLICED.K0.INIT 0011001111110101 word: SLICED.K1.INIT 0000000000110000 word: SLICEC.K0.INIT 0011111100110101 word: SLICEC.K1.INIT 1111000011000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111000011101110 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R23C25:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 H02E0201 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V06S0303 arc: S1_V02S0101 W3_H06E0103 arc: W3_H06W0203 V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A2 H00L0100 arc: A3 W1_H02E0701 arc: A5 E1_H02W0701 arc: B2 H00R0000 arc: B3 H00R0100 arc: B5 H02E0101 arc: B6 N1_V01S0000 arc: B7 H02E0301 arc: C2 H00L0000 arc: C3 V02S0601 arc: C5 V00T0000 arc: C6 E1_H01E0101 arc: C7 V02S0001 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 S1_V02N0201 arc: D5 V02N0601 arc: D6 N1_V02S0601 arc: D7 V00B0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: M0 E1_H02W0601 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F4 arc: N1_V02N0501 F7 arc: S1_V02S0301 Q3 arc: S3_V06S0003 Q3 arc: V01S0100 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0011000000000000 word: SLICED.K1.INIT 1111000011000000 word: SLICEB.K0.INIT 0000111100001000 word: SLICEB.K1.INIT 1110101011000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011001101111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R23C26:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02N0001 arc: H00R0100 V02S0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02N0301 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V01N0001 arc: H01W0000 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 V01N0101 arc: A3 V00B0000 arc: A6 V02S0301 arc: A7 H02E0501 arc: B0 H02E0101 arc: B1 V00T0000 arc: B3 N1_V02S0101 arc: B4 H02W0301 arc: B6 V02N0501 arc: B7 H02E0301 arc: C0 H02W0401 arc: C1 N1_V01S0100 arc: C3 H00L0000 arc: C4 N1_V02S0001 arc: C6 H02E0401 arc: C7 F6 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02N0201 arc: D3 S1_V02N0001 arc: D4 V02S0401 arc: D5 E1_H02W0201 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q4 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: V00B0000 Q4 arc: V00T0000 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0111000000000000 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R23C27:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 H01E0001 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 N1_V01S0000 arc: E1_H02E0101 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: B2 H01W0100 arc: B4 H00R0000 arc: B6 V01S0000 arc: C2 E1_H02W0401 arc: C4 E1_H02W0401 arc: C6 N1_V02S0201 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 E1_H02W0001 arc: D4 H02E0201 arc: D5 E1_H02W0001 arc: D6 N1_V02S0401 arc: D7 H02W0001 arc: E1_H01E0101 Q4 arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0100 Q2 arc: M0 H02E0601 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 Q0 arc: V01S0000 Q6 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R23C28:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V06S0203 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02S0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V06N0303 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A4 W1_H02E0701 arc: A6 V00T0100 arc: A7 V02N0101 arc: B0 H02W0301 arc: B1 S1_V02N0101 arc: B2 V02S0101 arc: B3 H00R0000 arc: B4 H01E0101 arc: B6 V01S0000 arc: B7 V02S0501 arc: C0 E1_H02W0601 arc: C1 V02S0401 arc: C2 E1_H02W0401 arc: C3 H02W0601 arc: C4 S1_V02N0201 arc: C5 V00B0100 arc: C6 E1_H01E0101 arc: C7 E1_H02W0401 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 S1_V02N0001 arc: D2 E1_H02W0201 arc: D3 V02N0001 arc: D4 H00L0100 arc: D5 H00R0100 arc: D6 F2 arc: D7 V00B0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F1 arc: LSR0 E1_H02W0301 arc: M2 E1_H02W0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 arc: V01S0000 F7 arc: V01S0100 F4 arc: W1_H02W0701 F5 arc: W3_H06W0103 F1 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1011001100000000 word: SLICEA.K1.INIT 0111000001111100 word: SLICEB.K0.INIT 1111001111111111 word: SLICEB.K1.INIT 1100000011110000 word: SLICED.K0.INIT 0000111000000000 word: SLICED.K1.INIT 1111001101010011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R23C29:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0201 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 E1_H01W0000 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A5 V00T0000 arc: A6 E1_H02W0701 arc: B2 H00L0000 arc: B5 N1_V02S0501 arc: B6 V02S0501 arc: B7 V01S0000 arc: C2 W1_H02E0401 arc: C3 N1_V02S0601 arc: C5 V00B0100 arc: C6 E1_H02W0401 arc: C7 V02S0001 arc: CE0 H02E0101 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D2 E1_H02W0001 arc: D3 W1_H02E0201 arc: D5 V02N0601 arc: D6 V00B0000 arc: D7 W1_H02E0001 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 Q2 arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F5 arc: V00T0000 Q0 arc: V01S0000 F6 arc: W1_H02W0001 F2 arc: W1_H02W0701 F7 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0100010000000100 word: SLICED.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 0000110011001100 word: SLICEB.K1.INIT 0000111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R23C2:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: S3_V06S0203 N3_V06S0103 .tile R23C30:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 E3_H06W0003 arc: E3_H06E0003 V01N0001 arc: H00L0100 H02W0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06W0303 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0301 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: N1_V02N0601 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 N1_V01S0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02S0701 arc: A1 H00L0000 arc: A4 H02E0501 arc: A5 W1_H02E0701 arc: B0 N1_V02S0101 arc: B1 W1_H02E0301 arc: B2 V02N0101 arc: B4 V02N0701 arc: B5 V02S0701 arc: C0 E1_H02W0601 arc: C1 N1_V01S0100 arc: C2 H00L0100 arc: C4 S1_V02N0201 arc: C5 V02S0201 arc: CE0 H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02E0001 arc: D2 H00R0000 arc: D3 N1_V02S0001 arc: D4 V00B0000 arc: D5 S1_V02N0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q4 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: H01W0000 Q0 arc: H01W0100 Q4 arc: M2 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q0 arc: S1_V02S0601 Q6 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0201 Q0 arc: W1_H02W0401 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1010000010100011 word: SLICEC.K1.INIT 0000111101000100 word: SLICEA.K0.INIT 1111110011101100 word: SLICEA.K1.INIT 1110111111100101 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R23C31:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00T0000 V02N0401 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 H01E0101 arc: E1_H01E0001 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0203 W3_H06E0203 arc: A0 V02S0701 arc: A2 H02W0501 arc: A3 N1_V02S0501 arc: A4 V00B0000 arc: A5 V00T0000 arc: A6 N1_V01S0100 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: S1_V02S0301 F3 arc: S1_V02S0501 F5 arc: S3_V06S0003 F3 arc: S3_V06S0303 F6 arc: V01S0000 F4 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R23C32:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V06N0003 arc: W1_H02W0201 V06N0103 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A3 V00B0000 arc: A4 S1_V02N0301 arc: A7 E1_H02W0501 arc: B3 H02W0301 arc: B4 H00L0000 arc: B7 H02W0101 arc: C3 H00L0100 arc: C4 V00T0000 arc: C7 S1_V02N0001 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: D4 E1_H02W0201 arc: D7 H02W0001 arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: LSR1 W1_H02E0301 arc: M2 N1_V01N0001 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F7 arc: N1_V02N0401 Q4 arc: N3_V06N0103 F2 arc: S3_V06S0203 F4 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0010101010101010 word: SLICEC.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R23C33:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 N1_V02S0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02N0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02S0701 arc: E1_H02E0001 W3_H06E0003 arc: W3_H06W0003 E1_H02W0001 arc: A4 F5 arc: A5 V00B0000 arc: B4 H00R0000 arc: B5 V02N0701 arc: C4 V02S0001 arc: C5 V01N0101 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 H00L0100 arc: D5 V02S0601 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: M0 V00T0100 arc: M2 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0701 F5 arc: V01S0000 Q2 arc: V01S0100 Q6 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0111000000000000 word: SLICEC.K1.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R23C34:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 V06S0303 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 S1_V02N0101 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 S1_V02N0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: W3_H06W0003 N3_V06S0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: A4 V00B0000 arc: B4 V01S0000 arc: C4 H01E0001 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D4 V02S0601 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q6 arc: F4 F5C_SLICE arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0203 F4 arc: V00B0000 Q6 arc: V00T0000 Q0 arc: V01S0000 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R23C35:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 V02S0001 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 S1_V02N0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V06S0303 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: B2 W1_H02E0301 arc: B3 W1_H02E0301 arc: C1 S1_V02N0601 arc: C2 V02S0401 arc: C3 H00L0000 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 H02W0201 arc: D3 H00R0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 F1 arc: M4 V00B0000 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F1 arc: V00B0000 Q6 arc: V01S0000 F1 arc: W1_H02W0401 Q4 arc: W3_H06W0003 F3 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001111 word: SLICEB.K0.INIT 0011001100001111 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R23C36:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0203 V06N0203 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 H06E0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: A1 H02E0501 arc: B1 V02S0301 arc: C1 H00R0100 arc: CE1 H02W0101 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V01S0100 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 F0 arc: H01W0100 Q0 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0103 F1 arc: S3_V06S0203 Q4 arc: V01S0000 Q6 arc: W1_H02W0001 Q2 arc: W1_H02W0401 Q4 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 1000110010001000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 .tile R23C37:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 W1_H02E0201 arc: H00L0100 W1_H02E0301 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 H01E0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0501 arc: V00T0100 V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E1_H02W0001 arc: E3_H06E0203 W3_H06E0203 arc: A3 H02E0701 arc: B3 H00R0100 arc: C3 H00L0100 arc: CE0 E1_H02W0101 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F1 arc: E1_H02E0401 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q6 arc: M0 E1_H02W0601 arc: M1 H02E0001 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0101 Q1 arc: N1_V02N0401 Q6 arc: N1_V02N0601 Q4 arc: N3_V06N0203 Q4 arc: V01S0000 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111111111111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R23C38:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 N1_V01S0000 arc: H00L0100 N1_V02S0301 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 H02W0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: B4 H02E0101 arc: C4 E1_H02W0401 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D4 H00L0100 arc: D6 H02W0201 arc: E1_H01E0101 F3 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: M5 E1_H02W0001 arc: M6 V00B0100 arc: MUXCLK1 CLK0 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 0011111111111111 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C39:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 E1_H02W0201 arc: H00L0100 S1_V02N0101 arc: H00R0100 V02S0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 H06E0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0601 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 N1_V02S0501 arc: A4 V00T0100 arc: A5 V02N0101 arc: B0 W1_H02E0301 arc: B1 W1_H02E0301 arc: B2 H02W0301 arc: B4 N1_V02S0501 arc: B5 S1_V02N0701 arc: B6 V00B0000 arc: C0 N1_V02S0401 arc: C1 H00L0000 arc: C2 N1_V01N0001 arc: C4 E1_H02W0601 arc: C5 S1_V02N0201 arc: C6 H02E0401 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02S0001 arc: D2 V02N0001 arc: D3 W1_H02E0201 arc: D4 H01W0000 arc: D5 S1_V02N0601 arc: D6 H02E0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F2 arc: E1_H02E0001 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: M2 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V02N0201 Q2 arc: N3_V06N0103 Q2 arc: V01S0100 F6 arc: W1_H02W0001 Q0 arc: W1_H02W0601 F4 word: SLICEC.K0.INIT 0011001100110010 word: SLICEC.K1.INIT 1100010010000000 word: SLICEA.K0.INIT 1100000011001111 word: SLICEA.K1.INIT 0000000011111100 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111000000110011 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R23C3:PLC2 arc: E1_H02E0001 V02N0001 arc: H00R0000 V02N0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0003 S3_V06N0303 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0201 N1_V01S0000 arc: CE2 H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 V00B0100 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R23C40:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0003 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0100 W1_H02E0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00T0000 V02S0401 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: A2 W1_H02E0501 arc: A4 V00T0000 arc: A5 H02W0501 arc: A6 V02N0301 arc: B0 F1 arc: B1 H01W0100 arc: B2 W1_H02E0101 arc: B3 H00R0100 arc: B4 H02W0301 arc: B5 H00R0000 arc: B6 E1_H02W0101 arc: B7 V02S0701 arc: C0 S1_V02N0401 arc: C1 V02N0401 arc: C2 V02N0601 arc: C3 H00L0000 arc: C4 V00B0100 arc: C5 E1_H01E0101 arc: C6 E1_H02W0401 arc: C7 E1_H02W0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02N0201 arc: D2 W1_H02E0201 arc: D3 F0 arc: D4 F0 arc: D5 E1_H02W0001 arc: D6 H00L0100 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 F4 arc: MUXCLK3 CLK0 arc: N1_V02N0601 F6 arc: N3_V06N0203 Q7 arc: S3_V06S0103 F1 arc: V00B0000 F6 arc: V00B0100 F5 arc: W1_H02W0101 F3 arc: W1_H02W0201 F2 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 word: SLICEA.K0.INIT 0011000000111111 word: SLICEA.K1.INIT 0000000000001100 word: SLICEC.K0.INIT 1111101101100010 word: SLICEC.K1.INIT 1001010001001111 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1111000011110011 word: SLICED.K0.INIT 1110010001000100 word: SLICED.K1.INIT 1111000011110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R23C41:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 V06S0003 arc: H00L0100 S1_V02N0301 arc: H00R0100 H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 H01E0001 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02W0701 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 N1_V02S0501 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0203 V06N0203 arc: E3_H06E0303 W3_H06E0203 arc: A0 E1_H02W0501 arc: A1 N1_V02S0701 arc: A3 N1_V02S0501 arc: A5 N1_V02S0301 arc: B0 H02E0101 arc: B1 H00R0100 arc: B2 N1_V02S0101 arc: B3 H00R0100 arc: B5 H02E0301 arc: C0 H00L0100 arc: C1 H02E0401 arc: C2 N1_V01N0001 arc: C3 S1_V02N0401 arc: C5 V01N0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 S1_V02N0001 arc: D2 V02N0201 arc: D3 S1_V02N0201 arc: D5 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0000 F0 arc: H01W0100 F0 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F1 arc: W1_H02W0601 F4 arc: W3_H06W0003 F0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011110011 word: SLICEB.K1.INIT 1001010001001111 word: SLICEA.K0.INIT 1010111100001100 word: SLICEA.K1.INIT 1001010001001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0110101110110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R23C42:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 H01E0001 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06W0203 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V01N0101 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N3_V06N0003 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: CE0 E1_H02W0101 arc: CE1 H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q0 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M2 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 Q2 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C43:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V02S0601 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0601 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0301 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0101 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 H00L0000 arc: A2 W1_H02E0501 arc: A3 V00T0000 arc: A4 W1_H02E0501 arc: A5 V00T0000 arc: A7 E1_H01W0000 arc: B1 V02S0301 arc: B2 H02W0301 arc: B3 V02N0301 arc: B4 H02W0301 arc: B5 V02N0701 arc: B7 V02S0701 arc: C1 V02N0401 arc: C2 V02S0401 arc: C3 N1_V02S0601 arc: C4 N1_V02S0201 arc: C5 S1_V02N0201 arc: C7 V00T0100 arc: D1 V00B0100 arc: D2 H02E0201 arc: D3 H00R0000 arc: D4 H00L0100 arc: D5 H00R0100 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E3_H06E0003 F0 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00B0000 arc: M6 N1_V01N0101 arc: N1_V01N0101 F2 arc: N3_V06N0003 F0 arc: N3_V06N0303 F6 arc: V00B0000 F4 arc: V00B0100 F5 arc: V01S0100 F6 word: SLICEC.K0.INIT 1000010000100001 word: SLICEC.K1.INIT 1000001001000001 word: SLICEB.K0.INIT 1000001001000001 word: SLICEB.K1.INIT 1000001001000001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000001000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000001000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R23C44:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 H01E0101 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 H02E0601 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0103 V06N0103 arc: W3_H06W0303 E3_H06W0203 arc: A7 H02W0701 arc: B3 N1_V02S0301 arc: B4 E1_H02W0301 arc: B7 V00B0000 arc: C1 H00R0100 arc: C3 N1_V01N0001 arc: C4 V00B0100 arc: C5 V00T0000 arc: C6 W1_H02E0601 arc: C7 W1_H02E0601 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D3 H00R0000 arc: D4 V01N0001 arc: D5 N1_V02S0601 arc: D6 E1_H02W0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F3 arc: E1_H02E0501 F5 arc: E3_H06E0103 F1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0000 Q1 arc: LSR1 W1_H02E0301 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F1 arc: N3_V06N0303 F5 arc: S1_V02S0401 F4 arc: S3_V06S0103 F1 arc: S3_V06S0303 F5 arc: V00B0100 F5 arc: V01S0000 F1 arc: W1_H02W0101 F1 arc: W3_H06W0003 Q3 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 1111000000000000 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1110000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R23C45:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 E1_H02W0101 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0701 E3_H06W0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 S1_V02N0301 arc: A5 V02N0101 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V02N0501 arc: B7 V00T0000 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 S1_V02N0201 arc: C5 H02W0601 arc: C7 E1_H02W0401 arc: CLK1 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 H00L0100 arc: D7 S1_V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR1 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q2 arc: N3_V06N0203 F7 arc: S1_V02S0301 Q3 arc: V01S0000 Q1 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R23C46:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 H02W0101 arc: H00R0100 V02S0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 H01E0101 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 V00T0000 arc: A5 E1_H02W0501 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 V02S0101 arc: B3 V02S0101 arc: B4 E1_H02W0101 arc: B5 V02S0701 arc: B6 H02E0101 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 V00B0100 arc: C5 V00T0100 arc: C6 V01N0101 arc: CLK1 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V02N0401 arc: D5 H00L0100 arc: D6 H00R0100 arc: D7 H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: LSR1 H02W0301 arc: M6 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: S1_V02S0101 Q1 arc: S1_V02S0301 Q3 arc: V01S0100 Q0 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R23C47:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02N0301 arc: H00R0000 H02E0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 V02N0401 arc: V00T0100 H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0003 N1_V01S0000 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A3 H00L0100 arc: B3 H02E0301 arc: B4 V02N0701 arc: B7 H02E0101 arc: C3 W1_H02E0601 arc: C4 H01E0001 arc: C5 V00T0000 arc: C6 V00B0100 arc: C7 V01N0101 arc: CE0 V02S0201 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 V02N0201 arc: D4 W1_H02E0201 arc: D5 H02W0201 arc: D6 N1_V02S0401 arc: D7 W1_H02E0201 arc: E1_H01E0001 F1 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q7 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F6 arc: N3_V06N0203 Q4 arc: V00B0100 Q7 arc: V01S0000 Q4 arc: W1_H02W0101 F1 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1100111100000011 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1100000011001000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R23C48:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 H01E0001 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 V06N0003 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: A3 E1_H02W0501 arc: A6 W1_H02E0701 arc: A7 V02N0301 arc: B0 V02S0101 arc: B3 E1_H02W0301 arc: B4 H02E0301 arc: B6 V02N0701 arc: B7 S1_V02N0701 arc: C0 H00L0100 arc: C2 H02E0601 arc: C3 H00L0000 arc: C4 W1_H02E0401 arc: C6 V00T0100 arc: C7 S1_V02N0001 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0201 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 S1_V02N0601 arc: D5 W1_H02E0201 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: E1_H02E0401 F4 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 H02W0601 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q6 word: SLICED.K0.INIT 0000000010110100 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0011001100001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1110000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R23C49:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 N1_V02S0001 arc: H00L0100 E1_H02W0301 arc: H00R0100 H02E0701 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A1 H01E0001 arc: A5 S1_V02N0301 arc: A7 H02W0501 arc: B0 V00T0000 arc: B1 N1_V02S0101 arc: B2 H00R0100 arc: B4 H00L0000 arc: B5 V00B0100 arc: B7 H02W0301 arc: C0 E1_H01W0000 arc: C1 V02N0401 arc: C2 H02E0401 arc: C4 V02S0001 arc: C5 V02N0201 arc: C6 E1_H02W0401 arc: C7 E1_H02W0401 arc: CE0 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 F0 arc: D4 E1_H01W0100 arc: D5 V02N0601 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: LSR1 H02E0301 arc: M2 H02E0601 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 F2 arc: S1_V02S0601 F4 arc: V01S0000 F6 arc: V01S0100 F0 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0011001000000010 word: SLICEA.K0.INIT 1100110000001111 word: SLICEA.K1.INIT 0011001000000010 word: SLICEB.K0.INIT 0011000011111100 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111000011111111 word: SLICED.K1.INIT 1110000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R23C4:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0701 V01N0101 arc: S1_V02S0201 N3_V06S0103 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: A5 S1_V02N0301 arc: B1 V00B0000 arc: B5 H00R0000 arc: C0 S1_V02N0401 arc: C1 H00L0100 arc: C4 E1_H02W0401 arc: C5 E1_H02W0601 arc: CE2 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D4 V02N0601 arc: D5 N1_V02S0401 arc: E1_H01E0101 F1 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: M4 E1_H01E0101 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0401 F4 arc: N1_V02N0601 F4 arc: V00B0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111111110000 word: SLICEC.K1.INIT 1010100000000000 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 0011001100001111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R23C50:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 E1_H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H01W0100 arc: N1_V02N0301 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A1 H00R0000 arc: A3 N1_V02S0701 arc: B1 V02S0301 arc: B3 V02S0301 arc: B4 H01E0101 arc: B6 V02N0701 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 V02N0201 arc: C6 V02N0001 arc: C7 E1_H01E0101 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 W1_H02E0001 arc: D5 E1_H02W0201 arc: D6 E1_H02W0201 arc: D7 V00B0000 arc: E1_H01E0101 Q6 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F0 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N3_V06N0203 F7 arc: V01S0100 Q4 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1111111111000000 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 1110000000000000 word: SLICEB.K0.INIT 1111000011111111 word: SLICEB.K1.INIT 1110000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R23C51:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 S3_V06N0303 arc: H00L0100 H02E0101 arc: H00R0100 H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: E1_H02E0601 W3_H06E0303 arc: S1_V02S0401 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: C0 N1_V01S0100 arc: C1 H00L0100 arc: C2 V02N0601 arc: C3 H02W0601 arc: C6 V02N0001 arc: C7 H02E0401 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 F0 arc: E1_H02E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N1_V02N0001 F2 arc: N1_V02N0301 F3 arc: N1_V02N0601 Q4 arc: V01S0000 Q4 arc: V01S0100 F7 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R23C52:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02W0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 W1_H02E0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 W1_H02E0601 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: E1_H02E0301 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: B0 V02N0301 arc: B1 V00B0000 arc: B3 H00R0000 arc: C0 H02E0401 arc: C1 H00L0000 arc: C3 H00L0000 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02E0201 arc: D3 H02E0201 arc: E1_H01E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: MUXCLK0 CLK0 arc: V00T0000 Q0 arc: W1_H02W0301 F3 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001111011111 word: SLICEA.K0.INIT 0000110000001111 word: SLICEA.K1.INIT 0100011101110111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R23C53:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02W0001 arc: H00L0100 E1_H02W0301 arc: H00R0100 V02N0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: E1_H02E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: S1_V02S0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A3 V02S0501 arc: A5 N1_V01N0101 arc: A7 H00R0000 arc: B0 S1_V02N0101 arc: B1 H02W0301 arc: B3 S1_V02N0301 arc: B4 E1_H02W0301 arc: B5 V00B0100 arc: B7 V01S0000 arc: C0 H00R0100 arc: C1 V02N0401 arc: C3 V02N0401 arc: C4 W1_H02E0401 arc: C5 V00T0000 arc: C6 V02S0201 arc: C7 V00T0000 arc: CE0 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V02S0001 arc: D3 V02S0001 arc: D4 V00B0000 arc: D5 V02S0601 arc: D6 H02W0201 arc: D7 V02S0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: V01S0000 Q0 arc: W1_H02W0101 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011010100111111 word: SLICEC.K0.INIT 0000110000001111 word: SLICEC.K1.INIT 0101001101011111 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 0011010100111111 word: SLICEA.K0.INIT 0000000110101011 word: SLICEA.K1.INIT 0011010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R23C54:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 N1_V02S0001 arc: H00L0100 W1_H02E0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 W1_H02E0601 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: A1 H02E0701 arc: A3 E1_H01E0001 arc: A5 N1_V01N0101 arc: A7 H02E0701 arc: B1 V00T0000 arc: B2 E1_H02W0301 arc: B3 E1_H02W0101 arc: B5 E1_H02W0101 arc: B6 E1_H02W0301 arc: B7 V00T0000 arc: C1 W1_H02E0601 arc: C2 H00L0100 arc: C3 V02S0601 arc: C5 V00T0000 arc: C6 H02E0401 arc: C7 W1_H02E0601 arc: CE1 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 W1_H02E0201 arc: D3 H00R0000 arc: D5 V00B0000 arc: D6 V02N0401 arc: D7 H00R0100 arc: E1_H01E0001 Q2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: V01S0100 F5 arc: W1_H02W0101 F1 arc: W3_H06W0003 F3 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000011111110111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011001101011111 word: SLICEB.K0.INIT 0000110000001111 word: SLICEB.K1.INIT 0101010100111111 word: SLICED.K0.INIT 0000110000001111 word: SLICED.K1.INIT 0101001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R23C55:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02S0401 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 V02N0301 arc: E3_H06E0103 W3_H06E0103 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A3 V02N0501 arc: A7 N1_V01N0101 arc: B0 H02E0101 arc: B1 V00B0000 arc: B2 V02N0301 arc: B3 V02S0301 arc: B4 V00B0100 arc: B6 H02W0301 arc: B7 V01S0000 arc: C0 S1_V02N0401 arc: C1 H02W0401 arc: C2 H00L0000 arc: C3 V02S0401 arc: C4 V00T0100 arc: C6 H02E0401 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 H02E0201 arc: D2 E1_H02W0001 arc: D3 H02E0201 arc: D4 H00R0100 arc: D5 W1_H02E0201 arc: D6 E1_H02W0201 arc: D7 V02N0401 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000110000001111 word: SLICED.K1.INIT 0011001101011111 word: SLICEB.K0.INIT 1100111100000011 word: SLICEB.K1.INIT 0011001101011111 word: SLICEA.K0.INIT 0101010011111110 word: SLICEA.K1.INIT 0101010100111111 word: SLICEC.K0.INIT 0000001111001111 word: SLICEC.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R23C56:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V06N0303 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 V02N0301 arc: V00T0000 E1_H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0501 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: A1 H02W0501 arc: A5 W1_H02E0701 arc: A7 N1_V01N0101 arc: B0 V02N0301 arc: B1 V02S0301 arc: B3 H00R0100 arc: B5 N1_V01S0000 arc: B6 V00B0100 arc: B7 V00B0000 arc: C0 H00L0000 arc: C1 N1_V02S0401 arc: C3 V02S0601 arc: C5 V02S0001 arc: C6 V00T0000 arc: C7 N1_V02S0001 arc: CE0 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H00R0000 arc: D3 H02E0201 arc: D5 V02N0401 arc: D6 H01W0000 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: V00B0000 Q6 arc: W3_H06W0103 F1 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111101110111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011110011 word: SLICEA.K0.INIT 0011111100001100 word: SLICEA.K1.INIT 0011001101011111 word: SLICED.K0.INIT 0000111100001100 word: SLICED.K1.INIT 0011001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R23C57:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 V06N0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 V01N0101 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A5 N1_V01N0101 arc: A7 H00R0000 arc: B0 V02N0101 arc: B1 V00T0000 arc: B2 V02N0101 arc: B3 W1_H02E0101 arc: B4 E1_H02W0101 arc: B5 V01S0000 arc: B6 E1_H02W0101 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 E1_H02W0601 arc: C2 H02W0601 arc: C3 V02S0601 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: C6 E1_H02W0401 arc: C7 W1_H02E0401 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 E1_H02W0001 arc: D4 V02S0401 arc: D5 V02N0401 arc: D6 E1_H02W0201 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H00R0000 Q4 arc: H01W0000 F7 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q6 arc: S1_V02S0301 F3 arc: V00B0000 Q6 arc: V01S0000 Q4 arc: V01S0100 F1 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 1100000011110011 word: SLICED.K1.INIT 0011001101011111 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 0000110000111111 word: SLICEC.K0.INIT 0000110000001111 word: SLICEC.K1.INIT 0011001101011111 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0011000000111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R23C58:PLC2 arc: H00L0100 V02S0301 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 H02E0201 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 V02N0601 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 H01E0001 arc: A4 V00T0000 arc: A5 V00T0100 arc: A7 V00T0100 arc: B0 H00R0100 arc: B1 V00T0000 arc: B3 H00R0000 arc: B4 N1_V02S0501 arc: B5 V02N0701 arc: B7 V02N0701 arc: C0 H00L0100 arc: C1 H00L0000 arc: C2 V02N0601 arc: C3 H00L0000 arc: C4 H02E0401 arc: C5 W1_H02E0401 arc: C7 W1_H02E0401 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 F0 arc: D2 V00B0100 arc: D3 V02S0001 arc: D4 V00B0000 arc: D5 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q1 arc: N1_V02N0001 F2 arc: S3_V06S0103 F2 arc: V00T0100 Q3 arc: V01S0100 Q4 arc: W1_H02W0101 Q1 arc: W1_H02W0201 F2 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0101010100111111 word: SLICEC.K0.INIT 0101010011111110 word: SLICEC.K1.INIT 0011001101011111 word: SLICEA.K0.INIT 1100000011110011 word: SLICEA.K1.INIT 0000111100001100 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 0000111100001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 .tile R23C59:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0303 S1_V02N0501 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 H01E0101 arc: S1_V02S0001 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 .tile R23C5:PLC2 arc: E1_H02E0201 V02N0201 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 H06W0003 arc: S1_V02S0601 E1_H02W0601 arc: V00B0000 V02N0001 arc: V00T0100 H02W0301 arc: W1_H02W0201 E1_H02W0701 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H00R0000 arc: D2 H02E0201 arc: D3 H02W0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q6 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: V01S0100 Q4 arc: W1_H02W0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R23C60:PLC2 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0601 H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 .tile R23C61:PLC2 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H02W0501 arc: W1_H02W0501 W3_H06E0303 .tile R23C62:PLC2 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: W1_H02W0501 N3_V06S0303 .tile R23C63:PLC2 arc: S1_V02S0501 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 .tile R23C64:PLC2 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0203 .tile R23C65:PLC2 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: H01W0000 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 .tile R23C66:PLC2 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 N3_V06S0303 .tile R23C68:PLC2 arc: S1_V02S0401 H06E0203 .tile R23C69:PLC2 arc: S3_V06S0203 N3_V06S0203 .tile R23C6:PLC2 arc: H00R0000 H02W0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 V02N0401 arc: W1_H02W0001 V01N0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 V02N0601 arc: D0 S1_V02N0001 arc: D1 H02W0001 arc: D2 V02N0201 arc: D3 V02S0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: N1_V01N0001 F3 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R23C70:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 N3_V06S0203 .tile R23C7:PLC2 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H02W0701 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 E1_H02W0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 S3_V06N0203 arc: D0 V00T0100 arc: D1 V00B0100 arc: D2 H02W0001 arc: D3 E1_H02W0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C8:PLC2 arc: E1_H02E0001 V02N0001 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06S0003 arc: W3_H06W0003 V06S0003 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q6 arc: H01W0000 Q4 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C9:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0303 N1_V01S0100 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0201 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 E1_H02W0701 arc: B7 V02S0701 arc: C7 V02N0201 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D7 H02E0001 arc: E1_H02E0201 Q0 arc: F7 F7_SLICE arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111111001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R24C10:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02W0001 arc: H00L0100 E1_H02W0101 arc: H00R0100 V02S0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 V02N0601 arc: B6 V00T0000 arc: B7 V00B0000 arc: C6 V02S0201 arc: C7 V02S0201 arc: CE0 H00R0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D6 W1_H02E0201 arc: D7 H00L0100 arc: E1_H01E0101 F6 arc: E1_H02E0001 Q2 arc: E1_H02E0601 Q4 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q2 arc: S1_V02S0701 F7 arc: V01S0100 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 1111110000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R24C11:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 N1_V02S0001 arc: H00R0100 H02E0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 H06W0203 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0401 V02N0401 arc: A5 S1_V02N0301 arc: B0 N1_V02S0101 arc: B1 N1_V02S0101 arc: B2 N1_V02S0101 arc: B5 E1_H02W0101 arc: C0 H02E0401 arc: C1 V02S0601 arc: C2 H00R0100 arc: C3 N1_V01S0100 arc: C5 H02W0401 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02S0201 arc: D2 V02N0201 arc: D3 H02W0201 arc: D5 H02E0201 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0100 Q5 arc: LSR1 H02W0501 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q5 arc: S1_V02S0101 F3 arc: V01S0000 F2 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000100011111111 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1111111100001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R24C12:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0003 V06S0003 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 H01E0001 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 N3_V06S0103 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 H01E0101 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: A2 V00B0000 arc: A5 V00T0100 arc: A6 F7 arc: A7 W1_H02E0701 arc: B0 V00B0000 arc: B1 V02N0101 arc: B2 W1_H02E0301 arc: B3 V02N0101 arc: B5 H00R0000 arc: B6 V02S0501 arc: B7 H02E0101 arc: C0 V02S0401 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C5 W1_H02E0601 arc: C6 H02E0401 arc: C7 S1_V02N0001 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 F2 arc: D2 V02S0001 arc: D3 V02N0201 arc: D5 F0 arc: D6 H02E0001 arc: D7 H02E0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 F2 arc: E1_H02E0701 F7 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: LSR0 E1_H02W0301 arc: M4 E1_H01E0101 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V02N0101 F3 arc: N3_V06N0203 F4 arc: S1_V02S0201 F0 arc: S1_V02S0301 F1 arc: S3_V06S0003 F3 arc: V00B0000 Q6 arc: V01S0000 F1 word: SLICEA.K0.INIT 1100111100000000 word: SLICEA.K1.INIT 0000111100000011 word: SLICEB.K0.INIT 0000111100001011 word: SLICEB.K1.INIT 0000110000000000 word: SLICED.K0.INIT 0000000001001111 word: SLICED.K1.INIT 0001010101010101 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R24C13:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 S3_V06N0203 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 H01E0001 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 V02N0101 arc: V00T0000 H02W0001 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 S1_V02N0101 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0303 E3_H06W0203 arc: A7 H00R0000 arc: B7 H02W0101 arc: C6 V01N0101 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D6 V02N0601 arc: D7 V00B0000 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q0 arc: N1_V02N0401 Q4 arc: V00B0000 F6 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0101010001010101 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R24C14:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 H02W0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0003 V01N0001 arc: W3_H06W0303 N3_V06S0303 arc: A4 H02W0501 arc: A5 H02W0501 arc: B2 H01W0100 arc: B4 N1_V01S0000 arc: B5 N1_V01S0000 arc: C2 V02S0401 arc: C3 H00L0000 arc: C4 V00T0100 arc: C5 V00T0100 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 F2 arc: D2 H00R0000 arc: D3 H02E0001 arc: D4 H02W0001 arc: D5 H02W0001 arc: E1_H02E0301 Q1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H00L0000 F2 arc: H00L0100 F3 arc: H01W0100 Q1 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F2 arc: V00B0000 Q4 arc: W3_H06W0103 F2 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000001100 word: SLICEB.K1.INIT 1111111111110000 word: SLICEC.K0.INIT 0100000000000000 word: SLICEC.K1.INIT 1011111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R24C15:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V06S0303 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V06S0203 arc: A1 H00L0000 arc: A3 H00L0100 arc: A4 N1_V02S0301 arc: A5 N1_V01S0100 arc: B0 H01W0100 arc: B1 V00T0000 arc: B3 H00R0000 arc: B4 V02S0501 arc: B5 V02S0501 arc: C0 H02E0601 arc: C1 V02N0401 arc: C3 H02W0401 arc: C4 N1_V02S0201 arc: C5 N1_V02S0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V01S0000 arc: D3 N1_V02S0001 arc: D4 V02S0601 arc: D5 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: H01W0100 F4 arc: LSR0 H02W0501 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V02N0001 F0 arc: N1_V02N0401 Q6 arc: V00T0100 F1 arc: V01S0000 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000010000100001 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 1001000000000000 word: SLICEC.K0.INIT 1000101001000101 word: SLICEC.K1.INIT 1010001001010001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R24C16:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S3_V06N0303 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: A3 H00L0100 arc: B3 W1_H02E0301 arc: C3 H00R0100 arc: C7 H02E0401 arc: CE0 H02W0101 arc: CE2 H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D3 W1_H02E0001 arc: D7 H02W0001 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q0 arc: E1_H02E0401 Q4 arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V02N0501 Q7 arc: N3_V06N0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000010000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111111110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R24C17:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 V01N0101 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02S0401 arc: W3_H06W0203 E1_H01W0000 arc: A1 H02W0701 arc: A2 H02W0701 arc: A3 H02E0701 arc: A4 V00B0000 arc: A5 V00B0000 arc: A7 N1_V01N0101 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0101 arc: B4 H01E0101 arc: B5 H00L0000 arc: B7 V01S0000 arc: C1 V02S0401 arc: C2 H00L0100 arc: C3 F4 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: D1 H00R0000 arc: D2 S1_V02N0201 arc: D3 N1_V01S0000 arc: D4 H02E0001 arc: D5 S1_V02N0401 arc: D6 H00R0100 arc: D7 S1_V02N0601 arc: E1_H01E0101 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H00R0100 F7 arc: N1_V01N0101 F1 arc: N3_V06N0103 F2 arc: N3_V06N0203 F7 arc: N3_V06N0303 F6 arc: V01S0000 F5 word: SLICEC.K0.INIT 1000110010101111 word: SLICEC.K1.INIT 1111010100110001 word: SLICEB.K0.INIT 1101000000000000 word: SLICEB.K1.INIT 1001000000000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1011000010111011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R24C18:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0203 V01N0001 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0501 N1_V01S0100 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0201 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 N1_V01S0100 arc: E1_H02E0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: B7 H02W0101 arc: C6 H02W0401 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D6 V00B0000 arc: D7 V02S0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q2 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q4 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: V01S0100 Q0 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0000110011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 .tile R24C19:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 H01E0001 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 H06E0203 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E3_H06W0303 arc: N1_V02N0001 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0203 E1_H02W0701 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A3 H00L0100 arc: A4 N1_V01S0100 arc: A5 N1_V01S0100 arc: A6 V02S0301 arc: A7 N1_V01N0101 arc: B3 W1_H02E0101 arc: B4 V00B0100 arc: B5 H01E0101 arc: B6 V00B0000 arc: B7 V02N0501 arc: C3 H00L0000 arc: C4 V02S0001 arc: C5 V02N0001 arc: C6 V00T0100 arc: C7 V02S0201 arc: CE0 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 S1_V02N0601 arc: D6 N1_V02S0601 arc: D7 V00B0000 arc: E1_H01E0001 F5 arc: E1_H01E0101 F3 arc: E1_H02E0401 F4 arc: E1_H02E0701 F7 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02E0501 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1000001001000001 word: SLICED.K1.INIT 1000010000100001 word: SLICEC.K0.INIT 1000001001000001 word: SLICEC.K1.INIT 1001000000001001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000001001000001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R24C20:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 V01N0101 arc: H00L0000 H02W0001 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0201 arc: V00T0000 H02W0201 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A3 V00T0000 arc: A4 H02E0501 arc: A5 H02E0501 arc: A6 E1_H01W0000 arc: A7 N1_V01S0100 arc: B2 F3 arc: B3 E1_H01W0100 arc: B4 H00L0000 arc: B5 H00R0000 arc: B6 V02S0501 arc: B7 V02S0701 arc: C2 F4 arc: C3 V02S0401 arc: C4 H02E0601 arc: C5 V02N0201 arc: C6 H01E0001 arc: C7 V00B0100 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H01E0101 arc: D3 H02E0201 arc: D4 V00B0000 arc: D5 H02E0001 arc: D6 H01W0000 arc: D7 H00R0100 arc: E1_H01E0001 F2 arc: E1_H02E0401 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N3_V06N0303 F6 arc: V00B0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100111101000101 word: SLICEC.K1.INIT 1000110010101111 word: SLICEB.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 1111010100110001 word: SLICED.K0.INIT 1011000000000000 word: SLICED.K1.INIT 1001000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R24C21:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02S0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0301 N1_V02S0201 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0101 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 H02E0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0303 N3_V06S0303 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: H01W0000 Q2 arc: H01W0100 Q0 arc: LSR1 H02W0501 arc: M0 W1_H02E0601 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V01S0100 Q6 arc: W1_H02W0001 Q0 arc: W1_H02W0201 Q2 arc: W1_H02W0401 Q6 arc: W1_H02W0601 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R24C22:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E3_H06E0103 W1_H02E0101 arc: H00L0100 H02W0301 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 H02W0301 arc: W1_H02W0201 N3_V06S0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: A3 H02E0501 arc: A4 N1_V01S0100 arc: B3 H02E0101 arc: B4 H02E0101 arc: B5 V02S0701 arc: C3 N1_V01N0001 arc: C4 E1_H01E0101 arc: C5 S1_V02N0201 arc: CE0 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D4 H00L0100 arc: D5 V02S0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F5 arc: E1_H02E0601 F4 arc: E3_H06E0303 Q6 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N3_V06N0303 F5 arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 arc: V01S0100 Q0 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 1010100010101010 word: SLICEC.K1.INIT 0011000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R24C23:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 H02W0601 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 H02W0501 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 N1_V01S0100 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02N0701 arc: A1 H00L0100 arc: B0 V00B0000 arc: B1 H02W0101 arc: B2 V02N0101 arc: B4 H02E0301 arc: B6 V00B0000 arc: C0 W1_H02E0401 arc: C1 N1_V01S0100 arc: C2 H00R0100 arc: C4 H02W0401 arc: C6 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H01E0101 arc: D2 V02S0001 arc: D3 H00R0000 arc: D4 N1_V02S0601 arc: D5 H02E0201 arc: D6 N1_V02S0601 arc: D7 E1_H02W0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q4 arc: M2 V00T0100 arc: M4 E1_H02W0401 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q4 arc: S3_V06S0303 Q6 arc: V00B0000 Q6 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0101001111111111 word: SLICEA.K1.INIT 1010101010001010 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R24C24:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02N0301 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0203 H06W0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0301 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: A2 H02W0501 arc: A4 E1_H02W0501 arc: A7 E1_H02W0701 arc: B2 H00L0000 arc: B3 N1_V02S0301 arc: B4 V02N0501 arc: B7 H01E0101 arc: C2 S1_V02N0601 arc: C3 H00L0100 arc: C4 E1_H02W0401 arc: C7 H01E0001 arc: CE0 N1_V02S0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H02W0201 arc: D3 V02S0201 arc: D4 H01W0000 arc: D7 H02E0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q3 arc: E1_H02E0001 Q0 arc: E3_H06E0003 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: M0 V00T0000 arc: M4 W1_H02E0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0301 Q3 arc: N3_V06N0003 Q3 arc: N3_V06N0103 F2 arc: V01S0100 Q3 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0001010100111111 word: SLICEB.K1.INIT 1111000000110011 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 word: SLICEC.K0.INIT 1111111110001111 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R24C25:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W1_H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 E1_H02W0601 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V06S0303 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0103 V06S0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00L0100 arc: B1 E1_H01W0100 arc: B4 S1_V02N0701 arc: B5 E1_H02W0301 arc: C1 E1_H01W0000 arc: C2 S1_V02N0601 arc: C3 V02N0601 arc: C4 V02S0001 arc: C5 V00T0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 H00R0000 arc: D4 V02S0601 arc: D5 V00B0000 arc: E1_H01E0101 F3 arc: E1_H02E0101 F3 arc: E3_H06E0303 F5 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 F2 arc: H01W0000 F3 arc: H01W0100 F2 arc: LSR0 H02E0301 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: N1_V02N0301 F1 arc: N1_V02N0401 F4 arc: V01S0000 Q6 arc: V01S0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000011101110111 word: SLICEC.K0.INIT 1100000000000000 word: SLICEC.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R24C26:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02E0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 E1_H02W0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: B3 N1_V02S0101 arc: B4 H00L0000 arc: C3 V02N0401 arc: C4 V02N0201 arc: C5 V00B0100 arc: CE0 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0201 arc: D3 H00R0000 arc: D4 V02N0601 arc: D5 E1_H02W0001 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0000 Q4 arc: H01W0100 Q1 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M4 H02E0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q6 arc: N3_V06N0103 F1 arc: S1_V02S0401 Q4 arc: S1_V02S0601 F4 arc: S3_V06S0203 F4 arc: V01S0000 F1 arc: W1_H02W0301 F1 arc: W1_H02W0601 F4 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011111111111111 word: SLICEC.K0.INIT 0000110011001100 word: SLICEC.K1.INIT 0000111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R24C27:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 S3_V06N0203 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 H02E0201 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0203 S3_V06N0203 arc: A0 H02E0701 arc: A7 H02W0701 arc: B0 F1 arc: B1 H01W0100 arc: B3 W1_H02E0301 arc: B7 H02W0101 arc: C0 E1_H01W0000 arc: C1 N1_V01N0001 arc: C3 V02S0601 arc: C7 V00T0000 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02S0201 arc: D3 H00R0000 arc: D7 V01N0001 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q0 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: S1_V02S0401 F6 arc: V01S0100 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1110010011001100 word: SLICEA.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R24C28:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S3_V06N0303 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 V01N0001 arc: H00L0000 E1_H02W0001 arc: H00L0100 E1_H02W0101 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0701 V01N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0701 V02S0701 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 H02E0501 arc: A1 H02W0701 arc: A7 H02E0701 arc: B0 W1_H02E0101 arc: B1 V02N0101 arc: B4 F3 arc: B7 H01E0101 arc: C0 H02W0401 arc: C1 V02S0401 arc: C3 H02E0601 arc: C4 H02W0601 arc: C7 S1_V02N0201 arc: CE0 H00L0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 F0 arc: D3 V00B0100 arc: D4 N1_V02S0601 arc: D5 H00L0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 F4 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0000 F1 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F1 arc: N1_V02N0101 Q1 arc: N3_V06N0003 F0 arc: S3_V06S0103 F1 arc: V01S0000 F4 arc: W1_H02W0301 F1 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 0111000001111100 word: SLICEC.K0.INIT 1111111111001111 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R24C29:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 E1_H01W0100 arc: H00R0100 V02N0501 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H01E0001 arc: S3_V06S0203 N3_V06S0203 arc: V00T0100 H02W0301 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: A2 H00L0100 arc: B2 W1_H02E0101 arc: B3 H02E0101 arc: B7 H02E0301 arc: C2 V02N0401 arc: C3 H02W0401 arc: C7 E1_H02W0601 arc: CE0 H00R0100 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D2 S1_V02N0001 arc: D3 H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q3 arc: E1_H02E0001 Q0 arc: E3_H06E0003 Q3 arc: E3_H06E0203 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q4 arc: M0 H02E0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F7 arc: N3_V06N0003 Q3 arc: N3_V06N0103 F2 arc: S1_V02S0701 F7 arc: S3_V06S0003 F3 arc: V01S0000 F7 arc: V01S0100 Q3 arc: W3_H06W0003 F3 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011000000000000 word: SLICEB.K0.INIT 0001010100111111 word: SLICEB.K1.INIT 0000000011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R24C2:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 H06W0103 arc: N1_V02N0601 E1_H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0301 arc: V00T0100 H02E0101 arc: B7 V00T0000 arc: C6 E1_H01E0101 arc: C7 S1_V02N0001 arc: CE0 H00R0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 E1_H02W0201 arc: D7 E1_H02W0201 arc: E1_H01E0101 Q4 arc: E3_H06E0303 F6 arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: V00T0000 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111111111111 word: SLICED.K1.INIT 0011001100001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 .tile R24C30:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 V01N0101 arc: H00L0100 N1_V02S0101 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0301 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 E3_H06W0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: B5 V00B0100 arc: C4 H02W0401 arc: C5 V00T0100 arc: D4 S1_V02N0401 arc: D5 E1_H02W0201 arc: D6 S1_V02N0401 arc: D7 S1_V02N0401 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 W1_H02E0001 arc: M2 V00B0000 arc: M3 H00L0100 arc: M4 H02E0401 arc: M5 W1_H02E0001 arc: M6 H02E0401 arc: N3_V06N0003 F3 arc: V01S0000 F3 arc: W3_H06W0003 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000011111111 word: SLICEC.K1.INIT 0011111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R24C31:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0701 V06S0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 V06S0103 arc: A0 V01N0101 arc: A1 V02N0701 arc: A3 H02W0501 arc: A4 H02W0701 arc: B0 H00R0100 arc: B1 V00B0000 arc: B3 S1_V02N0301 arc: B4 F1 arc: B6 V02S0701 arc: C0 V02N0601 arc: C1 S1_V02N0601 arc: C2 H00L0100 arc: C3 S1_V02N0601 arc: C4 E1_H01E0101 arc: C6 S1_V02N0201 arc: C7 V02S0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 S1_V02N0001 arc: D4 F0 arc: D6 S1_V02N0401 arc: D7 V02S0401 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: LSR1 V00B0100 arc: M4 V00T0000 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: S3_V06S0303 F6 arc: V00T0000 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000010 word: SLICEA.K1.INIT 0000100000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICED.K0.INIT 0000110011001100 word: SLICED.K1.INIT 0000111111111111 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R24C32:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02S0201 arc: H00L0100 H02E0101 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02E0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00L0000 arc: A2 N1_V02S0701 arc: A3 V00T0000 arc: A4 V02N0101 arc: A6 V02S0301 arc: A7 E1_H02W0501 arc: B1 S1_V02N0101 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V02N0701 arc: B6 S1_V02N0701 arc: B7 V02N0501 arc: C1 V02S0401 arc: C2 E1_H01W0000 arc: C3 H02E0601 arc: C4 V00T0100 arc: C6 H02E0601 arc: C7 V02N0201 arc: D1 H02E0201 arc: D2 V01S0100 arc: D3 H00R0000 arc: D4 H01W0000 arc: D6 H00L0100 arc: D7 V00B0000 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F2 arc: M0 V00B0100 arc: M4 E1_H01E0101 arc: V01S0100 F3 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000000000000010 word: SLICED.K1.INIT 0000100000000000 word: SLICEB.K0.INIT 0000000000000111 word: SLICEB.K1.INIT 0000000000000010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000010000000000 word: SLICEC.K0.INIT 0000000000010011 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R24C33:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 H02E0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 H02E0001 arc: V00T0100 E1_H02W0301 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 N1_V01S0100 arc: A1 S1_V02N0701 arc: A2 S1_V02N0501 arc: A3 S1_V02N0501 arc: A5 H02W0701 arc: A7 V00T0100 arc: B1 V00T0000 arc: B2 H00L0000 arc: B3 H02W0301 arc: B5 H00R0000 arc: B7 V02S0501 arc: C1 H02E0601 arc: C2 H02E0601 arc: C3 E1_H02W0601 arc: C5 H02W0401 arc: C7 V01N0101 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 V02N0201 arc: D5 S1_V02N0401 arc: D7 H00R0100 arc: E1_H01E0101 F3 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F2 arc: M6 V00B0100 arc: N1_V01N0001 F6 arc: V00B0100 F5 arc: V01S0000 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000100000000000 word: SLICEB.K0.INIT 0000100000000000 word: SLICEB.K1.INIT 1100110010100000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R24C34:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V06S0203 arc: H00L0000 H02W0001 arc: H00L0100 V02N0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S3_V06N0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0201 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A1 H00L0000 arc: A5 V00T0000 arc: A7 H00L0000 arc: B1 H00R0100 arc: B5 V02N0501 arc: B7 V02S0701 arc: C1 H02E0401 arc: C5 V02N0001 arc: C7 V02N0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D5 V02N0601 arc: D7 H00L0100 arc: E1_H01E0001 F5 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: M0 V00T0100 arc: M2 V00B0000 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: N3_V06N0003 F0 arc: S3_V06S0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R24C35:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 H01E0001 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 N1_V01S0100 arc: H00R0100 V02N0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 H01E0101 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02S0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 V02N0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: A3 H02E0701 arc: A5 V00B0000 arc: A7 H02W0701 arc: B3 H02W0301 arc: B5 V00B0100 arc: B7 H02W0301 arc: C3 H00R0100 arc: C5 H02W0401 arc: C7 V02N0201 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 V02N0401 arc: D7 H02W0201 arc: E1_H01E0101 F7 arc: E3_H06E0003 Q0 arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0100 F3 arc: M0 H02E0601 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: N3_V06N0203 F4 arc: V01S0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R24C36:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 H02W0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 H02E0001 arc: V00T0100 H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 S3_V06N0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A1 H00L0100 arc: A5 V00T0100 arc: B1 H00R0100 arc: B3 W1_H02E0101 arc: B5 V02S0501 arc: B6 N1_V01S0000 arc: C1 V02S0401 arc: C3 S1_V02N0401 arc: C5 H02W0401 arc: C6 E1_H02W0601 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D3 V01S0100 arc: D5 W1_H02E0201 arc: D6 H02W0201 arc: D7 E1_H02W0001 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: V00B0100 F5 arc: V01S0100 F6 arc: W3_H06W0003 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1111000000110011 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R24C37:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 W1_H02E0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02E0501 arc: N3_V06N0103 V01N0101 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 V01N0001 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: W3_H06W0203 N3_V06S0203 arc: A1 H00L0100 arc: A3 V02S0501 arc: A5 V00T0000 arc: B1 V00B0000 arc: B3 H00L0000 arc: B5 H00R0000 arc: C1 N1_V01S0100 arc: C3 H02W0401 arc: C5 V02S0201 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 H02E0201 arc: D5 V02S0401 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0000 F4 arc: M0 H02E0601 arc: M4 W1_H02E0401 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: N1_V02N0201 F0 arc: N1_V02N0601 Q6 arc: N3_V06N0003 F3 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000010101010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R24C38:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 H01E0101 arc: E3_H06E0303 N3_V06S0303 arc: H00R0100 H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0201 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V01N0101 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: CE0 H02W0101 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: V01S0100 Q4 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R24C39:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 V01N0001 arc: H00L0000 H02E0201 arc: H00L0100 V02N0101 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0501 arc: V01S0000 S3_V06N0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V02N0701 arc: B5 H00L0000 arc: B6 V02S0501 arc: B7 V02S0501 arc: C4 W1_H02E0401 arc: C5 H02E0401 arc: C6 V02N0001 arc: C7 S1_V02N0001 arc: CE0 H00L0100 arc: CE1 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D4 H02E0201 arc: D5 H00R0100 arc: D6 S1_V02N0401 arc: D7 W1_H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E3_H06E0303 F6 arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F6 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 arc: W1_H02W0201 Q0 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 1111001100000000 word: SLICED.K0.INIT 1111001111110000 word: SLICED.K1.INIT 1111111100110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R24C3:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H06W0303 arc: S1_V02S0201 E1_H02W0201 arc: S3_V06S0003 N3_V06S0303 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0201 arc: D0 V00B0100 arc: D1 V02N0201 arc: D2 V02N0001 arc: D3 S1_V02N0001 arc: E1_H02E0101 F3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R24C40:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: H00L0100 V02N0301 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02W0301 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 N3_V06S0203 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 H02E0501 arc: A4 S1_V02N0301 arc: A5 E1_H02W0701 arc: A7 V00T0100 arc: B0 V02S0301 arc: B2 V02N0301 arc: B3 V02N0101 arc: B4 H00R0000 arc: B5 H02E0301 arc: B7 V02S0501 arc: C0 S1_V02N0401 arc: C1 H00R0100 arc: C2 N1_V02S0601 arc: C3 H00L0100 arc: C4 H02E0401 arc: C5 H02W0401 arc: C7 E1_H02W0601 arc: D0 H02W0001 arc: D1 S1_V02N0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: D4 H01W0000 arc: D5 V02S0401 arc: D7 V00B0000 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0000 F5 arc: H01W0100 F2 arc: M2 V00T0000 arc: M6 V00B0100 arc: N3_V06N0203 F4 arc: S3_V06S0003 F0 arc: S3_V06S0103 F1 arc: V01S0000 F2 word: SLICEA.K0.INIT 1100101010101010 word: SLICEA.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0000111100001110 word: SLICEC.K1.INIT 1100010010000000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0110101110110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R24C41:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0103 N3_V06S0103 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 N1_V02S0501 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0701 W3_H06E0203 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0303 W3_H06E0203 arc: A1 N1_V02S0701 arc: A2 H02W0701 arc: A3 V02S0501 arc: A7 H02W0501 arc: B1 S1_V02N0101 arc: B2 F3 arc: B3 H02W0301 arc: B4 S1_V02N0501 arc: B5 H02E0301 arc: B7 V00T0000 arc: C1 F6 arc: C2 V02N0601 arc: C3 H00L0100 arc: C4 E1_H02W0601 arc: C5 S1_V02N0001 arc: C7 V02S0201 arc: CE0 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D2 H00R0000 arc: D3 E1_H02W0001 arc: D4 S1_V02N0601 arc: D5 S1_V02N0601 arc: D7 H00R0100 arc: E1_H01E0001 F4 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 F3 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: N1_V01N0101 F4 arc: N1_V02N0201 F2 arc: V01S0000 F3 arc: W3_H06W0003 F3 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111100101110 word: SLICEB.K0.INIT 1101000010000000 word: SLICEB.K1.INIT 1100001000000010 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1100111111000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1011001101111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R24C42:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 N1_V02S0601 arc: H00R0100 V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 W1_H02E0401 arc: N3_V06N0003 V01N0001 arc: N3_V06N0303 H06E0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: V00B0000 W1_H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V01N0101 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0103 V01N0101 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: B2 V02N0301 arc: B3 V02N0301 arc: B5 N1_V02S0701 arc: B6 V02N0501 arc: B7 V02N0501 arc: C2 H00R0100 arc: C3 E1_H02W0601 arc: C5 S1_V02N0201 arc: C6 V00T0100 arc: C7 V02N0201 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H01E0101 arc: D3 V02N0201 arc: D5 H02E0201 arc: D6 H00R0100 arc: D7 H02E0001 arc: E1_H01E0101 F6 arc: E1_H02E0001 Q0 arc: E3_H06E0103 F2 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M2 W1_H02E0601 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q0 arc: N1_V02N0601 F6 arc: S3_V06S0303 F5 arc: V01S0000 Q0 arc: V01S0100 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 1111110000110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R24C43:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0501 V06S0303 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H06W0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 H01E0101 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 V02S0601 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0501 arc: A5 H02W0701 arc: A6 H02E0501 arc: A7 H02E0501 arc: B0 H00R0100 arc: B5 H00R0000 arc: B6 N1_V02S0501 arc: B7 N1_V02S0501 arc: C0 F6 arc: C1 H00L0100 arc: C4 H02E0601 arc: C5 N1_V02S0201 arc: C6 S1_V02N0201 arc: C7 S1_V02N0201 arc: D0 H02W0201 arc: D1 V01S0100 arc: D4 E1_H02W0001 arc: D5 E1_H02W0001 arc: D6 H02W0001 arc: D7 H02W0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 W1_H02E0401 arc: S1_V02S0601 F4 arc: V01S0100 F6 arc: W1_H02W0401 F6 word: SLICEA.K0.INIT 1101000111100010 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100110110001100 word: SLICED.K1.INIT 1111000110110000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1100100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R24C44:PLC2 arc: E1_H02E0201 V02S0201 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 N1_V01S0000 arc: H00R0000 H02W0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V02S0701 arc: E1_H02E0501 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A3 V02S0701 arc: B3 N1_V02S0301 arc: B5 H00R0000 arc: B7 N1_V02S0701 arc: C2 W1_H02E0601 arc: C3 W1_H02E0601 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: C7 N1_V02S0001 arc: CE0 H02E0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 H02E0001 arc: D5 E1_H02W0201 arc: D6 H02W0201 arc: D7 V00B0000 arc: E1_H01E0101 Q7 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q0 arc: M0 V00B0100 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F6 arc: N3_V06N0303 Q5 arc: S3_V06S0303 Q5 arc: V01S0000 Q7 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000110000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1110000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R24C45:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0501 arc: V00T0100 N1_V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0003 V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: A0 N1_V02S0701 arc: A1 N1_V02S0701 arc: A2 N1_V02S0701 arc: A3 N1_V02S0701 arc: A4 V02N0301 arc: A5 S1_V02N0101 arc: B0 N1_V02S0101 arc: B1 N1_V02S0101 arc: B2 N1_V02S0101 arc: B3 N1_V02S0101 arc: B4 H00R0000 arc: B5 V00B0100 arc: B7 V02N0701 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 V02N0201 arc: C5 E1_H02W0401 arc: C6 V02N0001 arc: C7 V02S0001 arc: CE3 H00L0100 arc: CLK1 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 S1_V02N0401 arc: D5 H02E0201 arc: D6 V00B0000 arc: D7 H02W0201 arc: E1_H01E0101 Q2 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q3 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: V01S0000 Q7 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R24C46:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 N1_V01S0000 arc: H00L0100 H02W0101 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: N3_V06N0003 V01N0001 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 V00T0000 arc: A5 V02N0301 arc: B0 N1_V02S0101 arc: B1 N1_V02S0101 arc: B2 N1_V02S0101 arc: B3 N1_V02S0101 arc: B4 V02S0501 arc: B5 N1_V02S0501 arc: B6 V01S0000 arc: C0 N1_V02S0601 arc: C1 N1_V02S0601 arc: C2 N1_V02S0601 arc: C3 N1_V02S0601 arc: C4 V02N0201 arc: C5 H02W0401 arc: C6 V00B0100 arc: CLK1 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 S1_V02N0401 arc: D5 N1_V02S0401 arc: D6 V02N0601 arc: D7 H00L0100 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: LSR1 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F6 arc: S1_V02S0301 Q1 arc: V01S0000 Q3 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R24C47:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H06W0203 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: E1_H01E0001 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0203 N1_V01S0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 H00L0000 arc: A2 H00L0100 arc: B0 H00R0100 arc: B1 V02N0101 arc: B2 F3 arc: B3 W1_H02E0301 arc: B5 W1_H02E0101 arc: B6 V00T0000 arc: C0 N1_V01S0100 arc: C1 N1_V02S0401 arc: C2 H02W0601 arc: C3 S1_V02N0601 arc: C5 W1_H02E0601 arc: C6 H02E0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 E1_H02W0201 arc: D2 E1_H02W0001 arc: D3 V00B0100 arc: D5 S1_V02N0401 arc: D6 V02S0601 arc: D7 W1_H02E0001 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0000 F2 arc: H01W0100 Q0 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: N1_V01N0101 F6 arc: V01S0000 F5 arc: V01S0100 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000010101100 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000001100001111 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R24C48:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 V01N0001 arc: N3_V06N0103 V01N0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 W1_H02E0101 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H01W0000 arc: S1_V02S0101 W3_H06E0103 arc: W3_H06W0103 E1_H02W0201 arc: E3_H06E0103 W3_H06E0103 arc: A3 H00L0100 arc: B3 H00L0000 arc: B4 H02E0101 arc: C3 W1_H02E0601 arc: C4 V00T0100 arc: CE0 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 N1_V02S0001 arc: D3 W1_H02E0201 arc: D4 V02N0601 arc: D5 H01W0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F1 arc: N1_V02N0401 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1100000011001000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R24C49:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 V01N0101 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0601 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: A3 V02S0701 arc: B0 V00B0000 arc: B3 N1_V02S0301 arc: B5 N1_V02S0501 arc: B6 W1_H02E0301 arc: C0 H02E0601 arc: C2 H00L0000 arc: C3 W1_H02E0601 arc: C5 E1_H01E0101 arc: C6 V00B0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H00R0000 arc: D2 V02S0001 arc: D3 V02S0001 arc: D5 W1_H02E0001 arc: D6 H02E0001 arc: D7 H00R0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 H02E0301 arc: M0 H02W0601 arc: M2 V00T0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0701 F5 arc: V01S0100 F6 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110000001111 word: SLICEA.K0.INIT 0011000011111100 word: SLICEA.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1110000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R24C4:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S3_V06N0303 arc: H00L0000 S1_V02N0201 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 H02W0401 arc: V00B0100 H02E0701 arc: V00T0100 S1_V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 S1_V02N0601 arc: B1 H01W0100 arc: C0 S1_V02N0401 arc: C1 H00L0000 arc: CE2 V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F1 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 0011001100001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R24C50:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02S0101 arc: H00R0000 H02W0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02N0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: H01W0000 W3_H06E0103 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: A3 H00L0100 arc: B3 N1_V02S0301 arc: C2 H00L0000 arc: C3 H00L0000 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: E1_H01E0101 Q4 arc: E1_H02E0201 Q0 arc: F2 F5B_SLICE arc: H01W0100 F2 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000011111111 word: SLICEB.K1.INIT 1110000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R24C51:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 V02N0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 H06E0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 H01E0101 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V02N0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: B1 H02W0101 arc: C1 S1_V02N0401 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H02E0101 F1 arc: E3_H06E0103 Q2 arc: F1 F1_SLICE arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q6 arc: V01S0100 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R24C52:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02N0601 arc: H00L0000 V02N0201 arc: H00L0100 V02S0101 arc: H00R0000 H02E0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02S0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02N0501 arc: H01W0100 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: B1 V00B0000 arc: B2 H02W0301 arc: B3 H00R0000 arc: B6 V02N0701 arc: C1 H02W0601 arc: C2 H00L0100 arc: C3 H02W0601 arc: C6 V00T0100 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D2 E1_H02W0201 arc: D3 H02W0001 arc: D6 V02S0601 arc: D7 V02N0401 arc: E1_H01E0001 Q2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: M4 W1_H02E0401 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: S3_V06S0203 Q4 arc: V00T0000 Q2 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0100011101110111 word: SLICEB.K0.INIT 0000111100001100 word: SLICEB.K1.INIT 0001110100111111 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R24C53:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 N1_V02S0601 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06W0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 V01N0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: A5 V00T0000 arc: A7 N1_V01N0101 arc: B0 H01W0100 arc: B1 H02W0101 arc: B2 S1_V02N0101 arc: B3 H02W0301 arc: B4 S1_V02N0701 arc: B5 H02W0301 arc: B6 V00B0000 arc: B7 V01S0000 arc: C0 E1_H01W0000 arc: C1 W1_H02E0401 arc: C2 H02E0401 arc: C3 N1_V01N0001 arc: C4 V00T0100 arc: C5 V00B0100 arc: C6 H02W0401 arc: C7 W1_H02E0401 arc: CE0 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 E1_H02W0001 arc: D4 W1_H02E0201 arc: D5 H01W0000 arc: D6 H02E0001 arc: D7 N1_V02S0601 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q0 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F5 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q0 arc: V01S0000 Q6 arc: W3_H06W0103 F1 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 0000000100100011 word: SLICEA.K0.INIT 0000000110101011 word: SLICEA.K1.INIT 0011010100111111 word: SLICEC.K0.INIT 0011111100001100 word: SLICEC.K1.INIT 0010000000110001 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 0011010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R24C54:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0601 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02W0501 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 N1_V01S0100 arc: N1_V02N0101 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A4 S1_V02N0301 arc: A7 S1_V02N0301 arc: B0 H02W0301 arc: B2 V02N0301 arc: B4 H00L0000 arc: B5 S1_V02N0701 arc: B6 S1_V02N0701 arc: B7 V00B0000 arc: C0 F6 arc: C2 E1_H02W0601 arc: C4 V00B0100 arc: C5 W1_H02E0601 arc: C6 V00T0000 arc: C7 H02E0401 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 S1_V02N0201 arc: D2 S1_V02N0201 arc: D3 E1_H02W0201 arc: D4 S1_V02N0601 arc: D5 S1_V02N0401 arc: D6 H00L0100 arc: D7 V02S0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 F6 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 V00B0000 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F4 arc: V00B0100 F5 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000100100011 word: SLICEC.K1.INIT 1111110000110000 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 1100010010000000 word: SLICEB.K0.INIT 0000110000111111 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R24C55:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 H02E0201 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 S1_V02N0501 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: A5 V02N0101 arc: A7 N1_V01N0101 arc: B0 E1_H02W0301 arc: B2 E1_H02W0301 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V01S0000 arc: B6 V00B0000 arc: B7 H02E0101 arc: C0 W1_H02E0401 arc: C2 H00L0100 arc: C3 E1_H01W0000 arc: C4 H02W0401 arc: C5 N1_V02S0201 arc: C6 V02S0201 arc: C7 N1_V02S0201 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F2 arc: D2 S1_V02N0001 arc: D3 F2 arc: D4 H02E0001 arc: D5 V02S0401 arc: D6 E1_H02W0001 arc: D7 V02S0401 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q6 arc: M0 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0001 F0 arc: S3_V06S0203 F7 arc: V01S0000 Q4 arc: V01S0100 Q6 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0011111100001100 word: SLICEC.K1.INIT 0011001101011111 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111001111000000 word: SLICED.K0.INIT 0000111100001100 word: SLICED.K1.INIT 0011001101011111 word: SLICEA.K0.INIT 1111001111000000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R24C56:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0203 W1_H02E0701 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02E0701 arc: V00T0100 H02E0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V02N0601 arc: E1_H02E0101 W3_H06E0103 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: B0 H00R0100 arc: B1 H02W0301 arc: B2 H00R0000 arc: B3 H02W0301 arc: B4 S1_V02N0701 arc: B5 H02W0301 arc: B6 V00B0000 arc: B7 H02W0301 arc: C0 S1_V02N0401 arc: C1 H02E0601 arc: C2 N1_V02S0601 arc: C3 N1_V02S0601 arc: C4 H02E0401 arc: C5 F4 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: D0 V00T0100 arc: D1 F0 arc: D2 V01S0100 arc: D3 N1_V02S0201 arc: D4 H02E0201 arc: D5 N1_V02S0401 arc: D6 H00L0100 arc: D7 V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 F5 arc: N1_V01N0001 F4 arc: N1_V02N0001 F0 arc: V01S0000 F7 arc: V01S0100 F3 arc: W1_H02W0201 F2 arc: W1_H02W0401 F6 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 0011000011111100 word: SLICEB.K0.INIT 1100000011110011 word: SLICEB.K1.INIT 0000110000111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R24C57:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 N3_V06S0203 arc: H00L0100 V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H02E0501 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: A3 V00T0000 arc: A5 V00B0000 arc: A7 H02W0501 arc: B3 H00R0000 arc: B5 N1_V02S0501 arc: B7 V00B0100 arc: C3 H00R0100 arc: C5 V02N0001 arc: C7 E1_H02W0401 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 E1_H02W0001 arc: D5 V02S0401 arc: D7 H02W0201 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F3 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: N1_V01N0101 Q0 arc: N3_V06N0203 F7 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000010101010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111101110111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100100001000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R24C58:PLC2 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 H06E0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 W1_H02E0701 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: E3_H06E0003 W3_H06E0003 arc: B0 H02E0301 arc: B1 V00B0000 arc: B2 H00R0000 arc: B3 H02E0101 arc: B4 V00B0100 arc: B5 H02E0301 arc: B6 H02E0301 arc: C0 S1_V02N0401 arc: C1 N1_V01N0001 arc: C2 V02N0601 arc: C3 H00L0100 arc: C4 V02S0201 arc: C5 F4 arc: C6 V02N0201 arc: D0 S1_V02N0001 arc: D1 F0 arc: D2 V00T0100 arc: D3 V01S0100 arc: D4 S1_V02N0601 arc: D5 H02W0201 arc: D6 H00R0100 arc: D7 F0 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M6 E1_H02W0401 arc: N1_V01N0001 F5 arc: N1_V02N0001 F2 arc: S1_V02S0101 F3 arc: V00T0100 F3 arc: V01S0000 F5 arc: V01S0100 F4 arc: W3_H06W0103 F1 word: SLICEA.K0.INIT 1111001111000000 word: SLICEA.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0011111100001100 word: SLICEC.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R24C59:PLC2 arc: E3_H06E0103 V06S0103 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H06E0203 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02N0401 arc: N1_V02N0001 W3_H06E0003 .tile R24C5:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: H00R0000 V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0501 H02W0501 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0101 arc: W1_H02W0401 E1_H02W0101 arc: A2 S1_V02N0701 arc: B2 V02N0101 arc: B3 H00R0100 arc: C2 V02S0601 arc: C3 H02E0601 arc: CE0 S1_V02N0201 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 H00R0000 arc: E1_H01E0001 F2 arc: F2 F5B_SLICE arc: H01W0000 F2 arc: H01W0100 Q6 arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V02N0001 F2 arc: N1_V02N0201 F2 arc: N1_V02N0601 Q4 arc: N3_V06N0103 F2 arc: S1_V02S0001 F2 arc: S3_V06S0103 F2 arc: W1_H02W0201 F2 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011110111 word: SLICEB.K1.INIT 1111111100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R24C60:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 S3_V06N0203 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 .tile R24C61:PLC2 arc: S1_V02S0001 H02E0001 arc: W1_H02W0701 N3_V06S0203 arc: S3_V06S0203 W3_H06E0203 .tile R24C62:PLC2 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: E3_H06E0003 W3_H06E0003 .tile R24C63:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0701 N3_V06S0203 .tile R24C64:PLC2 arc: S1_V02S0501 N1_V02S0501 arc: E3_H06E0003 W3_H06E0003 .tile R24C65:PLC2 arc: S1_V02S0001 H06E0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0101 W3_H06E0103 .tile R24C66:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: E1_H02E0501 W3_H06E0303 .tile R24C67:PLC2 arc: S1_V02S0101 N1_V02S0101 .tile R24C68:PLC2 arc: E3_H06E0303 W1_H02E0501 arc: S1_V02S0001 W1_H02E0001 .tile R24C69:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: S3_V06S0003 N3_V06S0303 .tile R24C6:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 H01E0001 arc: E3_H06E0203 H01E0001 arc: H00L0000 V02S0201 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0201 H01E0001 arc: S3_V06S0003 H01E0001 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: A2 E1_H02W0501 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00L0000 arc: B3 H00R0100 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 S1_V02N0401 arc: C3 H00L0000 arc: CE2 S1_V02N0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: W1_H02W0301 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111100 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 1111000011100000 word: SLICEB.K1.INIT 1111111111111100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R24C70:PLC2 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 .tile R24C7:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 N3_V06S0203 arc: D0 S1_V02N0001 arc: D1 E1_H02W0001 arc: D2 S1_V02N0201 arc: D3 N1_V02S0201 arc: E1_H01E0001 F3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 H02E0601 arc: M1 H00L0100 arc: M2 H02E0601 arc: M3 H00R0100 arc: M4 H02E0401 arc: M5 H00L0100 arc: M6 H02E0401 arc: N1_V02N0101 F3 arc: V01S0000 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R24C8:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W1_H02E0401 arc: H00L0100 H02E0101 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 H01E0001 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 E1_H02W0001 arc: W1_H02W0501 V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H00R0000 arc: D2 V01S0100 arc: D3 H02W0201 arc: E1_H01E0001 F1 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q4 arc: M0 W1_H02E0601 arc: M1 H00L0100 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R24C9:PLC2 arc: E1_H02E0401 N1_V02S0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0201 H01E0001 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0701 S1_V02N0701 arc: A4 N1_V01N0101 arc: A5 V00T0000 arc: B4 W1_H02E0101 arc: B5 V00B0100 arc: C4 H02E0401 arc: C5 F4 arc: CE1 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 H02E0001 arc: E1_H02E0501 F5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M2 H02W0601 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: W1_H02W0401 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111110100000000 word: SLICEC.K1.INIT 0101001100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R26C10:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 E1_H02W0301 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H06E0203 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0001 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V06S0303 arc: A7 V00T0100 arc: B7 V00B0000 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D7 H02W0201 arc: E1_H01E0101 F6 arc: E1_H02E0601 F6 arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0000 F6 arc: M0 V00T0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0601 F6 arc: N3_V06N0303 F6 arc: S1_V02S0601 F6 arc: V01S0000 F6 arc: V01S0100 F6 arc: W1_H02W0001 Q0 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R26C11:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0303 N3_V06S0303 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0701 E3_H06W0203 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 V06S0203 .tile R26C12:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 V06N0303 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0601 W1_H02E0601 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 V06N0003 arc: A3 H02W0501 arc: B3 V02S0301 arc: C3 H00L0000 arc: C4 E1_H01E0101 arc: C5 H02W0601 arc: C6 V00T0000 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V01S0100 arc: D4 H00L0100 arc: D5 H02E0201 arc: D6 V00B0000 arc: D7 H01W0000 arc: E1_H01E0101 Q5 arc: E3_H06E0103 F2 arc: E3_H06E0203 F7 arc: E3_H06E0303 F6 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR0 V00B0100 arc: M0 V00T0100 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q5 arc: N1_V02N0701 Q5 arc: N3_V06N0103 F2 arc: N3_V06N0203 F7 arc: V00B0000 F4 arc: V01S0100 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000000011110000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0010001110101111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R26C13:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S3_V06N0203 arc: H00R0100 V02N0701 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V02S0601 arc: N1_V02N0101 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V02N0001 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R26C14:PLC2 arc: H00R0000 S1_V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0501 H02W0501 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 E1_H01W0000 arc: W3_H06W0103 E3_H06W0103 arc: A0 E1_H01E0001 arc: A1 H02W0701 arc: A2 V02N0701 arc: B0 V00T0000 arc: B1 V00B0000 arc: B2 S1_V02N0301 arc: C0 H02W0601 arc: C1 H00R0100 arc: C2 V02N0401 arc: C5 V00B0100 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V02N0201 arc: D2 S1_V02N0201 arc: D5 H02E0001 arc: E1_H01E0001 Q1 arc: E1_H02E0201 F2 arc: E1_H02E0601 Q6 arc: E3_H06E0003 F0 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0100 Q1 arc: M2 N1_V01N0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0301 Q1 arc: N3_V06N0103 F1 arc: W1_H02W0101 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0100000000000000 word: SLICEA.K1.INIT 1010001000000000 word: SLICEB.K0.INIT 0001010100111111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R26C15:PLC2 arc: E1_H02E0401 N1_V02S0401 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: A2 E1_H01E0001 arc: A3 V02N0501 arc: A7 V02N0101 arc: B2 H01W0100 arc: B3 W1_H02E0101 arc: B6 V01S0000 arc: B7 V02N0701 arc: C2 E1_H02W0401 arc: C3 H02W0401 arc: C6 W1_H02E0601 arc: C7 E1_H01E0101 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 V01S0100 arc: D6 S1_V02N0601 arc: D7 H02E0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F2 arc: E3_H06E0203 F7 arc: E3_H06E0303 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q0 arc: M0 V00T0100 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: S1_V02S0101 F3 arc: V00T0100 F3 arc: V01S0000 Q4 arc: V01S0100 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0111000001111100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C16:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E3_H06E0303 V06S0303 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: A3 V00T0000 arc: B3 V01N0001 arc: C3 H00L0000 arc: CE0 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 E1_H02W0001 arc: E1_H01E0101 F3 arc: E1_H02E0401 Q6 arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M4 V00B0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: V00T0000 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000010000100001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R26C17:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0501 V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H02E0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A7 H00L0000 arc: B6 N1_V02S0501 arc: B7 V00B0000 arc: C6 V02S0201 arc: C7 V02N0201 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D6 H00R0100 arc: D7 E1_H02W0001 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0100 F7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q2 arc: N1_V02N0601 F6 arc: V00B0000 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111001100000000 word: SLICED.K1.INIT 1000010000100001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R26C18:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 E3_H06W0303 arc: H00L0100 V02S0101 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 W1_H02E0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0003 S3_V06N0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: A1 H00R0000 arc: B1 H01W0100 arc: C1 H00L0100 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: F1 F1_SLICE arc: H00R0000 Q4 arc: H01W0000 F1 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000010000100001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R26C19:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H01W0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H02W0001 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A2 V00T0000 arc: A3 V00B0000 arc: B2 V02N0101 arc: B3 V02N0301 arc: C1 V02N0401 arc: C2 E1_H02W0601 arc: C3 H00R0100 arc: C7 V02N0201 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V01S0100 arc: D3 V00B0100 arc: D7 S1_V02N0401 arc: E1_H02E0301 F1 arc: E3_H06E0103 F2 arc: E3_H06E0203 F7 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR1 H02E0301 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V02N0601 Q4 arc: V01S0100 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000011100000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C20:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02S0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06W0103 arc: V00B0000 V02N0001 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0701 E3_H06W0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0203 E3_H06W0103 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q2 arc: H01W0000 Q2 arc: H01W0100 Q4 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 H02E0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0001 Q0 arc: N3_V06N0103 Q2 arc: W1_H02W0601 Q6 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R26C21:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 V02N0701 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0601 V02N0601 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q4 arc: E3_H06E0103 Q2 arc: E3_H06E0303 Q6 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0401 Q6 arc: N3_V06N0103 Q2 arc: N3_V06N0303 Q6 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R26C22:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 S1_V02N0001 arc: H00R0000 N1_V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0303 arc: V00B0100 S1_V02N0301 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0701 N1_V02S0701 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0303 V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: A1 S1_V02N0501 arc: A2 V02N0501 arc: A3 V00T0000 arc: A5 V02N0301 arc: A6 N1_V01N0101 arc: A7 H02E0501 arc: B1 H02E0101 arc: B2 S1_V02N0101 arc: B3 H00R0000 arc: B5 H00L0000 arc: B6 N1_V02S0501 arc: B7 H02E0101 arc: C1 S1_V02N0601 arc: C2 H02W0601 arc: C3 H00R0100 arc: C5 E1_H02W0401 arc: C6 N1_V02S0201 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D2 H02E0001 arc: D3 V00B0100 arc: D5 W1_H02E0001 arc: D6 V02N0601 arc: D7 H02W0001 arc: E1_H01E0101 F5 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: MUXCLK1 CLK0 arc: N1_V01N0101 Q2 arc: S1_V02S0401 F6 arc: V00T0000 Q2 arc: V01S0000 F1 arc: V01S0100 F7 arc: W1_H02W0201 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111111110000000 word: SLICEB.K1.INIT 0000000011001010 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 1010100010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R26C23:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02E0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0101 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A4 H02W0501 arc: A7 S1_V02N0101 arc: B1 V00T0000 arc: B4 V00B0100 arc: B6 E1_H02W0301 arc: B7 H01E0101 arc: C0 H02E0401 arc: C1 H02W0601 arc: C4 E1_H02W0601 arc: C6 W1_H02E0401 arc: C7 V02N0201 arc: CE0 H00L0000 arc: CE1 H00L0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 N1_V01S0000 arc: D4 V02N0401 arc: D6 H00R0100 arc: D7 H01W0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: E3_H06E0103 Q1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M2 V00B0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N3_V06N0003 F0 arc: N3_V06N0103 F1 arc: S3_V06S0203 Q4 arc: V00T0000 F0 arc: V01S0000 F7 arc: V01S0100 F1 arc: W1_H02W0401 Q4 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000111111 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 1111111110001111 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000001111 word: SLICEA.K1.INIT 0011000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R26C24:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0203 H01E0001 arc: H00L0000 W1_H02E0201 arc: H00R0100 V02S0701 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0001 arc: V00T0000 H02W0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V06S0203 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A6 V02N0101 arc: A7 V00T0100 arc: B3 V02N0301 arc: B6 H02E0301 arc: B7 N1_V01S0000 arc: C3 V02N0401 arc: C6 V02N0001 arc: C7 F6 arc: CE0 H00L0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D3 E1_H02W0201 arc: D6 V02N0601 arc: D7 H02W0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: N1_V02N0401 F6 arc: N3_V06N0203 Q4 arc: V01S0000 F1 arc: V01S0100 Q4 arc: W1_H02W0101 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0010000000000000 word: SLICED.K1.INIT 1100110010000000 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111111111000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R26C25:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 H01E0001 arc: H00L0000 S1_V02N0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 H06W0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0203 E1_H02W0701 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A1 H02E0701 arc: A4 S1_V02N0101 arc: A5 W1_H02E0701 arc: A7 H02W0501 arc: B1 V00B0000 arc: B4 V00B0100 arc: B5 E1_H02W0101 arc: B7 V01S0000 arc: C1 H00L0000 arc: C4 V02N0201 arc: C5 V00T0000 arc: C7 V02S0201 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D4 H02W0001 arc: D5 H00R0100 arc: D7 V02N0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M2 H02W0601 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0201 F0 arc: V01S0000 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R26C26:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 H01E0101 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 V06N0303 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 N1_V02S0301 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 S1_V02N0501 arc: A1 H00L0000 arc: A2 V02S0701 arc: A5 S1_V02N0101 arc: B0 N1_V02S0301 arc: B1 V02S0101 arc: B2 V02S0301 arc: B3 V02N0101 arc: B4 H00R0000 arc: B5 V01S0000 arc: B6 V00B0000 arc: C0 V02S0601 arc: C1 W1_H02E0401 arc: C2 E1_H02W0601 arc: C3 V02S0401 arc: C4 V00T0000 arc: C5 S1_V02N0001 arc: C6 V02S0001 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 S1_V02N0201 arc: D2 V00B0100 arc: D3 W1_H02E0201 arc: D4 V01N0001 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q3 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0100 F3 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q3 arc: N3_V06N0103 F2 arc: N3_V06N0303 Q6 arc: V00B0000 Q6 arc: V01S0000 F4 arc: V01S0100 F1 word: SLICEA.K0.INIT 1111111110000000 word: SLICEA.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 1100000000000000 word: SLICEC.K1.INIT 0001001100000000 word: SLICEB.K0.INIT 0000010000001100 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R26C27:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 W1_H02E0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 H02E0001 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 W1_H02E0701 arc: V00T0100 E1_H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0203 S3_V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A3 H00L0100 arc: A4 V02N0101 arc: A5 W1_H02E0501 arc: B0 H01W0100 arc: B3 H00R0100 arc: B4 V02S0701 arc: B5 V02S0701 arc: C0 H00L0000 arc: C3 E1_H01W0000 arc: C4 H02W0401 arc: C5 V00T0100 arc: C7 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0201 arc: D3 E1_H02W0201 arc: D4 V02S0401 arc: D5 N1_V02S0401 arc: D7 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F4 arc: E1_H02E0201 F0 arc: E1_H02E0301 Q3 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F7 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F3 arc: N1_V02N0201 F0 arc: N1_V02N0501 F5 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q5 arc: S3_V06S0203 Q4 arc: W1_H02W0701 F5 arc: W3_H06W0003 Q3 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1011100010111011 word: SLICEC.K0.INIT 1011101100001011 word: SLICEC.K1.INIT 1011101100001011 word: SLICEA.K0.INIT 1111111111001111 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R26C28:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 V06N0203 arc: H00L0000 V02S0201 arc: H00R0000 E1_H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0003 V06N0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 V06S0303 arc: W3_H06W0203 E3_H06W0103 arc: A4 H02W0501 arc: A5 W1_H02E0501 arc: A7 H00L0000 arc: B3 V02S0101 arc: B4 V02N0501 arc: B5 H02E0101 arc: B7 V01S0000 arc: C3 V02N0401 arc: C4 V00T0000 arc: C5 V02S0001 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 E1_H02W0001 arc: D4 V00B0000 arc: D5 V02N0601 arc: D7 V01N0001 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: M0 H01E0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: S1_V02S0101 Q3 arc: S3_V06S0003 F3 arc: V00B0100 F5 arc: V01S0000 F4 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 0000000000010000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011001100110111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R26C29:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 V02N0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02S0601 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: A5 V02N0101 arc: B5 H00L0000 arc: C5 V00B0100 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D5 E1_H02W0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0100 F3 arc: LSR0 H02W0301 arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H00R0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010101010101 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R26C2:PLC2 arc: E1_H02E0401 V06S0203 arc: H00R0000 S1_V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0501 E1_H02W0501 arc: N3_V06N0003 S3_V06N0003 arc: V00B0000 V02S0001 arc: V00T0000 V02S0601 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: H01W0000 Q4 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0001 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R26C30:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V02N0601 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 N1_V02S0701 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: W3_H06W0003 V06S0003 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0203 E3_H06W0103 arc: A3 V00B0000 arc: A7 V02N0101 arc: B2 F3 arc: B3 E1_H01W0100 arc: B7 V00T0000 arc: C2 N1_V01N0001 arc: C3 V02N0601 arc: C5 H02W0401 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 H00R0000 arc: D5 V02N0601 arc: D7 H00L0100 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q0 arc: V01S0100 F7 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000011 word: SLICEB.K1.INIT 0000100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R26C31:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 W1_H02E0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 V02N0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A1 H00L0100 arc: A2 V02N0501 arc: A5 H02W0501 arc: A6 V02N0301 arc: B0 V00B0000 arc: B1 H01W0100 arc: B2 H00R0100 arc: B5 V01S0000 arc: B6 F1 arc: C0 V02N0601 arc: C1 H02E0601 arc: C2 V02N0401 arc: C4 N1_V02S0001 arc: C5 V01N0101 arc: C6 E1_H01E0101 arc: D0 V00B0100 arc: D1 H00R0000 arc: D2 V02N0001 arc: D4 N1_V02S0601 arc: D5 V02N0601 arc: D6 H02E0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0100 F5 arc: H01W0100 F4 arc: M2 V00T0000 arc: M6 V00T0100 arc: N1_V01N0001 F4 arc: N1_V01N0101 F4 arc: V01S0000 F4 arc: W1_H02W0001 F2 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 0000000000000010 word: SLICEA.K1.INIT 0000100000000000 word: SLICED.K0.INIT 0000000100000011 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R26C32:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0401 N1_V01S0000 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 S1_V02N0001 arc: H00L0100 H02E0301 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A1 S1_V02N0701 arc: A3 V02N0701 arc: A4 H02E0501 arc: A5 E1_H02W0701 arc: A7 H02W0701 arc: B0 H02E0301 arc: B1 W1_H02E0101 arc: B2 H00R0100 arc: B3 H02E0301 arc: B4 V02S0701 arc: B5 W1_H02E0101 arc: B6 H02W0101 arc: B7 H02E0301 arc: C0 N1_V01N0001 arc: C1 H00L0100 arc: C2 S1_V02N0401 arc: C3 H02E0601 arc: C4 E1_H01E0101 arc: C5 V00T0100 arc: C6 V00T0000 arc: C7 H02E0601 arc: D0 V00B0100 arc: D1 H00R0000 arc: D2 H02W0201 arc: D3 H02E0201 arc: D4 V02N0401 arc: D5 V02N0601 arc: D6 H02W0201 arc: D7 H02E0001 arc: E1_H01E0101 F3 arc: E1_H02E0201 F2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F5 arc: V01S0000 F7 word: SLICEC.K0.INIT 0000000100000000 word: SLICEC.K1.INIT 0000100000000000 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 0000000000000010 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000000000010 word: SLICEA.K0.INIT 0000000000000111 word: SLICEA.K1.INIT 0000100000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R26C33:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0301 arc: H00R0100 V02N0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0001 arc: V01S0000 N3_V06S0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0701 E1_H01W0100 arc: E1_H02E0601 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A1 H00L0000 arc: A5 H02W0501 arc: A7 N1_V02S0301 arc: B0 V00B0000 arc: B1 W1_H02E0301 arc: B2 H02W0301 arc: B4 V00B0100 arc: B5 W1_H02E0301 arc: B7 V02N0701 arc: C0 N1_V02S0601 arc: C1 W1_H02E0601 arc: C2 S1_V02N0401 arc: C4 N1_V02S0201 arc: C5 W1_H02E0601 arc: C7 V02S0201 arc: D0 E1_H02W0201 arc: D1 W1_H02E0001 arc: D2 V02S0001 arc: D3 S1_V02N0001 arc: D4 E1_H02W0201 arc: D5 H00L0100 arc: D7 H00R0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M2 V00T0000 arc: M6 N1_V01N0101 arc: N1_V01N0001 F1 arc: N3_V06N0103 F2 arc: N3_V06N0203 F4 arc: W1_H02W0501 F5 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000000000000010 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1111000000110011 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R26C34:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V06S0303 arc: H00L0000 E1_H02W0001 arc: H00R0000 S1_V02N0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02E0501 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A5 V00T0000 arc: B0 V02N0301 arc: B5 H00L0000 arc: B6 V02S0701 arc: C0 V02N0601 arc: C1 V02N0601 arc: C5 H02W0401 arc: C6 H02E0601 arc: CE1 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D5 V02S0601 arc: D6 V00B0000 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: H01W0100 Q2 arc: M2 V00T0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0401 Q6 arc: N1_V02N0701 F5 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0011000011110000 word: SLICEA.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0000110000111111 word: SLICED.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R26C35:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V06S0303 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H02W0301 arc: H01W0100 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 V02N0701 arc: A5 S1_V02N0101 arc: B1 E1_H02W0101 arc: B2 H00L0000 arc: B3 H00L0000 arc: B5 H02E0301 arc: B6 V02N0501 arc: B7 V02N0501 arc: C0 E1_H02W0601 arc: C1 N1_V01N0001 arc: C2 S1_V02N0401 arc: C3 N1_V02S0601 arc: C5 E1_H01E0101 arc: C6 V02N0201 arc: C7 V00T0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 W1_H02E0201 arc: D2 H02W0201 arc: D3 V00B0100 arc: D4 H01W0000 arc: D5 H02E0001 arc: D6 H02W0201 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F1 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F0 arc: N1_V02N0001 F0 arc: N3_V06N0003 F0 arc: S3_V06S0003 F0 arc: V01S0000 F0 arc: V01S0100 F2 arc: W1_H02W0001 F0 arc: W1_H02W0101 F3 arc: W1_H02W0501 F7 arc: W3_H06W0003 F0 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0011001100001111 word: SLICEB.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1100110010100000 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111110011111010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 .tile R26C36:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H06E0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 E3_H06W0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0303 N3_V06S0303 arc: B1 H00R0100 arc: B2 S1_V02N0301 arc: B6 H02E0101 arc: C1 H00L0100 arc: C2 H00L0000 arc: C6 H01E0001 arc: CE0 S1_V02N0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D2 N1_V02S0001 arc: D3 V00T0100 arc: D6 W1_H02E0001 arc: D7 S1_V02N0401 arc: E1_H02E0201 F2 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: M2 H02E0601 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q4 arc: N3_V06N0203 Q4 arc: V01S0100 Q4 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000011001111 word: SLICED.K0.INIT 1111000000110011 word: SLICED.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111000000110011 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R26C37:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V01N0101 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A3 V00T0000 arc: A7 N1_V02S0301 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V02N0501 arc: B7 N1_V02S0701 arc: C3 H02E0601 arc: C4 E1_H02W0401 arc: C5 H02W0601 arc: C7 V02S0201 arc: CE0 H00L0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D4 H02E0201 arc: D5 V00B0000 arc: D7 W1_H02E0001 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V02N0301 Q1 arc: N3_V06N0303 F6 arc: S3_V06S0303 F5 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000000011111100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R26C38:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02W0201 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 N1_V01S0000 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0103 V01N0101 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 W1_H02E0701 arc: B1 H00R0100 arc: B2 W1_H02E0301 arc: B4 V02N0501 arc: B5 V02N0501 arc: C1 N1_V02S0601 arc: C2 V02N0601 arc: C4 H02W0401 arc: C5 V02S0201 arc: CE2 H00L0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D2 W1_H02E0001 arc: D3 V00T0100 arc: D4 F2 arc: D5 V02N0401 arc: E1_H01E0101 F5 arc: E1_H02E0601 Q6 arc: E3_H06E0103 F1 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M2 V00B0000 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V01S0100 Q6 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0011011100111111 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000000011111100 word: SLICEB.K0.INIT 1111000000110011 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R26C39:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 E1_H02W0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02W0401 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: N1_V02N0501 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H02W0701 arc: A1 H02E0701 arc: A3 V00B0000 arc: A4 N1_V02S0301 arc: A5 H02W0701 arc: B1 V02S0301 arc: B3 V02N0101 arc: B4 V02N0701 arc: B5 E1_H02W0301 arc: B6 W1_H02E0301 arc: C1 H02W0601 arc: C2 H00L0000 arc: C3 W1_H02E0601 arc: C4 E1_H01E0101 arc: C5 E1_H02W0401 arc: C6 V00T0100 arc: C7 W1_H02E0601 arc: D1 H00R0000 arc: D2 H02W0201 arc: D3 V01S0100 arc: D4 H01W0000 arc: D5 H00L0100 arc: D6 H00R0100 arc: D7 W1_H02E0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F0 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: M0 V00T0000 arc: M6 H02W0401 arc: V01S0000 F2 arc: V01S0100 F6 arc: W1_H02W0601 F4 word: SLICEC.K0.INIT 0011001100110010 word: SLICEC.K1.INIT 1100010010000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1000000011111111 word: SLICED.K0.INIT 0000110000111111 word: SLICED.K1.INIT 1111000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0110101110110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R26C3:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0401 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 H01E0101 arc: D2 W1_H02E0001 arc: D3 E1_H02W0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0401 Q4 arc: N3_V06N0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R26C40:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 V02N0001 arc: H00L0100 H02E0101 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 S1_V02N0001 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02N0701 arc: E1_H02E0001 W3_H06E0003 arc: S1_V02S0201 W3_H06E0103 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0003 E3_H06W0003 arc: A0 N1_V02S0501 arc: A1 H00R0000 arc: B0 V00B0000 arc: B1 W1_H02E0301 arc: B2 V02N0101 arc: B4 N1_V02S0701 arc: B7 E1_H02W0301 arc: C0 S1_V02N0401 arc: C1 H00L0000 arc: C2 H00L0100 arc: C3 H02E0601 arc: C4 E1_H01E0101 arc: C5 H02W0601 arc: C6 S1_V02N0201 arc: C7 V00T0100 arc: D0 V02N0001 arc: D1 V02S0001 arc: D2 N1_V02S0201 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 W1_H02E0001 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H01E0001 F5 arc: E1_H01E0101 F5 arc: E3_H06E0103 F2 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: H01W0100 F0 arc: M2 V00T0000 arc: M6 E1_H02W0401 arc: N1_V01N0001 F6 arc: N3_V06N0103 F2 arc: S1_V02S0501 F5 arc: V01S0000 F2 arc: V01S0100 F1 arc: W3_H06W0203 F4 word: SLICEC.K0.INIT 0000001100001111 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1110001010101010 word: SLICEA.K1.INIT 1111111110000000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 0000000000110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 .tile R26C41:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0303 V01N0101 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0501 arc: A5 E1_H02W0701 arc: B1 V00B0000 arc: B2 V02S0301 arc: B3 V02S0301 arc: B5 N1_V02S0701 arc: B6 V00B0100 arc: C0 N1_V02S0401 arc: C1 H00L0000 arc: C2 V02N0601 arc: C3 H02E0401 arc: C5 S1_V02N0201 arc: C6 V00T0100 arc: C7 V02N0001 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 F0 arc: D2 V02S0001 arc: D3 H00R0000 arc: D5 H02E0001 arc: D6 W1_H02E0201 arc: D7 H00L0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F6 arc: E1_H02E0001 Q0 arc: E1_H02E0701 F5 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: H01W0100 F6 arc: M2 V00T0000 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0201 F2 arc: N3_V06N0003 F0 arc: N3_V06N0103 F1 arc: S3_V06S0003 Q0 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: V01S0100 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000010101010 word: SLICEA.K0.INIT 1111000011111111 word: SLICEA.K1.INIT 0000001001010111 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R26C42:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 H01E0101 arc: H00L0000 H02E0001 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: A2 V00B0000 arc: A3 V02N0501 arc: B1 V02N0101 arc: B2 H00R0000 arc: B3 H00L0000 arc: B4 V02S0501 arc: B5 V02S0501 arc: B6 V02S0501 arc: B7 V02S0501 arc: C0 N1_V01N0001 arc: C1 V02S0601 arc: C2 H02W0401 arc: C3 H00L0100 arc: C4 E1_H01E0101 arc: C5 W1_H02E0601 arc: C6 V00T0100 arc: C7 V00T0100 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02E0201 arc: D2 V00B0100 arc: D3 F0 arc: D4 H02W0201 arc: D5 H02W0201 arc: D6 H02W0001 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: M0 H01E0001 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: N1_V02N0601 F6 arc: S1_V02S0001 Q2 arc: S3_V06S0003 F3 arc: V01S0000 F3 arc: V01S0100 Q2 arc: W1_H02W0601 F4 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 1100110011001110 word: SLICEB.K1.INIT 0001000011111111 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 0000111111111111 word: SLICEA.K1.INIT 0000110000111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R26C43:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 V02N0001 arc: H00L0100 N1_V02S0101 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H02E0401 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H06W0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 W1_H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 N3_V06S0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: A1 H00L0000 arc: A2 H02W0501 arc: A3 H02E0701 arc: A4 V02S0101 arc: A5 V00T0100 arc: A6 H02E0701 arc: A7 H00R0000 arc: B0 W1_H02E0101 arc: B1 V00B0000 arc: B2 H00R0100 arc: B3 V02S0301 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00T0000 arc: B7 S1_V02N0701 arc: C0 N1_V01N0001 arc: C1 S1_V02N0401 arc: C2 V02N0401 arc: C3 H00L0000 arc: C4 V02S0001 arc: C5 H02W0601 arc: C6 E1_H02W0401 arc: C7 H02W0401 arc: CE1 H02E0101 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 H02W0001 arc: D2 H02E0001 arc: D3 S1_V02N0001 arc: D4 H02W0201 arc: D5 V02S0401 arc: D6 N1_V02S0401 arc: D7 V02N0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q2 arc: E1_H02E0701 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 F0 arc: H01W0100 Q4 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q2 arc: N1_V02N0601 F6 arc: N3_V06N0003 F3 arc: N3_V06N0303 F6 arc: S1_V02S0101 F3 arc: S1_V02S0201 Q2 arc: S1_V02S0301 F3 arc: S3_V06S0203 Q4 arc: V00T0000 Q2 arc: V01S0000 Q2 arc: V01S0100 Q4 arc: W3_H06W0003 F3 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000001011111111 word: SLICEC.K1.INIT 0001010111111111 word: SLICEB.K0.INIT 1000111110000000 word: SLICEB.K1.INIT 0101000101000000 word: SLICED.K0.INIT 1001000110000000 word: SLICED.K1.INIT 0000001100000101 word: SLICEA.K0.INIT 0000000011110011 word: SLICEA.K1.INIT 1001001000101111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R26C44:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 H06W0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 S1_V02N0301 arc: A5 V02S0101 arc: A6 W1_H02E0701 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H02W0101 arc: B3 H02W0101 arc: B4 H00R0000 arc: B5 H02W0301 arc: B6 H01E0101 arc: B7 V00B0000 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 V00T0100 arc: C5 H02E0401 arc: C6 V02S0201 arc: C7 H02E0601 arc: CLK1 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H02W0001 arc: D5 S1_V02N0401 arc: D6 V02N0401 arc: D7 H00R0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F6 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR1 V00T0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N3_V06N0303 F6 arc: S1_V02S0201 Q0 arc: V00B0000 F6 arc: V01S0000 Q3 arc: V01S0100 Q1 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0101010000010000 word: SLICED.K1.INIT 0011000000111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C45:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02S0601 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 H01E0101 arc: H00L0000 N1_V02S0201 arc: H00L0100 S1_V02N0301 arc: H00R0100 V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H01E0001 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V06S0303 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 N1_V02S0701 arc: A3 N1_V02S0701 arc: A4 V02S0301 arc: A5 V00T0000 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 V02S0701 arc: B5 V02N0501 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: CE3 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 V00B0000 arc: D5 H00L0100 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 H02E0301 arc: M6 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: N1_V01N0101 Q3 arc: S1_V02S0201 Q2 arc: S3_V06S0003 Q0 arc: V01S0000 Q1 arc: W1_H02W0401 Q6 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R26C46:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 V02N0101 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02W0601 arc: V00B0100 V02S0101 arc: V00T0100 V02N0701 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: E1_H02E0201 W3_H06E0103 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: A0 V02N0501 arc: B0 H02E0101 arc: B1 E1_H02W0301 arc: B3 N1_V02S0301 arc: B4 N1_V02S0501 arc: B6 V00B0000 arc: C0 V02S0601 arc: C1 H00L0000 arc: C3 V02S0401 arc: C4 H02W0601 arc: C6 N1_V02S0201 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 E1_H02W0001 arc: D3 H00R0000 arc: D4 E1_H01W0100 arc: D5 W1_H02E0001 arc: D6 N1_V02S0401 arc: D7 W1_H02E0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: E3_H06E0003 F0 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H01W0000 F0 arc: H01W0100 Q4 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N3_V06N0003 F0 arc: N3_V06N0203 Q4 arc: S1_V02S0001 F0 arc: V01S0000 Q6 arc: W1_H02W0001 F0 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 0101010000010000 word: SLICEA.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 1111111111000000 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R26C47:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0303 H01E0101 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 V01N0001 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0301 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0701 S3_V06N0203 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A0 H02E0701 arc: A1 H00L0000 arc: A2 H02E0501 arc: A7 H00R0000 arc: B0 E1_H02W0301 arc: B1 H00R0100 arc: B2 W1_H02E0101 arc: B3 V02S0101 arc: B6 V02S0501 arc: B7 N1_V02S0501 arc: C0 H02W0401 arc: C1 V02N0601 arc: C2 V02N0401 arc: C3 H00R0100 arc: C4 V02N0001 arc: C5 S1_V02N0201 arc: C6 H02E0601 arc: C7 S1_V02N0001 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H02E0201 arc: D2 N1_V02S0201 arc: D3 V00B0100 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: D6 E1_H02W0001 arc: D7 S1_V02N0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F3 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0100 F7 arc: LSR0 H02E0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F2 arc: N3_V06N0103 F2 arc: V00B0000 F4 arc: V01S0000 F4 arc: V01S0100 F0 arc: W1_H02W0601 F6 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 0000101000001100 word: SLICEA.K1.INIT 0100011100011101 word: SLICEB.K0.INIT 1001000110000000 word: SLICEB.K1.INIT 0011000000111111 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 0010001100000001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R26C48:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 H01E0101 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A3 H00L0100 arc: B3 W1_H02E0101 arc: B4 V01S0000 arc: B6 V01S0000 arc: C3 H00L0000 arc: C4 V02S0201 arc: C6 H02E0601 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 V00T0100 arc: D4 H00R0100 arc: D5 H01W0000 arc: D6 W1_H02E0001 arc: D7 H01W0000 arc: E1_H01E0101 F6 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: H01W0100 F1 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0101 F1 arc: V01S0000 Q1 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0011001100001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1100000011001000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R26C49:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02N0501 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V01N0101 arc: W1_H02W0601 E1_H02W0601 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: B0 H00R0100 arc: B2 H00R0100 arc: B4 H02W0301 arc: B5 V01S0000 arc: B6 V02N0701 arc: C0 W1_H02E0401 arc: C2 H02W0601 arc: C4 V02N0001 arc: C5 E1_H01E0101 arc: C6 H02E0601 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 E1_H02W0201 arc: D2 H01E0101 arc: D3 E1_H02W0201 arc: D4 V02N0601 arc: D5 V02S0401 arc: D6 E1_H02W0001 arc: D7 S1_V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0601 F6 arc: E3_H06E0103 Q2 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F4 arc: M0 V00T0100 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: N3_V06N0203 F4 arc: V01S0000 F4 arc: V01S0100 F7 arc: W1_H02W0701 F7 arc: W3_H06W0003 Q0 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000001111001111 word: SLICED.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0000000000001100 word: SLICEC.K1.INIT 0000001111110011 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1100000011001111 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R26C4:PLC2 arc: H00L0000 E1_H02W0001 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 V02S0701 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R26C50:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00R0100 H02E0501 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N1_V02S0201 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0001 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: A4 E1_H02W0701 arc: A7 V02S0101 arc: B1 V00T0000 arc: B4 E1_H02W0101 arc: B5 H00L0000 arc: B7 H02W0301 arc: C0 S1_V02N0601 arc: C1 V02S0601 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 V00B0100 arc: C5 V02S0201 arc: C6 V02N0001 arc: C7 H01E0001 arc: D0 H00R0000 arc: D1 V02N0201 arc: D2 V00T0100 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0101 F1 arc: E1_H02E0401 F6 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 F6 arc: H01W0100 F4 arc: N1_V01N0001 F2 arc: N1_V01N0101 F7 arc: N1_V02N0201 F0 arc: N3_V06N0003 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: V00B0100 F5 arc: V00T0000 F0 arc: V01S0100 F3 arc: W1_H02W0001 F0 arc: W3_H06W0003 F3 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000101000011011 word: SLICEC.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000001111110011 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0111000001111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R26C51:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0303 H01E0101 arc: H00R0000 H02E0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 H01E0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: A1 H00R0000 arc: B0 F1 arc: B1 V00B0000 arc: C0 E1_H01W0000 arc: C1 V02S0601 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 arc: V01S0000 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 0111000001111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R26C52:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 H01E0001 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H02W0501 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 H06E0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 H02E0401 arc: V00B0100 V02S0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0101 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: B2 H00L0000 arc: B3 H00L0000 arc: B4 H00R0000 arc: B5 H02W0101 arc: B6 V00B0000 arc: B7 V00T0000 arc: C2 H00L0100 arc: C3 H02W0601 arc: C4 V00T0100 arc: C5 V02S0201 arc: C6 V00T0100 arc: C7 E1_H02W0601 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D2 E1_H02W0001 arc: D3 V02N0001 arc: D4 E1_H02W0001 arc: D5 V02N0401 arc: D6 H00R0100 arc: D7 V02N0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: E1_H02E0501 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F5 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F3 arc: N1_V02N0401 F4 arc: N1_V02N0601 F6 arc: S1_V02S0201 Q0 arc: V01S0000 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111001111000000 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111001111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R26C53:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02N0701 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 H06E0303 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02S0701 arc: E1_H02E0501 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: S1_V02S0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: A7 H00L0000 arc: B0 E1_H02W0101 arc: B2 H00R0000 arc: B3 H02E0101 arc: B4 V02N0701 arc: B6 V00B0100 arc: B7 V02N0701 arc: C0 V02S0601 arc: C2 H00L0100 arc: C3 E1_H02W0601 arc: C4 V02S0201 arc: C6 H01E0001 arc: C7 F6 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 F2 arc: D2 H01E0101 arc: D3 H02E0201 arc: D4 V02N0601 arc: D5 H02W0201 arc: D6 H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: M0 V00T0000 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F7 arc: N1_V02N0601 Q4 arc: S1_V02S0401 F6 arc: V01S0100 F2 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111110000110000 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 0010000000110001 word: SLICEC.K0.INIT 0000001111001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111001111000000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R26C54:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 V02N0501 arc: H00L0000 V02N0201 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 V01N0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0601 V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: A3 V02S0501 arc: A4 V00T0000 arc: B0 H02E0101 arc: B1 H02W0101 arc: B2 W1_H02E0101 arc: B3 E1_H02W0301 arc: B4 H00L0000 arc: B5 H02W0101 arc: B6 W1_H02E0101 arc: B7 W1_H02E0101 arc: C0 V02N0401 arc: C1 W1_H02E0601 arc: C2 N1_V01N0001 arc: C3 E1_H02W0601 arc: C4 V00B0100 arc: C5 H01E0001 arc: C6 V00T0100 arc: C7 V00T0100 arc: D0 E1_H02W0001 arc: D1 S1_V02N0001 arc: D2 V02S0201 arc: D3 H00R0000 arc: D4 S1_V02N0401 arc: D5 H02W0201 arc: D6 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 F7 arc: E1_H02E0001 F2 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: N1_V01N0001 F3 arc: N1_V02N0201 F0 arc: N1_V02N0401 F6 arc: V00B0100 F5 arc: V01S0000 F1 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111001111000000 word: SLICEC.K0.INIT 0000001000010011 word: SLICEC.K1.INIT 1111110000110000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0111000001111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R26C55:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: A0 H00L0000 arc: B0 H00R0100 arc: B1 V00B0000 arc: B2 H00R0000 arc: B3 H02E0301 arc: B4 H00R0000 arc: B5 E1_H02W0101 arc: B6 V00T0000 arc: B7 V00B0000 arc: C0 F4 arc: C1 E1_H02W0401 arc: C2 N1_V01N0001 arc: C3 H02W0401 arc: C4 V01N0101 arc: C5 F4 arc: C6 W1_H02E0601 arc: C7 F6 arc: D0 V01S0100 arc: D1 S1_V02N0001 arc: D2 V00T0100 arc: D3 V00B0100 arc: D4 H02E0001 arc: D5 H00L0100 arc: D6 V02N0601 arc: D7 H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F1 arc: E1_H02E0201 F2 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: N1_V01N0001 F3 arc: N1_V01N0101 F7 arc: N1_V02N0601 F4 arc: N1_V02N0701 F7 arc: N3_V06N0303 F5 arc: V01S0000 F0 arc: V01S0100 F1 word: SLICEA.K0.INIT 0000100001001100 word: SLICEA.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1111110000110000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111001111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R26C56:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02W0301 arc: H00R0000 H02W0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: B0 V02N0101 arc: B1 V00T0000 arc: B2 H02W0101 arc: B4 V02N0701 arc: B6 W1_H02E0301 arc: B7 H02E0101 arc: C0 H00L0000 arc: C1 H02E0601 arc: C2 V02N0601 arc: C4 V02S0001 arc: C6 E1_H02W0401 arc: C7 F6 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02E0001 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 H02W0201 arc: D6 W1_H02E0201 arc: D7 E1_H02W0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q4 arc: M2 V00T0100 arc: M4 H02E0401 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F7 arc: N1_V02N0201 F0 arc: V01S0100 F1 word: SLICED.K0.INIT 1111110000110000 word: SLICED.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 0011000000111111 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R26C57:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0203 H06E0203 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V01N0001 arc: E1_H02E0301 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: B0 V00T0000 arc: B1 V02S0301 arc: B2 H00R0100 arc: B4 W1_H02E0101 arc: B5 H02E0101 arc: B6 V00B0100 arc: B7 V02N0701 arc: C0 N1_V01N0001 arc: C1 H00L0000 arc: C2 F6 arc: C4 H02E0601 arc: C5 H01E0001 arc: C6 F4 arc: C7 F6 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H00R0000 arc: D2 S1_V02N0001 arc: D3 H02W0201 arc: D4 H01W0000 arc: D5 V02S0601 arc: D6 W1_H02E0201 arc: D7 E1_H01W0100 arc: E1_H01E0001 F5 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: M2 E1_H02W0601 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F1 arc: N1_V02N0201 F0 arc: N1_V02N0701 F7 arc: V01S0000 F4 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1111110000110000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 0000110000111111 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R26C58:PLC2 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02N0401 arc: V00T0100 H02E0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 H01E0101 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: A1 W1_H02E0501 arc: B0 V00T0000 arc: B1 H02E0301 arc: B3 H00R0000 arc: B4 H00L0000 arc: B5 H02E0301 arc: B7 V00B0100 arc: C0 V02N0601 arc: C1 V02N0601 arc: C3 V02N0601 arc: C4 V02N0201 arc: C5 F4 arc: C7 S1_V02N0001 arc: D0 V02N0001 arc: D1 V02S0201 arc: D3 V01S0100 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 H02E0201 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: H01W0100 F1 arc: M6 V00T0100 arc: N1_V01N0001 F5 arc: N1_V02N0401 F4 arc: S1_V02S0701 F5 arc: V01S0000 F1 arc: V01S0100 F6 arc: W1_H02W0201 F0 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011110011 word: SLICEA.K0.INIT 1100000011110011 word: SLICEA.K1.INIT 0001111100001110 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 0011111100001100 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1111110000110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R26C59:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V06S0303 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0001 N3_V06S0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0601 V02N0601 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 .tile R26C5:PLC2 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02W0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 N1_V02S0001 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 E1_H02W0101 arc: D0 H00R0000 arc: D1 E1_H02W0201 arc: D2 H02W0201 arc: D3 V02N0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00B0000 arc: M3 H00R0100 arc: M4 V00B0000 arc: M5 H00L0100 arc: M6 V00B0000 arc: N1_V02N0101 F3 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R26C60:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: W1_H02W0401 V02N0401 arc: W3_H06W0203 E1_H01W0000 .tile R26C61:PLC2 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0701 H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0203 W3_H06E0103 .tile R26C62:PLC2 arc: E1_H02E0101 V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: H01W0000 W3_H06E0103 .tile R26C63:PLC2 arc: N1_V02N0101 H02E0101 arc: S3_V06S0103 N3_V06S0103 .tile R26C64:PLC2 arc: E3_H06E0303 V06S0303 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: E3_H06E0003 W3_H06E0303 .tile R26C65:PLC2 arc: E1_H02E0701 V06S0203 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0301 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 .tile R26C66:PLC2 arc: N1_V02N0701 H02E0701 arc: S3_V06S0103 N3_V06S0103 .tile R26C67:PLC2 arc: N1_V02N0001 H06E0003 arc: N1_V02N0601 H06E0303 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 .tile R26C68:PLC2 arc: N1_V02N0501 H01E0101 .tile R26C69:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0701 V06S0203 .tile R26C6:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V06S0203 arc: H00L0000 S1_V02N0201 arc: H00R0000 S1_V02N0401 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0601 E1_H02W0601 arc: V00B0000 E1_H02W0601 arc: V00T0000 V02N0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: H01W0000 Q6 arc: M0 V00T0000 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 Q0 arc: W1_H02W0201 Q2 arc: W1_H02W0601 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R26C7:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 V02N0001 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 N3_V06S0003 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V06S0203 arc: A6 H02E0501 arc: A7 H02W0501 arc: B6 E1_H02W0101 arc: B7 V00B0000 arc: C6 V02S0201 arc: C7 E1_H01E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V00T0100 arc: D2 H02W0001 arc: D3 H02W0201 arc: D6 V01N0001 arc: D7 V02N0601 arc: E1_H01E0001 Q7 arc: E1_H02E0101 F1 arc: E3_H06E0203 Q7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR0 V00B0100 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V02N0301 F1 arc: N1_V02N0701 Q7 arc: N3_V06N0303 F6 arc: S3_V06S0203 Q7 word: SLICED.K0.INIT 0000001000110010 word: SLICED.K1.INIT 1011101100001011 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R26C8:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02E0101 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E3_H06W0103 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 V02N0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V01N0001 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: W3_H06W0103 S3_V06N0103 arc: C3 H00L0100 arc: C7 H01E0001 arc: D1 V02N0001 arc: D2 H02E0001 arc: D3 V02N0001 arc: D5 W1_H02E0001 arc: D6 V00B0000 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00R0100 arc: M6 V00T0100 arc: N1_V02N0301 F3 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0000000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R26C9:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 S1_V02N0401 arc: H00R0000 W1_H02E0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0601 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 H02W0301 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 E1_H02W0401 arc: W3_H06W0103 E3_H06W0003 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: H01W0000 Q6 arc: H01W0100 Q4 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 Q0 arc: W1_H02W0201 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R27C10:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: H00R0000 V02S0601 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 N1_V01S0000 arc: V00B0100 V02S0301 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0701 N3_V06S0203 arc: N1_V02N0201 W3_H06E0103 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H02E0001 Q2 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R27C11:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 H02E0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: W1_H02W0301 N3_V06S0003 arc: A0 H02E0501 arc: A1 E1_H01E0001 arc: A2 V02N0701 arc: A3 H01E0001 arc: B0 V00T0000 arc: B1 V00B0000 arc: B2 E1_H02W0301 arc: B3 H00R0000 arc: C0 E1_H02W0601 arc: C1 H02E0401 arc: C2 H00L0000 arc: C3 H00R0100 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 V01S0100 arc: D3 V00T0100 arc: E1_H01E0001 Q6 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 F0 arc: H01W0100 Q4 arc: M4 V00B0100 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: V00B0000 Q4 arc: V00T0100 F1 arc: V01S0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1101000000000000 word: SLICEB.K1.INIT 1001000000000000 word: SLICEA.K0.INIT 1100001101000001 word: SLICEA.K1.INIT 1100010011110101 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C12:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0401 E3_H06W0203 arc: E3_H06E0003 V06S0003 arc: H00R0000 V02N0601 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0601 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V01N0001 arc: A0 H02E0701 arc: A1 E1_H01E0001 arc: B0 W1_H02E0301 arc: B1 V00B0000 arc: C0 H00L0100 arc: C1 W1_H02E0401 arc: CE1 W1_H02E0101 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H00R0000 arc: E1_H01E0001 Q2 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H00L0100 F1 arc: H01W0100 Q6 arc: M2 H02E0601 arc: M4 H02W0401 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0401 Q4 arc: V01S0100 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1001000000000000 word: SLICEA.K1.INIT 1100111101000101 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C13:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0100 H02W0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V01N0001 arc: A1 E1_H01E0001 arc: A2 E1_H02W0501 arc: A3 V02S0701 arc: A7 V00T0100 arc: B1 V02N0101 arc: B2 H02W0301 arc: B3 V02N0101 arc: B7 V00T0000 arc: C1 H00R0100 arc: C2 H00L0100 arc: C3 H00R0100 arc: C7 E1_H01E0101 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D2 V00B0100 arc: D3 V02S0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: M4 E1_H02W0401 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: V01S0000 F2 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 0101001111111111 word: SLICEB.K1.INIT 1010100010101010 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R27C14:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 V02N0001 arc: H00L0100 V02S0101 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E3_H06W0303 arc: A1 E1_H02W0701 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: B1 V00T0000 arc: B2 H00L0000 arc: B3 V02N0101 arc: B6 V00B0000 arc: C1 V02N0401 arc: C2 H02E0601 arc: C3 E1_H02W0601 arc: C6 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V02S0001 arc: D3 E1_H02W0001 arc: D6 H00R0100 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 F3 arc: M6 E1_H02W0401 arc: MUXCLK3 CLK0 arc: V00B0000 Q6 arc: V01S0100 Q6 arc: W1_H02W0001 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0101001111111111 word: SLICEB.K1.INIT 1010100010101010 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R27C15:PLC2 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 N3_V06S0203 arc: A1 V01N0101 arc: B1 V02N0301 arc: B6 H02E0301 arc: C1 H00L0100 arc: C6 V00T0000 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D6 V00B0000 arc: D7 N1_V02S0601 arc: E1_H01E0101 Q4 arc: F1 F1_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q6 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0101 F1 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R27C16:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 E3_H06W0303 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 H01E0101 arc: W3_H06W0103 E3_H06W0003 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: LSR0 V00B0000 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R27C17:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0501 S1_V02N0501 arc: H00R0100 H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 H02W0701 arc: V00T0100 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0401 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R27C18:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02W0201 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: A1 V02S0501 arc: A6 S1_V02N0101 arc: A7 H02E0501 arc: B1 V02N0101 arc: B2 H01W0100 arc: B4 V01S0000 arc: B6 H02W0101 arc: B7 H02W0101 arc: C1 H00R0100 arc: C2 H00L0000 arc: C4 V00T0000 arc: C6 V00B0100 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D2 H00R0000 arc: D3 V02N0001 arc: D4 S1_V02N0601 arc: D5 H02W0001 arc: D6 H02E0001 arc: D7 H02E0001 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 Q2 arc: M0 E1_H02W0601 arc: M2 V00T0100 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: V01S0000 Q4 arc: V01S0100 F6 word: SLICED.K0.INIT 0000001000000000 word: SLICED.K1.INIT 1010100010101010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111011101110011 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R27C19:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02E0001 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02W0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 E1_H02W0701 arc: A1 V02N0701 arc: A5 V00T0100 arc: A6 H00L0000 arc: A7 H02E0701 arc: B1 N1_V02S0101 arc: B5 H00R0000 arc: B6 H01E0101 arc: B7 V00B0100 arc: C1 H00R0100 arc: C5 H02E0601 arc: C6 S1_V02N0001 arc: C7 V00T0000 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D5 H00L0100 arc: D6 V02S0601 arc: D7 W1_H02E0001 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H00R0000 F6 arc: H01W0000 F7 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: M2 V00B0000 arc: M4 H02E0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001000000000 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 1010100010101010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111011101110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R27C20:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02S0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 H02W0501 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A2 H02E0501 arc: A7 W1_H02E0501 arc: B2 H00L0000 arc: B3 H02E0101 arc: B4 H00R0000 arc: B7 H02W0101 arc: C1 H02E0601 arc: C2 S1_V02N0601 arc: C3 V02N0601 arc: C4 E1_H01E0101 arc: C7 V00T0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D2 V00B0100 arc: D3 H02W0001 arc: D4 W1_H02E0201 arc: D5 H00L0100 arc: D7 H02E0001 arc: E1_H01E0101 F1 arc: E3_H06E0203 F4 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: LSR1 H02W0301 arc: M4 H02E0401 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N3_V06N0003 F3 arc: N3_V06N0303 F6 arc: S1_V02S0401 Q4 arc: V00T0000 F2 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 1111111111110011 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R27C21:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 N1_V02S0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 H02W0001 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02N0001 arc: V00B0100 V02S0301 arc: V00T0100 V02S0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A3 H02E0701 arc: A7 H00L0000 arc: B0 V00T0000 arc: B3 H00R0000 arc: B7 H02W0301 arc: C0 V02S0401 arc: C3 H00R0100 arc: C7 E1_H02W0601 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 E1_H02W0001 arc: D3 H02E0201 arc: D7 H02E0001 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M2 N1_V01N0001 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F7 arc: V00T0000 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R27C22:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V06S0303 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0501 arc: A3 V00T0000 arc: A4 W1_H02E0501 arc: A5 W1_H02E0501 arc: B0 H02E0301 arc: B3 H00R0000 arc: B4 S1_V02N0701 arc: B5 V02N0701 arc: C0 H02W0401 arc: C3 N1_V01S0100 arc: C4 E1_H02W0601 arc: C5 W1_H02E0601 arc: CE0 V02N0201 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D3 H02E0201 arc: D4 S1_V02N0401 arc: D5 H00R0100 arc: E1_H01E0001 F5 arc: E1_H01E0101 F0 arc: E1_H02E0401 F4 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M2 V00B0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: V01S0000 Q0 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111011101110011 word: SLICEA.K0.INIT 1111111110001111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R27C23:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 N1_V02S0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 N1_V02S0701 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0501 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0303 V06N0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 H02E0701 arc: A7 H00R0000 arc: B0 V02S0101 arc: B4 H00L0000 arc: B7 H02W0301 arc: C0 H00R0100 arc: C4 V00T0100 arc: C5 V01N0101 arc: C6 V00T0100 arc: C7 V02N0201 arc: D0 V02S0201 arc: D4 H00L0100 arc: D5 E1_H02W0201 arc: D6 V00B0000 arc: D7 H01W0000 arc: E1_H01E0101 F6 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: M0 V00B0100 arc: M1 V01S0100 arc: M2 V00B0100 arc: N1_V01N0001 F5 arc: N1_V01N0101 F4 arc: N3_V06N0103 F1 arc: N3_V06N0303 F6 arc: S3_V06S0303 F6 arc: V01S0100 F7 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1100000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000010011 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R27C24:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0401 arc: V00T0100 V02S0501 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E1_H02W0701 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A3 V02N0701 arc: A4 N1_V01N0101 arc: A5 N1_V02S0301 arc: A7 V02N0301 arc: B1 H02E0101 arc: B3 V02N0101 arc: B4 V01S0000 arc: B5 H02E0101 arc: B7 E1_H02W0101 arc: C0 N1_V01S0100 arc: C1 N1_V01N0001 arc: C3 H00L0000 arc: C4 V00B0100 arc: C5 V02N0201 arc: C6 V01N0101 arc: C7 F6 arc: D0 E1_H02W0201 arc: D1 V02N0201 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 H02E0201 arc: D6 H00R0100 arc: D7 F0 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: E1_H02E0201 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M2 V00T0100 arc: N1_V01N0001 F0 arc: N1_V01N0101 F2 arc: N3_V06N0203 F4 arc: V00B0100 F5 arc: V01S0000 F7 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000001100001111 word: SLICEC.K0.INIT 0100000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000000000000111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R27C25:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 H06W0103 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0303 E1_H02W0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A3 H02E0501 arc: A4 H02E0701 arc: A6 N1_V02S0101 arc: B3 V02S0301 arc: B4 H01E0101 arc: B6 V00B0000 arc: C3 F6 arc: C4 H02E0601 arc: C6 H01E0001 arc: C7 N1_V02S0001 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 W1_H02E0001 arc: D4 V02N0601 arc: D6 H00L0100 arc: D7 H02E0001 arc: E1_H01E0001 F7 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F4 arc: LSR1 V00B0100 arc: M0 H02W0601 arc: M1 H00R0000 arc: M2 H02W0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F1 arc: N3_V06N0103 F1 arc: V01S0000 F1 arc: V01S0100 F1 word: SLICED.K0.INIT 0000000001110000 word: SLICED.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1101111111111111 word: SLICEC.K0.INIT 0000000000010011 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R27C26:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 V06S0203 arc: H00L0000 V02S0001 arc: H00R0000 H02E0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0001 arc: V00T0100 H02E0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 H01E0001 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A6 H00R0000 arc: B1 E1_H02W0301 arc: B2 E1_H01W0100 arc: B3 H00L0000 arc: B5 E1_H02W0101 arc: B6 H02E0301 arc: B7 V00T0000 arc: C1 H00R0100 arc: C2 S1_V02N0601 arc: C3 H02E0401 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: D1 E1_H02W0001 arc: D2 V01S0100 arc: D3 F2 arc: D5 E1_H02W0201 arc: D6 V02N0401 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0701 F5 arc: E3_H06E0103 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 F1 arc: H01W0100 F7 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: N1_V02N0401 F6 arc: N3_V06N0103 F2 arc: N3_V06N0303 F5 arc: S1_V02S0001 F2 arc: V01S0000 F2 arc: V01S0100 F1 arc: W1_H02W0201 F2 arc: W1_H02W0501 F7 arc: W1_H02W0701 F5 arc: W3_H06W0003 F3 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000110000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001100 word: SLICED.K0.INIT 0111111100000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 1111110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R27C27:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 S1_V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 V01N0001 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: V00T0100 V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A1 V02N0701 arc: A2 E1_H01E0001 arc: A3 V01N0101 arc: A4 H02E0501 arc: B1 F3 arc: B2 V01N0001 arc: B3 H01W0100 arc: B4 V00B0100 arc: B5 V01S0000 arc: C1 V02N0401 arc: C2 S1_V02N0601 arc: C3 H00L0100 arc: C4 V02N0201 arc: C5 H02E0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 S1_V02N0201 arc: D3 V00T0100 arc: D4 H01W0000 arc: D5 H00R0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: H01W0100 F2 arc: M0 V00B0000 arc: M6 N1_V01N0101 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: S1_V02S0401 Q6 arc: S3_V06S0303 Q6 arc: V01S0000 F2 arc: W1_H02W0001 F2 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000010 word: SLICEB.K1.INIT 1101110000000000 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R27C28:PLC2 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 H01E0001 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 V01N0001 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 E1_H02W0501 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 V06N0303 arc: W1_H02W0701 V06S0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0103 V01N0101 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A2 V00B0000 arc: A3 V00T0000 arc: A4 F5 arc: A6 H00L0000 arc: A7 H02E0701 arc: B1 E1_H02W0101 arc: B2 H00R0000 arc: B3 V02N0301 arc: B4 H01E0101 arc: B5 S1_V02N0701 arc: B6 V02S0701 arc: B7 H02E0101 arc: C0 H02W0401 arc: C1 E1_H02W0601 arc: C2 N1_V02S0601 arc: C3 E1_H02W0401 arc: C4 F6 arc: C5 V00T0100 arc: C6 S1_V02N0001 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00B0100 arc: D2 H02W0001 arc: D3 W1_H02E0201 arc: D4 V02N0401 arc: D5 S1_V02N0401 arc: D6 H02E0001 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q2 arc: E3_H06E0103 F1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F1 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F1 arc: N1_V02N0301 F1 arc: V00T0000 Q2 arc: V01S0100 F1 arc: W1_H02W0601 F4 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0101010101000101 word: SLICEB.K0.INIT 1111111110000000 word: SLICEB.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0011111100000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000001100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R27C29:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0303 V06N0303 arc: H00L0000 H02W0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 H01E0101 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00T0000 E1_H02W0201 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 N1_V01S0000 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: A0 H02E0701 arc: A1 E1_H02W0701 arc: A3 V02N0501 arc: A4 V00B0000 arc: A5 V02N0101 arc: B0 V00T0000 arc: B1 V02N0301 arc: B3 V02S0101 arc: B4 E1_H02W0101 arc: B5 E1_H02W0101 arc: C0 N1_V02S0401 arc: C1 H00L0000 arc: C3 H02W0601 arc: C4 E1_H01E0101 arc: C5 E1_H02W0601 arc: CE0 V02S0201 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02N0201 arc: D3 H00R0000 arc: D4 H02W0201 arc: D5 H00R0100 arc: E1_H01E0001 F5 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F4 arc: H01W0100 Q1 arc: LSR1 H02W0301 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N3_V06N0003 F0 arc: N3_V06N0303 Q6 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000100000000000 word: SLICEC.K0.INIT 0000000000000111 word: SLICEC.K1.INIT 0000000000000010 word: SLICEA.K0.INIT 0101000000000011 word: SLICEA.K1.INIT 0111000001111100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C2:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N3_V06S0003 .tile R27C30:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0203 V06S0203 arc: H00L0000 E1_H02W0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02N0001 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 E1_H01W0100 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 E1_H02W0701 arc: A2 V00B0000 arc: A4 H02E0501 arc: A5 V02N0301 arc: A6 H00R0000 arc: A7 V02N0101 arc: B0 V02S0101 arc: B2 H00R0100 arc: B4 V02S0501 arc: B5 H00L0000 arc: B6 H02W0101 arc: B7 V02S0501 arc: C0 F4 arc: C2 E1_H01W0000 arc: C4 V00T0100 arc: C5 H02E0401 arc: C6 H02W0601 arc: C7 H02E0401 arc: D0 V00B0100 arc: D2 V01S0100 arc: D4 H00L0100 arc: D5 E1_H01W0100 arc: D6 E1_H01W0100 arc: D7 H00L0100 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: M0 V00T0000 arc: M2 N1_V01N0001 arc: N1_V01N0001 F7 arc: V00B0100 F5 arc: V01S0100 F6 word: SLICEC.K0.INIT 0000100000000000 word: SLICEC.K1.INIT 0000001000000000 word: SLICED.K0.INIT 0000000000000010 word: SLICED.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 0000000000000111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000010011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R27C31:PLC2 arc: E1_H02E0201 V02S0201 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 V02N0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 H01E0101 arc: N3_V06N0203 H06W0203 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 S1_V02N0301 arc: V00T0100 V02S0501 arc: W1_H02W0401 V01N0001 arc: W1_H02W0701 N3_V06S0203 arc: S1_V02S0401 W3_H06E0203 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0303 V06S0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A2 H00L0100 arc: A4 V00T0100 arc: A6 E1_H02W0501 arc: B1 V00B0000 arc: B2 F1 arc: B3 H02E0301 arc: B4 H00L0000 arc: B6 V01S0000 arc: B7 V02S0501 arc: C0 H02W0601 arc: C1 H02E0601 arc: C2 F4 arc: C3 H00R0100 arc: C4 H01E0001 arc: C5 H01E0001 arc: C6 H02E0401 arc: C7 V02N0001 arc: D0 H02E0001 arc: D1 H00R0000 arc: D2 V01S0100 arc: D3 N1_V01S0000 arc: D4 H00R0100 arc: D5 H00R0100 arc: D6 V02S0601 arc: D7 N1_V02S0601 arc: E1_H01E0001 F7 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: E1_H02E0301 F3 arc: E1_H02E0401 F4 arc: E1_H02E0601 F4 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F3 arc: M4 V00B0100 arc: N1_V01N0001 F3 arc: N1_V01N0101 F1 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: N1_V02N0401 F6 arc: N1_V02N0601 F4 arc: S1_V02S0101 F1 arc: S1_V02S0301 F3 arc: S1_V02S0501 F7 arc: S1_V02S0601 F4 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: V01S0000 F7 arc: V01S0100 F3 arc: W1_H02W0101 F1 arc: W1_H02W0601 F4 arc: W3_H06W0103 F1 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000000011000000 word: SLICED.K0.INIT 0000001000000000 word: SLICED.K1.INIT 0000000011001111 word: SLICEB.K0.INIT 0000000000000010 word: SLICEB.K1.INIT 0000000011110011 word: SLICEC.K0.INIT 0100010000000100 word: SLICEC.K1.INIT 1111111100001111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R27C32:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 W1_H02E0401 arc: H00L0000 W1_H02E0201 arc: H00L0100 E1_H02W0101 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 H02E0301 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V01N0101 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0203 E1_H02W0401 arc: W3_H06W0303 N3_V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: A1 S1_V02N0501 arc: A3 H00L0100 arc: A5 N1_V02S0301 arc: B1 V00T0000 arc: B2 E1_H02W0101 arc: B3 H00L0000 arc: B4 H02W0301 arc: B5 H00L0000 arc: B6 V00B0000 arc: C1 W1_H02E0401 arc: C2 H02W0401 arc: C3 H02E0601 arc: C4 V00T0100 arc: C5 H02E0401 arc: C6 H01E0001 arc: D1 H01E0101 arc: D2 H02W0201 arc: D3 V00B0100 arc: D4 H02W0201 arc: D5 H02E0201 arc: D6 H02E0201 arc: D7 H02W0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F4 arc: E1_H02E0301 F1 arc: E3_H06E0103 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M6 W1_H02E0401 arc: N1_V02N0401 F6 arc: S1_V02S0701 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000100000000000 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 0000000000000010 word: SLICED.K0.INIT 1111001111111111 word: SLICED.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R27C33:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0303 H01E0101 arc: H00L0000 E1_H02W0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02E0401 arc: V00B0100 H02W0501 arc: V00T0100 H02E0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: A0 V02N0701 arc: A3 E1_H02W0701 arc: A4 V02N0101 arc: A7 H00L0000 arc: B0 F3 arc: B3 H00R0100 arc: B4 V02N0701 arc: B6 E1_H02W0301 arc: B7 V00B0000 arc: C0 N1_V01N0001 arc: C2 H02W0601 arc: C3 H02E0401 arc: C4 H02E0401 arc: C6 V00B0100 arc: C7 W1_H02E0601 arc: D0 H00R0000 arc: D2 H02E0201 arc: D3 V02S0001 arc: D4 N1_V02S0401 arc: D6 H02W0201 arc: D7 H00L0100 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00T0000 arc: M4 V00T0100 arc: N1_V01N0001 F7 arc: V00T0000 F2 arc: V01S0000 F6 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 0000000000010011 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000001 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R27C34:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06S0303 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H02W0501 arc: S3_V06S0003 H01E0001 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: V00T0100 V02S0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N3_V06S0203 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 V02S0101 arc: B3 V02S0101 arc: B4 V00B0100 arc: B5 V00B0100 arc: C0 E1_H02W0601 arc: C1 H02E0401 arc: C2 H00L0100 arc: C3 H02W0401 arc: C4 V01N0101 arc: C5 V02N0201 arc: C7 S1_V02N0001 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 H00R0100 arc: D5 H00R0100 arc: D7 V00B0000 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F3 arc: N1_V02N0701 F7 arc: S1_V02S0001 F0 arc: S1_V02S0301 F1 arc: S1_V02S0701 F5 arc: S3_V06S0203 F7 arc: V01S0000 F7 arc: V01S0100 F2 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R27C35:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 S1_V02N0101 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 H02E0401 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0303 E1_H02W0501 arc: W3_H06W0203 E3_H06W0103 arc: B6 V00T0000 arc: B7 V02N0701 arc: C6 V02S0001 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D6 V02S0601 arc: D7 V02S0601 arc: E1_H01E0101 Q4 arc: E3_H06E0203 Q4 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q2 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0501 F7 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R27C36:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W1_H02E0701 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q6 arc: H01W0100 Q0 arc: M0 H02W0601 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q6 arc: V01S0000 Q4 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R27C37:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0401 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0201 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A7 H00R0000 arc: B7 V00B0100 arc: C7 H02E0601 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: E1_H01E0101 Q2 arc: F7 F7_SLICE arc: H00R0000 Q4 arc: M0 H02W0601 arc: M2 W1_H02E0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0203 F7 arc: S1_V02S0001 Q2 arc: V01S0100 Q2 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R27C38:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V01N0101 arc: H00L0000 H02W0001 arc: H00L0100 V02N0101 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 H01E0001 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06S0103 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: B6 V00B0100 arc: C6 H02W0601 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D6 V02S0601 arc: D7 H00L0100 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 E1_H01E0101 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q2 arc: S1_V02S0601 F6 arc: W1_H02W0601 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000000110011 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R27C39:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 H01E0101 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 S1_V02N0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0303 N3_V06S0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 V02N0501 arc: A1 N1_V02S0501 arc: A6 H00R0000 arc: A7 W1_H02E0701 arc: B0 V01N0001 arc: B1 H02W0301 arc: B2 H01W0100 arc: B5 H02E0101 arc: B6 W1_H02E0301 arc: B7 W1_H02E0301 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 W1_H02E0401 arc: C4 E1_H02W0601 arc: C5 E1_H02W0601 arc: C6 V00B0100 arc: C7 W1_H02E0601 arc: D0 V00B0100 arc: D1 V02N0001 arc: D2 N1_V02S0201 arc: D3 E1_H02W0201 arc: D4 H00L0100 arc: D5 H02E0001 arc: D6 V02N0401 arc: D7 H00R0100 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M2 V00T0000 arc: M4 H02W0401 arc: N1_V01N0001 F0 arc: N3_V06N0103 F2 arc: S1_V02S0501 F7 arc: V01S0000 F1 arc: V01S0100 F6 word: SLICEA.K0.INIT 1100101010101010 word: SLICEA.K1.INIT 1111111111001010 word: SLICED.K0.INIT 1110101000101010 word: SLICED.K1.INIT 0000000011100010 word: SLICEC.K0.INIT 0000111111111111 word: SLICEC.K1.INIT 0011000000111111 word: SLICEB.K0.INIT 1111000000110011 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R27C3:PLC2 arc: E1_H02E0401 V02S0401 arc: H00R0000 W1_H02E0401 arc: S1_V02S0501 V01N0101 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0601 S1_V02N0601 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 H02E0401 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q0 arc: N1_V02N0201 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R27C40:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0100 H02W0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V01S0100 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0701 N3_V06S0203 arc: E1_H01E0001 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A1 H02W0701 arc: A2 H00L0100 arc: A4 W1_H02E0501 arc: A6 H02E0701 arc: B1 E1_H02W0101 arc: B2 H00L0000 arc: B4 H02W0301 arc: B6 V00B0000 arc: C0 S1_V02N0601 arc: C1 V02N0601 arc: C2 H00R0100 arc: C3 W1_H02E0601 arc: C4 V02N0001 arc: C5 V00T0100 arc: C6 N1_V02S0201 arc: C7 V00B0100 arc: D0 V01S0100 arc: D1 H01E0101 arc: D2 H02W0001 arc: D3 H02E0001 arc: D4 H02W0001 arc: D5 H02E0001 arc: D6 H02W0001 arc: D7 H02E0001 arc: E1_H01E0101 F1 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F2 arc: N1_V01N0001 F7 arc: N1_V01N0101 F4 arc: N3_V06N0103 F1 arc: S1_V02S0101 F3 arc: S1_V02S0601 F6 arc: S1_V02S0701 F5 arc: V01S0100 F1 word: SLICEC.K0.INIT 1100101010101010 word: SLICEC.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0001000011111111 word: SLICEB.K0.INIT 1110001010101010 word: SLICEB.K1.INIT 0000000011110000 word: SLICED.K0.INIT 1110001010101010 word: SLICED.K1.INIT 0000000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R27C41:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 V01N0101 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0203 H06W0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 V02N0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V02S0701 arc: E1_H01E0101 W3_H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: A0 S1_V02N0701 arc: A1 E1_H02W0701 arc: A3 V02S0501 arc: A7 S1_V02N0101 arc: B0 F1 arc: B1 E1_H02W0301 arc: B2 N1_V02S0101 arc: B3 H00R0000 arc: B4 H02E0301 arc: B7 H02W0301 arc: C0 N1_V02S0601 arc: C1 V02S0401 arc: C2 H00L0100 arc: C3 H02E0601 arc: C4 V00B0100 arc: C6 H02W0601 arc: C7 V00T0000 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 H02W0201 arc: D2 F0 arc: D3 S1_V02N0001 arc: D4 H02E0201 arc: D5 W1_H02E0201 arc: D6 V02N0401 arc: D7 S1_V02N0401 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0100 F3 arc: H01W0000 F1 arc: H01W0100 F6 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: N3_V06N0103 F2 arc: V01S0100 F1 arc: W1_H02W0401 Q4 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 1101000010000000 word: SLICEA.K1.INIT 0101010000010000 word: SLICEB.K0.INIT 0000000011110011 word: SLICEB.K1.INIT 1001010001001111 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 1010101000001100 word: SLICEC.K0.INIT 0000001111001111 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R27C42:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 E3_H06W0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A3 V00T0000 arc: A5 V00T0000 arc: A6 E1_H01W0000 arc: A7 N1_V01N0101 arc: B0 H00R0100 arc: B1 H00R0100 arc: B3 E1_H02W0101 arc: B5 V02S0501 arc: B6 V00B0000 arc: B7 H02E0101 arc: C0 N1_V01N0001 arc: C1 H00L0000 arc: C2 S1_V02N0601 arc: C3 H00L0100 arc: C4 V00T0000 arc: C5 V00T0100 arc: C6 V02N0001 arc: C7 V02N0201 arc: D0 H00R0000 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 H02E0001 arc: D4 H00L0100 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 H02E0001 arc: E1_H01E0101 F6 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: M0 H02E0601 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: N3_V06N0003 F0 arc: S1_V02S0701 F7 arc: V01S0000 F0 arc: W1_H02W0401 F4 word: SLICED.K0.INIT 1110001010101010 word: SLICED.K1.INIT 1010110011001100 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111001111000000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 1010101000001100 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 1010101000001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R27C43:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02S0201 arc: H00L0100 V02N0101 arc: H00R0100 S1_V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V02S0701 arc: E1_H02E0301 W3_H06E0003 arc: H01W0000 W3_H06E0103 arc: W3_H06W0203 V01N0001 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0701 arc: A2 H02W0501 arc: A3 V00B0000 arc: A4 N1_V01S0100 arc: A7 W1_H02E0701 arc: B0 N1_V02S0301 arc: B1 V00T0000 arc: B2 H02E0101 arc: B3 V02N0301 arc: B4 H00L0000 arc: B5 H00R0000 arc: B7 V02N0501 arc: C0 N1_V02S0601 arc: C1 H00R0100 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 H02E0401 arc: C5 S1_V02N0001 arc: C7 V02S0001 arc: D0 V00B0100 arc: D1 E1_H02W0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 H02E0001 arc: D5 E1_H02W0001 arc: D7 H00L0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0100 F3 arc: N1_V01N0101 F5 arc: N3_V06N0003 F0 arc: N3_V06N0203 F4 arc: S1_V02S0401 F4 arc: V00T0000 F0 arc: V01S0000 F7 arc: V01S0100 F4 arc: W1_H02W0201 F0 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100010010000000 word: SLICEB.K0.INIT 1010110011001100 word: SLICEB.K1.INIT 1010110011001100 word: SLICEA.K0.INIT 0101000101000000 word: SLICEA.K1.INIT 0000111100110011 word: SLICEC.K0.INIT 0101010000010000 word: SLICEC.K1.INIT 0011001100001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R27C44:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 V06N0203 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N1_V02S0501 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00R0000 arc: A4 H02E0701 arc: B0 V02S0301 arc: B1 V00B0000 arc: B2 E1_H02W0101 arc: B3 H01W0100 arc: B4 V02S0701 arc: B5 V01S0000 arc: B6 W1_H02E0301 arc: B7 W1_H02E0301 arc: C0 H02E0601 arc: C1 N1_V01N0001 arc: C2 S1_V02N0601 arc: C3 H00L0000 arc: C4 E1_H02W0401 arc: C5 V00T0000 arc: C6 W1_H02E0601 arc: C7 W1_H02E0601 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02W0001 arc: D2 E1_H02W0201 arc: D3 H02W0201 arc: D4 S1_V02N0401 arc: D5 H02W0001 arc: D6 E1_H02W0001 arc: D7 W1_H02E0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F3 arc: E1_H02E0001 F2 arc: E1_H02E0101 F3 arc: E1_H02E0301 F1 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: H01W0100 Q2 arc: LSR1 E1_H02W0301 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F0 arc: N3_V06N0003 F0 arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 arc: S1_V02S0001 F2 arc: S3_V06S0003 F0 arc: V00B0000 F4 arc: V00T0000 F0 arc: V01S0000 F4 arc: V01S0100 F6 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0010001100100000 word: SLICEA.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0101010000010000 word: SLICEC.K1.INIT 0000111100110011 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000111100001100 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111110000110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R27C45:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V01N0101 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 H01E0001 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0001 arc: V00T0000 W1_H02E0201 arc: V00T0100 E1_H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A3 V02N0501 arc: B3 H02E0101 arc: B4 N1_V02S0501 arc: C3 N1_V01S0100 arc: C4 H02E0401 arc: CE0 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 H01E0101 arc: D3 V02N0201 arc: D4 V02N0401 arc: D5 H00L0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00L0100 Q1 arc: H01W0000 Q1 arc: H01W0100 Q6 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F1 arc: N1_V02N0401 Q6 arc: V01S0100 F4 arc: W1_H02W0401 Q6 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000110010001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R27C46:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 V01N0001 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0701 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0601 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0401 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 N1_V02S0501 arc: A3 N1_V02S0501 arc: A4 V02N0101 arc: A5 S1_V02N0101 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 V02S0101 arc: B3 V02S0101 arc: B4 H00L0000 arc: B5 H01E0101 arc: B6 V02N0501 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 N1_V02S0201 arc: C6 V00T0100 arc: CLK1 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 S1_V02N0401 arc: D5 V02N0601 arc: D6 H00R0100 arc: D7 W1_H02E0201 arc: E1_H01E0001 Q0 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q1 arc: LSR1 H02W0301 arc: M6 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: V01S0000 Q2 arc: V01S0100 Q3 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R27C47:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02W0201 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: A1 V02S0701 arc: A3 H02E0501 arc: A5 V00T0100 arc: B1 E1_H02W0301 arc: B2 H00L0000 arc: B3 H00R0100 arc: B5 E1_H02W0301 arc: B6 S1_V02N0501 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 F6 arc: C3 N1_V02S0601 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 H02E0401 arc: CE1 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 H00R0000 arc: D3 V00B0100 arc: D4 N1_V02S0401 arc: D5 N1_V02S0401 arc: D6 H02E0201 arc: D7 H02E0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F4 arc: H01W0100 Q2 arc: M0 H02E0601 arc: M4 H02W0401 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0000000000010000 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1110000000000000 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 1110000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R27C48:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 V02N0301 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H01E0101 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E3_H06W0303 arc: H01W0000 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A1 N1_V02S0701 arc: A4 E1_H01W0000 arc: A5 S1_V02N0101 arc: A6 E1_H01W0000 arc: B1 H02W0301 arc: B2 V02N0101 arc: B3 H01W0100 arc: B4 H02E0101 arc: B5 H02W0101 arc: B6 V00T0000 arc: B7 E1_H02W0301 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 E1_H02W0601 arc: C3 S1_V02N0401 arc: C4 V02N0201 arc: C5 F4 arc: C6 V02N0001 arc: C7 F6 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 H02E0001 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 N1_V02S0601 arc: D6 H00L0100 arc: D7 N1_V02S0601 arc: E1_H01E0001 F4 arc: E1_H01E0101 F6 arc: E1_H02E0501 F5 arc: E1_H02E0701 F5 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: M0 H02E0601 arc: N1_V01N0001 F2 arc: N1_V02N0601 F6 arc: S1_V02S0201 F2 arc: S1_V02S0601 F6 arc: V01S0000 F0 arc: V01S0100 F3 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000001100 word: SLICEB.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0101010000010000 word: SLICEC.K1.INIT 0111011100001111 word: SLICED.K0.INIT 0101010000010000 word: SLICED.K1.INIT 0000111100110011 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 1110000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R27C49:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 N1_V02S0301 arc: E3_H06E0003 H01E0001 arc: H00L0000 H02E0201 arc: H00L0100 E1_H02W0301 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0303 N1_V01S0100 arc: B3 H00L0000 arc: B4 V02S0701 arc: C2 N1_V01N0001 arc: C3 H02W0401 arc: C4 V01N0101 arc: C5 E1_H01E0101 arc: CE0 H00L0100 arc: CE1 H02E0101 arc: CE2 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 H02E0001 arc: E1_H01E0101 Q4 arc: E3_H06E0103 F2 arc: E3_H06E0303 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M0 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q3 arc: N3_V06N0203 Q4 arc: S1_V02S0001 Q0 arc: S1_V02S0601 Q6 arc: W3_H06W0003 Q3 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100111100000011 word: SLICEC.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111110000110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 .tile R27C4:PLC2 arc: E1_H02E0601 V02S0601 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 N1_V02S0001 arc: V00T0100 H02W0101 arc: W1_H02W0701 N1_V02S0701 arc: B3 H01W0100 arc: C2 N1_V01N0001 arc: C3 H00L0000 arc: CE0 V02N0201 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: E3_H06E0103 F2 arc: F2 F5B_SLICE arc: H00L0000 Q0 arc: H01W0100 Q4 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 0011001100001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 .tile R27C50:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 V02S0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 H02E0601 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V06S0203 arc: E1_H02E0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 V02N0501 arc: A5 H02W0701 arc: A7 S1_V02N0301 arc: B0 V00B0000 arc: B1 H02E0301 arc: B5 V00B0100 arc: B7 V00T0000 arc: C0 H00L0000 arc: C1 N1_V01N0001 arc: C4 V02N0201 arc: C5 V02N0201 arc: C6 V02N0201 arc: C7 V02N0201 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H00R0000 arc: D4 N1_V02S0401 arc: D5 N1_V02S0401 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 F0 arc: M2 W1_H02E0601 arc: M4 V00T0100 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F1 arc: S3_V06S0103 Q2 arc: V01S0100 F6 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0011001000000010 word: SLICEA.K1.INIT 0000111100110011 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1110000000000000 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1110000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R27C51:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 H01E0101 arc: H00R0100 V02N0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0501 arc: V00T0000 V02N0601 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F3 arc: E3_H06E0003 F3 arc: E3_H06E0203 Q4 arc: F3 F3_SLICE arc: H01W0000 F3 arc: M0 V00B0000 arc: M4 H02E0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F3 arc: N1_V02N0301 F3 arc: N3_V06N0003 F3 arc: S1_V02S0201 Q0 arc: S1_V02S0301 F3 arc: V01S0000 Q6 arc: V01S0100 F3 arc: W1_H02W0301 F3 arc: W3_H06W0003 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R27C52:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 H01E0101 arc: E3_H06E0003 V06N0003 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H02E0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V06S0303 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H02E0601 Q6 arc: E3_H06E0103 Q2 arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 Q0 arc: S3_V06S0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R27C53:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0303 N1_V01S0100 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H06W0303 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0301 V06S0003 arc: W1_H02W0701 E1_H02W0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: B4 V01S0000 arc: B5 V01S0000 arc: C4 H02E0601 arc: C5 H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 W1_H02E0001 arc: D5 W1_H02E0001 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M0 V00T0100 arc: M2 N1_V01N0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q0 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 Q2 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100001100111100 word: SLICEC.K1.INIT 1111110011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R27C54:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 W1_H02E0301 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H06E0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 V02S0501 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0501 N3_V06S0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: B1 W1_H02E0101 arc: B2 H02E0301 arc: B3 V02S0101 arc: B4 V00B0100 arc: B5 V02S0701 arc: B6 V00B0000 arc: B7 V02S0701 arc: C1 E1_H02W0601 arc: C2 V02N0601 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 F4 arc: C6 E1_H01E0101 arc: C7 F6 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 V02N0201 arc: D4 H02E0001 arc: D5 H02W0001 arc: D6 H02E0001 arc: D7 H00L0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: E1_H02E0701 F5 arc: E3_H06E0203 F7 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 F3 arc: N1_V01N0001 F7 arc: N1_V01N0101 F3 arc: N1_V02N0501 F5 arc: V00T0000 F2 arc: V01S0000 F6 arc: V01S0100 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0011000000111111 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 1111001111000000 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1111001111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R27C55:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: V00B0100 W1_H02E0501 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0701 V06S0203 arc: N1_V02N0301 W3_H06E0003 arc: N3_V06N0303 W3_H06E0303 arc: B0 E1_H02W0101 arc: B1 W1_H02E0301 arc: B2 F3 arc: B3 H00R0000 arc: B5 F1 arc: B6 H02E0101 arc: B7 V02S0501 arc: C0 N1_V01N0001 arc: C1 V02N0601 arc: C2 S1_V02N0401 arc: C3 H00R0100 arc: C5 V02S0201 arc: C6 E1_H02W0601 arc: C7 V00T0100 arc: D0 W1_H02E0201 arc: D1 V00B0100 arc: D2 H02E0001 arc: D3 V00B0100 arc: D5 H00L0100 arc: D6 H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H02E0201 F0 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: N1_V01N0001 F1 arc: N1_V01N0101 F5 arc: V00B0000 F6 arc: V01S0000 F6 arc: V01S0100 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 1111001111000000 word: SLICEA.K1.INIT 0011001100001111 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 0011001100001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R27C56:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: H00L0000 H02W0001 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 N1_V02S0301 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 H02E0101 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0401 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0303 E1_H01W0100 arc: B0 W1_H02E0301 arc: B5 W1_H02E0301 arc: C0 H00R0100 arc: C5 V00T0100 arc: CE1 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H00R0000 arc: D4 H02E0001 arc: D5 V02S0601 arc: E1_H02E0001 F0 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0103 Q2 arc: S3_V06S0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 0000111100110011 word: SLICEA.K0.INIT 0011001100001111 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R27C57:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: H00L0000 V02S0001 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 H06E0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 N1_V02S0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 E1_H02W0301 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: B2 H00L0000 arc: B3 H00R0100 arc: B4 V02S0701 arc: B5 H00L0000 arc: C2 H00L0100 arc: C3 H02E0401 arc: C4 E1_H02W0401 arc: C5 F4 arc: CE0 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 H02E0201 arc: D3 H02E0001 arc: D4 W1_H02E0201 arc: D5 H00L0100 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 F3 arc: H01W0000 F2 arc: H01W0100 F2 arc: M0 V00B0000 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0401 F4 arc: S3_V06S0003 Q0 arc: S3_V06S0303 Q6 arc: V01S0000 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1111001111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R27C58:PLC2 arc: H00L0000 H02E0001 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 H06E0103 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N3_V06S0303 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: A6 H00R0000 arc: B0 V00T0000 arc: B1 E1_H02W0301 arc: B2 H02E0301 arc: B3 H00R0100 arc: B4 H00R0000 arc: B6 H02E0301 arc: B7 V02S0501 arc: C0 V02S0601 arc: C1 V02N0401 arc: C2 H02W0601 arc: C3 V02N0601 arc: C4 V00T0100 arc: C6 E1_H01E0101 arc: C7 W1_H02E0401 arc: CE0 H00L0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 F0 arc: D2 V01S0100 arc: D3 W1_H02E0001 arc: D4 F2 arc: D5 F0 arc: D6 H00L0100 arc: D7 H02E0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0100 Q1 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V02N0701 F7 arc: N3_V06N0103 Q1 arc: N3_V06N0203 Q4 arc: N3_V06N0303 F6 arc: V01S0100 F3 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 1100000011110011 word: SLICEA.K1.INIT 0000111100001100 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000001010001010 word: SLICED.K1.INIT 1111001111000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R27C59:PLC2 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 H02W0001 arc: S3_V06S0203 N3_V06S0103 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 H01E0001 arc: W1_H02W0301 W3_H06E0003 .tile R27C5:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0601 V02S0601 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H01W0000 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 E1_H02W0701 arc: W1_H02W0101 V06S0103 arc: B3 H01W0100 arc: C3 E1_H02W0401 arc: CE0 H00R0100 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 H02W0001 arc: F3 F3_SLICE arc: H01W0100 Q6 arc: M0 V00B0100 arc: M4 W1_H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0203 Q4 arc: S1_V02S0301 F3 arc: V01S0100 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R27C60:PLC2 arc: N1_V02N0401 W1_H02E0401 arc: S3_V06S0103 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 .tile R27C61:PLC2 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0101 W3_H06E0103 .tile R27C62:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 .tile R27C63:PLC2 arc: S3_V06S0203 N3_V06S0103 .tile R27C64:PLC2 arc: E3_H06E0303 N3_V06S0303 arc: S3_V06S0303 N3_V06S0303 arc: E3_H06E0103 W3_H06E0003 .tile R27C65:PLC2 arc: N1_V02N0401 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 .tile R27C66:PLC2 arc: S3_V06S0203 N3_V06S0103 .tile R27C67:PLC2 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 H06E0303 arc: S3_V06S0103 N3_V06S0103 .tile R27C69:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 .tile R27C6:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V01N0101 arc: H00R0000 V02N0401 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0701 E1_H02W0701 arc: V00T0000 V02S0601 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0701 V01N0101 arc: C5 H02E0601 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 V02N0601 arc: F5 F5_SLICE arc: H01W0000 Q6 arc: M0 E1_H02W0601 arc: M2 H02W0601 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0001 Q0 arc: N3_V06N0303 F5 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R27C70:PLC2 arc: V01S0000 N3_V06S0103 arc: E1_H02E0101 W3_H06E0103 .tile R27C7:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: H00L0000 V02S0201 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 V01N0001 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 E1_H02W0601 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V06S0203 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 E1_H02W0201 arc: D2 V01S0100 arc: D3 H00R0000 arc: E1_H01E0001 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N3_V06N0103 F1 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R27C8:PLC2 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 N3_V06S0203 arc: H00R0000 V02N0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 E1_H02W0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 H02E0401 arc: V00B0100 N1_V02S0301 arc: V00T0100 E1_H02W0301 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: V01S0000 Q0 arc: W1_H02W0401 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R27C9:PLC2 arc: E1_H02E0101 V02N0101 arc: E3_H06E0203 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0601 V06S0303 arc: W3_H06W0103 N3_V06S0103 .tile R28C10:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 S1_V02N0601 arc: H00R0000 V02S0601 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E3_H06W0303 arc: N3_V06N0003 H06W0003 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 H06E0203 arc: V00T0100 H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N3_V06S0303 arc: W3_H06W0303 E3_H06W0303 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: M0 H02E0601 arc: M2 V00T0100 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: V01S0000 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R28C11:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 V02S0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0701 H01E0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H06W0203 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q0 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0601 Q6 arc: S3_V06S0003 Q0 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R28C12:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0103 H01E0101 arc: H00R0000 N1_V02S0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 H02E0501 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 W1_H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0101 W3_H06E0103 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: H01W0100 Q6 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: V01S0000 Q4 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C13:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 V06N0103 arc: H00L0100 N1_V02S0101 arc: H00R0000 W1_H02E0401 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 E1_H02W0701 arc: A1 H00L0000 arc: A3 V02N0701 arc: A4 H02E0501 arc: A5 V02N0301 arc: A7 V00T0100 arc: B0 V02N0101 arc: B1 H02E0101 arc: B3 E1_H02W0101 arc: B4 W1_H02E0301 arc: B5 V02N0501 arc: B7 N1_V01S0000 arc: C0 E1_H01W0000 arc: C1 W1_H02E0601 arc: C3 H02W0601 arc: C4 V00B0100 arc: C5 H01E0001 arc: C7 E1_H01E0101 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02N0001 arc: D3 H02W0001 arc: D4 H00L0100 arc: D5 E1_H01W0100 arc: D7 N1_V02S0401 arc: E1_H01E0101 F3 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0100 Q5 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q0 arc: N3_V06N0003 Q0 arc: N3_V06N0103 F1 arc: N3_V06N0303 Q5 arc: S3_V06S0003 Q0 arc: V01S0000 F6 arc: W1_H02W0001 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICEA.K0.INIT 1011000010111011 word: SLICEA.K1.INIT 1100010011110101 word: SLICEC.K0.INIT 0011110010011001 word: SLICEC.K1.INIT 1011101110001011 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R28C14:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 N1_V02S0001 arc: H00L0100 S1_V02N0301 arc: H00R0100 H02E0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 H02E0401 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00L0000 arc: A3 V02N0701 arc: A7 V02S0301 arc: B1 E1_H01W0100 arc: B3 H02W0101 arc: B4 V00B0100 arc: B7 V02N0501 arc: C1 N1_V01N0001 arc: C3 S1_V02N0601 arc: C4 H02W0601 arc: C7 V02N0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D3 V02N0001 arc: D4 S1_V02N0401 arc: D5 H02W0201 arc: D7 H00L0100 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F0 arc: H01W0100 F6 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F3 arc: N3_V06N0203 Q4 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 1111111111001111 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111011101110011 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R28C15:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 E1_H02W0201 arc: H00R0100 W1_H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0101 H06E0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0601 arc: V00T0100 H02E0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 V06S0103 arc: A0 H00L0000 arc: A1 E1_H02W0501 arc: A5 E1_H01W0000 arc: A7 F5 arc: B0 E1_H02W0101 arc: B1 V02N0101 arc: B5 E1_H02W0301 arc: B6 N1_V01S0000 arc: B7 V00B0000 arc: C0 H00R0100 arc: C1 H02E0601 arc: C5 V00T0100 arc: C6 H02E0401 arc: C7 V00T0000 arc: CE1 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V02N0001 arc: D5 H02E0201 arc: D6 S1_V02N0601 arc: D7 V02N0401 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F0 arc: LSR0 H02W0301 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q2 arc: N3_V06N0203 F7 arc: N3_V06N0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0101001111111111 word: SLICEA.K1.INIT 1010100010101010 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R28C16:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 N1_V02S0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0401 E1_H02W0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0101 arc: V00T0100 V02S0501 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0203 V01N0001 arc: W3_H06W0303 E3_H06W0303 arc: A4 H02E0501 arc: A5 E1_H02W0701 arc: B0 V00T0000 arc: B4 V01S0000 arc: B5 H02E0101 arc: C0 V02N0401 arc: C4 H02E0601 arc: C5 V00T0100 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V01S0100 arc: D4 V00B0000 arc: D5 W1_H02E0001 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q0 arc: H01W0100 Q5 arc: M0 E1_H02W0601 arc: M2 N1_V01N0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: S1_V02S0501 F5 arc: S1_V02S0601 Q6 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 F5 arc: W1_H02W0401 F4 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 0111000001111100 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R28C17:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 V02N0201 arc: H00R0000 N1_V02S0601 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 W1_H02E0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A3 V02N0701 arc: A5 H02E0501 arc: A7 H00L0000 arc: B2 F3 arc: B3 V02N0301 arc: B5 V02S0701 arc: B7 E1_H02W0301 arc: C2 H00R0100 arc: C3 E1_H02W0601 arc: C5 E1_H02W0401 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 V00B0100 arc: D5 H02E0201 arc: D7 V00B0000 arc: E3_H06E0103 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0100 Q0 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: N3_V06N0103 F2 arc: V01S0100 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R28C18:PLC2 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 N1_V02S0001 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 V01N0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0203 V01N0001 arc: W3_H06W0003 E3_H06W0003 arc: A7 H00R0000 arc: B2 H01W0100 arc: B7 N1_V01S0000 arc: C2 H00L0000 arc: C7 E1_H02W0401 arc: CE0 H02W0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 H02W0001 arc: D7 H00R0100 arc: E1_H01E0101 Q2 arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 F7 arc: H01W0100 Q2 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R28C19:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 E1_H01W0000 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 V01N0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 W1_H02E0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: H01W0100 W3_H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0203 E1_H02W0401 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0103 arc: A3 V00B0000 arc: B3 H00R0000 arc: C3 H02W0601 arc: CE0 E1_H02W0101 arc: CE2 W1_H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E1_H01E0001 Q0 arc: E3_H06E0103 F2 arc: F2 F5B_SLICE arc: H00R0000 Q6 arc: M0 V00T0000 arc: M2 W1_H02E0601 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N3_V06N0303 Q6 arc: V00B0000 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R28C20:PLC2 arc: H00L0000 H02W0201 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06W0203 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 H06W0203 arc: V00B0000 H02E0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0701 W3_H06E0203 arc: W3_H06W0303 V01N0101 arc: A0 H00L0000 arc: A4 V02N0101 arc: A5 W1_H02E0501 arc: B0 V00B0000 arc: B4 V02S0501 arc: B5 N1_V02S0501 arc: C0 H00L0100 arc: C4 V02S0001 arc: C5 V00T0100 arc: CE1 H00R0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D4 H02W0001 arc: D5 H00R0100 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: M0 H02E0601 arc: M2 V00T0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: S3_V06S0003 F0 arc: V01S0100 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000010 word: SLICEC.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 0000000000010011 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C21:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 N3_V06S0003 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0203 V01N0001 arc: W3_H06W0303 E1_H02W0501 arc: CE0 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: LSR0 V00B0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R28C22:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 S1_V02N0201 arc: H00R0000 V02N0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H02W0001 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0303 N3_V06S0303 arc: A1 H00R0000 arc: A2 E1_H01E0001 arc: A5 H02E0701 arc: B0 H02W0301 arc: B1 E1_H02W0101 arc: B2 H00R0100 arc: B5 H02E0101 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 N1_V01N0001 arc: C5 N1_V02S0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V00B0100 arc: D3 V00T0100 arc: D5 H02W0201 arc: E1_H01E0001 Q2 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: H01W0100 Q6 arc: M0 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q0 arc: N3_V06N0003 F3 arc: V00T0000 Q0 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 1111000000100010 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 1011000100110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R28C23:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 H02W0601 arc: V00B0100 V02S0101 arc: V00T0100 V02S0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: E3_H06E0103 W3_H06E0103 arc: A1 W1_H02E0501 arc: A2 N1_V02S0501 arc: A3 H02E0501 arc: A6 H00L0000 arc: A7 V02N0301 arc: B1 V02S0101 arc: B2 V02S0101 arc: B3 N1_V02S0301 arc: B4 V02S0701 arc: B6 V00B0100 arc: B7 V00B0000 arc: C1 V02S0601 arc: C2 V02S0601 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 H02W0201 arc: D7 V02S0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: N1_V01N0001 F5 arc: N1_V02N0401 F4 arc: N1_V02N0601 F4 arc: N3_V06N0303 F5 arc: S1_V02S0601 F4 arc: S3_V06S0203 F4 arc: V01S0000 F3 arc: W1_H02W0001 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 1100000011001100 word: SLICEC.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 0000000000000010 word: SLICEB.K1.INIT 0000100000000000 word: SLICED.K0.INIT 0000000000000111 word: SLICED.K1.INIT 0000100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R28C24:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02S0201 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02W0601 arc: V00B0100 H02E0501 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V06N0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A3 E1_H02W0701 arc: A4 W1_H02E0701 arc: A5 V02S0301 arc: B3 H00R0000 arc: B4 H02E0101 arc: B5 H02E0101 arc: C0 H02E0401 arc: C1 H00L0000 arc: C3 H00L0100 arc: C4 E1_H01E0101 arc: C5 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00B0100 arc: D3 V00T0100 arc: D4 H00R0100 arc: D5 V02S0601 arc: E1_H01E0101 F3 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 F5 arc: H01W0100 F1 arc: LSR0 V00T0000 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N3_V06N0103 F1 arc: V00T0000 F0 arc: V01S0100 F1 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 0000111111111111 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000000000000111 word: SLICEC.K1.INIT 0000000000000010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R28C25:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V01N0001 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0301 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 N1_V01S0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0000 arc: A3 H02E0701 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: B0 H00R0100 arc: B2 E1_H02W0301 arc: B3 H02E0101 arc: B4 V02N0701 arc: B5 E1_H02W0101 arc: B7 V00B0000 arc: C0 S1_V02N0401 arc: C2 V02N0401 arc: C3 H02W0601 arc: C4 V00T0000 arc: C5 E1_H02W0401 arc: C6 V02S0201 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 V02S0001 arc: D3 F2 arc: D4 E1_H02W0201 arc: D5 W1_H02E0201 arc: D6 H00L0100 arc: D7 E1_H02W0001 arc: E1_H01E0101 F6 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F2 arc: M0 V00B0100 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q4 arc: N1_V02N0001 F2 arc: N3_V06N0103 F2 arc: N3_V06N0203 F7 arc: S1_V02S0001 F2 arc: S1_V02S0601 F6 arc: S3_V06S0103 F2 arc: V00B0000 F6 arc: W1_H02W0001 F2 arc: W1_H02W0101 F3 word: SLICEC.K0.INIT 1111001000000010 word: SLICEC.K1.INIT 0000011100000000 word: SLICEB.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 0001010100111111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C26:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0303 V06S0303 arc: H00L0000 E1_H02W0201 arc: H00L0100 S1_V02N0301 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 V01N0001 arc: N3_V06N0203 V01N0001 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 V01N0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V02S0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0101 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A1 H00R0000 arc: A4 V02S0301 arc: A6 H00L0000 arc: A7 V02S0101 arc: B1 W1_H02E0301 arc: B4 N1_V01S0000 arc: B6 E1_H02W0301 arc: B7 V02S0501 arc: C1 H00R0100 arc: C4 V02S0201 arc: C6 V02N0001 arc: C7 V00T0100 arc: D1 V02N0201 arc: D4 V02N0401 arc: D6 H00L0100 arc: D7 H01W0000 arc: E1_H01E0001 F7 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 F6 arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 N1_V01N0001 arc: M4 V00T0000 arc: N1_V01N0001 F4 arc: S3_V06S0303 F6 arc: V00B0000 F4 word: SLICED.K0.INIT 0100000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000111 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R28C27:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 V02S0601 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 V01N0101 arc: W3_H06W0003 V01N0001 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: B5 V01S0000 arc: B7 E1_H02W0301 arc: C4 E1_H01E0101 arc: C5 V00T0000 arc: C6 V00B0100 arc: C7 W1_H02E0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H01W0000 arc: D5 V02S0401 arc: D6 H01W0000 arc: D7 S1_V02N0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 F5 arc: E1_H02E0201 Q2 arc: E3_H06E0103 Q2 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q2 arc: M0 V00B0000 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: N1_V02N0401 F4 arc: N1_V02N0501 F7 arc: S1_V02S0001 Q0 arc: S1_V02S0501 F5 arc: S3_V06S0303 F5 arc: V00T0000 Q2 arc: V01S0000 Q0 arc: V01S0100 Q0 arc: W1_H02W0401 F4 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000000000110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R28C28:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02W0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0303 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: A1 V01N0101 arc: A2 S1_V02N0701 arc: A6 N1_V02S0101 arc: A7 W1_H02E0701 arc: B1 H02W0101 arc: B2 H00R0000 arc: B3 N1_V02S0301 arc: B6 V02N0501 arc: B7 H02E0101 arc: C1 V02N0601 arc: C2 H00L0000 arc: C3 H00R0100 arc: C6 V00B0100 arc: C7 S1_V02N0201 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 H02W0201 arc: D3 F2 arc: D6 H00L0100 arc: D7 H02W0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F1 arc: E1_H02E0401 F6 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q4 arc: N1_V02N0701 F7 arc: N3_V06N0203 Q4 arc: S1_V02S0401 Q4 arc: V00B0100 F7 arc: V01S0000 Q4 arc: W1_H02W0001 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000100000000 word: SLICEB.K0.INIT 0101011111111111 word: SLICEB.K1.INIT 0000111100001100 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R28C29:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 V01N0101 arc: H00L0100 N1_V02S0301 arc: H00R0100 H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 W1_H02E0501 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 H02W0601 arc: V00T0000 H02W0001 arc: V00T0100 E1_H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0303 E3_H06W0303 arc: A7 H00R0000 arc: B4 H00R0000 arc: B7 S1_V02N0701 arc: C4 V02S0001 arc: C7 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D4 V02S0601 arc: D5 V02S0401 arc: D7 V02N0401 arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0103 Q2 arc: W1_H02W0401 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R28C2:PLC2 arc: E1_H02E0501 E3_H06W0303 arc: H00R0000 H02W0401 arc: H00R0100 H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 H06W0103 arc: N1_V02N0401 H06W0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0001 arc: A1 H00R0000 arc: A5 E1_H01W0000 arc: B1 V00T0000 arc: B5 H02W0101 arc: C1 H00R0100 arc: C5 V02N0001 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D5 S1_V02N0601 arc: E1_H01E0101 F1 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: LSR1 V00B0100 arc: M4 E1_H01E0101 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: S3_V06S0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001011110011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010010100100001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R28C30:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 N3_V06S0003 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A3 V00T0000 arc: A5 S1_V02N0301 arc: B2 H01W0100 arc: B3 V02S0101 arc: B4 S1_V02N0701 arc: B5 V02S0701 arc: C2 H00L0100 arc: C3 H00R0100 arc: C4 V02N0001 arc: C5 V02N0201 arc: CE0 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 S1_V02N0001 arc: D4 V00B0000 arc: D5 H02E0201 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 F3 arc: H01W0100 F5 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N3_V06N0103 F2 arc: S3_V06S0203 F4 arc: V00T0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R28C31:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02S0301 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0701 N3_V06S0203 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0203 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 E1_H02W0501 arc: A3 H02E0701 arc: A6 W1_H02E0701 arc: A7 H02W0501 arc: B0 V02S0101 arc: B2 H02E0101 arc: B3 V02S0101 arc: B4 H02W0101 arc: B6 V00B0000 arc: B7 V02S0501 arc: C0 F6 arc: C2 H00L0000 arc: C3 V02S0601 arc: C4 V02S0201 arc: C6 H02E0401 arc: C7 H02E0401 arc: D0 V01S0100 arc: D2 H02E0201 arc: D3 N1_V02S0201 arc: D4 V02S0601 arc: D5 H00R0100 arc: D6 V02S0601 arc: D7 H00L0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F0 arc: M0 V00B0100 arc: M4 H02E0401 arc: V01S0100 F7 word: SLICED.K0.INIT 0000100000000000 word: SLICED.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 0011111111111111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000000000111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C32:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 H01E0101 arc: H00R0000 H02E0601 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H02E0701 arc: V00B0000 S1_V02N0201 arc: V00T0000 H02E0201 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02S0701 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 V06S0103 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A0 V02N0701 arc: A2 W1_H02E0501 arc: A3 N1_V02S0701 arc: A4 N1_V02S0101 arc: A5 V00T0100 arc: A6 N1_V02S0301 arc: A7 H00R0000 arc: B2 H02W0101 arc: B3 V02N0301 arc: B4 V01S0000 arc: B5 N1_V02S0501 arc: B6 V00T0000 arc: B7 V00B0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: N1_V01N0001 F5 arc: N1_V01N0101 F3 arc: N1_V02N0001 F2 arc: N3_V06N0203 F4 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C33:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0501 W1_H02E0401 arc: H00L0000 H02E0201 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 H02E0601 arc: V00B0100 H02W0701 arc: V00T0000 V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0701 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 N1_V02S0701 arc: A1 H02E0701 arc: A2 H02W0501 arc: A3 E1_H01E0001 arc: A4 V00T0000 arc: A5 V00T0100 arc: A6 V02N0101 arc: A7 S1_V02N0301 arc: B0 V00B0000 arc: B1 W1_H02E0301 arc: B2 H00L0000 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 H00R0000 arc: B6 V02S0501 arc: B7 H02W0301 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: N1_V01N0001 F5 arc: N1_V02N0201 F2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F6 arc: W1_H02W0001 F0 arc: W1_H02W0501 F7 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C34:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0103 V06N0103 arc: H00L0000 V02S0001 arc: H00L0100 W1_H02E0101 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 H01E0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V02S0701 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A0 H00L0100 arc: A1 V02N0501 arc: A2 V01N0101 arc: A3 V00T0000 arc: A4 S1_V02N0101 arc: A5 H02W0701 arc: A6 E1_H02W0501 arc: A7 H00R0000 arc: B0 H00R0100 arc: B1 V00B0000 arc: B2 V02S0301 arc: B3 H00L0000 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F4 arc: N1_V01N0001 F5 arc: S3_V06S0003 F3 arc: V01S0000 F1 arc: V01S0100 F0 arc: W1_H02W0401 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C35:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0203 N3_V06S0203 arc: H00R0000 V02S0401 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H01W0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 S1_V02N0501 arc: A1 W1_H02E0501 arc: A2 V00B0000 arc: A3 V02S0701 arc: A4 N1_V01S0100 arc: A5 V02S0101 arc: A6 E1_H02W0501 arc: A7 V00T0100 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 V00T0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: S1_V02S0501 F5 arc: S3_V06S0203 F7 arc: V01S0100 F3 arc: W1_H02W0001 F0 arc: W1_H02W0401 F6 arc: W1_H02W0601 F4 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C36:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E3_H06W0203 arc: E3_H06E0203 V01N0001 arc: H00L0000 H02W0201 arc: H00L0100 N1_V02S0101 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: A3 E1_H02W0501 arc: A5 H02E0701 arc: A7 H00L0000 arc: B3 H00R0000 arc: B4 H02E0101 arc: B5 N1_V02S0701 arc: B6 V00B0000 arc: B7 V00B0100 arc: C3 H02E0401 arc: C4 V00T0100 arc: C5 V02N0001 arc: C6 V00T0000 arc: C7 V02N0001 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 S1_V02N0001 arc: D4 H00L0100 arc: D5 V02N0401 arc: D6 H00L0100 arc: D7 V02N0401 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 F7 arc: M2 W1_H02E0601 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: S1_V02S0501 F5 arc: V01S0000 F4 arc: V01S0100 F7 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1100110010100000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110010100000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111110011111010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R28C37:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 N3_V06S0103 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 E1_H02W0501 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 S1_V02N0501 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: B0 E1_H02W0301 arc: B6 H02E0101 arc: C0 E1_H01W0000 arc: C6 V00T0100 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 W1_H02E0201 arc: D6 H02E0001 arc: D7 W1_H02E0001 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: M0 W1_H02E0601 arc: M2 V00B0000 arc: M4 E1_H01E0101 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0003 F0 arc: N3_V06N0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111000000110011 word: SLICEA.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111000000110011 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R28C38:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0003 W1_H02E0301 arc: H00L0100 V02S0101 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06E0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 H02W0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E3_H06W0203 arc: H01W0000 W3_H06E0103 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0303 W3_H06E0303 arc: A1 H00L0100 arc: B1 V00T0000 arc: B5 H02E0301 arc: B6 H02E0301 arc: B7 E1_H02W0301 arc: C1 H02E0601 arc: C3 V02N0401 arc: C4 V02N0201 arc: C5 H02W0401 arc: C6 V02S0201 arc: C7 H02E0601 arc: D1 V01S0100 arc: D3 V01S0100 arc: D4 H00R0100 arc: D5 S1_V02N0601 arc: D6 S1_V02N0601 arc: D7 S1_V02N0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 F1 arc: E1_H02E0101 F3 arc: E1_H02E0401 F4 arc: E1_H02E0601 F6 arc: E1_H02E0701 F5 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0100 F7 arc: N1_V01N0101 F5 arc: V01S0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 0011000011110000 word: SLICED.K0.INIT 1100000000000000 word: SLICED.K1.INIT 1100000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R28C39:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02S0301 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0401 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 H02E0601 arc: V00T0000 N1_V02S0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A0 H00R0000 arc: A2 H02W0701 arc: A3 V00B0000 arc: A4 N1_V02S0101 arc: A5 V00T0000 arc: A6 H02E0501 arc: A7 N1_V01S0100 arc: B2 W1_H02E0101 arc: B3 H00R0100 arc: B4 N1_V01S0000 arc: B5 H01E0101 arc: B6 V02S0501 arc: B7 H02E0101 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q7 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0301 Q3 arc: N3_V06N0203 Q7 arc: W1_H02W0501 Q5 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C3:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 E1_H02W0201 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: H01W0000 Q4 arc: H01W0100 Q6 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q0 arc: S1_V02S0401 Q6 arc: S1_V02S0601 Q4 arc: S3_V06S0003 Q0 arc: V01S0000 Q6 arc: V01S0100 Q0 arc: W1_H02W0401 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R28C40:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N1_V02S0101 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0301 H01E0101 arc: W1_H02W0701 E1_H02W0601 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0301 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A0 H00R0000 arc: A1 V01N0101 arc: A2 H02E0701 arc: A3 N1_V02S0701 arc: A4 H02E0501 arc: A5 S1_V02N0301 arc: A6 V00T0100 arc: A7 H00L0000 arc: B0 V01N0001 arc: B1 V00B0000 arc: B2 H00R0100 arc: B3 V02S0101 arc: B4 V00B0100 arc: B5 V02S0501 arc: B6 V02N0501 arc: B7 V00T0000 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0101 Q3 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q2 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q5 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q1 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C41:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 H01E0001 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0401 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0701 N1_V02S0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0301 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 H00R0000 arc: A1 H02E0501 arc: A2 H00L0100 arc: A3 V01N0101 arc: A4 E1_H02W0701 arc: A5 H02W0501 arc: A6 H02W0701 arc: A7 V00T0100 arc: B0 V02S0101 arc: B1 V00T0000 arc: B2 V02S0301 arc: B3 H02E0301 arc: B4 V02S0501 arc: B5 H02W0101 arc: B6 V00B0000 arc: B7 V00B0000 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V02N0701 Q7 arc: S1_V02S0001 Q0 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0101 Q1 arc: W1_H02W0301 Q3 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C42:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 H01E0001 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: A0 H02W0501 arc: A1 E1_H02W0501 arc: A2 S1_V02N0501 arc: A3 V02N0701 arc: A4 S1_V02N0301 arc: A5 V00T0000 arc: A6 V02N0301 arc: A7 V02N0101 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: CE0 H00L0100 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q1 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C43:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 V01N0101 arc: H00L0000 H02W0001 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00T0000 V02N0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02S0301 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0303 N1_V01S0100 arc: A0 V02S0501 arc: A1 H00L0000 arc: A4 V00B0000 arc: A5 V02S0101 arc: A6 V02N0301 arc: A7 E1_H02W0501 arc: B0 H00R0100 arc: B1 H00R0100 arc: B4 H00R0000 arc: B5 V02N0501 arc: B6 H01E0101 arc: B7 V00T0000 arc: C4 H02E0601 arc: C5 H02E0601 arc: C6 H02E0601 arc: C7 H02E0601 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D4 W1_H02E0001 arc: D5 W1_H02E0001 arc: D6 W1_H02E0001 arc: D7 W1_H02E0001 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: MUXCLK0 CLK0 arc: W1_H02W0501 F7 arc: W1_H02W0701 F5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 1100101010101010 word: SLICEC.K1.INIT 1010110011001100 word: SLICED.K0.INIT 1010110011001100 word: SLICED.K1.INIT 1010110011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C44:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0103 V01N0101 arc: H00L0000 W1_H02E0001 arc: H00R0000 W1_H02E0401 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V01N0001 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 H01E0101 arc: E1_H02E0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 H02W0301 arc: B4 E1_H02W0301 arc: B6 H02W0101 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H02E0601 arc: C4 H02E0601 arc: C6 H02W0601 arc: D0 V00T0100 arc: D1 H00R0000 arc: D2 E1_H02W0001 arc: D3 V02S0001 arc: D4 E1_H01W0100 arc: D5 V02S0401 arc: D6 E1_H01W0100 arc: D7 V02S0401 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F0 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00B0000 arc: N1_V01N0001 F4 arc: V01S0100 F2 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111001100000011 word: SLICEB.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111001100000011 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111110000001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R28C45:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 H01E0001 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0003 V01N0001 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V02S0501 arc: A3 H02E0501 arc: B3 H00R0100 arc: B4 E1_H02W0101 arc: B6 S1_V02N0701 arc: C3 N1_V02S0601 arc: C4 N1_V02S0201 arc: C6 H02W0601 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H02W0201 arc: D4 N1_V02S0401 arc: D5 V02N0401 arc: D6 H02E0001 arc: D7 V02N0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: H01W0100 F1 arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: N1_V02N0301 F1 arc: V01S0000 Q1 arc: W1_H02W0601 F6 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000001111001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000110010001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R28C46:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 H02E0201 arc: H00R0000 H02E0601 arc: H00R0100 S1_V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V01N0101 arc: N1_V02N0701 W3_H06E0203 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 H02E0501 arc: A5 S1_V02N0301 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H00L0000 arc: B3 H00L0000 arc: B4 H02W0301 arc: B5 H00R0000 arc: B6 H02E0101 arc: B7 V01S0000 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00B0100 arc: C5 H02E0401 arc: C6 W1_H02E0601 arc: C7 E1_H01E0101 arc: CLK1 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 S1_V02N0601 arc: D6 E1_H02W0201 arc: D7 V00B0000 arc: E1_H01E0101 Q6 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: LSR1 H02E0301 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: N1_V01N0001 Q6 arc: N1_V02N0401 Q6 arc: N3_V06N0303 Q6 arc: S1_V02S0001 Q0 arc: S1_V02S0201 Q2 arc: S1_V02S0601 Q6 arc: S3_V06S0303 Q6 arc: V01S0000 Q3 arc: V01S0100 Q1 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 1111110000001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R28C47:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 V02S0001 arc: H00L0100 H02E0301 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 H02E0701 arc: V00T0000 V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0203 N1_V01S0000 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A2 S1_V02N0501 arc: A3 S1_V02N0501 arc: A4 W1_H02E0501 arc: A5 S1_V02N0301 arc: A6 E1_H02W0701 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 H02W0301 arc: B5 H00L0000 arc: B6 E1_H02W0301 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V02N0001 arc: C6 S1_V02N0201 arc: C7 E1_H02W0401 arc: CLK1 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 V02N0401 arc: D5 S1_V02N0601 arc: D6 V02S0401 arc: D7 H00R0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q2 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: LSR1 V00T0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0101 F7 arc: N3_V06N0303 F6 arc: S3_V06S0003 Q3 arc: S3_V06S0303 F6 arc: V00B0000 F6 arc: V01S0000 Q1 word: SLICED.K0.INIT 0101010000010000 word: SLICED.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R28C48:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 H01E0101 arc: V00B0000 H02W0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02S0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: A1 N1_V02S0701 arc: A3 H02W0501 arc: A5 V00T0000 arc: B0 V02S0301 arc: B1 H01W0100 arc: B3 H00R0100 arc: B5 V00B0100 arc: B7 V00B0000 arc: C0 E1_H02W0401 arc: C1 E1_H01W0000 arc: C3 N1_V01N0001 arc: C5 W1_H02E0401 arc: C7 E1_H02W0401 arc: D0 W1_H02E0201 arc: D1 H00R0000 arc: D3 F0 arc: D5 H00L0100 arc: D7 H02E0201 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: M2 V00T0100 arc: N1_V01N0001 F5 arc: V00T0100 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011111111000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000010000100001 word: SLICEA.K0.INIT 0011111111000000 word: SLICEA.K1.INIT 0010000000010000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000010010000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R28C49:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V01N0101 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 V01N0101 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0601 arc: V00T0100 H02W0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 V01N0001 arc: A5 E1_H02W0701 arc: B5 W1_H02E0101 arc: B6 V02N0501 arc: C5 V02N0201 arc: C6 V02N0001 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D5 H02E0001 arc: D6 V01N0001 arc: D7 H02W0001 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q2 arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: M0 V00T0100 arc: M2 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000001001000001 word: SLICED.K0.INIT 0000001111001111 word: SLICED.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R28C4:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: H00R0100 H02W0701 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0101 V01N0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 H01E0101 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0101 arc: V00T0100 E1_H02W0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 S1_V02N0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: H01W0000 Q0 arc: H01W0100 Q0 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 V00T0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: S1_V02S0401 Q6 arc: S1_V02S0601 Q4 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 arc: V01S0000 Q2 arc: V01S0100 Q6 arc: W1_H02W0001 Q2 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R28C50:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: H00L0000 V02N0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H06E0303 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0301 W3_H06E0003 arc: A3 S1_V02N0701 arc: B0 E1_H02W0101 arc: B1 V00T0000 arc: B2 V02S0101 arc: B3 H00R0100 arc: B4 E1_H02W0301 arc: B5 V02S0501 arc: B6 H02E0101 arc: C0 N1_V01S0100 arc: C1 H00L0000 arc: C2 H02E0401 arc: C3 E1_H02W0401 arc: C4 H02W0601 arc: C5 V02N0201 arc: C6 E1_H01E0101 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 H02W0001 arc: D4 V02N0601 arc: D5 H02E0001 arc: D6 H02E0201 arc: D7 F2 arc: E1_H01E0001 F4 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F5 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q4 arc: S3_V06S0003 F0 arc: V00T0000 Q0 arc: V01S0000 F1 arc: W1_H02W0001 F2 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 1100110000001111 word: SLICEB.K1.INIT 0000000010101100 word: SLICEC.K0.INIT 1100110000001111 word: SLICEC.K1.INIT 0000111100001100 word: SLICEA.K0.INIT 1100110000001111 word: SLICEA.K1.INIT 0000111100001100 word: SLICED.K0.INIT 1111110011110000 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R28C51:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 N1_V01S0100 arc: H00L0100 V02S0301 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 N1_V02S0301 arc: V00T0100 E1_H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: N3_V06N0003 W3_H06E0003 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0601 Q6 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: M0 H02W0601 arc: M2 V00T0100 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R28C52:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 E1_H01W0000 arc: N1_V02N0401 H02E0401 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 N3_V06S0303 arc: H01W0000 W3_H06E0103 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: E1_H02E0201 Q2 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 Q0 arc: S3_V06S0203 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R28C53:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 W1_H02E0601 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02S0301 arc: H01W0000 W3_H06E0103 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: B0 V00B0000 arc: B1 V00B0000 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q2 arc: S3_V06S0103 F1 arc: V00B0000 Q6 arc: V01S0000 Q2 arc: V01S0100 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100001100111100 word: SLICEA.K1.INIT 1111110011000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R28C54:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 V02S0001 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H06E0203 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0601 N3_V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 E1_H02W0301 arc: B5 E1_H02W0301 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00T0100 arc: C5 V00T0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V02N0401 arc: D5 V02N0401 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 F3 arc: V01S0100 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100001100111100 word: SLICEB.K1.INIT 1111110011000000 word: SLICEC.K0.INIT 1100001100111100 word: SLICEC.K1.INIT 1111110011000000 word: SLICEA.K0.INIT 1100001100111100 word: SLICEA.K1.INIT 1111110011000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R28C55:PLC2 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V02S0601 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02E0001 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 H01E0101 arc: V00B0000 V02S0001 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V01S0100 N3_V06S0303 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: H01W0100 Q2 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R28C56:PLC2 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02W0001 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 S1_V02N0701 arc: N3_V06N0203 H06W0203 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02S0201 arc: V00B0100 H02E0501 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q0 arc: S1_V02S0601 Q4 arc: V01S0000 Q2 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R28C57:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 V02S0001 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 H06E0103 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 N1_V02S0201 arc: V00B0100 E1_H02W0701 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V02S0001 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: M0 E1_H02W0601 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q0 arc: S1_V02S0201 Q2 arc: S3_V06S0303 Q6 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C58:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 H02W0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06E0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 H02E0301 arc: A1 H00L0100 arc: A5 V00T0000 arc: B1 E1_H01W0100 arc: B5 V01S0000 arc: C1 E1_H01W0000 arc: C3 H00L0000 arc: C5 V00T0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D3 F0 arc: D5 H02W0001 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0000 Q6 arc: H01W0100 F4 arc: M0 E1_H02W0601 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: N3_V06N0003 F3 arc: V01S0000 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1111111110000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R28C59:PLC2 arc: V00B0000 V02S0001 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02E0701 arc: A2 V00B0000 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 H02E0101 arc: B6 V01S0000 arc: B7 V00B0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 Q5 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V00B0100 Q7 arc: V01S0000 Q6 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0401 Q6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C5:PLC2 arc: H00L0100 V02S0301 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02N0001 arc: V00T0000 V02N0601 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A7 N1_V01S0100 arc: B7 V02N0701 arc: C7 V01N0101 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: N3_V06N0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1110101011000000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R28C60:PLC2 arc: W1_H02W0601 H01E0001 arc: E3_H06E0003 W3_H06E0003 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R28C65:PLC2 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 .tile R28C66:PLC2 arc: E3_H06E0103 W3_H06E0003 .tile R28C69:PLC2 arc: E1_H02E0101 V06S0103 arc: S3_V06S0103 H06E0103 .tile R28C6:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 V02S0701 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0301 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0103 N3_V06S0103 arc: A3 V02S0701 arc: A7 V00T0100 arc: B3 H02W0301 arc: B7 H02W0301 arc: C3 H00L0000 arc: C7 S1_V02N0001 arc: CE0 V02N0201 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 V02S0201 arc: D7 H00L0100 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: E1_H02E0201 F2 arc: E1_H02E0401 F6 arc: E3_H06E0103 F2 arc: E3_H06E0303 F6 arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: H01W0100 F2 arc: M0 H02W0601 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F6 arc: N1_V02N0001 F2 arc: N1_V02N0201 F2 arc: N3_V06N0103 F2 arc: N3_V06N0303 F6 arc: S1_V02S0201 Q0 arc: S3_V06S0303 F6 arc: V01S0000 F6 arc: V01S0100 Q4 arc: W1_H02W0401 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0010000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R28C70:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 .tile R28C7:PLC2 arc: H00L0000 H02E0001 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 H01E0101 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V02S0601 arc: W3_H06W0103 E3_H06W0103 arc: A5 H02E0701 arc: B5 V00B0100 arc: C5 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 E1_H02W0001 arc: E1_H01E0001 F4 arc: E3_H06E0203 F4 arc: F4 F5C_SLICE arc: H00R0000 F4 arc: H01W0000 F4 arc: H01W0100 F4 arc: M0 E1_H02W0601 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0601 F4 arc: N3_V06N0103 Q2 arc: N3_V06N0203 F4 arc: S1_V02S0001 Q0 arc: S1_V02S0401 F4 arc: S3_V06S0103 Q2 arc: S3_V06S0203 F4 arc: V01S0100 F4 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000001000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R28C8:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V02S0401 arc: H00L0000 W1_H02E0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 H06E0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H01E0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02W0601 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 N3_V06S0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q2 arc: H01W0000 Q0 arc: H01W0100 Q6 arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 Q0 arc: V01S0000 Q6 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R28C9:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: H00L0000 E1_H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H06E0303 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 H06E0303 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0303 E1_H01W0100 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: B1 H01W0100 arc: B2 H00R0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 V02N0001 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H00R0000 Q4 arc: H01W0100 Q4 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0000 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 F1 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100010000110001 word: SLICEB.K0.INIT 1100010000110001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R29C10:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00T0100 V02N0501 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: A1 H02E0501 arc: A2 H02E0501 arc: B1 H02E0101 arc: B2 H02E0101 arc: C1 H00L0000 arc: C2 H00L0000 arc: CE2 N1_V02S0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: M0 H02W0601 arc: M1 H00R0100 arc: M2 H02W0601 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000101011001111 word: SLICEB.K0.INIT 1000101011001111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R29C11:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 N1_V02S0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0601 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0601 H01E0001 arc: N1_V02N0201 W3_H06E0103 arc: N3_V06N0103 W3_H06E0103 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 N1_V01N0101 arc: B2 N1_V02S0301 arc: B3 N1_V02S0301 arc: B4 H02E0101 arc: B5 H00R0000 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 V02S0201 arc: C5 V00T0000 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 V01S0100 arc: D4 H00L0100 arc: D5 V02S0401 arc: D7 V02S0401 arc: E1_H02E0201 F2 arc: E1_H02E0501 F5 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR1 V00B0000 arc: M2 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: V01S0100 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 1111111100101010 word: SLICEC.K1.INIT 1100000011001100 word: SLICEB.K0.INIT 0000000000110001 word: SLICEB.K1.INIT 0000000011000100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R29C12:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 N1_V01S0000 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 E1_H02W0301 arc: V01S0000 N3_V06S0103 arc: N3_V06N0003 W3_H06E0003 arc: A1 V01N0101 arc: A3 H00L0100 arc: A4 V00T0100 arc: A5 N1_V01N0101 arc: A6 E1_H02W0501 arc: A7 H02E0701 arc: B1 V02S0101 arc: B3 V02N0301 arc: B4 H02W0101 arc: B5 H00R0000 arc: B6 H02W0101 arc: B7 H02E0301 arc: C1 H00L0000 arc: C3 N1_V01N0001 arc: C4 E1_H01E0101 arc: C5 H02E0401 arc: C6 H02W0401 arc: C7 V00B0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D3 H02W0001 arc: D4 V02N0401 arc: D5 E1_H01W0100 arc: D6 V01N0001 arc: D7 H02E0201 arc: E1_H01E0101 F2 arc: E1_H02E0701 F7 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR1 V00B0000 arc: M2 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q4 arc: N3_V06N0303 F5 arc: S3_V06S0303 Q6 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000100000 word: SLICEC.K0.INIT 1011000010111011 word: SLICEC.K1.INIT 1001000000000000 word: SLICED.K0.INIT 1011101110001011 word: SLICED.K1.INIT 1001000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111011101110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R29C13:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 V02N0201 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H01W0000 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: A0 E1_H02W0701 arc: A1 E1_H01E0001 arc: A2 H02W0701 arc: A3 V02S0701 arc: A4 V02N0101 arc: A5 N1_V01N0101 arc: A7 V02S0301 arc: B0 H00R0100 arc: B1 V02S0101 arc: B2 F1 arc: B3 S1_V02N0301 arc: B4 V02S0501 arc: B5 H02E0101 arc: B7 V02S0701 arc: C0 E1_H02W0601 arc: C1 H02E0401 arc: C2 N1_V01N0001 arc: C3 H00L0000 arc: C4 V00T0100 arc: C5 V02N0001 arc: C7 S1_V02N0201 arc: CE0 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 H00R0000 arc: D2 V00B0100 arc: D3 H02W0201 arc: D4 V02N0601 arc: D5 V00B0000 arc: D7 V02N0401 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F3 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q4 arc: N3_V06N0203 Q4 arc: W1_H02W0501 F5 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010001011110011 word: SLICEA.K0.INIT 1011101110001011 word: SLICEA.K1.INIT 1010010100100001 word: SLICEC.K0.INIT 1011101110001011 word: SLICEC.K1.INIT 1001000000001001 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 1000101011001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R29C14:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 H01E0101 arc: W3_H06W0203 E3_H06W0203 arc: A1 V02N0701 arc: B1 V02S0301 arc: B2 H00L0000 arc: B4 H02E0101 arc: B6 V01S0000 arc: C1 H02E0401 arc: C2 E1_H02W0601 arc: C4 E1_H02W0601 arc: C6 H02E0601 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 H02W0001 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 H02W0001 arc: D7 N1_V02S0401 arc: E1_H01E0101 Q4 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: H01W0100 Q4 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: N1_V02N0401 Q4 arc: S1_V02S0301 F1 arc: V01S0000 Q6 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R29C15:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E3_H06W0203 arc: A1 V02S0501 arc: A7 H02E0701 arc: B1 S1_V02N0101 arc: B6 V00T0000 arc: B7 V00B0000 arc: C1 H00L0000 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D6 H00R0100 arc: D7 H02W0201 arc: E1_H01E0101 F7 arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q4 arc: M2 V00B0100 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q2 arc: N1_V02N0401 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000100000 word: SLICED.K0.INIT 0011000011110000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R29C16:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02E0201 arc: H00L0100 H02W0101 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 E3_H06W0003 arc: A0 E1_H02W0701 arc: A1 E1_H01E0001 arc: A6 E1_H02W0501 arc: B0 H00R0100 arc: B1 E1_H02W0301 arc: B6 V00T0000 arc: C0 H00L0100 arc: C1 H00L0000 arc: C5 E1_H02W0401 arc: C6 H02E0601 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02N0001 arc: D5 H00R0100 arc: D6 V02N0401 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q2 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 V00B0100 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F5 arc: N3_V06N0003 Q0 arc: N3_V06N0303 Q6 arc: W1_H02W0101 F1 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 1011101100001011 word: SLICEA.K1.INIT 1011000010111011 word: SLICED.K0.INIT 1111111110001111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R29C17:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: E3_H06E0003 H01E0001 arc: H00L0100 V02N0101 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02E0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A4 V00T0000 arc: A5 H02E0701 arc: A6 E1_H02W0501 arc: A7 N1_V01N0101 arc: B4 V00B0100 arc: B5 H02W0101 arc: B6 V00B0100 arc: B7 H02W0101 arc: C4 V00T0100 arc: C5 H02E0401 arc: C6 V00T0100 arc: C7 H02W0601 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 H00L0100 arc: D6 H01W0000 arc: D7 E1_H02W0201 arc: E1_H01E0101 Q2 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 F7 arc: H01W0100 Q4 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q2 arc: W1_H02W0601 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111110000000 word: SLICEC.K1.INIT 0000000011001010 word: SLICED.K0.INIT 1111111110000000 word: SLICED.K1.INIT 0000000011001010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R29C18:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02W0001 arc: H00L0100 V02N0301 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H01E0101 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 W1_H02E0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: B4 H00R0000 arc: B6 V01S0000 arc: C4 V00B0100 arc: C6 V00B0100 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 H00L0100 arc: D5 H02E0201 arc: D6 H00R0100 arc: D7 H02E0201 arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0100 Q6 arc: M0 V00T0000 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: S1_V02S0201 Q2 arc: S1_V02S0401 Q4 arc: V01S0000 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R29C19:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V02S0301 arc: H00L0000 V02N0201 arc: H00R0000 E1_H02W0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H01W0100 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 H00L0000 arc: A2 E1_H02W0501 arc: B2 H02W0301 arc: B3 E1_H02W0301 arc: B4 V00B0100 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 V00B0000 arc: E3_H06E0003 F3 arc: E3_H06E0103 F2 arc: E3_H06E0303 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V02N0401 F6 arc: N1_V02N0701 F7 arc: N3_V06N0203 F4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C20:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 V06N0303 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H02W0501 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: B0 V00B0000 arc: B1 V00T0000 arc: B2 E1_H02W0301 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 H00R0000 arc: B6 S1_V02N0701 arc: B7 V02S0701 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: N1_V01N0101 F5 arc: N1_V02N0301 F1 arc: V01S0000 F0 arc: W1_H02W0601 F4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C21:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 W1_H02E0601 arc: H00R0000 H02W0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: B0 E1_H02W0101 arc: B1 E1_H02W0301 arc: B2 H00R0100 arc: B3 S1_V02N0301 arc: B4 H00R0000 arc: B5 W1_H02E0301 arc: B6 V00B0000 arc: B7 V00T0000 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F1 arc: N1_V01N0001 F5 arc: S1_V02S0001 F0 arc: V01S0000 F4 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C22:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 N3_V06S0003 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0303 E3_H06W0203 arc: B0 V00B0000 arc: B1 H02E0101 arc: B2 H00R0100 arc: B3 S1_V02N0301 arc: B4 W1_H02E0301 arc: B5 V00B0100 arc: B6 V02N0701 arc: B7 V00T0000 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: S1_V02S0401 F6 arc: V01S0000 F3 arc: W1_H02W0201 F0 arc: W1_H02W0501 F5 arc: W1_H02W0701 F7 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C23:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0003 E3_H06W0003 arc: A3 V00T0000 arc: A4 E1_H02W0701 arc: B3 V02S0101 arc: B4 N1_V01S0000 arc: B6 V01S0000 arc: C2 V02S0401 arc: C3 H00L0100 arc: C4 E1_H01E0101 arc: C6 H02W0401 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 H02E0001 arc: D6 V00B0000 arc: D7 H02W0201 arc: E1_H01E0101 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F2 arc: M4 H02E0401 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: N1_V02N0601 Q6 arc: V01S0000 Q6 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C24:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 N3_V06S0203 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0301 W3_H06E0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: A4 V00T0000 arc: A5 V00B0000 arc: B0 F1 arc: B2 H02E0301 arc: B3 V02S0101 arc: B4 H00R0000 arc: B5 V02S0701 arc: B6 E1_H02W0101 arc: C0 V02N0401 arc: C1 H00L0100 arc: C2 N1_V01N0001 arc: C3 H02W0401 arc: C4 V00T0100 arc: C5 V00B0100 arc: C6 H02W0601 arc: C7 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02W0201 arc: D2 V02S0201 arc: D3 V02N0201 arc: D4 H00R0100 arc: D5 V02N0601 arc: D6 H02W0001 arc: D7 H01W0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 F6 arc: H01W0100 F0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q4 arc: N1_V02N0601 F6 arc: N3_V06N0103 F2 arc: V00B0000 Q4 word: SLICEC.K0.INIT 1111111110000000 word: SLICEC.K1.INIT 0000000011001010 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0011111100000000 word: SLICEB.K1.INIT 1100000000000000 word: SLICED.K0.INIT 1100000000000000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R29C25:PLC2 arc: E1_H02E0101 V01N0101 arc: H00L0000 H02W0001 arc: H00R0000 H02W0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0701 V02S0701 arc: N1_V02N0201 W3_H06E0103 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0303 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A1 E1_H02W0501 arc: A2 S1_V02N0501 arc: A3 E1_H02W0501 arc: A4 V02S0301 arc: A6 V02S0101 arc: A7 H00R0000 arc: B0 V00T0000 arc: B1 H02W0101 arc: B2 S1_V02N0301 arc: B3 H02W0101 arc: B4 E1_H02W0301 arc: B6 V00B0100 arc: B7 V01S0000 arc: C0 H00L0100 arc: C1 S1_V02N0601 arc: C2 H02W0601 arc: C3 S1_V02N0601 arc: C4 V00T0100 arc: C5 H02W0401 arc: C6 V01N0101 arc: C7 E1_H02W0401 arc: D0 S1_V02N0201 arc: D1 E1_H02W0001 arc: D2 W1_H02E0001 arc: D3 E1_H02W0001 arc: D4 V02N0601 arc: D5 H01W0000 arc: D6 V00B0000 arc: D7 E1_H01W0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F3 arc: E1_H02E0001 F0 arc: E1_H02E0301 F1 arc: E1_H02E0501 F7 arc: E1_H02E0601 F4 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 F4 arc: H01W0100 F3 arc: N1_V01N0001 F5 arc: N1_V01N0101 F1 arc: N1_V02N0401 F4 arc: N3_V06N0103 F1 arc: N3_V06N0203 F7 arc: S1_V02S0001 F2 arc: S1_V02S0401 F6 arc: S1_V02S0701 F5 arc: S3_V06S0103 F1 arc: V01S0000 F4 arc: V01S0100 F7 arc: W1_H02W0101 F1 arc: W1_H02W0501 F5 arc: W1_H02W0601 F4 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0100000000000000 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0001010100111111 word: SLICEA.K1.INIT 0100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R29C26:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V01N0001 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02E0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 N3_V06S0203 arc: E1_H02E0601 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 V02N0701 arc: A1 V02S0701 arc: A3 V00T0000 arc: A5 E1_H02W0501 arc: A6 V02S0301 arc: A7 V00T0100 arc: B0 V02N0101 arc: B1 E1_H01W0100 arc: B3 H00R0000 arc: B4 V02S0501 arc: B5 E1_H02W0101 arc: B6 V00B0000 arc: B7 S1_V02N0501 arc: C0 N1_V01N0001 arc: C1 E1_H02W0601 arc: C3 H00L0000 arc: C4 E1_H01E0101 arc: C5 H02E0601 arc: C6 H01E0001 arc: C7 V00B0100 arc: D0 V02N0001 arc: D1 V01S0100 arc: D3 H02W0201 arc: D4 H02E0001 arc: D5 H01W0000 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F5 arc: E1_H02E0701 F5 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F3 arc: H01W0100 F3 arc: N1_V01N0001 F1 arc: N1_V01N0101 F5 arc: N1_V02N0101 F1 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0301 F1 arc: S1_V02S0501 F5 arc: V00T0100 F1 arc: V01S0000 F0 arc: V01S0100 F3 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000010000 word: SLICED.K0.INIT 0000101100000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0001010100111111 word: SLICEA.K1.INIT 0100000000000000 word: SLICEC.K0.INIT 0011111100000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 .tile R29C27:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02W0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 E1_H02W0601 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H01W0100 arc: E1_H02E0301 W3_H06E0003 arc: W3_H06W0203 V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: A1 E1_H02W0501 arc: A3 H02W0701 arc: A4 V02S0101 arc: A5 E1_H01W0000 arc: B1 V00T0000 arc: B3 H00L0000 arc: B4 V02S0701 arc: B5 F1 arc: B7 V00T0000 arc: C1 E1_H02W0401 arc: C3 V02S0401 arc: C4 V00B0100 arc: C5 V00T0100 arc: C6 V02N0201 arc: C7 E1_H02W0401 arc: D1 H00R0000 arc: D3 V02N0001 arc: D4 H00L0100 arc: D5 V01N0001 arc: D6 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 F5 arc: E1_H01E0101 F4 arc: E1_H02E0401 F6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F1 arc: M2 N1_V01N0001 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: N1_V02N0001 F2 arc: N1_V02N0101 F1 arc: N3_V06N0303 F5 arc: S1_V02S0501 F5 arc: V00B0100 F5 arc: V01S0000 F6 arc: W1_H02W0601 F6 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000100000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000001100000000 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 0100000000000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0010111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R29C28:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0103 V06N0103 arc: H00L0000 H02W0201 arc: H00R0000 N1_V02S0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 H06E0103 arc: N3_V06N0303 H01E0101 arc: S1_V02S0101 H06E0103 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0701 W3_H06E0203 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A3 V00B0000 arc: B3 H00L0000 arc: C3 H02W0601 arc: CE0 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D3 E1_H02W0201 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: F3 F3_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: N3_V06N0003 Q0 arc: N3_V06N0203 Q4 arc: V00B0000 Q6 arc: V01S0000 Q0 arc: V01S0100 F3 arc: W1_H02W0001 Q0 arc: W1_H02W0301 F3 arc: W1_H02W0401 Q6 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R29C29:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0303 N3_V06S0303 arc: H00R0100 V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H02W0301 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 E3_H06W0203 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: B3 H00L0000 arc: C3 N1_V01N0001 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: E1_H01E0001 Q4 arc: E1_H02E0401 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: F3 F3_SLICE arc: H00L0000 Q0 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 F3 arc: M0 V00B0000 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: V01S0000 F3 arc: W1_H02W0001 Q0 arc: W1_H02W0101 F3 arc: W1_H02W0201 Q0 arc: W1_H02W0401 Q4 arc: W1_H02W0601 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R29C2:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02S0601 arc: H00R0000 V02S0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02N0001 arc: V00T0000 H02W0001 arc: A0 E1_H02W0701 arc: A1 E1_H02W0701 arc: A6 E1_H02W0701 arc: A7 E1_H02W0701 arc: B0 E1_H02W0301 arc: B1 E1_H02W0101 arc: B6 E1_H02W0301 arc: B7 E1_H02W0101 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C6 E1_H02W0401 arc: C7 E1_H02W0401 arc: D0 V02N0001 arc: D1 V02N0001 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H02E0001 arc: M6 V00T0000 word: SLICEA.K0.INIT 0000100000001010 word: SLICEA.K1.INIT 1000000010100000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000100000001010 word: SLICED.K1.INIT 1000000010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R29C30:PLC2 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02W0001 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0001 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 E1_H02W0601 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: C1 N1_V01N0001 arc: CE1 H02E0101 arc: CE2 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: V01S0100 Q2 arc: W1_H02W0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R29C31:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 N1_V02S0101 arc: H00R0100 N1_V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H06W0303 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 N3_V06S0203 arc: N3_V06N0103 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02S0501 arc: A1 E1_H02W0701 arc: A3 S1_V02N0701 arc: A4 V02S0301 arc: A5 H02E0501 arc: A6 E1_H02W0501 arc: B0 H02W0301 arc: B1 N1_V02S0101 arc: B3 H00R0100 arc: B4 H02W0301 arc: B5 N1_V02S0501 arc: B6 V00B0100 arc: C0 H00L0100 arc: C1 N1_V01N0001 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 V00B0100 arc: C6 F4 arc: D0 S1_V02N0201 arc: D1 E1_H02W0201 arc: D3 V00T0100 arc: D4 V00B0000 arc: D5 S1_V02N0601 arc: D6 H01W0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: H01W0100 F0 arc: M6 V00T0000 arc: N1_V01N0001 F3 arc: W1_H02W0301 F1 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 0000100000000000 word: SLICEC.K1.INIT 0000001000000000 word: SLICEA.K0.INIT 0000100000000000 word: SLICEA.K1.INIT 0000000000000111 word: SLICED.K0.INIT 0000000000000111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R29C32:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 H06E0303 arc: V00B0000 E1_H02W0401 arc: V00T0000 H02E0001 arc: V00T0100 H02E0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 E1_H02W0301 arc: N3_V06N0303 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H02W0501 arc: A3 S1_V02N0701 arc: A4 E1_H02W0701 arc: A5 S1_V02N0101 arc: A7 V02N0301 arc: B0 H02E0101 arc: B2 H00R0100 arc: B3 H02E0101 arc: B4 V02S0501 arc: B5 H00L0000 arc: B6 S1_V02N0501 arc: B7 H02E0101 arc: C0 F4 arc: C2 S1_V02N0401 arc: C3 H02E0601 arc: C4 V00T0100 arc: C5 V00T0100 arc: C6 V00T0000 arc: C7 H02E0601 arc: D0 V02S0001 arc: D2 H00R0000 arc: D3 V02N0001 arc: D4 H02E0201 arc: D5 H00L0100 arc: D6 V00B0000 arc: D7 H00L0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: N1_V01N0001 F5 arc: V00B0100 F7 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 0000000000000010 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 0000100000000000 word: SLICEC.K1.INIT 0000001000000000 word: SLICEA.K0.INIT 0000000000000111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C33:PLC2 arc: E1_H02E0501 V06N0303 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 V02N0201 arc: H00L0100 V02S0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02N0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02N0401 arc: V00T0100 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0301 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A2 V02S0701 arc: A3 H00L0100 arc: A7 V00T0100 arc: B1 E1_H02W0101 arc: B2 F3 arc: B3 H02E0301 arc: B4 V02N0701 arc: B6 N1_V02S0701 arc: B7 V00B0000 arc: C1 H02E0601 arc: C2 H00R0100 arc: C3 H00L0000 arc: C4 V00B0100 arc: C6 N1_V02S0001 arc: C7 V00T0000 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D2 V01S0100 arc: D3 W1_H02E0201 arc: D4 H02E0001 arc: D5 H02W0201 arc: D6 E1_H02W0001 arc: D7 H02E0001 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 Q1 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: N3_V06N0103 Q1 arc: S3_V06S0103 Q1 arc: V01S0100 F4 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000100000000 word: SLICEB.K1.INIT 0000100000000000 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 1111001111111111 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R29C34:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 V06S0303 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 V02S0301 arc: V00T0100 H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02S0701 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: CE0 V02S0201 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: E3_H06E0303 Q6 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: S1_V02S0401 Q6 arc: V00T0000 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0601 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C35:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V06S0203 arc: H00L0100 H02W0301 arc: H00R0100 E1_H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 H02W0501 arc: V00T0000 H02W0201 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V06N0103 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V01S0100 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: H01W0000 Q6 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 E1_H01E0101 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q4 arc: W1_H02W0401 Q4 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R29C36:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02W0201 arc: H00L0100 V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: V00B0100 N1_V02S0101 arc: V00T0100 H02E0101 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 N1_V02S0501 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: A7 V02N0301 arc: B7 N1_V01S0000 arc: C7 N1_V02S0001 arc: CE0 H00L0100 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0101 Q4 arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: V00B0000 Q4 arc: W1_H02W0201 Q2 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 1111110011111010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 .tile R29C37:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0303 V06S0303 arc: H00L0000 V02N0001 arc: H00L0100 W1_H02E0301 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 V06S0203 arc: E1_H01E0101 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: B4 V00B0100 arc: C4 V00T0100 arc: CE0 H00L0000 arc: CE1 H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 V02N0401 arc: D5 H00L0100 arc: E1_H01E0001 Q2 arc: E3_H06E0103 Q2 arc: F4 F5C_SLICE arc: H01W0000 Q6 arc: M0 H02W0601 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 Q0 arc: V01S0000 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000000110011 word: SLICEC.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R29C38:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02W0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0601 H01E0001 arc: W1_H02W0101 W3_H06E0103 arc: A1 V02S0701 arc: B0 H02E0101 arc: B1 V02N0301 arc: B2 H00L0000 arc: B4 S1_V02N0701 arc: B5 S1_V02N0701 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 N1_V01N0001 arc: C1 H00R0100 arc: C2 E1_H01W0000 arc: C4 H02W0401 arc: C5 S1_V02N0201 arc: C6 H02W0401 arc: C7 S1_V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02W0001 arc: D2 V02S0001 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 V00B0000 arc: D6 N1_V02S0601 arc: D7 V00B0000 arc: E3_H06E0203 F7 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M2 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N3_V06N0003 F0 arc: S1_V02S0001 F2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 0000000011111100 word: SLICEA.K0.INIT 0000000011110011 word: SLICEA.K1.INIT 1001010001001111 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000000011111100 word: SLICEB.K0.INIT 1111000000110011 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R29C39:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 H02W0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0701 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02S0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: A5 V02N0301 arc: A7 E1_H02W0701 arc: B4 H00L0000 arc: B5 V00B0100 arc: B7 V00B0000 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 E1_H01E0101 arc: C5 V02N0201 arc: C7 N1_V02S0001 arc: D0 H02W0201 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 V02N0401 arc: D7 H00L0100 arc: E1_H01E0101 F5 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: N1_V01N0001 F7 arc: N3_V06N0303 F5 arc: S1_V02S0101 F3 arc: S1_V02S0501 F5 arc: V01S0100 F2 arc: W1_H02W0101 F1 arc: W3_H06W0203 F4 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100010010000000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0011000011110000 word: SLICEC.K1.INIT 1000001110000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R29C3:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0201 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 N3_V06S0003 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0601 H01E0001 arc: A1 N1_V02S0501 arc: A2 V00T0000 arc: A5 H02W0701 arc: A6 N1_V01S0100 arc: B1 V02S0101 arc: B2 H00R0000 arc: B5 H00L0000 arc: B6 V02S0701 arc: C1 H00R0100 arc: C2 H00R0100 arc: C5 H02E0401 arc: C6 V02N0201 arc: C7 H02W0601 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D5 H01W0000 arc: D6 V02N0601 arc: D7 E1_H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M2 V00T0100 arc: M4 V00B0000 arc: V00B0000 F6 word: SLICED.K0.INIT 1000110010101111 word: SLICED.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000110010101111 word: SLICEB.K0.INIT 1000110010101111 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000010001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R29C40:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 H02W0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 W1_H02E0501 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V06S0203 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A0 H02E0701 arc: B0 H02W0301 arc: B2 H00R0000 arc: B3 H02E0301 arc: C0 V02S0401 arc: C1 H00L0100 arc: C2 H00L0000 arc: C3 H02E0401 arc: C4 H02W0601 arc: C5 H02W0601 arc: C6 H02W0601 arc: C7 H02W0601 arc: D0 V02N0001 arc: D1 H02E0001 arc: D2 V00B0100 arc: D3 H02W0201 arc: D4 V00B0000 arc: D5 E1_H02W0201 arc: D6 V02S0601 arc: D7 V02N0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M2 V00T0100 arc: N1_V01N0001 F1 arc: N1_V01N0101 F0 arc: N1_V02N0201 F2 arc: N3_V06N0103 F2 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 arc: S1_V02S0701 F7 arc: S3_V06S0103 F2 arc: V01S0100 F5 word: SLICEA.K0.INIT 1110001010101010 word: SLICEA.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1100111111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R29C41:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02S0301 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 N1_V02S0001 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 S1_V02N0701 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 N1_V01S0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A2 V02S0701 arc: A3 H02E0701 arc: A6 S1_V02N0101 arc: A7 V00T0100 arc: B2 V02N0301 arc: B3 H00L0000 arc: B6 H02W0101 arc: B7 V01S0000 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 E1_H02W0601 arc: C5 E1_H02W0601 arc: C6 V02S0201 arc: C7 V00T0000 arc: D0 H02W0001 arc: D1 E1_H02W0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 N1_V02S0601 arc: D5 V02N0601 arc: D6 V00B0000 arc: D7 S1_V02N0601 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: N1_V01N0101 F2 arc: N1_V02N0301 F3 arc: N3_V06N0203 F7 arc: N3_V06N0303 F6 arc: S1_V02S0301 F1 arc: S1_V02S0501 F5 arc: S3_V06S0303 F6 arc: V01S0000 F6 arc: V01S0100 F0 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 1010110011001100 word: SLICEB.K1.INIT 1100101010101010 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0010001100100000 word: SLICED.K1.INIT 1101000010000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R29C42:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 E1_H02W0601 arc: V00T0100 H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0701 H01E0101 arc: E1_H02E0001 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0303 N1_V01S0100 arc: W3_H06W0203 E3_H06W0203 arc: A1 H02E0501 arc: B1 V02N0101 arc: B2 H01W0100 arc: B3 H01W0100 arc: B7 V02S0701 arc: C0 N1_V01N0001 arc: C1 H00R0100 arc: C2 H00L0000 arc: C3 H00L0000 arc: C6 V00B0100 arc: C7 H02E0401 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 W1_H02E0001 arc: D2 N1_V02S0201 arc: D3 H02W0201 arc: D6 V00B0000 arc: D7 H02E0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q4 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q4 arc: M0 H02E0601 arc: M2 V00T0100 arc: M4 W1_H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F0 arc: N1_V02N0601 Q4 arc: S3_V06S0203 Q4 arc: V00B0100 Q7 arc: V01S0100 F6 arc: W1_H02W0001 F2 arc: W1_H02W0501 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0011000000110011 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1010101000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R29C43:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 V06S0103 arc: H00L0000 H02W0001 arc: H00L0100 V02N0301 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0501 arc: V00T0100 W1_H02E0301 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E3_H06W0203 arc: N1_V02N0201 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: A2 V02N0501 arc: A3 W1_H02E0501 arc: A6 H02W0701 arc: A7 N1_V01N0101 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 F3 arc: B3 H02W0301 arc: B4 H01E0101 arc: B5 H01E0101 arc: B6 H02W0101 arc: B7 V00B0000 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H00R0100 arc: C3 V02N0401 arc: C4 E1_H02W0401 arc: C5 V02N0201 arc: C6 H02E0601 arc: C7 V02S0201 arc: D0 V02S0001 arc: D1 V00B0100 arc: D2 S1_V02N0001 arc: D3 N1_V02S0201 arc: D4 H02W0001 arc: D5 H00L0100 arc: D6 F2 arc: D7 E1_H01W0100 arc: E1_H01E0101 F7 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F0 arc: M0 V00T0100 arc: M4 V00T0100 arc: N1_V01N0101 F3 arc: N1_V02N0101 F3 arc: N3_V06N0003 F0 arc: S3_V06S0003 F0 arc: W1_H02W0001 F0 arc: W3_H06W0003 F3 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0000000000001101 word: SLICED.K1.INIT 1000011001011101 word: SLICEB.K0.INIT 1101000010000000 word: SLICEB.K1.INIT 0000101000001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111110000001100 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111110000001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R29C44:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0601 arc: V00T0000 N1_V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 S3_V06N0203 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: A3 V02N0701 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 H00R0100 arc: B3 V02N0101 arc: B5 V02N0501 arc: B6 H02E0101 arc: B7 H02E0101 arc: C0 V02N0601 arc: C1 H00L0000 arc: C2 N1_V01S0100 arc: C3 V02S0601 arc: C4 V00B0100 arc: C5 V00T0000 arc: C6 N1_V02S0201 arc: C7 V02N0201 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V00T0100 arc: D2 W1_H02E0001 arc: D3 V02N0001 arc: D4 H02E0001 arc: D5 V02N0401 arc: D6 H00L0100 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0701 Q5 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F6 arc: M0 H02E0601 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: N3_V06N0003 F0 arc: N3_V06N0203 F4 arc: V00B0100 Q5 arc: V01S0000 Q5 arc: V01S0100 Q2 arc: W1_H02W0201 F0 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1010110011001100 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1111110000110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111110000001100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111110000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R29C45:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 H01E0101 arc: H00L0000 H02W0001 arc: H00L0100 W1_H02E0301 arc: H00R0100 S1_V02N0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: V00T0100 H02E0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: E1_H02E0201 W3_H06E0103 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A4 V02S0101 arc: A5 V02N0101 arc: A6 H02E0701 arc: A7 H00R0000 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H02W0101 arc: B3 H02W0101 arc: B4 S1_V02N0501 arc: B5 H00L0000 arc: B6 H02E0301 arc: B7 H02W0301 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 H02E0601 arc: C5 S1_V02N0201 arc: C6 N1_V02S0001 arc: C7 H02W0401 arc: CLK1 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 H02E0201 arc: D6 V00B0000 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q3 arc: E1_H02E0601 F6 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 F6 arc: LSR1 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 F6 arc: N3_V06N0303 F6 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0011001000000010 word: SLICED.K1.INIT 0101000000110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R29C46:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0303 V06S0303 arc: H00L0100 V02N0101 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02W0701 arc: V00T0100 N1_V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: H01W0000 W3_H06E0103 arc: W3_H06W0203 V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A0 N1_V02S0701 arc: A1 N1_V02S0701 arc: A2 N1_V02S0701 arc: A3 N1_V02S0701 arc: A4 V02S0101 arc: A5 V02N0301 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 H00R0000 arc: B5 E1_H02W0101 arc: B7 V00T0000 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 S1_V02N0001 arc: C7 V02S0201 arc: CLK1 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 V02N0601 arc: D7 N1_V02S0601 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 H02E0301 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: S1_V02S0101 Q1 arc: V00T0000 Q2 arc: V01S0000 Q3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R29C47:PLC2 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0203 N3_V06S0203 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02W0501 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 W1_H02E0401 arc: V00T0000 E1_H02W0001 arc: V00T0100 S1_V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 V02S0301 arc: A5 H02E0701 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B4 H02E0301 arc: B5 H02W0101 arc: B6 V02S0501 arc: C0 S1_V02N0601 arc: C1 S1_V02N0601 arc: C2 S1_V02N0601 arc: C3 S1_V02N0601 arc: C4 V00T0100 arc: C5 S1_V02N0201 arc: C6 V01N0101 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 H02W0201 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: LSR1 W1_H02E0301 arc: M6 V00T0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q3 arc: V01S0000 Q2 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R29C48:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 V06N0203 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 E1_H01W0100 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: A1 H02E0701 arc: A2 E1_H02W0501 arc: A3 N1_V02S0501 arc: A4 V02N0301 arc: A7 H00R0000 arc: B1 E1_H02W0301 arc: B2 N1_V02S0101 arc: B3 H00R0100 arc: B4 V02S0701 arc: B5 H00L0000 arc: B7 H02W0301 arc: C1 S1_V02N0401 arc: C2 N1_V01N0001 arc: C3 E1_H01W0000 arc: C4 H02E0401 arc: C5 F4 arc: C7 V00T0000 arc: D1 V00B0100 arc: D2 V01S0100 arc: D3 V02S0201 arc: D4 H02W0201 arc: D5 E1_H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 F2 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: N1_V01N0001 F7 arc: N1_V01N0101 F4 arc: N1_V02N0401 F4 arc: S3_V06S0203 F4 arc: V01S0000 F1 arc: V01S0100 F3 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1001000000001001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1001000000001001 word: SLICEB.K0.INIT 1001000000000000 word: SLICEB.K1.INIT 1000010000100001 word: SLICEC.K0.INIT 0011001000000010 word: SLICEC.K1.INIT 0000111100110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R29C49:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02N0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02E0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 E1_H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 E3_H06W0203 arc: E1_H01E0101 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A3 V00T0000 arc: A4 H02W0701 arc: B3 E1_H02W0301 arc: B4 V02N0701 arc: B5 V02S0501 arc: C3 H02W0401 arc: C4 V00B0100 arc: C5 N1_V02S0201 arc: C7 S1_V02N0201 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 H00R0000 arc: D4 W1_H02E0201 arc: D5 H00R0100 arc: D7 V02S0601 arc: E1_H01E0001 F7 arc: E1_H02E0501 F5 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: M0 W1_H02E0601 arc: M1 H00L0000 arc: M2 W1_H02E0601 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F4 arc: V01S0100 Q1 arc: W1_H02W0101 Q1 arc: W1_H02W0601 F4 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 0011001000000010 word: SLICEC.K1.INIT 0011001100001111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1100000011001000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R29C4:PLC2 arc: E1_H02E0201 H01E0001 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H06W0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02E0601 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H01W0100 arc: A0 N1_V02S0701 arc: A1 H02E0701 arc: A3 F7 arc: A6 S1_V02N0101 arc: A7 N1_V01S0100 arc: B0 V00B0000 arc: B1 H02E0101 arc: B3 H01W0100 arc: B6 V00T0000 arc: B7 V02S0701 arc: C0 E1_H02W0601 arc: C1 H00L0000 arc: C3 H00L0100 arc: C6 V02N0201 arc: C7 E1_H02W0401 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H00R0000 arc: D3 H01E0101 arc: D6 H00R0100 arc: D7 H02E0001 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0100 F0 arc: M2 N1_V01N0001 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q4 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111001101010001 word: SLICEA.K1.INIT 1111001101010001 word: SLICED.K0.INIT 1000001001000001 word: SLICED.K1.INIT 1100001101000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R29C50:PLC2 arc: E1_H02E0401 V06S0203 arc: E3_H06E0103 H01E0101 arc: H00L0100 V02S0101 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 V01N0001 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0003 Q0 arc: S3_V06S0203 Q4 arc: V01S0000 Q6 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R29C51:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 S3_V06N0303 arc: H00R0100 V02S0501 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 E1_H02W0601 arc: N1_V02N0401 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0601 Q6 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 H02E0401 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q0 arc: S1_V02S0401 Q4 arc: V01S0000 Q6 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R29C52:PLC2 arc: H00R0100 V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H06E0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0501 N3_V06S0303 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: E3_H06E0203 Q4 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0601 Q6 arc: V01S0000 Q0 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R29C53:PLC2 arc: H00R0100 V02S0501 arc: N1_V02N0101 N3_V06S0103 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q2 arc: E1_H02E0201 Q0 arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V01S0000 Q4 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R29C54:PLC2 arc: E1_H02E0401 V02S0401 arc: H00L0000 N1_V02S0001 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 H02W0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0401 N1_V02S0401 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: H01W0000 Q0 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: S1_V02S0201 Q0 arc: S1_V02S0401 Q6 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R29C55:PLC2 arc: H00L0100 N1_V02S0301 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N3_V06S0003 arc: N3_V06N0203 W3_H06E0203 arc: W3_H06W0203 N3_V06S0203 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0000 Q2 arc: H01W0100 Q6 arc: M0 V00T0000 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: V01S0000 Q0 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C56:PLC2 arc: H00L0000 H02W0001 arc: H00R0000 V02S0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: N3_V06N0103 W3_H06E0103 arc: B2 H00R0000 arc: B3 H00R0000 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: CE0 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: E1_H01E0101 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 F2 arc: M0 V00T0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 Q0 arc: S1_V02S0401 Q4 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100001100111100 word: SLICEB.K1.INIT 1111110011000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R29C57:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: H00L0000 N1_V02S0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 H01E0101 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: H01W0000 Q0 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0601 Q6 arc: V01S0000 Q4 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R29C58:PLC2 arc: H00L0000 H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 V06S0203 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: S1_V02S0201 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R29C59:PLC2 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 .tile R29C5:PLC2 arc: H00L0000 H02E0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0401 H06W0203 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 V01N0101 arc: S1_V02S0501 H02W0501 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: A1 E1_H01E0001 arc: A4 V00T0000 arc: B1 V01N0001 arc: B2 F3 arc: B3 H00L0000 arc: B4 H00R0000 arc: B5 F3 arc: C1 N1_V02S0401 arc: C2 V02N0401 arc: C3 H00L0100 arc: C4 E1_H02W0601 arc: C5 E1_H02W0401 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V02N0001 arc: D3 H01E0101 arc: D4 H02W0001 arc: D5 V02N0601 arc: D7 V02S0601 arc: E1_H01E0001 Q1 arc: E3_H06E0103 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q1 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 F5 arc: N1_V02N0501 F7 arc: N1_V02N0601 F4 arc: V01S0000 F3 arc: V01S0100 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111100101010 word: SLICEC.K0.INIT 0100110011001100 word: SLICEC.K1.INIT 1111111111000000 word: SLICEB.K0.INIT 0000000000000011 word: SLICEB.K1.INIT 0000110000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R29C62:PLC2 arc: S3_V06S0203 N3_V06S0103 .tile R29C64:PLC2 arc: S3_V06S0103 N3_V06S0003 .tile R29C65:PLC2 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 .tile R29C6:PLC2 arc: H00L0000 V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 V02N0501 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00L0000 arc: A3 V00B0000 arc: B1 V02S0301 arc: B3 V02S0101 arc: C1 V02N0401 arc: C3 V02N0401 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D3 S1_V02N0201 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 H00L0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: N3_V06N0003 F3 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1110101011000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1110101011000000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1111111111111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R29C7:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 V06S0203 arc: E3_H06E0203 V06S0203 arc: H00L0000 V02S0001 arc: H00R0000 V02S0401 arc: N1_V02N0201 H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A7 H00L0000 arc: B7 H02W0101 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D7 E1_H02W0001 arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: W1_H02W0001 Q2 arc: W1_H02W0501 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0101001111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R29C8:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: H00R0100 H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0203 E3_H06W0203 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q0 arc: H01W0100 Q4 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0601 Q6 arc: V01S0100 Q0 arc: W1_H02W0201 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R29C9:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 H02W0101 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H01W0100 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0701 V06S0203 arc: A5 V02N0301 arc: B5 N1_V01S0000 arc: C5 V01N0101 arc: D5 S1_V02N0401 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00B0100 arc: M3 H02E0201 arc: M4 V00B0100 arc: M5 H00L0100 arc: M6 V00B0100 arc: N3_V06N0003 F3 arc: W1_H02W0101 F3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1011111111111111 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C10:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: CLK0 G_HPBX0000 arc: D3 S1_V02N0201 arc: E1_H02E0601 Q6 arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: M6 E1_H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00T0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R2C11:PLC2 arc: V00T0000 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: V00T0100 F1 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R2C12:PLC2 arc: E3_H06E0203 W1_H02E0401 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 W1_H02E0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0401 S1_V02N0401 arc: CLK0 G_HPBX0000 arc: D7 W1_H02E0201 arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00B0100 F7 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R2C13:PLC2 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0701 E1_H01W0100 arc: V00B0100 S1_V02N0301 arc: CLK0 G_HPBX0000 arc: D3 H02W0001 arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00T0100 F3 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R2C14:PLC2 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 V06N0103 arc: H00R0100 E1_H02W0501 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: F5 F5_SLICE arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: V00B0100 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R2C15:PLC2 arc: H00R0100 H02W0501 arc: V00T0100 S1_V02N0701 arc: CLK0 G_HPBX0000 arc: D7 H00R0100 arc: F7 F7_SLICE arc: LSR1 V00B0100 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00B0100 F7 arc: W1_H02W0201 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R2C16:PLC2 arc: V00B0000 W1_H02E0601 arc: W1_H02W0501 S1_V02N0501 arc: CLK0 G_HPBX0000 arc: D5 S1_V02N0401 arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00B0100 F5 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R2C17:PLC2 arc: S1_V02S0401 E1_H02W0401 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 V02N0301 arc: A0 V02N0501 arc: B2 V01N0001 arc: B3 V02N0101 arc: B4 V00B0100 arc: B5 S1_V02N0701 arc: B6 V02N0701 arc: E1_H02E0401 F4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: N1_V01N0001 F6 arc: S1_V02S0101 F3 arc: S1_V02S0701 F5 arc: V01S0000 F2 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C18:PLC2 arc: E1_H02E0501 V02N0501 arc: H00R0100 H02W0501 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 E3_H06W0303 arc: E3_H06E0303 W3_H06E0203 arc: B3 E1_H01W0100 arc: C2 H00R0100 arc: C3 E1_H01W0000 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 H02W0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q2 arc: LSR1 E1_H02W0301 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: S1_V02S0001 Q2 arc: S1_V02S0301 F3 arc: V00T0100 F3 arc: V01S0000 F2 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000000000110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R2C19:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 V02S0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 H01E0001 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0201 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 E3_H06W0203 arc: A4 N1_V01N0101 arc: A6 N1_V01N0101 arc: B4 H01E0101 arc: B6 V00B0100 arc: C4 V02S0001 arc: C6 Q6 arc: C7 H02W0601 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D4 S1_V02N0401 arc: D5 H00R0100 arc: D6 V00B0000 arc: D7 V02N0601 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q6 arc: H01W0100 Q7 arc: LSR0 H02E0501 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: S3_V06S0303 Q5 arc: V00B0100 Q7 arc: V01S0000 Q7 arc: W1_H02W0501 Q5 word: SLICED.K0.INIT 0111100011110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1111111101001111 word: SLICEC.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R2C20:PLC2 arc: H00L0000 S1_V02N0201 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 H01E0001 arc: E3_H06E0203 W3_H06E0103 arc: CE0 S1_V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: M0 V00B0000 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: S1_V02S0001 Q0 arc: S1_V02S0401 Q4 arc: V00B0000 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R2C21:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: V00T0100 V02N0501 arc: A0 W1_H02E0701 arc: A2 V02N0701 arc: A3 V01N0101 arc: A4 V02N0101 arc: A5 V00T0100 arc: A6 V02N0301 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 F6 arc: S1_V02S0001 F2 arc: S1_V02S0101 F3 arc: S1_V02S0501 F5 arc: V01S0100 F4 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 1111000000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C22:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: CLK0 G_HPBX0000 arc: LSR0 H02W0301 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S1_V02S0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R2C23:PLC2 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S3_V06N0303 arc: H00R0100 V02N0501 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E1_H01W0000 arc: V00B0100 V02S0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0301 S1_V02N0301 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q2 arc: LSR0 H02E0501 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C24:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V01N0101 arc: H00R0000 H02E0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 E1_H01W0000 arc: V00B0000 V02S0001 arc: V00B0100 H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 H02E0301 arc: E3_H06E0303 W3_H06E0303 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q4 arc: E1_H02E0601 Q6 arc: H01W0000 Q2 arc: H01W0100 Q4 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R2C25:PLC2 arc: E1_H02E0501 V06N0303 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02N0401 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H01E0101 arc: V00T0000 S1_V02N0401 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0203 E3_H06W0103 arc: A0 S1_V02N0701 arc: A2 V00T0000 arc: A3 H01E0001 arc: A4 W1_H02E0501 arc: A5 S1_V02N0101 arc: A6 H00L0000 arc: A7 H00R0000 arc: E1_H02E0201 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F4 arc: S1_V02S0701 F5 arc: S3_V06S0303 F6 arc: W1_H02W0101 F3 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R2C26:PLC2 arc: E1_H02E0301 V02N0301 arc: H00L0000 W1_H02E0201 arc: H00R0000 W1_H02E0601 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 W1_H02E0401 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 E1_H01W0000 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0000 arc: A1 H00R0000 arc: A2 V00B0000 arc: A3 V00T0000 arc: A4 W1_H02E0501 arc: A5 H02E0501 arc: A6 V02N0101 arc: A7 S1_V02N0101 arc: E1_H01E0001 F4 arc: E1_H01E0101 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: S1_V02S0001 F2 arc: S1_V02S0201 F0 arc: S1_V02S0701 F7 arc: S3_V06S0303 F6 arc: V01S0000 F3 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R2C27:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 S1_V02N0601 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0601 H01E0001 arc: S3_V06S0103 H01E0101 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: V00T0100 S1_V02N0501 arc: A0 V02N0701 arc: A1 V02N0501 arc: B4 S1_V02N0501 arc: B5 E1_H02W0101 arc: B7 V00B0100 arc: C4 H02W0401 arc: C5 V00T0100 arc: C7 V00T0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 Q7 arc: E1_H02E0401 Q4 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 F1 arc: LSR0 H02E0301 arc: LSR1 E1_H02W0501 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0001 F0 arc: S1_V02S0701 Q7 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110011111111 word: SLICEC.K0.INIT 1111110011111111 word: SLICEC.K1.INIT 1111001111111111 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C28:PLC2 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 V02N0001 arc: H00R0000 V02N0601 arc: H00R0100 H02E0501 arc: V00B0000 H02E0401 arc: W1_H02W0401 V01N0001 arc: A6 V00T0100 arc: B1 S1_V02N0101 arc: B3 H00L0000 arc: B5 H00R0000 arc: B6 V01S0000 arc: C1 H02E0601 arc: C3 H02E0601 arc: C5 H02E0601 arc: C6 H01E0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D3 H02E0201 arc: D5 H02E0201 arc: D6 V00B0000 arc: E1_H01E0101 F6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: S1_V02S0101 Q1 arc: S1_V02S0301 Q3 arc: S3_V06S0303 F6 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: V01S0000 Q1 arc: V01S0100 Q5 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R2C29:PLC2 arc: S1_V02S0401 E1_H01W0000 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 V02N0401 arc: W1_H02W0101 H01E0101 arc: W1_H02W0501 E1_H01W0100 arc: A0 E1_H02W0501 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q7 arc: E1_H02E0301 Q3 arc: E1_H02E0401 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0601 Q6 arc: V00B0000 Q4 arc: V01S0000 Q5 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R2C2:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 V06N0303 .tile R2C30:PLC2 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0100 H02E0301 arc: H01W0100 W3_H06E0303 arc: W1_H02W0501 W3_H06E0303 arc: A0 H00L0000 arc: A1 H00L0100 arc: A2 E1_H01E0001 arc: A6 N1_V01N0101 arc: A7 V00T0100 arc: B6 V00T0000 arc: B7 H01E0101 arc: C6 E1_H01E0101 arc: C7 H01E0001 arc: CLK0 G_HPBX0000 arc: D6 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H00R0100 F7 arc: H01W0000 F6 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q1 arc: V00T0000 Q0 word: SLICED.K0.INIT 0000000100000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R2C31:PLC2 arc: S1_V02S0501 S3_V06N0303 arc: V00B0000 V02S0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0501 S1_V02N0501 arc: CLK0 G_HPBX0000 arc: M0 V00B0000 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V00T0000 Q0 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R2C32:PLC2 arc: S1_V02S0101 E3_H06W0103 arc: S3_V06S0103 E3_H06W0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 .tile R2C33:PLC2 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0701 arc: V00B0000 V02N0001 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: V01S0000 S3_V06N0103 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: M0 V00T0000 arc: M2 H02W0601 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C34:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0301 S1_V02N0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0501 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02N0001 arc: V00T0100 H02W0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V01N0001 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A3 V01N0101 arc: A5 N1_V01N0101 arc: B3 E1_H02W0101 arc: B5 H01E0101 arc: C3 H00R0100 arc: C5 V02N0201 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 V02N0601 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: S3_V06S0103 F1 arc: V00B0100 F5 arc: V01S0000 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000001001000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R2C35:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 S3_V06N0203 arc: H00R0000 E1_H02W0401 arc: S1_V02S0201 H06W0103 arc: V00B0000 E1_H02W0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0203 E3_H06W0203 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: C1 H02W0401 arc: C2 H02W0401 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00T0000 arc: M1 V01S0100 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 arc: W1_H02W0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1010001011110011 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001011110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R2C36:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0203 S3_V06N0203 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0701 arc: S1_V02S0301 E1_H02W0301 arc: V00B0000 H02E0601 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0401 E1_H02W0401 arc: A1 H01E0001 arc: A2 H01E0001 arc: B1 H02E0301 arc: B2 H02E0301 arc: C1 V02N0601 arc: C2 V02N0601 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00B0100 arc: M1 V01S0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 arc: W1_H02W0101 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100111101000101 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111101000101 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R2C37:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: H00R0100 W1_H02E0701 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02N0601 arc: A1 V02N0501 arc: A2 V02N0501 arc: B1 V02N0301 arc: B2 V02N0101 arc: C1 S1_V02N0401 arc: C2 S1_V02N0401 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 V00T0100 arc: E1_H01E0001 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H00R0000 Q6 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000110010101111 word: SLICEB.K0.INIT 1000110010101111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C38:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0701 W1_H02E0701 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0501 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02N0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0701 S1_V02N0701 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A3 H01E0001 arc: A4 V00B0000 arc: A5 H02W0701 arc: B3 V02S0101 arc: B4 H00R0000 arc: B5 H02W0101 arc: C3 S1_V02N0401 arc: C4 V02N0001 arc: C5 V00T0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V01S0100 arc: D4 V02S0601 arc: D5 W1_H02E0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 F1 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00B0100 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F4 arc: S1_V02S0101 F1 arc: S3_V06S0103 F1 arc: V00B0000 Q6 arc: V01S0100 F5 arc: W1_H02W0301 F1 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1000010000100001 word: SLICEC.K1.INIT 1000001001000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R2C39:PLC2 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 S3_V06N0303 arc: H00L0000 H02E0001 arc: H00R0100 H02E0701 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H01E0101 arc: V00B0100 S1_V02N0101 arc: V00T0100 H02E0301 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: A1 E1_H01E0001 arc: A2 V00B0000 arc: B1 E1_H01W0100 arc: B2 E1_H01W0100 arc: C1 W1_H02E0601 arc: C2 H00L0000 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 V02N0201 arc: E1_H01E0001 Q4 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H00R0000 Q6 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q4 arc: V01S0000 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111001101010001 word: SLICEB.K0.INIT 1111001101010001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C3:PLC2 arc: E1_H02E0601 V01N0001 arc: H00L0100 S1_V02N0301 arc: H00R0100 V02N0501 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 S3_V06N0303 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: A7 H00L0000 arc: B7 H02E0301 arc: C7 V00T0000 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D7 H00R0100 arc: E1_H01E0101 Q2 arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0100 Q0 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: S1_V02S0701 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R2C40:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0401 W1_H02E0401 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0701 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 V02N0101 arc: V00T0100 S1_V02N0701 arc: W1_H02W0201 V02N0201 arc: S1_V02S0101 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A1 V01N0101 arc: A2 V01N0101 arc: B1 W1_H02E0101 arc: B2 H00R0000 arc: C1 V02N0601 arc: C2 V02N0601 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 H02E0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q4 arc: M0 H02E0601 arc: M1 V01S0100 arc: M2 H02E0601 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 F1 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100010011110101 word: SLICEB.K0.INIT 1100010011110101 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C41:PLC2 arc: H00R0000 H02W0401 arc: N1_V01N0001 S3_V06N0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H02W0401 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06W0203 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0203 E3_H06W0103 arc: A1 E1_H01E0001 arc: A2 V00B0000 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: C1 H02E0401 arc: C2 H02E0401 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 S1_V02N0001 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: M0 V00B0100 arc: M1 V01S0100 arc: M2 N1_V01N0001 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0101 F1 arc: V00B0000 Q6 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000110010101111 word: SLICEB.K0.INIT 1000110010101111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C42:PLC2 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 .tile R2C43:PLC2 arc: E1_H02E0001 V01N0001 arc: H00L0000 V02N0001 arc: H00R0100 V02N0701 arc: A3 V01N0101 arc: B3 H00R0100 arc: C3 H00L0000 arc: D3 S1_V02N0001 arc: E1_H02E0101 F3 arc: F3 F3_SLICE word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R2C44:PLC2 arc: H00L0000 V02N0001 arc: E3_H06E0303 W3_H06E0303 arc: A1 V01N0101 arc: A3 V02N0701 arc: A5 V02N0301 arc: A7 V00T0100 arc: B1 V01N0001 arc: B3 S1_V02N0301 arc: B5 V02N0501 arc: B7 H02E0101 arc: C1 V02N0601 arc: C3 H00L0000 arc: C5 V02N0201 arc: C7 E1_H02W0401 arc: D1 H02E0001 arc: D3 H02W0001 arc: D5 V02N0401 arc: D6 H00R0100 arc: D7 F2 arc: E3_H06E0203 F7 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: M2 V00B0100 arc: S1_V02S0401 F6 arc: S3_V06S0203 F7 arc: V00B0100 F5 arc: V00T0100 F1 arc: V01S0100 F6 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R2C45:PLC2 arc: H00R0000 V02N0401 arc: S1_V02S0701 V01N0101 arc: W1_H02W0001 V02N0001 arc: A3 V01N0101 arc: B3 V01N0001 arc: C3 S1_V02N0601 arc: D3 H00R0000 arc: E1_H01E0001 F3 arc: F3 F3_SLICE word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R2C46:PLC2 arc: E3_H06E0203 V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: W1_H02W0401 H01E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 .tile R2C47:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0301 S3_V06N0003 arc: E3_H06E0003 S3_V06N0003 arc: S3_V06S0203 H06E0203 arc: W3_H06W0103 E3_H06W0003 .tile R2C48:PLC2 arc: E1_H02E0501 S3_V06N0303 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 H01E0001 arc: W1_H02W0001 S3_V06N0003 .tile R2C49:PLC2 arc: S1_V02S0201 H02W0201 .tile R2C4:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: H00L0100 E1_H02W0301 arc: S1_V02S0701 H01E0101 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 V06N0203 arc: A7 H00L0000 arc: B7 V00T0000 arc: C7 E1_H02W0601 arc: CE0 H02W0101 arc: CE1 H00L0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D7 E1_H02W0201 arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0100 F7 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 H02E0601 arc: M2 W1_H02E0601 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q2 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R2C50:PLC2 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 W1_H02E0501 arc: W1_H02W0201 E1_H02W0701 arc: N1_V02N0501 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 .tile R2C52:PLC2 arc: W1_H02W0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 .tile R2C53:PLC2 arc: S3_V06S0303 H06E0303 arc: W3_H06W0003 E3_H06W0303 .tile R2C56:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R2C58:PLC2 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 .tile R2C59:PLC2 arc: S3_V06S0003 H06E0003 arc: W3_H06W0303 E3_H06W0203 .tile R2C5:PLC2 arc: E1_H02E0401 V06N0203 arc: H00L0100 H02W0301 arc: H00R0100 E1_H02W0701 arc: S1_V02S0101 V01N0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 V01N0001 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 E1_H02W0601 arc: M2 E1_H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: S1_V02S0201 Q0 arc: V01S0000 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C64:PLC2 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 .tile R2C65:PLC2 arc: W3_H06W0203 E3_H06W0203 .tile R2C66:PLC2 arc: N1_V02N0701 W1_H02E0701 .tile R2C67:PLC2 arc: N1_V02N0201 H06E0103 .tile R2C6:PLC2 arc: H00L0100 E1_H02W0301 arc: H00R0100 H02W0701 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0601 H06W0303 arc: V00B0000 H02E0401 arc: V00T0100 V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0601 S1_V02N0601 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00T0100 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: S1_V02S0201 Q0 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C70:PLC2 arc: E1_H02E0701 V02S0701 arc: E1_H01E0001 W3_H06E0003 .tile R2C7:PLC2 arc: E1_H02E0301 V02S0301 arc: H00L0100 H02W0301 arc: H00R0100 E1_H02W0701 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E1_H02W0701 arc: A3 V00B0000 arc: B3 E1_H01W0100 arc: C3 S1_V02N0601 arc: CE0 H00R0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 H02W0001 arc: F3 F3_SLICE arc: H01W0100 F3 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M4 E1_H02W0401 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0001 Q0 arc: V00B0000 Q4 arc: V01S0000 Q0 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R2C8:PLC2 arc: H00L0100 S1_V02N0301 arc: S1_V02S0301 H02E0301 arc: V00T0000 V02N0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q2 arc: LSR1 E1_H02W0301 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C9:PLC2 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0303 S3_V06N0303 arc: CLK0 G_HPBX0000 arc: D7 H02W0201 arc: E3_H06E0003 Q0 arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: M0 E1_H02W0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00B0100 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R30C10:PLC2 arc: E1_H02E0401 V06S0203 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02N0401 arc: H01W0100 E3_H06W0303 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: B1 V00B0000 arc: B2 H02E0301 arc: C1 H00L0000 arc: C2 H00L0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00T0000 arc: M1 V01S0100 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: S1_V02S0401 Q6 arc: V01S0100 Q4 arc: W1_H02W0301 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111010100110001 word: SLICEB.K0.INIT 1111010100110001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R30C11:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 E3_H06W0203 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 E1_H02W0301 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: V00T0100 V02S0501 arc: W1_H02W0501 V06S0303 arc: W3_H06W0303 V06S0303 arc: A7 N1_V01N0101 arc: B7 V00T0000 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D7 S1_V02N0601 arc: F7 F7_SLICE arc: M0 V00T0100 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q4 arc: V00T0000 Q2 arc: V01S0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R30C12:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H02E0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A1 H00L0100 arc: A5 H02E0501 arc: B1 V00T0000 arc: B5 H00R0000 arc: C1 V02N0601 arc: C5 V02S0001 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D5 H02W0001 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H01W0100 Q2 arc: M0 V00T0100 arc: M2 V00B0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q6 arc: V01S0100 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000100000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111011101110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R30C13:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E3_H06W0203 arc: A3 H02E0701 arc: B0 H01W0100 arc: B3 V02N0101 arc: C0 S1_V02N0401 arc: C3 H00L0000 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00B0100 arc: D3 H02E0201 arc: E1_H01E0001 Q0 arc: E1_H02E0301 F3 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H01W0100 Q0 arc: M0 V00T0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R30C14:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02E0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V06S0203 arc: A0 E1_H02W0701 arc: A1 H00L0000 arc: A3 H01E0001 arc: A5 V00B0000 arc: B0 F1 arc: B1 W1_H02E0101 arc: B3 H00R0000 arc: B5 V02N0501 arc: C0 H00L0100 arc: C1 W1_H02E0401 arc: C3 H00R0100 arc: C5 V02N0001 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 H02W0001 arc: D3 H02E0201 arc: D5 V02N0601 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N1_V02N0401 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111011101110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R30C15:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0601 N3_V06S0303 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 H02W0501 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02N0301 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A5 V00T0000 arc: B5 H00R0000 arc: C5 V00B0100 arc: CE0 E1_H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D5 H02E0201 arc: F5 F5_SLICE arc: H00R0000 Q6 arc: LSR0 H02W0301 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: V00T0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R30C16:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 E3_H06W0303 arc: H00L0000 E1_H02W0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 N3_V06S0303 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 arc: A4 E1_H01W0000 arc: A5 S1_V02N0301 arc: A7 H02W0701 arc: B4 H00R0000 arc: B5 H00L0000 arc: B7 W1_H02E0101 arc: C4 H02E0601 arc: C5 V01N0101 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D4 H02E0001 arc: D5 V02N0601 arc: D7 E1_H02W0001 arc: E1_H01E0101 Q0 arc: E3_H06E0203 F4 arc: E3_H06E0303 F5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q2 arc: W1_H02W0701 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 0111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R30C17:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 V02S0501 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02W0401 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0203 E1_H02W0401 arc: W3_H06W0303 E3_H06W0203 arc: A1 E1_H01E0001 arc: B1 H01W0100 arc: C1 H00R0100 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: E1_H01E0001 Q2 arc: E3_H06E0103 F1 arc: F1 F1_SLICE arc: H01W0000 Q2 arc: H01W0100 Q4 arc: M2 V00B0000 arc: M4 H02W0401 arc: M6 H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R30C18:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 V02N0701 arc: H00L0000 V02S0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0401 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0000 arc: A1 H02E0501 arc: A2 H02W0501 arc: A3 S1_V02N0501 arc: A5 N1_V01N0101 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H02E0101 arc: B3 E1_H01W0100 arc: B5 V02N0501 arc: C0 H02W0401 arc: C1 H02W0601 arc: C2 H00L0100 arc: C3 S1_V02N0601 arc: C5 V00B0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H00R0000 arc: D2 H02W0001 arc: D3 F2 arc: D5 E1_H01W0100 arc: E1_H01E0101 F0 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: LSR1 H02W0301 arc: M4 E1_H01E0101 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: N1_V02N0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0101001111111111 word: SLICEB.K0.INIT 0001010100111111 word: SLICEB.K1.INIT 0111000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R30C19:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A7 E1_H02W0501 arc: B2 V02S0101 arc: B7 V00T0000 arc: C1 H02W0601 arc: C2 V02S0601 arc: C7 V00B0100 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D2 S1_V02N0001 arc: D3 H02W0201 arc: D7 H00L0100 arc: E1_H02E0501 Q7 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q7 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M2 V00B0000 arc: M4 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V02N0301 F1 arc: V01S0000 Q2 arc: W1_H02W0501 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111110000000 word: SLICEB.K0.INIT 1111111111001111 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R30C20:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 V02S0401 arc: E3_H06E0203 W1_H02E0701 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00T0000 V02S0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E3_H06W0203 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H02E0601 Q4 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: H01W0100 Q2 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 V00T0000 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R30C21:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 S1_V02N0501 arc: H00R0000 N1_V02S0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: B0 V00B0000 arc: B2 H00R0100 arc: C0 E1_H02W0601 arc: C2 E1_H02W0601 arc: C5 V02S0001 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 V00T0100 arc: D5 V02S0401 arc: E1_H01E0001 F5 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: N1_V02N0601 Q6 arc: W1_H02W0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0000110011001100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000110011001100 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R30C22:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 S1_V02N0301 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 E1_H02W0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A3 H02W0701 arc: A6 H00R0000 arc: B3 E1_H02W0101 arc: B6 V02N0701 arc: C3 V02N0601 arc: C6 V00B0100 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: D6 H01W0000 arc: D7 H01W0000 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q6 arc: H01W0000 F1 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00B0000 arc: M4 W1_H02E0401 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0100110011001100 word: SLICED.K0.INIT 1111111100110010 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R30C23:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0701 H01E0101 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 H06W0203 arc: V00B0000 V02N0201 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H01W0100 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A4 V00B0000 arc: A6 W1_H02E0501 arc: B1 H00R0100 arc: B3 V02N0301 arc: B4 E1_H02W0301 arc: B5 H02E0301 arc: B6 W1_H02E0301 arc: C1 H02W0601 arc: C2 H00L0100 arc: C3 H02W0601 arc: C4 V00B0100 arc: C5 V02S0201 arc: C6 V00T0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H02E0201 arc: D3 H00R0000 arc: D4 W1_H02E0201 arc: D5 E1_H02W0001 arc: D6 S1_V02N0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F2 arc: E3_H06E0103 F1 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q6 arc: H01W0100 F1 arc: LSR1 V00T0000 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: N3_V06N0103 F1 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S3_V06S0103 F1 arc: S3_V06S0303 F5 arc: V00B0100 F5 arc: V01S0000 F1 arc: V01S0100 F2 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 0011001100110000 word: SLICED.K0.INIT 1111111110001111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R30C24:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V01N0101 arc: H00L0100 W1_H02E0301 arc: H00R0100 V02S0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0701 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: A3 H00L0100 arc: A4 S1_V02N0301 arc: A5 N1_V02S0301 arc: B0 V02N0101 arc: B1 V02N0301 arc: B3 V02S0301 arc: B4 V01S0000 arc: B5 V02S0501 arc: C0 N1_V01N0001 arc: C1 H00L0000 arc: C3 H00R0100 arc: C4 V02S0001 arc: C5 H02W0601 arc: C7 W1_H02E0601 arc: D0 E1_H02W0001 arc: D1 V00B0100 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 H01W0000 arc: D7 V02S0601 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: E1_H02E0701 F5 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 F7 arc: H01W0100 F1 arc: M2 V00B0000 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: N3_V06N0303 F5 arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 arc: W1_H02W0501 F5 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0001010100111111 word: SLICEA.K1.INIT 0011000011110000 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R30C25:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 H01E0101 arc: H00L0000 S1_V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 H01E0001 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V01S0100 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 arc: A0 S1_V02N0701 arc: A2 E1_H01E0001 arc: A3 V02S0501 arc: A4 H02E0501 arc: A5 V00T0000 arc: A6 H00L0000 arc: B0 V00B0000 arc: B1 F3 arc: B2 H02W0101 arc: B3 V02S0101 arc: B4 V02N0701 arc: B5 V02S0701 arc: B6 S1_V02N0501 arc: B7 F3 arc: C0 N1_V01N0001 arc: C1 H02W0401 arc: C2 V02N0401 arc: C3 H00L0100 arc: C4 E1_H01E0101 arc: C5 E1_H02W0401 arc: C6 V02N0201 arc: C7 V00B0100 arc: D0 V01S0100 arc: D1 V02S0201 arc: D2 V00T0100 arc: D3 H00R0000 arc: D4 H02E0001 arc: D5 W1_H02E0201 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 F5 arc: E1_H02E0401 F4 arc: E1_H02E0501 F5 arc: E3_H06E0003 F3 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: N1_V01N0001 F5 arc: N1_V01N0101 F1 arc: N1_V02N0301 F1 arc: N1_V02N0501 F7 arc: N1_V02N0701 F5 arc: N3_V06N0103 F2 arc: N3_V06N0303 F6 arc: S1_V02S0501 F5 arc: S3_V06S0103 F2 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: V01S0000 F7 arc: V01S0100 F1 arc: W1_H02W0201 F0 arc: W3_H06W0103 F2 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 1100000000000000 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 0001000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R30C26:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02S0701 arc: H00L0000 S1_V02N0001 arc: H00R0000 V02S0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 H06E0103 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A0 N1_V02S0701 arc: A1 H02W0701 arc: A2 V00B0000 arc: A3 V00T0000 arc: A5 V00T0000 arc: A6 V02N0101 arc: B0 H02W0301 arc: B1 E1_H02W0301 arc: B2 V02S0101 arc: B3 H00L0000 arc: B4 H00R0000 arc: B5 S1_V02N0501 arc: B6 H02E0101 arc: B7 H02W0101 arc: C0 V02S0401 arc: C1 E1_H01W0000 arc: C2 V02N0601 arc: C3 V02S0601 arc: C4 H02E0601 arc: C5 N1_V02S0001 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 F0 arc: D2 V00T0100 arc: D3 W1_H02E0201 arc: D4 E1_H01W0100 arc: D5 H01W0000 arc: D6 H01W0000 arc: D7 H02E0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0601 F4 arc: N3_V06N0003 F0 arc: N3_V06N0103 F1 arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 arc: S1_V02S0601 F4 arc: S3_V06S0003 F0 arc: S3_V06S0203 F4 arc: V00T0000 Q2 arc: V00T0100 F3 arc: V01S0000 F0 arc: V01S0100 F0 arc: W1_H02W0201 F0 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 1100000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1111111110000000 word: SLICEB.K1.INIT 0000000011001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R30C27:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 H01E0001 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02W0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0601 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A5 E1_H01W0000 arc: A6 S1_V02N0301 arc: A7 V02S0301 arc: B1 V00B0000 arc: B2 V02N0101 arc: B5 H00R0000 arc: B6 V02N0501 arc: B7 F1 arc: C1 V02S0601 arc: C2 H00L0000 arc: C5 H02W0401 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 V00T0100 arc: D3 V00B0100 arc: D5 S1_V02N0401 arc: D6 H00L0100 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 F7 arc: H01W0100 F5 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: N1_V02N0301 F1 arc: N1_V02N0401 F6 arc: N1_V02N0701 F7 arc: N3_V06N0103 F1 arc: N3_V06N0203 F7 arc: N3_V06N0303 F5 arc: S3_V06S0203 F7 arc: V01S0000 F5 arc: V01S0100 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0301 F1 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000001000000 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R30C28:PLC2 arc: E1_H02E0501 H01E0101 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 H02E0001 arc: H00R0100 V02S0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 N1_V02S0201 arc: V00T0000 V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A3 V00T0000 arc: A4 V02S0101 arc: A5 N1_V01N0101 arc: B3 V01N0001 arc: B4 W1_H02E0101 arc: B5 E1_H02W0301 arc: C3 H00L0000 arc: C4 V00T0100 arc: C5 E1_H02W0601 arc: CE0 H00R0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D3 W1_H02E0201 arc: D4 V02S0601 arc: D5 W1_H02E0001 arc: E1_H01E0001 F2 arc: E3_H06E0303 Q6 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q6 arc: M0 V00B0000 arc: M2 W1_H02E0601 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: N3_V06N0303 Q6 arc: V01S0100 Q0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111110000000 word: SLICEC.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R30C29:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 E1_H02W0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 H01E0001 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: B0 H00R0100 arc: C0 E1_H01W0000 arc: C1 H00L0000 arc: C3 V02S0601 arc: CE0 H00R0000 arc: CE2 H00L0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00T0100 arc: D3 N1_V02S0001 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M4 V00T0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N3_V06N0003 Q0 arc: V01S0000 F0 arc: W1_H02W0101 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0000110011001100 word: SLICEA.K1.INIT 0000111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R30C2:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 H02W0601 arc: A0 H00R0000 arc: A1 N1_V02S0501 arc: A7 V00T0100 arc: B0 V02N0301 arc: B1 V00B0000 arc: B7 F1 arc: C0 H00R0100 arc: C1 H00R0100 arc: C3 H00L0100 arc: C7 V02S0201 arc: D0 S1_V02N0001 arc: D1 E1_H02W0201 arc: D3 S1_V02N0201 arc: D7 V02S0601 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: M6 V00T0000 arc: V00T0000 F0 arc: V00T0100 F3 arc: V01S0000 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1111010100110001 word: SLICEA.K1.INIT 1000101011001111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000010000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R30C30:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 V02S0201 arc: H00R0100 V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 H02W0601 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V02S0601 arc: H01W0000 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 V01N0101 arc: A3 E1_H02W0501 arc: B0 H01W0100 arc: B1 V01N0001 arc: B2 E1_H02W0101 arc: B3 V02N0101 arc: B4 H00R0000 arc: B6 V02N0701 arc: C0 H00L0000 arc: C1 H02E0401 arc: C2 E1_H02W0601 arc: C3 H02W0401 arc: C4 V00T0000 arc: C6 N1_V02S0001 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02E0201 arc: D2 N1_V02S0201 arc: D3 V02N0201 arc: D4 V02S0601 arc: D5 V02S0401 arc: D6 H00L0100 arc: D7 H00R0100 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H00R0000 Q4 arc: H01W0100 Q4 arc: M4 V00B0000 arc: MUXCLK2 CLK0 arc: N3_V06N0003 F0 arc: S1_V02S0401 F6 arc: V01S0100 F1 arc: W1_H02W0701 F7 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 0000000000000010 word: SLICED.K0.INIT 0000000000110000 word: SLICED.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 0011111100000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R30C31:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0303 H01E0101 arc: H00L0000 N1_V02S0001 arc: H00L0100 H02W0301 arc: H00R0100 V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 V02N0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0601 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 N3_V06S0303 arc: A1 V02S0501 arc: A3 V00B0000 arc: A4 H02W0701 arc: A7 H00L0000 arc: B1 V02S0301 arc: B2 S1_V02N0301 arc: B3 V02N0101 arc: B4 H02E0301 arc: B7 S1_V02N0501 arc: C0 N1_V02S0401 arc: C1 V02N0401 arc: C2 H00L0100 arc: C3 H00R0100 arc: C4 V00T0100 arc: C7 V00T0000 arc: D0 H02E0001 arc: D1 V02N0201 arc: D2 H02E0201 arc: D3 V00B0100 arc: D4 H02W0201 arc: D7 H00R0100 arc: E1_H01E0101 F1 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: M4 E1_H01E0101 arc: S1_V02S0101 F3 arc: V01S0000 F7 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000100000000000 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 0000000100000011 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R30C32:PLC2 arc: E1_H02E0301 V01N0101 arc: H00L0100 H02E0101 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0303 H06E0303 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 H02E0401 arc: V00B0100 V02N0301 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: A0 E1_H02W0501 arc: A3 H02W0701 arc: A5 V02N0301 arc: A7 N1_V02S0101 arc: B0 H00R0100 arc: B2 E1_H01W0100 arc: B3 H02E0101 arc: B4 V00B0100 arc: B5 H02E0101 arc: B7 N1_V02S0501 arc: C0 H00L0100 arc: C2 S1_V02N0401 arc: C3 H02E0401 arc: C4 W1_H02E0401 arc: C5 H02E0401 arc: C7 V00T0100 arc: D0 V01S0100 arc: D2 H02W0201 arc: D3 H02E0001 arc: D4 H02W0201 arc: D5 H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H02E0401 F4 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F0 arc: M0 H02W0601 arc: V01S0100 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000100000000000 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 0000000000000010 word: SLICEA.K0.INIT 0000000000010011 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R30C33:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 N1_V01S0000 arc: V00B0100 H02E0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: B1 E1_H02W0101 arc: B3 S1_V02N0101 arc: B5 S1_V02N0701 arc: C1 S1_V02N0401 arc: C3 H00L0100 arc: C5 S1_V02N0201 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D3 V02N0201 arc: D5 V02N0401 arc: E1_H02E0301 Q3 arc: E1_H02E0601 Q6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: N1_V02N0101 Q3 arc: N3_V06N0103 Q1 arc: N3_V06N0303 Q5 arc: S3_V06S0103 Q1 arc: S3_V06S0303 Q5 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q1 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R30C34:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0601 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A6 V02N0101 arc: B6 V00B0100 arc: C6 V02N0001 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D6 V00B0000 arc: E1_H02E0101 Q3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: N1_V02N0301 F3 arc: N3_V06N0003 Q3 arc: S3_V06S0003 Q3 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0111111111111111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R30C35:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0501 H06E0303 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02W0601 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0103 N1_V01S0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A3 H00L0100 arc: A7 V02S0301 arc: B2 H02W0101 arc: B3 H02W0301 arc: B7 F3 arc: C2 H00L0000 arc: C3 V02N0601 arc: C7 E1_H01E0101 arc: CE0 V02S0201 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 H00R0000 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F2 arc: E3_H06E0003 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: H01W0100 Q4 arc: M0 V00T0100 arc: M4 H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1100110010100000 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 1111110011101110 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 .tile R30C36:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 H02W0001 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 H02E0301 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: E1_H01E0101 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: A1 W1_H02E0701 arc: A2 V00T0000 arc: A7 E1_H02W0501 arc: B1 H01W0100 arc: B2 H02W0301 arc: B6 W1_H02E0301 arc: B7 V02S0501 arc: C1 F6 arc: C2 H02E0401 arc: C6 W1_H02E0601 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 S1_V02N0001 arc: D2 W1_H02E0201 arc: D6 H02E0001 arc: D7 V02N0401 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q2 arc: N1_V02N0201 Q2 arc: V01S0100 F7 arc: W1_H02W0001 Q2 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1010101011000000 word: SLICEB.K0.INIT 0100110011001100 word: SLICEB.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111110011101110 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 .tile R30C37:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V06S0003 arc: E3_H06E0203 H01E0001 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02W0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06E0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02E0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0301 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: B4 H00R0000 arc: B6 N1_V02S0501 arc: C4 V00T0100 arc: C6 V00B0100 arc: CE0 H02E0101 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 H02E0201 arc: D5 N1_V02S0601 arc: D6 H02E0201 arc: D7 V00B0000 arc: E3_H06E0003 Q0 arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: M0 W1_H02E0601 arc: M2 N1_V01N0001 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q0 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000000110011 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111000000110011 word: SLICED.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R30C38:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02S0501 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0303 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 H06E0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E3_H06W0303 arc: E1_H01E0001 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: A1 N1_V02S0701 arc: A4 V00T0100 arc: A5 V02N0101 arc: B1 E1_H02W0101 arc: B2 V02N0301 arc: B4 H00L0000 arc: B5 S1_V02N0701 arc: B6 E1_H02W0301 arc: C1 H00L0100 arc: C2 E1_H02W0401 arc: C4 H02W0601 arc: C5 S1_V02N0001 arc: C6 W1_H02E0401 arc: D1 S1_V02N0001 arc: D2 H00R0000 arc: D3 H02E0201 arc: D4 H01W0000 arc: D5 E1_H02W0201 arc: D6 N1_V02S0601 arc: D7 N1_V02S0401 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H01W0000 F5 arc: H01W0100 F4 arc: M0 V00B0000 arc: M2 V00B0100 arc: M6 V00B0100 arc: N1_V02N0401 F6 arc: V01S0000 F2 word: SLICEC.K0.INIT 0000111100001110 word: SLICEC.K1.INIT 1100010010000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0110101110110000 word: SLICEB.K0.INIT 1111000000110011 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111000000110011 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R30C39:PLC2 arc: E1_H02E0501 V02N0501 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 arc: A0 S1_V02N0501 arc: A2 H02W0501 arc: A3 H02E0501 arc: A4 V00T0100 arc: A5 V02S0301 arc: A6 V02S0101 arc: A7 N1_V01S0100 arc: B2 V02N0101 arc: B3 H00R0100 arc: B4 H00L0000 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 V00B0000 arc: E3_H06E0103 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: N1_V02N0101 F3 arc: N1_V02N0601 F6 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R30C3:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0401 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 N1_V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0100 E1_H02W0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V02S0601 arc: A1 E1_H02W0501 arc: A7 E1_H01W0000 arc: B1 V00B0000 arc: B7 V00B0000 arc: C1 S1_V02N0601 arc: C7 V00B0100 arc: D1 E1_H02W0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000110010101111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000110010101111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R30C40:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N1_V02S0301 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A0 V02N0501 arc: A1 V01N0101 arc: A2 V02S0701 arc: A3 V00T0000 arc: A4 V02N0101 arc: A5 H02E0501 arc: A6 N1_V01S0100 arc: A7 H00R0000 arc: B0 H02W0301 arc: B1 H00R0100 arc: B2 H02W0101 arc: B3 H00L0000 arc: B4 W1_H02E0101 arc: B5 N1_V01S0000 arc: B6 V00B0100 arc: B7 V00B0000 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F2 arc: N1_V01N0001 F7 arc: N3_V06N0003 F0 arc: N3_V06N0103 F1 arc: N3_V06N0303 F5 arc: V01S0000 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R30C41:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0301 arc: H00R0100 V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0103 H06W0103 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: V00B0000 H02W0601 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V06S0303 arc: W3_H06W0203 N1_V01S0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 H02E0501 arc: A1 H02W0501 arc: A2 V01N0101 arc: A3 H00L0100 arc: A4 V02S0301 arc: A5 N1_V01S0100 arc: A6 V00T0100 arc: A7 H00L0000 arc: B0 V02N0301 arc: B1 N1_V02S0101 arc: B2 H00R0100 arc: B3 H02E0301 arc: B4 H02E0101 arc: B5 N1_V02S0501 arc: B6 V00T0000 arc: B7 V00B0000 arc: E1_H01E0001 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: S1_V02S0401 F6 arc: V01S0000 F2 arc: V01S0100 F1 arc: W1_H02W0601 F4 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R30C42:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 N1_V01S0000 arc: H00L0100 V02N0101 arc: H00R0100 V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0103 H06W0103 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 N1_V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02W0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: A0 H02W0701 arc: A1 E1_H02W0701 arc: A2 H00L0100 arc: A3 S1_V02N0701 arc: A4 H02W0501 arc: A5 E1_H01W0000 arc: A6 S1_V02N0301 arc: A7 S1_V02N0101 arc: B0 V00T0000 arc: B1 V00B0000 arc: B2 H00R0100 arc: B3 E1_H02W0101 arc: B4 V02S0501 arc: B5 H02E0101 arc: B6 H02W0101 arc: B7 V00B0100 arc: E1_H01E0101 F0 arc: E1_H02E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: N1_V01N0001 F2 arc: N1_V01N0101 F7 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S3_V06S0203 F4 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R30C43:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 N3_V06S0103 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02S0201 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 N3_V06S0303 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 S1_V02N0501 arc: A1 H02E0701 arc: B0 V00T0000 arc: B1 N1_V02S0101 arc: C4 W1_H02E0601 arc: C5 W1_H02E0601 arc: C6 W1_H02E0601 arc: C7 W1_H02E0601 arc: D4 N1_V02S0601 arc: D5 V00B0000 arc: D6 V02N0601 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: V01S0000 F1 arc: V01S0100 F0 arc: W1_H02W0501 F7 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R30C44:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 H01E0001 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0701 H01E0101 arc: A1 H02W0501 arc: A5 V02N0301 arc: B0 V02N0101 arc: B1 E1_H02W0101 arc: B2 N1_V02S0301 arc: B5 H02E0101 arc: B6 N1_V02S0701 arc: B7 V02N0701 arc: C0 H02W0601 arc: C1 N1_V01N0001 arc: C2 H00L0000 arc: C5 H02E0401 arc: C6 V00T0100 arc: C7 V02N0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H00R0000 arc: D2 V02N0001 arc: D3 V00B0100 arc: D5 V02N0601 arc: D6 V00B0000 arc: D7 N1_V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F2 arc: LSR0 W1_H02E0301 arc: M2 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N3_V06N0103 F1 arc: S1_V02S0101 F1 arc: S1_V02S0501 F7 arc: S1_V02S0601 F6 arc: S3_V06S0203 F7 arc: V01S0000 F0 arc: V01S0100 Q6 arc: W3_H06W0103 F1 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1011000000001011 word: SLICEA.K0.INIT 0000110011111100 word: SLICEA.K1.INIT 1101000000000000 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 0000111100001100 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R30C45:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 H01E0001 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 H02W0301 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 H01E0001 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: W3_H06W0003 N3_V06S0003 arc: B0 H00R0100 arc: B4 N1_V01S0000 arc: B6 S1_V02N0501 arc: C0 H02E0601 arc: C4 E1_H02W0401 arc: C6 V00T0100 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 E1_H02W0001 arc: D4 H02E0001 arc: D5 H00L0100 arc: D6 S1_V02N0601 arc: D7 E1_H02W0001 arc: E1_H01E0001 F4 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: M0 H02W0601 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0001 Q0 arc: N3_V06N0003 Q0 arc: V01S0000 Q6 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1100000011110011 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1100000011110011 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R30C46:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 N3_V06S0203 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0303 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: A3 V00T0000 arc: B3 V02N0301 arc: B4 H02E0101 arc: B7 V00B0100 arc: C3 H00L0100 arc: C4 E1_H01E0101 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 E1_H02W0201 arc: D4 H02E0201 arc: D5 H01W0000 arc: D7 N1_V02S0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E1_H02E0301 Q1 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q1 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 H02W0601 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: N1_V01N0101 F1 arc: N1_V02N0301 F1 arc: N3_V06N0203 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0011001100001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1100000011100000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R30C47:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 W1_H02E0301 arc: H00L0100 H02E0301 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 H06E0103 arc: N3_V06N0303 H06E0303 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02N0001 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N1_V02S0601 arc: H01W0000 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A2 S1_V02N0501 arc: A3 S1_V02N0501 arc: A4 V00B0000 arc: A5 W1_H02E0701 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 E1_H02W0101 arc: B5 V02S0701 arc: B6 H02W0101 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 V00T0100 arc: C5 V02N0201 arc: C6 N1_V02S0201 arc: CLK1 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 S1_V02N0401 arc: D5 S1_V02N0601 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q2 arc: LSR1 H02W0301 arc: M6 V00T0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0101 Q3 arc: S1_V02S0001 Q0 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R30C48:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 E1_H01W0000 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 E1_H02W0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V06S0203 arc: N1_V02N0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: A3 V02N0501 arc: B0 W1_H02E0101 arc: B2 H00L0000 arc: B3 V02S0301 arc: B4 N1_V02S0501 arc: B5 V02N0701 arc: B6 E1_H02W0101 arc: C0 H02E0401 arc: C2 V02S0601 arc: C3 H02W0601 arc: C4 E1_H02W0601 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V00B0100 arc: D2 H00R0000 arc: D3 V00T0100 arc: D4 N1_V02S0401 arc: D5 V02N0601 arc: D6 H00L0100 arc: D7 F2 arc: E1_H01E0101 F3 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F2 arc: S1_V02S0001 F0 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 1100000011001111 word: SLICEC.K1.INIT 0000110011111100 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 0000111100110011 word: SLICEA.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111110011110000 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R30C49:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0303 V06N0303 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02W0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V06S0303 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: A3 V00T0000 arc: B3 N1_V02S0301 arc: B5 N1_V02S0701 arc: B6 E1_H02W0301 arc: C3 H00L0000 arc: C4 H02E0401 arc: C5 H02E0601 arc: C6 V02N0001 arc: CE0 E1_H02W0101 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 V00T0100 arc: D4 H00R0100 arc: D5 H00L0100 arc: D6 V02N0601 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q5 arc: M0 W1_H02E0601 arc: M1 E1_H02W0001 arc: M2 W1_H02E0601 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0203 F4 arc: S1_V02S0101 F1 arc: V01S0000 F1 arc: V01S0100 Q1 arc: W1_H02W0301 F1 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1111110000110000 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R30C4:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 H02W0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0401 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0701 arc: V00T0100 H02W0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 N1_V01S0100 arc: A0 H00R0000 arc: A1 H02E0501 arc: A3 H00L0100 arc: A7 H02E0701 arc: B0 V02S0301 arc: B1 V00B0000 arc: B3 S1_V02N0301 arc: B7 F3 arc: C0 V02N0401 arc: C1 H00L0000 arc: C3 H02W0601 arc: C7 H01E0001 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02W0201 arc: D3 V00B0100 arc: D7 V01N0001 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 F1 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: N3_V06N0303 F6 arc: S1_V02S0601 Q4 arc: V00T0000 F0 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100111101000101 word: SLICEA.K0.INIT 1000110000100011 word: SLICEA.K1.INIT 1111001101010001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R30C50:PLC2 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 V02S0001 arc: H00R0000 H02E0401 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 H06E0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0101 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: A3 V00B0000 arc: B3 H00L0000 arc: B6 S1_V02N0501 arc: C3 H00R0100 arc: C6 H01E0001 arc: CE0 H02W0101 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 H00R0000 arc: D6 H00L0100 arc: D7 V02N0401 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H00L0100 F1 arc: H01W0000 F1 arc: H01W0100 Q1 arc: M0 H02E0601 arc: M1 E1_H02W0001 arc: M2 E1_H02W0601 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F1 arc: S1_V02S0301 F1 arc: S1_V02S0401 Q4 arc: V01S0000 Q1 arc: V01S0100 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R30C51:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: H00R0000 S1_V02N0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 S1_V02N0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: N1_V02N0001 W3_H06E0003 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0203 E1_H01W0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: E1_H02E0601 Q4 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 Q2 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R30C52:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 H01E0101 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0203 V06S0203 arc: H00R0000 V02N0601 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 E1_H02W0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E1_H02W0301 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 arc: W1_H02W0701 W3_H06E0203 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: E1_H02E0201 Q2 arc: E1_H02E0401 Q6 arc: E3_H06E0103 Q2 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R30C53:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 N1_V01S0000 arc: H00L0000 V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0501 N3_V06S0303 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 H01E0101 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: B2 H02E0101 arc: B3 V02S0301 arc: B4 N1_V02S0701 arc: B5 H02E0101 arc: B6 N1_V01S0000 arc: B7 N1_V02S0701 arc: C2 H00L0000 arc: C3 V02S0401 arc: C4 W1_H02E0601 arc: C5 V02S0001 arc: C6 V02S0201 arc: C7 W1_H02E0601 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 W1_H02E0201 arc: D4 V00B0000 arc: D5 N1_V02S0601 arc: D6 H02W0201 arc: D7 V00B0000 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: S1_V02S0601 F4 arc: S1_V02S0701 F7 arc: V01S0100 F6 arc: W1_H02W0501 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100001100111100 word: SLICEC.K1.INIT 1111110011000000 word: SLICED.K0.INIT 1100001100111100 word: SLICED.K1.INIT 1111110011000000 word: SLICEB.K0.INIT 1100001100111100 word: SLICEB.K1.INIT 1100001100111100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R30C54:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0301 W3_H06E0003 arc: B0 V00T0000 arc: B1 V00B0000 arc: B2 H02E0101 arc: B3 N1_V02S0301 arc: B4 V02S0701 arc: B5 H01E0101 arc: B6 N1_V02S0501 arc: B7 V02S0701 arc: C0 N1_V01S0100 arc: C1 H02E0401 arc: C2 V02S0601 arc: C3 W1_H02E0401 arc: C4 W1_H02E0601 arc: C5 N1_V02S0001 arc: C6 W1_H02E0401 arc: C7 W1_H02E0601 arc: D0 V00B0100 arc: D1 N1_V02S0201 arc: D2 H00R0000 arc: D3 V02N0201 arc: D4 V02N0601 arc: D5 H00R0100 arc: D6 H00L0100 arc: D7 V02N0601 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F2 arc: S1_V02S0101 F1 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V01S0100 F0 word: SLICEA.K0.INIT 1100001100111100 word: SLICEA.K1.INIT 1111110011000000 word: SLICED.K0.INIT 1100001100111100 word: SLICED.K1.INIT 1111110011000000 word: SLICEB.K0.INIT 1100001100111100 word: SLICEB.K1.INIT 1111110011000000 word: SLICEC.K0.INIT 1100001100111100 word: SLICEC.K1.INIT 1111110011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R30C55:PLC2 arc: E1_H02E0601 V02S0601 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0001 arc: V00T0100 V02S0501 arc: W1_H02W0101 V06S0103 arc: N3_V06N0303 W3_H06E0303 arc: B3 H00L0000 arc: B6 V00T0000 arc: B7 N1_V02S0701 arc: C2 N1_V01N0001 arc: C3 N1_V01S0100 arc: C6 N1_V02S0001 arc: C7 V02S0201 arc: CE0 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D2 H02E0201 arc: D3 V02S0001 arc: D6 V00B0000 arc: D7 V02S0401 arc: E1_H01E0101 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: M0 V00T0100 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: S1_V02S0501 F7 arc: S3_V06S0303 F6 arc: V00T0000 Q0 arc: V01S0000 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100001100111100 word: SLICED.K1.INIT 1111110011000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111110011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 .tile R30C56:PLC2 arc: H00L0100 E1_H02W0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 S1_V02N0301 arc: V00T0100 E1_H02W0101 arc: C6 V00T0000 arc: C7 V00T0000 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D6 H01W0000 arc: D7 H01W0000 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: M0 V00B0100 arc: M2 H02E0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: S1_V02S0601 F6 arc: V00T0000 Q0 arc: V01S0000 F7 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R30C57:PLC2 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 V01N0101 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0401 V02S0401 arc: A5 H02W0501 arc: B5 V02N0501 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 V02S0601 arc: C3 V02S0601 arc: C5 V02N0201 arc: C6 N1_V02S0001 arc: C7 N1_V02S0001 arc: D0 N1_V02S0201 arc: D1 N1_V02S0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D5 H02W0001 arc: D6 N1_V02S0601 arc: D7 N1_V02S0601 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: N3_V06N0303 F5 arc: S1_V02S0101 F3 arc: S1_V02S0301 F1 arc: S1_V02S0601 F6 arc: S1_V02S0701 F7 arc: V01S0100 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000010101010 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R30C58:PLC2 arc: N1_V02N0401 N1_V01S0000 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V01S0100 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0401 W3_H06E0203 .tile R30C59:PLC2 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 .tile R30C5:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0601 V02N0601 arc: H00L0100 N1_V02S0101 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H01W0100 arc: V00B0100 V02N0101 arc: V00T0000 H02E0001 arc: V00T0100 H02W0101 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: A1 V02N0701 arc: B1 W1_H02E0301 arc: C1 V02N0601 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: E1_H01E0001 F0 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: H01W0100 Q2 arc: M0 H02E0601 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: S1_V02S0601 Q4 arc: S3_V06S0303 Q6 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0401 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000010 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R30C60:PLC2 arc: N3_V06N0203 S3_V06N0203 arc: W1_H02W0501 S3_V06N0303 .tile R30C61:PLC2 arc: S3_V06S0203 N3_V06S0203 .tile R30C62:PLC2 arc: S3_V06S0103 H06E0103 .tile R30C65:PLC2 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 .tile R30C69:PLC2 arc: S3_V06S0003 N3_V06S0003 .tile R30C6:PLC2 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0003 E3_H06W0003 arc: A1 E1_H01E0001 arc: A2 V00B0000 arc: A6 E1_H02W0501 arc: B1 W1_H02E0101 arc: B2 E1_H02W0101 arc: B3 H00R0000 arc: B6 V02S0501 arc: C1 H00L0000 arc: C2 H02E0601 arc: C3 H00L0100 arc: C6 H02W0601 arc: C7 V02S0201 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 V02N0001 arc: D3 V02N0001 arc: D6 V02N0601 arc: D7 H00R0100 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: M0 V00T0000 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: N3_V06N0003 F0 arc: S1_V02S0601 F6 arc: V00T0000 F2 arc: V00T0100 F3 arc: V01S0000 F3 arc: V01S0100 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0101001111111111 word: SLICEB.K1.INIT 0000000011111100 word: SLICED.K0.INIT 1100001101000001 word: SLICED.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R30C7:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: H00L0100 V02S0301 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 S1_V02N0101 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0701 V01N0101 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 N1_V02S0601 arc: A1 H00R0000 arc: A2 V00B0000 arc: B1 E1_H01W0100 arc: B2 E1_H01W0100 arc: C1 V02N0401 arc: C2 V02N0401 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V00B0100 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H00R0000 Q6 arc: H01W0100 F1 arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: V00B0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010010100100001 word: SLICEB.K0.INIT 1010010100100001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R30C8:PLC2 arc: E1_H02E0401 E1_H01W0000 arc: H00L0100 H02E0301 arc: H00R0000 V02S0601 arc: H00R0100 V02N0501 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0501 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 H01E0101 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: B1 S1_V02N0101 arc: B2 S1_V02N0301 arc: C1 H00L0100 arc: C2 H00L0100 arc: CE2 N1_V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V00B0100 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q6 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q4 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0601 Q6 arc: V01S0000 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000110010101111 word: SLICEB.K0.INIT 1000110010101111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R30C9:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 H01E0101 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02N0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0701 N1_V02S0601 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 E3_H06W0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0000 arc: A5 S1_V02N0301 arc: B0 V01N0001 arc: B5 V02S0701 arc: C0 H02W0601 arc: C1 H02E0401 arc: C5 V00T0000 arc: CE1 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00T0100 arc: D5 E1_H01W0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: H01W0000 Q6 arc: M2 N1_V01N0001 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0301 F1 arc: V01S0000 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010111100100011 word: SLICEA.K0.INIT 1010010100100001 word: SLICEA.K1.INIT 0000111111110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R31C10:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E3_H06W0103 arc: A1 E1_H01E0001 arc: A2 V00B0000 arc: B1 N1_V02S0101 arc: B2 H00R0000 arc: C1 H02W0601 arc: C2 H02W0601 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V00B0100 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 E1_H02W0601 arc: M1 V01S0100 arc: M2 E1_H02W0601 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V00B0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0301 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1000101011001111 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000101011001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R31C11:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0501 W1_H02E0501 arc: S1_V02S0201 E3_H06W0103 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02E0701 arc: W1_H02W0601 E1_H02W0301 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: M2 V00B0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R31C12:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0401 H06W0203 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 V06S0303 arc: W3_H06W0303 E3_H06W0203 arc: A1 H00L0100 arc: A4 V00T0100 arc: A5 H02E0701 arc: A6 H00L0000 arc: A7 S1_V02N0301 arc: B1 H02W0101 arc: B4 H00R0000 arc: B5 H01E0101 arc: B6 W1_H02E0301 arc: B7 W1_H02E0101 arc: C1 N1_V01S0100 arc: C4 E1_H01E0101 arc: C5 H02E0401 arc: C6 S1_V02N0001 arc: C7 S1_V02N0201 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D4 H02W0001 arc: D5 H00R0100 arc: D6 H02E0201 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F0 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 E1_H02W0601 arc: M2 H02E0601 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F6 arc: V01S0100 Q2 arc: W1_H02W0501 F5 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 1010101010001010 word: SLICEC.K0.INIT 1011000010111011 word: SLICEC.K1.INIT 1000010000100001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111011101110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R31C13:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0100 V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 W1_H02E0301 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: A3 E1_H01E0001 arc: A7 H02E0501 arc: B3 H00L0000 arc: B4 H00R0000 arc: B7 E1_H02W0101 arc: C3 V02S0601 arc: C4 V02S0201 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D4 N1_V02S0601 arc: D5 V01N0001 arc: D7 H00L0100 arc: E1_H01E0001 Q4 arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0100 Q0 arc: M0 V00T0000 arc: M4 V00B0000 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F3 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R31C14:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02W0201 arc: H00L0100 N1_V02S0101 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 E3_H06W0203 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 E1_H02W0701 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0103 E3_H06W0103 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A2 H02W0501 arc: A3 V00T0000 arc: A4 E1_H02W0501 arc: A5 V02N0301 arc: A6 H02E0501 arc: A7 S1_V02N0301 arc: B0 V02N0101 arc: B1 V00B0000 arc: B2 V02N0101 arc: B3 H00L0000 arc: B4 E1_H02W0101 arc: B5 S1_V02N0701 arc: B6 V00B0100 arc: B7 S1_V02N0701 arc: C0 H02W0401 arc: C1 H02W0601 arc: C2 H02W0401 arc: C3 H00R0100 arc: C4 V02S0001 arc: C5 V02N0001 arc: C6 V02S0001 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02E0201 arc: D2 V01S0100 arc: D3 V02S0201 arc: D4 E1_H02W0001 arc: D5 V02S0601 arc: D6 E1_H02W0001 arc: D7 V02S0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F4 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F7 arc: N1_V02N0401 F6 arc: V00T0000 Q2 arc: V00T0100 F1 arc: V01S0100 F3 arc: W1_H02W0001 Q2 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 1010101010001010 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 word: SLICEB.K0.INIT 1111111110000000 word: SLICEB.K1.INIT 0000000011001010 word: SLICEA.K0.INIT 1111111110000000 word: SLICEA.K1.INIT 0000000011001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R31C15:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 E3_H06W0203 arc: H00L0000 V02S0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 E3_H06W0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A1 V01N0101 arc: A3 H02E0501 arc: B1 V00T0000 arc: B3 V01N0001 arc: B6 V00B0000 arc: C1 H00R0100 arc: C3 H00L0000 arc: C6 E1_H02W0601 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D3 H00R0000 arc: D6 N1_V02S0601 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q6 arc: M0 V00T0100 arc: M4 H02W0401 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0601 Q4 arc: V00B0000 Q6 arc: V00T0100 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R31C16:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0101 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N1_V02S0001 arc: V00B0000 H02W0601 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0103 E3_H06W0003 arc: A1 H00L0000 arc: A7 H00R0000 arc: B1 V02S0101 arc: B7 V00T0000 arc: C1 V02S0401 arc: C7 H02W0401 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D7 W1_H02E0201 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: M0 W1_H02E0601 arc: M2 V00T0100 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F7 arc: N1_V02N0001 F0 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111011101110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R31C17:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 V06S0203 arc: H00L0000 H02W0201 arc: H00L0100 H02E0101 arc: H00R0000 V02N0601 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0501 N1_V01S0100 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V02N0701 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0103 E3_H06W0003 arc: A0 H02W0501 arc: A1 E1_H01E0001 arc: A4 V00B0000 arc: A5 H02E0501 arc: B0 V00T0000 arc: B1 W1_H02E0301 arc: B2 H01W0100 arc: B4 V02N0501 arc: B5 H00L0000 arc: C0 W1_H02E0401 arc: C1 H00R0100 arc: C2 H02E0601 arc: C4 S1_V02N0001 arc: C5 N1_V02S0001 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00B0100 arc: D2 H00R0000 arc: D3 H02E0201 arc: D4 H02E0001 arc: D5 H00L0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q2 arc: M2 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: V01S0000 Q0 arc: V01S0100 F1 arc: W1_H02W0001 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111110000000 word: SLICEA.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R31C18:PLC2 arc: E1_H02E0701 E3_H06W0203 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H02W0401 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 N1_V02S0701 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: B0 H02E0301 arc: B1 H02E0301 arc: B2 H01W0100 arc: B6 V02S0501 arc: C0 H00R0100 arc: C1 H02E0401 arc: C2 E1_H02W0601 arc: C6 E1_H02W0601 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0001 arc: D2 H00R0000 arc: D3 V00T0100 arc: D6 S1_V02N0601 arc: D7 H02W0001 arc: E1_H01E0101 F1 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 Q2 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V01S0000 F0 arc: W1_H02W0601 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000111111 word: SLICEA.K1.INIT 0000111100110011 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R31C19:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 H01E0101 arc: H00R0000 H02W0401 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: CE0 W1_H02E0101 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 E1_H02W0601 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N3_V06N0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R31C20:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 H02E0301 arc: H00R0000 V02N0401 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02N0601 arc: W3_H06W0203 E3_H06W0203 arc: A0 E1_H02W0501 arc: A1 S1_V02N0501 arc: A7 H02E0501 arc: B0 V00T0000 arc: B1 N1_V02S0301 arc: B2 H00L0000 arc: B7 V02N0501 arc: C0 N1_V01N0001 arc: C1 H02E0601 arc: C2 H00R0100 arc: C5 E1_H02W0401 arc: C7 N1_V02S0001 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 E1_H02W0001 arc: D2 S1_V02N0001 arc: D3 V00T0100 arc: D5 H00L0100 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 F5 arc: LSR0 H02W0301 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F7 arc: N1_V02N0001 Q2 arc: N3_V06N0103 Q2 arc: V01S0000 Q2 arc: V01S0100 F1 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000100000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000000000111 word: SLICEA.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 1111111111110011 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R31C21:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W1_H02E0001 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 H02W0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02N0601 arc: V00T0100 V02S0501 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A3 V02S0701 arc: A5 V02N0101 arc: A7 H02E0701 arc: B3 E1_H02W0301 arc: B4 N1_V02S0501 arc: B5 H00R0000 arc: B6 E1_H02W0101 arc: B7 V00B0000 arc: C3 H02W0601 arc: C4 E1_H01E0101 arc: C5 V00T0000 arc: C6 H02E0601 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D3 H02W0201 arc: D4 H00L0100 arc: D5 E1_H02W0001 arc: D6 H00L0100 arc: D7 W1_H02E0201 arc: E1_H01E0101 F5 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 F7 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q4 word: SLICED.K0.INIT 1111110011110000 word: SLICED.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 1111110011110000 word: SLICEC.K1.INIT 0000000011001010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0100110011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R31C22:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 E1_H01W0000 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 V02S0301 arc: H00R0000 H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0003 E3_H06W0003 arc: A1 V01N0101 arc: A2 V02S0501 arc: A4 H02E0701 arc: A6 H00R0000 arc: B1 W1_H02E0301 arc: B2 S1_V02N0301 arc: B3 H02W0301 arc: B4 H02E0101 arc: B6 V00T0000 arc: B7 V02S0701 arc: C1 H00L0100 arc: C2 H02E0401 arc: C3 S1_V02N0601 arc: C4 V02N0001 arc: C6 V02S0201 arc: C7 F6 arc: CE1 E1_H02W0101 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 V02S0001 arc: D3 V00B0100 arc: D4 H02E0201 arc: D5 E1_H02W0001 arc: D6 H00R0100 arc: D7 F0 arc: E1_H02E0101 F3 arc: E3_H06E0003 F0 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q5 arc: M0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q3 arc: N1_V02N0001 F0 arc: N1_V02N0601 F6 arc: V00B0000 F4 arc: V00B0100 F7 arc: V00T0000 F2 arc: V01S0000 F7 arc: V01S0100 F3 arc: W1_H02W0201 F0 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 0001010100111111 word: SLICEB.K1.INIT 1111000011111100 word: SLICED.K0.INIT 0100000011000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R31C23:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 V06S0203 arc: H01W0100 E3_H06W0303 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N1_V01S0100 arc: W3_H06W0103 E3_H06W0003 arc: C3 N1_V02S0601 arc: C4 V00T0000 arc: C5 H02W0601 arc: CE0 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 V02N0601 arc: E1_H01E0001 Q6 arc: E1_H02E0701 F5 arc: E3_H06E0003 F3 arc: E3_H06E0303 F5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 F3 arc: H00R0100 F5 arc: H01W0000 F5 arc: M0 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0201 Q0 arc: N3_V06N0003 F3 arc: N3_V06N0303 F5 arc: S1_V02S0101 F3 arc: S1_V02S0701 F5 arc: S3_V06S0003 F3 arc: V00B0100 F5 arc: V01S0000 F4 arc: W1_H02W0501 F5 arc: W1_H02W0601 F4 arc: W1_H02W0701 F5 arc: W3_H06W0003 F3 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R31C24:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V01N0101 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0103 E3_H06W0103 arc: B4 H02W0101 arc: C4 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D4 E1_H02W0201 arc: D5 H00L0100 arc: E3_H06E0203 Q4 arc: F4 F5C_SLICE arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 H02W0401 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N3_V06N0103 Q2 arc: V01S0100 Q0 arc: W1_H02W0201 Q2 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111111001111 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R31C25:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0701 V06S0203 arc: E3_H06E0103 W1_H02E0101 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 V02S0001 arc: V00T0000 S1_V02N0601 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 E1_H02W0301 arc: H01W0100 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: B1 S1_V02N0101 arc: C1 V02S0601 arc: CE1 W1_H02E0101 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q6 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: H01W0000 Q6 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q2 arc: N3_V06N0103 Q2 arc: N3_V06N0203 Q4 arc: S3_V06S0103 F1 arc: V01S0000 Q4 arc: V01S0100 F1 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R31C26:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V02S0701 arc: H00L0000 N1_V02S0001 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 H06E0003 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0701 arc: V00T0100 V02S0701 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0303 V06S0303 arc: W3_H06W0203 E3_H06W0103 arc: C1 H00R0100 arc: C3 H00L0000 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D3 V00B0100 arc: E1_H01E0001 F1 arc: E1_H02E0101 F3 arc: E3_H06E0103 F1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q6 arc: N1_V02N0301 F1 arc: S1_V02S0101 F1 arc: V01S0100 Q4 arc: W1_H02W0101 F1 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R31C27:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0001 arc: V00B0100 H02E0701 arc: V00T0100 V02N0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V06S0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A5 N1_V01N0101 arc: B2 H00L0000 arc: B5 H02E0301 arc: C2 V02N0601 arc: C5 H02E0401 arc: CE0 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 H02W0201 arc: D3 N1_V02S0201 arc: D5 H00R0100 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: M0 V00T0100 arc: M2 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: N3_V06N0303 Q6 arc: S1_V02S0201 Q0 arc: S1_V02S0501 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R31C28:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0100 arc: A3 N1_V02S0501 arc: B0 V00T0000 arc: B3 V02N0101 arc: C0 H00L0000 arc: C3 V02N0601 arc: CE0 H00R0000 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D3 S1_V02N0001 arc: E1_H02E0001 Q0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V02N0401 Q4 arc: N3_V06N0003 Q0 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111011101110011 word: SLICEA.K0.INIT 1111111110001111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R31C29:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V06S0003 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 H06E0103 arc: V00B0000 V02N0001 arc: V00T0000 N1_V02S0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: S1_V02S0301 W3_H06E0003 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A3 V02N0501 arc: B3 H00L0000 arc: B6 V01S0000 arc: C3 H00L0100 arc: C6 E1_H02W0601 arc: CE0 H00R0000 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D6 V02S0601 arc: D7 H02W0001 arc: E1_H01E0101 Q4 arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00T0000 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W1_H02W0601 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R31C2:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0701 V02N0701 arc: H00L0100 H02W0301 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 E1_H02W0301 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E3_H06W0103 arc: V00B0000 V02N0001 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: A2 E1_H02W0701 arc: A3 H00L0100 arc: A5 N1_V01N0101 arc: A6 V00T0100 arc: B2 E1_H02W0101 arc: B3 H00R0100 arc: B5 V00B0100 arc: B6 V02S0501 arc: C1 V02S0401 arc: C2 H02W0601 arc: C3 V02N0401 arc: C5 F6 arc: C6 V00T0000 arc: C7 H02W0401 arc: D1 H02W0001 arc: D2 V02N0201 arc: D3 H00R0000 arc: D5 H01W0000 arc: D6 V02N0601 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F2 arc: E1_H02E0401 F4 arc: E1_H02E0601 F4 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: M4 E1_H01E0101 arc: N1_V01N0101 F1 arc: V00B0100 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 1100010011110101 word: SLICEB.K1.INIT 1100010011110101 word: SLICED.K0.INIT 1010111100100011 word: SLICED.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R31C30:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V06S0203 arc: H00L0000 E1_H02W0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 H01E0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 H02W0401 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N3_V06S0303 arc: S1_V02S0701 W3_H06E0203 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0103 V06S0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 H00R0000 arc: A6 H00L0000 arc: A7 V00T0100 arc: B0 H00R0100 arc: B6 S1_V02N0701 arc: B7 V02N0501 arc: C0 S1_V02N0401 arc: C6 H02W0401 arc: C7 S1_V02N0001 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D6 H02W0201 arc: D7 V00B0000 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: V00B0100 F7 arc: V01S0100 F6 arc: W1_H02W0201 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000010 word: SLICED.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 0000000000010011 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R31C31:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 N1_V02S0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V06S0203 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: A1 E1_H02W0701 arc: A3 H02E0501 arc: A5 V02S0301 arc: A6 H00R0000 arc: B1 V00B0000 arc: B3 H00L0000 arc: B5 V02N0501 arc: B6 N1_V01S0000 arc: C1 H00L0100 arc: C2 E1_H02W0401 arc: C3 H00L0100 arc: C5 S1_V02N0201 arc: C6 E1_H01E0101 arc: D1 V00B0100 arc: D2 H02E0001 arc: D3 V00B0100 arc: D5 S1_V02N0401 arc: D6 V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M6 V00T0000 arc: S1_V02S0701 F5 arc: V00T0000 F2 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000100000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R31C32:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02N0601 arc: H00R0000 H02E0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 W1_H02E0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A4 V02S0101 arc: A5 H02W0501 arc: A7 S1_V02N0301 arc: B4 V00B0100 arc: B5 H02E0101 arc: B6 S1_V02N0501 arc: B7 H02E0101 arc: C4 V02S0201 arc: C5 H01E0001 arc: C6 V00T0000 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 H02W0201 arc: D7 H02E0201 arc: E1_H01E0001 Q2 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: E3_H06E0303 F6 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: M0 W1_H02E0601 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q2 arc: N3_V06N0003 Q0 arc: W1_H02W0001 Q2 arc: W3_H06W0203 F4 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 0000100000000000 word: SLICEC.K1.INIT 0000000000000111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R31C33:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 V02N0001 arc: V00B0100 W1_H02E0701 arc: V00T0100 S1_V02N0701 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 E1_H01W0000 arc: B0 H02W0101 arc: B3 E1_H01W0100 arc: B5 H01E0101 arc: B7 S1_V02N0501 arc: C0 E1_H02W0401 arc: C3 H00L0100 arc: C5 H02E0601 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V00B0100 arc: D3 V00T0100 arc: D5 S1_V02N0401 arc: D7 S1_V02N0401 arc: E1_H01E0101 F0 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0101 Q3 arc: N1_V02N0701 Q5 arc: S3_V06S0003 Q3 arc: S3_V06S0303 Q5 arc: V01S0000 Q5 arc: V01S0100 Q7 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 0000001111001111 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R31C34:PLC2 arc: E1_H02E0401 V02N0401 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02E0401 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 V01N0101 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E3_H06W0203 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0303 E1_H01W0100 arc: B2 S1_V02N0101 arc: C2 H00L0000 arc: CE0 H02W0101 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 W1_H02E0201 arc: E3_H06E0103 Q2 arc: F2 F5B_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: M0 H02W0601 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0103 F2 arc: V01S0000 Q6 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R31C35:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 V06S0103 arc: H00L0000 V02N0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 V01N0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 E1_H01W0000 arc: N1_V02N0701 W3_H06E0203 arc: W3_H06W0203 V06S0203 arc: A1 H00L0100 arc: A3 V00T0000 arc: B1 F3 arc: B2 H00R0000 arc: B3 H00R0100 arc: C1 N1_V01N0001 arc: C2 H02W0601 arc: C3 H00L0000 arc: CE0 H02W0101 arc: CE2 V02S0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02W0001 arc: D2 N1_V02S0001 arc: D3 V00T0100 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q6 arc: M0 V00B0000 arc: M4 H02W0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: V01S0100 F3 arc: W1_H02W0601 Q4 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110010100000 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111110011101110 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 .tile R31C36:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0701 V02S0701 arc: H00L0000 S1_V02N0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 S1_V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H06E0003 arc: S3_V06S0003 H06E0003 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0601 E1_H01W0000 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A1 H02E0701 arc: A7 H00R0000 arc: B1 H02E0301 arc: B7 V02N0501 arc: C1 H02W0401 arc: C6 V01N0101 arc: C7 V00B0100 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D6 V00B0000 arc: D7 V02N0401 arc: E1_H01E0001 F7 arc: E1_H02E0001 Q2 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 W1_H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0003 F0 arc: N3_V06N0203 F7 arc: V01S0000 Q2 arc: V01S0100 F6 arc: W1_H02W0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1011000010111011 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000010110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R31C37:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02N0601 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0701 N1_V01S0100 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: A1 H02E0701 arc: A5 W1_H02E0501 arc: B1 V02N0101 arc: B2 H01W0100 arc: B3 H01W0100 arc: B4 W1_H02E0101 arc: B5 N1_V02S0701 arc: B6 V00B0100 arc: B7 V00B0100 arc: C1 F4 arc: C2 H00R0100 arc: C3 H00L0100 arc: C4 V02N0001 arc: C5 W1_H02E0401 arc: C6 V00T0000 arc: C7 V02N0201 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00T0100 arc: D2 H00R0000 arc: D3 H02W0001 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 V02S0601 arc: D7 H02W0001 arc: E3_H06E0003 F3 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 W1_H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 F5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000000011111100 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1100110010100000 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 0000000011111100 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111110011101110 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 .tile R31C38:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V06S0203 arc: H00L0000 H02W0001 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H02W0601 arc: V00B0000 H02W0401 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0501 V06S0303 arc: E1_H02E0601 W3_H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H00R0100 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B6 V02S0701 arc: B7 V02S0701 arc: C0 N1_V02S0401 arc: C1 V02N0401 arc: C2 N1_V02S0401 arc: C3 V02N0401 arc: C4 V00T0100 arc: C6 V00T0000 arc: C7 V01N0101 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 V02S0201 arc: D2 N1_V02S0001 arc: D3 V02S0201 arc: D4 E1_H02W0201 arc: D5 V02N0601 arc: D6 H02E0201 arc: D7 V02S0401 arc: E1_H01E0001 F4 arc: E3_H06E0003 F3 arc: E3_H06E0103 F1 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0401 F4 arc: S3_V06S0203 Q4 arc: V01S0000 F7 arc: V01S0100 Q4 arc: W1_H02W0601 Q4 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 0000000011111100 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000000011111100 word: SLICEA.K0.INIT 1100000011001111 word: SLICEA.K1.INIT 0000000011111100 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R31C39:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 V02N0601 arc: E3_H06E0203 H01E0001 arc: H00L0000 V02N0001 arc: H00L0100 E1_H02W0101 arc: H00R0100 V02N0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A6 V02N0301 arc: A7 E1_H02W0501 arc: B2 V02S0101 arc: B3 V02S0101 arc: B4 H02E0301 arc: B6 V00B0100 arc: B7 S1_V02N0501 arc: C2 V02S0401 arc: C3 H00L0100 arc: C4 H02E0601 arc: C6 V00T0000 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 H02E0001 arc: D4 V02N0401 arc: D5 V00B0000 arc: D6 H01W0000 arc: D7 V02S0601 arc: E1_H02E0201 Q0 arc: E3_H06E0003 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F7 arc: H01W0100 Q0 arc: M0 W1_H02E0601 arc: M4 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N3_V06N0003 Q0 arc: N3_V06N0303 F6 arc: V01S0100 Q0 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100000011001111 word: SLICEB.K1.INIT 0000000011111100 word: SLICED.K0.INIT 0000111100001110 word: SLICED.K1.INIT 1100010010000000 word: SLICEC.K0.INIT 1111000000110011 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R31C3:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: H00L0100 N1_V02S0301 arc: N1_V02N0001 E3_H06W0003 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0601 arc: V00B0000 V02N0201 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V02N0601 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 V02N0101 arc: A6 V02N0101 arc: A7 V02N0101 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 S1_V02N0701 arc: B6 V00B0000 arc: B7 V00B0000 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0601 arc: C3 S1_V02N0601 arc: C4 S1_V02N0201 arc: C6 S1_V02N0001 arc: C7 S1_V02N0001 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 E1_H02W0201 arc: D6 E1_H02W0201 arc: D7 E1_H02W0201 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 H01E0001 arc: M1 H02E0001 arc: M2 H02E0601 arc: M3 H00L0100 arc: M4 H02E0401 arc: M5 H02E0001 arc: M6 H02E0401 word: SLICEA.K0.INIT 1111111101111111 word: SLICEA.K1.INIT 1111111101111111 word: SLICEC.K0.INIT 1111111101111111 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111111101111111 word: SLICED.K1.INIT 1111111101111111 word: SLICEB.K0.INIT 1111111101111111 word: SLICEB.K1.INIT 1111111101111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R31C40:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 V06S0103 arc: H00L0000 H02W0201 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 V01N0001 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 N3_V06S0303 arc: N3_V06N0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A1 E1_H01E0001 arc: A4 V00T0000 arc: A5 E1_H02W0501 arc: B0 H00R0100 arc: B1 V00B0000 arc: B4 V02S0501 arc: B5 V01S0000 arc: C0 N1_V01N0001 arc: C1 H02E0601 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V01N0101 arc: C5 V00B0100 arc: C6 V00T0100 arc: C7 V00T0100 arc: D0 V01S0100 arc: D1 V02N0001 arc: D2 S1_V02N0201 arc: D3 H00R0000 arc: D4 E1_H02W0201 arc: D5 V02S0601 arc: D6 S1_V02N0401 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F4 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F2 arc: N1_V01N0001 F1 arc: N1_V01N0101 F6 arc: N1_V02N0101 F3 arc: N1_V02N0501 F7 arc: V01S0000 F4 arc: V01S0100 F5 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000011110011 word: SLICEA.K1.INIT 1001001001110101 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0000101000001100 word: SLICEC.K1.INIT 1101000010000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R31C41:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 V06S0203 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 H06E0203 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V06S0303 arc: E1_H02E0201 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0103 W3_H06E0103 arc: A1 V02N0501 arc: A4 H02W0501 arc: A7 H02W0501 arc: B0 H00R0100 arc: B1 S1_V02N0101 arc: B4 H02W0101 arc: B7 H02W0101 arc: C0 H00L0100 arc: C1 E1_H02W0601 arc: C2 N1_V02S0601 arc: C3 N1_V02S0601 arc: C4 W1_H02E0401 arc: C5 H02E0401 arc: C7 V00T0000 arc: D0 H02E0001 arc: D1 H00R0000 arc: D2 E1_H02W0201 arc: D3 V02N0001 arc: D4 V00B0000 arc: D5 V02S0601 arc: D7 V02S0401 arc: E1_H01E0101 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 F7 arc: N1_V01N0001 F5 arc: N1_V01N0101 F3 arc: N3_V06N0003 F0 arc: N3_V06N0303 F5 arc: S1_V02S0501 F5 arc: V01S0000 F4 arc: V01S0100 F2 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100010010000000 word: SLICEC.K0.INIT 1100010010000000 word: SLICEC.K1.INIT 1111000000001111 word: SLICEA.K0.INIT 0000000011110011 word: SLICEA.K1.INIT 1001010001001111 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R31C42:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 H02W0701 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02E0401 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02N0201 arc: E1_H01E0101 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: A3 H02E0501 arc: A5 N1_V01N0101 arc: A6 N1_V01N0101 arc: B2 H00R0100 arc: B3 S1_V02N0101 arc: B5 H01E0101 arc: B6 H01E0101 arc: B7 V02S0701 arc: C0 N1_V02S0601 arc: C1 N1_V02S0601 arc: C2 N1_V01N0001 arc: C3 H00L0000 arc: C5 H02W0401 arc: C6 H02E0601 arc: C7 V00T0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02W0001 arc: D2 V00B0100 arc: D3 V00T0100 arc: D5 N1_V02S0401 arc: D6 H00L0100 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q7 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q7 arc: N1_V02N0101 F1 arc: N1_V02N0501 Q7 arc: N3_V06N0203 Q7 arc: S1_V02S0501 Q7 arc: V00B0100 F5 arc: V01S0000 F6 arc: V01S0100 F0 arc: W1_H02W0501 Q7 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100010010000000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000000011110011 word: SLICEB.K1.INIT 1001010001001111 word: SLICED.K0.INIT 1100010010000000 word: SLICED.K1.INIT 0000000011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R31C43:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0203 V01N0001 arc: H00L0000 S1_V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0100 N1_V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 H06W0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H01E0001 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0701 W3_H06E0203 arc: W3_H06W0003 V06S0003 arc: A3 S1_V02N0701 arc: A4 H02E0701 arc: A5 V00B0000 arc: B0 N1_V02S0101 arc: B1 N1_V02S0101 arc: B3 V02N0101 arc: B4 H02W0101 arc: B5 H02E0101 arc: B6 V00T0000 arc: B7 V02S0701 arc: C0 E1_H01W0000 arc: C1 H00L0000 arc: C2 S1_V02N0401 arc: C3 H00L0100 arc: C4 E1_H02W0401 arc: C5 E1_H02W0401 arc: C6 V00B0100 arc: C7 V02S0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 N1_V02S0001 arc: D3 H02E0001 arc: D4 W1_H02E0001 arc: D5 W1_H02E0001 arc: D6 V02N0601 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: LSR0 H02E0301 arc: M0 H02W0601 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F3 arc: N3_V06N0003 F3 arc: S3_V06S0003 F3 arc: V01S0000 F3 arc: W1_H02W0001 F0 arc: W1_H02W0501 F5 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 1010110011001100 word: SLICEC.K1.INIT 1100101010101010 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0011001000000010 word: SLICED.K0.INIT 1100000011001111 word: SLICED.K1.INIT 0000001111110011 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R31C44:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 H06W0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 H01E0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02E0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02N0601 arc: E1_H02E0301 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: A3 H02W0501 arc: A6 V02N0101 arc: A7 H00L0000 arc: B3 H02E0301 arc: B4 V02N0701 arc: B5 V02N0701 arc: B6 V00B0000 arc: B7 S1_V02N0701 arc: C3 E1_H02W0401 arc: C4 V00T0100 arc: C5 V00T0000 arc: C6 H02W0401 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 V02S0201 arc: D4 W1_H02E0201 arc: D5 S1_V02N0601 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q1 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: M0 E1_H02W0601 arc: M1 H00R0000 arc: M2 H02E0601 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: N1_V01N0101 F7 arc: S1_V02S0301 F1 arc: V01S0000 F4 arc: W1_H02W0401 F6 word: SLICED.K0.INIT 1010110011001100 word: SLICED.K1.INIT 1010110011001100 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R31C45:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 H02W0501 arc: A5 H02E0701 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 V02S0101 arc: B3 V02S0101 arc: B4 N1_V02S0501 arc: B5 S1_V02N0501 arc: B6 V01S0000 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 H02E0601 arc: C5 V02S0001 arc: C6 E1_H02W0401 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 H02W0201 arc: D6 H02W0001 arc: D7 S1_V02N0601 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 F6 arc: LSR1 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: V01S0000 Q2 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R31C46:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 S1_V02N0601 arc: H01W0000 W3_H06E0103 arc: S1_V02S0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 N1_V02S0701 arc: A3 E1_H02W0701 arc: A4 V00B0000 arc: A5 W1_H02E0701 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B4 V02S0501 arc: B5 E1_H02W0101 arc: B6 V01S0000 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V02S0201 arc: C5 E1_H02W0601 arc: C6 W1_H02E0401 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 H00R0100 arc: D6 V02N0601 arc: D7 H02W0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F6 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q3 arc: LSR1 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: V01S0000 Q1 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R31C47:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 N1_V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 V06S0303 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 V00T0000 arc: A5 V02S0301 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B4 H00R0000 arc: B5 H02W0101 arc: B6 W1_H02E0301 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 N1_V02S0201 arc: C5 H02W0601 arc: C6 H02E0401 arc: CLK1 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 V02N0401 arc: D5 H00R0100 arc: D6 W1_H02E0201 arc: D7 H00L0100 arc: E1_H01E0101 F6 arc: E1_H02E0101 Q1 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q2 arc: LSR1 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: S1_V02S0301 Q3 word: SLICED.K0.INIT 0011001100001111 word: SLICED.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R31C48:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02E0001 arc: H00L0100 H02W0301 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 S1_V02N0701 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: B0 S1_V02N0301 arc: B2 H02E0301 arc: B4 H02E0101 arc: B7 V00B0100 arc: C0 N1_V02S0401 arc: C2 V02S0401 arc: C4 H02E0401 arc: C6 V02S0201 arc: C7 E1_H01E0101 arc: CE0 H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V01S0100 arc: D2 H00R0000 arc: D3 V02N0001 arc: D4 E1_H02W0001 arc: D5 H00R0100 arc: D6 V02N0401 arc: D7 H00L0100 arc: E1_H01E0101 F2 arc: E1_H02E0401 F4 arc: E3_H06E0003 Q0 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q7 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q7 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111001100000011 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111111111000000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R31C49:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H06W0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0701 W3_H06E0203 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: B0 H02E0301 arc: B2 H00R0100 arc: B6 V02N0501 arc: C0 H02E0601 arc: C2 F6 arc: C3 H00L0000 arc: C6 H02E0401 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02W0201 arc: D2 V02N0001 arc: D3 V02S0001 arc: D6 H00L0100 arc: D7 E1_H02W0001 arc: E1_H01E0101 F0 arc: E1_H02E0301 F3 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: H01W0100 Q2 arc: M0 V00B0000 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: S1_V02S0601 Q4 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0000111111110000 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R31C4:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N3_V06N0103 E3_H06W0103 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0701 N1_V01S0100 arc: A1 N1_V02S0701 arc: A2 V00T0000 arc: A5 H02E0501 arc: B1 V02S0301 arc: B2 V02S0101 arc: B5 S1_V02N0501 arc: C1 V02N0601 arc: C2 V02N0601 arc: C5 V00T0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V00B0100 arc: D5 H00L0100 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0100 Q6 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 H02E0401 arc: M6 E1_H02W0401 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: S1_V02S0601 F4 arc: S3_V06S0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010010100100001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100010011110101 word: SLICEB.K0.INIT 1100010011110101 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R31C50:PLC2 arc: H00L0100 V02S0301 arc: H00R0000 V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02W0501 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0601 arc: V00T0000 V02S0401 arc: V00T0100 H02W0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0701 V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: B2 N1_V02S0101 arc: B5 V02N0701 arc: B6 H01E0101 arc: C2 N1_V01S0100 arc: C3 H02E0601 arc: C4 E1_H01E0101 arc: C5 F6 arc: C6 V00T0100 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 E1_H02W0001 arc: D3 V02S0001 arc: D4 V02S0601 arc: D5 E1_H02W0001 arc: D6 H00L0100 arc: D7 S1_V02N0401 arc: E1_H01E0101 Q5 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: H01W0100 Q5 arc: M0 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q2 arc: N1_V02N0701 Q5 arc: N3_V06N0103 Q2 arc: V01S0100 Q0 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1111110000110000 word: SLICED.K0.INIT 1111110000001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R31C51:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02N0601 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 H06E0103 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H01W0100 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0303 W3_H06E0303 arc: A3 V02N0701 arc: A5 V00B0000 arc: B3 S1_V02N0101 arc: B5 S1_V02N0501 arc: C3 H00L0000 arc: C5 V00T0100 arc: CE0 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 H02E0201 arc: D5 H02E0201 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: M0 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0303 F5 arc: S1_V02S0201 Q0 arc: V01S0100 Q6 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R31C52:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0203 V06S0203 arc: H00L0000 E1_H02W0201 arc: H00R0100 H02E0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: V00T0000 E1_H02W0201 arc: V00T0100 N1_V02S0701 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V01N0101 arc: H01W0100 W3_H06E0303 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0103 W3_H06E0103 arc: A3 H02W0501 arc: A7 V02N0301 arc: B3 V02N0101 arc: B7 S1_V02N0701 arc: C3 H00L0000 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 W1_H02E0201 arc: D7 W1_H02E0201 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: V01S0100 Q0 arc: W3_H06W0003 F3 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010110000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R31C53:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: H00R0000 H02E0601 arc: H00R0100 N1_V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0501 W1_H02E0501 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V01S0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0701 arc: W1_H02W0501 V01N0101 arc: H01W0100 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 S3_V06N0203 arc: A7 V02N0101 arc: B5 H00R0000 arc: B7 V00B0100 arc: C5 V02S0001 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 N1_V02S0601 arc: D7 E1_H02W0001 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q0 arc: S1_V02S0501 F5 arc: W1_H02W0701 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110011000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010110000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R31C54:PLC2 arc: E1_H02E0401 N1_V02S0401 arc: H00L0000 V02N0201 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02S0001 arc: W1_H02W0201 V02N0201 arc: H01W0100 W3_H06E0303 arc: N3_V06N0003 W3_H06E0003 arc: A1 H02W0501 arc: A3 V01N0101 arc: B1 V02N0301 arc: B3 V02N0101 arc: B4 H00R0000 arc: B5 H00R0000 arc: C1 H00L0000 arc: C3 H00L0000 arc: C4 V02S0201 arc: C5 V02S0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: S1_V02S0401 Q6 arc: V01S0000 F5 arc: V01S0100 F4 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010110000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010110000000000 word: SLICEC.K0.INIT 1100001100111100 word: SLICEC.K1.INIT 1111110011000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R31C55:PLC2 arc: E1_H02E0601 V06S0303 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0701 arc: N3_V06N0003 H06W0003 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V01S0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V01N0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 S3_V06N0303 arc: C0 V02N0601 arc: C1 V02S0601 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 V02N0001 arc: C5 V02N0001 arc: C6 V02S0001 arc: C7 V00B0100 arc: D0 H00R0000 arc: D1 V00T0100 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F2 arc: S1_V02S0301 F3 arc: S1_V02S0401 F4 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: V01S0000 F1 arc: V01S0100 F6 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R31C56:PLC2 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 N1_V02S0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0100 V02S0501 arc: W1_H02W0101 H01E0101 arc: H01W0000 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0003 S3_V06N0003 arc: C0 H00L0000 arc: C1 N1_V01S0100 arc: C2 N1_V02S0601 arc: C3 H00L0000 arc: C4 V00T0100 arc: C5 V00T0100 arc: C6 N1_V02S0001 arc: C7 H02E0601 arc: D0 H00R0000 arc: D1 V02S0201 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 N1_V02S0401 arc: D7 V02S0401 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F7 arc: S1_V02S0301 F1 arc: S1_V02S0601 F6 arc: S1_V02S0701 F5 arc: S3_V06S0103 F2 arc: V01S0000 F3 arc: V01S0100 F4 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R31C57:PLC2 arc: E1_H02E0501 H01E0101 arc: H00L0000 S1_V02N0001 arc: H00R0000 S1_V02N0401 arc: N1_V02N0201 E1_H01W0000 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0003 arc: V00B0100 H02W0701 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: N1_V02N0501 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: C0 V02N0601 arc: C1 V02S0401 arc: C2 H00L0000 arc: C3 H02E0601 arc: C4 V02S0001 arc: C5 S1_V02N0001 arc: C7 V02N0001 arc: D0 H00R0000 arc: D1 H02W0201 arc: D2 V00T0100 arc: D3 V00B0100 arc: D4 H02W0201 arc: D5 S1_V02N0601 arc: D7 S1_V02N0401 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F2 arc: N1_V01N0101 F4 arc: S1_V02S0001 F0 arc: S1_V02S0101 F1 arc: S1_V02S0501 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R31C58:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: S1_V02S0501 H02E0501 arc: S3_V06S0103 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 H01E0101 arc: H01W0000 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 S3_V06N0103 .tile R31C59:PLC2 arc: N3_V06N0303 S3_V06N0303 .tile R31C5:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: H00L0000 S1_V02N0201 arc: H00L0100 W1_H02E0101 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N1_V01S0100 arc: V00B0000 H02W0601 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V06S0203 arc: A0 E1_H01E0001 arc: A3 V02N0501 arc: A5 H02E0701 arc: A6 N1_V02S0101 arc: A7 H00R0000 arc: B0 V02S0301 arc: B1 H01W0100 arc: B2 F3 arc: B3 V01N0001 arc: B5 H01E0101 arc: B6 H02E0101 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 N1_V01S0100 arc: C2 H00R0100 arc: C3 H00L0000 arc: C5 V00T0100 arc: C6 V00B0100 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02E0201 arc: D2 V02S0001 arc: D3 V02N0201 arc: D5 H01W0000 arc: D6 E1_H02W0001 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F3 arc: N1_V02N0001 F2 arc: V01S0000 Q0 arc: V01S0100 F4 arc: W1_H02W0101 F1 word: SLICEA.K0.INIT 1111111100101010 word: SLICEA.K1.INIT 1100110000001100 word: SLICEB.K0.INIT 0000001100000000 word: SLICEB.K1.INIT 0000000010000000 word: SLICED.K0.INIT 1010001011110011 word: SLICED.K1.INIT 1100010011110101 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000101000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R31C60:PLC2 arc: S3_V06S0003 N3_V06S0003 .tile R31C62:PLC2 arc: S3_V06S0203 N3_V06S0103 .tile R31C63:PLC2 arc: S3_V06S0103 N3_V06S0003 .tile R31C66:PLC2 arc: S3_V06S0103 N3_V06S0003 .tile R31C69:PLC2 arc: S1_V02S0101 N3_V06S0103 arc: S3_V06S0103 N3_V06S0103 .tile R31C6:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06S0303 arc: H00L0100 H02W0101 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 H06W0103 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0303 E3_H06W0203 arc: A5 N1_V01S0100 arc: B5 V02S0701 arc: C5 V00B0100 arc: D5 V02S0601 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 V00B0000 arc: M3 H00L0100 arc: M4 E1_H02W0401 arc: M5 E1_H02W0001 arc: M6 E1_H02W0401 arc: S1_V02S0101 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1011111111111111 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R31C7:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: H00L0000 S1_V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0601 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H01E0001 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 V02S0001 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 S1_V02N0601 arc: A1 V02S0701 arc: A2 V02S0701 arc: A5 N1_V01N0101 arc: B1 N1_V02S0101 arc: B2 N1_V02S0101 arc: B5 H00R0000 arc: C1 V02N0401 arc: C2 V02N0401 arc: C5 V01N0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 V00T0100 arc: D5 V00B0000 arc: E1_H01E0001 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 E1_H02W0601 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010111100100011 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100010011110101 word: SLICEB.K0.INIT 1100010011110101 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R31C8:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: H00L0100 H02E0301 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0501 H02W0501 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 H01E0001 arc: W3_H06W0103 E3_H06W0103 arc: A1 V01N0101 arc: A2 V01N0101 arc: B1 V00T0000 arc: B2 H00R0000 arc: C1 V02N0401 arc: C2 V02N0401 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V00B0100 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 H02W0601 arc: M1 H02W0001 arc: M2 H02W0601 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: V01S0100 Q6 arc: W1_H02W0601 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100010011110101 word: SLICEB.K0.INIT 1100010011110101 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R31C9:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: H00L0000 V02N0001 arc: H00L0100 V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H06W0303 arc: N3_V06N0303 H06W0303 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H01W0000 arc: N1_V02N0001 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: B1 H01W0100 arc: B2 H01W0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0301 F1 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100010011110101 word: SLICEB.K0.INIT 1100010011110101 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R32C10:PLC2 arc: E1_H02E0401 E1_H01W0000 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: V00B0000 W1_H02E0601 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0501 V06S0303 arc: A1 N1_V02S0501 arc: A2 N1_V02S0501 arc: B1 V00B0000 arc: B2 H02E0301 arc: C1 H00R0100 arc: C2 H00R0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: M0 V00T0000 arc: M1 V01S0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111101000101 word: SLICEB.K0.INIT 1100111101000101 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R32C11:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V01N0101 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0601 H06W0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A5 S1_V02N0301 arc: A6 H00L0000 arc: A7 N1_V01S0100 arc: B5 V02N0701 arc: B6 E1_H02W0301 arc: B7 E1_H02W0101 arc: C5 F6 arc: C6 V00B0100 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 V02N0601 arc: D6 H00L0100 arc: D7 H00R0100 arc: E1_H02E0601 F4 arc: E3_H06E0203 F4 arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 V00T0000 arc: M0 H02W0601 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V01S0000 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R32C12:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E3_H06E0303 V06S0303 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0501 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A4 H02W0701 arc: A5 H02W0501 arc: B4 H00L0000 arc: B5 H00R0000 arc: C4 V00T0100 arc: C5 S1_V02N0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 H02W0201 arc: D5 H02E0001 arc: E1_H01E0101 Q6 arc: E3_H06E0103 Q2 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M2 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q0 arc: N1_V02N0601 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R32C13:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 W1_H02E0201 arc: H00R0100 H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 W1_H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A7 S1_V02N0301 arc: B7 V02N0701 arc: C7 H02W0401 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F7 arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 V00T0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N3_V06N0203 Q4 arc: V01S0000 F7 arc: V01S0100 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111000001111100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R32C14:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 E1_H02W0001 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E3_H06W0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: B0 V00T0000 arc: B4 H00R0000 arc: C0 H02W0601 arc: C4 V02N0001 arc: CE1 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 S1_V02N0201 arc: D4 H02W0001 arc: D5 S1_V02N0601 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: H00R0000 Q4 arc: H01W0000 Q0 arc: H01W0100 Q4 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: N3_V06N0103 Q2 arc: V00T0000 Q0 arc: V01S0100 Q6 arc: W1_H02W0201 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R32C15:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 V02S0701 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H02W0501 arc: V00T0000 H02W0201 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 V02N0601 arc: A3 V00B0000 arc: B3 V02N0301 arc: C3 W1_H02E0401 arc: CE0 H00L0000 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: E3_H06E0003 F3 arc: F3 F3_SLICE arc: M0 H02W0601 arc: M4 V00T0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q4 arc: V00B0000 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R32C16:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0101 arc: V00T0000 V02N0601 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02S0601 arc: A1 V01N0101 arc: A3 E1_H01E0001 arc: A7 V02S0101 arc: B1 H00R0100 arc: B3 H02E0101 arc: B7 S1_V02N0501 arc: C1 H00L0100 arc: C3 H00L0100 arc: C7 E1_H01E0101 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D3 H00R0000 arc: D7 H02W0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V02N0401 F6 arc: V01S0000 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000100000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000100000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R32C17:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 V02S0001 arc: H00L0100 H02W0101 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H06W0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W3_H06W0003 V06S0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A5 H02E0701 arc: A7 F5 arc: B0 V02N0101 arc: B5 V01S0000 arc: B6 V02S0501 arc: B7 S1_V02N0501 arc: C0 H00L0100 arc: C5 N1_V02S0201 arc: C6 V00T0100 arc: C7 V00T0000 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00B0100 arc: D5 V02N0601 arc: D6 N1_V02S0601 arc: D7 H02E0201 arc: E1_H01E0001 F7 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: M0 V00B0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V01S0000 Q0 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R32C18:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 H01E0001 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0203 H01E0001 arc: H00L0000 N1_V02S0201 arc: H00R0100 H02W0701 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02N0201 arc: V00T0000 H02E0201 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A2 V00B0000 arc: A3 V01N0101 arc: A6 S1_V02N0101 arc: B2 N1_V02S0301 arc: B3 E1_H02W0301 arc: B6 H02E0301 arc: C2 H00L0000 arc: C3 H00R0100 arc: C5 V02S0201 arc: C6 S1_V02N0001 arc: CE0 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 H02W0201 arc: D5 V02S0401 arc: D6 S1_V02N0601 arc: E3_H06E0303 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q0 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0401 Q6 arc: V00B0100 F5 arc: V01S0100 F3 arc: W1_H02W0201 F2 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000011100000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1111111110001111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R32C19:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 N1_V01S0100 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A4 V00T0000 arc: A5 E1_H02W0501 arc: A7 H02E0701 arc: B0 F3 arc: B4 H00R0000 arc: B5 V02S0501 arc: B7 V01S0000 arc: C0 H02E0401 arc: C3 H02W0401 arc: C4 V02N0001 arc: C5 V02S0201 arc: C7 E1_H01E0101 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V02S0001 arc: D3 E1_H02W0001 arc: D4 H00R0100 arc: D5 H02W0001 arc: D7 V02N0401 arc: E1_H01E0101 F5 arc: E1_H02E0001 Q0 arc: E3_H06E0003 Q0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 V00B0100 arc: M0 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V01S0000 F4 arc: W3_H06W0003 Q0 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 0000001000000000 word: SLICEA.K0.INIT 1111111111001111 word: SLICEA.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R32C20:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 E3_H06W0203 arc: H00L0100 N1_V02S0101 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H06W0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 V02S0201 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0103 arc: A1 H00L0100 arc: B1 H02E0301 arc: C1 E1_H02W0401 arc: C5 N1_V02S0001 arc: C7 V00T0100 arc: CE0 H02W0101 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D5 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q2 arc: E1_H02E0701 F7 arc: E3_H06E0203 F7 arc: E3_H06E0303 F5 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F1 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: N1_V02N0701 F7 arc: N3_V06N0203 F7 arc: N3_V06N0303 F5 arc: S3_V06S0303 F5 arc: V01S0000 F1 arc: W1_H02W0301 Q1 arc: W1_H02W0501 F7 arc: W1_H02W0701 F5 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111000001111100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R32C21:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H01E0001 arc: V00B0000 H02W0601 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 H02W0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 H01E0101 arc: W3_H06W0003 V01N0001 arc: W3_H06W0303 V01N0101 arc: E3_H06E0003 W3_H06E0003 arc: B2 H00L0000 arc: B4 H02E0101 arc: B6 V01S0000 arc: C2 H02E0401 arc: C4 H02E0401 arc: C6 E1_H01E0101 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 H02W0201 arc: D4 H02W0001 arc: D5 H02W0201 arc: D6 V00B0000 arc: D7 S1_V02N0601 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: H01W0000 Q6 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0003 Q0 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W1_H02W0201 Q2 arc: W1_H02W0401 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R32C22:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0101 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 V02S0201 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 V06S0303 arc: B0 V02S0301 arc: B1 V02N0101 arc: B3 F1 arc: C0 H00L0000 arc: C1 H02W0601 arc: C3 H00L0100 arc: C7 V00T0000 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02S0001 arc: D2 F0 arc: D3 N1_V01S0000 arc: D7 S1_V02N0601 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F1 arc: M2 V00T0100 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q2 arc: N1_V02N0301 F1 arc: V01S0000 F1 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0000111100110011 word: SLICEA.K1.INIT 0011000011110000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1100110011111100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R32C23:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0601 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0303 H06W0303 arc: S1_V02S0501 H06E0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02S0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V02S0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A4 W1_H02E0501 arc: A7 H02E0501 arc: B4 V02S0501 arc: B7 E1_H02W0101 arc: C1 H00R0100 arc: C3 N1_V02S0401 arc: C4 V02N0001 arc: C7 E1_H02W0601 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D3 V00T0100 arc: D4 E1_H01W0100 arc: D7 H00L0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: E3_H06E0103 F1 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q4 arc: LSR1 V00B0000 arc: M4 W1_H02E0401 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V02N0101 F3 arc: N1_V02N0301 F1 arc: N1_V02N0401 F6 arc: N3_V06N0003 F3 arc: N3_V06N0103 F1 arc: V01S0000 F3 arc: W1_H02W0101 F3 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 word: SLICEC.K0.INIT 1111100011111111 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R32C24:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V01N0101 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02W0301 arc: H00R0100 N1_V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 N1_V02S0401 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 H02E0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: N3_V06N0303 W3_H06E0303 arc: W3_H06W0303 V06S0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A0 H02E0501 arc: A6 H00R0000 arc: A7 W1_H02E0701 arc: B0 W1_H02E0101 arc: B1 V01N0001 arc: B4 H00R0000 arc: B6 V02S0501 arc: B7 S1_V02N0701 arc: C0 H00L0100 arc: C1 H00R0100 arc: C3 H00L0000 arc: C4 H02E0601 arc: C6 V02N0201 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 F0 arc: D3 V02S0201 arc: D4 V02N0601 arc: D5 H02W0201 arc: D6 H02W0001 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: E1_H02E0401 Q4 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 F1 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F3 arc: N3_V06N0003 F3 arc: S1_V02S0301 F3 arc: W1_H02W0101 F3 arc: W3_H06W0003 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 1010101010001010 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0011111100000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R32C25:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02W0101 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 H01E0001 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0103 V06S0103 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: A1 E1_H01E0001 arc: A5 V00B0000 arc: B1 V02N0301 arc: B2 H01W0100 arc: B5 H00R0000 arc: B6 V01S0000 arc: C1 H00L0000 arc: C2 V02S0601 arc: C5 V02S0001 arc: C6 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 V02S0201 arc: D3 V00B0100 arc: D5 F0 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q2 arc: M0 E1_H02W0601 arc: M2 H02E0601 arc: M4 W1_H02E0401 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N3_V06N0203 F4 arc: V01S0000 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R32C26:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 V01N0101 arc: H00R0000 H02E0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H06E0103 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H06E0103 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0501 arc: A1 H02E0501 arc: A7 H02W0701 arc: B0 V02N0301 arc: B1 H02W0301 arc: B7 H02W0101 arc: C0 V02N0401 arc: C1 N1_V02S0401 arc: C7 V02S0201 arc: CE0 W1_H02E0101 arc: CE1 N1_V02S0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 H01E0101 arc: D7 S1_V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F1 arc: E1_H02E0201 Q2 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q1 arc: N3_V06N0303 F6 arc: V01S0100 Q4 arc: W1_H02W0101 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0001010100111111 word: SLICEA.K1.INIT 0111000001111100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R32C27:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 V02S0201 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 H06E0003 arc: S1_V02S0001 H02E0001 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 H01E0101 arc: V00B0000 N1_V02S0201 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 H01E0001 arc: E1_H02E0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00L0000 arc: A4 S1_V02N0101 arc: B1 V02S0301 arc: B4 H02W0101 arc: C1 S1_V02N0401 arc: C4 H02W0401 arc: CE1 E1_H02W0101 arc: CE2 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0201 arc: D4 S1_V02N0601 arc: E1_H01E0101 Q6 arc: E1_H02E0201 F0 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N3_V06N0203 Q4 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1111111110001111 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R32C28:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 H02E0201 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 V01N0001 arc: N3_V06N0303 H06E0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02E0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0401 arc: A0 V02S0701 arc: A1 E1_H01E0001 arc: A3 F7 arc: A7 V02N0101 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 V02S0301 arc: B3 H00L0000 arc: B7 H01E0101 arc: C0 H00R0100 arc: C1 N1_V02S0601 arc: C2 N1_V02S0401 arc: C3 N1_V01N0001 arc: C7 N1_V02S0001 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00T0100 arc: D2 V00B0100 arc: D3 H02E0001 arc: D7 V02N0601 arc: E1_H01E0001 Q4 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: M4 H02E0401 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F1 arc: N3_V06N0003 F3 arc: N3_V06N0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0101001100000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000111100110011 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R32C29:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0601 V02N0601 arc: H00R0000 H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 N1_V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A1 H02W0701 arc: B1 H01W0100 arc: B2 V02S0101 arc: B4 V02S0701 arc: B6 V01S0000 arc: C1 H00R0100 arc: C2 E1_H02W0601 arc: C4 V02N0201 arc: C5 N1_V02S0001 arc: C6 E1_H02W0601 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V02N0001 arc: D3 V01S0100 arc: D4 V02S0601 arc: D5 V02N0601 arc: D6 V02S0401 arc: D7 H01W0000 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F4 arc: H01W0100 Q4 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q2 arc: N1_V02N0201 F0 arc: N1_V02N0601 F4 arc: V01S0000 Q6 arc: V01S0100 F4 word: SLICEC.K0.INIT 0000110011001100 word: SLICEC.K1.INIT 0000111111111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R32C2:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0701 E3_H06W0203 arc: H00R0000 H02W0601 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0100 S1_V02N0501 arc: B3 V02N0101 arc: B7 V00B0100 arc: C3 S1_V02N0401 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: D7 H02E0001 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: LSR0 V00B0000 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N3_V06N0003 Q0 arc: S3_V06S0203 F7 arc: V00T0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R32C30:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0501 H01E0101 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0601 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0701 H01E0101 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0303 W3_H06E0303 arc: A1 E1_H01E0001 arc: A4 E1_H01W0000 arc: A7 V02S0301 arc: B0 V02N0101 arc: B1 E1_H02W0101 arc: B4 H02E0101 arc: B7 V02S0501 arc: C0 H00R0100 arc: C1 W1_H02E0601 arc: C4 V00B0100 arc: C7 H02E0601 arc: CE1 H00L0000 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H00R0000 arc: D4 V00B0000 arc: D7 V02N0601 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F0 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F7 arc: N3_V06N0003 F0 arc: S1_V02S0701 Q7 arc: S3_V06S0203 F7 arc: V00T0100 F1 arc: V01S0000 F7 arc: V01S0100 Q2 arc: W1_H02W0601 F4 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0100110001111100 word: SLICEA.K0.INIT 0011111100000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0010101010101010 word: SLICEC.K1.INIT 1111111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R32C31:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02E0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 H02W0701 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0601 E1_H01W0000 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: A4 E1_H02W0501 arc: B1 V00B0000 arc: B4 V02S0701 arc: C0 V02S0401 arc: C1 V02S0401 arc: C4 V00B0100 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D4 H02W0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q6 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: H01W0000 F0 arc: H01W0100 F4 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 W1_H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: S1_V02S0201 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 0011111100000000 word: SLICEC.K0.INIT 0000000100000011 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R32C32:PLC2 arc: H00L0000 H02W0201 arc: H00R0000 V02S0601 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H02W0201 arc: V00B0000 W1_H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V01S0100 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E1_H02E0401 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: H01W0000 Q4 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: N3_V06N0103 Q2 arc: V01S0100 Q2 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R32C33:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: V00T0000 H02W0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V01N0101 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: CE0 N1_V02S0201 arc: CE1 N1_V02S0201 arc: CE2 N1_V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E1_H02E0601 Q6 arc: H01W0000 Q0 arc: H01W0100 Q4 arc: M0 V00T0000 arc: M2 E1_H02W0601 arc: M4 H02W0401 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N3_V06N0303 Q6 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R32C34:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 N1_V01S0100 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 N1_V01S0000 arc: E1_H02E0001 W3_H06E0003 arc: B6 V02N0701 arc: C6 V00B0100 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D6 H00L0100 arc: D7 H02W0001 arc: E1_H02E0401 Q6 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 F6 arc: F6 F5D_SLICE arc: H01W0100 Q6 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: N3_V06N0303 Q6 arc: V00B0000 Q4 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000110000111111 word: SLICED.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R32C35:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 H02W0001 arc: H00L0100 V02N0101 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 V01N0001 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0001 W3_H06E0003 arc: W3_H06W0203 E3_H06W0103 arc: A7 N1_V01N0101 arc: B2 H00R0100 arc: B7 E1_H02W0301 arc: C2 H00L0000 arc: C7 H02W0401 arc: CE0 H02E0101 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0201 arc: D3 V00B0100 arc: D7 N1_V02S0401 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F7 arc: E3_H06E0103 F2 arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: M0 H02W0601 arc: M2 V00T0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q0 arc: N3_V06N0103 Q2 arc: W1_H02W0601 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0101001100000000 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R32C36:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 H01E0001 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0100 W1_H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 H06E0303 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0501 W3_H06E0303 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: A4 H02E0701 arc: A5 H02W0701 arc: B1 V01N0001 arc: B2 V01N0001 arc: B4 N1_V01S0000 arc: B5 H01E0101 arc: C1 H00R0100 arc: C2 H00R0100 arc: C4 V00B0100 arc: C5 H02E0401 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 H02E0201 arc: D4 W1_H02E0201 arc: D5 V00B0000 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q5 arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 V00T0000 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N3_V06N0103 F1 arc: N3_V06N0303 Q5 arc: S1_V02S0501 F5 arc: V01S0000 Q5 arc: V01S0100 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111010100110001 word: SLICEC.K1.INIT 0000001100100011 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000001001000001 word: SLICEB.K0.INIT 1000001001000001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R32C37:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 W1_H02E0001 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0401 H02E0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0100 V02S0501 arc: W1_H02W0301 V02N0301 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 E3_H06W0103 arc: A4 V00T0000 arc: A5 V00T0000 arc: B4 H01E0101 arc: B5 H01E0101 arc: C4 V02N0001 arc: C5 V02S0001 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 H02E0001 arc: E1_H01E0101 Q2 arc: E1_H02E0601 Q6 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: M0 V00T0100 arc: M2 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0201 Q2 arc: V00T0000 Q2 arc: V01S0000 Q0 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1101000011011101 word: SLICEC.K1.INIT 1011000000001011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R32C38:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 V02S0601 arc: E3_H06E0203 N1_V01S0000 arc: H00R0000 H02E0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 H02E0601 arc: V00B0100 V02S0301 arc: V00T0100 H02W0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 N3_V06S0303 arc: S1_V02S0301 W3_H06E0003 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: B1 V00B0000 arc: B2 H00R0000 arc: C1 N1_V01S0100 arc: C2 N1_V01S0100 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 V02N0001 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: M0 W1_H02E0601 arc: M1 V01S0100 arc: M2 W1_H02E0601 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q4 arc: W1_H02W0401 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000101011001111 word: SLICEB.K0.INIT 1000101011001111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R32C39:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02N0301 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 V01N0001 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0701 V02S0701 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: CE0 H00L0100 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: N1_V02N0201 Q2 arc: S1_V02S0401 Q6 arc: V01S0100 Q2 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R32C3:PLC2 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02E0101 arc: W1_H02W0601 V06N0303 arc: A1 V02N0501 arc: A2 V01N0101 arc: A3 V00T0000 arc: A5 V02N0101 arc: A6 V02S0301 arc: B1 H00R0100 arc: B2 H01W0100 arc: B3 H00L0000 arc: B5 H00R0000 arc: B6 H02W0101 arc: C1 H02E0401 arc: C2 V02N0401 arc: C3 H00L0100 arc: C5 H02W0401 arc: C6 H02W0601 arc: C7 V02S0001 arc: D1 S1_V02N0201 arc: D2 V00T0100 arc: D3 V00B0100 arc: D5 H02E0201 arc: D6 V02S0601 arc: D7 S1_V02N0601 arc: E1_H02E0701 F5 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F0 arc: M0 V00B0000 arc: N1_V01N0001 F0 arc: N1_V02N0201 F0 arc: V00B0000 F6 arc: V01S0000 F3 arc: V01S0100 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000110000100011 word: SLICED.K0.INIT 1010001011110011 word: SLICED.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000000010000000 word: SLICEB.K1.INIT 1001000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R32C40:PLC2 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 V02S0601 arc: H00L0000 H02W0201 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 H02W0701 arc: V00T0000 V02S0601 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A1 V02S0501 arc: A3 H02W0501 arc: A5 H02W0501 arc: A7 E1_H02W0701 arc: B0 S1_V02N0101 arc: B1 H00R0100 arc: B3 V02S0101 arc: B5 H02E0101 arc: B7 H02E0101 arc: C0 F4 arc: C1 H00L0000 arc: C3 E1_H02W0601 arc: C5 H02W0401 arc: C6 E1_H02W0401 arc: C7 H02E0401 arc: D0 V01S0100 arc: D1 N1_V02S0201 arc: D3 V02N0001 arc: D5 H02W0201 arc: D6 V02S0401 arc: D7 H02W0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 F2 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00T0000 arc: N1_V01N0001 F6 arc: N3_V06N0003 F0 arc: V01S0100 F1 word: SLICEA.K0.INIT 0000000000000011 word: SLICEA.K1.INIT 1100010010000000 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 1010101000001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0110101110110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0110101110110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R32C41:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0003 N3_V06S0003 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V06S0203 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0003 arc: A1 S1_V02N0501 arc: A4 H02E0501 arc: A5 H02E0701 arc: B0 S1_V02N0301 arc: B1 V02N0101 arc: B4 V00B0100 arc: B5 H02W0101 arc: B6 V02N0701 arc: B7 H02E0301 arc: C0 H00L0100 arc: C1 H02E0401 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 S1_V02N0201 arc: C5 S1_V02N0201 arc: C6 V02N0201 arc: C7 H02W0401 arc: D0 N1_V01S0000 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 E1_H02W0001 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 W1_H02E0201 arc: D7 S1_V02N0601 arc: E1_H01E0101 F2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 F1 arc: H01W0000 F4 arc: H01W0100 F3 arc: M6 V00T0000 arc: N3_V06N0303 F5 arc: V01S0000 F6 arc: V01S0100 F6 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 1100101010101010 word: SLICEC.K1.INIT 1100101010101010 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000000011110011 word: SLICEA.K1.INIT 1001010001001111 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R32C42:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06S0203 arc: H00L0000 V02S0001 arc: H00L0100 H02W0101 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: A1 H00L0100 arc: A2 V00T0000 arc: A3 V02S0501 arc: A4 H02W0501 arc: A5 E1_H02W0701 arc: B0 V00B0000 arc: B1 V02N0101 arc: B2 V02N0301 arc: B3 V02S0101 arc: B4 S1_V02N0701 arc: B5 V02N0501 arc: B6 V02N0701 arc: B7 V02N0701 arc: C0 N1_V01N0001 arc: C1 V02N0401 arc: C2 H00L0000 arc: C3 H02W0601 arc: C4 W1_H02E0601 arc: C5 W1_H02E0601 arc: C6 V02N0201 arc: C7 V02N0201 arc: D0 N1_V01S0000 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 H00R0000 arc: D4 H02E0001 arc: D5 H02E0001 arc: D6 S1_V02N0401 arc: D7 W1_H02E0201 arc: E1_H01E0001 F6 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: M6 V00B0100 arc: N1_V01N0001 F1 arc: N1_V01N0101 F5 arc: V01S0000 F4 arc: V01S0100 F3 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 1010110011001100 word: SLICEC.K1.INIT 1010110011001100 word: SLICEB.K0.INIT 0000101000001011 word: SLICEB.K1.INIT 1100010010000000 word: SLICEA.K0.INIT 0000000011110011 word: SLICEA.K1.INIT 1001010001001111 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1111110000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R32C43:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02E0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 H02E0701 arc: V00B0000 S1_V02N0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 N1_V01S0000 arc: A3 V00B0000 arc: A5 H02E0501 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 S1_V02N0301 arc: B3 V02N0101 arc: B5 V02N0501 arc: B6 S1_V02N0701 arc: C0 V02S0601 arc: C1 H02E0601 arc: C2 H00L0100 arc: C3 H00L0000 arc: C5 V02S0001 arc: C6 H02W0401 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0201 arc: D2 H02W0201 arc: D3 V02S0001 arc: D5 S1_V02N0601 arc: D6 N1_V02S0401 arc: D7 V02N0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q6 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 F3 arc: H01W0000 F0 arc: M0 E1_H02W0601 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W1_H02W0001 F0 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100010010000000 word: SLICEB.K0.INIT 0000000011110011 word: SLICEB.K1.INIT 1001001000101111 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111110000001100 word: SLICED.K0.INIT 1100000011110011 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R32C44:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 N1_V01S0000 arc: H00L0100 E1_H02W0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 H01E0101 arc: W3_H06W0203 N1_V01S0000 arc: E3_H06E0203 W3_H06E0203 arc: B1 V00T0000 arc: B2 V02N0301 arc: B4 V02S0701 arc: B6 V01S0000 arc: C0 N1_V01N0001 arc: C1 F6 arc: C2 N1_V02S0601 arc: C4 E1_H02W0601 arc: C6 V00B0100 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 H02E0201 arc: D2 V02S0001 arc: D3 V02N0201 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 H00L0100 arc: D7 V02N0401 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q1 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q1 arc: N1_V02N0201 Q2 arc: N3_V06N0003 F0 arc: N3_V06N0103 Q2 arc: V01S0000 F4 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 1100000011110011 word: SLICEB.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 0011000000111111 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111001100000011 word: SLICED.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R32C45:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 V01N0001 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0501 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: B0 H02W0301 arc: B2 V02N0301 arc: B4 V02S0501 arc: B6 H02E0101 arc: C0 H00R0100 arc: C2 E1_H01W0000 arc: C4 F6 arc: C5 H02E0601 arc: C6 E1_H01E0101 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 V02N0201 arc: D4 E1_H02W0201 arc: D5 H02E0201 arc: D6 E1_H01W0100 arc: D7 V02S0401 arc: E1_H01E0101 F0 arc: E3_H06E0203 Q4 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: M0 E1_H02W0601 arc: M2 V00B0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: N1_V02N0001 F2 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 0000111100110011 word: SLICEA.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1100111100000011 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0011001100001111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R32C46:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: A3 V00B0000 arc: A4 H02E0501 arc: B3 V02S0301 arc: B4 V02N0701 arc: B7 V02S0701 arc: C3 N1_V01N0001 arc: C4 E1_H01E0101 arc: C5 V00T0000 arc: C7 N1_V02S0001 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 H02E0201 arc: D5 S1_V02N0401 arc: D7 S1_V02N0601 arc: E1_H01E0101 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F1 arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: N1_V01N0101 F4 arc: N3_V06N0103 F1 arc: V01S0000 Q1 arc: W1_H02W0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0000100100000000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000110010001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R32C47:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0601 N1_V02S0601 arc: S1_V02S0501 W3_H06E0303 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: A1 H02W0701 arc: A3 H00L0100 arc: A5 N1_V01N0101 arc: A6 H02E0501 arc: A7 H00R0000 arc: B1 V02S0101 arc: B3 V02N0101 arc: B5 H02E0101 arc: B6 W1_H02E0301 arc: B7 V02S0701 arc: C1 H00R0100 arc: C3 V02N0401 arc: C5 V01N0101 arc: C6 E1_H01E0101 arc: C7 V02N0001 arc: D1 E1_H02W0001 arc: D3 W1_H02E0001 arc: D5 S1_V02N0401 arc: D6 F0 arc: D7 V02N0601 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: M4 E1_H02W0401 arc: N1_V01N0101 F6 arc: N3_V06N0203 F4 arc: V00T0100 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000010000100001 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 1000010000100001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000001001000001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R32C48:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0203 H06E0203 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 N1_V02S0701 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0203 V06S0203 arc: E3_H06E0303 W3_H06E0303 arc: A3 H00L0100 arc: A7 S1_V02N0301 arc: B3 V02S0101 arc: B4 V01S0000 arc: B7 V00B0000 arc: C3 W1_H02E0401 arc: C4 V00T0000 arc: C7 N1_V02S0001 arc: CE0 H00R0000 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D2 V02S0201 arc: D3 V02N0001 arc: D4 H00R0100 arc: D5 V02N0401 arc: D7 H01W0000 arc: E1_H01E0001 F7 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q4 arc: M0 H02E0601 arc: M1 W1_H02E0001 arc: M2 H02E0601 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q1 arc: N1_V02N0101 F1 arc: N1_V02N0301 Q1 arc: N3_V06N0103 F1 arc: W1_H02W0301 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0010001100000001 word: SLICEC.K0.INIT 1100000011110011 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1100000011001000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R32C49:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 N1_V01S0000 arc: H00L0100 V02S0101 arc: H00R0000 V02N0401 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 V02S0701 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: A3 V00T0000 arc: B3 S1_V02N0101 arc: C3 H00L0100 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 W1_H02E0201 arc: F3 F3_SLICE arc: M0 V00T0100 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: S1_V02S0001 Q0 arc: V01S0000 Q4 arc: W3_H06W0003 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010110000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R32C4:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0701 V01N0101 arc: H00L0100 V02N0301 arc: H00R0100 S1_V02N0501 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0103 H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 E1_H02W0601 arc: V00T0000 V02S0601 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 E1_H02W0601 arc: A1 H02E0701 arc: B1 E1_H01W0100 arc: C1 H00L0100 arc: D1 V00T0100 arc: E1_H02E0301 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 E1_H02W0001 arc: M6 V00T0000 arc: N3_V06N0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R32C50:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0501 V02S0501 arc: E3_H06E0203 V06S0203 arc: H00L0100 H02W0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0203 H06W0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 N1_V01S0100 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: N1_V02N0301 W3_H06E0003 arc: A3 H00L0100 arc: B1 E1_H02W0301 arc: B3 S1_V02N0301 arc: B5 H02W0301 arc: B7 V00T0000 arc: C1 E1_H02W0401 arc: C3 H02E0401 arc: C5 S1_V02N0201 arc: C7 V00T0100 arc: D1 H02E0201 arc: D3 V02S0201 arc: D5 H02E0201 arc: D7 H02E0201 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F5 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0101001100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011001100001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011001100001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R32C51:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02N0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00T0000 V02S0601 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A0 H00L0000 arc: A2 V02S0501 arc: A3 V00T0000 arc: A4 V00B0000 arc: A5 V02S0101 arc: A6 N1_V01S0100 arc: A7 N1_V02S0101 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0203 Q7 arc: W1_H02W0101 Q3 arc: W1_H02W0201 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1010101010101010 word: SLICED.K1.INIT 1010101010101010 word: SLICEC.K0.INIT 1010101010101010 word: SLICEC.K1.INIT 1010101010101010 word: SLICEB.K0.INIT 1010101010101010 word: SLICEB.K1.INIT 1010101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R32C52:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V02S0701 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02N0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 E1_H01W0100 arc: N3_V06N0003 H06E0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 V02S0001 arc: V00T0000 H02E0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0003 V01N0001 arc: A0 W1_H02E0501 arc: A1 H02E0701 arc: A2 H02E0501 arc: A3 V00B0000 arc: A4 N1_V01S0100 arc: A5 V00T0000 arc: A6 N1_V02S0301 arc: A7 H00L0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: V01S0000 Q6 arc: V01S0100 Q7 arc: W1_H02W0301 Q1 arc: W1_H02W0701 Q5 word: SLICED.K0.INIT 1010101010101010 word: SLICED.K1.INIT 1010101010101010 word: SLICEC.K0.INIT 1010101010101010 word: SLICEC.K1.INIT 1010101010101010 word: SLICEB.K0.INIT 1010101010101010 word: SLICEB.K1.INIT 1010101010101010 word: SLICEA.K0.INIT 1010101010101010 word: SLICEA.K1.INIT 1010101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R32C53:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 V06S0203 arc: H00L0000 S1_V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0701 H06E0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H06W0303 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0701 arc: N1_V02N0301 W3_H06E0003 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: A0 N1_V02S0501 arc: A1 H02E0701 arc: A2 H00L0100 arc: A3 V00B0000 arc: A4 V02S0101 arc: A5 V00T0000 arc: A6 V00T0100 arc: A7 V02S0301 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 H00L0000 arc: B6 N1_V02S0701 arc: B7 V02N0501 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q4 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: N3_V06N0003 Q3 arc: V01S0100 Q5 arc: W1_H02W0101 Q1 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 1010101010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 1010101010101010 word: SLICEA.K1.INIT 1010101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R32C54:PLC2 arc: H00L0000 V02S0001 arc: H00L0100 H02W0301 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 H06W0303 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H02W0601 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0003 E1_H02W0301 arc: A0 V02S0501 arc: A1 V02S0701 arc: A2 V00B0000 arc: A3 H00L0100 arc: A4 V00T0100 arc: A5 V00T0000 arc: A6 N1_V01S0100 arc: A7 V02S0301 arc: B0 N1_V02S0101 arc: B1 S1_V02N0101 arc: B2 H00R0100 arc: B3 H00L0000 arc: B4 N1_V02S0701 arc: B5 S1_V02N0501 arc: B6 V00B0100 arc: B7 N1_V01S0000 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H02E0501 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: S1_V02S0501 Q7 arc: V01S0100 Q3 arc: W1_H02W0101 Q1 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R32C55:PLC2 arc: E1_H02E0101 V02N0101 arc: H00L0000 V02S0201 arc: H00L0100 H02W0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0501 H02E0501 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 E1_H02W0601 arc: V00T0000 V02S0401 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0701 E1_H01W0100 arc: N3_V06N0003 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: A0 V02N0701 arc: A1 S1_V02N0501 arc: A2 N1_V02S0701 arc: A3 H00L0100 arc: A4 V00T0000 arc: A5 N1_V01S0100 arc: A6 S1_V02N0301 arc: A7 V02S0101 arc: B0 H00R0100 arc: B1 V00B0000 arc: B2 H00L0000 arc: B3 V02S0301 arc: B4 V02S0501 arc: B5 V02S0701 arc: B6 N1_V01S0000 arc: B7 V02N0501 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q1 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: W1_H02W0101 Q3 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q4 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R32C56:PLC2 arc: H00L0000 V02S0001 arc: H00R0000 V02S0601 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0103 H06E0103 arc: S1_V02S0201 V01N0001 arc: V00B0000 V02S0201 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 N1_V02S0701 arc: A1 H00R0000 arc: A2 V01N0101 arc: A3 E1_H02W0501 arc: A4 V00T0000 arc: A5 V02N0301 arc: A6 N1_V01S0100 arc: A7 V02S0101 arc: B0 N1_V02S0301 arc: B1 H02W0301 arc: B2 V02S0301 arc: B3 V02N0101 arc: B4 N1_V01S0000 arc: B5 H00L0000 arc: B6 V00B0000 arc: B7 V02S0701 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q3 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0301 Q1 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q7 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R32C57:PLC2 arc: H00L0000 V02S0201 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00T0000 N1_V02S0601 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: A0 V02S0701 arc: A1 N1_V02S0501 arc: A2 V00B0000 arc: A3 V00T0000 arc: A4 V00T0000 arc: A5 V00T0000 arc: B0 H00R0100 arc: B1 N1_V02S0101 arc: B2 V02S0101 arc: B3 V02S0301 arc: B4 N1_V02S0701 arc: B5 N1_V02S0701 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q3 arc: H01W0100 Q1 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R32C58:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0501 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: W1_H02W0501 V02S0501 .tile R32C59:PLC2 arc: W3_H06W0303 E3_H06W0203 .tile R32C5:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 S1_V02N0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E3_H06W0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E3_H06W0303 arc: A1 H02E0701 arc: A4 V00T0000 arc: A5 V00T0000 arc: A7 N1_V01N0101 arc: B1 H00R0100 arc: B4 H00R0000 arc: B5 V02S0501 arc: B7 V02N0501 arc: C1 H02W0401 arc: C4 H02W0601 arc: C5 N1_V02S0201 arc: C7 E1_H02W0401 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D4 V00B0000 arc: D5 H02E0201 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F5 arc: M2 V00B0100 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q2 arc: V00T0000 Q2 arc: V00T0100 F1 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000010000100001 word: SLICEC.K0.INIT 1010001011110011 word: SLICEC.K1.INIT 1100010011110101 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000001001000001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R32C60:PLC2 arc: S3_V06S0103 N3_V06S0003 .tile R32C63:PLC2 arc: S3_V06S0103 N3_V06S0103 arc: E3_H06E0003 W3_H06E0003 .tile R32C65:PLC2 arc: W3_H06W0203 E3_H06W0203 .tile R32C66:PLC2 arc: S3_V06S0203 N3_V06S0103 .tile R32C69:PLC2 arc: E1_H02E0101 V02S0101 arc: S3_V06S0003 W3_H06E0003 .tile R32C6:PLC2 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 H02E0401 arc: N1_V02N0101 H06E0103 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0401 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A1 V01N0101 arc: A2 S1_V02N0701 arc: A3 V01N0101 arc: A4 V02N0101 arc: A6 E1_H02W0701 arc: A7 N1_V01N0101 arc: B1 V00B0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 H00L0000 arc: B5 V01S0000 arc: B6 V00B0100 arc: B7 H02W0101 arc: C1 E1_H01W0000 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 S1_V02N0201 arc: C5 H02W0601 arc: C6 E1_H02W0601 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 S1_V02N0401 arc: D5 E1_H02W0201 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0100 F7 arc: LSR0 H02E0501 arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F6 arc: S1_V02S0601 Q4 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0101 F1 word: SLICEC.K0.INIT 1111111100101010 word: SLICEC.K1.INIT 1100000011001100 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 0000000010000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010111100100011 word: SLICEB.K0.INIT 1010111100100011 word: SLICEB.K1.INIT 1010111100100011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R32C70:PLC2 arc: E1_H02E0301 S1_V02N0301 .tile R32C7:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 N3_V06S0203 arc: H00L0000 S1_V02N0001 arc: H00R0000 H02E0601 arc: H01W0000 E3_H06W0103 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0301 E3_H06W0003 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0203 E3_H06W0103 arc: A1 V02N0501 arc: A2 V02N0701 arc: A3 V02N0701 arc: B1 V02N0301 arc: B2 V02N0101 arc: B3 V02N0301 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0103 F1 arc: S1_V02S0401 Q6 arc: V01S0000 Q4 arc: V01S0100 Q6 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111101111111 word: SLICEB.K0.INIT 1111111101111111 word: SLICEB.K1.INIT 1111111101111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R32C8:PLC2 arc: E1_H02E0001 H01E0001 arc: H00L0100 S1_V02N0301 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02E0401 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 H01E0001 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 H01E0101 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A3 V00B0000 arc: B3 V02S0301 arc: C3 H02W0601 arc: CE2 H02E0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E1_H01E0101 Q6 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M4 H02W0401 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N3_V06N0103 F1 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0101 F1 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R32C9:PLC2 arc: E1_H02E0301 H01E0101 arc: H00R0100 V02S0701 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H01W0000 arc: A6 H00R0000 arc: B6 V02N0501 arc: C6 V00T0000 arc: C7 E1_H01E0101 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D6 H02E0001 arc: D7 W1_H02E0001 arc: E1_H01E0101 Q4 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 F6 arc: M2 V00B0100 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q2 arc: S1_V02S0401 Q4 arc: V01S0000 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100010011110101 word: SLICED.K1.INIT 1111000000001111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R33C10:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: N1_V02N0501 H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 H01E0001 .tile R33C11:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E3_H06W0303 arc: H00R0000 V02S0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: V00B0000 E1_H02W0401 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: H01W0100 Q0 arc: M0 E1_H02W0601 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R33C12:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 S1_V02N0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 V02N0401 arc: V01S0000 N3_V06S0103 arc: A1 E1_H01E0001 arc: A3 E1_H02W0501 arc: A6 V02N0301 arc: A7 W1_H02E0501 arc: B1 H00R0100 arc: B3 H00R0000 arc: B6 S1_V02N0501 arc: B7 E1_H02W0301 arc: C1 F6 arc: C3 H00L0000 arc: C6 V00B0100 arc: C7 E1_H02W0401 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D3 H02W0201 arc: D6 H02W0001 arc: D7 V00B0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q4 arc: E1_H02E0201 F0 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 E1_H02W0601 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: V01S0100 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000100000 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C13:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V06S0203 arc: H00L0100 V02N0101 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0001 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E3_H06W0203 arc: A1 H00L0000 arc: A7 E1_H01W0000 arc: B1 V00B0000 arc: B7 V02S0701 arc: C1 E1_H02W0401 arc: C7 V00T0100 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D7 N1_V02S0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: V00B0100 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C14:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 H02W0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 H01E0001 arc: A1 H02E0501 arc: A6 S1_V02N0301 arc: A7 H02W0501 arc: B1 H02E0301 arc: B2 V02S0101 arc: B6 H02W0101 arc: B7 V00B0100 arc: C1 V02N0401 arc: C2 N1_V02S0401 arc: C6 W1_H02E0601 arc: C7 S1_V02N0201 arc: CE0 H00L0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0201 arc: D2 H00R0000 arc: D3 V01S0100 arc: D6 E1_H02W0001 arc: D7 V00B0000 arc: E1_H01E0101 Q4 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: M2 H02E0601 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q2 arc: N1_V02N0401 F6 arc: N1_V02N0501 F7 arc: V01S0000 F1 arc: V01S0100 F1 arc: W1_H02W0301 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111000001111100 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 0000000000100000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R33C15:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0501 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0003 arc: A3 E1_H01E0001 arc: B0 H01W0100 arc: B2 H00R0000 arc: B3 V02N0301 arc: B6 V01S0000 arc: C0 H00R0100 arc: C2 E1_H02W0601 arc: C3 V02N0401 arc: C6 V00B0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 V02N0201 arc: D6 V00B0000 arc: D7 S1_V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: E1_H02E0201 Q0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0100 Q0 arc: M0 V00T0000 arc: M4 V00T0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: S1_V02S0201 F2 arc: V01S0000 Q6 arc: V01S0100 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0011111100000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R33C16:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V06S0303 arc: H00L0000 H02E0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0401 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06W0103 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: A5 V00B0000 arc: A6 H00L0000 arc: A7 H02E0501 arc: B5 S1_V02N0701 arc: B6 H01E0101 arc: B7 V00B0100 arc: C5 E1_H02W0601 arc: C6 V00T0100 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D5 E1_H02W0201 arc: D6 H00L0100 arc: D7 V02N0601 arc: E1_H01E0001 F7 arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 H02E0601 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q2 arc: V01S0100 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 1010101010001010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R33C17:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 V02S0001 arc: H00R0000 V02S0401 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E3_H06W0103 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 H02E0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H01E0001 arc: B1 V00B0000 arc: C1 W1_H02E0401 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H01E0001 Q6 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: H01W0100 Q4 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C18:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 V01N0001 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02W0301 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0303 E3_H06W0303 arc: A4 V02N0301 arc: A5 V00T0000 arc: B0 V02S0101 arc: B4 H00L0000 arc: B5 V00B0100 arc: B6 V01S0000 arc: C0 E1_H02W0401 arc: C4 V00T0100 arc: C5 W1_H02E0601 arc: C6 E1_H02W0401 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 E1_H02W0201 arc: D4 V02S0601 arc: D5 H02E0001 arc: D6 S1_V02N0401 arc: D7 E1_H02W0201 arc: E1_H01E0101 F5 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0100 F4 arc: M0 V00B0000 arc: M2 E1_H02W0601 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q2 arc: V00T0000 Q2 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W1_H02W0401 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010100010101010 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R33C19:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 V02N0101 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0101 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0203 E3_H06W0203 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: B1 N1_V02S0101 arc: B3 W1_H02E0301 arc: C1 H00R0100 arc: C3 N1_V01N0001 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D3 H01E0101 arc: E1_H01E0001 Q4 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: V01S0000 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111011101110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R33C20:PLC2 arc: E1_H02E0401 V02S0401 arc: H00L0000 E1_H02W0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0101 N3_V06S0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E3_H06W0003 arc: A1 H00L0000 arc: A3 E1_H01E0001 arc: A4 H02W0701 arc: A5 W1_H02E0501 arc: B1 H01W0100 arc: B3 N1_V02S0101 arc: B4 N1_V02S0701 arc: B5 V00B0100 arc: C1 N1_V01N0001 arc: C3 H00R0100 arc: C4 H02E0601 arc: C5 E1_H02W0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D3 S1_V02N0001 arc: D4 E1_H02W0001 arc: D5 V00B0000 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: H01W0100 F4 arc: M0 V00T0100 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0001 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010100010101010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111011101110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C21:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 V02S0601 arc: H00L0000 H02W0201 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 H06W0003 arc: S1_V02S0301 H02W0301 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: V00T0100 V02S0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 V06S0203 arc: B0 V00T0000 arc: C0 H00L0100 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 E1_H02W0001 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q0 arc: E1_H02E0201 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: H01W0100 Q4 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 H02E0401 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q6 arc: V00T0000 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R33C22:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 E1_H01W0000 arc: E3_H06E0003 V06S0003 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02S0701 arc: A4 V00T0000 arc: A5 V00B0000 arc: B4 H02E0101 arc: B5 H01E0101 arc: C4 V02N0001 arc: C5 V02S0001 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D4 H02W0201 arc: D5 H00L0100 arc: E1_H02E0501 F5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F4 arc: H01W0100 Q0 arc: M0 V00B0100 arc: M2 H02W0601 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: V00B0000 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1010100010101010 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R33C23:PLC2 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0303 V06S0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0101 arc: H00R0100 H02W0701 arc: N1_V02N0001 E1_H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N1_V02S0701 arc: V00B0100 H02W0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V02S0701 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0103 V06S0103 arc: W3_H06W0303 V06S0303 arc: A2 H00L0100 arc: A3 V00T0000 arc: A5 V02N0301 arc: A7 S1_V02N0101 arc: B2 N1_V02S0301 arc: B3 V01N0001 arc: B5 H00L0000 arc: B7 W1_H02E0301 arc: C2 E1_H02W0401 arc: C3 H02W0601 arc: C5 S1_V02N0001 arc: C7 W1_H02E0401 arc: CE0 N1_V02S0201 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H02W0201 arc: D5 H00R0100 arc: D7 H02W0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F4 arc: E3_H06E0003 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 E1_H02W0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0101 Q0 arc: N3_V06N0103 F2 arc: S1_V02S0201 F2 arc: V00T0000 Q2 arc: V00T0100 F3 arc: V01S0000 F2 arc: W1_H02W0001 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0111000001111100 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R33C24:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 V06S0303 arc: E3_H06E0303 V06S0303 arc: H00R0100 H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02W0701 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0601 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 V06S0303 arc: E3_H06E0103 W3_H06E0003 arc: A6 V00T0100 arc: B5 H01E0101 arc: B6 H01E0101 arc: B7 S1_V02N0701 arc: C5 E1_H02W0401 arc: C6 E1_H01E0101 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D5 H01W0000 arc: D6 E1_H01W0100 arc: D7 W1_H02E0201 arc: E1_H01E0101 F7 arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR1 V00B0000 arc: M0 H02W0601 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: N3_V06N0303 F6 arc: W1_H02W0501 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000000000000 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0011111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R33C25:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V06S0203 arc: H00L0100 V02S0301 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V06S0203 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0203 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A3 V02N0501 arc: B3 H02E0101 arc: C3 H00L0100 arc: CE0 H02W0101 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E1_H01E0001 F2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: H01W0100 F2 arc: M0 H02W0601 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q0 arc: N3_V06N0203 Q4 arc: V01S0000 Q0 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R33C26:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V06S0203 arc: E3_H06E0203 V06N0203 arc: E3_H06E0303 V06N0303 arc: H00L0000 V02S0201 arc: H00L0100 H02E0301 arc: H00R0100 V02S0501 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02W0101 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: A1 E1_H01E0001 arc: B1 E1_H01W0100 arc: C1 H00L0100 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H01E0001 Q2 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 E1_H02W0601 arc: M4 H02E0401 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N3_V06N0003 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C27:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02S0001 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 E3_H06W0303 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0103 arc: A3 V00T0000 arc: B3 H00R0100 arc: C3 H00L0000 arc: CE0 W1_H02E0101 arc: CE2 N1_V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E1_H01E0001 F3 arc: E3_H06E0203 Q4 arc: F3 F3_SLICE arc: H01W0000 Q6 arc: H01W0100 Q4 arc: M0 V00T0100 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00T0000 Q0 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000100000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R33C28:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02E0001 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V02S0601 arc: E1_H02E0001 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: A3 V01N0101 arc: A4 E1_H02W0501 arc: A5 H02E0501 arc: B3 V02N0301 arc: B4 H02W0101 arc: B5 V02N0701 arc: C3 H00L0000 arc: C4 V02N0001 arc: C5 V00T0000 arc: CE0 V02S0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 H02E0201 arc: D4 V00B0000 arc: D5 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H02E0101 F3 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R33C29:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 V02S0601 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02W0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0003 arc: V00B0100 H02E0501 arc: V00T0000 H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N1_V01S0100 arc: E1_H02E0501 W3_H06E0303 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: A3 H01E0001 arc: A5 N1_V01N0101 arc: A7 N1_V02S0101 arc: B0 H01W0100 arc: B3 W1_H02E0301 arc: B5 H02E0301 arc: B7 V02N0501 arc: C0 H00L0000 arc: C3 V02N0601 arc: C5 H02E0601 arc: C7 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V02S0201 arc: D3 H00R0000 arc: D5 W1_H02E0201 arc: D7 E1_H02W0201 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 V00T0000 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 arc: N1_V02N0201 F2 arc: N1_V02N0501 F5 arc: N3_V06N0103 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R33C2:PLC2 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0401 arc: B3 N1_V02S0101 arc: B7 E1_H02W0301 arc: C3 V02N0601 arc: C7 V01N0101 arc: CE0 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D3 H02E0001 arc: D7 H02E0001 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 F3 arc: LSR0 V00B0000 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S3_V06S0203 F7 arc: V01S0000 Q0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R33C30:PLC2 arc: H00L0100 H02E0301 arc: H00R0100 H02E0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N1_V02S0401 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0501 V02S0501 arc: H01W0100 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: A5 N1_V01N0101 arc: B0 V02N0101 arc: B5 V02S0701 arc: C0 N1_V02S0401 arc: C5 V00T0000 arc: CE1 V02N0201 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 N1_V01S0000 arc: D5 H00R0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: H01W0000 F4 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R33C31:PLC2 arc: E1_H02E0401 V06S0203 arc: H00L0000 V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 H06W0303 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: A3 E1_H01E0001 arc: A4 V02N0301 arc: B2 H00L0000 arc: B3 V02N0101 arc: B4 H01E0101 arc: B5 V01S0000 arc: C2 H02W0401 arc: C3 W1_H02E0401 arc: C4 V00T0000 arc: C5 H01E0001 arc: CE0 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H00R0000 arc: D3 W1_H02E0201 arc: D4 W1_H02E0001 arc: D5 V02S0401 arc: E1_H01E0001 F4 arc: E1_H02E0501 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: M0 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0003 F3 arc: N3_V06N0103 F2 arc: V01S0000 Q6 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0011001100001111 word: SLICEB.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 0011001100001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R33C32:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: H00R0000 V02N0601 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02S0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 E1_H02W0701 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H02E0401 Q6 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: H01W0100 Q2 arc: M0 E1_H02W0601 arc: M2 V00B0100 arc: M4 H02E0401 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: N1_V02N0001 Q0 arc: N1_V02N0601 Q4 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R33C33:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V06S0303 arc: E3_H06E0103 V06S0103 arc: H00L0000 H02W0001 arc: H00R0000 V02S0601 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0501 N1_V02S0401 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0301 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02S0401 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: M2 V00T0100 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V01S0000 Q4 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R33C34:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 V06S0003 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0701 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0100 V02S0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: B4 V02S0501 arc: B7 V00T0000 arc: C4 V02N0001 arc: C7 H02W0601 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D4 V02N0601 arc: D5 H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F7 arc: E1_H02E0601 Q4 arc: E3_H06E0103 Q2 arc: E3_H06E0203 F4 arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: M2 H02E0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0203 Q4 arc: V00T0000 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0000001111001111 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R33C35:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02W0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 V01N0001 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0701 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0301 W3_H06E0003 arc: A7 H02E0701 arc: B7 V00B0000 arc: C6 V00B0100 arc: C7 V00T0100 arc: CE0 S1_V02N0201 arc: CE1 V02S0201 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D6 H01W0000 arc: D7 H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q7 arc: E1_H02E0201 Q2 arc: E1_H02E0401 F6 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: M0 V00T0000 arc: M2 H02W0601 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0501 Q7 arc: S1_V02S0201 Q0 arc: S1_V02S0401 Q4 arc: V00B0100 Q7 arc: V01S0000 Q7 arc: W1_H02W0501 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000001000110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R33C36:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0203 H01E0001 arc: H00L0000 H02E0001 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H06E0103 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 H02E0201 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 V02S0601 arc: H01W0000 W3_H06E0103 arc: A5 N1_V01N0101 arc: B5 H01E0101 arc: C5 V00T0000 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 V02S0401 arc: E1_H02E0001 Q0 arc: E1_H02E0401 Q6 arc: F4 F5C_SLICE arc: M0 V00B0100 arc: M2 H02E0601 arc: M4 H02W0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q0 arc: N3_V06N0203 F4 arc: V01S0000 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100001101000001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R33C37:PLC2 arc: H00L0000 H02E0001 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 W1_H02E0301 arc: S1_V02S0201 H02E0201 arc: S1_V02S0601 H02E0601 arc: V00B0000 N1_V02S0201 arc: V00T0000 N1_V02S0601 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: E1_H02E0601 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: A1 F5 arc: A4 N1_V01N0101 arc: A6 H00L0000 arc: B1 H00R0100 arc: B4 V02N0501 arc: B5 H00R0000 arc: B6 N1_V01S0000 arc: C1 W1_H02E0401 arc: C4 S1_V02N0001 arc: C5 V02S0201 arc: C6 H02E0601 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D4 W1_H02E0001 arc: D5 H02E0201 arc: D6 V02S0401 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H00R0100 F7 arc: LSR1 V00T0000 arc: M0 H02W0601 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: N3_V06N0003 F0 arc: W1_H02W0401 Q4 word: SLICED.K0.INIT 1000001001000001 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1111111100101010 word: SLICEC.K1.INIT 1100110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C38:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V01N0101 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 H02W0301 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0601 H01E0001 arc: E1_H02E0201 W3_H06E0103 arc: B5 H00R0000 arc: C5 H02W0401 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: E3_H06E0103 Q2 arc: F5 F5_SLICE arc: H00R0000 Q6 arc: M0 V00T0000 arc: M2 H02E0601 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: V00T0000 Q2 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011001100001111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R33C39:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 V02N0201 arc: H00L0100 V02S0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0003 N3_V06S0003 arc: CE0 V02S0201 arc: CE1 H00L0100 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: E1_H02E0201 Q2 arc: E3_H06E0303 Q6 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q6 arc: V01S0000 Q2 arc: V01S0100 Q4 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R33C3:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: A3 E1_H02W0701 arc: A7 V02N0301 arc: B3 H01W0100 arc: B7 E1_H02W0101 arc: C1 H00R0100 arc: C3 H00L0100 arc: C5 V00B0100 arc: C7 V00T0000 arc: D1 H00R0000 arc: D3 E1_H02W0201 arc: D5 V00B0000 arc: D7 V02S0601 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F5 arc: M2 H02W0601 arc: N1_V01N0101 F2 arc: V01S0000 F1 arc: V01S0100 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000110010101111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0010000100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R33C40:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 N1_V02S0601 arc: H00L0100 H02W0301 arc: H00R0100 H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H01E0101 arc: V00B0000 V02N0001 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0101 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A1 V02S0701 arc: B1 W1_H02E0101 arc: C0 E1_H02W0401 arc: C1 H00L0100 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V02S0201 arc: E1_H01E0101 Q2 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 E1_H01E0101 arc: M6 H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 F0 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1010001110100000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R33C41:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: A1 W1_H02E0701 arc: A3 V02S0501 arc: A7 H02W0501 arc: B1 H00R0100 arc: B3 H00R0000 arc: B4 V02S0701 arc: B5 H02E0301 arc: B7 N1_V02S0501 arc: C0 H02W0401 arc: C1 H02E0401 arc: C2 H02W0401 arc: C3 H02E0401 arc: C4 V02N0001 arc: C5 H02W0401 arc: C7 S1_V02N0001 arc: D0 V00T0100 arc: D1 S1_V02N0201 arc: D2 V00T0100 arc: D3 S1_V02N0201 arc: D4 V02S0401 arc: D5 H02W0201 arc: D7 H00L0100 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: N1_V01N0001 F4 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: N3_V06N0203 F4 arc: S1_V02S0701 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100010010000000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 1100110000001010 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1100110000001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R33C42:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 H01E0001 arc: H00L0000 H02E0201 arc: H00L0100 V02N0301 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02S0301 arc: V00T0000 S1_V02N0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 S1_V02N0701 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: A2 H00L0100 arc: A3 V02N0501 arc: B0 E1_H01W0100 arc: B1 V00T0000 arc: B2 H02E0101 arc: B3 H00R0100 arc: B4 V02S0501 arc: B5 H02E0301 arc: C0 S1_V02N0401 arc: C1 H02E0401 arc: C2 H02W0401 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 H02E0601 arc: C7 H02E0601 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V00T0100 arc: D3 V02S0001 arc: D4 V02N0601 arc: D5 V02N0601 arc: D6 H01W0000 arc: D7 F0 arc: E1_H01E0001 F4 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: M0 V00B0100 arc: M4 V00B0100 arc: N1_V01N0101 F7 arc: N1_V02N0401 F4 arc: N3_V06N0203 F4 arc: S1_V02S0001 F0 arc: V00T0100 F3 arc: V01S0100 F6 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0010001000100011 word: SLICEB.K1.INIT 1100010010000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R33C43:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 H01E0001 arc: H00L0100 H02E0101 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 N3_V06S0203 arc: A5 E1_H02W0501 arc: B2 H00R0100 arc: B5 H02W0301 arc: B6 V02S0701 arc: B7 H02W0101 arc: C1 S1_V02N0401 arc: C2 H02W0401 arc: C5 N1_V02S0201 arc: C6 V00T0100 arc: C7 H02E0401 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D2 V00B0100 arc: D3 H00R0000 arc: D5 W1_H02E0001 arc: D6 N1_V02S0401 arc: D7 H00L0100 arc: E3_H06E0103 Q2 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q2 arc: M2 E1_H02W0601 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F1 arc: N3_V06N0303 F5 arc: V01S0100 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100101010101010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111111110000 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1100000011110011 word: SLICEB.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R33C44:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V06S0203 arc: H00L0000 H02W0201 arc: H00L0100 N1_V02S0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 E3_H06W0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: B0 E1_H02W0101 arc: B2 E1_H02W0301 arc: B3 V02N0301 arc: B5 H02E0101 arc: B6 V01S0000 arc: B7 V00B0000 arc: C0 H00L0000 arc: C2 W1_H02E0401 arc: C3 W1_H02E0601 arc: C5 E1_H02W0401 arc: C6 W1_H02E0401 arc: C7 V00B0100 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 W1_H02E0201 arc: D2 V00T0100 arc: D3 V00T0100 arc: D5 H00L0100 arc: D6 W1_H02E0001 arc: D7 W1_H02E0001 arc: E1_H01E0101 F6 arc: E1_H02E0401 F6 arc: E3_H06E0003 Q0 arc: E3_H06E0103 F2 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F2 arc: M0 H02W0601 arc: M2 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: V01S0000 Q0 arc: V01S0100 F2 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0011000011111100 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100000011110011 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R33C45:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E3_H06W0103 arc: E3_H06E0203 V01N0001 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 E1_H01W0100 arc: V00B0000 N1_V02S0201 arc: V00B0100 E1_H02W0501 arc: V00T0000 E1_H02W0001 arc: V00T0100 N1_V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V02S0601 arc: H01W0100 W3_H06E0303 arc: W1_H02W0501 W3_H06E0303 arc: A3 V02S0501 arc: B3 N1_V02S0101 arc: B4 V01S0000 arc: B7 S1_V02N0501 arc: C3 H00R0100 arc: C4 V00T0000 arc: C7 H02W0601 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 S1_V02N0201 arc: D4 H02W0001 arc: D5 H01W0000 arc: D7 E1_H01W0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F4 arc: N1_V02N0301 Q1 arc: N3_V06N0103 F1 arc: V01S0000 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011000011111100 word: SLICEC.K0.INIT 0011001100001111 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1100000011100000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R33C46:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 H01E0101 arc: H00L0100 V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06W0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 H02E0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 W3_H06E0203 arc: A3 V00T0000 arc: B3 H00R0100 arc: B5 H02W0101 arc: B6 N1_V02S0501 arc: C3 V02S0401 arc: C5 S1_V02N0201 arc: C6 E1_H02W0601 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 V00T0100 arc: D5 H00L0100 arc: D6 H00L0100 arc: D7 H01W0000 arc: E1_H01E0001 F5 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 F1 arc: M0 H02W0601 arc: M1 H00R0000 arc: M2 H02W0601 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F1 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R33C47:PLC2 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: A3 H00L0100 arc: A6 H02W0501 arc: A7 E1_H02W0701 arc: B3 H00R0100 arc: B4 V00B0100 arc: B6 V01S0000 arc: B7 V02N0501 arc: C3 H02E0601 arc: C4 V02N0001 arc: C6 E1_H02W0401 arc: C7 V02N0201 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 H00R0000 arc: D4 N1_V02S0601 arc: D5 V02S0401 arc: D6 H02W0001 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F1 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F6 arc: N1_V02N0301 Q1 arc: V01S0000 F7 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1001000000001001 word: SLICEC.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 0000100011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R33C48:PLC2 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 H01E0001 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 V02N0401 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: H01W0100 W3_H06E0303 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: A5 V02N0101 arc: B1 H00R0100 arc: B2 W1_H02E0301 arc: B5 V02N0701 arc: C1 H02E0401 arc: C2 V02S0601 arc: C5 H02E0601 arc: CE1 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D2 V01S0100 arc: D3 V00B0100 arc: D5 H02W0201 arc: E1_H01E0001 F5 arc: E3_H06E0103 Q2 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: M2 V00T0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N3_V06N0103 Q2 arc: V01S0100 F1 arc: W1_H02W0201 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000001001000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0011000011111100 word: SLICEB.K0.INIT 1100000011110011 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R33C49:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 H01E0001 arc: N1_V02N0101 W3_H06E0103 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 N3_V06S0203 arc: E3_H06E0103 W3_H06E0103 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R33C4:PLC2 arc: E1_H02E0601 V02S0601 arc: H00R0000 V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E1_H01W0100 arc: V00B0000 V02N0001 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 E1_H01W0100 arc: A1 H02E0701 arc: A2 H02E0701 arc: A6 V02N0101 arc: A7 E1_H02W0701 arc: B1 V02N0101 arc: B2 V02N0101 arc: B6 V00B0000 arc: B7 S1_V02N0701 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: C6 V00T0000 arc: C7 E1_H02W0601 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H01E0001 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 V00T0100 arc: M4 H02E0401 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: V01S0100 F1 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1000110000100011 word: SLICED.K1.INIT 1111001101010001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100010011110101 word: SLICEB.K0.INIT 1100010011110101 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R33C50:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0701 N1_V01S0100 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02N0101 arc: V00T0100 V02S0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 N3_V06S0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0303 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: H01W0100 Q0 arc: M0 V00T0000 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00T0000 Q2 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R33C51:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 W1_H02E0101 arc: H00R0000 H02W0401 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 H06E0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: V00B0100 V02N0301 arc: V00T0000 V02N0401 arc: W3_H06W0103 E1_H02W0101 arc: A1 N1_V02S0701 arc: A3 H02W0501 arc: A5 V02S0301 arc: A7 H00R0000 arc: B1 V00T0000 arc: B3 V01N0001 arc: B5 V00B0100 arc: B7 S1_V02N0701 arc: C1 W1_H02E0601 arc: C3 H00L0100 arc: C5 W1_H02E0601 arc: C7 W1_H02E0601 arc: D1 H02W0201 arc: D3 H02W0201 arc: D5 H02W0201 arc: D7 H02W0201 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F7 arc: N3_V06N0303 F5 arc: W3_H06W0003 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010110000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010110000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R33C52:PLC2 arc: H00L0000 H02W0201 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 H06E0103 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 H06E0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: A1 H02W0701 arc: A3 V00T0000 arc: A7 V02S0101 arc: B1 V01N0001 arc: B3 S1_V02N0301 arc: B7 V02N0501 arc: C1 E1_H02W0401 arc: C3 H00L0000 arc: C7 E1_H02W0401 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0201 arc: D3 N1_V02S0201 arc: D7 V00B0000 arc: E1_H02E0601 Q4 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: W1_H02W0701 F7 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010110000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010110000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C53:PLC2 arc: E1_H02E0101 V01N0101 arc: H00L0000 V02S0201 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H02W0401 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 V02N0001 arc: V00T0000 V02S0401 arc: W1_H02W0201 V02S0201 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0203 E1_H01W0000 arc: A1 E1_H02W0501 arc: A3 H02W0501 arc: A5 V00T0000 arc: A7 V02S0101 arc: B1 V01N0001 arc: B3 V02N0101 arc: B5 V02N0701 arc: B7 V00B0000 arc: C1 H00L0000 arc: C3 H00L0000 arc: C5 V02S0201 arc: C7 V02S0201 arc: D1 E1_H02W0001 arc: D3 E1_H02W0001 arc: D5 E1_H02W0001 arc: D7 E1_H02W0001 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: W1_H02W0101 F1 arc: W1_H02W0501 F7 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010110000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010110000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C54:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 V02S0201 arc: N1_V02N0201 H02W0201 arc: S1_V02S0501 N1_V02S0401 arc: V00T0000 N1_V02S0601 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: A1 V02S0501 arc: A3 V00T0000 arc: A5 V02S0101 arc: B1 H02E0101 arc: B3 V02N0301 arc: B5 S1_V02N0701 arc: C1 H00L0000 arc: C3 H00L0000 arc: C5 V02S0201 arc: D1 H02W0001 arc: D3 H02W0001 arc: D5 H02W0001 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: N3_V06N0303 F5 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1010110000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R33C55:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: V00B0000 H02E0601 arc: V00B0100 H02W0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0501 V02S0501 arc: W1_H02W0401 W3_H06E0203 arc: C6 V00T0000 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: N1_V02N0501 F7 arc: V00T0000 Q0 arc: V01S0100 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R33C56:PLC2 arc: H00L0100 E1_H02W0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 V02S0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0701 V06S0203 arc: N3_V06N0003 W3_H06E0003 arc: C0 H02E0601 arc: C1 H02E0601 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 Q4 arc: M4 V00B0000 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F0 arc: N1_V02N0101 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R33C57:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 .tile R33C58:PLC2 arc: S3_V06S0103 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 .tile R33C59:PLC2 arc: S3_V06S0203 N3_V06S0203 .tile R33C5:PLC2 arc: E1_H02E0501 V02S0501 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0301 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 V01N0101 arc: S1_V02S0001 H06W0003 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 N1_V01S0100 arc: A3 V02N0701 arc: A5 V00T0000 arc: A6 E1_H01W0000 arc: A7 S1_V02N0301 arc: B3 H00L0000 arc: B5 E1_H02W0301 arc: B6 E1_H02W0301 arc: B7 V02N0501 arc: C3 F6 arc: C5 V00B0100 arc: C6 V02S0201 arc: C7 H02E0601 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 V01S0100 arc: D5 H00R0100 arc: D6 H00R0100 arc: D7 V00B0000 arc: E1_H02E0001 Q0 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F7 arc: N1_V02N0201 F2 arc: V00T0000 Q0 arc: V01S0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000110010101111 word: SLICED.K0.INIT 1111010100110001 word: SLICED.K1.INIT 1010111100100011 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1101000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R33C60:PLC2 arc: S1_V02S0201 N3_V06S0103 .tile R33C61:PLC2 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 .tile R33C62:PLC2 arc: S3_V06S0303 N3_V06S0203 .tile R33C63:PLC2 arc: S3_V06S0303 N3_V06S0203 .tile R33C64:PLC2 arc: S3_V06S0303 N3_V06S0303 .tile R33C65:PLC2 arc: S3_V06S0303 N3_V06S0303 .tile R33C66:PLC2 arc: S1_V02S0401 N3_V06S0203 .tile R33C67:PLC2 arc: S3_V06S0103 N3_V06S0103 .tile R33C69:PLC2 arc: E1_H02E0501 N3_V06S0303 .tile R33C6:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: N1_V02N0101 N1_V01S0100 arc: S1_V02S0001 E1_H02W0001 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B1 V00T0000 arc: B2 H00L0000 arc: B3 H00L0000 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H00R0000 Q6 arc: H01W0000 Q4 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: N1_V02N0601 Q4 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0301 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111101000101 word: SLICEB.K0.INIT 1100111101000101 word: SLICEB.K1.INIT 1100111101000101 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R33C7:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02S0401 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0301 N1_V01S0100 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 H01E0101 arc: A1 H00R0000 arc: A3 H02W0701 arc: A5 H02W0701 arc: A7 H00L0000 arc: B1 H02W0101 arc: B3 V02S0301 arc: B5 H02W0301 arc: B7 V01S0000 arc: C1 H00L0100 arc: C2 E1_H02W0401 arc: C3 S1_V02N0401 arc: C5 V00B0100 arc: C7 V00T0000 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D3 E1_H02W0201 arc: D5 H02W0201 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 F2 arc: M0 E1_H02W0601 arc: M4 V00T0100 arc: M6 N1_V01N0101 arc: N1_V01N0101 F4 arc: N1_V02N0101 F3 arc: N1_V02N0301 F3 arc: N1_V02N0601 F6 arc: V01S0000 F0 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1011000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111101000101 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100010011110101 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000010000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R33C8:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: H00L0100 V02S0101 arc: H00R0000 E1_H02W0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0501 V01N0101 arc: V00B0000 H02E0401 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 N3_V06S0003 arc: A1 H00R0000 arc: A2 E1_H02W0501 arc: A3 V02N0501 arc: A5 S1_V02N0101 arc: A7 N1_V01S0100 arc: B1 V00B0000 arc: B2 H02E0301 arc: B3 F1 arc: B5 N1_V01S0000 arc: B6 H02W0301 arc: B7 W1_H02E0101 arc: C1 V02S0401 arc: C2 W1_H02E0601 arc: C3 H02W0401 arc: C5 V00B0100 arc: C6 S1_V02N0001 arc: C7 V00T0000 arc: D1 W1_H02E0001 arc: D2 S1_V02N0201 arc: D3 V00T0100 arc: D5 H00L0100 arc: D6 H01W0000 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F3 arc: N1_V01N0001 F6 arc: N1_V01N0101 F5 arc: V01S0100 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111010100110001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100010011110101 word: SLICED.K0.INIT 1100000000000000 word: SLICED.K1.INIT 1100111101000101 word: SLICEB.K0.INIT 1000010000100001 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R33C9:PLC2 arc: H00L0000 V02S0001 arc: H00R0000 H02E0401 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0501 H02E0501 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 H01E0001 arc: A1 E1_H01E0001 arc: A2 V00B0000 arc: B1 V00T0000 arc: B2 N1_V02S0301 arc: C1 H00L0000 arc: C2 H00L0000 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: H01W0100 Q6 arc: M0 E1_H02W0601 arc: M1 V01S0100 arc: M2 E1_H02W0601 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0301 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100111101000101 word: SLICEB.K0.INIT 1100111101000101 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R34C10:PLC2 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0601 H02E0601 .tile R34C11:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 N1_V02S0601 arc: N1_V02N0301 N1_V01S0100 .tile R34C12:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02E0601 arc: V00B0100 V02N0101 arc: CE1 H02E0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: M2 E1_H02W0601 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: V01S0100 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R34C13:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 H02W0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 E1_H02W0101 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0100 V02N0501 arc: A1 V02N0701 arc: A2 H02E0501 arc: A4 E1_H01W0000 arc: A5 N1_V01S0100 arc: B1 V01N0001 arc: B2 E1_H01W0100 arc: B4 F1 arc: B5 V02S0701 arc: B6 V01S0000 arc: C1 V02S0401 arc: C2 H00L0100 arc: C4 V02N0001 arc: C5 H02E0401 arc: C6 H02E0601 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V00B0100 arc: D4 F2 arc: D5 H02W0001 arc: D6 H00R0100 arc: D7 H01W0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F5 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: H01W0100 Q6 arc: M2 V00T0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: V01S0000 Q6 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0111000001111100 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R34C14:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0501 E1_H01W0100 arc: H00L0100 H02E0101 arc: H00R0100 H02E0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H01E0101 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0100 V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E1_H02W0601 arc: A7 H00L0000 arc: B0 H01W0100 arc: B4 H00R0000 arc: B7 V01S0000 arc: C0 H00L0100 arc: C4 V00B0100 arc: C7 H02W0401 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H01E0101 arc: D4 H02W0201 arc: D5 H02E0001 arc: D7 V02N0401 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 F7 arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 W1_H02E0601 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: V01S0000 Q4 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R34C15:PLC2 arc: H00L0000 N1_V02S0001 arc: H00L0100 H02E0101 arc: H00R0000 V02N0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0103 E3_H06W0103 arc: A1 H00R0000 arc: A3 E1_H02W0701 arc: A5 H02E0501 arc: A6 N1_V01N0101 arc: A7 V00T0100 arc: B1 N1_V02S0301 arc: B3 E1_H01W0100 arc: B5 V02S0701 arc: B6 V00B0100 arc: B7 V02N0701 arc: C1 H00L0100 arc: C3 H00R0100 arc: C5 W1_H02E0401 arc: C6 E1_H01E0101 arc: C7 V00T0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D3 V02S0001 arc: D5 V02S0401 arc: D6 V00B0000 arc: D7 H01W0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F1 arc: E1_H02E0701 F7 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q7 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F3 arc: N1_V02N0501 F7 arc: N3_V06N0303 F6 arc: S1_V02S0501 F7 arc: V00B0100 F5 arc: V01S0000 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0111000001111100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R34C16:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 V02N0101 arc: H00R0100 N1_V02S0701 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 H02E0701 arc: V00T0100 H02W0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 S1_V02N0601 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 H01E0001 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V01S0000 Q6 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R34C17:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 N1_V02S0401 arc: H01W0000 E3_H06W0103 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0701 H01E0101 arc: A6 H00L0000 arc: A7 H02E0701 arc: B0 V02N0301 arc: B4 V01S0000 arc: B6 V01S0000 arc: B7 H02W0101 arc: C0 E1_H02W0601 arc: C4 E1_H02W0601 arc: C6 V02S0001 arc: C7 V02N0001 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 E1_H02W0001 arc: D4 V02N0601 arc: D5 E1_H01W0100 arc: D6 H02E0001 arc: D7 V00B0000 arc: E1_H01E0101 F6 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0100 Q2 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: S1_V02S0001 Q0 arc: V01S0000 Q4 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 1010101010001010 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R34C18:PLC2 arc: E1_H02E0101 V02N0101 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0100 H02E0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0101 N1_V02S0001 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0501 arc: V00T0100 V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V01N0101 arc: W1_H02W0601 V02S0601 arc: A3 V00T0000 arc: A5 V00T0100 arc: A7 H02W0701 arc: B3 V02N0301 arc: B5 H01E0101 arc: B7 H02W0301 arc: C3 W1_H02E0601 arc: C5 E1_H01E0101 arc: C7 H02W0401 arc: CE0 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D3 H02E0001 arc: D5 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F3 arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: M0 H02E0601 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V02N0601 F4 arc: V00T0000 Q0 arc: V01S0000 F7 arc: V01S0100 F7 arc: W1_H02W0501 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111000001111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111011101110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R34C19:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0201 arc: H00L0100 S1_V02N0101 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E1_H02W0301 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V02S0701 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: A1 H00R0000 arc: A3 V00T0000 arc: B1 E1_H02W0101 arc: B3 H00L0000 arc: C1 E1_H02W0601 arc: C3 N1_V01N0001 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D3 E1_H02W0001 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H00R0000 Q4 arc: M2 V00B0100 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F1 arc: N1_V02N0001 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111011101110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R34C20:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02S0101 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N1_V01S0100 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0501 N1_V01S0100 arc: A0 H02W0701 arc: A1 V01N0101 arc: A2 H02W0501 arc: A3 H02E0701 arc: A7 H00R0000 arc: B0 V00B0000 arc: B1 H02W0101 arc: B2 V02N0301 arc: B3 H02E0301 arc: B6 V01S0000 arc: B7 V00T0000 arc: C0 N1_V02S0601 arc: C1 S1_V02N0601 arc: C2 F6 arc: C3 H00L0100 arc: C6 V00T0100 arc: C7 H02W0401 arc: CE1 H00L0000 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V02N0001 arc: D2 S1_V02N0001 arc: D3 F2 arc: D6 H00R0100 arc: D7 V02N0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: E1_H02E0101 F3 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H00R0100 F7 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: S1_V02S0101 F3 arc: V01S0000 Q3 arc: W1_H02W0201 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0101001111111111 word: SLICEA.K1.INIT 1010100010101010 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 0111000001111100 word: SLICED.K0.INIT 0011111100000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R34C21:PLC2 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02W0601 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 H01E0101 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E3_H06W0003 arc: A5 V00T0000 arc: B2 H01W0100 arc: B5 H00R0000 arc: C1 H00L0000 arc: C2 H02E0601 arc: C5 S1_V02N0001 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D2 V00B0100 arc: D3 H01E0101 arc: D5 W1_H02E0201 arc: E3_H06E0103 F1 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0100 Q2 arc: M2 V00B0000 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0301 F1 arc: V00T0000 Q2 arc: V01S0000 Q6 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R34C22:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 E1_H01W0100 arc: E3_H06E0103 V06S0103 arc: H00L0000 H02W0001 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 E1_H01W0000 arc: A0 E1_H02W0501 arc: A1 E1_H01E0001 arc: A4 V02N0101 arc: A5 N1_V01N0101 arc: B0 W1_H02E0101 arc: B1 V00B0000 arc: B4 W1_H02E0101 arc: B5 H00R0000 arc: C0 H00R0100 arc: C1 V02N0601 arc: C4 V00B0100 arc: C5 V02S0001 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00T0100 arc: D4 H01W0000 arc: D5 H02W0201 arc: E1_H01E0001 Q0 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: H01W0100 Q0 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: V01S0100 F1 arc: W1_H02W0201 Q0 arc: W1_H02W0601 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111110000000 word: SLICEA.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 1111111110000000 word: SLICEC.K1.INIT 0000000011001010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R34C23:PLC2 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V01S0000 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0101 H02W0101 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02S0201 arc: V00T0000 V02N0601 arc: V00T0100 H02W0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: A7 V02S0101 arc: B4 V02S0501 arc: B7 E1_H02W0301 arc: C4 H02W0601 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D4 H02E0001 arc: D5 V00B0000 arc: D7 E1_H01W0100 arc: E1_H01E0001 F7 arc: E1_H02E0701 Q7 arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: M0 V00B0000 arc: M2 H02W0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: S1_V02S0501 F7 arc: V01S0000 F7 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111000001111100 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R34C24:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: A4 V02N0101 arc: A5 H02E0701 arc: A7 V02N0301 arc: B4 H00R0000 arc: B5 H00L0000 arc: B7 V02S0701 arc: C4 V00T0100 arc: C5 E1_H02W0401 arc: C7 F4 arc: CE0 N1_V02S0201 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 V02S0601 arc: D7 H01W0000 arc: E3_H06E0303 F6 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F5 arc: H01W0100 F6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M2 H02E0601 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q2 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R34C25:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 V06N0103 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06W0303 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 W1_H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 S1_V02N0601 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A4 H02E0701 arc: A5 E1_H02W0501 arc: A7 V02N0301 arc: B0 H01W0100 arc: B2 H00L0000 arc: B4 V02N0501 arc: B5 V00B0100 arc: B7 V01S0000 arc: C0 V02S0601 arc: C2 V02S0601 arc: C4 V02S0201 arc: C5 H02W0601 arc: C7 E1_H01E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H02E0001 arc: D2 V02N0001 arc: D3 H02E0001 arc: D4 H00L0100 arc: D5 H00R0100 arc: D7 S1_V02N0401 arc: E1_H01E0101 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: H01W0100 Q0 arc: M0 V00B0000 arc: M2 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F6 arc: V01S0000 F4 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0111011101110011 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R34C26:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 E1_H01W0000 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: V00T0000 V02S0601 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V01N0001 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H01E0001 arc: A2 V02N0501 arc: A3 V02S0501 arc: A4 V02N0101 arc: A5 V00B0000 arc: B1 H00R0100 arc: B2 E1_H01W0100 arc: B3 W1_H02E0101 arc: B4 E1_H02W0101 arc: B5 W1_H02E0101 arc: C1 H00L0100 arc: C2 V02S0601 arc: C3 V02N0601 arc: C4 V00T0000 arc: C5 V02S0201 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V01S0100 arc: D3 S1_V02N0201 arc: D4 H01W0000 arc: D5 H02E0201 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: H01W0100 F1 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: V00B0000 Q4 arc: V01S0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000100000 word: SLICEB.K0.INIT 1111111110000000 word: SLICEB.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 1111111110000000 word: SLICEC.K1.INIT 0000000011001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R34C27:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V06S0203 arc: H00L0000 V02S0001 arc: H00L0100 E1_H02W0301 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 H01E0101 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02W0601 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0701 V06S0203 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0203 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: A1 H00L0000 arc: A5 V00T0000 arc: A6 H02E0501 arc: A7 W1_H02E0701 arc: B1 H02E0301 arc: B5 H00R0000 arc: B6 H01E0101 arc: B7 V02S0701 arc: C1 H00L0100 arc: C5 H02E0601 arc: C6 V02N0201 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D5 H00R0100 arc: D6 H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: E1_H02E0201 Q2 arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 F7 arc: H01W0100 F1 arc: M2 E1_H02W0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F1 arc: N1_V02N0601 F4 arc: S1_V02S0301 Q1 arc: W1_H02W0301 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0111000001111100 word: SLICED.K0.INIT 0101001111111111 word: SLICED.K1.INIT 1010101010001010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0111011101110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R34C28:PLC2 arc: H00L0000 H02E0201 arc: H00L0100 V02N0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H01E0001 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 H02E0601 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 S1_V02N0601 arc: H01W0000 W3_H06E0103 arc: W3_H06W0303 N3_V06S0303 arc: A1 H00L0000 arc: A3 H00L0100 arc: A4 E1_H01W0000 arc: A5 N1_V01N0101 arc: B1 V00B0000 arc: B3 H01W0100 arc: B4 E1_H02W0301 arc: B5 H00R0000 arc: C1 H02W0401 arc: C3 N1_V01N0001 arc: C4 V00T0000 arc: C5 H02W0401 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D3 V00T0100 arc: D4 V01N0001 arc: D5 S1_V02N0601 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 F4 arc: M2 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: N1_V02N0201 F2 arc: V00T0100 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000100000 word: SLICEC.K0.INIT 0101001111111111 word: SLICEC.K1.INIT 1010101010001010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111011101110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R34C29:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 N1_V02S0201 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 S1_V02N0401 arc: V00T0100 W1_H02E0301 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 E3_H06W0003 arc: A5 V00T0000 arc: B0 H01W0100 arc: B2 H00L0000 arc: B5 S1_V02N0701 arc: C0 H00L0100 arc: C2 H00L0100 arc: C5 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V02S0001 arc: D2 H00R0000 arc: D3 N1_V02S0001 arc: D5 H00R0100 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: H01W0000 Q0 arc: H01W0100 Q0 arc: M0 V00B0000 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R34C2:PLC2 arc: E1_H02E0601 N1_V02S0601 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0203 S1_V02N0701 arc: V00B0100 V02N0101 arc: V00T0100 S1_V02N0701 arc: V01S0100 N3_V06S0303 arc: B1 S1_V02N0301 arc: C1 N1_V01N0001 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: E1_H01E0001 F1 arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: V00B0000 Q6 arc: V01S0000 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R34C30:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: H00L0000 H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 H02W0601 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0303 W3_H06E0303 arc: A7 H02E0701 arc: B7 H01E0101 arc: C7 V00T0000 arc: CE0 H00L0000 arc: CLK0 G_HPBX0000 arc: D7 H02W0201 arc: E1_H01E0101 F7 arc: F7 F7_SLICE arc: H01W0100 Q0 arc: M0 V00T0100 arc: MUXCLK0 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R34C31:PLC2 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 V02S0301 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00T0000 V02S0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0001 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q6 arc: M0 V00B0000 arc: M2 E1_H02W0601 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: N3_V06N0003 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R34C32:PLC2 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02E0601 arc: N3_V06N0303 E3_H06W0303 arc: W3_H06W0303 V06S0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 .tile R34C33:PLC2 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0103 N3_V06S0003 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0003 V06S0003 .tile R34C34:PLC2 arc: E3_H06E0103 N3_V06S0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H06E0303 .tile R34C35:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0103 N3_V06S0103 arc: H00L0100 V02S0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0701 H06E0203 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02S0401 arc: W3_H06W0003 E3_H06W0003 arc: CE0 H02W0101 arc: CE2 V02S0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: M0 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0201 Q0 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R34C36:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0701 H01E0101 arc: H00L0000 V02S0001 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02S0101 arc: N1_V02N0501 W3_H06E0303 arc: A5 H02E0501 arc: B5 N1_V01S0000 arc: C5 H02E0401 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q0 arc: E1_H02E0201 Q2 arc: E1_H02E0401 F4 arc: F4 F5C_SLICE arc: H01W0100 Q0 arc: M0 V00B0100 arc: M2 H02E0601 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000001011000011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R34C37:PLC2 arc: E1_H02E0201 V06S0103 arc: H00L0000 H02E0201 arc: H00L0100 N1_V02S0101 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: W3_H06W0003 E3_H06W0003 arc: A0 H02E0701 arc: A1 E1_H01E0001 arc: A2 V01N0101 arc: A3 V01N0101 arc: A5 V00T0000 arc: A6 H00L0000 arc: A7 S1_V02N0101 arc: B0 H02E0301 arc: B1 E1_H02W0301 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B5 S1_V02N0701 arc: B6 V00B0100 arc: B7 H01E0101 arc: C0 H02E0401 arc: C1 F6 arc: C2 V02S0601 arc: C3 V02S0601 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 V02S0201 arc: D0 V01S0100 arc: D1 H00R0000 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D5 H00L0100 arc: D6 H01W0000 arc: D7 N1_V02S0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F3 arc: M4 E1_H02W0401 arc: N3_V06N0003 F0 arc: V01S0100 F1 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 1100010000110001 word: SLICEA.K0.INIT 1001000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 1010111100100011 word: SLICEB.K1.INIT 1100010011110101 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100111101000101 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R34C38:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: H00R0000 V02N0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: A2 V00T0000 arc: A3 V00T0000 arc: B2 V01N0001 arc: B3 V01N0001 arc: C2 N1_V02S0601 arc: C3 N1_V02S0601 arc: CE0 V02N0201 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 H02E0201 arc: D3 H02E0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q4 arc: M0 V00T0100 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00T0000 Q0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1000110010101111 word: SLICEB.K1.INIT 1111010100110001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R34C39:PLC2 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 V02S0001 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0001 W3_H06E0003 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R34C3:PLC2 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 H02E0601 arc: S3_V06S0203 H01E0001 .tile R34C40:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: E3_H06E0103 W3_H06E0103 .tile R34C41:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V06S0303 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02W0601 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: A1 V02N0501 arc: B0 H00R0100 arc: B1 V02S0101 arc: C0 H00L0100 arc: C1 V02S0401 arc: D0 V00T0100 arc: D1 S1_V02N0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H00L0100 F1 arc: N3_V06N0003 F0 word: SLICEA.K0.INIT 0000000011110011 word: SLICEA.K1.INIT 1001010001001111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R34C42:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V01N0101 arc: E1_H02E0601 V06S0303 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H06E0203 arc: S1_V02S0201 N1_V02S0701 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02E0001 arc: V00T0100 H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: A0 V02S0501 arc: A3 H00L0100 arc: A5 V02N0101 arc: B0 V00T0000 arc: B3 H02W0101 arc: B5 H02W0101 arc: C0 H00R0100 arc: C3 H00L0000 arc: C5 V00B0100 arc: D0 H00R0000 arc: D3 H02W0001 arc: D5 H02E0201 arc: E1_H01E0001 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: M0 E1_H02W0601 arc: M2 V00T0100 arc: M4 V00T0100 arc: N1_V01N0101 F2 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 0011101101111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0110101110110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0110101110110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R34C43:PLC2 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 V06S0003 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02S0101 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02S0101 arc: W3_H06W0003 V06S0003 arc: A1 H00L0100 arc: A5 V02S0101 arc: A7 W1_H02E0501 arc: B0 W1_H02E0301 arc: B1 V02N0101 arc: B5 H00L0000 arc: B7 V02S0501 arc: C0 N1_V01N0001 arc: C1 N1_V01S0100 arc: C5 V00B0100 arc: C7 V00T0000 arc: D0 H02E0201 arc: D1 H02W0201 arc: D5 V00B0000 arc: D7 V02S0601 arc: E1_H01E0001 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M4 V00T0100 arc: N1_V01N0001 F1 arc: W1_H02W0201 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100010010000000 word: SLICEA.K0.INIT 0000000011110011 word: SLICEA.K1.INIT 1001001000101111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0110110111010000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R34C44:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: E3_H06E0103 N1_V01S0100 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 H02E0601 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0701 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 N3_V06S0203 .tile R34C45:PLC2 arc: E1_H02E0201 V06S0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: V01S0000 N3_V06S0103 .tile R34C46:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 E1_H01W0000 arc: H00R0000 V02S0401 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0303 E3_H06W0303 arc: S3_V06S0003 N3_V06S0003 arc: V00T0100 V02S0701 arc: E3_H06E0203 W3_H06E0103 arc: A7 H00R0000 arc: B7 N1_V02S0701 arc: C7 V00T0100 arc: D7 V02N0401 arc: F7 F7_SLICE arc: H01W0000 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R34C47:PLC2 arc: E1_H02E0201 V06N0103 arc: E1_H02E0701 V02S0701 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02W0401 arc: V00T0000 W1_H02E0201 arc: V00T0100 N1_V02S0501 arc: W3_H06W0303 N3_V06S0303 arc: A7 N1_V01S0100 arc: B7 H02W0301 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D7 E1_H02W0001 arc: E1_H01E0101 F7 arc: E1_H02E0601 Q4 arc: E3_H06E0003 Q0 arc: F7 F7_SLICE arc: H01W0000 Q2 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000010000100001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R34C48:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H02E0701 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 W1_H02E0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V02S0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q2 arc: M0 H02W0601 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0401 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R34C49:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 W1_H02E0601 arc: H00R0000 H02E0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 W1_H02E0201 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0001 W3_H06E0003 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: H01W0100 Q6 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q4 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R34C4:PLC2 arc: E1_H02E0501 V06S0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0501 N3_V06S0303 .tile R34C50:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: H00L0000 H02E0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H01W0000 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0401 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 V02S0401 arc: W1_H02W0101 W3_H06E0103 arc: A0 H00L0000 arc: A2 V00T0000 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 H02W0501 arc: A6 H02E0501 arc: A7 H00R0000 arc: B2 V01N0001 arc: B3 W1_H02E0101 arc: B4 H01E0101 arc: B5 V00B0100 arc: B6 V02N0701 arc: B7 H02E0101 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: N1_V02N0301 F3 arc: N1_V02N0501 F5 arc: N3_V06N0203 F7 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R34C51:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 V06N0103 arc: H00L0000 N1_V02S0001 arc: H00L0100 H02E0301 arc: H00R0000 H02E0401 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 N3_V06S0003 arc: A0 H00L0100 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 N1_V02S0701 arc: A4 V00T0100 arc: A5 V00T0000 arc: A6 H02W0701 arc: A7 H00R0000 arc: B0 V02N0301 arc: B1 H02E0101 arc: B2 V01N0001 arc: B3 V02N0101 arc: B4 W1_H02E0301 arc: B5 E1_H02W0301 arc: B6 V02N0501 arc: B7 V02S0501 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: N1_V02N0301 F3 arc: N1_V02N0401 F4 arc: V01S0000 F2 arc: V01S0100 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R34C52:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02E0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0601 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0701 N1_V02S0701 arc: E3_H06E0203 W3_H06E0203 arc: A0 H00L0000 arc: A1 H02W0501 arc: A2 H00L0100 arc: A3 N1_V02S0501 arc: A4 V00B0000 arc: A5 V00T0000 arc: A6 H00R0000 arc: A7 H00R0000 arc: B0 V01N0001 arc: B1 H00R0100 arc: B2 S1_V02N0101 arc: B3 V02N0101 arc: B4 V00B0100 arc: B5 V02N0701 arc: B6 H02E0301 arc: B7 V02N0501 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: N1_V01N0001 F5 arc: N1_V02N0001 F2 arc: N3_V06N0003 F3 arc: N3_V06N0203 F7 arc: V01S0000 F4 arc: V01S0100 F0 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R34C53:PLC2 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0701 H02E0701 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0303 V06N0303 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 V00B0000 arc: A5 V00B0000 arc: A6 H00R0000 arc: A7 H00R0000 arc: B0 V00T0000 arc: B1 V02S0101 arc: B2 V01N0001 arc: B3 H00R0100 arc: B4 H02E0301 arc: B5 V00B0100 arc: B6 V02N0701 arc: B7 S1_V02N0701 arc: E1_H01E0001 F6 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: V01S0000 F1 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R34C54:PLC2 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 H06E0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0601 N1_V02S0601 arc: A0 H00R0000 arc: A1 H00R0000 arc: B0 V02N0101 arc: B1 H00R0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: N1_V02N0201 F0 arc: V01S0100 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R34C55:PLC2 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 N3_V06S0303 .tile R34C56:PLC2 arc: N1_V02N0001 N1_V01S0000 arc: S1_V02S0101 N3_V06S0103 arc: W3_H06W0103 V06N0103 .tile R34C57:PLC2 arc: E1_H02E0601 V06S0303 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0601 N1_V02S0301 arc: V01S0000 N3_V06S0103 arc: N3_V06N0003 W3_H06E0003 .tile R34C58:PLC2 arc: S1_V02S0001 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: E3_H06E0303 W3_H06E0203 .tile R34C59:PLC2 arc: S1_V02S0601 W1_H02E0601 .tile R34C5:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0501 N1_V02S0501 arc: H00R0000 H02W0601 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 S1_V02N0601 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: W1_H02W0701 N3_V06S0203 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: H01W0000 Q4 arc: H01W0100 Q6 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: N1_V02N0601 Q6 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R34C64:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R34C69:PLC2 arc: S3_V06S0203 N3_V06S0103 .tile R34C6:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 N1_V02S0601 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0401 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 N1_V01S0000 arc: A3 V02N0501 arc: A6 E1_H01W0000 arc: B3 H00R0100 arc: B6 H02W0301 arc: C1 N1_V01N0001 arc: C3 E1_H02W0401 arc: C6 V00T0000 arc: C7 V02S0001 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 V01S0100 arc: D6 H00L0100 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q4 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F1 arc: M2 V00B0000 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: V00B0000 F6 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011110000 word: SLICED.K0.INIT 1000010010100101 word: SLICED.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000100001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R34C70:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: N1_V02N0301 S1_V02N0201 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: S3_V06S0003 W3_H06E0003 .tile R34C7:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V01N0101 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 H01E0101 arc: H00L0100 H02E0301 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 H01E0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 H02W0501 arc: V00B0100 H02W0701 arc: V00T0000 V02N0601 arc: V00T0100 H02W0101 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A3 E1_H02W0701 arc: A7 E1_H01W0000 arc: B0 V02S0301 arc: B1 V02S0301 arc: B3 V01N0001 arc: B7 E1_H02W0101 arc: C0 H00L0100 arc: C1 H00L0100 arc: C3 V02N0601 arc: C7 V00T0000 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D3 H00R0000 arc: D7 H00R0100 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: M0 V00B0100 arc: M2 H02E0601 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0001 F0 arc: N1_V02N0501 F7 arc: V01S0000 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111010100110001 word: SLICEA.K0.INIT 0000000001000101 word: SLICEA.K1.INIT 0000000010001010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000110000100011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R34C8:PLC2 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: A3 H02E0701 arc: A4 V02N0101 arc: A5 V00T0000 arc: A7 V02N0101 arc: B2 F3 arc: B3 H02E0301 arc: B4 H01E0101 arc: B5 V02N0701 arc: B7 V02N0701 arc: C2 N1_V01N0001 arc: C3 W1_H02E0401 arc: C4 H02E0601 arc: C5 V00T0100 arc: C7 H02E0601 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 V02N0401 arc: D7 H00R0100 arc: E1_H01E0101 Q0 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F2 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F7 arc: V00B0100 F5 arc: V01S0000 F4 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1010111100100011 word: SLICEB.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 1100001101000001 word: SLICEC.K0.INIT 1111010100110001 word: SLICEC.K1.INIT 1000101011001111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R34C9:PLC2 arc: E1_H02E0601 N3_V06S0303 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0701 H01E0101 arc: W3_H06W0203 E3_H06W0103 .tile R35C11:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: N1_V02N0601 H02W0601 .tile R35C12:PLC2 arc: E1_H02E0201 V06S0103 arc: E3_H06E0203 N3_V06S0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0401 N3_V06S0203 arc: W1_H02W0601 N3_V06S0303 .tile R35C13:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 N1_V02S0701 arc: H00R0100 H02W0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H02E0201 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0601 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0101 arc: V00T0100 H02W0101 arc: A4 V00T0000 arc: B4 V00B0100 arc: C4 V00T0100 arc: C5 V00T0000 arc: CE0 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D4 V02N0601 arc: D5 V02N0401 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M0 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0501 F5 arc: N1_V02N0601 F4 arc: V00T0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1010101010001010 word: SLICEC.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R35C14:PLC2 arc: E1_H02E0401 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02E0401 arc: S1_V02S0501 N3_V06S0303 arc: V00B0100 H02W0701 arc: V00T0100 V02S0701 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0701 V06S0203 arc: A3 V00B0000 arc: B3 H00R0000 arc: C3 V02N0601 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: F3 F3_SLICE arc: H00R0000 Q6 arc: H01W0000 F3 arc: LSR1 V00B0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00B0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R35C15:PLC2 arc: E1_H02E0401 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 W1_H02E0701 arc: V00B0000 H02W0601 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02W0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: B4 H00R0000 arc: C4 E1_H02W0401 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 H00R0100 arc: F4 F5C_SLICE arc: H00R0000 Q4 arc: M0 V00B0100 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q0 arc: N1_V02N0401 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R35C16:PLC2 arc: E1_H02E0601 V02N0601 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 V02N0601 arc: A3 V02S0701 arc: A6 N1_V01N0101 arc: A7 E1_H01W0000 arc: B3 H00R0000 arc: B6 V01S0000 arc: B7 V02S0501 arc: C3 F6 arc: C6 V00T0100 arc: C7 W1_H02E0401 arc: CE0 H00R0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 V01S0100 arc: D6 V00B0000 arc: D7 N1_V02S0601 arc: E1_H02E0201 F2 arc: E3_H06E0103 F2 arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: V01S0000 Q0 arc: V01S0100 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R35C17:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 V02S0001 arc: H00L0100 S1_V02N0301 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 H02W0601 arc: S1_V02S0601 N3_V06S0303 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 V06S0203 arc: A5 V00T0000 arc: A7 E1_H01W0000 arc: B5 H00L0000 arc: B7 N1_V01S0000 arc: C5 W1_H02E0401 arc: C7 V02N0001 arc: CE0 E1_H02W0101 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D5 H02W0001 arc: D7 E1_H02W0201 arc: E1_H01E0101 F7 arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V00T0000 Q0 arc: W1_H02W0601 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R35C18:PLC2 arc: E1_H02E0601 V02N0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H02W0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: B4 H00R0000 arc: C4 V02N0201 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 N1_V02S0401 arc: F4 F5C_SLICE arc: H00R0000 Q4 arc: H01W0000 Q4 arc: M4 V00B0100 arc: MUXCLK2 CLK0 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R35C19:PLC2 arc: E1_H02E0601 W1_H02E0601 arc: H00R0000 V02N0601 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0501 N3_V06S0303 arc: W3_H06W0203 E3_H06W0103 arc: A1 E1_H01E0001 arc: B1 H01W0100 arc: C1 H02E0601 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: E1_H01E0001 Q4 arc: E1_H02E0301 F1 arc: F1 F1_SLICE arc: H01W0100 Q6 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R35C20:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E3_H06E0303 V06S0303 arc: H00R0100 H02W0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 H02W0601 arc: S1_V02S0201 N3_V06S0103 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: A3 V00B0000 arc: B3 E1_H01W0100 arc: C3 V02N0401 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: F3 F3_SLICE arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: V00B0000 Q4 arc: V01S0000 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R35C21:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0003 N1_V01S0000 arc: H00L0000 V02S0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: V00B0100 V02S0301 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 E3_H06W0103 arc: CE0 H00L0000 arc: CLK0 G_HPBX0000 arc: H01W0100 Q0 arc: M0 V00B0100 arc: MUXCLK0 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R35C22:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: H00L0000 V02N0201 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0601 E1_H02W0601 arc: E3_H06E0203 W3_H06E0103 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H02E0601 Q4 arc: M4 H02W0401 arc: MUXCLK2 CLK0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R35C23:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0203 N3_V06S0203 arc: H00R0000 H02W0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0101 H02E0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0401 E1_H02W0401 arc: A5 V00B0000 arc: B5 V02S0701 arc: C5 V02N0201 arc: CE0 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: F5 F5_SLICE arc: LSR0 V00T0000 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000100000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R35C24:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N3_V06S0303 arc: H00R0000 V02N0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 N3_V06S0103 arc: V00T0000 V02S0601 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N3_V06S0303 arc: S1_V02S0401 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: A3 V00B0000 arc: A5 H02E0501 arc: B0 H01W0100 arc: B3 H02W0301 arc: B5 V02S0701 arc: C0 E1_H02W0401 arc: C3 V02N0401 arc: C5 V02N0001 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H02E0201 arc: D3 H02W0201 arc: D5 H02E0001 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0100 Q0 arc: M0 V00T0000 arc: M2 N1_V01N0001 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: V00B0000 Q6 arc: V01S0100 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R35C25:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: H00R0100 H02W0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02W0301 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 N3_V06S0103 arc: A7 H02E0501 arc: B7 V02S0701 arc: C7 V00T0100 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: F7 F7_SLICE arc: H01W0100 Q4 arc: M0 E1_H02W0601 arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V02N0201 Q0 arc: V01S0000 F7 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000100000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R35C26:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 S1_V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 H06E0203 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 .tile R35C27:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V02N0401 arc: E3_H06E0203 N3_V06S0203 arc: H00R0100 H02E0501 arc: N1_V02N0201 H02W0201 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H06E0303 arc: V00B0000 V02N0201 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: W3_H06W0103 E3_H06W0103 arc: A3 W1_H02E0701 arc: A6 H00L0000 arc: A7 V02S0301 arc: B3 W1_H02E0301 arc: B6 H02E0301 arc: B7 V00B0000 arc: C3 F6 arc: C6 W1_H02E0601 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D6 N1_V02S0601 arc: D7 V02N0601 arc: E3_H06E0103 F2 arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 E1_H02W0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V02N0001 F2 arc: V00B0100 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R35C28:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 W1_H02E0701 arc: H00R0000 V02N0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: S1_V02S0701 N1_V02S0701 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0100 H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W3_H06W0003 N3_V06S0003 arc: E3_H06E0303 W3_H06E0203 arc: A5 V00T0000 arc: A7 H00L0000 arc: B0 H01W0100 arc: B5 H02E0101 arc: B7 V00B0000 arc: C0 N1_V02S0401 arc: C5 H02E0401 arc: C7 V02N0001 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V02S0201 arc: D5 S1_V02N0401 arc: D7 V02S0601 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V00T0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R35C29:PLC2 arc: H00L0100 H02W0101 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0401 N1_V02S0101 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 H02W0201 arc: W1_H02W0601 H01E0001 arc: A1 V02N0501 arc: A7 V02N0101 arc: B1 V02S0101 arc: B7 V00B0000 arc: C1 V02N0601 arc: C7 V00B0100 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D7 H00L0100 arc: F1 F1_SLICE arc: F6 F5D_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M2 E1_H02W0601 arc: M4 H02W0401 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N3_V06N0303 F6 arc: V00T0100 F1 arc: V01S0000 Q2 arc: V01S0100 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R35C2:PLC2 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H01W0000 .tile R35C30:PLC2 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0701 H06E0203 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: S1_V02S0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 .tile R35C31:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 N3_V06S0303 arc: W1_H02W0601 V06S0303 .tile R35C32:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 N3_V06S0103 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 .tile R35C33:PLC2 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H02E0701 arc: W3_H06W0103 N3_V06S0103 arc: E3_H06E0103 W3_H06E0103 .tile R35C34:PLC2 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: H01W0100 W3_H06E0303 .tile R35C35:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: W3_H06W0103 E3_H06W0103 .tile R35C36:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 N1_V02S0201 arc: N1_V02N0201 H06E0103 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 .tile R35C37:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 V02N0001 arc: N1_V02N0001 H02E0001 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0401 N3_V06S0203 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: W1_H02W0701 N3_V06S0203 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R35C38:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: E3_H06E0003 N3_V06S0003 arc: H00R0000 H02E0401 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H02E0601 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02S0001 arc: W1_H02W0701 N1_V01S0100 arc: E3_H06E0203 W3_H06E0103 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R35C39:PLC2 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 V01N0101 .tile R35C3:PLC2 arc: S3_V06S0103 N3_V06S0103 arc: V00T0100 V02N0701 arc: A1 V02N0501 arc: A5 V02N0301 arc: B1 V01N0001 arc: B5 S1_V02N0501 arc: C1 V02N0401 arc: C4 V00T0100 arc: C5 E1_H01E0101 arc: D1 S1_V02N0201 arc: D4 H00R0100 arc: D5 E1_H01W0100 arc: E1_H01E0101 F1 arc: E1_H02E0601 F4 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 F5 arc: H01W0000 F5 arc: N3_V06N0303 F5 arc: S1_V02S0601 F4 arc: V01S0100 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 1111000011111111 word: SLICEC.K1.INIT 1110111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R35C40:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: S1_V02S0601 N3_V06S0303 .tile R35C41:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H06E0203 arc: W3_H06W0103 E3_H06W0003 .tile R35C42:PLC2 arc: E1_H02E0201 V02S0201 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H02W0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0501 E1_H02W0501 arc: E1_H02E0101 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 .tile R35C43:PLC2 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0101 H02E0101 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N3_V06S0103 .tile R35C44:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: N1_V02N0201 S1_V02N0701 arc: N3_V06N0203 H06E0203 arc: S1_V02S0601 N3_V06S0303 arc: W1_H02W0501 N3_V06S0303 arc: S1_V02S0401 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 .tile R35C45:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H02E0301 .tile R35C46:PLC2 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02W0401 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0401 H02E0401 arc: S1_V02S0701 N1_V02S0601 .tile R35C47:PLC2 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0303 N3_V06S0303 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0101 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H06E0203 arc: V00T0000 S1_V02N0401 arc: W1_H02W0401 V06S0203 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E3_H06E0203 Q4 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R35C48:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0401 E1_H01W0000 arc: H00R0100 N1_V02S0701 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02E0601 arc: V00B0100 E1_H02W0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0601 Q6 arc: M6 V00B0100 arc: MUXCLK3 CLK0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R35C49:PLC2 arc: E1_H02E0401 E1_H01W0000 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02N0201 arc: H00R0100 H02W0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0201 H02E0201 arc: V00B0000 V02S0001 arc: V00T0000 H02E0001 arc: V01S0000 N3_V06S0103 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: H01W0000 Q4 arc: M0 V00T0000 arc: M2 H02E0601 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R35C4:PLC2 arc: H00L0000 V02N0001 arc: N1_V02N0701 S1_V02N0601 arc: V00B0100 H02W0501 arc: V00T0100 V02N0501 arc: A3 V01N0101 arc: A6 F7 arc: A7 V00T0100 arc: B3 V01N0001 arc: B6 F3 arc: B7 V02N0701 arc: C3 H00L0000 arc: C6 V00B0100 arc: C7 S1_V02N0201 arc: D3 V02N0201 arc: D6 E1_H01W0100 arc: D7 V02N0401 arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0000000000000001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R35C50:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 N3_V06S0303 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0601 H06E0303 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 N1_V02S0701 arc: S1_V02S0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q4 arc: H01W0000 Q6 arc: M0 V00T0000 arc: M2 V00B0000 arc: M4 H02E0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R35C51:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 N3_V06S0303 arc: H00R0000 V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 H06E0103 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 N1_V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0501 N3_V06S0303 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q0 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R35C52:PLC2 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02W0201 arc: H00R0000 H02E0601 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: H01W0100 Q4 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R35C53:PLC2 arc: E3_H06E0003 N3_V06S0003 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H06E0303 arc: V00B0100 H02E0501 arc: W1_H02W0201 N1_V02S0201 arc: W3_H06W0303 E3_H06W0203 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: H01W0100 Q0 arc: M0 H02E0601 arc: M2 V00B0100 arc: M4 H02E0401 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: V01S0100 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R35C54:PLC2 arc: N1_V02N0101 H01E0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0601 N3_V06S0303 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 .tile R35C55:PLC2 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0501 E1_H01W0100 arc: W1_H02W0401 N3_V06S0203 .tile R35C56:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: N1_V02N0301 S1_V02N0201 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H06E0003 arc: H01W0100 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 .tile R35C57:PLC2 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N1_V01S0000 .tile R35C58:PLC2 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N3_V06S0303 .tile R35C59:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H06E0303 arc: S3_V06S0303 N3_V06S0303 arc: W3_H06W0203 E3_H06W0203 .tile R35C5:PLC2 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0601 W1_H02E0601 arc: V00B0100 V02N0301 arc: V00T0100 V02N0701 arc: A5 V00T0100 arc: A7 V02N0101 arc: B5 V02N0501 arc: B7 V00B0100 arc: C5 V01N0101 arc: C7 V02N0001 arc: D5 V02N0401 arc: D7 V01N0001 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: W1_H02W0501 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R35C60:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: S1_V02S0401 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 .tile R35C61:PLC2 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H02E0201 .tile R35C62:PLC2 arc: S1_V02S0701 N3_V06S0203 arc: S1_V02S0501 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 .tile R35C63:PLC2 arc: S1_V02S0201 H06E0103 .tile R35C64:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: S1_V02S0701 H02W0701 .tile R35C65:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: S1_V02S0101 H02E0101 arc: S1_V02S0501 H06E0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 E3_H06W0203 .tile R35C66:PLC2 arc: S1_V02S0101 H02E0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0201 W3_H06E0103 .tile R35C68:PLC2 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H06E0303 .tile R35C69:PLC2 arc: E1_H02E0101 S1_V02N0101 .tile R35C6:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V06S0303 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 N3_V06S0303 .tile R35C7:PLC2 arc: H00R0000 V02N0601 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: V00B0000 V02S0201 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: CE0 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: H01W0100 Q6 arc: M0 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R35C8:PLC2 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 H01E0101 .tile R35C9:PLC2 arc: N1_V02N0501 E3_H06W0303 .tile R36C10:PLC2 arc: V00T0000 W1_H02E0201 arc: CLK0 G_HPBX0000 arc: E3_H06E0103 F1 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: LSR1 V00T0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: N3_V06N0103 F1 arc: N3_V06N0203 Q4 arc: V00T0100 Q1 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR ENABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE ASYNC enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR ENABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE ASYNC enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R36C12:PLC2 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 .tile R36C13:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 H06W0303 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 H06E0203 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 V01N0001 arc: V01S0100 N3_V06S0303 .tile R36C14:PLC2 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E1_H02W0601 .tile R36C15:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0301 H02W0301 .tile R36C16:PLC2 arc: N1_V02N0001 H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0101 H02E0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 E1_H02W0601 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: W3_H06W0003 V06S0003 arc: W3_H06W0303 N3_V06S0303 arc: E3_H06E0103 W3_H06E0103 .tile R36C17:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0203 V01N0001 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N3_V06S0103 arc: S3_V06S0103 N3_V06S0003 arc: V01S0100 N3_V06S0303 .tile R36C18:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0701 N3_V06S0203 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 E3_H06W0303 arc: V01S0100 N3_V06S0303 arc: W1_H02W0601 E3_H06W0303 .tile R36C19:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: E3_H06E0303 V01N0101 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 H02E0701 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0203 .tile R36C20:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E3_H06E0003 V01N0001 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: W1_H02W0201 N3_V06S0103 arc: W3_H06W0003 N3_V06S0003 .tile R36C21:PLC2 arc: N1_V02N0001 H02E0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02W0601 arc: S1_V02S0201 E3_H06W0103 arc: W3_H06W0203 N3_V06S0203 .tile R36C22:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 N3_V06S0303 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H06W0103 arc: S1_V02S0401 V01N0001 arc: W1_H02W0601 N3_V06S0303 arc: E3_H06E0103 W3_H06E0103 .tile R36C23:PLC2 arc: E1_H02E0601 V02N0601 arc: E3_H06E0303 N3_V06S0303 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 H02E0601 arc: E1_H02E0401 W3_H06E0203 arc: W3_H06W0303 N3_V06S0303 .tile R36C24:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 V01N0101 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: V01S0000 N3_V06S0103 arc: W3_H06W0303 N3_V06S0303 .tile R36C25:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0303 N3_V06S0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: V01S0000 N3_V06S0103 arc: W1_H02W0601 V06S0303 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 N3_V06S0303 .tile R36C26:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 V01N0001 arc: H00L0000 H02W0001 arc: H00L0100 H02E0101 arc: H00R0000 H02W0601 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 V01N0001 arc: E1_H02E0301 W3_H06E0003 arc: A1 H00L0100 arc: A3 H00L0100 arc: A4 V02N0301 arc: A5 H02W0501 arc: A7 H00L0000 arc: B1 E1_H01W0100 arc: B3 H02W0101 arc: B4 H00R0000 arc: B5 H02W0301 arc: B7 H02W0101 arc: C1 W1_H02E0601 arc: C3 H02E0601 arc: C4 V00B0100 arc: C5 V00T0100 arc: C7 H02E0401 arc: D1 W1_H02E0201 arc: D3 V02N0201 arc: D4 H01W0000 arc: D5 V02N0601 arc: D7 V00B0000 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M6 N1_V01N0101 arc: N1_V01N0101 F1 arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 arc: V00B0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0111000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R36C27:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0203 N3_V06S0203 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N3_V06S0003 arc: V00B0000 V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0103 E3_H06W0103 arc: A1 H00L0100 arc: A7 E1_H02W0501 arc: B0 V02N0101 arc: B1 V02S0101 arc: B7 H02E0101 arc: C0 V02N0401 arc: C1 H00R0100 arc: C7 V00T0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00T0100 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F7 F7_SLICE arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: N1_V02N0201 Q2 arc: N3_V06N0003 F0 arc: N3_V06N0203 F7 arc: V01S0100 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0011111100000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R36C28:PLC2 arc: E1_H02E0601 V01N0001 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0601 N3_V06S0303 arc: W1_H02W0501 N1_V02S0501 arc: E3_H06E0203 W3_H06E0103 arc: A1 H00R0000 arc: A5 H02E0501 arc: B1 H02W0301 arc: B5 V02N0701 arc: C1 H00L0100 arc: C5 H02E0601 arc: D1 V02N0001 arc: D5 V02N0601 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: M4 E1_H01E0101 arc: N3_V06N0203 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000011101110111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R36C29:PLC2 arc: E1_H02E0201 V01N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 W3_H06E0303 .tile R36C2:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 E1_H02W0701 .tile R36C30:PLC2 arc: N1_V02N0401 H06E0203 arc: S1_V02S0201 N3_V06S0103 arc: E1_H02E0101 W3_H06E0103 .tile R36C31:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N3_V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 E1_H02W0101 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0103 E1_H02W0101 .tile R36C32:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 .tile R36C33:PLC2 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0401 arc: H01W0100 E3_H06W0303 arc: N1_V02N0501 E3_H06W0303 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 N1_V02S0301 arc: V00B0100 H02E0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0701 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A3 E1_H01E0001 arc: A5 N1_V01N0101 arc: A7 N1_V01N0101 arc: B0 H02E0301 arc: B1 S1_V02N0101 arc: B3 H01W0100 arc: B4 V02S0501 arc: B5 H02E0101 arc: B6 V02S0501 arc: B7 H02E0101 arc: C0 H00L0100 arc: C1 V02S0401 arc: C3 V02N0601 arc: C4 H02E0401 arc: C5 V02N0201 arc: C6 V00T0000 arc: C7 V01N0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H00R0000 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 H02E0001 arc: D6 H01W0000 arc: D7 W1_H02E0201 arc: E1_H01E0001 Q1 arc: E1_H02E0301 Q1 arc: E3_H06E0103 Q1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 F7 arc: MUXCLK0 CLK0 arc: N1_V01N0101 Q1 arc: N1_V02N0001 F0 arc: N1_V02N0101 F3 arc: N3_V06N0103 Q1 arc: N3_V06N0303 F6 arc: S1_V02S0101 F1 arc: V01S0000 F1 arc: W1_H02W0101 Q1 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0011111100000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0000000000110000 word: SLICED.K0.INIT 0011111100000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R36C34:PLC2 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 .tile R36C35:PLC2 arc: E1_H02E0401 V02N0401 arc: V00B0100 E1_H02W0701 arc: V00T0100 W1_H02E0301 arc: V01S0100 N3_V06S0303 arc: A7 V00T0100 arc: B7 V00B0100 arc: C7 V01N0101 arc: D7 V02N0601 arc: F7 F7_SLICE arc: N3_V06N0203 F7 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R36C36:PLC2 arc: N1_V02N0601 H06E0303 arc: N3_V06N0103 H06E0103 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 N3_V06S0003 .tile R36C37:PLC2 arc: E1_H02E0701 N3_V06S0203 arc: H00R0000 W1_H02E0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0701 N1_V01S0100 arc: W1_H02W0701 E1_H02W0701 arc: A3 E1_H02W0701 arc: B3 E1_H02W0101 arc: C3 V02N0401 arc: D3 H00R0000 arc: E1_H01E0101 F3 arc: F3 F3_SLICE word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R36C38:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0203 N3_V06S0203 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 N3_V06S0003 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02E0701 .tile R36C39:PLC2 arc: E3_H06E0103 V01N0101 arc: H00R0000 H02E0601 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 V01N0001 arc: V00T0000 V02S0401 arc: V01S0000 N3_V06S0103 arc: H01W0000 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: A4 H02E0701 arc: B4 H00R0000 arc: B5 S1_V02N0701 arc: C4 V02N0001 arc: C5 V00T0000 arc: CLK0 G_HPBX0000 arc: D4 V02N0401 arc: D5 H00R0100 arc: E1_H01E0101 F4 arc: E3_H06E0303 Q5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q5 arc: MUXCLK2 CLK0 arc: N3_V06N0303 Q5 arc: S1_V02S0501 F5 arc: W1_H02W0701 Q5 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 0000000000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R36C3:PLC2 arc: E1_H02E0501 N1_V01S0100 arc: N1_V02N0701 H02W0701 arc: V00T0000 V02S0601 arc: A0 H02W0501 arc: A2 H02E0501 arc: A3 E1_H01E0001 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0100 Q2 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V02N0301 Q3 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q5 arc: V00B0000 Q4 arc: V01S0000 Q6 arc: V01S0100 Q2 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R36C40:PLC2 arc: E3_H06E0303 H01E0101 arc: N1_V02N0001 N3_V06S0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 .tile R36C41:PLC2 arc: E1_H02E0401 V02S0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: S1_V02S0701 H06E0203 arc: V01S0000 N3_V06S0103 .tile R36C42:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02E0401 .tile R36C43:PLC2 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N1_V01S0100 arc: W1_H02W0301 N3_V06S0003 .tile R36C44:PLC2 arc: E1_H02E0001 V06S0003 arc: E3_H06E0103 N3_V06S0103 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 .tile R36C45:PLC2 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 .tile R36C46:PLC2 arc: E1_H02E0501 V02N0501 arc: N1_V02N0101 N3_V06S0103 arc: S1_V02S0001 N3_V06S0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 .tile R36C47:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0401 N1_V02S0401 .tile R36C48:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0601 N3_V06S0303 .tile R36C49:PLC2 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 N1_V01S0000 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02E0001 arc: V00T0100 E1_H02W0301 arc: V01S0000 N3_V06S0103 arc: A7 V00T0100 arc: B6 V00T0000 arc: B7 V00B0100 arc: C6 E1_H02W0601 arc: C7 V02N0201 arc: D6 H00R0100 arc: D7 V00B0000 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: N1_V02N0601 F6 word: SLICED.K0.INIT 0011111100000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R36C4:PLC2 arc: E1_H02E0701 E1_H01W0100 arc: N3_V06N0203 E3_H06W0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 E3_H06W0203 arc: A0 H00L0000 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q3 arc: H00R0000 Q6 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q0 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q6 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q7 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0000 Q4 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R36C50:PLC2 arc: E1_H02E0701 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 N3_V06S0003 arc: V01S0100 N3_V06S0303 .tile R36C51:PLC2 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 .tile R36C52:PLC2 arc: E1_H02E0701 V02S0701 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0701 W1_H02E0701 arc: W1_H02W0401 N3_V06S0203 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 .tile R36C53:PLC2 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 .tile R36C54:PLC2 arc: H00L0000 V02N0001 arc: H00R0000 W1_H02E0601 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 V02N0301 arc: W3_H06W0103 E3_H06W0103 arc: A0 V02N0701 arc: A1 H02W0701 arc: B0 F1 arc: B1 V02S0101 arc: C0 V02N0601 arc: C1 H00L0000 arc: D0 H00R0000 arc: D1 V00B0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: N3_V06N0003 F0 word: SLICEA.K0.INIT 0100110000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R36C55:PLC2 arc: N1_V02N0501 N3_V06S0303 arc: N3_V06N0103 H06W0103 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 V01N0101 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0303 .tile R36C56:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0003 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: W3_H06W0003 E3_H06W0303 .tile R36C57:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0701 N3_V06S0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: V01S0100 N3_V06S0303 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 .tile R36C58:PLC2 arc: E1_H02E0201 V06S0103 arc: H00L0000 V02N0001 arc: H00R0000 V02N0401 arc: N1_V01N0101 N3_V06S0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 H02E0701 arc: V00T0100 V02N0501 arc: W1_H02W0601 V02S0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A1 H02E0501 arc: A3 V02S0501 arc: B1 S1_V02N0301 arc: B3 H00R0000 arc: C1 V02N0601 arc: C3 H00L0000 arc: D1 F2 arc: D3 V00T0100 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: M2 E1_H02W0601 arc: W3_H06W0103 F1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000011001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000011101110111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R36C59:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0601 W1_H02E0301 arc: H00L0100 W1_H02E0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 N3_V06S0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 H06E0003 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 N3_V06S0003 arc: A3 H00L0100 arc: A4 F5 arc: A5 V00B0000 arc: A6 F7 arc: A7 H00R0000 arc: B3 V02N0301 arc: B4 H02W0101 arc: B5 H02W0301 arc: B6 E1_H02W0101 arc: B7 V00B0100 arc: C3 V02N0601 arc: C4 V02N0001 arc: C5 V00T0000 arc: C6 W1_H02E0401 arc: C7 V00T0000 arc: D3 H02E0201 arc: D4 H00R0100 arc: D5 H01W0000 arc: D6 N1_V02S0601 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000100010001000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000100010001000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R36C5:PLC2 arc: N1_V02N0601 N3_V06S0303 arc: V00T0000 V02S0601 arc: A0 H00L0000 arc: A1 H02E0701 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0100 Q1 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q0 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: N1_V02N0401 Q6 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q5 arc: V00B0000 Q4 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R36C60:PLC2 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02N0401 arc: H00R0100 H02W0701 arc: S1_V02S0201 H02W0201 arc: V00B0000 H02E0601 arc: V00B0100 H02W0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0601 H01E0001 arc: A1 V02N0501 arc: A3 V00B0000 arc: A5 V00B0000 arc: A7 E1_H02W0701 arc: B1 H00R0100 arc: B3 V01N0001 arc: B5 H00R0000 arc: B7 V00B0100 arc: C1 V02N0601 arc: C3 H00L0100 arc: C5 E1_H02W0601 arc: C7 V02N0201 arc: D1 H02W0001 arc: D3 H02W0001 arc: D5 H02W0001 arc: D7 E1_H02W0001 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 arc: V00T0100 F3 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R36C61:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 E1_H02W0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H06E0203 arc: V00B0100 E1_H02W0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V06S0103 arc: W1_H02W0701 N3_V06S0203 arc: A7 H00L0000 arc: B7 V02N0701 arc: C7 V02N0001 arc: D7 V02N0601 arc: F6 F5D_SLICE arc: M6 V00B0100 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R36C62:PLC2 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02W0001 arc: H00R0000 H02E0401 arc: S1_V02S0101 H02E0101 arc: S1_V02S0601 H02W0601 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H01W0100 arc: A1 H00L0000 arc: A3 V00T0000 arc: A5 V00T0000 arc: A7 H02W0501 arc: B1 V01N0001 arc: B3 V02N0101 arc: B5 V02N0701 arc: B7 E1_H02W0101 arc: C1 V02N0401 arc: C3 H02E0601 arc: C5 V00B0100 arc: C7 E1_H02W0401 arc: D1 H00R0000 arc: D3 H02E0001 arc: D5 V00B0000 arc: D7 V00B0000 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F5 arc: M6 V00T0100 arc: V00T0100 F3 arc: W1_H02W0101 F1 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000011101110111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000011101110111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000011101110111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R36C63:PLC2 arc: H00L0000 V02N0201 arc: H00R0100 W1_H02E0701 arc: V00B0100 W1_H02E0701 arc: V00T0000 E1_H02W0201 arc: W1_H02W0601 V06S0303 arc: H01W0100 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: A1 H02E0701 arc: A5 H02E0701 arc: B1 V00T0000 arc: B5 E1_H02W0301 arc: C1 H00L0000 arc: C5 V02N0001 arc: D1 V00B0100 arc: D5 H00R0100 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R36C64:PLC2 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: E3_H06E0103 W3_H06E0003 .tile R36C65:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E3_H06E0103 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V01N0101 arc: W3_H06W0103 E1_H02W0201 .tile R36C66:PLC2 arc: S1_V02S0101 H02E0101 .tile R36C67:PLC2 arc: W1_H02W0201 V02N0201 .tile R36C68:PLC2 arc: S1_V02S0201 H06E0103 .tile R36C69:PLC2 arc: S3_V06S0003 N3_V06S0003 .tile R36C6:PLC2 arc: N1_V02N0301 N3_V06S0003 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R36C70:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 .tile R36C7:PLC2 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0203 H06W0203 .tile R36C8:PLC2 arc: E1_H02E0201 S1_V02N0201 .tile R38C14:PLC2 arc: N1_V02N0201 N1_V01S0000 .tile R38C15:PLC2 arc: N1_V02N0501 H02W0501 .tile R38C16:PLC2 arc: W1_H02W0501 N3_V06S0303 .tile R38C18:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 .tile R38C20:PLC2 arc: N1_V02N0201 W1_H02E0201 .tile R38C21:PLC2 arc: E1_H02E0201 N3_V06S0103 .tile R38C22:PLC2 arc: N1_V02N0201 H02E0201 .tile R38C23:PLC2 arc: N1_V02N0101 N3_V06S0103 .tile R38C26:PLC2 arc: E3_H06E0003 N3_V06S0003 arc: N1_V01N0001 N3_V06S0003 .tile R38C28:PLC2 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 .tile R38C29:PLC2 arc: N1_V02N0001 H06E0003 .tile R38C2:PLC2 arc: S3_V06S0303 N3_V06S0203 .tile R38C30:PLC2 arc: N1_V02N0101 N3_V06S0103 .tile R38C32:PLC2 arc: E1_H02E0701 V06S0203 .tile R38C33:PLC2 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0701 H02E0701 .tile R38C35:PLC2 arc: N1_V02N0501 N1_V01S0100 .tile R38C39:PLC2 arc: N1_V02N0701 N3_V06S0203 .tile R38C41:PLC2 arc: N1_V02N0701 N3_V06S0203 .tile R38C42:PLC2 arc: N1_V02N0101 V01N0101 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 H02W0701 .tile R38C43:PLC2 arc: W1_H02W0701 E1_H02W0601 .tile R38C44:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 .tile R38C45:PLC2 arc: E3_H06E0003 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: V01S0100 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 .tile R38C46:PLC2 arc: N1_V02N0001 H06W0003 .tile R38C47:PLC2 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 .tile R38C48:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: N1_V02N0001 H06E0003 .tile R38C49:PLC2 arc: N1_V02N0501 H02E0501 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 N3_V06S0003 .tile R38C50:PLC2 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0401 N1_V01S0000 .tile R38C51:PLC2 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 N3_V06S0203 .tile R38C53:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0203 N1_V01S0000 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N1_V01S0000 .tile R38C54:PLC2 arc: E3_H06E0203 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: V01S0100 N3_V06S0303 .tile R38C55:PLC2 arc: N1_V02N0201 N3_V06S0103 .tile R38C56:PLC2 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06E0203 .tile R38C57:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0701 H06E0203 arc: W1_H02W0301 N3_V06S0003 .tile R38C58:PLC2 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H02W0501 arc: W1_H02W0101 V02S0101 .tile R38C59:PLC2 arc: W1_H02W0501 V06S0303 .tile R38C60:PLC2 arc: N1_V02N0101 N3_V06S0103 .tile R38C62:PLC2 arc: N1_V02N0201 H02W0201 .tile R38C63:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: N1_V02N0601 N1_V01S0000 arc: W1_H02W0201 N3_V06S0103 .tile R38C65:PLC2 arc: N1_V02N0201 W1_H02E0201 .tile R38C66:PLC2 arc: N1_V02N0701 N3_V06S0203 .tile R38C69:PLC2 arc: S3_V06S0103 N3_V06S0003 .tile R38C70:PLC2 arc: S1_V02S0301 N1_V02S0201 .tile R38C8:PLC2 arc: N1_V02N0201 S3_V06N0103 .tile R39C13:PLC2 arc: N1_V02N0401 N3_V06S0203 .tile R39C14:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 .tile R39C16:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 N3_V06S0303 .tile R39C17:PLC2 arc: E1_H02E0201 V06S0103 .tile R39C18:PLC2 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 N3_V06S0303 .tile R39C19:PLC2 arc: N1_V02N0201 W1_H02E0201 .tile R39C22:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 N3_V06S0303 .tile R39C25:PLC2 arc: E1_H02E0601 N3_V06S0303 .tile R39C26:PLC2 arc: E3_H06E0303 N3_V06S0303 .tile R39C27:PLC2 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 W1_H02E0601 .tile R39C28:PLC2 arc: N1_V02N0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 .tile R39C29:PLC2 arc: N1_V02N0601 H06E0303 .tile R39C2:PLC2 arc: S1_V02S0701 N3_V06S0203 .tile R39C32:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R39C35:PLC2 arc: N1_V02N0401 N3_V06S0203 .tile R39C39:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0601 N3_V06S0303 .tile R39C41:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R39C42:PLC2 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 N3_V06S0303 .tile R39C43:PLC2 arc: W1_H02W0301 N3_V06S0003 .tile R39C44:PLC2 arc: E3_H06E0303 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 .tile R39C45:PLC2 arc: N1_V02N0701 N1_V01S0100 .tile R39C49:PLC2 arc: N1_V02N0101 N3_V06S0103 .tile R39C50:PLC2 arc: N1_V02N0601 W3_H06E0303 .tile R39C51:PLC2 arc: N1_V02N0001 N3_V06S0003 .tile R39C53:PLC2 arc: N1_V02N0001 N3_V06S0003 .tile R39C54:PLC2 arc: N1_V02N0301 N1_V01S0100 .tile R39C58:PLC2 arc: N1_V02N0101 V01N0101 .tile R39C59:PLC2 arc: N1_V02N0401 N3_V06S0203 .tile R39C61:PLC2 arc: E1_H02E0701 N3_V06S0203 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 N3_V06S0203 .tile R39C62:PLC2 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H02E0701 .tile R39C63:PLC2 arc: E3_H06E0303 N3_V06S0303 .tile R39C64:PLC2 arc: E3_H06E0303 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 .tile R39C65:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R39C66:PLC2 arc: N1_V02N0501 H06E0303 .tile R39C67:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0601 H06E0303 .tile R3C10:PLC2 arc: E1_H02E0201 V02N0201 arc: E3_H06E0303 V06N0303 arc: V00B0000 V02N0201 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0103 S3_V06N0103 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: M0 H02W0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00B0100 F5 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R3C11:PLC2 arc: S1_V02S0501 N1_V01S0100 arc: V00B0000 S1_V02N0001 arc: W1_H02W0601 V01N0001 arc: CLK0 G_HPBX0000 arc: D3 H02E0201 arc: D5 H02E0201 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: LSR0 V00T0100 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0701 F5 arc: V00T0100 F3 arc: V01S0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R3C12:PLC2 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V01S0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0201 arc: D5 W1_H02E0201 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: V00B0100 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R3C13:PLC2 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02S0001 arc: V00T0000 V02N0601 arc: W1_H02W0401 V02N0401 arc: CLK0 G_HPBX0000 arc: D3 V02S0001 arc: D7 V00B0000 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S1_V02S0301 F3 arc: V00B0100 F7 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R3C14:PLC2 arc: E1_H02E0401 V01N0001 arc: H00R0000 E1_H02W0401 arc: H00R0100 E1_H02W0701 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D7 H00R0100 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR1 V00B0100 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00B0100 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R3C15:PLC2 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 S3_V06N0303 arc: S3_V06S0103 H06E0103 arc: V00B0100 H02W0701 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: F1 F1_SLICE arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00T0100 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R3C16:PLC2 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 V06N0303 arc: E1_H02E0701 V06N0203 arc: H00R0000 V02N0401 arc: V00B0100 V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00T0100 F1 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R3C17:PLC2 arc: H00R0100 V02S0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H02E0501 arc: S1_V02S0701 H02E0701 arc: A6 N1_V01N0101 arc: B1 V02S0101 arc: B2 E1_H01W0100 arc: B5 E1_H02W0101 arc: B6 V01S0000 arc: B7 N1_V01S0000 arc: C1 E1_H01W0000 arc: C2 H00R0100 arc: C3 E1_H02W0401 arc: C5 N1_V02S0201 arc: C6 V00T0000 arc: C7 E1_H02W0601 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0201 arc: D5 S1_V02N0601 arc: D6 H02W0001 arc: D7 S1_V02N0401 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F6 arc: E1_H02E0101 F3 arc: E1_H02E0201 Q2 arc: E1_H02E0501 Q5 arc: E1_H02E0701 Q7 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q7 arc: N1_V02N0101 Q1 arc: N1_V02N0701 Q5 arc: S3_V06S0303 Q5 arc: V00T0000 Q2 arc: V01S0000 Q1 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R3C18:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0101 H01E0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H01E0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 E1_H01W0000 arc: S3_V06S0203 W3_H06E0203 arc: A0 H02W0701 arc: A2 H02E0701 arc: A3 H01E0001 arc: A4 E1_H01W0000 arc: A5 V00T0000 arc: A6 H02E0501 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 F3 arc: H01W0100 F5 arc: V01S0100 F4 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 1111000000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R3C19:PLC2 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02N0701 arc: B3 V02N0301 arc: B5 S1_V02N0701 arc: C3 V02S0401 arc: C4 H02E0401 arc: C5 H02E0401 arc: CE1 W1_H02E0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D4 V00B0000 arc: D5 V02S0601 arc: E3_H06E0303 Q5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 F4 arc: H01W0000 Q3 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: W1_H02W0301 Q3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111111111110000 word: SLICEC.K1.INIT 0000111100001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C20:PLC2 arc: H00L0100 V02N0301 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 V02S0001 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: B1 E1_H02W0301 arc: C1 V02S0601 arc: CE0 S1_V02N0201 arc: CE1 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H02E0301 Q1 arc: F1 F1_SLICE arc: H01W0000 Q6 arc: H01W0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M2 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0201 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R3C21:PLC2 arc: H00L0100 V02S0101 arc: H00R0100 S1_V02N0701 arc: N1_V02N0301 H02E0301 arc: V00B0100 H02W0701 arc: V00T0100 V02S0501 arc: B1 E1_H01W0100 arc: B3 H02W0101 arc: B5 V00B0100 arc: B7 E1_H02W0301 arc: C1 N1_V01S0100 arc: C3 H00L0100 arc: C5 V00T0100 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D3 V02N0001 arc: D5 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q5 arc: E1_H02E0101 Q1 arc: E1_H02E0301 Q3 arc: E1_H02E0501 Q7 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: N1_V02N0101 Q1 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q7 arc: S1_V02S0701 Q7 arc: V01S0000 Q5 arc: V01S0100 Q3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R3C22:PLC2 arc: E1_H02E0501 V02N0501 arc: H00R0100 H02E0501 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 V02N0501 arc: E1_H01E0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: A0 E1_H01E0001 arc: B2 H00R0100 arc: B3 H02E0301 arc: B4 H02E0101 arc: B5 H01E0101 arc: B6 W1_H02E0301 arc: E1_H01E0101 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0100 F4 arc: V01S0100 F6 arc: W1_H02W0101 F3 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C23:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 S3_V06N0303 arc: H00R0100 V02S0701 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 E1_H01W0100 arc: V00B0100 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0201 Q2 arc: E3_H06E0103 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M2 H02W0601 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: S1_V02S0201 Q2 arc: V01S0100 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C24:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 V01N0101 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 V02N0601 arc: H00R0100 H02E0701 arc: S1_V02S0401 V01N0001 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 H02E0001 arc: W1_H02W0601 E1_H02W0601 arc: A2 H02W0501 arc: A3 V02N0501 arc: A7 V02N0101 arc: B2 V02S0101 arc: B3 H00R0000 arc: B7 H02W0101 arc: C2 H00L0100 arc: C3 V02S0401 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 V02S0001 arc: D7 V02S0401 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F2 arc: E3_H06E0203 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H00L0100 F3 arc: H01W0100 Q0 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0000 arc: M4 V00B0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q0 arc: S1_V02S0601 Q4 arc: V01S0100 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1001000000000000 word: SLICEB.K1.INIT 1100010000110001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000001011000011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R3C25:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: H00R0000 H02E0401 arc: N1_V02N0401 H02E0401 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: A0 V02N0701 arc: A2 H02E0501 arc: A3 V02S0501 arc: A4 V02N0101 arc: A5 V00B0000 arc: A6 H00R0000 arc: A7 V02N0301 arc: E1_H02E0201 F2 arc: E1_H02E0601 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0401 F4 arc: S1_V02S0701 F7 arc: S3_V06S0303 F5 arc: V01S0100 F3 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C26:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 H02E0001 arc: H00R0000 V02S0601 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 N1_V01S0000 arc: V00B0000 H02E0401 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02E0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 S1_V02N0601 arc: A0 H00R0000 arc: A1 W1_H02E0701 arc: A2 V00T0000 arc: A3 V02S0501 arc: A4 V00B0000 arc: A5 V00T0100 arc: A6 V02N0101 arc: A7 H00L0000 arc: E1_H01E0001 F6 arc: E1_H02E0401 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: S1_V02S0001 F0 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V01S0000 F3 arc: V01S0100 F2 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C27:PLC2 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 V02S0701 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 H01E0001 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 H02E0401 arc: V00T0000 W1_H02E0201 arc: W1_H02W0401 V01N0001 arc: A0 W1_H02E0501 arc: A5 N1_V01N0101 arc: A7 N1_V01N0101 arc: B5 H00R0000 arc: B7 H02E0301 arc: C4 V02N0201 arc: C5 V00T0000 arc: C6 V02N0001 arc: C7 V02S0201 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0100 Q6 arc: LSR0 H02W0301 arc: LSR1 H02W0501 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: S1_V02S0201 F0 arc: S1_V02S0401 Q4 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: V01S0000 F1 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 1000010000100001 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C28:PLC2 arc: E1_H02E0001 V06N0003 arc: H00L0100 V02S0301 arc: S1_V02S0501 H01E0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 V06N0303 arc: E3_H06E0003 W3_H06E0003 arc: A0 V02N0501 arc: A2 H00L0100 arc: A3 H02E0701 arc: A4 V02S0101 arc: A5 H02E0501 arc: A6 N1_V01S0100 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0100 F3 arc: N1_V01N0001 F5 arc: N1_V02N0001 F2 arc: N1_V02N0601 F6 arc: V01S0100 F4 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C29:PLC2 arc: V00T0000 V02S0601 arc: E3_H06E0303 W3_H06E0303 arc: B7 N1_V01S0000 arc: C6 V00B0100 arc: C7 V00T0000 arc: D6 H02E0001 arc: D7 V02S0401 arc: E1_H01E0101 F6 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V02N0401 F6 arc: S3_V06S0203 F7 arc: V00B0100 F7 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1111110011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C2:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0201 V01N0001 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0701 arc: A7 H00R0000 arc: B7 S1_V02N0501 arc: C7 V00T0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: E1_H02E0701 F7 arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR0 V00B0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R3C30:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: E3_H06E0303 W3_H06E0303 .tile R3C31:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 V01N0001 arc: H00R0100 H02E0701 arc: S1_V02S0201 H02W0201 arc: V00B0000 S1_V02N0001 arc: E3_H06E0103 W3_H06E0003 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: M0 V00B0000 arc: MUXCLK0 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C32:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 S1_V02N0401 arc: H00L0100 V02S0101 arc: H00R0100 V02N0501 arc: S1_V02S0401 E1_H02W0401 arc: V00B0100 S1_V02N0301 arc: W1_H02W0201 E1_H02W0201 arc: A0 H00L0100 arc: B0 H02W0101 arc: C0 V02N0601 arc: D0 V00B0100 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M1 H02E0001 arc: M2 E1_H02W0601 arc: M3 H00R0100 arc: M4 E1_H02W0401 arc: M5 H02E0001 arc: M6 E1_H02W0401 word: SLICEA.K0.INIT 1000110010101111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R3C33:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 N1_V01S0000 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02N0401 arc: N1_V02N0001 S1_V02N0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0601 H02W0601 arc: V00B0000 H02W0601 arc: V00T0100 H02E0101 arc: W1_H02W0101 E1_H02W0101 arc: A0 H00L0100 arc: B0 V00B0000 arc: C0 S1_V02N0401 arc: D0 W1_H02E0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 arc: S3_V06S0003 F3 word: SLICEA.K0.INIT 1000110010101111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R3C34:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 S1_V02N0301 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 H02W0601 arc: V00T0100 V02N0701 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: E3_H06E0003 W3_H06E0003 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: B1 V00B0000 arc: B2 E1_H02W0301 arc: C1 V02S0601 arc: C2 V02S0601 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 V02N0201 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: M0 H02E0601 arc: M1 V01S0100 arc: M2 H02E0601 arc: M4 V00T0100 arc: M6 W1_H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F1 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000101011001111 word: SLICEB.K0.INIT 1000101011001111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C35:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V01N0001 arc: E1_H02E0601 V06N0303 arc: H00R0000 V02N0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0401 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 E1_H02W0401 arc: V00B0100 N1_V02S0301 arc: V00T0100 H02E0301 arc: W1_H02W0101 E3_H06W0103 arc: E3_H06E0303 W3_H06E0303 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: C1 H02W0601 arc: C2 H02W0601 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 V02N0001 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 F1 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: W1_H02W0601 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111010100110001 word: SLICEB.K0.INIT 1111010100110001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C36:PLC2 arc: E1_H02E0301 V06N0003 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02E0101 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0501 E1_H01W0100 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 E1_H02W0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: A0 H00L0100 arc: B0 V00T0000 arc: C0 H00L0000 arc: D0 H02W0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 H00R0000 arc: M6 V00B0100 arc: S1_V02S0101 F3 arc: V01S0100 F3 word: SLICEA.K0.INIT 1000110010101111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C37:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 V02N0601 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0101 W1_H02E0101 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0401 E1_H02W0101 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: A1 V02S0701 arc: A2 V02S0701 arc: A3 V02S0701 arc: B1 V02S0101 arc: B2 V02S0101 arc: B3 V02S0101 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: D1 N1_V01S0000 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0100 F3 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 arc: S3_V06S0003 F3 word: SLICEB.K0.INIT 0001000000000000 word: SLICEB.K1.INIT 0001000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0001000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R3C38:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 W1_H02E0601 arc: H00L0100 V02N0101 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H01W0100 arc: S1_V02S0401 E1_H02W0401 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02E0301 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0601 S3_V06N0303 arc: A1 E1_H01E0001 arc: A2 V00B0000 arc: B1 H01W0100 arc: B2 H00R0000 arc: C1 H02E0601 arc: C2 H02E0601 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D2 H02W0201 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H00R0000 Q6 arc: H01W0100 Q6 arc: M0 H02W0601 arc: M1 H00L0100 arc: M2 H02W0601 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q4 arc: V01S0000 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001011110011 word: SLICEB.K0.INIT 1010001011110011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C39:PLC2 arc: E1_H02E0601 N1_V01S0000 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0201 S1_V02N0201 arc: S1_V02S0401 H02W0401 arc: V00B0000 S1_V02N0201 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0601 V02S0601 arc: A1 H01E0001 arc: A2 H01E0001 arc: B1 W1_H02E0101 arc: B2 W1_H02E0101 arc: C1 V02N0401 arc: C2 V02N0401 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D2 V02S0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: H01W0100 F1 arc: M0 V00B0000 arc: M1 V01S0100 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111001101010001 word: SLICEB.K0.INIT 1111001101010001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C3:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 W1_H02E0101 arc: H00L0000 H02E0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0601 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: A5 E1_H01W0000 arc: A6 H02E0701 arc: A7 N1_V01N0101 arc: B1 H01W0100 arc: B5 H02W0301 arc: B6 V02S0501 arc: B7 V00B0000 arc: C1 H00L0000 arc: C5 V02N0201 arc: C6 E1_H01E0101 arc: C7 V02N0001 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H00R0000 arc: D5 V02N0601 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0101 F7 arc: E3_H06E0003 Q0 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0100 Q2 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: V01S0000 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 .tile R3C40:PLC2 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02S0201 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0701 V02S0701 arc: E3_H06E0103 W3_H06E0003 arc: A1 V02S0501 arc: A2 V00B0000 arc: B1 V02S0301 arc: B2 V02S0301 arc: C1 V02S0401 arc: C2 V02S0401 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00T0000 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: V00B0000 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001011110011 word: SLICEB.K0.INIT 1010001011110011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C41:PLC2 arc: H00R0000 V02S0401 arc: N1_V02N0601 S1_V02N0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 V02N0401 arc: E3_H06E0003 W3_H06E0303 arc: A3 H01E0001 arc: A5 H02E0701 arc: B3 V02S0101 arc: B5 H01E0101 arc: C3 W1_H02E0601 arc: C5 V02N0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D5 V02N0601 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: H01W0100 Q6 arc: M0 H02E0601 arc: M1 E1_H02W0001 arc: M2 H02E0601 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: S1_V02S0301 F1 arc: S3_V06S0103 F1 arc: V00B0100 F5 arc: V01S0100 F1 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000010000100001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 0111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R3C42:PLC2 arc: S1_V02S0701 H01E0101 arc: E1_H01E0001 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 .tile R3C43:PLC2 arc: E3_H06E0003 H01E0001 arc: W1_H02W0001 W3_H06E0003 arc: A0 V02N0501 arc: A2 V00T0000 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: LSR1 H02W0301 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: N1_V02N0701 Q5 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0000 Q4 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C44:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0501 V01N0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 H06E0003 arc: V00T0100 V02N0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V01N0101 arc: A0 H00L0000 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 Q5 arc: A6 V02N0301 arc: A7 Q7 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q3 arc: LSR0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q1 arc: N1_V02N0201 Q2 arc: N1_V02N0301 Q3 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q7 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0100 Q6 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C45:PLC2 arc: S1_V02S0701 S3_V06N0203 arc: A0 E1_H01E0001 arc: A1 H00L0100 arc: A2 V00T0000 arc: A3 V02S0701 arc: A4 V00B0000 arc: A5 Q5 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H01W0000 Q1 arc: LSR0 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: N1_V02N0401 Q4 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0000 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C46:PLC2 arc: E1_H02E0301 V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 S3_V06N0303 arc: V00B0100 E1_H02W0701 arc: E3_H06E0203 W3_H06E0103 arc: CLK0 G_HPBX0000 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C47:PLC2 arc: E3_H06E0103 V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 S3_V06N0203 .tile R3C48:PLC2 arc: H00L0000 V02N0201 arc: H00R0000 E1_H02W0401 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 E1_H02W0601 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 H02W0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0501 V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C49:PLC2 arc: E1_H02E0301 H01E0101 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: W1_H02W0301 W3_H06E0003 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: LSR0 V00B0100 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S3_V06S0003 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C4:PLC2 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 V02N0501 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0701 arc: V00B0000 H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 S3_V06N0303 arc: A3 V00T0000 arc: B1 V02N0101 arc: B3 N1_V02S0101 arc: B7 V02S0701 arc: C1 H00L0000 arc: C3 E1_H02W0401 arc: C7 V02N0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00B0100 arc: D3 H02E0201 arc: D6 H00L0100 arc: D7 V02N0601 arc: E1_H02E0201 Q0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 F3 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M4 H02E0401 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0601 Q6 arc: S3_V06S0003 Q0 arc: S3_V06S0303 Q6 arc: V01S0100 Q4 arc: W1_H02W0001 Q0 arc: W1_H02W0401 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 .tile R3C50:PLC2 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0100 V02S0501 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S3_V06N0303 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: LSR0 H02E0301 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R3C51:PLC2 arc: S1_V02S0101 E1_H02W0101 arc: V01S0100 S3_V06N0303 .tile R3C52:PLC2 arc: S1_V02S0001 V01N0001 arc: W1_H02W0101 V01N0101 arc: E3_H06E0303 W3_H06E0203 .tile R3C53:PLC2 arc: W1_H02W0101 W3_H06E0103 .tile R3C58:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R3C5:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: H00L0000 V02S0201 arc: H00L0100 V02N0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 E1_H02W0701 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0601 arc: B3 H00L0000 arc: C3 V02N0601 arc: CE0 E1_H02W0101 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 N1_V01S0000 arc: D3 H00R0000 arc: E1_H02E0601 Q4 arc: F2 F5B_SLICE arc: LSR0 H02E0301 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q0 arc: V01S0000 Q6 arc: W1_H02W0201 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R3C64:PLC2 arc: E3_H06E0103 W3_H06E0003 .tile R3C6:PLC2 arc: H00L0000 V02S0201 arc: H00R0000 H02E0601 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 W1_H02E0201 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 V06N0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: A1 V02N0701 arc: A3 V02N0501 arc: A5 N1_V01S0100 arc: A7 H00R0000 arc: B0 V02S0301 arc: B1 E1_H02W0301 arc: B2 V02N0101 arc: B3 E1_H02W0101 arc: B5 H00L0000 arc: B7 V00T0000 arc: C0 E1_H01W0000 arc: C1 H00R0100 arc: C2 N1_V01N0001 arc: C3 V02N0401 arc: C5 E1_H02W0401 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 S1_V02N0001 arc: D5 V02S0601 arc: D7 V00B0000 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F5 arc: V00T0100 F3 arc: V01S0100 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0011111111111111 word: SLICEB.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 0011111111111111 word: SLICEA.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R3C70:PLC2 arc: E1_H02E0201 W3_H06E0103 .tile R3C7:PLC2 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0601 arc: S1_V02S0101 H06W0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 H02W0001 arc: V00T0100 V02S0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: A5 N1_V01S0100 arc: A7 H00L0000 arc: B1 V00T0000 arc: B5 E1_H02W0101 arc: B7 N1_V01S0000 arc: C1 V02N0401 arc: C5 H02W0401 arc: C7 V02S0201 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H00R0000 arc: D5 E1_H02W0001 arc: D7 V02S0601 arc: E1_H01E0001 Q0 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: S1_V02S0201 Q0 arc: V01S0100 Q2 arc: W1_H02W0501 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 .tile R3C8:PLC2 arc: H00L0100 H02W0101 arc: H00R0000 V02N0601 arc: H00R0100 H02W0701 arc: N1_V02N0401 H01E0001 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: V00B0000 H02E0601 arc: V00B0100 V02S0301 arc: V00T0100 V02N0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02N0701 arc: A3 V00T0000 arc: B3 H01W0100 arc: B5 V01S0000 arc: C3 H02W0601 arc: C5 V02N0201 arc: CE0 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 H00R0000 arc: D4 H00L0100 arc: D5 V00B0000 arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0100 Q6 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0601 Q4 arc: S3_V06S0203 Q4 arc: V00T0000 Q0 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0001 Q0 arc: W1_H02W0301 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R3C9:PLC2 arc: V00B0100 V02N0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 S3_V06N0203 arc: S1_V02S0001 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: CLK0 G_HPBX0000 arc: D3 H02W0201 arc: E3_H06E0203 Q4 arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: V00T0100 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R40C3:PLC2 arc: W1_H02W0701 N3_V06S0203 .tile R40C47:PLC2 arc: N1_V02N0401 N3_V06S0203 .tile R40C58:PLC2 arc: N1_V01N0101 N3_V06S0203 .tile R40C69:PLC2 arc: S3_V06S0303 N3_V06S0203 .tile R40C70:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N3_V06S0303 arc: S1_V02S0001 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 .tile R41C2:PLC2 arc: W1_H02W0701 N1_V02S0701 .tile R41C3:PLC2 arc: S3_V06S0103 N3_V06S0103 .tile R41C70:PLC2 arc: E1_H02E0001 V02S0001 .tile R42C69:PLC2 arc: E1_H02E0301 N3_V06S0003 .tile R42C70:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: S1_V02S0101 N3_V06S0103 .tile R43C2:PLC2 arc: E3_H06E0103 S3_V06N0103 .tile R43C69:PLC2 arc: E1_H02E0201 V02N0201 .tile R43C70:PLC2 arc: E1_H02E0701 V06S0203 .tile R43C8:PLC2 arc: S1_V02S0201 W3_H06E0103 .tile R44C2:PLC2 arc: W1_H02W0501 N3_V06S0303 .tile R44C69:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: N1_V02N0201 N3_V06S0103 .tile R44C70:PLC2 arc: E1_H02E0101 N1_V02S0101 .tile R44C8:PLC2 arc: D1 V02S0201 arc: F1 F1_SLICE arc: N3_V06N0103 F1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R46C69:PLC2 arc: N1_V02N0501 N3_V06S0303 .tile R47C3:PLC2 arc: S1_V02S0101 N3_V06S0103 .tile R4C10:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 H01E0101 arc: H00R0000 H02E0601 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0301 H06W0003 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0303 S3_V06N0303 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q0 arc: E1_H02E0201 Q2 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q0 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R4C11:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 V02N0401 arc: N1_V02N0601 H02W0601 arc: V00B0000 V02N0201 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0203 S3_V06N0203 arc: A0 V02N0501 arc: A2 W1_H02E0501 arc: A3 H01E0001 arc: A4 V00T0000 arc: A5 V00B0000 arc: A6 H02E0701 arc: A7 H00R0000 arc: B2 H00L0000 arc: B3 V02N0301 arc: B4 V02S0501 arc: B5 H02E0301 arc: B6 N1_V01S0000 arc: B7 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F5 arc: N1_V02N0401 F4 arc: S3_V06S0003 F3 arc: V01S0000 F6 arc: V01S0100 F7 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C12:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 V02N0701 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0101 arc: H00R0000 N1_V02S0601 arc: S1_V02S0201 V01N0001 arc: S1_V02S0601 H06E0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 E1_H01W0000 arc: W3_H06W0003 S3_V06N0003 arc: A0 E1_H02W0501 arc: A1 H02E0501 arc: A2 V00B0000 arc: A3 H00L0100 arc: A4 V02N0301 arc: A5 V00T0000 arc: A6 W1_H02E0501 arc: A7 V00T0100 arc: B0 H01W0100 arc: B1 N1_V02S0101 arc: B2 H00L0000 arc: B3 S1_V02N0301 arc: B4 H00R0000 arc: B5 S1_V02N0501 arc: B6 V00B0100 arc: B7 V02S0501 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0401 F4 arc: N1_V02N0701 F7 arc: S1_V02S0101 F3 arc: S3_V06S0303 F5 arc: V01S0000 F2 arc: W1_H02W0601 F6 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R4C13:PLC2 arc: H00L0000 V02N0001 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0401 H01E0001 arc: S1_V02S0001 H06E0003 arc: S1_V02S0701 H02W0701 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0201 arc: W1_H02W0101 V01N0101 arc: W1_H02W0501 V02S0501 arc: W3_H06W0303 S3_V06N0303 arc: A0 H02E0701 arc: A1 W1_H02E0701 arc: A2 E1_H02W0701 arc: A3 V00T0000 arc: A4 V02N0301 arc: A5 S1_V02N0101 arc: A6 H00L0000 arc: A7 H02E0501 arc: B0 H01W0100 arc: B1 V02S0101 arc: B2 H00R0000 arc: B3 H00R0100 arc: B4 V02S0701 arc: B5 N1_V02S0701 arc: B6 N1_V01S0000 arc: B7 V00B0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F4 arc: E1_H02E0501 F5 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0301 F1 arc: N1_V02N0601 F6 arc: W1_H02W0001 F2 arc: W3_H06W0003 F3 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C14:PLC2 arc: E1_H02E0101 V01N0101 arc: H00L0000 E1_H02W0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 H02E0501 arc: S1_V02S0401 E1_H01W0000 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0601 arc: W1_H02W0501 E1_H02W0401 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0203 S3_V06N0203 arc: A0 V02N0701 arc: A1 H00L0100 arc: A2 V00B0000 arc: A3 S1_V02N0501 arc: A4 V02N0301 arc: A5 E1_H02W0701 arc: A6 H00R0000 arc: A7 V02N0101 arc: B0 H01W0100 arc: B1 E1_H02W0301 arc: B2 H00R0100 arc: B3 E1_H02W0101 arc: B4 V02S0501 arc: B5 H00L0000 arc: B6 V00B0100 arc: B7 V00T0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F3 arc: E1_H02E0301 F1 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F6 arc: N1_V02N0601 F4 arc: S3_V06S0103 F2 arc: W1_H02W0701 F7 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C15:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E1_H02W0701 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: E3_H06E0303 W3_H06E0203 arc: A0 H00R0000 arc: A1 H00L0100 arc: B0 V00T0000 arc: B1 H02E0101 arc: CLK0 G_HPBX0000 arc: D7 S1_V02N0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00B0100 F7 arc: V00T0000 Q0 arc: V01S0000 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C16:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 S1_V02N0601 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0601 H02W0601 arc: V00B0100 W1_H02E0701 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0701 V02N0701 arc: W1_H02W0401 W3_H06E0203 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D5 S1_V02N0601 arc: E1_H02E0501 F5 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: LSR1 V00T0100 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00T0100 F1 arc: W1_H02W0001 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R4C17:PLC2 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0601 arc: A0 V02S0701 arc: A1 H02W0501 arc: A2 V00B0000 arc: A3 V00B0000 arc: B0 H00R0100 arc: B1 E1_H01W0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B7 H02W0101 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 H00L0100 arc: C3 W1_H02E0401 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 V00B0100 arc: D3 H02E0001 arc: D7 N1_V02S0401 arc: E1_H01E0101 F0 arc: E1_H02E0001 F2 arc: E1_H02E0201 F0 arc: E1_H02E0501 F7 arc: E3_H06E0003 F3 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0101 F1 arc: S1_V02S0701 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001100 word: SLICEA.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 1110000000100000 word: SLICEB.K0.INIT 0000001000000000 word: SLICEB.K1.INIT 1111111101111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R4C18:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 N1_V01S0100 arc: H00L0100 N1_V02S0301 arc: H00R0100 S1_V02N0501 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0501 E1_H01W0100 arc: W1_H02W0101 V01N0101 arc: A0 V02N0501 arc: A3 E1_H01E0001 arc: A5 N1_V01N0101 arc: A7 Q7 arc: B0 V01N0001 arc: B3 H00R0000 arc: B4 H00R0000 arc: B5 H00L0000 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 V02N0401 arc: C2 N1_V01N0001 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 E1_H01E0101 arc: C7 V00T0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 F0 arc: D2 Q2 arc: D3 V01S0100 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V02N0601 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q6 arc: H01W0000 F0 arc: H01W0100 F3 arc: LSR0 H02E0501 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q7 arc: S1_V02S0301 F1 arc: V00B0000 Q6 arc: V00T0000 Q2 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0301 F3 arc: W1_H02W0501 F5 word: SLICEC.K0.INIT 0011111111000000 word: SLICEC.K1.INIT 0000001000000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0110101010101010 word: SLICEB.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0100111111001100 word: SLICEA.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R4C19:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E3_H06E0203 S3_V06N0203 arc: H00R0000 V02N0601 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 E1_H02W0501 arc: V00T0100 S1_V02N0701 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0103 E3_H06W0003 arc: A1 E1_H01E0001 arc: A7 N1_V01N0101 arc: B1 V00T0000 arc: B4 V02S0501 arc: B7 V00B0100 arc: C1 H02W0401 arc: C4 E1_H01E0101 arc: C5 V02S0201 arc: C7 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V02N0001 arc: D4 V00B0000 arc: D5 H01W0000 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q0 arc: E1_H02E0401 Q4 arc: E1_H02E0501 Q5 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q5 arc: S1_V02S0301 Q1 arc: S1_V02S0601 Q6 arc: S1_V02S0701 Q5 arc: V00B0000 Q4 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0110101010101010 word: SLICEC.K0.INIT 0011111111000000 word: SLICEC.K1.INIT 0000111111110000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0110110011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 .tile R4C20:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02N0601 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02E0301 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H02E0401 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 H02W0201 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 V01N0001 arc: W3_H06W0303 E3_H06W0303 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 H01E0001 arc: A3 H01E0001 arc: A4 H02E0701 arc: A5 E1_H01W0000 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 V00B0100 arc: B5 H00L0000 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 H02E0401 arc: C5 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H02E0101 arc: CLK1 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 W1_H02E0001 arc: D5 E1_H01W0100 arc: E1_H02E0601 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 Q0 arc: LSR1 E1_H02W0301 arc: M6 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: MUXCLK3 CLK1 arc: S1_V02S0101 Q3 arc: S1_V02S0201 Q2 arc: V01S0100 Q1 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R4C21:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0701 V02S0701 arc: H00L0000 W1_H02E0201 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 V01N0001 arc: W1_H02W0501 E1_H01W0100 arc: E1_H02E0501 W3_H06E0303 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: H01W0000 Q2 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 H02W0601 arc: M2 E1_H02W0601 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R4C22:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0601 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 W1_H02E0601 arc: W1_H02W0001 H01E0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0501 W3_H06E0303 arc: A2 H02E0701 arc: B2 H02E0101 arc: B3 H00R0000 arc: C2 V02S0401 arc: C3 H00L0100 arc: CE0 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 F2 arc: E1_H01E0001 Q0 arc: E1_H02E0601 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0000 F3 arc: H01W0100 F2 arc: M0 E1_H02W0601 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00T0000 Q0 arc: V01S0000 Q4 arc: V01S0100 F3 arc: W1_H02W0101 F3 arc: W1_H02W0301 F3 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0000110011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R4C23:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 V02N0401 arc: E3_H06E0103 N1_V01S0100 arc: H00R0000 H02E0401 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 E1_H01W0000 arc: W1_H02W0601 H01E0001 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: M2 H02E0601 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: V00T0000 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R4C24:PLC2 arc: E1_H02E0501 V02N0501 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 W1_H02E0501 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02N0401 arc: V00T0100 H02E0101 arc: W1_H02W0601 H01E0001 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E1_H02E0401 Q6 arc: H01W0000 Q4 arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M2 H02W0601 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q0 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q4 arc: V01S0000 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C25:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 V02S0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 N1_V02S0701 arc: V00B0000 W1_H02E0401 arc: V00T0100 V02S0701 arc: W1_H02W0601 E3_H06W0303 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A3 V00T0000 arc: A5 V00T0000 arc: B1 V02N0301 arc: B3 V02N0101 arc: B5 H00R0000 arc: B7 F3 arc: C0 H02W0401 arc: C1 N1_V01S0100 arc: C2 H00R0100 arc: C3 V02S0401 arc: C4 E1_H02W0601 arc: C5 V00T0100 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V00B0100 arc: D2 E1_H02W0001 arc: D3 V00T0100 arc: D4 E1_H02W0001 arc: D5 E1_H02W0201 arc: D7 H00L0100 arc: E1_H02E0001 Q0 arc: E1_H02E0201 Q2 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q0 arc: V00B0100 F5 arc: V00T0000 Q2 arc: V01S0000 F7 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 1100010000110001 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 1000001011000011 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1100001100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R4C26:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 V01N0001 arc: H00L0100 E1_H02W0101 arc: H00R0100 V02S0701 arc: N1_V02N0101 H06E0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0701 V01N0101 arc: V00B0100 E1_H02W0701 arc: V00T0100 N1_V02S0701 arc: W1_H02W0401 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0701 arc: A3 V00T0000 arc: A5 V00T0000 arc: A7 N1_V01N0101 arc: B1 H01W0100 arc: B3 H00R0000 arc: B5 H00R0000 arc: B7 H02E0101 arc: C0 H00L0100 arc: C1 N1_V01S0100 arc: C2 H02W0401 arc: C3 H02E0401 arc: C4 V00B0100 arc: C5 H02E0601 arc: C6 V02S0201 arc: C7 N1_V02S0001 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 N1_V01S0000 arc: D2 S1_V02N0201 arc: D3 V00T0100 arc: D4 H02W0001 arc: D5 H00R0100 arc: D6 H02W0001 arc: D7 V02S0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0201 Q0 arc: E1_H02E0401 Q6 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0100 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q6 arc: V00T0000 Q2 arc: V01S0000 F1 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 1000010000100001 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1000010000100001 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 1000010000100001 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R4C27:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 H01E0101 arc: H00L0000 W1_H02E0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02N0201 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: A0 H00L0100 arc: B2 H00R0000 arc: B3 H00L0000 arc: B4 V02N0701 arc: B5 E1_H02W0101 arc: B6 V00B0000 arc: B7 V00T0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: N1_V01N0001 F5 arc: N1_V02N0201 F2 arc: V01S0000 F4 arc: V01S0100 F6 arc: W1_H02W0701 F7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R4C28:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 W1_H02E0201 arc: H00R0000 W1_H02E0401 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0501 H06E0303 arc: N3_V06N0103 S1_V02N0201 arc: V00B0000 W1_H02E0601 arc: V00T0000 W1_H02E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: B0 V00B0000 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H00L0000 arc: B4 V02S0501 arc: B5 W1_H02E0101 arc: B6 W1_H02E0301 arc: B7 H02E0301 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F6 arc: N1_V01N0001 F2 arc: V01S0000 F5 arc: W1_H02W0001 F0 arc: W1_H02W0101 F3 arc: W1_H02W0701 F7 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R4C29:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 V01N0001 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 V02N0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 H01E0001 arc: E3_H06E0303 W3_H06E0303 arc: B0 W1_H02E0101 arc: B1 V00B0000 arc: CLK0 G_HPBX0000 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00B0100 arc: LSR1 V00T0000 arc: M4 V00T0100 arc: M6 N1_V01N0101 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: W1_H02W0201 F0 arc: W1_H02W0301 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C2:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 V02N0701 arc: H00R0000 V02N0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0701 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E1_H02E0201 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M2 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C30:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E3_H06E0303 W1_H02E0501 arc: S1_V02S0101 V01N0101 arc: V00T0000 W1_H02E0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: CLK0 G_HPBX0000 arc: LSR1 V00T0000 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: S1_V02S0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C31:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02N0301 arc: H00R0100 V02N0701 arc: S1_V02S0001 N1_V02S0501 arc: V00B0000 V02S0201 arc: V00T0000 V02N0601 arc: N1_V02N0501 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0303 E3_H06W0303 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q0 arc: E1_H02E0401 Q6 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C32:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 H02E0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0601 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 S3_V06N0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00L0100 arc: A2 H00L0100 arc: A3 H00L0100 arc: B1 S1_V02N0101 arc: B2 H00R0000 arc: B3 H00R0000 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02S0401 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: M3 H00L0000 arc: M4 H02W0401 arc: M5 H02W0001 arc: M6 H02W0401 word: SLICEB.K0.INIT 0000010000000000 word: SLICEB.K1.INIT 0000010000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000010000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R4C33:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E3_H06E0203 H01E0001 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02E0101 arc: H00R0000 W1_H02E0401 arc: N1_V02N0401 S1_V02N0101 arc: V00T0000 V02S0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 E1_H02W0101 arc: A0 H00L0100 arc: B0 S1_V02N0301 arc: C0 H02W0601 arc: D0 V02N0201 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H00L0000 arc: M6 V00T0000 word: SLICEA.K0.INIT 1011000010111011 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C34:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0203 S3_V06N0203 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 E1_H01W0000 arc: S3_V06S0003 E1_H01W0000 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0601 V02S0601 arc: E3_H06E0103 W3_H06E0103 arc: D0 S1_V02N0201 arc: D1 V00B0100 arc: D2 V02S0001 arc: D3 H02E0201 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 E1_H02W0601 arc: M1 H00R0000 arc: M2 E1_H02W0601 arc: M3 H00R0100 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00B0000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R4C35:PLC2 arc: E1_H02E0001 V02S0001 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02N0201 arc: H00L0100 V02S0101 arc: H00R0000 E1_H02W0601 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0301 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: V00B0000 N1_V02S0201 arc: V00T0000 H02E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 S3_V06N0103 arc: E3_H06E0003 W3_H06E0303 arc: A0 H00L0100 arc: B0 V02N0101 arc: C0 H00L0000 arc: CE2 S1_V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 V00B0000 arc: M4 V00T0000 arc: M6 N1_V01N0101 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V02N0601 Q6 arc: S3_V06S0103 F1 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1000110010101111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R4C36:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 E3_H06W0203 arc: H00L0100 V02N0101 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 V01N0101 arc: V00T0000 V02N0601 arc: V01S0000 S3_V06N0103 arc: W1_H02W0601 S1_V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A2 V02S0501 arc: A3 V02S0501 arc: B2 V02S0101 arc: B3 V02S0101 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: D2 H02E0001 arc: D3 H02E0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: S1_V02S0101 F3 word: SLICEB.K0.INIT 1111111111111110 word: SLICEB.K1.INIT 1111111111111110 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C37:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 H06E0003 arc: V00B0100 N1_V02S0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0601 S1_V02N0601 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 N1_V02S0701 arc: B0 V02S0101 arc: C0 H00L0100 arc: D0 V02N0201 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 H00R0000 arc: M6 V00B0100 arc: S1_V02S0301 F3 word: SLICEA.K0.INIT 1000110010101111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C38:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 H01E0101 arc: S3_V06S0103 H06E0103 arc: V00T0000 V02S0401 arc: V00T0100 H02W0301 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 V00T0000 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 V02N0101 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 H02E0601 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0201 arc: E1_H02E0301 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M5 H00L0100 arc: M6 V00T0100 word: SLICEA.K0.INIT 1000101011001111 word: SLICEA.K1.INIT 1000101011001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1000101011001111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R4C39:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 H02E0201 arc: H00L0100 H02W0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0401 H02E0401 arc: S1_V02S0101 N1_V02S0001 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 S1_V02N0301 arc: A1 N1_V02S0701 arc: A2 V00B0000 arc: A3 V00B0000 arc: B1 S1_V02N0301 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00B0100 arc: W1_H02W0101 F3 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000010000000000 word: SLICEB.K0.INIT 0000010000000000 word: SLICEB.K1.INIT 0000010000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C3:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 H02E0201 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02W0601 arc: V00B0100 E1_H02W0501 arc: A1 F5 arc: A3 H01E0001 arc: A5 E1_H01W0000 arc: A7 H00L0000 arc: B0 V02S0301 arc: B1 H02W0101 arc: B2 V02N0301 arc: B3 H00R0000 arc: B5 V02N0501 arc: B7 H02E0301 arc: C0 H00R0100 arc: C1 N1_V01N0001 arc: C2 H00L0100 arc: C3 V02S0601 arc: C5 V00B0100 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 E1_H02W0001 arc: D2 N1_V01S0000 arc: D3 W1_H02E0001 arc: D5 H02W0001 arc: D7 V02S0601 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F7 arc: S3_V06S0003 Q0 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0011111111111111 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0011111111111111 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R4C40:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0000 H02E0601 arc: N1_V02N0401 W1_H02E0401 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 W1_H02E0301 arc: V00B0000 V02S0001 arc: V00T0100 H02E0301 arc: W1_H02W0101 N1_V02S0101 arc: N1_V02N0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 V00B0000 arc: B0 N1_V02S0101 arc: B1 N1_V02S0101 arc: B2 N1_V02S0101 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 V00T0100 arc: M3 H00L0100 arc: M4 V00T0100 arc: M5 H02E0001 arc: M6 V00T0100 arc: W1_H02W0301 F3 word: SLICEA.K0.INIT 1000110010101111 word: SLICEA.K1.INIT 1000110010101111 word: SLICEB.K0.INIT 1000110010101111 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C41:PLC2 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02E0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 H02W0601 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0301 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0701 N1_V01S0100 arc: E1_H02E0001 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: B3 W1_H02E0301 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 E1_H02W0001 arc: M6 V00B0100 word: SLICEB.K0.INIT 0000010000000000 word: SLICEB.K1.INIT 0000010000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000010000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R4C42:PLC2 arc: E3_H06E0103 W1_H02E0201 arc: H00R0100 N1_V02S0701 arc: V00B0100 V02N0301 arc: V00T0100 H02W0301 arc: W1_H02W0601 S3_V06N0303 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: CE0 H00R0100 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: H01W0000 Q0 arc: M0 V00T0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R4C43:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0601 E1_H01W0000 arc: N1_V02N0001 N1_V01S0000 arc: S1_V02S0201 V01N0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 H01E0101 arc: N1_V02N0501 W3_H06E0303 arc: W3_H06W0203 S3_V06N0203 .tile R4C44:PLC2 arc: E1_H02E0401 V01N0001 arc: E3_H06E0103 V06N0103 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0201 H06W0103 arc: S3_V06S0003 E1_H01W0000 arc: V00B0000 H02E0601 arc: H01W0000 W3_H06E0103 arc: A1 E1_H02W0701 arc: B1 S1_V02N0301 arc: B6 V00B0000 arc: B7 W1_H02E0301 arc: C1 V02N0401 arc: C6 V02S0001 arc: C7 F6 arc: D1 E1_H02W0201 arc: D6 H02E0001 arc: D7 W1_H02E0201 arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F7 arc: N1_V02N0501 F7 arc: N3_V06N0103 F1 arc: S3_V06S0303 F6 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001110101111 word: SLICED.K0.INIT 0011111100001100 word: SLICED.K1.INIT 1111110011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R4C45:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V02S0701 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 E1_H02W0401 arc: V00T0100 V02N0501 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: H01W0000 Q0 arc: LSR0 H02W0301 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C46:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 S1_V02N0301 arc: H00L0000 H02E0201 arc: H00L0100 H02W0101 arc: H00R0100 S1_V02N0701 arc: H01W0000 E3_H06W0103 arc: S1_V02S0001 H02E0001 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0103 E3_H06W0103 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 N1_V01S0100 arc: W1_H02W0201 W3_H06E0103 arc: A1 H00L0100 arc: A3 E1_H02W0501 arc: A5 E1_H01W0000 arc: A6 H02E0701 arc: A7 F5 arc: B1 H00R0100 arc: B3 H02W0301 arc: B5 H02W0301 arc: B6 H02E0301 arc: B7 S1_V02N0501 arc: C1 V02N0401 arc: C3 H00L0000 arc: C5 W1_H02E0401 arc: C6 V02N0001 arc: C7 E1_H01E0101 arc: D1 V02N0201 arc: D3 N1_V02S0001 arc: D5 V02N0601 arc: D6 H02W0201 arc: D7 H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F1 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: V01S0000 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000110010101100 word: SLICED.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R4C47:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02N0701 arc: H00L0000 S1_V02N0201 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02E0001 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0100 arc: A4 W1_H02E0501 arc: A5 V00B0000 arc: A6 F7 arc: B0 V02N0301 arc: B1 H01W0100 arc: B4 V02N0501 arc: B5 V02S0501 arc: B6 S1_V02N0501 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 H00R0100 arc: C4 V00T0000 arc: C5 V02N0201 arc: C6 V00B0100 arc: C7 V01N0101 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H00R0000 arc: D3 V00T0100 arc: D4 V02S0601 arc: D5 F0 arc: D6 S1_V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F6 arc: S1_V02S0301 Q3 arc: S1_V02S0501 F7 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: V00T0100 Q3 arc: V01S0000 Q3 arc: V01S0100 F1 arc: W1_H02W0101 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0000001100000000 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0011000000000000 word: SLICEC.K0.INIT 0000110010101100 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R4C48:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0203 H01E0001 arc: H00R0000 E1_H02W0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 E1_H02W0201 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 H06W0203 arc: V00B0000 H02E0601 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 H01E0101 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00R0100 arc: CE1 W1_H02E0101 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R4C49:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: H00R0000 E1_H02W0601 arc: N1_V02N0201 H02W0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02W0601 arc: S3_V06S0203 E1_H01W0000 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 V02N0701 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0501 arc: M0 H02E0601 arc: M4 W1_H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0001 Q0 arc: S3_V06S0303 Q6 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C4:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0701 S3_V06N0203 arc: V00B0100 W1_H02E0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 S3_V06N0303 arc: A7 H00L0000 arc: B7 V00B0000 arc: C7 V00T0000 arc: CE0 H02W0101 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D7 H00R0100 arc: E1_H01E0001 F7 arc: E1_H02E0201 Q0 arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: V00B0000 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R4C50:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0601 arc: N1_V02N0201 E1_H02W0201 arc: S1_V02S0101 H06E0103 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06E0103 arc: V00B0000 N1_V02S0001 arc: V00T0000 E1_H02W0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 E1_H02W0701 arc: E3_H06E0203 W3_H06E0103 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0000 Q0 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0401 Q4 arc: V01S0000 Q2 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R4C51:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: H00R0100 H02W0701 arc: S1_V02S0701 H06E0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0601 E1_H01W0000 arc: CE0 H02W0101 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: H01W0000 Q6 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S3_V06S0003 Q0 arc: W3_H06W0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R4C52:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: V00T0100 H02E0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: E3_H06E0003 W3_H06E0303 arc: B1 V00B0000 arc: B3 H00R0000 arc: B4 H00R0000 arc: B5 H00R0000 arc: B7 V02N0701 arc: C0 H00R0100 arc: C1 V02N0401 arc: C3 V02N0401 arc: C4 V02N0201 arc: C5 V02N0201 arc: C6 Q6 arc: C7 V02S0001 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 F0 arc: D3 F0 arc: D4 F0 arc: D5 F0 arc: D6 V02N0401 arc: D7 V02N0601 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F1 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H00R0100 Q7 arc: H01W0000 F4 arc: H01W0100 F3 arc: LSR1 E1_H02W0501 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F3 arc: S1_V02S0301 F3 arc: S1_V02S0401 Q6 arc: S1_V02S0601 F4 arc: S3_V06S0003 F3 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V00B0000 Q6 arc: V01S0000 F3 arc: V01S0100 Q7 arc: W1_H02W0101 F3 arc: W1_H02W0301 F1 arc: W1_H02W0601 F4 arc: W1_H02W0701 F5 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011000000000000 word: SLICEC.K0.INIT 0000110000000000 word: SLICEC.K1.INIT 0000001100000000 word: SLICED.K0.INIT 0000111111110000 word: SLICED.K1.INIT 0011110011001100 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 1100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R4C53:PLC2 arc: E1_H02E0501 V02N0501 arc: S1_V02S0401 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0501 E1_H01W0100 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 .tile R4C54:PLC2 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H02E0201 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 .tile R4C55:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: S1_V02S0401 V01N0001 .tile R4C56:PLC2 arc: S1_V02S0101 H06E0103 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 W1_H02E0701 arc: E3_H06E0303 W3_H06E0203 .tile R4C57:PLC2 arc: S1_V02S0401 S3_V06N0203 .tile R4C58:PLC2 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 .tile R4C59:PLC2 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 .tile R4C5:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0701 E3_H06W0203 arc: H00R0000 V02N0601 arc: N1_V02N0101 H02W0101 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 S3_V06N0203 arc: A5 V00T0000 arc: B1 V00T0000 arc: B3 N1_V02S0101 arc: B5 N1_V01S0000 arc: B7 V02S0701 arc: C1 S1_V02N0601 arc: C3 S1_V02N0401 arc: C5 V00B0100 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H00R0000 arc: D2 H02E0201 arc: D3 H00R0000 arc: D5 V00B0000 arc: D6 E1_H02W0201 arc: D7 V02N0601 arc: E1_H02E0401 Q6 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: H01W0100 F5 arc: LSR0 H02E0501 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M2 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: S1_V02S0601 Q6 arc: V01S0100 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 .tile R4C62:PLC2 arc: E3_H06E0303 W3_H06E0303 .tile R4C64:PLC2 arc: E3_H06E0203 W3_H06E0103 .tile R4C65:PLC2 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 .tile R4C68:PLC2 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 .tile R4C6:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 E1_H02W0001 arc: H00R0100 H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 V01N0101 arc: V00B0100 E1_H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 E3_H06W0003 arc: A1 H00R0000 arc: A3 V00B0000 arc: B1 H02W0301 arc: B3 E1_H02W0101 arc: C1 H00R0100 arc: C3 N1_V01N0001 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D3 V00B0100 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H00R0000 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M4 V00T0000 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0101 F1 arc: V00B0000 Q6 arc: V01S0000 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R4C70:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 W3_H06E0203 .tile R4C7:PLC2 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02S0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0301 H02W0301 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 V06N0103 arc: W3_H06W0303 E1_H02W0501 arc: A1 H00R0000 arc: A3 V00T0000 arc: B1 V01N0001 arc: B3 V02N0301 arc: B5 H00L0000 arc: C1 E1_H02W0401 arc: C3 H00L0100 arc: C5 S1_V02N0201 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 H02E0001 arc: D4 E1_H02W0201 arc: D5 V02N0601 arc: E1_H01E0101 F3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H00R0000 Q6 arc: H01W0000 Q4 arc: H01W0100 F1 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: W1_H02W0401 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R4C8:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06W0203 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 V01N0101 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A5 V00B0000 arc: B3 H00L0000 arc: B5 V01S0000 arc: C3 S1_V02N0601 arc: C5 W1_H02E0401 arc: CE0 H00R0000 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D2 E1_H02W0001 arc: D3 V02N0001 arc: D5 H00R0100 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: H01W0000 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M2 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F5 arc: V00B0000 Q6 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R4C9:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E1_H02W0701 arc: E3_H06E0203 W3_H06E0103 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q6 arc: E3_H06E0303 Q6 arc: H01W0100 Q4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: S3_V06S0303 Q6 arc: W1_H02W0201 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C10:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V02N0501 arc: H00R0100 H02E0701 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 E1_H02W0001 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 H02W0001 arc: V00T0100 H02W0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: E1_H02E0601 Q6 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: S1_V02S0401 Q6 arc: S3_V06S0003 Q0 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R5C11:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 H01E0101 arc: H00R0000 V02N0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02E0501 arc: S1_V02S0101 H01E0101 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: E1_H02E0401 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: S1_V02S0001 Q0 arc: S1_V02S0601 Q6 arc: V01S0000 Q2 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C12:PLC2 arc: E1_H02E0701 E3_H06W0203 arc: H00R0000 V02N0601 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H01E0101 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H01E0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q0 arc: E3_H06E0103 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H01E0001 arc: M2 H02W0601 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q2 arc: S1_V02S0001 Q0 arc: S1_V02S0201 Q2 arc: S1_V02S0601 Q4 arc: S3_V06S0003 Q0 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C13:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 H01E0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02N0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0601 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: V00B0100 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R5C14:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H06E0003 arc: S3_V06S0203 H06E0203 arc: V00B0100 W1_H02E0701 arc: V00T0100 H02W0301 arc: W1_H02W0401 S1_V02N0401 arc: B3 V02N0301 arc: B5 V00B0100 arc: C3 H00R0100 arc: C5 V00T0100 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D3 S1_V02N0201 arc: D5 S1_V02N0601 arc: D7 V02S0401 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q7 arc: S1_V02S0301 Q3 arc: S1_V02S0701 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000110000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111100001111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R5C15:PLC2 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V01N0101 arc: H00L0000 E1_H02W0001 arc: H00R0100 N1_V02S0501 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06E0103 arc: V00T0000 H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: H01W0000 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: A5 V02N0301 arc: B2 V02N0301 arc: B5 V00B0100 arc: C2 H02W0401 arc: C3 H00L0100 arc: C5 H02W0601 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 Q2 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 V02S0601 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q3 arc: E1_H02E0401 Q4 arc: E1_H02E0501 Q5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 E1_H02W0601 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q5 arc: S1_V02S0101 Q3 arc: S1_V02S0601 Q4 arc: S3_V06S0303 Q6 arc: V00B0000 Q4 arc: V00B0100 Q5 arc: V01S0000 Q0 arc: V01S0100 Q3 arc: W1_H02W0001 Q0 arc: W1_H02W0601 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0011111111000000 word: SLICEB.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0110110011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 .tile R5C16:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: H00L0000 S1_V02N0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02W0201 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 H01E0001 arc: H01W0000 W3_H06E0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02N0701 arc: A1 V02N0501 arc: A2 V02N0701 arc: A3 V02N0501 arc: A4 H02E0501 arc: A5 V00T0100 arc: B0 V02N0101 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 V02N0301 arc: B4 H02E0101 arc: B5 H00L0000 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0601 arc: C3 S1_V02N0601 arc: C4 V00T0000 arc: C5 W1_H02E0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK1 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 V00B0000 arc: D5 V02S0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: V01S0000 Q3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R5C17:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: H00L0000 H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 E3_H06W0203 arc: V00B0000 H02W0601 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: B0 H02W0101 arc: B1 V00T0000 arc: B2 V02N0101 arc: B3 V02S0301 arc: B5 H02E0101 arc: B6 H01E0101 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 W1_H02E0601 arc: C2 H00R0100 arc: C3 H00L0100 arc: C5 V02N0001 arc: C6 V02N0201 arc: C7 H01E0001 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0101 Q7 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: V00T0000 Q0 arc: V01S0000 Q6 arc: V01S0100 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R5C18:PLC2 arc: E1_H02E0501 V02S0501 arc: H00L0000 V02N0001 arc: H00L0100 N1_V02S0101 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 H01E0101 arc: A7 Q7 arc: B3 V02N0101 arc: B4 H02E0101 arc: B5 V01S0000 arc: B7 N1_V02S0501 arc: C2 V02N0601 arc: C3 H00L0000 arc: C4 Q4 arc: C5 V00T0000 arc: C6 V02S0001 arc: C7 V02S0001 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 S1_V02N0201 arc: D4 H02E0001 arc: D5 N1_V02S0601 arc: D6 H02W0201 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F3 arc: E1_H02E0001 Q2 arc: E1_H02E0201 F2 arc: E1_H02E0401 F4 arc: E1_H02E0701 Q7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H00R0100 F5 arc: H01W0000 F3 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q0 arc: N1_V02N0401 F4 arc: S1_V02S0601 Q4 arc: V01S0000 F4 arc: V01S0100 F2 arc: W1_H02W0301 F3 arc: W1_H02W0501 F7 arc: W1_H02W0601 F4 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0011000000000000 word: SLICEC.K0.INIT 0000000000001100 word: SLICEC.K1.INIT 1111110011001100 word: SLICED.K0.INIT 1111111111110000 word: SLICED.K1.INIT 1100010011110101 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R5C19:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0501 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V06S0203 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 H02E0501 arc: A5 N1_V01S0100 arc: A6 N1_V02S0101 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V02S0701 arc: B5 H00L0000 arc: B6 V02S0501 arc: B7 N1_V02S0701 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 H02W0401 arc: C5 V02S0001 arc: C6 V00T0000 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK1 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D4 V02S0601 arc: D5 H02W0201 arc: D6 V00B0000 arc: D7 E1_H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q3 arc: LSR1 H02W0501 arc: M6 V00B0100 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: S1_V02S0101 Q1 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 arc: V01S0100 F6 word: SLICED.K0.INIT 0000000001111111 word: SLICED.K1.INIT 0011111111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R5C20:PLC2 arc: E1_H02E0601 V01N0001 arc: H00L0000 W1_H02E0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0401 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0203 E1_H02W0401 arc: A1 V02N0701 arc: A2 E1_H01E0001 arc: A4 V00T0100 arc: B1 V00T0000 arc: B2 V02S0301 arc: B4 V01S0000 arc: B5 H02E0301 arc: B6 V00B0100 arc: C0 H00L0000 arc: C1 V02N0601 arc: C2 V02N0401 arc: C3 H00L0100 arc: C4 Q4 arc: C5 V02N0201 arc: C6 Q6 arc: C7 V00B0100 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 H00R0000 arc: D2 V02N0001 arc: D3 E1_H02W0001 arc: D4 E1_H01W0100 arc: D5 E1_H01W0100 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F1 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q6 arc: H01W0100 Q3 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: S1_V02S0301 Q3 arc: S1_V02S0501 Q5 arc: V00B0100 Q7 arc: V00T0000 F0 arc: V00T0100 Q3 arc: V01S0000 Q5 arc: V01S0100 F2 arc: W1_H02W0701 Q7 word: SLICED.K0.INIT 0011110011110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0111100000000000 word: SLICEC.K1.INIT 0011110000000000 word: SLICEB.K0.INIT 1111010100110001 word: SLICEB.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1110110011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R5C21:PLC2 arc: H00R0000 V02N0601 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: A6 N1_V01N0101 arc: B0 E1_H02W0101 arc: B5 W1_H02E0101 arc: B6 H02W0301 arc: C0 H02E0601 arc: C1 H00L0000 arc: C5 V00T0100 arc: C6 V00B0100 arc: C7 V02S0001 arc: CE1 V02S0201 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V01S0100 arc: D5 V00B0000 arc: D6 F0 arc: D7 V02N0401 arc: E1_H01E0001 F5 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 F1 arc: H01W0000 F7 arc: H01W0100 F5 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M2 H02W0601 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: N1_V02N0701 F7 arc: S1_V02S0001 F0 arc: S1_V02S0401 Q6 arc: V01S0000 F6 arc: V01S0100 F6 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000110000000000 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 1111111111110000 word: SLICED.K0.INIT 1100111101000101 word: SLICED.K1.INIT 0000111111110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R5C22:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: H00R0000 S1_V02N0601 arc: S1_V02S0101 H02W0101 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02W0601 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0203 E3_H06W0203 arc: B7 V00T0000 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: F7 F7_SLICE arc: M0 V00T0100 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: S1_V02S0401 Q4 arc: S3_V06S0003 Q0 arc: V01S0100 Q0 arc: W1_H02W0401 Q4 arc: W1_H02W0701 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011110000110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R5C23:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 V06N0203 arc: H00L0000 N1_V02S0001 arc: H00R0100 H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H02E0401 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 E1_H01W0000 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A3 V00B0000 arc: A7 E1_H02W0701 arc: B3 N1_V02S0101 arc: B7 V02S0701 arc: C3 V02N0601 arc: C7 V02N0201 arc: CE0 H00L0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D7 H00R0100 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: M0 H02W0601 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q0 arc: S1_V02S0201 Q0 arc: V00B0000 Q4 arc: V01S0100 Q4 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R5C24:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 V02N0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0501 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 H02W0601 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H01W0100 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: B1 H02E0301 arc: B3 H00R0000 arc: C1 V02N0601 arc: C3 H00R0100 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D3 V02N0201 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q4 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H01W0000 F1 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: S3_V06S0003 F3 arc: W1_H02W0401 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R5C25:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 E1_H01W0100 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0201 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 S1_V02N0201 arc: V00T0000 H02W0201 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 H01E0101 arc: A3 V00T0000 arc: B2 F1 arc: B3 E1_H02W0101 arc: C1 H02E0601 arc: C2 H00L0100 arc: C3 E1_H02W0601 arc: CE0 H00L0000 arc: CE2 H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V01S0100 arc: D2 V02N0001 arc: D3 V00T0100 arc: E1_H02E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 F2 arc: H00L0100 F3 arc: H01W0000 Q1 arc: H01W0100 Q0 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: N3_V06N0303 Q6 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q1 arc: S1_V02S0301 F3 arc: S1_V02S0401 Q6 arc: S1_V02S0601 Q4 arc: S3_V06S0003 F3 arc: V01S0000 Q1 arc: V01S0100 Q0 arc: W1_H02W0201 Q0 arc: W1_H02W0301 F3 arc: W3_H06W0103 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111001100000000 word: SLICEB.K1.INIT 1001000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000111111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R5C26:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 H02E0101 arc: H00R0100 N1_V02S0501 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 V01N0001 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06N0203 arc: A1 H00L0000 arc: A3 V02S0701 arc: A5 V00T0000 arc: B1 V00B0000 arc: B3 H00R0100 arc: B5 H00R0000 arc: C0 N1_V02S0401 arc: C1 V02N0601 arc: C2 E1_H02W0401 arc: C3 H02E0401 arc: C4 V02S0001 arc: C5 V02S0201 arc: C6 H02W0401 arc: C7 E1_H01E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V02S0001 arc: D2 V00B0100 arc: D3 V02N0001 arc: D4 V02N0401 arc: D5 H02E0201 arc: D6 V02N0401 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F3 arc: E1_H02E0001 Q0 arc: E1_H02E0501 F7 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0000 Q4 arc: H01W0000 F3 arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: V00B0000 Q4 arc: V00B0100 F7 arc: V00T0000 Q0 arc: V01S0000 F7 arc: V01S0100 F1 arc: W1_H02W0201 Q2 arc: W3_H06W0003 F3 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 0110111111111111 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 1000001001000001 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1000010000100001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R5C27:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02S0301 arc: H00R0000 H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 H02W0601 arc: S3_V06S0303 H01E0101 arc: V00B0100 H02E0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 N1_V01S0000 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: A6 H02E0701 arc: B1 H01W0100 arc: B3 H00L0000 arc: B5 V01S0000 arc: B6 N1_V02S0501 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 W1_H02E0601 arc: C2 N1_V01S0100 arc: C3 N1_V02S0601 arc: C4 V02S0201 arc: C5 N1_V02S0201 arc: C6 E1_H01E0101 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H00R0000 arc: D2 V00B0100 arc: D3 N1_V02S0001 arc: D4 V02N0601 arc: D5 H00R0100 arc: D6 H01W0000 arc: D7 V02S0601 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q4 arc: N1_V02N0201 Q2 arc: S1_V02S0101 F3 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0000 Q4 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 1100001100000000 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 1000010000100001 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1100001100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R5C28:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 W1_H02E0401 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0101 V01N0101 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06S0303 arc: W3_H06W0203 E3_H06W0103 arc: B1 S1_V02N0101 arc: C0 H00L0100 arc: C1 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 S1_V02N0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H00L0100 F1 arc: LSR0 H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V01S0000 Q1 arc: V01S0100 Q0 word: SLICEA.K0.INIT 1111111111110000 word: SLICEA.K1.INIT 0000001100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R5C29:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V06S0203 arc: H00R0000 V02N0601 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0501 V01N0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 E1_H02W0501 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: W1_H02W0301 V02N0301 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0303 E3_H06W0303 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: M0 V00T0000 arc: M2 N1_V01N0001 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 Q0 arc: S1_V02S0601 Q4 arc: V01S0000 Q6 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C2:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: H00L0100 S1_V02N0301 arc: H01W0100 E3_H06W0303 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 S1_V02N0501 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0501 arc: CE0 H02E0101 arc: CE1 H00L0100 arc: CE2 H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q6 arc: E1_H02E0201 Q0 arc: H01W0000 Q4 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: V01S0000 Q2 arc: V01S0100 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R5C30:PLC2 arc: E3_H06E0103 W1_H02E0201 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0401 H02E0401 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0501 arc: V00T0100 H02W0301 arc: E1_H02E0101 W3_H06E0103 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: S3_V06S0303 Q6 arc: V01S0000 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C31:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02N0201 arc: H00L0000 W1_H02E0201 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0501 S3_V06N0303 arc: V00B0000 V02S0001 arc: V01S0000 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: CE0 H00L0000 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: E3_H06E0103 Q2 arc: M0 V00B0000 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C32:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 S1_V02N0201 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 V01N0101 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 V02N0501 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0401 W3_H06E0203 arc: A1 H02W0501 arc: A6 N1_V01N0101 arc: A7 H00L0000 arc: B1 H01W0100 arc: B6 H02E0101 arc: B7 V02N0701 arc: C1 S1_V02N0601 arc: C6 V00T0100 arc: C7 V02N0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D6 E1_H02W0201 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0301 F1 arc: V01S0000 F1 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100111101000101 word: SLICED.K1.INIT 1100111101000101 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C33:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: H00L0100 H02W0101 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S3_V06N0303 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: E3_H06E0003 W3_H06E0303 arc: A1 H01E0001 arc: A2 H01E0001 arc: A3 H01E0001 arc: B1 N1_V02S0101 arc: B2 N1_V02S0101 arc: B3 N1_V02S0101 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0201 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: E1_H01E0001 F1 arc: E1_H02E0401 Q4 arc: E1_H02E0601 Q6 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q4 arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 V00T0000 arc: M4 H02W0401 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0103 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1101000011011101 word: SLICEB.K0.INIT 1101000011011101 word: SLICEB.K1.INIT 1101000011011101 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R5C34:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H01E0001 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V06N0203 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 W1_H02E0701 arc: A2 V00B0000 arc: A3 W1_H02E0701 arc: B0 W1_H02E0101 arc: B2 W1_H02E0101 arc: B3 W1_H02E0101 arc: C0 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: E1_H01E0001 Q4 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: V01S0000 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R5C35:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 V06N0203 arc: H00L0000 V02N0201 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0701 arc: V00T0100 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 H01E0001 arc: A2 H01E0001 arc: A3 H01E0001 arc: B0 V02N0101 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 H00R0000 arc: B5 H02E0301 arc: C0 N1_V01S0100 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 V00T0100 arc: C5 F4 arc: C7 V00B0100 arc: CE2 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 E1_H01W0100 arc: D5 H00L0100 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0100 F7 arc: LSR1 V00B0000 arc: M0 W1_H02E0601 arc: M1 H00L0000 arc: M2 W1_H02E0601 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S3_V06S0303 Q5 arc: V01S0100 F4 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 0011000011110000 word: SLICEC.K1.INIT 0000001100110011 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R5C36:PLC2 arc: E1_H02E0501 V02N0501 arc: H00L0000 W1_H02E0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 S3_V06N0303 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 E1_H02W0201 arc: W3_H06W0203 V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A1 H02W0501 arc: A2 V00T0000 arc: A3 V00T0000 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: B5 V02S0501 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V02S0201 arc: C5 V00B0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 H02E0001 arc: E1_H01E0001 F5 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 F1 arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F4 arc: S1_V02S0601 F4 arc: S1_V02S0701 F5 arc: S3_V06S0103 F1 arc: W1_H02W0101 F1 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000010000000000 word: SLICEB.K0.INIT 0000010000000000 word: SLICEB.K1.INIT 0000010000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R5C37:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0601 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 S3_V06N0203 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V02N0601 arc: H01W0000 W3_H06E0103 arc: A0 H00L0100 arc: B0 V02N0301 arc: C0 V02N0401 arc: D0 V00T0100 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 E1_H02W0001 arc: M6 V00T0000 arc: V01S0000 F3 word: SLICEA.K0.INIT 1010001011110011 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C38:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: H00L0000 V02N0201 arc: H00R0000 S1_V02N0401 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0701 H06E0203 arc: S1_V02S0301 E1_H02W0301 arc: V00B0000 V02N0201 arc: V00T0000 N1_V02S0401 arc: W1_H02W0201 V06S0103 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: B1 H02W0301 arc: B2 H02W0301 arc: B3 H02W0301 arc: C1 H02E0601 arc: C2 H02E0601 arc: C3 H02E0601 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H02E0001 arc: M6 V00T0000 arc: S3_V06S0003 F3 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0000000001000000 word: SLICEB.K0.INIT 0000000001000000 word: SLICEB.K1.INIT 0000000001000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C39:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02N0001 arc: H00L0100 H02E0101 arc: H00R0000 N1_V02S0401 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V02N0301 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: A0 H00R0000 arc: B0 V00B0000 arc: C0 H00L0100 arc: D0 H02W0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00B0100 arc: S1_V02S0101 F3 word: SLICEA.K0.INIT 1010111100100011 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C3:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 V02S0401 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0101 V01N0101 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V02N0101 arc: A7 H00L0000 arc: B3 H00L0000 arc: B7 V00B0000 arc: C3 V02N0601 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 W1_H02E0001 arc: D3 V00T0100 arc: D7 V02S0601 arc: E3_H06E0103 Q2 arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 H02W0601 arc: M2 V00T0000 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: S1_V02S0601 Q4 arc: V00B0000 Q4 arc: V01S0000 F7 arc: W1_H02W0001 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R5C40:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0601 V02N0601 arc: H00L0100 E1_H02W0101 arc: H00R0100 H02E0701 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 H06W0303 arc: S1_V02S0201 W1_H02E0201 arc: V00T0000 H02E0001 arc: W1_H02W0201 V06S0103 arc: S1_V02S0101 W3_H06E0103 arc: S3_V06S0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: B0 V02S0301 arc: B1 V02S0301 arc: C0 H00L0100 arc: C1 H00L0100 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: W1_H02W0301 F1 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1111111111111110 word: SLICEA.K1.INIT 1111111111111110 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C41:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02N0201 arc: H00R0100 E1_H02W0701 arc: N1_V02N0301 S3_V06N0003 arc: S1_V02S0401 H06E0203 arc: V00T0100 H02E0101 arc: W1_H02W0201 S1_V02N0201 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 V02S0701 arc: B0 V02S0301 arc: C0 H02E0601 arc: D0 H02E0201 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 E1_H02W0201 arc: M4 V00T0100 arc: M5 H00R0100 arc: M6 V00T0100 word: SLICEA.K0.INIT 1000101011001111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C42:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02W0001 arc: H00L0100 W1_H02E0101 arc: H00R0000 V02N0601 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 H02W0601 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02E0101 arc: W1_H02W0501 H01E0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: A0 N1_V02S0701 arc: B0 E1_H02W0101 arc: C0 H00L0100 arc: D0 V00B0100 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 W1_H02E0001 arc: M6 V00T0100 arc: W1_H02W0101 F3 word: SLICEA.K0.INIT 1011000010111011 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C43:PLC2 arc: E1_H02E0101 V02N0101 arc: H00L0000 W1_H02E0201 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H01W0000 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: V00B0000 V02S0201 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0701 E1_H02W0601 arc: H01W0100 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0103 W3_H06E0003 arc: CE0 H00L0000 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: M0 V00B0000 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: W1_H02W0001 Q0 arc: W1_H02W0201 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C44:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 S1_V02N0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0401 E1_H01W0000 arc: W1_H02W0701 E1_H01W0100 arc: H01W0000 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 .tile R5C45:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 E1_H02W0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H06W0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 S3_V06N0203 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0001 arc: E1_H01E0001 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: CE0 V02S0201 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: H01W0000 Q4 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R5C46:PLC2 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 E1_H02W0401 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 H01E0001 arc: W3_H06W0003 S3_V06N0003 arc: E3_H06E0303 W3_H06E0303 arc: A3 H02W0701 arc: A4 H02E0701 arc: A5 N1_V01N0101 arc: A6 H00R0000 arc: A7 E1_H01W0000 arc: B0 V02N0101 arc: B3 H02W0101 arc: B4 H02E0101 arc: B5 N1_V01S0000 arc: B6 V00B0000 arc: B7 E1_H02W0301 arc: C0 H00L0000 arc: C1 H00L0100 arc: C3 V02N0401 arc: C4 H01E0001 arc: C5 E1_H01E0101 arc: C6 V00T0000 arc: C7 S1_V02N0201 arc: D0 V02S0001 arc: D1 S1_V02N0201 arc: D3 V02S0001 arc: D4 H01W0000 arc: D5 V01N0001 arc: D6 N1_V02S0601 arc: D7 N1_V02S0601 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: M0 H02E0601 arc: N1_V01N0101 F3 arc: N3_V06N0203 F4 arc: S3_V06S0303 F6 arc: V00T0000 F0 word: SLICEC.K0.INIT 0000110010101100 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1000101000001010 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R5C47:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 S3_V06N0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0301 H02W0301 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 E1_H02W0501 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 N1_V01S0100 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 E1_H01E0001 arc: A2 V02N0701 arc: B0 V02N0101 arc: B1 H00R0100 arc: B2 V01N0001 arc: B3 H00R0100 arc: B5 V01S0000 arc: B6 V00B0100 arc: C0 H02E0601 arc: C1 W1_H02E0401 arc: C2 H02E0401 arc: C3 W1_H02E0401 arc: C4 Q4 arc: C5 E1_H01E0101 arc: C6 V02N0201 arc: C7 V00B0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V01S0000 arc: D2 H00R0000 arc: D3 N1_V01S0000 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 V00B0000 arc: D7 V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q4 arc: E1_H02E0301 F3 arc: E3_H06E0003 F3 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0100 Q5 arc: H01W0000 F1 arc: H01W0100 F6 arc: LSR0 E1_H02W0301 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q5 arc: N1_V02N0001 F0 arc: N1_V02N0201 F2 arc: N1_V02N0401 Q4 arc: N1_V02N0601 Q4 arc: N1_V02N0701 Q5 arc: S1_V02S0301 F1 arc: S1_V02S0401 Q4 arc: S1_V02S0701 Q5 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: V01S0000 Q5 arc: V01S0100 F3 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 0001010100111111 word: SLICEA.K1.INIT 0000110000000000 word: SLICEC.K0.INIT 0000111111110000 word: SLICEC.K1.INIT 0011110011001100 word: SLICED.K0.INIT 0000001111001111 word: SLICED.K1.INIT 1111000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R5C48:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 V01N0101 arc: H00L0100 V02N0101 arc: H00R0000 V02S0401 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0701 S1_V02N0701 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0303 V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: A4 V00T0100 arc: A5 W1_H02E0501 arc: A7 S1_V02N0301 arc: B0 V02N0101 arc: B2 V02N0301 arc: B4 V02N0501 arc: B5 E1_H02W0101 arc: B7 V02N0701 arc: C0 N1_V02S0601 arc: C1 H00L0100 arc: C2 H02E0601 arc: C3 H00L0100 arc: C4 S1_V02N0001 arc: C5 S1_V02N0001 arc: C7 V00B0100 arc: D0 S1_V02N0201 arc: D1 V02S0001 arc: D2 H00R0000 arc: D3 V00B0100 arc: D4 V02S0401 arc: D5 F0 arc: D7 V00B0000 arc: E1_H02E0001 F2 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 V00T0000 arc: M2 V00T0000 arc: S3_V06S0303 F5 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 1000000010101010 word: SLICEA.K0.INIT 0000001111001111 word: SLICEA.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 0000110000111111 word: SLICEB.K1.INIT 1111000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R5C49:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 V02N0701 arc: H00L0000 H02E0201 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V01S0100 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0101 W3_H06E0103 arc: A1 W1_H02E0501 arc: A4 H02E0501 arc: A5 E1_H02W0701 arc: A6 H00R0000 arc: A7 V00T0100 arc: B1 W1_H02E0101 arc: B4 H00L0000 arc: B5 H02E0101 arc: B6 E1_H02W0101 arc: B7 V02S0501 arc: C1 V02N0601 arc: C4 H02W0601 arc: C5 V02N0001 arc: C6 V00T0000 arc: C7 H02E0401 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D4 H02E0001 arc: D5 H02W0001 arc: D6 H01W0000 arc: D7 W1_H02E0001 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR1 E1_H02W0501 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F5 arc: S3_V06S0203 F4 arc: V00T0100 F1 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1000000010101010 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000110010101100 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R5C4:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 W1_H02E0201 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02W0701 arc: V00B0100 V02N0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0601 arc: A3 V00B0000 arc: B3 E1_H01W0100 arc: B5 H00L0000 arc: C3 S1_V02N0401 arc: C5 V02N0001 arc: CE0 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D3 V02N0201 arc: D4 H02E0201 arc: D5 H00R0100 arc: E1_H02E0201 Q0 arc: E3_H06E0203 Q4 arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0000 Q0 arc: H01W0100 F3 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M4 H02E0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0401 Q6 arc: N3_V06N0203 Q4 arc: V00B0000 Q6 arc: V01S0000 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R5C50:PLC2 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0401 H06W0203 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 N1_V01S0000 arc: V00B0100 H02E0701 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S3_V06N0303 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 H02W0301 arc: M0 H02W0601 arc: M2 V00T0100 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0401 Q4 arc: S3_V06S0103 Q2 arc: V01S0100 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C51:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: N1_V02N0001 V01N0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02S0701 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: LSR0 V00B0100 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M2 E1_H02W0601 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0001 Q2 arc: S1_V02S0401 Q6 arc: S1_V02S0601 Q4 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R5C52:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 E1_H01W0000 arc: H00L0100 V02S0301 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0601 N1_V01S0000 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: CE0 H00L0100 arc: CE1 H02W0101 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: H01W0100 Q4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M2 H02E0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: S1_V02S0201 Q2 arc: S3_V06S0003 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C53:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0501 W1_H02E0501 arc: H00L0000 H02W0001 arc: H00R0000 H02E0601 arc: S1_V02S0301 H02E0301 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 V02N0601 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0303 E3_H06W0303 arc: B1 V00B0000 arc: B3 H00R0000 arc: B4 V01S0000 arc: B5 V01S0000 arc: C0 V02S0401 arc: C1 H02E0401 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 H02E0401 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 F0 arc: D2 Q2 arc: D3 F0 arc: D4 F0 arc: D5 F0 arc: E1_H01E0101 F3 arc: E1_H02E0101 F1 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q2 arc: H01W0100 F4 arc: LSR0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0101 F1 arc: S1_V02S0701 F5 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 Q2 arc: V01S0100 F3 arc: W1_H02W0101 F1 arc: W1_H02W0301 F1 arc: W3_H06W0003 F3 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0011000000000000 word: SLICEC.K0.INIT 0000001100000000 word: SLICEC.K1.INIT 0000110000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R5C54:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0001 arc: H00R0000 H02W0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0701 H01E0101 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: A0 E1_H02W0501 arc: A1 H01E0001 arc: A6 H02E0501 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 V02N0101 arc: B6 H02W0101 arc: B7 V00B0100 arc: C0 H00L0000 arc: C1 H00L0000 arc: C6 E1_H02W0601 arc: C7 E1_H02W0401 arc: D0 H00R0000 arc: D1 S1_V02N0201 arc: D6 H00R0100 arc: D7 V01N0001 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: S3_V06S0003 F0 arc: V00T0100 F1 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000110010101100 word: SLICED.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R5C55:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V01N0001 arc: H00L0000 V02N0201 arc: H00R0000 V02N0401 arc: N1_V01N0001 S3_V06N0003 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 H02E0501 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 H01E0101 arc: E3_H06E0003 W3_H06E0303 arc: A3 V00T0000 arc: A5 H02E0701 arc: B3 V02N0301 arc: B5 H00L0000 arc: B6 V00B0000 arc: C3 S1_V02N0401 arc: C5 V00B0100 arc: C6 V00T0100 arc: C7 S1_V02N0001 arc: D3 H00R0000 arc: D5 H02W0001 arc: D6 H02W0001 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M6 E1_H02W0401 arc: W1_H02W0601 F6 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000001111001111 word: SLICED.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R5C56:PLC2 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 H06E0203 arc: V00B0000 H02W0401 arc: V00T0000 H02E0001 arc: V00T0100 H02W0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0501 W3_H06E0303 arc: A1 H00L0100 arc: A5 V02S0101 arc: A6 H02W0701 arc: A7 F5 arc: B1 V02N0101 arc: B2 H02E0101 arc: B5 V02S0701 arc: B6 V02S0501 arc: B7 F1 arc: C1 H00L0000 arc: C2 H02E0401 arc: C3 H02E0601 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 V01N0101 arc: D1 H02E0201 arc: D2 H00R0000 arc: D3 E1_H02W0001 arc: D5 S1_V02N0601 arc: D6 H01W0000 arc: D7 V02N0601 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M2 V00B0000 arc: S1_V02S0001 F2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000110010101100 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 1111000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R5C57:PLC2 arc: S1_V02S0401 H02W0401 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 S1_V02N0701 arc: H01W0000 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 .tile R5C58:PLC2 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0401 S3_V06N0203 arc: W3_H06W0003 S3_V06N0003 .tile R5C59:PLC2 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0303 E3_H06W0203 .tile R5C5:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02E0201 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0501 N1_V01S0100 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0701 E1_H02W0601 arc: A1 N1_V02S0501 arc: B1 V00B0000 arc: B3 H00L0000 arc: C1 H02E0601 arc: C3 E1_H02W0401 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V01S0100 arc: D3 E1_H02W0001 arc: E1_H02E0001 Q2 arc: E1_H02E0301 F1 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0401 Q4 arc: V01S0100 Q6 arc: W3_H06W0103 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R5C60:PLC2 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 .tile R5C61:PLC2 arc: S3_V06S0003 W3_H06E0003 .tile R5C62:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R5C65:PLC2 arc: W3_H06W0203 E3_H06W0203 .tile R5C66:PLC2 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 .tile R5C68:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E3_H06E0003 W3_H06E0003 .tile R5C69:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: S3_V06S0003 H06E0003 .tile R5C6:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02W0201 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 H06E0103 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: W1_H02W0601 S1_V02N0601 arc: A1 H00R0000 arc: A3 E1_H01E0001 arc: B1 H02E0101 arc: B3 E1_H02W0301 arc: B7 V02S0701 arc: C1 H00L0000 arc: C3 V02S0601 arc: C7 V01N0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0201 arc: D3 W1_H02E0001 arc: D6 E1_H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 Q4 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q6 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: V01S0000 F1 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 .tile R5C70:PLC2 arc: E1_H02E0601 W1_H02E0301 .tile R5C7:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 H02W0001 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H06E0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: A5 H02E0501 arc: B3 H02W0301 arc: B5 H00L0000 arc: C3 V02N0601 arc: C5 V00T0000 arc: CE0 H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H02E0001 arc: D3 H00R0000 arc: D5 V02N0401 arc: E1_H01E0001 Q6 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 E1_H02W0601 arc: M2 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q2 arc: S1_V02S0501 F5 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R5C8:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0601 W1_H02E0601 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 S1_V02N0001 arc: S1_V02S0301 N1_V01S0100 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0101 arc: V00T0100 H02E0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H01W0100 arc: W3_H06W0303 E1_H02W0601 arc: A5 N1_V01S0100 arc: B1 V00T0000 arc: B5 V02S0501 arc: C1 S1_V02N0401 arc: C5 V02S0201 arc: CE1 H00R0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 S1_V02N0201 arc: D5 H02W0001 arc: E1_H01E0001 Q0 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q2 arc: S1_V02S0701 F5 arc: V00T0000 Q2 arc: V01S0100 Q6 arc: W1_H02W0001 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 .tile R5C9:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 S1_V02N0001 arc: H00R0000 V02N0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 S1_V02N0201 arc: N3_V06N0203 H01E0001 arc: V00B0000 E1_H02W0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0203 V06N0203 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H02E0201 Q0 arc: E1_H02E0401 Q4 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0601 Q4 arc: S3_V06S0003 Q0 arc: S3_V06S0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R6C10:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02S0401 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00R0100 H02W0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02S0001 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 V02N0601 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0001 Q0 arc: V00B0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R6C11:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02E0201 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0701 E1_H01W0100 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: W1_H02W0701 H01E0101 arc: B1 V00T0000 arc: B3 H00R0000 arc: B5 H00L0000 arc: B7 H02E0301 arc: C1 H02W0401 arc: C3 H02W0401 arc: C5 H02W0401 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 V02N0001 arc: D5 H00R0100 arc: D7 V02N0601 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0301 Q1 arc: V01S0000 Q7 arc: V01S0100 Q5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R6C12:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 V02N0001 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 N1_V02S0601 arc: B1 V00B0000 arc: B3 H00L0000 arc: B5 H00R0000 arc: B7 N1_V01S0000 arc: C1 V02S0401 arc: C3 V02S0401 arc: C5 V00T0000 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D3 V00B0100 arc: D5 H02E0201 arc: D7 V01N0001 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q1 arc: S1_V02S0101 Q3 arc: V01S0000 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R6C13:PLC2 arc: H00L0000 N1_V02S0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02E0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 H06W0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0601 S1_V02N0601 arc: B1 V00T0000 arc: B3 H00R0100 arc: B5 H02E0301 arc: C0 W1_H02E0401 arc: C1 H00L0000 arc: C2 E1_H02W0401 arc: C3 H00L0100 arc: C4 V02S0201 arc: C5 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 V00B0000 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: E1_H02E0201 F2 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: LSR0 H02W0501 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 0000111100110011 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 0000111100110011 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 0000111100110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R6C14:PLC2 arc: E1_H02E0601 S1_V02N0601 arc: H00R0000 W1_H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: V00B0000 V02S0001 arc: V00B0100 V02N0101 arc: V00T0100 S1_V02N0701 arc: B1 V00B0000 arc: B3 H00R0000 arc: B7 W1_H02E0101 arc: C1 H00R0100 arc: C3 H00R0100 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D3 H01E0101 arc: D5 H02W0001 arc: D7 H02E0201 arc: E1_H02E0501 Q7 arc: E3_H06E0103 Q1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: V01S0000 Q3 arc: W1_H02W0501 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R6C15:PLC2 arc: E1_H02E0401 V02N0401 arc: H00L0000 H02W0201 arc: H00R0000 H02W0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06W0103 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: N1_V02N0501 W3_H06E0303 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 N1_V02S0301 arc: A5 V00T0100 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 V00B0100 arc: B5 V02N0701 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 H02E0601 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CLK1 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 V02S0601 arc: D5 E1_H02W0201 arc: E1_H02E0001 Q0 arc: E1_H02E0301 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 V00B0000 arc: MUXCLK0 CLK1 arc: MUXCLK1 CLK1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE RAMW enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE DPRAM enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE DPRAM enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.WREMUX WRE enum: CLK1.CLKMUX CLK .tile R6C16:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 V02S0201 arc: H00R0100 H02W0701 arc: N1_V02N0001 S3_V06N0003 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02W0101 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02N0101 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A7 N1_V01N0101 arc: B0 V02S0101 arc: B4 H00R0000 arc: B5 H00R0000 arc: B7 V00B0100 arc: C0 H02W0601 arc: C1 H00L0100 arc: C4 V00T0100 arc: C5 H02E0401 arc: C7 E1_H01E0101 arc: CE0 V02S0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V01S0100 arc: D4 H00R0100 arc: D5 H00R0100 arc: D6 V00B0000 arc: D7 V02N0401 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q6 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q4 arc: H01W0000 Q4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q1 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q1 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q7 arc: N1_V02N0601 Q4 arc: N1_V02N0701 Q7 arc: N3_V06N0203 Q4 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V01S0000 Q0 arc: V01S0100 Q6 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q1 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q7 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0011111111000000 word: SLICEA.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 1111111100001100 word: SLICEC.K1.INIT 1111111111000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0110110011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 .tile R6C17:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 V02N0201 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 W1_H02E0301 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 H02E0301 arc: S3_V06S0003 H06W0003 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 N1_V02S0701 arc: A7 H00L0000 arc: B7 V00B0100 arc: C7 V00T0100 arc: CE0 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02W0301 arc: M0 H02E0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R6C18:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 N1_V01S0100 arc: H00L0000 S1_V02N0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: V00B0100 V02N0101 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A5 N1_V01N0101 arc: B5 H00R0000 arc: C5 V00T0000 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 H00L0100 arc: E1_H02E0001 Q0 arc: E1_H02E0201 Q2 arc: E1_H02E0401 Q6 arc: F5 F5_SLICE arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M2 V00B0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: V01S0100 Q6 arc: W1_H02W0701 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C19:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: H00L0100 H02W0101 arc: H00R0100 H02E0501 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: V00B0000 H02W0401 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: W1_H02W0601 V02N0601 arc: W3_H06W0103 E3_H06W0003 arc: B0 H02E0301 arc: C0 H00R0100 arc: C1 N1_V01S0100 arc: C3 H00L0100 arc: C5 V00T0000 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0201 arc: D3 H02W0001 arc: D5 E1_H01W0100 arc: D7 E1_H01W0100 arc: E1_H02E0201 Q0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V01S0100 Q5 arc: W3_H06W0203 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1100000011111111 word: SLICEA.K1.INIT 0000111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R6C20:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V06N0303 arc: H00L0100 H02W0301 arc: H00R0000 H02W0601 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: V00B0000 E1_H02W0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02N0601 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V02N0401 arc: E3_H06E0203 W3_H06E0103 arc: A1 V02S0701 arc: A2 E1_H01E0001 arc: A3 V02S0501 arc: A4 V02N0301 arc: A7 V02S0301 arc: B1 V01N0001 arc: B2 H00R0100 arc: B3 N1_V02S0301 arc: B4 H00R0000 arc: B7 V00B0000 arc: C0 V02N0401 arc: C1 H00L0000 arc: C2 N1_V01S0100 arc: C3 H00L0100 arc: C4 V00T0000 arc: C5 V02N0201 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V01S0100 arc: D2 V00B0100 arc: D3 V00T0100 arc: D4 V02S0601 arc: D5 H02W0201 arc: D7 E1_H01W0100 arc: E1_H01E0001 F3 arc: E1_H02E0101 Q1 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 F7 arc: H01W0000 F5 arc: H01W0100 F0 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F5 arc: S1_V02S0001 F0 arc: S1_V02S0701 F5 arc: V01S0100 F4 arc: W1_H02W0001 F0 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001011 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 1110110011111111 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 1000010010100101 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R6C21:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 H02E0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 W1_H02E0201 arc: V00B0000 H02E0401 arc: V00T0100 H02E0301 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 E3_H06W0003 arc: A0 V02N0701 arc: A2 V01N0101 arc: A3 E1_H02W0501 arc: A4 V00B0000 arc: A5 V00T0100 arc: A6 H02E0501 arc: A7 H00L0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F4 arc: E1_H02E0501 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F6 arc: N1_V01N0001 F5 arc: W1_H02W0301 F3 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C22:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 S1_V02N0201 arc: H00L0100 S1_V02N0301 arc: H00R0100 H02E0501 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 H01E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 V02N0701 arc: A1 H00L0100 arc: B5 V01S0000 arc: C5 V00T0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00T0100 F1 arc: V01S0000 F0 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C23:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 N1_V02S0101 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0100 S1_V02N0501 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 V02N0701 arc: E3_H06E0103 W3_H06E0003 arc: A1 H01E0001 arc: A3 H00L0100 arc: A5 S1_V02N0301 arc: A6 H02E0701 arc: B1 V01N0001 arc: B3 V02S0301 arc: B5 S1_V02N0701 arc: B6 H02E0101 arc: B7 V01S0000 arc: C1 H02W0601 arc: C3 S1_V02N0401 arc: C5 V00T0100 arc: C6 H02W0401 arc: C7 E1_H01E0101 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D3 V00B0100 arc: D5 V02N0601 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S3_V06S0303 F6 arc: V01S0000 F5 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0011111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R6C24:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: V00B0000 W1_H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 W1_H02E0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A5 N1_V01N0101 arc: B5 H00L0000 arc: C5 S1_V02N0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: F4 F5C_SLICE arc: H00L0000 Q0 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q2 arc: V01S0000 F4 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111010111110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C25:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0301 H06E0003 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H06E0303 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: W1_H02W0201 S1_V02N0201 arc: A0 H00L0000 arc: A3 V00T0000 arc: B0 V00B0000 arc: B3 H00R0000 arc: B5 N1_V01S0000 arc: C0 E1_H01W0000 arc: C3 H00R0100 arc: C5 V02S0001 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D3 S1_V02N0201 arc: D5 H00L0100 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: LSR0 E1_H02W0501 arc: M0 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V02N0001 F0 arc: S1_V02S0501 F5 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W3_H06W0003 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0111010111111101 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C26:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0303 W1_H02E0601 arc: H00R0000 V02N0601 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: W1_H02W0101 V01N0101 arc: H01W0000 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: A4 V00T0100 arc: B0 H01W0100 arc: B4 H00L0000 arc: B5 H02E0101 arc: B6 V02N0701 arc: C0 H00L0000 arc: C1 H00L0100 arc: C4 Q4 arc: C5 V00T0000 arc: C6 V00B0100 arc: C7 V02S0201 arc: CE0 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 V02N0601 arc: D7 H00R0100 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H00R0100 F5 arc: H01W0100 Q1 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: V00B0000 Q4 arc: V00B0100 F5 arc: V00T0000 Q0 arc: V00T0100 Q1 arc: V01S0000 F7 arc: V01S0100 Q6 word: SLICEC.K0.INIT 1110000111111111 word: SLICEC.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 1100001111111111 word: SLICEA.K1.INIT 0000111111111111 word: SLICED.K0.INIT 0011110011111111 word: SLICED.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R6C27:PLC2 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02N0001 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V01N0101 arc: A0 S1_V02N0701 arc: A2 E1_H02W0701 arc: A5 H02W0701 arc: A7 H02E0701 arc: B0 H00R0100 arc: B2 H02E0101 arc: B3 V02N0101 arc: B5 H00L0000 arc: B7 V00B0000 arc: C0 V02N0601 arc: C1 E1_H02W0601 arc: C2 H00L0100 arc: C3 V02N0401 arc: C5 V02N0201 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H01E0101 arc: D2 W1_H02E0001 arc: D3 H02E0001 arc: D5 E1_H02W0201 arc: D7 N1_V02S0401 arc: E1_H02E0101 F3 arc: E1_H02E0201 F2 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 F7 arc: LSR1 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: S3_V06S0003 F0 arc: V01S0100 Q5 arc: W1_H02W0101 F1 arc: W3_H06W0003 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0001010100111111 word: SLICEB.K1.INIT 0011000000000000 word: SLICEA.K0.INIT 1111001111010001 word: SLICEA.K1.INIT 0000111111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C28:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 W1_H02E0401 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: N1_V02N0301 W1_H02E0301 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 N1_V01S0000 arc: V00B0100 H02E0501 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0701 V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: C1 H02W0401 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: F1 F1_SLICE arc: LSR0 H02W0501 arc: LSR1 V00T0000 arc: M4 V00T0100 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: S1_V02S0301 F1 arc: V01S0100 Q4 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R6C29:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02E0201 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H01E0001 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: N1_V02N0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B2 V02N0101 arc: B3 H00R0100 arc: C2 H00L0000 arc: C3 E1_H02W0601 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H02W0001 arc: E1_H01E0001 Q4 arc: E3_H06E0303 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR0 V00B0000 arc: LSR1 V00T0000 arc: M4 V00T0100 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q2 arc: S3_V06S0003 F3 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1110001011000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R6C2:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0601 E3_H06W0303 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 E1_H01W0000 arc: V00B0000 H02E0601 arc: V00T0100 H02W0301 arc: A5 V00T0000 arc: B5 N1_V01S0000 arc: C5 S1_V02N0001 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: E1_H01E0001 Q6 arc: E1_H02E0001 Q2 arc: E1_H02E0201 Q0 arc: E3_H06E0303 F5 arc: F5 F5_SLICE arc: H01W0100 Q6 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00T0100 arc: M2 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: V00T0000 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C30:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 H02W0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0401 arc: N1_V02N0301 S1_V02N0201 arc: S1_V02S0301 H02E0301 arc: S3_V06S0003 H06E0003 arc: V00B0000 W1_H02E0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 S1_V02N0401 arc: N1_V02N0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: A1 E1_H01E0001 arc: A4 V02N0101 arc: A6 N1_V01N0101 arc: B1 N1_V02S0101 arc: B4 H00L0000 arc: B6 N1_V01S0000 arc: C0 V02N0401 arc: C1 H02W0601 arc: C3 N1_V02S0601 arc: C4 H02E0401 arc: C5 V00T0000 arc: C6 H02E0401 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00B0100 arc: D3 H00R0000 arc: D4 V02N0601 arc: D5 H02W0201 arc: D6 H00L0100 arc: D7 V02S0401 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F3 arc: LSR0 W1_H02E0301 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: S1_V02S0101 F3 arc: S1_V02S0401 F6 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R6C31:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0601 V02N0601 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 H01E0101 arc: H00L0000 H02E0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W1_H02W0601 W3_H06E0303 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E1_H02E0401 Q6 arc: E3_H06E0003 Q0 arc: M0 V00B0000 arc: M2 V00B0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: V01S0000 Q2 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C32:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 V01N0001 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 V02S0201 arc: H00L0100 H02W0301 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 H01E0001 arc: V00B0000 H02E0601 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: A1 H01E0001 arc: A2 H01E0001 arc: B1 V02N0101 arc: B2 V02N0101 arc: C1 H00L0000 arc: C2 H00L0000 arc: CE2 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 H02E0001 arc: E1_H01E0101 Q4 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: S1_V02S0401 Q6 arc: V01S0000 Q6 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010111100100011 word: SLICEB.K0.INIT 1010111100100011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R6C33:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 H01E0101 arc: H00L0100 S1_V02N0101 arc: H00R0100 V02N0701 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 H02W0201 arc: S1_V02S0701 V01N0101 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 S1_V02N0301 arc: E3_H06E0303 W3_H06E0303 arc: A1 E1_H02W0701 arc: B1 H00R0100 arc: C1 E1_H01W0000 arc: D1 V00B0100 arc: E1_H01E0001 F3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: H01W0100 F3 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M3 W1_H02E0201 arc: M4 V00T0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: N1_V02N0101 F3 arc: N1_V02N0301 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R6C34:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 H02W0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A0 H01E0001 arc: A4 H02E0701 arc: A5 V00T0000 arc: A7 H02E0501 arc: B0 V02S0301 arc: B4 H00R0000 arc: B5 V02N0501 arc: B7 V02N0701 arc: C0 H00L0000 arc: C4 S1_V02N0001 arc: C5 S1_V02N0201 arc: C7 V00B0100 arc: D0 W1_H02E0001 arc: D4 H00L0100 arc: D5 W1_H02E0201 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: E1_H02E0401 F6 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0100 F5 arc: H01W0000 F5 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M2 V00T0100 arc: M6 N1_V01N0101 arc: N1_V01N0101 F4 arc: N1_V02N0101 F1 arc: S3_V06S0103 F1 arc: V01S0000 F1 word: SLICEC.K0.INIT 1010111100100011 word: SLICEC.K1.INIT 1111010100110001 word: SLICEA.K0.INIT 1101000011011101 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1101000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R6C35:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 W1_H02E0301 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0501 H06E0303 arc: V00B0000 V02N0001 arc: V00B0100 V02S0301 arc: W1_H02W0201 V06S0103 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 V02N0301 arc: A6 V02N0101 arc: A7 V02N0301 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 S1_V02N0501 arc: B6 S1_V02N0501 arc: B7 S1_V02N0501 arc: C0 H02E0401 arc: C1 H02E0601 arc: C2 H02E0601 arc: C3 H02E0401 arc: C4 H02E0401 arc: C6 H02E0401 arc: C7 H02E0601 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 H00L0100 arc: D6 H00L0100 arc: D7 H00L0100 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00B0000 arc: M1 W1_H02E0001 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 V00B0000 arc: M5 W1_H02E0001 arc: M6 V00B0000 arc: S1_V02S0301 F3 arc: S3_V06S0003 F3 word: SLICEA.K0.INIT 1111111101111111 word: SLICEA.K1.INIT 1111111101111111 word: SLICEB.K0.INIT 1111111101111111 word: SLICEB.K1.INIT 1111111101111111 word: SLICEC.K0.INIT 1111111101111111 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111111101111111 word: SLICED.K1.INIT 1111111101111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R6C36:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02S0601 arc: H00L0000 N1_V02S0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: A0 H00L0000 arc: A1 H00L0000 arc: A4 V02S0101 arc: A5 V02S0301 arc: B0 V00B0000 arc: B1 V00B0000 arc: B4 H02E0101 arc: B5 H02E0101 arc: B6 N1_V02S0701 arc: C0 H02E0601 arc: C1 H02E0601 arc: C4 V02S0001 arc: C5 V02S0001 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CE0 S1_V02N0201 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 H00R0100 arc: D7 H02W0001 arc: E1_H01E0101 F7 arc: E1_H02E0301 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0401 F4 arc: S3_V06S0103 Q1 arc: S3_V06S0303 Q6 arc: V01S0000 F1 arc: W3_H06W0103 Q1 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000001100110011 word: SLICED.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0000000011101010 word: SLICEC.K1.INIT 0000000000010101 word: SLICEA.K0.INIT 1111111111111110 word: SLICEA.K1.INIT 1111111111111110 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R6C37:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V01N0001 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0401 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 V01N0101 arc: V00B0000 S1_V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0100 H02E0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V01N0101 arc: B0 W1_H02E0301 arc: B7 N1_V01S0000 arc: C0 V02S0401 arc: C2 V02N0401 arc: C3 H00L0000 arc: C7 V00B0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D7 H00L0100 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M0 H02E0601 arc: M1 H02E0001 arc: M2 H02E0601 arc: M4 V00B0000 arc: MUXCLK2 CLK0 arc: V01S0000 Q4 arc: V01S0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 1111111100001111 word: SLICEB.K1.INIT 1111111100001111 word: SLICEA.K0.INIT 0011111100010101 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C38:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00L0100 H02E0101 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0601 H02E0601 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0003 E3_H06W0003 arc: A2 V00B0000 arc: A3 V00B0000 arc: B2 N1_V02S0101 arc: B3 N1_V02S0101 arc: C2 H00L0100 arc: C3 H00L0100 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00B0100 arc: W1_H02W0301 F3 word: SLICEB.K0.INIT 1111111111111110 word: SLICEB.K1.INIT 1111111111111110 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C39:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 W1_H02E0301 arc: H00R0100 H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 S1_V02N0001 arc: S1_V02S0201 E1_H01W0000 arc: V00B0000 H02E0401 arc: W1_H02W0601 E1_H02W0301 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: A2 V02S0501 arc: A3 V02S0501 arc: B2 V02S0101 arc: B3 V02S0101 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: D2 V02N0201 arc: D3 V02N0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H00R0100 arc: M4 H02E0401 arc: M5 H02E0001 arc: M6 H02E0401 arc: S1_V02S0301 F3 arc: V01S0000 F3 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111111111110 word: SLICEB.K1.INIT 1111111111111110 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C3:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 S1_V02N0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H06W0303 arc: S1_V02S0301 V01N0101 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0301 V02N0301 arc: A1 H01E0001 arc: B1 H02E0101 arc: B3 W1_H02E0101 arc: B7 V00T0000 arc: C1 H00L0000 arc: C3 H00R0100 arc: C7 H02E0601 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 H02E0201 arc: D3 V00T0100 arc: D6 H02E0001 arc: D7 V02N0401 arc: E1_H02E0301 F1 arc: E3_H06E0103 Q2 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R6C40:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02E0301 arc: H00R0000 H02E0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0601 H01E0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 S1_V02N0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 E1_H01W0000 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A0 H00L0000 arc: B0 H02W0101 arc: C0 H00L0100 arc: D0 V02S0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H02W0201 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00B0000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1000110010101111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C41:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 S1_V02N0201 arc: H00R0000 W1_H02E0601 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: V00B0000 W1_H02E0601 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V01N0001 arc: S1_V02S0001 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: A0 N1_V02S0701 arc: A1 N1_V02S0701 arc: A2 N1_V02S0701 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H00R0000 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02E0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00T0100 arc: W1_H02W0301 F3 word: SLICEA.K0.INIT 1010111100100011 word: SLICEA.K1.INIT 1010111100100011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1010111100100011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R6C42:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 H02E0201 arc: H00L0100 H02E0301 arc: H00R0100 H02E0701 arc: N1_V02N0601 H02E0601 arc: S1_V02S0301 E3_H06W0003 arc: V00B0000 H02E0601 arc: V00T0000 H02E0201 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V00T0000 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0100 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 H02E0401 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 W1_H02E0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 H02E0601 arc: M1 H00L0100 arc: M2 H02E0601 arc: M3 H02W0201 arc: M4 V00B0000 arc: M5 H00L0100 arc: M6 V00B0000 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 1010111100100011 word: SLICEA.K1.INIT 1010111100100011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1010111100100011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R6C43:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E3_H06W0103 arc: H00R0100 H02E0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 S3_V06N0003 arc: S1_V02S0301 H06E0003 arc: V00B0100 W1_H02E0501 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02E0101 arc: W1_H02W0201 E1_H02W0701 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: C1 E1_H02W0601 arc: C3 E1_H02W0601 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 V02S0001 arc: D7 H02W0201 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q1 arc: W3_H06W0203 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R6C44:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 V06N0303 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 H02W0001 arc: H00R0100 H02E0501 arc: N1_V02N0301 H06E0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H01E0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 N1_V02S0201 arc: C3 H00L0000 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: S1_V02S0401 Q4 arc: V01S0000 Q0 arc: W3_H06W0003 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R6C45:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0701 E3_H06W0203 arc: V00T0000 V02S0401 arc: V00T0100 H02E0101 arc: W1_H02W0701 V02S0701 arc: E1_H02E0301 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: CE0 H00L0100 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M2 E1_H02W0601 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0401 Q4 arc: V01S0000 Q0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R6C46:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 S1_V02N0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0101 arc: V00T0100 E1_H02W0101 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0101 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A0 V02N0501 arc: A1 H02W0701 arc: A6 S1_V02N0301 arc: A7 H02W0501 arc: B0 E1_H02W0301 arc: B1 H00R0100 arc: B2 E1_H02W0101 arc: B4 E1_H02W0101 arc: B6 E1_H02W0301 arc: B7 H02W0301 arc: C0 N1_V02S0601 arc: C1 W1_H02E0601 arc: C2 H00L0100 arc: C3 V02N0601 arc: C4 V02N0001 arc: C5 V00T0100 arc: C6 V00B0100 arc: C7 V02S0201 arc: D0 S1_V02N0201 arc: D1 H00R0000 arc: D2 W1_H02E0001 arc: D3 V02S0001 arc: D4 V02S0601 arc: D5 S1_V02N0401 arc: D6 F2 arc: D7 N1_V02S0401 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M2 V00B0000 arc: M4 E1_H01E0101 arc: N1_V01N0001 F7 arc: V01S0000 F4 arc: V01S0100 F6 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1000000010101010 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 1111000011111111 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 1111000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R6C47:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: H00L0100 N1_V02S0301 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H02E0501 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A0 H02E0701 arc: A4 F5 arc: A6 W1_H02E0501 arc: A7 H00L0000 arc: B0 V02S0301 arc: B1 N1_V02S0101 arc: B2 H02W0101 arc: B4 N1_V02S0501 arc: B5 V02S0701 arc: B6 E1_H02W0301 arc: B7 V01S0000 arc: C0 V02N0601 arc: C1 V02S0401 arc: C2 V02N0601 arc: C3 H00R0100 arc: C4 H02W0601 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 H02W0401 arc: D0 N1_V02S0001 arc: D1 V02S0001 arc: D2 V00B0100 arc: D3 N1_V02S0001 arc: D4 V00B0000 arc: D5 H00L0100 arc: D6 H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F7 arc: E1_H02E0201 F2 arc: E1_H02E0501 F5 arc: E3_H06E0103 F1 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0100 F1 arc: M2 H02E0601 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: N1_V02N0101 F1 arc: N1_V02N0301 F1 arc: S3_V06S0103 F1 arc: S3_V06S0303 F5 arc: V01S0000 F4 arc: V01S0100 F1 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0011000000000000 word: SLICED.K0.INIT 0000110010101100 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000110000111111 word: SLICEB.K1.INIT 1111000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R6C48:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 E1_H02W0201 arc: H00R0100 H02W0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0601 V06N0303 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0303 S3_V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: A0 S1_V02N0701 arc: A4 F5 arc: A6 F7 arc: B0 F1 arc: B4 H02E0101 arc: B5 N1_V02S0701 arc: B6 V02N0501 arc: B7 N1_V02S0701 arc: C0 H00L0000 arc: C1 H00R0100 arc: C4 S1_V02N0201 arc: C5 H02E0401 arc: C6 V00T0000 arc: C7 H02E0401 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V00B0100 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: D6 H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: E1_H02E0101 F1 arc: E1_H02E0501 F5 arc: E1_H02E0701 F7 arc: E3_H06E0103 F1 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR1 H02E0301 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 F5 arc: N1_V02N0701 F7 arc: S1_V02S0301 F1 arc: S1_V02S0701 F5 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: V01S0100 Q2 arc: W1_H02W0301 F1 arc: W1_H02W0401 F6 arc: W1_H02W0501 F5 arc: W1_H02W0701 F7 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 0000001100000000 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0000000000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R6C49:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 E1_H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S3_V06N0303 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0103 E1_H02W0101 arc: E3_H06E0203 W3_H06E0103 arc: A0 V02N0501 arc: A1 W1_H02E0501 arc: A5 H02E0701 arc: B0 H02E0101 arc: B1 H00R0100 arc: B5 H02W0101 arc: B6 H02E0301 arc: C0 V02N0401 arc: C1 S1_V02N0601 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 V00B0100 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H00R0000 arc: D5 N1_V02S0601 arc: D6 H02E0001 arc: D7 N1_V02S0601 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 H02W0301 arc: M2 V00T0100 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0201 Q2 arc: W3_H06W0003 F0 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000001111001111 word: SLICED.K1.INIT 1111000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C4:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0501 V06S0303 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 H02W0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 S3_V06N0303 arc: V00B0000 H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 E1_H02W0701 arc: A7 N1_V01N0101 arc: B1 H02E0101 arc: B7 V00T0000 arc: C1 E1_H01W0000 arc: C7 S1_V02N0201 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H00R0000 arc: D7 V02N0401 arc: E1_H01E0101 Q2 arc: E3_H06E0003 Q0 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: S1_V02S0201 Q0 arc: V01S0000 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 .tile R6C50:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 H02W0201 arc: H00L0100 H02E0301 arc: H00R0100 H02W0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0001 arc: V00T0100 H02E0101 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A1 W1_H02E0701 arc: A3 V02N0501 arc: A6 H02W0501 arc: A7 N1_V01N0101 arc: B1 H00R0100 arc: B3 N1_V02S0101 arc: B6 V02S0701 arc: B7 F1 arc: C1 V02N0601 arc: C3 S1_V02N0601 arc: C6 V00T0000 arc: C7 V00T0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D3 V02N0201 arc: D6 V02N0401 arc: D7 H00L0100 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0000 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 F3 arc: S3_V06S0303 F6 arc: V01S0000 F7 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000110010101100 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R6C51:PLC2 arc: E1_H02E0501 H01E0101 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 E1_H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02E0501 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 N1_V02S0701 arc: H01W0100 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0003 arc: C3 H02E0601 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E1_H01E0001 F3 arc: F3 F3_SLICE arc: LSR0 E1_H02W0301 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V02N0101 F3 arc: S1_V02S0201 Q0 arc: V01S0100 Q6 arc: W1_H02W0101 F3 arc: W1_H02W0301 Q3 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R6C52:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: H00R0000 V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0101 W1_H02E0101 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0301 arc: V00T0100 V02N0701 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V01N0101 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: H01W0000 Q4 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S3_V06S0303 Q6 arc: V01S0100 Q2 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C53:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 E1_H01W0100 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0101 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02E0701 arc: V00B0000 S1_V02N0001 arc: V00B0100 E1_H02W0501 arc: V00T0100 H02E0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C54:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 V06N0103 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: E3_H06E0103 W1_H02E0201 arc: N1_V02N0101 E1_H01W0100 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 W1_H02E0401 arc: V00B0000 V02S0201 arc: V00T0100 H02W0101 arc: W1_H02W0501 E1_H02W0401 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A5 V00B0000 arc: B5 V02S0501 arc: C5 V02S0001 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D5 V02S0401 arc: F5 F5_SLICE arc: LSR0 H02E0301 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F5 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C55:PLC2 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 H01E0101 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 S1_V02N0501 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: A0 V02N0701 arc: A1 H02E0701 arc: A2 V02N0701 arc: A3 V02S0501 arc: B0 H02E0101 arc: B1 H00R0100 arc: B2 H02E0101 arc: B3 H02W0101 arc: B4 V01S0000 arc: C0 F4 arc: C1 H00L0000 arc: C2 H02E0401 arc: C3 V02N0601 arc: C4 V00B0100 arc: C5 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 E1_H02W0001 arc: D3 H00R0000 arc: D4 H00L0100 arc: D5 V00B0000 arc: E1_H01E0001 F1 arc: E1_H02E0301 F3 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: S1_V02S0401 Q6 arc: S3_V06S0003 F0 arc: S3_V06S0103 F2 arc: S3_V06S0303 Q6 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1000000010101010 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 1000101000001010 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 1111000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R6C56:PLC2 arc: H00L0100 H02E0301 arc: N1_V02N0101 H06E0103 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0501 H02E0501 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0101 N1_V02S0101 arc: E1_H02E0101 W3_H06E0103 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: A0 V02N0701 arc: A1 W1_H02E0501 arc: A2 V02N0701 arc: A3 H02E0501 arc: A5 H02E0501 arc: A6 H02W0701 arc: A7 F5 arc: B0 W1_H02E0101 arc: B1 V02S0101 arc: B2 W1_H02E0101 arc: B3 V02S0101 arc: B5 V02S0701 arc: B6 H01E0101 arc: B7 F1 arc: C0 V02S0401 arc: C1 V02N0401 arc: C2 N1_V01S0100 arc: C3 W1_H02E0601 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 E1_H02W0401 arc: D0 V00B0100 arc: D1 W1_H02E0001 arc: D2 V02S0001 arc: D3 S1_V02N0001 arc: D5 E1_H02W0201 arc: D6 H01W0000 arc: D7 H00L0100 arc: E3_H06E0103 F2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: N1_V01N0101 F3 arc: S3_V06S0003 F0 word: SLICEB.K0.INIT 1000000010101010 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000110010101100 word: SLICED.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C57:PLC2 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 H06E0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02W0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0701 V02N0701 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A3 W1_H02E0701 arc: B0 V02N0301 arc: B3 H00R0100 arc: B6 V00B0000 arc: C0 N1_V02S0401 arc: C1 W1_H02E0401 arc: C3 V02S0401 arc: C6 W1_H02E0601 arc: C7 W1_H02E0401 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 S1_V02N0001 arc: D3 H00R0000 arc: D6 V02S0401 arc: D7 V02N0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: LSR1 V00T0100 arc: M0 E1_H02W0601 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: V01S0100 Q4 arc: W1_H02W0001 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000001111001111 word: SLICED.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 1111000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R6C58:PLC2 arc: S1_V02S0101 W1_H02E0101 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0701 H01E0101 arc: H01W0100 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: H01W0000 Q4 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: S3_V06S0203 Q4 arc: V01S0100 Q4 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R6C59:PLC2 arc: S1_V02S0401 H06E0203 arc: S3_V06S0103 H06E0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 H01E0001 arc: E3_H06E0003 W3_H06E0003 .tile R6C5:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02S0501 arc: H00L0100 V02S0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 H06E0303 arc: V00B0000 E1_H02W0601 arc: V00T0000 N1_V02S0601 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 E1_H02W0701 arc: A0 E1_H02W0501 arc: A2 V00B0000 arc: A3 H00L0100 arc: A4 V00T0000 arc: A5 W1_H02E0701 arc: A6 H02E0501 arc: A7 H02W0501 arc: E1_H01E0101 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 F6 arc: N1_V01N0001 F4 arc: N1_V02N0301 F3 arc: V01S0000 F7 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 1001011010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C60:PLC2 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 W3_H06E0003 .tile R6C62:PLC2 arc: S1_V02S0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 .tile R6C63:PLC2 arc: W3_H06W0003 E3_H06W0303 .tile R6C64:PLC2 arc: E3_H06E0103 W3_H06E0103 .tile R6C65:PLC2 arc: E3_H06E0003 W3_H06E0003 .tile R6C68:PLC2 arc: E3_H06E0103 W3_H06E0003 .tile R6C69:PLC2 arc: W3_H06W0303 E1_H02W0601 .tile R6C6:PLC2 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02E0401 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0001 N1_V01S0000 arc: S3_V06S0103 H01E0101 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E1_H02W0701 arc: A0 H00R0000 arc: A1 H00L0000 arc: A2 V02N0501 arc: A3 V00T0000 arc: A4 N1_V01S0100 arc: A5 V02S0101 arc: A6 H02E0501 arc: A7 V02N0101 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: N1_V01N0101 F4 arc: N3_V06N0003 F3 arc: S1_V02S0201 F2 arc: S1_V02S0501 F7 arc: V01S0000 F0 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C70:PLC2 arc: E1_H02E0101 W3_H06E0103 .tile R6C7:PLC2 arc: H00L0000 V02S0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 V02S0001 arc: V00T0000 E1_H02W0201 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0203 E1_H02W0401 arc: W3_H06W0303 E1_H02W0501 arc: A0 H00L0100 arc: A1 H00L0000 arc: A2 V02N0701 arc: A3 V00B0000 arc: A4 N1_V01S0100 arc: A5 V00T0000 arc: A6 H00R0000 arc: A7 H02W0501 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: N1_V01N0001 F3 arc: N1_V02N0101 F1 arc: N1_V02N0601 F4 arc: V01S0000 F2 arc: V01S0100 F7 arc: W1_H02W0701 F5 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C8:PLC2 arc: E1_H02E0701 V06S0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 V02N0601 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0101 E1_H02W0101 arc: V00B0000 H02W0601 arc: V00T0000 H02W0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E1_H02W0601 arc: A0 H00L0100 arc: A1 N1_V02S0701 arc: A2 V02N0701 arc: A3 V00T0000 arc: A4 V02S0301 arc: A5 V00B0000 arc: A6 H00L0000 arc: A7 H00R0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: N1_V02N0601 F4 arc: S1_V02S0201 F2 arc: S1_V02S0701 F7 arc: S3_V06S0003 F0 arc: V01S0000 F1 arc: W3_H06W0003 F3 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0101101010101010 word: SLICED.K1.INIT 0101101010101010 word: SLICEB.K0.INIT 0101101010101010 word: SLICEB.K1.INIT 0101101010101010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 word: SLICEC.K0.INIT 0101101010101010 word: SLICEC.K1.INIT 0101101010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R6C9:PLC2 arc: H00R0000 V02N0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: V00B0000 H02W0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0303 V06N0303 arc: A0 H00R0000 arc: A1 H02E0701 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: H01W0100 F1 arc: LSR1 V00B0100 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: V00B0100 F5 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0101101010101010 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R7C10:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 V06S0203 arc: H00R0000 H02E0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V01S0000 arc: H01W0000 W3_H06E0103 arc: A0 V02S0501 arc: A2 V02N0701 arc: A3 V00B0000 arc: A4 V02S0101 arc: A5 V02N0301 arc: A6 H02E0501 arc: A7 H00R0000 arc: B2 V01N0001 arc: B3 H02W0101 arc: B4 S1_V02N0501 arc: B5 V00B0100 arc: B6 V02S0701 arc: B7 V02N0501 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0401 F4 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: V01S0100 F2 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R7C11:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02N0201 arc: H00R0000 V02N0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H06W0203 arc: S1_V02S0601 V01N0001 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0601 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0401 V06N0203 arc: E3_H06E0103 W3_H06E0103 arc: A0 H02E0701 arc: A1 H00R0000 arc: A2 V01N0101 arc: A3 V00T0000 arc: A4 N1_V02S0101 arc: A5 V00B0000 arc: A6 V02N0301 arc: A7 H00L0000 arc: B0 V02N0101 arc: B1 S1_V02N0301 arc: B2 H00R0100 arc: B3 V02S0301 arc: B4 S1_V02N0501 arc: B5 V02S0701 arc: B6 N1_V01S0000 arc: B7 V00B0100 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F5 arc: N1_V02N0101 F3 arc: N1_V02N0601 F6 arc: S1_V02S0001 F2 arc: S1_V02S0301 F1 arc: S1_V02S0701 F7 arc: V01S0000 F0 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C12:PLC2 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 E3_H06W0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0701 H01E0101 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 N1_V02S0701 arc: A1 H00L0100 arc: A2 V02N0701 arc: A3 V00T0000 arc: A4 V00B0000 arc: A5 V02S0301 arc: A6 H00R0000 arc: A7 H00L0000 arc: B0 H00R0100 arc: B1 S1_V02N0101 arc: B2 V02N0301 arc: B3 V02S0101 arc: B4 V02N0501 arc: B5 N1_V02S0501 arc: B6 N1_V01S0000 arc: B7 V00B0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F6 arc: N1_V02N0101 F3 arc: N1_V02N0701 F5 arc: S1_V02S0101 F1 arc: S1_V02S0501 F7 arc: S1_V02S0601 F4 arc: V01S0000 F2 arc: V01S0100 F0 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R7C13:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 V02N0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 E3_H06W0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00R0000 arc: A1 H00L0000 arc: A2 V00T0000 arc: A3 V02S0501 arc: A4 V00T0100 arc: A5 V00B0000 arc: A6 V02N0101 arc: A7 E1_H02W0501 arc: B0 H00R0100 arc: B1 S1_V02N0101 arc: B2 V02N0301 arc: B3 H02W0301 arc: B4 V00B0100 arc: B5 S1_V02N0501 arc: B6 V02N0501 arc: B7 H02W0101 arc: E1_H01E0001 F3 arc: E1_H01E0101 F2 arc: E1_H02E0601 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0001 F0 arc: S1_V02S0101 F1 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: V01S0000 F7 word: SLICED.K0.INIT 0110011010101010 word: SLICED.K1.INIT 0110011010101010 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 0110011010101010 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0110011010101010 word: SLICEC.K1.INIT 0110011010101010 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R7C14:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: H00L0100 H02E0101 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H01E0101 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 H02W0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A1 V02N0501 arc: B0 V01N0001 arc: B1 V02N0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D7 H02E0201 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02E0501 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0001 F0 arc: V01S0000 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111100001111 word: SLICEA.K0.INIT 0110011010101010 word: SLICEA.K1.INIT 0110011010101010 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C15:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 S1_V02N0201 arc: N1_V02N0101 V01N0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06W0203 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0401 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 N1_V02S0701 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: C1 H00L0000 arc: C3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 V02S0001 arc: E3_H06E0103 F1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V02N0401 Q6 arc: S1_V02S0301 F1 arc: S3_V06S0103 F1 arc: V00T0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111111100001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R7C16:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 V06N0303 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 S3_V06N0303 arc: A0 E1_H01E0001 arc: A2 H00L0100 arc: A4 N1_V01N0101 arc: A7 E1_H01W0000 arc: B0 H00R0100 arc: B1 E1_H01W0100 arc: B2 H00R0000 arc: B3 V02S0301 arc: B4 S1_V02N0501 arc: B5 E1_H02W0301 arc: B7 H02W0101 arc: C0 V02S0601 arc: C1 H00L0000 arc: C2 V02S0401 arc: C3 N1_V01N0001 arc: C4 W1_H02E0401 arc: C5 V01N0101 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V00T0100 arc: D2 E1_H02W0201 arc: D3 V00B0100 arc: D4 H02E0201 arc: D5 V00B0000 arc: D7 H02W0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q5 arc: S1_V02S0001 F2 arc: V01S0100 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0011111111111111 word: SLICEA.K0.INIT 0000000000000001 word: SLICEA.K1.INIT 0011111111111111 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0011111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R7C17:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 V02N0201 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H02W0601 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V02S0701 arc: W1_H02W0201 W3_H06E0103 arc: A1 E1_H01E0001 arc: B1 V00T0000 arc: C1 H00R0100 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: E1_H01E0001 Q6 arc: F1 F1_SLICE arc: H01W0000 Q4 arc: H01W0100 F1 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M2 H02W0601 arc: M4 V00B0000 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0201 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R7C18:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0203 E3_H06W0103 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0401 Q6 arc: V00T0000 Q2 arc: W1_H02W0601 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R7C19:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 N1_V01S0100 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 V01N0101 arc: A5 W1_H02E0701 arc: A6 V02S0301 arc: B1 H02E0301 arc: B2 H00L0000 arc: B5 W1_H02E0101 arc: B6 H02W0101 arc: B7 S1_V02N0701 arc: C1 H00L0100 arc: C2 V02N0601 arc: C3 H02E0601 arc: C5 V00T0100 arc: C6 V00T0000 arc: C7 S1_V02N0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 S1_V02N0001 arc: D3 H02W0201 arc: D5 H00R0100 arc: D6 E1_H01W0100 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F7 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F1 arc: H01W0100 F5 arc: LSR0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N3_V06N0003 F3 arc: N3_V06N0103 Q2 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0011110011001100 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0001001100000000 word: SLICED.K1.INIT 1100000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R7C20:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 V02N0601 arc: H00L0000 H02W0201 arc: H00L0100 E1_H02W0101 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 H01E0001 arc: W1_H02W0201 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: A1 V01N0101 arc: A3 S1_V02N0501 arc: A7 H00L0000 arc: B0 F1 arc: B1 V02N0301 arc: B2 F3 arc: B3 V01N0001 arc: B5 V02N0501 arc: B7 E1_H02W0301 arc: C0 W1_H02E0401 arc: C1 H02W0401 arc: C2 H00L0100 arc: C3 H02W0401 arc: C5 S1_V02N0201 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 S1_V02N0001 arc: D2 N1_V02S0201 arc: D3 S1_V02N0001 arc: D5 V00B0000 arc: D7 H00R0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F5 arc: S3_V06S0103 Q2 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 0011111111111111 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0011111111111111 word: SLICEB.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R7C21:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 W1_H02E0401 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 E1_H02W0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: A3 E1_H01E0001 arc: B3 E1_H02W0301 arc: C3 V02N0601 arc: C5 V00T0000 arc: C6 V02N0001 arc: C7 F6 arc: CE0 V02N0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: D4 N1_V02S0401 arc: D5 H02E0201 arc: D6 N1_V02S0401 arc: D7 V00B0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 Q6 arc: LSR0 H02W0501 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q0 arc: S1_V02S0101 F3 arc: S3_V06S0303 Q6 arc: V01S0000 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0000000000001111 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1111111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R7C22:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02N0001 arc: H00R0100 V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 V01N0101 arc: S1_V02S0501 V01N0101 arc: S3_V06S0103 H06W0103 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02S0501 arc: N1_V02N0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: A3 V00B0000 arc: B3 H02W0101 arc: C3 H00R0100 arc: CE0 H00L0000 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: F3 F3_SLICE arc: H01W0000 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M4 V00T0000 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: V00B0000 Q6 arc: W1_H02W0101 F3 arc: W1_H02W0201 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R7C23:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 V01N0001 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 E1_H02W0701 arc: N1_V02N0701 W3_H06E0203 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q0 arc: E1_H02E0201 Q2 arc: E1_H02E0601 Q6 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R7C24:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 E3_H06W0103 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V01N0101 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 H00L0100 arc: A2 E1_H01E0001 arc: A3 H02E0501 arc: A4 N1_V01N0101 arc: A7 H02E0501 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 F3 arc: B3 V02N0101 arc: B4 V01S0000 arc: B7 V01S0000 arc: C0 N1_V01S0100 arc: C1 H00L0100 arc: C2 N1_V01N0001 arc: C3 E1_H01W0000 arc: C4 H02E0601 arc: C5 E1_H01E0101 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00T0100 arc: D2 N1_V01S0000 arc: D3 H02W0001 arc: D4 H02E0201 arc: D5 V01N0001 arc: D7 V01N0001 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q5 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0100 Q5 arc: LSR0 W1_H02E0501 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q5 arc: N1_V02N0601 F4 arc: N1_V02N0701 Q5 arc: S1_V02S0001 Q2 arc: V00B0100 Q7 arc: V01S0000 Q1 arc: V01S0100 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111111100001 word: SLICEC.K0.INIT 0011101101111111 word: SLICEC.K1.INIT 1111111100001111 word: SLICEA.K0.INIT 1010111010111111 word: SLICEA.K1.INIT 1111111111000011 word: SLICEB.K0.INIT 0010101001111111 word: SLICEB.K1.INIT 0011101101111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R7C25:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0301 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0501 V02S0501 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A5 V00B0000 arc: B5 V02N0501 arc: C5 V02N0001 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V02N0601 arc: F5 F5_SLICE arc: H01W0000 Q0 arc: LSR0 V00T0000 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M2 H02W0601 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0401 Q6 arc: V00B0000 Q6 arc: W1_H02W0001 Q2 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C26:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0601 N1_V01S0000 arc: H00L0100 H02E0301 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0601 E1_H01W0000 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A2 V02S0501 arc: A4 V00T0100 arc: B0 V02S0101 arc: B2 H02E0301 arc: B3 E1_H02W0101 arc: B4 V00B0100 arc: B5 H02E0301 arc: C0 H00L0100 arc: C1 H00R0100 arc: C2 V02N0601 arc: C3 E1_H02W0601 arc: C4 V02S0201 arc: C5 E1_H01E0101 arc: C6 V00B0100 arc: C7 V00B0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H00R0000 arc: D2 S1_V02N0001 arc: D3 H02W0001 arc: D4 H02E0001 arc: D5 E1_H01W0100 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0401 F4 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00R0000 Q6 arc: H00R0100 Q7 arc: H01W0100 F3 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q3 arc: S1_V02S0001 F0 arc: S1_V02S0501 Q7 arc: S3_V06S0203 F4 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V00T0100 Q3 arc: V01S0000 F1 arc: V01S0100 F1 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 1111000000001111 word: SLICED.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000000000101111 word: SLICEB.K1.INIT 0011000000000000 word: SLICEA.K0.INIT 0000110000000000 word: SLICEA.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 1100001111001011 word: SLICEC.K1.INIT 0000001100110011 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R7C27:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 N1_V01S0100 arc: H00R0000 W1_H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 W1_H02E0201 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06N0303 arc: E3_H06E0303 W3_H06E0203 arc: A3 H02W0501 arc: B0 H02W0101 arc: B3 H00L0000 arc: B4 S1_V02N0701 arc: B5 V01S0000 arc: B6 H02W0101 arc: C0 N1_V01N0001 arc: C1 H00R0100 arc: C3 N1_V01N0001 arc: C4 V02N0201 arc: C5 H01E0001 arc: C6 V00T0000 arc: C7 E1_H01E0101 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H00R0000 arc: D2 Q2 arc: D3 V00B0100 arc: D4 V02N0401 arc: D5 V00B0000 arc: D6 H02W0001 arc: D7 V02S0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q7 arc: E1_H02E0201 Q2 arc: E1_H02E0401 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 F3 arc: H01W0000 F4 arc: H01W0100 F4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F5 arc: N1_V02N0001 Q0 arc: N1_V02N0201 Q2 arc: N1_V02N0301 F1 arc: V00T0000 Q2 arc: V00T0100 F1 arc: V01S0000 F4 arc: V01S0100 F6 arc: W1_H02W0001 Q2 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1111111011111111 word: SLICED.K0.INIT 1111111100110000 word: SLICED.K1.INIT 0000111111110000 word: SLICEC.K0.INIT 0000001100000000 word: SLICEC.K1.INIT 1111111111000000 word: SLICEA.K0.INIT 0011111111000000 word: SLICEA.K1.INIT 1111111111110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R7C28:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0601 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0501 N1_V01S0100 arc: S3_V06S0003 H06W0003 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 H01E0001 arc: E3_H06E0003 W3_H06E0003 arc: A0 E1_H01E0001 arc: A1 H02E0701 arc: A2 H02E0701 arc: A4 H02E0501 arc: A5 V02S0101 arc: B0 N1_V02S0101 arc: B1 H00R0100 arc: B2 H02E0301 arc: B3 H00L0000 arc: B4 E1_H02W0301 arc: B5 V01S0000 arc: C0 S1_V02N0601 arc: C1 H00L0100 arc: C2 H02E0401 arc: C3 S1_V02N0401 arc: C4 V00T0100 arc: C5 V02N0201 arc: C6 V02S0201 arc: C7 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 S1_V02N0201 arc: D2 H00R0000 arc: D3 H02W0001 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 W1_H02E0201 arc: E1_H01E0001 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0100 F7 arc: H01W0100 Q5 arc: LSR0 V00T0000 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V02N0001 F0 arc: N3_V06N0003 F3 arc: N3_V06N0203 F4 arc: S3_V06S0303 F6 arc: V01S0000 F7 word: SLICEC.K0.INIT 1010001110101111 word: SLICEC.K1.INIT 0111000001110111 word: SLICEA.K0.INIT 1010001110101111 word: SLICEA.K1.INIT 0111000001110111 word: SLICEB.K0.INIT 1010000011101100 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R7C29:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02N0501 arc: H00L0000 V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0601 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: A6 H00L0000 arc: A7 N1_V01N0101 arc: B1 V00B0000 arc: B6 V00B0000 arc: B7 H02E0301 arc: C1 E1_H02W0601 arc: C6 S1_V02N0001 arc: C7 V02S0201 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D6 W1_H02E0001 arc: D7 H02E0001 arc: E1_H01E0101 Q4 arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M2 V00B0100 arc: M4 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q2 arc: N3_V06N0103 F1 arc: S1_V02S0401 Q4 arc: V01S0000 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000001100 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0100000011000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R7C2:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: H00R0000 V02N0601 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: A5 V00T0000 arc: B5 V01S0000 arc: C5 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 V02N0401 arc: E1_H02E0701 F5 arc: F5 F5_SLICE arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00B0100 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: V00T0000 Q2 arc: V01S0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C30:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0103 V01N0101 arc: H00L0000 V02N0201 arc: H00R0100 H02W0701 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0701 H06W0203 arc: V00B0100 V02S0301 arc: V00T0100 V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: CE1 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E3_H06E0303 Q6 arc: H01W0000 Q2 arc: H01W0100 Q6 arc: M2 V00B0100 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0001 Q2 arc: S3_V06S0103 Q2 arc: V01S0000 Q2 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C31:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 H02W0201 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0301 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02S0301 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0701 arc: A2 V00B0000 arc: B1 V01N0001 arc: B2 V01N0001 arc: C1 H00L0000 arc: C2 H00L0000 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D2 H02W0001 arc: E1_H01E0001 F1 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q4 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001011110011 word: SLICEB.K0.INIT 1010001011110011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C32:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 W1_H02E0101 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00R0000 arc: A2 N1_V02S0501 arc: A3 N1_V02S0501 arc: A5 W1_H02E0501 arc: B1 V00T0000 arc: B2 H02E0301 arc: B3 H02E0301 arc: B5 V02N0701 arc: C1 V02S0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C5 V02N0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D5 V00B0000 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M4 V00B0100 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: N1_V02N0301 F1 arc: N1_V02N0601 F4 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010001011110011 word: SLICEB.K0.INIT 1010001011110011 word: SLICEB.K1.INIT 1010001011110011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1010001001010001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C33:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 H01E0101 arc: H00R0000 H02E0401 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H01E0101 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02N0001 arc: V00T0000 V02N0601 arc: V00T0100 V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0401 V06N0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: A1 H00R0000 arc: A5 V00T0100 arc: A6 H02E0701 arc: A7 H00L0000 arc: B1 V00B0000 arc: B5 H02E0301 arc: B6 W1_H02E0101 arc: B7 V02N0501 arc: C1 V02N0401 arc: C5 V02N0201 arc: C6 S1_V02N0201 arc: C7 V02S0201 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D5 H02E0201 arc: D6 W1_H02E0201 arc: D7 H02E0001 arc: E1_H01E0101 F1 arc: E1_H02E0201 Q2 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: M2 V00T0000 arc: M4 E1_H01E0101 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q2 arc: N1_V02N0601 F6 arc: N1_V02N0701 F7 arc: S1_V02S0001 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000101011001111 word: SLICED.K0.INIT 1100010011110101 word: SLICED.K1.INIT 1100111101000101 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1101000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C34:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 N1_V01S0000 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0701 V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: A1 H02E0501 arc: A2 H02E0501 arc: A3 H02E0501 arc: A4 H02W0701 arc: A5 H02W0501 arc: A7 V00T0100 arc: B1 W1_H02E0101 arc: B2 W1_H02E0101 arc: B3 W1_H02E0101 arc: B4 S1_V02N0701 arc: B5 H02E0101 arc: B7 V02S0701 arc: C1 N1_V01S0100 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 E1_H01E0101 arc: C5 V00T0000 arc: C7 V00T0000 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H01W0000 arc: D5 V00B0000 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F5 arc: E1_H02E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M6 H02E0401 arc: V01S0000 F4 word: SLICEC.K0.INIT 1001000000000000 word: SLICEC.K1.INIT 1111001101010001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010111100100011 word: SLICEB.K0.INIT 1010111100100011 word: SLICEB.K1.INIT 1010111100100011 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000110000100011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R7C35:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 S3_V06N0203 arc: H00L0100 N1_V02S0101 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 W1_H02E0201 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02E0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 E1_H02W0601 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: A0 H02E0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 H02E0501 arc: A7 V02N0101 arc: B0 H00R0100 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 V02N0701 arc: B7 H02W0101 arc: C0 H00L0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V00B0100 arc: C5 H02E0401 arc: C7 E1_H01E0101 arc: D0 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 E1_H02W0001 arc: D5 H02E0201 arc: D7 H01W0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F5 arc: E1_H02E0301 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F4 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 H02W0601 arc: M6 V00T0100 arc: N1_V01N0001 F6 arc: V01S0100 F6 word: SLICEC.K0.INIT 1010001011110011 word: SLICEC.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000101100000000 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R7C36:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 V02S0601 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 H02E0201 arc: H00L0100 H02W0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0203 E1_H01W0000 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E1_H02W0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A1 H00R0000 arc: A6 H00L0000 arc: B1 V00B0000 arc: B6 W1_H02E0301 arc: C1 H02W0401 arc: C6 V02S0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D6 E1_H02W0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: N1_V02N0401 Q4 arc: S1_V02S0101 F1 arc: V00B0000 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0101011101110111 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C37:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 N1_V02S0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 H02E0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0701 arc: B0 H01W0100 arc: B4 H00R0000 arc: B5 E1_H02W0301 arc: B6 H02E0301 arc: C0 H02E0401 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: C6 H02E0601 arc: C7 W1_H02E0401 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 H02W0201 arc: D7 V02S0601 arc: E1_H01E0001 F7 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F5 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 arc: V00B0100 F5 arc: V01S0000 F6 arc: W1_H02W0101 F1 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000001100110011 word: SLICEC.K1.INIT 0011000011110000 word: SLICED.K0.INIT 0000001100110011 word: SLICED.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 0010101000111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000011111111 word: SLICEB.K1.INIT 1111000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R7C38:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0301 S1_V02N0301 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 E1_H02W0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0001 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 S1_V02N0601 arc: E3_H06E0103 W3_H06E0103 arc: W3_H06W0303 E3_H06W0303 arc: A2 V00T0000 arc: B2 H00R0100 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 H02E0601 arc: C3 V02S0601 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: M0 H02W0601 arc: M1 V01S0100 arc: M2 H02W0601 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111000011111111 word: SLICEA.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 1000000011000000 word: SLICEB.K1.INIT 1111000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R7C39:PLC2 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0301 arc: H00R0100 V02N0701 arc: N1_V02N0201 E1_H01W0000 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 E1_H01W0000 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02W0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 V01N0001 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A3 V00T0000 arc: A7 H00L0000 arc: B2 W1_H02E0301 arc: B3 V02S0301 arc: B4 W1_H02E0301 arc: B5 W1_H02E0301 arc: B7 N1_V01S0000 arc: C2 N1_V01S0100 arc: C3 N1_V02S0601 arc: C4 V00B0100 arc: C5 V00B0100 arc: C7 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 H02W0001 arc: D4 H00L0100 arc: D5 H00L0100 arc: D7 V02N0601 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M2 V00T0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M5 E1_H02W0001 arc: M6 V00T0100 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000111100000011 word: SLICEB.K1.INIT 0000000000110001 word: SLICEC.K0.INIT 0000111100000011 word: SLICEC.K1.INIT 0000111100000011 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011000100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R7C3:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 V06S0003 arc: H00L0100 V02N0301 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 H06W0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0501 N1_V01S0100 arc: A3 V00B0000 arc: B3 N1_V02S0101 arc: C3 H00L0100 arc: CE0 H02W0101 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: E1_H01E0101 F3 arc: E1_H02E0201 Q0 arc: F3 F3_SLICE arc: H01W0000 Q6 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: V00B0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R7C40:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 N1_V02S0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02S0601 arc: S1_V02S0001 E1_H02W0001 arc: S3_V06S0003 E3_H06W0003 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 N1_V01S0000 arc: E3_H06E0103 W3_H06E0003 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A2 S1_V02N0701 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H00R0000 arc: C0 H02W0401 arc: C1 H00L0000 arc: C2 H00L0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M2 V00B0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: M5 W1_H02E0001 arc: M6 V00B0100 word: SLICEA.K0.INIT 1010111100100011 word: SLICEA.K1.INIT 1010111100100011 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1010111100100011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C41:PLC2 arc: H00R0000 H02W0601 arc: H00R0100 V02N0701 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 N1_V02S0401 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: M0 H02E0601 arc: M2 V00T0100 arc: M4 H02E0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V02N0201 Q0 arc: W1_H02W0201 Q2 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R7C42:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0601 V02N0601 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0701 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V01N0001 arc: W1_H02W0601 S1_V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q2 arc: S1_V02S0601 Q4 arc: V01S0000 Q0 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R7C43:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0003 S3_V06N0003 arc: H00R0000 E1_H02W0601 arc: S1_V02S0001 V01N0001 arc: S3_V06S0103 E1_H01W0100 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: CE0 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: M0 H02E0601 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R7C44:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H06W0303 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02S0301 arc: V01S0000 S3_V06N0103 arc: E1_H02E0101 W3_H06E0103 arc: W3_H06W0003 E1_H02W0301 arc: E3_H06E0103 W3_H06E0103 arc: A1 E1_H01E0001 arc: A3 V01N0101 arc: B0 H02W0301 arc: B1 H00R0100 arc: B3 V02N0101 arc: C0 V02S0601 arc: C1 V02N0601 arc: C3 S1_V02N0601 arc: CE0 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 W1_H02E0201 arc: D2 V00T0100 arc: D3 H02E0201 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F2 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q0 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0103 F2 arc: S3_V06S0003 Q0 arc: S3_V06S0103 F1 arc: V00T0100 Q3 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 1010110010100000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111101111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R7C45:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0103 H01E0101 arc: H00L0000 N1_V02S0001 arc: H00R0000 S1_V02N0401 arc: N1_V02N0101 H02W0101 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02S0201 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0701 V02S0701 arc: W1_H02W0601 W3_H06E0303 arc: C1 H02E0601 arc: C3 H02E0601 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D3 H00R0000 arc: E1_H01E0101 Q6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H01W0100 Q4 arc: LSR0 W1_H02E0301 arc: LSR1 V00B0000 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R7C46:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 N1_V01S0000 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02E0601 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 N1_V01S0100 arc: E1_H02E0101 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: A2 V02S0501 arc: A3 S1_V02N0501 arc: A4 H02E0501 arc: A5 V02S0101 arc: A6 V02N0301 arc: A7 V02S0101 arc: B0 V00B0000 arc: B2 H02W0301 arc: B3 E1_H02W0301 arc: B4 E1_H02W0301 arc: B5 H02W0301 arc: B6 E1_H02W0301 arc: B7 H02W0301 arc: C0 H00R0100 arc: C1 H02W0601 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 S1_V02N0201 arc: C7 S1_V02N0201 arc: D0 V00B0100 arc: D1 H00R0000 arc: D2 V02N0001 arc: D3 H02W0001 arc: D4 E1_H01W0100 arc: D5 S1_V02N0601 arc: D6 V02S0601 arc: D7 H00L0100 arc: E1_H02E0701 F7 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: N1_V01N0101 F5 arc: V01S0000 F0 arc: W1_H02W0601 F6 arc: W3_H06W0003 F3 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 1000000010101010 word: SLICED.K0.INIT 1000000010101010 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1000000010101010 word: SLICEC.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 1111000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R7C47:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 H02W0101 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 H06E0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0701 N1_V01S0100 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 S3_V06N0203 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0303 S3_V06N0303 arc: B2 H00R0100 arc: B4 V02N0501 arc: C2 H00L0100 arc: C3 H00R0100 arc: C4 E1_H02W0401 arc: C5 E1_H02W0601 arc: CE0 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 W1_H02E0001 arc: D3 H02E0201 arc: D4 N1_V02S0601 arc: D5 S1_V02N0401 arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0100 F4 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0601 Q6 arc: S3_V06S0003 Q0 arc: S3_V06S0303 Q6 arc: V01S0100 Q6 arc: W1_H02W0001 F2 arc: W1_H02W0201 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 1111000011111111 word: SLICEC.K0.INIT 0000001111001111 word: SLICEC.K1.INIT 1111000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R7C48:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0601 arc: V00B0000 E1_H02W0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A1 E1_H01E0001 arc: A4 S1_V02N0101 arc: A5 V00B0000 arc: A7 N1_V01N0101 arc: B1 W1_H02E0101 arc: B4 H02E0101 arc: B5 H02E0101 arc: B6 S1_V02N0501 arc: B7 H02E0101 arc: C1 S1_V02N0401 arc: C4 V02N0001 arc: C5 V02N0001 arc: C6 V02S0201 arc: C7 V02N0001 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D4 H01W0000 arc: D5 H01W0000 arc: D6 V02N0601 arc: D7 H02W0001 arc: E1_H01E0101 F1 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: S3_V06S0203 F7 arc: S3_V06S0303 Q6 arc: V01S0000 F4 arc: V01S0100 Q6 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111101111110000 word: SLICEC.K0.INIT 1111101111110000 word: SLICEC.K1.INIT 1111101111110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C49:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02S0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02S0601 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0303 S3_V06N0303 arc: A1 W1_H02E0701 arc: A4 E1_H02W0701 arc: A5 N1_V01N0101 arc: A7 V00T0100 arc: B1 V00B0000 arc: B2 H00R0000 arc: B3 H00L0000 arc: B4 H02E0101 arc: B5 V00B0100 arc: B7 V00B0000 arc: C1 H02W0401 arc: C2 H02E0401 arc: C3 H00L0100 arc: C4 V00T0000 arc: C5 N1_V02S0001 arc: C7 V02N0201 arc: D1 V02S0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H01W0000 arc: D5 H00R0100 arc: D7 V02N0401 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: N1_V01N0101 F1 arc: S1_V02S0701 F7 arc: S3_V06S0103 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 0000110010101100 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R7C4:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00R0000 H02W0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: S3_V06S0203 H06W0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: B1 H01W0100 arc: B3 H00L0000 arc: C1 E1_H02W0401 arc: C3 V02S0401 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H00R0000 arc: D2 V02N0001 arc: D3 H00R0000 arc: E1_H01E0001 Q0 arc: E1_H02E0001 Q2 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q2 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R7C50:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0301 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: S1_V02S0001 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: A1 E1_H02W0701 arc: A4 V02N0301 arc: A5 V00B0000 arc: A7 H02E0501 arc: B1 W1_H02E0301 arc: B4 V02S0701 arc: B5 H02E0301 arc: B6 V02N0501 arc: B7 V02S0701 arc: C1 S1_V02N0401 arc: C4 V02N0001 arc: C5 V02N0001 arc: C6 V00T0000 arc: C7 V02N0001 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D4 H01W0000 arc: D5 H01W0000 arc: D6 V02S0601 arc: D7 H01W0000 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q6 arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: MUXCLK3 CLK0 arc: S3_V06S0203 F7 arc: S3_V06S0303 Q6 arc: V01S0100 Q6 arc: W1_H02W0601 Q6 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 1111101111110000 word: SLICEC.K1.INIT 1111101111110000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111101111110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0100000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C51:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: H00L0000 H02E0001 arc: H00R0100 V02N0701 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: V00B0100 H02E0701 arc: V00T0100 V02S0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 S1_V02N0701 arc: E3_H06E0103 W3_H06E0103 arc: A3 V02N0501 arc: B2 V02S0101 arc: B3 W1_H02E0301 arc: C2 H00L0000 arc: C3 V02N0401 arc: CE0 V02N0201 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 E1_H02W0001 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q6 arc: LSR0 H02W0301 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M4 E1_H02W0401 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: S3_V06S0003 F3 arc: S3_V06S0103 F2 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111101111110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R7C52:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 W1_H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02E0301 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 W3_H06E0203 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: LSR0 V00B0100 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M2 E1_H02W0601 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: S3_V06S0303 Q6 arc: V01S0000 Q2 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C53:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: H00L0100 S1_V02N0301 arc: H00R0100 N1_V02S0701 arc: N1_V02N0501 H02E0501 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 H06W0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 N1_V02S0601 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: C5 V00B0100 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V01N0001 arc: D7 H00L0100 arc: E1_H02E0501 F5 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q7 arc: S1_V02S0001 Q0 arc: S1_V02S0501 F5 arc: V01S0000 F5 arc: V01S0100 F7 arc: W1_H02W0701 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R7C54:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 N1_V02S0301 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 N1_V02S0701 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02N0401 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: E1_H01E0101 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 W1_H02E0601 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: S3_V06S0203 Q4 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R7C55:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02N0101 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 N1_V01S0000 arc: E3_H06E0203 W3_H06E0203 arc: A3 V00B0000 arc: B0 V02S0301 arc: B3 H00L0000 arc: C0 H00R0100 arc: C1 N1_V01S0100 arc: C3 H00R0100 arc: CE2 H00L0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H00R0000 arc: D3 H00R0000 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H01W0000 F0 arc: LSR0 H02E0301 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 1111000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R7C56:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 V02N0601 arc: H00L0000 H02W0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06E0203 arc: V00B0000 H02E0401 arc: V00B0100 V02N0301 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 V02S0701 arc: E1_H01E0101 W3_H06E0203 arc: A0 H02E0701 arc: A1 V02S0501 arc: A2 E1_H02W0701 arc: A3 H02E0501 arc: A5 V00B0000 arc: A6 W1_H02E0701 arc: A7 V00T0100 arc: B0 V02S0101 arc: B1 N1_V02S0101 arc: B2 V02S0101 arc: B3 V02N0101 arc: B5 W1_H02E0101 arc: B6 H02E0101 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 V02N0401 arc: C2 W1_H02E0601 arc: C3 H00R0100 arc: C5 V02N0201 arc: C6 S1_V02N0201 arc: C7 H01E0001 arc: D0 H02W0201 arc: D1 H02E0001 arc: D2 V00B0100 arc: D3 V00B0100 arc: D5 S1_V02N0601 arc: D6 H01W0000 arc: D7 H00L0100 arc: E3_H06E0003 F0 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 F7 arc: V00T0100 F1 arc: V01S0000 F5 arc: W3_H06W0103 F2 word: SLICEB.K0.INIT 1000101000001010 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000110010101100 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C57:PLC2 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 H02E0301 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0103 H01E0101 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S3_V06N0303 arc: E3_H06E0203 W3_H06E0103 arc: C7 S1_V02N0201 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D7 E1_H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: LSR1 V00B0000 arc: M0 H02E0601 arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q2 arc: S1_V02S0201 Q0 arc: S1_V02S0701 Q7 arc: S3_V06S0203 Q4 arc: V01S0100 F7 arc: W3_H06W0203 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R7C58:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02N0301 arc: N1_V02N0201 E1_H02W0201 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0401 W3_H06E0203 arc: W3_H06W0103 S3_V06N0103 arc: E3_H06E0303 W3_H06E0203 arc: CE0 E1_H02W0101 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: H01W0000 Q6 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M0 W1_H02E0601 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R7C59:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02S0401 arc: S1_V02S0001 N1_V02S0001 arc: S3_V06S0003 H06E0003 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 .tile R7C5:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 H01E0001 arc: H00L0000 H02E0201 arc: H00L0100 W1_H02E0101 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H06W0303 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0303 H06W0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 E1_H02W0701 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0601 arc: A1 H00L0100 arc: A3 H02E0701 arc: A7 V02N0101 arc: B1 V02S0101 arc: B2 H00L0000 arc: B3 V02S0301 arc: B7 H02E0301 arc: C1 V02N0601 arc: C2 H02E0401 arc: C3 V02S0401 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 H00R0000 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E3_H06E0103 Q2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: V00T0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 0011111111111111 word: SLICEB.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R7C60:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 W1_H02E0401 arc: H00L0000 H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0401 arc: S1_V02S0401 W1_H02E0401 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02S0301 arc: W3_H06W0103 S3_V06N0103 arc: E3_H06E0103 W3_H06E0003 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E3_H06E0303 Q6 arc: LSR0 V00B0000 arc: LSR1 V00B0100 arc: M0 W1_H02E0601 arc: M2 H02W0601 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: S1_V02S0201 Q2 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C61:PLC2 arc: H00R0100 H02E0501 arc: S1_V02S0601 H06E0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0701 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: E3_H06E0103 Q2 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M2 V00T0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: V01S0100 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R7C62:PLC2 arc: S1_V02S0101 H01E0101 arc: W1_H02W0701 V02S0701 arc: E3_H06E0303 W3_H06E0303 .tile R7C63:PLC2 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 .tile R7C64:PLC2 arc: S1_V02S0101 H06E0103 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0301 W3_H06E0003 .tile R7C65:PLC2 arc: W3_H06W0303 E3_H06W0203 .tile R7C66:PLC2 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 .tile R7C67:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R7C68:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R7C69:PLC2 arc: S3_V06S0103 H06E0103 arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 .tile R7C6:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: H00L0000 E1_H02W0201 arc: H00L0100 W1_H02E0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0301 H01E0101 arc: S1_V02S0601 H01E0001 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E3_H06W0303 arc: W3_H06W0303 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: A1 H02E0501 arc: A3 V00T0000 arc: A5 H02W0501 arc: A7 H00L0000 arc: B1 H02E0101 arc: B2 H01W0100 arc: B3 H00R0000 arc: B5 V02N0501 arc: B7 E1_H02W0101 arc: C1 W1_H02E0601 arc: C2 N1_V01N0001 arc: C3 H00R0100 arc: C5 H02E0601 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 S1_V02N0001 arc: D3 H02E0001 arc: D5 H02W0001 arc: D7 H00L0100 arc: E1_H02E0301 F1 arc: E1_H02E0401 F4 arc: E3_H06E0103 Q2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR1 H02E0301 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0011111111111111 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C70:PLC2 arc: S1_V02S0101 H01E0101 arc: S3_V06S0003 H06E0003 .tile R7C7:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 E3_H06W0303 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 N1_V02S0301 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V02N0701 arc: W3_H06W0203 E3_H06W0103 arc: A1 E1_H02W0701 arc: A5 V00T0000 arc: A6 V00T0100 arc: A7 F5 arc: B1 V02N0301 arc: B3 V01N0001 arc: B5 H00R0000 arc: B6 F1 arc: B7 H02E0301 arc: C1 H00L0100 arc: C3 N1_V01S0100 arc: C5 V02S0201 arc: C6 H02E0401 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0201 arc: D2 V02N0001 arc: D3 V01S0100 arc: D5 E1_H02W0201 arc: D6 H01W0000 arc: D7 H00R0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q2 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0401 F6 arc: N1_V02N0601 F6 arc: S1_V02S0401 F6 arc: S3_V06S0303 Q6 arc: V00T0000 Q2 arc: V01S0000 F6 arc: V01S0100 F6 arc: W1_H02W0401 F6 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0111111111111111 word: SLICED.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R7C8:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: H00L0100 V02N0101 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 V06N0003 arc: W3_H06W0303 E3_H06W0203 arc: B5 H00R0000 arc: C5 V00T0100 arc: CE0 V02N0201 arc: CE1 H00L0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D4 H01W0000 arc: D5 V02N0401 arc: E1_H01E0101 Q4 arc: F4 F5C_SLICE arc: H00R0000 Q6 arc: H01W0000 Q0 arc: H01W0100 Q4 arc: LSR1 V00B0100 arc: M0 H02E0601 arc: M2 V00T0000 arc: M4 H02E0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0601 Q4 arc: W1_H02W0001 Q0 arc: W1_H02W0201 Q2 arc: W1_H02W0601 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R7C9:PLC2 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 H02W0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0303 H06W0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0701 H01E0101 arc: E3_H06E0103 W3_H06E0003 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0201 Q2 arc: E3_H06E0003 Q0 arc: H01W0000 Q6 arc: H01W0100 Q4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R8C10:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V06S0003 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0301 H02E0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W3_H06W0103 E3_H06W0103 arc: B1 V02N0101 arc: B3 H02E0301 arc: B5 V00B0100 arc: B7 V00T0000 arc: C1 N1_V01S0100 arc: C3 E1_H02W0401 arc: C5 E1_H02W0401 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D3 V00T0100 arc: D5 H00R0100 arc: D7 V02S0401 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V02N0101 Q3 arc: N1_V02N0501 Q5 arc: V01S0100 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C11:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 W1_H02E0001 arc: H00R0000 W1_H02E0601 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H06W0203 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 S1_V02N0301 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0701 S1_V02N0701 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: H01W0000 Q0 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 E1_H02W0601 arc: M2 H02W0601 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q0 arc: N1_V02N0401 Q6 arc: N1_V02N0601 Q4 arc: V01S0000 Q2 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R8C12:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 S1_V02N0201 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 H06W0203 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0401 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 S1_V02N0701 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: B5 H00R0000 arc: C0 H00L0100 arc: C1 H00L0000 arc: C4 V02S0001 arc: C5 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 S1_V02N0001 arc: D4 V02N0601 arc: D5 V02N0601 arc: D7 H00R0100 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0100 F7 arc: LSR1 H02E0501 arc: M2 V00T0000 arc: M4 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V02N0001 F0 arc: N1_V02N0201 Q2 arc: S3_V06S0103 F1 arc: W1_H02W0001 F0 arc: W3_H06W0003 F0 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 0000111100110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C13:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H06W0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 H06W0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 H02W0401 arc: V00T0000 S1_V02N0601 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: B1 H02E0301 arc: B7 V02S0701 arc: C0 E1_H02W0401 arc: C1 W1_H02E0401 arc: C6 V02S0201 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D5 H00R0100 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 H02E0601 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00B0100 F5 arc: V01S0000 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 0000111100110011 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 0000111100110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R8C14:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 H01E0101 arc: H00R0000 H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: B1 E1_H01W0100 arc: B3 H00R0000 arc: B5 V00B0100 arc: B7 H02E0101 arc: C1 W1_H02E0401 arc: C3 W1_H02E0401 arc: C5 W1_H02E0401 arc: C7 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D1 N1_V01S0000 arc: D3 H02E0001 arc: D5 H00R0100 arc: D7 V00B0000 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q3 arc: N1_V02N0101 Q1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R8C15:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 V06S0303 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0201 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 W1_H02E0301 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: C6 V00B0100 arc: C7 E1_H02W0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D6 H01W0000 arc: D7 H00L0100 arc: E1_H01E0001 Q2 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q2 arc: S1_V02S0501 F7 arc: V01S0000 F7 arc: V01S0100 Q0 arc: W1_H02W0001 Q0 arc: W1_H02W0401 Q4 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R8C16:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 S1_V02N0501 arc: H00L0100 S1_V02N0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H06W0103 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W3_H06W0103 E3_H06W0103 arc: A3 V00B0000 arc: B3 V02S0101 arc: C3 H00L0100 arc: C6 V00B0100 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 W1_H02E0001 arc: D6 W1_H02E0201 arc: D7 V01N0001 arc: E1_H01E0101 F6 arc: E1_H02E0701 F7 arc: E3_H06E0203 F7 arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 Q0 arc: H01W0100 F6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 W1_H02E0601 arc: M4 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F3 arc: V00B0000 Q4 arc: V00B0100 F7 arc: V01S0000 F7 arc: W1_H02W0701 F7 arc: W3_H06W0203 F7 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R8C17:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02S0401 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 V01N0101 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 H01E0101 arc: W3_H06W0203 E3_H06W0203 arc: A0 W1_H02E0501 arc: A1 V02N0701 arc: A4 V00T0000 arc: A5 V02N0101 arc: B0 H02E0301 arc: B1 H00R0100 arc: B3 H00L0000 arc: B4 V02S0501 arc: B5 V01S0000 arc: C0 H00L0100 arc: C1 E1_H01W0000 arc: C3 V02N0401 arc: C4 E1_H01E0101 arc: C5 E1_H02W0601 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H00R0000 arc: D3 H02E0201 arc: D4 V00B0000 arc: D5 V02S0401 arc: D7 V02N0601 arc: E1_H01E0101 F5 arc: E1_H02E0301 Q3 arc: E3_H06E0003 F0 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H00R0100 F7 arc: LSR1 H02W0501 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V01S0000 F7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1010001010101010 word: SLICEA.K1.INIT 0010001000001010 word: SLICEC.K0.INIT 1100010011001100 word: SLICEC.K1.INIT 0010001010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R8C18:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0103 V01N0101 arc: H00L0100 E1_H02W0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V02N0501 arc: S1_V02S0001 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 V01N0101 arc: A1 V01N0101 arc: A4 H02W0501 arc: A5 H02W0501 arc: B0 H02E0101 arc: B1 H02E0101 arc: B4 H00R0000 arc: B5 H00R0000 arc: C0 V02N0601 arc: C1 V02N0601 arc: C4 V02N0001 arc: C5 V02N0001 arc: CE1 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: E1_H01E0001 F0 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: H01W0000 F4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M2 H02E0601 arc: M4 V00B0100 arc: M6 N1_V01N0101 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q2 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0101101011111011 word: SLICEC.K1.INIT 0010100001000100 word: SLICEA.K0.INIT 1011101011101110 word: SLICEA.K1.INIT 1010111111111101 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R8C19:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02W0001 arc: H00R0000 V02N0601 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 H06E0203 arc: V00B0000 V02S0001 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 V06S0103 arc: A7 H00R0000 arc: B7 V02N0501 arc: C7 V00T0000 arc: CE0 H00L0000 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D7 H02E0201 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q2 arc: S1_V02S0501 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1101011100001110 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R8C20:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0401 E3_H06W0203 arc: H00L0100 H02W0301 arc: H00R0100 V02N0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0401 H06W0203 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: W1_H02W0301 V06S0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: C2 V02N0401 arc: C3 H00R0100 arc: CE0 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 H02W0201 arc: D3 N1_V02S0001 arc: E1_H01E0101 F2 arc: E1_H02E0101 F3 arc: E1_H02E0201 F2 arc: E3_H06E0003 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 F2 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q0 arc: N1_V02N0401 Q6 arc: S3_V06S0003 F3 arc: V01S0000 F3 arc: V01S0100 Q6 arc: W1_H02W0001 F2 arc: W1_H02W0101 F3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R8C21:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 H01E0101 arc: H00L0100 V02S0101 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A4 N1_V01N0101 arc: A5 F7 arc: A7 S1_V02N0101 arc: B1 H02W0101 arc: B4 W1_H02E0301 arc: B5 E1_H02W0101 arc: B7 H02W0301 arc: C1 V02S0601 arc: C4 N1_V02S0201 arc: C5 E1_H02W0401 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D4 V02N0401 arc: D5 H00L0100 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: E1_H02E0101 F1 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q5 arc: S1_V02S0301 F1 arc: W1_H02W0101 F1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R8C22:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0001 arc: H00R0100 H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: CE0 H00R0100 arc: CE2 H00L0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R8C23:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V01N0001 arc: H00L0100 H02W0301 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 S3_V06N0103 arc: V00B0000 V02N0201 arc: V00T0100 H02E0101 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A3 V00T0000 arc: B3 H00L0000 arc: B7 V00B0000 arc: C2 H00L0100 arc: C3 H02W0401 arc: C4 E1_H02W0601 arc: C5 S1_V02N0201 arc: C6 H02E0601 arc: C7 W1_H02E0401 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H02W0201 arc: D4 H00R0100 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 W1_H02E0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q0 arc: E1_H02E0101 F3 arc: E1_H02E0701 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0100 F5 arc: H01W0000 F7 arc: H01W0100 F7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F4 arc: N1_V02N0501 F7 arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 arc: S1_V02S0201 F2 arc: S1_V02S0701 F5 arc: S3_V06S0203 F7 arc: V00B0100 F5 arc: V00T0000 Q0 arc: V01S0000 F7 arc: V01S0100 F2 arc: W1_H02W0201 F2 arc: W1_H02W0701 F5 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000000000000111 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000000011110000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0011000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 .tile R8C24:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 S1_V02N0301 arc: V00T0000 H02E0001 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 E1_H02W0601 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: A1 H02W0501 arc: A6 H00L0000 arc: B0 V00T0000 arc: B1 V02S0301 arc: B3 V02N0101 arc: B6 H01E0101 arc: C0 H00L0100 arc: C1 H00R0100 arc: C2 H02W0601 arc: C3 H02E0401 arc: C6 V02N0201 arc: C7 F6 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 W1_H02E0201 arc: D2 S1_V02N0201 arc: D3 V02S0201 arc: D6 V02S0601 arc: D7 H02W0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q4 arc: E3_H06E0003 F3 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F0 arc: M4 E1_H02W0401 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F6 arc: N1_V02N0301 F3 arc: N1_V02N0401 F6 arc: V00T0100 F1 arc: V01S0000 F7 arc: V01S0100 F6 arc: W3_H06W0003 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000110000000000 word: SLICED.K0.INIT 0000000000001000 word: SLICED.K1.INIT 1111111111110000 word: SLICEA.K0.INIT 0011111100000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R8C25:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 H01E0001 arc: E1_H02E0501 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: B1 V02S0101 arc: B4 W1_H02E0101 arc: B5 H00R0000 arc: C0 E1_H02W0601 arc: C1 H02E0601 arc: C3 H00R0100 arc: C4 V00T0100 arc: C5 V02S0001 arc: CE0 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02S0201 arc: D3 V00B0100 arc: D4 S1_V02N0401 arc: D5 V02S0601 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 F0 arc: H00L0100 F3 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: S3_V06S0303 Q5 arc: W1_H02W0401 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 0101011101110111 word: SLICEA.K0.INIT 1111111100001111 word: SLICEA.K1.INIT 0000000000001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R8C26:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 V02N0201 arc: H00R0100 H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 E3_H06W0303 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0001 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 V00B0000 arc: A5 V00B0000 arc: A7 H00R0000 arc: B1 W1_H02E0301 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: B4 H02W0301 arc: B5 H02W0301 arc: B7 V02S0501 arc: C1 H00R0100 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 H02E0601 arc: C5 H02E0601 arc: C7 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D6 N1_V02S0601 arc: D7 V02S0601 arc: E1_H01E0001 F2 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: V01S0000 F7 arc: V01S0100 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0101001100000000 word: SLICEB.K0.INIT 1001100111111011 word: SLICEB.K1.INIT 1110111111001110 word: SLICEC.K0.INIT 1111111111101100 word: SLICEC.K1.INIT 0101101100010011 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0100000101110001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 .tile R8C27:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 V01N0101 arc: V00B0000 V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: B5 W1_H02E0101 arc: B7 E1_H02W0301 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: C7 H01E0001 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 H02E0001 arc: D7 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H02E0701 F5 arc: E3_H06E0203 F7 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 Q0 arc: M0 V00B0000 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: S1_V02S0201 Q2 arc: S1_V02S0701 F5 arc: V00B0100 F5 arc: W1_H02W0701 F5 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001100 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000110000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C28:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0203 V01N0001 arc: H00L0000 H02W0201 arc: H00L0100 V02N0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: V00B0100 H02E0501 arc: V00T0000 H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0301 N1_V02S0301 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A3 H01E0001 arc: B2 H00L0000 arc: B3 S1_V02N0101 arc: B7 V02S0501 arc: C1 H02E0601 arc: C2 W1_H02E0401 arc: C3 H00R0100 arc: C7 H02E0601 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 H00R0000 arc: D7 H01W0000 arc: E1_H01E0001 Q4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V02N0101 F1 arc: N3_V06N0103 F2 arc: S1_V02S0101 F1 arc: V01S0000 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0011111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R8C29:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02W0201 arc: H00L0100 N1_V02S0101 arc: H00R0100 V02N0501 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 V06N0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A0 H02E0701 arc: A2 E1_H01E0001 arc: A4 H02W0701 arc: A7 N1_V01N0101 arc: B0 V02S0101 arc: B2 V02S0301 arc: B4 H00L0000 arc: B7 V02S0701 arc: C0 V02N0401 arc: C1 E1_H02W0601 arc: C2 V02N0401 arc: C3 H00R0100 arc: C4 V00T0000 arc: C5 V00T0100 arc: C6 V00T0100 arc: C7 V00B0100 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 E1_H02W0001 arc: D2 H02W0001 arc: D3 S1_V02N0001 arc: D4 H00L0100 arc: D5 E1_H02W0201 arc: D6 V00B0000 arc: D7 H02W0001 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q1 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: S3_V06S0003 F0 arc: S3_V06S0203 F7 arc: V01S0100 F2 word: SLICEA.K0.INIT 0001001101011111 word: SLICEA.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 0001010100111111 word: SLICEC.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R8C2:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 S1_V02N0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: V00B0100 V02N0301 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q2 arc: LSR0 V00B0100 arc: M2 H02E0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R8C30:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 W1_H02E0201 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0701 H01E0101 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0001 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0601 Q4 arc: V01S0000 Q6 arc: V01S0100 Q2 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R8C31:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V06N0303 arc: E1_H02E0701 N1_V01S0100 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 H06W0303 arc: S1_V02S0401 H02W0401 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: E3_H06E0103 W3_H06E0103 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q2 arc: E1_H02E0601 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R8C32:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 N1_V01S0000 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 V02S0201 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 H06W0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H06W0303 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 S3_V06N0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A1 H01E0001 arc: A2 V00T0000 arc: B1 W1_H02E0101 arc: B2 H00R0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D2 S1_V02N0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q6 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00B0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010111100100011 word: SLICEB.K0.INIT 1010111100100011 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R8C33:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 V02S0601 arc: H00L0000 H02W0001 arc: H00L0100 H02E0101 arc: H00R0100 H02W0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02S0001 arc: V00T0100 W1_H02E0301 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E1_H02W0301 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A1 N1_V02S0701 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 N1_V01N0101 arc: A7 Q7 arc: B1 E1_H01W0100 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 H02E0301 arc: B5 H00R0000 arc: B7 V02N0501 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V00T0100 arc: C5 V02N0001 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 H00R0100 arc: D5 H00L0100 arc: D7 E1_H02W0001 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0100 Q7 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 H01E0001 arc: M1 H02E0001 arc: M2 H02E0601 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q4 arc: N1_V02N0101 F1 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111100101010 word: SLICEC.K0.INIT 1111111100101010 word: SLICEC.K1.INIT 1100110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000110010101111 word: SLICEB.K0.INIT 1000110010101111 word: SLICEB.K1.INIT 1000110010101111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R8C34:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 H02E0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 N1_V02S0401 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 E1_H02W0301 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 H00L0000 arc: A2 V00T0000 arc: A3 V00T0000 arc: B1 V00B0000 arc: B2 H00R0000 arc: B3 H00R0000 arc: B7 H02E0301 arc: C1 N1_V01N0001 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C6 V00T0100 arc: C7 H02E0601 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D6 H01W0000 arc: D7 W1_H02E0201 arc: E1_H01E0001 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00B0100 arc: M4 H02E0401 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F6 arc: N1_V02N0301 F1 arc: N1_V02N0401 Q4 arc: N1_V02N0501 F7 arc: S3_V06S0203 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0000000000110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100010011110101 word: SLICEB.K0.INIT 1100010011110101 word: SLICEB.K1.INIT 1100010011110101 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R8C35:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0003 H01E0001 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A5 H02W0701 arc: A6 S1_V02N0101 arc: A7 H00L0000 arc: B5 W1_H02E0101 arc: B6 V01S0000 arc: B7 V00B0100 arc: C5 S1_V02N0001 arc: C6 H02E0401 arc: C7 V02N0201 arc: D0 V02N0001 arc: D1 V00T0100 arc: D2 H00R0000 arc: D3 H02W0001 arc: D5 V02N0401 arc: D6 H00R0100 arc: D7 H02E0001 arc: E1_H01E0101 F4 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F4 arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: M4 V00T0000 arc: N1_V01N0101 F6 arc: N3_V06N0203 F4 arc: S3_V06S0103 F1 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 1001000000000000 word: SLICED.K1.INIT 1000101011001111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0010000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R8C36:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 S3_V06N0203 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: S3_V06S0103 H06W0103 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 V02N0701 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A1 V02S0701 arc: A5 V00T0100 arc: B0 H00R0100 arc: B1 S1_V02N0101 arc: B2 H00R0100 arc: B3 H00R0100 arc: B5 S1_V02N0501 arc: B7 H02E0101 arc: C0 S1_V02N0601 arc: C1 H00L0000 arc: C2 S1_V02N0601 arc: C3 S1_V02N0601 arc: C5 H02E0401 arc: C6 V00T0000 arc: C7 E1_H02W0401 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D5 V02N0401 arc: D6 H02E0001 arc: D7 H02W0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F4 arc: LSR1 H02W0301 arc: M0 W1_H02E0601 arc: M1 H00R0000 arc: M2 W1_H02E0601 arc: M4 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V02N0301 F1 arc: N3_V06N0203 F4 arc: S1_V02S0501 F7 arc: S1_V02S0601 F6 arc: S3_V06S0203 F4 arc: V01S0000 F4 arc: V01S0100 F7 arc: W1_H02W0501 Q7 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q7 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0000111111001100 word: SLICEB.K0.INIT 1111111100111111 word: SLICEB.K1.INIT 1111111100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1111111100111111 word: SLICEA.K1.INIT 1111000001110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 .tile R8C37:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 H01E0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0103 H01E0101 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 H02E0301 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: A1 H00R0000 arc: B1 V00B0000 arc: C1 V02N0401 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: M0 V00T0100 arc: M1 V01S0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N1_V02N0301 F1 arc: N3_V06N0103 F1 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R8C38:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H06E0203 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H06W0303 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 H02E0501 arc: V00T0000 H02E0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H02W0101 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: H01W0000 Q6 arc: H01W0100 Q2 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0001 Q0 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R8C39:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 V02N0501 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 H01E0001 arc: H00L0000 S1_V02N0001 arc: H00L0100 E1_H02W0301 arc: H00R0100 H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 V01N0101 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0303 E1_H02W0501 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: B1 V00T0000 arc: B5 V00B0100 arc: C0 H00R0100 arc: C1 H02W0601 arc: C3 H00L0000 arc: C4 H02W0401 arc: C5 N1_V02S0201 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02W0201 arc: D3 V00T0100 arc: D4 H00L0100 arc: D5 V02S0601 arc: E1_H02E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: H01W0100 F4 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F3 arc: V00T0000 F0 arc: W3_H06W0103 Q1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 0000000000001111 word: SLICEA.K1.INIT 0000001100110011 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R8C3:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 V02S0601 arc: H00L0000 H02W0001 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 H01E0101 arc: A1 H00R0000 arc: A5 V00T0000 arc: B1 N1_V02S0301 arc: B3 V01N0001 arc: B5 H02E0101 arc: C1 H02E0601 arc: C3 H00L0000 arc: C5 V02N0001 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D2 V00B0100 arc: D3 V00T0100 arc: D5 E1_H02W0001 arc: E1_H01E0001 Q2 arc: E1_H02E0301 F1 arc: E1_H02E0501 F5 arc: E3_H06E0103 Q2 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00R0000 Q6 arc: LSR0 H02W0501 arc: LSR1 H02E0301 arc: M2 V00B0000 arc: M6 N1_V01N0101 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R8C40:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0003 W1_H02E0301 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 N3_V06S0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0601 S3_V06N0303 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A7 V02N0301 arc: B6 V00B0100 arc: B7 H02E0101 arc: C6 V00T0100 arc: C7 V02N0001 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V02N0201 arc: D2 V01S0100 arc: D3 V02S0001 arc: D6 H02E0201 arc: D7 V02N0601 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 V00T0000 arc: M4 H02E0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F6 arc: S3_V06S0203 F7 arc: V00B0100 Q7 arc: V01S0100 Q4 arc: W1_H02W0601 F6 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0011000011110000 word: SLICED.K1.INIT 0000000010111000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R8C41:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 H01E0101 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0601 H02E0601 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 H02E0101 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0501 S1_V02N0501 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0201 arc: D2 H00R0000 arc: D3 V01S0100 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 F1 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R8C42:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 V02N0001 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 H06E0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 E3_H06W0003 arc: V00B0100 V02N0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0501 H01E0101 arc: E1_H02E0101 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 V02N0201 arc: D2 V02S0001 arc: D3 H00R0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0100 F1 arc: M0 H02E0601 arc: M1 H00L0000 arc: M2 H02E0601 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R8C43:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 V02N0001 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 H06E0203 arc: V00B0100 S1_V02N0101 arc: V00T0100 H02E0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 V06N0103 arc: W1_H02W0401 V06N0203 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E1_H02W0301 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V00B0100 arc: D2 V01S0100 arc: D3 V02N0201 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M4 H02W0401 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: V01S0100 Q4 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R8C44:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N3_V06S0203 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 W1_H02E0301 arc: W1_H02W0401 V02N0401 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A3 V02N0701 arc: B0 V02S0101 arc: B1 S1_V02N0301 arc: B2 H01W0100 arc: B3 S1_V02N0101 arc: B4 V02S0501 arc: B5 V02S0701 arc: B6 N1_V02S0501 arc: B7 V00T0000 arc: C0 H00R0100 arc: C1 H00L0100 arc: C2 H02W0601 arc: C3 H02E0401 arc: C4 H02E0601 arc: C5 N1_V02S0201 arc: C6 V02N0001 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V00T0100 arc: D2 H00R0000 arc: D3 H02E0201 arc: D4 V00B0000 arc: D5 E1_H02W0201 arc: D6 E1_H02W0201 arc: D7 E1_H02W0201 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q3 arc: S1_V02S0301 F1 arc: S1_V02S0501 F5 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: V01S0000 F0 arc: V01S0100 F4 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000110000000000 word: SLICEB.K1.INIT 1111111111111110 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R8C45:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 V02N0601 arc: H00L0000 V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 E1_H01W0000 arc: V00T0000 S1_V02N0601 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V01N0001 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0103 S3_V06N0103 arc: E3_H06E0303 W3_H06E0203 arc: A7 H02E0501 arc: B4 H00L0000 arc: B5 V02S0501 arc: B6 V02N0701 arc: B7 H01E0101 arc: C4 V02N0001 arc: C5 S1_V02N0001 arc: C6 V02N0201 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H02W0201 arc: D5 H02W0201 arc: D6 H00L0100 arc: D7 V00B0000 arc: E1_H01E0101 F6 arc: E3_H06E0003 Q0 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V00B0000 F6 arc: V00B0100 F7 arc: V01S0000 Q2 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0011000000000000 word: SLICED.K1.INIT 1100111111001110 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R8C46:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0701 V01N0101 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 V01N0101 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E3_H06W0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0003 E3_H06W0003 arc: A2 V00B0000 arc: B0 H02E0101 arc: B1 V02S0101 arc: B2 H00R0000 arc: B6 H02E0301 arc: B7 E1_H02W0101 arc: C0 V02N0401 arc: C1 H02W0401 arc: C2 H00R0100 arc: C6 H02W0401 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 V02N0001 arc: D6 E1_H02W0201 arc: D7 E1_H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 V00B0100 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S3_V06S0003 F0 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1111111111101100 word: SLICEB.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R8C47:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02N0101 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02S0001 arc: V00T0000 W1_H02E0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 S3_V06N0203 arc: S1_V02S0001 W3_H06E0003 arc: W3_H06W0103 E3_H06W0103 arc: B0 H01W0100 arc: B2 V02S0301 arc: B4 V00B0100 arc: B6 V01S0000 arc: C0 H00R0100 arc: C1 H00L0100 arc: C2 E1_H02W0601 arc: C3 H00L0100 arc: C4 V00T0000 arc: C5 V02N0001 arc: C6 V02S0201 arc: C7 V02N0001 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V02N0201 arc: D2 E1_H02W0001 arc: D3 H02E0001 arc: D4 E1_H02W0001 arc: D5 V00B0000 arc: D6 E1_H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 F5 arc: E1_H02E0701 F5 arc: E3_H06E0003 F3 arc: E3_H06E0103 F1 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q1 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q3 arc: N1_V02N0101 F1 arc: N3_V06N0003 F3 arc: S1_V02S0501 F5 arc: S3_V06S0003 F0 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F6 arc: V00B0100 Q5 arc: V01S0000 Q7 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R8C48:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02E0001 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 H06W0303 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0303 V06S0303 arc: B0 V02N0301 arc: B1 V02S0301 arc: B2 S1_V02N0301 arc: B3 V02S0101 arc: B4 V00B0100 arc: C0 V02S0601 arc: C1 N1_V02S0601 arc: C2 H00L0100 arc: C3 H00L0000 arc: C4 V00T0100 arc: C5 V02N0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0001 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: E3_H06E0003 F3 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR1 E1_H02W0501 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 F5 arc: N3_V06N0303 F5 arc: S3_V06S0003 F0 arc: S3_V06S0103 F2 arc: V00B0100 Q5 arc: W1_H02W0401 F4 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R8C49:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 V02N0001 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02E0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02N0601 arc: E3_H06E0303 W3_H06E0203 arc: B0 H00R0100 arc: B1 V00B0000 arc: B2 V02S0301 arc: B3 N1_V02S0301 arc: B4 S1_V02N0501 arc: B5 S1_V02N0701 arc: B6 E1_H02W0101 arc: B7 V00B0100 arc: C0 H02W0401 arc: C1 H00L0000 arc: C2 E1_H02W0601 arc: C3 H02W0601 arc: C4 V00T0100 arc: C5 S1_V02N0001 arc: C6 V02N0201 arc: C7 V00T0000 arc: D0 E1_H02W0201 arc: D1 H02W0201 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 E1_H01W0100 arc: D5 E1_H01W0100 arc: D6 E1_H01W0100 arc: D7 E1_H01W0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: S1_V02S0501 F7 arc: S3_V06S0003 F3 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 F6 arc: V01S0100 F0 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R8C4:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02E0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 N1_V02S0101 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 S1_V02N0701 arc: A5 V00B0000 arc: B5 S1_V02N0701 arc: C5 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D5 H02E0201 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q2 arc: E1_H02E0701 F5 arc: F5 F5_SLICE arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M2 H02E0601 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R8C50:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 V01N0101 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 H06E0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E1_H01W0100 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: A3 V00B0000 arc: B0 V02S0301 arc: B1 S1_V02N0301 arc: B3 H00R0100 arc: B4 H00R0000 arc: B5 E1_H02W0101 arc: B6 V02S0701 arc: B7 V02S0501 arc: C0 H00L0000 arc: C1 S1_V02N0601 arc: C3 H00L0100 arc: C4 W1_H02E0601 arc: C5 S1_V02N0201 arc: C6 V00T0000 arc: C7 N1_V02S0001 arc: D0 F2 arc: D1 F2 arc: D3 E1_H02W0001 arc: D4 F2 arc: D5 F2 arc: D6 F2 arc: D7 F2 arc: E1_H01E0001 F2 arc: E1_H02E0001 F2 arc: E1_H02E0701 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F2 arc: M2 V00B0100 arc: N1_V02N0001 F2 arc: S1_V02S0201 F2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0100 F2 arc: W1_H02W0001 F2 arc: W1_H02W0201 F2 arc: W3_H06W0003 F0 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000110000001000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R8C51:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 V02S0601 arc: H00L0000 S1_V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H01E0001 arc: S3_V06S0003 H06E0003 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0303 W3_H06E0303 arc: B0 H00R0100 arc: B1 V02S0301 arc: B2 N1_V02S0301 arc: B3 H00R0000 arc: B4 N1_V02S0701 arc: B5 V02S0501 arc: B6 V00B0100 arc: B7 H02W0301 arc: C0 E1_H02W0401 arc: C1 H00L0100 arc: C2 H02E0601 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 H02W0601 arc: C6 V02N0001 arc: C7 S1_V02N0201 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 H02E0001 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F3 arc: S1_V02S0601 F4 arc: S3_V06S0103 F2 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: W1_H02W0401 F6 arc: W3_H06W0103 F1 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R8C52:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W1_H02E0201 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V02N0601 arc: N1_V02N0601 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0701 W3_H06E0203 arc: B6 V01S0000 arc: C3 H00L0100 arc: C5 V00B0100 arc: C6 V02N0201 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: D5 H00R0100 arc: D6 H02E0201 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q5 arc: E1_H02E0701 F5 arc: E3_H06E0303 F5 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: LSR0 V00B0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0501 F7 arc: N3_V06N0203 F7 arc: S1_V02S0501 F5 arc: V01S0000 Q7 arc: V01S0100 Q0 arc: W3_H06W0003 Q3 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R8C53:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 V02S0501 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 V06S0203 arc: H00L0000 H02E0201 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: W3_H06W0303 V06S0303 arc: W3_H06W0103 E3_H06W0003 arc: B0 V00B0000 arc: B1 N1_V02S0101 arc: B2 H02E0101 arc: B3 H00R0000 arc: B4 H02E0301 arc: B5 H01E0101 arc: C0 S1_V02N0401 arc: C1 H00L0000 arc: C2 V02N0601 arc: C3 H02E0601 arc: C4 V00T0100 arc: C5 E1_H02W0401 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 W1_H02E0001 arc: D5 W1_H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: LSR1 H02W0301 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: S1_V02S0001 F0 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S3_V06S0103 F1 arc: V01S0000 F3 arc: V01S0100 F2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C54:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0100 V02S0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 N1_V02S0401 arc: V00B0000 E1_H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0100 E1_H02W0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H02W0301 arc: H01W0000 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: B2 N1_V02S0101 arc: B3 H00R0000 arc: B4 V02S0501 arc: B5 N1_V01S0000 arc: C1 W1_H02E0401 arc: C2 V02S0401 arc: C3 H00L0100 arc: C4 S1_V02N0001 arc: C5 V02N0201 arc: CE0 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V00B0000 arc: D5 V00B0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0301 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0003 F3 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 Q1 arc: W1_H02W0101 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R8C55:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 H01E0001 arc: H00L0100 V02N0101 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 H06E0003 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 E1_H02W0401 arc: S1_V02S0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: B2 H01W0100 arc: B4 V01S0000 arc: B5 N1_V01S0000 arc: B6 V02S0501 arc: C2 H02E0601 arc: C3 H00L0100 arc: C4 V02N0001 arc: C5 V00T0000 arc: C6 S1_V02N0001 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 H02W0001 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E3_H06E0203 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q3 arc: LSR0 E1_H02W0501 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q7 arc: N1_V02N0501 F7 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 Q0 arc: V01S0100 F6 arc: W1_H02W0501 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C56:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0501 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H02E0501 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: A3 V02S0701 arc: B0 V00B0000 arc: B3 V02S0101 arc: B4 V02N0501 arc: B6 V02N0501 arc: C0 S1_V02N0401 arc: C1 H02E0401 arc: C3 S1_V02N0401 arc: C4 V02N0001 arc: C5 H02E0401 arc: C6 V00T0000 arc: C7 V00T0100 arc: D0 S1_V02N0201 arc: D1 H00R0000 arc: D3 S1_V02N0201 arc: D4 V02S0601 arc: D5 V02N0401 arc: D6 V02N0601 arc: D7 H00R0100 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 F4 arc: M0 V00B0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: N1_V01N0001 F3 arc: S1_V02S0201 F0 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 1111000011111111 word: SLICEA.K0.INIT 0000001111001111 word: SLICEA.K1.INIT 1111000011111111 word: SLICED.K0.INIT 0000001111001111 word: SLICED.K1.INIT 1111000011111111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001001101011111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R8C57:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 V02S0201 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0101 H02E0101 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: B0 V02S0101 arc: B1 W1_H02E0301 arc: B2 E1_H01W0100 arc: B3 N1_V02S0301 arc: B4 H00L0000 arc: B5 V02S0501 arc: B6 V00B0000 arc: B7 E1_H02W0101 arc: C0 N1_V02S0601 arc: C1 H02W0601 arc: C2 V02N0601 arc: C3 H02E0401 arc: C4 E1_H02W0401 arc: C5 H02W0401 arc: C6 V00B0100 arc: C7 V00T0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 E1_H02W0201 arc: D5 E1_H02W0201 arc: D6 E1_H02W0201 arc: D7 E1_H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0001 F0 arc: S1_V02S0201 F2 arc: S1_V02S0501 F7 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0100 F6 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R8C58:PLC2 arc: E1_H02E0401 V02N0401 arc: H00R0000 V02S0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: S1_V02S0101 H06E0103 arc: V00B0000 H02E0601 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: E1_H02E0601 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: H01W0100 Q0 arc: LSR0 W1_H02E0501 arc: LSR1 H02W0501 arc: M0 H02E0601 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R8C59:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: H00L0000 V02S0001 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0003 E3_H06W0303 arc: B4 H00R0000 arc: B5 V01S0000 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 V00B0000 arc: E3_H06E0103 Q2 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q6 arc: LSR0 V00T0000 arc: LSR1 H02W0501 arc: M0 H02E0601 arc: M2 W1_H02E0601 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C5:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02E0001 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0101 E1_H02W0101 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0401 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0401 S1_V02N0401 arc: A7 H00L0000 arc: B1 W1_H02E0101 arc: B3 H02E0301 arc: B7 H01E0101 arc: C1 V02S0401 arc: C3 H00R0100 arc: C7 V00B0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H00R0000 arc: D2 V02N0201 arc: D3 H00R0000 arc: D7 E1_H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q2 arc: S1_V02S0201 Q2 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R8C60:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02S0201 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H01E0101 arc: V00B0000 W1_H02E0601 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: E1_H02E0501 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: W3_H06W0203 E1_H01W0000 arc: B2 H00L0000 arc: B3 N1_V02S0101 arc: C2 V02N0601 arc: C3 W1_H02E0401 arc: CE0 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0201 arc: D3 V02N0201 arc: E1_H02E0401 Q4 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0000 arc: LSR1 E1_H02W0501 arc: M0 W1_H02E0601 arc: M4 V00B0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0003 F3 arc: S3_V06S0103 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R8C61:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 E1_H01W0000 arc: E3_H06E0003 V06S0003 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0701 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0100 W1_H02E0101 arc: W1_H02W0401 S1_V02N0401 arc: E1_H01E0101 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q0 arc: E1_H02E0601 Q6 arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 W1_H02E0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R8C62:PLC2 arc: H00L0000 H02W0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0501 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 H01E0101 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: B0 H02W0301 arc: B1 H02E0101 arc: B2 V02S0101 arc: B3 H00R0000 arc: B4 W1_H02E0301 arc: B5 W1_H02E0101 arc: B6 V00B0100 arc: B7 V00T0000 arc: C0 H00L0100 arc: C1 H00R0100 arc: C2 V02N0401 arc: C3 H00L0000 arc: C4 H02E0401 arc: C5 H02W0601 arc: C6 W1_H02E0601 arc: C7 H02W0401 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0201 F0 arc: S1_V02S0701 F5 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: S3_V06S0303 F6 arc: V01S0000 F7 arc: V01S0100 F2 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C63:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0601 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V02N0601 .tile R8C64:PLC2 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0501 arc: V00B0100 H02E0701 arc: H01W0100 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: B0 V02S0301 arc: B1 V02S0101 arc: B2 H00R0000 arc: B3 H00R0100 arc: B4 V02N0501 arc: B5 E1_H02W0301 arc: B6 H02W0101 arc: B7 V00B0100 arc: C0 H02E0601 arc: C1 V02N0401 arc: C2 H00L0000 arc: C3 V02N0601 arc: C4 V02N0201 arc: C5 S1_V02N0201 arc: C6 H02W0401 arc: C7 W1_H02E0401 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: D4 H02E0201 arc: D5 H02E0201 arc: D6 H02E0201 arc: D7 H02E0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0001 F2 arc: S1_V02S0501 F5 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: V01S0000 F0 arc: V01S0100 F4 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 .tile R8C65:PLC2 arc: W1_H02W0401 V02N0401 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0303 E3_H06W0203 .tile R8C66:PLC2 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 .tile R8C67:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 .tile R8C68:PLC2 arc: E3_H06E0003 W3_H06E0003 .tile R8C69:PLC2 arc: E1_H02E0101 W1_H02E0001 .tile R8C6:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02N0201 arc: H00R0000 H02E0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S3_V06S0103 H06W0103 arc: V00B0000 W1_H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 E3_H06W0103 arc: A1 E1_H02W0501 arc: A3 W1_H02E0701 arc: A5 E1_H01W0000 arc: A6 F5 arc: A7 V02N0101 arc: B1 V02N0301 arc: B2 H00R0000 arc: B3 V02S0301 arc: B5 H00L0000 arc: B6 H02E0101 arc: B7 W1_H02E0301 arc: C1 E1_H02W0401 arc: C2 V02S0601 arc: C3 V02N0601 arc: C5 V00T0100 arc: C6 H01E0001 arc: C7 S1_V02N0001 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V01S0100 arc: D3 H02E0001 arc: D5 H00R0100 arc: D6 H00L0100 arc: D7 V00B0000 arc: E3_H06E0103 Q2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0100 F7 arc: LSR1 H02E0301 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V01S0000 F6 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0011111111111111 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R8C70:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 V02N0701 arc: S3_V06S0303 H06E0303 .tile R8C7:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 S1_V02N0501 arc: B5 V01S0000 arc: C5 V02N0201 arc: CE0 H02W0101 arc: CE1 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 V02S0401 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q2 arc: E1_H02E0601 Q4 arc: F4 F5C_SLICE arc: H01W0000 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 W1_H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q4 arc: N1_V02N0601 Q4 arc: V01S0000 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 .tile R8C8:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 N1_V02S0201 arc: H00R0100 H02W0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H02E0401 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 V02S0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: B1 E1_H02W0301 arc: C1 H00L0000 arc: C5 H01E0001 arc: CE1 V02N0201 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0001 arc: D5 H00R0100 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H01W0100 Q0 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M2 H02E0601 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: S1_V02S0401 Q6 arc: S1_V02S0701 F5 arc: V01S0000 Q2 arc: W1_H02W0601 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 .tile R8C9:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V06S0203 arc: H00L0100 S1_V02N0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V01S0100 arc: S3_V06S0103 H06W0103 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0701 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: N1_V02N0101 W3_H06E0103 arc: C0 V02N0401 arc: C1 S1_V02N0401 arc: C4 V00B0100 arc: C5 S1_V02N0001 arc: C6 V00B0100 arc: C7 S1_V02N0001 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02W0201 arc: D4 H02W0001 arc: D5 E1_H02W0201 arc: D6 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q2 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F6 arc: H01W0100 F1 arc: LSR0 V00B0000 arc: M2 H02E0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q2 arc: N1_V02N0001 F0 arc: N1_V02N0401 F6 arc: N1_V02N0501 F7 arc: N3_V06N0003 F0 arc: N3_V06N0103 F1 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0101 F1 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: V01S0000 F1 arc: V01S0100 F6 arc: W1_H02W0201 F0 arc: W1_H02W0501 F7 arc: W1_H02W0601 F4 arc: W1_H02W0701 F5 arc: W3_H06W0003 F0 arc: W3_H06W0103 F1 arc: W3_H06W0203 F4 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R9C10:PLC2 arc: E1_H02E0301 V02S0301 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 E3_H06W0203 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W3_H06W0203 E3_H06W0203 arc: C0 H00L0100 arc: C1 H02E0401 arc: C4 V02N0201 arc: C5 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0001 arc: D4 H00R0100 arc: D5 H02E0001 arc: D7 V02S0401 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H00R0100 F5 arc: H01W0000 F5 arc: H01W0100 F4 arc: LSR1 V00B0100 arc: M2 H02W0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V02N0001 F0 arc: N1_V02N0201 Q2 arc: N1_V02N0601 F4 arc: N3_V06N0103 F1 arc: N3_V06N0303 F5 arc: S3_V06S0303 F5 arc: V00B0100 F7 arc: W1_H02W0001 F0 arc: W1_H02W0101 F1 arc: W3_H06W0003 F0 arc: W3_H06W0103 F1 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R9C11:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: H00R0000 V02N0401 arc: N1_V02N0501 E1_H01W0100 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V01N0001 arc: B1 V00T0000 arc: B3 H02E0301 arc: B5 H00R0000 arc: B7 N1_V01S0000 arc: C1 H02W0401 arc: C3 H02W0401 arc: C5 H02W0401 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D3 V00B0100 arc: D5 V02S0601 arc: D7 V00B0000 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q5 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: N1_V02N0701 Q7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R9C12:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0203 H06W0203 arc: V00B0100 N1_V02S0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: B1 H02E0301 arc: B3 N1_V02S0301 arc: B5 H00R0000 arc: B7 S1_V02N0501 arc: C1 S1_V02N0401 arc: C3 S1_V02N0401 arc: C5 V00T0000 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 V00T0100 arc: D5 H00R0100 arc: D7 H00L0100 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: N1_V02N0501 Q7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R9C13:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 V02S0001 arc: H00R0000 N1_V02S0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0201 H06E0103 arc: S3_V06S0103 H06E0103 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0101 arc: B1 V02S0101 arc: B3 H00L0000 arc: B5 S1_V02N0501 arc: B7 V02S0501 arc: C1 H02E0401 arc: C3 H02E0401 arc: C5 H02E0401 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D3 V00B0100 arc: D5 V00B0000 arc: D7 H00R0100 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q1 arc: N1_V02N0101 Q3 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111110000001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R9C14:PLC2 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02N0401 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 E1_H02W0301 arc: E3_H06E0103 W3_H06E0003 arc: B1 V00T0000 arc: B7 V02S0501 arc: C0 H00L0000 arc: C1 H00L0000 arc: C6 V02S0001 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H00R0000 arc: D3 N1_V02S0201 arc: D6 E1_H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F6 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0100 F3 arc: LSR0 H02E0301 arc: M0 V00B0100 arc: M4 V00B0000 arc: M6 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N3_V06N0203 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 0011001100001111 word: SLICEA.K0.INIT 1111000011111111 word: SLICEA.K1.INIT 0000001111110011 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 .tile R9C15:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 H02W0301 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0401 S3_V06N0203 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: N1_V02N0401 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: B5 V00B0100 arc: C0 N1_V01N0001 arc: C1 H00L0100 arc: C5 V00T0000 arc: C6 E1_H01E0101 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 H00R0000 arc: D5 W1_H02E0001 arc: D6 H00R0100 arc: D7 V02N0601 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR1 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F1 arc: N1_V02N0601 F6 arc: N1_V02N0701 F7 arc: N3_V06N0303 F6 arc: V01S0100 F1 arc: W3_H06W0003 F0 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000011111111 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R9C16:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 H01E0101 arc: H00L0100 H02W0301 arc: H00R0000 V02N0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H01E0001 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02E0701 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0203 E3_H06W0203 arc: A1 E1_H01E0001 arc: B1 E1_H01W0100 arc: B2 H00R0000 arc: C1 H00L0100 arc: C2 H02E0401 arc: C3 E1_H02W0401 arc: C5 V02S0201 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D3 H02W0001 arc: D5 H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 Q3 arc: E1_H02E0001 F2 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0501 Q7 arc: V00T0000 F2 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1111110011111111 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R9C17:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V02N0501 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 S1_V02N0201 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 V01N0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02W0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 N1_V02S0301 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A1 V02S0501 arc: A4 S1_V02N0301 arc: A5 E1_H02W0501 arc: B0 V00B0000 arc: B1 H02E0101 arc: B2 W1_H02E0301 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 V02N0501 arc: C0 H02E0601 arc: C1 V02N0601 arc: C2 H02E0601 arc: C3 H00L0000 arc: C4 V02S0001 arc: C5 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V00T0100 arc: D2 W1_H02E0001 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 E1_H02W0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: E1_H02E0601 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q0 arc: W1_H02W0101 F3 word: SLICEA.K0.INIT 1100000011111111 word: SLICEA.K1.INIT 0001000000000000 word: SLICEB.K0.INIT 1100000011111111 word: SLICEB.K1.INIT 1100111111111111 word: SLICEC.K0.INIT 0100110000000000 word: SLICEC.K1.INIT 0000100100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R9C18:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N3_V06S0203 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 H01E0001 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02S0601 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A6 H00R0000 arc: A7 H00R0000 arc: B6 V00B0100 arc: B7 V00B0100 arc: C6 H02W0401 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D6 H01W0000 arc: D7 H01W0000 arc: E1_H01E0101 Q0 arc: E1_H02E0601 Q4 arc: E3_H06E0003 Q0 arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0100 Q0 arc: M0 V00B0000 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 Q4 arc: S1_V02S0401 F6 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1011101010101010 word: SLICED.K1.INIT 1010101110111000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R9C19:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 W1_H02E0301 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H06E0203 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0501 H01E0101 arc: W3_H06W0303 E3_H06W0203 arc: A1 E1_H01E0001 arc: A2 H02W0501 arc: A7 V02N0301 arc: B1 V00B0000 arc: B2 S1_V02N0101 arc: B7 H02E0301 arc: C1 H00L0100 arc: C2 H02E0401 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 H00R0000 arc: D7 H00R0100 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0000 Q4 arc: H01W0100 F0 arc: M0 V00T0000 arc: M2 V00B0100 arc: M4 W1_H02E0401 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: N1_V02N0601 Q4 arc: S3_V06S0103 F2 arc: V01S0000 Q4 arc: W1_H02W0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1010111111110111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1111111100110111 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R9C20:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 W1_H02E0601 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: B4 H02E0301 arc: C4 V00B0100 arc: C5 H02E0401 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 W1_H02E0001 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 F4 arc: H00R0100 F5 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: M0 V00T0000 arc: M2 V00B0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: N3_V06N0303 F5 arc: S3_V06S0003 Q0 arc: S3_V06S0303 Q6 arc: V01S0100 Q2 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100000000000000 word: SLICEC.K1.INIT 0000000011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R9C21:PLC2 arc: E1_H02E0601 V02N0601 arc: H00L0100 V02S0301 arc: N1_V02N0001 H02W0001 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: CE1 H00L0100 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 V00B0100 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: V01S0000 Q4 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R9C22:PLC2 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H01W0000 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 E3_H06W0303 arc: E1_H02E0601 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 H00L0000 arc: A3 N1_V02S0501 arc: A4 V02S0301 arc: A5 V00T0100 arc: A6 V02N0301 arc: A7 V02N0301 arc: B1 E1_H02W0301 arc: B2 E1_H01W0100 arc: B3 H00R0000 arc: B4 V02S0701 arc: B5 F1 arc: B6 E1_H02W0301 arc: B7 E1_H02W0301 arc: C1 V02N0601 arc: C2 H00L0100 arc: C3 H02W0401 arc: C4 H02W0601 arc: C5 F6 arc: C6 W1_H02E0601 arc: C7 W1_H02E0601 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 V02S0001 arc: D3 V00B0100 arc: D4 W1_H02E0201 arc: D5 H00R0100 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0101 F4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 F3 arc: LSR0 V00B0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 F5 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001000000000 word: SLICEC.K0.INIT 1101000011110000 word: SLICEC.K1.INIT 1100110000001110 word: SLICEB.K0.INIT 0011111111111111 word: SLICEB.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0101100100001001 word: SLICED.K1.INIT 0011101011010111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R9C23:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 N1_V01S0000 arc: H00R0000 H02W0401 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 E1_H02W0201 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0101 arc: V00T0100 V02S0701 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A5 V00T0000 arc: B5 H00R0000 arc: C3 E1_H02W0601 arc: C5 V02N0001 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 V00B0000 arc: E1_H02E0301 F3 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 F3 arc: H01W0100 F5 arc: LSR0 V00B0100 arc: M0 W1_H02E0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F3 arc: N3_V06N0003 F3 arc: V00T0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R9C24:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 V02N0301 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02E0401 arc: V00B0100 H02E0701 arc: V00T0000 V02N0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 E1_H01W0000 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: B1 H02E0101 arc: B5 H02E0101 arc: C0 H02E0601 arc: C1 H00R0100 arc: C4 E1_H01E0101 arc: C5 V00B0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H00R0000 arc: D4 V02N0401 arc: D5 V00B0000 arc: E1_H01E0101 F5 arc: E1_H02E0101 F1 arc: E1_H02E0201 Q2 arc: E1_H02E0501 F5 arc: E1_H02E0601 Q6 arc: E1_H02E0701 F5 arc: E3_H06E0003 F0 arc: E3_H06E0103 F1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: H01W0100 F1 arc: M2 V00T0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0401 F4 arc: N1_V02N0701 F5 arc: S1_V02S0501 F5 arc: S3_V06S0103 F1 arc: S3_V06S0303 F5 arc: V01S0000 F4 arc: W1_H02W0101 F1 arc: W1_H02W0201 Q2 arc: W1_H02W0401 Q6 arc: W3_H06W0103 Q2 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000110000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000110000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R9C25:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 S3_V06N0103 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0501 S3_V06N0303 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0100 V02S0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0601 V02N0601 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: B5 V00B0100 arc: C3 H00R0100 arc: C5 V00T0000 arc: CE0 H00L0100 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D3 V00T0100 arc: D5 H02E0001 arc: E3_H06E0303 Q6 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00L0100 F3 arc: H01W0000 Q5 arc: LSR0 V00B0000 arc: M0 H02W0601 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0401 Q6 arc: S1_V02S0601 Q6 arc: S3_V06S0303 Q6 arc: V00T0000 Q0 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R9C26:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V06N0203 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 W1_H02E0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0501 W1_H02E0501 arc: V00B0000 E1_H02W0401 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 S1_V02N0701 arc: A5 V00T0100 arc: B0 V01N0001 arc: B5 V00B0100 arc: B6 V00B0100 arc: C0 V02N0401 arc: C3 H00R0100 arc: C5 E1_H01E0101 arc: C6 V00T0100 arc: CE1 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D3 V00T0100 arc: D5 H02W0001 arc: D6 H02W0001 arc: D7 H00R0100 arc: E1_H01E0101 Q5 arc: E1_H02E0501 Q5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0100 Q5 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0701 Q5 arc: V00B0100 Q7 arc: V00T0000 F0 arc: V00T0100 Q3 arc: V01S0000 F6 word: SLICED.K0.INIT 1111110000000011 word: SLICED.K1.INIT 0000000011111111 word: SLICEA.K0.INIT 1111111111111110 word: SLICEA.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000011110100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111000000001111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R9C27:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0601 arc: H00R0000 H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 H02E0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 H06E0003 arc: V00B0100 H02W0501 arc: V00T0000 V02N0401 arc: W1_H02W0001 V02N0001 arc: W1_H02W0701 V02S0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 arc: A5 H02E0501 arc: B5 S1_V02N0501 arc: B7 V01S0000 arc: C1 H02W0401 arc: C2 V02N0401 arc: C3 H00L0000 arc: C5 V02N0201 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V02N0201 arc: D3 H02W0201 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q7 arc: E1_H02E0601 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: LSR1 V00T0100 arc: M4 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F2 arc: N3_V06N0103 F2 arc: S1_V02S0001 F2 arc: S1_V02S0401 F4 arc: S3_V06S0103 F2 arc: S3_V06S0203 Q7 arc: V00T0100 F1 arc: V01S0000 Q7 arc: V01S0100 F4 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111111110000 word: SLICEB.K0.INIT 1111000000001111 word: SLICEB.K1.INIT 1111111100001111 word: SLICED.K0.INIT 1111111100001111 word: SLICED.K1.INIT 1100111111001100 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000010000000111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R9C28:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02N0601 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 H01E0001 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 H01E0001 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 H01E0001 arc: S3_V06S0303 H06E0303 arc: V00B0000 H02W0401 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02N0401 arc: S3_V06S0103 W3_H06E0103 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: A7 S1_V02N0101 arc: B5 V00B0100 arc: B7 V00B0000 arc: C4 Q4 arc: C5 H02E0401 arc: C7 W1_H02E0601 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H00R0100 arc: D5 H00R0100 arc: D7 V02N0601 arc: E1_H01E0001 Q2 arc: E1_H02E0701 F7 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: S1_V02S0201 Q0 arc: V00B0100 Q5 arc: W1_H02W0501 Q5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111100001111 word: SLICEC.K1.INIT 1111111111000011 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R9C29:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0303 V06S0303 arc: H00R0000 H02E0601 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H06E0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 H06W0003 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V02S0601 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0701 W3_H06E0203 arc: N1_V02N0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 W1_H02E0501 arc: A2 V02N0501 arc: A3 H01E0001 arc: A4 H02E0701 arc: A5 S1_V02N0301 arc: A6 S1_V02N0101 arc: A7 N1_V01N0101 arc: B0 V00T0000 arc: B1 V02N0101 arc: B2 H00R0000 arc: B3 E1_H02W0301 arc: B4 V02N0701 arc: B5 V02S0501 arc: B6 S1_V02N0501 arc: B7 V00B0100 arc: C0 H00L0100 arc: C1 N1_V01S0100 arc: C2 N1_V01N0001 arc: C3 V02N0401 arc: C4 E1_H01E0101 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0001 arc: D2 V02S0001 arc: D3 W1_H02E0001 arc: D4 H02W0201 arc: D5 V02S0601 arc: D6 W1_H02E0001 arc: D7 E1_H01W0100 arc: E1_H01E0101 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0100 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F6 arc: S3_V06S0203 Q4 arc: W3_H06W0003 Q0 arc: W3_H06W0203 Q7 word: SLICED.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0111111111111111 word: SLICEA.K0.INIT 1000111111111111 word: SLICEA.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 1000111111111111 word: SLICEB.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0111111111111111 word: SLICEC.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R9C2:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 E1_H02W0001 arc: N1_V02N0301 E1_H02W0301 arc: V00B0000 H02E0601 arc: V00T0100 S1_V02N0501 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q4 arc: LSR0 V00T0100 arc: M4 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R9C30:PLC2 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 V02S0001 arc: H00L0100 H02E0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 E1_H01W0100 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0701 V06S0203 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: A1 V02S0701 arc: A4 V02N0101 arc: A5 H02W0701 arc: A7 N1_V01S0100 arc: B1 V00T0000 arc: B4 H00R0000 arc: B5 N1_V02S0701 arc: B6 V01S0000 arc: B7 S1_V02N0501 arc: C0 V02N0601 arc: C1 H00L0000 arc: C4 E1_H01E0101 arc: C5 E1_H02W0601 arc: C6 V01N0101 arc: C7 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V02S0001 arc: D4 V02S0401 arc: D5 H00R0100 arc: D6 H00L0100 arc: D7 V00B0000 arc: E1_H01E0101 F5 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V01S0000 F7 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 1111111111110000 word: SLICEA.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 1000111111111111 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K0.INIT 0011111111111111 word: SLICED.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 .tile R9C31:PLC2 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W1_H02E0001 arc: H00L0100 V02N0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02E0401 arc: S1_V02S0201 H06W0103 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: H01W0100 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q0 arc: E1_H02E0601 Q6 arc: E3_H06E0103 Q2 arc: M0 V00B0000 arc: M2 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S3_V06S0103 Q2 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R9C32:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02N0601 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 V01N0001 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0501 N1_V02S0501 arc: N1_V02N0601 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: B3 H00L0000 arc: C2 N1_V01N0001 arc: C3 H00R0100 arc: CE0 H00L0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0201 arc: D3 V02S0201 arc: E1_H01E0101 Q0 arc: F2 F5B_SLICE arc: H01W0100 Q6 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: S1_V02S0201 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000111111111111 word: SLICEB.K1.INIT 0000111100110011 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 .tile R9C33:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 V02N0101 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H01E0101 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0301 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 H02W0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0501 W3_H06E0303 arc: W3_H06W0203 E1_H02W0401 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 N1_V02S0701 arc: A1 N1_V02S0701 arc: A6 N1_V01S0100 arc: A7 N1_V01S0100 arc: B0 H02E0101 arc: B1 H02E0301 arc: B6 H02E0301 arc: B7 H02E0101 arc: C0 H00L0100 arc: C1 H00L0100 arc: C6 V00B0100 arc: C7 V00B0100 arc: D0 V02N0201 arc: D1 V02N0201 arc: D6 V00B0000 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M3 E1_H02W0201 arc: M4 V00T0000 arc: M5 E1_H02W0001 arc: M6 V00T0000 arc: N1_V02N0301 F3 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000101000000010 word: SLICEA.K1.INIT 1010000000100000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000101000000010 word: SLICED.K1.INIT 1010000000100000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R9C34:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0701 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0601 W3_H06E0303 arc: W3_H06W0103 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A5 H02E0701 arc: A6 V02N0101 arc: B5 S1_V02N0501 arc: B6 H02E0301 arc: B7 V00B0100 arc: C5 N1_V02S0201 arc: C6 V00T0000 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D5 V01N0001 arc: D6 V00B0000 arc: D7 E1_H02W0001 arc: E1_H01E0101 F6 arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q0 arc: M0 V00T0100 arc: M2 W1_H02E0601 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: S3_V06S0203 Q7 arc: V01S0000 F7 arc: V01S0100 Q7 arc: W1_H02W0001 Q2 arc: W1_H02W0501 F7 arc: W1_H02W0601 F4 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0000111111001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R9C35:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 W1_H02E0001 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 V01N0001 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02W0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 W1_H02E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A1 H02W0501 arc: A5 V00B0000 arc: B1 S1_V02N0101 arc: B5 H00R0000 arc: C1 S1_V02N0601 arc: C5 V02N0201 arc: CE1 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D5 V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: E1_H02E0601 F4 arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: H01W0000 Q6 arc: H01W0100 F4 arc: M2 V00T0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0601 F4 arc: S3_V06S0203 F4 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 arc: W1_H02W0401 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R9C36:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06W0003 arc: V00B0100 H02W0701 arc: V00T0100 V02S0501 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0101 W3_H06E0103 arc: W3_H06W0003 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: A3 H00L0100 arc: A7 S1_V02N0301 arc: B2 S1_V02N0301 arc: B3 E1_H01W0100 arc: B4 H00L0000 arc: B5 H00L0000 arc: B7 E1_H02W0101 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 V00T0100 arc: C5 V00T0100 arc: C7 V00T0100 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 E1_H02W0001 arc: D5 E1_H02W0001 arc: D7 E1_H02W0001 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H02W0201 arc: M4 V00B0100 arc: M5 H00R0000 arc: M6 V00B0100 arc: S1_V02S0301 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000011000011 word: SLICEC.K1.INIT 0000000011000011 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000010000100 word: SLICEB.K0.INIT 0000000011000011 word: SLICEB.K1.INIT 0000000000100001 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 .tile R9C37:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 V02N0101 arc: H00R0100 H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 V01N0101 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 V02N0501 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: W3_H06W0203 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0303 E3_H06W0303 arc: A2 E1_H02W0701 arc: A5 N1_V02S0301 arc: A6 V02N0301 arc: B0 V00T0000 arc: B1 V02S0301 arc: B2 S1_V02N0101 arc: B3 H00R0100 arc: B5 V02S0501 arc: B6 N1_V02S0701 arc: B7 S1_V02N0501 arc: C0 N1_V01N0001 arc: C1 H00L0100 arc: C2 V02S0601 arc: C3 H02W0601 arc: C5 V02N0201 arc: C6 E1_H02W0401 arc: C7 V02S0001 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00T0100 arc: D2 V02N0001 arc: D3 V02N0001 arc: D5 H02E0201 arc: D6 V01N0001 arc: D7 E1_H02W0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F1 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 F5 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: S3_V06S0003 Q0 arc: V00B0100 F7 arc: V01S0000 F2 arc: V01S0100 Q3 arc: W1_H02W0701 F7 arc: W3_H06W0003 Q3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1100000001000100 word: SLICED.K1.INIT 0011000011110000 word: SLICEA.K0.INIT 0000001100110011 word: SLICEA.K1.INIT 0011111100000000 word: SLICEB.K0.INIT 1100000001000100 word: SLICEB.K1.INIT 0000111111001100 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R9C38:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 S1_V02N0201 arc: H00L0100 S1_V02N0301 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 N1_V02S0201 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A3 V00B0000 arc: A6 V00T0100 arc: A7 V02N0101 arc: B1 H00R0100 arc: B3 V02S0301 arc: B4 V02S0501 arc: B6 V00B0100 arc: B7 H02W0101 arc: C1 H02E0601 arc: C3 N1_V01N0001 arc: C4 H02W0601 arc: C5 V02S0001 arc: C6 V01N0101 arc: C7 E1_H02W0401 arc: CE0 S1_V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D3 V02S0201 arc: D4 V02S0401 arc: D5 H00L0100 arc: D6 N1_V02S0401 arc: D7 H02E0001 arc: E1_H01E0001 F5 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0201 F2 arc: V00B0100 F7 arc: V01S0000 F6 arc: V01S0100 F4 arc: W3_H06W0103 Q1 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111111001100 word: SLICEC.K0.INIT 0000001100110011 word: SLICEC.K1.INIT 0000000011110000 word: SLICED.K0.INIT 0000000000001101 word: SLICED.K1.INIT 1111110100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0101011101110111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R9C39:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 H02E0001 arc: H00L0100 N1_V02S0301 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: V00B0000 S1_V02N0001 arc: V00T0100 V02S0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02N0701 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A5 E1_H02W0701 arc: B0 V00T0000 arc: B1 H00R0100 arc: B3 V02N0101 arc: B5 E1_H02W0101 arc: C0 N1_V01N0001 arc: C1 H02E0601 arc: C2 H02E0401 arc: C3 H00L0000 arc: C5 V02S0201 arc: CE0 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00T0100 arc: D2 H02E0001 arc: D3 N1_V02S0201 arc: D5 H00L0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F5 arc: S1_V02S0001 F2 arc: S1_V02S0301 F3 arc: V00T0000 F2 arc: V01S0100 F1 arc: W1_H02W0001 F0 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0011000011110000 word: SLICEA.K0.INIT 0000001100110011 word: SLICEA.K1.INIT 0011111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 .tile R9C3:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 H02E0001 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 E1_H01W0100 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02N0101 arc: V00T0100 N1_V02S0701 arc: A5 V00T0000 arc: B3 H01W0100 arc: B5 V01S0000 arc: C3 H00L0000 arc: C5 V00B0100 arc: CE0 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 H01E0101 arc: D3 V00T0100 arc: D5 E1_H01W0100 arc: E1_H01E0001 Q2 arc: E3_H06E0103 Q2 arc: E3_H06E0303 F5 arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 W1_H02E0601 arc: M2 H02W0601 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: V00T0000 Q0 arc: V01S0000 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 .tile R9C40:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: H00R0000 H02W0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0100 H02W0301 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00T0100 arc: D2 V02S0201 arc: D3 E1_H02W0201 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: H01W0000 F1 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00B0100 arc: M4 V00B0000 arc: MUXCLK2 CLK0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R9C41:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V02N0701 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0601 H02W0601 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 E1_H02W0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 H01E0101 arc: E1_H01E0101 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q0 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 E1_H02W0401 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: V01S0100 Q2 arc: W1_H02W0601 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R9C42:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 W1_H02E0701 arc: H00R0000 H02E0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H02W0501 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 V02S0101 arc: V00T0100 V02N0701 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 H01E0001 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0303 E1_H02W0601 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: CE2 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02E0201 arc: D2 V02N0001 arc: D3 V01S0100 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V01S0000 Q4 arc: V01S0100 Q6 arc: W1_H02W0301 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R9C43:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 H02W0101 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0701 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: S1_V02S0601 W3_H06E0303 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: M0 V00T0100 arc: M2 H02W0601 arc: M4 H02W0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0201 Q2 arc: W1_H02W0001 Q0 arc: W3_H06W0203 Q4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C44:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0601 H01E0001 arc: E3_H06E0003 H01E0001 arc: H00L0000 V02S0001 arc: H00L0100 H02W0101 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H01E0001 arc: N3_V06N0303 S3_V06N0203 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A1 H02E0701 arc: A6 E1_H02W0501 arc: A7 H02E0701 arc: B0 V00B0000 arc: B1 H00R0100 arc: B2 H01W0100 arc: B3 W1_H02E0101 arc: B4 V02N0701 arc: B5 W1_H02E0301 arc: B6 V00T0000 arc: B7 H02E0301 arc: C0 H00L0000 arc: C1 V02N0601 arc: C2 H00L0000 arc: C3 N1_V02S0601 arc: C4 V02S0001 arc: C5 H02E0601 arc: C6 V00B0100 arc: C7 F6 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 W1_H02E0201 arc: D2 V02N0201 arc: D3 H01E0101 arc: D4 H00L0100 arc: D5 H01W0000 arc: D6 H02E0201 arc: D7 V02S0601 arc: E1_H02E0501 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q1 arc: S1_V02S0301 Q1 arc: S3_V06S0103 F2 arc: V01S0000 Q3 arc: V01S0100 Q5 arc: W3_H06W0003 F0 arc: W3_H06W0103 Q1 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 0000110011111111 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111111111111000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111110011111111 word: SLICED.K0.INIT 1000000010101010 word: SLICED.K1.INIT 0000000000000111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R9C45:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: H00L0100 E1_H02W0301 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 H02E0001 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0701 S1_V02N0701 arc: E1_H02E0401 W3_H06E0203 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: A4 V00B0000 arc: A5 V00T0000 arc: B4 V02N0701 arc: B5 H02W0301 arc: B7 V02S0501 arc: C1 H02E0601 arc: C3 H02E0601 arc: C4 H02W0401 arc: C5 H02E0601 arc: C7 V02N0201 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0001 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 W1_H02E0001 arc: D7 V02S0601 arc: E3_H06E0203 Q4 arc: E3_H06E0303 F5 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N3_V06N0203 Q4 arc: S3_V06S0203 F7 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1111111111111110 word: SLICEC.K1.INIT 0000110010101100 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R9C46:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 W1_H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0301 E1_H02W0301 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0103 V06N0103 arc: A0 V02S0701 arc: A1 S1_V02N0501 arc: A6 N1_V01N0101 arc: B0 E1_H02W0101 arc: B1 W1_H02E0101 arc: B3 H00L0000 arc: B4 H00R0000 arc: B6 E1_H02W0101 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 E1_H01W0000 arc: C2 H00R0100 arc: C3 H02E0601 arc: C4 V00B0100 arc: C5 H02W0601 arc: C6 F4 arc: C7 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V02S0201 arc: D2 V01S0100 arc: D3 V02N0001 arc: D4 V02S0601 arc: D5 H02W0201 arc: D6 E1_H02W0201 arc: D7 N1_V02S0601 arc: E1_H01E0101 F3 arc: E1_H02E0201 F2 arc: E1_H02E0701 Q7 arc: E3_H06E0203 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q7 arc: LSR0 E1_H02W0501 arc: M4 H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q7 arc: N1_V02N0001 F0 arc: N1_V02N0501 Q7 arc: N3_V06N0203 Q7 arc: S1_V02S0701 Q7 arc: V01S0000 F1 arc: V01S0100 F3 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 1000101000001010 word: SLICED.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 1000000010101010 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000110000000000 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 1111000011111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R9C47:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02S0501 arc: E3_H06E0103 V06S0103 arc: E3_H06E0303 V06S0303 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0303 H06W0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0601 arc: H01W0000 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: A2 W1_H02E0701 arc: A3 V00B0000 arc: A6 V02S0101 arc: B2 W1_H02E0101 arc: B3 H00R0000 arc: B6 V02S0701 arc: C2 H00L0100 arc: C3 V02N0401 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 H02E0201 arc: D6 H02W0001 arc: D7 W1_H02E0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E3_H06E0003 F3 arc: E3_H06E0203 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0100 Q4 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F3 arc: V01S0000 Q4 arc: W3_H06W0003 F3 arc: W3_H06W0203 Q4 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100000011000100 word: SLICEB.K1.INIT 0000001100010011 word: SLICED.K0.INIT 0000111100001110 word: SLICED.K1.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R9C48:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 H01E0001 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 S1_V02N0701 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0203 W3_H06E0103 arc: A4 N1_V01N0101 arc: A7 N1_V01N0101 arc: B0 V00B0000 arc: B2 H01W0100 arc: B4 H02E0301 arc: B7 H02E0301 arc: C0 S1_V02N0401 arc: C1 H02W0601 arc: C2 H00L0000 arc: C3 E1_H01W0000 arc: C4 V02S0201 arc: C5 H02E0401 arc: C6 V02N0201 arc: C7 V02S0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 W1_H02E0001 arc: D2 V02S0001 arc: D3 V02N0001 arc: D4 H00R0100 arc: D5 H00L0100 arc: D6 H01W0000 arc: D7 H00R0100 arc: E1_H01E0001 F3 arc: E1_H02E0201 F0 arc: E3_H06E0003 F3 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q5 arc: N3_V06N0003 F3 arc: S3_V06S0103 F2 arc: W1_H02W0601 F4 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1010000010001000 word: SLICEC.K1.INIT 1111111111110000 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 0000101000100010 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 1111000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R9C49:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V06N0203 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 E1_H02W0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0501 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: W1_H02W0101 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: A3 E1_H02W0701 arc: A4 V00B0000 arc: A5 N1_V01N0101 arc: A7 E1_H02W0701 arc: B3 V02S0101 arc: B4 H01E0101 arc: B5 N1_V02S0701 arc: B7 V02S0701 arc: C3 H00L0100 arc: C4 H02E0401 arc: C5 V01N0101 arc: C7 V02S0201 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 H02E0001 arc: D7 S1_V02N0401 arc: E3_H06E0203 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: N1_V01N0101 F3 arc: N1_V02N0501 F7 word: SLICEC.K0.INIT 0000110010101100 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R9C4:PLC2 arc: H00L0000 V02S0201 arc: H00L0100 H02E0301 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 E1_H02W0301 arc: A1 E1_H01E0001 arc: B1 V02S0101 arc: C1 H00L0000 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H01E0001 Q4 arc: F1 F1_SLICE arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M2 E1_H02W0601 arc: M4 V00T0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: S1_V02S0301 F1 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R9C50:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 W1_H02E0101 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H02E0501 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: V00B0100 V02N0101 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0201 V06N0103 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02S0601 arc: E1_H02E0401 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: A1 H00L0100 arc: A5 V02S0101 arc: A6 V00T0100 arc: A7 V02S0301 arc: B1 H01W0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C1 W1_H02E0601 arc: C5 V02S0201 arc: C6 V02S0201 arc: C7 V02S0201 arc: D1 V02N0001 arc: D5 H01W0000 arc: D6 H01W0000 arc: D7 H01W0000 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 H02E0601 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111101111110000 word: SLICED.K0.INIT 1111101111110000 word: SLICED.K1.INIT 1111101111110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R9C51:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 H02E0601 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 E3_H06W0203 arc: V00B0000 H02E0401 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 E1_H02W0601 arc: E1_H01E0001 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: A1 H00L0000 arc: B0 V02S0301 arc: B1 H02E0101 arc: B2 E1_H02W0301 arc: B3 V02S0101 arc: C0 H02E0601 arc: C1 V02S0401 arc: C2 H00L0100 arc: C3 H02W0601 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H01E0101 arc: D2 H00R0000 arc: D3 H00R0000 arc: E1_H02E0301 F1 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: LSR1 V00B0000 arc: M4 W1_H02E0401 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0601 Q6 arc: S3_V06S0003 F3 arc: S3_V06S0103 F2 arc: S3_V06S0203 Q4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111101111110000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 .tile R9C52:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 H01E0001 arc: H00L0100 V02N0301 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0601 V06N0303 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: H01W0000 Q0 arc: LSR0 V00B0100 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 arc: V01S0000 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C53:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02S0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H02W0601 arc: S1_V02S0401 H02W0401 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 E1_H02W0501 arc: V00T0000 S1_V02N0601 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 S3_V06N0303 arc: E1_H02E0501 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: A6 H02E0701 arc: A7 H02W0701 arc: B2 H02E0101 arc: B3 V02N0301 arc: B4 V00B0100 arc: B6 H02W0101 arc: B7 E1_H02W0301 arc: C1 W1_H02E0401 arc: C2 H02E0601 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 V00B0100 arc: C6 V02N0001 arc: C7 N1_V02S0201 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 H02E0201 arc: D3 H02E0201 arc: D4 H02W0001 arc: D5 V02N0601 arc: D6 V00B0000 arc: D7 W1_H02E0001 arc: E1_H01E0001 F1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F6 arc: LSR1 H02W0301 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0101 F3 arc: S3_V06S0103 F2 arc: V00B0000 F4 arc: V01S0100 Q1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1000000010101010 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0000110000111111 word: SLICEC.K1.INIT 1111000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R9C54:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 H01E0001 arc: H00L0100 V02N0301 arc: H00R0100 H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 W1_H02E0401 arc: V00T0100 H02W0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 V06S0203 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: A2 W1_H02E0701 arc: A3 V02S0501 arc: A4 H02W0701 arc: A5 N1_V01N0101 arc: A7 N1_V02S0301 arc: B0 H00R0100 arc: B2 E1_H02W0101 arc: B3 H02E0301 arc: B4 W1_H02E0301 arc: B5 V00B0100 arc: B7 H02E0101 arc: C0 H02W0401 arc: C1 H00R0100 arc: C2 H00L0100 arc: C3 H02E0601 arc: C4 V00T0100 arc: C5 H02W0601 arc: C7 E1_H02W0601 arc: D0 N1_V02S0201 arc: D1 V02S0001 arc: D2 E1_H02W0201 arc: D3 V01S0100 arc: D4 H02W0201 arc: D5 W1_H02E0001 arc: D7 H02E0201 arc: E1_H01E0001 F5 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: M0 V00B0000 arc: N1_V01N0101 F3 arc: S1_V02S0201 F2 arc: V00B0100 F7 word: SLICEC.K0.INIT 0000110010101100 word: SLICEC.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 1000000010101010 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000110000111111 word: SLICEA.K1.INIT 1111000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R9C55:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02N0401 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0100 V02S0701 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0701 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0501 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0103 V06S0103 arc: E3_H06E0203 W3_H06E0203 arc: A1 V02N0701 arc: A2 W1_H02E0701 arc: A3 H02W0501 arc: A4 W1_H02E0701 arc: A5 W1_H02E0501 arc: A6 F5 arc: A7 H02E0701 arc: B1 V02S0101 arc: B2 V02N0101 arc: B3 H00R0000 arc: B4 H02E0101 arc: B5 H00L0000 arc: B6 F1 arc: B7 V00B0000 arc: C1 S1_V02N0601 arc: C2 H02E0401 arc: C3 H00L0100 arc: C4 E1_H02W0601 arc: C5 E1_H02W0601 arc: C6 E1_H01E0101 arc: C7 H02W0401 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 S1_V02N0201 arc: D4 E1_H02W0001 arc: D5 N1_V02S0601 arc: D6 V02N0601 arc: D7 H02W0001 arc: E1_H01E0101 F3 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: V01S0000 F7 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1000000010101010 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1000000010101010 word: SLICEC.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R9C56:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V06N0203 arc: H00L0000 H02E0001 arc: H00R0000 H02E0601 arc: H00R0100 W1_H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06E0003 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S3_V06N0203 arc: H01W0100 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: A0 E1_H02W0501 arc: A1 H00L0000 arc: A4 H02W0701 arc: A5 N1_V01N0101 arc: A7 E1_H02W0701 arc: B0 W1_H02E0101 arc: B1 H00R0100 arc: B2 H00R0000 arc: B4 V02S0501 arc: B5 V01S0000 arc: B7 E1_H02W0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 N1_V01N0001 arc: C3 H02E0601 arc: C4 V00T0000 arc: C5 N1_V02S0001 arc: C7 V00B0100 arc: D0 V02S0201 arc: D1 S1_V02N0201 arc: D2 H02W0201 arc: D3 E1_H02W0001 arc: D4 H01W0000 arc: D5 V01N0001 arc: D7 V00B0000 arc: E1_H01E0001 F2 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: M2 V00T0100 arc: N1_V01N0101 F1 arc: V01S0000 F7 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 0000110010101100 word: SLICEC.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1000000010101010 word: SLICEA.K1.INIT 0001001101011111 word: SLICEB.K0.INIT 0000001111001111 word: SLICEB.K1.INIT 1111000011111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R9C57:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 V06S0203 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02W0601 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 W1_H02E0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02E0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 S1_V02N0501 arc: E1_H02E0101 W3_H06E0103 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 S3_V06N0203 arc: A1 E1_H02W0501 arc: A3 V02S0701 arc: A4 E1_H01W0000 arc: A5 N1_V01N0101 arc: B1 E1_H02W0101 arc: B3 V02N0101 arc: B4 H02W0301 arc: B5 F3 arc: B6 V00B0100 arc: C1 H02W0401 arc: C3 H02E0401 arc: C4 V00T0000 arc: C5 E1_H02W0401 arc: C6 V02N0001 arc: C7 W1_H02E0601 arc: D1 E1_H02W0001 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 H02E0001 arc: D6 V02N0401 arc: D7 E1_H02W0201 arc: E3_H06E0203 F4 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0100 F5 arc: H01W0000 F6 arc: M6 V00T0100 arc: N1_V01N0101 F1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 word: SLICED.K0.INIT 0000001111001111 word: SLICED.K1.INIT 1111000011111111 word: SLICEC.K0.INIT 0000110010101100 word: SLICEC.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R9C58:PLC2 arc: E1_H02E0601 S3_V06N0303 arc: H00R0100 H02E0501 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0401 H02E0401 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 E1_H01W0100 arc: H01W0000 W3_H06E0103 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: A1 H02E0701 arc: A7 H02W0501 arc: B1 V02N0101 arc: B7 V02N0701 arc: C1 V02N0601 arc: C7 E1_H02W0601 arc: D1 H02E0201 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F1 F1_SLICE arc: F7 F7_SLICE word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R9C59:PLC2 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S1_V02N0401 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 S3_V06N0303 arc: H01W0100 W3_H06E0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0501 W3_H06E0303 .tile R9C5:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: C1 N1_V01N0001 arc: CE1 H00L0100 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q4 arc: E1_H02E0301 F1 arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 W1_H02E0601 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V02N0201 Q2 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R9C60:PLC2 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 W1_H02E0601 arc: W1_H02W0601 S1_V02N0601 arc: E1_H02E0001 W3_H06E0003 arc: N1_V02N0301 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 .tile R9C61:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0303 N1_V01S0100 arc: N1_V02N0001 H02E0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 .tile R9C62:PLC2 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02E0401 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: E1_H02E0201 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 .tile R9C63:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 S1_V02N0601 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: E3_H06E0303 W3_H06E0203 .tile R9C64:PLC2 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 .tile R9C65:PLC2 arc: N1_V02N0401 S1_V02N0401 .tile R9C66:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R9C67:PLC2 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 .tile R9C68:PLC2 arc: E3_H06E0303 W3_H06E0203 .tile R9C69:PLC2 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 W3_H06E0303 .tile R9C6:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0601 H06E0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0100 H02E0301 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 V02N0601 arc: A6 H00L0000 arc: B5 H02W0301 arc: B6 V00T0000 arc: C5 V02S0201 arc: C6 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: D6 H00R0100 arc: E1_H02E0401 F6 arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0100 Q4 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 H02W0601 arc: M2 V00B0100 arc: M4 H02E0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V02N0401 Q4 arc: V00T0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1111111100000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C70:PLC2 arc: N1_V02N0701 H06E0203 arc: S3_V06S0003 H06E0003 .tile R9C7:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 V02N0701 arc: H00L0000 V02S0201 arc: N1_V02N0201 H02E0201 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02W0501 arc: V00T0100 S1_V02N0701 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 V06N0303 arc: B7 V01S0000 arc: C7 N1_V02S0201 arc: CE0 E1_H02W0101 arc: CE1 H02W0101 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D6 H01W0000 arc: D7 N1_V02S0401 arc: E1_H01E0001 Q4 arc: E1_H02E0601 Q4 arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00T0100 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0601 Q6 arc: V01S0000 Q0 arc: V01S0100 Q0 arc: W1_H02W0601 Q6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111111100000000 word: SLICED.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.A1MUX 1 .tile R9C8:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0501 W1_H02E0401 arc: H00L0100 E1_H02W0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 V06S0003 arc: A1 V02S0501 arc: A3 V00T0000 arc: A4 H02E0701 arc: A6 N1_V01N0101 arc: A7 H02E0501 arc: B1 V02N0301 arc: B3 W1_H02E0301 arc: B4 V02N0701 arc: B6 N1_V01S0000 arc: B7 V01S0000 arc: C0 V02N0601 arc: C1 H00R0100 arc: C3 H00L0100 arc: C4 H02W0401 arc: C6 V02N0001 arc: C7 E1_H02W0401 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V02N0201 arc: D3 V00B0100 arc: D4 S1_V02N0601 arc: D6 H00R0100 arc: D7 H01W0000 arc: E1_H01E0101 F3 arc: E1_H02E0701 F7 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F1 arc: LSR1 H02W0301 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 Q0 arc: V01S0000 F6 arc: V01S0100 F0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1110110011001100 word: SLICED.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0100110000000000 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R9C9:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 V02N0401 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 V02S0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: N1_V02N0201 W3_H06E0103 arc: W3_H06W0103 E1_H01W0100 arc: A1 H00L0100 arc: A2 V01N0101 arc: A3 H02E0501 arc: A7 V02S0301 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 H01W0100 arc: B7 V00B0000 arc: C1 H00R0100 arc: C2 H00L0000 arc: C3 N1_V01N0001 arc: C4 V02N0201 arc: C5 V02N0001 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 H01E0101 arc: D3 S1_V02N0201 arc: D4 H02W0201 arc: D5 E1_H02W0001 arc: D7 N1_V02S0601 arc: E1_H01E0001 F5 arc: E3_H06E0103 Q1 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F7 arc: LSR0 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F2 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0501 F5 arc: S3_V06S0303 F5 arc: V00T0100 F3 arc: V01S0100 F4 arc: W1_H02W0501 F5 arc: W3_H06W0203 F4 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000111111111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0111111100000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile TAP_R10C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R10C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R10C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R10C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R11C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R11C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R11C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R11C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R12C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R12C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R12C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R12C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R13C60:TAP_DRIVE_CIB arc: R_HPBX0000 G_VPTX0000 .tile TAP_R14C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R14C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R14C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R14C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R15C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R15C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R15C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R15C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R16C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R16C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R16C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R16C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R17C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R17C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R17C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R17C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R18C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R18C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R18C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R18C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R19C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R19C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R19C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R19C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R1C60:TAP_DRIVE_CIB arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R20C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R20C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R20C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R20C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R21C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R21C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R21C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R21C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R22C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R22C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R22C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R22C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R23C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R23C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R23C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R23C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R24C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R24C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R24C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R24C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R25C22:TAP_DRIVE_CIB arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R25C42:TAP_DRIVE_CIB arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R25C4:TAP_DRIVE_CIB arc: R_HPBX0000 G_VPTX0000 .tile TAP_R25C60:TAP_DRIVE_CIB arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R26C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R26C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R26C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R26C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R27C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R27C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R27C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R27C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R28C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R28C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R28C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R28C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R29C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R29C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R29C4:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R29C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R2C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R2C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R2C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R2C60:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R30C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R30C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R30C4:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R30C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R31C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R31C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R31C4:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R31C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R32C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R32C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R32C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R32C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R33C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R33C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R33C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R33C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R34C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R34C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R34C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R35C22:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R35C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R35C4:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R35C60:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R36C22:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R36C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R36C4:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R37C22:TAP_DRIVE_CIB arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R37C42:TAP_DRIVE_CIB arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R37C60:TAP_DRIVE_CIB arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 5 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 6 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 7 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 8 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 9 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 10 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 11 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 12 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 13 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 14 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 15 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 16 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 17 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 18 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 19 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 20 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 21 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 22 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 23 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 24 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 25 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 27 06f 013 013 013 013 013 013 013 023 023 023 023 023 023 023 023 023 023 023 023 023 023 023 023 113 0ef 083 083 103 183 103 183 003 083 103 183 003 083 003 083 103 183 113 073 117 113 117 113 073 117 113 197 193 017 013 063 083 023 113 013 06f 117 113 197 193 063 023 113 06f 137 113 073 0ef 06f 173 1f3 1b3 193 063 06f 067 067 113 023 013 137 023 113 093 193 023 023 023 0ef 137 113 0ef 0ef 193 073 073 00f 013 013 013 013 013 00f 0ef 083 003 193 113 0ef 06f 113 023 137 023 023 093 013 013 193 113 023 023 023 0ef 063 013 193 113 0ef 013 063 137 193 113 0ef 013 193 113 0ef 113 06f 193 103 137 013 093 193 113 0ef 113 0ef 093 037 1b3 113 0ef 063 137 113 0ef 113 0ef 013 193 06f 183 063 033 113 0ef 06f 113 0ef 137 113 0ef 113 0ef 013 193 113 0ef 113 083 003 083 103 183 003 113 067 193 103 113 023 023 023 023 023 023 023 023 023 023 023 023 093 013 113 193 093 193 013 193 083 063 133 103 063 063 183 113 193 0b3 193 063 003 083 103 183 003 083 103 183 003 083 103 183 113 067 063 063 013 063 063 113 113 063 093 06f 063 013 0e3 013 023 093 113 193 013 113 093 193 003 063 133 103 063 023 113 06f 063 063 063 013 0e3 113 063 103 063 013 023 083 013 033 023 023 023 063 093 0b3 003 013 023 013 093 063 093 023 023 023 083 093 023 06f 013 0e3 0e3 0e3 113 063 113 003 113 013 033 063 0e3 113 06f 003 093 063 003 063 003 0e3 093 023 023 093 0b3 003 063 003 063 023 06f 113 013 06f 113 093 0e3 06f 063 063 103 063 023 113 06f 093 023 093 0b3 113 023 023 023 023 083 113 0e3 0e3 093 0b3 103 113 023 06f 063 113 063 023 133 103 063 063 063 063 063 103 113 023 06f 0e3 0e3 023 06f 0e3 063 0e3 06f 093 0e3 093 0e3 013 023 093 003 063 133 103 063 113 113 063 113 113 113 113 0e3 013 023 093 0e3 103 113 023 06f 083 093 023 06f 0e3 083 0e3 093 0b3 083 093 0e3 083 113 093 0b3 0e3 003 013 063 003 063 003 0e3 113 093 06f 063 063 063 113 113 113 0e3 013 023 003 063 133 103 063 063 0e3 0e3 113 063 0e3 063 013 023 06f 0e3 0e3 06f 103 0e3 093 113 023 133 093 023 023 023 023 06f 003 063 003 0e3 113 093 06f 113 023 023 023 023 023 023 023 023 023 023 023 023 023 137 113 013 193 113 0ef 063 1b7 113 037 193 1b3 093 0b3 037 013 193 113 0ef 193 063 137 193 113 0ef 013 193 113 0ef 113 083 003 083 103 183 003 083 103 183 003 083 103 183 113 067 037 113 193 1b3 093 0b3 013 193 113 0ef 113 0ef 193 013 113 0ef 193 113 023 023 023 0ef 193 013 1b3 093 0b3 013 193 113 1b3 013 133 113 193 0ef 113 093 193 023 193 137 113 093 193 013 133 093 1b3 093 013 193 093 013 113 033 0b3 1b7 183 063 0e3 093 013 193 113 0ef 013 193 113 0ef 013 193 113 0ef 193 113 133 083 113 113 063 083 113 063 183 003 193 113 033 1b3 0ef 193 113 133 183 003 193 113 033 1b3 0ef 1b7 013 193 113 0ef 063 013 193 113 0ef 063 013 193 113 0ef 193 093 113 06f 1b7 013 193 113 0ef 063 183 003 193 113 033 1b3 0ef 013 193 113 0ef 193 06f 1b7 013 193 113 0ef 063 013 193 113 0ef 013 06f 1b7 013 193 113 0ef 013 193 063 113 0ef 093 06f 113 0ef 193 113 0ef 0e3 013 0e3 013 193 113 0ef 193 013 06f 193 023 023 023 067 137 113 113 023 023 023 023 023 023 023 023 023 023 0ef 137 037 113 093 0ef 013 103 063 1b7 023 023 023 023 023 023 113 023 137 113 023 137 113 023 113 023 023 113 0b7 093 113 193 013 183 103 193 1b3 103 193 1b3 103 193 1b3 063 137 113 06f 0ef 093 06f 0ef 063 0ef 063 063 1b3 183 063 113 063 0b7 093 193 113 013 093 037 0ef 023 0ef 0a3 0ef 123 193 0ef 1a3 013 113 183 013 063 183 063 183 103 193 193 1b3 113 193 1b3 113 113 113 0ef 063 0ef 063 093 063 137 113 0ef 06f 113 113 023 06f 0ef 1a3 113 06f 0ef 06f 113 0ef 06f 183 063 193 1b3 183 067 113 0ef 113 083 003 083 103 183 003 083 103 183 003 113 067 183 103 193 113 1b3 103 1b3 103 113 1b3 193 113 083 033 193 063 183 093 113 0e3 06f 083 113 023 06f 083 183 113 093 193 0b3 183 0b3 183 193 0b3 023 0ef 083 013 193 113 0ef 113 0ef 023 06f 093 0e3 113 06f 137 113 0ef 113 06f 137 113 113 023 0ef 137 113 0ef 0ef 137 113 0ef 137 1b7 113 0ef 063 0b7 013 193 113 0ef 083 137 113 113 06f 113 023 113 137 113 023 023 023 023 023 023 023 023 023 023 093 013 137 0ef 0b7 1b7 037 063 003 083 083 103 183 003 083 103 183 003 083 137 113 113 06f 193 013 063 013 137 193 113 0ef 193 0b7 1b3 183 113 193 0ef 0e3 193 093 063 113 0ef 193 093 1b3 183 193 193 063 113 0ef 193 0e3 193 093 063 133 0b3 033 06f 113 0ef 193 06f 113 0ef 06f 113 0ef 193 06f 113 1b7 023 193 003 193 1b3 113 023 0ef 063 193 003 083 137 113 113 06f 013 137 193 113 0ef 003 083 137 113 113 06f 193 113 023 193 0e3 023 113 183 063 063 113 067 113 06f 193 06f 023 113 193 083 0e3 063 093 113 133 023 183 0e3 0e3 113 067 193 023 113 113 06f 067 113 023 023 037 0b7 023 023 023 113 193 013 093 063 113 06f 183 113 023 183 0ef 003 063 183 113 193 183 0e7 103 083 003 083 103 183 113 067 013 06f 00f 067 113 137 023 023 113 137 1b7 023 023 023 023 023 023 093 0ef 037 113 0b7 193 137 113 013 06f 183 083 063 003 183 063 013 113 0ef 113 013 0e3 063 113 0ef 093 193 0e3 083 003 083 103 183 003 083 103 113 067 113 113 023 0ef 183 193 063 1b7 193 137 113 0ef 083 113 067 113 023 023 063 137 113 0ef 083 003 113 067 193 103 013 193 0ef 183 013 183 063 137 113 06f 193 137 113 0ef 013 1b7 023 06f 113 023 023 023 193 063 137 113 0ef 083 003 083 113 067 013 103 013 193 0ef 183 093 183 063 137 113 06f 103 193 013 0ef 183 193 183 063 137 113 06f 113 0ef 193 137 113 0ef 06f 113 023 023 023 023 023 193 063 137 113 0ef 083 003 083 103 183 113 067 013 093 103 013 193 0ef 183 113 183 063 137 113 06f 103 013 193 0ef 183 193 183 063 137 113 06f 193 113 063 103 013 193 0ef 183 183 063 137 113 06f 193 113 133 0e3 023 193 06f 113 023 023 023 023 023 193 063 137 113 0ef 083 003 083 103 183 113 067 013 093 103 013 193 0ef 183 193 183 063 137 113 06f 103 013 193 0ef 183 113 183 063 137 113 06f 193 113 063 103 013 193 0ef 183 183 063 137 113 06f 193 113 0b3 133 0e3 103 193 023 06f 113 023 023 023 023 063 137 113 0ef 083 003 083 103 113 067 013 093 103 013 193 0ef 183 113 183 063 137 113 06f 193 063 103 193 013 0ef 183 193 183 063 137 113 06f 193 013 113 0ef 06f 113 023 023 023 023 063 137 113 0ef 083 003 083 103 113 067 013 093 103 013 193 0ef 183 113 183 063 137 113 06f 193 063 103 193 013 0ef 183 193 183 063 137 113 06f 193 113 0ef 06f 113 023 023 023 023 023 063 137 113 0ef 083 003 083 103 183 113 067 013 093 103 013 193 0ef 183 113 183 063 137 113 06f 103 013 193 0ef 183 193 183 063 137 113 06f 193 013 063 103 193 0ef 183 033 183 063 137 113 06f 193 113 0ef 06f 1b7 113 023 067 1b7 137 06f 113 023 023 023 023 023 193 073 073 037 0ef 113 0ef 137 113 0ef 137 113 0ef 137 113 0ef 137 113 0ef 137 113 0ef 113 0ef 137 113 0ef 137 113 0ef 113 0ef 137 113 0ef 0ef 113 0ef 137 113 0ef 137 113 0ef 113 0ef 137 113 0ef 1b7 137 013 193 113 0ef 1b7 137 093 013 193 113 0ef 137 193 113 0ef 137 193 113 0ef 137 193 113 0ef 137 193 113 0ef 0ef 023 0ef 0b7 093 0b3 003 137 1b7 113 0ef 0ef 193 137 113 0ef 0ef 193 063 0ef 193 137 113 0ef 137 113 0ef 113 0ef 137 113 0ef 0ef 193 093 063 137 113 0ef 113 0ef 063 137 113 0ef 0ef 063 0ef 137 113 0ef 113 0ef 137 113 0ef 137 0b7 193 113 0ef 1b7 193 113 0ef 183 063 113 0ef 013 193 113 0ef 193 103 013 0ef 063 113 0ef 193 113 0ef 06f 113 023 023 023 023 023 023 023 023 023 023 113 0a3 013 0b7 193 037 093 113 193 013 0ef 183 023 0e3 023 063 063 0e3 063 113 0ef 103 1b3 013 023 06f 063 0e3 0e3 113 013 0ef 06f 023 033 137 023 113 0ef 083 003 083 103 183 003 083 103 183 003 113 113 067 193 023 06f 013 113 0e3 067 113 067 137 113 067 113 067 113 067 137 183 093 193 063 137 023 113 06f 067 137 183 093 193 063 137 023 113 06f 067 113 113 1b7 113 193 023 193 023 023 113 023 113 023 067 137 113 1b7 113 023 023 023 037 023 023 023 023 0ef 0ef 023 023 193 023 137 023 113 093 0ef 013 023 023 023 193 023 093 023 023 193 023 023 113 023 113 023 0ef 023 023 023 023 023 023 023 023 193 023 113 023 0ef 023 023 023 023 113 023 0ef 193 023 023 023 023 113 023 0ef 0ef 1b7 137 0ef 063 137 013 1b7 0ef 113 083 003 083 103 183 003 083 113 067 183 103 193 1b3 103 193 103 1b3 193 133 067 193 033 193 193 103 103 133 063 0e3 067 103 193 113 063 183 103 1b3 133 067 113 067 183 063 113 193 013 113 083 063 0e3 093 063 193 06f 003 093 193 063 023 193 113 067 063 193 113 023 067 113 193 083 003 023 113 067 183 113 023 023 013 0e3 103 0e3 083 103 0e3 103 023 0ef 113 183 0e3 183 06f 183 103 193 1b3 113 .bram_init 28 063 103 083 113 133 113 1b3 113 067 183 063 113 023 023 023 013 093 013 193 103 093 0ef 063 113 093 023 083 003 083 113 067 113 067 113 023 023 023 193 1a3 023 013 0ef 093 063 183 103 093 193 1b3 193 137 193 113 063 183 113 093 063 193 193 113 063 1b7 013 193 113 0ef 063 1b7 013 193 113 0ef 063 083 003 113 083 113 067 093 06f 193 063 103 113 023 023 023 023 023 013 063 103 093 093 063 093 063 063 113 183 133 193 1b3 0ef 063 193 083 003 083 103 183 113 113 067 183 193 193 113 133 1b3 113 103 0ef 0e3 193 033 183 093 193 1b3 063 193 06f 193 193 06f 183 193 1b3 0ef 0e3 093 013 093 033 183 103 193 1b3 06f 183 193 1b3 0ef 0e3 113 013 113 133 0ef 193 06f 193 113 067 113 023 103 023 023 023 023 113 1b7 013 083 063 023 103 113 063 193 063 183 113 023 063 103 193 063 023 113 083 003 083 103 183 113 067 183 113 193 1b3 063 113 0ef 193 113 113 0e3 113 113 0e3 183 0e3 023 113 0ef 023 093 0b3 023 023 113 06f 113 023 023 023 023 023 023 023 023 023 023 0ef 193 063 137 193 113 1b3 003 093 193 063 183 023 183 063 113 023 0a3 0ef 113 193 063 083 003 083 103 183 003 083 103 113 113 067 103 0ef 113 193 0e3 06f 193 113 0ef 193 063 093 113 013 193 113 0ef 023 113 193 0e3 113 193 183 113 063 113 0ef 063 093 0e3 113 193 063 06f 113 193 0e3 063 193 06f 183 103 193 1b3 193 193 113 0e3 103 183 113 133 063 113 0ef 113 083 023 113 193 123 193 083 0e3 183 193 193 123 0e3 193 1b3 0e3 183 003 193 1b3 013 013 113 113 023 193 0e3 103 183 113 133 063 113 0ef 183 103 193 1b3 0e3 0b3 113 133 133 0e3 133 0b3 0e3 037 013 0e3 037 013 063 193 133 093 1b3 023 023 023 023 113 063 183 103 193 1b3 1b3 193 193 0e3 113 0ef 023 093 093 093 0e3 137 183 023 193 193 193 023 123 1b7 193 023 193 06f 0e3 1b3 023 193 063 093 06f 133 093 113 0b3 06f 1b7 193 1b3 193 06f 113 023 103 023 023 023 023 023 023 093 003 063 103 193 063 183 063 183 063 113 083 003 083 103 183 003 113 067 183 023 183 023 0e3 013 023 113 06f 113 183 193 013 063 103 193 0ef 113 063 0e3 183 0e3 06f 193 113 0ef 023 06f 113 06f 113 023 183 023 023 023 023 023 023 023 023 023 023 023 023 013 013 093 113 183 063 063 023 103 193 063 137 0b7 193 093 023 183 193 093 103 113 013 113 1b7 093 013 103 063 193 0ef 063 063 063 063 063 193 06f 013 06f 193 1a3 113 003 083 083 103 183 003 083 103 183 003 083 103 183 113 06f 193 103 063 0e3 093 083 003 113 083 103 183 003 083 103 183 003 083 103 183 113 067 0e3 193 1b3 023 193 06f 013 183 0e3 0e3 093 013 193 193 063 1b3 023 0e3 193 013 113 133 103 193 063 063 013 063 093 013 113 133 103 063 193 0e3 013 013 113 193 113 1a3 0e3 193 113 113 013 093 093 137 113 193 1b3 103 063 063 063 063 093 193 06f 013 113 06f 093 06f 133 103 063 0e3 193 06f 193 06f 063 063 063 06f 063 093 193 103 193 063 193 023 193 063 113 113 193 113 063 193 113 063 093 1a3 113 103 0ef 093 063 193 023 193 093 193 183 113 0ef 093 063 103 183 063 103 193 013 123 063 113 063 113 063 193 023 06f 063 093 0e3 113 113 113 193 113 06f 193 063 193 193 023 023 0ef 193 183 103 013 093 137 063 113 133 103 093 063 193 183 063 063 093 113 06f 193 0e3 193 063 093 113 06f 1b3 013 023 113 093 1b3 023 113 06f 193 06f 193 193 193 193 063 113 06f 193 193 193 0e3 113 113 113 113 06f 193 0e3 193 063 093 113 0e3 093 06f 113 063 103 113 063 113 063 093 183 183 023 183 063 183 103 193 1b3 063 183 103 193 193 193 1b3 093 137 113 133 003 033 103 003 113 133 063 023 063 113 023 0ef 183 023 013 193 1b3 103 023 0ef 183 063 103 003 093 193 193 093 0e3 103 113 063 063 193 133 183 063 093 093 113 0ef 093 0e3 06f 0e3 093 06f 083 0e3 06f 063 013 113 193 113 093 0b3 183 0b3 093 0e3 063 183 193 0e3 013 193 113 0ef 0e3 183 063 113 0e3 193 0e3 093 06f 093 06f 193 0e3 183 193 0e3 183 103 193 193 1b3 0ef 023 06f 113 023 113 023 023 023 023 0ef 063 1b7 113 113 133 103 193 003 063 023 103 063 023 1b3 023 113 063 193 113 0ef 083 113 067 113 06f 113 023 023 023 023 023 023 023 093 063 013 193 113 113 0ef 093 063 183 183 113 023 0ef 093 063 183 063 183 193 063 183 003 113 103 193 0ef 023 113 0ef 183 023 023 023 023 0a3 023 023 083 003 113 103 083 183 003 113 067 093 023 06f 093 06f 113 023 023 023 023 023 023 023 023 023 023 023 023 013 023 193 093 023 093 0ef 013 063 003 063 183 013 193 063 003 183 003 033 063 013 113 193 013 093 063 183 113 063 103 183 113 193 1b3 063 063 103 063 193 0a3 013 113 083 003 083 103 183 003 083 103 183 003 083 103 113 067 183 103 0ef 06f 063 193 0a3 013 06f 023 103 183 113 0ef 0e3 033 063 183 113 133 063 133 103 093 193 0ef 0e3 113 183 033 033 1b3 023 183 133 023 06f 023 183 113 193 1b3 063 113 183 103 0ef 0e3 103 083 113 093 1b3 1b3 003 1b3 113 023 0e3 06f 113 193 023 023 013 0ef 063 023 083 003 113 067 113 023 193 193 023 023 023 023 023 023 013 0ef 113 063 103 063 083 063 093 183 023 063 113 06f 113 183 193 0e3 183 063 023 06f 103 183 193 063 193 113 133 0b3 063 133 183 1b3 023 0b3 0e3 013 093 183 063 1b3 023 193 0e3 103 0ef 063 093 133 06f 183 023 06f 103 1b3 023 0ef 0b3 193 063 193 0a3 113 083 003 113 083 103 183 003 083 113 067 063 183 183 063 193 0a3 113 06f 023 06f 113 023 023 023 063 013 193 113 0ef 063 183 183 113 023 0ef 063 183 063 183 193 063 113 023 06f 183 183 103 0ef 023 183 113 183 023 0ef 193 0e3 0e3 083 003 113 067 113 06f 193 0e3 06f 113 193 023 023 013 0ef 063 023 083 003 113 067 113 023 093 193 023 023 023 023 023 023 023 023 023 023 023 023 113 0ef 193 063 063 113 0ef 193 06f 103 037 0b7 013 013 113 193 013 093 183 063 063 06f 113 0ef 063 183 103 063 083 013 093 123 063 013 063 013 193 063 013 063 093 063 013 103 003 023 103 063 103 083 113 133 063 103 003 013 113 113 133 093 0b3 183 1b3 083 183 093 0b3 063 063 193 1b3 023 013 113 113 0e3 183 193 063 063 193 063 113 133 023 013 013 113 0ef 0e3 023 193 0e3 06f 0e3 013 06f 0e3 06f 063 093 113 193 013 033 103 033 013 0e3 063 193 023 083 123 183 063 103 193 063 003 193 113 193 113 013 013 093 113 0b3 083 063 063 093 063 063 133 0a3 193 133 0a3 193 0e3 133 0a3 103 063 063 013 113 193 033 113 013 183 0b3 063 193 193 063 093 093 093 063 083 0b3 063 193 0a3 113 06f 113 06f 063 133 113 113 063 113 193 133 033 0ef 063 063 1b3 113 123 1a3 193 033 193 113 093 183 1b3 183 0e3 013 063 013 033 123 06f 063 0e3 1b3 123 193 06f 1b7 113 013 093 013 113 193 193 06f 013 06f 193 123 093 0b3 123 183 063 0a3 183 113 023 0ef 023 183 103 193 1b3 123 183 103 193 1b3 023 113 0ef 193 0e3 083 003 113 083 103 183 003 083 103 183 003 083 103 183 113 067 193 06f 193 063 193 193 113 067 137 193 0e3 113 0e3 137 113 013 083 063 193 193 193 113 0e3 193 193 06f 193 063 193 063 193 063 1b7 193 113 133 103 067 113 067 1b7 063 0b7 193 093 037 193 113 063 113 083 063 063 113 003 193 013 033 063 013 063 037 013 193 1b3 003 067 133 113 133 183 113 067 133 113 1b3 193 193 06f 193 06f 193 06f 193 06f 193 06f 193 06f 193 06f 137 113 1b3 06f 0e3 013 133 06f 1b7 023 113 023 137 113 023 093 137 183 193 0e3 103 113 067 1b7 023 113 06f 113 023 023 023 093 013 113 023 0ef 1b3 183 013 023 193 193 0e3 083 003 083 113 067 113 193 023 023 023 023 193 013 113 063 193 113 0ef 1a3 193 063 013 193 063 0ef 1b7 113 023 113 0ef 093 113 0ef 193 063 093 093 113 093 0ef 0e3 0ef 113 083 003 083 103 113 067 193 023 193 0a3 193 123 193 1a3 023 063 193 0a3 093 113 193 1b3 103 093 0ef 0e3 193 063 193 113 0ef 013 113 193 0ef 103 193 193 0e3 013 013 0e3 06f 193 063 193 06f 193 06f 113 023 023 023 023 023 1b7 023 113 023 093 1b7 113 023 013 013 113 013 0ef 0e3 023 193 113 0ef 063 093 093 093 0e3 113 083 003 083 103 183 113 067 1b7 023 113 023 013 06f 193 113 0ef 193 0e3 193 113 0ef 093 1b7 113 0ef 0e3 093 093 113 093 0ef 0e3 06f 063 1b7 103 067 113 067 063 113 023 037 183 023 063 0ef 113 023 0ef 103 083 003 113 067 113 067 113 023 113 133 113 023 113 013 193 023 023 023 023 023 023 023 023 093 0ef 063 037 137 193 1b7 013 013 063 093 113 0ef 063 113 093 0ef 0e3 193 063 193 113 0ef 0ef 083 003 133 103 083 183 003 083 103 183 003 113 067 193 023 013 093 113 023 023 183 193 0e3 183 013 1a3 0e3 113 0ef 113 0ef 093 06f 193 183 063 067 063 113 06f 113 067 103 063 113 067 0e3 193 083 0e3 113 06f 193 06f 1b3 013 063 183 063 113 067 0e3 113 06f 193 193 103 193 1a3 0e3 067 033 193 063 067 103 023 063 193 193 06f 193 103 183 1b3 193 193 063 113 0e3 113 067 113 063 193 113 067 1b3 083 1b3 183 1b3 193 193 0e3 0e3 113 06f 193 103 093 063 193 103 193 .bram_init 29 1a3 0e3 067 193 06f 193 063 067 193 103 093 0e3 033 193 103 193 1a3 0e3 0e3 023 067 193 103 063 133 067 193 06f 113 023 023 013 023 0ef 183 133 193 183 063 113 0e3 113 083 003 113 067 1b3 193 063 103 063 133 067 193 06f 193 133 083 063 113 06f 063 113 003 0e3 113 067 193 06f 113 063 193 06f 1b3 0b3 183 083 113 1b3 0e3 113 067 033 193 063 067 193 1a3 06f 193 063 067 133 083 133 193 023 06f 063 093 193 193 063 067 133 083 133 193 023 0e3 067 193 06f 133 033 003 133 023 06f 113 023 013 113 023 023 023 023 023 193 0ef 063 113 113 0ef 093 033 033 063 013 06f 013 193 113 093 0ef 0e3 113 083 003 083 103 183 003 113 067 033 193 063 113 067 103 193 0e3 113 06f 0b7 193 103 093 063 113 013 063 103 113 033 003 013 063 113 113 013 063 103 133 103 113 063 193 013 113 06f 113 0e3 113 0e3 103 133 103 113 063 113 113 113 0e3 193 06f 133 193 133 103 033 003 093 063 093 063 113 0e3 063 023 067 193 013 06f 013 063 113 113 113 06f 083 113 063 06f 113 113 023 0ef 083 133 113 067 0b7 193 093 193 003 103 133 103 113 063 113 067 1b3 113 023 103 1b3 193 06f 0b7 093 113 013 063 013 093 063 013 113 093 093 063 093 113 193 063 193 093 113 063 063 033 113 113 093 063 093 063 113 063 013 023 093 013 063 013 193 133 063 063 063 023 113 063 193 063 063 193 023 113 013 063 033 093 06f 093 063 113 113 06f 093 0e3 113 113 06f 093 0e3 113 06f 093 093 133 093 093 133 103 1a3 133 0e3 013 06f 063 023 193 0b3 0e3 193 063 193 113 133 133 06f 193 133 193 06f 193 0e3 063 193 023 193 063 183 0a3 113 06f 063 023 193 0b3 0e3 193 063 193 113 133 133 06f 193 033 06f 063 023 113 1b3 0e3 193 093 013 193 063 133 193 033 013 0b3 063 063 113 0b3 113 113 067 063 013 033 003 023 093 06f 063 023 193 06f 113 067 113 023 023 013 0ef 063 113 083 003 113 067 113 023 093 023 023 023 023 023 023 0ef 083 113 067 113 023 093 023 023 013 023 023 023 023 023 0ef 063 113 083 003 113 067 093 013 1b7 193 06f 113 023 013 1b7 023 193 093 023 023 023 023 023 023 0ef 083 113 067 137 183 113 133 1b7 193 133 023 067 1b7 023 067 137 113 113 023 0ef 06f 113 193 0b7 1b3 093 113 133 1b3 113 137 133 133 067 193 113 133 113 113 067 113 193 0b7 1b3 093 113 133 1b3 113 137 133 133 067 193 113 133 113 113 067 0b7 193 1b3 093 133 063 113 067 113 003 113 193 133 113 133 103 193 193 1b3 06f 0b7 113 193 0b3 013 093 033 063 113 093 133 093 133 1b3 063 0b7 1b3 093 113 103 133 113 113 133 103 193 1b3 0e3 113 067 003 113 033 013 013 033 003 193 1b3 003 033 013 013 033 003 193 033 183 1b3 193 193 1b3 103 183 013 133 1b3 193 193 1b3 003 183 113 033 1b3 193 193 1b3 103 183 013 133 1b3 193 193 1b3 183 003 113 1b3 033 013 013 033 103 003 193 133 033 013 013 033 183 113 1b3 06f 1b7 023 067 1b7 023 1b7 023 067 113 023 093 023 013 113 023 0ef 1b7 183 063 113 0e7 193 063 113 0ef 113 083 003 083 113 067 113 023 023 037 0ef 063 003 083 113 06f 183 0e3 0e7 0e3 003 1b7 083 103 113 067 113 023 0ef 063 1b7 183 063 0e7 133 083 113 067 113 06f 113 023 023 013 103 063 113 0ef 083 003 113 113 067 0ef 013 06f 113 023 023 013 103 063 083 003 113 067 0ef 013 06f 113 093 013 193 113 023 023 0ef 193 013 1b3 113 023 0ef 113 083 003 113 067 113 023 193 023 023 023 023 023 023 023 023 0ef 083 113 067 137 183 103 193 1b3 103 193 1b3 103 193 133 067 1b7 137 083 193 0e3 067 137 113 133 113 023 023 023 1b7 023 023 023 023 023 113 023 113 023 113 023 023 113 023 023 037 093 0ef 063 083 003 083 113 067 023 06f 113 133 113 023 023 023 1b7 023 023 023 023 023 113 023 113 023 113 023 023 113 023 023 037 093 0ef 063 083 003 083 113 067 023 06f 1b7 113 083 193 113 1a3 0e3 067 1b7 103 193 063 1b7 0b7 037 037 193 093 183 193 063 113 063 067 183 103 193 193 063 103 103 023 133 023 023 06f 113 1b7 0b7 023 1b7 137 037 093 103 183 063 183 193 063 067 183 1b3 183 023 183 193 193 023 06f 073 137 013 183 093 137 063 003 0e3 137 113 133 193 193 103 023 06f 103 113 0e3 067 137 1b7 183 103 133 133 067 0b7 003 193 193 1f3 193 137 063 183 0e3 1f3 013 073 103 063 037 103 113 063 137 113 133 023 023 073 06f 183 0e3 067 023 06f 1b7 023 1b7 023 1b7 023 1b7 023 1b7 103 113 023 113 023 1f3 193 073 067 1b7 183 0b7 103 0e3 067 1b7 113 193 023 023 023 023 023 023 023 023 063 137 183 137 113 093 023 193 113 1b3 183 0ef 083 003 083 103 183 003 113 067 1b7 183 013 063 1b7 193 063 113 1b3 033 023 023 063 1b3 023 003 0b7 113 1b7 037 06f 113 0ef 06f 133 063 063 113 0ef 113 0ef 183 193 023 183 0e3 06f 1b7 023 1b7 023 1b7 023 037 063 1b7 193 063 137 013 193 113 06f 113 06f 137 183 103 193 1b3 103 193 1b3 103 193 133 067 193 193 063 137 113 06f 1b7 063 193 137 113 06f 1b7 063 193 137 113 06f 193 137 113 06f 113 023 0b3 013 013 193 137 113 023 0ef 113 0ef 003 083 137 113 113 06f 113 137 023 023 023 023 113 093 193 113 063 00f 0ef 137 013 193 113 063 137 193 113 063 00f 0ef 137 193 113 063 113 083 003 083 103 113 067 093 0b3 023 193 06f 093 0b3 083 063 013 193 06f 093 0b3 023 193 06f 093 0b3 083 063 013 193 06f 113 0b7 023 023 013 193 113 093 063 023 023 00f 0ef 103 003 037 0b7 193 093 113 013 093 063 083 003 113 113 067 063 193 193 1b3 1b3 1b3 193 193 193 1b3 023 113 06f 193 06f 063 193 193 1b3 1b3 1b3 193 193 113 133 103 133 063 093 113 06f 193 06f 113 023 023 0b7 137 023 023 023 023 023 023 023 023 023 023 093 013 193 013 113 093 113 1b7 063 013 137 013 193 113 0ef 0b7 113 0ef 00f 1b7 0b7 0ef 013 113 113 193 093 137 063 137 013 193 113 0ef 113 0ef 083 003 113 083 103 183 003 083 103 183 003 083 103 113 067 063 193 013 033 033 033 013 1b3 023 1b3 063 193 113 0ef 113 06f 013 06f 063 193 013 033 033 033 013 1b3 183 063 113 1b3 063 193 113 0ef 113 06f 013 06f 113 023 023 013 193 193 137 113 023 023 023 023 023 0ef 113 0ef 137 113 0ef 1b7 023 023 023 023 023 113 023 137 113 023 137 113 023 003 113 023 113 023 013 063 023 0ef 093 193 093 063 1b7 113 023 0ef 113 137 113 0ef 137 113 1b3 033 0b3 0b3 133 0ef 0ef 137 113 0ef 137 113 0ef 00f 0ef 1b7 113 023 023 0ef 093 193 063 1b7 113 023 0ef 113 137 113 0ef 137 113 1b3 033 0b3 0b3 133 0ef 0ef 137 113 0ef 003 083 083 103 183 003 137 113 113 06f 113 133 023 193 06f 113 133 103 193 06f 113 023 023 023 023 023 023 023 193 113 013 093 063 093 1b7 193 063 1b7 137 193 113 0ef 113 0ef 137 113 0ef 193 113 0ef 093 013 193 113 0ef 013 013 113 193 0ef 1b3 1b3 113 063 013 137 013 193 113 0ef 137 013 193 113 0ef 137 013 193 113 0ef 137 113 0ef 113 083 003 083 103 183 003 083 113 067 137 113 0ef 113 06f 113 023 023 023 023 023 023 023 023 023 023 023 023 023 063 1b3 013 113 093 063 113 193 037 0b7 013 193 093 013 093 06f 063 063 023 013 06f 113 113 013 193 113 083 193 023 183 063 063 063 063 133 103 113 063 113 0ef 113 083 013 193 183 063 193 023 003 1b3 183 193 063 113 023 0ef 103 193 063 193 083 193 003 063 193 113 063 113 063 193 013 063 013 013 023 013 063 003 063 093 023 013 083 003 093 063 063 093 063 063 063 093 063 063 023 183 113 083 063 063 0a3 013 06f 063 0e3 113 06f 113 06f 113 06f 113 06f 113 06f 013 113 0e3 103 093 023 093 0e3 133 113 06f 193 193 0e3 093 103 023 093 06f 093 063 093 0e3 113 093 06f 093 063 063 093 063 093 0e3 093 063 113 113 003 113 013 093 113 193 0ef 013 06f 093 0e3 193 093 0e3 013 063 093 093 113 003 06f 113 063 193 093 063 003 023 013 133 1b3 063 093 183 193 023 183 183 0e3 063 063 023 133 083 003 083 103 183 003 083 103 183 003 083 103 113 067 063 023 013 193 0e3 193 063 113 133 113 06f 193 06f 063 023 013 06f 113 083 063 093 193 113 023 113 0ef 103 063 193 113 063 193 063 193 063 193 033 133 1b3 063 093 06f 063 023 013 06f 0b3 063 033 003 023 193 06f 063 023 013 06f 183 133 093 023 06f 0e3 023 06f 113 093 06f 193 023 013 06f 093 06f 013 113 0e3 013 193 0e3 013 0e3 013 193 0e3 003 013 063 013 013 06f 013 06f 1a3 06f 113 06f 013 083 103 193 063 0b3 113 133 0b3 013 013 06f 093 113 1b3 093 113 193 033 013 063 063 063 0e3 063 0e3 063 063 063 133 0b3 0b3 113 133 0b3 0b3 0b3 0b3 113 113 193 1b3 013 113 033 013 133 193 0e3 023 023 067 113 093 06f 113 06f 113 023 023 023 023 023 023 023 013 093 193 013 113 063 063 063 1b3 023 023 033 093 06f 063 023 023 013 06f 063 063 073 063 063 1b3 023 023 033 06f 193 133 063 063 1b3 023 023 113 0ef 033 06f 113 0ef 093 113 0ef 133 193 063 063 023 023 013 06f 013 113 133 093 0b3 133 1b3 033 1b3 06f 063 193 133 063 063 1b3 023 023 193 063 113 0ef 193 1b3 1b3 033 033 0b3 113 083 003 193 083 103 183 003 083 113 .bram_init 30 067 113 0ef 093 113 0ef 133 013 013 093 063 193 063 033 0b3 033 033 093 133 1b3 013 113 013 133 193 113 1b3 193 113 093 033 0b3 113 033 133 033 013 133 093 133 0b3 013 033 1b3 033 013 193 133 0e3 013 093 093 033 0b3 0e3 023 023 06f 093 0b3 113 0b3 0b3 033 0b3 113 1b3 06f 113 0ef 093 113 0ef 133 193 0e3 013 193 093 063 093 113 193 06f 1b3 0b3 133 1b3 06f 137 133 093 093 193 1b3 137 1b3 113 133 113 113 113 133 1b3 113 113 113 133 093 0b3 1b3 133 113 113 013 113 0b3 1b3 093 093 093 0b3 1b3 1b3 133 133 067 093 093 093 093 1b3 113 113 113 1b3 0b3 113 113 113 1b3 0b3 113 113 113 1b3 113 193 013 193 113 133 1b3 133 133 133 067 000 1b4 1f0 054 1f0 0d4 09c 073 164 16b 06f 07a 147 144 06f 045 075 067 06f 020 067 120 030 038 000 12d 13d 13d 13d 11b 14c 06f 11b 120 13d 13d 13d 12d 125 069 16e 166 064 143 069 125 06f 025 020 020 165 02e 166 020 064 172 00a 162 02e 06e 162 061 000 061 000 172 072 172 142 069 066 120 169 02e 050 073 06f 153 06f 06f 162 120 070 065 00a 154 16d 120 173 174 120 06f 120 072 067 154 16f 000 143 065 064 142 069 066 120 061 069 150 06f 02e 142 069 066 020 074 06f 02e 142 069 066 020 074 06e 00a 162 02e 000 053 072 16f 166 065 000 14d 172 175 000 00a 030 020 025 020 020 02e 125 020 053 043 173 020 038 000 020 053 043 069 020 170 065 030 120 120 178 020 120 174 177 120 174 065 075 078 074 06f 16d 000 02d 00a 065 149 120 069 16c 16f 06e 00a 125 073 125 049 074 073 16c 020 16c 000 049 072 074 16c 153 069 020 073 020 078 063 13c 172 03e 065 068 049 072 074 064 073 049 072 074 16e 000 043 032 030 16c 000 153 14c 020 175 066 168 15f 168 046 068 120 168 066 168 175 161 000 046 068 055 174 161 000 063 143 075 043 032 120 061 06f 168 064 173 170 000 069 074 049 174 065 066 065 073 000 168 000 050 074 169 065 16d 077 065 064 173 03c 175 15b 06e 049 072 074 075 16d 163 020 074 073 120 075 000 049 072 074 073 061 06e 064 073 049 072 074 075 120 172 000 16d 172 020 064 073 16c 074 10a 06f 063 065 068 16d 174 020 064 05b 178 065 049 072 074 17a 16d 073 064 064 020 17a 05b 061 16c 000 049 072 074 061 16c 061 000 16d 073 064 154 120 06f 073 064 16d 174 000 154 120 06f 161 173 16d 163 000 143 120 172 120 163 16d 077 065 057 065 064 073 161 16d 172 000 152 120 172 120 163 073 072 06f 142 020 06d 143 000 173 061 06f 142 020 06d 172 020 14c 172 06f 152 06f 073 16d 073 154 120 141 11b 020 020 15f 120 05f 020 020 11b 00a 11b 020 020 120 128 12f 05f 17c 11b 00a 11b 020 020 12f 120 15f 15f 020 130 11b 020 120 15f 02f 02f 12f 05f 130 11b 020 175 120 072 072 172 165 16c 05b 000 020 120 079 068 130 032 120 16f 169 061 020 120 079 068 030 032 120 061 000 020 053 069 06f 06f 031 032 039 03a 000 120 065 069 168 120 165 00a 020 065 069 168 020 139 035 12d 13d 13d 13d 03d 131 143 06d 13d 13d 13d 13d 12d 156 169 05f 075 11b 043 05b 109 020 164 00a 157 142 000 11b 142 05b 109 120 162 040 147 000 11b 143 05b 109 02d 020 061 11b 152 05b 109 14b 000 11b 053 11b 13a 164 00a 11b 04c 130 109 069 11b 053 14d 06d 025 042 02d 020 164 073 128 025 120 12d 029 12d 13d 13d 120 16d 174 069 169 05b 13d 13d 13d 12d 14d 172 16e 061 061 06e 069 00a 12d 13d 13d 13d 120 06d 174 06d 13d 13d 13d 13d 12d 14e 16f 16d 175 16f 00a 12d 13d 13d 13d 11b 143 06f 05b 13d 13d 13d 13d 12d 11b 13b 069 11b 03e 10a 143 061 16e 166 064 008 153 063 067 152 174 06f 061 163 172 00a 153 063 067 152 174 061 061 163 172 00a 049 169 17a 120 141 030 038 02e 080 18e 145 149 090 199 159 19c 141 1a5 1a8 1ac 1b0 1b4 1b8 1bc 1c0 1c4 1c8 1cc 1d0 1d4 1d8 1dc 1e0 1e4 1e8 1ec 1f0 1f4 1f8 1fc 101 009 014 01e 146 146 032 022 13e 000 02b 15b 1b8 1d0 1e8 1f0 1f8 000 008 010 018 0c7 0e9 0e4 0e5 0ea 0e8 0ee 0c4 0c9 0c6 0f6 0fb 0ff 0dc 0a3 0a7 0e1 0f3 0f1 0aa 0bf 0ac 0bc 0ab 191 193 124 162 155 151 15d 15b 114 12c 100 15e 15a 169 160 16c 168 165 158 153 16a 10c 184 190 1b1 193 1a3 0b5 1a6 1a9 01e 1b5 061 065 120 0f7 0b0 0b7 07f 1a0 061 0e0 0f8 0ff 178 130 106 110 12e 106 04d 181 182 184 187 189 18b 18d 18f 191 193 1f6 197 198 19b 19d 19f 1a0 1a2 1a4 1a7 1a9 1ab 1ac 1af 1b1 1b3 1b5 1b7 1b8 1bb 1bc 1f7 1c1 1c3 1c5 1c7 1c7 1cb 1cd 1dd 18e 112 003 1f4 1f8 022 03a 065 03b 066 040 041 10a 040 186 189 058 05a 05c 05e 193 062 064 066 197 06a 06c 06e 070 19d 074 076 078 07a 07c 07e 1a6 082 084 086 1ae 1b1 045 08e 090 1b7 003 1fe 1ac 186 189 1b1 1c2 1a3 1c4 1cc 18c 18f 118 00a 1f3 1f5 1f7 1f9 1fa 120 110 122 136 10e 001 0d0 161 000 17d 063 196 15a 008 006 008 008 006 007 152 154 156 160 170 1ba 1c8 1ca 1da 1f8 1ea 1fa 180 190 1a0 1b0 1b8 1b2 1cc 1c3 002 002 001 1f3 1fc 001 170 184 183 11a 02f 102 106 102 164 026 11a 008 008 008 028 008 008 008 008 0a0 010 010 010 004 004 004 010 110 141 101 101 101 101 101 010 010 042 002 002 002 002 002 010 000 000 000 000 000 000 000 000 0a0 010 010 010 010 010 010 010 101 101 101 101 101 101 101 101 002 002 002 002 002 002 002 002 130 134 138 043 047 04b 04f 053 057 000 130 134 138 063 067 06b 06f 073 077 000 041 174 000 000 021 042 063 084 0a5 0c6 0e7 108 129 14a 16b 18c 1ad 1ce 1ef 031 010 073 052 0b5 094 0f7 0d6 139 118 17b 15a 1bd 19c 1ff 1de 062 043 020 001 0e6 0c7 0a4 085 16a 14b 128 109 1ee 1cf 1ac 18d 053 072 011 030 0d7 0f6 095 0b4 15b 17a 119 138 1df 1fe 19d 1bc 0c4 0e5 086 0a7 040 061 002 023 1cc 1ed 18e 1af 148 169 10a 12b 0f5 0d4 0b7 096 071 050 033 012 1fd 1dc 1bf 19e 179 158 13b 11a 0a6 087 0e4 0c5 022 003 060 041 1ae 18f 1ec 1cd 12a 10b 168 149 097 0b6 0d5 0f4 013 032 051 070 19f 1be 1dd 1fc 11b 13a 159 178 188 1a9 1ca 1eb 10c 12d 14e 16f 080 0a1 0c2 0e3 004 025 046 067 1b9 198 1fb 1da 13d 11c 17f 15e 0b1 090 0f3 0d2 035 014 077 056 1ea 1cb 1a8 189 16e 14f 12c 10d 0e2 0c3 0a0 081 066 047 024 005 1db 1fa 199 1b8 15f 17e 11d 13c 0d3 0f2 091 0b0 057 076 015 034 14c 16d 10e 12f 1c8 1e9 18a 1ab 044 065 006 027 0c0 0e1 082 0a3 17d 15c 13f 11e 1f9 1d8 1bb 19a 075 054 037 016 0f1 0d0 0b3 092 12e 10f 16c 14d 1aa 18b 1e8 1c9 026 007 064 045 0a2 083 0e0 0c1 11f 13e 15d 17c 19b 1ba 1d9 1f8 017 036 055 074 093 0b2 0d1 0f0 000 096 12c 1ba 019 08f 135 1a3 032 0a4 11e 188 02b 0bd 107 191 064 0f2 148 1de 07d 0eb 151 1c7 056 0c0 17a 1ec 04f 0d9 163 1f5 0c8 05e 1e4 172 0d1 047 1fd 16b 0fa 06c 1d6 140 0e3 075 1cf 159 0ac 03a 180 116 0b5 023 199 10f 09e 008 1b2 124 087 011 1ab 13d 190 106 0bc 02a 189 11f 0a5 033 1a2 134 08e 018 1bb 12d 097 001 1f4 162 0d8 04e 1ed 17b 0c1 057 1c6 150 0ea 07c 1df 149 0f3 065 158 1ce 074 0e2 141 1d7 06d 0fb 16a 1fc 046 0d0 173 1e5 05f 0c9 13c 1aa 010 086 125 1b3 009 09f 10e 198 022 0b4 117 181 03b 0ad 120 1b6 00c 09a 139 1af 015 083 112 184 03e 0a8 10b 19d 027 0b1 144 1d2 068 0fe 15d 1cb 071 0e7 176 1e0 05a 0cc 16f 1f9 043 0d5 1e8 17e 0c4 052 1f1 167 0dd 04b 1da 14c 0f6 060 1c3 155 0ef 079 18c 11a 0a0 036 195 103 0b9 02f 1be 128 092 004 1a7 131 08b 01d 0b0 026 19c 10a 0a9 03f 185 113 082 014 1ae 138 09b 00d 1b7 121 0d4 042 1f8 16e 0cd 05b 1e1 177 0e6 070 1ca 15c 0ff 069 1d3 145 078 0ee 154 1c2 061 0f7 14d 1db 04a 0dc 166 1f0 053 0c5 17f 1e9 01c 08a 130 1a6 005 093 129 1bf 02e 0b8 102 194 037 0a1 11b 18d 125 023 15b 15d 025 000 025 069 025 069 025 069 125 178 030 020 020 000 020 069 000 020 165 000 14d 170 120 030 020 029 00a 020 069 073 064 12f 020 165 073 064 14d 165 061 178 028 020 073 172 03a 164 064 020 064 072 073 164 064 020 174 072 073 164 064 14d 165 14b 14d 165 14f 03c 04c 000 020 018 000 010 020 030 040 050 060 070 080 090 0a0 0b0 0c0 0d0 0e0 148 1f8 000 000 074 010 020 000 038 030 044 000 1c4 05c 060 000 10c 090 098 000 040 0b4 0bc 000 1d8 1fc 008 002 124 01c 028 002 16c 03c 048 002 074 05c 068 002 06c 07c 088 002 0d0 09c 0a8 001 194 0bc 0c8 001 0c0 0e0 0e8 001 0d0 0f0 0fc 005 001 000 073 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 31 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 32 000 000 000 000 000 000 000 000 097 096 095 094 093 092 091 090 097 096 095 094 093 092 091 090 080 000 090 091 091 091 092 092 093 093 093 093 094 094 097 097 097 097 080 000 010 080 002 082 088 002 082 002 0c2 043 103 086 113 090 082 103 1f8 002 082 002 0c2 084 090 082 1f8 00a 082 088 008 000 013 013 1fb 1fb 1c2 020 040 140 080 096 082 032 095 082 0c2 142 097 093 092 020 032 082 020 020 003 1c8 038 008 000 000 000 000 000 028 020 093 093 042 002 1f8 000 080 090 034 091 096 082 0c5 003 082 082 093 092 097 010 08f 003 042 082 010 082 083 032 042 082 020 003 082 002 010 002 000 084 094 032 103 083 042 082 020 082 020 083 043 102 082 010 081 032 082 020 082 010 003 0c2 1f8 093 1c5 002 002 020 1f8 002 020 042 082 020 082 010 003 0c2 002 010 002 090 092 092 094 094 095 080 040 083 092 080 093 090 092 091 097 096 095 094 093 092 091 090 007 004 007 007 001 001 002 004 1d4 07c 0c1 1a1 18e 147 1d3 1c3 1cb 143 003 1ae 092 092 094 094 095 095 095 095 096 096 096 096 080 040 181 175 007 181 136 181 1b9 1bd 002 000 182 007 18c 045 1d0 005 005 005 006 006 006 006 1d7 13c 0c1 1a1 18e 1d0 002 1f8 185 1f1 185 007 18e 082 140 1d4 0bf 087 1d1 1d2 08f 147 112 111 113 046 04a 142 055 105 053 005 002 182 002 110 111 1d2 1d4 044 1d0 1f8 007 182 18e 141 004 182 004 1d7 101 10f 147 1ac 188 002 1f8 115 102 100 117 10e 057 108 044 1d2 052 18c 144 057 100 057 10e 1d2 1f8 181 047 1f8 181 044 18d 1f8 18a 147 1d1 1b4 1d0 002 1f8 184 1d1 18c 144 001 050 051 052 053 1d4 082 042 141 04c 144 051 181 053 1f8 18b 101 1b9 1d0 0c1 1a1 185 1f4 183 076 18f 1d1 181 1d0 1f8 184 183 1d0 1f8 180 033 18c 1f8 002 183 002 18f 107 1d0 002 1d7 138 0c1 1a1 185 184 0bc 0fe 1b9 181 1b9 004 0b7 107 1d0 042 048 1d1 181 1d0 1f8 1d4 044 1d2 1f8 143 1d4 041 04c 144 054 044 1bc 1d4 041 04c 144 1a7 057 107 1b5 057 103 057 103 181 044 1f8 184 177 182 181 1b9 004 0b5 107 1d0 1d7 13a 0c1 1a1 187 186 1f1 1b3 004 0ba 188 14f 107 1d0 1f8 184 18a 1f8 1d1 1b8 182 189 1d1 141 002 190 191 192 193 1f8 153 103 153 102 183 143 1f8 080 090 093 092 091 097 096 095 094 093 092 091 090 097 034 080 003 082 082 010 08f 00b 083 1fa 1c3 1c3 002 1c2 035 003 102 042 010 084 081 032 102 082 020 003 082 002 010 080 090 092 092 094 094 095 095 095 095 096 096 096 096 080 040 00d 083 103 1c3 003 1c3 003 082 042 010 042 010 082 003 002 010 003 082 090 096 097 018 103 083 1c3 003 1c3 083 103 082 1c3 002 1c2 003 082 1f8 0ba 102 083 093 043 1fd 043 083 1c3 182 183 182 1c3 006 006 005 005 005 004 182 1c2 036 093 0a7 104 0c3 043 002 1c2 1f8 003 002 002 018 003 002 042 018 08b 083 186 093 003 084 14e 093 003 14b 092 093 083 002 103 1c2 018 083 08b 1c3 192 193 083 042 103 1c2 018 033 003 1c2 002 018 084 003 0c2 002 018 089 003 002 042 018 084 005 0bc 1f8 032 003 0c2 002 018 08e 092 093 083 002 103 1c2 018 003 002 042 018 085 1f8 032 003 0c2 002 018 08f 003 002 042 018 086 1f8 032 003 0c2 002 018 003 002 08d 042 018 086 1f8 042 018 082 002 1f8 080 145 14c 003 002 042 018 084 005 1f8 003 090 091 092 040 032 080 082 093 092 091 090 097 096 095 094 093 092 020 032 032 082 002 020 002 062 08f 013 1d0 1d4 1d5 1d6 1d7 1d0 003 1d1 063 183 1d2 163 183 1d3 003 1d0 1d1 005 015 002 004 004 005 153 153 1cb 1f3 153 1cb 1f3 153 1cb 1f3 1cf 032 082 000 020 042 1f8 020 087 020 080 087 003 1e3 1cf 185 18f 032 005 004 004 002 042 005 020 087 020 087 020 087 085 020 087 1c6 005 0a2 006 1a4 0a3 1c0 0a3 0a3 0c2 1cb 1f3 1cd 1eb 1b3 1cd 082 1ad 018 086 020 08f 145 14f 032 082 018 000 082 09d 151 1f8 020 000 185 1f8 020 1f8 002 020 1f8 0a3 033 1cb 1c3 1d3 1c0 002 020 002 090 092 092 094 094 095 095 095 095 096 080 040 0a3 0a3 1cb 18b 1f3 0a3 1f3 0a3 18b 1f3 1c3 003 0a3 1c3 1c5 1a6 0a3 005 002 1ce 1f8 1e3 183 100 1f8 0a3 0a3 002 14b 1cb 173 0a3 173 0a3 1cb 173 093 020 093 003 002 002 1f8 002 020 110 1f8 145 142 002 1f8 032 082 018 002 1f8 032 080 082 093 018 032 082 018 1f8 032 082 018 032 002 082 1f8 086 003 003 002 002 1f8 090 032 082 080 018 080 090 084 032 082 091 096 095 094 093 092 093 092 097 091 0c2 105 035 018 035 035 036 020 092 090 092 094 094 095 095 095 095 096 096 042 082 080 018 003 042 1ea 002 032 102 082 018 004 036 083 1e2 042 0c4 018 00b 004 006 0cd 142 018 004 006 083 1e2 0c3 1fb 078 002 018 0c4 008 004 006 0cc 084 042 105 1f8 182 018 0c4 1f8 1c2 018 1f8 142 018 0c4 1f8 080 042 092 003 0d2 0c2 0c2 002 093 018 008 002 092 090 032 082 080 018 083 032 002 082 018 092 090 032 082 080 018 103 103 1d0 1c3 18e 0d0 003 0a3 1c7 1cb 002 040 082 1f8 1c3 000 1c0 142 1c3 1e3 146 147 083 08a 102 090 1e2 0c5 0ca 142 040 083 080 003 002 1f8 040 080 092 091 042 042 090 097 093 084 0c4 002 042 00b 002 000 013 082 093 1d2 010 093 08e 013 0c2 102 1d3 1c0 012 090 092 092 094 094 080 040 002 1f8 028 040 080 032 094 093 082 044 034 095 092 091 090 097 096 002 018 045 084 035 0c4 045 003 102 000 013 1d3 148 1d3 1d2 10a 0c3 142 018 003 002 00d 183 182 018 042 003 04c 090 092 092 094 094 095 095 095 080 040 080 082 093 018 0a3 082 1cb 032 0c2 032 082 018 090 080 040 080 097 096 020 032 082 018 090 092 080 040 0c3 1d2 003 082 010 093 082 1e3 1c4 032 082 1f8 082 032 082 018 03a 023 1d0 1f8 080 097 096 095 003 1e1 032 082 018 090 092 092 080 040 0c2 012 003 082 010 093 082 1e3 1c4 032 082 1f8 012 082 003 010 093 082 1e3 1c4 032 082 1f8 042 018 082 032 082 018 1f8 080 093 092 091 090 097 003 1e3 032 082 018 090 092 092 094 094 080 040 0c2 082 012 003 082 010 093 084 1e3 1c4 032 082 1f8 012 003 082 010 093 084 1e3 1c4 032 082 1f8 003 002 043 012 003 082 010 093 1e3 1c4 032 082 1f8 003 1cb 183 081 190 1c3 1f8 080 093 092 091 090 097 003 1e3 032 082 018 090 092 092 094 094 080 040 0c2 082 012 003 082 010 093 084 1e3 1c4 032 082 1f8 012 003 082 010 093 084 1e3 1c4 032 082 1f8 003 002 043 012 003 082 010 093 1e3 1c4 032 082 1f8 003 1cb 0c3 083 080 193 1c3 150 1f8 080 097 096 095 094 022 032 082 018 090 092 092 094 080 040 0c2 082 012 003 082 010 093 084 1e3 1c4 032 082 1f8 003 044 012 082 003 010 093 082 1e3 1c5 032 082 1f8 002 083 082 1f8 1f8 080 097 096 095 094 022 032 082 018 090 092 092 094 080 040 0c2 082 012 003 082 010 093 084 1e3 1c4 032 082 1f8 003 044 012 082 003 010 093 082 1e3 1c5 032 082 1f8 002 082 018 1f8 080 093 092 091 090 097 023 032 082 018 090 092 092 094 094 080 040 0c2 082 012 003 082 010 093 084 1e3 1c4 032 082 1f8 012 003 082 010 093 084 1e3 1c4 032 082 1f8 003 003 1eb 012 082 010 093 01b 1e3 1c4 032 082 1f8 0c2 082 018 1f8 003 003 1d0 040 002 002 018 080 097 096 095 094 093 003 1c8 030 042 018 002 018 03a 082 018 03a 082 018 03a 082 018 03a 082 018 03a 082 018 002 018 03a 082 018 03a 082 018 002 018 03a 082 018 1f8 002 018 03a 082 018 03a 082 018 002 018 03a 082 018 03a 03a 003 0c2 082 018 03a 03a 003 003 0c2 082 018 03a 002 082 018 03a 002 082 018 03a 002 082 018 03a 002 082 018 000 093 000 1a3 143 0a3 093 03a 042 082 018 000 082 03a 082 018 000 003 086 000 082 03a 082 018 03a 082 018 002 018 03a 082 018 000 003 082 084 03a 082 018 002 018 044 03a 082 018 1f8 085 1f8 03a 082 018 002 018 03a 082 018 03c 03a 082 042 018 03c 002 082 000 0a3 1c6 002 018 083 082 082 1f8 082 092 083 1f8 08b 0c2 018 082 042 018 1f8 080 096 095 094 093 092 091 090 097 096 097 084 083 002 002 004 03d 005 005 005 006 010 063 083 1c5 046 085 0f2 081 082 082 010 0a3 083 002 1c0 1f8 087 088 006 102 002 010 1f8 046 082 042 000 082 010 090 092 092 094 094 095 095 095 095 096 002 080 040 003 046 1f8 000 082 08e 040 002 040 17a 082 040 002 040 002 040 01b 193 003 1fb 1c5 03a 190 082 010 040 01b 193 003 1fb 1c5 03a 190 082 010 040 0cb 1ab 01b 1ab 0ca 1d3 0ea 1d4 1d5 003 1d1 003 1d2 040 03a 080 002 082 097 096 095 01a 094 093 092 091 010 1f8 013 014 003 015 02a 010 082 005 1f8 005 013 014 015 004 011 002 012 013 003 014 015 004 011 002 012 1f8 013 014 015 011 012 013 014 015 004 011 002 012 1f8 013 014 015 011 002 012 1f8 003 013 014 015 011 002 012 1f8 1f8 002 002 018 086 002 003 002 018 002 090 092 092 094 094 095 095 080 040 0a3 0a3 1cb 1f3 0a3 1cb 0a2 1b3 1cb 0b2 040 083 083 1c3 0c2 1e2 0e3 082 1c2 082 040 093 0c2 183 0fe 0ab 092 1c3 1c2 040 002 040 093 1c2 1c3 002 003 183 1a3 0fb 14d 1c3 183 003 000 1e3 003 003 10b 090 003 1c2 040 08c 003 002 0d0 040 002 003 090 092 0d0 080 040 093 080 096 097 082 1c4 1e3 182 0ab 1eb 14f 1e2 093 008 0ba 092 089 013 1f8 0e3 0e3 1cb 1f3 003 .bram_init 33 08f 0e3 0e3 18b 1b3 18b 1f3 1c2 040 093 1c5 080 092 091 093 082 0c2 0c3 082 0a2 003 008 083 002 002 012 090 092 092 080 040 002 040 080 092 091 093 003 080 092 082 1f8 002 08f 023 023 002 1cb 1f3 1cb 1db 1eb 183 1cd 023 003 082 1c5 1c3 1fb 003 1b3 03a 003 0c2 002 1f8 087 03a 003 0c2 002 1f8 08f 090 092 042 092 080 040 002 1f8 003 1f9 093 080 096 097 095 094 093 082 0f8 0a3 003 0c2 182 003 186 189 0ec 093 084 0aa 0c2 1f8 082 003 090 092 092 094 094 1c2 080 040 013 084 0ea 0bc 004 0c2 002 0a4 1f8 08e 0fc 002 023 07a 1cb 1f3 043 1eb 1f8 1cb 1eb 1f8 093 0ea 0c2 1f8 08d 04a 002 07a 002 023 023 1cb 1f3 1f8 093 0ea 0c2 1f8 08f 04a 002 0ba 002 1f8 08b 1f8 003 1c2 040 080 094 094 096 095 097 093 084 003 082 092 0b2 096 013 002 184 0bc 0cd 012 183 016 0cd 06b 0ab 1f6 016 002 090 092 092 094 094 080 040 06b 0ab 1c3 1fb 1c8 042 1f8 082 003 002 1bf 003 002 0c4 053 0f8 015 042 1f8 016 042 042 014 017 002 1f8 080 097 096 095 094 093 092 091 090 0d0 093 1f8 003 0a4 003 08b 183 1c3 1d2 082 003 004 092 0d0 023 1cb 07a 000 000 008 0ba 003 082 090 092 092 094 094 095 095 095 1c2 080 040 022 008 0ba 003 08a 1f8 002 002 1f8 003 089 082 004 005 044 082 1f8 0d0 084 0c4 10b 044 004 052 002 0c4 002 1f8 0fd 042 089 003 003 08e 1f8 003 003 080 1fb 003 1f8 023 023 1cb 1f3 1cb 1eb 003 1cf 024 023 08c 0b4 08c 002 1f8 084 022 015 003 043 000 1fb 015 1b7 024 0cb 1eb 00a 1c2 0c3 1fb 1cf 023 025 1cb 1f3 1cd 12d 10d 1ad 00a 1bb 1cc 022 023 08a 0b2 08b 002 1f8 023 023 1cb 1f3 1c0 043 1ab 183 183 0b3 082 0aa 0b0 003 103 135 083 103 13b 004 143 042 143 011 014 016 017 003 0cd 023 023 1cb 1f3 133 1cb 1eb 1c8 002 1f8 010 04a 042 06a 0b1 003 1ab 000 1c3 1cb 1eb 18f 009 003 1c3 013 003 1f8 183 143 010 003 0cb 04a 1f8 043 07a 1ab 182 1f8 00c 0c4 0dc 0c4 1f8 080 094 094 096 095 097 093 092 094 082 092 08b 023 003 1fb 013 1cd 02b 1ca 002 090 092 092 094 094 095 080 040 013 056 053 055 1c3 002 057 002 1f8 1c4 02b 004 005 1ca 052 082 1f8 084 082 13c 013 0b1 1f8 082 002 1f8 056 1f8 002 1f8 080 093 095 092 096 093 091 090 097 095 094 092 091 090 097 082 0c5 003 003 123 1c0 1c7 012 123 003 1fd 085 03d 183 145 090 013 004 002 1d5 004 006 006 03e 006 105 122 083 002 008 087 07f 083 082 0b4 0c3 000 105 1f8 003 002 002 092 090 092 094 094 095 095 095 095 096 096 096 096 080 1f8 1c3 1e3 183 08d 006 090 092 042 092 094 094 095 095 095 095 096 096 096 096 080 040 0c7 0cb 183 1c8 0c4 1f8 105 123 1c6 1c5 002 003 002 0cb 0cc 183 1c8 0c6 003 003 1cb 183 1ab 1c2 180 1cb 003 18a 072 003 0cb 183 1ab 183 0c4 0cb 006 003 003 002 183 187 18e 006 006 004 004 004 006 039 1c3 1cb 183 1ea 083 083 08a 0c3 072 183 1f8 003 003 1f8 002 1f8 183 1ab 182 18a 0c4 1f8 0c3 1f8 0bc 0ce 0cf 000 0ca 072 006 023 003 18b 003 000 003 0cb 08c 0bc 0bb 003 1c4 0bb 003 1ce 072 002 002 016 1f8 086 08a 003 013 004 002 006 012 082 1f8 086 088 015 1a3 1c5 1a3 002 1bb 001 1c5 1bb 184 003 104 003 013 000 0c3 072 0f7 08c 0bc 0c3 006 006 1f8 003 1fa 073 002 092 091 000 0ba 093 093 004 004 039 0c5 0ba 142 0a2 1c2 085 183 1e2 0c7 0cc 072 002 000 002 0fe 0c2 0b4 072 0c6 1f8 002 0af 0c0 086 1c2 003 1c0 086 1f8 1c3 1f8 083 1cb 1eb 002 0f3 0b4 1f8 083 1cb 1eb 0f0 082 08a 0b4 0aa 1f8 07b 1cb 0bb 1c2 072 0bc 086 072 1f8 003 10d 023 1bb 18f 1fb 182 1fa 013 1a4 013 1a3 1cd 1a3 1a3 1cb 1f3 1c8 1a3 094 002 1fb 1c3 1c3 004 03b 183 183 1a3 183 123 123 18b 1b3 0c1 091 075 182 093 000 093 092 1c3 1cb 083 1ea 091 000 092 0c8 093 093 004 182 103 046 049 1a3 1bb 186 0c5 1cb 084 0ab 1c9 042 07a 002 1f8 086 080 000 1c3 002 1f8 093 183 1f8 04c 183 183 06b 183 04a 1f2 1a3 042 07a 189 0c1 023 1fb 1cb 003 002 182 1f8 08e 023 041 003 04d 1fb 1cb 006 1f8 006 1f8 1fb 1cd 023 1fb 1c0 013 1e2 1c2 1fb 0c2 1f8 012 1f8 080 093 082 093 092 091 097 1f8 0a7 003 1c3 08a 083 193 1c3 093 182 180 093 182 180 1c3 1d0 002 104 082 082 1f8 090 080 040 002 1f8 080 091 093 092 090 097 096 093 002 085 082 082 082 104 1f8 082 088 093 092 082 090 1f8 082 089 083 1e6 0a3 1fb 1ce 094 095 0bc 0e2 102 1f8 012 102 1f0 0eb 013 010 009 004 004 017 015 090 092 042 094 092 094 095 080 040 002 010 1f8 002 1f8 080 092 091 096 095 093 090 097 094 093 092 091 090 0c5 150 082 082 093 145 1f0 082 089 062 00f 063 002 1fb 1c3 052 053 093 002 13a 102 005 005 006 006 000 053 1fb 18a 093 1ac 1eb 0c4 0fc 0c8 1cd 052 037 003 044 002 002 090 092 092 094 094 095 095 095 095 096 096 096 080 040 052 052 1f8 1f8 08d 003 044 002 1f8 056 096 052 082 1f0 080 0c3 1fd 0ab 02c 0c3 1fa 1c4 0a2 083 102 000 08b 08c 153 002 105 1c3 150 053 1c4 055 1f8 057 053 004 1fb 183 1fa 1c4 052 092 1f0 08e 093 053 183 17b 143 183 1e3 103 082 1c0 08a 1f8 080 082 096 097 082 1f0 08a 010 090 092 080 040 080 097 0c4 082 092 090 093 091 096 095 082 1f0 084 08d 024 08b 012 0fa 0c2 013 015 04b 004 000 002 013 1fb 1c3 013 1c5 017 000 093 1ac 0cc 1c2 1c3 043 1ab 1eb 1b5 003 012 1bb 015 042 0c2 005 005 013 0f6 043 015 07b 1c2 092 1f0 087 06a 042 1f8 012 016 1f8 012 1c3 015 1f0 042 082 08e 003 004 004 090 092 082 092 094 094 095 095 080 040 17c 093 1d3 0b5 003 004 004 1f8 016 1f8 080 093 092 093 085 082 082 082 1f8 08d 093 092 002 010 1f8 08c 003 1e4 023 1fb 1cc 002 010 000 093 012 1e2 1f0 012 093 002 1eb 009 1f8 003 082 08a 090 092 080 040 002 1f8 003 081 1f8 080 082 096 097 082 1f0 08a 010 090 092 080 040 080 091 0c2 082 090 097 093 092 096 095 094 093 092 091 090 097 084 1f0 084 08c 04d 082 1f8 084 000 095 03d 085 006 002 002 005 105 145 092 0cb 084 000 182 1f0 08a 093 1e3 187 1e3 003 17b 081 187 003 185 17b 002 102 003 14c 1bb 145 1ba 093 1e6 093 1e3 188 1e3 1e3 18b 1b3 18b 1e3 193 004 1bb 183 183 004 103 162 1c2 0e3 0e2 14b 173 006 073 18a 102 0c8 144 183 082 089 1e3 1fb 1c7 006 003 1f6 18b 103 188 002 03a 082 1f0 081 096 003 08b 000 180 002 1f8 141 1f8 00b 1c3 02b 1c3 00a 1b2 1e3 002 03a 149 003 003 093 096 045 093 1c0 093 003 18b 092 003 003 002 002 004 003 004 183 003 163 143 14a 003 18d 134 041 182 1c3 041 182 1c3 18a 043 182 063 18b 1c2 003 043 002 103 002 004 1a3 103 1c4 1cb 1eb 1c1 1c3 14b 16b 035 023 0fb 142 1c3 183 183 1f8 002 1f8 14d 1c3 18b 1ab 0ff 14a 002 0b2 002 000 03d 0bb 043 0ab 1c5 1c5 003 105 003 185 1c5 053 1c3 1eb 1c8 102 142 002 042 005 1f8 087 002 043 1c5 003 1f8 01d 005 005 005 006 006 1c5 006 1f8 002 1f8 003 045 003 043 145 023 1ca 042 023 002 042 1f0 050 023 023 1cb 1f3 049 023 023 1cb 1f3 049 082 1f0 003 089 090 092 0c2 092 094 094 095 095 095 095 096 096 096 096 080 040 002 1f8 003 1f5 08b 1eb 1c2 040 083 003 0bc 003 0ca 03b 183 003 1ab 146 1c3 1cb 1eb 183 1ca 1c3 1fb 1f8 003 1fc 003 0c9 003 1f7 03b 1c3 08a 1c2 0aa 040 002 040 083 0bf 03b 08b 143 00b 1eb 143 0b2 143 1ab 144 1f3 183 1ab 12a 13b 104 0ad 003 133 03b 103 0ca 0c2 0d3 100 082 08a 182 0ab 1c2 040 1c2 0ba 1c3 1cb 1eb 1f8 1c3 1f8 1c3 1f8 1c3 1f8 1c3 1f8 1c3 1f8 1c3 1f8 1f3 183 1c3 1f8 0cb 10b 183 1f8 023 1d3 003 1d0 00b 183 1d1 003 023 193 1fb 1ce 192 0ba 040 023 1d5 002 1f8 080 096 095 097 082 002 002 093 1f8 043 092 002 1c0 00b 1eb 1f7 090 092 092 080 040 080 08b 096 094 097 095 1eb 082 0c4 1e8 002 002 1f8 081 003 1f7 03a 003 002 1f8 023 003 1d5 002 1f8 002 002 1f8 003 087 042 04a 002 06a 008 04f 1f8 002 090 092 092 094 080 040 033 082 0ab 082 0ab 082 0ab 082 083 00c 003 083 002 004 083 1c3 1e2 042 1f8 04b 003 00c 002 082 1f8 002 082 002 1f8 0a2 08b 1eb 1ea 002 03a 00f 1f8 003 00b 003 1f8 003 1f8 080 091 090 097 093 092 023 1d7 003 1d0 002 024 004 0d5 002 002 002 03a 1f8 00c 0d5 002 002 1f8 083 042 04a 06a 049 002 090 092 092 094 094 080 040 023 1d7 003 1d0 0c2 1f8 002 002 1f8 084 08e 002 082 1f8 002 002 002 1f8 086 042 04a 002 06a 000 04f 1f8 08c 003 1e2 040 002 040 088 080 092 002 023 093 1c5 1f8 09a 004 1f8 022 090 092 080 040 002 040 080 090 004 09c 084 092 082 0c2 102 091 093 097 096 095 094 093 092 142 1f8 08d 00d 0c5 005 024 006 105 041 185 002 1f8 080 002 145 000 14a 003 08c 002 002 1f8 1f8 090 092 01a 094 092 094 095 095 095 095 096 080 040 003 0d3 0c3 003 003 0d0 110 0d3 1fb 1ce 0d3 002 007 008 002 1f8 002 1f8 042 1f8 0fa 0a3 1ca 040 1c3 082 1f8 002 040 0a3 189 002 040 147 1c3 1e3 14d 082 1f8 0c3 1f8 082 13b 083 0a3 1cb 002 040 107 082 1f8 083 0c2 0e3 1c3 1c7 18c 040 083 083 1ca 040 0e3 1c0 182 0c2 1c3 1f8 0c2 0a3 0e3 183 1cb 1eb 1cb 082 188 1c2 040 003 18c 003 1c2 040 083 1e3 0c3 1e3 143 1cb 1eb 1cf 146 183 1f8 083 1e3 1c3 18f 0c2 0e3 1c3 .bram_init 34 1c7 18c 040 143 1f8 083 10b 040 143 1e3 1c3 18d 1c3 0c2 0e3 1c3 1c7 186 1cb 1c0 040 083 1e3 18b 1c2 040 1c3 1f8 080 096 093 082 097 1f8 092 002 0fa 0a3 1c4 082 0bd 002 090 092 080 040 082 083 1c3 1e3 18b 1c2 040 1c3 1f8 003 083 1a3 147 0c3 000 106 183 1a3 10d 1c2 040 1c3 1f8 003 10b 003 000 083 0c3 1e3 163 183 1c3 1c7 1c2 040 083 083 1ca 040 1c3 1c7 1f8 003 10a 040 0c3 1a3 083 1c3 180 1f8 0fd 123 003 1c3 14b 040 0c3 1a3 083 1c3 180 10b 040 003 1f8 103 0c4 024 083 180 1f8 080 096 082 0c2 093 097 095 094 092 0c4 1f8 080 084 002 1f8 082 005 102 07b 002 000 083 0c2 002 042 1f8 08f 002 090 092 092 094 094 095 080 040 083 0fa 08b 002 040 0a3 083 185 1c2 1f8 03b 083 0a3 143 10f 002 003 18a 1e3 1c2 143 123 13b 103 183 1bb 003 188 1e3 143 1a3 1bb 183 1c3 003 002 000 002 10d 002 18b 1e3 142 0a2 0ba 083 183 1bb 002 18a 1c3 1f8 082 1c3 082 1e3 144 024 03c 045 03c 041 183 1b5 0c2 0d0 040 083 003 1f8 03c 003 183 1bb 183 1f8 0a3 003 142 1f8 080 082 093 1f8 090 002 080 040 03b 003 143 002 093 123 143 1a3 1bb 18b 1c2 040 1c3 103 090 123 1c3 1c3 1f8 03c 044 039 047 182 047 03c 042 03c 141 007 004 171 03c 080 007 04a 007 03c 001 045 12b 003 183 001 039 144 004 14e 183 108 003 083 004 043 06a 1c3 03b 183 1c7 184 0ba 080 082 147 003 14c 0bb 003 080 082 03c 005 083 003 000 03c 044 183 001 1f8 03c 043 183 001 1f8 004 14b 183 1f8 087 004 13f 044 147 107 1a7 147 12f 133 183 1f8 1fa 1c0 1c3 187 024 183 1aa 003 183 082 183 1f8 083 087 001 1f8 003 148 0bb 003 080 083 1fb 123 080 082 1f8 1fa 1c0 1c3 003 024 183 1aa 003 183 082 183 1f8 083 084 1f8 0ba 080 082 103 064 043 083 003 1c3 1cd 082 083 083 004 103 026 1aa 003 084 042 080 040 17d 084 004 024 140 143 1f8 1fa 1c0 1c3 1f8 042 040 080 092 093 0c2 008 0b2 002 090 092 080 040 080 093 083 097 094 095 096 097 093 008 090 080 040 080 093 083 096 097 0c2 094 095 096 097 093 008 0b2 002 090 092 080 040 103 0c3 002 0e2 008 080 092 0c3 002 093 0e2 083 097 094 095 096 097 093 008 090 080 040 003 193 002 082 0b3 1c3 082 191 040 003 1d1 040 03a 080 082 093 000 000 08b 0ab 083 1f3 143 0ab 1bb 1f3 08a 183 0ba 1f2 040 08b 0aa 1f2 08a 0aa 040 08b 0ab 083 1f3 143 0ab 1bb 1f3 08a 183 0ba 1f2 040 08b 0aa 1f2 08a 0aa 040 03b 003 082 143 0c3 023 1c2 040 082 0a3 1eb 1cb 1a3 18b 143 1ab 1cb 1eb 1a3 1f8 03b 083 003 084 004 143 043 037 0eb 18b 082 003 183 182 0c6 03b 082 143 082 0a3 1a3 1bb 18b 143 193 1eb 1a3 08f 1e2 040 1a3 183 123 13b 10b 143 113 1eb 123 1a3 123 13b 10b 143 113 1eb 123 1a3 1e3 1fb 1cb 143 1d1 1a3 12b 1a1 1e3 1fb 1cb 143 1d3 1a3 1a9 123 1e3 1fb 1cb 143 1d1 1a3 12b 1a1 1e3 1fb 1cb 143 1d3 1a3 1a9 1e3 123 13b 10b 143 111 1a3 1eb 1a1 123 13b 10b 143 113 1a9 1e3 1f8 003 1d4 040 003 1d3 003 1d2 040 080 091 0ba 092 082 042 093 000 003 1d3 1c3 042 1c0 003 00b 002 1f8 002 090 092 092 080 040 080 092 093 002 000 085 092 090 080 000 013 1c1 1c0 087 092 003 090 1d1 080 180 080 093 000 089 003 1d3 1c3 1c0 01a 090 080 040 002 1f8 080 092 093 082 022 088 002 1f8 090 092 002 080 040 1f8 002 1f8 080 092 093 082 022 08d 090 092 080 040 1f8 002 1f8 080 0c3 083 002 082 093 092 1f8 083 082 1c3 082 1c0 1f8 002 090 092 080 040 080 091 082 097 092 093 094 095 096 097 093 1f8 090 080 040 013 193 192 1cb 1f3 192 1cb 1f3 192 1cb 1f2 040 003 023 1d3 1c3 1ce 040 063 183 082 080 092 091 093 013 1d0 1d4 1d5 1d6 1d7 0ab 1d0 0ab 1d1 0ab 1d2 1d3 003 1d0 1d1 012 002 1f8 08e 090 092 092 080 040 011 1f8 003 082 080 092 091 093 013 1d0 1d4 1d5 1d6 1d7 0ab 1d0 0ab 1d1 0ab 1d2 1d3 003 1d0 1d1 012 002 1f8 08e 090 092 092 080 040 011 1f8 013 1c3 1d3 1c3 082 087 1cc 040 00b 1d3 1bb 1c2 002 00b 003 004 0c2 004 153 1fb 1c4 1bb 18e 040 113 012 1c3 1fb 086 112 151 110 0c2 080 154 1f8 003 00b 003 1d4 002 003 00b 143 192 0d3 084 113 1fb 1c2 040 193 143 1e3 110 193 1c3 1fb 195 1f8 013 003 13b 193 183 003 103 193 107 003 183 183 1c3 1fb 1a2 157 000 193 002 18e 040 003 003 1d3 192 082 01a 040 003 153 103 1fb 012 0fa 003 0c3 192 0c7 012 0fc 008 193 10d 00c 013 1bb 183 003 183 183 180 156 0c8 000 192 0cf 040 010 1f8 003 1d0 003 1d7 003 1d6 003 1d5 00b 1d3 1bb 1d4 003 1d5 013 1f3 1c8 040 003 1d3 003 153 18f 040 1c3 080 1c3 093 092 091 090 097 096 090 081 0ac 003 193 042 082 1c3 191 1fb 083 183 1e2 1f8 090 092 092 094 094 095 080 040 003 1d2 082 0c5 0f3 1c3 0c2 003 083 08a 092 093 009 1ea 092 092 002 004 044 045 000 082 000 1f8 1f3 18c 1c3 0c2 1f8 102 1f8 053 1c3 053 053 1e5 1f8 003 1d3 003 1d2 003 1d1 033 081 0f3 1c3 086 042 103 002 082 1f8 102 1f8 013 193 192 1cb 1f3 192 1cb 1f3 192 1cb 1f2 040 003 082 1f4 042 082 1f8 003 0bd 0aa 042 082 1f8 003 0bd 0aa 042 082 1f8 0aa 042 082 1f8 080 092 0c3 102 0c3 082 042 082 093 1f8 002 1f8 092 090 042 082 080 1f8 080 15b 091 090 093 092 084 0ea 003 183 1c9 028 1f8 15b 002 003 183 1cf 0ab 003 183 1ca 028 1f8 0ab 003 183 1c9 002 090 092 092 094 080 040 1cb 083 150 1c3 1f8 1cb 083 153 142 002 1c3 1f8 1cb 083 150 1c3 1f8 1cb 083 153 142 002 1c3 1f8 080 06b 096 097 0ea 003 003 143 18c 093 092 028 1f8 092 093 06c 084 003 003 003 004 044 18d 090 092 142 080 040 105 1ea 1fb 003 1fb 1e3 1cb 1eb 1ca 082 0d0 183 1f8 1c3 1f8 100 1ea 1fb 003 1fb 1e3 1cb 1eb 1c9 081 191 1b9 182 143 183 1f8 1c3 1f8 080 095 094 005 045 092 091 090 097 096 093 093 092 091 090 082 105 0ec 002 004 145 185 045 08b 0ce 042 003 042 082 1f8 045 142 1f8 028 005 046 1f8 002 005 004 1c5 046 046 089 042 003 042 082 1f8 142 1f8 090 092 182 092 094 094 095 095 095 095 096 096 096 080 040 100 02b 03a 002 03a 022 08b 043 1d0 0bb 1cc 042 1c2 1f8 084 1f8 002 1f8 102 02b 03a 002 03a 022 08b 043 1d3 1c2 185 0bb 1cc 042 082 1f8 084 1f8 002 1f8 080 092 097 0c2 084 082 042 082 093 093 096 091 090 1f8 002 1f8 042 082 1f8 013 1d0 1d4 1d5 1d6 1d7 003 1d0 083 183 1d1 003 183 1d2 093 003 1d3 003 1d0 02d 10e 1d1 1f8 082 003 003 1c8 013 003 1d1 1f8 084 042 082 1f8 17a 082 01a 043 05b 003 002 000 1f8 042 082 1f8 042 082 1f8 028 1f8 013 003 1d0 1d1 1f8 082 003 10c 013 003 1d1 1f8 084 042 082 1f8 17a 082 01a 043 05b 003 002 000 1f8 042 082 1f8 092 090 092 094 094 095 042 082 080 1f8 1cb 0c3 190 1c3 1f8 1cb 0c3 193 1c3 1f8 080 096 095 094 097 093 092 091 003 084 0c2 002 1f2 0c2 043 004 1fa 044 042 082 082 1f8 002 1f8 042 082 1f8 042 082 1f8 085 003 0c2 082 1f8 085 003 082 002 1f8 143 1c3 084 1c6 04b 042 12b 142 082 1f8 042 0eb 102 082 1f8 042 02b 082 082 1f8 042 082 1f8 002 090 092 092 094 094 095 095 080 040 042 082 1f8 002 1f8 080 097 096 095 094 093 092 091 090 097 096 095 094 093 0e0 084 085 0c5 142 0fb 0a5 004 03e 046 102 005 005 006 046 000 1c5 03a 000 002 000 004 003 003 002 002 093 143 093 163 1c7 1b0 1c7 1c0 003 1a3 1bb 186 082 1f0 083 093 003 003 162 0cf 143 093 163 003 1e3 1fb 1c2 082 092 1f0 093 083 0aa 003 093 002 163 101 13a 002 0c6 002 0c4 002 004 10b 104 143 093 003 00e 163 10c 143 093 004 093 163 003 105 177 003 105 175 105 003 106 03a 000 093 003 1e3 143 1ba 000 002 000 1c4 1ca 0b4 1f8 0b4 1f8 0b4 1f8 0b4 1f8 0b4 1f8 003 003 1cc 053 143 093 042 1af 003 0b4 1f8 002 003 10c 143 052 093 042 1f8 003 103 003 10c 0b4 003 000 003 104 172 003 100 003 10a 003 18b 0b4 003 053 046 084 003 002 0c2 1f0 082 000 003 101 002 003 108 003 00c 042 07a 046 053 000 0bc 086 003 043 03b 053 000 002 1c3 183 027 142 093 1c3 093 093 1e3 1ca 183 03e 000 002 090 092 092 094 094 095 095 095 095 096 096 096 080 040 03a 000 002 1c3 024 183 022 003 1c3 183 1f8 183 1f8 03a 000 002 1f8 046 052 04a 042 1c2 042 092 0bc 1f0 093 08c 183 183 0a4 003 1e6 083 0aa 003 002 003 183 0a6 082 1f8 03a 000 002 1f8 003 17c 043 123 140 1c3 1f8 03a 000 002 1f8 053 003 042 1d0 1f8 03c 000 1f8 0b4 003 1f8 1c3 093 182 1f8 003 1f8 003 046 006 03b 002 103 003 001 003 0ba 00e 053 10b 0cc 12b 084 1f8 12b 1f8 0c7 1f8 002 1f8 087 113 092 003 170 16c 001 0c3 143 004 003 000 0ef 1cb 173 02f 10b 0ca 173 00c 023 1cd 0c4 1f5 14a 0f3 175 1ca 0b3 083 09f 143 182 183 143 044 19f 144 181 1cb 0ea 1b2 02c 10b 1b4 12b 033 1eb 18a 110 111 040 001 004 1f8 003 000 080 096 094 093 092 091 097 095 082 0c5 104 145 184 0ce 148 184 0bb 191 190 02a 005 000 183 090 191 002 000 10c 14a 000 08f 184 0fb 190 191 16a 1f8 143 1fb 189 084 1fb 090 091 102 000 16a 1f8 142 000 082 142 000 042 003 1fe 083 090 091 002 1f8 083 003 183 003 00c 169 14b 02a 1f3 000 148 103 1fb 18a 084 1fb 090 091 003 0c1 0c2 000 003 1c3 14b 02a 1f2 16d 002 090 092 142 092 094 094 095 095 080 .bram_init 35 040 102 000 082 142 000 042 083 004 003 106 003 1f6 004 00c 14c 02a 003 169 033 007 1eb 18c 031 1cb 06b 1f3 1e2 16b 04c 0c4 074 1a3 01c 183 004 02c 03b 14b 1c3 173 03f 03c 1da 184 103 183 001 10d 16c 04c 14b 172 035 080 090 091 1f8 004 044 082 00b 14c 02a 074 001 16b 1f8 142 000 082 142 000 042 003 1f2 083 003 003 10d 004 001 143 1f8 1c3 00c 169 14b 1f8 183 0bb 19b 14b 003 1c3 083 0ab 183 1fb 19b 18b 002 082 1eb 1fa 09a 08a 183 003 143 1eb 083 1fa 09a 003 08a 103 1eb 1eb 163 17b 003 103 17b 082 1c2 040 08b 16b 15b 14b 0ab 1fb 19b 18b 1eb 183 1fb 19b 18b 1eb 183 1fb 19b 18b 1eb 1ea 1e3 0bb 1fb 002 082 003 0ba 183 082 040 000 006 006 007 006 006 007 0a6 0a9 1b2 005 09b 19b 024 005 0bc 0ba 110 0ba 138 0b9 030 0bc 13c 000 096 09e 09e 09e 0ad 134 133 02d 09e 09e 09e 09e 116 039 0b6 037 0b7 117 037 1b7 039 010 018 094 0b1 0b9 117 034 0b9 090 137 000 1b7 1b5 000 1b7 1b9 000 032 000 018 019 019 1b7 1b7 1b9 0b9 030 117 0b9 090 039 021 090 039 1b7 1b1 0b6 0b6 000 1b7 130 1b1 1b2 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045 197 1e0 01b 1e8 157 1d0 124 1d4 124 00b 071 010 001 133 071 000 080 140 1fe 04a 17c 0fc 1fc 014 01a 007 071 1fd 101 001 1fc 019 197 011 1fe 045 047 001 021 042 012 045 002 1fe 1c7 011 1fe 012 045 100 1c2 1ff 073 1d2 043 1e2 143 1fc 1c2 167 114 118 174 180 1fc 178 19a 007 071 001 0b3 071 000 000 07c 11b 14c 028 01a 124 001 1ff 071 117 19c 0a0 1a7 011 038 004 010 025 019 010 024 044 070 000 0f7 1d1 03d 1e1 03d 1fd 1c1 147 040 1c8 184 1a0 1a4 14c 150 154 158 15c 160 164 168 0ec 000 000 004 152 010 0c0 101 000 040 1ff 081 039 1d1 025 000 004 162 001 000 001 181 000 162 031 090 000 152 000 150 000 1b0 1a0 190 180 170 160 150 140 130 120 110 100 0f0 1c0 000 000 040 082 039 191 035 000 0c0 001 180 001 174 152 000 000 150 1fc 0c0 0bc 000 000 120 082 040 031 151 035 001 082 040 029 1a1 021 080 0c0 137 1fd 002 1fd 03c 001 1ff 081 040 081 052 035 0d2 035 000 000 000 000 000 000 021 025 000 030 03e 102 002 003 003 002 033 080 000 001 1f0 080 000 001 1b0 012 0c0 03d 153 00c 006 039 183 004 039 163 173 0c0 001 02d 02d 110 0c0 012 039 161 171 0c0 001 02d 02d 070 000 020 191 001 120 081 010 1c3 001 0d0 081 000 000 001 044 001 004 1fe 037 000 008 1e1 001 1f0 081 163 173 0c0 001 02d 02d 070 000 000 001 0f0 001 0c7 000 008 1f1 001 0c0 001 000 000 001 030 001 007 000 008 001 001 000 000 000 001 001 170 001 147 001 130 001 001 1e3 081 002 082 000 000 001 090 001 004 057 1fc 001 001 03d 000 000 0c0 011 104 120 124 148 0cc 0d0 0d4 0d8 0dc 0e0 100 000 000 071 041 0b0 041 001 001 000 081 001 001 001 001 001 0f8 039 000 0f1 039 02f 081 039 004 0b9 0b9 000 000 144 06c 038 004 0a2 0b2 021 039 0c2 021 039 0d2 021 039 001 000 1c1 180 1d0 005 167 130 101 1c0 0a5 049 059 041 0a9 006 0ce 000 000 00c 004 014 1e1 000 0d0 028 0b0 028 090 028 070 060 028 002 000 070 007 1ae 07c 1cd 078 074 005 021 039 021 021 03e 041 07c 042 0d4 159 050 081 006 0a2 000 121 0a4 160 019 005 0d2 167 040 02b 006 1f7 000 0f7 10c 190 0f7 07c 03d 009 025 001 001 12c 100 004 130 120 110 100 0f0 0e0 0d0 0c0 0b0 0a0 140 000 080 084 061 041 039 08c 039 088 021 039 1f1 010 070 039 006 035 07c 000 12c 049 157 01e 005 035 147 080 084 12c 061 041 03d 08c 03d 088 021 03d 034 1d0 030 000 000 000 0c3 12c 160 04a 0b7 006 0a2 154 177 000 1f1 114 000 1d7 000 1c0 021 004 0a4 000 0b1 074 177 000 121 034 000 000 191 103 001 000 000 000 000 093 030 000 1c1 040 144 140 0c8 001 000 021 0a4 050 054 058 05c 060 084 0a0 04c 064 001 001 000 014 000 000 000 124 0a0 0b0 090 080 070 060 050 040 030 020 010 000 1c1 0c0 0e4 040 001 025 040 000 002 061 064 000 000 04e 001 093 006 1f4 1cd 001 040 166 082 194 000 178 04e 001 181 1fd 13f 0c3 104 006 1cd 001 040 0e6 022 021 022 0a7 0b2 054 006 087 0d2 014 117 082 1e4 006 117 1c0 000 020 000 151 151 03d 000 004 014 0a9 001 020 030 000 0e1 040 0a4 001 000 001 151 054 020 030 000 001 040 1f4 001 081 001 011 1bd 029 080 001 139 001 000 000 005 1a7 005 0b0 001 001 005 001 1b9 081 005 009 029 03d 001 139 101 001 000 005 001 080 000 107 000 140 0a0 0a4 000 000 0c8 04c 084 001 001 081 171 025 000 0e0 001 002 030 011 024 030 081 001 002 001 001 001 001 0b0 0a0 090 080 070 0c0 000 011 087 000 000 180 000 048 04c 0e1 000 000 024 050 054 058 004 020 000 144 000 172 000 0d2 000 000 082 0c0 001 031 0a5 021 011 001 002 172 134 004 011 149 001 1c2 0d4 005 024 0bd 070 060 050 040 030 020 010 000 080 000 1c0 000 004 004 000 000 001 000 0d1 000 1a1 144 030 040 000 180 004 020 0a8 000 1d1 0a4 070 060 080 000 001 001 000 030 044 030 001 001 001 000 011 107 001 000 051 164 1fd 000 021 097 180 004 020 024 004 0a9 000 0b1 094 070 060 050 080 000 001 001 000 030 024 030 001 001 001 000 111 0f7 011 030 000 174 030 001 001 001 000 161 047 001 1a0 001 000 1b1 070 1e7 140 084 0a0 0a4 0c8 04c 004 0a9 000 131 1b0 0b0 0a0 090 080 070 0c0 000 001 001 001 000 030 114 030 001 001 001 000 111 0c7 011 000 030 064 030 001 001 001 000 011 017 008 004 0bd 021 000 030 184 030 001 001 000 1c1 147 000 009 049 13d 04d 005 1b7 140 084 0a0 0a4 0c8 04c 004 0a9 000 001 1d0 0b0 0a0 090 080 070 0c0 000 001 001 001 000 030 134 030 001 001 001 000 081 0c7 011 000 030 084 030 001 001 001 000 101 017 008 004 0bd 021 000 030 1a4 030 001 001 000 1c1 147 000 009 03a 03a 13d 001 005 039 197 180 004 020 024 048 0a8 000 171 1f0 070 060 050 040 080 000 001 001 001 000 030 164 030 001 001 001 000 111 0d7 004 0bd 011 030 000 094 030 001 001 001 000 1e1 007 010 002 002 087 1c7 180 004 020 024 048 0a8 000 031 110 070 060 050 040 080 000 001 001 001 000 030 084 030 001 001 001 000 111 0d7 004 0bd 011 030 000 1b4 030 001 001 001 000 0a1 007 1fc 002 024 1d7 140 084 0a0 0a4 0c8 04c 0a8 000 0e1 030 0b0 0a0 090 080 070 0c0 000 001 001 001 000 030 194 030 001 001 001 000 111 0c7 011 000 030 0e4 030 001 001 001 000 0a1 017 008 000 0a5 021 030 014 030 028 001 001 000 181 147 002 002 114 117 000 004 039 000 004 000 004 180 004 020 024 048 04c 000 101 001 000 1c0 1c1 1f0 000 021 1c0 000 0c1 190 000 161 160 000 1f1 130 000 081 100 1c1 0e0 000 131 0b0 000 1d1 080 1c1 060 000 061 030 073 1c1 000 000 101 1d0 000 171 1a0 1c1 180 000 1e1 150 000 000 0c8 0b1 0f1 0f0 000 000 010 080 161 191 080 000 020 021 040 000 100 091 000 000 020 0f1 1c0 000 020 151 180 1a0 028 1a0 003 101 0b5 030 000 000 1a1 0d0 140 001 000 041 080 110 1fc 03d 0e0 001 000 061 000 000 081 1d0 1c1 1b0 000 091 180 050 004 001 03d 000 161 110 1c1 0f0 081 000 1e1 0b0 0d3 001 1a3 000 0b1 050 1c1 030 000 111 000 000 000 1e2 031 1b0 000 100 100 140 100 081 1c1 130 080 070 100 113 001 070 080 123 001 042 080 1e2 031 050 0b7 100 0a0 0a4 0c8 0cc 0d0 0d4 0d8 05c 060 084 001 000 000 000 028 000 034 1fc 01c 020 1c4 1e1 028 1a9 181 04d 0aa 1dd 0e1 030 044 030 022 005 039 117 055 1d9 081 092 1fd 194 0a7 1cd 022 000 001 1c1 124 0f0 0e0 0d0 0c0 0b0 0a0 090 080 070 060 000 100 000 034 1bd 0c7 000 1fd 181 000 040 000 0be 001 000 008 000 008 000 000 001 038 1fd 035 000 035 0a1 0c4 000 000 001 004 1fd 035 000 035 141 024 000 041 041 000 021 041 039 041 02d 029 03c 039 004 039 000 000 180 000 1e1 004 020 024 000 048 04c 050 054 064 117 001 001 038 001 000 03d 081 010 1b7 000 055 051 001 02c 04d 004 025 025 080 03d 001 03c 049 120 025 0a7 055 051 001 04d 025 001 001 001 034 04d 010 025 1d7 001 001 001 04d 010 025 167 080 001 03d 001 049 120 025 0e7 047 008 000 1f4 001 000 000 008 030 004 070 060 050 040 030 020 010 080 000 00d 009 021 039 005 021 001 03d 021 03d 000 001 031 005 005 1fd 1fd 039 031 181 000 041 1f9 1f9 039 029 091 0ad 029 000 000 000 001 081 001 07c 0e8 005 1fd 0b5 1b1 009 035 1fc 070 001 0c0 1fc 035 039 000 001 000 081 000 024 03d 000 024 000 070 060 03d 080 000 001 180 020 004 001 101 001 101 011 019 0b9 005 02c 174 005 030 081 001 097 06d 069 021 039 00c .bram_init 38 039 055 051 021 035 041 039 001 000 0a1 12d 1c0 020 024 004 001 001 001 0b1 005 004 0f4 001 004 1fc 0a5 030 020 010 040 000 000 000 1c0 020 024 004 1fc 001 0bd 001 007 010 181 0ad 0a9 00c 021 039 041 1ff 041 155 139 0b1 1ac 001 039 061 1fd 004 13d 000 00c 0a1 189 107 001 000 014 0b1 1f9 0a7 001 030 020 001 010 040 000 008 197 004 12d 041 180 020 004 024 048 04c 001 139 001 008 001 0b5 00c 135 0bd 005 071 02e 026 03d 007 081 1fc 070 060 050 040 030 001 080 000 071 006 026 1fe 049 03d 001 0b2 0d7 081 1fe 04d 0b1 005 021 049 001 011 067 051 051 037 071 021 03d 1c7 181 005 0b1 1f9 025 005 001 021 039 157 071 01d 03d 0e7 081 009 0b1 1f1 029 067 011 027 004 001 000 180 048 041 020 024 004 04c 082 008 001 001 03e 001 061 010 081 1fe 002 051 005 039 081 021 016 1b9 001 010 070 060 050 040 030 080 000 029 026 1fd 039 101 001 037 001 004 008 0ad 1fc 004 0b9 041 0bd 02d 001 017 029 0b1 04d 049 025 000 007 100 084 0a0 0a4 0c8 0cc 0d0 0d4 0d8 001 02c 197 02c 101 000 009 001 039 001 001 030 081 030 021 001 101 1fd 001 029 124 005 00c 101 0f0 0e0 0d0 0c0 0b0 0a0 090 080 001 100 000 005 1c4 005 000 081 107 000 001 0a7 008 1bd 040 1c9 0c9 001 002 087 02a 042 012 1ca 041 004 001 00c 001 001 177 0aa 011 1a6 010 004 039 137 010 004 139 029 034 0d7 0e1 0dd 021 039 041 041 000 139 10d 109 022 03e 002 141 017 001 0f1 049 004 1fd 025 1fd 0a1 03d 0e5 042 041 03d 001 1fe 04d 181 0f9 0f5 021 051 041 042 042 042 059 03e 101 101 0fd 021 03d 001 131 1e7 0ed 0e9 021 039 081 0c9 012 03d 035 039 039 0cd 04d 000 1d5 1a5 000 1d5 125 00c 03a 009 03e 0b9 025 055 03d 00c 1ba 15d 159 021 039 03e 041 041 081 161 177 0a9 009 1fd 025 026 000 1f1 04d 005 041 041 1bd 03d 000 0c1 03d 000 027 102 03d 0bd 008 03e 005 0a7 0b9 005 005 025 057 000 1d6 026 006 0b7 180 048 021 020 024 004 04c 050 001 001 001 182 001 008 039 081 101 021 081 008 070 060 050 040 030 020 080 000 081 03d 061 049 101 0b1 021 000 107 001 029 1fc 004 081 001 002 127 001 0cd 02a 041 1bd 017 002 001 133 029 077 004 1b7 0c0 0dc 001 120 0d0 104 124 148 0cc 0d4 0d8 0e0 0e4 0e8 06c 001 001 0bc 170 002 035 1b9 001 002 07c 1b9 000 000 1fe 062 03c 001 000 07c 031 0bc 170 1fc 000 1fc 006 1fe 101 0d4 0b0 181 0a9 0c9 0e1 0ab 0d3 160 006 1e7 000 0bd 001 120 130 110 100 0f0 0e0 0d0 0c0 0b0 0a0 090 080 070 140 1f7 005 001 101 1b9 018 130 120 003 110 100 0f0 0e0 0d0 0c0 0b0 0a0 090 080 070 140 000 0e6 006 03e 029 006 067 006 002 1b1 1b9 000 080 0b8 006 102 03e 001 182 000 080 005 03a 001 005 131 001 0b8 031 00d 0b8 006 03a 1f9 031 1fe 182 081 0ad 003 080 005 1ad 1b1 020 000 000 080 0b8 02c 000 005 005 03e 001 181 041 145 13a 00d 001 167 0bc 170 087 010 0a7 03e 1f9 031 0ad 1fe 067 001 0b7 06f 1ba 167 020 167 00d 02c 081 194 03d 014 0bd 020 03f 00a 1fe 032 030 039 00e 00c 039 009 0a5 001 001 057 001 081 1fc 0bd 1fc 1fc 034 061 003 103 001 001 071 002 001 02e 194 0fd 031 02d 021 101 03c 139 1fc 0bd 180 03a 00d 0ba 00a 1fe 002 02c 020 137 1fc 129 009 0d4 038 03c 134 001 010 020 080 0b8 000 081 1fd 02a 001 001 001 100 001 101 129 00d 17c 0d0 1fc 129 1ff 02f 00d 003 127 069 021 0f1 007 001 069 0a9 007 097 005 097 0fd 041 041 064 03d 00a 147 07d 041 041 13d 181 041 006 041 0b7 009 181 006 001 041 012 102 021 147 03c 0b9 0ad 101 181 101 001 0fd 041 036 0bd 036 1cd 06e 06a 021 039 181 002 033 004 0fd 1fd 0ed 1fc 000 061 065 001 032 005 001 021 031 081 03c 03e 001 038 134 010 028 005 005 03e 001 030 0b4 020 1a9 030 010 1fc 001 001 007 06f 002 101 001 001 005 03e 002 081 1fd 1fd 001 0a3 001 181 1b0 025 1fc 197 000 0b5 1c7 081 02e 002 005 005 01d 025 1fd 03d 1fd 1b1 0a6 0ad 005 101 02c 003 002 193 081 0ad 083 010 1bb 011 181 014 197 010 177 011 101 019 041 181 041 002 0b2 1fd 03d 0c3 029 1c7 140 028 070 084 02c 030 02c 0e3 101 000 001 009 039 001 001 010 001 001 030 001 001 029 039 000 001 030 020 163 0b0 0c0 000 02c 1c7 040 1a4 184 1a0 1c8 14c 150 02c 024 001 001 070 030 001 023 001 081 070 030 080 0bc 067 001 001 12c 181 098 041 181 070 0f0 006 002 002 063 029 072 0f7 01a 029 04d 03d 049 001 001 001 1b0 1a0 001 180 190 170 160 1c0 000 018 001 157 010 1d7 0c0 120 124 0d0 0d4 104 148 0cc 0d8 0dc 0e0 0e4 0e8 001 001 070 001 030 001 1a7 001 001 045 181 041 01c 005 181 031 051 030 03d 021 001 000 1fc 004 1fc 101 051 1fd 001 070 029 025 1fe 03a 002 101 021 12b 008 03d 008 001 130 120 110 100 0f0 0e0 0d0 0c0 0b0 0a0 090 080 140 000 061 001 1c3 0a7 065 004 03d 004 097 029 070 061 003 1b7 001 02a 122 02b 025 04a 039 04d 007 002 002 174 081 026 002 049 04a 049 03e 051 049 049 1d7 031 051 001 1fd 03e 021 001 071 070 077 101 070 051 0b1 1fd 029 03d 001 02a 005 031 1aa 017 180 030 020 004 001 077 001 001 070 060 080 000 140 04c 001 030 0a0 0c8 084 0a4 050 054 001 157 001 181 045 182 031 026 002 051 001 081 000 130 000 051 1fd 181 071 0a9 029 0b0 030 029 026 181 1fd 1fd 0cd 0cd 135 04c 061 03d 03d 03d 081 1fc 004 051 0a6 03d 03d 1fd 001 030 087 181 025 029 1d7 021 02d 0f7 001 04d 03d 137 04d 001 0d1 004 03d 004 0b0 0a0 002 090 080 070 060 050 0c0 000 02a 030 041 03d 008 03d 008 0f7 029 147 140 084 0a0 02c 001 001 070 030 013 081 070 030 001 03d 063 181 0ad 081 019 041 001 014 001 0e0 070 071 001 067 029 070 001 019 03d 193 010 13d 101 0b0 0a0 0c0 000 024 1b7 010 0bd 097 180 030 020 004 001 0f7 001 001 070 060 080 000 0c0 124 001 030 148 0cc 104 120 0d0 0d4 0d8 0dc 0e0 0e4 0e8 06c 001 177 001 101 001 002 0a3 001 0f0 002 000 000 1fc 1fc 010 034 062 1fe 062 001 181 050 002 0e7 001 072 001 081 02d 194 0fd 036 1b1 0b8 1b1 17d 020 1ad 03c 1b1 101 101 0fd 042 035 0ba 035 161 06d 069 021 035 081 001 032 004 0fd 1fd 0dd 1fc 02a 001 02d 005 001 021 02d 182 1ba 005 02d 035 001 005 005 15d 001 101 001 002 1fc 0b9 005 039 001 1fd 1fd 002 0b7 181 002 010 0bd 130 121 1fc 177 0d5 1d7 081 02d 005 005 01d 021 1fd 039 1fd 1bd 023 1fc 0be 002 001 062 001 0b2 1fc 1bd 072 000 000 080 014 024 02c 0b8 005 039 1fd 0ad 029 194 041 03d 03d 044 005 03d 034 005 131 03d 001 059 101 081 1dc 025 020 025 0b8 064 001 039 001 041 041 0a9 0fd 041 041 036 031 035 001 081 03d 005 107 010 0f7 002 05d 041 041 0bb 042 0d4 03d 053 140 12b 023 051 021 039 029 008 03e 000 00a 001 033 059 001 081 002 002 000 021 001 0d7 081 181 051 029 004 0d7 000 000 000 000 1fc 004 002 1fc 087 000 0b7 0fc 03d 004 035 001 031 001 001 02d 071 03d 1c3 029 05d 059 021 039 03d 065 061 021 039 03d 002 0f7 010 13d 130 120 002 110 100 0f0 0e0 0d0 0c0 0b0 0a0 090 080 070 140 000 040 1f7 1fc 029 041 041 001 000 000 000 1b9 0d4 1b9 000 1b1 000 001 029 005 041 041 009 1b1 001 1fd 0d7 1fc 0a9 0d4 0bd 1fc 029 000 1b1 005 029 001 000 000 000 000 1bd 000 041 1b1 000 041 001 031 1d1 001 101 135 011 1f9 021 1fd 035 041 020 0ad 000 121 009 031 001 001 035 005 029 001 001 000 035 005 029 041 041 197 1c1 1c7 181 1a7 141 187 199 167 021 147 0c1 127 1ff 081 039 0e7 101 005 031 107 000 029 020 039 000 005 039 004 000 021 1fd 1b5 041 1fd 000 000 001 1fc 0e7 180 020 024 004 001 000 1fc 02c 057 021 030 005 029 041 041 12d 070 060 050 080 000 180 061 020 048 004 024 061 001 001 081 000 0dc 147 028 004 129 1fd 030 1bd 147 000 004 039 1fc 007 1d0 1fc 1d7 1fc 0bd 1fd 041 004 041 0b0 101 037 1fc 070 060 050 040 080 000 101 03c 062 03c 042 03c 022 03c 048 181 054 03c 000 018 020 025 001 005 1a7 1c9 030 03d 004 01c 077 028 01c 004 037 01c 061 061 181 1fd 1fd 101 167 020 03d 01c 037 004 017 140 0a4 0c8 04c 084 0a0 000 001 1f8 0b9 1a0 000 004 002 028 1fd 1fc 1fd 0f7 181 04a 000 000 127 149 1fd 041 041 101 001 0b0 0a0 090 080 070 0c0 000 000 001 00c 0b9 002 137 0a8 020 1c7 001 0c9 010 030 027 1a0 000 0a4 137 081 1fd 041 004 041 1a4 101 1f7 001 000 1c1 000 004 000 101 1c0 020 000 1c1 004 001 147 005 1a9 017 1c1 030 020 040 000 004 000 140 0c8 004 036 046 0a0 002 001 001 0a4 084 04c 050 054 058 05c 060 001 007 101 000 000 1f8 000 020 006 081 082 1fc 0d7 1dd 004 1fe 004 182 048 03e 000 030 0b7 117 0b0 0a0 024 080 090 070 060 050 040 030 020 0c0 000 1fc 03e 012 004 001 062 051 022 1fd 1b5 042 005 1bd 1b9 1fc 057 1fc 037 1fd 117 1fd 001 02d 000 001 005 1b7 000 000 001 081 000 000 1b9 005 001 181 005 177 001 1b7 02d 1fd 02d 001 001 000 000 1bd 005 197 001 005 1fd 005 1b9 181 000 031 001 031 000 001 039 001 005 005 197 005 001 1fd 03d 061 061 001 005 181 001 000 000 031 000 001 000 039 001 039 001 03d 061 061 101 101 005 127 001 001 005 001 005 1fd 005 .bram_init 39 1b9 181 000 001 167 001 001 000 001 001 005 181 031 005 1fd 005 1b9 101 1b1 001 000 001 001 001 029 000 005 1b7 180 020 02c 001 004 147 030 029 1fd 001 02d 1fd 1a1 000 070 060 080 000 02d 001 02d 001 001 029 000 005 1a7 000 03d 001 001 001 030 035 005 001 181 001 000 005 147 000 039 000 080 039 039 001 001 005 035 101 001 000 031 001 031 000 005 1ad 1c7 000 03d 000 03d 001 03d 005 035 197 0a9 1fd 000 1fd 0bd 000 03d 001 03d 005 035 1bd 000 000 1d7 03d 039 002 039 041 0f7 180 020 001 001 04c 004 024 048 050 001 147 101 001 001 107 001 029 026 049 000 070 002 002 001 1fd 157 101 001 070 060 050 040 030 020 080 000 031 1fd 031 000 000 001 005 1ad 001 197 000 001 001 071 101 0c0 028 129 005 005 039 001 009 001 181 1fd 160 0b1 009 039 001 111 001 009 040 000 130 040 1a9 0c0 1a9 005 039 001 009 001 181 1fd 160 129 009 107 0b1 005 039 001 039 002 112 002 012 082 141 131 001 03d 000 001 020 1e7 00a 002 181 1fd 125 147 001 0b4 039 1b7 1c0 005 004 177 030 028 040 000 000 000 071 028 001 001 039 001 011 001 001 000 0ad 005 039 001 039 141 127 000 072 102 0a2 000 002 042 002 1fa 1f9 088 000 11b 006 0c0 0c0 002 080 00a 000 002 001 030 1fd 0b4 082 000 040 045 1f9 081 0c0 030 004 002 03e 001 046 031 101 000 02d 019 005 000 020 13d 02d 0c0 03d 005 042 002 031 0c0 080 012 002 1fd 0ac 1d7 022 182 1fd 080 187 020 1c5 1fd 197 030 000 0b5 006 007 07b 003 1fb 0b5 135 003 177 02d 01d 005 03f 1f4 001 001 000 1fd 03d 03d 0b7 001 039 080 147 040 13d 02d 0c0 03d 005 02d 087 03d 009 077 02d 07d 005 03e 1b4 001 001 000 1fd 03d 03d 1d7 001 039 157 02d 035 005 029 1be 002 001 1fc 1fd 0b1 045 001 039 080 03d 0b4 001 000 039 002 140 000 02d 030 03e 002 041 005 0c7 02d 041 005 0e7 002 000 1c0 020 004 001 1b0 021 1fd 030 020 040 000 100 0b4 0b0 004 0b8 0bc 0c0 0c4 034 0b0 070 100 000 100 0b4 0b0 020 004 001 0b8 0bc 0c0 0c4 034 1c0 021 1fd 070 060 100 000 001 001 000 1fd 110 100 0b0 001 000 0b4 1fd 0a0 004 0b8 0bc 0c0 0c4 034 030 070 100 000 000 011 004 0bd 186 1a5 03d 029 000 000 029 000 000 1c0 1b1 004 0d0 000 061 061 000 039 001 021 035 039 021 03f 039 029 000 021 021 029 041 041 000 061 061 000 039 001 021 035 039 021 03f 039 029 000 021 021 029 041 041 000 000 000 02d 1e1 029 038 001 000 005 1fd 021 021 031 009 039 001 041 041 03d 117 000 001 1fc 02d 01c 1e1 03a 132 00d 00d 035 1e0 0b5 02d 081 000 02d 1e1 005 1fd 03d 1fd 009 039 001 021 03d 12d 1fd 000 001 021 03d 1fd 009 031 001 021 03d 1e5 03d 1fd 009 031 001 021 03d 1e9 031 1fd 009 03d 001 1ed 021 030 019 1fd 009 03d 001 1f1 020 019 031 1fd 009 03d 001 1f5 021 030 019 1fd 009 03d 001 1f9 020 019 03d 1fd 009 031 001 1fd 021 03c 019 1fd 009 031 001 020 019 077 000 029 000 000 029 000 02d 000 1c0 024 1fd 020 001 001 004 1e0 000 041 001 001 001 028 03d 034 107 001 030 020 010 040 000 1c0 020 004 000 030 001 020 030 040 090 021 181 001 101 020 000 030 031 040 000 1c0 004 110 081 000 021 001 001 028 030 040 000 004 1c7 1c0 020 004 001 001 081 028 007 030 020 004 040 000 1a7 005 157 1c0 020 004 001 001 001 030 020 040 000 0d7 005 187 1c0 001 001 000 000 004 020 0f7 000 001 029 000 001 067 001 030 020 040 000 100 0ac 090 004 0b0 0b4 0b8 0bc 0c0 0c4 02c 027 070 100 000 000 0a1 0b1 021 029 0c1 021 029 0d1 021 029 000 000 000 001 011 1b9 000 000 141 0b9 1c0 020 024 004 000 081 001 001 001 001 061 039 041 039 021 039 029 004 0b9 0b9 000 004 157 001 030 020 010 040 000 0a5 187 0c8 0b9 1c0 020 024 004 000 081 001 001 001 001 061 039 041 039 021 039 029 004 0b9 0b9 000 004 147 001 030 020 010 040 000 0a5 187 000 001 001 011 005 1b5 1b9 000 000 041 009 081 000 000 000 000 0c1 008 021 1fd 001 005 081 000 081 072 005 1fd 03d 081 001 0bd 029 019 045 0f7 004 000 000 039 000 000 000 0c1 051 061 03d 011 1fd 001 000 051 03d 001 03d 051 005 1fd 03d 117 000 000 021 071 001 000 081 081 1bd 000 0c1 03d 005 1fd 001 03d 040 081 000 13d 000 000 000 081 071 03d 028 000 000 061 005 1fd 000 021 000 101 051 1bd 100 1f9 102 051 039 000 012 1fd 081 000 0c1 031 029 03d 101 030 051 0bd 000 02a 1a7 000 081 000 001 000 001 000 001 000 041 1fd 039 00c 039 100 005 101 000 000 061 000 051 1bd 000 14b 140 171 084 0a0 0a4 0c8 04c 050 03c 000 101 000 091 000 1e1 005 0b5 00d 040 03d 1c1 177 0b0 0a0 090 080 070 060 0c0 000 000 0a1 001 081 17d 001 0bd 0a0 0b9 0b9 03c 020 081 0ad 02c 020 000 0a0 000 000 0e0 020 1a4 187 0c9 001 001 1c2 127 1f2 107 0b1 005 0bd 0b1 121 147 000 081 000 0a9 000 081 000 081 17d 001 03d 000 151 0a0 001 1a7 151 187 000 0a1 0b1 021 029 0c1 021 029 0d1 021 029 000 1fc 001 029 000 021 067 004 03d 029 000 041 1a7 000 03d 051 000 061 147 079 000 081 107 1c0 020 031 001 001 001 000 0a1 004 0c7 001 1f7 020 030 000 0e1 040 047 1c0 0aa 024 048 004 020 001 009 000 0a9 1a5 000 127 0aa 000 000 0a9 125 155 000 155 1a5 000 077 155 000 155 1a5 001 030 020 010 000 040 000 009 036 039 005 037 009 036 001 039 005 005 037 009 036 039 005 027 009 036 001 039 005 005 017 180 000 020 004 009 004 000 021 121 030 028 000 177 020 030 000 000 004 000 000 022 1fe 121 070 060 001 080 000 081 005 005 03c 035 02d 041 041 009 02d 039 005 007 005 187 101 005 005 03c 041 02d 041 041 009 019 000 044 038 005 005 1c7 005 157 140 054 058 008 000 0a0 0a4 0c8 04c 050 05c 084 060 064 068 001 001 009 004 000 00e 1fe 000 0ce 00a 000 003 001 101 197 000 1c2 0b3 000 008 000 027 004 000 000 00e 1ff 000 0ce 000 003 001 131 067 1c2 193 0b0 0a0 002 090 080 070 060 050 040 030 020 010 000 0c0 000 102 005 005 020 055 03d 00a 031 021 05a 001 001 102 077 006 067 005 157 102 005 005 020 05d 03d 00a 031 001 021 006 066 001 001 133 137 006 067 005 137 140 0a0 04c 001 001 001 000 161 030 084 050 0a4 0c8 163 001 097 000 1b1 113 000 081 001 001 001 001 1fc 039 000 1fd 039 040 1fd 039 030 1fc 039 004 0b9 009 181 0b9 037 001 000 1fc 051 000 004 0b9 1b7 001 000 1d1 0e3 0be 001 0a9 049 031 034 0a9 1f0 1a7 000 011 023 000 1c1 1f3 000 183 000 004 0b9 0b9 017 001 000 03e 000 004 0b9 1a7 001 000 021 0d3 0be 001 0a9 049 031 034 0a9 1e0 197 000 011 013 0a0 0b0 090 080 070 060 000 1c1 0c0 173 009 03a 035 005 1c7 009 03a 001 005 187 180 020 024 048 004 04c 050 054 000 001 001 000 02d 001 000 001 021 000 000 002 061 173 001 0a7 000 1b1 123 001 002 0c7 001 000 002 002 027 001 004 002 001 1a7 052 029 001 181 005 000 009 002 0b1 1b3 000 00a 002 111 163 000 009 002 171 113 000 1d1 0e3 000 070 060 050 040 030 020 010 080 000 000 001 013 004 137 100 084 0a0 0a4 0c8 0cc 0d0 0d4 0d8 05c 060 064 068 030 101 02d 001 001 001 02a 1fd 1fc 000 000 002 094 080 073 033 0d0 05d 04d 03d 005 050 000 0ac 0b4 0c0 08c 030 005 03c 005 0b9 0bd 0d5 129 03f 001 011 081 030 1a7 001 030 0b8 1fc 001 0b1 005 03c 005 033 001 011 081 030 038 0a7 020 001 001 000 030 1a0 001 0ad 17d 130 029 168 029 1d0 1fc 0ad 001 005 030 1b0 032 005 041 009 034 130 030 001 1b8 135 131 18c 135 0b1 15d 160 135 04d 05d 030 005 001 101 04d 035 009 130 031 1ad 006 107 042 0e7 012 0c7 022 0a7 082 087 0a8 1fc 131 001 009 034 011 081 038 042 0c7 0a8 000 1ad 009 001 034 011 147 190 035 1a4 135 00a 028 1a0 1cc 135 131 1bc 0b5 1c0 0b5 1fc 035 006 020 001 011 002 040 001 002 167 001 190 1d4 0b5 1e0 040 1ad 130 132 01d 1e1 021 001 1e0 042 082 001 011 04d 001 031 005 039 021 03c 001 030 005 03c 030 001 101 002 0cd 001 051 0f0 0e0 0d0 0c0 0b0 0a0 090 080 070 060 050 040 100 000 04d 055 005 1fd 1bc 1fd 038 004 039 005 147 001 177 04d 055 005 157 011 001 001 003 001 001 038 042 123 020 002 001 1fd 0bd 000 0a9 001 001 000 03d 039 021 0bd 003 1f7 04d 055 005 0f7 03d 04d 03d 001 031 005 0c7 04d 055 005 0e7 001 051 011 039 0b7 04d 05d 027 102 040 127 1fd 03c 001 017 020 0c7 1b0 011 0b2 17e 168 0ad 1d0 0b2 1a0 00a 032 001 041 001 041 002 117 041 1d7 182 137 000 127 001 013 001 000 12d 0ad 000 0c5 039 004 000 090 07d 005 03b 07e 005 005 03b 006 03c 001 001 135 03d 129 0bd 035 0ad 02d 039 03d 001 040 075 032 019 047 001 07d 005 02d 006 07d 041 005 032 005 081 01b 047 000 000 000 137 000 010 180 020 048 04c 050 054 004 024 001 001 001 001 001 081 081 001 0b1 001 03d 0cd 000 040 001 02a 001 000 1f0 081 001 004 001 001 0b5 001 03d 0d2 107 1fd 035 081 002 02d 02a 03e 002 150 02a 057 001 0b0 001 002 080 029 078 029 002 022 056 000 187 005 080 031 000 039 032 03a 031 021 110 001 1fd 031 181 002 029 03e 002 004 0be 002 100 080 029 03e 029 021 02a 001 070 060 002 050 040 030 020 010 080 .bram_init 40 000 001 170 001 002 140 029 085 080 000 041 07c 0b1 032 041 042 031 000 032 022 000 07d 004 03a 005 07e 039 1fd 07d 006 04d 03a 1fc 02e 051 03a 07e 04e 005 039 071 006 052 039 040 1fd 001 02e 001 07d 006 005 071 046 002 03a 01a 1d7 100 032 005 045 046 029 022 000 02a 117 001 140 001 002 110 029 07c 0a9 005 080 000 03d 001 000 002 017 031 03d 032 03e 097 1ff 039 005 011 040 035 000 03d 001 039 005 00d 020 039 029 1c1 005 009 035 010 029 035 039 031 005 008 005 029 035 005 005 005 034 03d 03d 039 029 000 041 041 005 011 035 1fd 005 00d 039 035 03d 005 009 039 035 00d 005 005 039 005 1fd 005 005 008 031 03c 03d 035 039 000 000 000 000 000 000 000 000 10d 153 09a 000 012 058 191 000 0d9 19a 1d8 119 1dc 158 01d 009 082 000 14f 14f 14f 00f 14c 119 059 14c 14f 14f 14f 14f 002 188 019 01d 19d 002 05c 019 108 00c 00e 109 11e 18a 002 15b 059 099 19c 000 11b 1dc 000 11b 0d9 000 099 000 000 000 000 11b 019 15b 099 19b 002 0d9 014 148 108 098 01d 11b 15b 119 19e 000 01b 05b 19b 158 15d 09c 11c 1d8 19a 000 15b 09d 000 0db 15b 000 11b 019 15b 0d1 019 0c8 14b 199 002 11b 019 15b 1db 0da 18b 000 11b 019 15b 1db 058 18b 000 11b 19a 000 050 088 01d 11a 08b 000 1db 108 09c 000 15e 01e 000 00c 000 008 000 000 1d2 090 05c 119 009 08a 000 1d2 090 059 119 019 118 148 11e 11b 00c 002 15a 0de 01b 11b 19b 15b 088 148 0d9 09c 15b 08b 000 000 11a 088 114 05d 098 0c8 05b 09c 000 10c 00b 002 199 148 000 0d9 05d 199 000 1d8 0d9 05d 019 11d 0d9 119 1dd 15e 000 018 119 0dc 10f 119 000 1d8 0d9 118 0d9 000 1d8 0d9 15b 01d 000 0d0 148 01e 0d9 000 01d 0d9 118 000 0dd 09b 0d8 000 0dd 093 0d8 000 0dd 018 0d9 15a 000 0dd 010 059 0c8 15a 000 018 01b 019 0d0 19b 008 01d 108 048 15c 0c8 158 000 199 000 199 059 1c8 01d 05c 159 000 01b 000 19a 01d 008 01c 1db 11a 04f 15c 00f 118 00f 15b 017 1d8 0d9 1d8 01d 1db 05c 0d9 108 198 1d8 15d 000 1d8 0d9 159 19a 1da 118 0d9 000 1d8 0d9 1dc 158 119 0dc 000 1db 118 118 0d9 0c8 1db 017 0db 15c 108 119 000 1db 11c 118 00f 05b 09a 017 1d8 0d9 05c 000 1db 159 04f 19c 05c 00f 15c 19b 14f 000 1d8 0d9 15c 19b 188 15d 000 1db 159 000 11c 159 01e 159 000 1db 11c 000 11c 159 01e 158 000 1db 05c 000 05c 119 0dc 05c 000 1db 11a 000 11a 118 0d9 01c 019 1db 118 000 118 119 0dc 05c 000 058 1d8 000 11b 1dc 114 11c 000 05c 1d8 000 11b 1dc 154 118 194 000 1d8 000 1d8 000 05c 15d 000 11c 091 000 14c 008 008 008 1c8 008 1c8 1d7 14c 000 14c 008 1c8 008 00a 1d7 01f 1d7 14c 000 14c 008 00b 1d7 1c8 148 00f 0c6 002 14c 008 1d7 1cb 1d7 1d7 10b 0c6 002 14c 088 11b 15b 05a 05d 00b 05c 0c8 09b 000 058 01b 1da 088 14c 00c 09b 10b 11a 002 058 01b 1da 088 14d 14c 10b 09c 000 1d2 158 01d 188 048 00c 008 0cd 08c 000 1da 1c8 0c8 08c 198 14d 000 11a 1c8 0c8 08c 14d 18c 000 14f 14f 14f 14f 0c6 1d4 016 14f 14f 14f 14f 14f 002 09e 198 19a 000 14c 0d5 09b 0c9 148 092 000 014 153 000 14c 0d4 09b 0c9 159 01d 109 090 000 14c 0d4 09b 109 11a 118 000 14c 0d3 09b 109 090 000 14c 150 14c 142 09a 000 14c 0c6 04e 0d9 002 14c 054 016 042 052 109 11a 148 1d5 000 153 000 115 019 000 14f 14f 14f 056 05b 118 118 0db 01b 14f 14f 14f 002 1db 048 05d 09a 1da 059 119 000 14f 14f 14f 14f 056 1db 016 14f 14f 14f 14f 14f 002 088 01d 059 188 11b 000 14f 14f 14f 00f 14c 0db 0d9 01b 14f 14f 14f 14f 002 08e 11b 019 14c 000 01c 15b 019 01d 19d 000 002 11a 19a 114 013 0c8 1dd 019 11b 19b 000 11a 19a 114 013 008 1d9 019 11b 19b 000 11a 05b 1db 091 008 009 18b 000 051 023 051 1e3 1e4 155 0e6 1e7 153 1e9 0ea 1eb 0ec 1ed 0ee 1ef 0f0 1f1 0f2 1f3 0f4 1f5 0f6 1f7 0f8 1f9 0fa 1fb 0fc 1fd 0fe 1ff 1c1 084 106 000 015 0d5 000 10e 1df 000 14e 000 000 000 000 000 000 000 000 000 000 03f 038 038 039 03a 03b 03b 031 039 03d 03c 03e 035 028 029 064 03b 03e 034 02e 0c4 02f 028 02e 164 140 158 155 158 155 157 144 14d 147 14f 157 155 159 154 159 159 156 154 15a 146 162 163 160 037 0f0 0f0 0f1 0e6 0ed 0f1 08a 02c 099 0c8 092 086 086 02c 028 0c6 0c5 0c1 000 040 04c 04e 052 05e 060 090 060 061 061 061 062 062 063 064 064 065 065 066 08f 067 088 068 068 069 069 069 06a 06b 06b 06b 06c 06c 06d 06e 06e 06f 06f 070 070 071 071 072 072 072 044 000 077 07c 07c 07d 04a 044 002 08e 08f 08f 090 091 094 060 095 062 063 064 097 097 098 065 099 099 065 118 09b 067 09c 09c 067 09d 09e 09e 119 09f 0a0 06a 0a1 0a1 091 06c 0a3 0a3 0a4 0de 0ff 0ff 001 0e2 0e2 0c4 000 0e8 0c2 000 0e3 0f6 0fc 0fe 0fd 0fd 0fd 0fe 10c 114 118 122 130 133 130 051 109 000 000 180 1a8 1c0 1c4 1c8 1cc 1d0 1d4 1d6 1d6 1d7 1d7 182 003 1ee 1f2 1f2 1f6 1fe 1fa 1fe 182 182 182 001 1ee 1ef 000 1f4 1f8 1f9 1fb 000 053 04c 084 000 134 10c 118 119 11d 120 140 1d0 000 002 002 00a 002 002 002 002 002 004 004 004 004 101 101 004 004 050 050 040 040 040 040 000 004 090 090 080 080 080 080 000 004 000 000 000 000 000 000 000 000 004 004 004 004 004 004 004 004 040 040 040 040 040 000 040 080 080 080 080 080 080 000 080 080 0cc 1cd 090 191 092 193 094 195 096 000 0cc 1cd 098 199 09a 19b 09c 19d 09e 000 09b 199 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 1c1 183 042 1db 01a 058 199 1b6 077 035 1f4 06d 1ac 1ee 02f 16d 0ac 0ee 12f 0b6 177 135 0f4 0db 11a 158 099 100 0c1 083 142 0db 11a 158 099 100 0c1 083 142 16d 0ac 0ee 12f 0b6 177 135 0f4 1b6 077 035 1f4 06d 1ac 1ee 02f 000 1c1 183 042 1db 01a 058 199 1b7 076 034 1f5 06c 1ad 1ef 02e 001 1c0 182 043 1da 01b 059 198 0da 11b 159 098 101 0c0 082 143 16c 0ad 0ef 12e 0b7 176 134 0f5 16c 0ad 0ef 12e 0b7 176 134 0f5 0da 11b 159 098 101 0c0 082 143 001 1c0 182 043 1da 01b 059 198 1b7 076 034 1f5 06c 1ad 1ef 02e 16e 0af 0ed 12c 0b5 174 136 0f7 0d8 119 15b 09a 103 0c2 080 141 003 1c2 180 041 1d8 019 05b 19a 1b5 074 036 1f7 06e 1af 1ed 02c 1b5 074 036 1f7 06e 1af 1ed 02c 003 1c2 180 041 1d8 019 05b 19a 0d8 119 15b 09a 103 0c2 080 141 16e 0af 0ed 12c 0b5 174 136 0f7 0d9 118 15a 09b 102 0c3 081 140 16f 0ae 0ec 12d 0b4 175 137 0f6 1b4 075 037 1f6 06f 1ae 1ec 02d 002 1c3 181 040 1d9 018 05a 19b 002 1c3 181 040 1d9 018 05a 19b 1b4 075 037 1f6 06f 1ae 1ec 02d 16f 0ae 0ec 12d 0b4 175 137 0f6 0d9 118 15a 09b 102 0c3 081 140 002 000 0ca 016 09d 000 0dd 000 15d 000 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 41 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 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000 000 000 000 000 000 000 018 018 000 000 000 000 000 000 000 00b 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 01f 000 000 01f 000 000 000 00a 000 000 000 000 000 000 000 000 000 001 000 018 000 00a 000 000 018 000 000 000 000 000 000 000 000 00a 002 000 000 01f 000 016 002 000 000 01f 000 000 000 000 000 000 000 000 000 000 01d 000 002 005 000 000 000 000 00a 000 00a 001 002 002 000 01f 000 000 000 000 00a 001 000 000 000 000 000 000 000 000 00e 000 000 000 000 000 00b 01f 000 000 00b 000 001 01e 010 01f 01f 000 000 000 000 000 000 00b 000 000 000 000 000 000 000 000 000 000 00d 000 000 000 000 000 00b 01f 000 000 000 00c 000 000 000 000 000 00b 01f 000 008 000 000 00b 00f 01e 01f 000 000 000 000 000 000 000 000 00d 00e 000 000 000 000 000 000 000 000 000 000 000 000 00b 000 000 000 000 000 00b 01f 000 000 000 00b 000 000 000 000 000 00b 01f 000 000 000 000 000 000 00a 000 000 000 000 00d 01e 000 000 000 01e 000 000 01f 01f 000 000 000 000 000 000 000 000 00e 00c 000 000 000 000 000 000 000 000 000 000 000 000 009 000 000 000 000 000 00e 01f 000 000 000 009 000 000 000 000 000 00e 01f 000 000 000 000 000 000 008 000 000 000 000 00d 01e 000 000 000 000 01e 000 000 000 01f 01f 000 000 000 000 000 000 00e 00a 000 000 000 000 000 000 000 000 000 000 000 007 000 000 000 000 000 00b 01f 000 000 000 000 000 007 000 000 000 000 000 00e 01f 000 000 000 010 01e 01f 000 000 000 000 000 000 00f 009 000 000 000 000 000 000 000 000 000 000 000 006 000 000 000 000 000 00b 01f 000 000 000 000 000 005 000 000 000 000 000 00f 01f 01f 000 00f 01e 01f 000 000 000 000 000 000 000 00f 008 000 000 000 000 000 000 000 000 000 000 000 000 004 000 000 000 000 000 00b 01f 000 000 000 004 000 000 000 000 000 00f 01f 000 000 000 000 000 004 000 000 000 000 000 00f 01e 000 000 009 01e 01e 000 000 000 000 008 00d 01e 001 001 001 001 001 000 017 006 000 00c 016 005 000 012 005 000 012 005 000 012 005 000 012 005 000 013 005 016 005 000 013 005 000 013 005 016 005 000 014 005 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000 01f 000 002 000 01f 000 000 000 000 000 000 000 000 000 000 001 000 001 000 000 000 000 000 000 01d 000 01f 000 000 000 000 000 000 000 000 000 000 000 003 000 000 000 000 01c 01f 003 000 000 000 000 000 000 000 01f 000 000 01f 000 000 000 01b 01e 000 000 003 000 000 000 000 000 01e 000 000 000 01b 01e 000 000 003 000 018 000 01f 000 000 000 01f 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 003 001 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 01f 000 000 000 01c 000 000 000 01f 01f 000 01f 000 01f 000 000 017 000 000 000 000 000 000 01f 01f 000 000 000 000 000 000 000 000 000 000 016 000 000 002 000 002 000 000 000 000 000 000 000 000 000 001 000 000 002 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 001 000 000 01f 01f 000 000 018 000 000 000 003 004 000 000 014 000 000 000 01f 000 000 000 000 000 000 017 000 000 01f 000 000 000 01e 000 000 01e 000 000 01e 000 000 000 000 000 008 004 01f 000 000 000 000 000 000 013 000 000 000 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000 000 000 000 000 000 000 01f 000 000 000 000 01e 000 000 01f 01f 000 000 000 000 001 000 000 01e 000 000 000 000 000 000 001 000 000 000 000 000 000 000 01f 000 01f 01f 000 000 000 000 000 01f 01f 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 01f 000 000 01e 000 01e 000 01f 000 01e 01f 01e 000 01e 000 001 001 000 001 000 000 000 001 000 000 000 000 000 000 001 000 000 000 000 000 003 000 000 000 000 018 000 006 01f 000 001 001 000 000 000 01a 000 006 000 000 006 000 001 000 000 000 000 002 000 002 01f 000 004 000 000 01e 000 001 000 000 000 01d 000 000 000 003 000 000 00a 001 000 000 000 000 000 000 000 000 000 000 000 01b 000 000 000 000 000 000 001 01f 01f 000 000 000 01c 000 000 000 000 000 000 000 000 01c 000 01f 01f 000 000 000 000 000 01f 01f 000 000 01f 01f 000 000 000 01f 000 01c 000 000 000 000 01c 000 01c 000 002 000 000 001 000 002 001 000 000 000 000 001 000 000 000 000 001 000 000 000 000 01f 000 001 000 01b 000 000 000 000 000 000 000 001 000 001 000 000 008 000 000 000 000 000 000 000 008 000 000 000 000 001 000 000 000 01f 000 000 000 000 000 000 000 000 01f 001 000 01a 000 01a 000 01e 001 01f 000 01f 01f 000 000 000 000 000 000 000 01f 000 001 01f 000 000 000 01a 000 000 000 011 01a 000 000 000 015 000 015 000 015 000 01f 000 015 000 000 01f 000 000 000 003 000 013 000 013 01f 000 000 000 000 000 000 011 000 002 002 000 000 000 002 000 000 000 000 000 000 000 000 000 000 000 000 019 000 000 000 000 01f 01f 000 000 000 000 000 000 000 000 001 000 000 000 000 019 000 001 000 000 000 000 011 000 001 000 000 000 000 000 000 000 000 000 000 011 000 000 01e 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 01f 000 01f 01f 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 01e 000 001 000 000 000 000 000 000 000 000 000 008 000 000 004 003 000 01f 000 000 003 002 000 000 000 01f 000 001 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 010 01f 000 000 000 000 01f 000 000 000 000 01b 01f 000 000 000 000 000 000 008 000 000 000 008 01f 000 000 008 000 000 000 000 000 000 01d 000 000 000 003 008 000 000 000 000 01d 01e 000 000 000 003 000 000 000 000 000 000 01f 01f 01f 000 000 000 000 01b 000 000 000 000 000 000 01f 000 000 000 000 000 000 000 000 000 000 01a 000 001 000 001 000 000 000 000 000 000 000 001 000 000 003 01f 000 001 000 001 000 000 000 000 01f 01f 000 000 000 008 000 000 000 008 01f 01f 000 000 000 000 000 003 01f 000 018 000 000 000 01e 000 000 01f 000 000 000 01c 008 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 01f 000 01e 01f 000 000 000 001 000 000 000 010 000 000 000 000 000 018 000 000 000 000 000 000 000 000 000 000 000 000 018 000 000 000 000 000 015 000 01f 01f 000 000 000 000 000 01f 000 01f 01f 01f 000 000 000 000 016 000 000 000 000 000 000 01f 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 015 000 007 000 000 014 000 007 000 000 000 001 001 000 000 01b 01f 000 000 002 002 000 016 002 000 000 004 000 001 000 000 001 000 001 01f 000 001 000 001 000 001 001 000 000 000 000 001 000 000 000 000 001 000 000 000 01f 01f 000 001 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 01f 000 000 000 000 001 000 000 000 000 01f 001 000 019 01d 000 000 01d 000 01e 001 01f 01f 01f 000 000 000 000 000 000 01f 000 001 01f 000 01f 000 000 000 000 004 000 01f 002 000 000 000 000 000 000 000 000 000 000 01f 000 000 001 000 000 000 000 000 000 000 000 01f 000 000 000 002 002 01f 000 000 008 000 000 000 000 002 000 000 003 01f 000 000 000 000 000 000 000 000 000 01f 000 01d 000 000 000 000 000 000 003 000 008 002 000 001 000 000 000 000 000 000 000 000 000 000 000 000 01f 000 000 000 000 000 01d 000 01f 000 000 000 01f 000 000 000 000 001 000 010 00f 01f 000 01f 000 000 000 000 000 000 000 000 000 000 000 01c 000 000 000 000 000 000 000 000 000 000 000 000 014 000 018 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 00e 01d 013 000 00e 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 47 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 48 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 49 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 50 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 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EBR3.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX INV enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX INV enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R37C64:MIB_EBR4 MIB_R37C65:MIB_EBR5 MIB_R37C66:MIB_EBR6 word: EBR2.WID 110001000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX INV enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX INV enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R37C62:MIB_EBR2 MIB_R37C63:MIB_EBR3 MIB_R37C64:MIB_EBR4 word: EBR1.WID 010001000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX INV enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX INV enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R25C17:MIB_EBR4 MIB_R25C18:MIB_EBR5 MIB_R25C19:MIB_EBR6 word: EBR2.WID 011110000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX INV enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX INV enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R25C13:MIB_EBR0 MIB_R25C14:MIB_EBR1 word: EBR0.WID 110011000 word: EBR0.CSDECODE_A 111 word: EBR0.CSDECODE_B 111 enum: EBR0.MODE PDPW16KD enum: EBR0.PDPW16KD.DATA_WIDTH_R 36 enum: EBR0.REGMODE_A NOREG enum: EBR0.REGMODE_B NOREG enum: EBR0.RESETMODE SYNC enum: EBR0.ASYNC_RESET_RELEASE SYNC enum: EBR0.GSR DISABLED enum: EBR0.CLKAMUX CLKA enum: EBR0.CLKBMUX CLKB enum: EBR0.RSTAMUX INV enum: EBR0.RSTBMUX INV enum: EBR0.CEAMUX CEA enum: EBR0.CEBMUX CEB enum: EBR0.OCEAMUX OCEA enum: EBR0.OCEBMUX OCEB .tile_group MIB_R25C35:MIB_EBR2 MIB_R25C36:MIB_EBR3 MIB_R25C37:MIB_EBR4 word: EBR1.WID 010100000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE PDPW16KD enum: EBR1.PDPW16KD.DATA_WIDTH_R 36 enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX CLKA enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R25C33:MIB_EBR0 MIB_R25C34:MIB_EBR1 word: EBR0.WID 011000000 word: EBR0.CSDECODE_A 111 word: EBR0.CSDECODE_B 111 enum: EBR0.MODE DP16KD enum: EBR0.DP16KD.DATA_WIDTH_A 9 enum: EBR0.DP16KD.DATA_WIDTH_B 9 enum: EBR0.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR0.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR0.REGMODE_A NOREG enum: EBR0.REGMODE_B NOREG enum: EBR0.RESETMODE SYNC enum: EBR0.ASYNC_RESET_RELEASE SYNC enum: EBR0.GSR DISABLED enum: EBR0.CLKAMUX CLKA enum: EBR0.CLKBMUX CLKB enum: EBR0.RSTAMUX INV enum: EBR0.RSTBMUX INV enum: EBR0.WEAMUX WEA enum: EBR0.WEBMUX INV enum: EBR0.CEAMUX CEA enum: EBR0.CEBMUX CEB enum: EBR0.OCEAMUX OCEA enum: EBR0.OCEBMUX OCEB .tile_group MIB_R25C10:MIB_EBR6 MIB_R25C11:MIB_EBR7 MIB_R25C12:MIB_EBR8 word: EBR3.WID 101000000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE PDPW16KD enum: EBR3.PDPW16KD.DATA_WIDTH_R 36 enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX CLKA enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R25C26:MIB_EBR4 MIB_R25C27:MIB_EBR5 MIB_R25C28:MIB_EBR6 word: EBR2.WID 001000000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 18 enum: EBR2.DP16KD.DATA_WIDTH_B 18 enum: EBR2.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX CLKA enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX WEA enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R37C19:MIB_EBR6 MIB_R37C20:MIB_EBR7 MIB_R37C21:EBR_SPINE_LL0 word: EBR3.WID 110101000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX INV enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX INV enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R25C53:MIB_EBR2 MIB_R25C54:MIB_EBR3 MIB_R25C55:MIB_EBR4 word: EBR1.WID 011100000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX CLKA enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX WEA enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R37C28:MIB_EBR6 MIB_R37C29:MIB_EBR7 MIB_R37C30:EBR_CMUX_LL_25K word: EBR3.WID 111001000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX INV enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX INV enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R25C42:MIB_EBR0 MIB_R25C43:MIB_EBR1 word: EBR0.WID 100100000 word: EBR0.CSDECODE_A 111 word: EBR0.CSDECODE_B 111 enum: EBR0.MODE DP16KD enum: EBR0.DP16KD.DATA_WIDTH_A 9 enum: EBR0.DP16KD.DATA_WIDTH_B 9 enum: EBR0.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR0.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR0.REGMODE_A NOREG enum: EBR0.REGMODE_B NOREG enum: EBR0.RESETMODE SYNC enum: EBR0.ASYNC_RESET_RELEASE SYNC enum: EBR0.GSR DISABLED enum: EBR0.CLKAMUX CLKA enum: EBR0.CLKBMUX CLKB enum: EBR0.RSTAMUX INV enum: EBR0.RSTBMUX INV enum: EBR0.WEAMUX WEA enum: EBR0.WEBMUX INV enum: EBR0.CEAMUX CEA enum: EBR0.CEBMUX CEB enum: EBR0.OCEAMUX OCEA enum: EBR0.OCEBMUX OCEB .tile_group MIB_R37C66:MIB_EBR6 MIB_R37C67:MIB_EBR7 MIB_R37C68:MIB_EBR8 word: EBR3.WID 100001000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX INV enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX INV enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R25C66:MIB_EBR6 MIB_R25C67:MIB_EBR7 MIB_R25C68:MIB_EBR8 word: EBR3.WID 000011000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX CLKA enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX WEA enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R25C60:MIB_EBR0 MIB_R25C61:MIB_EBR1 word: EBR0.WID 010010000 word: EBR0.CSDECODE_A 111 word: EBR0.CSDECODE_B 111 enum: EBR0.MODE DP16KD enum: EBR0.DP16KD.DATA_WIDTH_A 9 enum: EBR0.DP16KD.DATA_WIDTH_B 9 enum: EBR0.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR0.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR0.REGMODE_A NOREG enum: EBR0.REGMODE_B NOREG enum: EBR0.RESETMODE SYNC enum: EBR0.ASYNC_RESET_RELEASE SYNC enum: EBR0.GSR DISABLED enum: EBR0.CLKAMUX CLKA enum: EBR0.CLKBMUX CLKB enum: EBR0.RSTAMUX INV enum: EBR0.RSTBMUX INV enum: EBR0.WEAMUX WEA enum: EBR0.WEBMUX INV enum: EBR0.CEAMUX CEA enum: EBR0.CEBMUX CEB enum: EBR0.OCEAMUX OCEA enum: EBR0.OCEBMUX OCEB .tile_group MIB_R25C64:MIB_EBR4 MIB_R25C65:MIB_EBR5 MIB_R25C66:MIB_EBR6 word: EBR2.WID 010110000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX CLKA enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX WEA enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R13C55:MIB_DSP4 MIB_R13C55:MIB2_DSP4 MIB_R13C56:MIB_DSP5 MIB_R13C56:MIB2_DSP5 MIB_R13C57:MIB_DSP6 MIB_R13C57:MIB2_DSP6 MIB_R13C58:MIB_DSP7 MIB_R13C58:MIB2_DSP7 MIB_R13C59:DSP_SPINE_UR1 MIB_R13C59:MIB2_DSP8 enum: MULT18_4.REG_INPUTA_CLK NONE enum: MULT18_4.REG_INPUTA_CE CE0 enum: MULT18_4.REG_INPUTA_RST RST0 enum: MULT18_4.REG_INPUTB_CLK NONE enum: MULT18_4.REG_INPUTB_CE CE0 enum: MULT18_4.REG_INPUTB_RST RST0 enum: MULT18_4.REG_INPUTC_CLK NONE enum: MULT18_4.REG_PIPELINE_CLK NONE enum: MULT18_4.REG_PIPELINE_CE CE0 enum: MULT18_4.REG_PIPELINE_RST RST0 enum: MULT18_4.REG_OUTPUT_CLK NONE enum: MULT18_4.REG_OUTPUT_RST RST0 enum: MULT18_4.CLK0_DIV ENABLED enum: MULT18_4.CLK1_DIV ENABLED enum: MULT18_4.CLK2_DIV ENABLED enum: MULT18_4.CLK3_DIV ENABLED enum: MULT18_4.GSR ENABLED enum: MULT18_4.SOURCEB_MODE B_SHIFT enum: MULT18_4.RESETMODE SYNC enum: MULT18_4.MODE MULT18X18D enum: MULT18_4.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_4.CLK0MUX CLK0 enum: MULT18_4.CLK1MUX CLK1 enum: MULT18_4.CLK2MUX CLK2 enum: MULT18_4.CLK3MUX CLK3 enum: MULT18_4.CE0MUX CE0 enum: MULT18_4.CE1MUX CE1 enum: MULT18_4.CE2MUX CE2 enum: MULT18_4.CE3MUX CE3 enum: MULT18_4.RST0MUX RST0 enum: MULT18_4.RST1MUX RST1 enum: MULT18_4.RST2MUX RST2 enum: MULT18_4.RST3MUX RST3 .tile_group MIB_R37C44:MIB_EBR2 MIB_R37C45:MIB_EBR3 MIB_R37C46:MIB_EBR4 word: EBR1.WID 100010000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX CLKA enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX WEA enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R37C51:MIB_EBR0 MIB_R37C52:MIB_EBR1 word: EBR0.WID 001010000 word: EBR0.CSDECODE_A 111 word: EBR0.CSDECODE_B 111 enum: EBR0.MODE DP16KD enum: EBR0.DP16KD.DATA_WIDTH_A 9 enum: EBR0.DP16KD.DATA_WIDTH_B 9 enum: EBR0.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR0.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR0.REGMODE_A NOREG enum: EBR0.REGMODE_B NOREG enum: EBR0.RESETMODE SYNC enum: EBR0.ASYNC_RESET_RELEASE SYNC enum: EBR0.GSR DISABLED enum: EBR0.CLKAMUX CLKA enum: EBR0.CLKBMUX CLKB enum: EBR0.RSTAMUX INV enum: EBR0.RSTBMUX INV enum: EBR0.WEAMUX WEA enum: EBR0.WEBMUX INV enum: EBR0.CEAMUX CEA enum: EBR0.CEBMUX CEB enum: EBR0.OCEAMUX OCEA enum: EBR0.OCEBMUX OCEB .tile_group MIB_R25C62:MIB_EBR2 MIB_R25C63:MIB_EBR3 MIB_R25C64:MIB_EBR4 word: EBR1.WID 011010000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX CLKA enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX WEA enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R50C2:PLL0_LL MIB_R50C3:BANKREF8 word: CLKI_DIV 0000000 word: CLKFB_DIV 0001111 word: CLKOP_DIV 0000111 word: CLKOP_CPHASE 0000111 word: CLKOP_FPHASE 000 word: CLKOS_DIV 0000111 word: CLKOS_CPHASE 0001001 word: CLKOS_FPHASE 000 word: CLKOS2_DIV 0000111 word: CLKOS2_CPHASE 0000000 word: CLKOS2_FPHASE 000 word: CLKOS3_DIV 0000000 word: CLKOS3_CPHASE 0010111 word: CLKOS3_FPHASE 000 word: PLL_LOCK_MODE 000 word: KVCO 000 word: LPF_CAPACITOR 00 word: LPF_RESISTOR 0010000 word: ICP_CURRENT 00110 word: FREQ_LOCK_ACCURACY 00 word: MFG_GMC_GAIN 000 word: MFG_GMC_TEST 1110 word: MFG1_TEST 000 word: MFG2_TEST 000 word: MFG_FORCE_VFILTER 0 word: MFG_ICP_TEST 0 word: MFG_EN_UP 0 word: MFG_FLOAT_ICP 0 word: MFG_GMC_PRESET 0 word: MFG_LF_PRESET 0 word: MFG_GMC_RESET 0 word: MFG_LF_RESET 0 word: MFG_LF_RESGRND 0 word: MFG_GMCREF_SEL 10 word: MFG_ENABLE_FILTEROPAMP 1 enum: MODE EHXPLLL enum: CLKOP_ENABLE ENABLED enum: CLKOS_ENABLE ENABLED enum: CLKOS2_ENABLE ENABLED enum: CLKOS3_ENABLE ENABLED enum: FEEDBK_PATH INT_OS3 enum: CLKOP_TRIM_POL RISING enum: CLKOP_TRIM_DELAY 0 enum: CLKOS_TRIM_POL RISING enum: CLKOS_TRIM_DELAY 0 enum: OUTDIVIDER_MUXA DIVA enum: OUTDIVIDER_MUXB DIVB enum: OUTDIVIDER_MUXC DIVC enum: OUTDIVIDER_MUXD DIVD enum: STDBY_ENABLE DISABLED enum: REFIN_RESET DISABLED enum: SYNC_ENABLE DISABLED enum: INT_LOCK_STICKY ENABLED enum: DPHASE_SOURCE DISABLED enum: PLLRST_ENA DISABLED enum: INTFB_WAKE DISABLED .tile_group MIB_R25C46:MIB_EBR4 MIB_R25C47:MIB_EBR5 MIB_R25C48:MIB_EBR6 word: EBR2.WID 110100000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX CLKA enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX WEA enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R25C15:MIB_EBR2 MIB_R25C16:MIB_EBR3 MIB_R25C17:MIB_EBR4 word: EBR1.WID 110110000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX INV enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX INV enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R37C37:MIB_EBR4 MIB_R37C38:MIB_EBR5 MIB_R37C39:MIB_EBR6 word: EBR2.WID 001110000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX INV enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX INV enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R37C35:MIB_EBR2 MIB_R37C36:MIB_EBR3 MIB_R37C37:MIB_EBR4 word: EBR1.WID 101110000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX INV enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX INV enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R25C19:MIB_EBR6 MIB_R25C20:MIB_EBR7 MIB_R25C21:MIB_EBR8 word: EBR3.WID 111110000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX INV enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX INV enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R37C60:MIB_EBR0 MIB_R37C61:MIB_EBR1 word: EBR0.WID 000001000 word: EBR0.CSDECODE_A 111 word: EBR0.CSDECODE_B 111 enum: EBR0.MODE DP16KD enum: EBR0.DP16KD.DATA_WIDTH_A 9 enum: EBR0.DP16KD.DATA_WIDTH_B 9 enum: EBR0.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR0.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR0.REGMODE_A NOREG enum: EBR0.REGMODE_B NOREG enum: EBR0.RESETMODE SYNC enum: EBR0.ASYNC_RESET_RELEASE SYNC enum: EBR0.GSR DISABLED enum: EBR0.CLKAMUX INV enum: EBR0.CLKBMUX CLKB enum: EBR0.RSTAMUX INV enum: EBR0.RSTBMUX INV enum: EBR0.WEAMUX INV enum: EBR0.WEBMUX INV enum: EBR0.CEAMUX CEA enum: EBR0.CEBMUX CEB enum: EBR0.OCEAMUX OCEA enum: EBR0.OCEBMUX OCEB .tile_group MIB_R37C46:MIB_EBR4 MIB_R37C47:MIB_EBR5 MIB_R37C48:MIB_EBR6 word: EBR2.WID 101100000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX CLKA enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX WEA enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R37C24:MIB_EBR2 MIB_R37C25:MIB_EBR3 MIB_R37C26:MIB_EBR4 word: EBR1.WID 100101000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX INV enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX INV enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R13C51:MIB_DSP0 MIB_R13C51:MIB2_DSP0 MIB_R13C52:MIB_DSP1 MIB_R13C52:MIB2_DSP1 MIB_R13C53:MIB_DSP2 MIB_R13C53:MIB2_DSP2 MIB_R13C54:MIB_DSP3 MIB_R13C54:MIB2_DSP3 MIB_R13C55:MIB_DSP4 MIB_R13C55:MIB2_DSP4 enum: MULT18_1.REG_INPUTA_CLK NONE enum: MULT18_1.REG_INPUTA_CE CE0 enum: MULT18_1.REG_INPUTA_RST RST0 enum: MULT18_1.REG_INPUTB_CLK NONE enum: MULT18_1.REG_INPUTB_CE CE0 enum: MULT18_1.REG_INPUTB_RST RST0 enum: MULT18_1.REG_INPUTC_CLK NONE enum: MULT18_1.REG_PIPELINE_CLK NONE enum: MULT18_1.REG_PIPELINE_CE CE0 enum: MULT18_1.REG_PIPELINE_RST RST0 enum: MULT18_1.REG_OUTPUT_CLK NONE enum: MULT18_1.CLK0_DIV ENABLED enum: MULT18_1.CLK1_DIV ENABLED enum: MULT18_1.CLK2_DIV ENABLED enum: MULT18_1.CLK3_DIV ENABLED enum: MULT18_1.GSR ENABLED enum: MULT18_1.SOURCEB_MODE B_SHIFT enum: MULT18_1.RESETMODE SYNC enum: MULT18_1.MODE MULT18X18D enum: MULT18_1.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_1.CLK0MUX CLK0 enum: MULT18_1.CLK1MUX CLK1 enum: MULT18_1.CLK2MUX CLK2 enum: MULT18_1.CLK3MUX CLK3 enum: MULT18_1.CE0MUX CE0 enum: MULT18_1.CE1MUX CE1 enum: MULT18_1.CE2MUX CE2 enum: MULT18_1.CE3MUX CE3 enum: MULT18_1.RST0MUX RST0 enum: MULT18_1.RST1MUX RST1 enum: MULT18_1.RST2MUX RST2 enum: MULT18_1.RST3MUX RST3 .tile_group MIB_R25C24:MIB_EBR2 MIB_R25C25:MIB_EBR3 MIB_R25C26:MIB_EBR4 word: EBR1.WID 111101000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX CLKA enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX WEA enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R25C37:MIB_EBR4 MIB_R25C38:MIB_EBR5 MIB_R25C39:MIB_EBR6 word: EBR2.WID 111000000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX CLKA enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX WEA enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R25C39:MIB_EBR6 MIB_R25C40:MIB_EBR7 MIB_R25C41:MIB_EBR8 word: EBR3.WID 000100000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX CLKA enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX WEA enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R13C46:MIB_DSP4 MIB_R13C46:MIB2_DSP4 MIB_R13C47:MIB_DSP5 MIB_R13C47:MIB2_DSP5 MIB_R13C48:MIB_DSP6 MIB_R13C48:MIB2_DSP6 MIB_R13C49:MIB_DSP7 MIB_R13C49:MIB2_DSP7 MIB_R13C50:MIB_DSP8 MIB_R13C50:MIB2_DSP8 enum: MULT18_5.REG_INPUTA_CLK NONE enum: MULT18_5.REG_INPUTA_CE CE0 enum: MULT18_5.REG_INPUTA_RST RST0 enum: MULT18_5.REG_INPUTB_CLK NONE enum: MULT18_5.REG_INPUTB_CE CE0 enum: MULT18_5.REG_INPUTB_RST RST0 enum: MULT18_5.REG_INPUTC_CLK NONE enum: MULT18_5.REG_PIPELINE_CLK NONE enum: MULT18_5.REG_PIPELINE_CE CE0 enum: MULT18_5.REG_PIPELINE_RST RST0 enum: MULT18_5.REG_OUTPUT_CLK NONE enum: MULT18_5.CLK0_DIV ENABLED enum: MULT18_5.CLK1_DIV ENABLED enum: MULT18_5.CLK2_DIV ENABLED enum: MULT18_5.CLK3_DIV ENABLED enum: MULT18_5.GSR ENABLED enum: MULT18_5.SOURCEB_MODE B_SHIFT enum: MULT18_5.RESETMODE SYNC enum: MULT18_5.MODE MULT18X18D enum: MULT18_5.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_5.CLK0MUX CLK0 enum: MULT18_5.CLK1MUX CLK1 enum: MULT18_5.CLK2MUX CLK2 enum: MULT18_5.CLK3MUX CLK3 enum: MULT18_5.CE0MUX CE0 enum: MULT18_5.CE1MUX CE1 enum: MULT18_5.CE2MUX CE2 enum: MULT18_5.CE3MUX CE3 enum: MULT18_5.RST0MUX RST0 enum: MULT18_5.RST1MUX RST1 enum: MULT18_5.RST2MUX RST2 enum: MULT18_5.RST3MUX RST3 .tile_group MIB_R13C51:MIB_DSP0 MIB_R13C51:MIB2_DSP0 MIB_R13C52:MIB_DSP1 MIB_R13C52:MIB2_DSP1 MIB_R13C53:MIB_DSP2 MIB_R13C53:MIB2_DSP2 MIB_R13C54:MIB_DSP3 MIB_R13C54:MIB2_DSP3 MIB_R13C55:MIB_DSP4 MIB_R13C55:MIB2_DSP4 enum: MULT18_0.REG_INPUTA_CLK NONE enum: MULT18_0.REG_INPUTA_CE CE0 enum: MULT18_0.REG_INPUTA_RST RST0 enum: MULT18_0.REG_INPUTB_CLK NONE enum: MULT18_0.REG_INPUTB_CE CE0 enum: MULT18_0.REG_INPUTB_RST RST0 enum: MULT18_0.REG_INPUTC_CLK NONE enum: MULT18_0.REG_PIPELINE_CLK NONE enum: MULT18_0.REG_PIPELINE_CE CE0 enum: MULT18_0.REG_PIPELINE_RST RST0 enum: MULT18_0.REG_OUTPUT_CLK NONE enum: MULT18_0.REG_OUTPUT_RST RST0 enum: MULT18_0.CLK0_DIV ENABLED enum: MULT18_0.CLK1_DIV ENABLED enum: MULT18_0.CLK2_DIV ENABLED enum: MULT18_0.CLK3_DIV ENABLED enum: MULT18_0.GSR ENABLED enum: MULT18_0.SOURCEB_MODE B_SHIFT enum: MULT18_0.RESETMODE SYNC enum: MULT18_0.MODE MULT18X18D enum: MULT18_0.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_0.CLK0MUX CLK0 enum: MULT18_0.CLK1MUX CLK1 enum: MULT18_0.CLK2MUX CLK2 enum: MULT18_0.CLK3MUX CLK3 enum: MULT18_0.CE0MUX CE0 enum: MULT18_0.CE1MUX CE1 enum: MULT18_0.CE2MUX CE2 enum: MULT18_0.CE3MUX CE3 enum: MULT18_0.RST0MUX RST0 enum: MULT18_0.RST1MUX RST1 enum: MULT18_0.RST2MUX RST2 enum: MULT18_0.RST3MUX RST3 .tile_group MIB_R25C51:MIB_EBR0 MIB_R25C52:MIB_EBR1 word: EBR0.WID 001100000 word: EBR0.CSDECODE_A 111 word: EBR0.CSDECODE_B 111 enum: EBR0.MODE DP16KD enum: EBR0.DP16KD.DATA_WIDTH_A 9 enum: EBR0.DP16KD.DATA_WIDTH_B 9 enum: EBR0.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR0.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR0.REGMODE_A NOREG enum: EBR0.REGMODE_B NOREG enum: EBR0.RESETMODE SYNC enum: EBR0.ASYNC_RESET_RELEASE SYNC enum: EBR0.GSR DISABLED enum: EBR0.CLKAMUX CLKA enum: EBR0.CLKBMUX CLKB enum: EBR0.RSTAMUX INV enum: EBR0.RSTBMUX INV enum: EBR0.WEAMUX WEA enum: EBR0.WEBMUX INV enum: EBR0.CEAMUX CEA enum: EBR0.CEBMUX CEB enum: EBR0.OCEAMUX OCEA enum: EBR0.OCEBMUX OCEB .tile_group MIB_R25C48:MIB_EBR6 MIB_R25C49:MIB_EBR7 MIB_R25C50:MIB_EBR8 word: EBR3.WID 111100000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX CLKA enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX WEA enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R25C55:MIB_EBR4 MIB_R25C56:MIB_EBR5 MIB_R25C57:MIB_EBR6 word: EBR2.WID 000010000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX CLKA enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX WEA enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R37C55:MIB_EBR4 MIB_R37C56:MIB_EBR5 MIB_R37C57:MIB_EBR6 word: EBR2.WID 110010000 word: EBR2.CSDECODE_A 111 word: EBR2.CSDECODE_B 111 enum: EBR2.MODE DP16KD enum: EBR2.DP16KD.DATA_WIDTH_A 9 enum: EBR2.DP16KD.DATA_WIDTH_B 9 enum: EBR2.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR2.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR2.REGMODE_A NOREG enum: EBR2.REGMODE_B NOREG enum: EBR2.RESETMODE SYNC enum: EBR2.ASYNC_RESET_RELEASE SYNC enum: EBR2.GSR DISABLED enum: EBR2.CLKAMUX CLKA enum: EBR2.CLKBMUX CLKB enum: EBR2.RSTAMUX INV enum: EBR2.RSTBMUX INV enum: EBR2.WEAMUX WEA enum: EBR2.WEBMUX INV enum: EBR2.CEAMUX CEA enum: EBR2.CEBMUX CEB enum: EBR2.OCEAMUX OCEA enum: EBR2.OCEBMUX OCEB .tile_group MIB_R37C48:MIB_EBR6 MIB_R37C49:MIB_EBR7 MIB_R37C50:MIB_EBR8 word: EBR3.WID 101010000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX CLKA enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX WEA enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R25C44:MIB_EBR2 MIB_R25C45:MIB_EBR3 MIB_R25C46:MIB_EBR4 word: EBR1.WID 111010000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX CLKA enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX WEA enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R25C57:MIB_EBR6 MIB_R25C58:MIB_EBR7 MIB_R25C59:MIB_EBR8 word: EBR3.WID 000110000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 9 enum: EBR3.DP16KD.DATA_WIDTH_B 9 enum: EBR3.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX CLKA enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX WEA enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R37C53:MIB_EBR2 MIB_R37C54:MIB_EBR3 MIB_R37C55:MIB_EBR4 word: EBR1.WID 100110000 word: EBR1.CSDECODE_A 111 word: EBR1.CSDECODE_B 111 enum: EBR1.MODE DP16KD enum: EBR1.DP16KD.DATA_WIDTH_A 9 enum: EBR1.DP16KD.DATA_WIDTH_B 9 enum: EBR1.DP16KD.WRITEMODE_A WRITETHROUGH enum: EBR1.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR1.REGMODE_A NOREG enum: EBR1.REGMODE_B NOREG enum: EBR1.RESETMODE SYNC enum: EBR1.ASYNC_RESET_RELEASE SYNC enum: EBR1.GSR DISABLED enum: EBR1.CLKAMUX CLKA enum: EBR1.CLKBMUX CLKB enum: EBR1.RSTAMUX INV enum: EBR1.RSTBMUX INV enum: EBR1.WEAMUX WEA enum: EBR1.WEBMUX INV enum: EBR1.CEAMUX CEA enum: EBR1.CEBMUX CEB enum: EBR1.OCEAMUX OCEA enum: EBR1.OCEBMUX OCEB .tile_group MIB_R25C28:MIB_EBR6 MIB_R25C29:MIB_EBR7 MIB_R25C30:MIB_EBR8 word: EBR3.WID 110000000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 18 enum: EBR3.DP16KD.DATA_WIDTH_B 18 enum: EBR3.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE SYNC enum: EBR3.ASYNC_RESET_RELEASE SYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX CLKA enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX WEA enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB ================================================ FILE: src/litex_linux/top.json ================================================ [File too large to display: 15.2 MB] ================================================ FILE: src/litex_linux/top.rpt ================================================ /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.9+3672 (git sha1 924f1713, gcc 8.3.0-6+rpi1 -fPIC -Os) -- Executing script file `top.ys' -- 1. Executing Verilog-2005 frontend: /home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v Parsing Verilog input from `/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v' to AST representation. Storing AST representation for module `$abstract\InstructionCache'. Storing AST representation for module `$abstract\DataCache'. Storing AST representation for module `$abstract\VexRiscv'. Successfully finished Verilog frontend. 2. Executing Verilog-2005 frontend: /home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v Parsing Verilog input from `/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v' to AST representation. Storing AST representation for module `$abstract\top'. Successfully finished Verilog frontend. 3. Executing ATTRMAP pass (move or copy attributes). 4. Executing SYNTH_ECP5 pass. 4.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/cells_sim.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/cells_sim.v' to AST representation. Generating RTLIL representation for module `\LUT4'. Generating RTLIL representation for module `\$__ABC9_LUT5'. Generating RTLIL representation for module `\$__ABC9_LUT6'. Generating RTLIL representation for module `\$__ABC9_LUT7'. Generating RTLIL representation for module `\L6MUX21'. Generating RTLIL representation for module `\CCU2C'. Generating RTLIL representation for module `\TRELLIS_RAM16X2'. Generating RTLIL representation for module `\PFUMX'. Generating RTLIL representation for module `\TRELLIS_DPR16X4'. Generating RTLIL representation for module `\DPR16X4C'. Generating RTLIL representation for module `\LUT2'. Generating RTLIL representation for module `\TRELLIS_FF'. Generating RTLIL representation for module `\TRELLIS_IO'. Generating RTLIL representation for module `\INV'. Generating RTLIL representation for module `\TRELLIS_SLICE'. Generating RTLIL representation for module `\DP16KD'. Generating RTLIL representation for module `\FD1P3AX'. Generating RTLIL representation for module `\FD1P3AY'. Generating RTLIL representation for module `\FD1P3BX'. Generating RTLIL representation for module `\FD1P3DX'. Generating RTLIL representation for module `\FD1P3IX'. Generating RTLIL representation for module `\FD1P3JX'. Generating RTLIL representation for module `\FD1S3AX'. Generating RTLIL representation for module `\FD1S3AY'. Generating RTLIL representation for module `\FD1S3BX'. Generating RTLIL representation for module `\FD1S3DX'. Generating RTLIL representation for module `\FD1S3IX'. Generating RTLIL representation for module `\FD1S3JX'. Generating RTLIL representation for module `\IFS1P3BX'. Generating RTLIL representation for module `\IFS1P3DX'. Generating RTLIL representation for module `\IFS1P3IX'. Generating RTLIL representation for module `\IFS1P3JX'. Generating RTLIL representation for module `\OFS1P3BX'. Generating RTLIL representation for module `\OFS1P3DX'. Generating RTLIL representation for module `\OFS1P3IX'. Generating RTLIL representation for module `\OFS1P3JX'. Generating RTLIL representation for module `\IB'. Generating RTLIL representation for module `\IBPU'. Generating RTLIL representation for module `\IBPD'. Generating RTLIL representation for module `\OB'. Generating RTLIL representation for module `\OBZ'. Generating RTLIL representation for module `\OBZPU'. Generating RTLIL representation for module `\OBZPD'. Generating RTLIL representation for module `\OBCO'. Generating RTLIL representation for module `\BB'. Generating RTLIL representation for module `\BBPU'. Generating RTLIL representation for module `\BBPD'. Generating RTLIL representation for module `\ILVDS'. Generating RTLIL representation for module `\OLVDS'. Successfully finished Verilog frontend. 4.2. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/cells_bb.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/cells_bb.v' to AST representation. Generating RTLIL representation for module `\MULT18X18D'. Generating RTLIL representation for module `\ALU54B'. Generating RTLIL representation for module `\EHXPLLL'. Generating RTLIL representation for module `\DTR'. Generating RTLIL representation for module `\OSCG'. Generating RTLIL representation for module `\USRMCLK'. Generating RTLIL representation for module `\JTAGG'. Generating RTLIL representation for module `\DELAYF'. Generating RTLIL representation for module `\DELAYG'. Generating RTLIL representation for module `\IDDRX1F'. Generating RTLIL representation for module `\IDDRX2F'. Generating RTLIL representation for module `\IDDR71B'. Generating RTLIL representation for module `\IDDRX2DQA'. Generating RTLIL representation for module `\ODDRX1F'. Generating RTLIL representation for module `\ODDRX2F'. Generating RTLIL representation for module `\ODDR71B'. Generating RTLIL representation for module `\OSHX2A'. Generating RTLIL representation for module `\ODDRX2DQA'. Generating RTLIL representation for module `\ODDRX2DQSB'. Generating RTLIL representation for module `\TSHX2DQA'. Generating RTLIL representation for module `\TSHX2DQSA'. Generating RTLIL representation for module `\DQSBUFM'. Generating RTLIL representation for module `\DDRDLLA'. Generating RTLIL representation for module `\CLKDIVF'. Generating RTLIL representation for module `\ECLKSYNCB'. Generating RTLIL representation for module `\ECLKBRIDGECS'. Generating RTLIL representation for module `\DCCA'. Generating RTLIL representation for module `\DCUA'. Generating RTLIL representation for module `\EXTREFB'. Generating RTLIL representation for module `\PCSCLKDIV'. Generating RTLIL representation for module `\PUR'. Generating RTLIL representation for module `\GSR'. Generating RTLIL representation for module `\SGSR'. Generating RTLIL representation for module `\PDPW16KD'. Successfully finished Verilog frontend. 4.3. Executing HIERARCHY pass (managing design hierarchy). 4.4. Executing AST frontend in derive mode using pre-parsed AST for module `\top'. Generating RTLIL representation for module `\top'. 4.4.1. Analyzing design hierarchy.. Top module: \top 4.4.2. Executing AST frontend in derive mode using pre-parsed AST for module `\VexRiscv'. Generating RTLIL representation for module `\VexRiscv'. 4.4.3. Analyzing design hierarchy.. Top module: \top Used module: \VexRiscv 4.4.4. Executing AST frontend in derive mode using pre-parsed AST for module `\DataCache'. Generating RTLIL representation for module `\DataCache'. /home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0: Warning: System task `$display' outside initial block is unsupported. 4.4.5. Executing AST frontend in derive mode using pre-parsed AST for module `\InstructionCache'. Generating RTLIL representation for module `\InstructionCache'. 4.4.6. Analyzing design hierarchy.. Top module: \top Used module: \VexRiscv Used module: \DataCache Used module: \InstructionCache 4.4.7. Analyzing design hierarchy.. Top module: \top Used module: \VexRiscv Used module: \DataCache Used module: \InstructionCache Removing unused module `$abstract\top'. Removing unused module `$abstract\VexRiscv'. Removing unused module `$abstract\DataCache'. Removing unused module `$abstract\InstructionCache'. Removed 4 unused modules. 4.5. Executing PROC pass (convert processes to netlists). 4.5.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Found and cleaned up 1 empty switch in `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:213$146'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$2494'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$2493'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$2492'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5884$1844'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5870$1837'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5856$1830'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5842$1823'. Found and cleaned up 15 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3962$1500'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3954$1499'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3938$1484'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3930$1483'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3914$1468'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3906$1467'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3890$1452'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3882$1451'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Found and cleaned up 6 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331'. Cleaned up 38 empty switches. 4.5.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Marked 1 switch rules as full_case in process $proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:350$226 in module TRELLIS_FF. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882 in module InstructionCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:226$3860 in module InstructionCache. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:210$3855 in module InstructionCache. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:201$3853 in module InstructionCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:193$3852 in module InstructionCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:186$3851 in module InstructionCache. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1052$3797 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1042$3794 in module DataCache. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1030$3792 in module DataCache. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1017$3789 in module DataCache. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1002$3788 in module DataCache. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:987$3787 in module DataCache. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:972$3786 in module DataCache. Marked 11 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:936$3783 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:924$3762 in module DataCache. Marked 6 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:905$3759 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:885$3754 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:873$3747 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:866$3746 in module DataCache. Marked 11 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:832$3742 in module DataCache. Marked 5 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:816$3739 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:806$3736 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:782$3717 in module DataCache. Marked 4 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:768$3715 in module DataCache. Marked 4 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:754$3713 in module DataCache. Marked 4 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:740$3711 in module DataCache. Marked 4 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:726$3709 in module DataCache. Marked 9 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:699$3706 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:692$3705 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:685$3703 in module DataCache. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:675$3702 in module DataCache. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:665$3701 in module DataCache. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:655$3700 in module DataCache. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:642$3699 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:635$3698 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:628$3697 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:621$3696 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:614$3695 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:599$3689 in module DataCache. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:592$3687 in module DataCache. Marked 6 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6677$3408 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6670$3407 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6591$3338 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6582$3335 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6573$3334 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6547$3325 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6533$3324 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6519$3319 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6505$3318 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6381$3305 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6360$3304 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6350$3303 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6341$3299 in module VexRiscv. Marked 15 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6219$3294 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6211$3292 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6194$3282 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6180$3281 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6173$3280 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6166$3279 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6155$3272 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6140$3270 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6130$3269 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6120$3268 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6110$3267 in module VexRiscv. Marked 13 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6039$3240 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6023$3232 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5963$3222 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5928$3220 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5912$3215 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5832$3211 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5820$3204 in module VexRiscv. Marked 10 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5782$3194 in module VexRiscv. Marked 10 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5754$3192 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5670$3184 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5652$3183 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5586$3180 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5570$3177 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5556$3173 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5547$3171 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5474$3133 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5454$3132 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5432$3119 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5424$3108 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5416$3107 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5408$3106 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5400$3103 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5392$3101 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5382$3093 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5375$3091 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5363$3088 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5335$3058 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5327$3047 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5319$3046 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5311$3045 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5303$3042 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5295$3040 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5283$3029 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5276$3027 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5264$3024 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5231$2993 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5220$2991 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5206$2990 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5139$2983 in module VexRiscv. Marked 4 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5124$2981 in module VexRiscv. Marked 5 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5105$2980 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5095$2979 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5086$2976 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5078$2973 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5071$2972 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5061$2970 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5049$2969 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5037$2968 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5027$2966 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5018$2965 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5004$2964 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4995$2963 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4986$2962 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4975$2960 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4928$2947 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4918$2946 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4908$2943 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4895$2942 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4827$2924 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4782$2917 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4743$2910 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4723$2899 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4712$2895 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4701$2891 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4686$2887 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4679$2886 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4672$2885 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4642$2879 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4632$2878 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4625$2876 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4615$2873 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4602$2871 in module VexRiscv. Marked 4 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4582$2870 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4575$2869 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4565$2868 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4557$2867 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4547$2866 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4536$2865 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4526$2864 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4519$2863 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4508$2862 in module VexRiscv. Marked 6 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4487$2856 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4477$2855 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4466$2854 in module VexRiscv. Marked 4 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4450$2843 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4443$2840 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4430$2839 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4423$2838 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4414$2837 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4407$2836 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4400$2835 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4393$2834 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4360$2831 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4348$2829 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4340$2828 in module VexRiscv. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4303$2827 in module VexRiscv. Marked 11 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4272$2825 in module VexRiscv. Marked 11 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4242$2823 in module VexRiscv. Marked 2 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4226$2822 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820 in module VexRiscv. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3313$2819 in module VexRiscv. Marked 75 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4177$1559 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4160$1552 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4143$1545 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4126$1538 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4109$1531 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4092$1524 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4058$1522 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4047$1521 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4036$1520 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4025$1519 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4014$1518 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4003$1517 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3857$1449 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3840$1448 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3823$1447 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3806$1446 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3789$1445 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3772$1444 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3755$1443 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3721$1441 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3704$1440 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3687$1439 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3670$1438 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3653$1437 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3636$1436 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3619$1435 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3602$1434 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3568$1432 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821 in module top. Marked 3 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634 in module top. Marked 5 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2388$438 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425 in module top. Marked 5 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2237$408 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395 in module top. Marked 5 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2086$378 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365 in module top. Marked 5 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1935$348 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305 in module top. Marked 1 switch rules as full_case in process $proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294 in module top. Removed a total of 0 dead cases. 4.5.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 114 redundant assignments. Promoted 1154 assignments to connections. 4.5.4. Executing PROC_INIT pass (extract init attributes). Found init rule in `\TRELLIS_FF.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$230'. Set init value: \Q = 1'0 Found init rule in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2485$3615'. Set init value: \CsrPlugin_minstret = 64'0000000000000000000000000000000000000000000000000000000000000000 Found init rule in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2484$3614'. Set init value: \CsrPlugin_mcycle = 64'0000000000000000000000000000000000000000000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1534$2487'. Set init value: \builder_inferedsdrtristate11_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1530$2486'. Set init value: \builder_inferedsdrtristate10_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1526$2485'. Set init value: \builder_inferedsdrtristate9_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1522$2484'. Set init value: \builder_inferedsdrtristate8_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1518$2483'. Set init value: \builder_inferedsdrtristate7_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1514$2482'. Set init value: \builder_inferedsdrtristate6_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1510$2481'. Set init value: \builder_inferedsdrtristate5_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1506$2480'. Set init value: \builder_inferedsdrtristate4_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1502$2479'. Set init value: \builder_inferedsdrtristate3_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1498$2478'. Set init value: \builder_inferedsdrtristate2_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1494$2477'. Set init value: \builder_inferedsdrtristate1_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1490$2476'. Set init value: \builder_inferedsdrtristate0_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1485$2475'. Set init value: \builder_regs1 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1484$2474'. Set init value: \builder_regs0 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1483$2473'. Set init value: \builder_sync_f_array_muxed = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1482$2472'. Set init value: \builder_sync_rhs_array_muxed6 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1481$2471'. Set init value: \builder_sync_rhs_array_muxed5 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1480$2470'. Set init value: \builder_sync_rhs_array_muxed4 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1479$2469'. Set init value: \builder_sync_rhs_array_muxed3 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1478$2468'. Set init value: \builder_sync_rhs_array_muxed2 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1477$2467'. Set init value: \builder_sync_rhs_array_muxed1 = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1476$2466'. Set init value: \builder_sync_rhs_array_muxed0 = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1475$2465'. Set init value: \builder_comb_rhs_array_muxed31 = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1474$2464'. Set init value: \builder_comb_rhs_array_muxed30 = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1473$2463'. Set init value: \builder_comb_rhs_array_muxed29 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1472$2462'. Set init value: \builder_comb_rhs_array_muxed28 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1471$2461'. Set init value: \builder_comb_rhs_array_muxed27 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1470$2460'. Set init value: \builder_comb_rhs_array_muxed26 = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1469$2459'. Set init value: \builder_comb_rhs_array_muxed25 = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1468$2458'. Set init value: \builder_comb_rhs_array_muxed24 = 30'000000000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1467$2457'. Set init value: \builder_comb_rhs_array_muxed23 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1466$2456'. Set init value: \builder_comb_rhs_array_muxed22 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1465$2455'. Set init value: \builder_comb_rhs_array_muxed21 = 22'0000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1464$2454'. Set init value: \builder_comb_rhs_array_muxed20 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1463$2453'. Set init value: \builder_comb_rhs_array_muxed19 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1462$2452'. Set init value: \builder_comb_rhs_array_muxed18 = 22'0000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1461$2451'. Set init value: \builder_comb_rhs_array_muxed17 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1460$2450'. Set init value: \builder_comb_rhs_array_muxed16 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1459$2449'. Set init value: \builder_comb_rhs_array_muxed15 = 22'0000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1458$2448'. Set init value: \builder_comb_rhs_array_muxed14 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1457$2447'. Set init value: \builder_comb_rhs_array_muxed13 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1456$2446'. Set init value: \builder_comb_rhs_array_muxed12 = 22'0000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1455$2445'. Set init value: \builder_comb_t_array_muxed5 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1454$2444'. Set init value: \builder_comb_t_array_muxed4 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1453$2443'. Set init value: \builder_comb_t_array_muxed3 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1452$2442'. Set init value: \builder_comb_rhs_array_muxed11 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1451$2441'. Set init value: \builder_comb_rhs_array_muxed10 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1450$2440'. Set init value: \builder_comb_rhs_array_muxed9 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1449$2439'. Set init value: \builder_comb_rhs_array_muxed8 = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1448$2438'. Set init value: \builder_comb_rhs_array_muxed7 = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1447$2437'. Set init value: \builder_comb_rhs_array_muxed6 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1446$2436'. Set init value: \builder_comb_t_array_muxed2 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1445$2435'. Set init value: \builder_comb_t_array_muxed1 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1444$2434'. Set init value: \builder_comb_t_array_muxed0 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1443$2433'. Set init value: \builder_comb_rhs_array_muxed5 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1442$2432'. Set init value: \builder_comb_rhs_array_muxed4 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1441$2431'. Set init value: \builder_comb_rhs_array_muxed3 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1440$2430'. Set init value: \builder_comb_rhs_array_muxed2 = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1439$2429'. Set init value: \builder_comb_rhs_array_muxed1 = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1438$2428'. Set init value: \builder_comb_rhs_array_muxed0 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1437$2427'. Set init value: \builder_soclinux_we_next_value_ce2 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1436$2426'. Set init value: \builder_soclinux_we_next_value2 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1435$2425'. Set init value: \builder_soclinux_adr_next_value_ce1 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1434$2424'. Set init value: \builder_soclinux_adr_next_value1 = 14'00000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1433$2423'. Set init value: \builder_soclinux_dat_w_next_value_ce0 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1432$2422'. Set init value: \builder_soclinux_dat_w_next_value0 = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1431$2421'. Set init value: \builder_next_state = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1430$2420'. Set init value: \builder_state = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1408$2419'. Set init value: \builder_csr_bankarray_interface7_bank_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1383$2418'. Set init value: \builder_csr_bankarray_interface6_bank_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1318$2417'. Set init value: \builder_csr_bankarray_interface5_bank_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1277$2416'. Set init value: \builder_csr_bankarray_interface4_bank_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1236$2415'. Set init value: \builder_csr_bankarray_interface3_bank_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1227$2414'. Set init value: \builder_csr_bankarray_interface2_bank_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1223$2413'. Set init value: \builder_csr_bankarray_sel_r = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1219$2412'. Set init value: \builder_csr_bankarray_sram_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1178$2411'. Set init value: \builder_csr_bankarray_interface1_bank_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1109$2410'. Set init value: \builder_csr_bankarray_interface0_bank_bus_dat_r = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1105$2409'. Set init value: \builder_count = 20'11110100001001000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1102$2408'. Set init value: \builder_error = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1101$2407'. Set init value: \builder_slave_sel_r = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1100$2406'. Set init value: \builder_slave_sel = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1099$2405'. Set init value: \builder_grant = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1093$2404'. Set init value: \builder_shared_ack = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1089$2403'. Set init value: \builder_shared_dat_r = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1082$2401'. Set init value: \builder_soclinux_wishbone_ack = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1078$2400'. Set init value: \builder_soclinux_wishbone_dat_r = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1074$2399'. Set init value: \builder_soclinux_dat_w = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1073$2398'. Set init value: \builder_soclinux_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1072$2397'. Set init value: \builder_soclinux_adr = 14'00000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1071$2396'. Set init value: \soclinux_count_spimaster_next_value_ce = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1070$2395'. Set init value: \soclinux_count_spimaster_next_value = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1069$2394'. Set init value: \builder_spimaster_next_state = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1068$2393'. Set init value: \builder_spimaster_state = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1067$2392'. Set init value: \main_wishbone_bridge_count_litedramwishbone2native_next_value_ce = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1066$2391'. Set init value: \main_wishbone_bridge_count_litedramwishbone2native_next_value = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1065$2390'. Set init value: \builder_litedramwishbone2native_next_state = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1064$2389'. Set init value: \builder_litedramwishbone2native_state = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1063$2388'. Set init value: \builder_fullmemorywe_next_state = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1062$2387'. Set init value: \builder_fullmemorywe_state = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1061$2386'. Set init value: \builder_new_master_rdata_valid3 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1060$2385'. Set init value: \builder_new_master_rdata_valid2 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1059$2384'. Set init value: \builder_new_master_rdata_valid1 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1058$2383'. Set init value: \builder_new_master_rdata_valid0 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1057$2382'. Set init value: \builder_new_master_wdata_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1040$2377'. Set init value: \builder_multiplexer_next_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1039$2376'. Set init value: \builder_multiplexer_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1038$2375'. Set init value: \builder_bankmachine3_next_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1037$2374'. Set init value: \builder_bankmachine3_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1036$2373'. Set init value: \builder_bankmachine2_next_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1035$2372'. Set init value: \builder_bankmachine2_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1034$2371'. Set init value: \builder_bankmachine1_next_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1033$2370'. Set init value: \builder_bankmachine1_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1032$2369'. Set init value: \builder_bankmachine0_next_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1031$2368'. Set init value: \builder_bankmachine0_state = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1030$2367'. Set init value: \builder_refresher_next_state = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1029$2366'. Set init value: \builder_refresher_state = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1028$2365'. Set init value: \soclinux_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1027$2364'. Set init value: \soclinux_storage = 16'0000000001111101 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1026$2363'. Set init value: \soclinux_miso_data = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1025$2362'. Set init value: \soclinux_mosi_sel = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1024$2361'. Set init value: \soclinux_mosi_data = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1021$2360'. Set init value: \soclinux_clk_divider1 = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1020$2359'. Set init value: \soclinux_miso_latch = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1019$2358'. Set init value: \soclinux_mosi_latch = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1018$2357'. Set init value: \soclinux_count = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1017$2356'. Set init value: \soclinux_cs_enable = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1016$2355'. Set init value: \soclinux_clk_enable = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1015$2354'. Set init value: \soclinux_loopback_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1014$2353'. Set init value: \soclinux_loopback_storage = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1013$2352'. Set init value: \soclinux_cs_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1012$2351'. Set init value: \soclinux_cs_storage = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1007$2350'. Set init value: \soclinux_mosi_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1006$2349'. Set init value: \soclinux_mosi_storage = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1001$2348'. Set init value: \soclinux_control_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1000$2347'. Set init value: \soclinux_control_storage = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:998$2346'. Set init value: \soclinux_start1 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:994$2345'. Set init value: \soclinux_miso = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:992$2344'. Set init value: \soclinux_irq = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:991$2343'. Set init value: \soclinux_done0 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:988$2342'. Set init value: \main_count = 22'1011111010111100001000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:985$2341'. Set init value: \main_mode = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:984$2340'. Set init value: \main_chaser = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:983$2339'. Set init value: \main_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:982$2338'. Set init value: \main_storage = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:978$2337'. Set init value: \main_wishbone_bridge_wdata_consumed = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:977$2336'. Set init value: \main_wishbone_bridge_cmd_consumed = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:971$2335'. Set init value: \main_wishbone_bridge_rdata_converter_converter_strobe_all = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:969$2334'. Set init value: \main_wishbone_bridge_rdata_converter_converter_demux = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:968$2333'. Set init value: \main_wishbone_bridge_rdata_converter_converter_source_payload_valid_token_count = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:967$2332'. Set init value: \main_wishbone_bridge_rdata_converter_converter_source_payload_data = 128'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:966$2331'. Set init value: \main_wishbone_bridge_rdata_converter_converter_source_last = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:965$2330'. Set init value: \main_wishbone_bridge_rdata_converter_converter_source_first = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:957$2329'. Set init value: \main_wishbone_bridge_rdata_converter_source_payload_data = 128'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:940$2328'. Set init value: \main_wishbone_bridge_wdata_converter_converter_mux = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:938$2327'. Set init value: \main_wishbone_bridge_wdata_converter_converter_source_payload_data = 18'000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:933$2326'. Set init value: \main_wishbone_bridge_wdata_converter_converter_sink_payload_data = 144'000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:916$2325'. Set init value: \main_wishbone_bridge_count = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:901$2322'. Set init value: \main_wishbone_bridge_cmd_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:898$2321'. Set init value: \main_word_inc = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:897$2320'. Set init value: \main_word_clr = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:896$2319'. Set init value: \main_tag_di_dirty = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:891$2318'. Set init value: \main_tag_port_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:888$2317'. Set init value: \main_adr_offset_r = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:887$2316'. Set init value: \main_write_from_slave = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:886$2315'. Set init value: \main_data_port_dat_w = 128'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:885$2314'. Set init value: \main_data_port_we = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:882$2313'. Set init value: \main_interface_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:880$2312'. Set init value: \main_interface_stb = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:879$2311'. Set init value: \main_interface_cyc = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:870$2309'. Set init value: \main_wb_sdram_ack = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:866$2308'. Set init value: \main_wb_sdram_dat_r = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:852$2305'. Set init value: \main_port_cmd_payload_addr = 24'000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:851$2304'. Set init value: \main_port_cmd_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:849$2303'. Set init value: \main_port_cmd_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:847$2302'. Set init value: \main_sdram_time1 = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:845$2301'. Set init value: \main_sdram_en1 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:844$2300'. Set init value: \main_sdram_time0 = 5'00000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:842$2299'. Set init value: \main_sdram_en0 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:839$2298'. Set init value: \main_sdram_twtrcon_count = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:838$2297'. Set init value: \main_sdram_twtrcon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:836$2296'. Set init value: \main_sdram_tccdcon_count = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:835$2295'. Set init value: \main_sdram_tccdcon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:831$2293'. Set init value: \main_sdram_trrdcon_count = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:830$2292'. Set init value: \main_sdram_trrdcon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:826$2289'. Set init value: \main_sdram_steerer_sel = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:822$2286'. Set init value: \main_sdram_choose_req_grant = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:820$2285'. Set init value: \main_sdram_choose_req_valids = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:816$2284'. Set init value: \main_sdram_choose_req_cmd_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:815$2283'. Set init value: \main_sdram_choose_req_cmd_payload_ras = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:814$2282'. Set init value: \main_sdram_choose_req_cmd_payload_cas = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:811$2281'. Set init value: \main_sdram_choose_req_cmd_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:809$2280'. Set init value: \main_sdram_choose_req_want_activates = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:807$2279'. Set init value: \main_sdram_choose_req_want_writes = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:806$2278'. Set init value: \main_sdram_choose_req_want_reads = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:804$2277'. Set init value: \main_sdram_choose_cmd_grant = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:802$2276'. Set init value: \main_sdram_choose_cmd_valids = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:798$2275'. Set init value: \main_sdram_choose_cmd_cmd_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:797$2274'. Set init value: \main_sdram_choose_cmd_cmd_payload_ras = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:796$2273'. Set init value: \main_sdram_choose_cmd_cmd_payload_cas = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:785$2267'. Set init value: \main_sdram_bankmachine3_trascon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:784$2266'. Set init value: \main_sdram_bankmachine3_trascon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:782$2265'. Set init value: \main_sdram_bankmachine3_trccon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:781$2264'. Set init value: \main_sdram_bankmachine3_trccon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:779$2263'. Set init value: \main_sdram_bankmachine3_twtpcon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:778$2262'. Set init value: \main_sdram_bankmachine3_twtpcon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:776$2261'. Set init value: \main_sdram_bankmachine3_row_col_n_addr_sel = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:775$2260'. Set init value: \main_sdram_bankmachine3_row_close = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:774$2259'. Set init value: \main_sdram_bankmachine3_row_open = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:772$2258'. Set init value: \main_sdram_bankmachine3_row_opened = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:771$2257'. Set init value: \main_sdram_bankmachine3_row = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:770$2256'. Set init value: \main_sdram_bankmachine3_cmd_buffer_source_payload_addr = 22'0000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:769$2255'. Set init value: \main_sdram_bankmachine3_cmd_buffer_source_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:768$2254'. Set init value: \main_sdram_bankmachine3_cmd_buffer_source_last = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:767$2253'. Set init value: \main_sdram_bankmachine3_cmd_buffer_source_first = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:765$2252'. Set init value: \main_sdram_bankmachine3_cmd_buffer_source_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:744$2251'. Set init value: \main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:743$2250'. Set init value: \main_sdram_bankmachine3_cmd_buffer_lookahead_consume = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:742$2249'. Set init value: \main_sdram_bankmachine3_cmd_buffer_lookahead_produce = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:740$2247'. Set init value: \main_sdram_bankmachine3_cmd_buffer_lookahead_level = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:721$2244'. Set init value: \main_sdram_bankmachine3_auto_precharge = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:720$2243'. Set init value: \main_sdram_bankmachine3_cmd_payload_is_write = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:719$2242'. Set init value: \main_sdram_bankmachine3_cmd_payload_is_read = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:718$2241'. Set init value: \main_sdram_bankmachine3_cmd_payload_is_cmd = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:717$2240'. Set init value: \main_sdram_bankmachine3_cmd_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:716$2239'. Set init value: \main_sdram_bankmachine3_cmd_payload_ras = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:715$2238'. Set init value: \main_sdram_bankmachine3_cmd_payload_cas = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:713$2237'. Set init value: \main_sdram_bankmachine3_cmd_payload_a = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:712$2236'. Set init value: \main_sdram_bankmachine3_cmd_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:711$2235'. Set init value: \main_sdram_bankmachine3_cmd_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:710$2234'. Set init value: \main_sdram_bankmachine3_refresh_gnt = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:708$2233'. Set init value: \main_sdram_bankmachine3_req_rdata_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:707$2232'. Set init value: \main_sdram_bankmachine3_req_wdata_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:701$2231'. Set init value: \main_sdram_bankmachine2_trascon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:700$2230'. Set init value: \main_sdram_bankmachine2_trascon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:698$2229'. Set init value: \main_sdram_bankmachine2_trccon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:697$2228'. Set init value: \main_sdram_bankmachine2_trccon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:695$2227'. Set init value: \main_sdram_bankmachine2_twtpcon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:694$2226'. Set init value: \main_sdram_bankmachine2_twtpcon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:692$2225'. Set init value: \main_sdram_bankmachine2_row_col_n_addr_sel = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:691$2224'. Set init value: \main_sdram_bankmachine2_row_close = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:690$2223'. Set init value: \main_sdram_bankmachine2_row_open = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:688$2222'. Set init value: \main_sdram_bankmachine2_row_opened = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:687$2221'. Set init value: \main_sdram_bankmachine2_row = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:686$2220'. Set init value: \main_sdram_bankmachine2_cmd_buffer_source_payload_addr = 22'0000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:685$2219'. Set init value: \main_sdram_bankmachine2_cmd_buffer_source_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:684$2218'. Set init value: \main_sdram_bankmachine2_cmd_buffer_source_last = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:683$2217'. Set init value: \main_sdram_bankmachine2_cmd_buffer_source_first = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:681$2216'. Set init value: \main_sdram_bankmachine2_cmd_buffer_source_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:660$2215'. Set init value: \main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:659$2214'. Set init value: \main_sdram_bankmachine2_cmd_buffer_lookahead_consume = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:658$2213'. Set init value: \main_sdram_bankmachine2_cmd_buffer_lookahead_produce = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:656$2211'. Set init value: \main_sdram_bankmachine2_cmd_buffer_lookahead_level = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:637$2208'. Set init value: \main_sdram_bankmachine2_auto_precharge = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:636$2207'. Set init value: \main_sdram_bankmachine2_cmd_payload_is_write = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:635$2206'. Set init value: \main_sdram_bankmachine2_cmd_payload_is_read = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:634$2205'. Set init value: \main_sdram_bankmachine2_cmd_payload_is_cmd = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:633$2204'. Set init value: \main_sdram_bankmachine2_cmd_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:632$2203'. Set init value: \main_sdram_bankmachine2_cmd_payload_ras = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:631$2202'. Set init value: \main_sdram_bankmachine2_cmd_payload_cas = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:629$2201'. Set init value: \main_sdram_bankmachine2_cmd_payload_a = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:628$2200'. Set init value: \main_sdram_bankmachine2_cmd_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:627$2199'. Set init value: \main_sdram_bankmachine2_cmd_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:626$2198'. Set init value: \main_sdram_bankmachine2_refresh_gnt = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:624$2197'. Set init value: \main_sdram_bankmachine2_req_rdata_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:623$2196'. Set init value: \main_sdram_bankmachine2_req_wdata_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:617$2195'. Set init value: \main_sdram_bankmachine1_trascon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:616$2194'. Set init value: \main_sdram_bankmachine1_trascon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:614$2193'. Set init value: \main_sdram_bankmachine1_trccon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:613$2192'. Set init value: \main_sdram_bankmachine1_trccon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:611$2191'. Set init value: \main_sdram_bankmachine1_twtpcon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:610$2190'. Set init value: \main_sdram_bankmachine1_twtpcon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:608$2189'. Set init value: \main_sdram_bankmachine1_row_col_n_addr_sel = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:607$2188'. Set init value: \main_sdram_bankmachine1_row_close = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:606$2187'. Set init value: \main_sdram_bankmachine1_row_open = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:604$2186'. Set init value: \main_sdram_bankmachine1_row_opened = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:603$2185'. Set init value: \main_sdram_bankmachine1_row = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:602$2184'. Set init value: \main_sdram_bankmachine1_cmd_buffer_source_payload_addr = 22'0000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:601$2183'. Set init value: \main_sdram_bankmachine1_cmd_buffer_source_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:600$2182'. Set init value: \main_sdram_bankmachine1_cmd_buffer_source_last = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:599$2181'. Set init value: \main_sdram_bankmachine1_cmd_buffer_source_first = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:597$2180'. Set init value: \main_sdram_bankmachine1_cmd_buffer_source_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:576$2179'. Set init value: \main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:575$2178'. Set init value: \main_sdram_bankmachine1_cmd_buffer_lookahead_consume = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:574$2177'. Set init value: \main_sdram_bankmachine1_cmd_buffer_lookahead_produce = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:572$2175'. Set init value: \main_sdram_bankmachine1_cmd_buffer_lookahead_level = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:553$2172'. Set init value: \main_sdram_bankmachine1_auto_precharge = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:552$2171'. Set init value: \main_sdram_bankmachine1_cmd_payload_is_write = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:551$2170'. Set init value: \main_sdram_bankmachine1_cmd_payload_is_read = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:550$2169'. Set init value: \main_sdram_bankmachine1_cmd_payload_is_cmd = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:549$2168'. Set init value: \main_sdram_bankmachine1_cmd_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:548$2167'. Set init value: \main_sdram_bankmachine1_cmd_payload_ras = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:547$2166'. Set init value: \main_sdram_bankmachine1_cmd_payload_cas = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:545$2165'. Set init value: \main_sdram_bankmachine1_cmd_payload_a = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:544$2164'. Set init value: \main_sdram_bankmachine1_cmd_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:543$2163'. Set init value: \main_sdram_bankmachine1_cmd_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:542$2162'. Set init value: \main_sdram_bankmachine1_refresh_gnt = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:540$2161'. Set init value: \main_sdram_bankmachine1_req_rdata_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:539$2160'. Set init value: \main_sdram_bankmachine1_req_wdata_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:533$2159'. Set init value: \main_sdram_bankmachine0_trascon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:532$2158'. Set init value: \main_sdram_bankmachine0_trascon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:530$2157'. Set init value: \main_sdram_bankmachine0_trccon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:529$2156'. Set init value: \main_sdram_bankmachine0_trccon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:527$2155'. Set init value: \main_sdram_bankmachine0_twtpcon_count = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:526$2154'. Set init value: \main_sdram_bankmachine0_twtpcon_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:524$2153'. Set init value: \main_sdram_bankmachine0_row_col_n_addr_sel = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:523$2152'. Set init value: \main_sdram_bankmachine0_row_close = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:522$2151'. Set init value: \main_sdram_bankmachine0_row_open = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:520$2150'. Set init value: \main_sdram_bankmachine0_row_opened = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:519$2149'. Set init value: \main_sdram_bankmachine0_row = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:518$2148'. Set init value: \main_sdram_bankmachine0_cmd_buffer_source_payload_addr = 22'0000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:517$2147'. Set init value: \main_sdram_bankmachine0_cmd_buffer_source_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:516$2146'. Set init value: \main_sdram_bankmachine0_cmd_buffer_source_last = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:515$2145'. Set init value: \main_sdram_bankmachine0_cmd_buffer_source_first = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:513$2144'. Set init value: \main_sdram_bankmachine0_cmd_buffer_source_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:492$2143'. Set init value: \main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:491$2142'. Set init value: \main_sdram_bankmachine0_cmd_buffer_lookahead_consume = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:490$2141'. Set init value: \main_sdram_bankmachine0_cmd_buffer_lookahead_produce = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:488$2139'. Set init value: \main_sdram_bankmachine0_cmd_buffer_lookahead_level = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:469$2136'. Set init value: \main_sdram_bankmachine0_auto_precharge = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:468$2135'. Set init value: \main_sdram_bankmachine0_cmd_payload_is_write = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:467$2134'. Set init value: \main_sdram_bankmachine0_cmd_payload_is_read = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:466$2133'. Set init value: \main_sdram_bankmachine0_cmd_payload_is_cmd = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:465$2132'. Set init value: \main_sdram_bankmachine0_cmd_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:464$2131'. Set init value: \main_sdram_bankmachine0_cmd_payload_ras = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:463$2130'. Set init value: \main_sdram_bankmachine0_cmd_payload_cas = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:461$2129'. Set init value: \main_sdram_bankmachine0_cmd_payload_a = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:460$2128'. Set init value: \main_sdram_bankmachine0_cmd_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:459$2127'. Set init value: \main_sdram_bankmachine0_cmd_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:458$2126'. Set init value: \main_sdram_bankmachine0_refresh_gnt = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:456$2125'. Set init value: \main_sdram_bankmachine0_req_rdata_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:455$2124'. Set init value: \main_sdram_bankmachine0_req_wdata_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:449$2123'. Set init value: \main_sdram_sequencer_count = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:448$2122'. Set init value: \main_sdram_sequencer_counter = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:447$2121'. Set init value: \main_sdram_sequencer_done1 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:444$2120'. Set init value: \main_sdram_sequencer_start0 = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:443$2119'. Set init value: \main_sdram_postponer_count = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:442$2118'. Set init value: \main_sdram_postponer_req_o = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:440$2117'. Set init value: \main_sdram_timer_count1 = 9'110000110 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:432$2114'. Set init value: \main_sdram_cmd_payload_we = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:431$2113'. Set init value: \main_sdram_cmd_payload_ras = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:430$2112'. Set init value: \main_sdram_cmd_payload_cas = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:429$2111'. Set init value: \main_sdram_cmd_payload_ba = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:428$2110'. Set init value: \main_sdram_cmd_payload_a = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:427$2109'. Set init value: \main_sdram_cmd_last = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:426$2108'. Set init value: \main_sdram_cmd_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:425$2107'. Set init value: \main_sdram_cmd_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:422$2106'. Set init value: \main_sdram_dfi_p0_rddata_en = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:420$2105'. Set init value: \main_sdram_dfi_p0_wrdata_en = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:414$2103'. Set init value: \main_sdram_dfi_p0_we_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:413$2102'. Set init value: \main_sdram_dfi_p0_ras_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:412$2101'. Set init value: \main_sdram_dfi_p0_cs_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:411$2100'. Set init value: \main_sdram_dfi_p0_cas_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:410$2099'. Set init value: \main_sdram_dfi_p0_bank = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:409$2098'. Set init value: \main_sdram_dfi_p0_address = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:407$2097'. Set init value: \main_sdram_interface_wdata_we = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:406$2096'. Set init value: \main_sdram_interface_wdata = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:375$2095'. Set init value: \main_sdram_rddata_status = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:374$2094'. Set init value: \main_sdram_wrdata_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:373$2093'. Set init value: \main_sdram_wrdata_storage = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:372$2092'. Set init value: \main_sdram_baddress_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:371$2091'. Set init value: \main_sdram_baddress_storage = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:370$2090'. Set init value: \main_sdram_address_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:369$2089'. Set init value: \main_sdram_address_storage = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:364$2087'. Set init value: \main_sdram_command_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:363$2086'. Set init value: \main_sdram_command_storage = 6'000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:362$2085'. Set init value: \main_sdram_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:361$2084'. Set init value: \main_sdram_storage = 4'0001 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:354$2083'. Set init value: \main_sdram_master_p0_rddata_en = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:353$2082'. Set init value: \main_sdram_master_p0_wrdata_mask = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:352$2081'. Set init value: \main_sdram_master_p0_wrdata_en = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:351$2080'. Set init value: \main_sdram_master_p0_wrdata = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:350$2079'. Set init value: \main_sdram_master_p0_act_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:349$2078'. Set init value: \main_sdram_master_p0_reset_n = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:348$2077'. Set init value: \main_sdram_master_p0_odt = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:347$2076'. Set init value: \main_sdram_master_p0_cke = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:346$2075'. Set init value: \main_sdram_master_p0_we_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:345$2074'. Set init value: \main_sdram_master_p0_ras_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:344$2073'. Set init value: \main_sdram_master_p0_cs_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:343$2072'. Set init value: \main_sdram_master_p0_cas_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:342$2071'. Set init value: \main_sdram_master_p0_bank = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:341$2070'. Set init value: \main_sdram_master_p0_address = 13'0000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:340$2069'. Set init value: \main_sdram_slave_p0_rddata_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:339$2068'. Set init value: \main_sdram_slave_p0_rddata = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:324$2067'. Set init value: \main_sdram_inti_p0_rddata_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:323$2066'. Set init value: \main_sdram_inti_p0_rddata = 16'0000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:314$2064'. Set init value: \main_sdram_inti_p0_we_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:313$2063'. Set init value: \main_sdram_inti_p0_ras_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:312$2062'. Set init value: \main_sdram_inti_p0_cs_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:311$2061'. Set init value: \main_sdram_inti_p0_cas_n = 1'1 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:308$2060'. Set init value: \main_rddata_en = 3'000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:307$2059'. Set init value: \main_dfi_p0_rddata_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:282$2058'. Set init value: \main_soclinux_timer_value = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:281$2057'. Set init value: \main_soclinux_timer_eventmanager_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:280$2056'. Set init value: \main_soclinux_timer_eventmanager_storage = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:271$2055'. Set init value: \main_soclinux_timer_zero_old_trigger = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:270$2054'. Set init value: \main_soclinux_timer_zero_clear = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:268$2053'. Set init value: \main_soclinux_timer_zero_pending = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:263$2052'. Set init value: \main_soclinux_timer_value_status = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:262$2051'. Set init value: \main_soclinux_timer_update_value_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:261$2050'. Set init value: \main_soclinux_timer_update_value_storage = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:260$2049'. Set init value: \main_soclinux_timer_en_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:259$2048'. Set init value: \main_soclinux_timer_en_storage = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:258$2047'. Set init value: \main_soclinux_timer_reload_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:257$2046'. Set init value: \main_soclinux_timer_reload_storage = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:256$2045'. Set init value: \main_soclinux_timer_load_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:255$2044'. Set init value: \main_soclinux_timer_load_storage = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:239$2042'. Set init value: \main_soclinux_uart_rx_fifo_wrport_adr = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:238$2041'. Set init value: \main_soclinux_uart_rx_fifo_consume = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:237$2040'. Set init value: \main_soclinux_uart_rx_fifo_produce = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:235$2038'. Set init value: \main_soclinux_uart_rx_fifo_level0 = 5'00000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:228$2037'. Set init value: \main_soclinux_uart_rx_fifo_readable = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:202$2036'. Set init value: \main_soclinux_uart_tx_fifo_wrport_adr = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:201$2035'. Set init value: \main_soclinux_uart_tx_fifo_consume = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:200$2034'. Set init value: \main_soclinux_uart_tx_fifo_produce = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:198$2032'. Set init value: \main_soclinux_uart_tx_fifo_level0 = 5'00000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:191$2031'. Set init value: \main_soclinux_uart_tx_fifo_readable = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:163$2028'. Set init value: \main_soclinux_uart_eventmanager_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:162$2027'. Set init value: \main_soclinux_uart_eventmanager_storage = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:161$2026'. Set init value: \main_soclinux_uart_eventmanager_pending_w = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:157$2025'. Set init value: \main_soclinux_uart_eventmanager_status_w = 2'00 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:153$2024'. Set init value: \main_soclinux_uart_rx_old_trigger = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:152$2023'. Set init value: \main_soclinux_uart_rx_clear = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:150$2022'. Set init value: \main_soclinux_uart_rx_pending = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:148$2021'. Set init value: \main_soclinux_uart_tx_old_trigger = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:147$2020'. Set init value: \main_soclinux_uart_tx_clear = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:145$2019'. Set init value: \main_soclinux_uart_tx_pending = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:132$2018'. Set init value: \main_soclinux_rx_busy = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:131$2017'. Set init value: \main_soclinux_rx_bitcount = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:130$2016'. Set init value: \main_soclinux_rx_reg = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:129$2015'. Set init value: \main_soclinux_rx_r = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:127$2014'. Set init value: \main_soclinux_rx_clkphase = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:126$2013'. Set init value: \main_soclinux_rx_clken = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:125$2012'. Set init value: \main_soclinux_source_payload_data = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:121$2009'. Set init value: \main_soclinux_source_valid = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:120$2008'. Set init value: \main_soclinux_tx_busy = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:119$2007'. Set init value: \main_soclinux_tx_bitcount = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:118$2006'. Set init value: \main_soclinux_tx_reg = 8'00000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:117$2005'. Set init value: \main_soclinux_tx_clkphase = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:116$2004'. Set init value: \main_soclinux_tx_clken = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:112$2003'. Set init value: \main_soclinux_sink_ready = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:110$2002'. Set init value: \main_soclinux_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:109$2001'. Set init value: \main_soclinux_storage = 85899345 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:107$2000'. Set init value: \main_soclinux_ram_we = 4'0000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:100$1998'. Set init value: \main_soclinux_ram_bus_ram_bus_ack = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:87$1996'. Set init value: \main_soclinux_soclinux_ram_bus_ack = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:79$1994'. Set init value: \main_soclinux_cpu_time_cmp = 64'1111111111111111111111111111111111111111111111111111111111111111 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:78$1993'. Set init value: \main_soclinux_cpu_time = 64'0000000000000000000000000000000000000000000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:76$1992'. Set init value: \main_soclinux_cpu_time_cmp_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:75$1991'. Set init value: \main_soclinux_cpu_time_cmp_storage = 64'1111111111111111111111111111111111111111111111111111111111111111 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:72$1990'. Set init value: \main_soclinux_cpu_time_status = 64'0000000000000000000000000000000000000000000000000000000000000000 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:45$1988'. Set init value: \main_soclinux_cpu_interrupt0 = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:43$1987'. Set init value: \main_soclinux_soccontroller_bus_errors = 0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:37$1986'. Set init value: \main_soclinux_soccontroller_scratch_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:36$1985'. Set init value: \main_soclinux_soccontroller_scratch_storage = 305419896 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:35$1984'. Set init value: \main_soclinux_soccontroller_reset_re = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:34$1983'. Set init value: \main_soclinux_soccontroller_reset_storage = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1550$2491'. Set init value: \builder_inferedsdrtristate15_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1546$2490'. Set init value: \builder_inferedsdrtristate14_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1542$2489'. Set init value: \builder_inferedsdrtristate13_oe = 1'0 Found init rule in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1538$2488'. Set init value: \builder_inferedsdrtristate12_oe = 1'0 4.5.5. Executing PROC_ARST pass (detect async resets in processes). 4.5.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\TRELLIS_FF.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$230'. Creating decoders for process `\TRELLIS_FF.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:350$226'. 1/1: $0\Q[0:0] Creating decoders for process `\DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$223'. Creating decoders for process `\DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285$202'. 1/3: $0$memwr$\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$201_EN[3:0]$205 2/3: $0$memwr$\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$201_DATA[3:0]$204 3/3: $0$memwr$\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$201_ADDR[3:0]$203 Creating decoders for process `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$169'. Creating decoders for process `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221$147'. 1/3: $0$memwr$\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$145_EN[3:0]$150 2/3: $0$memwr$\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$145_DATA[3:0]$149 3/3: $0$memwr$\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$145_ADDR[3:0]$148 Creating decoders for process `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:213$146'. Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. 1/12: $0\decodeStage_hit_error[0:0] 2/12: $0\decodeStage_hit_valid[0:0] 3/12: $0\decodeStage_mmuRsp_refilling[0:0] 4/12: $0\decodeStage_mmuRsp_exception[0:0] 5/12: $0\decodeStage_mmuRsp_allowExecute[0:0] 6/12: $0\decodeStage_mmuRsp_allowWrite[0:0] 7/12: $0\decodeStage_mmuRsp_allowRead[0:0] 8/12: $0\decodeStage_mmuRsp_isIoAccess[0:0] 9/12: $0\decodeStage_mmuRsp_physicalAddress[31:0] 10/12: $0\io_cpu_fetch_data_regNextWhen[31:0] 11/12: $0\lineLoader_flushCounter[7:0] 12/12: $0\lineLoader_address[31:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882'. 1/5: $0\lineLoader_wordIndex[2:0] 2/5: $0\lineLoader_cmdSent[0:0] 3/5: $0\lineLoader_flushPending[0:0] 4/5: $0\lineLoader_hadError[0:0] 5/5: $0\lineLoader_valid[0:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:226$3860'. 1/1: $1\lineLoader_wayToAllocate_willIncrement[0:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:210$3855'. 1/3: $3\io_cpu_prefetch_haltIt[0:0] 2/3: $2\io_cpu_prefetch_haltIt[0:0] 3/3: $1\io_cpu_prefetch_haltIt[0:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:201$3853'. 1/2: $2\lineLoader_fire[0:0] 2/2: $1\lineLoader_fire[0:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:193$3852'. 1/1: $1\_zz_2_[0:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:186$3851'. 1/1: $1\_zz_1_[0:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:180$3849'. 1/1: $0\_zz_11_[31:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:174$3845'. 1/3: $0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 2/3: $0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_DATA[31:0]$3847 3/3: $0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_ADDR[9:0]$3846 Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:168$3843'. 1/1: $0\_zz_10_[21:0] Creating decoders for process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:162$3839'. 1/3: $0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 2/3: $0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_DATA[21:0]$3841 3/3: $0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_ADDR[6:0]$3840 Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. 1/10: $0\stageB_mmuRsp_physicalAddress[31:0] [31:12] 2/10: $0\stageB_mmuRsp_physicalAddress[31:0] [11:5] 3/10: $0\stageB_mmuRsp_physicalAddress[31:0] [4:0] 4/10: $0\loader_error[0:0] 5/10: $0\loader_waysAllocator[0:0] 6/10: $0\loader_valid[0:0] 7/10: $0\stageB_memCmdSent[0:0] 8/10: $0\stageB_lrsc_reserved[0:0] 9/10: $0\stageB_flusher_valid[0:0] 10/10: $0\loader_counter_value[2:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. 1/30: $0\stageB_amo_resultRegValid[0:0] 2/30: $0\stageB_colisions[0:0] 3/30: $0\stageB_mask[3:0] 4/30: $0\stageB_waysHits[0:0] 5/30: $0\stageB_dataReadRsp_0[31:0] 6/30: $0\stageB_tagsReadRsp_0_address[19:0] 7/30: $0\stageB_tagsReadRsp_0_error[0:0] 8/30: $0\stageB_tagsReadRsp_0_valid[0:0] 9/30: $0\stageB_mmuRsp_refilling[0:0] 10/30: $0\stageB_mmuRsp_exception[0:0] 11/30: $0\stageB_mmuRsp_allowExecute[0:0] 12/30: $0\stageB_mmuRsp_allowWrite[0:0] 13/30: $0\stageB_mmuRsp_allowRead[0:0] 14/30: $0\stageB_mmuRsp_isIoAccess[0:0] 15/30: $0\stageB_request_amoCtrl_alu[2:0] 16/30: $0\stageB_request_amoCtrl_swap[0:0] 17/30: $0\stageB_isAmo[0:0] 18/30: $0\stageB_request_isLrsc[0:0] 19/30: $0\stageB_request_size[1:0] 20/30: $0\stageB_request_data[31:0] 21/30: $0\stageB_request_wr[0:0] 22/30: $0\stage0_colisions_regNextWhen[0:0] 23/30: $0\stageA_mask[3:0] 24/30: $0\stageA_request_amoCtrl_alu[2:0] 25/30: $0\stageA_request_amoCtrl_swap[0:0] 26/30: $0\stageA_request_isAmo[0:0] 27/30: $0\stageA_request_isLrsc[0:0] 28/30: $0\stageA_request_size[1:0] 29/30: $0\stageA_request_data[31:0] 30/30: $0\stageA_request_wr[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1052$3797'. 1/1: $1\loader_counter_valueNext[2:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1042$3794'. 1/1: $1\loader_counter_willIncrement[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1030$3792'. 1/2: $2\io_cpu_writeBack_data[31:0] 2/2: $1\io_cpu_writeBack_data[31:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1017$3789'. 1/3: $3\io_mem_cmd_payload_wr[0:0] 2/3: $2\io_mem_cmd_payload_wr[0:0] 3/3: $1\io_mem_cmd_payload_wr[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1002$3788'. 1/3: $3\io_mem_cmd_payload_last[0:0] 2/3: $2\io_mem_cmd_payload_last[0:0] 3/3: $1\io_mem_cmd_payload_last[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:987$3787'. 1/3: $3\io_mem_cmd_payload_length[2:0] 2/3: $2\io_mem_cmd_payload_length[2:0] 3/3: $1\io_mem_cmd_payload_length[2:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:972$3786'. 1/3: $3\io_mem_cmd_payload_address[31:0] 2/3: $2\io_mem_cmd_payload_address[31:0] 3/3: $1\io_mem_cmd_payload_address[31:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:936$3783'. 1/11: $11\io_mem_cmd_valid[0:0] 2/11: $10\io_mem_cmd_valid[0:0] 3/11: $9\io_mem_cmd_valid[0:0] 4/11: $8\io_mem_cmd_valid[0:0] 5/11: $7\io_mem_cmd_valid[0:0] 6/11: $6\io_mem_cmd_valid[0:0] 7/11: $5\io_mem_cmd_valid[0:0] 8/11: $4\io_mem_cmd_valid[0:0] 9/11: $3\io_mem_cmd_valid[0:0] 10/11: $2\io_mem_cmd_valid[0:0] 11/11: $1\io_mem_cmd_valid[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:924$3762'. 1/1: $1\io_cpu_writeBack_accessError[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:905$3759'. 1/6: $6\io_cpu_redo[0:0] 2/6: $5\io_cpu_redo[0:0] 3/6: $4\io_cpu_redo[0:0] 4/6: $3\io_cpu_redo[0:0] 5/6: $2\io_cpu_redo[0:0] 6/6: $1\io_cpu_redo[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:885$3754'. 1/1: $1\stageB_amo_result[31:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:873$3747'. 1/1: $1\stageB_requestDataBypass[31:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:866$3746'. 1/1: $1\io_cpu_flush_ready[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:832$3742'. 1/11: $11\io_cpu_writeBack_haltIt[0:0] 2/11: $10\io_cpu_writeBack_haltIt[0:0] 3/11: $9\io_cpu_writeBack_haltIt[0:0] 4/11: $8\io_cpu_writeBack_haltIt[0:0] 5/11: $7\io_cpu_writeBack_haltIt[0:0] 6/11: $6\io_cpu_writeBack_haltIt[0:0] 7/11: $5\io_cpu_writeBack_haltIt[0:0] 8/11: $4\io_cpu_writeBack_haltIt[0:0] 9/11: $3\io_cpu_writeBack_haltIt[0:0] 10/11: $2\io_cpu_writeBack_haltIt[0:0] 11/11: $1\io_cpu_writeBack_haltIt[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:816$3739'. 1/5: $5\stageB_loaderValid[0:0] 2/5: $4\stageB_loaderValid[0:0] 3/5: $3\stageB_loaderValid[0:0] 4/5: $2\stageB_loaderValid[0:0] 5/5: $1\stageB_loaderValid[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:806$3736'. 1/1: $1\stageB_mmuRspFreeze[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:782$3717'. 1/1: $1\_zz_6_[3:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:768$3715'. 1/4: $4\dataWriteCmd_payload_mask[3:0] 2/4: $3\dataWriteCmd_payload_mask[3:0] 3/4: $2\dataWriteCmd_payload_mask[3:0] 4/4: $1\dataWriteCmd_payload_mask[3:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:754$3713'. 1/4: $4\dataWriteCmd_payload_data[31:0] 2/4: $3\dataWriteCmd_payload_data[31:0] 3/4: $2\dataWriteCmd_payload_data[31:0] 4/4: $1\dataWriteCmd_payload_data[31:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:740$3711'. 1/4: $4\dataWriteCmd_payload_address[9:0] 2/4: $3\dataWriteCmd_payload_address[9:0] 3/4: $2\dataWriteCmd_payload_address[9:0] 4/4: $1\dataWriteCmd_payload_address[9:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:726$3709'. 1/4: $4\dataWriteCmd_payload_way[0:0] 2/4: $3\dataWriteCmd_payload_way[0:0] 3/4: $2\dataWriteCmd_payload_way[0:0] 4/4: $1\dataWriteCmd_payload_way[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:699$3706'. 1/9: $9\dataWriteCmd_valid[0:0] 2/9: $8\dataWriteCmd_valid[0:0] 3/9: $7\dataWriteCmd_valid[0:0] 4/9: $6\dataWriteCmd_valid[0:0] 5/9: $5\dataWriteCmd_valid[0:0] 6/9: $4\dataWriteCmd_valid[0:0] 7/9: $3\dataWriteCmd_valid[0:0] 8/9: $2\dataWriteCmd_valid[0:0] 9/9: $1\dataWriteCmd_valid[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:692$3705'. 1/1: $1\tagsWriteCmd_payload_data_address[19:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:685$3703'. 1/1: $1\tagsWriteCmd_payload_data_error[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:675$3702'. 1/2: $2\tagsWriteCmd_payload_data_valid[0:0] 2/2: $1\tagsWriteCmd_payload_data_valid[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:665$3701'. 1/2: $2\tagsWriteCmd_payload_address[6:0] 2/2: $1\tagsWriteCmd_payload_address[6:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:655$3700'. 1/2: $2\tagsWriteCmd_payload_way[0:0] 2/2: $1\tagsWriteCmd_payload_way[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:642$3699'. 1/3: $3\tagsWriteCmd_valid[0:0] 2/3: $2\tagsWriteCmd_valid[0:0] 3/3: $1\tagsWriteCmd_valid[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:635$3698'. 1/1: $1\dataReadCmd_payload[9:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:628$3697'. 1/1: $1\dataReadCmd_valid[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:621$3696'. 1/1: $1\tagsReadCmd_payload[6:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:614$3695'. 1/1: $1\tagsReadCmd_valid[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:599$3689'. 1/1: $1\_zz_2_[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:592$3687'. 1/1: $1\_zz_1_[0:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:583$3682'. 1/4: $0\_zz_41_[7:0] 2/4: $0\_zz_40_[7:0] 3/4: $0\_zz_39_[7:0] 4/4: $0\_zz_38_[7:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. 1/12: $0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 2/12: $0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_DATA[7:0]$3667 3/12: $0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_ADDR[9:0]$3666 4/12: $0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 5/12: $0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_DATA[7:0]$3670 6/12: $0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_ADDR[9:0]$3669 7/12: $0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 8/12: $0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_DATA[7:0]$3673 9/12: $0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_ADDR[9:0]$3672 10/12: $0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 11/12: $0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_DATA[7:0]$3676 12/12: $0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_ADDR[9:0]$3675 Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:565$3664'. Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:559$3662'. 1/1: $0\_zz_10_[21:0] Creating decoders for process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:553$3658'. 1/3: $0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 2/3: $0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_DATA[21:0]$3660 3/3: $0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_ADDR[6:0]$3659 Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2485$3615'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2484$3614'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. 1/204: $0\memory_DivPlugin_rs1[32:0] [32] 2/204: $0\memory_DivPlugin_accumulator[64:0] [31:0] 3/204: $0\memory_DivPlugin_accumulator[64:0] [64:32] 4/204: $0\decode_to_execute_IS_RS1_SIGNED[0:0] 5/204: $0\decode_to_execute_RS1[31:0] 6/204: $0\decode_to_execute_BYPASSABLE_EXECUTE_STAGE[0:0] 7/204: $0\memory_to_writeBack_IS_MUL[0:0] 8/204: $0\execute_to_memory_IS_MUL[0:0] 9/204: $0\decode_to_execute_IS_MUL[0:0] 10/204: $0\execute_to_memory_IS_DIV[0:0] 11/204: $0\decode_to_execute_IS_DIV[0:0] 12/204: $0\memory_to_writeBack_FORMAL_PC_NEXT[31:0] 13/204: $0\execute_to_memory_FORMAL_PC_NEXT[31:0] 14/204: $0\decode_to_execute_FORMAL_PC_NEXT[31:0] 15/204: $0\decode_to_execute_BRANCH_CTRL[1:0] 16/204: $0\decode_to_execute_CSR_WRITE_OPCODE[0:0] 17/204: $0\memory_to_writeBack_MEMORY_ENABLE[0:0] 18/204: $0\execute_to_memory_MEMORY_ENABLE[0:0] 19/204: $0\decode_to_execute_MEMORY_ENABLE[0:0] 20/204: $0\decode_to_execute_MEMORY_LRSC[0:0] 21/204: $0\execute_to_memory_MUL_LH[33:0] 22/204: $0\memory_to_writeBack_MEMORY_WR[0:0] 23/204: $0\execute_to_memory_MEMORY_WR[0:0] 24/204: $0\decode_to_execute_MEMORY_WR[0:0] 25/204: $0\memory_to_writeBack_PC[31:0] 26/204: $0\execute_to_memory_PC[31:0] 27/204: $0\decode_to_execute_PC[31:0] 28/204: $0\execute_to_memory_SHIFT_CTRL[1:0] 29/204: $0\decode_to_execute_SHIFT_CTRL[1:0] 30/204: $0\decode_to_execute_ALU_CTRL[1:0] 31/204: $0\decode_to_execute_CSR_READ_OPCODE[0:0] 32/204: $0\execute_to_memory_BRANCH_DO[0:0] 33/204: $0\decode_to_execute_PREDICTION_HAD_BRANCHED2[0:0] 34/204: $0\memory_to_writeBack_IS_SFENCE_VMA[0:0] 35/204: $0\execute_to_memory_IS_SFENCE_VMA[0:0] 36/204: $0\decode_to_execute_IS_SFENCE_VMA[0:0] 37/204: $0\memory_to_writeBack_MUL_HH[33:0] 38/204: $0\execute_to_memory_MUL_HH[33:0] 39/204: $0\execute_to_memory_BYPASSABLE_MEMORY_STAGE[0:0] 40/204: $0\decode_to_execute_BYPASSABLE_MEMORY_STAGE[0:0] 41/204: $0\decode_to_execute_SRC1_CTRL[1:0] 42/204: $0\decode_to_execute_SRC_USE_SUB_LESS[0:0] 43/204: $0\execute_to_memory_MUL_HL[33:0] 44/204: $0\decode_to_execute_MEMORY_AMO[0:0] 45/204: $0\decode_to_execute_SRC_LESS_UNSIGNED[0:0] 46/204: $0\decode_to_execute_SRC2_FORCE_ZERO[0:0] 47/204: $0\decode_to_execute_RS2[31:0] 48/204: $0\execute_to_memory_MUL_LL[31:0] 49/204: $0\decode_to_execute_ALU_BITWISE_CTRL[1:0] 50/204: $0\decode_to_execute_SRC2_CTRL[1:0] 51/204: $0\execute_to_memory_SHIFT_RIGHT[31:0] 52/204: $0\execute_to_memory_BRANCH_CALC[31:0] 53/204: $0\memory_to_writeBack_MEMORY_ADDRESS_LOW[1:0] 54/204: $0\execute_to_memory_MEMORY_ADDRESS_LOW[1:0] 55/204: $0\execute_to_memory_INSTRUCTION[31:0] 56/204: $0\decode_to_execute_INSTRUCTION[31:0] 57/204: $0\decode_to_execute_IS_RS2_SIGNED[0:0] 58/204: $0\memory_to_writeBack_REGFILE_WRITE_VALID[0:0] 59/204: $0\execute_to_memory_REGFILE_WRITE_VALID[0:0] 60/204: $0\decode_to_execute_REGFILE_WRITE_VALID[0:0] 61/204: $0\decode_to_execute_MEMORY_MANAGMENT[0:0] 62/204: $0\memory_to_writeBack_ENV_CTRL[1:0] 63/204: $0\execute_to_memory_ENV_CTRL[1:0] 64/204: $0\decode_to_execute_ENV_CTRL[1:0] 65/204: $0\execute_to_memory_REGFILE_WRITE_DATA[31:0] 66/204: $0\decode_to_execute_IS_CSR[0:0] 67/204: $0\memory_to_writeBack_MUL_LOW[51:0] 68/204: $0\memory_DivPlugin_div_result[31:0] 69/204: $0\memory_DivPlugin_div_done[0:0] 70/204: $0\memory_DivPlugin_div_needRevert[0:0] 71/204: $0\memory_DivPlugin_rs1[32:0] [31:0] 72/204: $0\memory_DivPlugin_rs2[31:0] 73/204: $0\CsrPlugin_mip_MSIP[0:0] 74/204: $0\CsrPlugin_interrupt_targetPrivilege[1:0] 75/204: $0\CsrPlugin_interrupt_code[3:0] 76/204: $0\CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr[31:0] 77/204: $0\CsrPlugin_exceptionPortCtrl_exceptionContext_code[3:0] 78/204: $0\CsrPlugin_sepc[31:0] 79/204: $0\CsrPlugin_stval[31:0] 80/204: $0\CsrPlugin_scause_exceptionCode[3:0] 81/204: $0\CsrPlugin_scause_interrupt[0:0] 82/204: $0\CsrPlugin_sscratch[31:0] 83/204: $0\CsrPlugin_stvec_base[29:0] 84/204: $0\CsrPlugin_stvec_mode[1:0] 85/204: $0\CsrPlugin_minstret[63:0] 86/204: $0\CsrPlugin_mtval[31:0] 87/204: $0\CsrPlugin_mcause_exceptionCode[3:0] 88/204: $0\CsrPlugin_mcause_interrupt[0:0] 89/204: $0\CsrPlugin_mscratch[31:0] 90/204: $0\CsrPlugin_mepc[31:0] 91/204: $0\CsrPlugin_mtvec_base[29:0] 92/204: $0\CsrPlugin_mtvec_mode[1:0] 93/204: $0\_zz_187_[31:0] 94/204: $0\_zz_186_[4:0] 95/204: $0\MmuPlugin_shared_pteBuffer_PPN1[11:0] 96/204: $0\MmuPlugin_shared_pteBuffer_PPN0[9:0] 97/204: $0\MmuPlugin_shared_pteBuffer_RSW[1:0] 98/204: $0\MmuPlugin_shared_pteBuffer_D[0:0] 99/204: $0\MmuPlugin_shared_pteBuffer_A[0:0] 100/204: $0\MmuPlugin_shared_pteBuffer_G[0:0] 101/204: $0\MmuPlugin_shared_pteBuffer_U[0:0] 102/204: $0\MmuPlugin_shared_pteBuffer_X[0:0] 103/204: $0\MmuPlugin_shared_pteBuffer_W[0:0] 104/204: $0\MmuPlugin_shared_pteBuffer_R[0:0] 105/204: $0\MmuPlugin_shared_pteBuffer_V[0:0] 106/204: $0\MmuPlugin_shared_portId[0:0] 107/204: $0\MmuPlugin_shared_vpn_1[9:0] 108/204: $0\MmuPlugin_shared_vpn_0[9:0] 109/204: $0\MmuPlugin_ports_1_cache_3_allowUser[0:0] 110/204: $0\MmuPlugin_ports_1_cache_3_allowExecute[0:0] 111/204: $0\MmuPlugin_ports_1_cache_3_allowWrite[0:0] 112/204: $0\MmuPlugin_ports_1_cache_3_allowRead[0:0] 113/204: $0\MmuPlugin_ports_1_cache_3_physicalAddress_1[9:0] 114/204: $0\MmuPlugin_ports_1_cache_3_physicalAddress_0[9:0] 115/204: $0\MmuPlugin_ports_1_cache_3_virtualAddress_1[9:0] 116/204: $0\MmuPlugin_ports_1_cache_3_virtualAddress_0[9:0] 117/204: $0\MmuPlugin_ports_1_cache_3_superPage[0:0] 118/204: $0\MmuPlugin_ports_1_cache_3_exception[0:0] 119/204: $0\MmuPlugin_ports_1_cache_2_allowUser[0:0] 120/204: $0\MmuPlugin_ports_1_cache_2_allowExecute[0:0] 121/204: $0\MmuPlugin_ports_1_cache_2_allowWrite[0:0] 122/204: $0\MmuPlugin_ports_1_cache_2_allowRead[0:0] 123/204: $0\MmuPlugin_ports_1_cache_2_physicalAddress_1[9:0] 124/204: $0\MmuPlugin_ports_1_cache_2_physicalAddress_0[9:0] 125/204: $0\MmuPlugin_ports_1_cache_2_virtualAddress_1[9:0] 126/204: $0\MmuPlugin_ports_1_cache_2_virtualAddress_0[9:0] 127/204: $0\MmuPlugin_ports_1_cache_2_superPage[0:0] 128/204: $0\MmuPlugin_ports_1_cache_2_exception[0:0] 129/204: $0\MmuPlugin_ports_1_cache_1_allowUser[0:0] 130/204: $0\MmuPlugin_ports_1_cache_1_allowExecute[0:0] 131/204: $0\MmuPlugin_ports_1_cache_1_allowWrite[0:0] 132/204: $0\MmuPlugin_ports_1_cache_1_allowRead[0:0] 133/204: $0\MmuPlugin_ports_1_cache_1_physicalAddress_1[9:0] 134/204: $0\MmuPlugin_ports_1_cache_1_physicalAddress_0[9:0] 135/204: $0\MmuPlugin_ports_1_cache_1_virtualAddress_1[9:0] 136/204: $0\MmuPlugin_ports_1_cache_1_virtualAddress_0[9:0] 137/204: $0\MmuPlugin_ports_1_cache_1_superPage[0:0] 138/204: $0\MmuPlugin_ports_1_cache_1_exception[0:0] 139/204: $0\MmuPlugin_ports_1_cache_0_allowUser[0:0] 140/204: $0\MmuPlugin_ports_1_cache_0_allowExecute[0:0] 141/204: $0\MmuPlugin_ports_1_cache_0_allowWrite[0:0] 142/204: $0\MmuPlugin_ports_1_cache_0_allowRead[0:0] 143/204: $0\MmuPlugin_ports_1_cache_0_physicalAddress_1[9:0] 144/204: $0\MmuPlugin_ports_1_cache_0_physicalAddress_0[9:0] 145/204: $0\MmuPlugin_ports_1_cache_0_virtualAddress_1[9:0] 146/204: $0\MmuPlugin_ports_1_cache_0_virtualAddress_0[9:0] 147/204: $0\MmuPlugin_ports_1_cache_0_superPage[0:0] 148/204: $0\MmuPlugin_ports_1_cache_0_exception[0:0] 149/204: $0\MmuPlugin_ports_0_cache_3_allowUser[0:0] 150/204: $0\MmuPlugin_ports_0_cache_3_allowExecute[0:0] 151/204: $0\MmuPlugin_ports_0_cache_3_allowWrite[0:0] 152/204: $0\MmuPlugin_ports_0_cache_3_allowRead[0:0] 153/204: $0\MmuPlugin_ports_0_cache_3_physicalAddress_1[9:0] 154/204: $0\MmuPlugin_ports_0_cache_3_physicalAddress_0[9:0] 155/204: $0\MmuPlugin_ports_0_cache_3_virtualAddress_1[9:0] 156/204: $0\MmuPlugin_ports_0_cache_3_virtualAddress_0[9:0] 157/204: $0\MmuPlugin_ports_0_cache_3_superPage[0:0] 158/204: $0\MmuPlugin_ports_0_cache_3_exception[0:0] 159/204: $0\MmuPlugin_ports_0_cache_2_allowUser[0:0] 160/204: $0\MmuPlugin_ports_0_cache_2_allowExecute[0:0] 161/204: $0\MmuPlugin_ports_0_cache_2_allowWrite[0:0] 162/204: $0\MmuPlugin_ports_0_cache_2_allowRead[0:0] 163/204: $0\MmuPlugin_ports_0_cache_2_physicalAddress_1[9:0] 164/204: $0\MmuPlugin_ports_0_cache_2_physicalAddress_0[9:0] 165/204: $0\MmuPlugin_ports_0_cache_2_virtualAddress_1[9:0] 166/204: $0\MmuPlugin_ports_0_cache_2_virtualAddress_0[9:0] 167/204: $0\MmuPlugin_ports_0_cache_2_superPage[0:0] 168/204: $0\MmuPlugin_ports_0_cache_2_exception[0:0] 169/204: $0\MmuPlugin_ports_0_cache_1_allowUser[0:0] 170/204: $0\MmuPlugin_ports_0_cache_1_allowExecute[0:0] 171/204: $0\MmuPlugin_ports_0_cache_1_allowWrite[0:0] 172/204: $0\MmuPlugin_ports_0_cache_1_allowRead[0:0] 173/204: $0\MmuPlugin_ports_0_cache_1_physicalAddress_1[9:0] 174/204: $0\MmuPlugin_ports_0_cache_1_physicalAddress_0[9:0] 175/204: $0\MmuPlugin_ports_0_cache_1_virtualAddress_1[9:0] 176/204: $0\MmuPlugin_ports_0_cache_1_virtualAddress_0[9:0] 177/204: $0\MmuPlugin_ports_0_cache_1_superPage[0:0] 178/204: $0\MmuPlugin_ports_0_cache_1_exception[0:0] 179/204: $0\MmuPlugin_ports_0_cache_0_allowUser[0:0] 180/204: $0\MmuPlugin_ports_0_cache_0_allowExecute[0:0] 181/204: $0\MmuPlugin_ports_0_cache_0_allowWrite[0:0] 182/204: $0\MmuPlugin_ports_0_cache_0_allowRead[0:0] 183/204: $0\MmuPlugin_ports_0_cache_0_physicalAddress_1[9:0] 184/204: $0\MmuPlugin_ports_0_cache_0_physicalAddress_0[9:0] 185/204: $0\MmuPlugin_ports_0_cache_0_virtualAddress_1[9:0] 186/204: $0\MmuPlugin_ports_0_cache_0_virtualAddress_0[9:0] 187/204: $0\MmuPlugin_ports_0_cache_0_superPage[0:0] 188/204: $0\MmuPlugin_ports_0_cache_0_exception[0:0] 189/204: $0\MmuPlugin_satp_ppn[19:0] 190/204: $0\_zz_145_[0:0] 191/204: $0\_zz_144_[2:0] 192/204: $0\_zz_143_[3:0] 193/204: $0\_zz_142_[31:0] 194/204: $0\_zz_141_[31:0] 195/204: $0\_zz_140_[0:0] 196/204: $0\_zz_138_[0:0] 197/204: $0\_zz_137_[2:0] 198/204: $0\_zz_136_[3:0] 199/204: $0\_zz_135_[31:0] 200/204: $0\_zz_134_[31:0] 201/204: $0\_zz_133_[0:0] 202/204: $0\IBusCachedPlugin_s2_tightlyCoupledHit[0:0] 203/204: $0\IBusCachedPlugin_s1_tightlyCoupledHit[0:0] 204/204: $0\_zz_119_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. 1/85: $0\_zz_238_[0:0] 2/85: $0\_zz_231_[0:0] 3/85: $0\memory_DivPlugin_div_counter_value[5:0] 4/85: $0\execute_CsrPlugin_wfiWake[0:0] 5/85: $0\CsrPlugin_hadException[0:0] 6/85: $0\CsrPlugin_lastStageWasWfi[0:0] 7/85: $0\CsrPlugin_interrupt_valid[0:0] 8/85: $0\CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack[0:0] 9/85: $0\CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory[0:0] 10/85: $0\CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute[0:0] 11/85: $0\CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode[0:0] 12/85: $0\_zz_185_[0:0] 13/85: $0\_zz_172_[0:0] 14/85: $0\MmuPlugin_ports_1_entryToReplace_value[1:0] 15/85: $0\MmuPlugin_ports_0_entryToReplace_value[1:0] 16/85: $0\IBusCachedPlugin_fetchPc_booted[0:0] 17/85: $0\_zz_232_[2:0] 18/85: $0\_zz_230_[2:0] 19/85: $0\memory_to_writeBack_IS_DBUS_SHARING[0:0] 20/85: $0\execute_to_memory_IS_DBUS_SHARING[0:0] 21/85: $0\memory_to_writeBack_INSTRUCTION[31:0] 22/85: $0\memory_to_writeBack_REGFILE_WRITE_DATA[31:0] 23/85: $0\_zz_228_[31:0] 24/85: $0\_zz_226_[31:0] 25/85: $0\CsrPlugin_sie_SSIE[0:0] 26/85: $0\CsrPlugin_sie_STIE[0:0] 27/85: $0\CsrPlugin_sie_SEIE[0:0] 28/85: $0\CsrPlugin_sip_SSIP[0:0] 29/85: $0\CsrPlugin_sip_STIP[0:0] 30/85: $0\CsrPlugin_sip_SEIP_SOFT[0:0] 31/85: $0\CsrPlugin_sstatus_SPP[0:0] 32/85: $0\CsrPlugin_sstatus_SPIE[0:0] 33/85: $0\CsrPlugin_sstatus_SIE[0:0] 34/85: $0\CsrPlugin_mideleg_SS[0:0] 35/85: $0\CsrPlugin_mideleg_SE[0:0] 36/85: $0\CsrPlugin_mideleg_ST[0:0] 37/85: $0\CsrPlugin_medeleg_SPF[0:0] 38/85: $0\CsrPlugin_medeleg_LPF[0:0] 39/85: $0\CsrPlugin_medeleg_IPF[0:0] 40/85: $0\CsrPlugin_medeleg_ES[0:0] 41/85: $0\CsrPlugin_medeleg_EU[0:0] 42/85: $0\CsrPlugin_medeleg_SAF[0:0] 43/85: $0\CsrPlugin_medeleg_SAM[0:0] 44/85: $0\CsrPlugin_medeleg_LAF[0:0] 45/85: $0\CsrPlugin_medeleg_LAM[0:0] 46/85: $0\CsrPlugin_medeleg_II[0:0] 47/85: $0\CsrPlugin_medeleg_IAF[0:0] 48/85: $0\CsrPlugin_medeleg_IAM[0:0] 49/85: $0\CsrPlugin_mie_MSIE[0:0] 50/85: $0\CsrPlugin_mie_MTIE[0:0] 51/85: $0\CsrPlugin_mie_MEIE[0:0] 52/85: $0\CsrPlugin_mstatus_MPP[1:0] 53/85: $0\CsrPlugin_mstatus_MPIE[0:0] 54/85: $0\CsrPlugin_mstatus_MIE[0:0] 55/85: $0\_zz_210_[1:0] 56/85: $0\MmuPlugin_shared_state_1_[2:0] 57/85: $0\MmuPlugin_ports_1_cache_3_valid[0:0] 58/85: $0\MmuPlugin_ports_1_cache_2_valid[0:0] 59/85: $0\MmuPlugin_ports_1_cache_1_valid[0:0] 60/85: $0\MmuPlugin_ports_1_cache_0_valid[0:0] 61/85: $0\MmuPlugin_ports_0_cache_3_valid[0:0] 62/85: $0\MmuPlugin_ports_0_cache_2_valid[0:0] 63/85: $0\MmuPlugin_ports_0_cache_1_valid[0:0] 64/85: $0\MmuPlugin_ports_0_cache_0_valid[0:0] 65/85: $0\MmuPlugin_satp_mode[0:0] 66/85: $0\MmuPlugin_status_mprv[0:0] 67/85: $0\MmuPlugin_status_mxr[0:0] 68/85: $0\MmuPlugin_status_sum[0:0] 69/85: $0\DBusCachedPlugin_rspCounter[31:0] 70/85: $0\_zz_139_[0:0] 71/85: $0\_zz_132_[0:0] 72/85: $0\IBusCachedPlugin_rspCounter[31:0] 73/85: $0\IBusCachedPlugin_injector_decodeRemoved[0:0] 74/85: $0\IBusCachedPlugin_injector_nextPcCalc_valids_4[0:0] 75/85: $0\IBusCachedPlugin_injector_nextPcCalc_valids_3[0:0] 76/85: $0\IBusCachedPlugin_injector_nextPcCalc_valids_2[0:0] 77/85: $0\IBusCachedPlugin_injector_nextPcCalc_valids_1[0:0] 78/85: $0\IBusCachedPlugin_injector_nextPcCalc_valids_0[0:0] 79/85: $0\_zz_118_[0:0] 80/85: $0\_zz_116_[0:0] 81/85: $0\IBusCachedPlugin_fetchPc_inc[0:0] 82/85: $0\IBusCachedPlugin_fetchPc_pcReg[31:0] 83/85: $0\writeBack_arbitration_isValid[0:0] 84/85: $0\memory_arbitration_isValid[0:0] 85/85: $0\execute_arbitration_isValid[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6677$3408'. 1/1: $1\iBusWishbone_STB[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6670$3407'. 1/1: $1\iBusWishbone_CYC[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6608$3346'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6591$3338'. 1/2: $2\memory_DivPlugin_div_counter_valueNext[5:0] 2/2: $1\memory_DivPlugin_div_counter_valueNext[5:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6582$3335'. 1/1: $1\memory_DivPlugin_div_counter_willClear[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6573$3334'. 1/2: $2\memory_DivPlugin_div_counter_willIncrement[0:0] 2/2: $1\memory_DivPlugin_div_counter_willIncrement[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6547$3325'. 1/1: $1\execute_MulPlugin_bSigned[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6533$3324'. 1/1: $1\execute_MulPlugin_aSigned[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6519$3319'. 1/1: $1\execute_CsrPlugin_writeData[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6505$3318'. 1/1: $1\execute_CsrPlugin_readToWriteData[9:9] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6381$3305'. 1/20: $1\execute_CsrPlugin_readData[31:0] [31] 2/20: $1\execute_CsrPlugin_readData[31:0] [25:20] 3/20: $1\execute_CsrPlugin_readData[31:0] [11] 4/20: $1\execute_CsrPlugin_readData[31:0] [7] 5/20: $1\execute_CsrPlugin_readData[31:0] [16:13] 6/20: $1\execute_CsrPlugin_readData[31:0] [0] 7/20: $1\execute_CsrPlugin_readData[31:0] [4] 8/20: $1\execute_CsrPlugin_readData[31:0] [9] 9/20: $1\execute_CsrPlugin_readData[31:0] [8] 10/20: $1\execute_CsrPlugin_readData[31:0] [2] 11/20: $1\execute_CsrPlugin_readData[31:0] [12] 12/20: $1\execute_CsrPlugin_readData[31:0] [3] 13/20: $1\execute_CsrPlugin_readData[31:0] [6] 14/20: $1\execute_CsrPlugin_readData[31:0] [17] 15/20: $1\execute_CsrPlugin_readData[31:0] [1] 16/20: $1\execute_CsrPlugin_readData[31:0] [10] 17/20: $1\execute_CsrPlugin_readData[31:0] [19] 18/20: $1\execute_CsrPlugin_readData[31:0] [5] 19/20: $1\execute_CsrPlugin_readData[31:0] [18] 20/20: $1\execute_CsrPlugin_readData[31:0] [30:26] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6360$3304'. 1/3: $3\CsrPlugin_selfException_payload_code[3:0] 2/3: $2\CsrPlugin_selfException_payload_code[3:0] 3/3: $1\CsrPlugin_selfException_payload_code[3:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6350$3303'. 1/2: $2\CsrPlugin_selfException_valid[0:0] 2/2: $1\CsrPlugin_selfException_valid[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6341$3299'. 1/2: $2\execute_CsrPlugin_illegalInstruction[0:0] 2/2: $1\execute_CsrPlugin_illegalInstruction[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6219$3294'. 1/15: $15\execute_CsrPlugin_illegalAccess[0:0] 2/15: $14\execute_CsrPlugin_illegalAccess[0:0] 3/15: $13\execute_CsrPlugin_illegalAccess[0:0] 4/15: $12\execute_CsrPlugin_illegalAccess[0:0] 5/15: $11\execute_CsrPlugin_illegalAccess[0:0] 6/15: $10\execute_CsrPlugin_illegalAccess[0:0] 7/15: $9\execute_CsrPlugin_illegalAccess[0:0] 8/15: $8\execute_CsrPlugin_illegalAccess[0:0] 9/15: $7\execute_CsrPlugin_illegalAccess[0:0] 10/15: $6\execute_CsrPlugin_illegalAccess[0:0] 11/15: $5\execute_CsrPlugin_illegalAccess[0:0] 12/15: $4\execute_CsrPlugin_illegalAccess[0:0] 13/15: $3\execute_CsrPlugin_illegalAccess[0:0] 14/15: $2\execute_CsrPlugin_illegalAccess[0:0] 15/15: $1\execute_CsrPlugin_illegalAccess[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6211$3292'. 1/1: $1\execute_CsrPlugin_inWfi[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6194$3282'. 1/1: $1\CsrPlugin_xtvec_base[29:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6180$3281'. 1/1: $1\CsrPlugin_xtvec_mode[1:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6173$3280'. 1/1: $1\CsrPlugin_trapCause[3:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6166$3279'. 1/1: $1\CsrPlugin_targetPrivilege[1:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6155$3272'. 1/2: $2\CsrPlugin_pipelineLiberator_done[0:0] 2/2: $1\CsrPlugin_pipelineLiberator_done[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6140$3270'. 1/2: $2\CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack[0:0] 2/2: $1\CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6130$3269'. 1/2: $2\CsrPlugin_exceptionPortCtrl_exceptionValids_memory[0:0] 2/2: $1\CsrPlugin_exceptionPortCtrl_exceptionValids_memory[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6120$3268'. 1/2: $2\CsrPlugin_exceptionPortCtrl_exceptionValids_execute[0:0] 2/2: $1\CsrPlugin_exceptionPortCtrl_exceptionValids_execute[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6110$3267'. 1/2: $2\CsrPlugin_exceptionPortCtrl_exceptionValids_decode[0:0] 2/2: $1\CsrPlugin_exceptionPortCtrl_exceptionValids_decode[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6039$3240'. 1/13: $13\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 2/13: $12\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 3/13: $11\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 4/13: $10\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 5/13: $9\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 6/13: $8\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 7/13: $7\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 8/13: $6\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 9/13: $5\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 10/13: $4\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 11/13: $3\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 12/13: $2\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] 13/13: $1\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6023$3232'. 1/1: $1\CsrPlugin_privilege[1:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5993$3226'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5978$3225'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5963$3222'. 1/2: $2\execute_BranchPlugin_branch_src2[31:0] 2/2: $1\execute_BranchPlugin_branch_src2[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5940$3221'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5928$3220'. 1/1: $1\execute_BranchPlugin_branch_src1[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5912$3215'. 1/1: $1\_zz_203_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5890$3214'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5875$3213'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5851$3212'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5832$3211'. 1/1: $1\_zz_196_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5820$3204'. 1/3: $3\_zz_195_[0:0] 2/3: $2\_zz_195_[0:0] 3/3: $1\_zz_195_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5782$3194'. 1/10: $10\_zz_183_[0:0] 2/10: $9\_zz_183_[0:0] 3/10: $8\_zz_183_[0:0] 4/10: $7\_zz_183_[0:0] 5/10: $6\_zz_183_[0:0] 6/10: $5\_zz_183_[0:0] 7/10: $4\_zz_183_[0:0] 8/10: $3\_zz_183_[0:0] 9/10: $2\_zz_183_[0:0] 10/10: $1\_zz_183_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5754$3192'. 1/10: $10\_zz_182_[0:0] 2/10: $9\_zz_182_[0:0] 3/10: $8\_zz_182_[0:0] 4/10: $7\_zz_182_[0:0] 5/10: $6\_zz_182_[0:0] 6/10: $5\_zz_182_[0:0] 7/10: $4\_zz_182_[0:0] 8/10: $3\_zz_182_[0:0] 9/10: $2\_zz_182_[0:0] 10/10: $1\_zz_182_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5719$3191'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5682$3188'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5670$3184'. 1/1: $1\execute_SrcPlugin_addSub[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5652$3183'. 1/1: $1\_zz_179_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5629$3182'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5605$3181'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5586$3180'. 1/1: $1\_zz_174_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5570$3177'. 1/1: $1\_zz_173_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5556$3173'. 1/1: $1\execute_IntAluPlugin_bitwise[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5547$3171'. 1/1: $1\lastStageRegFileWrite_valid[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5474$3133'. 1/1: $1\MmuPlugin_dBusAccess_cmd_payload_address[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5454$3132'. 1/1: $1\MmuPlugin_dBusAccess_cmd_valid[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5432$3119'. 1/1: $1\IBusCachedPlugin_mmuBus_rsp_refilling[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5424$3108'. 1/1: $1\IBusCachedPlugin_mmuBus_rsp_exception[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5416$3107'. 1/1: $1\IBusCachedPlugin_mmuBus_rsp_allowExecute[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5408$3106'. 1/1: $1\IBusCachedPlugin_mmuBus_rsp_allowWrite[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5400$3103'. 1/1: $1\IBusCachedPlugin_mmuBus_rsp_allowRead[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5392$3101'. 1/1: $1\IBusCachedPlugin_mmuBus_rsp_physicalAddress[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5382$3093'. 1/2: $2\MmuPlugin_ports_1_requireMmuLockup[0:0] 2/2: $1\MmuPlugin_ports_1_requireMmuLockup[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5375$3091'. 1/1: $1\MmuPlugin_ports_1_entryToReplace_valueNext[1:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5363$3088'. 1/2: $2\MmuPlugin_ports_1_entryToReplace_willIncrement[0:0] 2/2: $1\MmuPlugin_ports_1_entryToReplace_willIncrement[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5335$3058'. 1/1: $1\DBusCachedPlugin_mmuBus_rsp_refilling[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5327$3047'. 1/1: $1\DBusCachedPlugin_mmuBus_rsp_exception[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5319$3046'. 1/1: $1\DBusCachedPlugin_mmuBus_rsp_allowExecute[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5311$3045'. 1/1: $1\DBusCachedPlugin_mmuBus_rsp_allowWrite[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5303$3042'. 1/1: $1\DBusCachedPlugin_mmuBus_rsp_allowRead[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5295$3040'. 1/1: $1\DBusCachedPlugin_mmuBus_rsp_physicalAddress[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5283$3029'. 1/3: $3\MmuPlugin_ports_0_requireMmuLockup[0:0] 2/3: $2\MmuPlugin_ports_0_requireMmuLockup[0:0] 3/3: $1\MmuPlugin_ports_0_requireMmuLockup[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5276$3027'. 1/1: $1\MmuPlugin_ports_0_entryToReplace_valueNext[1:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5264$3024'. 1/2: $2\MmuPlugin_ports_0_entryToReplace_willIncrement[0:0] 2/2: $1\MmuPlugin_ports_0_entryToReplace_willIncrement[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5231$2993'. 1/2: $2\DBusCachedPlugin_forceDatapath[0:0] 2/2: $1\DBusCachedPlugin_forceDatapath[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5220$2991'. 1/3: $3\MmuPlugin_dBusAccess_cmd_ready[0:0] 2/3: $2\MmuPlugin_dBusAccess_cmd_ready[0:0] 3/3: $1\MmuPlugin_dBusAccess_cmd_ready[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5206$2990'. 1/1: $1\writeBack_DBusCachedPlugin_rspFormated[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5186$2989'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5157$2986'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5139$2983'. 1/2: $1\writeBack_DBusCachedPlugin_rspShifted[15:0] [15:8] 2/2: $1\writeBack_DBusCachedPlugin_rspShifted[15:0] [7:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5124$2981'. 1/4: $4\DBusCachedPlugin_exceptionBus_payload_code[3:0] 2/4: $3\DBusCachedPlugin_exceptionBus_payload_code[3:0] 3/4: $2\DBusCachedPlugin_exceptionBus_payload_code[3:0] 4/4: $1\DBusCachedPlugin_exceptionBus_payload_code[3:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5105$2980'. 1/5: $5\DBusCachedPlugin_exceptionBus_valid[0:0] 2/5: $4\DBusCachedPlugin_exceptionBus_valid[0:0] 3/5: $3\DBusCachedPlugin_exceptionBus_valid[0:0] 4/5: $2\DBusCachedPlugin_exceptionBus_valid[0:0] 5/5: $1\DBusCachedPlugin_exceptionBus_valid[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5095$2979'. 1/2: $2\DBusCachedPlugin_redoBranch_valid[0:0] 2/2: $1\DBusCachedPlugin_redoBranch_valid[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5086$2976'. 1/1: $1\_zz_260_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5078$2973'. 1/1: $1\_zz_259_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5071$2972'. 1/1: $1\DBusCachedPlugin_mmuBus_cmd_bypassTranslation[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5061$2970'. 1/1: $1\_zz_257_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5049$2969'. 1/2: $2\_zz_254_[0:0] 2/2: $1\_zz_254_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5037$2968'. 1/3: $3\_zz_253_[0:0] 2/3: $2\_zz_253_[0:0] 3/3: $1\_zz_253_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5027$2966'. 1/2: $2\_zz_252_[1:0] 2/2: $1\_zz_252_[1:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5018$2965'. 1/2: $2\_zz_251_[31:0] 2/2: $1\_zz_251_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5004$2964'. 1/1: $1\_zz_147_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4995$2963'. 1/2: $2\_zz_250_[0:0] 2/2: $1\_zz_250_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4986$2962'. 1/2: $2\_zz_249_[31:0] 2/2: $1\_zz_249_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4975$2960'. 1/3: $3\_zz_248_[0:0] 2/3: $2\_zz_248_[0:0] 3/3: $1\_zz_248_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4928$2947'. 1/2: $2\IBusCachedPlugin_decodeExceptionPort_payload_code[3:0] 2/2: $1\IBusCachedPlugin_decodeExceptionPort_payload_code[3:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4918$2946'. 1/2: $2\IBusCachedPlugin_decodeExceptionPort_valid[0:0] 2/2: $1\IBusCachedPlugin_decodeExceptionPort_valid[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4908$2943'. 1/2: $2\_zz_247_[0:0] 2/2: $1\_zz_247_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4895$2942'. 1/3: $3\IBusCachedPlugin_rsp_redoFetch[0:0] 2/3: $2\IBusCachedPlugin_rsp_redoFetch[0:0] 3/3: $1\IBusCachedPlugin_rsp_redoFetch[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4879$2931'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4855$2927'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4840$2926'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4827$2924'. 1/1: $1\_zz_126_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4805$2923'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4790$2922'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4782$2917'. 1/1: $1\IBusCachedPlugin_decodePrediction_cmd_hadBranch[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4760$2916'. Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4743$2910'. 1/1: $1\IBusCachedPlugin_iBusRsp_readyForError[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4723$2899'. 1/1: $1\IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4712$2895'. 1/1: $1\IBusCachedPlugin_iBusRsp_stages_1_halt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4701$2891'. 1/1: $1\IBusCachedPlugin_iBusRsp_stages_0_halt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4686$2887'. 1/1: $1\IBusCachedPlugin_fetchPc_pc[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4679$2886'. 1/1: $1\IBusCachedPlugin_fetchPc_pcRegPropagate[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4672$2885'. 1/1: $1\IBusCachedPlugin_fetchPc_corrected[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4642$2879'. 1/3: $3\CsrPlugin_jumpInterface_payload[31:0] 2/3: $2\CsrPlugin_jumpInterface_payload[31:0] 3/3: $1\CsrPlugin_jumpInterface_payload[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4632$2878'. 1/2: $2\CsrPlugin_jumpInterface_valid[0:0] 2/2: $1\CsrPlugin_jumpInterface_valid[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4625$2876'. 1/1: $1\IBusCachedPlugin_incomingInstruction[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4615$2873'. 1/2: $2\IBusCachedPlugin_fetcherflushIt[0:0] 2/2: $1\IBusCachedPlugin_fetcherflushIt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4602$2871'. 1/3: $3\IBusCachedPlugin_fetcherHalt[0:0] 2/3: $2\IBusCachedPlugin_fetcherHalt[0:0] 3/3: $1\IBusCachedPlugin_fetcherHalt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4582$2870'. 1/4: $4\writeBack_arbitration_flushNext[0:0] 2/4: $3\writeBack_arbitration_flushNext[0:0] 3/4: $2\writeBack_arbitration_flushNext[0:0] 4/4: $1\writeBack_arbitration_flushNext[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4575$2869'. 1/1: $1\writeBack_arbitration_flushIt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4565$2868'. 1/2: $2\writeBack_arbitration_removeIt[0:0] 2/2: $1\writeBack_arbitration_removeIt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4557$2867'. 1/1: $1\writeBack_arbitration_haltItself[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4547$2866'. 1/2: $2\memory_arbitration_flushNext[0:0] 2/2: $1\memory_arbitration_flushNext[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4536$2865'. 1/2: $2\memory_arbitration_removeIt[0:0] 2/2: $1\memory_arbitration_removeIt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4526$2864'. 1/2: $2\memory_arbitration_haltItself[0:0] 2/2: $1\memory_arbitration_haltItself[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4519$2863'. 1/1: $1\execute_arbitration_flushNext[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4508$2862'. 1/2: $2\execute_arbitration_removeIt[0:0] 2/2: $1\execute_arbitration_removeIt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4487$2856'. 1/6: $6\execute_arbitration_haltItself[0:0] 2/6: $5\execute_arbitration_haltItself[0:0] 3/6: $4\execute_arbitration_haltItself[0:0] 4/6: $3\execute_arbitration_haltItself[0:0] 5/6: $2\execute_arbitration_haltItself[0:0] 6/6: $1\execute_arbitration_haltItself[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4477$2855'. 1/2: $2\decode_arbitration_flushNext[0:0] 2/2: $1\decode_arbitration_flushNext[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4466$2854'. 1/2: $2\decode_arbitration_removeIt[0:0] 2/2: $1\decode_arbitration_removeIt[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4450$2843'. 1/4: $4\decode_arbitration_haltByOther[0:0] 2/4: $3\decode_arbitration_haltByOther[0:0] 3/4: $2\decode_arbitration_haltByOther[0:0] 4/4: $1\decode_arbitration_haltByOther[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4443$2840'. 1/1: $1\decode_arbitration_haltItself[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4430$2839'. 1/2: $2\_zz_101_[31:0] 2/2: $1\_zz_101_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4423$2838'. 1/1: $1\_zz_100_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4414$2837'. 1/1: $1\_zz_97_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4407$2836'. 1/1: $1\_zz_96_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4400$2835'. 1/1: $1\_zz_95_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4393$2834'. 1/1: $1\IBusCachedPlugin_rsp_issueDetected[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4360$2831'. 1/3: $3\_zz_93_[31:0] 2/3: $2\_zz_93_[31:0] 3/3: $1\_zz_93_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4348$2829'. 1/1: $1\decode_REGFILE_WRITE_VALID[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4340$2828'. 1/1: $1\_zz_61_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4303$2827'. 1/3: $3\_zz_43_[31:0] 2/3: $2\_zz_43_[31:0] 3/3: $1\_zz_43_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4272$2825'. 1/11: $11\decode_RS1[31:0] 2/11: $10\decode_RS1[31:0] 3/11: $9\decode_RS1[31:0] 4/11: $8\decode_RS1[31:0] 5/11: $7\decode_RS1[31:0] 6/11: $6\decode_RS1[31:0] 7/11: $5\decode_RS1[31:0] 8/11: $4\decode_RS1[31:0] 9/11: $3\decode_RS1[31:0] 10/11: $2\decode_RS1[31:0] 11/11: $1\decode_RS1[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4242$2823'. 1/11: $11\decode_RS2[31:0] 2/11: $10\decode_RS2[31:0] 3/11: $9\decode_RS2[31:0] 4/11: $8\decode_RS2[31:0] 5/11: $7\decode_RS2[31:0] 6/11: $6\decode_RS2[31:0] 7/11: $5\decode_RS2[31:0] 8/11: $4\decode_RS2[31:0] 9/11: $3\decode_RS2[31:0] 10/11: $2\decode_RS2[31:0] 11/11: $1\decode_RS2[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4226$2822'. 1/2: $2\_zz_42_[31:0] 2/2: $1\_zz_42_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. 1/11: $1\_zz_289_[0:0] 2/11: $1\_zz_288_[0:0] 3/11: $1\_zz_287_[0:0] 4/11: $1\_zz_286_[0:0] 5/11: $1\_zz_285_[9:0] 6/11: $1\_zz_284_[9:0] 7/11: $1\_zz_283_[9:0] 8/11: $1\_zz_282_[9:0] 9/11: $1\_zz_281_[0:0] 10/11: $1\_zz_280_[0:0] 11/11: $1\_zz_279_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. 1/11: $1\_zz_278_[0:0] 2/11: $1\_zz_277_[0:0] 3/11: $1\_zz_276_[0:0] 4/11: $1\_zz_275_[0:0] 5/11: $1\_zz_274_[9:0] 6/11: $1\_zz_273_[9:0] 7/11: $1\_zz_272_[9:0] 8/11: $1\_zz_271_[9:0] 9/11: $1\_zz_270_[0:0] 10/11: $1\_zz_269_[0:0] 11/11: $1\_zz_268_[0:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3313$2819'. 1/1: $1\_zz_267_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3204$2817'. 1/1: $0\_zz_266_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3198$2815'. 1/1: $0\_zz_265_[31:0] Creating decoders for process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3192$2811'. 1/3: $0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 2/3: $0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_DATA[31:0]$2813 3/3: $0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_ADDR[4:0]$2812 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1534$2487'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1530$2486'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1526$2485'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1522$2484'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1518$2483'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1514$2482'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1510$2481'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1506$2480'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1502$2479'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1498$2478'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1494$2477'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1490$2476'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1485$2475'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1484$2474'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1483$2473'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1482$2472'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1481$2471'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1480$2470'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1479$2469'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1478$2468'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1477$2467'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1476$2466'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1475$2465'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1474$2464'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1473$2463'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1472$2462'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1471$2461'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1470$2460'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1469$2459'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1468$2458'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1467$2457'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1466$2456'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1465$2455'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1464$2454'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1463$2453'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1462$2452'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1461$2451'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1460$2450'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1459$2449'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1458$2448'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1457$2447'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1456$2446'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1455$2445'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1454$2444'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1453$2443'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1452$2442'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1451$2441'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1450$2440'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1449$2439'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1448$2438'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1447$2437'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1446$2436'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1445$2435'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1444$2434'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1443$2433'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1442$2432'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1441$2431'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1440$2430'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1439$2429'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1438$2428'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1437$2427'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1436$2426'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1435$2425'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1434$2424'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1433$2423'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1432$2422'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1431$2421'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1430$2420'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1408$2419'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1383$2418'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1318$2417'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1277$2416'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1236$2415'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1227$2414'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1223$2413'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1219$2412'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1178$2411'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1109$2410'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1105$2409'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1102$2408'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1101$2407'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1100$2406'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1099$2405'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1093$2404'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1089$2403'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1086$2402'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1082$2401'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1078$2400'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1074$2399'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1073$2398'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1072$2397'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1071$2396'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1070$2395'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1069$2394'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1068$2393'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1067$2392'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1066$2391'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1065$2390'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1064$2389'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1063$2388'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1062$2387'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1061$2386'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1060$2385'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1059$2384'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1058$2383'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1057$2382'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1056$2381'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1055$2380'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1054$2379'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1053$2378'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1040$2377'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1039$2376'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1038$2375'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1037$2374'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1036$2373'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1035$2372'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1034$2371'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1033$2370'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1032$2369'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1031$2368'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1030$2367'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1029$2366'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1028$2365'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1027$2364'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1026$2363'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1025$2362'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1024$2361'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1021$2360'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1020$2359'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1019$2358'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1018$2357'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1017$2356'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1016$2355'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1015$2354'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1014$2353'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1013$2352'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1012$2351'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1007$2350'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1006$2349'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1001$2348'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1000$2347'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:998$2346'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:994$2345'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:992$2344'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:991$2343'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:988$2342'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:985$2341'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:984$2340'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:983$2339'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:982$2338'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:978$2337'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:977$2336'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:971$2335'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:969$2334'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:968$2333'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:967$2332'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:966$2331'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:965$2330'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:957$2329'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:940$2328'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:938$2327'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:933$2326'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:916$2325'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:908$2324'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:907$2323'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:901$2322'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:898$2321'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:897$2320'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:896$2319'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:891$2318'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:888$2317'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:887$2316'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:886$2315'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:885$2314'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:882$2313'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:880$2312'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:879$2311'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:874$2310'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:870$2309'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:866$2308'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:862$2307'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:861$2306'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:852$2305'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:851$2304'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:849$2303'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:847$2302'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:845$2301'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:844$2300'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:842$2299'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:839$2298'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:838$2297'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:836$2296'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:835$2295'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:833$2294'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:831$2293'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:830$2292'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:828$2291'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:827$2290'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:826$2289'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:825$2288'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:824$2287'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:822$2286'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:820$2285'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:816$2284'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:815$2283'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:814$2282'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:811$2281'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:809$2280'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:807$2279'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:806$2278'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:804$2277'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:802$2276'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:798$2275'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:797$2274'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:796$2273'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:793$2272'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:791$2271'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:790$2270'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:789$2269'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:788$2268'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:785$2267'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:784$2266'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:782$2265'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:781$2264'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:779$2263'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:778$2262'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:776$2261'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:775$2260'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:774$2259'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:772$2258'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:771$2257'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:770$2256'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:769$2255'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:768$2254'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:767$2253'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:765$2252'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:744$2251'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:743$2250'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:742$2249'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:741$2248'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:740$2247'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:725$2246'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:724$2245'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:721$2244'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:720$2243'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:719$2242'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:718$2241'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:717$2240'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:716$2239'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:715$2238'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:713$2237'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:712$2236'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:711$2235'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:710$2234'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:708$2233'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:707$2232'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:701$2231'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:700$2230'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:698$2229'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:697$2228'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:695$2227'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:694$2226'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:692$2225'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:691$2224'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:690$2223'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:688$2222'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:687$2221'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:686$2220'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:685$2219'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:684$2218'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:683$2217'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:681$2216'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:660$2215'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:659$2214'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:658$2213'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:657$2212'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:656$2211'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:641$2210'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:640$2209'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:637$2208'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:636$2207'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:635$2206'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:634$2205'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:633$2204'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:632$2203'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:631$2202'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:629$2201'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:628$2200'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:627$2199'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:626$2198'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:624$2197'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:623$2196'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:617$2195'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:616$2194'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:614$2193'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:613$2192'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:611$2191'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:610$2190'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:608$2189'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:607$2188'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:606$2187'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:604$2186'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:603$2185'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:602$2184'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:601$2183'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:600$2182'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:599$2181'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:597$2180'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:576$2179'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:575$2178'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:574$2177'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:573$2176'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:572$2175'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:557$2174'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:556$2173'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:553$2172'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:552$2171'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:551$2170'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:550$2169'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:549$2168'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:548$2167'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:547$2166'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:545$2165'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:544$2164'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:543$2163'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:542$2162'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:540$2161'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:539$2160'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:533$2159'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:532$2158'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:530$2157'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:529$2156'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:527$2155'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:526$2154'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:524$2153'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:523$2152'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:522$2151'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:520$2150'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:519$2149'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:518$2148'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:517$2147'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:516$2146'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:515$2145'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:513$2144'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:492$2143'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:491$2142'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:490$2141'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:489$2140'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:488$2139'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:473$2138'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:472$2137'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:469$2136'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:468$2135'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:467$2134'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:466$2133'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:465$2132'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:464$2131'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:463$2130'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:461$2129'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:460$2128'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:459$2127'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:458$2126'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:456$2125'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:455$2124'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:449$2123'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:448$2122'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:447$2121'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:444$2120'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:443$2119'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:442$2118'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:440$2117'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:434$2116'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:433$2115'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:432$2114'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:431$2113'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:430$2112'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:429$2111'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:428$2110'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:427$2109'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:426$2108'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:425$2107'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:422$2106'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:420$2105'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:418$2104'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:414$2103'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:413$2102'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:412$2101'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:411$2100'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:410$2099'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:409$2098'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:407$2097'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:406$2096'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:375$2095'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:374$2094'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:373$2093'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:372$2092'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:371$2091'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:370$2090'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:369$2089'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:368$2088'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:364$2087'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:363$2086'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:362$2085'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:361$2084'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:354$2083'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:353$2082'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:352$2081'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:351$2080'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:350$2079'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:349$2078'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:348$2077'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:347$2076'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:346$2075'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:345$2074'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:344$2073'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:343$2072'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:342$2071'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:341$2070'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:340$2069'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:339$2068'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:324$2067'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:323$2066'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:318$2065'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:314$2064'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:313$2063'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:312$2062'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:311$2061'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:308$2060'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:307$2059'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:282$2058'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:281$2057'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:280$2056'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:271$2055'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:270$2054'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:268$2053'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:263$2052'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:262$2051'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:261$2050'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:260$2049'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:259$2048'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:258$2047'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:257$2046'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:256$2045'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:255$2044'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:254$2043'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:239$2042'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:238$2041'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:237$2040'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:236$2039'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:235$2038'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:228$2037'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:202$2036'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:201$2035'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:200$2034'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:199$2033'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:198$2032'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:191$2031'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:183$2030'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:182$2029'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:163$2028'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:162$2027'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:161$2026'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:157$2025'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:153$2024'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:152$2023'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:150$2022'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:148$2021'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:147$2020'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:145$2019'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:132$2018'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:131$2017'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:130$2016'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:129$2015'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:127$2014'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:126$2013'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:125$2012'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:124$2011'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:123$2010'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:121$2009'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:120$2008'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:119$2007'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:118$2006'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:117$2005'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:116$2004'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:112$2003'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:110$2002'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:109$2001'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:107$2000'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:104$1999'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:100$1998'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:91$1997'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:87$1996'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:80$1995'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:79$1994'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:78$1993'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:76$1992'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:75$1991'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:72$1990'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:71$1989'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:45$1988'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:43$1987'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:37$1986'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:36$1985'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:35$1984'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:34$1983'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6107$1927'. 1/3: $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 2/3: $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_DATA[7:0]$1929 3/3: $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_ADDR[8:0]$1928 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6097$1922'. 1/3: $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 2/3: $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_DATA[7:0]$1924 3/3: $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_ADDR[8:0]$1923 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6087$1917'. 1/3: $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 2/3: $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_DATA[7:0]$1919 3/3: $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_ADDR[8:0]$1918 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6077$1912'. 1/3: $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 2/3: $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_DATA[7:0]$1914 3/3: $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_ADDR[8:0]$1913 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6067$1907'. 1/3: $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 2/3: $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_DATA[7:0]$1909 3/3: $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_ADDR[8:0]$1908 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6057$1902'. 1/3: $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 2/3: $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_DATA[7:0]$1904 3/3: $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_ADDR[8:0]$1903 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6047$1897'. 1/3: $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 2/3: $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_DATA[7:0]$1899 3/3: $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_ADDR[8:0]$1898 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6037$1892'. 1/3: $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 2/3: $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_DATA[7:0]$1894 3/3: $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_ADDR[8:0]$1893 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6027$1887'. 1/3: $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 2/3: $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_DATA[7:0]$1889 3/3: $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_ADDR[8:0]$1888 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6017$1882'. 1/3: $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 2/3: $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_DATA[7:0]$1884 3/3: $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_ADDR[8:0]$1883 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6007$1877'. 1/3: $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 2/3: $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_DATA[7:0]$1879 3/3: $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_ADDR[8:0]$1878 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5997$1872'. 1/3: $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 2/3: $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_DATA[7:0]$1874 3/3: $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_ADDR[8:0]$1873 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5987$1867'. 1/3: $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 2/3: $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_DATA[7:0]$1869 3/3: $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_ADDR[8:0]$1868 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5977$1862'. 1/3: $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 2/3: $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_DATA[7:0]$1864 3/3: $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_ADDR[8:0]$1863 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5967$1857'. 1/3: $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 2/3: $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_DATA[7:0]$1859 3/3: $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_ADDR[8:0]$1858 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5957$1852'. 1/3: $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 2/3: $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_DATA[7:0]$1854 3/3: $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_ADDR[8:0]$1853 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5892$1846'. 1/3: $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 2/3: $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_DATA[23:0]$1848 3/3: $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_ADDR[8:0]$1847 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1550$2491'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5878$1839'. 1/3: $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 2/3: $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_DATA[24:0]$1841 3/3: $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_ADDR[2:0]$1840 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1546$2490'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5864$1832'. 1/3: $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 2/3: $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_DATA[24:0]$1834 3/3: $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_ADDR[2:0]$1833 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1542$2489'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5850$1825'. 1/3: $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 2/3: $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_DATA[24:0]$1827 3/3: $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_ADDR[2:0]$1826 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1538$2488'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5836$1818'. 1/3: $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 2/3: $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_DATA[24:0]$1820 3/3: $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_ADDR[2:0]$1819 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5826$1816'. 1/1: $0\memdat_4[9:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5820$1811'. 1/3: $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 2/3: $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_DATA[9:0]$1813 3/3: $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_ADDR[3:0]$1812 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5809$1809'. 1/1: $0\memdat_2[9:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5803$1804'. 1/3: $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 2/3: $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_DATA[9:0]$1806 3/3: $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_ADDR[3:0]$1805 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5790$1802'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. 1/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 2/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_DATA[31:0]$1790 3/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_ADDR[10:0]$1789 4/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 5/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_DATA[31:0]$1793 6/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_ADDR[10:0]$1792 7/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 8/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_DATA[31:0]$1796 9/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_ADDR[10:0]$1795 10/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 11/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_DATA[31:0]$1799 12/12: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_ADDR[10:0]$1798 Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5758$1786'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. 1/257: $0\soclinux_storage[15:0] [15:8] 2/257: $0\main_soclinux_rx_clkphase[31:0] 3/257: $0\main_soclinux_tx_clkphase[31:0] 4/257: $0\main_soclinux_cpu_time_cmp_storage[63:0] [63:56] 5/257: $0\main_soclinux_storage[31:0] [15:8] 6/257: $0\main_soclinux_storage[31:0] [23:16] 7/257: $0\main_soclinux_timer_load_storage[31:0] [31:24] 8/257: $0\main_soclinux_timer_reload_storage[31:0] [15:8] 9/257: $0\main_soclinux_timer_reload_storage[31:0] [23:16] 10/257: $0\main_soclinux_rx_clken[0:0] 11/257: $0\main_soclinux_timer_load_storage[31:0] [15:8] 12/257: $0\main_soclinux_timer_load_storage[31:0] [23:16] 13/257: $0\soclinux_control_storage[15:0] [15:8] 14/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:0] [127:112] 15/257: $0\main_sdram_wrdata_storage[15:0] [7:0] 16/257: $0\main_sdram_address_storage[12:0] [7:0] 17/257: $0\main_soclinux_storage[31:0] [7:0] 18/257: $0\main_soclinux_soccontroller_scratch_storage[31:0] [15:8] 19/257: $0\main_soclinux_soccontroller_scratch_storage[31:0] [23:16] 20/257: $0\main_soclinux_soccontroller_scratch_storage[31:0] [31:24] 21/257: $0\main_soclinux_cpu_time_cmp_storage[63:0] [15:8] 22/257: $0\main_soclinux_cpu_time_cmp_storage[63:0] [23:16] 23/257: $0\main_soclinux_cpu_time_cmp_storage[63:0] [31:24] 24/257: $0\main_soclinux_cpu_time_cmp_storage[63:0] [39:32] 25/257: $0\main_soclinux_cpu_time_cmp_storage[63:0] [47:40] 26/257: $0\main_soclinux_cpu_time_cmp_storage[63:0] [55:48] 27/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:0] [95:80] 28/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:0] [79:64] 29/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:0] [63:48] 30/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:0] [47:32] 31/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:0] [31:16] 32/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:0] [15:0] 33/257: $0\main_soclinux_timer_reload_storage[31:0] [31:24] 34/257: $0\main_soclinux_timer_value[31:0] 35/257: $0\main_soclinux_tx_clken[0:0] 36/257: $0\main_soclinux_storage[31:0] [31:24] 37/257: $0\main_soclinux_re[0:0] 38/257: $0\builder_csr_bankarray_interface7_bank_bus_dat_r[7:0] 39/257: $0\main_soclinux_uart_eventmanager_re[0:0] 40/257: $0\builder_csr_bankarray_interface6_bank_bus_dat_r[7:0] 41/257: $0\main_soclinux_timer_eventmanager_re[0:0] 42/257: $0\main_soclinux_timer_update_value_re[0:0] 43/257: $0\main_soclinux_timer_en_re[0:0] 44/257: $0\main_soclinux_timer_reload_re[0:0] 45/257: $0\main_soclinux_timer_load_re[0:0] 46/257: $0\builder_csr_bankarray_interface5_bank_bus_dat_r[7:0] 47/257: $0\soclinux_re[0:0] 48/257: $0\soclinux_loopback_re[0:0] 49/257: $0\soclinux_cs_re[0:0] 50/257: $0\soclinux_mosi_re[0:0] 51/257: $0\soclinux_control_re[0:0] 52/257: $0\builder_csr_bankarray_interface4_bank_bus_dat_r[7:0] 53/257: $0\main_sdram_wrdata_re[0:0] 54/257: $0\main_sdram_baddress_re[0:0] 55/257: $0\main_sdram_address_re[0:0] 56/257: $0\main_sdram_command_re[0:0] 57/257: $0\main_sdram_re[0:0] 58/257: $0\builder_csr_bankarray_interface3_bank_bus_dat_r[7:0] 59/257: $0\main_re[0:0] 60/257: $0\builder_csr_bankarray_interface2_bank_bus_dat_r[7:0] 61/257: $0\builder_csr_bankarray_sel_r[0:0] 62/257: $0\main_soclinux_soccontroller_scratch_re[0:0] 63/257: $0\main_soclinux_soccontroller_reset_re[0:0] 64/257: $0\builder_csr_bankarray_interface1_bank_bus_dat_r[7:0] 65/257: $0\main_soclinux_cpu_time_cmp_re[0:0] 66/257: $0\builder_csr_bankarray_interface0_bank_bus_dat_r[7:0] 67/257: $0\builder_slave_sel_r[3:0] 68/257: $0\builder_state[1:0] 69/257: $0\builder_spimaster_state[1:0] 70/257: $0\spisdcard_cs_n[0:0] 71/257: $0\soclinux_clk_divider1[15:0] 72/257: $0\builder_litedramwishbone2native_state[0:0] 73/257: $0\builder_fullmemorywe_state[1:0] 74/257: $0\builder_new_master_rdata_valid3[0:0] 75/257: $0\builder_new_master_rdata_valid2[0:0] 76/257: $0\builder_new_master_rdata_valid1[0:0] 77/257: $0\builder_new_master_rdata_valid0[0:0] 78/257: $0\builder_new_master_wdata_ready[0:0] 79/257: $0\builder_multiplexer_state[2:0] 80/257: $0\main_sdram_dfi_p0_wrdata_en[0:0] 81/257: $0\main_sdram_dfi_p0_rddata_en[0:0] 82/257: $0\main_sdram_dfi_p0_we_n[0:0] 83/257: $0\main_sdram_dfi_p0_ras_n[0:0] 84/257: $0\main_sdram_dfi_p0_cas_n[0:0] 85/257: $0\main_sdram_dfi_p0_address[12:0] 86/257: $0\main_sdram_dfi_p0_bank[1:0] 87/257: $0\main_sdram_dfi_p0_cs_n[0:0] 88/257: $0\builder_bankmachine3_state[2:0] 89/257: $0\builder_bankmachine2_state[2:0] 90/257: $0\builder_bankmachine1_state[2:0] 91/257: $0\builder_bankmachine0_state[2:0] 92/257: $0\builder_refresher_state[1:0] 93/257: $0\main_sdram_sequencer_done1[0:0] 94/257: $0\main_sdram_cmd_payload_we[0:0] 95/257: $0\main_sdram_cmd_payload_ras[0:0] 96/257: $0\main_sdram_cmd_payload_cas[0:0] 97/257: $0\main_sdram_cmd_payload_ba[1:0] 98/257: $0\main_sdram_cmd_payload_a[12:0] 99/257: $0\main_sdram_postponer_req_o[0:0] 100/257: $0\main_dfi_p0_rddata_valid[0:0] 101/257: $0\main_rddata_en[2:0] 102/257: $0\main_soclinux_timer_zero_old_trigger[0:0] 103/257: $0\main_soclinux_uart_rx_old_trigger[0:0] 104/257: $0\main_soclinux_uart_tx_old_trigger[0:0] 105/257: $0\main_soclinux_rx_r[0:0] 106/257: $0\main_soclinux_source_valid[0:0] 107/257: $0\main_soclinux_sink_ready[0:0] 108/257: $0\main_soclinux_ram_bus_ram_bus_ack[0:0] 109/257: $0\main_soclinux_soclinux_ram_bus_ack[0:0] 110/257: $0\main_soclinux_cpu_time[63:0] 111/257: $0\builder_count[19:0] 112/257: $0\builder_grant[0:0] 113/257: $0\builder_soclinux_dat_w[7:0] 114/257: $0\builder_soclinux_we[0:0] 115/257: $0\builder_soclinux_adr[13:0] 116/257: $0\soclinux_control_storage[15:0] [7:0] 117/257: $0\soclinux_miso_data[7:0] 118/257: $0\soclinux_mosi_sel[2:0] 119/257: $0\soclinux_mosi_data[7:0] 120/257: $0\soclinux_count[2:0] 121/257: $0\soclinux_loopback_storage[0:0] 122/257: $0\soclinux_cs_storage[0:0] 123/257: $0\soclinux_mosi_storage[7:0] 124/257: $0\main_sdram_wrdata_storage[15:0] [15:8] 125/257: $0\soclinux_miso[7:0] 126/257: $0\main_count[21:0] 127/257: $0\main_mode[0:0] 128/257: $0\main_chaser[7:0] 129/257: $0\main_storage[7:0] 130/257: $0\main_wishbone_bridge_wdata_consumed[0:0] 131/257: $0\main_wishbone_bridge_cmd_consumed[0:0] 132/257: $0\main_wishbone_bridge_rdata_converter_converter_strobe_all[0:0] 133/257: $0\main_wishbone_bridge_rdata_converter_converter_demux[2:0] 134/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_valid_token_count[3:0] 135/257: $0\main_sdram_timer_count1[8:0] 136/257: $0\main_wishbone_bridge_rdata_converter_converter_source_last[0:0] 137/257: $0\main_wishbone_bridge_rdata_converter_converter_source_first[0:0] 138/257: $0\main_wishbone_bridge_wdata_converter_converter_mux[2:0] 139/257: $0\main_wishbone_bridge_count[2:0] 140/257: $0\main_sdram_time1[3:0] 141/257: $0\main_sdram_time0[4:0] 142/257: $0\main_sdram_twtrcon_count[2:0] 143/257: $0\main_sdram_twtrcon_ready[0:0] 144/257: $0\main_sdram_tccdcon_count[0:0] 145/257: $0\main_sdram_tccdcon_ready[0:0] 146/257: $0\main_sdram_trrdcon_count[0:0] 147/257: $0\main_sdram_trrdcon_ready[0:0] 148/257: $0\main_sdram_choose_req_grant[1:0] 149/257: $0\main_sdram_choose_cmd_grant[1:0] 150/257: $0\main_sdram_bankmachine3_trascon_count[1:0] 151/257: $0\main_sdram_bankmachine3_trascon_ready[0:0] 152/257: $0\main_sdram_bankmachine3_trccon_count[1:0] 153/257: $0\main_sdram_bankmachine3_trccon_ready[0:0] 154/257: $0\main_sdram_bankmachine3_twtpcon_count[1:0] 155/257: $0\main_sdram_bankmachine3_twtpcon_ready[0:0] 156/257: $0\main_sdram_bankmachine3_row_opened[0:0] 157/257: $0\main_sdram_bankmachine3_row[12:0] 158/257: $0\main_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:0] 159/257: $0\main_sdram_bankmachine3_cmd_buffer_source_payload_we[0:0] 160/257: $0\main_sdram_bankmachine3_cmd_buffer_source_last[0:0] 161/257: $0\main_sdram_bankmachine3_cmd_buffer_source_first[0:0] 162/257: $0\main_sdram_bankmachine3_cmd_buffer_source_valid[0:0] 163/257: $0\main_sdram_bankmachine3_cmd_buffer_lookahead_consume[2:0] 164/257: $0\main_sdram_bankmachine3_cmd_buffer_lookahead_produce[2:0] 165/257: $0\main_sdram_bankmachine3_cmd_buffer_lookahead_level[3:0] 166/257: $0\main_sdram_bankmachine2_trascon_count[1:0] 167/257: $0\main_sdram_bankmachine2_trascon_ready[0:0] 168/257: $0\main_sdram_bankmachine2_trccon_count[1:0] 169/257: $0\main_sdram_bankmachine2_trccon_ready[0:0] 170/257: $0\main_sdram_bankmachine2_twtpcon_count[1:0] 171/257: $0\main_sdram_bankmachine2_twtpcon_ready[0:0] 172/257: $0\main_sdram_bankmachine2_row_opened[0:0] 173/257: $0\main_sdram_bankmachine2_row[12:0] 174/257: $0\main_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:0] 175/257: $0\main_sdram_bankmachine2_cmd_buffer_source_payload_we[0:0] 176/257: $0\main_sdram_bankmachine2_cmd_buffer_source_last[0:0] 177/257: $0\main_sdram_bankmachine2_cmd_buffer_source_first[0:0] 178/257: $0\main_sdram_bankmachine2_cmd_buffer_source_valid[0:0] 179/257: $0\main_sdram_bankmachine2_cmd_buffer_lookahead_consume[2:0] 180/257: $0\main_sdram_bankmachine2_cmd_buffer_lookahead_produce[2:0] 181/257: $0\main_sdram_bankmachine2_cmd_buffer_lookahead_level[3:0] 182/257: $0\main_sdram_bankmachine1_trascon_count[1:0] 183/257: $0\main_sdram_bankmachine1_trascon_ready[0:0] 184/257: $0\main_sdram_bankmachine1_trccon_count[1:0] 185/257: $0\main_sdram_bankmachine1_trccon_ready[0:0] 186/257: $0\main_sdram_bankmachine1_twtpcon_count[1:0] 187/257: $0\main_sdram_bankmachine1_twtpcon_ready[0:0] 188/257: $0\main_sdram_bankmachine1_row_opened[0:0] 189/257: $0\main_sdram_bankmachine1_row[12:0] 190/257: $0\main_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:0] 191/257: $0\main_sdram_bankmachine1_cmd_buffer_source_payload_we[0:0] 192/257: $0\main_sdram_bankmachine1_cmd_buffer_source_last[0:0] 193/257: $0\main_sdram_bankmachine1_cmd_buffer_source_first[0:0] 194/257: $0\main_sdram_bankmachine1_cmd_buffer_source_valid[0:0] 195/257: $0\main_sdram_bankmachine1_cmd_buffer_lookahead_consume[2:0] 196/257: $0\main_sdram_bankmachine1_cmd_buffer_lookahead_produce[2:0] 197/257: $0\main_sdram_bankmachine1_cmd_buffer_lookahead_level[3:0] 198/257: $0\main_sdram_bankmachine0_trascon_count[1:0] 199/257: $0\main_sdram_bankmachine0_trascon_ready[0:0] 200/257: $0\main_sdram_bankmachine0_trccon_count[1:0] 201/257: $0\main_sdram_bankmachine0_trccon_ready[0:0] 202/257: $0\main_sdram_bankmachine0_twtpcon_count[1:0] 203/257: $0\main_sdram_bankmachine0_twtpcon_ready[0:0] 204/257: $0\main_sdram_bankmachine0_row_opened[0:0] 205/257: $0\main_sdram_bankmachine0_row[12:0] 206/257: $0\main_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:0] 207/257: $0\main_sdram_bankmachine0_cmd_buffer_source_payload_we[0:0] 208/257: $0\main_sdram_bankmachine0_cmd_buffer_source_last[0:0] 209/257: $0\main_sdram_bankmachine0_cmd_buffer_source_first[0:0] 210/257: $0\main_sdram_bankmachine0_cmd_buffer_source_valid[0:0] 211/257: $0\main_sdram_bankmachine0_cmd_buffer_lookahead_consume[2:0] 212/257: $0\main_sdram_bankmachine0_cmd_buffer_lookahead_produce[2:0] 213/257: $0\main_sdram_bankmachine0_cmd_buffer_lookahead_level[3:0] 214/257: $0\main_sdram_sequencer_count[0:0] 215/257: $0\main_sdram_sequencer_counter[2:0] 216/257: $0\main_sdram_postponer_count[0:0] 217/257: $0\main_sdram_rddata_status[15:0] 218/257: $0\main_sdram_address_storage[12:0] [12:8] 219/257: $0\main_sdram_baddress_storage[1:0] 220/257: $0\main_soclinux_soccontroller_scratch_storage[31:0] [7:0] 221/257: $0\main_sdram_command_storage[5:0] 222/257: $0\main_sdram_storage[3:0] 223/257: $0\main_soclinux_timer_eventmanager_storage[0:0] 224/257: $0\main_soclinux_timer_zero_pending[0:0] 225/257: $0\main_soclinux_timer_value_status[31:0] 226/257: $0\main_soclinux_timer_update_value_storage[0:0] 227/257: $0\main_soclinux_timer_en_storage[0:0] 228/257: $0\main_soclinux_timer_load_storage[31:0] [7:0] 229/257: $0\soclinux_storage[15:0] [7:0] 230/257: $0\main_soclinux_uart_rx_fifo_consume[3:0] 231/257: $0\main_soclinux_uart_rx_fifo_produce[3:0] 232/257: $0\main_soclinux_uart_rx_fifo_level0[4:0] 233/257: $0\main_soclinux_uart_rx_fifo_readable[0:0] 234/257: $0\main_soclinux_uart_tx_fifo_consume[3:0] 235/257: $0\main_soclinux_uart_tx_fifo_produce[3:0] 236/257: $0\main_soclinux_uart_tx_fifo_level0[4:0] 237/257: $0\main_soclinux_uart_tx_fifo_readable[0:0] 238/257: $0\main_soclinux_uart_eventmanager_storage[1:0] 239/257: $0\main_soclinux_uart_rx_pending[0:0] 240/257: $0\main_soclinux_uart_tx_pending[0:0] 241/257: $0\main_soclinux_rx_busy[0:0] 242/257: $0\main_soclinux_rx_bitcount[3:0] 243/257: $0\main_soclinux_rx_reg[7:0] 244/257: $0\main_soclinux_source_payload_data[7:0] 245/257: $0\main_soclinux_tx_busy[0:0] 246/257: $0\main_soclinux_tx_bitcount[3:0] 247/257: $0\main_soclinux_tx_reg[7:0] 248/257: $0\main_soclinux_timer_reload_storage[31:0] [7:0] 249/257: $0\main_soclinux_cpu_time_cmp[63:0] 250/257: $0\main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:0] [111:96] 251/257: $0\main_soclinux_cpu_time_status[63:0] 252/257: $0\main_soclinux_soccontroller_bus_errors[31:0] 253/257: $0\main_soclinux_cpu_time_cmp_storage[63:0] [7:0] 254/257: $0\main_soclinux_soccontroller_reset_storage[0:0] 255/257: $0\spisdcard_mosi[0:0] 256/257: $0\spisdcard_clk[0:0] 257/257: $0\serial_tx[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4177$1559'. 1/1: $0\builder_sync_f_array_muxed[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4160$1552'. 1/1: $0\builder_sync_rhs_array_muxed6[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4143$1545'. 1/1: $0\builder_sync_rhs_array_muxed5[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4126$1538'. 1/1: $0\builder_sync_rhs_array_muxed4[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4109$1531'. 1/1: $0\builder_sync_rhs_array_muxed3[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4092$1524'. 1/1: $0\builder_sync_rhs_array_muxed2[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523'. 1/1: $0\builder_sync_rhs_array_muxed1[12:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4058$1522'. 1/1: $0\builder_sync_rhs_array_muxed0[1:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4047$1521'. 1/1: $0\builder_comb_rhs_array_muxed31[1:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4036$1520'. 1/1: $0\builder_comb_rhs_array_muxed30[2:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4025$1519'. 1/1: $0\builder_comb_rhs_array_muxed29[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4014$1518'. 1/1: $0\builder_comb_rhs_array_muxed28[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4003$1517'. 1/1: $0\builder_comb_rhs_array_muxed27[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516'. 1/1: $0\builder_comb_rhs_array_muxed26[3:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515'. 1/1: $0\builder_comb_rhs_array_muxed25[31:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514'. 1/1: $0\builder_comb_rhs_array_muxed24[29:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3962$1500'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3954$1499'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3938$1484'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3930$1483'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3914$1468'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3906$1467'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3890$1452'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3882$1451'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3857$1449'. 1/1: $0\builder_comb_t_array_muxed5[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3840$1448'. 1/1: $0\builder_comb_t_array_muxed4[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3823$1447'. 1/1: $0\builder_comb_t_array_muxed3[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3806$1446'. 1/1: $0\builder_comb_rhs_array_muxed11[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3789$1445'. 1/1: $0\builder_comb_rhs_array_muxed10[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3772$1444'. 1/1: $0\builder_comb_rhs_array_muxed9[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3755$1443'. 1/1: $0\builder_comb_rhs_array_muxed8[1:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442'. 1/1: $0\builder_comb_rhs_array_muxed7[12:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3721$1441'. 1/1: $0\builder_comb_rhs_array_muxed6[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3704$1440'. 1/1: $0\builder_comb_t_array_muxed2[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3687$1439'. 1/1: $0\builder_comb_t_array_muxed1[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3670$1438'. 1/1: $0\builder_comb_t_array_muxed0[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3653$1437'. 1/1: $0\builder_comb_rhs_array_muxed5[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3636$1436'. 1/1: $0\builder_comb_rhs_array_muxed4[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3619$1435'. 1/1: $0\builder_comb_rhs_array_muxed3[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3602$1434'. 1/1: $0\builder_comb_rhs_array_muxed2[1:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433'. 1/1: $0\builder_comb_rhs_array_muxed1[12:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3568$1432'. 1/1: $0\builder_comb_rhs_array_muxed0[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3390$1217'. 1/1: $0\soclinux_start1[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073'. 1/1: $0\builder_csr_bankarray_sram_bus_dat_r[7:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876'. 1/3: $0\builder_shared_dat_r[31:0] 2/3: $0\builder_shared_ack[0:0] 3/3: $0\builder_error[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3140$861'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. 1/9: $0\builder_next_state[1:0] 2/9: $0\builder_soclinux_we_next_value_ce2[0:0] 3/9: $0\builder_soclinux_we_next_value2[0:0] 4/9: $0\builder_soclinux_adr_next_value_ce1[0:0] 5/9: $0\builder_soclinux_wishbone_ack[0:0] 6/9: $0\builder_soclinux_adr_next_value1[13:0] 7/9: $0\builder_soclinux_wishbone_dat_r[31:0] 8/9: $0\builder_soclinux_dat_w_next_value_ce0[0:0] 9/9: $0\builder_soclinux_dat_w_next_value0[7:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. 1/9: $0\builder_spimaster_next_state[1:0] 2/9: $0\soclinux_miso_latch[0:0] 3/9: $0\soclinux_mosi_latch[0:0] 4/9: $0\soclinux_done0[0:0] 5/9: $0\soclinux_cs_enable[0:0] 6/9: $0\soclinux_clk_enable[0:0] 7/9: $0\soclinux_count_spimaster_next_value_ce[0:0] 8/9: $0\soclinux_count_spimaster_next_value[2:0] 9/9: $0\soclinux_irq[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. 1/1: { $0\user_led7[0:0] $0\user_led6[0:0] $0\user_led5[0:0] $0\user_led4[0:0] $0\user_led3[0:0] $0\user_led2[0:0] $0\user_led1[0:0] $0\user_led0[0:0] } Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832'. 1/1: $0\main_wishbone_bridge_wdata_converter_converter_source_payload_data[17:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. 1/7: $0\builder_litedramwishbone2native_next_state[0:0] 2/7: $0\main_wishbone_bridge_count_litedramwishbone2native_next_value_ce[0:0] 3/7: $0\main_port_cmd_valid[0:0] 4/7: $0\main_wishbone_bridge_count_litedramwishbone2native_next_value[2:0] 5/7: $0\main_port_cmd_payload_addr[23:0] 6/7: $0\main_port_cmd_payload_we[0:0] 7/7: $0\main_wishbone_bridge_cmd_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. 1/10: $0\builder_fullmemorywe_next_state[1:0] 2/10: $0\main_tag_di_dirty[0:0] 3/10: $0\main_wb_sdram_ack[0:0] 4/10: $0\main_interface_we[0:0] 5/10: $0\main_tag_port_we[0:0] 6/10: $0\main_interface_stb[0:0] 7/10: $0\main_interface_cyc[0:0] 8/10: $0\main_write_from_slave[0:0] 9/10: $0\main_word_inc[0:0] 10/10: $0\main_word_clr[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794'. 1/1: $0\main_wb_sdram_dat_r[31:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782'. 1/2: $0\main_data_port_dat_w[127:0] 2/2: $0\main_data_port_we[15:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781'. 1/2: $0\main_sdram_interface_wdata_we[1:0] 2/2: $0\main_sdram_interface_wdata[15:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. 1/8: $0\builder_multiplexer_next_state[2:0] 2/8: $0\main_sdram_cmd_ready[0:0] 3/8: $0\main_sdram_choose_req_want_writes[0:0] 4/8: $0\main_sdram_choose_req_want_reads[0:0] 5/8: $0\main_sdram_en0[0:0] 6/8: $0\main_sdram_en1[0:0] 7/8: $0\main_sdram_steerer_sel[1:0] 8/8: $0\main_sdram_choose_req_cmd_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2603$625'. 1/1: $0\main_sdram_bankmachine3_cmd_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2594$618'. 1/1: $0\main_sdram_bankmachine2_cmd_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2585$611'. 1/1: $0\main_sdram_bankmachine1_cmd_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2576$604'. 1/1: $0\main_sdram_bankmachine0_cmd_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2570$603'. 1/1: $0\main_sdram_choose_req_cmd_payload_we[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2564$602'. 1/1: $0\main_sdram_choose_req_cmd_payload_ras[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2558$601'. 1/1: $0\main_sdram_choose_req_cmd_payload_cas[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2544$548'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2537$545'. 1/1: $0\main_sdram_choose_cmd_cmd_payload_we[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2531$544'. 1/1: $0\main_sdram_choose_cmd_cmd_payload_ras[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2525$543'. 1/1: $0\main_sdram_choose_cmd_cmd_payload_cas[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2511$490'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. 1/14: $0\builder_bankmachine3_next_state[2:0] 2/14: $0\main_sdram_bankmachine3_cmd_payload_is_write[0:0] 3/14: $0\main_sdram_bankmachine3_cmd_payload_is_read[0:0] 4/14: $0\main_sdram_bankmachine3_cmd_payload_is_cmd[0:0] 5/14: $0\main_sdram_bankmachine3_cmd_payload_we[0:0] 6/14: $0\main_sdram_bankmachine3_cmd_payload_ras[0:0] 7/14: $0\main_sdram_bankmachine3_cmd_payload_cas[0:0] 8/14: $0\main_sdram_bankmachine3_row_col_n_addr_sel[0:0] 9/14: $0\main_sdram_bankmachine3_row_close[0:0] 10/14: $0\main_sdram_bankmachine3_row_open[0:0] 11/14: $0\main_sdram_bankmachine3_cmd_valid[0:0] 12/14: $0\main_sdram_bankmachine3_refresh_gnt[0:0] 13/14: $0\main_sdram_bankmachine3_req_rdata_valid[0:0] 14/14: $0\main_sdram_bankmachine3_req_wdata_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2388$438'. 1/1: $0\main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr[2:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2366$434'. 1/1: $0\main_sdram_bankmachine3_auto_precharge[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425'. 1/1: $0\main_sdram_bankmachine3_cmd_payload_a[12:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. 1/14: $0\builder_bankmachine2_next_state[2:0] 2/14: $0\main_sdram_bankmachine2_cmd_payload_is_write[0:0] 3/14: $0\main_sdram_bankmachine2_cmd_payload_is_read[0:0] 4/14: $0\main_sdram_bankmachine2_cmd_payload_is_cmd[0:0] 5/14: $0\main_sdram_bankmachine2_cmd_payload_we[0:0] 6/14: $0\main_sdram_bankmachine2_cmd_payload_ras[0:0] 7/14: $0\main_sdram_bankmachine2_cmd_payload_cas[0:0] 8/14: $0\main_sdram_bankmachine2_row_close[0:0] 9/14: $0\main_sdram_bankmachine2_row_open[0:0] 10/14: $0\main_sdram_bankmachine2_row_col_n_addr_sel[0:0] 11/14: $0\main_sdram_bankmachine2_cmd_valid[0:0] 12/14: $0\main_sdram_bankmachine2_refresh_gnt[0:0] 13/14: $0\main_sdram_bankmachine2_req_rdata_valid[0:0] 14/14: $0\main_sdram_bankmachine2_req_wdata_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2237$408'. 1/1: $0\main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr[2:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2215$404'. 1/1: $0\main_sdram_bankmachine2_auto_precharge[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395'. 1/1: $0\main_sdram_bankmachine2_cmd_payload_a[12:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. 1/14: $0\builder_bankmachine1_next_state[2:0] 2/14: $0\main_sdram_bankmachine1_cmd_payload_is_write[0:0] 3/14: $0\main_sdram_bankmachine1_cmd_payload_is_read[0:0] 4/14: $0\main_sdram_bankmachine1_cmd_payload_is_cmd[0:0] 5/14: $0\main_sdram_bankmachine1_cmd_payload_we[0:0] 6/14: $0\main_sdram_bankmachine1_cmd_payload_ras[0:0] 7/14: $0\main_sdram_bankmachine1_cmd_payload_cas[0:0] 8/14: $0\main_sdram_bankmachine1_row_close[0:0] 9/14: $0\main_sdram_bankmachine1_row_open[0:0] 10/14: $0\main_sdram_bankmachine1_cmd_valid[0:0] 11/14: $0\main_sdram_bankmachine1_refresh_gnt[0:0] 12/14: $0\main_sdram_bankmachine1_req_rdata_valid[0:0] 13/14: $0\main_sdram_bankmachine1_row_col_n_addr_sel[0:0] 14/14: $0\main_sdram_bankmachine1_req_wdata_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2086$378'. 1/1: $0\main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr[2:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2064$374'. 1/1: $0\main_sdram_bankmachine1_auto_precharge[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365'. 1/1: $0\main_sdram_bankmachine1_cmd_payload_a[12:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. 1/14: $0\builder_bankmachine0_next_state[2:0] 2/14: $0\main_sdram_bankmachine0_cmd_payload_is_write[0:0] 3/14: $0\main_sdram_bankmachine0_cmd_payload_is_read[0:0] 4/14: $0\main_sdram_bankmachine0_cmd_payload_is_cmd[0:0] 5/14: $0\main_sdram_bankmachine0_cmd_payload_we[0:0] 6/14: $0\main_sdram_bankmachine0_row_col_n_addr_sel[0:0] 7/14: $0\main_sdram_bankmachine0_cmd_payload_ras[0:0] 8/14: $0\main_sdram_bankmachine0_cmd_payload_cas[0:0] 9/14: $0\main_sdram_bankmachine0_row_close[0:0] 10/14: $0\main_sdram_bankmachine0_row_open[0:0] 11/14: $0\main_sdram_bankmachine0_cmd_valid[0:0] 12/14: $0\main_sdram_bankmachine0_refresh_gnt[0:0] 13/14: $0\main_sdram_bankmachine0_req_rdata_valid[0:0] 14/14: $0\main_sdram_bankmachine0_req_wdata_ready[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1935$348'. 1/1: $0\main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr[2:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1913$344'. 1/1: $0\main_sdram_bankmachine0_auto_precharge[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335'. 1/1: $0\main_sdram_bankmachine0_cmd_payload_a[12:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331'. 1/4: $0\builder_refresher_next_state[1:0] 2/4: $0\main_sdram_cmd_valid[0:0] 3/4: $0\main_sdram_sequencer_start0[0:0] 4/4: $0\main_sdram_cmd_last[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318'. 1/4: $0\main_sdram_inti_p0_ras_n[0:0] 2/4: $0\main_sdram_inti_p0_cas_n[0:0] 3/4: $0\main_sdram_inti_p0_we_n[0:0] 4/4: $0\main_sdram_inti_p0_cs_n[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. 1/18: $0\main_sdram_master_p0_rddata_en[0:0] 2/18: $0\main_sdram_master_p0_wrdata_mask[1:0] 3/18: $0\main_sdram_master_p0_wrdata_en[0:0] 4/18: $0\main_sdram_master_p0_wrdata[15:0] 5/18: $0\main_sdram_master_p0_act_n[0:0] 6/18: $0\main_sdram_master_p0_reset_n[0:0] 7/18: $0\main_sdram_master_p0_odt[0:0] 8/18: $0\main_sdram_master_p0_cke[0:0] 9/18: $0\main_sdram_master_p0_we_n[0:0] 10/18: $0\main_sdram_master_p0_ras_n[0:0] 11/18: $0\main_sdram_master_p0_cs_n[0:0] 12/18: $0\main_sdram_master_p0_cas_n[0:0] 13/18: $0\main_sdram_master_p0_bank[1:0] 14/18: $0\main_sdram_master_p0_address[12:0] 15/18: $0\main_sdram_inti_p0_rddata_valid[0:0] 16/18: $0\main_sdram_inti_p0_rddata[15:0] 17/18: $0\main_sdram_slave_p0_rddata_valid[0:0] 18/18: $0\main_sdram_slave_p0_rddata[15:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1694$313'. 1/1: $0\main_soclinux_timer_zero_clear[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305'. 1/1: $0\main_soclinux_uart_rx_fifo_wrport_adr[3:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294'. 1/1: $0\main_soclinux_uart_tx_fifo_wrport_adr[3:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1624$286'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1618$284'. 1/1: $0\main_soclinux_uart_rx_clear[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1613$283'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1607$281'. 1/1: $0\main_soclinux_uart_tx_clear[0:0] Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1567$260'. Creating decoders for process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258'. 4.5.7. Executing PROC_DLATCH pass (convert process syncs to latches). No latch inferred for signal `\InstructionCache.\lineLoader_wayToAllocate_willIncrement' from process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:226$3860'. No latch inferred for signal `\InstructionCache.\io_cpu_prefetch_haltIt' from process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:210$3855'. No latch inferred for signal `\InstructionCache.\lineLoader_fire' from process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:201$3853'. No latch inferred for signal `\InstructionCache.\_zz_2_' from process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:193$3852'. No latch inferred for signal `\InstructionCache.\_zz_1_' from process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:186$3851'. No latch inferred for signal `\DataCache.\loader_counter_valueNext' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1052$3797'. No latch inferred for signal `\DataCache.\loader_counter_willIncrement' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1042$3794'. No latch inferred for signal `\DataCache.\io_cpu_writeBack_data' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1030$3792'. No latch inferred for signal `\DataCache.\io_mem_cmd_payload_wr' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1017$3789'. No latch inferred for signal `\DataCache.\io_mem_cmd_payload_last' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1002$3788'. No latch inferred for signal `\DataCache.\io_mem_cmd_payload_length' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:987$3787'. No latch inferred for signal `\DataCache.\io_mem_cmd_payload_address' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:972$3786'. No latch inferred for signal `\DataCache.\io_mem_cmd_valid' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:936$3783'. No latch inferred for signal `\DataCache.\io_cpu_writeBack_accessError' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:924$3762'. No latch inferred for signal `\DataCache.\io_cpu_redo' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:905$3759'. No latch inferred for signal `\DataCache.\stageB_amo_result' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:885$3754'. No latch inferred for signal `\DataCache.\stageB_requestDataBypass' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:873$3747'. No latch inferred for signal `\DataCache.\io_cpu_flush_ready' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:866$3746'. No latch inferred for signal `\DataCache.\io_cpu_writeBack_haltIt' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:832$3742'. No latch inferred for signal `\DataCache.\stageB_loaderValid' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:816$3739'. No latch inferred for signal `\DataCache.\stageB_mmuRspFreeze' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:806$3736'. No latch inferred for signal `\DataCache.\_zz_6_' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:782$3717'. No latch inferred for signal `\DataCache.\dataWriteCmd_payload_mask' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:768$3715'. No latch inferred for signal `\DataCache.\dataWriteCmd_payload_data' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:754$3713'. No latch inferred for signal `\DataCache.\dataWriteCmd_payload_address' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:740$3711'. No latch inferred for signal `\DataCache.\dataWriteCmd_payload_way' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:726$3709'. No latch inferred for signal `\DataCache.\dataWriteCmd_valid' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:699$3706'. No latch inferred for signal `\DataCache.\tagsWriteCmd_payload_data_address' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:692$3705'. No latch inferred for signal `\DataCache.\tagsWriteCmd_payload_data_error' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:685$3703'. No latch inferred for signal `\DataCache.\tagsWriteCmd_payload_data_valid' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:675$3702'. No latch inferred for signal `\DataCache.\tagsWriteCmd_payload_address' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:665$3701'. No latch inferred for signal `\DataCache.\tagsWriteCmd_payload_way' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:655$3700'. No latch inferred for signal `\DataCache.\tagsWriteCmd_valid' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:642$3699'. No latch inferred for signal `\DataCache.\dataReadCmd_payload' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:635$3698'. No latch inferred for signal `\DataCache.\dataReadCmd_valid' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:628$3697'. No latch inferred for signal `\DataCache.\tagsReadCmd_payload' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:621$3696'. No latch inferred for signal `\DataCache.\tagsReadCmd_valid' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:614$3695'. No latch inferred for signal `\DataCache.\_zz_2_' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:599$3689'. No latch inferred for signal `\DataCache.\_zz_1_' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:592$3687'. No latch inferred for signal `\DataCache.\_zz_11_' from process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:565$3664'. No latch inferred for signal `\VexRiscv.\iBusWishbone_STB' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6677$3408'. No latch inferred for signal `\VexRiscv.\iBusWishbone_CYC' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6670$3407'. No latch inferred for signal `\VexRiscv.\_zz_225_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6608$3346'. No latch inferred for signal `\VexRiscv.\memory_DivPlugin_div_counter_valueNext' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6591$3338'. No latch inferred for signal `\VexRiscv.\memory_DivPlugin_div_counter_willClear' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6582$3335'. No latch inferred for signal `\VexRiscv.\memory_DivPlugin_div_counter_willIncrement' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6573$3334'. No latch inferred for signal `\VexRiscv.\execute_MulPlugin_bSigned' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6547$3325'. No latch inferred for signal `\VexRiscv.\execute_MulPlugin_aSigned' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6533$3324'. No latch inferred for signal `\VexRiscv.\execute_CsrPlugin_writeData' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6519$3319'. No latch inferred for signal `\VexRiscv.\execute_CsrPlugin_readToWriteData' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6505$3318'. No latch inferred for signal `\VexRiscv.\execute_CsrPlugin_readData' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6381$3305'. No latch inferred for signal `\VexRiscv.\CsrPlugin_selfException_payload_code' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6360$3304'. No latch inferred for signal `\VexRiscv.\CsrPlugin_selfException_valid' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6350$3303'. No latch inferred for signal `\VexRiscv.\execute_CsrPlugin_illegalInstruction' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6341$3299'. No latch inferred for signal `\VexRiscv.\execute_CsrPlugin_illegalAccess' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6219$3294'. No latch inferred for signal `\VexRiscv.\execute_CsrPlugin_inWfi' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6211$3292'. No latch inferred for signal `\VexRiscv.\CsrPlugin_xtvec_base' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6194$3282'. No latch inferred for signal `\VexRiscv.\CsrPlugin_xtvec_mode' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6180$3281'. No latch inferred for signal `\VexRiscv.\CsrPlugin_trapCause' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6173$3280'. No latch inferred for signal `\VexRiscv.\CsrPlugin_targetPrivilege' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6166$3279'. No latch inferred for signal `\VexRiscv.\CsrPlugin_pipelineLiberator_done' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6155$3272'. No latch inferred for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6140$3270'. No latch inferred for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionValids_memory' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6130$3269'. No latch inferred for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionValids_execute' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6120$3268'. No latch inferred for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionValids_decode' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6110$3267'. No latch inferred for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6039$3240'. No latch inferred for signal `\VexRiscv.\CsrPlugin_privilege' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6023$3232'. No latch inferred for signal `\VexRiscv.\_zz_209_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5993$3226'. No latch inferred for signal `\VexRiscv.\_zz_207_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5978$3225'. No latch inferred for signal `\VexRiscv.\execute_BranchPlugin_branch_src2' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5963$3222'. No latch inferred for signal `\VexRiscv.\_zz_205_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5940$3221'. No latch inferred for signal `\VexRiscv.\execute_BranchPlugin_branch_src1' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5928$3220'. No latch inferred for signal `\VexRiscv.\_zz_203_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5912$3215'. No latch inferred for signal `\VexRiscv.\_zz_202_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5890$3214'. No latch inferred for signal `\VexRiscv.\_zz_200_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5875$3213'. No latch inferred for signal `\VexRiscv.\_zz_198_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5851$3212'. No latch inferred for signal `\VexRiscv.\_zz_196_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5832$3211'. No latch inferred for signal `\VexRiscv.\_zz_195_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5820$3204'. No latch inferred for signal `\VexRiscv.\_zz_183_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5782$3194'. No latch inferred for signal `\VexRiscv.\_zz_182_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5754$3192'. No latch inferred for signal `\VexRiscv.\_zz_181_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5719$3191'. No latch inferred for signal `\VexRiscv.\_zz_180_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5682$3188'. No latch inferred for signal `\VexRiscv.\execute_SrcPlugin_addSub' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5670$3184'. No latch inferred for signal `\VexRiscv.\_zz_179_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5652$3183'. No latch inferred for signal `\VexRiscv.\_zz_178_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5629$3182'. No latch inferred for signal `\VexRiscv.\_zz_176_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5605$3181'. No latch inferred for signal `\VexRiscv.\_zz_174_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5586$3180'. No latch inferred for signal `\VexRiscv.\_zz_173_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5570$3177'. No latch inferred for signal `\VexRiscv.\execute_IntAluPlugin_bitwise' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5556$3173'. No latch inferred for signal `\VexRiscv.\lastStageRegFileWrite_valid' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5547$3171'. No latch inferred for signal `\VexRiscv.\MmuPlugin_dBusAccess_cmd_payload_address' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5474$3133'. No latch inferred for signal `\VexRiscv.\MmuPlugin_dBusAccess_cmd_valid' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5454$3132'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_mmuBus_rsp_refilling' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5432$3119'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_mmuBus_rsp_exception' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5424$3108'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_mmuBus_rsp_allowExecute' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5416$3107'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_mmuBus_rsp_allowWrite' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5408$3106'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_mmuBus_rsp_allowRead' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5400$3103'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_mmuBus_rsp_physicalAddress' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5392$3101'. No latch inferred for signal `\VexRiscv.\MmuPlugin_ports_1_requireMmuLockup' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5382$3093'. No latch inferred for signal `\VexRiscv.\MmuPlugin_ports_1_entryToReplace_valueNext' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5375$3091'. No latch inferred for signal `\VexRiscv.\MmuPlugin_ports_1_entryToReplace_willIncrement' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5363$3088'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_mmuBus_rsp_refilling' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5335$3058'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_mmuBus_rsp_exception' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5327$3047'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_mmuBus_rsp_allowExecute' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5319$3046'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_mmuBus_rsp_allowWrite' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5311$3045'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_mmuBus_rsp_allowRead' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5303$3042'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_mmuBus_rsp_physicalAddress' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5295$3040'. No latch inferred for signal `\VexRiscv.\MmuPlugin_ports_0_requireMmuLockup' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5283$3029'. No latch inferred for signal `\VexRiscv.\MmuPlugin_ports_0_entryToReplace_valueNext' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5276$3027'. No latch inferred for signal `\VexRiscv.\MmuPlugin_ports_0_entryToReplace_willIncrement' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5264$3024'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_forceDatapath' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5231$2993'. No latch inferred for signal `\VexRiscv.\MmuPlugin_dBusAccess_cmd_ready' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5220$2991'. No latch inferred for signal `\VexRiscv.\writeBack_DBusCachedPlugin_rspFormated' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5206$2990'. No latch inferred for signal `\VexRiscv.\_zz_151_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5186$2989'. No latch inferred for signal `\VexRiscv.\_zz_149_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5157$2986'. No latch inferred for signal `\VexRiscv.\writeBack_DBusCachedPlugin_rspShifted' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5139$2983'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_exceptionBus_payload_code' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5124$2981'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_exceptionBus_valid' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5105$2980'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_redoBranch_valid' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5095$2979'. No latch inferred for signal `\VexRiscv.\_zz_260_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5086$2976'. No latch inferred for signal `\VexRiscv.\_zz_259_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5078$2973'. No latch inferred for signal `\VexRiscv.\DBusCachedPlugin_mmuBus_cmd_bypassTranslation' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5071$2972'. No latch inferred for signal `\VexRiscv.\_zz_257_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5061$2970'. No latch inferred for signal `\VexRiscv.\_zz_254_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5049$2969'. No latch inferred for signal `\VexRiscv.\_zz_253_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5037$2968'. No latch inferred for signal `\VexRiscv.\_zz_252_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5027$2966'. No latch inferred for signal `\VexRiscv.\_zz_251_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5018$2965'. No latch inferred for signal `\VexRiscv.\_zz_147_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5004$2964'. No latch inferred for signal `\VexRiscv.\_zz_250_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4995$2963'. No latch inferred for signal `\VexRiscv.\_zz_249_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4986$2962'. No latch inferred for signal `\VexRiscv.\_zz_248_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4975$2960'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_decodeExceptionPort_payload_code' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4928$2947'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_decodeExceptionPort_valid' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4918$2946'. No latch inferred for signal `\VexRiscv.\_zz_247_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4908$2943'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_rsp_redoFetch' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4895$2942'. No latch inferred for signal `\VexRiscv.\iBus_cmd_payload_address' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4879$2931'. No latch inferred for signal `\VexRiscv.\_zz_130_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4855$2927'. No latch inferred for signal `\VexRiscv.\_zz_128_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4840$2926'. No latch inferred for signal `\VexRiscv.\_zz_126_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4827$2924'. No latch inferred for signal `\VexRiscv.\_zz_125_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4805$2923'. No latch inferred for signal `\VexRiscv.\_zz_123_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4790$2922'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_decodePrediction_cmd_hadBranch' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4782$2917'. No latch inferred for signal `\VexRiscv.\_zz_121_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4760$2916'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_iBusRsp_readyForError' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4743$2910'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_iBusRsp_cacheRspArbitration_halt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4723$2899'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_iBusRsp_stages_1_halt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4712$2895'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_iBusRsp_stages_0_halt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4701$2891'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_fetchPc_pc' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4686$2887'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_fetchPc_pcRegPropagate' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4679$2886'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_fetchPc_corrected' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4672$2885'. No latch inferred for signal `\VexRiscv.\CsrPlugin_jumpInterface_payload' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4642$2879'. No latch inferred for signal `\VexRiscv.\CsrPlugin_jumpInterface_valid' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4632$2878'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_incomingInstruction' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4625$2876'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_fetcherflushIt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4615$2873'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_fetcherHalt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4602$2871'. No latch inferred for signal `\VexRiscv.\writeBack_arbitration_flushNext' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4582$2870'. No latch inferred for signal `\VexRiscv.\writeBack_arbitration_flushIt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4575$2869'. No latch inferred for signal `\VexRiscv.\writeBack_arbitration_removeIt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4565$2868'. No latch inferred for signal `\VexRiscv.\writeBack_arbitration_haltItself' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4557$2867'. No latch inferred for signal `\VexRiscv.\memory_arbitration_flushNext' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4547$2866'. No latch inferred for signal `\VexRiscv.\memory_arbitration_removeIt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4536$2865'. No latch inferred for signal `\VexRiscv.\memory_arbitration_haltItself' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4526$2864'. No latch inferred for signal `\VexRiscv.\execute_arbitration_flushNext' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4519$2863'. No latch inferred for signal `\VexRiscv.\execute_arbitration_removeIt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4508$2862'. No latch inferred for signal `\VexRiscv.\execute_arbitration_haltItself' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4487$2856'. No latch inferred for signal `\VexRiscv.\decode_arbitration_flushNext' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4477$2855'. No latch inferred for signal `\VexRiscv.\decode_arbitration_removeIt' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4466$2854'. No latch inferred for signal `\VexRiscv.\decode_arbitration_haltByOther' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4450$2843'. No latch inferred for signal `\VexRiscv.\decode_arbitration_haltItself' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4443$2840'. No latch inferred for signal `\VexRiscv.\_zz_101_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4430$2839'. No latch inferred for signal `\VexRiscv.\_zz_100_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4423$2838'. No latch inferred for signal `\VexRiscv.\_zz_97_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4414$2837'. No latch inferred for signal `\VexRiscv.\_zz_96_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4407$2836'. No latch inferred for signal `\VexRiscv.\_zz_95_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4400$2835'. No latch inferred for signal `\VexRiscv.\IBusCachedPlugin_rsp_issueDetected' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4393$2834'. No latch inferred for signal `\VexRiscv.\_zz_93_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4360$2831'. No latch inferred for signal `\VexRiscv.\decode_REGFILE_WRITE_VALID' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4348$2829'. No latch inferred for signal `\VexRiscv.\_zz_61_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4340$2828'. No latch inferred for signal `\VexRiscv.\_zz_43_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4303$2827'. No latch inferred for signal `\VexRiscv.\decode_RS1' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4272$2825'. No latch inferred for signal `\VexRiscv.\decode_RS2' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4242$2823'. No latch inferred for signal `\VexRiscv.\_zz_42_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4226$2822'. No latch inferred for signal `\VexRiscv.\_zz_279_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_280_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_281_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_282_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_283_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_284_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_285_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_286_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_287_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_288_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_289_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. No latch inferred for signal `\VexRiscv.\_zz_268_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_269_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_270_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_271_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_272_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_273_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_274_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_275_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_276_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_277_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_278_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. No latch inferred for signal `\VexRiscv.\_zz_267_' from process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3313$2819'. No latch inferred for signal `\top.\builder_soclinux_wishbone_err' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1086$2402'. No latch inferred for signal `\top.\builder_locked3' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1056$2381'. No latch inferred for signal `\top.\builder_locked2' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1055$2380'. No latch inferred for signal `\top.\builder_locked1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1054$2379'. No latch inferred for signal `\top.\builder_locked0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1053$2378'. No latch inferred for signal `\top.\main_wishbone_bridge_wdata_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:908$2324'. No latch inferred for signal `\top.\main_wishbone_bridge_wdata_first' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:907$2323'. No latch inferred for signal `\top.\main_wb_sdram_err' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:874$2310'. No latch inferred for signal `\top.\main_port_rdata_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:862$2307'. No latch inferred for signal `\top.\main_port_rdata_first' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:861$2306'. No latch inferred for signal `\top.\main_sdram_tfawcon_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:833$2294'. No latch inferred for signal `\top.\main_sdram_steerer1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:828$2291'. No latch inferred for signal `\top.\main_sdram_steerer0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:827$2290'. No latch inferred for signal `\top.\main_sdram_nop_ba' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:825$2288'. No latch inferred for signal `\top.\main_sdram_nop_a' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:824$2287'. No latch inferred for signal `\top.\main_sdram_choose_cmd_cmd_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:793$2272'. No latch inferred for signal `\top.\main_sdram_choose_cmd_want_activates' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:791$2271'. No latch inferred for signal `\top.\main_sdram_choose_cmd_want_cmds' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:790$2270'. No latch inferred for signal `\top.\main_sdram_choose_cmd_want_writes' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:789$2269'. No latch inferred for signal `\top.\main_sdram_choose_cmd_want_reads' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:788$2268'. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_replace' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:741$2248'. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_sink_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:725$2246'. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_sink_first' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:724$2245'. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_replace' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:657$2212'. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_sink_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:641$2210'. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_sink_first' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:640$2209'. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_replace' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:573$2176'. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_sink_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:557$2174'. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_sink_first' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:556$2173'. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_replace' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:489$2140'. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_sink_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:473$2138'. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_sink_first' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:472$2137'. No latch inferred for signal `\top.\main_sdram_cmd_payload_is_write' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:434$2116'. No latch inferred for signal `\top.\main_sdram_cmd_payload_is_read' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:433$2115'. No latch inferred for signal `\top.\main_sdram_dfi_p0_act_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:418$2104'. No latch inferred for signal `\top.\main_sdram_command_issue_w' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:368$2088'. No latch inferred for signal `\top.\main_sdram_inti_p0_act_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:318$2065'. No latch inferred for signal `\top.\main_soclinux_uart_reset' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:254$2043'. No latch inferred for signal `\top.\main_soclinux_uart_rx_fifo_replace' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:236$2039'. No latch inferred for signal `\top.\main_soclinux_uart_tx_fifo_replace' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:199$2033'. No latch inferred for signal `\top.\main_soclinux_uart_tx_fifo_sink_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:183$2030'. No latch inferred for signal `\top.\main_soclinux_uart_tx_fifo_sink_first' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:182$2029'. No latch inferred for signal `\top.\main_soclinux_source_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:124$2011'. No latch inferred for signal `\top.\main_soclinux_source_first' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:123$2010'. No latch inferred for signal `\top.\main_soclinux_ram_bus_ram_bus_err' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:104$1999'. No latch inferred for signal `\top.\main_soclinux_soclinux_ram_bus_err' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:91$1997'. No latch inferred for signal `\top.\main_soclinux_vexriscv' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:80$1995'. No latch inferred for signal `\top.\main_soclinux_cpu_latch_w' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:71$1989'. No latch inferred for signal `\top.\builder_sync_f_array_muxed' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4177$1559'. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_f_array_muxed` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4177$1559`. No latch inferred for signal `\top.\builder_sync_rhs_array_muxed6' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4160$1552'. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed6` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4160$1552`. No latch inferred for signal `\top.\builder_sync_rhs_array_muxed5' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4143$1545'. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed5` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4143$1545`. No latch inferred for signal `\top.\builder_sync_rhs_array_muxed4' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4126$1538'. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed4` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4126$1538`. No latch inferred for signal `\top.\builder_sync_rhs_array_muxed3' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4109$1531'. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed3` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4109$1531`. No latch inferred for signal `\top.\builder_sync_rhs_array_muxed2' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4092$1524'. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed2` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4092$1524`. No latch inferred for signal `\top.\builder_sync_rhs_array_muxed1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523'. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed1 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523`. No latch inferred for signal `\top.\builder_sync_rhs_array_muxed0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4058$1522'. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed0 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4058$1522`. Removing init bit 1'0 for non-memory siginal `\top.\builder_sync_rhs_array_muxed0 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4058$1522`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed31' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4047$1521'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed31 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4047$1521`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed31 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4047$1521`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed30' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4036$1520'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed30 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4036$1520`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed30 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4036$1520`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed30 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4036$1520`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed29' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4025$1519'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed29` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4025$1519`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed28' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4014$1518'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed28` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4014$1518`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed27' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4003$1517'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed27` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4003$1517`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed26' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed26 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed26 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed26 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed26 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed25' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [30]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed25 [31]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed24' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed24 [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed23' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3962$1500'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed23` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3962$1500`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed22' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3954$1499'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed22` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3954$1499`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed21' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed21 [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed20' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3938$1484'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed20` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3938$1484`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed19' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3930$1483'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed19` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3930$1483`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed18' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed18 [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed17' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3914$1468'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed17` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3914$1468`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed16' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3906$1467'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed16` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3906$1467`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed15' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed15 [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed14' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3890$1452'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed14` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3890$1452`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed13' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3882$1451'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed13` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3882$1451`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed12' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed12 [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450`. No latch inferred for signal `\top.\builder_comb_t_array_muxed5' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3857$1449'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_t_array_muxed5` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3857$1449`. No latch inferred for signal `\top.\builder_comb_t_array_muxed4' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3840$1448'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_t_array_muxed4` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3840$1448`. No latch inferred for signal `\top.\builder_comb_t_array_muxed3' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3823$1447'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_t_array_muxed3` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3823$1447`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed11' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3806$1446'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed11` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3806$1446`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed10' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3789$1445'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed10` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3789$1445`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed9' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3772$1444'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed9` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3772$1444`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed8' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3755$1443'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed8 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3755$1443`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed8 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3755$1443`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed7' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed7 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed6' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3721$1441'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed6` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3721$1441`. No latch inferred for signal `\top.\builder_comb_t_array_muxed2' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3704$1440'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_t_array_muxed2` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3704$1440`. No latch inferred for signal `\top.\builder_comb_t_array_muxed1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3687$1439'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_t_array_muxed1` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3687$1439`. No latch inferred for signal `\top.\builder_comb_t_array_muxed0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3670$1438'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_t_array_muxed0` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3670$1438`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed5' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3653$1437'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed5` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3653$1437`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed4' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3636$1436'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed4` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3636$1436`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed3' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3619$1435'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed3` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3619$1435`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed2' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3602$1434'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed2 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3602$1434`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed2 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3602$1434`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed1 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433`. No latch inferred for signal `\top.\builder_comb_rhs_array_muxed0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3568$1432'. Removing init bit 1'0 for non-memory siginal `\top.\builder_comb_rhs_array_muxed0` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3568$1432`. No latch inferred for signal `\top.\soclinux_start1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3390$1217'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_start1` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3390$1217`. No latch inferred for signal `\top.\builder_csr_bankarray_sram_bus_dat_r' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073'. Removing init bit 1'0 for non-memory siginal `\top.\builder_csr_bankarray_sram_bus_dat_r [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073`. Removing init bit 1'0 for non-memory siginal `\top.\builder_csr_bankarray_sram_bus_dat_r [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073`. Removing init bit 1'0 for non-memory siginal `\top.\builder_csr_bankarray_sram_bus_dat_r [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073`. Removing init bit 1'0 for non-memory siginal `\top.\builder_csr_bankarray_sram_bus_dat_r [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073`. Removing init bit 1'0 for non-memory siginal `\top.\builder_csr_bankarray_sram_bus_dat_r [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073`. Removing init bit 1'0 for non-memory siginal `\top.\builder_csr_bankarray_sram_bus_dat_r [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073`. Removing init bit 1'0 for non-memory siginal `\top.\builder_csr_bankarray_sram_bus_dat_r [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073`. Removing init bit 1'0 for non-memory siginal `\top.\builder_csr_bankarray_sram_bus_dat_r [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073`. No latch inferred for signal `\top.\builder_shared_dat_r' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876'. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [30]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_dat_r [31]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. No latch inferred for signal `\top.\builder_shared_ack' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876'. Removing init bit 1'0 for non-memory siginal `\top.\builder_shared_ack` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. No latch inferred for signal `\top.\builder_error' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876'. Removing init bit 1'0 for non-memory siginal `\top.\builder_error` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876`. No latch inferred for signal `\top.\builder_slave_sel' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3140$861'. Removing init bit 1'0 for non-memory siginal `\top.\builder_slave_sel [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3140$861`. Removing init bit 1'0 for non-memory siginal `\top.\builder_slave_sel [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3140$861`. Removing init bit 1'0 for non-memory siginal `\top.\builder_slave_sel [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3140$861`. Removing init bit 1'0 for non-memory siginal `\top.\builder_slave_sel [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3140$861`. No latch inferred for signal `\top.\builder_soclinux_wishbone_dat_r' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [30]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_dat_r [31]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\builder_soclinux_wishbone_ack' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_wishbone_ack` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\builder_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\builder_soclinux_dat_w_next_value0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value0 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value0 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value0 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value0 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value0 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value0 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value0 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value0 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\builder_soclinux_dat_w_next_value_ce0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_dat_w_next_value_ce0` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\builder_soclinux_adr_next_value1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value1 [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\builder_soclinux_adr_next_value_ce1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_adr_next_value_ce1` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\builder_soclinux_we_next_value2' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_we_next_value2` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\builder_soclinux_we_next_value_ce2' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing init bit 1'0 for non-memory siginal `\top.\builder_soclinux_we_next_value_ce2` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849`. No latch inferred for signal `\top.\soclinux_done0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_done0` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\soclinux_irq' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_irq` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\soclinux_clk_enable' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_clk_enable` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\soclinux_cs_enable' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_cs_enable` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\soclinux_mosi_latch' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_mosi_latch` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\soclinux_miso_latch' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_miso_latch` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\builder_spimaster_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\builder_spimaster_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. Removing init bit 1'0 for non-memory siginal `\top.\builder_spimaster_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\soclinux_count_spimaster_next_value' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_count_spimaster_next_value [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_count_spimaster_next_value [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_count_spimaster_next_value [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\soclinux_count_spimaster_next_value_ce' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing init bit 1'0 for non-memory siginal `\top.\soclinux_count_spimaster_next_value_ce` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845`. No latch inferred for signal `\top.\user_led0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. No latch inferred for signal `\top.\user_led1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. No latch inferred for signal `\top.\user_led2' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. No latch inferred for signal `\top.\user_led3' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. No latch inferred for signal `\top.\user_led4' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. No latch inferred for signal `\top.\user_led5' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. No latch inferred for signal `\top.\user_led6' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. No latch inferred for signal `\top.\user_led7' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. No latch inferred for signal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833'. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [30]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [31]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [32]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [33]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [34]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [35]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [36]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [37]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [38]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [39]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [40]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [41]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [42]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [43]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [44]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [45]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [46]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [47]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [48]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [49]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [50]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [51]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [52]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [53]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [54]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [55]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [56]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [57]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [58]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [59]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [60]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [61]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [62]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [63]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [64]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [65]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [66]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [67]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [68]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [69]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [70]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [71]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [72]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [73]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [74]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [75]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [76]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [77]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [78]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [79]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [80]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [81]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [82]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [83]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [84]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [85]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [86]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [87]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [88]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [89]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [90]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [91]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [92]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [93]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [94]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [95]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [96]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [97]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [98]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [99]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [100]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [101]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [102]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [103]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [104]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [105]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [106]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [107]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [108]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [109]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [110]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [111]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [112]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [113]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [114]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [115]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [116]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [117]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [118]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [119]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [120]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [121]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [122]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [123]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [124]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [125]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [126]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_rdata_converter_source_payload_data [127]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833`. No latch inferred for signal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832'. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_source_payload_data [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832`. No latch inferred for signal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826'. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [30]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [31]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [32]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [33]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [34]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [35]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [36]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [37]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [38]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [39]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [40]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [41]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [42]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [43]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [44]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [45]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [46]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [47]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [48]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [49]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [50]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [51]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [52]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [53]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [54]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [55]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [56]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [57]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [58]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [59]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [60]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [61]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [62]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [63]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [64]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [65]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [66]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [67]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [68]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [69]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [70]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [71]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [72]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [73]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [74]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [75]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [76]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [77]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [78]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [79]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [80]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [81]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [82]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [83]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [84]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [85]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [86]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [87]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [88]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [89]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [90]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [91]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [92]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [93]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [94]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [95]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [96]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [97]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [98]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [99]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [100]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [101]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [102]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [103]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [104]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [105]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [106]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [107]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [108]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [109]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [110]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [111]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [112]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [113]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [114]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [115]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [116]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [117]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [118]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [119]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [120]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [121]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [122]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [123]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [124]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [125]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [126]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [127]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [128]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [129]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [130]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [131]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [132]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [133]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [134]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [135]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [136]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [137]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [138]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [139]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [140]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [141]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [142]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_wdata_converter_converter_sink_payload_data [143]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826`. No latch inferred for signal `\top.\main_port_cmd_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. No latch inferred for signal `\top.\main_port_cmd_payload_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. No latch inferred for signal `\top.\main_port_cmd_payload_addr' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_port_cmd_payload_addr [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. No latch inferred for signal `\top.\main_wishbone_bridge_cmd_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_cmd_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. No latch inferred for signal `\top.\builder_litedramwishbone2native_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Removing init bit 1'0 for non-memory siginal `\top.\builder_litedramwishbone2native_next_state` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. No latch inferred for signal `\top.\main_wishbone_bridge_count_litedramwishbone2native_next_value' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_count_litedramwishbone2native_next_value [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_count_litedramwishbone2native_next_value [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_count_litedramwishbone2native_next_value [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. No latch inferred for signal `\top.\main_wishbone_bridge_count_litedramwishbone2native_next_value_ce' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Removing init bit 1'0 for non-memory siginal `\top.\main_wishbone_bridge_count_litedramwishbone2native_next_value_ce` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821`. No latch inferred for signal `\top.\main_wb_sdram_ack' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_ack` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_interface_cyc' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_interface_cyc` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_interface_stb' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_interface_stb` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_interface_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_interface_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_write_from_slave' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_write_from_slave` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_tag_port_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_tag_port_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_tag_di_dirty' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_tag_di_dirty` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_word_clr' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_word_clr` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_word_inc' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\main_word_inc` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\builder_fullmemorywe_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing init bit 1'0 for non-memory siginal `\top.\builder_fullmemorywe_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. Removing init bit 1'0 for non-memory siginal `\top.\builder_fullmemorywe_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795`. No latch inferred for signal `\top.\main_wb_sdram_dat_r' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794'. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [30]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. Removing init bit 1'0 for non-memory siginal `\top.\main_wb_sdram_dat_r [31]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794`. No latch inferred for signal `\top.\main_data_port_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782'. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_we [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. No latch inferred for signal `\top.\main_data_port_dat_w' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782'. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [30]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [31]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [32]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [33]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [34]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [35]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [36]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [37]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [38]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [39]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [40]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [41]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [42]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [43]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [44]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [45]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [46]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [47]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [48]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [49]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [50]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [51]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [52]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [53]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [54]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [55]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [56]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [57]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [58]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [59]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [60]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [61]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [62]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [63]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [64]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [65]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [66]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [67]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [68]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [69]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [70]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [71]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [72]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [73]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [74]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [75]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [76]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [77]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [78]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [79]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [80]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [81]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [82]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [83]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [84]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [85]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [86]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [87]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [88]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [89]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [90]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [91]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [92]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [93]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [94]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [95]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [96]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [97]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [98]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [99]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [100]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [101]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [102]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [103]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [104]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [105]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [106]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [107]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [108]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [109]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [110]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [111]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [112]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [113]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [114]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [115]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [116]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [117]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [118]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [119]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [120]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [121]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [122]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [123]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [124]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [125]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [126]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. Removing init bit 1'0 for non-memory siginal `\top.\main_data_port_dat_w [127]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782`. No latch inferred for signal `\top.\main_sdram_interface_wdata' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. No latch inferred for signal `\top.\main_sdram_interface_wdata_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata_we [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_interface_wdata_we [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781`. No latch inferred for signal `\top.\main_sdram_cmd_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_cmd_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\main_sdram_choose_req_want_reads' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_want_reads` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\main_sdram_choose_req_want_writes' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_want_writes` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\main_sdram_choose_req_want_activates' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_want_activates` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\main_sdram_choose_req_cmd_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_cmd_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\main_sdram_steerer_sel' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_steerer_sel [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_steerer_sel [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\main_sdram_en0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_en0` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\main_sdram_en1' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_en1` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\builder_multiplexer_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing init bit 1'0 for non-memory siginal `\top.\builder_multiplexer_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. Removing init bit 1'0 for non-memory siginal `\top.\builder_multiplexer_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. Removing init bit 1'0 for non-memory siginal `\top.\builder_multiplexer_next_state [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2603$625'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2603$625`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2594$618'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2594$618`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2585$611'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2585$611`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2576$604'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2576$604`. No latch inferred for signal `\top.\main_sdram_choose_req_cmd_payload_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2570$603'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_cmd_payload_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2570$603`. No latch inferred for signal `\top.\main_sdram_choose_req_cmd_payload_ras' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2564$602'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_cmd_payload_ras` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2564$602`. No latch inferred for signal `\top.\main_sdram_choose_req_cmd_payload_cas' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2558$601'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_cmd_payload_cas` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2558$601`. No latch inferred for signal `\top.\main_sdram_choose_req_valids' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2544$548'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_valids [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2544$548`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_valids [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2544$548`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_valids [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2544$548`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_req_valids [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2544$548`. No latch inferred for signal `\top.\main_sdram_choose_cmd_cmd_payload_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2537$545'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_cmd_cmd_payload_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2537$545`. No latch inferred for signal `\top.\main_sdram_choose_cmd_cmd_payload_ras' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2531$544'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_cmd_cmd_payload_ras` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2531$544`. No latch inferred for signal `\top.\main_sdram_choose_cmd_cmd_payload_cas' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2525$543'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_cmd_cmd_payload_cas` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2525$543`. No latch inferred for signal `\top.\main_sdram_choose_cmd_valids' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2511$490'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_cmd_valids [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2511$490`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_cmd_valids [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2511$490`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_cmd_valids [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2511$490`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_choose_cmd_valids [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2511$490`. No latch inferred for signal `\top.\main_sdram_bankmachine3_req_wdata_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_req_wdata_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_req_rdata_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_req_rdata_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_refresh_gnt' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_refresh_gnt` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_payload_cas' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_cas` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_payload_ras' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_ras` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_payload_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_payload_is_cmd' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_is_cmd` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_payload_is_read' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_is_read` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_payload_is_write' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_is_write` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_row_open' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_row_open` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_row_close' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_row_close` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_row_col_n_addr_sel' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_row_col_n_addr_sel` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\builder_bankmachine3_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine3_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine3_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine3_next_state [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2388$438'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2388$438`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2388$438`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2388$438`. No latch inferred for signal `\top.\main_sdram_bankmachine3_auto_precharge' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2366$434'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_auto_precharge` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2366$434`. No latch inferred for signal `\top.\main_sdram_bankmachine3_cmd_payload_a' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine3_cmd_payload_a [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425`. No latch inferred for signal `\top.\main_sdram_bankmachine2_req_wdata_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_req_wdata_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_req_rdata_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_req_rdata_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_refresh_gnt' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_refresh_gnt` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_payload_cas' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_cas` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_payload_ras' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_ras` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_payload_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_payload_is_cmd' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_is_cmd` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_payload_is_read' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_is_read` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_payload_is_write' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_is_write` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_row_open' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_row_open` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_row_close' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_row_close` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_row_col_n_addr_sel' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_row_col_n_addr_sel` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\builder_bankmachine2_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine2_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine2_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine2_next_state [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2237$408'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2237$408`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2237$408`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2237$408`. No latch inferred for signal `\top.\main_sdram_bankmachine2_auto_precharge' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2215$404'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_auto_precharge` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2215$404`. No latch inferred for signal `\top.\main_sdram_bankmachine2_cmd_payload_a' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine2_cmd_payload_a [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395`. No latch inferred for signal `\top.\main_sdram_bankmachine1_req_wdata_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_req_wdata_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_req_rdata_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_req_rdata_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_refresh_gnt' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_refresh_gnt` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_payload_cas' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_cas` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_payload_ras' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_ras` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_payload_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_payload_is_cmd' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_is_cmd` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_payload_is_read' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_is_read` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_payload_is_write' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_is_write` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_row_open' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_row_open` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_row_close' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_row_close` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_row_col_n_addr_sel' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_row_col_n_addr_sel` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\builder_bankmachine1_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine1_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine1_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine1_next_state [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2086$378'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2086$378`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2086$378`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2086$378`. No latch inferred for signal `\top.\main_sdram_bankmachine1_auto_precharge' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2064$374'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_auto_precharge` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2064$374`. No latch inferred for signal `\top.\main_sdram_bankmachine1_cmd_payload_a' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine1_cmd_payload_a [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365`. No latch inferred for signal `\top.\main_sdram_bankmachine0_req_wdata_ready' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_req_wdata_ready` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_req_rdata_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_req_rdata_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_refresh_gnt' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_refresh_gnt` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_payload_cas' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_cas` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_payload_ras' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_ras` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_payload_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_we` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_payload_is_cmd' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_is_cmd` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_payload_is_read' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_is_read` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_payload_is_write' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_is_write` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_row_open' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_row_open` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_row_close' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_row_close` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_row_col_n_addr_sel' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_row_col_n_addr_sel` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\builder_bankmachine0_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine0_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine0_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. Removing init bit 1'0 for non-memory siginal `\top.\builder_bankmachine0_next_state [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1935$348'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1935$348`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1935$348`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1935$348`. No latch inferred for signal `\top.\main_sdram_bankmachine0_auto_precharge' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1913$344'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_auto_precharge` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1913$344`. No latch inferred for signal `\top.\main_sdram_bankmachine0_cmd_payload_a' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_bankmachine0_cmd_payload_a [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335`. No latch inferred for signal `\top.\main_sdram_cmd_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_cmd_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331`. No latch inferred for signal `\top.\main_sdram_cmd_last' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_cmd_last` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331`. No latch inferred for signal `\top.\main_sdram_sequencer_start0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_sequencer_start0` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331`. No latch inferred for signal `\top.\builder_refresher_next_state' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331'. Removing init bit 1'0 for non-memory siginal `\top.\builder_refresher_next_state [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331`. Removing init bit 1'0 for non-memory siginal `\top.\builder_refresher_next_state [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331`. No latch inferred for signal `\top.\main_sdram_inti_p0_cas_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_inti_p0_cas_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318`. No latch inferred for signal `\top.\main_sdram_inti_p0_cs_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_inti_p0_cs_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318`. No latch inferred for signal `\top.\main_sdram_inti_p0_ras_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_inti_p0_ras_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318`. No latch inferred for signal `\top.\main_sdram_inti_p0_we_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_inti_p0_we_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318`. No latch inferred for signal `\top.\main_sdram_inti_p0_rddata' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_inti_p0_rddata_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_inti_p0_rddata_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_slave_p0_rddata' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_slave_p0_rddata_valid' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_slave_p0_rddata_valid` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_address' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_address [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_bank' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_bank [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_bank [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_cas_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_master_p0_cas_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_cs_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_master_p0_cs_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_ras_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_master_p0_ras_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_we_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_master_p0_we_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_cke' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_cke` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_odt' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_odt` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_reset_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_reset_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_act_n' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'1 for non-memory siginal `\top.\main_sdram_master_p0_act_n` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_wrdata' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_wrdata_en' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata_en` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_wrdata_mask' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata_mask [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_wrdata_mask [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_sdram_master_p0_rddata_en' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing init bit 1'0 for non-memory siginal `\top.\main_sdram_master_p0_rddata_en` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317`. No latch inferred for signal `\top.\main_soclinux_timer_zero_clear' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1694$313'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_timer_zero_clear` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1694$313`. No latch inferred for signal `\top.\main_soclinux_uart_rx_fifo_wrport_adr' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_rx_fifo_wrport_adr [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_rx_fifo_wrport_adr [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_rx_fifo_wrport_adr [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_rx_fifo_wrport_adr [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305`. No latch inferred for signal `\top.\main_soclinux_uart_tx_fifo_wrport_adr' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_tx_fifo_wrport_adr [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_tx_fifo_wrport_adr [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_tx_fifo_wrport_adr [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_tx_fifo_wrport_adr [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294`. No latch inferred for signal `\top.\main_soclinux_uart_eventmanager_pending_w' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1624$286'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_eventmanager_pending_w [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1624$286`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_eventmanager_pending_w [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1624$286`. No latch inferred for signal `\top.\main_soclinux_uart_rx_clear' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1618$284'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_rx_clear` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1618$284`. No latch inferred for signal `\top.\main_soclinux_uart_eventmanager_status_w' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1613$283'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_eventmanager_status_w [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1613$283`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_eventmanager_status_w [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1613$283`. No latch inferred for signal `\top.\main_soclinux_uart_tx_clear' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1607$281'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_uart_tx_clear` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1607$281`. No latch inferred for signal `\top.\main_soclinux_ram_we' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1567$260'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_ram_we [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1567$260`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_ram_we [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1567$260`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_ram_we [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1567$260`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_ram_we [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1567$260`. No latch inferred for signal `\top.\main_soclinux_cpu_interrupt0' from process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258'. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [0]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [1]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [2]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [3]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [4]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [5]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [6]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [7]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [8]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [9]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [10]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [11]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [12]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [13]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [14]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [15]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [16]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [17]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [18]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [19]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [20]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [21]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [22]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [23]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [24]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [25]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [26]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [27]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [28]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [29]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [30]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. Removing init bit 1'0 for non-memory siginal `\top.\main_soclinux_cpu_interrupt0 [31]` in process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258`. 4.5.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\TRELLIS_FF.\Q' using process `\TRELLIS_FF.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:350$226'. created $dff cell `$procdff$11602' with positive edge clock. Creating register for signal `\DPR16X4C.\i' using process `\DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$223'. created direct connection (no actual register cell created). Creating register for signal `\DPR16X4C.$memwr$\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$201_ADDR' using process `\DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285$202'. created $dff cell `$procdff$11603' with positive edge clock. Creating register for signal `\DPR16X4C.$memwr$\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$201_DATA' using process `\DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285$202'. created $dff cell `$procdff$11604' with positive edge clock. Creating register for signal `\DPR16X4C.$memwr$\ram$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:287$201_EN' using process `\DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285$202'. created $dff cell `$procdff$11605' with positive edge clock. Creating register for signal `\TRELLIS_DPR16X4.\i' using process `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$169'. created direct connection (no actual register cell created). Creating register for signal `\TRELLIS_DPR16X4.$memwr$\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$145_ADDR' using process `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221$147'. created $dff cell `$procdff$11606' with positive edge clock. Creating register for signal `\TRELLIS_DPR16X4.$memwr$\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$145_DATA' using process `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221$147'. created $dff cell `$procdff$11607' with positive edge clock. Creating register for signal `\TRELLIS_DPR16X4.$memwr$\mem$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:223$145_EN' using process `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221$147'. created $dff cell `$procdff$11608' with positive edge clock. Creating register for signal `\TRELLIS_DPR16X4.\muxwre' using process `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:213$146'. created direct connection (no actual register cell created). Creating register for signal `\InstructionCache.\_zz_3_' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11609' with positive edge clock. Creating register for signal `\InstructionCache.\lineLoader_address' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11610' with positive edge clock. Creating register for signal `\InstructionCache.\lineLoader_flushCounter' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11611' with positive edge clock. Creating register for signal `\InstructionCache.\io_cpu_fetch_data_regNextWhen' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11612' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_mmuRsp_physicalAddress' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11613' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_mmuRsp_isIoAccess' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11614' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_mmuRsp_allowRead' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11615' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_mmuRsp_allowWrite' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11616' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_mmuRsp_allowExecute' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11617' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_mmuRsp_exception' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11618' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_mmuRsp_refilling' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11619' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_hit_valid' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11620' with positive edge clock. Creating register for signal `\InstructionCache.\decodeStage_hit_error' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. created $dff cell `$procdff$11621' with positive edge clock. Creating register for signal `\InstructionCache.\lineLoader_valid' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882'. created $dff cell `$procdff$11622' with positive edge clock. Creating register for signal `\InstructionCache.\lineLoader_hadError' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882'. created $dff cell `$procdff$11623' with positive edge clock. Creating register for signal `\InstructionCache.\lineLoader_flushPending' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882'. created $dff cell `$procdff$11624' with positive edge clock. Creating register for signal `\InstructionCache.\lineLoader_cmdSent' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882'. created $dff cell `$procdff$11625' with positive edge clock. Creating register for signal `\InstructionCache.\lineLoader_wordIndex' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882'. created $dff cell `$procdff$11626' with positive edge clock. Creating register for signal `\InstructionCache.\_zz_11_' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:180$3849'. created $dff cell `$procdff$11627' with positive edge clock. Creating register for signal `\InstructionCache.$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_ADDR' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:174$3845'. created $dff cell `$procdff$11628' with positive edge clock. Creating register for signal `\InstructionCache.$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_DATA' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:174$3845'. created $dff cell `$procdff$11629' with positive edge clock. Creating register for signal `\InstructionCache.$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:174$3845'. created $dff cell `$procdff$11630' with positive edge clock. Creating register for signal `\InstructionCache.\_zz_10_' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:168$3843'. created $dff cell `$procdff$11631' with positive edge clock. Creating register for signal `\InstructionCache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_ADDR' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:162$3839'. created $dff cell `$procdff$11632' with positive edge clock. Creating register for signal `\InstructionCache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_DATA' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:162$3839'. created $dff cell `$procdff$11633' with positive edge clock. Creating register for signal `\InstructionCache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN' using process `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:162$3839'. created $dff cell `$procdff$11634' with positive edge clock. Creating register for signal `\DataCache.\stageB_mmuRsp_physicalAddress' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. created $dff cell `$procdff$11635' with positive edge clock. Creating register for signal `\DataCache.\stageB_flusher_valid' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. created $dff cell `$procdff$11636' with positive edge clock. Creating register for signal `\DataCache.\stageB_lrsc_reserved' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. created $dff cell `$procdff$11637' with positive edge clock. Creating register for signal `\DataCache.\stageB_memCmdSent' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. created $dff cell `$procdff$11638' with positive edge clock. Creating register for signal `\DataCache.\loader_valid' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. created $dff cell `$procdff$11639' with positive edge clock. Creating register for signal `\DataCache.\loader_counter_value' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. created $dff cell `$procdff$11640' with positive edge clock. Creating register for signal `\DataCache.\loader_waysAllocator' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. created $dff cell `$procdff$11641' with positive edge clock. Creating register for signal `\DataCache.\loader_error' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. created $dff cell `$procdff$11642' with positive edge clock. Creating register for signal `\DataCache.\tagsWriteLastCmd_valid' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11643' with positive edge clock. Creating register for signal `\DataCache.\tagsWriteLastCmd_payload_way' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11644' with positive edge clock. Creating register for signal `\DataCache.\tagsWriteLastCmd_payload_address' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11645' with positive edge clock. Creating register for signal `\DataCache.\tagsWriteLastCmd_payload_data_valid' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11646' with positive edge clock. Creating register for signal `\DataCache.\tagsWriteLastCmd_payload_data_error' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11647' with positive edge clock. Creating register for signal `\DataCache.\tagsWriteLastCmd_payload_data_address' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11648' with positive edge clock. Creating register for signal `\DataCache.\stageA_request_wr' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11649' with positive edge clock. Creating register for signal `\DataCache.\stageA_request_data' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11650' with positive edge clock. Creating register for signal `\DataCache.\stageA_request_size' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11651' with positive edge clock. Creating register for signal `\DataCache.\stageA_request_isLrsc' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11652' with positive edge clock. Creating register for signal `\DataCache.\stageA_request_isAmo' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11653' with positive edge clock. Creating register for signal `\DataCache.\stageA_request_amoCtrl_swap' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11654' with positive edge clock. Creating register for signal `\DataCache.\stageA_request_amoCtrl_alu' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11655' with positive edge clock. Creating register for signal `\DataCache.\stageA_mask' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11656' with positive edge clock. Creating register for signal `\DataCache.\stage0_colisions_regNextWhen' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11657' with positive edge clock. Creating register for signal `\DataCache.\stageB_request_wr' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11658' with positive edge clock. Creating register for signal `\DataCache.\stageB_request_data' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11659' with positive edge clock. Creating register for signal `\DataCache.\stageB_request_size' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11660' with positive edge clock. Creating register for signal `\DataCache.\stageB_request_isLrsc' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11661' with positive edge clock. Creating register for signal `\DataCache.\stageB_isAmo' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11662' with positive edge clock. Creating register for signal `\DataCache.\stageB_request_amoCtrl_swap' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11663' with positive edge clock. Creating register for signal `\DataCache.\stageB_request_amoCtrl_alu' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11664' with positive edge clock. Creating register for signal `\DataCache.\stageB_mmuRsp_isIoAccess' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11665' with positive edge clock. Creating register for signal `\DataCache.\stageB_mmuRsp_allowRead' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11666' with positive edge clock. Creating register for signal `\DataCache.\stageB_mmuRsp_allowWrite' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11667' with positive edge clock. Creating register for signal `\DataCache.\stageB_mmuRsp_allowExecute' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11668' with positive edge clock. Creating register for signal `\DataCache.\stageB_mmuRsp_exception' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11669' with positive edge clock. Creating register for signal `\DataCache.\stageB_mmuRsp_refilling' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11670' with positive edge clock. Creating register for signal `\DataCache.\stageB_tagsReadRsp_0_valid' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11671' with positive edge clock. Creating register for signal `\DataCache.\stageB_tagsReadRsp_0_error' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11672' with positive edge clock. Creating register for signal `\DataCache.\stageB_tagsReadRsp_0_address' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11673' with positive edge clock. Creating register for signal `\DataCache.\stageB_dataReadRsp_0' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11674' with positive edge clock. Creating register for signal `\DataCache.\stageB_waysHits' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11675' with positive edge clock. Creating register for signal `\DataCache.\stageB_mask' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11676' with positive edge clock. Creating register for signal `\DataCache.\stageB_colisions' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11677' with positive edge clock. Creating register for signal `\DataCache.\stageB_amo_resultRegValid' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11678' with positive edge clock. Creating register for signal `\DataCache.\stageB_amo_resultReg' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. created $dff cell `$procdff$11679' with positive edge clock. Creating register for signal `\DataCache.\_zz_38_' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:583$3682'. created $dff cell `$procdff$11680' with positive edge clock. Creating register for signal `\DataCache.\_zz_39_' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:583$3682'. created $dff cell `$procdff$11681' with positive edge clock. Creating register for signal `\DataCache.\_zz_40_' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:583$3682'. created $dff cell `$procdff$11682' with positive edge clock. Creating register for signal `\DataCache.\_zz_41_' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:583$3682'. created $dff cell `$procdff$11683' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_ADDR' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11684' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_DATA' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11685' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11686' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_ADDR' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11687' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_DATA' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11688' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11689' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_ADDR' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11690' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_DATA' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11691' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11692' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_ADDR' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11693' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_DATA' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11694' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. created $dff cell `$procdff$11695' with positive edge clock. Creating register for signal `\DataCache.\_zz_10_' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:559$3662'. created $dff cell `$procdff$11696' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_ADDR' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:553$3658'. created $dff cell `$procdff$11697' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_DATA' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:553$3658'. created $dff cell `$procdff$11698' with positive edge clock. Creating register for signal `\DataCache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN' using process `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:553$3658'. created $dff cell `$procdff$11699' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_119_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11700' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_s1_tightlyCoupledHit' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11701' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_s2_tightlyCoupledHit' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11702' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_133_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11703' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_134_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11704' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_135_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11705' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_136_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11706' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_137_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11707' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_138_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11708' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_140_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11709' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_141_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11710' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_142_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11711' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_143_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11712' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_144_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11713' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_145_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11714' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_satp_ppn' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11715' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_exception' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11716' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_superPage' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11717' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_virtualAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11718' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_virtualAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11719' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_physicalAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11720' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_physicalAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11721' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_allowRead' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11722' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_allowWrite' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11723' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_allowExecute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11724' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_allowUser' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11725' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_exception' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11726' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_superPage' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11727' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_virtualAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11728' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_virtualAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11729' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_physicalAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11730' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_physicalAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11731' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_allowRead' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11732' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_allowWrite' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11733' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_allowExecute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11734' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_allowUser' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11735' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_exception' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11736' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_superPage' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11737' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_virtualAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11738' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_virtualAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11739' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_physicalAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11740' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_physicalAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11741' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_allowRead' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11742' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_allowWrite' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11743' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_allowExecute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11744' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_allowUser' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11745' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_exception' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11746' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_superPage' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11747' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_virtualAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11748' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_virtualAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11749' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_physicalAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11750' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_physicalAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11751' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_allowRead' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11752' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_allowWrite' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11753' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_allowExecute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11754' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_allowUser' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11755' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_exception' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11756' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_superPage' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11757' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_virtualAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11758' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_virtualAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11759' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_physicalAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11760' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_physicalAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11761' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_allowRead' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11762' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_allowWrite' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11763' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_allowExecute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11764' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_allowUser' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11765' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_exception' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11766' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_superPage' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11767' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_virtualAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11768' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_virtualAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11769' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_physicalAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11770' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_physicalAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11771' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_allowRead' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11772' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_allowWrite' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11773' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_allowExecute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11774' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_allowUser' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11775' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_exception' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11776' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_superPage' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11777' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_virtualAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11778' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_virtualAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11779' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_physicalAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11780' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_physicalAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11781' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_allowRead' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11782' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_allowWrite' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11783' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_allowExecute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11784' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_allowUser' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11785' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_exception' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11786' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_superPage' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11787' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_virtualAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11788' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_virtualAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11789' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_physicalAddress_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11790' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_physicalAddress_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11791' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_allowRead' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11792' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_allowWrite' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11793' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_allowExecute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11794' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_allowUser' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11795' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_vpn_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11796' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_vpn_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11797' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_portId' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11798' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_V' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11799' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_R' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11800' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_W' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11801' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_X' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11802' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_U' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11803' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_G' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11804' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_A' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11805' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_D' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11806' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_RSW' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11807' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_PPN0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11808' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_pteBuffer_PPN1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11809' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_186_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11810' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_187_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11811' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mtvec_mode' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11812' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mtvec_base' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11813' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mepc' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11814' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mip_MEIP' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11815' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mip_MTIP' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11816' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mip_MSIP' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11817' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mscratch' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11818' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mcause_interrupt' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11819' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mcause_exceptionCode' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11820' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mtval' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11821' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mcycle' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11822' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_minstret' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11823' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sip_SEIP_INPUT' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11824' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_stvec_mode' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11825' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_stvec_base' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11826' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sscratch' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11827' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_scause_interrupt' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11828' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_scause_exceptionCode' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11829' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_stval' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11830' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sepc' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11831' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionContext_code' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11832' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11833' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_interrupt_code' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11834' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_interrupt_targetPrivilege' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11835' with positive edge clock. Creating register for signal `\VexRiscv.\memory_DivPlugin_rs1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11836' with positive edge clock. Creating register for signal `\VexRiscv.\memory_DivPlugin_rs2' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11837' with positive edge clock. Creating register for signal `\VexRiscv.\memory_DivPlugin_accumulator' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11838' with positive edge clock. Creating register for signal `\VexRiscv.\memory_DivPlugin_div_needRevert' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11839' with positive edge clock. Creating register for signal `\VexRiscv.\memory_DivPlugin_div_done' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11840' with positive edge clock. Creating register for signal `\VexRiscv.\memory_DivPlugin_div_result' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11841' with positive edge clock. Creating register for signal `\VexRiscv.\externalInterruptArray_regNext' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11842' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_MUL_LOW' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11843' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_IS_CSR' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11844' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_REGFILE_WRITE_DATA' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11845' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_ENV_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11846' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_ENV_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11847' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_ENV_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11848' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_MEMORY_MANAGMENT' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11849' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_REGFILE_WRITE_VALID' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11850' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_REGFILE_WRITE_VALID' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11851' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_REGFILE_WRITE_VALID' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11852' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_IS_RS2_SIGNED' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11853' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_INSTRUCTION' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11854' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_INSTRUCTION' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11855' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_MEMORY_ADDRESS_LOW' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11856' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_MEMORY_ADDRESS_LOW' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11857' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_BRANCH_CALC' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11858' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_SHIFT_RIGHT' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11859' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_SRC2_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11860' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_ALU_BITWISE_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11861' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_MUL_LL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11862' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_RS2' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11863' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_SRC2_FORCE_ZERO' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11864' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_SRC_LESS_UNSIGNED' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11865' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_MEMORY_AMO' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11866' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_MUL_HL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11867' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_SRC_USE_SUB_LESS' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11868' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_SRC1_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11869' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_BYPASSABLE_MEMORY_STAGE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11870' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_BYPASSABLE_MEMORY_STAGE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11871' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_MUL_HH' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11872' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_MUL_HH' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11873' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_IS_SFENCE_VMA' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11874' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_IS_SFENCE_VMA' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11875' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_IS_SFENCE_VMA' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11876' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_PREDICTION_HAD_BRANCHED2' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11877' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_BRANCH_DO' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11878' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_CSR_READ_OPCODE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11879' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_ALU_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11880' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_SHIFT_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11881' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_SHIFT_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11882' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_PC' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11883' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_PC' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11884' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_PC' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11885' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_MEMORY_WR' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11886' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_MEMORY_WR' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11887' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_MEMORY_WR' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11888' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_MUL_LH' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11889' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_MEMORY_LRSC' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11890' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_MEMORY_ENABLE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11891' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_MEMORY_ENABLE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11892' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_MEMORY_ENABLE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11893' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_CSR_WRITE_OPCODE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11894' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_BRANCH_CTRL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11895' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_FORMAL_PC_NEXT' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11896' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_FORMAL_PC_NEXT' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11897' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_FORMAL_PC_NEXT' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11898' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_IS_DIV' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11899' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_IS_DIV' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11900' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_IS_MUL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11901' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_IS_MUL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11902' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_IS_MUL' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11903' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_BYPASSABLE_EXECUTE_STAGE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11904' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_RS1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11905' with positive edge clock. Creating register for signal `\VexRiscv.\decode_to_execute_IS_RS1_SIGNED' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11906' with positive edge clock. Creating register for signal `\VexRiscv.\iBusWishbone_DAT_MISO_regNext' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11907' with positive edge clock. Creating register for signal `\VexRiscv.\dBusWishbone_DAT_MISO_regNext' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. created $dff cell `$procdff$11908' with positive edge clock. Creating register for signal `\VexRiscv.\execute_arbitration_isValid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11909' with positive edge clock. Creating register for signal `\VexRiscv.\memory_arbitration_isValid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11910' with positive edge clock. Creating register for signal `\VexRiscv.\writeBack_arbitration_isValid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11911' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_fetchPc_pcReg' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11912' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_fetchPc_booted' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11913' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_fetchPc_inc' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11914' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_116_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11915' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_118_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11916' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_injector_nextPcCalc_valids_0' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11917' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_injector_nextPcCalc_valids_1' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11918' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_injector_nextPcCalc_valids_2' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11919' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_injector_nextPcCalc_valids_3' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11920' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_injector_nextPcCalc_valids_4' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11921' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_injector_decodeRemoved' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11922' with positive edge clock. Creating register for signal `\VexRiscv.\IBusCachedPlugin_rspCounter' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11923' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_132_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11924' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_139_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11925' with positive edge clock. Creating register for signal `\VexRiscv.\DBusCachedPlugin_rspCounter' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11926' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_status_sum' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11927' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_status_mxr' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11928' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_status_mprv' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11929' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_satp_mode' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11930' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_0_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11931' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_1_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11932' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_2_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11933' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_cache_3_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11934' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_0_entryToReplace_value' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11935' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_0_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11936' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_1_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11937' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_2_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11938' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_cache_3_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11939' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_ports_1_entryToReplace_value' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11940' with positive edge clock. Creating register for signal `\VexRiscv.\MmuPlugin_shared_state_1_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11941' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_172_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11942' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_185_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11943' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_210_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11944' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mstatus_MIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11945' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mstatus_MPIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11946' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mstatus_MPP' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11947' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mie_MEIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11948' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mie_MTIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11949' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mie_MSIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11950' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_IAM' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11951' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_IAF' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11952' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_II' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11953' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_LAM' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11954' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_LAF' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11955' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_SAM' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11956' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_SAF' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11957' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_EU' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11958' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_ES' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11959' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_IPF' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11960' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_LPF' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11961' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_medeleg_SPF' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11962' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mideleg_ST' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11963' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mideleg_SE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11964' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_mideleg_SS' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11965' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sstatus_SIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11966' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sstatus_SPIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11967' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sstatus_SPP' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11968' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sip_SEIP_SOFT' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11969' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sip_STIP' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11970' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sip_SSIP' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11971' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sie_SEIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11972' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sie_STIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11973' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_sie_SSIE' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11974' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11975' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11976' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11977' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11978' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_interrupt_valid' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11979' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_lastStageWasWfi' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11980' with positive edge clock. Creating register for signal `\VexRiscv.\CsrPlugin_hadException' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11981' with positive edge clock. Creating register for signal `\VexRiscv.\execute_CsrPlugin_wfiWake' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11982' with positive edge clock. Creating register for signal `\VexRiscv.\memory_DivPlugin_div_counter_value' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11983' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_226_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11984' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_228_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11985' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_REGFILE_WRITE_DATA' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11986' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_INSTRUCTION' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11987' with positive edge clock. Creating register for signal `\VexRiscv.\execute_to_memory_IS_DBUS_SHARING' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11988' with positive edge clock. Creating register for signal `\VexRiscv.\memory_to_writeBack_IS_DBUS_SHARING' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11989' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_230_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11990' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_231_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11991' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_232_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11992' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_238_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. created $dff cell `$procdff$11993' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_266_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3204$2817'. created $dff cell `$procdff$11994' with positive edge clock. Creating register for signal `\VexRiscv.\_zz_265_' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3198$2815'. created $dff cell `$procdff$11995' with positive edge clock. Creating register for signal `\VexRiscv.$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_ADDR' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3192$2811'. created $dff cell `$procdff$11996' with positive edge clock. Creating register for signal `\VexRiscv.$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_DATA' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3192$2811'. created $dff cell `$procdff$11997' with positive edge clock. Creating register for signal `\VexRiscv.$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN' using process `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3192$2811'. created $dff cell `$procdff$11998' with positive edge clock. Creating register for signal `\top.\memadr_18' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6107$1927'. created $dff cell `$procdff$11999' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6107$1927'. created $dff cell `$procdff$12000' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6107$1927'. created $dff cell `$procdff$12001' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6107$1927'. created $dff cell `$procdff$12002' with positive edge clock. Creating register for signal `\top.\memadr_17' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6097$1922'. created $dff cell `$procdff$12003' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6097$1922'. created $dff cell `$procdff$12004' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6097$1922'. created $dff cell `$procdff$12005' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6097$1922'. created $dff cell `$procdff$12006' with positive edge clock. Creating register for signal `\top.\memadr_16' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6087$1917'. created $dff cell `$procdff$12007' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6087$1917'. created $dff cell `$procdff$12008' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6087$1917'. created $dff cell `$procdff$12009' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6087$1917'. created $dff cell `$procdff$12010' with positive edge clock. Creating register for signal `\top.\memadr_15' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6077$1912'. created $dff cell `$procdff$12011' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6077$1912'. created $dff cell `$procdff$12012' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6077$1912'. created $dff cell `$procdff$12013' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6077$1912'. created $dff cell `$procdff$12014' with positive edge clock. Creating register for signal `\top.\memadr_14' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6067$1907'. created $dff cell `$procdff$12015' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6067$1907'. created $dff cell `$procdff$12016' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6067$1907'. created $dff cell `$procdff$12017' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6067$1907'. created $dff cell `$procdff$12018' with positive edge clock. Creating register for signal `\top.\memadr_13' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6057$1902'. created $dff cell `$procdff$12019' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6057$1902'. created $dff cell `$procdff$12020' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6057$1902'. created $dff cell `$procdff$12021' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6057$1902'. created $dff cell `$procdff$12022' with positive edge clock. Creating register for signal `\top.\memadr_12' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6047$1897'. created $dff cell `$procdff$12023' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6047$1897'. created $dff cell `$procdff$12024' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6047$1897'. created $dff cell `$procdff$12025' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6047$1897'. created $dff cell `$procdff$12026' with positive edge clock. Creating register for signal `\top.\memadr_11' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6037$1892'. created $dff cell `$procdff$12027' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6037$1892'. created $dff cell `$procdff$12028' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6037$1892'. created $dff cell `$procdff$12029' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6037$1892'. created $dff cell `$procdff$12030' with positive edge clock. Creating register for signal `\top.\memadr_10' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6027$1887'. created $dff cell `$procdff$12031' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6027$1887'. created $dff cell `$procdff$12032' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6027$1887'. created $dff cell `$procdff$12033' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6027$1887'. created $dff cell `$procdff$12034' with positive edge clock. Creating register for signal `\top.\memadr_9' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6017$1882'. created $dff cell `$procdff$12035' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6017$1882'. created $dff cell `$procdff$12036' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6017$1882'. created $dff cell `$procdff$12037' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6017$1882'. created $dff cell `$procdff$12038' with positive edge clock. Creating register for signal `\top.\memadr_8' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6007$1877'. created $dff cell `$procdff$12039' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6007$1877'. created $dff cell `$procdff$12040' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6007$1877'. created $dff cell `$procdff$12041' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6007$1877'. created $dff cell `$procdff$12042' with positive edge clock. Creating register for signal `\top.\memadr_7' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5997$1872'. created $dff cell `$procdff$12043' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5997$1872'. created $dff cell `$procdff$12044' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5997$1872'. created $dff cell `$procdff$12045' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5997$1872'. created $dff cell `$procdff$12046' with positive edge clock. Creating register for signal `\top.\memadr_6' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5987$1867'. created $dff cell `$procdff$12047' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5987$1867'. created $dff cell `$procdff$12048' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5987$1867'. created $dff cell `$procdff$12049' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5987$1867'. created $dff cell `$procdff$12050' with positive edge clock. Creating register for signal `\top.\memadr_5' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5977$1862'. created $dff cell `$procdff$12051' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5977$1862'. created $dff cell `$procdff$12052' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5977$1862'. created $dff cell `$procdff$12053' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5977$1862'. created $dff cell `$procdff$12054' with positive edge clock. Creating register for signal `\top.\memadr_4' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5967$1857'. created $dff cell `$procdff$12055' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5967$1857'. created $dff cell `$procdff$12056' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5967$1857'. created $dff cell `$procdff$12057' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5967$1857'. created $dff cell `$procdff$12058' with positive edge clock. Creating register for signal `\top.\memadr_3' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5957$1852'. created $dff cell `$procdff$12059' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5957$1852'. created $dff cell `$procdff$12060' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5957$1852'. created $dff cell `$procdff$12061' with positive edge clock. Creating register for signal `\top.$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5957$1852'. created $dff cell `$procdff$12062' with positive edge clock. Creating register for signal `\top.\memadr_2' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5892$1846'. created $dff cell `$procdff$12063' with positive edge clock. Creating register for signal `\top.$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5892$1846'. created $dff cell `$procdff$12064' with positive edge clock. Creating register for signal `\top.$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5892$1846'. created $dff cell `$procdff$12065' with positive edge clock. Creating register for signal `\top.$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5892$1846'. created $dff cell `$procdff$12066' with positive edge clock. Creating register for signal `\top.\memdat_8' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5878$1839'. created $dff cell `$procdff$12067' with positive edge clock. Creating register for signal `\top.$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5878$1839'. created $dff cell `$procdff$12068' with positive edge clock. Creating register for signal `\top.$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5878$1839'. created $dff cell `$procdff$12069' with positive edge clock. Creating register for signal `\top.$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5878$1839'. created $dff cell `$procdff$12070' with positive edge clock. Creating register for signal `\top.\memdat_7' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5864$1832'. created $dff cell `$procdff$12071' with positive edge clock. Creating register for signal `\top.$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5864$1832'. created $dff cell `$procdff$12072' with positive edge clock. Creating register for signal `\top.$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5864$1832'. created $dff cell `$procdff$12073' with positive edge clock. Creating register for signal `\top.$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5864$1832'. created $dff cell `$procdff$12074' with positive edge clock. Creating register for signal `\top.\memdat_6' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5850$1825'. created $dff cell `$procdff$12075' with positive edge clock. Creating register for signal `\top.$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5850$1825'. created $dff cell `$procdff$12076' with positive edge clock. Creating register for signal `\top.$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5850$1825'. created $dff cell `$procdff$12077' with positive edge clock. Creating register for signal `\top.$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5850$1825'. created $dff cell `$procdff$12078' with positive edge clock. Creating register for signal `\top.\memdat_5' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5836$1818'. created $dff cell `$procdff$12079' with positive edge clock. Creating register for signal `\top.$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5836$1818'. created $dff cell `$procdff$12080' with positive edge clock. Creating register for signal `\top.$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5836$1818'. created $dff cell `$procdff$12081' with positive edge clock. Creating register for signal `\top.$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5836$1818'. created $dff cell `$procdff$12082' with positive edge clock. Creating register for signal `\top.\memdat_4' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5826$1816'. created $dff cell `$procdff$12083' with positive edge clock. Creating register for signal `\top.\memdat_3' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5820$1811'. created $dff cell `$procdff$12084' with positive edge clock. Creating register for signal `\top.$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5820$1811'. created $dff cell `$procdff$12085' with positive edge clock. Creating register for signal `\top.$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5820$1811'. created $dff cell `$procdff$12086' with positive edge clock. Creating register for signal `\top.$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5820$1811'. created $dff cell `$procdff$12087' with positive edge clock. Creating register for signal `\top.\memdat_2' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5809$1809'. created $dff cell `$procdff$12088' with positive edge clock. Creating register for signal `\top.\memdat_1' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5803$1804'. created $dff cell `$procdff$12089' with positive edge clock. Creating register for signal `\top.$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5803$1804'. created $dff cell `$procdff$12090' with positive edge clock. Creating register for signal `\top.$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5803$1804'. created $dff cell `$procdff$12091' with positive edge clock. Creating register for signal `\top.$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5803$1804'. created $dff cell `$procdff$12092' with positive edge clock. Creating register for signal `\top.\memadr_1' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5790$1802'. created $dff cell `$procdff$12093' with positive edge clock. Creating register for signal `\top.\memadr' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12094' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12095' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12096' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12097' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12098' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12099' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12100' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12101' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12102' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12103' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_ADDR' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12104' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_DATA' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12105' with positive edge clock. Creating register for signal `\top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. created $dff cell `$procdff$12106' with positive edge clock. Creating register for signal `\top.\memdat' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5758$1786'. created $dff cell `$procdff$12107' with positive edge clock. Creating register for signal `\top.\serial_tx' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12108' with positive edge clock. Creating register for signal `\top.\spisdcard_clk' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12109' with positive edge clock. Creating register for signal `\top.\spisdcard_mosi' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12110' with positive edge clock. Creating register for signal `\top.\spisdcard_cs_n' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12111' with positive edge clock. Creating register for signal `\top.\main_soclinux_soccontroller_reset_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12112' with positive edge clock. Creating register for signal `\top.\main_soclinux_soccontroller_reset_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12113' with positive edge clock. Creating register for signal `\top.\main_soclinux_soccontroller_scratch_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12114' with positive edge clock. Creating register for signal `\top.\main_soclinux_soccontroller_scratch_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12115' with positive edge clock. Creating register for signal `\top.\main_soclinux_soccontroller_bus_errors' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12116' with positive edge clock. Creating register for signal `\top.\main_soclinux_cpu_time_status' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12117' with positive edge clock. Creating register for signal `\top.\main_soclinux_cpu_time_cmp_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12118' with positive edge clock. Creating register for signal `\top.\main_soclinux_cpu_time_cmp_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12119' with positive edge clock. Creating register for signal `\top.\main_soclinux_cpu_time' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12120' with positive edge clock. Creating register for signal `\top.\main_soclinux_cpu_time_cmp' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12121' with positive edge clock. Creating register for signal `\top.\main_soclinux_soclinux_ram_bus_ack' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12122' with positive edge clock. Creating register for signal `\top.\main_soclinux_ram_bus_ram_bus_ack' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12123' with positive edge clock. Creating register for signal `\top.\main_soclinux_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12124' with positive edge clock. Creating register for signal `\top.\main_soclinux_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12125' with positive edge clock. Creating register for signal `\top.\main_soclinux_sink_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12126' with positive edge clock. Creating register for signal `\top.\main_soclinux_tx_clken' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12127' with positive edge clock. Creating register for signal `\top.\main_soclinux_tx_clkphase' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12128' with positive edge clock. Creating register for signal `\top.\main_soclinux_tx_reg' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12129' with positive edge clock. Creating register for signal `\top.\main_soclinux_tx_bitcount' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12130' with positive edge clock. Creating register for signal `\top.\main_soclinux_tx_busy' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12131' with positive edge clock. Creating register for signal `\top.\main_soclinux_source_valid' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12132' with positive edge clock. Creating register for signal `\top.\main_soclinux_source_payload_data' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12133' with positive edge clock. Creating register for signal `\top.\main_soclinux_rx_clken' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12134' with positive edge clock. Creating register for signal `\top.\main_soclinux_rx_clkphase' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12135' with positive edge clock. Creating register for signal `\top.\main_soclinux_rx_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12136' with positive edge clock. Creating register for signal `\top.\main_soclinux_rx_reg' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12137' with positive edge clock. Creating register for signal `\top.\main_soclinux_rx_bitcount' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12138' with positive edge clock. Creating register for signal `\top.\main_soclinux_rx_busy' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12139' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_tx_pending' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12140' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_tx_old_trigger' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12141' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_rx_pending' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12142' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_rx_old_trigger' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12143' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_eventmanager_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12144' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_eventmanager_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12145' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_tx_fifo_readable' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12146' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_tx_fifo_level0' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12147' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_tx_fifo_produce' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12148' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_tx_fifo_consume' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12149' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_rx_fifo_readable' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12150' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_rx_fifo_level0' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12151' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_rx_fifo_produce' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12152' with positive edge clock. Creating register for signal `\top.\main_soclinux_uart_rx_fifo_consume' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12153' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_load_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12154' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_load_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12155' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_reload_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12156' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_reload_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12157' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_en_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12158' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_en_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12159' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_update_value_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12160' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_update_value_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12161' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_value_status' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12162' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_zero_pending' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12163' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_zero_old_trigger' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12164' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_eventmanager_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12165' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_eventmanager_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12166' with positive edge clock. Creating register for signal `\top.\main_soclinux_timer_value' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12167' with positive edge clock. Creating register for signal `\top.\main_dfi_p0_rddata_valid' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12168' with positive edge clock. Creating register for signal `\top.\main_rddata_en' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12169' with positive edge clock. Creating register for signal `\top.\main_sdram_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12170' with positive edge clock. Creating register for signal `\top.\main_sdram_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12171' with positive edge clock. Creating register for signal `\top.\main_sdram_command_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12172' with positive edge clock. Creating register for signal `\top.\main_sdram_command_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12173' with positive edge clock. Creating register for signal `\top.\main_sdram_address_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12174' with positive edge clock. Creating register for signal `\top.\main_sdram_address_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12175' with positive edge clock. Creating register for signal `\top.\main_sdram_baddress_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12176' with positive edge clock. Creating register for signal `\top.\main_sdram_baddress_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12177' with positive edge clock. Creating register for signal `\top.\main_sdram_wrdata_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12178' with positive edge clock. Creating register for signal `\top.\main_sdram_wrdata_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12179' with positive edge clock. Creating register for signal `\top.\main_sdram_rddata_status' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12180' with positive edge clock. Creating register for signal `\top.\main_sdram_dfi_p0_address' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12181' with positive edge clock. Creating register for signal `\top.\main_sdram_dfi_p0_bank' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12182' with positive edge clock. Creating register for signal `\top.\main_sdram_dfi_p0_cas_n' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12183' with positive edge clock. Creating register for signal `\top.\main_sdram_dfi_p0_cs_n' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12184' with positive edge clock. Creating register for signal `\top.\main_sdram_dfi_p0_ras_n' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12185' with positive edge clock. Creating register for signal `\top.\main_sdram_dfi_p0_we_n' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12186' with positive edge clock. Creating register for signal `\top.\main_sdram_dfi_p0_wrdata_en' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12187' with positive edge clock. Creating register for signal `\top.\main_sdram_dfi_p0_rddata_en' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12188' with positive edge clock. Creating register for signal `\top.\main_sdram_cmd_payload_a' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12189' with positive edge clock. Creating register for signal `\top.\main_sdram_cmd_payload_ba' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12190' with positive edge clock. Creating register for signal `\top.\main_sdram_cmd_payload_cas' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12191' with positive edge clock. Creating register for signal `\top.\main_sdram_cmd_payload_ras' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12192' with positive edge clock. Creating register for signal `\top.\main_sdram_cmd_payload_we' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12193' with positive edge clock. Creating register for signal `\top.\main_sdram_timer_count1' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12194' with positive edge clock. Creating register for signal `\top.\main_sdram_postponer_req_o' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12195' with positive edge clock. Creating register for signal `\top.\main_sdram_postponer_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12196' with positive edge clock. Creating register for signal `\top.\main_sdram_sequencer_done1' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12197' with positive edge clock. Creating register for signal `\top.\main_sdram_sequencer_counter' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12198' with positive edge clock. Creating register for signal `\top.\main_sdram_sequencer_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12199' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_level' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12200' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_produce' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12201' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_cmd_buffer_lookahead_consume' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12202' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_cmd_buffer_source_valid' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12203' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_cmd_buffer_source_first' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12204' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_cmd_buffer_source_last' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12205' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_cmd_buffer_source_payload_we' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12206' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_cmd_buffer_source_payload_addr' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12207' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_row' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12208' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_row_opened' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12209' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_twtpcon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12210' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_twtpcon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12211' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_trccon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12212' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_trccon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12213' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_trascon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12214' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine0_trascon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12215' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_level' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12216' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_produce' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12217' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_cmd_buffer_lookahead_consume' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12218' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_cmd_buffer_source_valid' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12219' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_cmd_buffer_source_first' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12220' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_cmd_buffer_source_last' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12221' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_cmd_buffer_source_payload_we' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12222' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_cmd_buffer_source_payload_addr' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12223' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_row' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12224' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_row_opened' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12225' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_twtpcon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12226' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_twtpcon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12227' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_trccon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12228' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_trccon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12229' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_trascon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12230' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine1_trascon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12231' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_level' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12232' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_produce' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12233' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_cmd_buffer_lookahead_consume' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12234' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_cmd_buffer_source_valid' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12235' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_cmd_buffer_source_first' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12236' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_cmd_buffer_source_last' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12237' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_cmd_buffer_source_payload_we' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12238' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_cmd_buffer_source_payload_addr' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12239' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_row' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12240' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_row_opened' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12241' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_twtpcon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12242' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_twtpcon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12243' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_trccon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12244' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_trccon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12245' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_trascon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12246' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine2_trascon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12247' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_level' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12248' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_produce' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12249' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_cmd_buffer_lookahead_consume' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12250' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_cmd_buffer_source_valid' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12251' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_cmd_buffer_source_first' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12252' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_cmd_buffer_source_last' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12253' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_cmd_buffer_source_payload_we' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12254' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_cmd_buffer_source_payload_addr' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12255' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_row' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12256' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_row_opened' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12257' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_twtpcon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12258' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_twtpcon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12259' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_trccon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12260' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_trccon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12261' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_trascon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12262' with positive edge clock. Creating register for signal `\top.\main_sdram_bankmachine3_trascon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12263' with positive edge clock. Creating register for signal `\top.\main_sdram_choose_cmd_grant' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12264' with positive edge clock. Creating register for signal `\top.\main_sdram_choose_req_grant' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12265' with positive edge clock. Creating register for signal `\top.\main_sdram_trrdcon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12266' with positive edge clock. Creating register for signal `\top.\main_sdram_trrdcon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12267' with positive edge clock. Creating register for signal `\top.\main_sdram_tccdcon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12268' with positive edge clock. Creating register for signal `\top.\main_sdram_tccdcon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12269' with positive edge clock. Creating register for signal `\top.\main_sdram_twtrcon_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12270' with positive edge clock. Creating register for signal `\top.\main_sdram_twtrcon_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12271' with positive edge clock. Creating register for signal `\top.\main_sdram_time0' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12272' with positive edge clock. Creating register for signal `\top.\main_sdram_time1' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12273' with positive edge clock. Creating register for signal `\top.\main_adr_offset_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12274' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12275' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_wdata_converter_converter_mux' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12276' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_rdata_converter_converter_source_first' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12277' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_rdata_converter_converter_source_last' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12278' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_rdata_converter_converter_source_payload_data' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12279' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_rdata_converter_converter_source_payload_valid_token_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12280' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_rdata_converter_converter_demux' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12281' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_rdata_converter_converter_strobe_all' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12282' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_cmd_consumed' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12283' with positive edge clock. Creating register for signal `\top.\main_wishbone_bridge_wdata_consumed' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12284' with positive edge clock. Creating register for signal `\top.\main_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12285' with positive edge clock. Creating register for signal `\top.\main_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12286' with positive edge clock. Creating register for signal `\top.\main_chaser' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12287' with positive edge clock. Creating register for signal `\top.\main_mode' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12288' with positive edge clock. Creating register for signal `\top.\main_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12289' with positive edge clock. Creating register for signal `\top.\soclinux_miso' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12290' with positive edge clock. Creating register for signal `\top.\soclinux_control_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12291' with positive edge clock. Creating register for signal `\top.\soclinux_control_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12292' with positive edge clock. Creating register for signal `\top.\soclinux_mosi_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12293' with positive edge clock. Creating register for signal `\top.\soclinux_mosi_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12294' with positive edge clock. Creating register for signal `\top.\soclinux_cs_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12295' with positive edge clock. Creating register for signal `\top.\soclinux_cs_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12296' with positive edge clock. Creating register for signal `\top.\soclinux_loopback_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12297' with positive edge clock. Creating register for signal `\top.\soclinux_loopback_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12298' with positive edge clock. Creating register for signal `\top.\soclinux_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12299' with positive edge clock. Creating register for signal `\top.\soclinux_clk_divider1' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12300' with positive edge clock. Creating register for signal `\top.\soclinux_mosi_data' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12301' with positive edge clock. Creating register for signal `\top.\soclinux_mosi_sel' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12302' with positive edge clock. Creating register for signal `\top.\soclinux_miso_data' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12303' with positive edge clock. Creating register for signal `\top.\soclinux_storage' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12304' with positive edge clock. Creating register for signal `\top.\soclinux_re' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12305' with positive edge clock. Creating register for signal `\top.\builder_refresher_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12306' with positive edge clock. Creating register for signal `\top.\builder_bankmachine0_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12307' with positive edge clock. Creating register for signal `\top.\builder_bankmachine1_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12308' with positive edge clock. Creating register for signal `\top.\builder_bankmachine2_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12309' with positive edge clock. Creating register for signal `\top.\builder_bankmachine3_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12310' with positive edge clock. Creating register for signal `\top.\builder_multiplexer_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12311' with positive edge clock. Creating register for signal `\top.\builder_new_master_wdata_ready' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12312' with positive edge clock. Creating register for signal `\top.\builder_new_master_rdata_valid0' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12313' with positive edge clock. Creating register for signal `\top.\builder_new_master_rdata_valid1' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12314' with positive edge clock. Creating register for signal `\top.\builder_new_master_rdata_valid2' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12315' with positive edge clock. Creating register for signal `\top.\builder_new_master_rdata_valid3' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12316' with positive edge clock. Creating register for signal `\top.\builder_fullmemorywe_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12317' with positive edge clock. Creating register for signal `\top.\builder_litedramwishbone2native_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12318' with positive edge clock. Creating register for signal `\top.\builder_spimaster_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12319' with positive edge clock. Creating register for signal `\top.\builder_soclinux_adr' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12320' with positive edge clock. Creating register for signal `\top.\builder_soclinux_we' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12321' with positive edge clock. Creating register for signal `\top.\builder_soclinux_dat_w' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12322' with positive edge clock. Creating register for signal `\top.\builder_grant' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12323' with positive edge clock. Creating register for signal `\top.\builder_slave_sel_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12324' with positive edge clock. Creating register for signal `\top.\builder_count' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12325' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_interface0_bank_bus_dat_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12326' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_interface1_bank_bus_dat_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12327' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_sel_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12328' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_interface2_bank_bus_dat_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12329' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_interface3_bank_bus_dat_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12330' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_interface4_bank_bus_dat_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12331' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_interface5_bank_bus_dat_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12332' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_interface6_bank_bus_dat_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12333' with positive edge clock. Creating register for signal `\top.\builder_csr_bankarray_interface7_bank_bus_dat_r' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12334' with positive edge clock. Creating register for signal `\top.\builder_state' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12335' with positive edge clock. Creating register for signal `\top.\builder_regs0' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12336' with positive edge clock. Creating register for signal `\top.\builder_regs1' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. created $dff cell `$procdff$12337' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate0_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12338' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate1_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12339' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate2_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12340' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate3_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12341' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate4_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12342' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate5_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12343' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate6_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12344' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate7_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12345' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate8_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12346' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate9_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12347' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate10_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12348' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate11_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12349' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate12_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12350' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate13_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12351' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate14_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12352' with positive edge clock. Creating register for signal `\top.\builder_inferedsdrtristate15_oe' using process `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. created $dff cell `$procdff$12353' with positive edge clock. 4.5.9. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `TRELLIS_FF.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$230'. Found and cleaned up 2 empty switches in `\TRELLIS_FF.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:350$226'. Removing empty process `TRELLIS_FF.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:350$226'. Removing empty process `DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$223'. Found and cleaned up 1 empty switch in `\DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285$202'. Removing empty process `DPR16X4C.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:285$202'. Removing empty process `TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:0$169'. Found and cleaned up 1 empty switch in `\TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221$147'. Removing empty process `TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:221$147'. Removing empty process `TRELLIS_DPR16X4.$proc$/usr/local/bin/../share/yosys/ecp5/cells_sim.v:213$146'. Found and cleaned up 7 empty switches in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:309$3885'. Found and cleaned up 10 empty switches in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:271$3882'. Found and cleaned up 1 empty switch in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:226$3860'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:226$3860'. Found and cleaned up 3 empty switches in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:210$3855'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:210$3855'. Found and cleaned up 2 empty switches in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:201$3853'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:201$3853'. Found and cleaned up 1 empty switch in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:193$3852'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:193$3852'. Found and cleaned up 1 empty switch in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:186$3851'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:186$3851'. Found and cleaned up 1 empty switch in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:180$3849'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:180$3849'. Found and cleaned up 1 empty switch in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:174$3845'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:174$3845'. Found and cleaned up 1 empty switch in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:168$3843'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:168$3843'. Found and cleaned up 1 empty switch in `\InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:162$3839'. Removing empty process `InstructionCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:162$3839'. Found and cleaned up 13 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1125$3815'. Found and cleaned up 11 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1059$3799'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1052$3797'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1052$3797'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1042$3794'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1042$3794'. Found and cleaned up 2 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1030$3792'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1030$3792'. Found and cleaned up 3 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1017$3789'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1017$3789'. Found and cleaned up 3 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1002$3788'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1002$3788'. Found and cleaned up 3 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:987$3787'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:987$3787'. Found and cleaned up 3 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:972$3786'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:972$3786'. Found and cleaned up 11 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:936$3783'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:936$3783'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:924$3762'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:924$3762'. Found and cleaned up 6 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:905$3759'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:905$3759'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:885$3754'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:885$3754'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:873$3747'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:873$3747'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:866$3746'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:866$3746'. Found and cleaned up 11 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:832$3742'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:832$3742'. Found and cleaned up 5 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:816$3739'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:816$3739'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:806$3736'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:806$3736'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:782$3717'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:782$3717'. Found and cleaned up 4 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:768$3715'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:768$3715'. Found and cleaned up 4 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:754$3713'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:754$3713'. Found and cleaned up 4 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:740$3711'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:740$3711'. Found and cleaned up 4 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:726$3709'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:726$3709'. Found and cleaned up 9 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:699$3706'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:699$3706'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:692$3705'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:692$3705'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:685$3703'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:685$3703'. Found and cleaned up 2 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:675$3702'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:675$3702'. Found and cleaned up 2 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:665$3701'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:665$3701'. Found and cleaned up 2 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:655$3700'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:655$3700'. Found and cleaned up 3 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:642$3699'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:642$3699'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:635$3698'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:635$3698'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:628$3697'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:628$3697'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:621$3696'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:621$3696'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:614$3695'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:614$3695'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:599$3689'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:599$3689'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:592$3687'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:592$3687'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:583$3682'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:583$3682'. Found and cleaned up 4 empty switches in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:568$3665'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:565$3664'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:559$3662'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:559$3662'. Found and cleaned up 1 empty switch in `\DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:553$3658'. Removing empty process `DataCache.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:553$3658'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2485$3615'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2484$3614'. Found and cleaned up 122 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7264$3478'. Found and cleaned up 108 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6705$3420'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6677$3408'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6677$3408'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6670$3407'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6670$3407'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6608$3346'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6591$3338'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6591$3338'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6582$3335'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6582$3335'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6573$3334'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6573$3334'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6547$3325'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6547$3325'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6533$3324'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6533$3324'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6519$3319'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6519$3319'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6505$3318'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6505$3318'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6381$3305'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6381$3305'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6360$3304'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6360$3304'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6350$3303'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6350$3303'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6341$3299'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6341$3299'. Found and cleaned up 15 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6219$3294'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6219$3294'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6211$3292'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6211$3292'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6194$3282'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6194$3282'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6180$3281'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6180$3281'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6173$3280'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6173$3280'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6166$3279'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6166$3279'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6155$3272'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6155$3272'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6140$3270'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6140$3270'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6130$3269'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6130$3269'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6120$3268'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6120$3268'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6110$3267'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6110$3267'. Found and cleaned up 13 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6039$3240'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6039$3240'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6023$3232'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6023$3232'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5993$3226'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5978$3225'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5963$3222'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5963$3222'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5940$3221'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5928$3220'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5928$3220'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5912$3215'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5912$3215'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5890$3214'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5875$3213'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5851$3212'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5832$3211'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5832$3211'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5820$3204'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5820$3204'. Found and cleaned up 10 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5782$3194'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5782$3194'. Found and cleaned up 10 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5754$3192'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5754$3192'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5719$3191'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5682$3188'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5670$3184'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5670$3184'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5652$3183'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5652$3183'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5629$3182'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5605$3181'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5586$3180'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5586$3180'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5570$3177'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5570$3177'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5556$3173'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5556$3173'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5547$3171'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5547$3171'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5474$3133'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5474$3133'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5454$3132'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5454$3132'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5432$3119'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5432$3119'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5424$3108'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5424$3108'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5416$3107'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5416$3107'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5408$3106'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5408$3106'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5400$3103'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5400$3103'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5392$3101'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5392$3101'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5382$3093'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5382$3093'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5375$3091'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5375$3091'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5363$3088'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5363$3088'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5335$3058'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5335$3058'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5327$3047'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5327$3047'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5319$3046'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5319$3046'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5311$3045'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5311$3045'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5303$3042'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5303$3042'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5295$3040'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5295$3040'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5283$3029'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5283$3029'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5276$3027'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5276$3027'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5264$3024'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5264$3024'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5231$2993'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5231$2993'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5220$2991'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5220$2991'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5206$2990'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5206$2990'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5186$2989'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5157$2986'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5139$2983'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5139$2983'. Found and cleaned up 4 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5124$2981'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5124$2981'. Found and cleaned up 5 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5105$2980'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5105$2980'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5095$2979'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5095$2979'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5086$2976'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5086$2976'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5078$2973'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5078$2973'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5071$2972'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5071$2972'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5061$2970'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5061$2970'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5049$2969'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5049$2969'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5037$2968'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5037$2968'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5027$2966'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5027$2966'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5018$2965'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5018$2965'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5004$2964'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5004$2964'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4995$2963'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4995$2963'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4986$2962'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4986$2962'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4975$2960'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4975$2960'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4928$2947'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4928$2947'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4918$2946'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4918$2946'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4908$2943'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4908$2943'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4895$2942'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4895$2942'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4879$2931'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4855$2927'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4840$2926'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4827$2924'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4827$2924'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4805$2923'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4790$2922'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4782$2917'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4782$2917'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4760$2916'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4743$2910'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4743$2910'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4723$2899'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4723$2899'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4712$2895'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4712$2895'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4701$2891'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4701$2891'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4686$2887'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4686$2887'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4679$2886'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4679$2886'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4672$2885'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4672$2885'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4642$2879'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4642$2879'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4632$2878'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4632$2878'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4625$2876'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4625$2876'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4615$2873'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4615$2873'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4602$2871'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4602$2871'. Found and cleaned up 4 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4582$2870'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4582$2870'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4575$2869'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4575$2869'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4565$2868'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4565$2868'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4557$2867'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4557$2867'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4547$2866'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4547$2866'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4536$2865'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4536$2865'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4526$2864'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4526$2864'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4519$2863'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4519$2863'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4508$2862'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4508$2862'. Found and cleaned up 6 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4487$2856'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4487$2856'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4477$2855'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4477$2855'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4466$2854'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4466$2854'. Found and cleaned up 4 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4450$2843'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4450$2843'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4443$2840'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4443$2840'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4430$2839'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4430$2839'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4423$2838'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4423$2838'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4414$2837'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4414$2837'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4407$2836'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4407$2836'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4400$2835'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4400$2835'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4393$2834'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4393$2834'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4360$2831'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4360$2831'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4348$2829'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4348$2829'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4340$2828'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4340$2828'. Found and cleaned up 3 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4303$2827'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4303$2827'. Found and cleaned up 11 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4272$2825'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4272$2825'. Found and cleaned up 11 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4242$2823'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4242$2823'. Found and cleaned up 2 empty switches in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4226$2822'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4226$2822'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3390$2821'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3333$2820'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3313$2819'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3313$2819'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3204$2817'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3204$2817'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3198$2815'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3198$2815'. Found and cleaned up 1 empty switch in `\VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3192$2811'. Removing empty process `VexRiscv.$proc$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3192$2811'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1534$2487'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1530$2486'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1526$2485'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1522$2484'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1518$2483'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1514$2482'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1510$2481'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1506$2480'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1502$2479'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1498$2478'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1494$2477'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1490$2476'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1485$2475'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1484$2474'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1483$2473'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1482$2472'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1481$2471'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1480$2470'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1479$2469'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1478$2468'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1477$2467'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1476$2466'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1475$2465'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1474$2464'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1473$2463'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1472$2462'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1471$2461'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1470$2460'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1469$2459'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1468$2458'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1467$2457'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1466$2456'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1465$2455'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1464$2454'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1463$2453'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1462$2452'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1461$2451'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1460$2450'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1459$2449'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1458$2448'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1457$2447'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1456$2446'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1455$2445'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1454$2444'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1453$2443'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1452$2442'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1451$2441'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1450$2440'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1449$2439'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1448$2438'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1447$2437'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1446$2436'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1445$2435'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1444$2434'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1443$2433'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1442$2432'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1441$2431'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1440$2430'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1439$2429'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1438$2428'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1437$2427'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1436$2426'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1435$2425'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1434$2424'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1433$2423'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1432$2422'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1431$2421'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1430$2420'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1408$2419'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1383$2418'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1318$2417'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1277$2416'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1236$2415'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1227$2414'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1223$2413'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1219$2412'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1178$2411'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1109$2410'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1105$2409'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1102$2408'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1101$2407'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1100$2406'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1099$2405'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1093$2404'. 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Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:433$2115'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:432$2114'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:431$2113'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:430$2112'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:429$2111'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:428$2110'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:427$2109'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:426$2108'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:425$2107'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:422$2106'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:420$2105'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:418$2104'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:414$2103'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:413$2102'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:412$2101'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:411$2100'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:410$2099'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:409$2098'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:407$2097'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:406$2096'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:375$2095'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:374$2094'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:373$2093'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:372$2092'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:371$2091'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:370$2090'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:369$2089'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:368$2088'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:364$2087'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:363$2086'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:362$2085'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:361$2084'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:354$2083'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:353$2082'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:352$2081'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:351$2080'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:350$2079'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:349$2078'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:348$2077'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:347$2076'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:346$2075'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:345$2074'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:344$2073'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:343$2072'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:342$2071'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:341$2070'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:340$2069'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:339$2068'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:324$2067'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:323$2066'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:318$2065'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:314$2064'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:313$2063'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:312$2062'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:311$2061'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:308$2060'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:307$2059'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:282$2058'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:281$2057'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:280$2056'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:271$2055'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:270$2054'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:268$2053'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:263$2052'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:262$2051'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:261$2050'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:260$2049'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:259$2048'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:258$2047'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:257$2046'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:256$2045'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:255$2044'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:254$2043'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:239$2042'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:238$2041'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:237$2040'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:236$2039'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:235$2038'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:228$2037'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:202$2036'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:201$2035'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:200$2034'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:199$2033'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:198$2032'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:191$2031'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:183$2030'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:182$2029'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:163$2028'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:162$2027'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:161$2026'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:157$2025'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:153$2024'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:152$2023'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:150$2022'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:148$2021'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:147$2020'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:145$2019'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:132$2018'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:131$2017'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:130$2016'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:129$2015'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:127$2014'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:126$2013'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:125$2012'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:124$2011'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:123$2010'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:121$2009'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:120$2008'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:119$2007'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:118$2006'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:117$2005'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:116$2004'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:112$2003'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:110$2002'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:109$2001'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:107$2000'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:104$1999'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:100$1998'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:91$1997'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:87$1996'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:80$1995'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:79$1994'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:78$1993'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:76$1992'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:75$1991'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:72$1990'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:71$1989'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:45$1988'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:43$1987'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:37$1986'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:36$1985'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:35$1984'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:34$1983'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6107$1927'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6107$1927'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6097$1922'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6097$1922'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6087$1917'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6087$1917'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6077$1912'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6077$1912'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6067$1907'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6067$1907'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6057$1902'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6057$1902'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6047$1897'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6047$1897'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6037$1892'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6037$1892'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6027$1887'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6027$1887'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6017$1882'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6017$1882'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6007$1877'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6007$1877'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5997$1872'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5997$1872'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5987$1867'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5987$1867'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5977$1862'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5977$1862'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5967$1857'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5967$1857'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5957$1852'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5957$1852'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5892$1846'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5892$1846'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1550$2491'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5878$1839'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5878$1839'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1546$2490'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5864$1832'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5864$1832'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1542$2489'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5850$1825'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5850$1825'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1538$2488'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5836$1818'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5836$1818'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5826$1816'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5826$1816'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5820$1811'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5820$1811'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5809$1809'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5809$1809'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5803$1804'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5803$1804'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5790$1802'. Found and cleaned up 4 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5770$1788'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5758$1786'. Found and cleaned up 264 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4243$1561'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4224$1560'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4177$1559'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4177$1559'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4160$1552'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4160$1552'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4143$1545'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4143$1545'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4126$1538'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4126$1538'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4109$1531'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4109$1531'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4092$1524'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4092$1524'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4075$1523'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4058$1522'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4058$1522'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4047$1521'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4047$1521'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4036$1520'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4036$1520'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4025$1519'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4025$1519'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4014$1518'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4014$1518'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4003$1517'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4003$1517'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3992$1516'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3981$1515'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3970$1514'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3962$1500'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3954$1499'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3946$1498'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3938$1484'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3930$1483'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3922$1482'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3914$1468'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3906$1467'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3898$1466'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3890$1452'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3882$1451'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3874$1450'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3857$1449'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3857$1449'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3840$1448'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3840$1448'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3823$1447'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3823$1447'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3806$1446'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3806$1446'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3789$1445'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3789$1445'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3772$1444'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3772$1444'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3755$1443'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3755$1443'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3738$1442'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3721$1441'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3721$1441'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3704$1440'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3704$1440'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3687$1439'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3687$1439'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3670$1438'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3670$1438'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3653$1437'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3653$1437'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3636$1436'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3636$1436'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3619$1435'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3619$1435'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3602$1434'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3602$1434'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3585$1433'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3568$1432'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3568$1432'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3390$1217'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3390$1217'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3304$1073'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3181$876'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3140$861'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3088$849'. Found and cleaned up 6 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3039$845'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3013$838'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2983$833'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2932$832'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2897$826'. Found and cleaned up 4 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2861$821'. Found and cleaned up 7 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2781$795'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2759$794'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2744$782'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2724$781'. Found and cleaned up 9 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2616$634'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2603$625'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2603$625'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2594$618'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2594$618'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2585$611'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2585$611'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2576$604'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2576$604'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2570$603'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2570$603'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2564$602'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2564$602'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2558$601'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2558$601'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2544$548'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2537$545'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2537$545'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2531$544'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2531$544'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2525$543'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2525$543'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2511$490'. Found and cleaned up 14 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2404$447'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2388$438'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2388$438'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2366$434'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2366$434'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2355$425'. Found and cleaned up 14 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2253$417'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2237$408'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2237$408'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2215$404'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2215$404'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2204$395'. Found and cleaned up 14 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2102$387'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2086$378'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2086$378'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2064$374'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2064$374'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2053$365'. Found and cleaned up 14 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1951$357'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1935$348'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1935$348'. Found and cleaned up 2 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1913$344'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1913$344'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1902$335'. Found and cleaned up 4 empty switches in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1857$331'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1798$318'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1740$317'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1694$313'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1694$313'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1676$305'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1646$294'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1624$286'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1618$284'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1618$284'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1613$283'. Found and cleaned up 1 empty switch in `\top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1607$281'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1607$281'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1567$260'. Removing empty process `top.$proc$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1557$258'. Cleaned up 1119 empty switches. 4.6. Executing FLATTEN pass (flatten design). Deleting now unused module InstructionCache. Deleting now unused module DataCache. Deleting now unused module VexRiscv. 4.7. Executing TRIBUF pass. 4.8. Executing DEMINOUT pass (demote inout ports to input or output). 4.9. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.10. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 1015 unused cells and 6955 unused wires. 4.11. Executing CHECK pass (checking for obvious problems). checking module top.. found and reported 0 problems. 4.12. Executing OPT pass (performing simple optimizations). 4.12.1. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.12.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 1090 cells. 4.12.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Replacing known input bits on port B of cell $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3930: \VexRiscv.IBusCachedPlugin_cache.lineLoader_flushCounter -> { 1'1 \VexRiscv.IBusCachedPlugin_cache.lineLoader_flushCounter [6:0] } Replacing known input bits on port A of cell $flatten\VexRiscv.\dataCache_1_.$procmux$4072: \VexRiscv.dataCache_1_.stageB_flusher_valid -> 1'0 Replacing known input bits on port B of cell $flatten\VexRiscv.\dataCache_1_.$procmux$4070: \VexRiscv.dataCache_1_.stageB_flusher_valid -> 1'1 Replacing known input bits on port B of cell $flatten\VexRiscv.\dataCache_1_.$procmux$4704: \VexRiscv.dataCache_1_.stageB_flusher_valid -> 1'1 Replacing known input bits on port A of cell $procmux$10380: \builder_litedramwishbone2native_state -> 1'1 Replacing known input bits on port A of cell $procmux$10378: \builder_litedramwishbone2native_state -> 1'1 Replacing known input bits on port A of cell $procmux$10375: \builder_litedramwishbone2native_state -> 1'0 Replacing known input bits on port A of cell $procmux$9119: \builder_grant -> 1'0 Replacing known input bits on port B of cell $procmux$9117: \builder_grant -> 1'1 Replacing known input bits on port A of cell $procmux$9115: \builder_grant -> 1'1 Replacing known input bits on port B of cell $procmux$9123: \builder_grant -> 1'0 Replacing known input bits on port A of cell $procmux$9121: \builder_grant -> 1'0 Replacing known input bits on port B of cell $procmux$9287: \main_sdram_twtrcon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9285: \main_sdram_twtrcon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9303: \main_sdram_tccdcon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9301: \main_sdram_tccdcon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9319: \main_sdram_trrdcon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9317: \main_sdram_trrdcon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9417: \main_sdram_bankmachine3_trascon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9415: \main_sdram_bankmachine3_trascon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9433: \main_sdram_bankmachine3_trccon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9431: \main_sdram_bankmachine3_trccon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9449: \main_sdram_bankmachine3_twtpcon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9447: \main_sdram_bankmachine3_twtpcon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9512: \main_sdram_bankmachine2_trascon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9510: \main_sdram_bankmachine2_trascon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9528: \main_sdram_bankmachine2_trccon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9526: \main_sdram_bankmachine2_trccon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9544: \main_sdram_bankmachine2_twtpcon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9542: \main_sdram_bankmachine2_twtpcon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9607: \main_sdram_bankmachine1_trascon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9605: \main_sdram_bankmachine1_trascon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9623: \main_sdram_bankmachine1_trccon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9621: \main_sdram_bankmachine1_trccon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9639: \main_sdram_bankmachine1_twtpcon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9637: \main_sdram_bankmachine1_twtpcon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9702: \main_sdram_bankmachine0_trascon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9700: \main_sdram_bankmachine0_trascon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9718: \main_sdram_bankmachine0_trccon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9716: \main_sdram_bankmachine0_trccon_ready -> 1'0 Replacing known input bits on port B of cell $procmux$9734: \main_sdram_bankmachine0_twtpcon_ready -> 1'1 Replacing known input bits on port A of cell $procmux$9732: \main_sdram_bankmachine0_twtpcon_ready -> 1'0 Replacing known input bits on port A of cell $procmux$9788: \main_sdram_sequencer_count -> 1'0 Replacing known input bits on port A of cell $procmux$9955: \main_soclinux_rx_busy -> 1'1 Replacing known input bits on port A of cell $procmux$9951: \main_soclinux_rx_busy -> 1'1 Replacing known input bits on port A of cell $procmux$9948: \main_soclinux_rx_busy -> 1'1 Replacing known input bits on port A of cell $procmux$9958: \main_soclinux_rx_busy -> 1'0 Analyzing evaluation results. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$6515. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$6524. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$6533. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$6542. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$6626. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7009. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7027. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7043. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7052. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7063. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7077. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7093. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7111. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7131. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7153. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7178. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7206. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7236. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7267. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7350. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7357. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7365. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7374. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7384. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7395. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7407. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7420. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7434. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7449. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7465. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7482. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7505. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7526. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7529. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7535. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7548. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7550. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7556. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7566. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7568. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7574. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7592. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7605. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7607. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7613. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7623. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7625. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7631. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7649. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7717. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7744. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7759. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7768. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7778. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7780. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7786. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7808. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7814. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7820. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7829. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7835. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7841. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7847. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7856. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7877. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7886. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7898. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7907. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7920. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7929. dead port 1/2 on $mux $flatten\VexRiscv.$procmux$7939. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7941. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$7947. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8011. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8083. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8101. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8110. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8173. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8195. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8205. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8207. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8213. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8223. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8225. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8231. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8243. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8249. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8258. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8268. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8270. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8276. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8286. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8288. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8294. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8306. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8312. dead port 2/2 on $mux $flatten\VexRiscv.$procmux$8321. dead port 2/2 on $mux $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3987. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4159. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4161. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4167. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4194. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4196. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4202. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4212. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4214. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4220. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4233. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4236. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4238. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4245. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4248. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4250. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4257. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4260. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4262. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4270. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4272. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4275. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4277. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4284. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4287. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4289. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4296. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4299. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4301. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4308. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4310. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4317. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4319. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4325. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4345. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4347. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4349. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4356. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4358. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4364. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4389. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4392. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4394. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4402. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4404. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4407. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4409. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4416. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4419. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4421. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4428. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4431. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4433. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4440. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4442. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4449. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4451. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4458. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4460. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4466. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4483. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4485. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4487. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4494. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4496. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4502. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4522. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4524. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4530. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4543. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4545. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4551. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4564. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4566. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4572. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4585. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4587. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4593. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4610. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4612. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4614. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4623. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4625. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4627. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4629. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4637. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4639. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4641. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4649. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4651. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4653. dead port 1/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4660. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4662. dead port 2/2 on $mux $flatten\VexRiscv.\dataCache_1_.$procmux$4668. dead port 1/2 on $mux $procmux$9180. Removed 192 multiplexer ports. 4.12.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6636: $auto$opt_reduce.cc:134:opt_mux$12355 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6643: $auto$opt_reduce.cc:134:opt_mux$12357 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6735: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5035_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $auto$opt_reduce.cc:134:opt_mux$12359 $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$5057_CMP $flatten\VexRiscv.$procmux$6649_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6769: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $auto$opt_reduce.cc:134:opt_mux$12363 $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$5057_CMP $auto$opt_reduce.cc:134:opt_mux$12361 } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6789: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12365 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6878: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12367 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6894: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5035_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12375 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $auto$opt_reduce.cc:134:opt_mux$12373 $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$5093_CMP $auto$opt_reduce.cc:134:opt_mux$12371 $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$5057_CMP $flatten\VexRiscv.$procmux$6649_CMP $auto$opt_reduce.cc:134:opt_mux$12369 } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6936: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12377 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6952: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12383 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $auto$opt_reduce.cc:134:opt_mux$12381 $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$5057_CMP $auto$opt_reduce.cc:134:opt_mux$12379 } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6974: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12385 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$7270: { $flatten\VexRiscv.$procmux$5994_CMP $flatten\VexRiscv.$procmux$6750_CMP $flatten\VexRiscv.$procmux$7207_CMP $flatten\VexRiscv.$procmux$6036_CMP $flatten\VexRiscv.$procmux$5119_CMP $flatten\VexRiscv.$procmux$6675_CMP $flatten\VexRiscv.$procmux$6744_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$6654_CMP $flatten\VexRiscv.$procmux$6900_CMP $flatten\VexRiscv.$procmux$6651_CMP $flatten\VexRiscv.$procmux$6649_CMP $auto$opt_reduce.cc:134:opt_mux$12387 } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$7518: { $flatten\VexRiscv.$procmux$7521_CMP $auto$opt_reduce.cc:134:opt_mux$12389 } New ctrl vector for $mux cell $flatten\VexRiscv.$procmux$7595: { } New ctrl vector for $mux cell $flatten\VexRiscv.$procmux$7652: { } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$7683: $auto$opt_reduce.cc:134:opt_mux$12391 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$8452: Old ports: A=0, B=32'11111111111111111111111111111111, Y=$flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 New ports: A=1'0, B=1'1, Y=$flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] New connections: $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [31:1] = { $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] $flatten\VexRiscv.$0$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN[31:0]$2814 [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$4000: Old ports: A=0, B=32'11111111111111111111111111111111, Y=$flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 New ports: A=1'0, B=1'1, Y=$flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] New connections: $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [31:1] = { $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN[31:0]$3848 [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$4008: Old ports: A=22'0000000000000000000000, B=22'1111111111111111111111, Y=$flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 New ports: A=1'0, B=1'1, Y=$flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] New connections: $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [21:1] = { $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] $flatten\VexRiscv.\IBusCachedPlugin_cache.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN[21:0]$3842 [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4732: Old ports: A=8'00000000, B=8'11111111, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 New ports: A=1'0, B=1'1, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [0] New connections: $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [7:1] = { $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN[7:0]$3668 [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4738: Old ports: A=8'00000000, B=8'11111111, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 New ports: A=1'0, B=1'1, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [0] New connections: $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [7:1] = { $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN[7:0]$3671 [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4744: Old ports: A=8'00000000, B=8'11111111, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 New ports: A=1'0, B=1'1, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [0] New connections: $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [7:1] = { $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN[7:0]$3674 [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4750: Old ports: A=8'00000000, B=8'11111111, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 New ports: A=1'0, B=1'1, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [0] New connections: $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [7:1] = { $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN[7:0]$3677 [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4758: Old ports: A=22'0000000000000000000000, B=22'1111111111111111111111, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 New ports: A=1'0, B=1'1, Y=$flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] New connections: $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [21:1] = { $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] $flatten\VexRiscv.\dataCache_1_.$0$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN[21:0]$3661 [0] } New ctrl vector for $pmux cell $procmux$10098: $auto$opt_reduce.cc:134:opt_mux$12393 New ctrl vector for $pmux cell $procmux$10103: $auto$opt_reduce.cc:134:opt_mux$12395 New ctrl vector for $pmux cell $procmux$10108: { $procmux$10101_CMP $auto$opt_reduce.cc:134:opt_mux$12397 } New ctrl vector for $pmux cell $procmux$10113: { $procmux$10101_CMP $auto$opt_reduce.cc:134:opt_mux$12399 } New ctrl vector for $pmux cell $procmux$10118: { $procmux$10101_CMP $auto$opt_reduce.cc:134:opt_mux$12401 } New ctrl vector for $pmux cell $procmux$10123: { $procmux$10101_CMP $auto$opt_reduce.cc:134:opt_mux$12403 } New ctrl vector for $pmux cell $procmux$10128: { $procmux$10101_CMP $auto$opt_reduce.cc:134:opt_mux$12405 } New ctrl vector for $pmux cell $procmux$10271: $auto$opt_reduce.cc:134:opt_mux$12407 New ctrl vector for $pmux cell $procmux$10286: $auto$opt_reduce.cc:134:opt_mux$12409 New ctrl vector for $pmux cell $procmux$10293: $auto$opt_reduce.cc:134:opt_mux$12411 New ctrl vector for $pmux cell $procmux$10297: $auto$opt_reduce.cc:134:opt_mux$12413 New ctrl vector for $pmux cell $procmux$10323: $auto$opt_reduce.cc:134:opt_mux$12415 New ctrl vector for $pmux cell $procmux$10330: $auto$opt_reduce.cc:134:opt_mux$12417 New ctrl vector for $pmux cell $procmux$10335: { $procmux$10314_CMP $auto$opt_reduce.cc:134:opt_mux$12419 } New ctrl vector for $pmux cell $procmux$10465: $auto$opt_reduce.cc:134:opt_mux$12421 New ctrl vector for $pmux cell $procmux$10469: $auto$opt_reduce.cc:134:opt_mux$12423 New ctrl vector for $pmux cell $procmux$10552: $auto$opt_reduce.cc:134:opt_mux$12425 New ctrl vector for $pmux cell $procmux$10559: $auto$opt_reduce.cc:134:opt_mux$12427 New ctrl vector for $pmux cell $procmux$10573: { $procmux$10530_CMP $auto$opt_reduce.cc:134:opt_mux$12429 } New ctrl vector for $pmux cell $procmux$10579: $auto$opt_reduce.cc:134:opt_mux$12431 New ctrl vector for $pmux cell $procmux$10659: $auto$opt_reduce.cc:134:opt_mux$12433 New ctrl vector for $pmux cell $procmux$10679: $auto$opt_reduce.cc:134:opt_mux$12435 New ctrl vector for $pmux cell $procmux$10708: { $procmux$10643_CMP $auto$opt_reduce.cc:134:opt_mux$12437 } New ctrl vector for $pmux cell $procmux$10736: $auto$opt_reduce.cc:134:opt_mux$12439 New ctrl vector for $pmux cell $procmux$10748: $auto$opt_reduce.cc:134:opt_mux$12441 New ctrl vector for $pmux cell $procmux$10770: { $procmux$10643_CMP $procmux$10635_CMP $auto$opt_reduce.cc:134:opt_mux$12443 } New ctrl vector for $pmux cell $procmux$10799: $auto$opt_reduce.cc:134:opt_mux$12445 New ctrl vector for $pmux cell $procmux$10819: $auto$opt_reduce.cc:134:opt_mux$12447 New ctrl vector for $pmux cell $procmux$10880: $auto$opt_reduce.cc:134:opt_mux$12449 New ctrl vector for $pmux cell $procmux$10900: $auto$opt_reduce.cc:134:opt_mux$12451 New ctrl vector for $pmux cell $procmux$10929: { $procmux$10864_CMP $auto$opt_reduce.cc:134:opt_mux$12453 } New ctrl vector for $pmux cell $procmux$10957: $auto$opt_reduce.cc:134:opt_mux$12455 New ctrl vector for $pmux cell $procmux$10963: $auto$opt_reduce.cc:134:opt_mux$12457 New ctrl vector for $pmux cell $procmux$10991: { $procmux$10864_CMP $procmux$10856_CMP $auto$opt_reduce.cc:134:opt_mux$12459 } New ctrl vector for $pmux cell $procmux$11020: $auto$opt_reduce.cc:134:opt_mux$12461 New ctrl vector for $pmux cell $procmux$11040: $auto$opt_reduce.cc:134:opt_mux$12463 New ctrl vector for $pmux cell $procmux$11101: $auto$opt_reduce.cc:134:opt_mux$12465 New ctrl vector for $pmux cell $procmux$11121: $auto$opt_reduce.cc:134:opt_mux$12467 New ctrl vector for $pmux cell $procmux$11150: { $procmux$11085_CMP $auto$opt_reduce.cc:134:opt_mux$12469 } New ctrl vector for $pmux cell $procmux$11178: $auto$opt_reduce.cc:134:opt_mux$12471 New ctrl vector for $pmux cell $procmux$11184: $auto$opt_reduce.cc:134:opt_mux$12473 New ctrl vector for $pmux cell $procmux$11206: { $procmux$11085_CMP $procmux$11077_CMP $auto$opt_reduce.cc:134:opt_mux$12475 } New ctrl vector for $pmux cell $procmux$11235: $auto$opt_reduce.cc:134:opt_mux$12477 New ctrl vector for $pmux cell $procmux$11261: $auto$opt_reduce.cc:134:opt_mux$12479 New ctrl vector for $pmux cell $procmux$11322: $auto$opt_reduce.cc:134:opt_mux$12481 New ctrl vector for $pmux cell $procmux$11342: $auto$opt_reduce.cc:134:opt_mux$12483 New ctrl vector for $pmux cell $procmux$11371: { $procmux$11306_CMP $auto$opt_reduce.cc:134:opt_mux$12485 } New ctrl vector for $pmux cell $procmux$11405: $auto$opt_reduce.cc:134:opt_mux$12487 New ctrl vector for $pmux cell $procmux$11411: $auto$opt_reduce.cc:134:opt_mux$12489 New ctrl vector for $pmux cell $procmux$11433: { $procmux$11306_CMP $procmux$11298_CMP $auto$opt_reduce.cc:134:opt_mux$12491 } New ctrl vector for $pmux cell $procmux$11462: $auto$opt_reduce.cc:134:opt_mux$12493 New ctrl vector for $pmux cell $procmux$11482: $auto$opt_reduce.cc:134:opt_mux$12495 Consolidated identical input bits for $mux cell $procmux$8458: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [0] New connections: $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [7:1] = { $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [0] $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [0] $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [0] $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [0] $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [0] $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [0] $0$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN[7:0]$1930 [0] } Consolidated identical input bits for $mux cell $procmux$8464: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [0] New connections: $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [7:1] = { $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [0] $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [0] $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [0] $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [0] $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [0] $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [0] $0$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN[7:0]$1925 [0] } Consolidated identical input bits for $mux cell $procmux$8470: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [0] New connections: $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [7:1] = { $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [0] $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [0] $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [0] $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [0] $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [0] $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [0] $0$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN[7:0]$1920 [0] } Consolidated identical input bits for $mux cell $procmux$8476: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [0] New connections: $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [7:1] = { $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [0] $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [0] $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [0] $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [0] $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [0] $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [0] $0$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN[7:0]$1915 [0] } Consolidated identical input bits for $mux cell $procmux$8482: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [0] New connections: $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [7:1] = { $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [0] $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [0] $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [0] $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [0] $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [0] $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [0] $0$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN[7:0]$1910 [0] } Consolidated identical input bits for $mux cell $procmux$8488: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [0] New connections: $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [7:1] = { $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [0] $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [0] $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [0] $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [0] $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [0] $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [0] $0$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN[7:0]$1905 [0] } Consolidated identical input bits for $mux cell $procmux$8494: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [0] New connections: $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [7:1] = { $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [0] $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [0] $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [0] $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [0] $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [0] $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [0] $0$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN[7:0]$1900 [0] } Consolidated identical input bits for $mux cell $procmux$8500: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [0] New connections: $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [7:1] = { $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [0] $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [0] $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [0] $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [0] $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [0] $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [0] $0$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN[7:0]$1895 [0] } Consolidated identical input bits for $mux cell $procmux$8506: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [0] New connections: $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [7:1] = { $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [0] $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [0] $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [0] $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [0] $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [0] $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [0] $0$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN[7:0]$1890 [0] } Consolidated identical input bits for $mux cell $procmux$8512: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [0] New connections: $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [7:1] = { $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [0] $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [0] $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [0] $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [0] $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [0] $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [0] $0$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN[7:0]$1885 [0] } Consolidated identical input bits for $mux cell $procmux$8518: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [0] New connections: $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [7:1] = { $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [0] $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [0] $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [0] $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [0] $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [0] $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [0] $0$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN[7:0]$1880 [0] } Consolidated identical input bits for $mux cell $procmux$8524: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [0] New connections: $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [7:1] = { $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [0] $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [0] $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [0] $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [0] $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [0] $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [0] $0$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN[7:0]$1875 [0] } Consolidated identical input bits for $mux cell $procmux$8530: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [0] New connections: $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [7:1] = { $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [0] $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [0] $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [0] $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [0] $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [0] $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [0] $0$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN[7:0]$1870 [0] } Consolidated identical input bits for $mux cell $procmux$8536: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [0] New connections: $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [7:1] = { $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [0] $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [0] $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [0] $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [0] $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [0] $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [0] $0$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN[7:0]$1865 [0] } Consolidated identical input bits for $mux cell $procmux$8542: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [0] New connections: $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [7:1] = { $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [0] $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [0] $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [0] $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [0] $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [0] $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [0] $0$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN[7:0]$1860 [0] } Consolidated identical input bits for $mux cell $procmux$8548: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 New ports: A=1'0, B=1'1, Y=$0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [0] New connections: $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [7:1] = { $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [0] $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [0] $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [0] $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [0] $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [0] $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [0] $0$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN[7:0]$1855 [0] } Consolidated identical input bits for $mux cell $procmux$8554: Old ports: A=24'000000000000000000000000, B=24'111111111111111111111111, Y=$0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 New ports: A=1'0, B=1'1, Y=$0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] New connections: $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [23:1] = { $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] $0$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN[23:0]$1849 [0] } Consolidated identical input bits for $mux cell $procmux$8560: Old ports: A=25'0000000000000000000000000, B=25'1111111111111111111111111, Y=$0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 New ports: A=1'0, B=1'1, Y=$0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] New connections: $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [24:1] = { $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] $0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN[24:0]$1842 [0] } Consolidated identical input bits for $mux cell $procmux$8566: Old ports: A=25'0000000000000000000000000, B=25'1111111111111111111111111, Y=$0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 New ports: A=1'0, B=1'1, Y=$0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] New connections: $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [24:1] = { $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] $0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN[24:0]$1835 [0] } Consolidated identical input bits for $mux cell $procmux$8572: Old ports: A=25'0000000000000000000000000, B=25'1111111111111111111111111, Y=$0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 New ports: A=1'0, B=1'1, Y=$0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] New connections: $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [24:1] = { $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] $0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN[24:0]$1828 [0] } Consolidated identical input bits for $mux cell $procmux$8578: Old ports: A=25'0000000000000000000000000, B=25'1111111111111111111111111, Y=$0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 New ports: A=1'0, B=1'1, Y=$0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] New connections: $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [24:1] = { $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] $0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN[24:0]$1821 [0] } Consolidated identical input bits for $mux cell $procmux$8586: Old ports: A=10'0000000000, B=10'1111111111, Y=$0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 New ports: A=1'0, B=1'1, Y=$0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] New connections: $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [9:1] = { $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] $0$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN[9:0]$1814 [0] } Consolidated identical input bits for $mux cell $procmux$8594: Old ports: A=10'0000000000, B=10'1111111111, Y=$0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 New ports: A=1'0, B=1'1, Y=$0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] New connections: $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [9:1] = { $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] $0$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN[9:0]$1807 [0] } Consolidated identical input bits for $mux cell $procmux$8600: Old ports: A=0, B=255, Y=$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 New ports: A=1'0, B=1'1, Y=$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [0] New connections: $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [31:1] = { 24'000000000000000000000000 $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [0] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [0] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [0] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [0] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [0] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [0] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791 [0] } Consolidated identical input bits for $mux cell $procmux$8606: Old ports: A=0, B=65280, Y=$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 New ports: A=1'0, B=1'1, Y=$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [8] New connections: { $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [31:9] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [7:0] } = { 16'0000000000000000 $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [8] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [8] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [8] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [8] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [8] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [8] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_EN[31:0]$1794 [8] 8'00000000 } Consolidated identical input bits for $mux cell $procmux$8612: Old ports: A=0, B=16711680, Y=$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 New ports: A=1'0, B=1'1, Y=$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [16] New connections: { $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [31:17] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [15:0] } = { 8'00000000 $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [16] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [16] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [16] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [16] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [16] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [16] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797 [16] 16'0000000000000000 } Consolidated identical input bits for $mux cell $procmux$8618: Old ports: A=0, B=32'11111111000000000000000000000000, Y=$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 New ports: A=1'0, B=1'1, Y=$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [24] New connections: { $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [31:25] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [23:0] } = { $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [24] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [24] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [24] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [24] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [24] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [24] $0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5778$234_EN[31:0]$1800 [24] 24'000000000000000000000000 } New ctrl vector for $pmux cell $procmux$8893: { $eq$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3266$1010_Y $procmux$8879_CMP $procmux$8877_CMP $procmux$8876_CMP $procmux$8875_CMP $procmux$8874_CMP $procmux$8873_CMP $eq$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3388$1211_Y $procmux$8894_CMP } New ctrl vector for $pmux cell $procmux$8932: { $procmux$8857_CMP $procmux$8856_CMP $procmux$8855_CMP $procmux$8854_CMP $procmux$8853_CMP $procmux$8852_CMP $procmux$8851_CMP $procmux$8850_CMP $procmux$8849_CMP $procmux$8848_CMP $procmux$8847_CMP $procmux$8846_CMP $procmux$8845_CMP $procmux$8844_CMP $procmux$8843_CMP $eq$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3244$1002_Y } Optimizing cells in module \top. Performed a total of 104 changes. 4.12.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 146 cells. 4.12.6. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 0 on $procdff$12190 ($dff) from module top. Setting constant 0-bit at position 1 on $procdff$12190 ($dff) from module top. Setting constant 0-bit at position 2 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 3 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 4 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 5 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 6 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 7 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 8 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 9 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 10 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 11 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 12 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 13 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 14 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 15 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 16 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 17 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 18 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 19 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 20 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 21 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 22 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 23 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 24 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 25 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 26 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 27 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 28 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 29 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 30 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. Setting constant 0-bit at position 31 on $flatten\VexRiscv.$procdff$11842 ($dff) from module top. 4.12.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 0 unused cells and 1393 unused wires. 4.12.8. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.12.9. Rerunning OPT passes. (Maybe there is more to do..) 4.12.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. dead port 1/2 on $mux $procmux$10293. dead port 2/2 on $mux $procmux$10293. dead port 1/2 on $mux $procmux$10297. Removed 3 multiplexer ports. 4.12.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5844: $auto$opt_reduce.cc:134:opt_mux$12497 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5854: $auto$opt_reduce.cc:134:opt_mux$12499 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5864: $auto$opt_reduce.cc:134:opt_mux$12501 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5876: $auto$opt_reduce.cc:134:opt_mux$12503 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5888: $auto$opt_reduce.cc:134:opt_mux$12505 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5900: $auto$opt_reduce.cc:134:opt_mux$12507 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5925: $auto$opt_reduce.cc:134:opt_mux$12509 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5950: $auto$opt_reduce.cc:134:opt_mux$12511 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$5975: $auto$opt_reduce.cc:134:opt_mux$12513 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6446: $auto$opt_reduce.cc:134:opt_mux$12515 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6462: $auto$opt_reduce.cc:134:opt_mux$12517 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6478: $auto$opt_reduce.cc:134:opt_mux$12519 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$7270: { $auto$opt_reduce.cc:134:opt_mux$12523 $auto$opt_reduce.cc:134:opt_mux$12521 $auto$opt_reduce.cc:134:opt_mux$12387 } New ctrl vector for $pmux cell $procmux$10128: $auto$opt_reduce.cc:134:opt_mux$12393 Optimizing cells in module \top. Performed a total of 14 changes. 4.12.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 12 cells. 4.12.13. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 0 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 1 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 2 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 3 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 4 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 5 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 6 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 7 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 8 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 9 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 10 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 11 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 12 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 13 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 14 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 15 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 16 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 17 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 18 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 19 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 20 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 21 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 22 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 23 on $procdff$12106 ($dff) from module top. Setting constant 0-bit at position 0 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 1 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 2 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 3 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 4 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 5 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 6 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 7 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 8 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 9 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 10 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 11 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 12 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 13 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 14 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 15 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 24 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 25 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 26 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 27 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 28 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 29 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 30 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 31 on $procdff$12103 ($dff) from module top. Setting constant 0-bit at position 0 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 1 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 2 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 3 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 4 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 5 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 6 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 7 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 16 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 17 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 18 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 19 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 20 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 21 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 22 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 23 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 24 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 25 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 26 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 27 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 28 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 29 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 30 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 31 on $procdff$12100 ($dff) from module top. Setting constant 0-bit at position 8 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 9 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 10 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 11 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 12 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 13 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 14 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 15 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 16 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 17 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 18 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 19 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 20 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 21 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 22 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 23 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 24 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 25 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 26 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 27 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 28 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 29 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 30 on $procdff$12097 ($dff) from module top. Setting constant 0-bit at position 31 on $procdff$12097 ($dff) from module top. 4.12.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 1 unused cells and 17 unused wires. 4.12.15. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.12.16. Rerunning OPT passes. (Maybe there is more to do..) 4.12.17. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.12.18. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Performed a total of 0 changes. 4.12.19. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.12.20. Executing OPT_DFF pass (perform DFF optimizations). 4.12.21. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.12.22. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.12.23. Finished OPT passes. (There is nothing left to do.) 4.13. Executing FSM pass (extract and optimize FSM). 4.13.1. Executing FSM_DETECT pass (finding FSMs in design). Not marking top.$flatten\VexRiscv.$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3194$2495_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:176$3834_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:570$3617_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:573$3618_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:576$3619_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:579$3620_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:555$3616_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5959$242_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5969$243_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6059$252_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6069$253_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6079$254_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6089$255_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6099$256_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6109$257_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5979$244_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5989$245_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5999$246_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6009$247_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6019$248_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6029$249_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6039$250_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6049$251_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_EN as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_code as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.VexRiscv.CsrPlugin_interrupt_code as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.VexRiscv.CsrPlugin_interrupt_targetPrivilege as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.VexRiscv.MmuPlugin_shared_state_1_ as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.VexRiscv._zz_137_ as FSM state register: Users of register don't seem to benefit from recoding. Not marking top.builder_bankmachine0_state as FSM state register: Register has an initialization value. Not marking top.builder_bankmachine1_state as FSM state register: Register has an initialization value. Not marking top.builder_bankmachine2_state as FSM state register: Register has an initialization value. Not marking top.builder_bankmachine3_state as FSM state register: Register has an initialization value. Not marking top.builder_fullmemorywe_state as FSM state register: Register has an initialization value. Not marking top.builder_multiplexer_state as FSM state register: Register has an initialization value. Not marking top.builder_refresher_state as FSM state register: Register has an initialization value. Not marking top.builder_spimaster_state as FSM state register: Register has an initialization value. Not marking top.builder_state as FSM state register: Register has an initialization value. Not marking top.main_sdram_choose_req_grant as FSM state register: Register has an initialization value. Not marking top.main_sdram_cmd_payload_a as FSM state register: Users of register don't seem to benefit from recoding. Register has an initialization value. Not marking top.main_sdram_dfi_p0_bank as FSM state register: Users of register don't seem to benefit from recoding. Register has an initialization value. 4.13.2. Executing FSM_EXTRACT pass (extracting FSM from design). 4.13.3. Executing FSM_OPT pass (simple optimizations of FSMs). 4.13.4. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.13.5. Executing FSM_OPT pass (simple optimizations of FSMs). 4.13.6. Executing FSM_RECODE pass (re-assigning FSM state encoding). 4.13.7. Executing FSM_INFO pass (dumping all available information on FSM cells). 4.13.8. Executing FSM_MAP pass (mapping FSMs to basic logic). 4.14. Executing OPT pass (performing simple optimizations). 4.14.1. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.14.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.14.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.14.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Performed a total of 0 changes. 4.14.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.14.6. Executing OPT_DFF pass (perform DFF optimizations). Adding SRST signal on $procdff$12335 ($dff) from module top (D = \builder_next_state, Q = \builder_state, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12524 ($sdff) from module top (D = \builder_next_state, Q = \builder_state). Adding SRST signal on $procdff$12334 ($dff) from module top (D = $procmux$8811_Y, Q = \builder_csr_bankarray_interface7_bank_bus_dat_r, rval = 8'00000000). Adding SRST signal on $procdff$12333 ($dff) from module top (D = $procmux$8820_Y, Q = \builder_csr_bankarray_interface6_bank_bus_dat_r, rval = 8'00000000). Adding SRST signal on $procdff$12332 ($dff) from module top (D = $procmux$8841_Y, Q = \builder_csr_bankarray_interface5_bank_bus_dat_r, rval = 8'00000000). Adding SRST signal on $procdff$12331 ($dff) from module top (D = $procmux$8871_Y, Q = \builder_csr_bankarray_interface4_bank_bus_dat_r, rval = 8'00000000). Adding SRST signal on $procdff$12330 ($dff) from module top (D = $procmux$8893_Y, Q = \builder_csr_bankarray_interface3_bank_bus_dat_r, rval = 8'00000000). Adding SRST signal on $procdff$12329 ($dff) from module top (D = \main_storage, Q = \builder_csr_bankarray_interface2_bank_bus_dat_r, rval = 8'00000000). Adding SRST signal on $procdff$12328 ($dff) from module top (D = \builder_csr_bankarray_sel, Q = \builder_csr_bankarray_sel_r, rval = 1'0). Adding SRST signal on $procdff$12327 ($dff) from module top (D = $procmux$8918_Y, Q = \builder_csr_bankarray_interface1_bank_bus_dat_r, rval = 8'00000000). Adding SRST signal on $procdff$12326 ($dff) from module top (D = $procmux$8932_Y, Q = \builder_csr_bankarray_interface0_bank_bus_dat_r, rval = 8'00000000). Adding SRST signal on $procdff$12325 ($dff) from module top (D = $procmux$9109_Y, Q = \builder_count, rval = 20'11110100001001000000). Adding EN signal on $auto$opt_dff.cc:702:run$12545 ($sdff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5128$1785_Y, Q = \builder_count). Adding SRST signal on $procdff$12324 ($dff) from module top (D = \builder_slave_sel, Q = \builder_slave_sel_r, rval = 4'0000). Adding SRST signal on $procdff$12323 ($dff) from module top (D = $procmux$9119_Y, Q = \builder_grant, rval = 1'0). Adding EN signal on $procdff$12322 ($dff) from module top (D = \builder_soclinux_wishbone_dat_w [7:0], Q = \builder_soclinux_dat_w). Adding SRST signal on $procdff$12321 ($dff) from module top (D = $procmux$9130_Y, Q = \builder_soclinux_we, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12550 ($sdff) from module top (D = \builder_soclinux_we_next_value2, Q = \builder_soclinux_we). Adding EN signal on $procdff$12320 ($dff) from module top (D = \builder_soclinux_adr_next_value1, Q = \builder_soclinux_adr). Adding SRST signal on $auto$opt_dff.cc:764:run$12552 ($dffe) from module top (D = { \builder_shared_adr [13:11] \builder_soclinux_wishbone_adr [10:0] }, Q = \builder_soclinux_adr, rval = 14'00000000000000). Adding SRST signal on $procdff$12319 ($dff) from module top (D = \builder_spimaster_next_state, Q = \builder_spimaster_state, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12558 ($sdff) from module top (D = \builder_spimaster_next_state, Q = \builder_spimaster_state). Adding SRST signal on $procdff$12318 ($dff) from module top (D = \builder_litedramwishbone2native_next_state, Q = \builder_litedramwishbone2native_state, rval = 1'0). Adding SRST signal on $procdff$12317 ($dff) from module top (D = \builder_fullmemorywe_next_state, Q = \builder_fullmemorywe_state, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12573 ($sdff) from module top (D = \builder_fullmemorywe_next_state, Q = \builder_fullmemorywe_state). Adding SRST signal on $procdff$12316 ($dff) from module top (D = \builder_new_master_rdata_valid2, Q = \builder_new_master_rdata_valid3, rval = 1'0). Adding SRST signal on $procdff$12315 ($dff) from module top (D = \builder_new_master_rdata_valid1, Q = \builder_new_master_rdata_valid2, rval = 1'0). Adding SRST signal on $procdff$12314 ($dff) from module top (D = \builder_new_master_rdata_valid0, Q = \builder_new_master_rdata_valid1, rval = 1'0). Adding SRST signal on $procdff$12313 ($dff) from module top (D = $or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4967$1760_Y, Q = \builder_new_master_rdata_valid0, rval = 1'0). Adding SRST signal on $procdff$12312 ($dff) from module top (D = $or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4966$1748_Y, Q = \builder_new_master_wdata_ready, rval = 1'0). Adding SRST signal on $procdff$12311 ($dff) from module top (D = \builder_multiplexer_next_state, Q = \builder_multiplexer_state, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12588 ($sdff) from module top (D = \builder_multiplexer_next_state, Q = \builder_multiplexer_state). Adding SRST signal on $procdff$12310 ($dff) from module top (D = \builder_bankmachine3_next_state, Q = \builder_bankmachine3_state, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12604 ($sdff) from module top (D = \builder_bankmachine3_next_state, Q = \builder_bankmachine3_state). Adding SRST signal on $procdff$12309 ($dff) from module top (D = \builder_bankmachine2_next_state, Q = \builder_bankmachine2_state, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12624 ($sdff) from module top (D = \builder_bankmachine2_next_state, Q = \builder_bankmachine2_state). Adding SRST signal on $procdff$12308 ($dff) from module top (D = \builder_bankmachine1_next_state, Q = \builder_bankmachine1_state, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12644 ($sdff) from module top (D = \builder_bankmachine1_next_state, Q = \builder_bankmachine1_state). Adding SRST signal on $procdff$12307 ($dff) from module top (D = \builder_bankmachine0_next_state, Q = \builder_bankmachine0_state, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12664 ($sdff) from module top (D = \builder_bankmachine0_next_state, Q = \builder_bankmachine0_state). Adding SRST signal on $procdff$12306 ($dff) from module top (D = \builder_refresher_next_state, Q = \builder_refresher_state, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12684 ($sdff) from module top (D = \builder_refresher_next_state, Q = \builder_refresher_state). Adding SRST signal on $procdff$12304 ($dff) from module top (D = { $procmux$8624_Y $procmux$9859_Y }, Q = \soclinux_storage, rval = 16'0000000001111101). Adding EN signal on $auto$opt_dff.cc:702:run$12694 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \soclinux_storage [15:8]). Adding EN signal on $auto$opt_dff.cc:702:run$12694 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \soclinux_storage [7:0]). Adding SRST signal on $procdff$12303 ($dff) from module top (D = $procmux$9143_Y, Q = \soclinux_miso_data, rval = 8'00000000). Adding EN signal on $auto$opt_dff.cc:702:run$12697 ($sdff) from module top (D = $procmux$9141_Y, Q = \soclinux_miso_data). Adding SRST signal on $procdff$12302 ($dff) from module top (D = $procmux$9150_Y, Q = \soclinux_mosi_sel, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12699 ($sdff) from module top (D = $procmux$9150_Y, Q = \soclinux_mosi_sel). Adding SRST signal on $procdff$12301 ($dff) from module top (D = $procmux$9155_Y, Q = \soclinux_mosi_data, rval = 8'00000000). Adding EN signal on $auto$opt_dff.cc:702:run$12703 ($sdff) from module top (D = \soclinux_mosi_storage, Q = \soclinux_mosi_data). Adding SRST signal on $procdff$12300 ($dff) from module top (D = $procmux$8963_Y, Q = \soclinux_clk_divider1, rval = 16'0000000000000000). Adding SRST signal on $procdff$12299 ($dff) from module top (D = $procmux$9159_Y, Q = \soclinux_count, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12706 ($sdff) from module top (D = \soclinux_count_spimaster_next_value, Q = \soclinux_count). Adding SRST signal on $procdff$12297 ($dff) from module top (D = $procmux$9163_Y, Q = \soclinux_loopback_storage, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12708 ($sdff) from module top (D = \builder_soclinux_dat_w [0], Q = \soclinux_loopback_storage). Adding SRST signal on $procdff$12295 ($dff) from module top (D = $procmux$9167_Y, Q = \soclinux_cs_storage, rval = 1'1). Adding EN signal on $auto$opt_dff.cc:702:run$12710 ($sdff) from module top (D = \builder_soclinux_dat_w [0], Q = \soclinux_cs_storage). Adding EN signal on $procdff$12293 ($dff) from module top (D = \builder_soclinux_dat_w, Q = \soclinux_mosi_storage). Adding SRST signal on $procdff$12292 ($dff) from module top (D = \builder_csr_bankarray_csrbank4_control0_re, Q = \soclinux_control_re, rval = 1'0). Adding SRST signal on $procdff$12291 ($dff) from module top (D = { $procmux$8671_Y $procmux$9136_Y }, Q = \soclinux_control_storage, rval = 16'0000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$12714 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \soclinux_control_storage [15:8]). Adding EN signal on $auto$opt_dff.cc:702:run$12714 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \soclinux_control_storage [7:0]). Adding SRST signal on $procdff$12290 ($dff) from module top (D = $procmux$9175_Y, Q = \soclinux_miso, rval = 8'00000000). Adding EN signal on $auto$opt_dff.cc:702:run$12717 ($sdff) from module top (D = \soclinux_miso_data, Q = \soclinux_miso). Adding SRST signal on $procdff$12289 ($dff) from module top (D = $procmux$9180_Y, Q = \main_count, rval = 22'1011111010111100001000). Adding SRST signal on $procdff$12288 ($dff) from module top (D = $procmux$9186_Y, Q = \main_mode, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12722 ($sdff) from module top (D = 1'1, Q = \main_mode). Adding SRST signal on $procdff$12287 ($dff) from module top (D = $procmux$9190_Y, Q = \main_chaser, rval = 8'00000000). Adding EN signal on $auto$opt_dff.cc:702:run$12724 ($sdff) from module top (D = { \main_chaser [6:0] $not$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5052$1774_Y }, Q = \main_chaser). Adding SRST signal on $procdff$12286 ($dff) from module top (D = \builder_csr_bankarray_csrbank2_out0_re, Q = \main_re, rval = 1'0). Adding SRST signal on $procdff$12285 ($dff) from module top (D = $procmux$9194_Y, Q = \main_storage, rval = 8'00000000). Adding EN signal on $auto$opt_dff.cc:702:run$12727 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_storage). Adding SRST signal on $procdff$12284 ($dff) from module top (D = $procmux$9198_Y, Q = \main_wishbone_bridge_wdata_consumed, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12731 ($sdff) from module top (D = 1'1, Q = \main_wishbone_bridge_wdata_consumed). Adding SRST signal on $procdff$12283 ($dff) from module top (D = $procmux$9205_Y, Q = \main_wishbone_bridge_cmd_consumed, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12735 ($sdff) from module top (D = 1'1, Q = \main_wishbone_bridge_cmd_consumed). Adding SRST signal on $procdff$12282 ($dff) from module top (D = $procmux$9217_Y, Q = \main_wishbone_bridge_rdata_converter_converter_strobe_all, rval = 1'0). Adding SRST signal on $procdff$12281 ($dff) from module top (D = $procmux$9224_Y, Q = \main_wishbone_bridge_rdata_converter_converter_demux, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12738 ($sdff) from module top (D = $procmux$9222_Y, Q = \main_wishbone_bridge_rdata_converter_converter_demux). Adding SRST signal on $procdff$12279 ($dff) from module top (D = { $procmux$8677_Y $procmux$10037_Y $procmux$8729_Y $procmux$8738_Y $procmux$8748_Y $procmux$8759_Y $procmux$8771_Y $procmux$8784_Y }, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data, rval = 128'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$12740 ($sdff) from module top (D = \main_wishbone_bridge_rdata_converter_converter_sink_payload_data, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data [127:112]). Adding EN signal on $auto$opt_dff.cc:702:run$12740 ($sdff) from module top (D = \main_wishbone_bridge_rdata_converter_converter_sink_payload_data, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data [95:80]). Adding EN signal on $auto$opt_dff.cc:702:run$12740 ($sdff) from module top (D = \main_wishbone_bridge_rdata_converter_converter_sink_payload_data, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data [79:64]). Adding EN signal on $auto$opt_dff.cc:702:run$12740 ($sdff) from module top (D = \main_wishbone_bridge_rdata_converter_converter_sink_payload_data, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data [63:48]). Adding EN signal on $auto$opt_dff.cc:702:run$12740 ($sdff) from module top (D = \main_wishbone_bridge_rdata_converter_converter_sink_payload_data, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data [47:32]). Adding EN signal on $auto$opt_dff.cc:702:run$12740 ($sdff) from module top (D = \main_wishbone_bridge_rdata_converter_converter_sink_payload_data, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data [31:16]). Adding EN signal on $auto$opt_dff.cc:702:run$12740 ($sdff) from module top (D = \main_wishbone_bridge_rdata_converter_converter_sink_payload_data, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data [15:0]). Adding EN signal on $auto$opt_dff.cc:702:run$12740 ($sdff) from module top (D = \main_wishbone_bridge_rdata_converter_converter_sink_payload_data, Q = \main_wishbone_bridge_rdata_converter_converter_source_payload_data [111:96]). Adding SRST signal on $procdff$12276 ($dff) from module top (D = $procmux$9256_Y, Q = \main_wishbone_bridge_wdata_converter_converter_mux, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12765 ($sdff) from module top (D = $procmux$9254_Y, Q = \main_wishbone_bridge_wdata_converter_converter_mux). Adding SRST signal on $procdff$12275 ($dff) from module top (D = $procmux$9260_Y, Q = \main_wishbone_bridge_count, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12767 ($sdff) from module top (D = \main_wishbone_bridge_count_litedramwishbone2native_next_value, Q = \main_wishbone_bridge_count). Adding SRST signal on $procdff$12273 ($dff) from module top (D = $procmux$9267_Y, Q = \main_sdram_time1, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$12769 ($sdff) from module top (D = $procmux$9267_Y, Q = \main_sdram_time1). Adding SRST signal on $procdff$12272 ($dff) from module top (D = $procmux$9274_Y, Q = \main_sdram_time0, rval = 5'00000). Adding EN signal on $auto$opt_dff.cc:702:run$12773 ($sdff) from module top (D = $procmux$9274_Y, Q = \main_sdram_time0). Adding SRST signal on $procdff$12271 ($dff) from module top (D = $procmux$9281_Y [2], Q = \main_sdram_twtrcon_count [2], rval = 1'0). Adding SRST signal on $procdff$12271 ($dff) from module top (D = $procmux$9278_Y [1:0], Q = \main_sdram_twtrcon_count [1:0], rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12780 ($sdff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4959$1735_Y [1:0], Q = \main_sdram_twtrcon_count [1:0]). Adding EN signal on $auto$opt_dff.cc:702:run$12777 ($sdff) from module top (D = $procmux$9281_Y [2], Q = \main_sdram_twtrcon_count [2]). Adding SRST signal on $procdff$12270 ($dff) from module top (D = $procmux$9287_Y, Q = \main_sdram_twtrcon_ready, rval = 1'0). Adding SRST signal on $procdff$12269 ($dff) from module top (D = $procmux$9294_Y, Q = \main_sdram_tccdcon_count, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12790 ($sdff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4944$1732_Y, Q = \main_sdram_tccdcon_count). Adding SRST signal on $procdff$12268 ($dff) from module top (D = $procmux$9306_Y, Q = \main_sdram_tccdcon_ready, rval = 1'0). Adding SRST signal on $procdff$12267 ($dff) from module top (D = $procmux$9310_Y, Q = \main_sdram_trrdcon_count, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12795 ($sdff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4929$1729_Y, Q = \main_sdram_trrdcon_count). Adding SRST signal on $procdff$12266 ($dff) from module top (D = $procmux$9322_Y, Q = \main_sdram_trrdcon_ready, rval = 1'0). Adding SRST signal on $procdff$12265 ($dff) from module top (D = $procmux$9363_Y, Q = \main_sdram_choose_req_grant, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12798 ($sdff) from module top (D = $procmux$9334_Y, Q = \main_sdram_choose_req_grant). Adding SRST signal on $procdff$12263 ($dff) from module top (D = $procmux$9411_Y [1], Q = \main_sdram_bankmachine3_trascon_count [1], rval = 1'0). Adding SRST signal on $procdff$12263 ($dff) from module top (D = $procmux$9408_Y [0], Q = \main_sdram_bankmachine3_trascon_count [0], rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12815 ($sdff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4779$1717_Y [0], Q = \main_sdram_bankmachine3_trascon_count [0]). Adding EN signal on $auto$opt_dff.cc:702:run$12812 ($sdff) from module top (D = $procmux$9411_Y [1], Q = \main_sdram_bankmachine3_trascon_count [1]). Adding SRST signal on $procdff$12262 ($dff) from module top (D = $procmux$9417_Y, Q = \main_sdram_bankmachine3_trascon_ready, rval = 1'0). Adding SRST signal on $procdff$12261 ($dff) from module top (D = $procmux$9427_Y, Q = \main_sdram_bankmachine3_trccon_count, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12823 ($sdff) from module top (D = $procmux$9427_Y, Q = \main_sdram_bankmachine3_trccon_count). Adding SRST signal on $procdff$12260 ($dff) from module top (D = $procmux$9433_Y, Q = \main_sdram_bankmachine3_trccon_ready, rval = 1'0). Adding SRST signal on $procdff$12259 ($dff) from module top (D = $procmux$9443_Y, Q = \main_sdram_bankmachine3_twtpcon_count, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12830 ($sdff) from module top (D = $procmux$9443_Y, Q = \main_sdram_bankmachine3_twtpcon_count). Adding SRST signal on $procdff$12258 ($dff) from module top (D = $procmux$9449_Y, Q = \main_sdram_bankmachine3_twtpcon_ready, rval = 1'0). Adding SRST signal on $procdff$12257 ($dff) from module top (D = $procmux$9456_Y, Q = \main_sdram_bankmachine3_row_opened, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12839 ($sdff) from module top (D = 1'1, Q = \main_sdram_bankmachine3_row_opened). Adding SRST signal on $procdff$12256 ($dff) from module top (D = $procmux$9466_Y, Q = \main_sdram_bankmachine3_row, rval = 13'0000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$12841 ($sdff) from module top (D = \main_sdram_bankmachine3_cmd_buffer_source_payload_addr [21:9], Q = \main_sdram_bankmachine3_row). Adding SRST signal on $procdff$12255 ($dff) from module top (D = $procmux$9470_Y, Q = \main_sdram_bankmachine3_cmd_buffer_source_payload_addr, rval = 22'0000000000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$12847 ($sdff) from module top (D = \main_sdram_bankmachine3_cmd_buffer_lookahead_rdport_dat_r [22:1], Q = \main_sdram_bankmachine3_cmd_buffer_source_payload_addr). Adding SRST signal on $procdff$12254 ($dff) from module top (D = $procmux$9474_Y, Q = \main_sdram_bankmachine3_cmd_buffer_source_payload_we, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12849 ($sdff) from module top (D = \main_sdram_bankmachine3_cmd_buffer_lookahead_rdport_dat_r [0], Q = \main_sdram_bankmachine3_cmd_buffer_source_payload_we). Adding SRST signal on $procdff$12251 ($dff) from module top (D = $procmux$9482_Y, Q = \main_sdram_bankmachine3_cmd_buffer_source_valid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12851 ($sdff) from module top (D = \main_sdram_bankmachine3_cmd_buffer_lookahead_source_valid, Q = \main_sdram_bankmachine3_cmd_buffer_source_valid). Adding SRST signal on $procdff$12250 ($dff) from module top (D = $procmux$9486_Y, Q = \main_sdram_bankmachine3_cmd_buffer_lookahead_consume, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12853 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4722$1701_Y, Q = \main_sdram_bankmachine3_cmd_buffer_lookahead_consume). Adding SRST signal on $procdff$12249 ($dff) from module top (D = $procmux$9490_Y, Q = \main_sdram_bankmachine3_cmd_buffer_lookahead_produce, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12855 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4719$1700_Y, Q = \main_sdram_bankmachine3_cmd_buffer_lookahead_produce). Adding SRST signal on $procdff$12248 ($dff) from module top (D = $procmux$9499_Y, Q = \main_sdram_bankmachine3_cmd_buffer_lookahead_level, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$12857 ($sdff) from module top (D = $procmux$9499_Y, Q = \main_sdram_bankmachine3_cmd_buffer_lookahead_level). Adding SRST signal on $procdff$12247 ($dff) from module top (D = $procmux$9506_Y [1], Q = \main_sdram_bankmachine2_trascon_count [1], rval = 1'0). Adding SRST signal on $procdff$12247 ($dff) from module top (D = $procmux$9503_Y [0], Q = \main_sdram_bankmachine2_trascon_count [0], rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12868 ($sdff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4703$1695_Y [0], Q = \main_sdram_bankmachine2_trascon_count [0]). Adding EN signal on $auto$opt_dff.cc:702:run$12865 ($sdff) from module top (D = $procmux$9506_Y [1], Q = \main_sdram_bankmachine2_trascon_count [1]). Adding SRST signal on $procdff$12246 ($dff) from module top (D = $procmux$9512_Y, Q = \main_sdram_bankmachine2_trascon_ready, rval = 1'0). Adding SRST signal on $procdff$12245 ($dff) from module top (D = $procmux$9522_Y, Q = \main_sdram_bankmachine2_trccon_count, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12876 ($sdff) from module top (D = $procmux$9522_Y, Q = \main_sdram_bankmachine2_trccon_count). Adding SRST signal on $procdff$12244 ($dff) from module top (D = $procmux$9528_Y, Q = \main_sdram_bankmachine2_trccon_ready, rval = 1'0). Adding SRST signal on $procdff$12243 ($dff) from module top (D = $procmux$9538_Y, Q = \main_sdram_bankmachine2_twtpcon_count, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12883 ($sdff) from module top (D = $procmux$9538_Y, Q = \main_sdram_bankmachine2_twtpcon_count). Adding SRST signal on $procdff$12242 ($dff) from module top (D = $procmux$9544_Y, Q = \main_sdram_bankmachine2_twtpcon_ready, rval = 1'0). Adding SRST signal on $procdff$12241 ($dff) from module top (D = $procmux$9551_Y, Q = \main_sdram_bankmachine2_row_opened, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12892 ($sdff) from module top (D = 1'1, Q = \main_sdram_bankmachine2_row_opened). Adding SRST signal on $procdff$12240 ($dff) from module top (D = $procmux$9561_Y, Q = \main_sdram_bankmachine2_row, rval = 13'0000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$12894 ($sdff) from module top (D = \main_sdram_bankmachine2_cmd_buffer_source_payload_addr [21:9], Q = \main_sdram_bankmachine2_row). Adding SRST signal on $procdff$12239 ($dff) from module top (D = $procmux$9565_Y, Q = \main_sdram_bankmachine2_cmd_buffer_source_payload_addr, rval = 22'0000000000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$12900 ($sdff) from module top (D = \main_sdram_bankmachine2_cmd_buffer_lookahead_rdport_dat_r [22:1], Q = \main_sdram_bankmachine2_cmd_buffer_source_payload_addr). Adding SRST signal on $procdff$12238 ($dff) from module top (D = $procmux$9569_Y, Q = \main_sdram_bankmachine2_cmd_buffer_source_payload_we, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12902 ($sdff) from module top (D = \main_sdram_bankmachine2_cmd_buffer_lookahead_rdport_dat_r [0], Q = \main_sdram_bankmachine2_cmd_buffer_source_payload_we). Adding SRST signal on $procdff$12235 ($dff) from module top (D = $procmux$9577_Y, Q = \main_sdram_bankmachine2_cmd_buffer_source_valid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12904 ($sdff) from module top (D = \main_sdram_bankmachine2_cmd_buffer_lookahead_source_valid, Q = \main_sdram_bankmachine2_cmd_buffer_source_valid). Adding SRST signal on $procdff$12234 ($dff) from module top (D = $procmux$9581_Y, Q = \main_sdram_bankmachine2_cmd_buffer_lookahead_consume, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12906 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4646$1679_Y, Q = \main_sdram_bankmachine2_cmd_buffer_lookahead_consume). Adding SRST signal on $procdff$12233 ($dff) from module top (D = $procmux$9585_Y, Q = \main_sdram_bankmachine2_cmd_buffer_lookahead_produce, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12908 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4643$1678_Y, Q = \main_sdram_bankmachine2_cmd_buffer_lookahead_produce). Adding SRST signal on $procdff$12232 ($dff) from module top (D = $procmux$9594_Y, Q = \main_sdram_bankmachine2_cmd_buffer_lookahead_level, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$12910 ($sdff) from module top (D = $procmux$9594_Y, Q = \main_sdram_bankmachine2_cmd_buffer_lookahead_level). Adding SRST signal on $procdff$12231 ($dff) from module top (D = $procmux$9601_Y [1], Q = \main_sdram_bankmachine1_trascon_count [1], rval = 1'0). Adding SRST signal on $procdff$12231 ($dff) from module top (D = $procmux$9598_Y [0], Q = \main_sdram_bankmachine1_trascon_count [0], rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12921 ($sdff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4627$1673_Y [0], Q = \main_sdram_bankmachine1_trascon_count [0]). Adding EN signal on $auto$opt_dff.cc:702:run$12918 ($sdff) from module top (D = $procmux$9601_Y [1], Q = \main_sdram_bankmachine1_trascon_count [1]). Adding SRST signal on $procdff$12230 ($dff) from module top (D = $procmux$9607_Y, Q = \main_sdram_bankmachine1_trascon_ready, rval = 1'0). Adding SRST signal on $procdff$12229 ($dff) from module top (D = $procmux$9617_Y, Q = \main_sdram_bankmachine1_trccon_count, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12929 ($sdff) from module top (D = $procmux$9617_Y, Q = \main_sdram_bankmachine1_trccon_count). Adding SRST signal on $procdff$12228 ($dff) from module top (D = $procmux$9623_Y, Q = \main_sdram_bankmachine1_trccon_ready, rval = 1'0). Adding SRST signal on $procdff$12227 ($dff) from module top (D = $procmux$9633_Y, Q = \main_sdram_bankmachine1_twtpcon_count, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12936 ($sdff) from module top (D = $procmux$9633_Y, Q = \main_sdram_bankmachine1_twtpcon_count). Adding SRST signal on $procdff$12226 ($dff) from module top (D = $procmux$9639_Y, Q = \main_sdram_bankmachine1_twtpcon_ready, rval = 1'0). Adding SRST signal on $procdff$12225 ($dff) from module top (D = $procmux$9646_Y, Q = \main_sdram_bankmachine1_row_opened, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12945 ($sdff) from module top (D = 1'1, Q = \main_sdram_bankmachine1_row_opened). Adding SRST signal on $procdff$12224 ($dff) from module top (D = $procmux$9656_Y, Q = \main_sdram_bankmachine1_row, rval = 13'0000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$12947 ($sdff) from module top (D = \main_sdram_bankmachine1_cmd_buffer_source_payload_addr [21:9], Q = \main_sdram_bankmachine1_row). Adding SRST signal on $procdff$12223 ($dff) from module top (D = $procmux$9660_Y, Q = \main_sdram_bankmachine1_cmd_buffer_source_payload_addr, rval = 22'0000000000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$12953 ($sdff) from module top (D = \main_sdram_bankmachine1_cmd_buffer_lookahead_rdport_dat_r [22:1], Q = \main_sdram_bankmachine1_cmd_buffer_source_payload_addr). Adding SRST signal on $procdff$12222 ($dff) from module top (D = $procmux$9664_Y, Q = \main_sdram_bankmachine1_cmd_buffer_source_payload_we, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12955 ($sdff) from module top (D = \main_sdram_bankmachine1_cmd_buffer_lookahead_rdport_dat_r [0], Q = \main_sdram_bankmachine1_cmd_buffer_source_payload_we). Adding SRST signal on $procdff$12219 ($dff) from module top (D = $procmux$9672_Y, Q = \main_sdram_bankmachine1_cmd_buffer_source_valid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12957 ($sdff) from module top (D = \main_sdram_bankmachine1_cmd_buffer_lookahead_source_valid, Q = \main_sdram_bankmachine1_cmd_buffer_source_valid). Adding SRST signal on $procdff$12218 ($dff) from module top (D = $procmux$9676_Y, Q = \main_sdram_bankmachine1_cmd_buffer_lookahead_consume, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12959 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4570$1657_Y, Q = \main_sdram_bankmachine1_cmd_buffer_lookahead_consume). Adding SRST signal on $procdff$12217 ($dff) from module top (D = $procmux$9680_Y, Q = \main_sdram_bankmachine1_cmd_buffer_lookahead_produce, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$12961 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4567$1656_Y, Q = \main_sdram_bankmachine1_cmd_buffer_lookahead_produce). Adding SRST signal on $procdff$12216 ($dff) from module top (D = $procmux$9689_Y, Q = \main_sdram_bankmachine1_cmd_buffer_lookahead_level, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$12963 ($sdff) from module top (D = $procmux$9689_Y, Q = \main_sdram_bankmachine1_cmd_buffer_lookahead_level). Adding SRST signal on $procdff$12215 ($dff) from module top (D = $procmux$9696_Y [1], Q = \main_sdram_bankmachine0_trascon_count [1], rval = 1'0). Adding SRST signal on $procdff$12215 ($dff) from module top (D = $procmux$9693_Y [0], Q = \main_sdram_bankmachine0_trascon_count [0], rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12974 ($sdff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4551$1651_Y [0], Q = \main_sdram_bankmachine0_trascon_count [0]). Adding EN signal on $auto$opt_dff.cc:702:run$12971 ($sdff) from module top (D = $procmux$9696_Y [1], Q = \main_sdram_bankmachine0_trascon_count [1]). Adding SRST signal on $procdff$12214 ($dff) from module top (D = $procmux$9702_Y, Q = \main_sdram_bankmachine0_trascon_ready, rval = 1'0). Adding SRST signal on $procdff$12213 ($dff) from module top (D = $procmux$9712_Y, Q = \main_sdram_bankmachine0_trccon_count, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12982 ($sdff) from module top (D = $procmux$9712_Y, Q = \main_sdram_bankmachine0_trccon_count). Adding SRST signal on $procdff$12212 ($dff) from module top (D = $procmux$9718_Y, Q = \main_sdram_bankmachine0_trccon_ready, rval = 1'0). Adding SRST signal on $procdff$12211 ($dff) from module top (D = $procmux$9728_Y, Q = \main_sdram_bankmachine0_twtpcon_count, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$12989 ($sdff) from module top (D = $procmux$9728_Y, Q = \main_sdram_bankmachine0_twtpcon_count). Adding SRST signal on $procdff$12210 ($dff) from module top (D = $procmux$9734_Y, Q = \main_sdram_bankmachine0_twtpcon_ready, rval = 1'0). Adding SRST signal on $procdff$12209 ($dff) from module top (D = $procmux$9741_Y, Q = \main_sdram_bankmachine0_row_opened, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$12998 ($sdff) from module top (D = 1'1, Q = \main_sdram_bankmachine0_row_opened). Adding SRST signal on $procdff$12208 ($dff) from module top (D = $procmux$9751_Y, Q = \main_sdram_bankmachine0_row, rval = 13'0000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$13000 ($sdff) from module top (D = \main_sdram_bankmachine0_cmd_buffer_source_payload_addr [21:9], Q = \main_sdram_bankmachine0_row). Adding SRST signal on $procdff$12207 ($dff) from module top (D = $procmux$9755_Y, Q = \main_sdram_bankmachine0_cmd_buffer_source_payload_addr, rval = 22'0000000000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$13006 ($sdff) from module top (D = \main_sdram_bankmachine0_cmd_buffer_lookahead_rdport_dat_r [22:1], Q = \main_sdram_bankmachine0_cmd_buffer_source_payload_addr). Adding SRST signal on $procdff$12206 ($dff) from module top (D = $procmux$9759_Y, Q = \main_sdram_bankmachine0_cmd_buffer_source_payload_we, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13008 ($sdff) from module top (D = \main_sdram_bankmachine0_cmd_buffer_lookahead_rdport_dat_r [0], Q = \main_sdram_bankmachine0_cmd_buffer_source_payload_we). Adding SRST signal on $procdff$12203 ($dff) from module top (D = $procmux$9767_Y, Q = \main_sdram_bankmachine0_cmd_buffer_source_valid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13010 ($sdff) from module top (D = \main_sdram_bankmachine0_cmd_buffer_lookahead_source_valid, Q = \main_sdram_bankmachine0_cmd_buffer_source_valid). Adding SRST signal on $procdff$12202 ($dff) from module top (D = $procmux$9771_Y, Q = \main_sdram_bankmachine0_cmd_buffer_lookahead_consume, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$13012 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4494$1635_Y, Q = \main_sdram_bankmachine0_cmd_buffer_lookahead_consume). Adding SRST signal on $procdff$12201 ($dff) from module top (D = $procmux$9775_Y, Q = \main_sdram_bankmachine0_cmd_buffer_lookahead_produce, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$13014 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4491$1634_Y, Q = \main_sdram_bankmachine0_cmd_buffer_lookahead_produce). Adding SRST signal on $procdff$12200 ($dff) from module top (D = $procmux$9784_Y, Q = \main_sdram_bankmachine0_cmd_buffer_lookahead_level, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$13016 ($sdff) from module top (D = $procmux$9784_Y, Q = \main_sdram_bankmachine0_cmd_buffer_lookahead_level). Adding SRST signal on $procdff$12199 ($dff) from module top (D = $procmux$9790_Y, Q = \main_sdram_sequencer_count, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13026 ($sdff) from module top (D = $procmux$9788_Y, Q = \main_sdram_sequencer_count). Adding SRST signal on $procdff$12198 ($dff) from module top (D = $procmux$9800_Y, Q = \main_sdram_sequencer_counter, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$13030 ($sdff) from module top (D = $procmux$9800_Y, Q = \main_sdram_sequencer_counter). Adding SRST signal on $procdff$12197 ($dff) from module top (D = $procmux$9009_Y, Q = \main_sdram_sequencer_done1, rval = 1'0). Adding SRST signal on $procdff$12196 ($dff) from module top (D = $procmux$9809_Y, Q = \main_sdram_postponer_count, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13035 ($sdff) from module top (D = $procmux$9807_Y, Q = \main_sdram_postponer_count). Adding SRST signal on $procdff$12195 ($dff) from module top (D = $procmux$9048_Y, Q = \main_sdram_postponer_req_o, rval = 1'0). Adding SRST signal on $procdff$12194 ($dff) from module top (D = $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4421$1619_Y, Q = \main_sdram_timer_count1, rval = 9'110000110). Adding SRST signal on $procdff$12193 ($dff) from module top (D = $procmux$9013_Y, Q = \main_sdram_cmd_payload_we, rval = 1'0). Adding SRST signal on $procdff$12192 ($dff) from module top (D = $procmux$9023_Y, Q = \main_sdram_cmd_payload_ras, rval = 1'0). Adding SRST signal on $procdff$12191 ($dff) from module top (D = $procmux$9030_Y, Q = \main_sdram_cmd_payload_cas, rval = 1'0). Adding SRST signal on $procdff$12189 ($dff) from module top (D = $procmux$9040_Y, Q = \main_sdram_cmd_payload_a, rval = 13'0000000000000). Adding SRST signal on $procdff$12188 ($dff) from module top (D = $and$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4150$1547_Y, Q = \main_sdram_dfi_p0_rddata_en, rval = 1'0). Adding SRST signal on $procdff$12187 ($dff) from module top (D = \main_sdram_twtrcon_valid, Q = \main_sdram_dfi_p0_wrdata_en, rval = 1'0). Adding SRST signal on $procdff$12186 ($dff) from module top (D = $not$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4917$1727_Y, Q = \main_sdram_dfi_p0_we_n, rval = 1'1). Adding SRST signal on $procdff$12185 ($dff) from module top (D = $not$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4916$1726_Y, Q = \main_sdram_dfi_p0_ras_n, rval = 1'1). Adding SRST signal on $procdff$12183 ($dff) from module top (D = $not$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4915$1725_Y, Q = \main_sdram_dfi_p0_cas_n, rval = 1'1). Adding SRST signal on $procdff$12182 ($dff) from module top (D = \main_sdram_choose_req_cmd_payload_ba, Q = \main_sdram_dfi_p0_bank, rval = 2'00). Adding SRST signal on $procdff$12181 ($dff) from module top (D = \builder_sync_rhs_array_muxed1, Q = \main_sdram_dfi_p0_address, rval = 13'0000000000000). Adding SRST signal on $procdff$12180 ($dff) from module top (D = $procmux$9813_Y, Q = \main_sdram_rddata_status, rval = 16'0000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$13076 ($sdff) from module top (D = \main_sdram_inti_p0_rddata, Q = \main_sdram_rddata_status). Adding EN signal on $procdff$12178 ($dff) from module top (D = \builder_soclinux_dat_w, Q = \main_sdram_wrdata_storage [15:8]). Adding EN signal on $procdff$12178 ($dff) from module top (D = \builder_soclinux_dat_w, Q = \main_sdram_wrdata_storage [7:0]). Adding EN signal on $procdff$12176 ($dff) from module top (D = \builder_soclinux_dat_w [1:0], Q = \main_sdram_baddress_storage). Adding EN signal on $procdff$12174 ($dff) from module top (D = \builder_soclinux_dat_w [4:0], Q = \main_sdram_address_storage [12:8]). Adding EN signal on $procdff$12174 ($dff) from module top (D = \builder_soclinux_dat_w, Q = \main_sdram_address_storage [7:0]). Adding SRST signal on $procdff$12172 ($dff) from module top (D = $procmux$9825_Y, Q = \main_sdram_command_storage, rval = 6'000000). Adding EN signal on $auto$opt_dff.cc:702:run$13083 ($sdff) from module top (D = \builder_soclinux_dat_w [5:0], Q = \main_sdram_command_storage). Adding SRST signal on $procdff$12170 ($dff) from module top (D = $procmux$9829_Y, Q = \main_sdram_storage, rval = 4'0001). Adding EN signal on $auto$opt_dff.cc:702:run$13085 ($sdff) from module top (D = \builder_soclinux_dat_w [3:0], Q = \main_sdram_storage). Adding SRST signal on $procdff$12169 ($dff) from module top (D = { \main_rddata_en [1:0] \main_dfi_p0_rddata_en }, Q = \main_rddata_en, rval = 3'000). Adding SRST signal on $procdff$12168 ($dff) from module top (D = \main_rddata_en [2], Q = \main_dfi_p0_rddata_valid, rval = 1'0). Adding SRST signal on $procdff$12167 ($dff) from module top (D = $procmux$8796_Y, Q = \main_soclinux_timer_value, rval = 0). Adding SRST signal on $procdff$12165 ($dff) from module top (D = $procmux$9833_Y, Q = \main_soclinux_timer_eventmanager_storage, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13090 ($sdff) from module top (D = \builder_soclinux_dat_w [0], Q = \main_soclinux_timer_eventmanager_storage). Adding SRST signal on $procdff$12164 ($dff) from module top (D = \main_soclinux_timer_eventmanager_status_w, Q = \main_soclinux_timer_zero_old_trigger, rval = 1'0). Adding SRST signal on $procdff$12163 ($dff) from module top (D = $procmux$9839_Y, Q = \main_soclinux_timer_zero_pending, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13093 ($sdff) from module top (D = $procmux$9839_Y, Q = \main_soclinux_timer_zero_pending). Adding SRST signal on $procdff$12162 ($dff) from module top (D = $procmux$9843_Y, Q = \main_soclinux_timer_value_status, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13097 ($sdff) from module top (D = \main_soclinux_timer_value, Q = \main_soclinux_timer_value_status). Adding SRST signal on $procdff$12161 ($dff) from module top (D = \builder_csr_bankarray_csrbank5_update_value0_re, Q = \main_soclinux_timer_update_value_re, rval = 1'0). Adding SRST signal on $procdff$12160 ($dff) from module top (D = $procmux$9847_Y, Q = \main_soclinux_timer_update_value_storage, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13100 ($sdff) from module top (D = \builder_soclinux_dat_w [0], Q = \main_soclinux_timer_update_value_storage). Adding SRST signal on $procdff$12158 ($dff) from module top (D = $procmux$9851_Y, Q = \main_soclinux_timer_en_storage, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13102 ($sdff) from module top (D = \builder_soclinux_dat_w [0], Q = \main_soclinux_timer_en_storage). Adding SRST signal on $procdff$12156 ($dff) from module top (D = { $procmux$8788_Y $procmux$8654_Y $procmux$8650_Y $procmux$10026_Y }, Q = \main_soclinux_timer_reload_storage, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13104 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_timer_reload_storage [31:24]). Adding EN signal on $auto$opt_dff.cc:702:run$13104 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_timer_reload_storage [23:16]). Adding EN signal on $auto$opt_dff.cc:702:run$13104 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_timer_reload_storage [15:8]). Adding EN signal on $auto$opt_dff.cc:702:run$13104 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_timer_reload_storage [7:0]). Adding SRST signal on $procdff$12154 ($dff) from module top (D = { $procmux$8646_Y $procmux$8667_Y $procmux$8663_Y $procmux$9855_Y }, Q = \main_soclinux_timer_load_storage, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13109 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_timer_load_storage [31:24]). Adding EN signal on $auto$opt_dff.cc:702:run$13109 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_timer_load_storage [23:16]). Adding EN signal on $auto$opt_dff.cc:702:run$13109 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_timer_load_storage [15:8]). Adding EN signal on $auto$opt_dff.cc:702:run$13109 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_timer_load_storage [7:0]). Adding SRST signal on $procdff$12153 ($dff) from module top (D = $procmux$9863_Y, Q = \main_soclinux_uart_rx_fifo_consume, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$13114 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4371$1606_Y, Q = \main_soclinux_uart_rx_fifo_consume). Adding SRST signal on $procdff$12152 ($dff) from module top (D = $procmux$9869_Y, Q = \main_soclinux_uart_rx_fifo_produce, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$13116 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4368$1605_Y, Q = \main_soclinux_uart_rx_fifo_produce). Adding SRST signal on $procdff$12151 ($dff) from module top (D = $procmux$9880_Y, Q = \main_soclinux_uart_rx_fifo_level0, rval = 5'00000). Adding EN signal on $auto$opt_dff.cc:702:run$13118 ($sdff) from module top (D = $procmux$9880_Y, Q = \main_soclinux_uart_rx_fifo_level0). Adding SRST signal on $procdff$12150 ($dff) from module top (D = $procmux$9889_Y, Q = \main_soclinux_uart_rx_fifo_readable, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13126 ($sdff) from module top (D = $procmux$9889_Y, Q = \main_soclinux_uart_rx_fifo_readable). Adding SRST signal on $procdff$12149 ($dff) from module top (D = $procmux$9895_Y, Q = \main_soclinux_uart_tx_fifo_consume, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$13130 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4349$1595_Y, Q = \main_soclinux_uart_tx_fifo_consume). Adding SRST signal on $procdff$12148 ($dff) from module top (D = $procmux$9901_Y, Q = \main_soclinux_uart_tx_fifo_produce, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$13132 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4346$1594_Y, Q = \main_soclinux_uart_tx_fifo_produce). Adding SRST signal on $procdff$12147 ($dff) from module top (D = $procmux$9912_Y, Q = \main_soclinux_uart_tx_fifo_level0, rval = 5'00000). Adding EN signal on $auto$opt_dff.cc:702:run$13134 ($sdff) from module top (D = $procmux$9912_Y, Q = \main_soclinux_uart_tx_fifo_level0). Adding SRST signal on $procdff$12146 ($dff) from module top (D = $procmux$9921_Y, Q = \main_soclinux_uart_tx_fifo_readable, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13142 ($sdff) from module top (D = $procmux$9921_Y, Q = \main_soclinux_uart_tx_fifo_readable). Adding SRST signal on $procdff$12144 ($dff) from module top (D = $procmux$9927_Y, Q = \main_soclinux_uart_eventmanager_storage, rval = 2'00). Adding EN signal on $auto$opt_dff.cc:702:run$13146 ($sdff) from module top (D = \builder_soclinux_dat_w [1:0], Q = \main_soclinux_uart_eventmanager_storage). Adding SRST signal on $procdff$12143 ($dff) from module top (D = \builder_csr_bankarray_csrbank6_rxempty_w, Q = \main_soclinux_uart_rx_old_trigger, rval = 1'0). Adding SRST signal on $procdff$12142 ($dff) from module top (D = $procmux$9933_Y, Q = \main_soclinux_uart_rx_pending, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13149 ($sdff) from module top (D = $procmux$9933_Y, Q = \main_soclinux_uart_rx_pending). Adding SRST signal on $procdff$12141 ($dff) from module top (D = \builder_csr_bankarray_csrbank6_txfull_w, Q = \main_soclinux_uart_tx_old_trigger, rval = 1'0). Adding SRST signal on $procdff$12140 ($dff) from module top (D = $procmux$9941_Y, Q = \main_soclinux_uart_tx_pending, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13154 ($sdff) from module top (D = $procmux$9941_Y, Q = \main_soclinux_uart_tx_pending). Adding SRST signal on $procdff$12139 ($dff) from module top (D = $procmux$9960_Y, Q = \main_soclinux_rx_busy, rval = 1'0). Adding EN signal on $procdff$12138 ($dff) from module top (D = $0\main_soclinux_rx_bitcount[3:0], Q = \main_soclinux_rx_bitcount). Adding EN signal on $procdff$12137 ($dff) from module top (D = { \builder_regs1 \main_soclinux_rx_reg [7:1] }, Q = \main_soclinux_rx_reg). Adding SRST signal on $procdff$12136 ($dff) from module top (D = \builder_regs1, Q = \main_soclinux_rx_r, rval = 1'0). Adding SRST signal on $procdff$12135 ($dff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4320$1586_Y [31:0], Q = \main_soclinux_rx_clkphase, rval = 32'10000000000000000000000000000000). Adding SRST signal on $procdff$12134 ($dff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4320$1586_Y [32], Q = \main_soclinux_rx_clken, rval = 1'0). Adding SRST signal on $procdff$12133 ($dff) from module top (D = $procmux$9993_Y, Q = \main_soclinux_source_payload_data, rval = 8'00000000). Adding EN signal on $auto$opt_dff.cc:702:run$13180 ($sdff) from module top (D = \main_soclinux_rx_reg, Q = \main_soclinux_source_payload_data). Adding SRST signal on $procdff$12132 ($dff) from module top (D = $procmux$9071_Y, Q = \main_soclinux_source_valid, rval = 1'0). Adding SRST signal on $procdff$12131 ($dff) from module top (D = $procmux$10006_Y, Q = \main_soclinux_tx_busy, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13195 ($sdff) from module top (D = $procmux$10006_Y, Q = \main_soclinux_tx_busy). Adding SRST signal on $procdff$12130 ($dff) from module top (D = $procmux$10010_Y, Q = \main_soclinux_tx_bitcount, rval = 4'0000). Adding EN signal on $auto$opt_dff.cc:702:run$13205 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4272$1576_Y, Q = \main_soclinux_tx_bitcount). Adding EN signal on $procdff$12129 ($dff) from module top (D = $0\main_soclinux_tx_reg[7:0], Q = \main_soclinux_tx_reg). Adding SRST signal on $procdff$12127 ($dff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4288$1579_Y [32], Q = \main_soclinux_tx_clken, rval = 1'0). Adding SRST signal on $procdff$12126 ($dff) from module top (D = $procmux$9086_Y, Q = \main_soclinux_sink_ready, rval = 1'0). Adding SRST signal on $procdff$12124 ($dff) from module top (D = { $procmux$8805_Y $procmux$8642_Y $procmux$8638_Y $procmux$8685_Y }, Q = \main_soclinux_storage, rval = 85899345). Adding EN signal on $auto$opt_dff.cc:702:run$13226 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_storage [31:24]). Adding EN signal on $auto$opt_dff.cc:702:run$13226 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_storage [23:16]). Adding EN signal on $auto$opt_dff.cc:702:run$13226 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_storage [15:8]). Adding EN signal on $auto$opt_dff.cc:702:run$13226 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_storage [7:0]). Adding SRST signal on $procdff$12123 ($dff) from module top (D = $procmux$9098_Y, Q = \main_soclinux_ram_bus_ram_bus_ack, rval = 1'0). Adding SRST signal on $procdff$12122 ($dff) from module top (D = $procmux$9102_Y, Q = \main_soclinux_soclinux_ram_bus_ack, rval = 1'0). Adding SRST signal on $procdff$12121 ($dff) from module top (D = $procmux$10030_Y, Q = \main_soclinux_cpu_time_cmp, rval = 64'1111111111111111111111111111111111111111111111111111111111111111). Adding EN signal on $auto$opt_dff.cc:702:run$13233 ($sdff) from module top (D = \main_soclinux_cpu_time_cmp_storage, Q = \main_soclinux_cpu_time_cmp). Adding SRST signal on $procdff$12120 ($dff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4249$1564_Y, Q = \main_soclinux_cpu_time, rval = 64'0000000000000000000000000000000000000000000000000000000000000000). Adding SRST signal on $procdff$12118 ($dff) from module top (D = { $procmux$8634_Y $procmux$8721_Y $procmux$8717_Y $procmux$8713_Y $procmux$8709_Y $procmux$8705_Y $procmux$8701_Y $procmux$10051_Y }, Q = \main_soclinux_cpu_time_cmp_storage, rval = 64'1111111111111111111111111111111111111111111111111111111111111111). Adding EN signal on $auto$opt_dff.cc:702:run$13236 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_cpu_time_cmp_storage [63:56]). Adding EN signal on $auto$opt_dff.cc:702:run$13236 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_cpu_time_cmp_storage [55:48]). Adding EN signal on $auto$opt_dff.cc:702:run$13236 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_cpu_time_cmp_storage [47:40]). Adding EN signal on $auto$opt_dff.cc:702:run$13236 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_cpu_time_cmp_storage [39:32]). Adding EN signal on $auto$opt_dff.cc:702:run$13236 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_cpu_time_cmp_storage [31:24]). Adding EN signal on $auto$opt_dff.cc:702:run$13236 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_cpu_time_cmp_storage [23:16]). Adding EN signal on $auto$opt_dff.cc:702:run$13236 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_cpu_time_cmp_storage [15:8]). Adding EN signal on $auto$opt_dff.cc:702:run$13236 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_cpu_time_cmp_storage [7:0]). Adding SRST signal on $procdff$12117 ($dff) from module top (D = $procmux$10041_Y, Q = \main_soclinux_cpu_time_status, rval = 64'0000000000000000000000000000000000000000000000000000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$13245 ($sdff) from module top (D = \main_soclinux_cpu_time, Q = \main_soclinux_cpu_time_status). Adding SRST signal on $procdff$12116 ($dff) from module top (D = $procmux$10047_Y, Q = \main_soclinux_soccontroller_bus_errors, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13247 ($sdff) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4246$1563_Y, Q = \main_soclinux_soccontroller_bus_errors). Adding SRST signal on $procdff$12114 ($dff) from module top (D = { $procmux$8697_Y $procmux$8693_Y $procmux$8689_Y $procmux$9821_Y }, Q = \main_soclinux_soccontroller_scratch_storage, rval = 305419896). Adding EN signal on $auto$opt_dff.cc:702:run$13251 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_soccontroller_scratch_storage [31:24]). Adding EN signal on $auto$opt_dff.cc:702:run$13251 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_soccontroller_scratch_storage [23:16]). Adding EN signal on $auto$opt_dff.cc:702:run$13251 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_soccontroller_scratch_storage [15:8]). Adding EN signal on $auto$opt_dff.cc:702:run$13251 ($sdff) from module top (D = \builder_soclinux_dat_w, Q = \main_soclinux_soccontroller_scratch_storage [7:0]). Adding SRST signal on $procdff$12113 ($dff) from module top (D = \builder_csr_bankarray_csrbank1_reset0_re, Q = \main_soclinux_soccontroller_reset_re, rval = 1'0). Adding SRST signal on $procdff$12112 ($dff) from module top (D = $procmux$10055_Y, Q = \main_soclinux_soccontroller_reset_storage, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13257 ($sdff) from module top (D = \builder_soclinux_dat_w [0], Q = \main_soclinux_soccontroller_reset_storage). Adding SRST signal on $procdff$12111 ($dff) from module top (D = $or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5073$1780_Y, Q = \spisdcard_cs_n, rval = 1'0). Adding SRST signal on $procdff$12110 ($dff) from module top (D = $procmux$10064_Y, Q = \spisdcard_mosi, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13260 ($sdff) from module top (D = \builder_sync_f_array_muxed, Q = \spisdcard_mosi). Adding SRST signal on $procdff$12109 ($dff) from module top (D = $procmux$10071_Y, Q = \spisdcard_clk, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13266 ($sdff) from module top (D = $procmux$10071_Y, Q = \spisdcard_clk). Adding SRST signal on $procdff$12108 ($dff) from module top (D = $procmux$10084_Y, Q = \serial_tx, rval = 1'1). Adding EN signal on $auto$opt_dff.cc:702:run$13270 ($sdff) from module top (D = $procmux$10084_Y, Q = \serial_tx). Adding SRST signal on $procdff$12102 ($dff) from module top (D = 8'xxxxxxxx, Q = $memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_DATA [31:24], rval = 8'00000000). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13274 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13274 ($sdff) from module top. Setting constant 0-bit at position 2 on $auto$opt_dff.cc:702:run$13274 ($sdff) from module top. Setting constant 0-bit at position 3 on $auto$opt_dff.cc:702:run$13274 ($sdff) from module top. Setting constant 0-bit at position 4 on $auto$opt_dff.cc:702:run$13274 ($sdff) from module top. Setting constant 0-bit at position 5 on $auto$opt_dff.cc:702:run$13274 ($sdff) from module top. Setting constant 0-bit at position 6 on $auto$opt_dff.cc:702:run$13274 ($sdff) from module top. Setting constant 0-bit at position 7 on $auto$opt_dff.cc:702:run$13274 ($sdff) from module top. Adding SRST signal on $procdff$12099 ($dff) from module top (D = 16'xxxxxxxxxxxxxxxx, Q = $memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_DATA [31:16], rval = 16'0000000000000000). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 2 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 3 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 4 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 5 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 6 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 7 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 8 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 9 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 10 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 11 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 12 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 13 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 14 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Setting constant 0-bit at position 15 on $auto$opt_dff.cc:702:run$13275 ($sdff) from module top. Adding SRST signal on $procdff$12096 ($dff) from module top (D = 24'xxxxxxxxxxxxxxxxxxxxxxxx, Q = $memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_DATA [31:8], rval = 24'000000000000000000000000). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 2 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 3 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 4 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 5 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 6 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 7 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 8 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 9 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 10 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 11 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 12 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 13 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 14 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 15 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 16 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 17 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 18 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 19 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 20 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 21 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 22 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Setting constant 0-bit at position 23 on $auto$opt_dff.cc:702:run$13276 ($sdff) from module top. Adding SRST signal on $procdff$12091 ($dff) from module top (D = 2'xx, Q = $memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_DATA [9:8], rval = 2'00). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13277 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13277 ($sdff) from module top. Adding EN signal on $procdff$12088 ($dff) from module top (D = $memrd$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5811$1810_DATA, Q = \memdat_2). Adding SRST signal on $procdff$12086 ($dff) from module top (D = 2'xx, Q = $memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_DATA [9:8], rval = 2'00). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13279 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13279 ($sdff) from module top. Adding EN signal on $procdff$12083 ($dff) from module top (D = $memrd$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5828$1817_DATA, Q = \memdat_4). Adding SRST signal on $procdff$12081 ($dff) from module top (D = 2'xx, Q = $memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_DATA [24:23], rval = 2'00). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13281 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13281 ($sdff) from module top. Adding SRST signal on $procdff$12077 ($dff) from module top (D = 2'xx, Q = $memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_DATA [24:23], rval = 2'00). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13282 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13282 ($sdff) from module top. Adding SRST signal on $procdff$12073 ($dff) from module top (D = 2'xx, Q = $memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_DATA [24:23], rval = 2'00). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13283 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13283 ($sdff) from module top. Adding SRST signal on $procdff$12069 ($dff) from module top (D = 2'xx, Q = $memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_DATA [24:23], rval = 2'00). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13284 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13284 ($sdff) from module top. Adding SRST signal on $procdff$12065 ($dff) from module top (D = 4'xxxx, Q = $memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_DATA [22:19], rval = 4'0000). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13285 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13285 ($sdff) from module top. Setting constant 0-bit at position 2 on $auto$opt_dff.cc:702:run$13285 ($sdff) from module top. Setting constant 0-bit at position 3 on $auto$opt_dff.cc:702:run$13285 ($sdff) from module top. Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11696 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:561$3663_DATA, Q = \VexRiscv.dataCache_1_._zz_10_). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11683 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:588$3686_DATA, Q = \VexRiscv.dataCache_1_._zz_41_). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11682 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:587$3685_DATA, Q = \VexRiscv.dataCache_1_._zz_40_). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11681 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:586$3684_DATA, Q = \VexRiscv.dataCache_1_._zz_39_). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11680 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:585$3683_DATA, Q = \VexRiscv.dataCache_1_._zz_38_). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11677 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_colisions, Q = \VexRiscv.dataCache_1_.stageB_colisions). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11676 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_mask, Q = \VexRiscv.dataCache_1_.stageB_mask). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11675 ($dff) from module top (D = \VexRiscv.dataCache_1_._zz_8_, Q = \VexRiscv.dataCache_1_.stageB_waysHits). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11674 ($dff) from module top (D = { \VexRiscv.dataCache_1_._zz_41_ \VexRiscv.dataCache_1_._zz_40_ \VexRiscv.dataCache_1_._zz_39_ \VexRiscv.dataCache_1_._zz_38_ }, Q = \VexRiscv.dataCache_1_.stageB_dataReadRsp_0). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11672 ($dff) from module top (D = \VexRiscv.dataCache_1_._zz_10_ [1], Q = \VexRiscv.dataCache_1_.stageB_tagsReadRsp_0_error). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11670 ($dff) from module top (D = \VexRiscv.DBusCachedPlugin_mmuBus_rsp_refilling, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_refilling). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11669 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_exception, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_exception). Adding SRST signal on $auto$opt_dff.cc:764:run$13297 ($dffe) from module top (D = $flatten\VexRiscv.$logic_and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5329$3057_Y, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_exception, rval = 1'0). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11667 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_allowWrite, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_allowWrite). Adding SRST signal on $auto$opt_dff.cc:764:run$13299 ($dffe) from module top (D = \VexRiscv.MmuPlugin_ports_0_cacheLine_allowWrite, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_allowWrite, rval = 1'1). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11666 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_allowRead, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_allowRead). Adding SRST signal on $auto$opt_dff.cc:764:run$13301 ($dffe) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5305$3044_Y, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_allowRead, rval = 1'1). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11665 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_isIoAccess, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_isIoAccess). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11664 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_request_amoCtrl_alu, Q = \VexRiscv.dataCache_1_.stageB_request_amoCtrl_alu). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11663 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_request_amoCtrl_swap, Q = \VexRiscv.dataCache_1_.stageB_request_amoCtrl_swap). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11662 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_request_isAmo, Q = \VexRiscv.dataCache_1_.stageB_isAmo). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11661 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_request_isLrsc, Q = \VexRiscv.dataCache_1_.stageB_request_isLrsc). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11660 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_request_size, Q = \VexRiscv.dataCache_1_.stageB_request_size). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11659 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_request_data, Q = \VexRiscv.dataCache_1_.stageB_request_data). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11658 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageA_request_wr, Q = \VexRiscv.dataCache_1_.stageB_request_wr). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11657 ($dff) from module top (D = \VexRiscv.dataCache_1_.stage0_colisions, Q = \VexRiscv.dataCache_1_.stage0_colisions_regNextWhen). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11656 ($dff) from module top (D = \VexRiscv.dataCache_1_.stage0_mask, Q = \VexRiscv.dataCache_1_.stageA_mask). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11655 ($dff) from module top (D = \VexRiscv.decode_to_execute_INSTRUCTION [31:29], Q = \VexRiscv.dataCache_1_.stageA_request_amoCtrl_alu). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11654 ($dff) from module top (D = \VexRiscv.decode_to_execute_INSTRUCTION [27], Q = \VexRiscv.dataCache_1_.stageA_request_amoCtrl_swap). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11653 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_execute_args_isAmo, Q = \VexRiscv.dataCache_1_.stageA_request_isAmo). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11652 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_execute_args_isLrsc, Q = \VexRiscv.dataCache_1_.stageA_request_isLrsc). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11651 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_execute_args_size, Q = \VexRiscv.dataCache_1_.stageA_request_size). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11650 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_execute_args_data, Q = \VexRiscv.dataCache_1_.stageA_request_data). Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11649 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_execute_args_wr, Q = \VexRiscv.dataCache_1_.stageA_request_wr). Adding SRST signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11642 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$procmux$4038_Y, Q = \VexRiscv.dataCache_1_.loader_error, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13320 ($sdff) from module top (D = 1'0, Q = \VexRiscv.dataCache_1_.loader_error). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13321 ($sdffe) from module top. Adding EN signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11641 ($dff) from module top (D = 1'1, Q = \VexRiscv.dataCache_1_.loader_waysAllocator). Setting constant 1-bit at position 0 on $auto$opt_dff.cc:764:run$13322 ($dffe) from module top. Adding SRST signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11640 ($dff) from module top (D = \VexRiscv.dataCache_1_.loader_counter_valueNext, Q = \VexRiscv.dataCache_1_.loader_counter_value, rval = 3'000). Adding SRST signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11639 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$procmux$4048_Y, Q = \VexRiscv.dataCache_1_.loader_valid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13326 ($sdff) from module top (D = 1'1, Q = \VexRiscv.dataCache_1_.loader_valid). Adding SRST signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11638 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$procmux$4055_Y, Q = \VexRiscv.dataCache_1_.stageB_memCmdSent, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13332 ($sdff) from module top (D = 1'1, Q = \VexRiscv.dataCache_1_.stageB_memCmdSent). Adding SRST signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11637 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$procmux$4062_Y, Q = \VexRiscv.dataCache_1_.stageB_lrsc_reserved, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13336 ($sdff) from module top (D = 1'1, Q = \VexRiscv.dataCache_1_.stageB_lrsc_reserved). Adding SRST signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11636 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$procmux$4072_Y, Q = \VexRiscv.dataCache_1_.stageB_flusher_valid, rval = 1'1). Adding SRST signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11635 ($dff) from module top (D = $flatten\VexRiscv.\dataCache_1_.$procmux$4024_Y, Q = \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [11:5], rval = 7'0000000). Adding SRST signal on $flatten\VexRiscv.\dataCache_1_.$procdff$11635 ($dff) from module top (D = { $flatten\VexRiscv.\dataCache_1_.$procmux$4014_Y $flatten\VexRiscv.\dataCache_1_.$procmux$4031_Y }, Q = { \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [31:12] \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [4:0] }, rval = 25'0000000000000000000000000). Adding EN signal on $auto$opt_dff.cc:702:run$13344 ($sdff) from module top (D = { \VexRiscv.DBusCachedPlugin_mmuBus_rsp_physicalAddress [31:28] \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_physicalAddress [27:12] \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_physicalAddress [4:0] }, Q = { \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [31:12] \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [4:0] }). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11631 ($dff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$memrd$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:170$3844_DATA, Q = \VexRiscv.IBusCachedPlugin_cache._zz_10_). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11627 ($dff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$memrd$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:182$3850_DATA, Q = \VexRiscv.IBusCachedPlugin_cache._zz_11_). Adding SRST signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11626 ($dff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3936_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_wordIndex, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$13348 ($sdff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:301$3884_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_wordIndex). Adding SRST signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11625 ($dff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3941_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_cmdSent, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13352 ($sdff) from module top (D = 1'1, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_cmdSent). Adding SRST signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11624 ($dff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3950_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_flushPending, rval = 1'1). Adding EN signal on $auto$opt_dff.cc:702:run$13354 ($sdff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3950_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_flushPending). Adding SRST signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11623 ($dff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3955_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_hadError, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13358 ($sdff) from module top (D = 1'0, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_hadError). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13359 ($sdffe) from module top. Adding SRST signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11622 ($dff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3966_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_valid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13360 ($sdff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3966_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_valid). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11621 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache._zz_10_ [1], Q = \VexRiscv.IBusCachedPlugin_cache.decodeStage_hit_error). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11620 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache.fetchStage_hit_valid, Q = \VexRiscv.IBusCachedPlugin_cache.decodeStage_hit_valid). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11619 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuBus_rsp_refilling, Q = \VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_refilling). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11618 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuBus_rsp_exception, Q = \VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_exception). Adding SRST signal on $auto$opt_dff.cc:764:run$13367 ($dffe) from module top (D = $flatten\VexRiscv.$logic_and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5426$3118_Y, Q = \VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_exception, rval = 1'0). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11617 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuBus_rsp_allowExecute, Q = \VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_allowExecute). Adding SRST signal on $auto$opt_dff.cc:764:run$13369 ($dffe) from module top (D = \VexRiscv.MmuPlugin_ports_1_cacheLine_allowExecute, Q = \VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_allowExecute, rval = 1'1). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11613 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuBus_rsp_physicalAddress, Q = \VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11612 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data, Q = \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen). Adding SRST signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11611 ($dff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3930_Y, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_flushCounter, rval = 8'00000000). Adding EN signal on $auto$opt_dff.cc:702:run$13373 ($sdff) from module top (D = $flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:314$3886_Y [6:0], Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_flushCounter [6:0]). Adding EN signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11610 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache.decodeStage_mmuRsp_physicalAddress, Q = \VexRiscv.IBusCachedPlugin_cache.lineLoader_address). Adding SRST signal on $flatten\VexRiscv.$procdff$11993 ($dff) from module top (D = $flatten\VexRiscv.$logic_and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7260$3477_Y, Q = \VexRiscv._zz_238_, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11992 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5777_Y, Q = \VexRiscv._zz_232_, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$13377 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$5775_Y, Q = \VexRiscv._zz_232_). Adding SRST signal on $flatten\VexRiscv.$procdff$11991 ($dff) from module top (D = $flatten\VexRiscv.$logic_and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7253$3472_Y, Q = \VexRiscv._zz_231_, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11990 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5784_Y, Q = \VexRiscv._zz_230_, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$13380 ($sdff) from module top (D = $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7250$3471_Y, Q = \VexRiscv._zz_230_). Adding SRST signal on $flatten\VexRiscv.$procdff$11989 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5789_Y, Q = \VexRiscv.memory_to_writeBack_IS_DBUS_SHARING, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13386 ($sdff) from module top (D = \VexRiscv.execute_to_memory_IS_DBUS_SHARING, Q = \VexRiscv.memory_to_writeBack_IS_DBUS_SHARING). Adding SRST signal on $flatten\VexRiscv.$procdff$11988 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5796_Y, Q = \VexRiscv.execute_to_memory_IS_DBUS_SHARING, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13388 ($sdff) from module top (D = \VexRiscv.execute_IS_DBUS_SHARING, Q = \VexRiscv.execute_to_memory_IS_DBUS_SHARING). Adding SRST signal on $flatten\VexRiscv.$procdff$11987 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5801_Y, Q = \VexRiscv.memory_to_writeBack_INSTRUCTION, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13390 ($sdff) from module top (D = \VexRiscv.execute_to_memory_INSTRUCTION, Q = \VexRiscv.memory_to_writeBack_INSTRUCTION). Adding SRST signal on $flatten\VexRiscv.$procdff$11986 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5806_Y, Q = \VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13392 ($sdff) from module top (D = \VexRiscv._zz_43_, Q = \VexRiscv.memory_to_writeBack_REGFILE_WRITE_DATA). Adding SRST signal on $flatten\VexRiscv.$procdff$11985 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5820_Y, Q = \VexRiscv._zz_228_, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13394 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData, Q = \VexRiscv._zz_228_). Adding SRST signal on $flatten\VexRiscv.$procdff$11984 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5837_Y, Q = \VexRiscv._zz_226_, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13398 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData, Q = \VexRiscv._zz_226_). Adding SRST signal on $flatten\VexRiscv.$procdff$11983 ($dff) from module top (D = $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6595$3339_Y, Q = \VexRiscv.memory_DivPlugin_div_counter_value, rval = 6'000000). Adding SRST signal on $flatten\VexRiscv.$procdff$11982 ($dff) from module top (D = $flatten\VexRiscv.$ne$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7083$3451_Y, Q = \VexRiscv.execute_CsrPlugin_wfiWake, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11981 ($dff) from module top (D = \VexRiscv.CsrPlugin_exception, Q = \VexRiscv.CsrPlugin_hadException, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11979 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5731_Y, Q = \VexRiscv.CsrPlugin_interrupt_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11978 ($dff) from module top (D = $flatten\VexRiscv.$logic_and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7010$3448_Y, Q = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11977 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5743_Y, Q = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11976 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5749_Y, Q = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11975 ($dff) from module top (D = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionValids_decode, Q = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11974 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5844_Y, Q = \VexRiscv.CsrPlugin_sie_SSIE, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13420 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [1], Q = \VexRiscv.CsrPlugin_sie_SSIE). Adding SRST signal on $flatten\VexRiscv.$procdff$11973 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5854_Y, Q = \VexRiscv.CsrPlugin_sie_STIE, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13424 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [5], Q = \VexRiscv.CsrPlugin_sie_STIE). Adding SRST signal on $flatten\VexRiscv.$procdff$11972 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5864_Y, Q = \VexRiscv.CsrPlugin_sie_SEIE, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13428 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [9], Q = \VexRiscv.CsrPlugin_sie_SEIE). Adding SRST signal on $flatten\VexRiscv.$procdff$11971 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5876_Y, Q = \VexRiscv.CsrPlugin_sip_SSIP, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13432 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [1], Q = \VexRiscv.CsrPlugin_sip_SSIP). Adding SRST signal on $flatten\VexRiscv.$procdff$11970 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5888_Y, Q = \VexRiscv.CsrPlugin_sip_STIP, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13436 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [5], Q = \VexRiscv.CsrPlugin_sip_STIP). Adding SRST signal on $flatten\VexRiscv.$procdff$11969 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5900_Y, Q = \VexRiscv.CsrPlugin_sip_SEIP_SOFT, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13440 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [9], Q = \VexRiscv.CsrPlugin_sip_SEIP_SOFT). Adding SRST signal on $flatten\VexRiscv.$procdff$11968 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5925_Y, Q = \VexRiscv.CsrPlugin_sstatus_SPP, rval = 1'1). Adding SRST signal on $flatten\VexRiscv.$procdff$11967 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5950_Y, Q = \VexRiscv.CsrPlugin_sstatus_SPIE, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11966 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5975_Y, Q = \VexRiscv.CsrPlugin_sstatus_SIE, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11965 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5993_Y, Q = \VexRiscv.CsrPlugin_mideleg_SS, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13447 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [1], Q = \VexRiscv.CsrPlugin_mideleg_SS). Adding SRST signal on $flatten\VexRiscv.$procdff$11964 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6008_Y, Q = \VexRiscv.CsrPlugin_mideleg_SE, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13451 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [9], Q = \VexRiscv.CsrPlugin_mideleg_SE). Adding SRST signal on $flatten\VexRiscv.$procdff$11963 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6023_Y, Q = \VexRiscv.CsrPlugin_mideleg_ST, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13455 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [5], Q = \VexRiscv.CsrPlugin_mideleg_ST). Adding SRST signal on $flatten\VexRiscv.$procdff$11962 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6035_Y, Q = \VexRiscv.CsrPlugin_medeleg_SPF, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13459 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [15], Q = \VexRiscv.CsrPlugin_medeleg_SPF). Adding SRST signal on $flatten\VexRiscv.$procdff$11961 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6047_Y, Q = \VexRiscv.CsrPlugin_medeleg_LPF, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13463 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [13], Q = \VexRiscv.CsrPlugin_medeleg_LPF). Adding SRST signal on $flatten\VexRiscv.$procdff$11960 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6059_Y, Q = \VexRiscv.CsrPlugin_medeleg_IPF, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13467 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [12], Q = \VexRiscv.CsrPlugin_medeleg_IPF). Adding SRST signal on $flatten\VexRiscv.$procdff$11959 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6071_Y, Q = \VexRiscv.CsrPlugin_medeleg_ES, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13471 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [9], Q = \VexRiscv.CsrPlugin_medeleg_ES). Adding SRST signal on $flatten\VexRiscv.$procdff$11958 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6083_Y, Q = \VexRiscv.CsrPlugin_medeleg_EU, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13475 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [8], Q = \VexRiscv.CsrPlugin_medeleg_EU). Adding SRST signal on $flatten\VexRiscv.$procdff$11957 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6095_Y, Q = \VexRiscv.CsrPlugin_medeleg_SAF, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13479 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [7], Q = \VexRiscv.CsrPlugin_medeleg_SAF). Adding SRST signal on $flatten\VexRiscv.$procdff$11956 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6107_Y, Q = \VexRiscv.CsrPlugin_medeleg_SAM, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13483 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [6], Q = \VexRiscv.CsrPlugin_medeleg_SAM). Adding SRST signal on $flatten\VexRiscv.$procdff$11955 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6119_Y, Q = \VexRiscv.CsrPlugin_medeleg_LAF, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13487 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [5], Q = \VexRiscv.CsrPlugin_medeleg_LAF). Adding SRST signal on $flatten\VexRiscv.$procdff$11954 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6131_Y, Q = \VexRiscv.CsrPlugin_medeleg_LAM, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13491 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [4], Q = \VexRiscv.CsrPlugin_medeleg_LAM). Adding SRST signal on $flatten\VexRiscv.$procdff$11953 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6143_Y, Q = \VexRiscv.CsrPlugin_medeleg_II, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13495 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [2], Q = \VexRiscv.CsrPlugin_medeleg_II). Adding SRST signal on $flatten\VexRiscv.$procdff$11952 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6155_Y, Q = \VexRiscv.CsrPlugin_medeleg_IAF, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13499 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [1], Q = \VexRiscv.CsrPlugin_medeleg_IAF). Adding SRST signal on $flatten\VexRiscv.$procdff$11951 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6167_Y, Q = \VexRiscv.CsrPlugin_medeleg_IAM, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13503 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [0], Q = \VexRiscv.CsrPlugin_medeleg_IAM). Adding SRST signal on $flatten\VexRiscv.$procdff$11950 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6175_Y, Q = \VexRiscv.CsrPlugin_mie_MSIE, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13507 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [3], Q = \VexRiscv.CsrPlugin_mie_MSIE). Adding SRST signal on $flatten\VexRiscv.$procdff$11949 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6183_Y, Q = \VexRiscv.CsrPlugin_mie_MTIE, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13511 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [7], Q = \VexRiscv.CsrPlugin_mie_MTIE). Adding SRST signal on $flatten\VexRiscv.$procdff$11948 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6191_Y, Q = \VexRiscv.CsrPlugin_mie_MEIE, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13515 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [11], Q = \VexRiscv.CsrPlugin_mie_MEIE). Adding SRST signal on $flatten\VexRiscv.$procdff$11947 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6216_Y, Q = \VexRiscv.CsrPlugin_mstatus_MPP, rval = 2'11). Adding SRST signal on $flatten\VexRiscv.$procdff$11946 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6241_Y, Q = \VexRiscv.CsrPlugin_mstatus_MPIE, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11945 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6266_Y, Q = \VexRiscv.CsrPlugin_mstatus_MIE, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11944 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6276_Y, Q = \VexRiscv._zz_210_, rval = 2'11). Adding SRST signal on $flatten\VexRiscv.$procdff$11943 ($dff) from module top (D = \VexRiscv._zz_184_, Q = \VexRiscv._zz_185_, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11941 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6288_Y, Q = \VexRiscv.MmuPlugin_shared_state_1_, rval = 3'000). Adding EN signal on $auto$opt_dff.cc:702:run$13524 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$6288_Y, Q = \VexRiscv.MmuPlugin_shared_state_1_). Adding SRST signal on $flatten\VexRiscv.$procdff$11940 ($dff) from module top (D = \VexRiscv.MmuPlugin_ports_1_entryToReplace_valueNext, Q = \VexRiscv.MmuPlugin_ports_1_entryToReplace_value, rval = 2'00). Adding SRST signal on $flatten\VexRiscv.$procdff$11939 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6316_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_3_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11938 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6331_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_2_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11937 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6346_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_1_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11936 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6361_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_0_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11935 ($dff) from module top (D = \VexRiscv.MmuPlugin_ports_0_entryToReplace_valueNext, Q = \VexRiscv.MmuPlugin_ports_0_entryToReplace_value, rval = 2'00). Adding SRST signal on $flatten\VexRiscv.$procdff$11934 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6376_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_3_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11933 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6391_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_2_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11932 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6406_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_1_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11931 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6421_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_0_valid, rval = 1'0). Adding SRST signal on $flatten\VexRiscv.$procdff$11930 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6433_Y, Q = \VexRiscv.MmuPlugin_satp_mode, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13564 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [31], Q = \VexRiscv.MmuPlugin_satp_mode). Adding SRST signal on $flatten\VexRiscv.$procdff$11929 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6446_Y, Q = \VexRiscv.MmuPlugin_status_mprv, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13568 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [17], Q = \VexRiscv.MmuPlugin_status_mprv). Adding SRST signal on $flatten\VexRiscv.$procdff$11928 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6462_Y, Q = \VexRiscv.MmuPlugin_status_mxr, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13572 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [19], Q = \VexRiscv.MmuPlugin_status_mxr). Adding SRST signal on $flatten\VexRiscv.$procdff$11927 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6478_Y, Q = \VexRiscv.MmuPlugin_status_sum, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13576 ($sdff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [18], Q = \VexRiscv.MmuPlugin_status_sum). Adding SRST signal on $flatten\VexRiscv.$procdff$11925 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6491_Y, Q = \VexRiscv._zz_139_, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13580 ($sdff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_valid, Q = \VexRiscv._zz_139_). Adding SRST signal on $flatten\VexRiscv.$procdff$11924 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6498_Y, Q = \VexRiscv._zz_132_, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13582 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$6498_Y, Q = \VexRiscv._zz_132_). Adding SRST signal on $flatten\VexRiscv.$procdff$11922 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6508_Y, Q = \VexRiscv.IBusCachedPlugin_injector_decodeRemoved, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13588 ($sdff) from module top (D = 1'1, Q = \VexRiscv.IBusCachedPlugin_injector_decodeRemoved). Adding SRST signal on $flatten\VexRiscv.$procdff$11921 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6517_Y, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_4, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13592 ($sdff) from module top (D = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_3, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_4). Adding SRST signal on $flatten\VexRiscv.$procdff$11920 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6526_Y, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_3, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13596 ($sdff) from module top (D = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_2, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_3). Adding SRST signal on $flatten\VexRiscv.$procdff$11919 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6535_Y, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_2, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13600 ($sdff) from module top (D = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_1, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_2). Adding SRST signal on $flatten\VexRiscv.$procdff$11918 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6544_Y, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_1, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13604 ($sdff) from module top (D = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_0, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_1). Adding SRST signal on $flatten\VexRiscv.$procdff$11917 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6553_Y, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_0, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13606 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$6553_Y, Q = \VexRiscv.IBusCachedPlugin_injector_nextPcCalc_valids_0). Adding SRST signal on $flatten\VexRiscv.$procdff$11916 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6558_Y, Q = \VexRiscv._zz_118_, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13612 ($sdff) from module top (D = \VexRiscv.IBusCachedPlugin_iBusRsp_stages_1_output_valid, Q = \VexRiscv._zz_118_). Adding SRST signal on $flatten\VexRiscv.$procdff$11915 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6567_Y, Q = \VexRiscv._zz_116_, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13614 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$6567_Y, Q = \VexRiscv._zz_116_). Adding SRST signal on $flatten\VexRiscv.$procdff$11914 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6574_Y, Q = \VexRiscv.IBusCachedPlugin_fetchPc_inc, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13620 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$6574_Y, Q = \VexRiscv.IBusCachedPlugin_fetchPc_inc). Adding SRST signal on $flatten\VexRiscv.$procdff$11912 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6581_Y, Q = \VexRiscv.IBusCachedPlugin_fetchPc_pcReg, rval = 0). Adding EN signal on $auto$opt_dff.cc:702:run$13624 ($sdff) from module top (D = { \VexRiscv.IBusCachedPlugin_fetchPc_pc [31:12] \VexRiscv.IBusCachedPlugin_cache._zz_5_ \VexRiscv.IBusCachedPlugin_cache._zz_8_ [2:0] 2'00 }, Q = \VexRiscv.IBusCachedPlugin_fetchPc_pcReg). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13625 ($sdffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$13625 ($sdffe) from module top. Adding SRST signal on $flatten\VexRiscv.$procdff$11911 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6588_Y, Q = \VexRiscv.writeBack_arbitration_isValid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13626 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$6588_Y, Q = \VexRiscv.writeBack_arbitration_isValid). Adding SRST signal on $flatten\VexRiscv.$procdff$11910 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6595_Y, Q = \VexRiscv.memory_arbitration_isValid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13630 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$6595_Y, Q = \VexRiscv.memory_arbitration_isValid). Adding SRST signal on $flatten\VexRiscv.$procdff$11909 ($dff) from module top (D = $flatten\VexRiscv.$procmux$6602_Y, Q = \VexRiscv.execute_arbitration_isValid, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13634 ($sdff) from module top (D = $flatten\VexRiscv.$procmux$6602_Y, Q = \VexRiscv.execute_arbitration_isValid). Adding SRST signal on $flatten\VexRiscv.$procdff$11907 ($dff) from module top (D = $or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3186$886_Y, Q = \VexRiscv.iBusWishbone_DAT_MISO_regNext, rval = 32'11111111111111111111111111111111). Adding EN signal on $flatten\VexRiscv.$procdff$11906 ($dff) from module top (D = \VexRiscv.decode_IS_RS1_SIGNED, Q = \VexRiscv.decode_to_execute_IS_RS1_SIGNED). Adding EN signal on $flatten\VexRiscv.$procdff$11905 ($dff) from module top (D = \VexRiscv.decode_RS1, Q = \VexRiscv.decode_to_execute_RS1). Adding EN signal on $flatten\VexRiscv.$procdff$11904 ($dff) from module top (D = \VexRiscv.decode_BYPASSABLE_EXECUTE_STAGE, Q = \VexRiscv.decode_to_execute_BYPASSABLE_EXECUTE_STAGE). Adding EN signal on $flatten\VexRiscv.$procdff$11903 ($dff) from module top (D = \VexRiscv.execute_to_memory_IS_MUL, Q = \VexRiscv.memory_to_writeBack_IS_MUL). Adding EN signal on $flatten\VexRiscv.$procdff$11902 ($dff) from module top (D = \VexRiscv.decode_to_execute_IS_MUL, Q = \VexRiscv.execute_to_memory_IS_MUL). Adding EN signal on $flatten\VexRiscv.$procdff$11901 ($dff) from module top (D = \VexRiscv.decode_IS_MUL, Q = \VexRiscv.decode_to_execute_IS_MUL). Adding EN signal on $flatten\VexRiscv.$procdff$11900 ($dff) from module top (D = \VexRiscv.decode_to_execute_IS_DIV, Q = \VexRiscv.execute_to_memory_IS_DIV). Adding EN signal on $flatten\VexRiscv.$procdff$11899 ($dff) from module top (D = \VexRiscv.decode_IS_DIV, Q = \VexRiscv.decode_to_execute_IS_DIV). Adding EN signal on $flatten\VexRiscv.$procdff$11895 ($dff) from module top (D = { \VexRiscv._zz_522_ \VexRiscv._zz_523_ }, Q = \VexRiscv.decode_to_execute_BRANCH_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11894 ($dff) from module top (D = \VexRiscv.decode_CSR_WRITE_OPCODE, Q = \VexRiscv.decode_to_execute_CSR_WRITE_OPCODE). Adding EN signal on $flatten\VexRiscv.$procdff$11893 ($dff) from module top (D = \VexRiscv.execute_to_memory_MEMORY_ENABLE, Q = \VexRiscv.memory_to_writeBack_MEMORY_ENABLE). Adding EN signal on $flatten\VexRiscv.$procdff$11892 ($dff) from module top (D = \VexRiscv.decode_to_execute_MEMORY_ENABLE, Q = \VexRiscv.execute_to_memory_MEMORY_ENABLE). Adding EN signal on $flatten\VexRiscv.$procdff$11891 ($dff) from module top (D = \VexRiscv.decode_MEMORY_ENABLE, Q = \VexRiscv.decode_to_execute_MEMORY_ENABLE). Adding EN signal on $flatten\VexRiscv.$procdff$11890 ($dff) from module top (D = \VexRiscv.decode_MEMORY_LRSC, Q = \VexRiscv.decode_to_execute_MEMORY_LRSC). Adding EN signal on $flatten\VexRiscv.$procdff$11889 ($dff) from module top (D = \VexRiscv.execute_MUL_LH, Q = \VexRiscv.execute_to_memory_MUL_LH). Adding EN signal on $flatten\VexRiscv.$procdff$11888 ($dff) from module top (D = \VexRiscv.execute_to_memory_MEMORY_WR, Q = \VexRiscv.memory_to_writeBack_MEMORY_WR). Adding EN signal on $flatten\VexRiscv.$procdff$11887 ($dff) from module top (D = \VexRiscv.decode_to_execute_MEMORY_WR, Q = \VexRiscv.execute_to_memory_MEMORY_WR). Adding EN signal on $flatten\VexRiscv.$procdff$11886 ($dff) from module top (D = \VexRiscv.decode_MEMORY_WR, Q = \VexRiscv.decode_to_execute_MEMORY_WR). Adding EN signal on $flatten\VexRiscv.$procdff$11885 ($dff) from module top (D = \VexRiscv.execute_to_memory_PC, Q = \VexRiscv.memory_to_writeBack_PC). Adding EN signal on $flatten\VexRiscv.$procdff$11884 ($dff) from module top (D = \VexRiscv.decode_to_execute_PC, Q = \VexRiscv.execute_to_memory_PC). Adding EN signal on $flatten\VexRiscv.$procdff$11883 ($dff) from module top (D = \VexRiscv._zz_119_, Q = \VexRiscv.decode_to_execute_PC). Adding EN signal on $flatten\VexRiscv.$procdff$11882 ($dff) from module top (D = \VexRiscv.decode_to_execute_SHIFT_CTRL, Q = \VexRiscv.execute_to_memory_SHIFT_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11881 ($dff) from module top (D = { \VexRiscv._zz_547_ \VexRiscv._zz_6_ [0] }, Q = \VexRiscv.decode_to_execute_SHIFT_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11880 ($dff) from module top (D = { \VexRiscv._zz_627_ \VexRiscv._zz_628_ }, Q = \VexRiscv.decode_to_execute_ALU_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11879 ($dff) from module top (D = \VexRiscv.decode_CSR_READ_OPCODE, Q = \VexRiscv.decode_to_execute_CSR_READ_OPCODE). Adding EN signal on $flatten\VexRiscv.$procdff$11878 ($dff) from module top (D = \VexRiscv.execute_BRANCH_DO, Q = \VexRiscv.execute_to_memory_BRANCH_DO). Adding EN signal on $flatten\VexRiscv.$procdff$11877 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_decodePrediction_cmd_hadBranch, Q = \VexRiscv.decode_to_execute_PREDICTION_HAD_BRANCHED2). Adding EN signal on $flatten\VexRiscv.$procdff$11876 ($dff) from module top (D = \VexRiscv.execute_to_memory_IS_SFENCE_VMA, Q = \VexRiscv.memory_to_writeBack_IS_SFENCE_VMA). Adding EN signal on $flatten\VexRiscv.$procdff$11875 ($dff) from module top (D = \VexRiscv.decode_to_execute_IS_SFENCE_VMA, Q = \VexRiscv.execute_to_memory_IS_SFENCE_VMA). Adding EN signal on $flatten\VexRiscv.$procdff$11874 ($dff) from module top (D = \VexRiscv.decode_IS_SFENCE_VMA, Q = \VexRiscv.decode_to_execute_IS_SFENCE_VMA). Adding EN signal on $flatten\VexRiscv.$procdff$11873 ($dff) from module top (D = \VexRiscv.execute_to_memory_MUL_HH, Q = \VexRiscv.memory_to_writeBack_MUL_HH). Adding EN signal on $flatten\VexRiscv.$procdff$11872 ($dff) from module top (D = \VexRiscv.execute_MUL_HH, Q = \VexRiscv.execute_to_memory_MUL_HH). Adding EN signal on $flatten\VexRiscv.$procdff$11871 ($dff) from module top (D = \VexRiscv.decode_to_execute_BYPASSABLE_MEMORY_STAGE, Q = \VexRiscv.execute_to_memory_BYPASSABLE_MEMORY_STAGE). Adding EN signal on $flatten\VexRiscv.$procdff$11870 ($dff) from module top (D = \VexRiscv.decode_BYPASSABLE_MEMORY_STAGE, Q = \VexRiscv.decode_to_execute_BYPASSABLE_MEMORY_STAGE). Adding EN signal on $flatten\VexRiscv.$procdff$11869 ($dff) from module top (D = { \VexRiscv._zz_609_ \VexRiscv._zz_12_ [0] }, Q = \VexRiscv.decode_to_execute_SRC1_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11868 ($dff) from module top (D = \VexRiscv.decode_SRC_USE_SUB_LESS, Q = \VexRiscv.decode_to_execute_SRC_USE_SUB_LESS). Adding EN signal on $flatten\VexRiscv.$procdff$11867 ($dff) from module top (D = \VexRiscv.execute_MUL_HL, Q = \VexRiscv.execute_to_memory_MUL_HL). Adding EN signal on $flatten\VexRiscv.$procdff$11866 ($dff) from module top (D = \VexRiscv.decode_MEMORY_AMO, Q = \VexRiscv.decode_to_execute_MEMORY_AMO). Adding EN signal on $flatten\VexRiscv.$procdff$11865 ($dff) from module top (D = \VexRiscv.decode_SRC_LESS_UNSIGNED, Q = \VexRiscv.decode_to_execute_SRC_LESS_UNSIGNED). Adding EN signal on $flatten\VexRiscv.$procdff$11864 ($dff) from module top (D = \VexRiscv.decode_SRC2_FORCE_ZERO, Q = \VexRiscv.decode_to_execute_SRC2_FORCE_ZERO). Adding EN signal on $flatten\VexRiscv.$procdff$11863 ($dff) from module top (D = \VexRiscv.decode_RS2, Q = \VexRiscv.decode_to_execute_RS2). Adding EN signal on $flatten\VexRiscv.$procdff$11862 ($dff) from module top (D = \VexRiscv.execute_MUL_LL, Q = \VexRiscv.execute_to_memory_MUL_LL). Adding EN signal on $flatten\VexRiscv.$procdff$11861 ($dff) from module top (D = { \VexRiscv._zz_509_ \VexRiscv._zz_511_ }, Q = \VexRiscv.decode_to_execute_ALU_BITWISE_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11860 ($dff) from module top (D = { \VexRiscv._zz_565_ \VexRiscv._zz_566_ }, Q = \VexRiscv.decode_to_execute_SRC2_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11859 ($dff) from module top (D = \VexRiscv._zz_406_ [31:0], Q = \VexRiscv.execute_to_memory_SHIFT_RIGHT). Adding EN signal on $flatten\VexRiscv.$procdff$11858 ($dff) from module top (D = { \VexRiscv.execute_BranchPlugin_branchAdder [31:1] 1'0 }, Q = \VexRiscv.execute_to_memory_BRANCH_CALC). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13684 ($dffe) from module top. Adding EN signal on $flatten\VexRiscv.$procdff$11857 ($dff) from module top (D = \VexRiscv.execute_to_memory_MEMORY_ADDRESS_LOW, Q = \VexRiscv.memory_to_writeBack_MEMORY_ADDRESS_LOW). Adding EN signal on $flatten\VexRiscv.$procdff$11856 ($dff) from module top (D = \VexRiscv.dataCache_1_.io_cpu_execute_address [1:0], Q = \VexRiscv.execute_to_memory_MEMORY_ADDRESS_LOW). Adding EN signal on $flatten\VexRiscv.$procdff$11855 ($dff) from module top (D = \VexRiscv.decode_to_execute_INSTRUCTION, Q = \VexRiscv.execute_to_memory_INSTRUCTION). Adding EN signal on $flatten\VexRiscv.$procdff$11854 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen, Q = \VexRiscv.decode_to_execute_INSTRUCTION). Adding EN signal on $flatten\VexRiscv.$procdff$11853 ($dff) from module top (D = \VexRiscv.decode_IS_RS1_SIGNED, Q = \VexRiscv.decode_to_execute_IS_RS2_SIGNED). Adding EN signal on $flatten\VexRiscv.$procdff$11852 ($dff) from module top (D = \VexRiscv.execute_to_memory_REGFILE_WRITE_VALID, Q = \VexRiscv.memory_to_writeBack_REGFILE_WRITE_VALID). Adding EN signal on $flatten\VexRiscv.$procdff$11851 ($dff) from module top (D = \VexRiscv.decode_to_execute_REGFILE_WRITE_VALID, Q = \VexRiscv.execute_to_memory_REGFILE_WRITE_VALID). Adding EN signal on $flatten\VexRiscv.$procdff$11850 ($dff) from module top (D = \VexRiscv.decode_REGFILE_WRITE_VALID, Q = \VexRiscv.decode_to_execute_REGFILE_WRITE_VALID). Adding SRST signal on $auto$opt_dff.cc:764:run$13692 ($dffe) from module top (D = \VexRiscv._zz_74_, Q = \VexRiscv.decode_to_execute_REGFILE_WRITE_VALID, rval = 1'0). Adding EN signal on $flatten\VexRiscv.$procdff$11849 ($dff) from module top (D = \VexRiscv.decode_MEMORY_MANAGMENT, Q = \VexRiscv.decode_to_execute_MEMORY_MANAGMENT). Adding EN signal on $flatten\VexRiscv.$procdff$11848 ($dff) from module top (D = \VexRiscv.execute_to_memory_ENV_CTRL, Q = \VexRiscv.memory_to_writeBack_ENV_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11847 ($dff) from module top (D = \VexRiscv.decode_to_execute_ENV_CTRL, Q = \VexRiscv.execute_to_memory_ENV_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11846 ($dff) from module top (D = { \VexRiscv._zz_536_ \VexRiscv._zz_537_ }, Q = \VexRiscv.decode_to_execute_ENV_CTRL). Adding EN signal on $flatten\VexRiscv.$procdff$11845 ($dff) from module top (D = \VexRiscv._zz_42_, Q = \VexRiscv.execute_to_memory_REGFILE_WRITE_DATA). Adding EN signal on $flatten\VexRiscv.$procdff$11844 ($dff) from module top (D = \VexRiscv.decode_IS_CSR, Q = \VexRiscv.decode_to_execute_IS_CSR). Adding EN signal on $flatten\VexRiscv.$procdff$11843 ($dff) from module top (D = \VexRiscv.memory_MUL_LOW, Q = \VexRiscv.memory_to_writeBack_MUL_LOW). Adding EN signal on $flatten\VexRiscv.$procdff$11841 ($dff) from module top (D = \VexRiscv._zz_440_ [31:0], Q = \VexRiscv.memory_DivPlugin_div_result). Adding SRST signal on $flatten\VexRiscv.$procdff$11840 ($dff) from module top (D = $flatten\VexRiscv.$procmux$4908_Y, Q = \VexRiscv.memory_DivPlugin_div_done, rval = 1'0). Adding EN signal on $auto$opt_dff.cc:702:run$13706 ($sdff) from module top (D = 1'1, Q = \VexRiscv.memory_DivPlugin_div_done). Adding EN signal on $flatten\VexRiscv.$procdff$11839 ($dff) from module top (D = $flatten\VexRiscv.$logic_and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7536$3546_Y, Q = \VexRiscv.memory_DivPlugin_div_needRevert). Adding SRST signal on $flatten\VexRiscv.$procdff$11838 ($dff) from module top (D = $flatten\VexRiscv.$procmux$4768_Y, Q = \VexRiscv.memory_DivPlugin_accumulator [31:0], rval = 0). Adding EN signal on $flatten\VexRiscv.$procdff$11838 ($dff) from module top (D = 33'000000000000000000000000000000000, Q = \VexRiscv.memory_DivPlugin_accumulator [64:32]). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 2 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 3 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 4 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 5 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 6 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 7 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 8 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 9 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 10 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 11 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 12 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 13 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 14 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 15 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 16 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 17 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 18 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 19 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 20 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 21 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 22 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 23 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 24 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 25 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 26 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 27 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 28 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 29 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 30 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 31 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Setting constant 0-bit at position 32 on $auto$opt_dff.cc:764:run$13710 ($dffe) from module top. Adding EN signal on $auto$opt_dff.cc:702:run$13709 ($sdff) from module top (D = $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7526$3530_Y, Q = \VexRiscv.memory_DivPlugin_accumulator [31:0]). Adding EN signal on $flatten\VexRiscv.$procdff$11837 ($dff) from module top (D = $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7535$3537_Y, Q = \VexRiscv.memory_DivPlugin_rs2). Adding EN signal on $flatten\VexRiscv.$procdff$11836 ($dff) from module top (D = $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3534_Y [32], Q = \VexRiscv.memory_DivPlugin_rs1 [32]). Adding EN signal on $flatten\VexRiscv.$procdff$11836 ($dff) from module top (D = $flatten\VexRiscv.$0\memory_DivPlugin_rs1[32:0] [31:0], Q = \VexRiscv.memory_DivPlugin_rs1 [31:0]). Adding EN signal on $flatten\VexRiscv.$procdff$11833 ($dff) from module top (D = $flatten\VexRiscv.$0\CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr[31:0], Q = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr). Adding EN signal on $flatten\VexRiscv.$procdff$11832 ($dff) from module top (D = $flatten\VexRiscv.$0\CsrPlugin_exceptionPortCtrl_exceptionContext_code[3:0], Q = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_code). Adding EN signal on $flatten\VexRiscv.$procdff$11827 ($dff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData, Q = \VexRiscv.CsrPlugin_sscratch). Adding EN signal on $flatten\VexRiscv.$procdff$11826 ($dff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [31:2], Q = \VexRiscv.CsrPlugin_stvec_base). Adding EN signal on $flatten\VexRiscv.$procdff$11825 ($dff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [1:0], Q = \VexRiscv.CsrPlugin_stvec_mode). Adding EN signal on $flatten\VexRiscv.$procdff$11821 ($dff) from module top (D = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr, Q = \VexRiscv.CsrPlugin_mtval). Adding EN signal on $flatten\VexRiscv.$procdff$11820 ($dff) from module top (D = \VexRiscv.CsrPlugin_trapCause, Q = \VexRiscv.CsrPlugin_mcause_exceptionCode). Adding EN signal on $flatten\VexRiscv.$procdff$11819 ($dff) from module top (D = $flatten\VexRiscv.$logic_not$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7498$3525_Y, Q = \VexRiscv.CsrPlugin_mcause_interrupt). Adding EN signal on $flatten\VexRiscv.$procdff$11818 ($dff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData, Q = \VexRiscv.CsrPlugin_mscratch). Adding SRST signal on $flatten\VexRiscv.$procdff$11817 ($dff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [3], Q = \VexRiscv.CsrPlugin_mip_MSIP, rval = 1'0). Adding EN signal on $flatten\VexRiscv.$procdff$11813 ($dff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [31:2], Q = \VexRiscv.CsrPlugin_mtvec_base). Adding EN signal on $flatten\VexRiscv.$procdff$11811 ($dff) from module top (D = \VexRiscv._zz_93_, Q = \VexRiscv._zz_187_). Adding EN signal on $flatten\VexRiscv.$procdff$11810 ($dff) from module top (D = \VexRiscv.memory_to_writeBack_INSTRUCTION [11:7], Q = \VexRiscv._zz_186_). Adding EN signal on $flatten\VexRiscv.$procdff$11809 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [31:20], Q = \VexRiscv.MmuPlugin_shared_pteBuffer_PPN1). Adding EN signal on $flatten\VexRiscv.$procdff$11808 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_shared_pteBuffer_PPN0). Adding EN signal on $flatten\VexRiscv.$procdff$11798 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5158_Y, Q = \VexRiscv.MmuPlugin_shared_portId). Adding SRST signal on $auto$opt_dff.cc:764:run$13766 ($dffe) from module top (D = $flatten\VexRiscv.$procmux$5156_Y, Q = \VexRiscv.MmuPlugin_shared_portId, rval = 1'1). Adding EN signal on $flatten\VexRiscv.$procdff$11797 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5164_Y, Q = \VexRiscv.MmuPlugin_shared_vpn_1). Adding EN signal on $flatten\VexRiscv.$procdff$11796 ($dff) from module top (D = $flatten\VexRiscv.$procmux$5170_Y, Q = \VexRiscv.MmuPlugin_shared_vpn_0). Adding EN signal on $flatten\VexRiscv.$procdff$11795 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [4], Q = \VexRiscv.MmuPlugin_ports_1_cache_3_allowUser). Adding EN signal on $flatten\VexRiscv.$procdff$11794 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [3], Q = \VexRiscv.MmuPlugin_ports_1_cache_3_allowExecute). Adding EN signal on $flatten\VexRiscv.$procdff$11791 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [29:20], Q = \VexRiscv.MmuPlugin_ports_1_cache_3_physicalAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11790 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_ports_1_cache_3_physicalAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11789 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_1, Q = \VexRiscv.MmuPlugin_ports_1_cache_3_virtualAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11788 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_0, Q = \VexRiscv.MmuPlugin_ports_1_cache_3_virtualAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11787 ($dff) from module top (D = $flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_3_superPage). Adding EN signal on $flatten\VexRiscv.$procdff$11786 ($dff) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3484_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_3_exception). Adding EN signal on $flatten\VexRiscv.$procdff$11785 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [4], Q = \VexRiscv.MmuPlugin_ports_1_cache_2_allowUser). Adding EN signal on $flatten\VexRiscv.$procdff$11784 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [3], Q = \VexRiscv.MmuPlugin_ports_1_cache_2_allowExecute). Adding EN signal on $flatten\VexRiscv.$procdff$11781 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [29:20], Q = \VexRiscv.MmuPlugin_ports_1_cache_2_physicalAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11780 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_ports_1_cache_2_physicalAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11779 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_1, Q = \VexRiscv.MmuPlugin_ports_1_cache_2_virtualAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11778 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_0, Q = \VexRiscv.MmuPlugin_ports_1_cache_2_virtualAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11777 ($dff) from module top (D = $flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_2_superPage). Adding EN signal on $flatten\VexRiscv.$procdff$11776 ($dff) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3484_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_2_exception). Adding EN signal on $flatten\VexRiscv.$procdff$11775 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [4], Q = \VexRiscv.MmuPlugin_ports_1_cache_1_allowUser). Adding EN signal on $flatten\VexRiscv.$procdff$11774 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [3], Q = \VexRiscv.MmuPlugin_ports_1_cache_1_allowExecute). Adding EN signal on $flatten\VexRiscv.$procdff$11771 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [29:20], Q = \VexRiscv.MmuPlugin_ports_1_cache_1_physicalAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11770 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_ports_1_cache_1_physicalAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11769 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_1, Q = \VexRiscv.MmuPlugin_ports_1_cache_1_virtualAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11768 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_0, Q = \VexRiscv.MmuPlugin_ports_1_cache_1_virtualAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11767 ($dff) from module top (D = $flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_1_superPage). Adding EN signal on $flatten\VexRiscv.$procdff$11766 ($dff) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3484_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_1_exception). Adding EN signal on $flatten\VexRiscv.$procdff$11765 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [4], Q = \VexRiscv.MmuPlugin_ports_1_cache_0_allowUser). Adding EN signal on $flatten\VexRiscv.$procdff$11764 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [3], Q = \VexRiscv.MmuPlugin_ports_1_cache_0_allowExecute). Adding EN signal on $flatten\VexRiscv.$procdff$11761 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [29:20], Q = \VexRiscv.MmuPlugin_ports_1_cache_0_physicalAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11760 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_ports_1_cache_0_physicalAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11759 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_1, Q = \VexRiscv.MmuPlugin_ports_1_cache_0_virtualAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11758 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_0, Q = \VexRiscv.MmuPlugin_ports_1_cache_0_virtualAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11757 ($dff) from module top (D = $flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_0_superPage). Adding EN signal on $flatten\VexRiscv.$procdff$11756 ($dff) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3484_Y, Q = \VexRiscv.MmuPlugin_ports_1_cache_0_exception). Adding EN signal on $flatten\VexRiscv.$procdff$11755 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [4], Q = \VexRiscv.MmuPlugin_ports_0_cache_3_allowUser). Adding EN signal on $flatten\VexRiscv.$procdff$11754 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [3], Q = \VexRiscv.MmuPlugin_ports_0_cache_3_allowExecute). Adding EN signal on $flatten\VexRiscv.$procdff$11753 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [2], Q = \VexRiscv.MmuPlugin_ports_0_cache_3_allowWrite). Adding EN signal on $flatten\VexRiscv.$procdff$11752 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [1], Q = \VexRiscv.MmuPlugin_ports_0_cache_3_allowRead). Adding EN signal on $flatten\VexRiscv.$procdff$11751 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [29:20], Q = \VexRiscv.MmuPlugin_ports_0_cache_3_physicalAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11750 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_ports_0_cache_3_physicalAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11749 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_1, Q = \VexRiscv.MmuPlugin_ports_0_cache_3_virtualAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11748 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_0, Q = \VexRiscv.MmuPlugin_ports_0_cache_3_virtualAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11747 ($dff) from module top (D = $flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_3_superPage). Adding EN signal on $flatten\VexRiscv.$procdff$11746 ($dff) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3484_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_3_exception). Adding EN signal on $flatten\VexRiscv.$procdff$11745 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [4], Q = \VexRiscv.MmuPlugin_ports_0_cache_2_allowUser). Adding EN signal on $flatten\VexRiscv.$procdff$11744 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [3], Q = \VexRiscv.MmuPlugin_ports_0_cache_2_allowExecute). Adding EN signal on $flatten\VexRiscv.$procdff$11743 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [2], Q = \VexRiscv.MmuPlugin_ports_0_cache_2_allowWrite). Adding EN signal on $flatten\VexRiscv.$procdff$11742 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [1], Q = \VexRiscv.MmuPlugin_ports_0_cache_2_allowRead). Adding EN signal on $flatten\VexRiscv.$procdff$11741 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [29:20], Q = \VexRiscv.MmuPlugin_ports_0_cache_2_physicalAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11740 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_ports_0_cache_2_physicalAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11739 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_1, Q = \VexRiscv.MmuPlugin_ports_0_cache_2_virtualAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11738 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_0, Q = \VexRiscv.MmuPlugin_ports_0_cache_2_virtualAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11737 ($dff) from module top (D = $flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_2_superPage). Adding EN signal on $flatten\VexRiscv.$procdff$11736 ($dff) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3484_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_2_exception). Adding EN signal on $flatten\VexRiscv.$procdff$11735 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [4], Q = \VexRiscv.MmuPlugin_ports_0_cache_1_allowUser). Adding EN signal on $flatten\VexRiscv.$procdff$11734 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [3], Q = \VexRiscv.MmuPlugin_ports_0_cache_1_allowExecute). Adding EN signal on $flatten\VexRiscv.$procdff$11733 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [2], Q = \VexRiscv.MmuPlugin_ports_0_cache_1_allowWrite). Adding EN signal on $flatten\VexRiscv.$procdff$11732 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [1], Q = \VexRiscv.MmuPlugin_ports_0_cache_1_allowRead). Adding EN signal on $flatten\VexRiscv.$procdff$11731 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [29:20], Q = \VexRiscv.MmuPlugin_ports_0_cache_1_physicalAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11730 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_ports_0_cache_1_physicalAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11729 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_1, Q = \VexRiscv.MmuPlugin_ports_0_cache_1_virtualAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11728 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_0, Q = \VexRiscv.MmuPlugin_ports_0_cache_1_virtualAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11727 ($dff) from module top (D = $flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_1_superPage). Adding EN signal on $flatten\VexRiscv.$procdff$11726 ($dff) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3484_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_1_exception). Adding EN signal on $flatten\VexRiscv.$procdff$11725 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [4], Q = \VexRiscv.MmuPlugin_ports_0_cache_0_allowUser). Adding EN signal on $flatten\VexRiscv.$procdff$11724 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [3], Q = \VexRiscv.MmuPlugin_ports_0_cache_0_allowExecute). Adding EN signal on $flatten\VexRiscv.$procdff$11723 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [2], Q = \VexRiscv.MmuPlugin_ports_0_cache_0_allowWrite). Adding EN signal on $flatten\VexRiscv.$procdff$11722 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [1], Q = \VexRiscv.MmuPlugin_ports_0_cache_0_allowRead). Adding EN signal on $flatten\VexRiscv.$procdff$11721 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [29:20], Q = \VexRiscv.MmuPlugin_ports_0_cache_0_physicalAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11720 ($dff) from module top (D = \VexRiscv.dataCache_1__io_cpu_writeBack_data [19:10], Q = \VexRiscv.MmuPlugin_ports_0_cache_0_physicalAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11719 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_1, Q = \VexRiscv.MmuPlugin_ports_0_cache_0_virtualAddress_1). Adding EN signal on $flatten\VexRiscv.$procdff$11718 ($dff) from module top (D = \VexRiscv.MmuPlugin_shared_vpn_0, Q = \VexRiscv.MmuPlugin_ports_0_cache_0_virtualAddress_0). Adding EN signal on $flatten\VexRiscv.$procdff$11717 ($dff) from module top (D = $flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_0_superPage). Adding EN signal on $flatten\VexRiscv.$procdff$11716 ($dff) from module top (D = $flatten\VexRiscv.$logic_or$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3484_Y, Q = \VexRiscv.MmuPlugin_ports_0_cache_0_exception). Adding EN signal on $flatten\VexRiscv.$procdff$11715 ($dff) from module top (D = \VexRiscv.execute_CsrPlugin_writeData [19:0], Q = \VexRiscv.MmuPlugin_satp_ppn). Adding EN signal on $flatten\VexRiscv.$procdff$11713 ($dff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_payload_length, Q = \VexRiscv._zz_144_). Adding EN signal on $flatten\VexRiscv.$procdff$11712 ($dff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_payload_mask, Q = \VexRiscv._zz_143_). Adding EN signal on $flatten\VexRiscv.$procdff$11711 ($dff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_payload_data, Q = \VexRiscv._zz_142_). Adding EN signal on $flatten\VexRiscv.$procdff$11710 ($dff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_payload_address, Q = \VexRiscv._zz_141_). Adding EN signal on $flatten\VexRiscv.$procdff$11709 ($dff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_payload_wr, Q = \VexRiscv._zz_140_). Adding EN signal on $flatten\VexRiscv.$procdff$11707 ($dff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_payload_length, Q = \VexRiscv._zz_137_). Adding EN signal on $flatten\VexRiscv.$procdff$11706 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageB_mask, Q = \VexRiscv._zz_136_). Adding EN signal on $flatten\VexRiscv.$procdff$11705 ($dff) from module top (D = \VexRiscv.dataCache_1_.stageB_requestDataBypass, Q = \VexRiscv._zz_135_). Adding EN signal on $flatten\VexRiscv.$procdff$11704 ($dff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_payload_address, Q = \VexRiscv._zz_134_). Adding EN signal on $flatten\VexRiscv.$procdff$11703 ($dff) from module top (D = \VexRiscv.dataCache_1__io_mem_cmd_payload_wr, Q = \VexRiscv._zz_133_). Adding EN signal on $flatten\VexRiscv.$procdff$11702 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_s1_tightlyCoupledHit, Q = \VexRiscv.IBusCachedPlugin_s2_tightlyCoupledHit). Adding EN signal on $flatten\VexRiscv.$procdff$11701 ($dff) from module top (D = 1'0, Q = \VexRiscv.IBusCachedPlugin_s1_tightlyCoupledHit). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$14072 ($dffe) from module top. Adding EN signal on $flatten\VexRiscv.$procdff$11700 ($dff) from module top (D = \VexRiscv.IBusCachedPlugin_fetchPc_pcReg, Q = \VexRiscv._zz_119_). 4.14.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 985 unused cells and 959 unused wires. 4.14.8. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.14.9. Rerunning OPT passes. (Maybe there is more to do..) 4.14.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.14.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. New input vector for $reduce_or cell $auto$opt_dff.cc:277:combine_resets$12556: { $auto$rtlil.cc:2121:Not$12554 $procmux$10261_CMP $procmux$10260_CMP } Optimizing cells in module \top. Performed a total of 1 changes. 4.14.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 174 cells. 4.14.13. Executing OPT_DFF pass (perform DFF optimizations). Adding SRST signal on $flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11633 ($dff) from module top (D = 1'x, Q = $flatten\VexRiscv.\IBusCachedPlugin_cache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:164$3833_DATA [1], rval = 1'0). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$14074 ($sdff) from module top. Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$14073 ($dffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$14073 ($dffe) from module top. Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$14071 ($dffe) from module top. 4.14.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 0 unused cells and 174 unused wires. 4.14.15. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.14.16. Rerunning OPT passes. (Maybe there is more to do..) 4.14.17. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.14.18. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Performed a total of 0 changes. 4.14.19. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.14.20. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13659 ($dffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$13659 ($dffe) from module top. 4.14.21. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 0 unused cells and 1 unused wires. 4.14.22. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.14.23. Rerunning OPT passes. (Maybe there is more to do..) 4.14.24. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.14.25. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Performed a total of 0 changes. 4.14.26. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.14.27. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13658 ($dffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$13658 ($dffe) from module top. 4.14.28. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.14.29. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.14.30. Rerunning OPT passes. (Maybe there is more to do..) 4.14.31. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.14.32. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Performed a total of 0 changes. 4.14.33. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.14.34. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13657 ($dffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$13657 ($dffe) from module top. 4.14.35. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.14.36. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.14.37. Rerunning OPT passes. (Maybe there is more to do..) 4.14.38. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.14.39. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Performed a total of 0 changes. 4.14.40. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.14.41. Executing OPT_DFF pass (perform DFF optimizations). 4.14.42. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.14.43. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.14.44. Finished OPT passes. (There is nothing left to do.) 4.15. Executing WREDUCE pass (reducing word size of cells). Removed top 18 address bits (of 32) from memory init port top.$meminit$\mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1954 (mem). Removed top 26 address bits (of 32) from memory init port top.$meminit$\mem_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1955 (mem_2). Removed top 2 bits (of 13) from port A of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1907$337 ($or). Removed top 4 bits (of 13) from port B of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1907$337 ($or). Removed top 2 bits (of 13) from port Y of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1907$337 ($or). Removed top 2 bits (of 13) from port A of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2058$367 ($or). Removed top 4 bits (of 13) from port B of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2058$367 ($or). Removed top 2 bits (of 13) from port Y of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2058$367 ($or). Removed top 2 bits (of 13) from port A of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2209$397 ($or). Removed top 4 bits (of 13) from port B of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2209$397 ($or). Removed top 2 bits (of 13) from port Y of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2209$397 ($or). Removed top 5 bits (of 9) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$12628 ($ne). Removed top 2 bits (of 13) from port A of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2360$427 ($or). Removed top 4 bits (of 13) from port B of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2360$427 ($or). Removed top 2 bits (of 13) from port Y of cell top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2360$427 ($or). Removed top 9 bits (of 30) from port Y of cell top.$sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2847$798 ($sub). Removed top 9 bits (of 30) from port A of cell top.$sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2847$798 ($sub). Removed top 26 bits (of 27) from port B of cell top.$sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2847$798 ($sub). Removed top 5 bits (of 9) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$12648 ($ne). Removed top 1 bits (of 2) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$12775 ($ne). Removed top 5 bits (of 9) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$12668 ($ne). Removed cell top.$procmux$8460 ($mux). Removed cell top.$procmux$8462 ($mux). Removed cell top.$procmux$8466 ($mux). Removed cell top.$procmux$8468 ($mux). Removed cell top.$procmux$8472 ($mux). Removed cell top.$procmux$8474 ($mux). Removed cell top.$procmux$8478 ($mux). Removed cell top.$procmux$8480 ($mux). Removed cell top.$procmux$8484 ($mux). Removed cell top.$procmux$8486 ($mux). Removed cell top.$procmux$8490 ($mux). Removed cell top.$procmux$8492 ($mux). Removed cell top.$procmux$8496 ($mux). Removed cell top.$procmux$8498 ($mux). Removed cell top.$procmux$8502 ($mux). Removed cell top.$procmux$8504 ($mux). Removed cell top.$procmux$8508 ($mux). Removed cell top.$procmux$8510 ($mux). Removed cell top.$procmux$8514 ($mux). Removed cell top.$procmux$8516 ($mux). Removed cell top.$procmux$8520 ($mux). Removed cell top.$procmux$8522 ($mux). Removed cell top.$procmux$8526 ($mux). Removed cell top.$procmux$8528 ($mux). Removed cell top.$procmux$8532 ($mux). Removed cell top.$procmux$8534 ($mux). Removed cell top.$procmux$8538 ($mux). Removed cell top.$procmux$8540 ($mux). Removed cell top.$procmux$8544 ($mux). Removed cell top.$procmux$8546 ($mux). Removed cell top.$procmux$8550 ($mux). Removed cell top.$procmux$8552 ($mux). Removed cell top.$procmux$8556 ($mux). Removed cell top.$procmux$8558 ($mux). Removed cell top.$procmux$8562 ($mux). Removed cell top.$procmux$8564 ($mux). Removed cell top.$procmux$8568 ($mux). Removed cell top.$procmux$8570 ($mux). Removed cell top.$procmux$8574 ($mux). Removed cell top.$procmux$8576 ($mux). Removed cell top.$procmux$8580 ($mux). Removed cell top.$procmux$8582 ($mux). Removed cell top.$procmux$8588 ($mux). Removed cell top.$procmux$8590 ($mux). Removed cell top.$procmux$8596 ($mux). Removed cell top.$procmux$8598 ($mux). Removed cell top.$procmux$8602 ($mux). Removed cell top.$procmux$8604 ($mux). Removed cell top.$procmux$8608 ($mux). Removed cell top.$procmux$8610 ($mux). Removed cell top.$procmux$8614 ($mux). Removed cell top.$procmux$8616 ($mux). Removed cell top.$procmux$8620 ($mux). Removed cell top.$procmux$8622 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$8747_CMP0 ($eq). Removed top 1 bits (of 3) from port B of cell top.$procmux$8758_CMP0 ($eq). Removed top 2 bits (of 3) from port B of cell top.$procmux$8770_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$procmux$8814_CMP0 ($eq). Removed top 1 bits (of 3) from port B of cell top.$procmux$8825_CMP0 ($eq). Removed top 1 bits (of 3) from port B of cell top.$procmux$8826_CMP0 ($eq). Removed top 2 bits (of 3) from port B of cell top.$procmux$8827_CMP0 ($eq). Removed top 1 bits (of 5) from port B of cell top.$procmux$8843_CMP0 ($eq). Removed top 1 bits (of 5) from port B of cell top.$procmux$8844_CMP0 ($eq). Removed top 1 bits (of 5) from port B of cell top.$procmux$8845_CMP0 ($eq). Removed top 1 bits (of 5) from port B of cell top.$procmux$8846_CMP0 ($eq). Removed top 1 bits (of 5) from port B of cell top.$procmux$8847_CMP0 ($eq). Removed top 1 bits (of 5) from port B of cell top.$procmux$8848_CMP0 ($eq). Removed top 1 bits (of 5) from port B of cell top.$procmux$8849_CMP0 ($eq). Removed top 1 bits (of 5) from port B of cell top.$procmux$8850_CMP0 ($eq). Removed top 2 bits (of 5) from port B of cell top.$procmux$8851_CMP0 ($eq). Removed top 2 bits (of 5) from port B of cell top.$procmux$8852_CMP0 ($eq). Removed top 2 bits (of 5) from port B of cell top.$procmux$8853_CMP0 ($eq). Removed top 2 bits (of 5) from port B of cell top.$procmux$8854_CMP0 ($eq). Removed top 3 bits (of 5) from port B of cell top.$procmux$8855_CMP0 ($eq). Removed top 3 bits (of 5) from port B of cell top.$procmux$8856_CMP0 ($eq). Removed top 4 bits (of 5) from port B of cell top.$procmux$8857_CMP0 ($eq). Removed top 1 bits (of 4) from port B of cell top.$procmux$8873_CMP0 ($eq). Removed top 1 bits (of 4) from port B of cell top.$procmux$8874_CMP0 ($eq). Removed top 1 bits (of 4) from port B of cell top.$procmux$8875_CMP0 ($eq). Removed top 1 bits (of 4) from port B of cell top.$procmux$8876_CMP0 ($eq). Removed top 2 bits (of 4) from port B of cell top.$procmux$8877_CMP0 ($eq). Removed top 2 bits (of 4) from port B of cell top.$procmux$8878_CMP0 ($eq). Removed top 3 bits (of 4) from port B of cell top.$procmux$8879_CMP0 ($eq). Removed top 2 bits (of 13) from mux cell top.$procmux$9040 ($mux). Removed top 7 bits (of 8) from mux cell top.$procmux$9141 ($mux). Removed cell top.$procmux$9147 ($mux). Removed cell top.$procmux$9264 ($mux). Removed cell top.$procmux$9271 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$9278 ($mux). Removed cell top.$procmux$9326 ($mux). Removed cell top.$procmux$9336 ($mux). Removed top 1 bits (of 2) from mux cell top.$procmux$9339 ($mux). Removed cell top.$procmux$9345 ($mux). Removed cell top.$procmux$9354 ($mux). Removed top 1 bits (of 2) from mux cell top.$procmux$9357 ($mux). Removed top 1 bits (of 2) from mux cell top.$procmux$9408 ($mux). Removed cell top.$procmux$9424 ($mux). Removed cell top.$procmux$9440 ($mux). Removed cell top.$procmux$9494 ($mux). Removed cell top.$procmux$9497 ($mux). Removed top 1 bits (of 2) from mux cell top.$procmux$9503 ($mux). Removed cell top.$procmux$9519 ($mux). Removed cell top.$procmux$9535 ($mux). Removed cell top.$procmux$9589 ($mux). Removed cell top.$procmux$9592 ($mux). Removed top 1 bits (of 2) from mux cell top.$procmux$9598 ($mux). Removed cell top.$procmux$9614 ($mux). Removed cell top.$procmux$9630 ($mux). Removed cell top.$procmux$9684 ($mux). Removed cell top.$procmux$9687 ($mux). Removed top 1 bits (of 2) from mux cell top.$procmux$9693 ($mux). Removed cell top.$procmux$9709 ($mux). Removed cell top.$procmux$9725 ($mux). Removed cell top.$procmux$9779 ($mux). Removed cell top.$procmux$9782 ($mux). Removed cell top.$procmux$9797 ($mux). Removed cell top.$procmux$9837 ($mux). Removed cell top.$procmux$9875 ($mux). Removed cell top.$procmux$9878 ($mux). Removed cell top.$procmux$9886 ($mux). Removed cell top.$procmux$9907 ($mux). Removed cell top.$procmux$9910 ($mux). Removed cell top.$procmux$9918 ($mux). Removed cell top.$procmux$9939 ($mux). Removed cell top.$procmux$9964 ($mux). Removed cell top.$procmux$9967 ($mux). Removed cell top.$procmux$9998 ($mux). Removed cell top.$procmux$10001 ($mux). Removed cell top.$procmux$10003 ($mux). Removed cell top.$procmux$10016 ($mux). Removed cell top.$procmux$10019 ($mux). Removed cell top.$procmux$10021 ($mux). Removed cell top.$procmux$10068 ($mux). Removed cell top.$procmux$10081 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$10093_CMP0 ($eq). Removed top 1 bits (of 3) from port B of cell top.$procmux$10094_CMP0 ($eq). Removed top 2 bits (of 3) from port B of cell top.$procmux$10095_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$procmux$10100_CMP0 ($eq). Removed cell top.$procmux$10151 ($mux). Removed top 1 bits (of 2) from port B of cell top.$procmux$10159_CMP0 ($eq). Removed cell top.$procmux$10256 ($mux). Removed top 1 bits (of 2) from port B of cell top.$procmux$10261_CMP0 ($eq). Removed top 24 bits (of 32) from mux cell top.$procmux$10290 ($mux). Removed cell top.$procmux$10300 ($mux). Removed cell top.$procmux$10303 ($mux). Removed cell top.$procmux$10307 ($mux). Removed cell top.$procmux$10309 ($mux). Removed cell top.$procmux$10312 ($mux). Removed top 1 bits (of 2) from port B of cell top.$procmux$10314_CMP0 ($eq). Removed top 2 bits (of 18) from mux cell top.$procmux$10367 ($pmux). Removed top 1 bits (of 3) from port B of cell top.$procmux$10371_CMP0 ($eq). Removed top 1 bits (of 3) from port B of cell top.$procmux$10372_CMP0 ($eq). Removed top 2 bits (of 3) from port B of cell top.$procmux$10373_CMP0 ($eq). Removed cell top.$procmux$10410 ($mux). Removed cell top.$procmux$10413 ($mux). Removed cell top.$procmux$10417 ($mux). Removed top 1 bits (of 2) from mux cell top.$procmux$10421 ($mux). Removed top 1 bits (of 2) from port B of cell top.$procmux$10426_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$procmux$10499_CMP0 ($eq). Removed cell top.$procmux$10515 ($mux). Removed cell top.$procmux$10517 ($mux). Removed cell top.$procmux$10525 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$10527_CMP0 ($eq). Removed cell top.$procmux$10528 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$10530_CMP0 ($eq). Removed cell top.$procmux$10531 ($mux). Removed cell top.$procmux$10533 ($mux). Removed top 2 bits (of 3) from mux cell top.$procmux$10535 ($mux). Removed top 2 bits (of 3) from port B of cell top.$procmux$10537_CMP0 ($eq). Removed cell top.$procmux$10615 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$10617 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$10619 ($mux). Removed cell top.$procmux$10621 ($mux). Removed cell top.$procmux$10627 ($mux). Removed cell top.$procmux$10631 ($mux). Removed cell top.$procmux$10633 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$10635_CMP0 ($eq). Removed cell top.$procmux$10636 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$10638_CMP0 ($eq). Removed cell top.$procmux$10639 ($mux). Removed cell top.$procmux$10641 ($mux). Removed top 2 bits (of 3) from port B of cell top.$procmux$10643_CMP0 ($eq). Removed cell top.$procmux$10836 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$10838 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$10840 ($mux). Removed cell top.$procmux$10842 ($mux). Removed cell top.$procmux$10852 ($mux). Removed cell top.$procmux$10854 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$10856_CMP0 ($eq). Removed cell top.$procmux$10857 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$10859_CMP0 ($eq). Removed cell top.$procmux$10860 ($mux). Removed cell top.$procmux$10862 ($mux). Removed top 2 bits (of 3) from port B of cell top.$procmux$10864_CMP0 ($eq). Removed cell top.$procmux$11057 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$11059 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$11061 ($mux). Removed cell top.$procmux$11063 ($mux). Removed cell top.$procmux$11073 ($mux). Removed cell top.$procmux$11075 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$11077_CMP0 ($eq). Removed cell top.$procmux$11078 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$11080_CMP0 ($eq). Removed cell top.$procmux$11081 ($mux). Removed cell top.$procmux$11083 ($mux). Removed top 2 bits (of 3) from port B of cell top.$procmux$11085_CMP0 ($eq). Removed cell top.$procmux$11278 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$11280 ($mux). Removed top 1 bits (of 3) from mux cell top.$procmux$11282 ($mux). Removed cell top.$procmux$11284 ($mux). Removed cell top.$procmux$11294 ($mux). Removed cell top.$procmux$11296 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$11298_CMP0 ($eq). Removed cell top.$procmux$11299 ($mux). Removed top 1 bits (of 3) from port B of cell top.$procmux$11301_CMP0 ($eq). Removed cell top.$procmux$11302 ($mux). Removed cell top.$procmux$11304 ($mux). Removed top 2 bits (of 3) from port B of cell top.$procmux$11306_CMP0 ($eq). Removed cell top.$procmux$11497 ($mux). Removed cell top.$procmux$11500 ($mux). Removed cell top.$procmux$11504 ($mux). Removed top 1 bits (of 2) from port B of cell top.$procmux$11506_CMP0 ($eq). Removed top 7 bits (of 8) from FF cell top.$procdff$12002 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12006 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12010 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12014 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12018 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12022 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12026 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12030 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12034 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12038 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12042 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12046 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12050 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12054 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12058 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12062 ($dff). Removed top 23 bits (of 24) from FF cell top.$procdff$12066 ($dff). Removed top 24 bits (of 25) from FF cell top.$procdff$12070 ($dff). Removed top 24 bits (of 25) from FF cell top.$procdff$12074 ($dff). Removed top 24 bits (of 25) from FF cell top.$procdff$12078 ($dff). Removed top 24 bits (of 25) from FF cell top.$procdff$12082 ($dff). Removed top 9 bits (of 10) from FF cell top.$procdff$12087 ($dff). Removed top 2 bits (of 10) from FF cell top.$auto$opt_dff.cc:764:run$13280 ($dffe). Removed top 9 bits (of 10) from FF cell top.$procdff$12092 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12097 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12100 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12103 ($dff). Removed top 7 bits (of 8) from FF cell top.$procdff$12106 ($dff). Removed top 2 bits (of 10) from FF cell top.$auto$opt_dff.cc:764:run$13278 ($dffe). Removed top 1 bits (of 2) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$13721 ($ne). Removed top 1 bits (of 2) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$13534 ($ne). Removed top 2 bits (of 3) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$13532 ($ne). Removed top 1 bits (of 2) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$13530 ($ne). Removed top 1 bits (of 2) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$13528 ($ne). Removed top 2 bits (of 4) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$13199 ($ne). Removed top 2 bits (of 13) from FF cell top.$auto$opt_dff.cc:702:run$13056 ($sdff). Removed top 30 bits (of 32) from port B of cell top.$flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:540$3652 ($add). Removed top 1 bits (of 2) from mux cell top.$flatten\VexRiscv.\dataCache_1_.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:544$3656 ($mux). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.\dataCache_1_.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:934$3778 ($eq). Removed top 2 bits (of 3) from port B of cell top.$flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1053$3798 ($add). Removed top 6 bits (of 7) from port B of cell top.$flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1141$3817 ($add). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4205 ($mux). Removed top 27 bits (of 32) from mux cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4209 ($mux). Removed top 27 bits (of 32) from mux cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4218 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4223 ($mux). Removed top 1 bits (of 3) from port B of cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4371_CMP0 ($eq). Removed top 1 bits (of 3) from port B of cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4372_CMP0 ($eq). Removed top 2 bits (of 3) from port B of cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4373_CMP0 ($eq). Removed top 7 bits (of 8) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$12600 ($ne). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4512_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4520 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4528 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4533 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4541 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4549 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4554 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4562 ($mux). Removed top 5 bits (of 9) from port B of cell top.$auto$opt_dff.cc:218:make_patterns_logic$12608 ($ne). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4570 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4575 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4583 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4591 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4596 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4674 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4677 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4683 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4689 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4695 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4707 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4713 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4734 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4736 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4740 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4742 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4746 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4748 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4752 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4754 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4760 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4762 ($mux). Removed top 7 bits (of 8) from FF cell top.$flatten\VexRiscv.\dataCache_1_.$procdff$11686 ($dff). Removed top 7 bits (of 8) from FF cell top.$flatten\VexRiscv.\dataCache_1_.$procdff$11689 ($dff). Removed top 7 bits (of 8) from FF cell top.$flatten\VexRiscv.\dataCache_1_.$procdff$11692 ($dff). Removed top 7 bits (of 8) from FF cell top.$flatten\VexRiscv.\dataCache_1_.$procdff$11695 ($dff). Removed top 21 bits (of 22) from FF cell top.$flatten\VexRiscv.\dataCache_1_.$procdff$11699 ($dff). Removed top 2 bits (of 3) from port B of cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:301$3884 ($add). Removed top 7 bits (of 8) from port B of cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:314$3886 ($add). Removed cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3948 ($mux). Removed cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$3964 ($mux). Removed cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$4002 ($mux). Removed cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$4004 ($mux). Removed cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$4010 ($mux). Removed cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$procmux$4012 ($mux). Removed top 31 bits (of 32) from FF cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11630 ($dff). Removed top 21 bits (of 22) from FF cell top.$flatten\VexRiscv.\IBusCachedPlugin_cache.$procdff$11634 ($dff). Removed top 31 bits (of 32) from FF cell top.$flatten\VexRiscv.$procdff$11998 ($dff). Removed top 2 bits (of 32) from FF cell top.$auto$opt_dff.cc:764:run$13391 ($sdffe). Removed top 2 bits (of 32) from FF cell top.$auto$opt_dff.cc:764:run$13687 ($dffe). Removed top 2 bits (of 12) from FF cell top.$auto$opt_dff.cc:764:run$13760 ($dffe). Removed cell top.$flatten\VexRiscv.$procmux$8456 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$8454 ($mux). Removed top 2 bits (of 3) from port B of cell top.$flatten\VexRiscv.$procmux$8446_CMP0 ($eq). Removed top 1 bits (of 3) from port B of cell top.$flatten\VexRiscv.$procmux$8445_CMP0 ($eq). Removed top 1 bits (of 3) from port B of cell top.$flatten\VexRiscv.$procmux$8444_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$8390_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$8335_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$8194_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.$procmux$8017 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$7956 ($mux). Removed top 20 bits (of 32) from mux cell top.$flatten\VexRiscv.$procmux$7932 ($mux). Removed top 20 bits (of 32) from mux cell top.$flatten\VexRiscv.$procmux$7927 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$7905 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$7823 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$7818 ($mux). Removed top 1 bits (of 4) from mux cell top.$flatten\VexRiscv.$procmux$7812 ($mux). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$7803_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$7793_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$7673_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$7669_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$7664_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$7660_CMP0 ($eq). Removed top 2 bits (of 4) from port B of cell top.$flatten\VexRiscv.$procmux$7466_CMP0 ($eq). Removed top 1 bits (of 4) from port B of cell top.$flatten\VexRiscv.$procmux$7450_CMP0 ($eq). Removed top 1 bits (of 4) from port B of cell top.$flatten\VexRiscv.$procmux$7421_CMP0 ($eq). Removed top 1 bits (of 4) from port B of cell top.$flatten\VexRiscv.$procmux$7408_CMP0 ($eq). Removed top 3 bits (of 4) from port B of cell top.$flatten\VexRiscv.$procmux$7396_CMP0 ($eq). Removed top 1 bits (of 4) from port B of cell top.$flatten\VexRiscv.$procmux$7358_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.$procmux$7015 ($mux). Removed top 2 bits (of 4) from mux cell top.$flatten\VexRiscv.$procmux$7006 ($pmux). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$6656_CMP0 ($eq). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$6649_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$6634_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.$procmux$6600 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$6593 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$6586 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$6572 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$6551 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$6496 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$6300 ($mux). Removed top 2 bits (of 3) from port B of cell top.$flatten\VexRiscv.$procmux$6299_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.$procmux$6297 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$6294 ($mux). Removed top 1 bits (of 3) from mux cell top.$flatten\VexRiscv.$procmux$6290 ($mux). Removed top 1 bits (of 3) from port B of cell top.$flatten\VexRiscv.$procmux$6289_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.$procmux$6286 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$6283 ($mux). Removed top 1 bits (of 3) from mux cell top.$flatten\VexRiscv.$procmux$6281 ($mux). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$6036_CMP0 ($eq). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5994_CMP0 ($eq). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5929_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5926_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$5914_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5877_CMP0 ($eq). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5848_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5845_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5662_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.$procmux$5168 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$5162 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$5156 ($mux). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5119_CMP0 ($eq). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5109_CMP0 ($eq). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5093_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5064_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5057_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5035_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5017_CMP0 ($eq). Removed top 3 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$5005_CMP0 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$procmux$4995_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.$procmux$4985 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$4977 ($mux). Removed top 2 bits (of 12) from port B of cell top.$flatten\VexRiscv.$procmux$4932_CMP0 ($eq). Removed cell top.$flatten\VexRiscv.$procmux$4916 ($mux). Removed cell top.$flatten\VexRiscv.$procmux$4914 ($mux). Removed top 31 bits (of 32) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7535$3537 ($add). Removed top 32 bits (of 33) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3534 ($add). Removed top 1 bits (of 33) from port Y of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3534 ($add). Removed top 1 bits (of 33) from port A of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3534 ($add). Removed top 1 bits (of 33) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3533 ($mux). Removed top 1 bits (of 33) from port Y of cell top.$flatten\VexRiscv.$not$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3532 ($not). Removed top 1 bits (of 33) from port A of cell top.$flatten\VexRiscv.$not$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3532 ($not). Removed top 1 bits (of 3) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7328$3481 ($eq). Removed top 2 bits (of 3) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7255$3474 ($add). Removed top 2 bits (of 3) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7250$3471 ($add). Removed top 27 bits (of 32) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6693$3414 ($mux). Removed top 30 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6615$3350 ($and). Removed top 30 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6613$3348 ($and). Removed top 1 bits (of 33) from port B of cell top.$flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6604$3340 ($sub). Removed top 5 bits (of 6) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6595$3339 ($add). Removed top 14 bits (of 66) from port A of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6572$3333 ($add). Removed top 2 bits (of 66) from port Y of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6572$3333 ($add). Removed top 2 bits (of 66) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6572$3333 ($add). Removed top 2 bits (of 52) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6571$3332 ($add). Removed top 17 bits (of 34) from port A of cell top.$flatten\VexRiscv.$mul$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6570$3331 ($mul). Removed top 17 bits (of 34) from port B of cell top.$flatten\VexRiscv.$mul$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6570$3331 ($mul). Removed top 17 bits (of 34) from port A of cell top.$flatten\VexRiscv.$mul$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6569$3330 ($mul). Removed top 17 bits (of 34) from port B of cell top.$flatten\VexRiscv.$mul$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6569$3330 ($mul). Removed top 17 bits (of 34) from port A of cell top.$flatten\VexRiscv.$mul$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6568$3329 ($mul). Removed top 17 bits (of 34) from port B of cell top.$flatten\VexRiscv.$mul$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6568$3329 ($mul). Removed top 1 bits (of 7) from port B of cell top.$flatten\VexRiscv.$ne$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6210$3291 ($ne). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6209$3283 ($eq). Removed top 12 bits (of 32) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224 ($mux). Removed top 2 bits (of 3) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5823$3206 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5717$3189 ($eq). Removed top 27 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3166 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3165 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3164 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3163 ($and). Removed top 30 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3162 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3161 ($and). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3160 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3159 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5503$3158 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5502$3156 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5502$3154 ($eq). Removed top 29 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5500$3149 ($eq). Removed top 29 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5500$3148 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5499$3147 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5499$3146 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5498$3145 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5498$3144 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5497$3143 ($eq). Removed top 29 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5496$3141 ($eq). Removed top 28 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5496$3140 ($and). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5376$3092 ($add). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5277$3028 ($add). Removed top 2 bits (of 4) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5134$2982 ($mux). Removed top 7 bits (of 32) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4893$2941 ($mux). Removed top 12 bits (of 32) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2929 ($mux). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4783$2919 ($eq). Removed top 29 bits (of 32) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4687$2888 ($add). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4461$2849 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4461$2847 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3188$2810 ($eq). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3187$2808 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3183$2805 ($eq). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3183$2803 ($eq). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3183$2801 ($eq). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3183$2799 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3182$2798 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3181$2796 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3177$2793 ($eq). Removed top 4 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3177$2791 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3177$2789 ($eq). Removed top 7 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3177$2788 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3177$2787 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3176$2786 ($eq). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3176$2785 ($and). Removed top 28 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3175$2784 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3175$2783 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3173$2782 ($and). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3171$2781 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3171$2780 ($and). Removed top 30 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3171$2779 ($eq). Removed top 30 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3171$2777 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3171$2776 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3171$2775 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3170$2774 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3169$2772 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3169$2771 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3167$2770 ($and). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3162$2769 ($and). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3160$2768 ($and). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3158$2767 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3158$2766 ($and). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3157$2765 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3157$2764 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3156$2763 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3153$2760 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3153$2759 ($eq). Removed top 27 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3152$2758 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3152$2757 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3151$2756 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3151$2755 ($and). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3150$2754 ($eq). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3150$2753 ($and). Removed top 4 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3149$2752 ($eq). Removed top 4 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3149$2751 ($and). Removed top 28 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3143$2746 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3140$2745 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3139$2744 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3139$2743 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3137$2742 ($and). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3132$2738 ($eq). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3130$2737 ($eq). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3130$2736 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3126$2733 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3113$2725 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3112$2724 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3112$2723 ($and). Removed top 29 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3111$2722 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3111$2721 ($and). Removed top 29 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3110$2720 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3092$2709 ($and). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3090$2708 ($and). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3086$2706 ($and). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3080$2702 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3080$2701 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3079$2700 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3079$2699 ($eq). Removed top 4 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3078$2698 ($eq). Removed top 4 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3078$2697 ($and). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3077$2695 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3075$2694 ($and). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3073$2693 ($and). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3067$2691 ($and). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3060$2688 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3058$2687 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3057$2686 ($eq). Removed top 1 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3056$2685 ($eq). Removed top 1 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3056$2684 ($and). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3054$2683 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3052$2682 ($and). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3051$2681 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3051$2680 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3049$2679 ($and). Removed top 27 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3045$2677 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3045$2676 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3043$2675 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3036$2672 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3035$2671 ($eq). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3033$2670 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3031$2669 ($eq). Removed top 27 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3030$2667 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3026$2665 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3025$2664 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3025$2663 ($and). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3023$2662 ($and). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3020$2658 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3017$2656 ($eq). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3014$2655 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3011$2651 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3010$2649 ($eq). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3010$2648 ($and). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3008$2647 ($eq). Removed top 3 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3008$2646 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3006$2645 ($and). Removed top 27 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3004$2644 ($and). Removed top 1 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3002$2643 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3000$2642 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2997$2638 ($eq). Removed top 29 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2996$2636 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2994$2635 ($eq). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2994$2634 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2994$2633 ($eq). Removed top 1 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2994$2632 ($eq). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2992$2631 ($and). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2989$2630 ($and). Removed top 18 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2985$2626 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2983$2625 ($eq). Removed top 19 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2983$2624 ($and). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2982$2623 ($eq). Removed top 6 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2982$2622 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2980$2621 ($and). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2979$2620 ($eq). Removed top 27 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2978$2619 ($eq). Removed top 26 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2978$2618 ($and). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2977$2617 ($eq). Removed top 17 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2977$2616 ($and). Removed top 25 bits (of 32) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2975$2615 ($and). Removed top 1 bits (of 33) from port A of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2916$2613 ($add). Removed top 32 bits (of 33) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2916$2613 ($add). Removed top 1 bits (of 33) from port Y of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2916$2613 ($add). Removed top 19 bits (of 52) from port A of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2895$2605 ($add). Removed top 2 bits (of 52) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2895$2605 ($add). Removed top 1 bits (of 52) from port Y of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2895$2605 ($add). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2894$2604 ($sub). Removed top 1 bits (of 2) from port Y of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2893$2603 ($and). Removed top 1 bits (of 2) from port A of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2893$2603 ($and). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$and$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2893$2603 ($and). Removed top 1 bits (of 2) from port Y of cell top.$flatten\VexRiscv.$not$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2893$2602 ($not). Removed top 1 bits (of 2) from port A of cell top.$flatten\VexRiscv.$not$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2893$2602 ($not). Removed top 1 bits (of 33) from port Y of cell top.$flatten\VexRiscv.$sshr$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2880$2599 ($sshr). Removed top 31 bits (of 32) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2877$2598 ($mux). Removed top 30 bits (of 32) from port B of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2873$2594 ($add). Removed top 1 bits (of 3) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2835$2593 ($mux). Removed top 1 bits (of 3) from mux cell top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2834$2592 ($mux). Removed top 4 bits (of 5) from port B of cell top.$flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2823$2591 ($sub). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$lt$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2809$2560 ($lt). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2809$2558 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2806$2555 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2802$2551 ($eq). Removed top 1 bits (of 2) from port B of cell top.$flatten\VexRiscv.$eq$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2778$2517 ($eq). Removed top 7 bits (of 10) from mux cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4557 ($mux). Removed cell top.$flatten\VexRiscv.\dataCache_1_.$procmux$4686 ($mux). Removed top 2 bits (of 34) from FF cell top.$auto$opt_dff.cc:764:run$13669 ($dffe). Removed top 1 bits (of 52) from port A of cell top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6571$3332 ($add). Removed top 1 bits (of 2) from port Y of cell top.$flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2894$2604 ($sub). Removed top 1 bits (of 2) from port A of cell top.$flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2894$2604 ($sub). Removed top 2 bits (of 34) from FF cell top.$auto$opt_dff.cc:764:run$13670 ($dffe). Removed top 2 bits (of 34) from port Y of cell top.$flatten\VexRiscv.$mul$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6570$3331 ($mul). Removed top 24 bits (of 32) from wire top.$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_EN[31:0]$1791. Removed top 16 bits (of 32) from wire top.$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_DATA[31:0]$1793. Removed top 8 bits (of 32) from wire top.$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_DATA[31:0]$1796. Removed top 8 bits (of 32) from wire top.$0$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_EN[31:0]$1797. Removed top 2 bits (of 25) from wire top.$0$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_DATA[24:0]$1820. Removed top 2 bits (of 25) from wire top.$0$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_DATA[24:0]$1827. Removed top 2 bits (of 25) from wire top.$0$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_DATA[24:0]$1834. Removed top 2 bits (of 25) from wire top.$0$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_DATA[24:0]$1841. Removed top 1 bits (of 33) from wire top.$flatten\VexRiscv.$0\memory_DivPlugin_rs1[32:0]. Removed top 2 bits (of 4) from wire top.$flatten\VexRiscv.$2\DBusCachedPlugin_exceptionBus_payload_code[3:0]. Removed top 20 bits (of 32) from wire top.$flatten\VexRiscv.$2\_zz_249_[31:0]. Removed top 2 bits (of 4) from wire top.$flatten\VexRiscv.$3\CsrPlugin_selfException_payload_code[3:0]. Removed top 1 bits (of 4) from wire top.$flatten\VexRiscv.$3\DBusCachedPlugin_exceptionBus_payload_code[3:0]. Removed top 1 bits (of 33) from wire top.$flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3534_Y. Removed top 1 bits (of 2) from wire top.$flatten\VexRiscv.$not$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2893$2602_Y. Removed top 1 bits (of 33) from wire top.$flatten\VexRiscv.$not$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3532_Y. Removed top 1 bits (of 3) from wire top.$flatten\VexRiscv.$procmux$6281_Y. Removed top 1 bits (of 3) from wire top.$flatten\VexRiscv.$procmux$6290_Y. Removed top 2 bits (of 4) from wire top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5134$2982_Y. Removed top 1 bits (of 33) from wire top.$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3533_Y. Removed top 24 bits (of 32) from wire top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5772$231_DATA. Removed top 16 bits (of 32) from wire top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5774$232_DATA. Removed top 8 bits (of 32) from wire top.$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5776$233_DATA. Removed top 2 bits (of 10) from wire top.$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5805$235_DATA. Removed top 2 bits (of 10) from wire top.$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5822$236_DATA. Removed top 2 bits (of 25) from wire top.$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5838$237_DATA. Removed top 2 bits (of 25) from wire top.$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5852$238_DATA. Removed top 2 bits (of 25) from wire top.$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5866$239_DATA. Removed top 2 bits (of 25) from wire top.$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5880$240_DATA. Removed top 2 bits (of 13) from wire top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1907$337_Y. Removed top 2 bits (of 13) from wire top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2058$367_Y. Removed top 2 bits (of 13) from wire top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2209$397_Y. Removed top 2 bits (of 13) from wire top.$or$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2360$427_Y. Removed top 1 bits (of 8) from wire top.$procmux$10016_Y. Removed top 1 bits (of 8) from wire top.$procmux$10019_Y. Removed top 1 bits (of 8) from wire top.$procmux$10021_Y. Removed top 1 bits (of 2) from wire top.$procmux$10421_Y. Removed top 2 bits (of 3) from wire top.$procmux$10535_Y. Removed top 1 bits (of 3) from wire top.$procmux$10617_Y. Removed top 1 bits (of 3) from wire top.$procmux$10619_Y. Removed top 1 bits (of 3) from wire top.$procmux$10838_Y. Removed top 1 bits (of 3) from wire top.$procmux$10840_Y. Removed top 1 bits (of 3) from wire top.$procmux$11059_Y. Removed top 1 bits (of 3) from wire top.$procmux$11061_Y. Removed top 1 bits (of 3) from wire top.$procmux$11280_Y. Removed top 1 bits (of 3) from wire top.$procmux$11282_Y. Removed top 2 bits (of 13) from wire top.$procmux$9040_Y. Removed top 1 bits (of 2) from wire top.$procmux$9339_Y. Removed top 1 bits (of 2) from wire top.$procmux$9357_Y. Removed top 24 bits (of 32) from wire top.builder_soclinux_wishbone_dat_r. Removed top 2 bits (of 25) from wire top.main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_din. Removed top 2 bits (of 25) from wire top.main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_w. Removed top 2 bits (of 25) from wire top.main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_din. Removed top 2 bits (of 25) from wire top.main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_w. Removed top 2 bits (of 25) from wire top.main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_din. Removed top 2 bits (of 25) from wire top.main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_w. Removed top 2 bits (of 25) from wire top.main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_din. Removed top 2 bits (of 25) from wire top.main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_w. Removed top 30 bits (of 32) from wire top.main_soclinux_cpu_interrupt0. Removed top 4 bits (of 23) from wire top.main_tag_di_tag. Removed top 2 bits (of 144) from wire top.main_wishbone_bridge_wdata_converter_converter_sink_payload_data. 4.16. Executing PEEPOPT pass (run peephole optimizers). 4.17. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 1 unused cells and 276 unused wires. 4.18. Executing SHARE pass (SAT-based resource sharing). Found 18 cells in module top that may be considered for resource sharing. Analyzing resource sharing options for $memrd$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5898$1850 ($memrd): Found 5 activation_patterns using ctrl signal { $procmux$10426_CMP $eq$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2796$796_Y \builder_done \builder_litedramwishbone2native_state \main_write_from_slave }. No candidates found. Analyzing resource sharing options for $memrd$\mem_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5794$1803 ($memrd): Found 1 activation_patterns using ctrl signal { $procmux$10260_CMP \builder_csr_bankarray_sel_r }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6053$1901 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10499_CMP $procmux$10370_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6043$1896 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10499_CMP $procmux$10370_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6033$1891 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10498_CMP $procmux$10371_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6023$1886 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10498_CMP $procmux$10371_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6013$1881 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10498_CMP $procmux$10372_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6003$1876 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10498_CMP $procmux$10372_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5993$1871 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10500_CMP $procmux$10499_CMP $procmux$10498_CMP $procmux$10373_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5983$1866 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10500_CMP $procmux$10499_CMP $procmux$10498_CMP $procmux$10373_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6113$1931 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10500_CMP $procmux$10374_CMP $procmux$10373_CMP $procmux$10372_CMP $procmux$10371_CMP $procmux$10370_CMP $procmux$10369_CMP $procmux$10368_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6103$1926 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10500_CMP $procmux$10374_CMP $procmux$10373_CMP $procmux$10372_CMP $procmux$10371_CMP $procmux$10370_CMP $procmux$10369_CMP $procmux$10368_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6093$1921 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10500_CMP $procmux$10368_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6083$1916 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10500_CMP $procmux$10368_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6073$1911 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10499_CMP $procmux$10369_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6063$1906 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10499_CMP $procmux$10369_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5973$1861 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10500_CMP $procmux$10499_CMP $procmux$10498_CMP $procmux$10374_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. Analyzing resource sharing options for $memrd$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5963$1856 ($memrd): Found 2 activation_patterns using ctrl signal { $procmux$10500_CMP $procmux$10499_CMP $procmux$10498_CMP $procmux$10374_CMP \builder_new_master_wdata_ready \main_sdram_storage [0] }. No candidates found. 4.19. Executing TECHMAP pass (map to technology primitives). 4.19.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/cmp2lut.v Parsing Verilog input from `/usr/local/bin/../share/yosys/cmp2lut.v' to AST representation. Generating RTLIL representation for module `\_90_lut_cmp_'. Successfully finished Verilog frontend. 4.19.2. Continuing TECHMAP pass. Using template $paramod$3ee26d6ec3e84c62780ab3a1e6835af3ab9d7465\_90_lut_cmp_ for cells of type $lt. Using template $paramod$f3a9875e03c52965378a785308bba19d20f90391\_90_lut_cmp_ for cells of type $lt. No more expansions possible. 4.20. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.21. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 0 unused cells and 8 unused wires. 4.22. Executing TECHMAP pass (map to technology primitives). 4.22.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/mul2dsp.v Parsing Verilog input from `/usr/local/bin/../share/yosys/mul2dsp.v' to AST representation. Generating RTLIL representation for module `\_80_mul'. Generating RTLIL representation for module `\_90_soft_mul'. Successfully finished Verilog frontend. 4.22.2. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/dsp_map.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/dsp_map.v' to AST representation. Generating RTLIL representation for module `\$__MUL18X18'. Successfully finished Verilog frontend. 4.22.3. Continuing TECHMAP pass. Using template $paramod$57246927cd958ceb8a1b66d0a5c7acbd283b286a\_80_mul for cells of type $mul. Using template $paramod$4f6754d98eb10d060cb1338d1ad25ec95f03045a\_80_mul for cells of type $mul. Using template $paramod$738639264c9aebc655ebda67fba0129d74a9b416\_80_mul for cells of type $mul. Using template $paramod\$__MUL18X18\A_WIDTH=18\B_WIDTH=18\Y_WIDTH=32\A_SIGNED=1\B_SIGNED=1 for cells of type $__MUL18X18. Using template $paramod\$__MUL18X18\A_WIDTH=18\B_WIDTH=18\Y_WIDTH=32\A_SIGNED=0\B_SIGNED=0 for cells of type $__MUL18X18. Using template $paramod\$__MUL18X18\A_WIDTH=18\B_WIDTH=18\Y_WIDTH=34\A_SIGNED=1\B_SIGNED=1 for cells of type $__MUL18X18. No more expansions possible. 4.23. Executing ALUMACC pass (create $alu and $macc cells). Extracting $alu and $macc cells in module top: creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2876$824 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3063$846 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4246$1563 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4249$1564 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4272$1576 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4288$1579 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4301$1583 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4320$1586 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4346$1594 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4349$1595 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4353$1600 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4368$1605 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4371$1606 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4375$1611 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4474$1630 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4491$1634 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4494$1635 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4498$1640 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4567$1656 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4570$1657 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4574$1662 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4643$1678 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4646$1679 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4650$1684 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4719$1700 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4722$1701 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4726$1706 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4992$1764 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5003$1767 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5064$1777 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2873$2594 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2874$2595 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2895$2605 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2916$2613 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4687$2888 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2930 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5277$3028 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5376$3092 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6015$3227 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6571$3332 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6572$3333 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6595$3339 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7250$3471 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7255$3474 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3534 ($add). creating $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7535$3537 ($add). creating $macc model for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2874$823 ($add). creating $macc model for $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2823$2591 ($sub). creating $macc model for $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2894$2604 ($sub). creating $macc model for $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6604$3340 ($sub). creating $macc model for $flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:301$3884 ($add). creating $macc model for $flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:314$3886 ($add). creating $macc model for $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1053$3798 ($add). creating $macc model for $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1141$3817 ($add). creating $macc model for $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:540$3652 ($add). creating $macc model for $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:541$3653 ($add). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3036$841 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3037$843 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3065$847 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4357$1601 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4379$1612 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4400$1614 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4421$1619 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4427$1620 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4438$1623 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4502$1641 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4521$1645 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4536$1648 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4551$1651 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4578$1663 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4597$1667 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4612$1670 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4627$1673 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4654$1685 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4673$1689 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4688$1692 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4703$1695 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4730$1707 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4749$1711 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4764$1714 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4779$1717 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4790$1721 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4797$1724 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4929$1729 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4944$1732 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4959$1735 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5059$1776 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5082$1781 ($sub). creating $macc model for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5128$1785 ($sub). merging $macc model for $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:541$3653 into $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:540$3652. merging $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2895$2605 into $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6571$3332. merging $macc model for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2874$2595 into $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2873$2594. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4959$1735. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4944$1732. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4929$1729. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4797$1724. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4790$1721. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4779$1717. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4764$1714. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4749$1711. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4730$1707. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4703$1695. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4688$1692. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4673$1689. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4654$1685. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4627$1673. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4612$1670. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4597$1667. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4578$1663. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4551$1651. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4536$1648. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4521$1645. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4502$1641. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4438$1623. creating $alu model for $macc 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$flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1141$3817. creating $alu model for $macc $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1053$3798. creating $alu model for $macc $flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:314$3886. creating $alu model for $macc $flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:301$3884. creating $alu model for $macc $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6604$3340. creating $alu model for $macc $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2894$2604. creating $alu model for $macc $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2823$2591. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2874$823. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7535$3537. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3534. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7255$3474. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7250$3471. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6595$3339. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6572$3333. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6015$3227. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5376$3092. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5277$3028. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2930. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4687$2888. creating $alu model for $macc $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2916$2613. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5082$1781. creating $alu model for $macc $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5128$1785. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5064$1777. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5003$1767. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4992$1764. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4726$1706. creating $alu model for $macc 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$add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4320$1586. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4301$1583. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4288$1579. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4272$1576. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4249$1564. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4246$1563. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3063$846. creating $alu model for $macc $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2876$824. creating $macc cell for $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:540$3652: $auto$alumacc.cc:365:replace_macc$14148 creating $macc cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6571$3332: $auto$alumacc.cc:365:replace_macc$14149 creating $macc cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2873$2594: $auto$alumacc.cc:365:replace_macc$14150 creating $alu model for $flatten\VexRiscv.$lt$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6107$3265 ($lt): new $alu creating $alu model for $flatten\VexRiscv.$lt$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6333$3295 ($lt): new $alu creating $alu model for $ge$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1564$259 ($ge): new $alu creating $alu cell for $ge$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:1564$259: $auto$alumacc.cc:485:replace_alu$14154 creating $alu cell for $flatten\VexRiscv.$lt$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6333$3295: $auto$alumacc.cc:485:replace_alu$14163 creating $alu cell for $flatten\VexRiscv.$lt$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6107$3265: $auto$alumacc.cc:485:replace_alu$14168 creating $alu cell for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2876$824: $auto$alumacc.cc:485:replace_alu$14173 creating $alu cell for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3063$846: $auto$alumacc.cc:485:replace_alu$14176 creating $alu cell for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4246$1563: $auto$alumacc.cc:485:replace_alu$14179 creating $alu cell for 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$sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5082$1781: $auto$alumacc.cc:485:replace_alu$14266 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2916$2613: $auto$alumacc.cc:485:replace_alu$14269 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4687$2888: $auto$alumacc.cc:485:replace_alu$14272 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2930: $auto$alumacc.cc:485:replace_alu$14275 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5277$3028: $auto$alumacc.cc:485:replace_alu$14278 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5376$3092: $auto$alumacc.cc:485:replace_alu$14281 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6015$3227: $auto$alumacc.cc:485:replace_alu$14284 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6572$3333: $auto$alumacc.cc:485:replace_alu$14287 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6595$3339: $auto$alumacc.cc:485:replace_alu$14290 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7250$3471: $auto$alumacc.cc:485:replace_alu$14293 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7255$3474: $auto$alumacc.cc:485:replace_alu$14296 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7534$3534: $auto$alumacc.cc:485:replace_alu$14299 creating $alu cell for $flatten\VexRiscv.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7535$3537: $auto$alumacc.cc:485:replace_alu$14302 creating $alu cell for $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2874$823: $auto$alumacc.cc:485:replace_alu$14305 creating $alu cell for $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2823$2591: $auto$alumacc.cc:485:replace_alu$14308 creating $alu cell for $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2894$2604: $auto$alumacc.cc:485:replace_alu$14311 creating $alu cell for $flatten\VexRiscv.$sub$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6604$3340: $auto$alumacc.cc:485:replace_alu$14314 creating $alu cell for $flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:301$3884: $auto$alumacc.cc:485:replace_alu$14317 creating $alu cell for $flatten\VexRiscv.\IBusCachedPlugin_cache.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:314$3886: $auto$alumacc.cc:485:replace_alu$14320 creating $alu cell for $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1053$3798: $auto$alumacc.cc:485:replace_alu$14323 creating $alu cell for $flatten\VexRiscv.\dataCache_1_.$add$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:1141$3817: $auto$alumacc.cc:485:replace_alu$14326 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5059$1776: $auto$alumacc.cc:485:replace_alu$14329 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3036$841: $auto$alumacc.cc:485:replace_alu$14332 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3037$843: $auto$alumacc.cc:485:replace_alu$14335 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:3065$847: $auto$alumacc.cc:485:replace_alu$14338 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4357$1601: $auto$alumacc.cc:485:replace_alu$14341 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4379$1612: $auto$alumacc.cc:485:replace_alu$14344 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4400$1614: $auto$alumacc.cc:485:replace_alu$14347 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4421$1619: $auto$alumacc.cc:485:replace_alu$14350 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4427$1620: $auto$alumacc.cc:485:replace_alu$14353 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4438$1623: $auto$alumacc.cc:485:replace_alu$14356 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4502$1641: $auto$alumacc.cc:485:replace_alu$14359 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4521$1645: $auto$alumacc.cc:485:replace_alu$14362 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4536$1648: $auto$alumacc.cc:485:replace_alu$14365 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4551$1651: $auto$alumacc.cc:485:replace_alu$14368 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4578$1663: $auto$alumacc.cc:485:replace_alu$14371 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4597$1667: $auto$alumacc.cc:485:replace_alu$14374 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4612$1670: $auto$alumacc.cc:485:replace_alu$14377 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4627$1673: $auto$alumacc.cc:485:replace_alu$14380 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4654$1685: $auto$alumacc.cc:485:replace_alu$14383 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4673$1689: $auto$alumacc.cc:485:replace_alu$14386 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4688$1692: $auto$alumacc.cc:485:replace_alu$14389 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4703$1695: $auto$alumacc.cc:485:replace_alu$14392 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4730$1707: $auto$alumacc.cc:485:replace_alu$14395 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4749$1711: $auto$alumacc.cc:485:replace_alu$14398 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4764$1714: $auto$alumacc.cc:485:replace_alu$14401 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4779$1717: $auto$alumacc.cc:485:replace_alu$14404 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4790$1721: $auto$alumacc.cc:485:replace_alu$14407 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4797$1724: $auto$alumacc.cc:485:replace_alu$14410 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4929$1729: $auto$alumacc.cc:485:replace_alu$14413 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4944$1732: $auto$alumacc.cc:485:replace_alu$14416 creating $alu cell for $sub$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4959$1735: $auto$alumacc.cc:485:replace_alu$14419 created 86 $alu and 3 $macc cells. 4.24. Executing OPT pass (performing simple optimizations). 4.24.1. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.24.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 51 cells. 4.24.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.24.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. New ctrl vector for $pmux cell $procmux$10415: { $procmux$10426_CMP $procmux$10419_CMP } New ctrl vector for $pmux cell $procmux$10522: { $procmux$10537_CMP $auto$opt_reduce.cc:134:opt_mux$14423 $procmux$10524_CMP $procmux$10523_CMP } New ctrl vector for $pmux cell $procmux$10629: { $auto$opt_reduce.cc:134:opt_mux$14427 $auto$opt_reduce.cc:134:opt_mux$14425 } New ctrl vector for $pmux cell $procmux$10850: { $auto$opt_reduce.cc:134:opt_mux$14431 $auto$opt_reduce.cc:134:opt_mux$14429 } New ctrl vector for $pmux cell $procmux$11071: { $auto$opt_reduce.cc:134:opt_mux$14435 $auto$opt_reduce.cc:134:opt_mux$14433 } New ctrl vector for $pmux cell $procmux$11292: { $auto$opt_reduce.cc:134:opt_mux$14439 $auto$opt_reduce.cc:134:opt_mux$14437 } Optimizing cells in module \top. Performed a total of 6 changes. 4.24.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 3 cells. 4.24.6. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 1-bit at position 0 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 1 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 2 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 3 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 4 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 5 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 6 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 7 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 8 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 9 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 10 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 11 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 12 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 13 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 14 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 15 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 16 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 17 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 18 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 19 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 20 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 21 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 22 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 23 on $procdff$12105 ($dff) from module top. Setting constant 1-bit at position 0 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 1 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 2 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 3 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 4 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 5 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 6 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 7 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 8 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 9 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 10 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 11 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 12 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 13 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 14 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 15 on $procdff$12102 ($dff) from module top. Setting constant 1-bit at position 0 on $procdff$12099 ($dff) from module top. Setting constant 1-bit at position 1 on $procdff$12099 ($dff) from module top. Setting constant 1-bit at position 2 on $procdff$12099 ($dff) from module top. Setting constant 1-bit at position 3 on $procdff$12099 ($dff) from module top. Setting constant 1-bit at position 4 on $procdff$12099 ($dff) from module top. Setting constant 1-bit at position 5 on $procdff$12099 ($dff) from module top. Setting constant 1-bit at position 6 on $procdff$12099 ($dff) from module top. Setting constant 1-bit at position 7 on $procdff$12099 ($dff) from module top. Adding SRST signal on $procdff$12069 ($dff) from module top (D = { $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2874$823_Y [23:11] $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:2874$823_Y [8:0] \main_interface_we }, Q = $auto$wreduce.cc:454:run$14103 [22:0], rval = 23'00000000000000000000000). Adding SRST signal on $procdff$12065 ($dff) from module top (D = $procmux$10431_Y, Q = $memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5894$241_DATA [23], rval = 1'0). Setting constant 0-bit at position 1 on $flatten\VexRiscv.\dataCache_1_.$procdff$11698 ($dff) from module top. Adding SRST signal on $auto$opt_dff.cc:764:run$13215 ($dffe) from module top (D = \memdat_2 [7], Q = \main_soclinux_tx_reg [7], rval = 1'0). Adding SRST signal on $auto$opt_dff.cc:764:run$13165 ($dffe) from module top (D = $add$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:4301$1583_Y, Q = \main_soclinux_rx_bitcount, rval = 4'0000). 4.24.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 9 unused cells and 117 unused wires. 4.24.8. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.24.9. Rerunning OPT passes. (Maybe there is more to do..) 4.24.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.24.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Performed a total of 0 changes. 4.24.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.24.13. Executing OPT_DFF pass (perform DFF optimizations). 4.24.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.24.15. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.24.16. Finished OPT passes. (There is nothing left to do.) 4.25. Executing MEMORY pass. 4.25.1. Executing OPT_MEM pass (optimize memories). Performed a total of 0 transformations. 4.25.2. Executing MEMORY_DFF pass (merging $dff cells to $memrd and $memwr). Checking cell `$flatten\VexRiscv.$memwr$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0$3613' in module `\top': merged $dff to cell. Checking cell `$flatten\VexRiscv.\IBusCachedPlugin_cache.$memwr$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0$3892' in module `\top': merged $dff to cell. Checking cell `$flatten\VexRiscv.\IBusCachedPlugin_cache.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0$3891' in module `\top': merged $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0$3829' in module `\top': merged $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0$3830' in module `\top': merged $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0$3831' in module `\top': merged $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0$3832' in module `\top': merged $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memwr$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:0$3828' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1967' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1968' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1977' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1978' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1979' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1980' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1981' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1982' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1969' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1970' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1971' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1972' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1973' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1974' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1975' in module `\top': merged $dff to cell. Checking cell `$memwr$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1976' in module `\top': merged $dff to cell. Checking cell `$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1956' in module `\top': merged $dff to cell. Checking cell `$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1957' in module `\top': merged $dff to cell. Checking cell `$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1958' in module `\top': merged $dff to cell. Checking cell `$memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1959' in module `\top': merged $dff to cell. Checking cell `$memwr$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1960' in module `\top': merged $dff to cell. Checking cell `$memwr$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1961' in module `\top': merged $dff to cell. Checking cell `$memwr$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1962' in module `\top': merged $dff to cell. Checking cell `$memwr$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1963' in module `\top': merged $dff to cell. Checking cell `$memwr$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1964' in module `\top': merged $dff to cell. Checking cell `$memwr$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1965' in module `\top': merged $dff to cell. Checking cell `$memwr$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1966' in module `\top': merged $dff to cell. Checking cell `$flatten\VexRiscv.$memrd$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3200$2816' in module `\top': merged data $dff to cell. Checking cell `$flatten\VexRiscv.$memrd$\RegFilePlugin_regFile$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:3206$2818' in module `\top': merged data $dff to cell. Checking cell `$flatten\VexRiscv.\IBusCachedPlugin_cache.$memrd$\ways_0_datas$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:182$3850' in module `\top': merged data $dff to cell. Checking cell `$flatten\VexRiscv.\IBusCachedPlugin_cache.$memrd$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:170$3844' in module `\top': merged data $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_data_symbol0$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:585$3683' in module `\top': merged data $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_data_symbol1$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:586$3684' in module `\top': merged data $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_data_symbol2$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:587$3685' in module `\top': merged data $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_data_symbol3$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:588$3686' in module `\top': merged data $dff to cell. Checking cell `$flatten\VexRiscv.\dataCache_1_.$memrd$\ways_0_tags$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:561$3663' in module `\top': merged data $dff to cell. Checking cell `$memrd$\data_mem_grain0$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5963$1856' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5973$1861' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain10$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6063$1906' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain11$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6073$1911' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain12$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6083$1916' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain13$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6093$1921' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain14$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6103$1926' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain15$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6113$1931' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5983$1866' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5993$1871' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6003$1876' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6013$1881' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain6$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6023$1886' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain7$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6033$1891' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain8$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6043$1896' in module `\top': merged address $dff to cell. Checking cell `$memrd$\data_mem_grain9$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:6053$1901' in module `\top': merged address $dff to cell. Checking cell `$memrd$\mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5759$1787' in module `\top': merged data $dff to cell. Checking cell `$memrd$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5782$1801' in module `\top': merged address $dff to cell. Checking cell `$memrd$\mem_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5794$1803' in module `\top': merged address $dff to cell. Checking cell `$memrd$\storage$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5811$1810' in module `\top': no (compatible) $dff found. Checking cell `$memrd$\storage_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5828$1817' in module `\top': no (compatible) $dff found. Checking cell `$memrd$\storage_2$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5846$1824' in module `\top': no (compatible) $dff found. Checking cell `$memrd$\storage_3$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5860$1831' in module `\top': no (compatible) $dff found. Checking cell `$memrd$\storage_4$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5874$1838' in module `\top': no (compatible) $dff found. Checking cell `$memrd$\storage_5$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5888$1845' in module `\top': no (compatible) $dff found. Checking cell `$memrd$\tag_mem$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:5898$1850' in module `\top': merged address $dff to cell. 4.25.3. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 92 unused cells and 117 unused wires. 4.25.4. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells). Consolidating write ports of memory top.mem_1 by address: New clock domain: posedge \VexRiscv.IBusCachedPlugin_cache.clk Port 0 ($memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1956) has addr \builder_soclinux_wishbone_adr [10:0]. Active bits: 00000000000000000000000011111111 Port 1 ($memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1957) has addr \builder_soclinux_wishbone_adr [10:0]. Active bits: 00000000000000001111111100000000 Merging port 0 into this one. Active bits: 00000000000000001111111111111111 Port 2 ($memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1958) has addr \builder_soclinux_wishbone_adr [10:0]. Active bits: 00000000111111110000000000000000 Merging port 1 into this one. Active bits: 00000000111111111111111111111111 Port 3 ($memwr$\mem_1$/home/pi/oss/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v:0$1959) has addr \builder_soclinux_wishbone_adr [10:0]. Active bits: 11111111000000000000000000000000 Merging port 2 into this one. Active bits: 11111111111111111111111111111111 4.25.5. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.25.6. Executing MEMORY_COLLECT pass (generating $mem cells). 4.26. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.27. Executing MEMORY_BRAM pass (mapping $mem cells to block memories). Processing top.VexRiscv.IBusCachedPlugin_cache.ways_0_datas: Properties: ports=2 bits=32768 rports=1 wports=1 dbits=32 abits=10 words=1024 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=2048 efficiency=88 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=4096 efficiency=88 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=4 bwaste=13312 waste=13312 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=13312 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=12288 efficiency=25 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 5) accepted. Mapping to bram type $__ECP5_DP16KD (variant 5): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=4 bwaste=13312 waste=13312 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=4 bwaste=13312 waste=13312 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 6 rules: Efficiency for rule 4.5: efficiency=6, cells=32, acells=1 Efficiency for rule 4.4: efficiency=12, cells=16, acells=1 Efficiency for rule 4.3: efficiency=25, cells=8, acells=1 Efficiency for rule 4.2: efficiency=44, cells=4, acells=1 Efficiency for rule 4.1: efficiency=88, cells=2, acells=1 Efficiency for rule 1.1: efficiency=88, cells=2, acells=2 Selected rule 4.1 with efficiency 88. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: VexRiscv.IBusCachedPlugin_cache.ways_0_datas.0.0.0 Creating $__ECP5_DP16KD cell at grid position <1 0 0>: VexRiscv.IBusCachedPlugin_cache.ways_0_datas.1.0.0 Processing top.VexRiscv.IBusCachedPlugin_cache.ways_0_tags: Properties: ports=2 bits=2816 rports=1 wports=1 dbits=22 abits=7 words=128 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=384 dwaste=14 bwaste=15616 waste=15616 efficiency=15 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -1 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15616 efficiency=15 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=384 dwaste=14 bwaste=15616 waste=15616 efficiency=15 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=384 dwaste=14 bwaste=15616 waste=15616 efficiency=15 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=896 dwaste=14 bwaste=17920 waste=17920 efficiency=7 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -1 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=17920 efficiency=7 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1920 dwaste=5 bwaste=17920 waste=17920 efficiency=5 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -1 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=17920 efficiency=5 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3968 dwaste=2 bwaste=16128 waste=16128 efficiency=2 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8064 dwaste=0 bwaste=16128 waste=16128 efficiency=1 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16256 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=896 dwaste=14 bwaste=17920 waste=17920 efficiency=7 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1920 dwaste=5 bwaste=17920 waste=17920 efficiency=5 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3968 dwaste=2 bwaste=16128 waste=16128 efficiency=2 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8064 dwaste=0 bwaste=16128 waste=16128 efficiency=1 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16256 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=896 dwaste=14 bwaste=17920 waste=17920 efficiency=7 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1920 dwaste=5 bwaste=17920 waste=17920 efficiency=5 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3968 dwaste=2 bwaste=16128 waste=16128 efficiency=2 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8064 dwaste=0 bwaste=16128 waste=16128 efficiency=1 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16256 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 3 rules: Efficiency for rule 4.2: efficiency=5, cells=3, acells=1 Efficiency for rule 4.1: efficiency=7, cells=2, acells=1 Efficiency for rule 1.1: efficiency=15, cells=1, acells=1 Selected rule 1.1 with efficiency 15. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -1 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_PDPW16KD cell at grid position <0 0 0>: VexRiscv.IBusCachedPlugin_cache.ways_0_tags.0.0.0 Processing top.VexRiscv.RegFilePlugin_regFile: Properties: ports=3 bits=1024 rports=2 wports=1 dbits=32 abits=5 words=32 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=480 dwaste=4 bwaste=17408 waste=17408 efficiency=5 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min bits 2048' not met. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=480 dwaste=4 bwaste=17408 waste=17408 efficiency=5 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=480 dwaste=4 bwaste=17408 waste=17408 efficiency=5 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=992 dwaste=4 bwaste=17984 waste=17984 efficiency=2 Rule #4 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2016 dwaste=4 bwaste=18272 waste=18272 efficiency=1 Rule #4 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4064 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8160 dwaste=0 bwaste=16320 waste=16320 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16352 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=992 dwaste=4 bwaste=17984 waste=17984 efficiency=2 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2016 dwaste=4 bwaste=18272 waste=18272 efficiency=1 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4064 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8160 dwaste=0 bwaste=16320 waste=16320 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16352 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=992 dwaste=4 bwaste=17984 waste=17984 efficiency=2 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2016 dwaste=4 bwaste=18272 waste=18272 efficiency=1 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4064 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8160 dwaste=0 bwaste=16320 waste=16320 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16352 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. No acceptable bram resources found. Processing top.VexRiscv.dataCache_1_.ways_0_data_symbol0: Properties: ports=2 bits=8192 rports=1 wports=1 dbits=8 abits=10 words=1024 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=10240 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=10240 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=12288 efficiency=25 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 5) accepted. Mapping to bram type $__ECP5_DP16KD (variant 5): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 6 rules: Efficiency for rule 4.5: efficiency=6, cells=8, acells=1 Efficiency for rule 4.4: efficiency=12, cells=4, acells=1 Efficiency for rule 4.3: efficiency=25, cells=2, acells=1 Efficiency for rule 4.2: efficiency=44, cells=1, acells=1 Efficiency for rule 4.1: efficiency=44, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=2, acells=2 Selected rule 4.2 with efficiency 44. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: VexRiscv.dataCache_1_.ways_0_data_symbol0.0.0.0 Processing top.VexRiscv.dataCache_1_.ways_0_data_symbol1: Properties: ports=2 bits=8192 rports=1 wports=1 dbits=8 abits=10 words=1024 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=10240 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=10240 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=12288 efficiency=25 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 5) accepted. Mapping to bram type $__ECP5_DP16KD (variant 5): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 6 rules: Efficiency for rule 4.5: efficiency=6, cells=8, acells=1 Efficiency for rule 4.4: efficiency=12, cells=4, acells=1 Efficiency for rule 4.3: efficiency=25, cells=2, acells=1 Efficiency for rule 4.2: efficiency=44, cells=1, acells=1 Efficiency for rule 4.1: efficiency=44, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=2, acells=2 Selected rule 4.2 with efficiency 44. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: VexRiscv.dataCache_1_.ways_0_data_symbol1.0.0.0 Processing top.VexRiscv.dataCache_1_.ways_0_data_symbol2: Properties: ports=2 bits=8192 rports=1 wports=1 dbits=8 abits=10 words=1024 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=10240 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=10240 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=12288 efficiency=25 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 5) accepted. Mapping to bram type $__ECP5_DP16KD (variant 5): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 6 rules: Efficiency for rule 4.5: efficiency=6, cells=8, acells=1 Efficiency for rule 4.4: efficiency=12, cells=4, acells=1 Efficiency for rule 4.3: efficiency=25, cells=2, acells=1 Efficiency for rule 4.2: efficiency=44, cells=1, acells=1 Efficiency for rule 4.1: efficiency=44, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=2, acells=2 Selected rule 4.2 with efficiency 44. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: VexRiscv.dataCache_1_.ways_0_data_symbol2.0.0.0 Processing top.VexRiscv.dataCache_1_.ways_0_data_symbol3: Properties: ports=2 bits=8192 rports=1 wports=1 dbits=8 abits=10 words=1024 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=10240 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=10240 efficiency=44 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=12288 efficiency=25 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 5) accepted. Mapping to bram type $__ECP5_DP16KD (variant 5): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=10 bwaste=10240 waste=10240 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1024 dwaste=1 bwaste=10240 waste=10240 efficiency=44 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3072 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7168 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15360 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 6 rules: Efficiency for rule 4.5: efficiency=6, cells=8, acells=1 Efficiency for rule 4.4: efficiency=12, cells=4, acells=1 Efficiency for rule 4.3: efficiency=25, cells=2, acells=1 Efficiency for rule 4.2: efficiency=44, cells=1, acells=1 Efficiency for rule 4.1: efficiency=44, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=2, acells=2 Selected rule 4.2 with efficiency 44. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: VexRiscv.dataCache_1_.ways_0_data_symbol3.0.0.0 Processing top.VexRiscv.dataCache_1_.ways_0_tags: Properties: ports=2 bits=2816 rports=1 wports=1 dbits=22 abits=7 words=128 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=384 dwaste=14 bwaste=15616 waste=15616 efficiency=15 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -1 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15616 efficiency=15 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=384 dwaste=14 bwaste=15616 waste=15616 efficiency=15 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=384 dwaste=14 bwaste=15616 waste=15616 efficiency=15 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=896 dwaste=14 bwaste=17920 waste=17920 efficiency=7 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -1 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=17920 efficiency=7 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1920 dwaste=5 bwaste=17920 waste=17920 efficiency=5 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -1 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=17920 efficiency=5 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3968 dwaste=2 bwaste=16128 waste=16128 efficiency=2 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8064 dwaste=0 bwaste=16128 waste=16128 efficiency=1 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16256 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=896 dwaste=14 bwaste=17920 waste=17920 efficiency=7 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1920 dwaste=5 bwaste=17920 waste=17920 efficiency=5 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3968 dwaste=2 bwaste=16128 waste=16128 efficiency=2 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8064 dwaste=0 bwaste=16128 waste=16128 efficiency=1 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16256 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=896 dwaste=14 bwaste=17920 waste=17920 efficiency=7 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1920 dwaste=5 bwaste=17920 waste=17920 efficiency=5 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3968 dwaste=2 bwaste=16128 waste=16128 efficiency=2 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8064 dwaste=0 bwaste=16128 waste=16128 efficiency=1 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16256 dwaste=0 bwaste=16256 waste=16256 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 3 rules: Efficiency for rule 4.2: efficiency=5, cells=3, acells=1 Efficiency for rule 4.1: efficiency=7, cells=2, acells=1 Efficiency for rule 1.1: efficiency=15, cells=1, acells=1 Selected rule 1.1 with efficiency 15. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -1 -1 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_PDPW16KD cell at grid position <0 0 0>: VexRiscv.dataCache_1_.ways_0_tags.0.0.0 Processing top.data_mem_grain0: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain0.0.0.0 Processing top.data_mem_grain1: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain1.0.0.0 Processing top.data_mem_grain10: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain10.0.0.0 Processing top.data_mem_grain11: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain11.0.0.0 Processing top.data_mem_grain12: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain12.0.0.0 Processing top.data_mem_grain13: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain13.0.0.0 Processing top.data_mem_grain14: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain14.0.0.0 Processing top.data_mem_grain15: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain15.0.0.0 Processing top.data_mem_grain2: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain2.0.0.0 Processing top.data_mem_grain3: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain3.0.0.0 Processing top.data_mem_grain4: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain4.0.0.0 Processing top.data_mem_grain5: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain5.0.0.0 Processing top.data_mem_grain6: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain6.0.0.0 Processing top.data_mem_grain7: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain7.0.0.0 Processing top.data_mem_grain8: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain8.0.0.0 Processing top.data_mem_grain9: Properties: ports=2 bits=4096 rports=1 wports=1 dbits=8 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=28 bwaste=14336 waste=14336 efficiency=22 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=10 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=1 bwaste=14336 waste=14336 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=4, acells=1 Efficiency for rule 4.3: efficiency=12, cells=2, acells=1 Efficiency for rule 4.2: efficiency=22, cells=1, acells=1 Efficiency for rule 4.1: efficiency=22, cells=1, acells=1 Efficiency for rule 1.1: efficiency=22, cells=1, acells=1 Selected rule 4.2 with efficiency 22. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: data_mem_grain9.0.0.0 Processing top.mem: Properties: ports=1 bits=327680 rports=1 wports=0 dbits=32 abits=14 words=10240 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=2048 efficiency=88 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule #2 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min wports 1' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=4096 efficiency=88 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=8192 waste=8192 efficiency=88 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=8192 efficiency=88 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2048 dwaste=0 bwaste=8192 waste=8192 efficiency=83 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=8192 efficiency=83 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=12288 waste=12288 efficiency=62 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=12288 efficiency=62 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=6144 waste=6144 efficiency=62 Rule #4 for bram type $__ECP5_DP16KD (variant 5) accepted. Mapping to bram type $__ECP5_DP16KD (variant 5): Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=6144 efficiency=62 Storing for later selection. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule #5 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min wports 1' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=8192 waste=8192 efficiency=88 Rule #5 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min wports 1' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2048 dwaste=0 bwaste=8192 waste=8192 efficiency=83 Rule #5 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min wports 1' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=12288 waste=12288 efficiency=62 Rule #5 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min wports 1' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=6144 waste=6144 efficiency=62 Rule #5 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min wports 1' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=8192 waste=8192 efficiency=88 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2048 dwaste=0 bwaste=8192 waste=8192 efficiency=83 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=12288 waste=12288 efficiency=62 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=6144 waste=6144 efficiency=62 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Selecting best of 6 rules: Efficiency for rule 4.5: efficiency=62, cells=32, acells=1 Efficiency for rule 4.4: efficiency=62, cells=32, acells=2 Efficiency for rule 4.3: efficiency=83, cells=24, acells=3 Efficiency for rule 4.2: efficiency=88, cells=20, acells=5 Efficiency for rule 4.1: efficiency=88, cells=20, acells=10 Efficiency for rule 1.1: efficiency=88, cells=20, acells=20 Selected rule 4.2 with efficiency 88. Mapping to bram type $__ECP5_DP16KD (variant 2): Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: mem.0.0.0 Creating $__ECP5_DP16KD cell at grid position <0 1 0>: mem.0.1.0 Creating $__ECP5_DP16KD cell at grid position <0 2 0>: mem.0.2.0 Creating $__ECP5_DP16KD cell at grid position <0 3 0>: mem.0.3.0 Creating $__ECP5_DP16KD cell at grid position <0 4 0>: mem.0.4.0 Creating $__ECP5_DP16KD cell at grid position <1 0 0>: mem.1.0.0 Creating $__ECP5_DP16KD cell at grid position <1 1 0>: mem.1.1.0 Creating $__ECP5_DP16KD cell at grid position <1 2 0>: mem.1.2.0 Creating $__ECP5_DP16KD cell at grid position <1 3 0>: mem.1.3.0 Creating $__ECP5_DP16KD cell at grid position <1 4 0>: mem.1.4.0 Creating $__ECP5_DP16KD cell at grid position <2 0 0>: mem.2.0.0 Creating $__ECP5_DP16KD cell at grid position <2 1 0>: mem.2.1.0 Creating $__ECP5_DP16KD cell at grid position <2 2 0>: mem.2.2.0 Creating $__ECP5_DP16KD cell at grid position <2 3 0>: mem.2.3.0 Creating $__ECP5_DP16KD cell at grid position <2 4 0>: mem.2.4.0 Creating $__ECP5_DP16KD cell at grid position <3 0 0>: mem.3.0.0 Creating $__ECP5_DP16KD cell at grid position <3 1 0>: mem.3.1.0 Creating $__ECP5_DP16KD cell at grid position <3 2 0>: mem.3.2.0 Creating $__ECP5_DP16KD cell at grid position <3 3 0>: mem.3.3.0 Creating $__ECP5_DP16KD cell at grid position <3 4 0>: mem.3.4.0 Processing top.mem_1: Properties: ports=2 bits=65536 rports=1 wports=1 dbits=32 abits=11 words=2048 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 8 9 10 11 12 13 14 15 -1 16 17 18 19 20 21 22 23 -1 24 25 26 27 28 29 30 31 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=2048 efficiency=88 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=4 bwaste=2048 waste=2048 efficiency=88 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 8 9 10 11 12 13 14 15 -1 16 17 18 19 20 21 22 23 -1 24 25 26 27 28 29 30 31 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=4096 efficiency=88 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=8192 waste=8192 efficiency=88 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 8 9 10 11 12 13 14 15 -1 16 17 18 19 20 21 22 23 -1 24 25 26 27 28 29 30 31 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=8192 efficiency=88 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2048 dwaste=0 bwaste=8192 waste=8192 efficiency=50 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=8192 efficiency=50 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=12288 efficiency=25 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=14336 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 5) accepted. Mapping to bram type $__ECP5_DP16KD (variant 5): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=8192 waste=8192 efficiency=88 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2048 dwaste=0 bwaste=8192 waste=8192 efficiency=50 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=14336 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=4096 waste=4096 efficiency=88 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=0 dwaste=4 bwaste=8192 waste=8192 efficiency=88 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2048 dwaste=0 bwaste=8192 waste=8192 efficiency=50 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=6144 dwaste=0 bwaste=12288 waste=12288 efficiency=25 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=14336 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 6 rules: Efficiency for rule 4.5: efficiency=12, cells=32, acells=1 Efficiency for rule 4.4: efficiency=25, cells=16, acells=1 Efficiency for rule 4.3: efficiency=50, cells=8, acells=1 Efficiency for rule 4.2: efficiency=88, cells=4, acells=1 Efficiency for rule 4.1: efficiency=88, cells=4, acells=2 Efficiency for rule 1.1: efficiency=88, cells=4, acells=4 Selected rule 4.2 with efficiency 88. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 -1 8 9 10 11 12 13 14 15 -1 16 17 18 19 20 21 22 23 -1 24 25 26 27 28 29 30 31 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_DP16KD cell at grid position <0 0 0>: mem_1.0.0.0 Creating $__ECP5_DP16KD cell at grid position <1 0 0>: mem_1.1.0.0 Creating $__ECP5_DP16KD cell at grid position <2 0 0>: mem_1.2.0.0 Creating $__ECP5_DP16KD cell at grid position <3 0 0>: mem_1.3.0.0 Processing top.mem_2: Properties: ports=1 bits=312 rports=1 wports=0 dbits=8 abits=6 words=39 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=473 dwaste=28 bwaste=18120 waste=18120 efficiency=1 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=473 dwaste=28 bwaste=18120 waste=18120 efficiency=1 Rule #2 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min wports 1' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=473 dwaste=28 bwaste=18120 waste=18120 efficiency=1 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=985 dwaste=10 bwaste=18120 waste=18120 efficiency=1 Rule #4 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2009 dwaste=1 bwaste=18120 waste=18120 efficiency=1 Rule #4 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4057 dwaste=0 bwaste=16228 waste=16228 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8153 dwaste=0 bwaste=16306 waste=16306 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16345 dwaste=0 bwaste=16345 waste=16345 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=985 dwaste=10 bwaste=18120 waste=18120 efficiency=1 Rule #5 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min wports 1' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2009 dwaste=1 bwaste=18120 waste=18120 efficiency=1 Rule #5 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min wports 1' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4057 dwaste=0 bwaste=16228 waste=16228 efficiency=0 Rule #5 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min wports 1' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8153 dwaste=0 bwaste=16306 waste=16306 efficiency=0 Rule #5 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min wports 1' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16345 dwaste=0 bwaste=16345 waste=16345 efficiency=0 Rule #5 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min wports 1' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=985 dwaste=10 bwaste=18120 waste=18120 efficiency=1 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2009 dwaste=1 bwaste=18120 waste=18120 efficiency=1 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4057 dwaste=0 bwaste=16228 waste=16228 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8153 dwaste=0 bwaste=16306 waste=16306 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16345 dwaste=0 bwaste=16345 waste=16345 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_romstyle="ebr" ...' not met. No acceptable bram resources found. Processing top.storage: Properties: ports=2 bits=160 rports=1 wports=1 dbits=10 abits=4 words=16 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=496 dwaste=26 bwaste=18272 waste=18272 efficiency=0 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=496 dwaste=26 bwaste=18272 waste=18272 efficiency=0 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=496 dwaste=26 bwaste=18272 waste=18272 efficiency=0 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1008 dwaste=8 bwaste=18272 waste=18272 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2032 dwaste=8 bwaste=18416 waste=18416 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4080 dwaste=2 bwaste=16352 waste=16352 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8176 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16368 dwaste=0 bwaste=16368 waste=16368 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1008 dwaste=8 bwaste=18272 waste=18272 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2032 dwaste=8 bwaste=18416 waste=18416 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4080 dwaste=2 bwaste=16352 waste=16352 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8176 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16368 dwaste=0 bwaste=16368 waste=16368 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1008 dwaste=8 bwaste=18272 waste=18272 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2032 dwaste=8 bwaste=18416 waste=18416 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4080 dwaste=2 bwaste=16352 waste=16352 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8176 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16368 dwaste=0 bwaste=16368 waste=16368 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. No acceptable bram resources found. Processing top.storage_1: Properties: ports=2 bits=160 rports=1 wports=1 dbits=10 abits=4 words=16 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=496 dwaste=26 bwaste=18272 waste=18272 efficiency=0 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=496 dwaste=26 bwaste=18272 waste=18272 efficiency=0 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=496 dwaste=26 bwaste=18272 waste=18272 efficiency=0 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1008 dwaste=8 bwaste=18272 waste=18272 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2032 dwaste=8 bwaste=18416 waste=18416 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4080 dwaste=2 bwaste=16352 waste=16352 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8176 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16368 dwaste=0 bwaste=16368 waste=16368 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1008 dwaste=8 bwaste=18272 waste=18272 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2032 dwaste=8 bwaste=18416 waste=18416 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4080 dwaste=2 bwaste=16352 waste=16352 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8176 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16368 dwaste=0 bwaste=16368 waste=16368 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1008 dwaste=8 bwaste=18272 waste=18272 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2032 dwaste=8 bwaste=18416 waste=18416 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4080 dwaste=2 bwaste=16352 waste=16352 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8176 dwaste=0 bwaste=16352 waste=16352 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16368 dwaste=0 bwaste=16368 waste=16368 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. No acceptable bram resources found. Processing top.storage_2: Properties: ports=2 bits=200 rports=1 wports=1 dbits=25 abits=3 words=8 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. No acceptable bram resources found. Processing top.storage_3: Properties: ports=2 bits=200 rports=1 wports=1 dbits=25 abits=3 words=8 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. No acceptable bram resources found. Processing top.storage_4: Properties: ports=2 bits=200 rports=1 wports=1 dbits=25 abits=3 words=8 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. No acceptable bram resources found. Processing top.storage_5: Properties: ports=2 bits=200 rports=1 wports=1 dbits=25 abits=3 words=8 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=504 dwaste=11 bwaste=18232 waste=18232 efficiency=1 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'min efficiency 5' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1016 dwaste=11 bwaste=18376 waste=18376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=2040 dwaste=2 bwaste=18376 waste=18376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=4088 dwaste=3 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=8184 dwaste=1 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=16376 dwaste=0 bwaste=16376 waste=16376 efficiency=0 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. No acceptable bram resources found. Processing top.tag_mem: Properties: ports=2 bits=12288 rports=1 wports=1 dbits=24 abits=9 words=512 Checking rule #1 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=12 bwaste=6144 waste=6144 efficiency=66 Rule #1 for bram type $__ECP5_PDPW16KD (variant 1) accepted. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=6144 efficiency=66 Storing for later selection. Checking rule #2 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=12 bwaste=6144 waste=6144 efficiency=66 Rule for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #3 for bram type $__ECP5_PDPW16KD (variant 1): Bram geometry: abits=9 dbits=36 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_PDPW16KD: awaste=0 dwaste=12 bwaste=6144 waste=6144 efficiency=66 Rule #3 for bram type $__ECP5_PDPW16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #4 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=12 bwaste=15360 waste=15360 efficiency=33 Rule #4 for bram type $__ECP5_DP16KD (variant 1) accepted. Mapping to bram type $__ECP5_DP16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=33 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=3 bwaste=15360 waste=15360 efficiency=22 Rule #4 for bram type $__ECP5_DP16KD (variant 2) accepted. Mapping to bram type $__ECP5_DP16KD (variant 2): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=22 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #4 for bram type $__ECP5_DP16KD (variant 3) accepted. Mapping to bram type $__ECP5_DP16KD (variant 3): Shuffle bit order to accommodate enable buckets of size 4.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=14336 efficiency=12 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #4 for bram type $__ECP5_DP16KD (variant 4) accepted. Mapping to bram type $__ECP5_DP16KD (variant 4): Shuffle bit order to accommodate enable buckets of size 2.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Updated properties: dups=1 waste=15360 efficiency=6 Storing for later selection. Checking rule #4 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #4 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'min efficiency 5' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=12 bwaste=15360 waste=15360 efficiency=33 Rule for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=3 bwaste=15360 waste=15360 efficiency=22 Rule for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #5 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'attribute syn_ramstyle="block_ram" ...' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 1): Bram geometry: abits=10 dbits=18 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=512 dwaste=12 bwaste=15360 waste=15360 efficiency=33 Rule #6 for bram type $__ECP5_DP16KD (variant 1) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 2): Bram geometry: abits=11 dbits=9 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=1536 dwaste=3 bwaste=15360 waste=15360 efficiency=22 Rule #6 for bram type $__ECP5_DP16KD (variant 2) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 3): Bram geometry: abits=12 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=3584 dwaste=0 bwaste=14336 waste=14336 efficiency=12 Rule #6 for bram type $__ECP5_DP16KD (variant 3) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 4): Bram geometry: abits=13 dbits=2 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=7680 dwaste=0 bwaste=15360 waste=15360 efficiency=6 Rule #6 for bram type $__ECP5_DP16KD (variant 4) rejected: requirement 'max wports 0' not met. Checking rule #6 for bram type $__ECP5_DP16KD (variant 5): Bram geometry: abits=14 dbits=1 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__ECP5_DP16KD: awaste=15872 dwaste=0 bwaste=15872 waste=15872 efficiency=3 Rule #6 for bram type $__ECP5_DP16KD (variant 5) rejected: requirement 'max wports 0' not met. Selecting best of 5 rules: Efficiency for rule 4.4: efficiency=6, cells=12, acells=1 Efficiency for rule 4.3: efficiency=12, cells=6, acells=1 Efficiency for rule 4.2: efficiency=22, cells=3, acells=1 Efficiency for rule 4.1: efficiency=33, cells=2, acells=1 Efficiency for rule 1.1: efficiency=66, cells=1, acells=1 Selected rule 1.1 with efficiency 66. Mapping to bram type $__ECP5_PDPW16KD (variant 1): Shuffle bit order to accommodate enable buckets of size 9.. Results of bit order shuffling: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 -1 -1 -1 Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1.1. Creating $__ECP5_PDPW16KD cell at grid position <0 0 0>: tag_mem.0.0.0 Adding extra logic for transparent port B1.1. 4.28. Executing TECHMAP pass (map to technology primitives). 4.28.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/brams_map.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/brams_map.v' to AST representation. Generating RTLIL representation for module `\$__ECP5_DP16KD'. Generating RTLIL representation for module `\$__ECP5_PDPW16KD'. Successfully finished Verilog frontend. 4.28.2. Continuing TECHMAP pass. Using template $paramod$66f7b7a9dd3f499ead7b66dfbda87042c3f31926\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$7f392415bd247690db0a4876148cbdaca096adcc\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$69a26f7f448eb95fc0c630cd7d82fffadcc94e8f\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$984bab16f115495353a693bd74039aafda73082b\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$2c48ff25feb7c3fcf8816c75cd2e17468568357c\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$7b0132d0f2f8fc3e347dbb8225293c5a5fd24378\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$d270131e564ae16d5164f2d7409e0409e7bfcbc9\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$485c88400d10b0f3643f823407982828a2024fad\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod\$__ECP5_PDPW16KD\CLKPOL2=1\CLKPOL3=1 for cells of type $__ECP5_PDPW16KD. Using template $paramod$903d550286893f2a2052112d826717bae0cfddd6\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$bdab9a4289d40ebe1d36b23ee9c37342344d5f9d\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$53ee28ef64dad4154760d925d330877195073d27\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$65796086bbb28e4fc94fd5158e5ad83744ede8d4\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$20e509a3c17e2cb7edaa2497a0ec8bb2daefb1c0\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$e5258842f9b7ed66e96cfd1568239e8f598c6bfe\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$2b5dbca6cf9d8c28f27aa7cecb1218d9e9fe4bc6\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$094ab2ece720e830030ef932be0bd0a7cc36a56f\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$6155bd6e214cdd2ad90b45a4ae9946bae0900e64\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$76fe95d9135a02f68dd3d5fcb8e02052f6a88689\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$571f5959f24a1d6cbe7e90d33b0a7ea2422f4a8c\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. Using template $paramod$c97c0060ae32aa3cbc9f8d33231fd7f04341b337\$__ECP5_DP16KD for cells of type $__ECP5_DP16KD. No more expansions possible. 4.29. Executing MEMORY_BRAM pass (mapping $mem cells to block memories). Processing top.VexRiscv.RegFilePlugin_regFile: Properties: ports=3 bits=1024 rports=2 wports=1 dbits=32 abits=5 words=32 Checking rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1): Bram geometry: abits=4 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__TRELLIS_DPR16X4: awaste=0 dwaste=0 bwaste=0 waste=0 efficiency=100 Rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1) accepted. Mapping to bram type $__TRELLIS_DPR16X4 (variant 1): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1.1. Read port #1 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Failed to map read port #1. Growing more read ports by duplicating bram cells. Read port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1.1. Read port #1 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port A1.2. Updated properties: dups=2 waste=0 efficiency=50 Creating $__TRELLIS_DPR16X4 cell at grid position <0 0 0>: VexRiscv.RegFilePlugin_regFile.0.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <0 0 1>: VexRiscv.RegFilePlugin_regFile.0.0.1 Creating $__TRELLIS_DPR16X4 cell at grid position <0 1 0>: VexRiscv.RegFilePlugin_regFile.0.1.0 Creating $__TRELLIS_DPR16X4 cell at grid position <0 1 1>: VexRiscv.RegFilePlugin_regFile.0.1.1 Creating $__TRELLIS_DPR16X4 cell at grid position <1 0 0>: VexRiscv.RegFilePlugin_regFile.1.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <1 0 1>: VexRiscv.RegFilePlugin_regFile.1.0.1 Creating $__TRELLIS_DPR16X4 cell at grid position <1 1 0>: VexRiscv.RegFilePlugin_regFile.1.1.0 Creating $__TRELLIS_DPR16X4 cell at grid position <1 1 1>: VexRiscv.RegFilePlugin_regFile.1.1.1 Creating $__TRELLIS_DPR16X4 cell at grid position <2 0 0>: VexRiscv.RegFilePlugin_regFile.2.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <2 0 1>: VexRiscv.RegFilePlugin_regFile.2.0.1 Creating $__TRELLIS_DPR16X4 cell at grid position <2 1 0>: VexRiscv.RegFilePlugin_regFile.2.1.0 Creating $__TRELLIS_DPR16X4 cell at grid position <2 1 1>: VexRiscv.RegFilePlugin_regFile.2.1.1 Creating $__TRELLIS_DPR16X4 cell at grid position <3 0 0>: VexRiscv.RegFilePlugin_regFile.3.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <3 0 1>: VexRiscv.RegFilePlugin_regFile.3.0.1 Creating $__TRELLIS_DPR16X4 cell at grid position <3 1 0>: VexRiscv.RegFilePlugin_regFile.3.1.0 Creating $__TRELLIS_DPR16X4 cell at grid position <3 1 1>: VexRiscv.RegFilePlugin_regFile.3.1.1 Creating $__TRELLIS_DPR16X4 cell at grid position <4 0 0>: VexRiscv.RegFilePlugin_regFile.4.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <4 0 1>: VexRiscv.RegFilePlugin_regFile.4.0.1 Creating $__TRELLIS_DPR16X4 cell at grid position <4 1 0>: VexRiscv.RegFilePlugin_regFile.4.1.0 Creating $__TRELLIS_DPR16X4 cell at grid position <4 1 1>: VexRiscv.RegFilePlugin_regFile.4.1.1 Creating $__TRELLIS_DPR16X4 cell at grid position <5 0 0>: VexRiscv.RegFilePlugin_regFile.5.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <5 0 1>: VexRiscv.RegFilePlugin_regFile.5.0.1 Creating $__TRELLIS_DPR16X4 cell at grid position <5 1 0>: VexRiscv.RegFilePlugin_regFile.5.1.0 Creating $__TRELLIS_DPR16X4 cell at grid position <5 1 1>: VexRiscv.RegFilePlugin_regFile.5.1.1 Creating $__TRELLIS_DPR16X4 cell at grid position <6 0 0>: VexRiscv.RegFilePlugin_regFile.6.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <6 0 1>: VexRiscv.RegFilePlugin_regFile.6.0.1 Creating $__TRELLIS_DPR16X4 cell at grid position <6 1 0>: VexRiscv.RegFilePlugin_regFile.6.1.0 Creating $__TRELLIS_DPR16X4 cell at grid position <6 1 1>: VexRiscv.RegFilePlugin_regFile.6.1.1 Creating $__TRELLIS_DPR16X4 cell at grid position <7 0 0>: VexRiscv.RegFilePlugin_regFile.7.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <7 0 1>: VexRiscv.RegFilePlugin_regFile.7.0.1 Creating $__TRELLIS_DPR16X4 cell at grid position <7 1 0>: VexRiscv.RegFilePlugin_regFile.7.1.0 Creating $__TRELLIS_DPR16X4 cell at grid position <7 1 1>: VexRiscv.RegFilePlugin_regFile.7.1.1 Processing top.mem_2: Properties: ports=1 bits=312 rports=1 wports=0 dbits=8 abits=6 words=39 Checking rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1): Bram geometry: abits=4 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__TRELLIS_DPR16X4: awaste=9 dwaste=0 bwaste=36 waste=36 efficiency=81 Rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1) rejected: requirement 'min wports 1' not met. No acceptable bram resources found. Processing top.storage: Properties: ports=2 bits=160 rports=1 wports=1 dbits=10 abits=4 words=16 Checking rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1): Bram geometry: abits=4 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__TRELLIS_DPR16X4: awaste=0 dwaste=2 bwaste=32 waste=32 efficiency=83 Rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1) accepted. Mapping to bram type $__TRELLIS_DPR16X4 (variant 1): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1. Read port #0 is in clock domain !~async~. Mapped to bram port A1.1. Updated properties: dups=1 waste=32 efficiency=83 Creating $__TRELLIS_DPR16X4 cell at grid position <0 0 0>: storage.0.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <1 0 0>: storage.1.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <2 0 0>: storage.2.0.0 Processing top.storage_1: Properties: ports=2 bits=160 rports=1 wports=1 dbits=10 abits=4 words=16 Checking rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1): Bram geometry: abits=4 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__TRELLIS_DPR16X4: awaste=0 dwaste=2 bwaste=32 waste=32 efficiency=83 Rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1) accepted. Mapping to bram type $__TRELLIS_DPR16X4 (variant 1): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1. Read port #0 is in clock domain !~async~. Mapped to bram port A1.1. Updated properties: dups=1 waste=32 efficiency=83 Creating $__TRELLIS_DPR16X4 cell at grid position <0 0 0>: storage_1.0.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <1 0 0>: storage_1.1.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <2 0 0>: storage_1.2.0.0 Processing top.storage_2: Properties: ports=2 bits=200 rports=1 wports=1 dbits=25 abits=3 words=8 Checking rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1): Bram geometry: abits=4 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__TRELLIS_DPR16X4: awaste=8 dwaste=3 bwaste=56 waste=56 efficiency=44 Rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1) accepted. Mapping to bram type $__TRELLIS_DPR16X4 (variant 1): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1. Read port #0 is in clock domain !~async~. Mapped to bram port A1.1. Updated properties: dups=1 waste=56 efficiency=44 Creating $__TRELLIS_DPR16X4 cell at grid position <0 0 0>: storage_2.0.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <1 0 0>: storage_2.1.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <2 0 0>: storage_2.2.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <3 0 0>: storage_2.3.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <4 0 0>: storage_2.4.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <5 0 0>: storage_2.5.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <6 0 0>: storage_2.6.0.0 Processing top.storage_3: Properties: ports=2 bits=200 rports=1 wports=1 dbits=25 abits=3 words=8 Checking rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1): Bram geometry: abits=4 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__TRELLIS_DPR16X4: awaste=8 dwaste=3 bwaste=56 waste=56 efficiency=44 Rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1) accepted. Mapping to bram type $__TRELLIS_DPR16X4 (variant 1): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1. Read port #0 is in clock domain !~async~. Mapped to bram port A1.1. Updated properties: dups=1 waste=56 efficiency=44 Creating $__TRELLIS_DPR16X4 cell at grid position <0 0 0>: storage_3.0.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <1 0 0>: storage_3.1.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <2 0 0>: storage_3.2.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <3 0 0>: storage_3.3.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <4 0 0>: storage_3.4.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <5 0 0>: storage_3.5.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <6 0 0>: storage_3.6.0.0 Processing top.storage_4: Properties: ports=2 bits=200 rports=1 wports=1 dbits=25 abits=3 words=8 Checking rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1): Bram geometry: abits=4 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__TRELLIS_DPR16X4: awaste=8 dwaste=3 bwaste=56 waste=56 efficiency=44 Rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1) accepted. Mapping to bram type $__TRELLIS_DPR16X4 (variant 1): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1. Read port #0 is in clock domain !~async~. Mapped to bram port A1.1. Updated properties: dups=1 waste=56 efficiency=44 Creating $__TRELLIS_DPR16X4 cell at grid position <0 0 0>: storage_4.0.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <1 0 0>: storage_4.1.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <2 0 0>: storage_4.2.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <3 0 0>: storage_4.3.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <4 0 0>: storage_4.4.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <5 0 0>: storage_4.5.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <6 0 0>: storage_4.6.0.0 Processing top.storage_5: Properties: ports=2 bits=200 rports=1 wports=1 dbits=25 abits=3 words=8 Checking rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1): Bram geometry: abits=4 dbits=4 wports=0 rports=0 Estimated number of duplicates for more read ports: dups=1 Metrics for $__TRELLIS_DPR16X4: awaste=8 dwaste=3 bwaste=56 waste=56 efficiency=44 Rule #1 for bram type $__TRELLIS_DPR16X4 (variant 1) accepted. Mapping to bram type $__TRELLIS_DPR16X4 (variant 1): Write port #0 is in clock domain \VexRiscv.IBusCachedPlugin_cache.clk. Mapped to bram port B1. Read port #0 is in clock domain !~async~. Mapped to bram port A1.1. Updated properties: dups=1 waste=56 efficiency=44 Creating $__TRELLIS_DPR16X4 cell at grid position <0 0 0>: storage_5.0.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <1 0 0>: storage_5.1.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <2 0 0>: storage_5.2.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <3 0 0>: storage_5.3.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <4 0 0>: storage_5.4.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <5 0 0>: storage_5.5.0.0 Creating $__TRELLIS_DPR16X4 cell at grid position <6 0 0>: storage_5.6.0.0 4.30. Executing TECHMAP pass (map to technology primitives). 4.30.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/lutrams_map.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/lutrams_map.v' to AST representation. Generating RTLIL representation for module `\$__TRELLIS_DPR16X4'. Successfully finished Verilog frontend. 4.30.2. Continuing TECHMAP pass. Using template $paramod\$__TRELLIS_DPR16X4\CLKPOL2=1 for cells of type $__TRELLIS_DPR16X4. No more expansions possible. 4.31. Executing OPT pass (performing simple optimizations). 4.31.1. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.31.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 187 cells. 4.31.3. Executing OPT_DFF pass (perform DFF optimizations). Adding SRST signal on $auto$memory_bram.cc:991:replace_memory$14865 ($dff) from module top (D = $auto$memory_bram.cc:886:replace_memory$14858, Q = $auto$memory_bram.cc:990:replace_memory$14864, rval = 4'0000). 4.31.4. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 12 unused cells and 1577 unused wires. 4.31.5. Rerunning OPT passes. (Removed registers in this run.) 4.31.6. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.31.7. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.31.8. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 3 on $auto$opt_dff.cc:702:run$15792 ($sdff) from module top. Setting constant 0-bit at position 19 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 20 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 21 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 22 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 24 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 25 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 26 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 27 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 28 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 29 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 30 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 31 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 32 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 33 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 34 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. Setting constant 0-bit at position 35 on $auto$memory_bram.cc:884:replace_memory$14857 ($dff) from module top. 4.31.9. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 0 unused cells and 2 unused wires. 4.31.10. Rerunning OPT passes. (Removed registers in this run.) 4.31.11. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.31.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.31.13. Executing OPT_DFF pass (perform DFF optimizations). Removing never-active SRST on $auto$opt_dff.cc:702:run$15792 ($sdff) from module top. 4.31.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.31.15. Rerunning OPT passes. (Removed registers in this run.) 4.31.16. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.31.17. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.31.18. Executing OPT_DFF pass (perform DFF optimizations). 4.31.19. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.31.20. Finished fast OPT passes. 4.32. Executing MEMORY_MAP pass (converting memories to logic and flip-flops). Mapping memory \mem_2 in module \top: created 39 $dff cells and 0 static cells of width 8. Extracted addr FF from read port 0 of top.mem_2: mem_2$rdreg[0] read interface: 1 $dff and 63 $mux cells. write interface: 0 write mux blocks. 4.33. Executing OPT pass (performing simple optimizations). 4.33.1. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.33.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.33.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.33.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. New input vector for $reduce_or cell $auto$opt_dff.cc:277:combine_resets$12997: { $procmux$11306_CMP $procmux$11301_CMP $procmux$11293_CMP \sys_rst } New input vector for $reduce_or cell $auto$opt_dff.cc:277:combine_resets$12944: { $procmux$11085_CMP $procmux$11080_CMP $procmux$11072_CMP \sys_rst } New input vector for $reduce_or cell $auto$opt_dff.cc:277:combine_resets$12891: { $procmux$10864_CMP $procmux$10859_CMP $procmux$10851_CMP \sys_rst } New input vector for $reduce_or cell $auto$opt_dff.cc:277:combine_resets$12838: { $procmux$10643_CMP $procmux$10638_CMP $procmux$10630_CMP \sys_rst } Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$6281: Old ports: A=2'00, B=2'11, Y=$auto$wreduce.cc:454:run$14091 [1:0] New ports: A=1'0, B=1'1, Y=$auto$wreduce.cc:454:run$14091 [0] New connections: $auto$wreduce.cc:454:run$14091 [1] = $auto$wreduce.cc:454:run$14091 [0] Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$6290: Old ports: A=2'11, B=2'00, Y=$auto$wreduce.cc:454:run$14092 [1:0] New ports: A=1'1, B=1'0, Y=$auto$wreduce.cc:454:run$14092 [0] New connections: $auto$wreduce.cc:454:run$14092 [1] = $auto$wreduce.cc:454:run$14092 [0] Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$6292: Old ports: A={ 1'0 $auto$wreduce.cc:454:run$14092 [1:0] }, B=3'001, Y=$flatten\VexRiscv.$procmux$6292_Y New ports: A=$auto$wreduce.cc:454:run$14092 [1:0], B=2'01, Y=$flatten\VexRiscv.$procmux$6292_Y [1:0] New connections: $flatten\VexRiscv.$procmux$6292_Y [2] = 1'0 New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6648: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5035_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP $flatten\VexRiscv.$procmux$6649_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6666: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$6675_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6682: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5929_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$4932_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5848_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6701: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5929_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$4932_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5848_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6720: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6755: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6769: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $auto$opt_reduce.cc:134:opt_mux$12357 $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP $auto$opt_reduce.cc:134:opt_mux$12361 } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6789: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12365 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6806: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5035_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP $flatten\VexRiscv.$procmux$6649_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6824: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5929_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$6675_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6841: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5929_CMP $flatten\VexRiscv.$procmux$5035_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$4932_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5848_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP $flatten\VexRiscv.$procmux$6649_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6862: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6878: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12365 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6920: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6936: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12365 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6952: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12365 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $auto$opt_reduce.cc:134:opt_mux$12357 $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP $auto$opt_reduce.cc:134:opt_mux$12361 } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6974: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $auto$opt_reduce.cc:134:opt_mux$12365 $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5662_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } New ctrl vector for $pmux cell $flatten\VexRiscv.$procmux$6992: { $flatten\VexRiscv.$procmux$5838_CMP $flatten\VexRiscv.$procmux$5821_CMP $flatten\VexRiscv.$procmux$5109_CMP $flatten\VexRiscv.$procmux$5005_CMP $flatten\VexRiscv.$procmux$6656_CMP $flatten\VexRiscv.$procmux$5064_CMP $flatten\VexRiscv.$procmux$5093_CMP $flatten\VexRiscv.$procmux$5017_CMP $flatten\VexRiscv.$procmux$5057_CMP } Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7012: Old ports: A=4'0010, B={ 2'10 $auto$wreduce.cc:454:run$14086 [1:0] }, Y=\VexRiscv.CsrPlugin_selfException_payload_code New ports: A=3'010, B={ 1'1 $auto$wreduce.cc:454:run$14086 [1:0] }, Y={ \VexRiscv.CsrPlugin_selfException_payload_code [3] \VexRiscv.CsrPlugin_selfException_payload_code [1:0] } New connections: \VexRiscv.CsrPlugin_selfException_payload_code [2] = 1'0 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7348: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$13\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$13\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$13\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7355: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$12\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$12\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$12\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7363: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$11\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$11\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$11\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7372: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$10\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$10\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$10\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7382: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$9\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$9\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$9\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7393: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$8\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$8\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$8\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7405: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$7\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$7\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$7\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7418: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$6\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$6\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$6\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7432: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$5\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$5\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$5\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7447: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$4\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$4\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$4\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7463: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$3\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$3\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$3\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7480: Old ports: A=2'11, B=2'01, Y=$flatten\VexRiscv.$2\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.$2\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] New connections: $flatten\VexRiscv.$2\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7502: Old ports: A={ \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [19:0] }, B=4, Y=$flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] New ports: A={ \VexRiscv.decode_to_execute_INSTRUCTION [31] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [19:0] }, B=21'000000000000000000100, Y=$flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20:0] New connections: $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [31:21] = { $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7679: Old ports: A={ \VexRiscv.MmuPlugin_satp_ppn \VexRiscv.MmuPlugin_shared_vpn_1 2'00 }, B={ \VexRiscv.MmuPlugin_shared_pteBuffer_PPN1 [9:0] \VexRiscv.MmuPlugin_shared_pteBuffer_PPN0 \VexRiscv.MmuPlugin_shared_vpn_0 2'00 }, Y=\VexRiscv.MmuPlugin_dBusAccess_cmd_payload_address New ports: A={ \VexRiscv.MmuPlugin_satp_ppn \VexRiscv.MmuPlugin_shared_vpn_1 }, B={ \VexRiscv.MmuPlugin_shared_pteBuffer_PPN1 [9:0] \VexRiscv.MmuPlugin_shared_pteBuffer_PPN0 \VexRiscv.MmuPlugin_shared_vpn_0 }, Y=\VexRiscv.MmuPlugin_dBusAccess_cmd_payload_address [31:2] New connections: \VexRiscv.MmuPlugin_dBusAccess_cmd_payload_address [1:0] = 2'00 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7702: Old ports: A={ \VexRiscv.IBusCachedPlugin_fetchPc_pcReg [31:2] 2'00 }, B={ \VexRiscv.MmuPlugin_ports_1_cacheLine_physicalAddress_1 $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5394$3102_Y \VexRiscv.IBusCachedPlugin_fetchPc_pcReg [11:2] 2'00 }, Y=\VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuBus_rsp_physicalAddress New ports: A=\VexRiscv.IBusCachedPlugin_fetchPc_pcReg [31:12], B={ \VexRiscv.MmuPlugin_ports_1_cacheLine_physicalAddress_1 $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5394$3102_Y }, Y=\VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuBus_rsp_physicalAddress [31:12] New connections: \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_mmuBus_rsp_physicalAddress [11:0] = { \VexRiscv.IBusCachedPlugin_fetchPc_pcReg [11:2] 2'00 } Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7738: Old ports: A=\VexRiscv.execute_to_memory_REGFILE_WRITE_DATA, B={ \VexRiscv.MmuPlugin_ports_0_cacheLine_physicalAddress_1 $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5297$3041_Y \VexRiscv.execute_to_memory_REGFILE_WRITE_DATA [11:0] }, Y={ \VexRiscv.DBusCachedPlugin_mmuBus_rsp_physicalAddress [31:28] \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_physicalAddress [27:0] } New ports: A=\VexRiscv.execute_to_memory_REGFILE_WRITE_DATA [31:12], B={ \VexRiscv.MmuPlugin_ports_0_cacheLine_physicalAddress_1 $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5297$3041_Y }, Y={ \VexRiscv.DBusCachedPlugin_mmuBus_rsp_physicalAddress [31:28] \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_physicalAddress [27:12] } New connections: \VexRiscv.dataCache_1_.io_cpu_memory_mmuBus_rsp_physicalAddress [11:0] = \VexRiscv.execute_to_memory_REGFILE_WRITE_DATA [11:0] Consolidated identical input bits for $pmux cell $flatten\VexRiscv.$procmux$7792: Old ports: A={ \VexRiscv.dataCache_1__io_cpu_writeBack_data [31:16] \VexRiscv._zz_151_ [15:8] \VexRiscv._zz_149_ [7:0] }, B={ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_149_ [7:0] \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_151_ [15:8] \VexRiscv._zz_149_ [7:0] }, Y=\VexRiscv.writeBack_DBusCachedPlugin_rspFormated New ports: A={ \VexRiscv.dataCache_1__io_cpu_writeBack_data [31:16] \VexRiscv._zz_151_ [15:8] }, B={ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_148_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_150_ \VexRiscv._zz_151_ [15:8] }, Y=\VexRiscv.writeBack_DBusCachedPlugin_rspFormated [31:8] New connections: \VexRiscv.writeBack_DBusCachedPlugin_rspFormated [7:0] = \VexRiscv._zz_149_ [7:0] Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7812: Old ports: A={ 1'1 \VexRiscv._zz_360_ [1:0] }, B={ 1'1 \VexRiscv._zz_361_ [1:0] }, Y=$auto$wreduce.cc:454:run$14087 [2:0] New ports: A=\VexRiscv._zz_360_ [1:0], B=\VexRiscv._zz_361_ [1:0], Y=$auto$wreduce.cc:454:run$14087 [1:0] New connections: $auto$wreduce.cc:454:run$14087 [2] = 1'1 Consolidated identical input bits for $pmux cell $flatten\VexRiscv.$procmux$7913: Old ports: A=\VexRiscv.decode_to_execute_RS2, B={ \VexRiscv.decode_to_execute_RS2 [7:0] \VexRiscv.decode_to_execute_RS2 [7:0] \VexRiscv.decode_to_execute_RS2 [7:0] \VexRiscv.decode_to_execute_RS2 [7:0] \VexRiscv.decode_to_execute_RS2 [15:0] \VexRiscv.decode_to_execute_RS2 [15:0] }, Y=\VexRiscv._zz_147_ New ports: A=\VexRiscv.decode_to_execute_RS2 [31:8], B={ \VexRiscv.decode_to_execute_RS2 [7:0] \VexRiscv.decode_to_execute_RS2 [7:0] \VexRiscv.decode_to_execute_RS2 [7:0] \VexRiscv.decode_to_execute_RS2 [15:0] \VexRiscv.decode_to_execute_RS2 [15:8] }, Y=\VexRiscv._zz_147_ [31:8] New connections: \VexRiscv._zz_147_ [7:0] = \VexRiscv.decode_to_execute_RS2 [7:0] Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7953: Old ports: A=4'1100, B=4'0001, Y=\VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code New ports: A=2'10, B=2'01, Y={ \VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code [2] \VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code [0] } New connections: { \VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code [3] \VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code [1] } = { \VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code [2] 1'0 } Consolidated identical input bits for $mux cell $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2834$2592: Old ports: A=2'01, B=2'11, Y=\VexRiscv._zz_360_ [1:0] New ports: A=1'0, B=1'1, Y=\VexRiscv._zz_360_ [1] New connections: \VexRiscv._zz_360_ [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:2835$2593: Old ports: A=2'00, B=2'10, Y=\VexRiscv._zz_361_ [1:0] New ports: A=1'0, B=1'1, Y=\VexRiscv._zz_361_ [1] New connections: \VexRiscv._zz_361_ [0] = 1'0 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2929: Old ports: A={ \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [7] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [30:25] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [11:8] 1'0 }, B={ \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [19:12] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [20] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [30:21] 1'0 }, Y={ $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2929_Y [19:2] \VexRiscv.IBusCachedPlugin_predictionJumpInterface_payload [1:0] } New ports: A={ \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [31] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [7] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [11:8] }, B={ \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [19:12] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [20] \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [24:21] }, Y={ $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2929_Y [19:11] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2929_Y [4:2] \VexRiscv.IBusCachedPlugin_predictionJumpInterface_payload [1] } New connections: { $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4877$2929_Y [10:5] \VexRiscv.IBusCachedPlugin_predictionJumpInterface_payload [0] } = { \VexRiscv.IBusCachedPlugin_cache.io_cpu_fetch_data_regNextWhen [30:25] 1'0 } Consolidated identical input bits for $mux cell $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224: Old ports: A={ \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [7] \VexRiscv.decode_to_execute_INSTRUCTION [30:25] \VexRiscv.decode_to_execute_INSTRUCTION [11:8] 1'0 }, B={ \VexRiscv.decode_to_execute_INSTRUCTION [19:12] \VexRiscv.decode_to_execute_INSTRUCTION [20] \VexRiscv.decode_to_execute_INSTRUCTION [30:21] 1'0 }, Y=$flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [19:0] New ports: A={ \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [7] \VexRiscv.decode_to_execute_INSTRUCTION [11:8] }, B={ \VexRiscv.decode_to_execute_INSTRUCTION [19:12] \VexRiscv.decode_to_execute_INSTRUCTION [20] \VexRiscv.decode_to_execute_INSTRUCTION [24:21] }, Y={ $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [19:11] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [4:1] } New connections: { $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [10:5] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [0] } = { \VexRiscv.decode_to_execute_INSTRUCTION [30:25] 1'0 } Consolidated identical input bits for $mux cell $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6693$3414: Old ports: A={ \VexRiscv._zz_141_ [4:2] 2'00 }, B={ \VexRiscv._zz_232_ 2'00 }, Y={ \main_soclinux_cpu_dbus_adr [2:0] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6693$3414_Y [1:0] } New ports: A=\VexRiscv._zz_141_ [4:2], B=\VexRiscv._zz_232_, Y=\main_soclinux_cpu_dbus_adr [2:0] New connections: $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:6693$3414_Y [1:0] = 2'00 Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4191: Old ports: A=3'111, B=3'000, Y=$flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_length[2:0] New ports: A=1'1, B=1'0, Y=$flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_length[2:0] [0] New connections: $flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_length[2:0] [2:1] = { $flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_length[2:0] [0] $flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_length[2:0] [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4209: Old ports: A=5'00000, B={ \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [4:2] 2'00 }, Y=$flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_address[31:0] [4:0] New ports: A=3'000, B=\VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [4:2], Y=$flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_address[31:0] [4:2] New connections: $flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_address[31:0] [1:0] = 2'00 Consolidated identical input bits for $pmux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4511: Old ports: A=4'1111, B=8'00010011, Y=\VexRiscv.dataCache_1_._zz_6_ New ports: A=2'11, B=4'0001, Y=\VexRiscv.dataCache_1_._zz_6_ [2:1] New connections: { \VexRiscv.dataCache_1_._zz_6_ [3] \VexRiscv.dataCache_1_._zz_6_ [0] } = { \VexRiscv.dataCache_1_._zz_6_ [2] 1'1 } Consolidated identical input bits for $mux cell $procmux$10510: Old ports: A=2'00, B=2'11, Y=\main_sdram_interface_wdata_we New ports: A=1'0, B=1'1, Y=\main_sdram_interface_wdata_we [0] New connections: \main_sdram_interface_wdata_we [1] = \main_sdram_interface_wdata_we [0] Consolidated identical input bits for $mux cell $procmux$10519: Old ports: A=3'100, B=3'010, Y=$procmux$10519_Y New ports: A=2'10, B=2'01, Y=$procmux$10519_Y [2:1] New connections: $procmux$10519_Y [0] = 1'0 Consolidated identical input bits for $mux cell $procmux$9040: Old ports: A=11'00000000000, B=11'10000000000, Y=$auto$wreduce.cc:454:run$14121 [10:0] New ports: A=1'0, B=1'1, Y=$auto$wreduce.cc:454:run$14121 [10] New connections: $auto$wreduce.cc:454:run$14121 [9:0] = 10'0000000000 Consolidated identical input bits for $mux cell $procmux$9348: Old ports: A=2'00, B=2'11, Y=$procmux$9348_Y New ports: A=1'0, B=1'1, Y=$procmux$9348_Y [0] New connections: $procmux$9348_Y [1] = $procmux$9348_Y [0] Optimizing cells in module \top. Consolidated identical input bits for $pmux cell $flatten\VexRiscv.$procmux$7485: Old ports: A=2'11, B={ $flatten\VexRiscv.$2\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$3\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$4\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$5\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$6\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$7\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$8\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$9\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$10\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$11\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$12\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] $flatten\VexRiscv.$13\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] }, Y=\VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped New ports: A=1'1, B={ $flatten\VexRiscv.$2\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$3\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$4\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$5\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$6\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$7\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$8\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$9\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$10\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$11\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$12\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] $flatten\VexRiscv.$13\CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped[1:0] [1] }, Y=\VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped [1] New connections: \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped [0] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7502: Old ports: A={ \VexRiscv.decode_to_execute_INSTRUCTION [31] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [19:0] }, B=21'000000000000000000100, Y=$flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20:0] New ports: A={ \VexRiscv.decode_to_execute_INSTRUCTION [31] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [19:11] \VexRiscv.decode_to_execute_INSTRUCTION [30:25] $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:5969$3224_Y [4:1] }, B=20'00000000000000000010, Y=$flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20:1] New connections: $flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [0] = 1'0 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7508: Old ports: A=$flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0], B={ \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31:20] }, Y=\VexRiscv.execute_BranchPlugin_branch_src2 New ports: A=$flatten\VexRiscv.$2\execute_BranchPlugin_branch_src2[31:0] [20:0], B={ \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31] \VexRiscv.decode_to_execute_INSTRUCTION [31:20] }, Y=\VexRiscv.execute_BranchPlugin_branch_src2 [20:0] New connections: \VexRiscv.execute_BranchPlugin_branch_src2 [31:21] = { \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] \VexRiscv.execute_BranchPlugin_branch_src2 [20] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7806: Old ports: A={ 1'0 $auto$wreduce.cc:454:run$14087 [2:0] }, B={ 2'11 \VexRiscv._zz_360_ [1:0] }, Y=\VexRiscv.DBusCachedPlugin_exceptionBus_payload_code New ports: A={ 1'0 $auto$wreduce.cc:454:run$14087 [1:0] }, B={ 1'1 \VexRiscv._zz_360_ [1] 1'1 }, Y={ \VexRiscv.DBusCachedPlugin_exceptionBus_payload_code [3] \VexRiscv.DBusCachedPlugin_exceptionBus_payload_code [1:0] } New connections: \VexRiscv.DBusCachedPlugin_exceptionBus_payload_code [2] = 1'1 Consolidated identical input bits for $mux cell $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:7440$3523: Old ports: A=4'0010, B=\VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code, Y=$flatten\VexRiscv.$procmux$4985_Y New ports: A=3'010, B={ \VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code [2] 1'0 \VexRiscv.IBusCachedPlugin_decodeExceptionPort_payload_code [0] }, Y=$flatten\VexRiscv.$procmux$4985_Y [2:0] New connections: $flatten\VexRiscv.$procmux$4985_Y [3] = $flatten\VexRiscv.$procmux$4985_Y [2] Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4200: Old ports: A=$flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_length[2:0], B=3'000, Y=\VexRiscv.dataCache_1__io_mem_cmd_payload_length New ports: A=$flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_length[2:0] [0], B=1'0, Y=\VexRiscv.dataCache_1__io_mem_cmd_payload_length [0] New connections: \VexRiscv.dataCache_1__io_mem_cmd_payload_length [2:1] = { \VexRiscv.dataCache_1__io_mem_cmd_payload_length [0] \VexRiscv.dataCache_1__io_mem_cmd_payload_length [0] } Consolidated identical input bits for $mux cell $flatten\VexRiscv.\dataCache_1_.$procmux$4218: Old ports: A=$flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_address[31:0] [4:0], B={ \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [4:2] 2'00 }, Y=\VexRiscv.dataCache_1__io_mem_cmd_payload_address [4:0] New ports: A=$flatten\VexRiscv.\dataCache_1_.$3\io_mem_cmd_payload_address[31:0] [4:2], B=\VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [4:2], Y=\VexRiscv.dataCache_1__io_mem_cmd_payload_address [4:2] New connections: \VexRiscv.dataCache_1__io_mem_cmd_payload_address [1:0] = 2'00 Optimizing cells in module \top. Performed a total of 65 changes. 4.33.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 1 cells. 4.33.6. Executing OPT_DFF pass (perform DFF optimizations). Adding SRST signal on $auto$opt_dff.cc:764:run$13730 ($dffe) from module top (D = $flatten\VexRiscv.$procmux$4989_Y [2], Q = \VexRiscv.CsrPlugin_exceptionPortCtrl_exceptionContext_code [2], rval = 1'1). Handling const CLK on $memory\mem_2[0]$15793 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[0]$15793 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[0]$15793 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[0]$15793 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[0]$15793 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[0]$15793 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[0]$15793 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[0]$15793 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[0]$15793 ($dff) from module top. Handling const CLK on $memory\mem_2[1]$15795 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[1]$15795 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[1]$15795 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[1]$15795 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[1]$15795 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[1]$15795 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[1]$15795 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[1]$15795 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[1]$15795 ($dff) from module top. Handling const CLK on $memory\mem_2[2]$15797 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[2]$15797 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[2]$15797 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[2]$15797 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[2]$15797 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[2]$15797 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[2]$15797 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[2]$15797 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[2]$15797 ($dff) from module top. Handling const CLK on $memory\mem_2[3]$15799 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[3]$15799 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[3]$15799 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[3]$15799 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[3]$15799 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[3]$15799 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[3]$15799 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[3]$15799 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[3]$15799 ($dff) from module top. Handling const CLK on $memory\mem_2[4]$15801 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[4]$15801 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[4]$15801 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[4]$15801 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[4]$15801 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[4]$15801 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[4]$15801 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[4]$15801 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[4]$15801 ($dff) from module top. Handling const CLK on $memory\mem_2[5]$15803 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[5]$15803 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[5]$15803 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[5]$15803 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[5]$15803 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[5]$15803 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[5]$15803 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[5]$15803 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[5]$15803 ($dff) from module top. Handling const CLK on $memory\mem_2[6]$15805 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[6]$15805 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[6]$15805 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[6]$15805 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[6]$15805 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[6]$15805 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[6]$15805 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[6]$15805 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[6]$15805 ($dff) from module top. Handling const CLK on $memory\mem_2[7]$15807 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[7]$15807 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[7]$15807 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[7]$15807 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[7]$15807 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[7]$15807 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[7]$15807 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[7]$15807 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[7]$15807 ($dff) from module top. Handling const CLK on $memory\mem_2[8]$15809 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[8]$15809 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[8]$15809 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[8]$15809 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[8]$15809 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[8]$15809 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[8]$15809 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[8]$15809 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[8]$15809 ($dff) from module top. Handling const CLK on $memory\mem_2[9]$15811 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[9]$15811 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[9]$15811 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[9]$15811 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[9]$15811 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[9]$15811 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[9]$15811 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[9]$15811 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[9]$15811 ($dff) from module top. Handling const CLK on $memory\mem_2[10]$15813 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[10]$15813 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[10]$15813 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[10]$15813 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[10]$15813 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[10]$15813 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[10]$15813 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[10]$15813 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[10]$15813 ($dff) from module top. Handling const CLK on $memory\mem_2[11]$15815 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[11]$15815 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[11]$15815 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[11]$15815 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[11]$15815 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[11]$15815 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[11]$15815 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[11]$15815 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[11]$15815 ($dff) from module top. Handling const CLK on $memory\mem_2[12]$15817 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[12]$15817 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[12]$15817 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[12]$15817 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[12]$15817 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[12]$15817 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[12]$15817 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[12]$15817 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[12]$15817 ($dff) from module top. Handling const CLK on $memory\mem_2[13]$15819 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[13]$15819 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[13]$15819 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[13]$15819 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[13]$15819 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[13]$15819 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[13]$15819 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[13]$15819 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[13]$15819 ($dff) from module top. Handling const CLK on $memory\mem_2[14]$15821 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[14]$15821 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[14]$15821 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[14]$15821 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[14]$15821 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[14]$15821 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[14]$15821 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[14]$15821 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[14]$15821 ($dff) from module top. Handling const CLK on $memory\mem_2[15]$15823 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[15]$15823 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[15]$15823 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[15]$15823 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[15]$15823 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[15]$15823 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[15]$15823 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[15]$15823 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[15]$15823 ($dff) from module top. Handling const CLK on $memory\mem_2[16]$15825 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[16]$15825 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[16]$15825 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[16]$15825 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[16]$15825 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[16]$15825 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[16]$15825 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[16]$15825 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[16]$15825 ($dff) from module top. Handling const CLK on $memory\mem_2[17]$15827 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[17]$15827 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[17]$15827 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[17]$15827 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[17]$15827 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[17]$15827 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[17]$15827 ($dff) from module top. Setting constant 1-bit at position 6 on $memory\mem_2[17]$15827 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[17]$15827 ($dff) from module top. Handling const CLK on $memory\mem_2[18]$15829 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[18]$15829 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[18]$15829 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[18]$15829 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[18]$15829 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[18]$15829 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[18]$15829 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[18]$15829 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[18]$15829 ($dff) from module top. Handling const CLK on $memory\mem_2[19]$15831 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[19]$15831 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[19]$15831 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[19]$15831 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[19]$15831 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[19]$15831 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[19]$15831 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[19]$15831 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[19]$15831 ($dff) from module top. Handling const CLK on $memory\mem_2[20]$15833 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[20]$15833 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[20]$15833 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[20]$15833 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[20]$15833 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[20]$15833 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[20]$15833 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[20]$15833 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[20]$15833 ($dff) from module top. Handling const CLK on $memory\mem_2[21]$15835 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[21]$15835 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[21]$15835 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[21]$15835 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[21]$15835 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[21]$15835 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[21]$15835 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[21]$15835 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[21]$15835 ($dff) from module top. Handling const CLK on $memory\mem_2[22]$15837 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[22]$15837 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[22]$15837 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[22]$15837 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[22]$15837 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[22]$15837 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[22]$15837 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[22]$15837 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[22]$15837 ($dff) from module top. Handling const CLK on $memory\mem_2[23]$15839 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[23]$15839 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[23]$15839 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[23]$15839 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[23]$15839 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[23]$15839 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[23]$15839 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[23]$15839 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[23]$15839 ($dff) from module top. Handling const CLK on $memory\mem_2[24]$15841 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[24]$15841 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[24]$15841 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[24]$15841 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[24]$15841 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[24]$15841 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[24]$15841 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[24]$15841 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[24]$15841 ($dff) from module top. Handling const CLK on $memory\mem_2[25]$15843 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[25]$15843 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[25]$15843 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[25]$15843 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[25]$15843 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[25]$15843 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[25]$15843 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[25]$15843 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[25]$15843 ($dff) from module top. Handling const CLK on $memory\mem_2[26]$15845 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[26]$15845 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[26]$15845 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[26]$15845 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[26]$15845 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[26]$15845 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[26]$15845 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[26]$15845 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[26]$15845 ($dff) from module top. Handling const CLK on $memory\mem_2[27]$15847 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[27]$15847 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[27]$15847 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[27]$15847 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[27]$15847 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[27]$15847 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[27]$15847 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[27]$15847 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[27]$15847 ($dff) from module top. Handling const CLK on $memory\mem_2[28]$15849 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[28]$15849 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[28]$15849 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[28]$15849 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[28]$15849 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[28]$15849 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[28]$15849 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[28]$15849 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[28]$15849 ($dff) from module top. Handling const CLK on $memory\mem_2[29]$15851 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[29]$15851 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[29]$15851 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[29]$15851 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[29]$15851 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[29]$15851 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[29]$15851 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[29]$15851 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[29]$15851 ($dff) from module top. Handling const CLK on $memory\mem_2[30]$15853 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[30]$15853 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[30]$15853 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[30]$15853 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[30]$15853 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[30]$15853 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[30]$15853 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[30]$15853 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[30]$15853 ($dff) from module top. Handling const CLK on $memory\mem_2[31]$15855 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[31]$15855 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[31]$15855 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[31]$15855 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[31]$15855 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[31]$15855 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[31]$15855 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[31]$15855 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[31]$15855 ($dff) from module top. Handling const CLK on $memory\mem_2[32]$15857 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[32]$15857 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[32]$15857 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[32]$15857 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[32]$15857 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[32]$15857 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[32]$15857 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[32]$15857 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[32]$15857 ($dff) from module top. Handling const CLK on $memory\mem_2[33]$15859 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[33]$15859 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[33]$15859 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[33]$15859 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[33]$15859 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[33]$15859 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[33]$15859 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[33]$15859 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[33]$15859 ($dff) from module top. Handling const CLK on $memory\mem_2[34]$15861 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[34]$15861 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[34]$15861 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[34]$15861 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[34]$15861 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[34]$15861 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[34]$15861 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[34]$15861 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[34]$15861 ($dff) from module top. Handling const CLK on $memory\mem_2[35]$15863 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[35]$15863 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[35]$15863 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[35]$15863 ($dff) from module top. Setting constant 1-bit at position 3 on $memory\mem_2[35]$15863 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[35]$15863 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[35]$15863 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[35]$15863 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[35]$15863 ($dff) from module top. Handling const CLK on $memory\mem_2[36]$15865 ($dff) from module top (removing D path). Setting constant 1-bit at position 0 on $memory\mem_2[36]$15865 ($dff) from module top. Setting constant 1-bit at position 1 on $memory\mem_2[36]$15865 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[36]$15865 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[36]$15865 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[36]$15865 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[36]$15865 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[36]$15865 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[36]$15865 ($dff) from module top. Handling const CLK on $memory\mem_2[37]$15867 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[37]$15867 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[37]$15867 ($dff) from module top. Setting constant 1-bit at position 2 on $memory\mem_2[37]$15867 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[37]$15867 ($dff) from module top. Setting constant 1-bit at position 4 on $memory\mem_2[37]$15867 ($dff) from module top. Setting constant 1-bit at position 5 on $memory\mem_2[37]$15867 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[37]$15867 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[37]$15867 ($dff) from module top. Handling const CLK on $memory\mem_2[38]$15869 ($dff) from module top (removing D path). Setting constant 0-bit at position 0 on $memory\mem_2[38]$15869 ($dff) from module top. Setting constant 0-bit at position 1 on $memory\mem_2[38]$15869 ($dff) from module top. Setting constant 0-bit at position 2 on $memory\mem_2[38]$15869 ($dff) from module top. Setting constant 0-bit at position 3 on $memory\mem_2[38]$15869 ($dff) from module top. Setting constant 0-bit at position 4 on $memory\mem_2[38]$15869 ($dff) from module top. Setting constant 0-bit at position 5 on $memory\mem_2[38]$15869 ($dff) from module top. Setting constant 0-bit at position 6 on $memory\mem_2[38]$15869 ($dff) from module top. Setting constant 0-bit at position 7 on $memory\mem_2[38]$15869 ($dff) from module top. Removing always-active EN on mem_2$rdreg[0] ($dffe) from module top. 4.33.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 0 unused cells and 126 unused wires. 4.33.8. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.33.9. Rerunning OPT passes. (Maybe there is more to do..) 4.33.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.33.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7812: Old ports: A={ \VexRiscv._zz_360_ [1] 1'1 }, B={ \VexRiscv._zz_360_ [1] 1'0 }, Y=$auto$wreduce.cc:454:run$14087 [1:0] New ports: A=1'1, B=1'0, Y=$auto$wreduce.cc:454:run$14087 [0] New connections: $auto$wreduce.cc:454:run$14087 [1] = \VexRiscv._zz_360_ [1] Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][0]$15964: Old ports: A=8'01001100, B=8'01101001, Y=$memory\mem_2$rdmux[0][4][0]$a$15917 New ports: A=2'10, B=2'01, Y={ $memory\mem_2$rdmux[0][4][0]$a$15917 [2] $memory\mem_2$rdmux[0][4][0]$a$15917 [0] } New connections: { $memory\mem_2$rdmux[0][4][0]$a$15917 [7:3] $memory\mem_2$rdmux[0][4][0]$a$15917 [1] } = { 2'01 $memory\mem_2$rdmux[0][4][0]$a$15917 [0] 3'010 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][10]$15994: Old ports: A=8'00110000, B=8'00110010, Y=$memory\mem_2$rdmux[0][4][5]$a$15932 New ports: A=1'0, B=1'1, Y=$memory\mem_2$rdmux[0][4][5]$a$15932 [1] New connections: { $memory\mem_2$rdmux[0][4][5]$a$15932 [7:2] $memory\mem_2$rdmux[0][4][5]$a$15932 [0] } = 7'0011000 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][11]$15997: Old ports: A=8'00110000, B=8'00101101, Y=$memory\mem_2$rdmux[0][4][5]$b$15933 New ports: A=2'10, B=2'01, Y={ $memory\mem_2$rdmux[0][4][5]$b$15933 [4] $memory\mem_2$rdmux[0][4][5]$b$15933 [0] } New connections: { $memory\mem_2$rdmux[0][4][5]$b$15933 [7:5] $memory\mem_2$rdmux[0][4][5]$b$15933 [3:1] } = { 3'001 $memory\mem_2$rdmux[0][4][5]$b$15933 [0] $memory\mem_2$rdmux[0][4][5]$b$15933 [0] 1'0 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][13]$16003: Old ports: A=8'00101101, B=8'00110001, Y=$memory\mem_2$rdmux[0][4][6]$b$15936 New ports: A=2'01, B=2'10, Y={ $memory\mem_2$rdmux[0][4][6]$b$15936 [4] $memory\mem_2$rdmux[0][4][6]$b$15936 [2] } New connections: { $memory\mem_2$rdmux[0][4][6]$b$15936 [7:5] $memory\mem_2$rdmux[0][4][6]$b$15936 [3] $memory\mem_2$rdmux[0][4][6]$b$15936 [1:0] } = { 3'001 $memory\mem_2$rdmux[0][4][6]$b$15936 [2] 2'01 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][14]$16006: Old ports: A=8'00110001, B=8'00100000, Y=$memory\mem_2$rdmux[0][4][7]$a$15938 New ports: A=1'1, B=1'0, Y=$memory\mem_2$rdmux[0][4][7]$a$15938 [0] New connections: $memory\mem_2$rdmux[0][4][7]$a$15938 [7:1] = { 3'001 $memory\mem_2$rdmux[0][4][7]$a$15938 [0] 3'000 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][15]$16009: Old ports: A=8'00110000, B=8'00111001, Y=$memory\mem_2$rdmux[0][4][7]$b$15939 New ports: A=1'0, B=1'1, Y=$memory\mem_2$rdmux[0][4][7]$b$15939 [0] New connections: $memory\mem_2$rdmux[0][4][7]$b$15939 [7:1] = { 4'0011 $memory\mem_2$rdmux[0][4][7]$b$15939 [0] 2'00 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][16]$16012: Old ports: A=8'00111010, B=8'00110100, Y=$memory\mem_2$rdmux[0][4][8]$a$15941 New ports: A=2'01, B=2'10, Y=$memory\mem_2$rdmux[0][4][8]$a$15941 [2:1] New connections: { $memory\mem_2$rdmux[0][4][8]$a$15941 [7:3] $memory\mem_2$rdmux[0][4][8]$a$15941 [0] } = { 4'0011 $memory\mem_2$rdmux[0][4][8]$a$15941 [1] 1'0 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][17]$16015: Old ports: A=8'00110011, B=8'00111010, Y=$memory\mem_2$rdmux[0][4][8]$b$15942 New ports: A=2'01, B=2'10, Y={ $memory\mem_2$rdmux[0][4][8]$b$15942 [3] $memory\mem_2$rdmux[0][4][8]$b$15942 [0] } New connections: { $memory\mem_2$rdmux[0][4][8]$b$15942 [7:4] $memory\mem_2$rdmux[0][4][8]$b$15942 [2:1] } = 6'001101 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][18]$16018: Old ports: A=8'00110011, B=8'00110100, Y=$memory\mem_2$rdmux[0][4][9]$a$15944 New ports: A=2'01, B=2'10, Y={ $memory\mem_2$rdmux[0][4][9]$a$15944 [2] $memory\mem_2$rdmux[0][4][9]$a$15944 [0] } New connections: { $memory\mem_2$rdmux[0][4][9]$a$15944 [7:3] $memory\mem_2$rdmux[0][4][9]$a$15944 [1] } = { 5'00110 $memory\mem_2$rdmux[0][4][9]$a$15944 [0] } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][19]$16021: Old ports: A=8'00000000, B=8'xxxxxxxx, Y=$memory\mem_2$rdmux[0][4][9]$b$15945 New ports: A=1'0, B=1'x, Y=$memory\mem_2$rdmux[0][4][9]$b$15945 [0] New connections: $memory\mem_2$rdmux[0][4][9]$b$15945 [7:1] = { $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][1]$15967: Old ports: A=8'01110100, B=8'01100101, Y=$memory\mem_2$rdmux[0][4][0]$b$15918 New ports: A=2'10, B=2'01, Y={ $memory\mem_2$rdmux[0][4][0]$b$15918 [4] $memory\mem_2$rdmux[0][4][0]$b$15918 [0] } New connections: { $memory\mem_2$rdmux[0][4][0]$b$15918 [7:5] $memory\mem_2$rdmux[0][4][0]$b$15918 [3:1] } = 6'011010 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][2]$15970: Old ports: A=8'01011000, B=8'00100000, Y=$memory\mem_2$rdmux[0][4][1]$a$15920 New ports: A=2'01, B=2'10, Y={ $memory\mem_2$rdmux[0][4][1]$a$15920 [5] $memory\mem_2$rdmux[0][4][1]$a$15920 [3] } New connections: { $memory\mem_2$rdmux[0][4][1]$a$15920 [7:6] $memory\mem_2$rdmux[0][4][1]$a$15920 [4] $memory\mem_2$rdmux[0][4][1]$a$15920 [2:0] } = { 1'0 $memory\mem_2$rdmux[0][4][1]$a$15920 [3] $memory\mem_2$rdmux[0][4][1]$a$15920 [3] 3'000 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][3]$15973: Old ports: A=8'01010011, B=8'01101111, Y=$memory\mem_2$rdmux[0][4][1]$b$15921 New ports: A=2'10, B=2'01, Y={ $memory\mem_2$rdmux[0][4][1]$b$15921 [4] $memory\mem_2$rdmux[0][4][1]$b$15921 [2] } New connections: { $memory\mem_2$rdmux[0][4][1]$b$15921 [7:5] $memory\mem_2$rdmux[0][4][1]$b$15921 [3] $memory\mem_2$rdmux[0][4][1]$b$15921 [1:0] } = { 2'01 $memory\mem_2$rdmux[0][4][1]$b$15921 [2] $memory\mem_2$rdmux[0][4][1]$b$15921 [2] 2'11 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][4]$15976: Old ports: A=8'01000011, B=8'00100000, Y=$memory\mem_2$rdmux[0][4][2]$a$15923 New ports: A=2'01, B=2'10, Y={ $memory\mem_2$rdmux[0][4][2]$a$15923 [5] $memory\mem_2$rdmux[0][4][2]$a$15923 [0] } New connections: { $memory\mem_2$rdmux[0][4][2]$a$15923 [7:6] $memory\mem_2$rdmux[0][4][2]$a$15923 [4:1] } = { 1'0 $memory\mem_2$rdmux[0][4][2]$a$15923 [0] 3'000 $memory\mem_2$rdmux[0][4][2]$a$15923 [0] } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][5]$15979: Old ports: A=8'01101111, B=8'01101110, Y=$memory\mem_2$rdmux[0][4][2]$b$15924 New ports: A=1'1, B=1'0, Y=$memory\mem_2$rdmux[0][4][2]$b$15924 [0] New connections: $memory\mem_2$rdmux[0][4][2]$b$15924 [7:1] = 7'0110111 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][6]$15982: Old ports: A=8'00100000, B=8'01010101, Y=$memory\mem_2$rdmux[0][4][3]$a$15926 New ports: A=2'10, B=2'01, Y={ $memory\mem_2$rdmux[0][4][3]$a$15926 [5] $memory\mem_2$rdmux[0][4][3]$a$15926 [0] } New connections: { $memory\mem_2$rdmux[0][4][3]$a$15926 [7:6] $memory\mem_2$rdmux[0][4][3]$a$15926 [4:1] } = { 1'0 $memory\mem_2$rdmux[0][4][3]$a$15926 [0] $memory\mem_2$rdmux[0][4][3]$a$15926 [0] 1'0 $memory\mem_2$rdmux[0][4][3]$a$15926 [0] 1'0 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][7]$15985: Old ports: A=8'01001100, B=8'01011000, Y=$memory\mem_2$rdmux[0][4][3]$b$15927 New ports: A=2'01, B=2'10, Y={ $memory\mem_2$rdmux[0][4][3]$b$15927 [4] $memory\mem_2$rdmux[0][4][3]$b$15927 [2] } New connections: { $memory\mem_2$rdmux[0][4][3]$b$15927 [7:5] $memory\mem_2$rdmux[0][4][3]$b$15927 [3] $memory\mem_2$rdmux[0][4][3]$b$15927 [1:0] } = 6'010100 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][8]$15988: Old ports: A=8'00110011, B=8'01010011, Y=$memory\mem_2$rdmux[0][4][4]$a$15929 New ports: A=2'01, B=2'10, Y=$memory\mem_2$rdmux[0][4][4]$a$15929 [6:5] New connections: { $memory\mem_2$rdmux[0][4][4]$a$15929 [7] $memory\mem_2$rdmux[0][4][4]$a$15929 [4:0] } = 6'010011 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][5][9]$15991: Old ports: A=8'00100000, B=8'00110010, Y=$memory\mem_2$rdmux[0][4][4]$b$15930 New ports: A=1'0, B=1'1, Y=$memory\mem_2$rdmux[0][4][4]$b$15930 [1] New connections: { $memory\mem_2$rdmux[0][4][4]$b$15930 [7:2] $memory\mem_2$rdmux[0][4][4]$b$15930 [0] } = { 3'001 $memory\mem_2$rdmux[0][4][4]$b$15930 [1] 3'000 } Consolidated identical input bits for $mux cell $procmux$11540: Old ports: A=2'00, B=\main_sdram_slave_p0_wrdata_mask, Y=\main_dfi_p0_wrdata_mask New ports: A=1'0, B=$auto$opt_expr.cc:205:group_cell_inputs$16061, Y=\main_dfi_p0_wrdata_mask [0] New connections: \main_dfi_p0_wrdata_mask [1] = \main_dfi_p0_wrdata_mask [0] Optimizing cells in module \top. Consolidated identical input bits for $mux cell $flatten\VexRiscv.$procmux$7806: Old ports: A={ 1'0 $auto$wreduce.cc:454:run$14087 [1:0] }, B={ 1'1 \VexRiscv._zz_360_ [1] 1'1 }, Y={ \VexRiscv.DBusCachedPlugin_exceptionBus_payload_code [3] \VexRiscv.DBusCachedPlugin_exceptionBus_payload_code [1:0] } New ports: A={ 1'0 $auto$wreduce.cc:454:run$14087 [0] }, B=2'11, Y={ \VexRiscv.DBusCachedPlugin_exceptionBus_payload_code [3] \VexRiscv.DBusCachedPlugin_exceptionBus_payload_code [0] } New connections: \VexRiscv.DBusCachedPlugin_exceptionBus_payload_code [1] = \VexRiscv._zz_360_ [1] Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][0]$15916: Old ports: A=$memory\mem_2$rdmux[0][4][0]$a$15917, B=$memory\mem_2$rdmux[0][4][0]$b$15918, Y=$memory\mem_2$rdmux[0][3][0]$a$15893 New ports: A={ $memory\mem_2$rdmux[0][4][0]$a$15917 [0] 2'01 $memory\mem_2$rdmux[0][4][0]$a$15917 [2] $memory\mem_2$rdmux[0][4][0]$a$15917 [0] }, B={ 1'1 $memory\mem_2$rdmux[0][4][0]$b$15918 [4] 2'01 $memory\mem_2$rdmux[0][4][0]$b$15918 [0] }, Y={ $memory\mem_2$rdmux[0][3][0]$a$15893 [5:2] $memory\mem_2$rdmux[0][3][0]$a$15893 [0] } New connections: { $memory\mem_2$rdmux[0][3][0]$a$15893 [7:6] $memory\mem_2$rdmux[0][3][0]$a$15893 [1] } = 3'010 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][1]$15919: Old ports: A=$memory\mem_2$rdmux[0][4][1]$a$15920, B=$memory\mem_2$rdmux[0][4][1]$b$15921, Y=$memory\mem_2$rdmux[0][3][0]$b$15894 New ports: A={ $memory\mem_2$rdmux[0][4][1]$a$15920 [3] $memory\mem_2$rdmux[0][4][1]$a$15920 [5] $memory\mem_2$rdmux[0][4][1]$a$15920 [3] $memory\mem_2$rdmux[0][4][1]$a$15920 [3] 2'00 }, B={ 1'1 $memory\mem_2$rdmux[0][4][1]$b$15921 [2] $memory\mem_2$rdmux[0][4][1]$b$15921 [4] $memory\mem_2$rdmux[0][4][1]$b$15921 [2] $memory\mem_2$rdmux[0][4][1]$b$15921 [2] 1'1 }, Y={ $memory\mem_2$rdmux[0][3][0]$b$15894 [6:2] $memory\mem_2$rdmux[0][3][0]$b$15894 [0] } New connections: { $memory\mem_2$rdmux[0][3][0]$b$15894 [7] $memory\mem_2$rdmux[0][3][0]$b$15894 [1] } = { 1'0 $memory\mem_2$rdmux[0][3][0]$b$15894 [0] } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][2]$15922: Old ports: A=$memory\mem_2$rdmux[0][4][2]$a$15923, B=$memory\mem_2$rdmux[0][4][2]$b$15924, Y=$memory\mem_2$rdmux[0][3][1]$a$15896 New ports: A={ $memory\mem_2$rdmux[0][4][2]$a$15923 [5] 1'0 $memory\mem_2$rdmux[0][4][2]$a$15923 [0] $memory\mem_2$rdmux[0][4][2]$a$15923 [0] }, B={ 3'111 $memory\mem_2$rdmux[0][4][2]$b$15924 [0] }, Y={ $memory\mem_2$rdmux[0][3][1]$a$15896 [5] $memory\mem_2$rdmux[0][3][1]$a$15896 [2:0] } New connections: { $memory\mem_2$rdmux[0][3][1]$a$15896 [7:6] $memory\mem_2$rdmux[0][3][1]$a$15896 [4:3] } = { 1'0 $memory\mem_2$rdmux[0][3][1]$a$15896 [1] 1'0 $memory\mem_2$rdmux[0][3][1]$a$15896 [2] } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][3]$15925: Old ports: A=$memory\mem_2$rdmux[0][4][3]$a$15926, B=$memory\mem_2$rdmux[0][4][3]$b$15927, Y=$memory\mem_2$rdmux[0][3][1]$b$15897 New ports: A={ $memory\mem_2$rdmux[0][4][3]$a$15926 [0] $memory\mem_2$rdmux[0][4][3]$a$15926 [5] $memory\mem_2$rdmux[0][4][3]$a$15926 [0] 1'0 $memory\mem_2$rdmux[0][4][3]$a$15926 [0] $memory\mem_2$rdmux[0][4][3]$a$15926 [0] }, B={ 2'10 $memory\mem_2$rdmux[0][4][3]$b$15927 [4] 1'1 $memory\mem_2$rdmux[0][4][3]$b$15927 [2] 1'0 }, Y={ $memory\mem_2$rdmux[0][3][1]$b$15897 [6:2] $memory\mem_2$rdmux[0][3][1]$b$15897 [0] } New connections: { $memory\mem_2$rdmux[0][3][1]$b$15897 [7] $memory\mem_2$rdmux[0][3][1]$b$15897 [1] } = 2'00 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][4]$15928: Old ports: A=$memory\mem_2$rdmux[0][4][4]$a$15929, B=$memory\mem_2$rdmux[0][4][4]$b$15930, Y=$memory\mem_2$rdmux[0][3][2]$a$15899 New ports: A={ $memory\mem_2$rdmux[0][4][4]$a$15929 [6:5] 2'11 }, B={ 2'01 $memory\mem_2$rdmux[0][4][4]$b$15930 [1] 1'0 }, Y={ $memory\mem_2$rdmux[0][3][2]$a$15899 [6:5] $memory\mem_2$rdmux[0][3][2]$a$15899 [1:0] } New connections: { $memory\mem_2$rdmux[0][3][2]$a$15899 [7] $memory\mem_2$rdmux[0][3][2]$a$15899 [4:2] } = { 1'0 $memory\mem_2$rdmux[0][3][2]$a$15899 [1] 2'00 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][5]$15931: Old ports: A=$memory\mem_2$rdmux[0][4][5]$a$15932, B=$memory\mem_2$rdmux[0][4][5]$b$15933, Y=$memory\mem_2$rdmux[0][3][2]$b$15900 New ports: A={ 1'1 $memory\mem_2$rdmux[0][4][5]$a$15932 [1] 1'0 }, B={ $memory\mem_2$rdmux[0][4][5]$b$15933 [4] 1'0 $memory\mem_2$rdmux[0][4][5]$b$15933 [0] }, Y={ $memory\mem_2$rdmux[0][3][2]$b$15900 [4] $memory\mem_2$rdmux[0][3][2]$b$15900 [1:0] } New connections: { $memory\mem_2$rdmux[0][3][2]$b$15900 [7:5] $memory\mem_2$rdmux[0][3][2]$b$15900 [3:2] } = { 3'001 $memory\mem_2$rdmux[0][3][2]$b$15900 [0] $memory\mem_2$rdmux[0][3][2]$b$15900 [0] } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][6]$15934: Old ports: A=$memory\mem_2$rdmux[0][4][6]$a$15935, B=$memory\mem_2$rdmux[0][4][6]$b$15936, Y=$memory\mem_2$rdmux[0][3][3]$a$15902 New ports: A=2'10, B={ $memory\mem_2$rdmux[0][4][6]$b$15936 [4] $memory\mem_2$rdmux[0][4][6]$b$15936 [2] }, Y={ $memory\mem_2$rdmux[0][3][3]$a$15902 [4] $memory\mem_2$rdmux[0][3][3]$a$15902 [2] } New connections: { $memory\mem_2$rdmux[0][3][3]$a$15902 [7:5] $memory\mem_2$rdmux[0][3][3]$a$15902 [3] $memory\mem_2$rdmux[0][3][3]$a$15902 [1:0] } = { 3'001 $memory\mem_2$rdmux[0][3][3]$a$15902 [2] 2'01 } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][7]$15937: Old ports: A=$memory\mem_2$rdmux[0][4][7]$a$15938, B=$memory\mem_2$rdmux[0][4][7]$b$15939, Y=$memory\mem_2$rdmux[0][3][3]$b$15903 New ports: A={ $memory\mem_2$rdmux[0][4][7]$a$15938 [0] 1'0 $memory\mem_2$rdmux[0][4][7]$a$15938 [0] }, B={ 1'1 $memory\mem_2$rdmux[0][4][7]$b$15939 [0] $memory\mem_2$rdmux[0][4][7]$b$15939 [0] }, Y={ $memory\mem_2$rdmux[0][3][3]$b$15903 [4:3] $memory\mem_2$rdmux[0][3][3]$b$15903 [0] } New connections: { $memory\mem_2$rdmux[0][3][3]$b$15903 [7:5] $memory\mem_2$rdmux[0][3][3]$b$15903 [2:1] } = 5'00100 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][8]$15940: Old ports: A=$memory\mem_2$rdmux[0][4][8]$a$15941, B=$memory\mem_2$rdmux[0][4][8]$b$15942, Y=$memory\mem_2$rdmux[0][3][4]$a$15905 New ports: A={ $memory\mem_2$rdmux[0][4][8]$a$15941 [1] $memory\mem_2$rdmux[0][4][8]$a$15941 [2:1] 1'0 }, B={ $memory\mem_2$rdmux[0][4][8]$b$15942 [3] 2'01 $memory\mem_2$rdmux[0][4][8]$b$15942 [0] }, Y=$memory\mem_2$rdmux[0][3][4]$a$15905 [3:0] New connections: $memory\mem_2$rdmux[0][3][4]$a$15905 [7:4] = 4'0011 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][9]$15943: Old ports: A=$memory\mem_2$rdmux[0][4][9]$a$15944, B=$memory\mem_2$rdmux[0][4][9]$b$15945, Y=$memory\mem_2$rdmux[0][3][4]$b$15906 New ports: A={ 2'10 $memory\mem_2$rdmux[0][4][9]$a$15944 [2] $memory\mem_2$rdmux[0][4][9]$a$15944 [0] }, B={ $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] $memory\mem_2$rdmux[0][4][9]$b$15945 [0] }, Y={ $memory\mem_2$rdmux[0][3][4]$b$15906 [4:2] $memory\mem_2$rdmux[0][3][4]$b$15906 [0] } New connections: { $memory\mem_2$rdmux[0][3][4]$b$15906 [7:5] $memory\mem_2$rdmux[0][3][4]$b$15906 [1] } = { $memory\mem_2$rdmux[0][3][4]$b$15906 [3] $memory\mem_2$rdmux[0][3][4]$b$15906 [3] $memory\mem_2$rdmux[0][3][4]$b$15906 [4] $memory\mem_2$rdmux[0][3][4]$b$15906 [0] } Optimizing cells in module \top. Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][3][0]$15892: Old ports: A=$memory\mem_2$rdmux[0][3][0]$a$15893, B=$memory\mem_2$rdmux[0][3][0]$b$15894, Y=$memory\mem_2$rdmux[0][2][0]$a$15881 New ports: A={ 1'1 $memory\mem_2$rdmux[0][3][0]$a$15893 [5:2] 1'0 $memory\mem_2$rdmux[0][3][0]$a$15893 [0] }, B={ $memory\mem_2$rdmux[0][3][0]$b$15894 [6:2] $memory\mem_2$rdmux[0][3][0]$b$15894 [0] $memory\mem_2$rdmux[0][3][0]$b$15894 [0] }, Y=$memory\mem_2$rdmux[0][2][0]$a$15881 [6:0] New connections: $memory\mem_2$rdmux[0][2][0]$a$15881 [7] = 1'0 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][3][1]$15895: Old ports: A=$memory\mem_2$rdmux[0][3][1]$a$15896, B=$memory\mem_2$rdmux[0][3][1]$b$15897, Y=$memory\mem_2$rdmux[0][2][0]$b$15882 New ports: A={ $memory\mem_2$rdmux[0][3][1]$a$15896 [1] $memory\mem_2$rdmux[0][3][1]$a$15896 [5] 1'0 $memory\mem_2$rdmux[0][3][1]$a$15896 [2] $memory\mem_2$rdmux[0][3][1]$a$15896 [2:0] }, B={ $memory\mem_2$rdmux[0][3][1]$b$15897 [6:2] 1'0 $memory\mem_2$rdmux[0][3][1]$b$15897 [0] }, Y=$memory\mem_2$rdmux[0][2][0]$b$15882 [6:0] New connections: $memory\mem_2$rdmux[0][2][0]$b$15882 [7] = 1'0 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][3][2]$15898: Old ports: A=$memory\mem_2$rdmux[0][3][2]$a$15899, B=$memory\mem_2$rdmux[0][3][2]$b$15900, Y=$memory\mem_2$rdmux[0][2][1]$a$15884 New ports: A={ $memory\mem_2$rdmux[0][3][2]$a$15899 [6:5] $memory\mem_2$rdmux[0][3][2]$a$15899 [1] 1'0 $memory\mem_2$rdmux[0][3][2]$a$15899 [1:0] }, B={ 2'01 $memory\mem_2$rdmux[0][3][2]$b$15900 [4] $memory\mem_2$rdmux[0][3][2]$b$15900 [0] $memory\mem_2$rdmux[0][3][2]$b$15900 [1:0] }, Y={ $memory\mem_2$rdmux[0][2][1]$a$15884 [6:4] $memory\mem_2$rdmux[0][2][1]$a$15884 [2:0] } New connections: { $memory\mem_2$rdmux[0][2][1]$a$15884 [7] $memory\mem_2$rdmux[0][2][1]$a$15884 [3] } = { 1'0 $memory\mem_2$rdmux[0][2][1]$a$15884 [2] } Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][3][3]$15901: Old ports: A=$memory\mem_2$rdmux[0][3][3]$a$15902, B=$memory\mem_2$rdmux[0][3][3]$b$15903, Y=$memory\mem_2$rdmux[0][2][1]$b$15885 New ports: A={ $memory\mem_2$rdmux[0][3][3]$a$15902 [4] $memory\mem_2$rdmux[0][3][3]$a$15902 [2] $memory\mem_2$rdmux[0][3][3]$a$15902 [2] 1'1 }, B={ $memory\mem_2$rdmux[0][3][3]$b$15903 [4:3] 1'0 $memory\mem_2$rdmux[0][3][3]$b$15903 [0] }, Y={ $memory\mem_2$rdmux[0][2][1]$b$15885 [4:2] $memory\mem_2$rdmux[0][2][1]$b$15885 [0] } New connections: { $memory\mem_2$rdmux[0][2][1]$b$15885 [7:5] $memory\mem_2$rdmux[0][2][1]$b$15885 [1] } = 4'0010 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][3][4]$15904: Old ports: A=$memory\mem_2$rdmux[0][3][4]$a$15905, B=$memory\mem_2$rdmux[0][3][4]$b$15906, Y=$memory\mem_2$rdmux[0][2][2]$a$15887 New ports: A={ 2'01 $memory\mem_2$rdmux[0][3][4]$a$15905 [3:0] }, B={ $memory\mem_2$rdmux[0][3][4]$b$15906 [3] $memory\mem_2$rdmux[0][3][4]$b$15906 [4:2] $memory\mem_2$rdmux[0][3][4]$b$15906 [0] $memory\mem_2$rdmux[0][3][4]$b$15906 [0] }, Y={ $memory\mem_2$rdmux[0][2][2]$a$15887 [6] $memory\mem_2$rdmux[0][2][2]$a$15887 [4:0] } New connections: { $memory\mem_2$rdmux[0][2][2]$a$15887 [7] $memory\mem_2$rdmux[0][2][2]$a$15887 [5] } = { $memory\mem_2$rdmux[0][2][2]$a$15887 [6] $memory\mem_2$rdmux[0][2][2]$a$15887 [4] } Optimizing cells in module \top. Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][2][0]$15880: Old ports: A=$memory\mem_2$rdmux[0][2][0]$a$15881, B=$memory\mem_2$rdmux[0][2][0]$b$15882, Y=$memory\mem_2$rdmux[0][1][0]$a$15875 New ports: A=$memory\mem_2$rdmux[0][2][0]$a$15881 [6:0], B=$memory\mem_2$rdmux[0][2][0]$b$15882 [6:0], Y=$memory\mem_2$rdmux[0][1][0]$a$15875 [6:0] New connections: $memory\mem_2$rdmux[0][1][0]$a$15875 [7] = 1'0 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][2][1]$15883: Old ports: A=$memory\mem_2$rdmux[0][2][1]$a$15884, B=$memory\mem_2$rdmux[0][2][1]$b$15885, Y=$memory\mem_2$rdmux[0][1][0]$b$15876 New ports: A={ $memory\mem_2$rdmux[0][2][1]$a$15884 [6:4] $memory\mem_2$rdmux[0][2][1]$a$15884 [2] $memory\mem_2$rdmux[0][2][1]$a$15884 [2:0] }, B={ 2'01 $memory\mem_2$rdmux[0][2][1]$b$15885 [4:2] 1'0 $memory\mem_2$rdmux[0][2][1]$b$15885 [0] }, Y=$memory\mem_2$rdmux[0][1][0]$b$15876 [6:0] New connections: $memory\mem_2$rdmux[0][1][0]$b$15876 [7] = 1'0 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][2][2]$15886: Old ports: A=$memory\mem_2$rdmux[0][2][2]$a$15887, B=8'xxxxxxxx, Y=$memory\mem_2$rdmux[0][1][1]$a$15878 New ports: A={ $memory\mem_2$rdmux[0][2][2]$a$15887 [6] $memory\mem_2$rdmux[0][2][2]$a$15887 [4:0] }, B=6'xxxxxx, Y={ $memory\mem_2$rdmux[0][1][1]$a$15878 [6] $memory\mem_2$rdmux[0][1][1]$a$15878 [4:0] } New connections: { $memory\mem_2$rdmux[0][1][1]$a$15878 [7] $memory\mem_2$rdmux[0][1][1]$a$15878 [5] } = { $memory\mem_2$rdmux[0][1][1]$a$15878 [6] $memory\mem_2$rdmux[0][1][1]$a$15878 [4] } Optimizing cells in module \top. Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][1][0]$15874: Old ports: A=$memory\mem_2$rdmux[0][1][0]$a$15875, B=$memory\mem_2$rdmux[0][1][0]$b$15876, Y=$memory\mem_2$rdmux[0][0][0]$a$15872 New ports: A=$memory\mem_2$rdmux[0][1][0]$a$15875 [6:0], B=$memory\mem_2$rdmux[0][1][0]$b$15876 [6:0], Y=$memory\mem_2$rdmux[0][0][0]$a$15872 [6:0] New connections: $memory\mem_2$rdmux[0][0][0]$a$15872 [7] = 1'0 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][1][1]$15877: Old ports: A=$memory\mem_2$rdmux[0][1][1]$a$15878, B=8'xxxxxxxx, Y=$memory\mem_2$rdmux[0][0][0]$b$15873 New ports: A={ $memory\mem_2$rdmux[0][1][1]$a$15878 [6] $memory\mem_2$rdmux[0][1][1]$a$15878 [4:0] }, B=6'xxxxxx, Y={ $memory\mem_2$rdmux[0][0][0]$b$15873 [6] $memory\mem_2$rdmux[0][0][0]$b$15873 [4:0] } New connections: { $memory\mem_2$rdmux[0][0][0]$b$15873 [7] $memory\mem_2$rdmux[0][0][0]$b$15873 [5] } = { $memory\mem_2$rdmux[0][0][0]$b$15873 [6] $memory\mem_2$rdmux[0][0][0]$b$15873 [4] } Optimizing cells in module \top. Performed a total of 42 changes. 4.33.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 15 cells. 4.33.13. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$14069 ($dffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$14069 ($dffe) from module top. Adding SRST signal on $auto$opt_dff.cc:764:run$14064 ($dffe) from module top (D = \VexRiscv._zz_134_ [1:0], Q = \VexRiscv._zz_141_ [1:0], rval = 2'00). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13371 ($dffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$13371 ($dffe) from module top. Setting constant 0-bit at position 0 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 2 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 3 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 4 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 5 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 6 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 7 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 8 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. Setting constant 0-bit at position 9 on $auto$opt_dff.cc:702:run$13056 ($sdff) from module top. 4.33.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 1 unused cells and 17 unused wires. 4.33.15. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.33.16. Rerunning OPT passes. (Maybe there is more to do..) 4.33.17. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.33.18. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Consolidated identical input bits for $mux cell $flatten\VexRiscv.$ternary$/home/pi/oss/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v:4953$2952: Old ports: A={ \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [31:5] \VexRiscv.dataCache_1__io_mem_cmd_payload_address [4:2] 2'00 }, B={ \VexRiscv._zz_134_ [31:2] 2'00 }, Y=\VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_payload_address New ports: A={ \VexRiscv.dataCache_1_.stageB_mmuRsp_physicalAddress [31:5] \VexRiscv.dataCache_1__io_mem_cmd_payload_address [4:2] }, B=\VexRiscv._zz_134_ [31:2], Y=\VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_payload_address [31:2] New connections: \VexRiscv.dataCache_1__io_mem_cmd_s2mPipe_payload_address [1:0] = 2'00 Consolidated identical input bits for $mux cell $memory\mem_2$rdmux[0][4][0]$15916: Old ports: A={ $memory\mem_2$rdmux[0][4][0]$a$15917 [5] 2'01 $memory\mem_2$rdmux[0][4][0]$a$15917 [2] $memory\mem_2$rdmux[0][4][0]$a$15917 [5] }, B={ 1'1 $memory\mem_2$rdmux[0][4][0]$a$15917 [2] 2'01 $memory\mem_2$rdmux[0][4][0]$a$15917 [5] }, Y={ $memory\mem_2$rdmux[0][3][0]$a$15893 [5:2] $memory\mem_2$rdmux[0][3][0]$a$15893 [0] } New ports: A={ $memory\mem_2$rdmux[0][4][0]$a$15917 [5] 2'01 $memory\mem_2$rdmux[0][4][0]$a$15917 [2] }, B={ 1'1 $memory\mem_2$rdmux[0][4][0]$a$15917 [2] 2'01 }, Y=$memory\mem_2$rdmux[0][3][0]$a$15893 [5:2] New connections: $memory\mem_2$rdmux[0][3][0]$a$15893 [0] = $memory\mem_2$rdmux[0][4][0]$a$15917 [5] Optimizing cells in module \top. Performed a total of 2 changes. 4.33.19. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.33.20. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 0 on $auto$opt_dff.cc:764:run$13375 ($dffe) from module top. Setting constant 0-bit at position 1 on $auto$opt_dff.cc:764:run$13375 ($dffe) from module top. 4.33.21. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.33.22. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.33.23. Rerunning OPT passes. (Maybe there is more to do..) 4.33.24. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \top.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.33.25. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \top. Performed a total of 0 changes. 4.33.26. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 0 cells. 4.33.27. Executing OPT_DFF pass (perform DFF optimizations). 4.33.28. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.33.29. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.33.30. Finished OPT passes. (There is nothing left to do.) 4.34. Executing TECHMAP pass (map to technology primitives). 4.34.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/techmap.v Parsing Verilog input from `/usr/local/bin/../share/yosys/techmap.v' to AST representation. Generating RTLIL representation for module `\_90_simplemap_bool_ops'. Generating RTLIL representation for module `\_90_simplemap_reduce_ops'. Generating RTLIL representation for module `\_90_simplemap_logic_ops'. Generating RTLIL representation for module `\_90_simplemap_compare_ops'. Generating RTLIL representation for module `\_90_simplemap_various'. Generating RTLIL representation for module `\_90_simplemap_registers'. Generating RTLIL representation for module `\_90_shift_ops_shr_shl_sshl_sshr'. Generating RTLIL representation for module `\_90_shift_shiftx'. Generating RTLIL representation for module `\_90_fa'. Generating RTLIL representation for module `\_90_lcu'. Generating RTLIL representation for module `\_90_alu'. Generating RTLIL representation for module `\_90_macc'. Generating RTLIL representation for module `\_90_alumacc'. Generating RTLIL representation for module `\$__div_mod_u'. Generating RTLIL representation for module `\$__div_mod_trunc'. Generating RTLIL representation for module `\_90_div'. Generating RTLIL representation for module `\_90_mod'. Generating RTLIL representation for module `\$__div_mod_floor'. Generating RTLIL representation for module `\_90_divfloor'. Generating RTLIL representation for module `\_90_modfloor'. Generating RTLIL representation for module `\_90_pow'. Generating RTLIL representation for module `\_90_pmux'. Generating RTLIL representation for module `\_90_lut'. Successfully finished Verilog frontend. 4.34.2. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/arith_map.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/arith_map.v' to AST representation. Generating RTLIL representation for module `\_80_ecp5_alu'. Successfully finished Verilog frontend. 4.34.3. Continuing TECHMAP pass. Using extmapper simplemap for cells of type $mux. Using extmapper simplemap for cells of type $reduce_bool. Using extmapper simplemap for cells of type $reduce_or. Using extmapper simplemap for cells of type $sdff. Using extmapper simplemap for cells of type $reduce_and. Using extmapper simplemap for cells of type $sdffe. Using extmapper simplemap for cells of type $dff. Using extmapper simplemap for cells of type $eq. Using template $paramod\_90_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=2\B_WIDTH=2\Y_WIDTH=2 for cells of type $alu. Using extmapper simplemap for cells of type $and. Using extmapper simplemap for cells of type $ne. Using extmapper simplemap for cells of type $not. Using extmapper simplemap for cells of type $or. Using extmapper simplemap for cells of type $logic_not. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=5\B_WIDTH=1\Y_WIDTH=5 for cells of type $alu. Using template $paramod\_90_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=3\Y_WIDTH=3 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=16\B_WIDTH=1\Y_WIDTH=16 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=8\B_WIDTH=1\Y_WIDTH=8 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=32\Y_WIDTH=32 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=64\Y_WIDTH=64 for cells of type $alu. Using template $paramod\_90_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=4\Y_WIDTH=4 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=32\B_WIDTH=32\Y_WIDTH=33 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=5\Y_WIDTH=5 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=32\B_WIDTH=1\Y_WIDTH=32 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=9\B_WIDTH=1\Y_WIDTH=9 for cells of type $alu. Using extmapper simplemap for cells of type $sdffce. Using template $paramod\_90_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=1\Y_WIDTH=1 for cells of type $alu. Using template $paramod\_90_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=4\B_WIDTH=1\Y_WIDTH=4 for cells of type $alu. Using template $paramod\_90_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=2\B_WIDTH=1\Y_WIDTH=2 for cells of type $alu. Using template $paramod\_90_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=3\B_WIDTH=1\Y_WIDTH=3 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=16\Y_WIDTH=16 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=15\B_WIDTH=1\Y_WIDTH=16 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=20\B_WIDTH=1\Y_WIDTH=20 for cells of type $alu. Using template $paramod\_90_pmux\WIDTH=8\S_WIDTH=3 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=8\S_WIDTH=7 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=8\S_WIDTH=17 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=8\S_WIDTH=9 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=8\S_WIDTH=16 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=2 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=2\S_WIDTH=3 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=7 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=13\S_WIDTH=3 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=13\S_WIDTH=2 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=3 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=2\S_WIDTH=2 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=16\S_WIDTH=7 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=32\S_WIDTH=3 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=3\S_WIDTH=4 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=3\S_WIDTH=2 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=9\S_WIDTH=4 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=5\S_WIDTH=4 for cells of type $pmux. Using extmapper simplemap for cells of type $dffe. Using extmapper maccmap for cells of type $macc. add \VexRiscv.dataCache_1_.stageB_request_data (32 bits, signed) add { 1'0 \VexRiscv.dataCache_1_.stageB_request_amoCtrl_alu [2] } (2 bits, signed) add \VexRiscv.dataCache_1_._zz_28_ (32 bits, signed) packed 1 (1) bits / 1 words into adder tree Using extmapper simplemap for cells of type $logic_and. Using extmapper simplemap for cells of type $logic_or. add { 1'0 \VexRiscv.execute_to_memory_MUL_LL } (33 bits, signed) add { \VexRiscv.execute_to_memory_MUL_HL 16'0000000000000000 } (50 bits, signed) add { \VexRiscv.execute_to_memory_MUL_LH 16'0000000000000000 } (50 bits, signed) Using template $paramod$constmap:6e3026a439ed4a6e7983ca0e910890cc59b2f7b2$paramod$4953c9d565c18659745e06f13317fd2eea31522c\_90_shift_ops_shr_shl_sshl_sshr for cells of type $sshl. Using extmapper simplemap for cells of type $xor. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=7\Y_WIDTH=7 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=22\B_WIDTH=1\Y_WIDTH=22 for cells of type $alu. Using template $paramod\_90_pmux\WIDTH=32\S_WIDTH=4 for cells of type $pmux. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=64\B_WIDTH=64\Y_WIDTH=64 for cells of type $alu. Using extmapper simplemap for cells of type $lut. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=8\Y_WIDTH=8 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=30\B_WIDTH=30\Y_WIDTH=30 for cells of type $alu. Using template $paramod\_90_pmux\WIDTH=10\S_WIDTH=3 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=32\S_WIDTH=2 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=24\S_WIDTH=2 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=12 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=5\S_WIDTH=9 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=11 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=13 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=10 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=18 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=1\S_WIDTH=15 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=4\S_WIDTH=10 for cells of type $pmux. Using template $paramod\_90_pmux\WIDTH=6\S_WIDTH=10 for cells of type $pmux. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=6\Y_WIDTH=6 for cells of type $alu. add \VexRiscv._zz_401_ (32 bits, signed) add { 1'0 \VexRiscv.decode_to_execute_SRC_USE_SUB_LESS } (2 bits, signed) add \VexRiscv._zz_402_ (32 bits, signed) packed 1 (1) bits / 1 words into adder tree Using template $paramod\_80_ecp5_alu\A_SIGNED=1\B_SIGNED=1\A_WIDTH=20\B_WIDTH=32\Y_WIDTH=32 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=32\B_WIDTH=32\Y_WIDTH=32 for cells of type $alu. Using template $paramod\_90_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=2\Y_WIDTH=2 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=1\B_WIDTH=30\Y_WIDTH=30 for cells of type $alu. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=33\B_WIDTH=32\Y_WIDTH=33 for cells of type $alu. Using template $paramod$constmap:87f69c0bea22f84de4bcd0314b57cb19e61b5eb7$paramod$88abf4b792300efa328894e6936be740fdc22f6d\_90_shift_ops_shr_shl_sshl_sshr for cells of type $sshr. Using extmapper simplemap for cells of type $pos. Using template $paramod\_90_fa\WIDTH=52 for cells of type $fa. Using template $paramod\_80_ecp5_alu\A_SIGNED=0\B_SIGNED=0\A_WIDTH=52\B_WIDTH=52\Y_WIDTH=52 for cells of type $alu. Using template $paramod\_90_lcu\WIDTH=4 for cells of type $lcu. Using template $paramod\_90_lcu\WIDTH=2 for cells of type $lcu. Using template $paramod\_90_lcu\WIDTH=3 for cells of type $lcu. Using template $paramod\_90_lcu\WIDTH=1 for cells of type $lcu. No more expansions possible. 4.35. Executing OPT pass (performing simple optimizations). 4.35.1. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.35.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\top'. Removed a total of 1977 cells. 4.35.3. Executing OPT_DFF pass (perform DFF optimizations). 4.35.4. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 1946 unused cells and 9522 unused wires. 4.35.5. Finished fast OPT passes. 4.36. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. 4.37. Executing DFFLEGALIZE pass (convert FFs to types supported by the target). 4.38. Executing TECHMAP pass (map to technology primitives). 4.38.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/cells_map.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/cells_map.v' to AST representation. Generating RTLIL representation for module `\$_DFF_N_'. Generating RTLIL representation for module `\$_DFF_P_'. Generating RTLIL representation for module `\$_DFFE_NN_'. Generating RTLIL representation for module `\$_DFFE_PN_'. Generating RTLIL representation for module `\$_DFFE_NP_'. Generating RTLIL representation for module `\$_DFFE_PP_'. Generating RTLIL representation for module `\$_DFF_NP0_'. Generating RTLIL representation for module `\$_DFF_NP1_'. Generating RTLIL representation for module `\$_DFF_PP0_'. Generating RTLIL representation for module `\$_DFF_PP1_'. Generating RTLIL representation for module `\$_SDFF_NP0_'. Generating RTLIL representation for module `\$_SDFF_NP1_'. Generating RTLIL representation for module `\$_SDFF_PP0_'. Generating RTLIL representation for module `\$_SDFF_PP1_'. Generating RTLIL representation for module `\$_DFFE_NP0P_'. Generating RTLIL representation for module `\$_DFFE_NP1P_'. Generating RTLIL representation for module `\$_DFFE_PP0P_'. Generating RTLIL representation for module `\$_DFFE_PP1P_'. Generating RTLIL representation for module `\$_DFFE_NP0N_'. Generating RTLIL representation for module `\$_DFFE_NP1N_'. Generating RTLIL representation for module `\$_DFFE_PP0N_'. Generating RTLIL representation for module `\$_DFFE_PP1N_'. Generating RTLIL representation for module `\$_SDFFE_NP0P_'. Generating RTLIL representation for module `\$_SDFFE_NP1P_'. Generating RTLIL representation for module `\$_SDFFE_PP0P_'. Generating RTLIL representation for module `\$_SDFFE_PP1P_'. Generating RTLIL representation for module `\$_SDFFE_NP0N_'. Generating RTLIL representation for module `\$_SDFFE_NP1N_'. Generating RTLIL representation for module `\$_SDFFE_PP0N_'. Generating RTLIL representation for module `\$_SDFFE_PP1N_'. Generating RTLIL representation for module `\FD1P3AX'. Generating RTLIL representation for module `\FD1P3AY'. Generating RTLIL representation for module `\FD1P3BX'. Generating RTLIL representation for module `\FD1P3DX'. Generating RTLIL representation for module `\FD1P3IX'. Generating RTLIL representation for module `\FD1P3JX'. Generating RTLIL representation for module `\FD1S3AX'. Generating RTLIL representation for module `\FD1S3AY'. Generating RTLIL representation for module `\FD1S3BX'. Generating RTLIL representation for module `\FD1S3DX'. Generating RTLIL representation for module `\FD1S3IX'. Generating RTLIL representation for module `\FD1S3JX'. Generating RTLIL representation for module `\IFS1P3BX'. Generating RTLIL representation for module `\IFS1P3DX'. Generating RTLIL representation for module `\IFS1P3IX'. Generating RTLIL representation for module `\IFS1P3JX'. Generating RTLIL representation for module `\OFS1P3BX'. Generating RTLIL representation for module `\OFS1P3DX'. Generating RTLIL representation for module `\OFS1P3IX'. Generating RTLIL representation for module `\OFS1P3JX'. Generating RTLIL representation for module `\IB'. Generating RTLIL representation for module `\IBPU'. Generating RTLIL representation for module `\IBPD'. Generating RTLIL representation for module `\OB'. Generating RTLIL representation for module `\OBZ'. Generating RTLIL representation for module `\OBZPU'. Generating RTLIL representation for module `\OBZPD'. Generating RTLIL representation for module `\OBCO'. Generating RTLIL representation for module `\BB'. Generating RTLIL representation for module `\BBPU'. Generating RTLIL representation for module `\BBPD'. Generating RTLIL representation for module `\ILVDS'. Generating RTLIL representation for module `\OLVDS'. Successfully finished Verilog frontend. 4.38.2. Continuing TECHMAP pass. Using template FD1S3BX for cells of type FD1S3BX. Using template IFS1P3BX for cells of type IFS1P3BX. Using template OFS1P3BX for cells of type OFS1P3BX. Using template \$_SDFFE_PP0P_ for cells of type $_SDFFE_PP0P_. Using template $paramod\$_DFFE_PP_\_TECHMAP_WIREINIT_Q_=1'x for cells of type $_DFFE_PP_. Using template $paramod\$_DFFE_PN_\_TECHMAP_WIREINIT_Q_=1'0 for cells of type $_DFFE_PN_. Using template \$_SDFF_PP0_ for cells of type $_SDFF_PP0_. Using template $paramod\$_DFF_P_\_TECHMAP_WIREINIT_Q_=1'x for cells of type $_DFF_P_. Using template \$_SDFFE_PP1P_ for cells of type $_SDFFE_PP1P_. Using template \$_SDFFE_PP0N_ for cells of type $_SDFFE_PP0N_. Using template $paramod\$_DFFE_PP_\_TECHMAP_WIREINIT_Q_=1'0 for cells of type $_DFFE_PP_. Using template $paramod\$_DFF_P_\_TECHMAP_WIREINIT_Q_=1'0 for cells of type $_DFF_P_. Using template \$_SDFF_PP1_ for cells of type $_SDFF_PP1_. Using template $paramod\$_DFFE_PN_\_TECHMAP_WIREINIT_Q_=1'x for cells of type $_DFFE_PN_. Using template $paramod\$_DFF_P_\_TECHMAP_WIREINIT_Q_=1'1 for cells of type $_DFF_P_. No more expansions possible. 4.39. Executing OPT_EXPR pass (perform const folding). Optimizing module top. 4.40. Executing SIMPLEMAP pass (map simple cells to gate primitives). 4.41. Executing ECP5_GSR pass (implement FF init values). Handling GSR in top. 4.42. Executing ATTRMVCP pass (move or copy attributes). 4.43. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \top.. Removed 0 unused cells and 19976 unused wires. 4.44. Executing TECHMAP pass (map to technology primitives). 4.44.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/latches_map.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/latches_map.v' to AST representation. Generating RTLIL representation for module `\$_DLATCH_N_'. Generating RTLIL representation for module `\$_DLATCH_P_'. Successfully finished Verilog frontend. 4.44.2. Continuing TECHMAP pass. No more expansions possible. 4.45. Executing ABC pass (technology mapping using ABC). 4.45.1. Extracting gate netlist of module `\top' to `/input.blif'.. Extracted 13347 gates and 17599 wires to a netlist network with 4250 inputs and 2344 outputs. 4.45.1.1. Executing ABC. Running ABC command: /yosys-abc -s -f /abc.script 2>&1 ABC: ABC command line: "source /abc.script". ABC: ABC: + read_blif /input.blif ABC: + read_lut /lutdefs.txt ABC: + strash ABC: + ifraig ABC: + scorr ABC: Warning: The network is combinational (run "fraig" or "fraig_sweep"). ABC: + dc2 ABC: + dretime ABC: + strash ABC: + dch -f ABC: + if ABC: + mfs2 ABC: Currently "mfs" cannot process the network containing nodes with more than 6 fanins. ABC: + dress ABC: Total number of equiv classes = 3320. ABC: Participating nodes from both networks = 7366. ABC: Participating nodes from the first network = 3443. ( 63.88 % of nodes) ABC: Participating nodes from the second network = 3923. ( 72.78 % of nodes) ABC: Node pairs (any polarity) = 3443. ( 63.88 % of names can be moved) ABC: Node pairs (same polarity) = 2801. ( 51.97 % of names can be moved) ABC: Total runtime = 2.50 sec ABC: + write_blif /output.blif 4.45.1.2. Re-integrating ABC results. ABC RESULTS: $lut cells: 5387 ABC RESULTS: internal signals: 11005 ABC RESULTS: input signals: 4250 ABC RESULTS: output signals: 2344 Removing temp directory. Removed 0 unused cells and 10030 unused wires. 4.46. Executing TECHMAP pass (map to technology primitives). 4.46.1. Executing Verilog-2005 frontend: /usr/local/bin/../share/yosys/ecp5/cells_map.v Parsing Verilog input from `/usr/local/bin/../share/yosys/ecp5/cells_map.v' to AST representation. Generating RTLIL representation for module `\$_DFF_N_'. Generating RTLIL representation for module `\$_DFF_P_'. Generating RTLIL representation for module `\$_DFFE_NN_'. Generating RTLIL representation for module `\$_DFFE_PN_'. Generating RTLIL representation for module `\$_DFFE_NP_'. Generating RTLIL representation for module `\$_DFFE_PP_'. Generating RTLIL representation for module `\$_DFF_NP0_'. Generating RTLIL representation for module `\$_DFF_NP1_'. Generating RTLIL representation for module `\$_DFF_PP0_'. Generating RTLIL representation for module `\$_DFF_PP1_'. Generating RTLIL representation for module `\$_SDFF_NP0_'. Generating RTLIL representation for module `\$_SDFF_NP1_'. Generating RTLIL representation for module `\$_SDFF_PP0_'. Generating RTLIL representation for module `\$_SDFF_PP1_'. Generating RTLIL representation for module `\$_DFFE_NP0P_'. Generating RTLIL representation for module `\$_DFFE_NP1P_'. Generating RTLIL representation for module `\$_DFFE_PP0P_'. Generating RTLIL representation for module `\$_DFFE_PP1P_'. Generating RTLIL representation for module `\$_DFFE_NP0N_'. Generating RTLIL representation for module `\$_DFFE_NP1N_'. Generating RTLIL representation for module `\$_DFFE_PP0N_'. Generating RTLIL representation for module `\$_DFFE_PP1N_'. Generating RTLIL representation for module `\$_SDFFE_NP0P_'. Generating RTLIL representation for module `\$_SDFFE_NP1P_'. Generating RTLIL representation for module `\$_SDFFE_PP0P_'. Generating RTLIL representation for module `\$_SDFFE_PP1P_'. Generating RTLIL representation for module `\$_SDFFE_NP0N_'. Generating RTLIL representation for module `\$_SDFFE_NP1N_'. Generating RTLIL representation for module `\$_SDFFE_PP0N_'. Generating RTLIL representation for module `\$_SDFFE_PP1N_'. Generating RTLIL representation for module `\FD1P3AX'. Generating RTLIL representation for module `\FD1P3AY'. Generating RTLIL representation for module `\FD1P3BX'. Generating RTLIL representation for module `\FD1P3DX'. Generating RTLIL representation for module `\FD1P3IX'. Generating RTLIL representation for module `\FD1P3JX'. Generating RTLIL representation for module `\FD1S3AX'. Generating RTLIL representation for module `\FD1S3AY'. Generating RTLIL representation for module `\FD1S3BX'. Generating RTLIL representation for module `\FD1S3DX'. Generating RTLIL representation for module `\FD1S3IX'. Generating RTLIL representation for module `\FD1S3JX'. Generating RTLIL representation for module `\IFS1P3BX'. Generating RTLIL representation for module `\IFS1P3DX'. Generating RTLIL representation for module `\IFS1P3IX'. Generating RTLIL representation for module `\IFS1P3JX'. Generating RTLIL representation for module `\OFS1P3BX'. Generating RTLIL representation for module `\OFS1P3DX'. Generating RTLIL representation for module `\OFS1P3IX'. Generating RTLIL representation for module `\OFS1P3JX'. Generating RTLIL representation for module `\IB'. Generating RTLIL representation for module `\IBPU'. Generating RTLIL representation for module `\IBPD'. Generating RTLIL representation for module `\OB'. Generating RTLIL representation for module `\OBZ'. Generating RTLIL representation for module `\OBZPU'. Generating RTLIL representation for module `\OBZPD'. Generating RTLIL representation for module `\OBCO'. Generating RTLIL representation for module `\BB'. Generating RTLIL representation for module `\BBPU'. Generating RTLIL representation for module `\BBPD'. Generating RTLIL representation for module `\ILVDS'. Generating RTLIL representation for module `\OLVDS'. Generating RTLIL representation for module `\$lut'. Successfully finished Verilog frontend. 4.46.2. Continuing TECHMAP pass. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111111111110 for cells of type $lut. Using template $paramod\$lut\WIDTH=2\LUT=4'0001 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00000001 for cells of type $lut. Using template $paramod\$lut\WIDTH=2\LUT=4'1011 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10101100 for cells of type $lut. Using template $paramod\$lut\WIDTH=2\LUT=4'1000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1010110000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=65279 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0001000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000000000001 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=16777216 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111110111111110000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00000111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11101111000000000000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=2\LUT=4'0100 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000000011111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=234881024 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01111000 for cells of type $lut. Using template $paramod\$lut\WIDTH=2\LUT=4'0110 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=11193584 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000101000001100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1010000000001100 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00110101 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1100111100001010 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11001010 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000001100000101 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0011010100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000111100010001 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10010110 for cells of type $lut. Using template $paramod\$lut\WIDTH=2\LUT=4'1001 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0100000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000011101110111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1000111100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=1\LUT=2'01 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=861212671 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0001000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01010011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1429409791 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111011100001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00010000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111010101010011001100001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1000000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11000101 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00001110 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=252693674 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00111010 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000101000000011 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11101000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111111110000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1429467376 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1906311167 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1100111011100000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1438662485 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00010100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111111111111111111000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111100011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=125239296 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=2\LUT=4'0111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000000001011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000110011100000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10111111101111110000000010111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=53452 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000111000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000111110111011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1110111100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00001011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=57103 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000000000111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=866840816 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00001101 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0011010101010011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110001111100010000000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100000011001101010101 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000011111110 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100001100110010101010 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011000010111011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1001000000001001 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111010000001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1110000100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1001000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1101000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=268435456 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111000011101110 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=2147418112 for cells of type $lut. Using template $paramod$6241fa3e5fa8d57b087a5d779d84dffa6ea27828\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10010000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10000000000000000000000000000000 for cells of type $lut. Using template $paramod$b1ab02b6d7b4a1d589d377b09bec30a2b2c62af9\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011000000001011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11010000000000000000000000000000 for cells of type $lut. Using template $paramod$c7a7d23abbb477e83fd9c5f925e1194205e0200e\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011000000000000 for cells of type $lut. Using template $paramod$f2cc8492cfd8058506ca681e889e3139ac9bdb7f\$lut for cells of type $lut. Using template $paramod$aa446779a3087d39dd4cd79a0d522cc75090ac62\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1073741824 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0100010011110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=252654421 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000011100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111000001110111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000011110100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0100111100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000110000001010 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000110100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011111101000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=2\LUT=4'1110 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111110000101001111111101000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=251 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11010000000011010000000000000000 for cells of type $lut. Using template $paramod$3dd1cfeaac2399e8e1df42382a37ba2eafacb216\$lut for cells of type $lut. Using template $paramod$3f90aed0d8eb548f602005ffe2ca4ddb51e8f26a\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10110000000010110000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111110001111111111111101001010 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0101110000000000 for cells of type $lut. Using template $paramod$5cea99b479a5e94263e7feab8f12d9efb8eebb68\$lut for cells of type $lut. Using template $paramod$f78689128b22f4dca36b8e3adbad7168cdba8784\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000001111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10010000000010010000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10110000000000000000000000000000 for cells of type $lut. Using template $paramod$f8bdca125e424c8e9c5f5e84960e0e034e7c473c\$lut for cells of type $lut. Using template $paramod$50ddde3c53ed9f3a904830da716060dc2a4a6794\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11010000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=218103808 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=184549387 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1611284429 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0101001100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=805306367 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111010000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=65536 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0001111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=7 for cells of type $lut. Using template $paramod$1929d44748517239e36a599c0facfb62ddb99607\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0010101100100010 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1110000000000000 for cells of type $lut. Using template $paramod$4623a96babc0fb9d0dd6b1878a40933c5488119e\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11100000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000011101111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=11599856 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000000001110 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111110110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111100110010001111111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000010111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0001000000000001 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011101110110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1618477048 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0100000100000000 for cells of type $lut. Using template $paramod$8fe2ebad1feba325f96d63263e14cfcbdc4b0421\$lut for cells of type $lut. Using template $paramod$5547587bde2f1ca8d884d89fe5b90567ab8bb30e\$lut for cells of type $lut. Using template $paramod$5fba6fa4affd3d8cb90b92595f737467c857f3c8\$lut for cells of type $lut. Using template $paramod$e10ca4aca4e4c8627be5bb912095a9253494b061\$lut for cells of type $lut. Using template $paramod$6e4e41657a70f7188049c87aa81ca2df3d479a9f\$lut for cells of type $lut. Using template $paramod$01de5b25c9605395c5c293f0e6a105e4eabbd154\$lut for cells of type $lut. Using template $paramod$a3da6745c5c369438a7754a834b174016720be2d\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10001111000000000000000000000000 for cells of type $lut. Using template $paramod$305ef200f2c199f2d21f47ca6eddb0b35f944ea3\$lut for cells of type $lut. Using template $paramod$e4410f6068ac195e7117d07a11f0b8cdeea2c9e5\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0110111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=24527 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111110101100111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11101011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111100000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111111111111111111110 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111101111111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10101010110011001111000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111100000000000000000000000 for cells of type $lut. Using template $paramod$68bce9973fad834e383d298cea29cf1d88c767d4\$lut for cells of type $lut. Using template $paramod$c614a6037ff5e3bd91eb090d0bc47ed503ea34bf\$lut for cells of type $lut. Using template $paramod$4d83f945ff11bb3e47ac1f4a1cecabb1e1192f01\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000010001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000101110111011 for cells of type $lut. Using template $paramod$4bc18ab29081ac9de33990d134f0fc57d437a5b9\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111110101001111001000111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0101001110101100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1010110001010011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011101100001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110011000000001111010111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111101011001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=143 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11101111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111000001000100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=4460288 for cells of type $lut. Using template $paramod$50cdf14cdecda7c7e34d569928f5004293af93b8\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0001111100010001 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1886912511 for cells of type $lut. Using template $paramod$becad630673be44c4d16e3360f816e9223d9cbcf\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000000001101 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11101111111111110000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=65423 for cells of type $lut. Using template $paramod$ecd267f563a33374e8db574aacb7bf6428d7e297\$lut for cells of type $lut. Using template $paramod$898e48637bc4b974fd02ac07b81fd0d72f50e9da\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111011101110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000100010000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0011110001011010 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=357913940 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=285212671 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11111000 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11111110 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10001111 for cells of type $lut. Using template $paramod$84ae49d5974e27ed78140b3ccba055ea77a05f5f\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=11 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=50659328 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10111011000010110000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111100010001000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000001001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011111100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0100000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000011111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1110000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111110111011101110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000101100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111110101111000011111100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111110011111111111111100000 for cells of type $lut. Using template $paramod$d51c2b2783ae0ae911a216695a268e63487765f2\$lut for cells of type $lut. Using template $paramod$02b9e8ca5d05d74a2c377c2e4f488f4d7f7ec1fd\$lut for cells of type $lut. Using template $paramod$e22d3901d8cb6f0f9c3212e3eab1d88f3ad5612f\$lut for cells of type $lut. Using template $paramod$190c1eb6625f8032b16b3e629910dc099fd508bc\$lut for cells of type $lut. Using template $paramod$e2e74d4a24e34ee1e8ee4682783e085e84aff1be\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01011100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1010001100000000 for cells of type $lut. Using template $paramod$5da641478b14e7ad2256d36cddc5fa4ddaa50ad8\$lut for cells of type $lut. Using template $paramod$335437ca8357770e7141cf695894febc9bf11aa3\$lut for cells of type $lut. Using template $paramod$a3e0af0bd3444be7a9fbe1699810c5aa88202b82\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=218103821 for cells of type $lut. Using template $paramod$a3d87b515d81b1a62643058b4ddeee7f36002591\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=268500992 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1090519040 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000010100001100 for cells of type $lut. Using template $paramod$b10a866498802752e38df3e29b7faf21196ddaf2\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0101110010100011 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01100000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10101010111100001111000011001100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0101001111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111101010100011001100001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111000010111011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10101010110011001111000011110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111011110001 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01101111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11100001 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1739918019 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11110100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111100010001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'01101001 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11001100101010101111000011110000 for cells of type $lut. Using template $paramod$57619346c001bba14f685682aaa48a843cd5a7a5\$lut for cells of type $lut. Using template $paramod$9c1fdb72bfab429eb035e50b86046f0edb412905\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100001010101011001100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=259981312 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1001010001001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1806696448 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111110111111100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11001011000011000000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=65524 for cells of type $lut. Using template $paramod$04579d5a7f7d11008d5c4dab02ae6edd004a19ac\$lut for cells of type $lut. Using template $paramod$978fde68d9b11247a3be46539b9e0e7d13edab9b\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1879048192 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1100101011111100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111111100000000 for cells of type $lut. Using template $paramod$593041bd4188997093fb78f92597731fc77bd928\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111101110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=252663091 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1911 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111001111110101 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0011010111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110011111101010000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=252663244 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1000100000001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1100101000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=251986703 for cells of type $lut. Using template $paramod$76666f44bff191e671564a6be8ce47db7409d0b8\$lut for cells of type $lut. Using template $paramod$275d4b7dd557f9880a1c9fb2b17e6b0e5a1bc217\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000111101110111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11100000000000001111000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=255066026 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10010000000000000000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1000100011110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10100011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111000100010000111100001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111101011111000011110011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10101010110011000000111100001111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=7799024 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111010111111001111000011110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1063190528 for cells of type $lut. Using template $paramod$2cb6faf85742a77ecc70cb7934aab8f2374586c0\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100001111111110001000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=252641399 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111000000001111100011111000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100001010101000110011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10101010110011001111111111110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0101000000000011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=267321344 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11001111110011110000000010001010 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=63743 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=47883 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111010001000100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111111111000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111000000001110111111101111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=16744319 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1010110011001100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0011111101010000 for cells of type $lut. Using template $paramod$d86957ebe1bb9ca515f523aa958649e2723664a9\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111110000011101110111 for cells of type $lut. Using template $paramod$c731a3e322df28554ad1a6bf78a4b11a42a31c7e\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111110000000 for cells of type $lut. Using template $paramod$757292a7295756f9722b03a98e9457973f8eb505\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=268400384 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110100111101000000000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000111101000100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111000000010001 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=252684851 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000011111000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111111110100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000000011110001 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0011001100111010 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1000111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1100110011001010 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1011000011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00101100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=24383 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111110000001011110011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111010111110011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111000010001000 for cells of type $lut. Using template $paramod$8eb77df048276dedcb8dacff952b6a11adcd51f5\$lut for cells of type $lut. Using template $paramod$1d1818d1f1b1719676dd231e382e918f6e9a16a2\$lut for cells of type $lut. Using template $paramod$7ff4b01bd30f1dbada9f4fe1d6eac8eb39b49a62\$lut for cells of type $lut. Using template $paramod$fd38c96984eb26c814acbee76ca31f3b56799839\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10000000101111111000000010000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1429470991 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0001010000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11100000111101001110111100000100 for cells of type $lut. Using template $paramod$855ff89ad82822e604e1374fa366bdfab06b8fd1\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1392508928 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=84219199 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0001111100000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111110001000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=2147450880 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1110000111111111 for cells of type $lut. Using template $paramod$a34f92a1382803f51908f04132e54ab18ee6b780\$lut for cells of type $lut. Using template $paramod$7df0a6c7a83f8c495c3947973e0fe0c90468f413\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111100011100001 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=2139160065 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=2139159553 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100001111000011110111 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'11110001 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111100000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1110111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0111111100110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10101111000011000000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1342111744 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10001111100010000000000000000000 for cells of type $lut. Using template $paramod$8079ce169c889d045b9ca39f082cea396fabd2d5\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111111111010001000100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0011010100000011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111100001110 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=15663104 for cells of type $lut. Using template $paramod$cf259b608f798b47fdd7498435e4ed20d0ccc604\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111100000001111111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111001011111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1895796480 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111000100000000 for cells of type $lut. Using template $paramod$258b22cbc2b77dd674a53d92d975320b9c9adf5a\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0100111101000100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111100010000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0001000100001111 for cells of type $lut. Using template $paramod$5234f84f9a5edce2ce261a52bee20f4d450344f1\$lut for cells of type $lut. Using template $paramod$5670d49caeedffba0d3e963ca10324a7856030e2\$lut for cells of type $lut. Using template $paramod$5f664f54d0df1747ad1906c3be299d878454a5eb\$lut for cells of type $lut. Using template $paramod$78ff8ebd5f0b3cfeb5955de4d93a5313ae37aeb3\$lut for cells of type $lut. Using template $paramod$cdc33ef2d7b170c946799ccf1ee9304a2dd4e51d\$lut for cells of type $lut. Using template $paramod$3b8376d34890e9044b1e4cab1dcaf9a2297495a0\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=3967 for cells of type $lut. Using template $paramod$9c59d3d5f05ce12c807b8c26edd2b7b3caf117c3\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=459000 for cells of type $lut. Using template $paramod$a69058a1112c52503532f44ae40017ff569449c9\$lut for cells of type $lut. Using template $paramod$5f4374372854f9b7b92ad49646de545e25672d6b\$lut for cells of type $lut. Using template $paramod$d7dd954bfadc6b031d1f21190f2ef4ca266fffb2\$lut for cells of type $lut. Using template $paramod$5fc2231c15aee7c77d483e5a1f3eb748810c2368\$lut for cells of type $lut. Using template $paramod$7368a7edd03021f4844660f3d43bf812be80cfb8\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10001000100000001111111111110000 for cells of type $lut. Using template $paramod$31a0bf18b19634f35aea5e02fea0bbe67d4e46a4\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110111111100000000000000000000 for cells of type $lut. Using template $paramod$e5700c80c0ed7fb9bfa1e6e7cd7a6c440b3856aa\$lut for cells of type $lut. Using template $paramod$6ef5aff3b463a10358f4104fdc5f8d4f48a784d9\$lut for cells of type $lut. Using template $paramod$b3ac7605e8bd5ec90d402d6e365fc62fc43054ed\$lut for cells of type $lut. Using template $paramod$ca6d8a7e025cf3f7f8d51f324707a6eb4c591430\$lut for cells of type $lut. Using template $paramod$6e9d841278d1b4d1ee3a2f7bfdd7effe7c41cabe\$lut for cells of type $lut. Using template $paramod$0b0f90d5cb75cccd00ea3d436ff365e9bcd265c4\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000101100000100 for cells of type $lut. Using template $paramod$55e49321004e7b2d9fc78909ab6aa39da79410ab\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11010101011111110000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=45007 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111010011111111 for cells of type $lut. Using template $paramod$1b3a424ee2420dea1e49e22858b390cb487e13c6\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=3003 for cells of type $lut. Using template $paramod$66a66bc26c214da26d22ad2ada8c13c4cff5f879\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111010100111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0011111111110101 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=61694 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000010100000011 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000111111101110 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100001100110001010101 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100000000000010111011 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=2139029631 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=268404991 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111000100011111000011110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11000000110010100000000011001100 for cells of type $lut. Using template $paramod$1ee2a7579c6186174c99cd3ee563c80621b7120f\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10110010 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=33488896 for cells of type $lut. Using template $paramod$9fb31a77262b563371005613991df329116739f8\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=16760767 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111010001001111000011110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10101111000000000000110000001100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=4456688 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111101011111100 for cells of type $lut. Using template $paramod$3e3eff717dce2fc824db03d938fa124c2f06e387\$lut for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=655372 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110000111100001111000011111110 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111111100000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111111101000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1100110111000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10111111111111110100000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=917504 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0000111000000001 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'00011100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111111111100000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1010111111111100 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1100110000001110 for cells of type $lut. Using template $paramod\$lut\WIDTH=3\LUT=8'10011111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'0101000000110001 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111010001100111111111111110000 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1111010111011100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111101001111111111111111111111 for cells of type $lut. Using template $paramod\$lut\WIDTH=4\LUT=16'1001010111011100 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11111111000111110000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'11110101111100110000000000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=32'10001100100011110000110000000000 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=252649676 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=50397695 for cells of type $lut. Using template $paramod\$lut\WIDTH=5\LUT=1566528989 for cells of type $lut. No more expansions possible. 4.47. Executing OPT_LUT_INS pass (discard unused LUT inputs). Optimizing LUTs in top. Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59469.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59461.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56781.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59265.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59264.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59262.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58821.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58830.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58820.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58814.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58813.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58809.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58808.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58818.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58812.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58802.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58817.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58807.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58796.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58806.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58784.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58795.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58785.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58791.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58789.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58779.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58793.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58778.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58788.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58777.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58773.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58787.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58772.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58782.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58771.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58766.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58756.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58756.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58751.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58744.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58769.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58732.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58731.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58736.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58725.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58721.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58735.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58720.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58730.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58719.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58718.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58644.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58614.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58614.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58614.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58603.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58561.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58438.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58345.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58296.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58281.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58281.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58189.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58588.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58588.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58180.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58164.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58165.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58155.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58167.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58168.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58157.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58150.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59843.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58135.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58140.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58134.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58103.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58114.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58097.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59767.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59772.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58108.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58100.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58096.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58080.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58090.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58084.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58078.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58055.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57550.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58072.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58056.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58047.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58022.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57304.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57904.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57904.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57884.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57884.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58195.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57888.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57888.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58225.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57908.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57908.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58204.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58214.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57896.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57896.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57868.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57868.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57876.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57876.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57856.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57856.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57847.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57847.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57834.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57834.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57818.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57818.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57302.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57783.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57756.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57756.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57756.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57756.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57756.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57756.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57712.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57630.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57630.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57619.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57619.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56774.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56792.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56786.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56783.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56775.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56782.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56779.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56773.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56770.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56778.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56766.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56777.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56765.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56618.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56618.lut3 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56460.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56460.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56460.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56460.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56460.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56583.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56583.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56583.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56583.lut5 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56583.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56583.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56582.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56582.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56582.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56582.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56582.lut5 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56582.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56582.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56565.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56573.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56573.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56573.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56573.lut5 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56573.lut6 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56573.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56575.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56575.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56575.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56575.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56578.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56578.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56578.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56578.lut5 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56578.lut6 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56578.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56567.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56567.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56567.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56567.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56567.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56549.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56549.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56549.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56549.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56564.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56564.lut2 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56564.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56558.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56558.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56558.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56560.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56560.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56560.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56560.lut5 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56560.lut6 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56560.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56559.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56559.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56559.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56559.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56559.lut5 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56559.lut6 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56559.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56554.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56554.lut2 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56554.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56540.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56540.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56540.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56540.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56543.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56543.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56547.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56547.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56533.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56533.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56537.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56537.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56535.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56535.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56461.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56461.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56461.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56461.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56461.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56461.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56494.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56494.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56494.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56494.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56494.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56494.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60386.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60337.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56453.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56453.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56453.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56453.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56453.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56445.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56445.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56445.lut4 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56445.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56445.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56412.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56441.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56441.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56433.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56433.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56433.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56433.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56433.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56435.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56436.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56437.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56437.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56437.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56437.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56437.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56437.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56440.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56440.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56440.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56440.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56439.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56439.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56439.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56439.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56439.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56439.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56424.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56425.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56425.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56425.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56425.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56425.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56429.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56429.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56429.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56429.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56429.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56429.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56427.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56427.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56427.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56427.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56428.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56428.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56428.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56428.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56428.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56428.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56423.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56423.lut2 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56423.lut3 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56413.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56413.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56413.lut4 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56413.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56413.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56415.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56419.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56419.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56419.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56419.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56421.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56421.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56421.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56421.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56418.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56418.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56418.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56418.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56418.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56418.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56403.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56403.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56403.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56403.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56405.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56405.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56409.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56409.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56367.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56367.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56367.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56367.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56367.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56402.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56402.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56398.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56398.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56307.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56307.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56355.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56355.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56329.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56329.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56329.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56329.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56347.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56152.lut2 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56152.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56027.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56027.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55811.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55703.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55703.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55703.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55703.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55703.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55702.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55702.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55702.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55702.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55699.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55699.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55699.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56693.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57519.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57519.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57496.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57496.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57416.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57416.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57416.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57416.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57416.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57416.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57434.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57430.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57430.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60121.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57397.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57397.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59895.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59787.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58601.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58587.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58587.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58587.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58609.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58609.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58609.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58609.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58609.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58609.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56000.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56001.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56001.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56001.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56001.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56001.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56001.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58822.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58625.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58754.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58754.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58608.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58608.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58666.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58666.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58219.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57736.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57892.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57892.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58198.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57872.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57872.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58192.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57864.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57864.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58183.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57852.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57852.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57813.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57813.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58137.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58131.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58116.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58105.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58099.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58093.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58087.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58081.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58075.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58069.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58065.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58066.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57842.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57842.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57838.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57838.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58054.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57826.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57826.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58051.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57822.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57822.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57537.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58041.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58042.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57807.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58037.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58037.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58035.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57796.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57463.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58026.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57900.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57900.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57880.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57880.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57860.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57860.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57830.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57830.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57707.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56689.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57539.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57539.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57539.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57539.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57539.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57539.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57509.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57509.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57497.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56648.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57100.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57095.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57090.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57085.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55561.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55560.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56832.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56790.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56785.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56780.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56776.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56771.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56767.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56673.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56676.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56664.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56666.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56652.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56640.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56587.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56587.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56580.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56556.lut2 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56556.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56551.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56551.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56551.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56551.lut5 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56551.lut6 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56551.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56545.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56545.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56539.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56539.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56532.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56532.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56532.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56498.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56518.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56518.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56518.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56518.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56493.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56493.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56491.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56491.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56463.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56463.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56463.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56463.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56463.lut5 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56463.lut6 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56463.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56464.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56482.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56484.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56484.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56484.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56484.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56484.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56487.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56487.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56465.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56465.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56465.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56465.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56465.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56466.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56469.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56472.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56472.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56448.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56448.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56438.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56438.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56438.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56432.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56426.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56426.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56426.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56426.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56420.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56420.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56420.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56420.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56420.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56420.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56416.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56416.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56416.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56416.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56416.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55687.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55687.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55687.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55687.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55687.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55687.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55686.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55686.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55686.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55686.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55686.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55686.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55685.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55685.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55685.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55685.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56411.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56411.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56407.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56407.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56400.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56400.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56400.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56368.lut2 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56368.lut3 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56368.lut4 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56368.lut5 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56368.lut6 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56368.lut7 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56395.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56395.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56395.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56369.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56369.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56369.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56369.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56369.lut5 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56369.lut6 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56369.lut7 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56396.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56396.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56396.lut3 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56370.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56379.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56385.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56386.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56376.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56142.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56142.lut5 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56142.lut7 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56017.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56017.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56017.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56017.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56017.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55499.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55499.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55499.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55499.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55499.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55434.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55448.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55448.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55473.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55833.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55833.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55833.lut4 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55833.lut5 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55833.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55833.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55834.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55834.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55834.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55837.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55837.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55837.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55837.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55837.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55837.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55707.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55701.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55701.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55701.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55701.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55701.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55701.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55695.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55693.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55250.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55692.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55683.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55683.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55683.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55683.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55257.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55257.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55258.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55258.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55283.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55283.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55283.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55283.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55283.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55283.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55290.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55277.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55277.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55278.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55281.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55281.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55270.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55276.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55271.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55271.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55275.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55251.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55251.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55252.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55256.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55256.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55255.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55255.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55659.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55659.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55373.lut2 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55373.lut3 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55373.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55373.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55373.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55373.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55405.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55307.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55307.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55307.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55307.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55307.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55310.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55312.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55312.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55309.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55318.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55340.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55340.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55340.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55340.lut6 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55340.lut7 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55345.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55343.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55342.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55342.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55351.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55324.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55324.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55329.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55329.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55328.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55328.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55326.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55325.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55325.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55289.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55284.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55284.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55284.lut4 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55284.lut5 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55279.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55279.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55264.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55264.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55265.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55265.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55268.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55268.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55266.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55269.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55269.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55259.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55259.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55254.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55254.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55801.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55603.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55603.lut2 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55603.lut3 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55803.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55585.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55585.lut3 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55585.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55585.lut5 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55585.lut6 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55585.lut7 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55565.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55565.lut2 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55565.lut3 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55565.lut4 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55565.lut5 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55565.lut6 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55565.lut7 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55623.lut2 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55623.lut3 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55429.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60260.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55205.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55206.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55226.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55242.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58690.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55249.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55251.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55252.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55257.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55260.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55264.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55266.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55270.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55276.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55274.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55277.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55270.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55278.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55283.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55290.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55292.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55307.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55307.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55310.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55309.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55314.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55317.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55318.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55324.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55326.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55330.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55333.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55335.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55340.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55343.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55345.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55340.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55351.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55373.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55392.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55393.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55405.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55410.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55405.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55373.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55434.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55435.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55448.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55456.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55469.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55475.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55477.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55480.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55481.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55431.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55499.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55505.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55503.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55520.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55525.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55434.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55473.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56017.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55550.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55560.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55561.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55585.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55565.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55566.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55580.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55585.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55586.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55591.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55600.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55603.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55620.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55623.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55638.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55641.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59372.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55652.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55659.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55801.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55669.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55670.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55679.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55683.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55685.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55686.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55687.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55693.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55693.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55695.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55695.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55699.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55699.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55703.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55701.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55702.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55703.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55726.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55753.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55759.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55803.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55763.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55763.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55776.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55778.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57539.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55799.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55801.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55802.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55803.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55805.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55807.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55811.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55813.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55809.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55811.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55824.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55827.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55828.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55833.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55835.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55837.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55838.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55840.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55840.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55842.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55843.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55833.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55829.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55876.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55910.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55946.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55951.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55951.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55956.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55957.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55958.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55959.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55960.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55961.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55962.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55970.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55970.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55976.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55976.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60036.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55990.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55992.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56000.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56001.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56000.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56004.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56005.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56011.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56011.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55499.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56017.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56021.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56022.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56027.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56038.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56061.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56063.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56086.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56142.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56152.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56159.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56161.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56164.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56177.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56189.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56194.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58666.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56263.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56347.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56307.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56685.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56320.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56324.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56320.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56330.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56324.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56330.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57507.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56348.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56348.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56356.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56356.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56365.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56366.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56367.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56368.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56369.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56373.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56374.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56376.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56377.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56386.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56384.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56386.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56387.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56390.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56395.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56396.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56398.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56398.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56400.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56402.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56402.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56405.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56405.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56407.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56407.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56409.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56409.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56411.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56411.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56412.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56413.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56417.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56416.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56417.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56418.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56419.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56420.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56421.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56425.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56426.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56427.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56428.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56429.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56433.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56435.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56435.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56436.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56437.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56438.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56439.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56440.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56441.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56438.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56445.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56412.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56448.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56448.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56453.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56455.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56458.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56460.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56460.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56491.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56463.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56465.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56470.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56474.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56483.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56484.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56465.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56489.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56491.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56493.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56493.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56494.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56499.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56506.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56510.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56516.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56521.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56523.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56524.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56527.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56532.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56535.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56535.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56537.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56537.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56539.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56539.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56543.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56543.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56545.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56545.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56547.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56547.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56549.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56551.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56551.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56552.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56554.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56555.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56556.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56559.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56560.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56560.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56556.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56563.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56564.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56575.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56567.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56568.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56573.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56573.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56549.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56578.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56578.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56581.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56582.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56583.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56583.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56585.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56587.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56587.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56595.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60403.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56613.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56618.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56619.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56623.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56623.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56625.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56630.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56628.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56628.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56630.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56635.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56633.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56686.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56635.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56638.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56638.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56640.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56657.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56642.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56644.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56644.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56647.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56648.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56650.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56655.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56652.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56655.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56657.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56660.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56660.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56662.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56662.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56664.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56666.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56667.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56671.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56671.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56673.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56675.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56675.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56676.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56679.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56679.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56680.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56682.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56682.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56685.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56686.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56689.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56691.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56693.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56695.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56691.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56704.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56704.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56705.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56712.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56713.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56718.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56712.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56718.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56710.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56791.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56763.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56768.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56769.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56763.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56764.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56765.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56766.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56767.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56768.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56769.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56770.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56771.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56772.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56773.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56774.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56775.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56776.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56777.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56778.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56779.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56780.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56781.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56782.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56783.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56784.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56785.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56786.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56787.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56788.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56789.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56790.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56791.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56792.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56793.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56794.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56784.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56794.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56788.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56789.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56793.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56787.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57444.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57436.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56906.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56906.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56956.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56152.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60336.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57085.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57085.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57090.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57090.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57095.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57095.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57100.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57100.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58918.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60098.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55659.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58888.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58829.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58653.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57307.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57756.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57746.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58604.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58613.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57299.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57300.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57302.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57303.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57304.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57305.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57306.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57307.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57530.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57306.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57397.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57397.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58783.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57401.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57406.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57416.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57418.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57430.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57438.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57440.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58021.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57455.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57485.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57463.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57466.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58025.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57478.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57483.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57473.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57490.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57492.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57493.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57496.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57497.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57497.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57505.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57508.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57509.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57512.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57514.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57517.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57519.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57523.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57525.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57528.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57535.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58045.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57538.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57539.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57542.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56680.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57553.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57556.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57561.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57565.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57572.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57574.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57576.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59966.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56647.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57585.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57587.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57596.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57597.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57598.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56633.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57611.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57613.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57617.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57619.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57623.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57625.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57596.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57628.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57630.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57633.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58774.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57635.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57641.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57652.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57641.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57663.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57664.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57666.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58191.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56650.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57673.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57675.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59837.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57684.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57685.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57687.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57673.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57694.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57705.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57713.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58734.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59936.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57724.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57727.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57729.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57734.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57736.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57737.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57739.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56625.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57746.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57747.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57749.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59795.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57763.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56613.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57771.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57771.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57783.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57787.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57788.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57791.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57795.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57796.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57801.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57802.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57807.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57809.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57809.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58037.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57813.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57818.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57822.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57826.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57830.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57834.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57838.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57842.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58061.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57847.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57852.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57856.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57860.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57864.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58186.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57868.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57872.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57663.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57876.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57880.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57884.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57888.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57892.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58207.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57896.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57900.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57904.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57908.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58200.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59951.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57913.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58111.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57916.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57919.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57305.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57922.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57925.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57791.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57928.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57931.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57801.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57934.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57937.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57940.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57943.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57946.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57949.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57952.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57955.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57574.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57958.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57961.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57964.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57967.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57970.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57973.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57976.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57979.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57982.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57985.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57988.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57991.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57994.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57997.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58000.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58003.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58006.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58008.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58010.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58010.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58011.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58014.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58019.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58021.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58022.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58024.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58024.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58025.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58026.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58030.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58030.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58034.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58034.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58035.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58037.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58041.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58042.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58044.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58044.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58045.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58046.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58047.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58050.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58050.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58051.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58058.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58053.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58054.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58055.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58056.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58053.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58058.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58060.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58060.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58061.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58063.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58063.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57585.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58065.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58066.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58068.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58068.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58069.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58071.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58071.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58072.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58074.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58074.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58075.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58077.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58078.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58080.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58081.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58083.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58083.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58084.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58086.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58086.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58087.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58089.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58089.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58090.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58092.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58092.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58093.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58095.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58095.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58096.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58097.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58099.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58100.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58102.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58102.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58103.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58105.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58107.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58107.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58108.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58110.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58110.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58111.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58113.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58113.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58114.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58116.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58124.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58136.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58130.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58130.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58131.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58133.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58133.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58134.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58135.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58136.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58137.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58139.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58139.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58140.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58141.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58143.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58143.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58145.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58145.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58141.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58149.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58149.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58150.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58151.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58153.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58153.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58154.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58155.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58151.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58157.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58159.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58159.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58154.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58161.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58164.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58165.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58161.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58167.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58168.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58171.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58175.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58171.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58179.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58179.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58180.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58182.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58182.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58183.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58185.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58185.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58186.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58188.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58188.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58189.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58191.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58192.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58194.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58194.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58195.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58197.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58197.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58198.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58200.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58201.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58203.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58203.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58204.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58206.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58206.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58207.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58208.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58210.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58210.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58211.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58213.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58213.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58214.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58216.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58216.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58218.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58218.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58219.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58221.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58221.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58222.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58224.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58224.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58225.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58226.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58227.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58222.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58245.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58249.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58242.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58253.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58254.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58267.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58263.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58274.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58253.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58281.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58282.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58278.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58272.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58281.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58292.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58299.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58300.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58290.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58309.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58313.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58320.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58324.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58332.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58328.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58299.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58338.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58345.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58346.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58347.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58356.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58360.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58346.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58366.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58370.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58374.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58364.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58381.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58381.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58387.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58383.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58393.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58402.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58406.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58414.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58410.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58400.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60382.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58424.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58420.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58434.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58430.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59929.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58440.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58444.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58447.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58448.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58456.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58457.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58465.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58466.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58456.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58465.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58476.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58482.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58484.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58488.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58482.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58474.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58494.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58501.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58502.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60391.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57684.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58498.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58501.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60401.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58561.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58573.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58573.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58574.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58575.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58576.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58577.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58578.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58579.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58580.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58581.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58587.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58588.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58590.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58601.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57299.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58603.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58604.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58608.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58609.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58613.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58614.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58615.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58625.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58810.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58615.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58644.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58622.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58786.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58644.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58653.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57303.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58666.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58780.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58674.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58674.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58724.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58729.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58718.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58719.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58720.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58721.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58608.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58724.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58725.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58726.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58729.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58730.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58731.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58732.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58734.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58735.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58736.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58737.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58726.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58742.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58743.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58744.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58745.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58737.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58750.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58751.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58754.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58756.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58755.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58766.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58605.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58768.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58769.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58770.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58771.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58772.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58773.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58774.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58775.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58776.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58777.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58778.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58779.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58780.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58781.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58782.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58783.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58784.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58785.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58786.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58787.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58788.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58789.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58790.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58791.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58792.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58793.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58794.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58795.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58796.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58797.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58798.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58800.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58801.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58802.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58798.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58792.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58790.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58806.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58807.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58808.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58809.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58810.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58811.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58812.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58813.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58814.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58815.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58816.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58817.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58818.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58819.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58820.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58821.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58822.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58797.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58815.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58827.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58828.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58829.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58830.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58827.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58819.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58835.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58836.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58828.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58839.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58750.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58835.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58855.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58855.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58858.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58860.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58864.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58864.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58867.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58867.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58870.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58858.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58873.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58873.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58876.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58870.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58879.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58879.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58881.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58885.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58885.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58876.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58888.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58836.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58891.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58894.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58894.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58897.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58897.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58900.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58900.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58903.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58903.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58905.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58891.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58908.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58912.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58912.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58914.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58930.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58918.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58920.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58923.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58926.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58933.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58930.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58816.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58933.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58936.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58936.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58939.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58939.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58941.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59394.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58492.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59261.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59268.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59267.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59261.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59262.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59263.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59264.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59265.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59266.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59267.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59268.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59270.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59270.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59272.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59263.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59272.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59266.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59284.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59285.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59290.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59296.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59300.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59305.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59311.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59315.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59320.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59331.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59337.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59357.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59371.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59382.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59387.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59393.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59400.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59407.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60399.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59410.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59413.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59416.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59419.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59422.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59425.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59428.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59435.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60088.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59438.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59445.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59446.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59452.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59467.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59471.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59468.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59475.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59478.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59516.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59538.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59563.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59568.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59578.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58811.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56772.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58768.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59383.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59651.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59705.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59708.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58046.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58077.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58770.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59767.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59789.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59783.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59783.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59785.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59785.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59787.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59789.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59791.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59793.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59795.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59797.lut0 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59793.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59791.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57705.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59797.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59798.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57694.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59819.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59824.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60105.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59824.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59827.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59830.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59830.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59833.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59833.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59839.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59839.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57652.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59845.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59851.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59854.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59854.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59845.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59857.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59860.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59860.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59863.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59866.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59866.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59870.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59870.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59876.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59879.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59879.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59882.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59885.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59885.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59888.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59891.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59891.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59895.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59899.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59901.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59910.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59907.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59901.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59910.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59916.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59913.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59916.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59920.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59920.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59926.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59929.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59932.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59935.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59935.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59938.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59938.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58447.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59944.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58201.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59947.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59947.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58318.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59951.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59957.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57787.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59960.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59960.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59963.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59966.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58175.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56368.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60036.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60042.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60046.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60049.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60049.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60053.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60056.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60058.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60060.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60057.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59439.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60072.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60075.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60075.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60084.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60087.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60087.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60095.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60076.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60098.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60102.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60105.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60107.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60115.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60118.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60118.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57776.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60124.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60130.lut0 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60056.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58391.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58397.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$59831.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58008.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58019.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58226.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58208.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60260.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60375.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60279.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60312.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60312.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60389.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60333.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60336.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60337.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60279.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60346.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$57630.lut1 (4 -> 2) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60369.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60369.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60333.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60375.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60382.lut0 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60386.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60389.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60391.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60346.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60394.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60394.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60396.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60399.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60401.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60403.lut0 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60396.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58794.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58742.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$55500.lut1 (4 -> 0) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58745.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$56764.lut1 (4 -> 3) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58743.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58775.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58776.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58781.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$58211.lut1 (4 -> 1) Optimizing lut $abc$55201$auto$blifparse.cc:498:parse_blif$60017.lut1 (4 -> 0) Removed 0 unused cells and 12155 unused wires. 4.48. Executing AUTONAME pass. Renamed 337865 objects in module top (158 iterations). 4.49. Executing HIERARCHY pass (managing design hierarchy). 4.49.1. Analyzing design hierarchy.. Top module: \top 4.49.2. Analyzing design hierarchy.. Top module: \top Removed 0 unused modules. 4.50. Printing statistics. === top === Number of wires: 8448 Number of wire bits: 36696 Number of public wires: 8448 Number of public wire bits: 36696 Number of memories: 0 Number of memory bits: 0 Number of processes: 0 Number of cells: 13186 CCU2C 398 DP16KD 46 EHXPLLL 1 L6MUX21 353 LUT4 7071 MULT18X18D 4 ODDRX1F 1 PDPW16KD 3 PFUMX 1419 TRELLIS_DPR16X4 60 TRELLIS_FF 3814 TRELLIS_IO 16 4.51. Executing CHECK pass (checking for obvious problems). checking module top.. found and reported 0 problems. 4.52. Executing JSON backend. Warnings: 1 unique messages, 1 total End of script. Logfile hash: 648cf46120, CPU: user 135.25s system 3.52s, MEM: 1165.72 MB peak Yosys 0.9+3672 (git sha1 924f1713, gcc 8.3.0-6+rpi1 -fPIC -Os) Time spent: 21% 8x techmap (33 sec), 13% 1x autoname (20 sec), ... ================================================ FILE: src/litex_linux/top.svf ================================================ HDR 0; HIR 0; TDR 0; TIR 0; ENDDR DRPAUSE; ENDIR IRPAUSE; STATE IDLE; SIR 8 TDI (E0); SDR 32 TDI (00000000) TDO (41111043) MASK (FFFFFFFF); SIR 8 TDI (1C); SDR 510 TDI (3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (0E); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000000) MASK (0000B000); SIR 8 TDI (46); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (7A); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SDR 8000 TDI (0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF82980000000000000000000000000002000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 77B80000200000200200000000000000000000000200000000000000000000000000000000000000 000000080200000000000000000080000080000000000000000000000000000000000000FFAC1D00 00000000000000000400000002000400000000000000000000000000100000100000000000100000 400100000000000000000000000000000000000000000000000000000000000000FF5C5F00002000 00200200000200600000000000000200000000000000000000080000080000000000080000280280 000000180000000080000080000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF6C2400000000000000000000000000000004000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000051B88941000000620000080200000044C20888820000004700 0000DCFFFFFFFFCDBDFFFFFF006CAC4C82E24282C26CB462AC4CB4AAACA26232045C2E4E860A00FF); SDR 8000 TDI (00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF83AA000000000000000040000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000FFF2BB00000000000000401000400410001000000002000800000000000000 00000000000000000000000000080000000000000000200080000000000000000000000000000000 000000000000FFCBB500000000000000000000000000000000000000000000000000000000000000 00000000000000080000000000000000080000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF09BB00000000000000000000000000000000800800800080080800800800800200200000800800 80020080000000200000080000000000000000000000000000000000000000000000000000FF1BD6 00000000000000000000000000000000000002000800000000000000000000000000000000000800 00080000000000080000200080000000000000000000000000000000000000000000FFA29A000000 00000200000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF4949000000000004 00401000400410001000801000800080100800800800800200200001001001000400800000000000 00080000000000000000000000000000000000000000000000000000FF64EB000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000004000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF83AA000000000000000040000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 7BD70000000001001000000000100000000000000000000000000000000000000000000020000000 000000000000000000000000000000000000000000000000000000000000000000000000FFCFFD00 00000000000140000000000000000200000200020000000000000000000000000000000000010000 000000000000000000000000000000000000000000000000020000000000000000FF86D400000000 01000A40000000000000000000000000040000000000000000000000000008000000200000008000 000000000000000200000000000000000008000000020000000000000000FFF44600000000000010 00000000100000000400000600000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000008000000000000000000FF6A4B00000000002000000000 00000000000000000000000000000000000000080000000040000000080000200000000000000000 000000000200000000000000000080040000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF26FD00002000000001000000000000000000 00000000000000000000000000000000000000000000010000000000000000000000000000000000 000000000080000000000000000000000000FF91FF00002000000008000000000000000000000000 00000000000000000000000000000000000000200000200000000000000000000200000200000000 000090000000040000000000000000FF09DC00000000004002000000000000000000000002000000 00000000000000080000000008000000080000008000000000000000000000000000000000000000 000108000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000FF379B000000000008000000000040000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF579A000000000000000000000000000000000000000000000000000000000000000000 00000100004000000000000004000004000000000000004000008000000400000000000000000000 00FF254B000400002400400000000400000000000000400100000000000000800100000042120000 1001000011000000000001000000001000001000000001001000009001000000000000000000FF26 EC000400000000400000000400000000000000400100000000000000000100000000100000100100 0001000000000001000000001000000000000000000000001001000000000000000000FF02930004 00004000400000000400000000000000400100000000000000800100000004140001100140000100 0000000001000000001000000000000001000000051001000000000000000000FF241F0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0200000200000000000000200000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FF35C100020000020020000000000000000000000000000000000000000000000000 00000000000001000001000000000000000000001000001000000000000800000800000000000000 000000FFC10F00000000000000000000020000000000000020008000000000000000008000000008 00000800000000000000000000800000000000000000000000800000000000800000000000000000 FF054300000000000040000000000000000000000000000040000000000000050040000000040000 05000001000000000000000000005000000000000000004004000004004000000000000000FF28EC 00000000000000000000040000000000000040000000000000000000008000000010000010008000 00800000000001000000000800000800000001000000000000000000000000000000FFAA35000000 00000000000000040000000000000040000000000000000000000000000010000010000000000000 00000001000000000000000000000000000000000000800000000000000000FF7EC8000400000400 40000000000000000000000000010000000000000000000000000000000000000000000000000000 00000000000000000000000000001000001000800000000000000000FF5DA0000400000000000000 00000000000000000000010000000000000000000000000000000000000000000000000000000000 00000000000000000000000000001000000000000000000000FFC1A7000000000000000000000200 00000000000020008000000000000000008000000008000008000000000000000000008000000000 00000000000000000000000000800000000000000000FFCE92000200000000400000000000000000 00000000000000000000000000000000000000000000010000010000000000000000000010000000 00000000000000000800000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF57A7000400000408400000000400000000000000400100 00000000000000010000002010000010010000010000000000010000000010000010000000010010 00001001000000000000000000FFB877000000006000000008000000000000000000000000000000 00000000000000000000000000000000100000000000000000000000000000000000000000000180 00000000000000000000FFBFFD000000000000000008000040000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000FF4F920000000000000000000000000400000000000800000000000000000000000000 00000000000000000000000000000000000000020000000008000000000000000000000000000000 0000FFA2DF0000000000000000000000000000001000000800000000000600000000000000000000 000000000060000000000400000400000000060000000000000000000000000000000000000000FF CD070000000000000000000000000000000000800000000000000000000000000000000000200000 000000000080000000000000000000000000000000000000000000000000000000000001FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF193000011000008000000000 00880000000000000000000000000000000000000000000000000000040000040000000000040000 200040000040000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FFBA0500000100001011100000000000000000 10000100200000000004000000404000000404000204404000400000000000200000000000000000 000000004400000404404000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF3A2D00000800000000000000000000000000000010000000 00000000000400000000000000000000000000000000000000000000000600000400000000600000 000000000000000000000000FFE49300010000009001000000008000000000000000000000000000 00000000400000000000000000420000000000000000000000000000000000000000000000000000 000000000000000000FF9B3600000000000010000000001000000000000009002000000000000002 00000000000200000200000000240000000000240000400040000240000000000200000200400000); SDR 8000 TDI (00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF33FB000000000000100000000100000000100000090040000000000000000000000000040000 0000400000000000000000200000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF48810000 80000000000000000008000000000000000004000000040000000040000000000000000000000004 0000000000040000000240000000000000200000000200400000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF93D10000000000000000000000020000 00000000000000000000000000000000000000000000000000000000000000000000000000000020 0000000000000000000000000000000000000000FF0B730000000000000000120000000000000000 00000000000000000000000000000000000000000000004000000000000000000000000004000000 0000000000000000000000000000000000FF20820000000000000000020000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFC0150000000000000000080000000000000000000000000000 00000000000000000000000000000000002000010000000000040000000002000000000000000000 0000000000000000000000FFAE040000000000000000000000020000000000000000000000000000 00000000000000000000000000000000000000000000000000000040000000000000000000000000 0000000000000000FF39370000000000000000000000000200001000800000000000000000000000 00000000000020000000000000000000040000000000040000000010000000000000000000000000); SDR 8000 TDI (000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFF01A000000000000080000000110000000000000090040000000 00000000000000000004000000002000000400000000000400000002400000000000004800000000 00400000000000000000FF959E000080000000000000000000000000100000000002000000020000 00000000000000000000000000000000000000000000000000000000000000000000000002000000 00000000000000FF6D96000000000000000000000000000000000000000000000000000000000020 00000000000006000000006000000000002000000000000000000000001000000000000000000000); SDR 8000 TDI (0000FFDD8F0000800000000400000000000000000000000080020000000000000000000000020208 000020000000008000000000000000000000000000000000000000008200000000000000000000FF 8A5B0000000000800200000000000000000000000000000000000000000000000000020200000000 000000000000000000000000000000000000000000040000008000000000000000000000FFF72100 01000020000000000001900000000000000100040000000000000000000000000070000040000000 000000000000040000000000000000000000020000000000000000000000000000FFE46700000000 20000000000000000000000000000000000000000000000000000000000000000000000000010000 000000000000000000000000000000000000000200000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF49BE00000000000000000000000800000000000000 00000000000400000000000000000000000000000000000000000000000000200000000000000000 200008000000000000000000000000FF1FE500020000000000000800000000000000000000002000 00000000000000000000000000000000000020000000000000000000000000020000000000000000 000000020000000000000000FFE08500020000008000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF221A00000000010000000000001000000000000000004000000002000000 00000000000000000000000000000000000000000000200000000000000000200010000000000000 000000000000FF642300000000000000000800000000000000000000000000000000000000000000 00000000000000000020000000000000000000000000020000000000000000000000040000000000); SDR 8000 TDI (00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF86 B1000000000000000000000000000000000000000020000800008000000000002000000000000000 0000208000000000000000220000000000000000080000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF3B680000000000 00000000000000000000008000000000000000000000000000000000800000000000000000000000 0000000000008000020000000000000000000000000000000000000000FF48550000000000000000 00004100004000010000000040000801008000000000002041000000000000000040800000000000 0000430000040000000000080000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFB5FA0000000000000000000000000000000000 00000000000000000000000000000000000000000000080000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFB5FA0000000000000000000000000000000000000000000000 00000000000000000000000000000000080000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF0AD60000000001000000000000100000000000000000000000000000000000 00000000000000000000000000000000000004000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFB3D7000000000000000000004100004000000000000000000001000000000000 00004000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (4ACB0800000000000000000000000000000000080000000000000000000000000000000000020000 000000000000000000000000000000008000000000000000000000000000000000000000FFC6E500 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000020000000000000000000000000000000000FFCCB508000000 00000000000000000000000000080000000000000000000000000000000000020000000000000000 000000000000000000008000020000000000000000000000000000000000FF5EB300000000000000 00000000000000000000000080000000000000000000000000008000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF08840000000000000000000000000800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF80DA0000000000000000000000000000100000080000000000000000 00000000000000000002000000000000000000000000000000000000800000000000000000000000 0000000000000000FFD7710000000000000000000000000000000000080000000000000000000000 00000000000002000000000000000000000000000002000000800000000000000000000000000000 0000000000FFB3E20000000000000000000000000800100000000000000000000000000000000000 00000000000000000000000000000000000004000000000000000000000000000000000000000000 0000FF7C910000000000000000000000000000000000000100000000000000000000000000008000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000008000020000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF993800000000000000000000000000000000000000 00000200000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFA16D00000000000000000001000000000000000000000002000000 00000000000000000000000000000000000000000000000000000000000000000000010000040000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF85CA00000000000000000001000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF3E19); SDR 8000 TDI (00000000000080000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF38F90000000000000000806000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00); SDR 8000 TDI (00000000000000000000000000000000000000000004000000000600000000000000000400000000 00000000000000000000000000000000000000000018000000000000000000FF05ED000000000000 00000000000000000000000000000400000000000000000000000000000000002000000000000000 00000000000000000000000000000000000000000000000000000000FF7FEE000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000020000000000000000000000000000000000000FF7FEE000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000020000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF87E6000000000000100000000000000000000000000000 00000000000000000000000000000000000000000400000000000202000000400000200000000000 00000000400000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF9F7A000000000000000000000008000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFB961000000000000100000000008000000000000000000000000000000000000 00000000000000000000000200000000000402000000400000200000000000000000004000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF86FA0000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF8C1300000000000000 00000800000800000000020000000000000000000000000000000000000000000000000000000000 008000000000000000000000000000000000000000000000000000FF202800000000000000400011 00001040000081041200000420000080420010000440000100010020000400040000008040010000 080000008000020000000000000000000000000000000000FF40CF00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000400000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF65CE00000000000000000000000000000000000000000000000004000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFE6B500000000000000000000000000000004000002000200000000000000000000000000000080 00220008000000000000000000000000000000000000000000020000000000000000000000FF7F35 00000000000000000000000000000002000002000000000000000000000000000000000080000000 08000000000000000000000000000000000000000000020000000000000000000000FFF767000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFA9A00000000000000040000100000040000001002000000000000000000000000000 00000000000000000004000000000000000000000000000000000000000000000000000000000000 0000FF8F8E0000000000000000000000000000000000004000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF47C800 00000000000000000000000000000080000A00000220000080220008000220000080008020000200 000000008020000000080000008000020000200000000000000000000000000000FF409B00000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFF299000000000000000000 00000000000000000000000000000000000000000000000000000000200000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF0AA400000000000000000000000000000000000000000000000000 00000200000020000000000000000000000000000000000000000000000000000000000000000000 008000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF808800000000000000000000000000000000000000000000000000000000000000200000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF649C00000000000000000000000000000000000000000000000000000000000000000000000000 40000000000000000000000000000000000000000000000000000000000000000000000000FF14C0 00000000000000000000000000000000000000000000000000000004000000000000000000000000 00000000000000000000000000000000000000000000000000010000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 75DE0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000004FF75DE00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000004FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF1E09000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000200000 00000000000000000000200000000000FFAA1A000000000000000000080000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF713F000000000000000000080000000000000000000000000000000000 00000000000000000000000000000000000000400000000000000000000000000000000000000000 00000000000000FFFDBF000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000400000000000000000000000004000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF2D098000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000020000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF068300000000000400401000400410 00100001000000000000000000000000000000000000400000000000000000000000000000000000 000000000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF231600000000000200401000200410000800008000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF709000000000000000000000000000000000000000000000 00000000000000000000000000400000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000004000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF80840000000000800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF80840000000000800000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF409B00000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000040000000000000000000000000000 00000004000000000000000000000000000000000000FF3F75000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04000000000000000000000000000000000000FFD934000000000000000000000000000000000000 00000000000000000000000000000000000000040000000000000000000000000000000000040000 00000000000000000000000000000000FF3F75000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000040000000000 00000000000000000000000000FFD934000000000000000000000000000000000000000000000000 00000000000000000000000000040000000000000000000000000000000000040000000000000000 00000000000000000000FF869A080000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFD934000000000000000000000000000000000000000000000000000000000000000000 00000000040000000000000000000000000000000000040000000000000000000000000000000000 00FFF374100000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000004000000000000000000000000000000000000FF19 24000000000000010000000000000000000000000000000000000000000000000000000000000400 0000000000000000000000000000000004000000000000000000000000000000000000FF5F7D0000 00000000008000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000000000000000000000000000FFD9340000000000 00000000000000000000000000000000000000000000000000000000000000000400000000000000 0000000000000000000004000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFD9340000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000208000000000000000000000000000000 000028000000000000000000000000000000000000FF448B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000110 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFBABD00000000000000000000000000000000000000000000000000 00000000000000000000000C10000000000000000000000000000000000840000000000000000000 000000000000000000FFBF4700000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000008000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFD934000000000000 00000000000000000000000000000000000000000000000000000000000000040000000000000000 00000000000000000004000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFD934000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000088000000000000000000000000000000000 0800000000000000000000000000000000000000FF4E0A0000000000000000000000000000000000 00000000000000000000000000000000000000020000000000000000000000000000000000040000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF17970008000000000000000000000000000000000000000000 00000000000000000000000000040200000000000000000000000000000000010200000000000000 0000000000000000000000FFB7B80000000000000000000000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000000020000000000000000000000 0000000000000000FF32D10000000000000000000000000000000000000000000000000000000000 00000000000000088000000000000000000000000000000000100000000000000000000000000000 0000000000FF2BF60008000000000000000000000000000000000000000000000000000000000000 00000000110000000000000000000000000000000000100000000000000000000000000000000000 0000FFB11E0008000000000000000000000000000000000000000000000000000000000000000000 000002000000000000000000000000000000000802000000000000000000000000000000000000FF E04F0000000000000000000000000000000000000000000000000000000000000000000000000A00 000000000000000000000000000000000000000000000000000000000000000000000000FFAE8500 00000000000000000000000000000000000000000000000000000000000000000000000880000000 000000000000000000000000000900000000000000000000000000000000000000FFBF4700000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000008000000000000000000000000000000000000FF863900000000000000 00000000000000000000000000000000000000000000000000000000001000000000000000000000 000000000000001080000000000000000000000000000000000000FF5D2000000000000000000000 00000000000000000000000000000000000000000000000000000800000000000000000000000000 000000000800000000000000000000000000000000000000FF6C8800000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF153D200000000000000000000000000000000000000000 00000000000000000000000000000009000000000000000000000000000000000008000000000000 00000000000000000000000000FFDD74000000000000000000000000000000000000000000000000 00000000000000000000000002000000000000000000000000000000000000800000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF809C000800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFAC4D000000000000000000000000000000000000000000000000000000000000000000 00000000020000000000000000000000000000000000020000000000000000000000000000000000 00FF809C000800000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF59 0F000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000080008000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF4BEB4008000000 00000000000000000000000000000000000000000000000000000000000000100000000000000000 0000000000000000001000000000000000000000000000000000000000FF8BEC4000000000000000 00000000000000000000000000000000000000000000000000000000100000000000000000000000 0000000000001000000000000000000000000000000000000000FF590F0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0080008000000000000000000000000000000000000000FF152E0000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000006000000000000000000000000000000000006 000000000000000000000000000000000000FF3F7500000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000000000FF193900100000000000000000000000000000000000000000 00000000000000000000000000000004000000000000000000000000000000000004000000000000 000000000000000000000000FFE09A80000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFAC4D00000000000000000000000000000000000000000000000000000000 00000000000000000002000000000000000000000000000000000002000000000000000000000000 000000000000FFD93400000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000004000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFCA1E0000000000000000000000000000000000000000000000000000000000000000000000000A 04000000000000000000000000000000000C04000000000000000000000000000000000000FFD087 00000000000000000000000000000000000000000000000000000000000000000000000001000000 00000000000000000000000000000000000000000000000000000000000000000000FFE242000000 00000000000000000000000000000000000000000000000000000000000000000010040000000000 00000000000000000000001004000000000000000000000000000000000000FF9D27000800000000 00000000000000000000000000000000000000000000000000000000000008000000000000000000 00000000000000000800000000000000000000000000000000000000FF3FF5200000000000000000 00000000000000000000000000000000000000000000000000000005040000000000000000000000 00000000000404000000000000000000000000000000000000FF957A000000000000000000000000 00000000000000000000000000000000000000000000000002800000000000000000000000000000 00000080000000000000000000000000000000000000FF409B000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000028000000000000000000000000000000000008000 0000000000000000000000000000000000FF82FE0000000000000000000000000000000000000000 00000000000000000000000000000000000040000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF9D5A0000000000000000000000000000000000000000000000000000000000 00000000000001000000000000000000000000000000000000000000000000000000000000000000 0000000000FF82FE0000000000000000000000000000000000000000000000000000000000000000 00000000000040000000000000000000000000000000000000000000000000000000000000000000 0000FFDADC0000000000000000000000000000000000000000000000000000000000000000000080 000000000000000000000000000000000080000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF3D5B80 00000000000000000000000000000000000000000000000000000000000000000000010000000000 000000000000000000000000000000000000000000000000000000000000000000FFE37280000000 00000000000000000000000000000000000000000000000000000000000080000004000000000000 000000000000000080000004000000000000000000000000000000000000FFCC4B80080000000000 00000000000000000000000000000000000000000000000000000000000002000000000000000000 000000000000000002000000000000000000000000000000000000FFD93400000000000000000000 00000000000000000000000000000000000000000000000000000004000000000000000000000000 000000000004000000000000000000000000000000000000FF3F7500000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000004000000000000000000000000000000000000FF35E200000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000018000000000000000000000000000000000000000 00000000000000000000000000000000FFB2F1000000000000000000002080024000000000000000 00000100000000000000004200000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFFF20000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000100000000000000000000000 00000000000000FF5FFB000000000000000000000000000000000000000000000000000000000000 00000000000002800000000000000000000000000000000002000000000000000000000000000000 00000000FF55BB080000000000000000000000000000000000000000000000000000000000000000 00000000020000000000000000000000000000000000000000000000000000000000000000000000 00FF9C50800000000000000000000000000000000000000000000000000000000000000000000000 0102000000000000000000000000000000000002000000000000000000000000000000000000FF35 46000800000000000000000000000000000000000000000000000000000000000000000000008000 0000000000000000000000000000000080000000000000000000000000000000000000FF2E310000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000400000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFECA11000000000000000 00000000000000000000000000000000000000000000000000000000020000000000000000000000 0000000000000000000000000000000000000000000000000000FF20EC8000000000000000000000 00000000000000000000000000000000000000000000000000040000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF357B8000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF3CC900000000000000000000000200000000000000000000000000000000 00000000000000000000000000000000000000000000000000000100000000000000000000000000 000000000000FFAC4D00000000000000000000000000000000000000000000000000000000000000 00000000000002000000000000000000000000000000000002000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF876200000000000000000000000200000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FFA1D1000000000000 00000000000000000000000000000000000000000000000000000000000002A80000000000000000 00000000000000000228000000000000000000000000000000000000FF6C6A000000000000000000 00000000000000000004000000000000000000100000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFE874000000000000000000000000 00000000000002000000000000000000080000000000000002A80000000000000000000000000000 00000220000000000000000000000000000000000000FFC99F000000000000000000004100044000 00000000000000000100000000000000004400000000000000000000000000000000000000000000 02000000000000000000000000000000000000FF4DC3000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000400000000 0000000000000000000000000000FFD9340000000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000000000400000000000000 0000000000000000000000FFD9340000000000000000000000000000000000000000000000000000 00000000000000000000000400000000000000000000000000000000000400000000000000000000 0000000000000000FFB3E60000000000000000000000000000000000000000000000000000000000 00000000000000040400000000000000000000000000000001000400000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF16F60000000000000000000000000000000000000000000000000000000000000000000000 000204000000000000000000000000000000009004000000000000000000000000000000000000FF D9340000000000000000000000000000000000000000000000000000000000000000000000000004 000000000000000000000000000000000004000000000000000000000000000000000000FF239F00 00000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000001004000000000000000000000000000000000000FFD3A300000000 00000000000000000000000000000000000000000000000000000000000000000002000000000000 000000000000000000000006000000000000000000000000000000000000FF315500000000000000 00000000000000000080000000000000000000000000000000000000000004000000000000000000 000000000000000004000000000000000000000000000000000000FF315500000000000000000000 00000000000080000000000000000000000000000000000000000004000000000000000000000000 000000000004000000000000000000000000000000000000FF629F00000000000000000000000000 00000000000000000000000000000000000000000000000004000000000000000000000000000000 000104000000000000000000000000000000000000FF988900000000000000000000000000000000 00000000000000000000000000000000000000000180000000000000000000000000000000000000 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000020000000000000000000000000000000000020000000000 00000000000000000000000000FF80AA004000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF3D1B000000000000000000000000000000000000000000000000000000 0000000000000000000A000000000000000000000000000000000008000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF4C56000000000000000000000000000000000000000000001000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF7E 18000000000000000000000000000000000000000000000000000000000000000000000000002800 0000000000000000000000000000000000000000000000000000000000000000000000FF7DCF0000 00000000000000000000000000000000000000000000000000008000000000000000000000000000 0000000000000000000000000800000000000000000000000000000000000000FF2A420000000000 00000000000000000000000000000000000002000000000000002800000000005000002000000000 0000000020000000000000000000000000000000000000000000000000FFA39C0000000000000000 00000000000000000000000000000000000000010000000000000000000400000000000000000000 0000000000001004000000000000000000000000000000000000FFD8B60000000000000000000000 00000002000000000000000000000000000000000000000000000400000000000000000000000000 0000000004000000000000000000000000000000000000FF00F30000000000000000000000000000 04000000000000001002000000000000002800000000000000004000000000000000004000000000 0004000000000000000000000000000000000000FFE6C30000000000000000000000000000000000 00000000000000000000000000000000000000000400000000000000000000000000000000000600 0000000000000000000000000000000000FF3F750000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000200000000000000000000000000000000000000000000000000 000000000000000000000000FF40EA00080000000000000000000000000000000000000000000000 00000000000000000000000400000000000000000000000000000000000000000000000000000000 000000000000000000FFEE4700000000000000000000000000000000000000000000000000000000 00000000000000000400000000000000000000000000000000000400000000000000000000000000 000000000000FF5D2000000000000000000000000000000000000000000000000000000000000000 00000000000800000000000000000000000000000000000800000000000000000000000000000000 000000FFBBEA00080000000000000000000000000000000000000000000000000000000000000000 00001000000000000000000000000000000000001000000000000000000000000000000000000000 FFE0A700080000000000000000000000000000000000000000000000000000000000000000000002 00000000000000000000000000000000000000000000000000000000000000000000000000FF5D20 00000000000000000000000000000000000000000000000000000000000000000000000008000000 00000000000000000000000000000800000000000000000000000000000000000000FF5D20000000 00000000000000000000000000000000000000000000000000000000000000000008000000000000 00000000000000000000000800000000000000000000000000000000000000FFF480000000000000 00000000000000000000000000000000000000000000000000000000000001400000000000000000 00000000000000000000000000000000000000000000000000000000FF82E6004000000000000000 00000000000000000000000000000000000000000000000000000012100000000000000000000000 00000000001000000000000000000000000000000000000000FF943D000000000000000000000000 00000000000000000000000000000000000000000000000009100000000000000000000000000000 00000800000000000000000000000000000000000000FFA4EA000000000000000000000000000000 00000000000000000000000000000000000000000004400000000000000000000000000000000000 00000000000000000000000000000000000000FF20A0000000000000000000000000000000000000 00000000000000000000000000000000000002000000000000000000000000000000000000000000 00000000000000000000000000000000FFAC4D000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000080000000000000000000000000000000000080000000000000000 0000000000000000000000FF649C0000000000000000000000000000000000000000000000000000 00000000000000000000004000000000000000000000000000000000000000000000000000000000 0000000000000000FFEBF40000020000000000000000000000000000000000000000000000000000 0000000000000000000800A000000000000000000000000000000000008000000000000000000000 0000000000FF41AF0008000000000000000000000000000000000000000000000000000000000000 00000000000020000000000000000000000000000000000000000000000000000000000000000000 0000FFC4B80000000000000000000000000000000000000000000000000000000000000000000000 000000200000000000000000000000000000001010000000000000000000000000000000000000FF F49D0008020000000000000000000000000000000000000000000000000000000000000000000000 080080000000000000000000000000000010000080000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF813100000000 00000000000000000000000000000000000000000000000000000000000000000000000040000000 000000000000000000000000000000000000000000000000000000000000FFB14040080000000000 00000000000000000000000000000000000000000000000000000000001000000000000000000000 000000000000000000000000000000000000000000000000000000FF40C540000000000000000000 00000000000000000000000000000000000000000000000000001002000000000000000000000000 000000000802000000000000000000000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF6A7500000000000000000000000000000000 00000000000000000000000000000000000000000800000000000000000000000000000000000A00 000000000000000000000000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF20A000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000001460000000000000000000000000000000000060000000000000000 00000000000000000000FFE09A800000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF00E7000000000000000000000000000000000000000000000000000000000000000000 00000000440000000000000000000000000000000000840000000000000000000000000000000000 00FF6F1F000000000000000000000000000000000000000000000000000000000000000000000000 0500000000000000000000000000000000000004000000000000000000000000000000000000FF23 FC000000000000000000000000000000000000000000000000000000000000000000000000100000 0000000000000000000000000000000804000000000000000000000000000000000000FF3F750000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000004000000000000000000000000000000000000FF88820000000000 00000000000000000000000000000000000000000000000000000000000000100800000000000000 0000000000000000001004000000000000000000000000000000000000FF9D270008000000000000 00000000000000000000000000000000000000000000000000000000080000000000000000000000 0000000000000800000000000000000000000000000000000000FFD9340000000000000000000000 00000000000000000000000000000000000000000000000000000400000000000000000000000000 0000000004000000000000000000000000000000000000FFF2990000000000000000000000000000 00000000000000000000000000000000000000000000002000000000000000000000000000000000 0000000000000000000000000000000000000000FF3C1B4000000000000000000000000000000000 00000000000000000000000000000000000000000800000000000000000000000000000000000000 0000000000000000000000000000000000FF989A2000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF5D200000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000080000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFE16600000000000000000000000000000000000000000000000000000000000000 00040000000000080000000000000000000000000000000000000000000000000000000000000000 000000FF429F00000000000000000000000000000000000000000000000000000000000000000000 00000000008000000000000000000000000000000000000040000000000000000000000000000000 FFF79A00000000000000000000000000000000000000000000000000000000000000000000000400 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF579B800000 00000000000000000000000000000000000000000000000000000000000000000400000000000000 00000000000000000000000000000000000000000000000000000000000000FFB9EC800000000000 00000000000000000000000000000000000000000000000000000200000000040000000000000000 00000000000000000004000000000000000000000000000000000000FF70F7800800000000000000 00000000000000000000000000000000000000000000000000000005000000000000000000000000 00000000000000000000000000000000000000000000000000FF84A1000000000000000000000000 00000000000000000000000000000000000000000000000000080000000000000000000000000000 00000204000000000000000000000000000000000000FF51DF000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000004 04000000000000000000000000000000000000FF44A8000000000000000000000000000000000000 00000000000000000000000000000000000004000000000000000000000000000000000001040000 00000000000000000000000000000000FFEE0C000000000000000000000000000000000000000000 00000000000000000000000000000004900000000000000000000000000000000000040000000000 00000000000000000000000000FF41F4001000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FFC5F00000000000000000000000000000000000000000000000000000000000 00000000000000050000000000000000000000000000000000050000000000000000000000000000 0000000000FFD10A0800000000000000000000000000000000000000000000000000000000000000 00000000021000000000000000000000000000000000040000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF A8948000000000000000000000000000000000000000000000000000000000000000000000000080 000000000000000000000000000000000000000000000000000000000000000000000000FF809C00 08000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF4CEC10000000 00000000000000000000000000000000000000000000000000000000000000000400000000000000 000000000000000000000000000000000000000000000000000000000000FF0B1700000000000000 00000000000000000000000000000000000000000000000000000000000300000000000000000000 000000000000000100000000000000000000000000000000000000FFE72C00000000000000000000 00000000000000000000000000000000000000000000000000000110000000000000000000000000 000000000400000000000000000000000000000000000000FF9D9180000000000000000000000000 000000000000000000000000000000000000000000000000C2000000000000000000000000000000 000082000000000000000000000000000000000000FFF29900000000000000000000000000000000 00000000000000000000000000000000000000000020000000000000000000000000000000000000 000000000000000000000000000000000000FF80A180000000000000000000000000000000000000 00000000000000000000000000000000000200000000000000000000000000000000000000000000 000000000000000000000000000000FF3C9F00000000000000000000000000000000000000000000 00000000000000000000000000000000008000000000000000000000000000000000000020000000 000000000000000000000000FF20D700000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000080800000000000000000000000000000000000200000000000000000000000 00000000000000FFE9F1000000000000000000000000000000000000000000000000000000000000 00000000002002080000000000000000000000000000000000800000000000000000000000000000 00000000FF869A080000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF3500100000000000000000000000000000000000000000000000000000000000000000000000 8080000000000000000000000000000000000020000000000000000000000000000000000000FF0F C3000000000000000000000000000000000000000000000000000000000000000000000020040800 0000000000000000000000000000000100000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFA22F0000000000000000 00000000000000000000000000000000000000000000000000000000028000000000000000000000 0000000000000280000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFBE3D0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0052000000000000000000000000000000000000FFAE230000000000000040000100000040000001 00000000000000000000000000001000000000000000000004000000000000000000000000000000 0000000000000000000000000000000000FF80320000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000002800000000 0000000000000000000000000000FF69B70000000000000040000080000020000001000000000000 00000000000000000800000000000000000004000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000004000000000000000000000000000000000004000000000000000000000000 000000000000FF60DB08000000000000000000000000000000000000000000000000000000000000 00000000000004000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFCC7400000000000000000002000800000000000000000000000000000000000000000000000000 04000000000000000000000000000000000004000000000000000000000000000000000000FF8C9A 10000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF3F75000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000004000000000000000000000000000000000000FFDB27000000000000 00000000000000000000000000000000000000000000000000000000000000400000000000000000 00000000000000000010000000000000000000000000000000000000FF7F5A180000000000002000 00000000000000000000000000000000000000000000000000000006240000000000000000000000 0000000000060C000000000000000000000000000000000000FF5899000000000000002000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF4177000000000000000000000080000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 04000000000000000000000000000000000000FFEDB8000000000000000000000080000000000000 00000000000000000000000000000000000000020000000000000000000000000000000000000000 00000000000000000000000000000000FF7F6C000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000020000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFF901000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000080000000000000000000000000000000000080000000000000000000000000000 0000000000FF08950000000000000000000000000000000000000000000000000000000000000000 00000000008000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 8F0A0000000000000000000000000000000000000000000000040410000000040040000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF5D2E00000000000000 00000000000000000000000000000000000000000080000000000000000000020080000000000020 080000000000000000000000000000000000000000000000000000FFD93400000000000000000000 00000000000000000000000000000000000000000000000000000004000000000000000000000000 000000000004000000000000000000000000000000000000FF14CA00000000000000000000000000 0000000000000000000000000000800000000000000000000C000000000000000000000000000000 000004000000000000000000000000000000000000FF18DA00000000000000000000000000000000 00000000000000040410010000040040000000000014040080000000000020080000000000000004 000000000000000000000000000000000000FF26D900000000000000000000000000000000000000 00000000000000000100000000000000000004000000000000000000000000000000000000000000 000000000000000000000000000000FFD93400000000000000000000000000000000000000000000 00000000000000000000000000000004000000000000000000000000000000000004000000000000 000000000000000000000000FFD93400000000000000000000000000000000000000000000000000 00000000000000000000000004000000000000000000000000000000000004000000000000000000 000000000000000000FFCC7400000000000000000002000800000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF8074000000000000000000000000000000000000000000000000000000000000000000 00000008000000000000000000000000000000000000000000000000000000000000000000000000 00FFE2EB000800000000000000000000000000000000000000000000000000000000000000000000 1010000000000000000000000000000000001000000000000000000000000000000000000000FF88 48000800000000000000000000000000000000000000000000000000000000000000000000001800 0000000000000000000000000000000800000000000000000000000000000000000000FF80740000 00000000000000000000000000000000000000000000000000000000000000000000080000000000 0000000000000000000000000000000000000000000000000000000000000000FF5D200000000000 00000000000000000000000000000000000000000000000000000000000000080000000000000000 0000000000000000000800000000000000000000000000000000000000FFFB300000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000100000000000000000000000000000000000000FF63AC0000000000000000000000 00000000000000000000000000000000000000000000000000141000000000000000000000000000 0000001048000000000000000000000000000000000000FFE68B0000000000000000000000000000 00000000000000000000000000000000000000000000080000000000000000000000000000000000 0900000000000000000000000000000000000000FF08950000000000000000000000000000000000 00000000000000000000000000000000000000008000000000000000000000000000000000000000 0000000000000000000000000000000000FFA6210000000000000000000000000000000000000000 00000000000000000000000000000000001000000000000000000000000000000000001000000000 0000000000000000000000000000FF3E710000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000004000000000000000 0000000000000000000000FF80ED0000000000000000000000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000000000000000000000000000000 0000000000000000FF5D200000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000200000000000000000000000000000 000000FF13CB00090000000000000000000000000000000000000000000000000000000000000000 00000000600000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF809C 00080000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF66DB000000 00000000000000000000000000000000000000000000000000000000000001400000000000000000 00000000000000000000000000000000000000000000000000000000000000FF73A9000100000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000008000000400000000000000000000000000000000000FF4BEB400800000000000000 00000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000001000000000000000000000000000000000000000FFA720400000000000000000000000 00000000000000000000000000000000000000000000000010000000000000000000000000000000 08001000000000000000000000000000000000000000FF53BB000000000000000000000000000000 00000000000000000000000000000000000000A00000000000000000000000000000000000000000 00000000000000000000000000000000000000FFD1A1000000000000000000000000000000000000 00000000000000000000000000000000000008080000000000000000000000000000000008000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF7A37000800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFB90F0000000000000000000000000000000000000000000000000000000000000000000000 000204000000000000000000000000000000000004000000000000000000000000000000000000FF 2D150000000000000000000000000000000000000000000000000000000000000000000000000102 000000000000000000000000000000000406000000000000000000000000000000000000FFC48F00 00000000000000000000000000000000000000000000000000000000000000000000000804000000 000000000000000000000000000804000000000000000000000000000000000000FF77CE00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000200000000000000000000000000000000000000FFE24200000000000000 00000000000000000000000000000000000000000000000000000000001004000000000000000000 000000000000001004000000000000000000000000000000000000FF8C6300080000000000000000 00000000000000000000000000000000000000000000000000000800000000000000000000000000 000000000C04000000000000000000000000000000000000FF013520000000000000000000000000 00000000000000000000000000000000000000000000000004000000000000000000000000000000 000004000000000000000000000000000000000000FF409B00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF2E3100000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000400000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF852120000000000000000000000000000000000000000000000000 00000000000000000000000800000000000000000000000000000000000800000000000000000000 000000000000000000FF77CE00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000200000000000000000000000000 000000000000FFA76500000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000100000000000000000000000001000000000000000000000000000000000000000000000000 00FF8C4B000000000000000000000000000000000000000000000000000000000000000000000000 0002000000000000000000000000000000000002000200000000000000000000000000000000FF63 BE000000000000000000000000000000000000000000000000008000000000000000020010000000 0000000000000000000000000100000000000000000000000000000000000000000000FF6E9A0000 00000000000000000000000000000000000000000000000000000000000000000008000000000000 0000000000000000000000000000000000000000000000000000000000000000FFD3988000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000160060000000000000000000000000000000000000000FFE7308000000000000000 00000000000000000000000000000000008000000000000002020000800400000000000000000000 0080000000000004000000000000000000000000000000000000FF68268008000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000204000000000000000000000000000000000000FF514C0000000000000000000000000000 00000000000000000000000000000000000000000000048400000000000000000000000000000000 0004000000000000000000000000000000000000FF409B0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFD9340000000000000000000000000000000000000000 00000000000000000000000000000000000400000000000000000000000000000000000400000000 0000000000000000000000000000FFA1F80000000000000000000000000000000000000000000000 00000000000000000000000000030000000000000000000000000000000000040400000000000000 0000000000000000000000FFB3700010000000000000000000000000000000000000000000000000 00000000000000000000028600000000000000000000000000000000040600000000000000000000 0000000000000000FFE09A8000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000280000000000000000000000000000000000200000000000000000000000000000000000000 FF869A08000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF2C9B 90000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF809C000800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF7E5B000000000000 00000000000000000000000000000000000000000000000000000000000005000000000000000000 00000000000000000400000000000000000000000000000000000000FF3FC0000000000000000000 00000000000000000000000000000000000000000000000000000000800000000000000000000000 00000000000200000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF40D7800000000000000000000000000000 00000000000000000000000000000000000000000006000000000000000000000000000000000000 00000000000000000000000000000000000000FFBE2D000000000000000000000000000000000000 00000000000000000000000000000000000001000000000000000000000000000000000004000000 00000000000000000000000000000000FFE09A800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF609D000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000002000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFB1C7000000000000000000000000000000000000000000000000000000000000000004); SDR 8000 TDI (0002000000000000000000000000000000000000C0000000000000000000000000000000000000FF 06090000000000000000000000000000000000000000000000000000000000000000000000000250 000000000000000000000000000020020080000000000000000000000000000000000000FF2E3100 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000400000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF845200000000000000 00000000000000000000000000000000000000000000000000000000000000800000000000000000 000000000000000000000000000000000000000000000000000000FF472C00000000000000000000 0000000000000000000000000000000000000000000000000000002A000000000000000000000000 00000002002A000000000000000000000000000000000000FF81F500002000002002000010010000 00000200000200000000000000000050400000400000000000880000280408000000080000000080 000400000000000000000000000000000000000000FFC56F00000000000000000000000000000000 00000000000000000000000028000000000000000008000000000000000000000000000000000020 000000000000000000000000000000000000FF4D4500000000000400000400000000000000000010 00000000000000040000000000000100000002000000000000000000000000000000000002000000 000000000000000000000000000000FF1F6500002000002002000008008000000002000002000000 00000000000000200000200000000000080000280208000000080000000580060200000000000000 000000000000000000000000FF450400000000000400000400000000000000000010000000000000 00020000000000000100000000000000000000000000000000000280020000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF37F100000000000000000000000000000000000000000000000000000000000000 00000000000042000000000000000000000000000000000012000000000000000000000000000000 000000FF5FFB00000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000FFE4 EC000000000000000000000000000000000000000000000000000000000000000000000000000600 0000000000000000000000000000008104000000000000000000000000000000000000FF80930000 00000000000000000000000000000000000000000000000000000000000000000000000400000000 0000000000000000000200020006000000000000000000000000000000000000FF6E2D0000000000 00000000000000000000000000000000000000000000000000000000000000000C20000000000000 0000000000000000001004000000000000000000000000000000000000FF7B560000000000000000 00000000000000000000000000000000000000000000000000000000041000000000000000000000 0000000000000804000000000000000000000000000000000000FF02A40000000000000000000000 00000000000000000000000000000000000000000000000000020400000000000000000000000000 0000000104000000000000000000000000000000000000FF18070000000000000000000000000000 00000000000000000000000000000000000000000000000420000000000000000000000000000000 0004000000000000000000000000000000000000FF06D50000000000000000000000080000000000 00000000000000000000000000000000000000000400000000000000000000000000000000000400 0000000000000000000000000000000000FF5EFA0000000000000000000000680000000000000000 00000000000000000000000000000000000000000000000000000000000000000000110000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF019B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000110000000000000000000000 0000000000000000FFE7160000000000000000000000000000000000000000000000000000000000 00000000000000002800000000000000000000000000002002002000000000000000000000000000 0000000000FF77CE0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000020000000000000000000000000000000000 0000FFA39E0000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (02000000000000000000000000000000000002000000000000000000000000000000000000FF5956 00000000000000000000000000000000000000000000000004400000000100000000000000000000 00000000000000000000000000800000000000000000000000000000000000000000FFDB80000000 00000000000000000000000000000000000000000000000000000000000000000000280000000000 00000000000000000001000000000000000000000000000000000000000000FFB9CF000000000000 00000000000000000000000000000000000001000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF022C000000000000000000 00000000000000000000000000000000000000000000000000880000100002000002A00000000002 00000000000000000000000000000000000000000000000000FFFF9E000000000000000000000000 00000000000000000000000000800000000000000008000000240000000000000000000000000000 00000004000000000000000000000000000000000000FFFB6E000000000000000000000000000000 00000000000000000000800000000000800008200000040000000000002200000000000000000000 04000000000000000000000000000000000000FFFEBB000000000000000000000000000000000000 00000000000005400000000101000000D00000040000000000A04400000004000000000000040000 00000000000000000000000000000000FF7B79000000000000000000000000000000000000000000 00000000000000000000000000000000040004000004000000000000000000000000060000000000 00000000000000000000000000FFD934000000000000000000000000000000000000000000000000 00000000000000000000000000040000000000000000000000000000000000040000000000000000 00000000000000000000FFD934000000000000000000000000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000000040000000000000000000000 00000000000000FFF3A2000000000000000000000000000000000000000000000000000000000000 00000000000000040000000000000000000000000000000400040000000000000000000000000000 00000000FFD3AA000000000000000000000000000000000000000000000000000000000000000000 00000000060000000000000000000000000002000100040000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000001200000000000000000000000000000000000000FFE0A700 08000000000000000000000000000000000000000000000000000000000000000000000200000000 000000000000000000000000000000000000000000000000000000000000000000FF5D2000000000 00000000000000000000000000000000000000000000000000000000000000000800000000000000 000000000000000000000800000000000000000000000000000000000000FFB1F600000000000000 00000000000000000000000000000000000000000000000000000000000802000000000000000000 000000000000000802000000000000000000000000000000000000FF10F100000000000000000000 00000000000000000000000000000000000000000000000000000500000000000000000000000000 000000000000000000000000000000000000000000000000FF7BED00000000000000000000000000 00000000000000000000000000000000000000000000001000000000000000000000000000000000 001000000000000000000000000000000000000000FFAD0700000000000000000000000000000000 00000000000000000000000000000000000000000B00000000000000000000000000000000000800 000000000000000000000000000000000000FF80ED00000000000000000000000000000000000000 00000000000000000000000000000000000400000000000000000000000000000000000000000000 000000000000000000000000000000FFCC1A00000000000000000000000000000000000000000000 00000000000000000000000000000008000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FFBD4F00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000080000000000000000000000000 000000000000FF2C7500000000000000000000000000000000000000000000000000000000000000 00000000000808000000000000000000000000000000000880000000000000000000000000000000 000000FFCC7600000000000000000000000000000000000000000000000000000000000000000000 00000202000000000000000000000000000000000002000000000000000000000000000000000000 FFAC4D00000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000001010000000000000000000000000000000000000FF3F270008 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000010000000000000000000000000000000000000FF349A0000000000 00000000000000000000000000000000000000000000000000000000040000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF13A70000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000010100000000000000000000000000000000FFB1404008000000000000000000 00000000000000000000000000000000000000000000000000100000000000000000000000000000 0000000000000000000000000000000000000000000000FFAC134000000000000000000000000000 00000000000000000000000000000000000000000000100000000000000000000000000000000000 0800000000000000000000000000000000000000FFDA9A0000000000000000000000000000000000 00000000000000000000000000000000020000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF55820000000000000000000000000000000000000000 000000000000000000000000000000000800000000000000000000000000000000000A0200000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFE0D60000000000000000000000000000000000000000000000000000 00000000000000000000060000000000000000000000000000000000000000000000000000000000 0000000000000000FFE0A70008000000000000000000000000000000000000000000000000000000 00000000000000020000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF5D200000000000000000000000000000000000000000000000000000000000000000000000 000800000000000000000000000000000000000800000000000000000000000000000000000000FF 8CBF0008000000000000000000000000000000000000000000000000000000000000000000001000); SDR 8000 TDI (00000000000000000000000000000004000000000000000000000000000000000000FFE221000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000804000000000000000000000000000000000000FFFF9A000000000000 00000000000000000000000000000000000000000000000000000000000008000000000000000000 00000000000000000004000000000000000000000000000000000000FF0403000000000000000000 00000000000000000000000000000000000000000000000000000010000000000000000000000000 00000000001004000000000000000000000000000000000000FF5DC8000800000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000800000000000000000000000000000000000000FFD934000000000000000000000000000000 00000000000000000000000000000000000000000000040000000000000000000000000000000000 04000000000000000000000000000000000000FF8146000000000000000000000000000000000000 00000000000000000000000000000000000010000000000000000000000000000000000000000000 00000000000000000000000000000000FFB09A400000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF744C200000000000000000000000000000000000000000000000 00000000000000000000000000020000000000000000000000000000000000020000000000000000 00000000000000000000FF5D20000000000000000000000000000000000000000000000000000000 00000000000000000008000000000000000000000000000000000008000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FFE89B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000800000000000000000000000000000 00FFDBB0000800000000000000000000000000000000000000000000000000000000000000000000 0000020000000000000000000000000000000000010000000000000000000000000000000000FF1D 98000000000000000000000000000000000000000000000000000000000000000000000000000002); SDR 8000 TDI (000000000000000000000200000000000000000000000000000000000000000000FFBB1A00000000 00000000000000000000000000000000000000000000000000000000000000020000000000000000 000000000000000000000000000000000000000000000000000000000000FFD24A80000000000000 00000000000000000000000000000000000000000000000000000000120000000000000000000000 000000000060000000000000000000000000000000000000000000FFC4CF80000000000000000000 00000000000000000000000000000000000000000000000000008004000000000000000000000000 000200000004000000000000000000000000000000000000FFAC7080080000000000000000000000 00000000000000000000000000000000000000000000000202000000000000000000000000000000 000002000000000000000000000000000000000000FF4D4200000000000000000000000000000000 00000000000000000000000000000000000000000108000000000000000000000000000000000404 000000000000000000000000000000000000FF667400000000000000000000000000000000000000 00000000000000000000000000000000000010000000000000000000000000000000000004000000 000000000000000000000000000000FF84DE00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000104000000000000 000000000000000000000000FF201500000000000000000000000000000000000000000000000000 00000000000000000000000280000000000000000000000000000000000204000000000000000000 000000000000000000FF6D5400100000000000000000000000000000000000000000000000000000 00000000000000000544000000000000000000000000000000000004000000000000000000000000 000000000000FFE09A80000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FFBD4F00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000080000000000000000000000000000000000000 FF492800000000000000000000000000000000000000000000000000000000000000000000000001 04000000000000000000000000000000000004000000000000000000000000000000000000FF7B49 00000000000000000000000000000000000000000000000000000000000000000000000002400000); SDR 8000 TDI (0000000000000000000000000400000000000000000000000000000000000000FF809C0008000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FFDF9B0800000000000000 00000000000000000000000000000000000000000000000000000000001000000000000000000000 0000000000000000000000000000000000000000000000000000FF10F10000000000000000000000 00000000000000000000000000000000000000000000000000050000000000000000000000000000 0000000000000000000000000000000000000000000000FF10F10000000000000000000000000000 00000000000000000000000000000000000000000000050000000000000000000000000000000000 0000000000000000000000000000000000000000FF7F368000000000000000000000000000000000 00000000000000000000000000000000000000004000000000000000000000000000000000010000 0000000000000000000000000000000000FFDD740000000000000000000000000000000000000000 00000000000000000000000000000000020000000000000000000000000000000000008000000000 0000000000000000000000000000FF8C938000000000000000000000000000000000000000000000 0000000000000000000000000000C000000000000000000000000000000000000000000000000000 0000000000000000000000FFE24D0000000000000000000000000000000200000000000000000000 00000000000000000000000000008000000000000000000000000000000000000000000000000000 0000000000000000FFC4950000000000000000000000000400000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF029C0000000000000000000000000200000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF7D180000000000000000000000000000000200000000000000000000000000000000000000 100000000000000000000000000000000000000000000000000000000000000000000000000000FF 86360000000000000000000000000000000000000000000000000000000000000000000000000000 000100000000000000000000000000000000000000000000000000000000000000000000FFFD6100 00000000000000000000000000000000000000000000000000000000000000000000008000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF5485000000000000000000000000 80000000000000000000000000000000000000000000000002800000000000000000000000000000 00000080000000000000000000000000000000000000FF4092000000000000000000000000000000 00000000000000000000000005000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FFBC8E000000000000000000000000800000000000 00000000000000000002800000000000000002000000000000000000000000000000000000800000 00000000000000000000000000000000FF3165040014010040000010000001800000010004000000 04100000000000000000000100000100002100400000000000000000000100000400000000000000 00000000000000000000000000FFDA26000000000000000000000000000000000000000000000000 00000000000000000000000000000004000000000000000000000000000000000004000000000000 00000000000000000000FFFF39020012010040000008000000800000008004000000040800000000 00000000000100000100002082400000000000000000000080000400000002000000000000000000 00000000000000FFAC4D000000000000000000000000000000000000000000000000000000000000 00000000000000020000000000000000000000000000000000020000000000000000000000000000 00000000FFD087000000000000000000000000000000000000000000000000000000000000000000 00000001000000000000000000000000000000000000000000000000000000000000000000000000 00FFB341000000000000000000000000000000000000000000000000000000000000000000000000 0088000000000000000000000000000000000200000000000000000000000000000000000000FFE6 A1080000000000000000000000000000000000000000000000000000000000000000000000020000 0000000000000000000000000000000000000000000000000000000000000000000000FF8E308000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF5D4C00000000000000 00000000018000000000000000000000000000000000000000000000000200000000000000000000 000000000000000004000000000000000000000000000000000000FFDAAD00008000000000000000 00000000000000000000000000000000000000000000000000000108000000000000000000000000 000000000400000000000000000000000000000000000000FFFB8500000000000000000000000000 00000000000000000000000000000000000000000000000080000000000000000000000000000000 000304000000000000000000000000000000000000FF20A000000000000000000000000000000000 00000000000000000000000000000000000000000200000000000000000000000000000000000000 000000000000000000000000000000000000FF8E4900000000000000000000000000000000000000 00000000000000000000000000000000000006000000000000000000000000000000000106000000 000000000000000000000000000000FFBFE500000000000000000000000180000000000000000000 000000000000000000000000000000000000000000000000000000000000007E0000000000000000 000000000000000000000000FF429900000000000000000000000180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFF3AB00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000020000000000000000000000000000000000000 000000FFC53F08000000000000000000000180000000000000000000000000000000000000000000 000000A0000000000000000000000000000000000100000000000000000000000000000000000000 FF22A200000000000000000000000180000000000000000000000000000000000000000000000002 00000000000000000000000000000000000000000000000000000000000000000000000000FF9390 00000000000000000000000000000000000000000000000000000000000000000000000002000000 00000000000000000000000020000000000000000000000000000000000000000000FF3281080000 00000000000000000000000000000000000000000000000000000000000000000001400000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000FFBBCD0000000000000000 00000001800000000000000000000000010000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF437C0000000000000000000000 018A008200000000002282A02202000000002A00000A020800040000020000002000000000020000 0000000000000000000000000000000000000000000000FFED900000000000000000000000000000 00000000000000000000008000000000000000000000008400000000000000000000000000000000 0004000000000000000000000000000000000000FF377100000000000000000000015C1400000000 00000000004000008000000000020004000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FF8A350000000000000000000000000000800000000000 0485004203000000004A040008001000000000040000002000000000040000000000100600000000 0000000000000000000000000000FFF3D00000000000000000000000000000040000000000400000 00000000000000000000040000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF3D770000000000000000000000018000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000400000000000000000000 0000000000000000FF728C0000000000000000000004018000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF4B2A0000000000000000000000018000000000000000000000000000000000000000 00000000010400000000000000000000000000000000000400000000000000000000000000000000 0000FF3C9B0000000000000000000000818000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 42990000000000000000000000018000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF599800 01000000000000000002018000000000000000000000000000000000000000000000000094000000 000000000000000000000000000104000000000000000000000000000000000000FF368300000000 00000000000007018000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000800000000000000000000000000000000000000FFFE2D000000000000000000 00024000000000000000000000000000000000000000000000000008400000000000000000000000 00000000000800000000000000000000000000000000000000FF011C000000000000000000000121 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF8D88000000000000000000000402800000 00000000000000000000000000000000000000000014000000000000000000000000000000000010 00000000000000000000000000000000000000FF9B29000000000000000000000280000000000000 00000000000000000000000000000000000008000000000000000000000000000000000008000000 00000000000000000000000000000000FF9DB4000000000000000000000004800000000000000000 00000000000000000000000000000000020000000000000000000000000000000000000000000000 00000000000000000000000000FF801B000000000000000000000040000000000000000000000000 00000000000000000000000004000000000000000000000000000000000000020000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFF491000000000000000000000100000000000000000000000000000000000000 00000000000000800000000000000000000000000000000000000000000000000000000000000000 00000000FFAD25000000000000000000000200000000000000000000000000000000000000000000 00000008800000000000000000000000000000000008000000000000000000000000000000000000 00FFC630000000000000000000000081800000000000000000000000000000000000000000000000 0000000000000000000000000000000000001000000000000000000000000000000000000000FFFA 92000000000000000000000201800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF40710000 00000000000000000144000000000000000080000000000000000000080000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFC8990000000000 00000000000200000000000000000100000000000000000000100000000000028000000000000000); SDR 8000 TDI (000000000200000000000000000000000000000000000000000000FFE11B00000000000000000002 80008000000000000000000000000000000000000000000080000000510000000000000000000000 000000000000000100000000000000000000000000000000FFAD9A00000000000000000000000000 00000000000000000000000000000000000000000100000000000000000000000000000000000000 000000000000000000000000000000000000000000FFB84000000000000000000000800080000000 00000000000000000000000000000000000000000800000000000000000000000000000400000800 000000000000000000000000000000000000FF97D800000000000000000004000180000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF25EB00000000000000000000025000000000000000000000 00000000000000000000000000000800000000000000000000000000000000000800000000000000 000000000000000000000000FF469D00000000000000000000000280000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF24E800000000000000000000008400000000000000000000000000000000 00000000000000000018000000000000000000000000000000000000000000000000000000000000 000000000000FFB86300000000000000000000004200000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF3E9900000000000000000000008000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFC2E900000000000000000000031000000000000000000000000000000000000000000000000008 40000000000000000000000000000000000800000000000000000000000000000000000000FF8B38 00000000000000000000045000000000000000000000000000000000000000000000000010000000 00000000000000000000000000001000000000000000000000000000000000000000FF3E99000000 00000000000000008000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF1CEC000000000000 00000000021280000000000000000000000000000000000000000000000008000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000FF23C10000000000000000000000 A0000000000000000000000000000000000000000000000000100400000000000000000000000000 0000001004000000000000000000000000000000000000FF82C10000000000000000000000080000 00000000000000000000000000000000000000000000080000000000000000000000000000000000 0800000000000000000000000000000000000000FF7C310000000000000000000001000000000000 00000000000000000000000000000000000000001400000000000000000000000000000000000400 0000000000000000000000000000000000FF039A0000000000000000000000C18000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FFE50000000000000000000000002B8000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFD8EC0000000000000000000000A40000000000000000000000000000 00000000000000000000006000000000000000000000000000000000000000000000000000000000 0000000000000000FF453800000000000000000000000A0000000000000000000000000000000000 00000000000000080000000000000000000000000000000000080000000000000000000000000000 0000000000FF42990000000000000000000000018000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFC65E0000000000000000000000018000000800000000000000000000000000000000000000 000800288000000000000000000000000000000800000080000000000000000000000000000000FF F9240000000000000000000000000640060800000000000000000000000000000000000000001000 000000000000000000000000000000001000000000000000000000000000000000000000FF7BED00 00000000000000000000000000000000000000000000000000000000000000000000001000000000 000000000000000000000000001000000000000000000000000000000000000000FFC0DA00000000 00000000000000000040000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF338000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000FFEDBB000000000000000000008102 00000000000000000000000000000000000000A02000000000040000000000000000000000000000 00000004000000000000000000000000000000000000FF00DB000000000000000000000030000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF1ECD000000000000000000000002000000000000 00000000000000000000000000000000000000040000000000000000000000000000000000040000 00000000000000000000000000000000FFF168000000000000000000000084000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FFA34E000000000000000000000023800000000000000000000000 00000000000000000000000000040000000000000000000000000000000000040000000000000000 00000000000000000000FF5CFB0000000000000000000000A9800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FFD8F3000000000000000000000111800000000000000000000000000000000000 00000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FF4299000000000000000000000001800000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF831A0000000000000000000000A1800000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FFE3 0E000000000000000000000013800000000000000000000000000000000000000000000000000400 0000000000000000000000000000000004000000000000000000000000000000000000FF42990000 00000000000000000001800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF196C0000000000 00000000000009800000000000000000000000000000000000000000000000080400000000000000 0000000000000000000804000000000000000000000000000000000000FFDE630000000000000000 00000002000000000000000000000000000000000000000000000000001000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000000000000000FFFF6600000000000000000000008080 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF38E300000000000000000000002200000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000FF0F960000000000000000000000C480000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF876200000000000000000000000200000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF20FB00000000000000000000002800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF662E00000000000000000000000008000000000000000000000000000000 00000000000000000000000000000000000000000000000000000400000000000000000000000000 000000000000FF7F3E00000000000000000000000004000000000000000000000000000000000000 00000000000000000000000000000000000000000000000100000000000000000000000000000000 000000FF0B2600000000000000000000000180000000000000000000000000000000000000000000 00000000000000000000000000000000000000000240000000000000000000000000000000000000 FFE45E00000000000000000000000182000000000000000000000000000000000001404000000000 00000000000000000000000000000000000020000000000000000000000000000000000000FFF550 00000000000000000000000008000000000000000000000000000000000000000000000000000000 00000000000000000000000000000080000000000000000000000000000000000000FFA78C000000 00000000000000810400000000000000000000000000000000000000000001404000000000000000 00000000000000000000000000000000000000000000000000000000000000FF233E000000000000 00000000000180000000000000000002000000000000000000000000002000000000000000000000 00000000000000000000000000000000000000000000000000000000FFBD7A000000000000000000 00000180000000000000000002000000000000000000000001400000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000FF416D0000000000000000000000000000 00000000000000000000000000000000000000000000002800000000000000000000000000000000 0020000000000000000000000000000000000000FFA0880000000000000000020000000000000000 00000000000000000000040000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFBED30000000000000000000000000000000000000000 00000000000000020000000000000000002800000000000000000000000000000000003000000000 0000000000000000000000000000FF70E70000000000000000001400001000000000040000000000 04051000000004004000040000000000000000000000000001000000000000004000000000000000 0000000000000000000000FF9F520000000000000000020000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000800040000000000000000 0000000000000000FFB7470000000000000000001200001000000000020000000000020508000000 02002000020000000000000000000000000001000000000000004000020000000000000000000000 0000000000FFAC4D0000000000000000000000000000000000000000000000000000000000000000 00000000000200000000000000000000000000000000000200000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD43500 00000000000000000000220000000000000000000000000000000000000000000000000002000000 000000000000000000000000000002000000000000000000000000000000000000FF208700000000 00000000000000888000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFBF5A00000000000000 00000000100000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF617C00000000000000000000 01098000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000004008000000000000000000000000000000000FF6BB1000000000000000000000046040002 00000000000000000000000000000000000000000000040000000000000000000000000000000000 04000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF3A5A000000000000000000080000000000000000000000 00000000000000000000000000000000840000000000000000000000000000002080040000000000 00000000000000000000000000FF434E000000000000000000080060000000000000000000000000 00000000000000000000000002800000000000000000000000000000002080000000000000000000 00000000000000000000FFC352000000000000000000000100000000000000000000000000000000 00000000000000000004000000000000000000000000000000000000100000000000000000000000 00000000000000FFFF20000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000100000000000000000000000000000 00000000FFD5E1000000000000000000000000040000000000000000000000000000000000000000 00000800000000000000000000000000000000000000200000000000000000000000000000000000 00FF94AA000000000000000000000100000000000000000000000000000000000000000000000000 0280000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF39370000 00000000000000000000040000000000000000000000000000000000000000000008000200000000 0000000000000000000000000022000000000000000000000000000000000000FFC8E30000000000 00000000000000000000000000000000000000000000000000000000000000048000000000000000 0000000000000000000000000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (004000000000000000000000000000000000000000FF40FB00000000000000000000000000000000 00000000000000020200000000000000000000000206000000000000000000000000000000806006 000000000000000000000000000000000000FF0A2300000000000000000000000000000000000000 00000000000000000000020020000000000000000000000000000000000000000000004000000000 000000000000000000000000000000FFF0F600000000000000000000000000000000000000000000 00000000110000040040000000000016040080000000000020040000000001006006000000000000 000000000000000000000000FF616900000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000400000000004004000000000000000000 000000000000000000FFF39D00000000000000000000000000000000000000000000000000000000 00000000000000000004000000000000000000000000000000004004000000000000000000000000 000000000000FFC88800000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000004804000000000000000000000000000000 000000FFA6CF00000000000000000000000000000000000000000000000000000000000000000000 0000000400000000000000000000000000000000C004000000000000000000000000000000000000 FFBF8400000000000000000000004400000000000000000000000000000000000000000000000004 02000000000000000000000000000000084802008000000000000000000000000000000000FF828F 00000000000000000000001000000000000000000000000000000000000000000000000000000000 00000000000000000000000000600000000000000000000000000000000000000000FF6DD4000000 00000000000000006804000000000000000000000000000000000000000000000004040000000000 00000000000000000000009004000000000000000000000000000000000000FF4C2D000000000000 00000000000400000000000000000000000000000000000000000000000002000000000000000000 00000000000001900004008000000000000000000000000000000000FF5E05000000000000000000 00010000000000000000000000000000000000000000000000000000040000000000000000000000 00000000001004008000000000000000000000000000000000FFA150000000000000000000000080 00000200000000000000000000000000000000000000000002000000000000000000000000000000); SDR 8000 TDI (6010000000000000000000000000000000000000FF59B60000000000000000000000000000000000 00000000000000000000000000000000000000100800000000000000000000000000000121300000 0000000000000000000000000000000000FFAA950000000000000000000000000000000000000000 00000000000000000000000000000000088000000000000000000000000000000000081000000000 0000000000000000000000000000FF911A0000000000000000000000000000000000000000000000 00000000000000000000000000001000000000000000000000000000000060200000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FFDF4D0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000001E00800000000000000000000000000000000 0000FF6FCC0000000000000000000000000000000000000000000000000000000000000000000000 000800000000000000000000000000000000806808000000000000000000000000000000000000FF D6880000000000000000000000000000000000000000000000000000000000000000000000000080 00000000000000000000000000000020E000000000000000000000000000000000000000FF6A3200 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000004000000000000000000000000000000000000000FFAB6600000000 00000000000000000000000000000000000000000000110000000000000000000010000000000000 000000000000000000006000000000000000000000000000000000000000FFDF6700000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000006000000000000000000000000000000000000000FFFA2E00000000000000000000 00000000000000000000000000040400000000000000000000000200000000000000000000000000 000000004000000000000000000000000000000000000000FF7C6700000000000000000000000000 00000000000000000000000000000000000000000000000000020080000000000020020200000000); SDR 8000 TDI (00000000000000000000000000000000000000FF7BED000000000000000000000000000000000000 00000000000000000000000000000000000010000000000000000000000000000000000010000000 00000000000000000000000000000000FFD453000000000000000000000000000000000000000000 00000000000000000000000000002000000000000000000000000000000000080000000000000000 00000000000000000000000000FF6FD7000000000000000000000000000000000000000000000000 0000000000000000000000000A000000000000000000000000000000008008000000000000000000 00000000000000000000FF3FC0000000000000000000000000000000000000000000000000000000 00000000000000000000800000000000000000000000000000000002000000000000000000000000 00000000000000FFFD10000000000000000000000000000000000000000000000000000000000000 00000000000000020000000000000000000000000000000004000000000000000000000000000000 00000000FF601B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000008800000000000000000000000000000000000 00FF20A0000000000000000000000000000000000000000000000000000000000000000000000000 0200000000000000000000000000000000000000000000000000000000000000000000000000FF08 0C0000000000000000000000000000000000000000000000000000000000000000000000000C8000 0000000000000000000000000000000000000000000000000000000000000000000000FF4E690000 00000000000000000000000000000000000000000000000000000000000000000000110000000000 0000000000000000000001001000000000000000000000000000000000000000FF4EEE0000000000 00000000000000000000000000000000000000000000000000000000000000000200000000000000 0000000000000000000800000000000000000000000000000000000000FFBF0C0000000000000000 00000000000000000000000000000000000000000000000000000000088000000000000000000000 0000000000002082000000000000000000000000000000000000FF3D1B0000000000000000000000 000000000000000000000000000000000000000000000000000A0000000000000000000000000000 0000000800000000000000000000000000000000000000FF60DC0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000000000000000000000000000FFFC9C00000000000000000000000000000000000000 00000000000000000000000000000000000084000000000000000000000000000000550404000000 000000000000000000000000000000FF75F200000000000000000000000000000000000000000000 00000000000000000000000000000200000000000000000000000000000000008000000000000000 000000000000000000000000FF20A000000000000000000000000000000000000000000000000000 00000000000000000000000200000000000000000000000000000000000000000000000000000000 000000000000000000FF3E7100000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000500080000000000000000000000000 000000000000FF360A00000000000000000000000000000000000000000000000000000000000000 00000000000C00000000000000000000000000000000230800000000000000000000000000000000 000000FF5DB900000000000000000000000000000000000000000000000000000000000000000000 00000080000000000000000000000000000000080000000000000000000000000000000000000000 FFBFB100000000000000000000000000000202000000000000000000000000000000000000000000 02000000000000000000000000000000000002100000000000000000000000000000000000FF3000 00000000000000000000000004602202000000000000000000000000000000000000000000020000 00000000000000000000000000000002000000000000000000000000000000000000FFA767000000 00000000000000000000002000000000000000000000000000000000000000000000000000000000 00000000000000000000000008000000000000000000000000000000000000FF5D6B000000000000 00000000000004000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000080000000000000000000000000000000000FF5C5C000000000000000000 00000000000000000000000000000000000000000000000000004000000000000000000000000000 00000008000000000000000000000000000000000000000000FFFF20000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000010000000000000000000000000000000000000FF7BED000000000000000000000000000000 00000000000000000000000000000000000000000010000000000000000000000000000000000010); SDR 8000 TDI (0000000000000000000000000000000000FFA0890000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000600400000000 0000000000000000000000000000FFF39D0000000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000000400400000000000000 0000000000000000000000FF2A2B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000400600000000000000000000 0000000000000000FFF39D0000000000000000000000000000000000000000000000000000000000 00000000000000000400000000000000000000000000000000400400000000000000000000000000 0000000000FFF39D0000000000000000000000000000000000000000000000000000000000000000 00000000000400000000000000000000000000000000400400000000000000000000000000000000 0000FF8C730000000000000000000000000000000000000000000000000000000000000000000000 000004000000000000000000000000000000004000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFD93400 00000000000000000000000000000000000000000000000000000000000000000000000004000000 000000000000000000000000000004000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFDBEF00000000000000 00000000000000000000000000000000000000000000000000000000000A84000000000000000000 000000000000000A04000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF0F1200000000000000000000000000 00000000000000000000000000000000000000000000001006000000000000000000000000000000 2A9006000000000000000000000000000000000000FF25A300000000000000000000000000000000 00000000000000000000000000000000000000000900000000000000000000000000000000020880); SDR 8000 TDI (00000000000000000000000000000000FF4304000000000000000000000000000000000000000000 00000000000000000000000000000000400000000000000000000000000000004021000000000000 00000000000000000000000000FF0AFC000000000000000000000000000000000000000000000000 00000000000000000000000000220000000000000000000000000000002000020000000000000000 00000000000000000000FFEE05000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000A81000000000000000000000000 00000000000000FFDF67000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000060000000000000000000000000000000 00000000FFF512000000000000000000000000040000020000000000000000000000000000000000 00000000000400000000000000000000000000000060080000000000000000000000000000000000 00FF9D60000000000000000000000000020000000000000000000000000000000000000000000000 0000000000000000000000000000000000006000000000000000000000000000000000000000FFCE 61000000000000000000000000000000020000000000000000000000000000000000000001000002 0000000000000000000000000000004000000000000000000000000000000000000000FF60DC0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000006010000000000000000000000000000000000000FFDF670000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000006000000000000000000000000000000000000000FFF0330000000000000000 00000000000000000000000000000000000000000000000000020000000000000000000000000000 0000000000004000000000000000000000000000000000000000FFF0330000000000000000000000 00000000000000000000000000000000000000000000020000000000000000000000000000000000 0000004000000000000000000000000000000000000000FF88290000000000000000000000000000 00000000000000000000000000000000000000000000800400000000000000000000000000000000 6004000000000000000000000000000000000000FF8C730000000000000000000000000000000000 00000000000000000000000000000000000000000400000000000000000000000000000000400000); SDR 8000 TDI (000000000000000000000000000000FFEA3C00000000000000000000000080000000000000000000 00000000000280000000000000000200000000000000000000000000000000402200000000000000 000000000000000000000000FFC17204000000010000400410000584001000010000000000000004 40000000010000000000010000000000000000000000000000000400006800000000000000000000 000000000000000000FFC88500000000000000000000060000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF6E5704000000008000200208000282001000008000000000000002400000000080 00000000010000000000000000000000000000000200002000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF84E700000000000000000000000000000000000000000000000000000000000000000000000001 50000000000000000000000000000000400000000000000000000000000000000000000000FF77CE 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000200000000000000000000000000000000000000FFCC1A000000 00000000000000000000000000000000000000000000000000000000000000000000080000000000 00000000000000000000000000000000000000000000000000000000000000FF5449800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000002AA000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FFB2C1000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00556400000000000000000000000000000000000000FFE0FB000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000AA0 00000000000000000000000000000000000000FFCC1A000000000000000000000000000000000000 00000000000000000000000000000000000000080000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000FFC6060000000000000000000000000000000000000000000000 00000000000000000000000000000400000000000000000000000000000014600400000000000000 0000000000000000000000FFAEF20000000000000000000001018000000000000000000000000000 00000000000000000000010000000000000000000000000000000009C00000000000000000000000 0000000000000000FFDA190000000000000000000000018000006000000000000000000000000000 00000000020000000000000000000000000000000000000000400000000000000000000000000000 0000000000FF6FF00000000000000000000000000000000000000000000000000000000000000000 00020000000000000000000000000000000000000004600000000000000000000000000000000000 0000FF301D0000000000000000000000000000000000000000000000000000000000000000000000 000000040000000000000000000000000000006888000000000000000000000000000000000000FF F3A70000000000000000000001218000000000000000000000000000000000000000000000000180 000000000000000000000000000000004000000000000000000000000000000000000000FF62DE00 00000000000000000000018000000000000000000000000000000000000000000000000000000000 000000000000000000000000006010000000000000000000000000000000000000FF3AA000000000 00000000000000000000000000000000000000000000000000000000000000000000020000000000 000000000000000000006080000000000000000000000000000000000000FFF0FA00000000000000 00000000200000000000000000000000000000000000000000000000000100000000000000000000 000000000000006000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF6A3200000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 004000000000000000000000000000000000000000FF15D200000000000000000000000080000000 000000000000000000000000000000000000000002A8000000000000000000000000000000002200 000000000000000000000000000000000000FF56EF00000000000000000000000000000000000000 00000000000000000500000000000000000002000000000000000000000000000000001002000000); SDR 8000 TDI (00000000000000000000000000FFD206000000000000000000000000000100040000000015042054 05100000000881400000200000000001000000800400800000000000000040040000000000000000 00000000000000000000FFBE2F000000000000000000000000000028000000000000000001000000 00004000000000000000240000000000000000000004000000000040040000000000000000000000 00000000000000FFA28B000000000000000000000001800000000000000000000000000000000000 00000000000000000000000000000000000000000000000060040000000000000000000000000000 00000000FF1B58000000000000000000000201800000000000000000000000000000000000000000 00000000040000000000000000000000000000008040040000000000000000000000000000000000 00FF2BFA000000000000000000000101802000000000000000000000000000000000000000000000 0006000000000000000000000000000000044006000000000000000000000000000000000000FF63 CB000000000000000000100011800000000000000000000000000000000000000000000000000400 0000000000000000000000000000904004000000000000000000000000000000000000FF9C020000 00000000000000000001800000000000000000000000000000000000000000000000000000000000 0000000000000000000000404800000000000000000000000000000000000000FFCB520000000000 00000000000209802000000000000000000000000000000000000000000000001400000000000000 0000000000000001284004000000000000000000000000000000000000FFF2510000000000000000 00080101800000000000000000000000000000000000000000000000000400000000000000000000 0000000000024004000000000000000000000000000000000000FF426D0000000000000000000000 01800000000000000000000000000000000000000000000000000000000000000000000000000000 0000805084000000000000000000000000000000000000FF67EB0000000000000000000000000000 00000000000000000000000000000000000000000000010800000000000000000000000000000000 4404000000000000000000000000000000000000FFC1170000000000000000000000020020000000 0000000000000000000000000000000000000000E000000000000000000000000000000020630400 0000000000000000000000000000000000FF20770000000000000000000000020020000000000000 00000000000000000000000000000000000400000000000000000000000000000040480400000000); SDR 8000 TDI (000000000000000000000000FFE7E600000000000000000000004080000000000000000000000000 00000000000000000000000002000000000000000000000000000000002002000000000000000000 000000000000000000FF3A4A00000000000000000000001000000000000000000000000000000000 00000000000000000088000000000000000000000000000000000060000000000000000000000000 000000000000FFDCF200000000000000000000010400000000000000000000000000000000000000 00000000000500000000000000000000000000000000018000000000000000000000000000000000 000000FFE2C80000000000000000000000A000000000000000000000000000000000000000000000 00000000000000000000000000000000000000226080000000000000000000000000000000000000 FFF2CF00000000000000000000022400000000000000000000000000000000000000000000000008 00000000000000000000000000000000D168C0000000000000000000000000000000000000FF40EC 00000000000000000000008180000000000000000000000000000000000000000000000001100000 00000000000000000000000000046000000000000000000000000000000000000000FFDD65000000 00000000000000000180000000000000000000000000000000000000000000000000000000000000 00000000000000000000006000000000000000000000000000000000000000FFEAC5000000000000 00000000010400000000000000000000000000000000000009000000000000000000000000000400 00000000000000006000000000000000000000000000000000000000FF330D000000000000000000 00020000000000000000000000000000000000000010000000000002800000000000000000000000 00000000004000000000000000000000000000000000000000FFA171000000000000000000000401 80000000000000000000000001000000000000000000000000000000000000000000000000000000 00004000000000000000000000000000000000000000FF128C000000000000000000000001882028 00000000000A82202A81800000002880200200200004200000800000800000800002000000000050 00000000000000000000000000000000000000FF88AF000000000000000000000200000000000000 00000000000000000000000000000000000000848000000000000000000000000000000070040000 00000000000000000000000000000000FF01A400000000000000000000037C104080020000000000 00000002080000000000000400000000048000000000000000000000000000000040040000000000); SDR 8000 TDI (0000000000000000000000FF16BC0000000000000000000002040000000000000000000000000000 000000000000000000000800000000000000000000000000000000800C0000000000000000000000 0000000000000000FF144A0000000000000000000000308000000000000000000000000000000000 00000000000000020000000000000000000000000000000000200000000000000000000000000000 0000000000FF2AE90000000000000000000000800000000000000000000000000000000000000000 0000000004180000000000000000000000000000002A800000000000000000000000000000000000 0000FF20A00000000000000000000000000000000000000000000000000000000000000000000000 000200000000000000000000000000000000000000000000000000000000000000000000000000FF 2F530000000000000000000000CA0000000000000000000000000000000000000000000000000000 0000000000000000000000000000002A8200000000000000000000000000000000000000FF5E4200 00000000000000000003340000000000000000000000000000000000000000000000000840000000 000000000000000000000000A10800000000000000000000000000000000000000FFEE6000000000 00000000000004000000000000000000000000000000000000000000000000001000000000000000 000000000000000001001000000000000000000000000000000000000000FFBE5700000000000000 00000000800000000000000000000000000000000000000000000000000000000000000000000000 000000000000140000000000000000000000000000000000000000FFA37600000000000000000000 02008000000000000000000000000000000000000000000000000A00000000000000000000000000 000000802800000000000000000000000000000000000000FFBFFD00000000000000000000024C00 00000000000000000000000000000000000000000000000840000000000000000000000000000000 D50800000000000000000000000000000000000000FFB13700000000000000000000015180000000 00000000000000000000000000000000000000000500000000000000000000000000000000116000 000000000000000000000000000000000000FF23D900000000000000000000040280000000000000 00000000000000000000000000000000001000000000000000000000000000000001003040000000 000000000000000000000000000000FF8F6A00000000000000000000020200000000000000000000 00000000000000000000000000000800000000000000000000000000000000980800000000000000); SDR 8000 TDI (00000000000000000000FF9B06000000000000000000000031800000000000000000000000000000 00000000000000000000080000000000000000000000000000000040020000000000000000000000 00000000000000FF99EF000000000000000000000080000000000000000000000000000000000000 00000000000000200000000000000000000000000000000640000000000000000000000000000000 00000000FFD705000000000000000000000020000000000000000000000000000000000000000000 00000008000000000000000000000000000000001068000000000000000000000000000000000000 00FF5342000000000000000000000015800000000000000000000000000000000000000000000000 0000000000000000000000000000000000216000000000000000000000000000000000000000FFB6 9100000000000000000000000180000000000000000000000000000000000000000000000000000A 0000000000000000000000000000006100000080000000000000000000000000000000FF840F0000 0000000000000000000001A000000000000000000000000000000000000000000000000000000000 0000000000000000000000006600010600000000000000000000000000000000FFC9FD0000000000 00000000000000002010000000000000000000000000000000000000000000000000000000000000 0000000000000000007000000000000000000000000000000000000000FFC70D0000000000000000 00000000000008000000000000000000000000000000000000000000000000000000000000000000 0000000000000000008000000000000000000000000000000000FF02440000000000000000000000 00000000000000000000000000000000000000000051010800000000000000000000000000000000 0400080000000000000000000000000000000000000000FFA9460000000000000000800000008000 00000000000000000000000000000000000000000000000014000000000000000000000000000000 2100000100000000000000000000000000000000FF53AC0000000000000000000001860000000000 00000000000000000000000000000000000028900000000000000000000000000000000000000000 0000000000000000000000000000000000FFD6620000000000000000800000008000000000000000 00000000000000000000000000000010900000000000000000000000000000000010280000000000 0000000000000000000000000000FFF0B20000000000000000000000018000000000000000000000 00000000000000000028808820000000000000000000000000000000020000600200000000000000); SDR 8000 TDI (000000000000000000FF09AA00000000000000000000000380000000000000000000000000000000 000000000000000000440000000000000000000000000000000AE104000000000000000000000000 000000000000FF170100000000000000000000008180000000000000000000000000000000000000 000000000000800000000000000000000000000000002AC204000000000000000000000000000000 000000FF141A00000000000000000000015180000000000000000000000000000000000000000000 00000304000000000000000000000000000000404004000000000000000000000000000000000000 FF0E8600000000000000000000001180000000000000000000000000000000000000000000000004 10000000000000000000000000000000004000000000000000000000000000000000000000FF2C1F 00000000000000000000008380000000000000000000000000000000000000000000000000000000 00000000000000000000000000004080000000000000000000000000000000000000FF5494000000 00000000000000000180000000000000000000000000000000000000000000000003040000000000 00000000000000000000084004000000000000000000000000000000000000FF4EC0000000000000 00000000003180000000000000000000000000000000000000000000000000200000000000000000 00000000000000234004000000000000000000000000000000000000FF03AE000000000000000000 00004580000000000000000000000000000000000000000000000000080000000000000000000000 00000000006804000000000000000000000000000000000000FFCA3D000000000000000000000008 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00004004000000000000000000000000000000000000FF91C1000000000000000000000080000000 00000000000000000000000000000000000000000018000000000000000000000000000000002AD0 04000000000000000000000000000000000000FF6DBD000000000000000000000040000000000000 00000000000000000000000000000000000010400000000000000000000000000000000048000000 00000000000000000000000000000000FF7631000000000000000000000104000000000000000000 00000000000000000000000000000000040000000000000000000000000000005560040000000000 00000000000000000000000000FFE9E6000000000000000000000093800000000000000000000000 000000000000000000000000000200000000000000000000000000000028C0000000000000000000); SDR 8000 TDI (0000000000000000FF0D600000000000000000000000100000000000000000000000000000000000 00000000000000008000000000000000000000000000000028010000000000000000000000000000 0000000000FFD9B90000000000000000000000000001000000000000000000000000000000000000 0000000000000800A000000000000000000000000000611000000000000000000000000000000000 0000FF5B690000000000000000000000000400000000000000000000000000000000000000000000 000000000000000000000000000000000000006000000000000000000000000000000000000000FF A38F0000000000000000000000018000000000000000000000000000000000000000000000000000 000000000000000000000000000000006040000000000000000000000000000000000000FF64EE00 00000000000000000100018200000000000000010000000000000000000000010100000000000000 0000000000000000000000000060A0000000000000000000000000000000000000FF664300000000 00000000000000000001000000000000000000000000000000000000000000000000100140000000 000000000000000000006010000000000000000000000000000000000000FFB7F300000000000000 00000000000000000000000000000000000000000000000000000000010000000000000000000000 000000000000004000000000000000000000000000000000000000FF109B00000000000000000001 00018000000000000000000000000000000000000000000000008000000000000000000000000000 000200004000000000000000000000000000000000000000FF816E00000000000000000000000180 00000000000000000000000000000000000000000000000000000000000000000000000000000201 064000000000000000000000000000000000000000FF6A3A00000000000000000000000000000000 00000000008000000000000000000000008080000004000000000000000000000000000000806004 000000000000000000000000000000000000FF86D300000000000000000000002800000000000000 00000000000000000000000000000000000008000000000000000000000000000000004000000000 000000000000000000000000000000FF6D1000000000000000000000000000000000000000000000 00000000000000000000000000000304000000000000000000000000000000004404000000000000 000000000000000000000000FF5D510000000000000000000000C600000000000000000000000000 000000000000000000000000000000000000000000000000000000002AC004000000000000000000); SDR 8000 TDI (00000000000000FF1DC6000000000000000000011601000600000000080000000000000000002000 00000000000002080800000000000000000000000000000000280000000000000000000000000000 00000000FF590900000000000000000010088282200200400000000000000100000000000000000A 00000000001000000000000000000000000000000020000000000000000000000000000000000000 00FF120C000000000000000000008000100000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF03 FC000000000000000000200000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000400000000000000000000000000000000000000000FF00C10000 00000000000000000040000000000000000000000000000000000000000000000000008000000000 0000000000000000000000000200000000000000000000000000000000000000FF5F0C0000000000 00000000000008000000000000000000000000000000000000000000000000040000000000000000 0000000000000000000000000000000000000000000000000000000000FF42E78000000000000000 00000082800000000000000000000000000000000000000000000000000000000000000000000000 00000000002AA400000000000000000000000000000000000000FF6A0D0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000040000000000000000000000000000000000000000FF02FB0000000000000000000001498000 00000000000000000000000000000000000000000000040000000000000000000000000000000055 6000000000000000000000000000000000000000FFB9A00000000000000000000000A08000000000 00000000000000000000000000000000000000030000000000000000000000000000000020A08000 0000000000000000000000000000000000FF177E0000000000000000000000020000000000000000 00000000000000000000000000000000010000000000000000000000000000000000000000000000 0000000000000000000000000000FF17A20000000000000000000000968000000000000000000000 00000000000000000000000000000000000000000000000000000000000010200000000000000000 0000000000000000000000FF3FDE0000000000000000000000400000000000000000000000000000 00000000000000000000040000000000000000000000000000000005000000000000000000000000); SDR 8000 TDI (000000000000FF9D1C00000000000000000000180180000000000000000000000000000000000000 0000000000000000000000000000000000000000000000C000000000000000000000000000000000 000000FF7D1B00000000000000000000180180000000000000000000000000000000000000000000 00000000000000000000000000000000000000006000000000000000000000000000000000000000 FFF3EA00000000000000000000180984000000000000000000000000000000000000000000000000 000000000000000000000000000000000D6000000000000000000000000000000000000000FFFFDF 00000000000000000000186180000000000000000000000000100000000000000000000000000000 00000000000000000000000000014820000000000000000000000000000000000000FF7A22000000 00000000000000185380000000000000000000000000000000000000000000000000000000000000 00000000000000000000006000000000000000000000000000000000000000FF3174000000000000 00000000180184000000000000000000000000000000000000000000000000000000000000000000 000000000000000AE800000000000000000000000000000000000000FF8D9F000000000000000000 00180580000000000000000000000000000000000000000000000000000000000000000000000000 00000000006020000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF6A32000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000040 00000000000000000000000000000000000000FFAD19000000000000000000001801800000000000 00000000000000000000000000000000000000000000000000000000000000000000000030000000 00000000000000000000000000000000FF7F01000000000000000000000000000000000000100000 00000000000000400000000000000004080000000000000000000000000000000000280000000000 00000000000000000000000000FFBDE5000000000000000000000800800000000000000000000000 00000000000000000000000000001000000000000000000000000000004020000000000000000000 00000000000000000000FF13610000000000000000005019038C4004004000000000000001000000 00000000001400000000001000000000000000000000000000000068000000000000000000000000); SDR 8000 TDI (0000000000FFDB360000000000000000000000018000000000000000000000000000000000000000 00000000000400000000000000000000000000000000000400000000000000000000000000000000 0000FFD1A10000000000000000000000018000000000000000000000000000000000000000000000 000002000000000000000000000000000000000006000000000000000000000000000000000000FF 11970000000000000000000200018000000000000000000000000000000000000000000000000004 000000000000000000000000000000000004000000000000000000000000000000000000FFEA3400 00000000000000000000018000000000000000000000000010000000000000000000200400000000 000000000000000000000000208400000000000000000000000000000000000000FF95A400000000 00000000000018018000000000000000000000000000000000000000000000000004000000000000 000000000000000000004100000000000000000000000000000000000000FFD57800000000000000 00000218418000000000000000000000000000000000000000000000000206000000000000000000 000000000000004086000000000000000000000000000000000000FF208D00000000000000000000 18018000000000000000000000000010000000000000000000200000000000000000000000000000 000000214404000000000000000000000000000000000000FF006D000000000000000000001C0180 00000000000000000000000000000000000000000000000004000000000000000000000000000000 284004000200000000000000000000000000000000FF9146000000000000000000001A0180000000 00000000000000000000000000000000000000000000000000000000000000000000000000304004 000200000000000000000000000000000000FF67AF00000000000000000000180181800000000000 0000000000000000000000000000000000061C000000000000000000000000000000006204000000 000000000000000000000000000000FF7FA400000000000000000000184180000000000000000000 00000000000000000000000000000004000000000000000000000000000000004400000000000000 000000000000000000000000FF64D800000000000000000000180180002000000000000000000000 00000000000000000200000084000020000000000000000000000000046004000000000000000000 000000000000000000FF216F00000000000000000000184180002000000000000000000000100000 000000000002000000E0000020000000000000000000000000024000000000000000000000000000); SDR 8000 TDI (00000000FFD418000000000000000000080080000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF3E27000000000000000000008001800000000000000000000000000000000000000000000000 0000000000000000000000000000000000210000000000000000000000000000000000000000FFAF 61000000000000000000028231800000000000000000000000000000000000000000000000080000 0000000000000000000000000000000800000000000000000000000000000000000000FF02020000 00000000000000082081800000000000000000000000000000000000000000000000000000000000 0000000000000000000000200000000000000000000000000000000000000000FF104C0000000000 00000000600001800000000000000000000000000000000000000000000000000200000000000000 0000000000000000000002000000000000000000000000000000000000FF83190000000000000000 00000401800000000000000000040000000000000000050000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF42990000000000000000000000 01800000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FFB55B0000000000000000000004018000 00000000000000000000010000000000000000000000002800000000000000000000000000000000 0000000000000000000000000000000000000000FF03A20000000000000000000000018000000000 0000000000000001000000000000080000000000500002280000000800000000A800000000000000 0000000000000000000000000000000000FF7FED0000000000000000000002018000002000000000 00000000000000000000000000000000000480000000000000000000000000000000000400000000 0000000000000000000000000000FF87BE0000000000000020000002018000002000000000000000 00000008000000000000000008000080000000000000000000000000000000000000000000000000 0000000000000000000000FF45110000000000000040000000018000000000000000000400000000 1000000005100000001000040000300000001000000000B000000000000400000000000000000000 0000000000000000FFE7C60000000000000000000000018000000000000000000000000000000000 00000000000000000000040000000000000000000000000000000400000000000000000000000000); SDR 8000 TDI (000000FF2DF80000000000000000000AA4AA00000000000000000000000000000000000000000000 000001000000000000000000000000000000002A8200000000000000000000000000000000000000 FF1B3C00000000000000000040000000000000000000000000000000000000000000000000000002 000000000000000000000000000000000A9000000000000000000000000000000000000000FFBAA4 0000000000000000000AA0AA00000000000000000000000000000000000000000000000000000000 000000000000000000000000002A8000000000000000000000000000000000000000FFA668000000 00000000000015435400000000000000000000000000000000000000000000000008000000000000 00000000000000000000400000000000000000000000000000000000000000FF2D93000000000000 00000040000000000000000000000000000000000000000000000000000010020000000000000000 00000000000000001402000000000000000000000000000000000000FF2A91000000000000000000 2AA0AA00000000000000000000000000000000000000000000000000000000000000000000000000 00000000028100000000000000000000000000000000000000FFACCA000000000000000000000400 80000000000000000000000000000000000000000000000008000000000000000000000000000000 00000800000000000000000000000000000000000000FFF476000000000000000000400401000000 0000000000000000000000000000000000000000000A00000000000000000000000000000000A808 80000000000000000000000000000000000000FFD7A2000000000000000000100021800000000000 00000000000000000000000000000000000000000000000000000000000000000000000000100000 00000000000000000000000000000000FF73E8000000000000000000000080800000000000000000 00000000000000000000000000000010100000000000000000000000000000000091000000000000 00000000000000000000000000FF8B20000000000000000000300221000000000000000000000000 00000000000000000000000008000000000000000000000000000000008008100000000000000000 00000000000000000000FF989E000000000000000000022508800000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF9D30000000000000000000000040000000000000000000000000000000000000 00000000000000100000000000000000000000000000000001000000000000000000000000000000); SDR 8000 TDI (0000FF9355000000000000000000401A018000000000000000000000000000000000000000000000 000800000000000000000000000000000000000800000000000000000000000000000000000000FF AAE90000000000000000000018018000000000000000000000000000000000000000000000000080 000000000000000000000000000000000000000000000000000000000000000000000000FF27D200 00000000000000000018018000000000000000000000000000000008000000000000000000200000 000000000000000000000000000000000220000000000000000000000000000000FFC4E100000000 00000000000018818000000000000000000000000000000008000000000000000000008000000000 000000000000000000000000000000000000000000000000000000000000FF558F00000000000000 00000018818000100000000000000000000000000000000000000000000000008000000000000000 000000000000000480000000000000000000000000000000000000FF3A0300000000000000000000 00000000000000000000000000000000000000000000000000000000200000000000000000000000 000000000100000000000000000000000000000000000000FF6BED00000000000000000002000000 00000000000000000000000000000000000000000040000000000000000000000000000000000000 040000000000000000000000000000000000000000FFBB3400000000000000000000080080001000 00000000000000000000000000000000000000000000000000000000000000000000000008000400 000440000000000000000000000000000000FF9C5300000000000000000040140100000000000000 00000000000000000000000000000000001000000000000000000000000000000000001000000000 000000000000000000000000000000FF6AB6000000000000000000400C0080000000000000000000 00000000000000000000000040001002000000000000000000000000000010041002000000000000 000000000000000000000000FF284600000000000000000002180180000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF965800000000000000000040120100000000000000000000000000000000 00000000000000000882000000000000000000000000000000000802000000000000000000000000 000000000000FFE14E00000000000000000000080080000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00FFCC39000000000000000000155955800000000000000000000000000000000000000000000000 0004000000000000000000000000000000000004000000000000000000000000000000000000FFE2 E7000000000000000000001801800000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF195E0000 000000000000000AB8AB800000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF7B480000000000 00000000001801800000000000000000000000000000000000000000000000000400000000000000 0000000000000000000004000000000000000000000000000000000000FF31C60000000000000000 00001801800000000000000000000000000000000000000000000000000200000000000000000000 0000000000000000000000000000000000000000000000000000FF46640000000000000000000018 018000000000000000000000000000000000000000000000000A8400000000000000000000000000 0000000A06000000000000000000000000000000000000FF5AEC000000000000000000001A018000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF490C0000000000000000006018AB8000000000 00000000000000000000000000000000000000100400000000000000000000000000000000140400 0000000000000000000000000000000000FF62B30000000000000000000018018000000000000000 000000000000000000000000000000000A0000000000000000000000000000000000088000000000 0000000000000000000000000000FFF066000000000000000000001D558000000000000000000000 00000000000000000000000000008400000000000000000000000000000000000400000000000000 0000000000000000000000FF6168000000000000000000201CAB8000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF82DC0000000000000000000018018000000000000000000000000000000000 00000000000000020000000000000000000000000000000000000000000000000000000000000000 0000000000FF368F0000000000000000000018AB8000000000000000000000000000000000000000 00000000030000000000000000000000000000000000008000000000000000000000000000000000); SDR 8000 TDI (FFCE9D00000000000000000000180180402000000000000000000000000000000000000000000000 00030000000000000000000000000000000000000000000000000000000000000000000000FF31C6 00000000000000000000180180000000000000000000000000000000000000000000000000020000 00000000000000000000000000000000000000000000000000000000000000000000FF0185000000 00000000000000180180202002000000000000000000000000080000000000000000020200000000 0000000000000000005000000A000000000000000000000000000000000000FF4EEF000000000000 00000000180180000000000000000000000000000000000000000000000000000100000000000000 00000000000000000000000000000000000000000000000000000000FF95C1000000000000000000 001A0180000000000000000000000000000000000000000002000000000000000000000000000000 00000000080000000000000000000000000000000000000000FFD2F2000000000000000000001C01 80000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFBBB2000000000000000000401C01800000 00000000000000000000000000000000000004000180000000000000000000000000000000510000 00000000000000000000000000000000000000FF4465000000000000000000201801800000000000 00000000000000000000000000000000000000040000000000000000000000000000000800040000 00000000000000000000000000000000FFE2E7000000000000000000001801800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF66DB000000000000000000001A01800000000000000000000000 00000000000000000000000000040000000000000000000000000000010000040000000000000000 00000000000000000000FF80F10000000000000000000AB8AB800000000000000000000000000000 00000000000000000000040000000000000000000000000000000000040000000000000000000000 00000000000000FF7B48000000000000000000001801800000000000000000000000000000000000 00000000000000040000000000000000000000000000000000040000000000000000000000000000 00000000FF80F10000000000000000000AB8AB800000000000000000000000000000000000000000 00000000040000000000000000000000000000000000040000000000000000000000000000000000); SDR 8000 TDI (13E10000000000000000000800820000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFBF6E00 00000000000000000000000000000000000000000000000000000040000000000000000150000000 000000000000000000000000000810000000000000000000000000000000000000FF7DF400000000 00000000002000000000000000000000000000000000000000000000000000000200000000000000 000000000000000000000200000000000000000000000000000000000000FFF89000000000000000 00000002000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF7A808000000000000000000A A8AA8000000000000000000000000000000000000000000000000400000000000000000000000000 000000000000000000000000000000000000000000000000FFF5F000000000000000000020140100 00000000000000000000000000000000000000000000000002000000000000000000000000000000 000002000000000000000000000000000000000000FFDF2B000000000000000000555D5580000000 00000000000000000000000000000000000000000000000000000000000000000000000000000400 000000000000000000000000000000000000FF38F80000000000000000002AA8AA80000000000000 00000000000000000000000000000000000080000000000000000000000000000000000000000000 000000000000000000000000000000FFB37300000000000000000000040100000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF61080000000000000000000AB8AA80000000000000000000000000 00000000000000000000000000000000000000000000000000000000000100000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FFB33E00000000000000000000000000000000000000000000000000000000000000 00000000000080000000000000000000000000000000000100000000000000000000000000000000 000000FF32DD00000000000000000000180180000002000000000000000000000000080000000000 00000000000000000000000000000000000000000010000000000000000000000000000000000000); SDR 8000 TDI (26000000000000000000001801800000000000000000000000000000000000000000000000800000 0000000000000000000000000000006008000000000000000000000000000000000000FF90220000 00000000000000009999802000004004000004041000000000000000000000000000000000000000 0000000000000000000000004180000000000000000000000000000000000000FFD7DA0000000000 00000000081831800000000000000000000000000000000000000000000000000000000000000000 0000000000000000006000000000000000000000000000000000000000FF63F60000000000000000 00091801800000000000000000000000000000000000000000000000800000000000000000000000 0000000000006008000000000000000000000000000000000000FF67920000000000000000000018 C1802000000000000000000000000000000000000000000000000000000000000000000000000000 0000006100000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FF6A320000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000400000 0000000000000000000000000000000000FF7E8C0000000000000000000008018000000000000000 0000000000000000000000000000000002A800000000000000000000000000000000200800000000 0000000000000000000000000000FF233F0000000000000000000110000000000000000000000000 00010000042000000000000000000000000000000000000000000000000000180000000000000000 0000000000000000000000FFDE530000000000000000000088408000000040000000000000000080 00020000000000000000020010000000000000000000000000000006200000000000000000000000 0000000000000000FFAF050400000000000140000118039000000000400000000000000000110000 00040000000040001000000001000000000000000000004000700200000000000000000000000000 0000000000FF39E50000000000000000001011210006000020000000000000000000000000000000 00000000000008000000000000000000000000000000000000000000000000000000000000000000 0000FF0C9C04000000000000A0000108009000000000200000000000000000110000000200000000 200010000000010000000000000000000020002000000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000000180180000000000800800000000000000000000000000000000002040000 A0100000000000000000000000144084000000000000000000000000000000000000FFA790000000 00000000000001381184004000000000000000000000000000000000000000002000040000000000 00000000000000000000004004000000000000000000000000000000000000FFC84E000000000000 00000000180180000000000000000000000000000000000000000000000000000000000000000000 00000000000000004000000000000000000000000000000000000000FFD6B1000000000000000000 00384980000000000800800000000000000000000000000000002000040000A00000000000000000 00000000004004000000000000000000000000000000000000FFAC54000000000000000000009801 84004000000000000000000000000000000000000000000002040000001000000000000000000000 00124104000000000000000000000000000000000000FF6841000000000000000000001809800000 00000000000000000000000000000000000000000000000000000000000000000000000000000040 04000000000000000000000000000000000000FFC9C7000000000000000000001801800000000000 00000000000000000000000000000000000000000000000000000000000000000000100058040000 00000000000000000000000000000000FFA46D000000000000000000001841800000000000000000 00000000000000000000000000000000000000000000000000000000000000080040040000000000 00000000000000000000000000FF1B75000000000000000000001811800000000000000000000000 00000000000000000000000000040000000000000000000000000000000060040000000000000000 00000000000000000000FFC45C000000000000000000201801800000000000000000000000008000 00000200000000200080040000200000000000000000000000000060840000000000000000000000 00000000000000FFA13B000000000000000000419901800018004004080004041003808000000002 00000600201880001800200000002000000000000000000450000000000000000000000000000000 00000000FF5E7A000000000000000000001811800000000000080000000004000000000000000000 00000000020000080000002000000000000000000060420000000000000000000000000000000000 00FF8EAD000000000000000000001801800000000000000000000000000000000000000000000000 0000000008000000000000000000000000045040000000000000000000000000000000000000FF4C); SDR 8000 TDI (0000000000000000051A038000000000000000000000000000000000000000000000000C80000000 000000000000000000000000806800000000000000000000000000000000000000FFDAB800000000 00000000000838218000000000000000000000000000000000000000000000000010000000000000 0000000000000000002C6000000000000000000000000000000000000000FF764D00000000000000 00006018018000000000000000000000000000000000000000000000000000000000000000000000 000000000000004000000000000000000000000000000000000000FF2E2000000000000000000000 18158000000000000000000000000000140000400040100000000000000000000000000000000000 000000286000000000000000000000000000000000000000FF3D2600000000000000000000180180 000000000000000000000000000004000000000000800002A8000000000000000000000000000000 006000000000000000000000000000000000000000FFF1C400000000000000000000180180000000 00000100000000000200000048000000000000000000000000000000100000000000000000004000 000000000000000000000000000000000000FF0EB200000000000000000000180180000000000000 002A00000000000000000A8000000000000400008020000000000008020000000000404000000000 000000000000000000000000000000FFCB3E00000000000000000000180180000000000001000000 000004000004500000000001000000AC000000000000100000000000000000086804000000000000 000000000000000000000000FF9C3700000000000000000000183580000000000000800000000000 0000800000000800000000000E000000000000000000000000000000004806000000000000000000 000000000000000000FF960500000000000000000000184180000000000001000A00000000001500 00550050100000000010010040000000000008020000000000006004000000000000000000000000 000000000000FF95AF00000000000000000000180180000000000000004000000000000000000000 00000000000004000000000000000000000000000000004004000000000000000000000000000000 000000FFB7A000000000000000000000180180000000000000000000000000000000000000000000 00000000000000000000000000000000000000004004000000000000000000000000000000000000 FF51E100000000000000000000180180000000000000000000000000000000000000000000000000 04000000000000000000000000000000004004000000000000000000000000000000000000FFBC0E); SDR 8000 TDI (000000000000000AA0AA000000000000000000000000000000000000000000000000000800000000 00000000000000000000002A8000000000000000000000000000000000000000FF9E390000000000 000000005543540000000000000000000000000000000000000000000000000A0000000000000000 0000000000000000840800000000000000000000000000000000000000FF57BD0008000000000000 00200400000000000000000000000000000000000000000000000000140000000100000000000000 0000000001001400000000000000000000000000000000000000FFADCB0008000000000000000AA0 AA000000000000000000000000000000000000000000000000000000000000000000000000000000 0000490000000000000000000000000000000000000000FFFD79000000000000000000000A008000 000000000000000000000000000000000000000000000A00000000000000000000000000000000A4 2800000000000000000000000000000000000000FF24F60000000000000000000014010000000000 00000000000000000000000000000000000000082000000000000000000000000000000081080000 0000000000000000000000000000000000FF512A0000000000000000000458038000000000000000 00000000000000000000000000000000000000000000000000000000000000000000600800000000 0000000000000000000000000000FFF4D40000000000000000002108C08000000000000000000000 0000000000000000000000000015480000000000000000000000000000013230C000000000000000 0000000000000000000000FF58080000000000000000000273010000000000000000000000000000 000000000000000000000B9000000000000000000000000000000098094000000000000000000000 0000000000000000FFC4890200000000000000004C88228000000000000000000000000000000000 00000000000000000000000000000000000000000000000000200000000000000000000000000000 0000000000FFE7FE0000000000000000002000440000000000000000000000000000000000000000 00000000004800000000000000000000000000000000401000000000000000000000000000000000 0000FF275A0000000000000000002004000000000000000000000000000000000000000000000000 000000000000000000000000000000000000600000000000000000000000000000000000000000FF 47E10000000000000000000118018000000000000000000000000000000000000000000000000400 000000000000000000000000000000066000000000000000000000000000000000000000FF16F704); SDR 8000 TDI (00000000000000180180002002000000000000000000000000000000000000000000002000000000 00000000000000000000006000000000000000000000000000000000000000FFBA56000800000000 00000000180004A00002000000000000000000000000000000000000000000000000000000000000 00000000000000006018000000000000000000000000000000000000FF2F6D000000000000000000 00181000C00000002000000400000000000000000000000000000002000000000000000000000000 00000000007100000000000000000000000000000000000000FF2C92000800000000000000000000 00002000004000000000000000000000000000000000000002000000000000000000000000000000 00000000000000000000000000000000000000000000FFE4CB000000000000000000004000000000 00000000000000000000000000000000000000802000000000000000000000000000100000000080 00000000000000000000000000000000000000FF9313000000000000000008001810840000000000 00000400000000000080000000000000000000004000000000000000000000000000000021000000 00000000000000000000000000000000FFDAD8400800000000000000404400000000000000000000 00000000000000000200000200000810000000000000000000000000000000000000000000000000 00000000000000000000000000FF0881400000000000000008400C00800000000000000000000000 00000080000200000400004810000000000000000000000000000000000128000000000000000000 00000000000000000000FF84F3000000000000000000001801800000000000000000000000000000 00000000000000800000000000000000000000000000080000000060000000000000000000000000 00000000000000FFE7AF000000000000000000201400000000000000000000000000000000000000 00000000000008080000008000000000000000000000008008000000000000000000000000000000 00000000FF0375000000000000000000000800800000000000000000000000000000000000000000 00000002000000000000000000000000000000000022000000000000000000000000000000000000 00FF6EA60000000000000000004AA0AA000000000000000000000000000000000000000000000000 00000000000000000000000000000000002A8000000000000000000000000000000000000000FF8B 64000800000000000000000000000000000000000000000000000000000000000000000000002200 0000000000000000000000000000080002000000000000000000000000000000000000FF36250000); SDR 8000 TDI (00000000000AB8938000000000000000000000000000000000000000000000000180000000000000 000000000000000000004000000000000000000000000000000000000000FF761600000000000000 00000018018000000000000000000000000000000000000000000000000044000000000000000000 000000000000444004000000000000000000000000000000000000FF8C2C00000000000000000000 18498000000000000000000000000000000000000000000000000200000000000000000000000000 000000114104000000000000000000000000000000000000FFF29800000000000000000040180180 00000000000000000000000000000000000000000000000808000000000000000000000000000000 004804000000000000000000000000000000000000FFB5A200000000000000000000180000000000 00000000000000000000000000000000000000000000000000000000000000000000000000004004 000000000000000000000000000000000000FF79B50000000000000000000ABAAA00000000000000 000000000000000000000000000000000010000000000000000000000000000000002AF004000000 000000000000000000000000000000FF669100080000000000000020180000000000000000000000 00000000000000000000000000000040000000000000000000000000000000094800000000000000 000000000000000000000000FFEE5F000000000000000000155D5400000000000000000000000000 0000000000000000000000000C000000000000000000000000000000556004000000000000000000 000000000000000000FFA70F0000000000000000000ABAAB80000000000000000000000000000000 00000000000000001002000000000000000000000000000000224002000000000000000000000000 000000000000FF5446400000000000000000401A0180000000000000000000000000000000000000 00000000000000000000000000000000000000000000004000000000000000000000000000000000 000000FF36A20000000000000000000AB8AA00000000000000000000000000000000000000000000 00000020000000000000000000000000000000006000000000000000000000000000000000000000 FFACE820000000000000000020180000000000000000000000000000000000000000000000000008 00000000000000000000000000000000486800000000000000000000000000000000000000FF487C 00000000000000000000180180000000000000000000000000000000000000000000000000000000 00000000000000000000000000054000000000000000000000000000000000000000FFC589000000); SDR 8000 TDI (000000000418018000A0000000002000000002020800020000000000002014000028000000600000 0000000000000000004000000000000000000000000000000000000000FF2EAF0000000000000000 00001A11800000010000000001000000000000000000000000000000000005010000600000000000 0000000001006400040000000000000000000000000000000000FF80C80000000000000000080018 01800000000000000000000000000000000000000000000000000000000000600000000000000000 0000004000000000000000000000000000000000000000FF80490000000000000000106018018000 00000000000002000000000000000000000000000000000000000000600000000000000000008100 6000000000000000000000000000000000000000FF529B800000000000000000441A018000000000 00000002000000000000000000000000000000000000000000600000000000000000008100400000 0000000000000000000000000000000000FF110C800000000000000000201C018000000000000000 0000000000000000000000000000000A000400000000600000000000000000000080600400000000 0000000000000000000000000000FF448C8008000000000000000018098000000000000000000000 00000000000000000000000000020000000000600000000000000000000000640000000000000000 0000000000000000000000FFDE4B000000000000000000001A018000000000000000000000000000 00000000000000000000001000000000600000000000000000000000400400000000000000000000 0000000000000000FF9D960000000000000000000AB8E78000000000000000000000000000000000 0000000000000000800000000060000000000000000000002AC00600000000000000000000000000 0000000000FF82330000000000000000000018438000000000000000000000000000000000000000 00000000000000000000400000000000000000000000408400000000000000000000000000000000 0000FF66E90000000000000000000AB8898000000000000000000000000000000000000000000000 0002080000000060000000000000000000002AC204000000000000000000000000000000000000FF 3E450010000000000000001559018000000000000000000000000000000000000000000000000444 00000000400000000000000000000052C004000000000000000000000000000000000000FFA8A080 00000000000000000018018000000000000000000000000000000000000000000000000080000000 006000000000000000000000004000000000000000000000000000000000000000FF744400000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000001080000000000000000 00000000000000000000000000000000000000000000000000000000FF5A01080000000000000000 20020000000000000000000000000000000000000000000000000002000000000000000000000000 00000000000400000000000000000000000000000000000000FF2EBD8000000000000000004AACAA 80000000000000000000000000000000000000000000000001000000002AA0000000000000000000 002AA000000000000000000000000000000000000000FF4390000800000000000000201001000000 00000000000000000000000000000000000000000000000000000000000000000000000000000100 00000000000000000000000000000000000000FFEFB5000000000000000000155955800000000000 00000000000000000000000000000000000000100000005560000000000000000000005564000000 00000000000000000000000000000000FF4FD40000000000000000004AA8AA800000000000000000 00000000000000000000000000000004800000002AA0000000000000000000000220800000000000 00000000000000000000000000FF86B8080000000000000000001000000000000000000000000000 00000000000000000000000004000000000000000000000000000000000000000000000000000000 00000000000000000000FFB9F98000000000000000000AA8AB800000000000000000000000000000 00000000000000000000420000002AA0000000000000000000005820000000000000000000000000 00000000000000FFBD20000000000000000000000000000000000000000000000000000000000000 00000000000002000000000060000000000000000000000400020000000000000000000000000000 00000000FFD1B4800000000000000000000000000000000000000000000000000000000000000000 00000000A00000000060000000000000000000002100800000000000000000000000000000000000 00FF5E7B000000000000000000001811800000000000002000000000000000020000000000000000 0000028000006000000000000000000000006100020000000000000000000000000000000000FFFA BE0000000000000000000018018000A0010000000001000002020800000000000000002000010050 0100006000000000000000000000006000000000000000000000000000000000000000FF2E8A0000 00000000000000001801800000000000000000000000000000000000000000000000008000000000 6000000000000000000000006480000000000000000000000000000000000000FFE2C90000000000); SDR 8000 TDI (00000000218000000000000000000000000000000000000000000000000000000000006000000000 000000000000806000000000000000000000000000000000000000FF2E0D00000000000000000004 00218000000000000000000000004000000000000000000000000400288001000000000000000000 000028006902000000000000000000000000000000000000FFB5C700000000000000000000400980 00000000000008000000000000000000000000000000000000000000000000000000000000000000 006002000000000000000000000000000000000000FFC87A00000000000000000000000000000000 00000000000000000000000000000000000000000000000000006000000000000000000000000000 000000000000000000000000000000000000FF4FE000000000000000000000000000000000000000 00000000004000000000000000000000000000000000006000000000000000000000800000000000 000000000000000000000000000000FFA47F000000000000000000000001A0000020000000000000 00282000000000000000000000000000000000000000000000000000000000002000000000000000 000000000000000000000000FFF89A00010000010010000000200220000030000010000000000240 00000100008000008000000020080000284048000000400000000080800008000000000000000000 000000000000000000FFCE1300000000000000000000000080000000000000600000000A20000000 00000000000000000000000000002000000000000000000000002000000000000000000000000000 000000000000FF448A00000000000400000400000180000000000004000000000041000400000001 00000040020000010000004000440000000000000000006000000000000000000000000000000000 000000FF9A4300008000008008000000261300000008000008018000000040000000800080000080 00000020080000284028000000200000000080000008000000000000000000000000000000000000 FF942C00000000000200000400000080000000000004000000000001000200000001000000400200 00008000002000240000000000000000002000000000000000000000000000000000000000FF9F7A 00000000000000000000000800000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF97A9000000 00000000000000000000000000000000000000004000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF5C06000000000000); SDR 8000 TDI (00000001800100000000018000000000400000000000000000000000000000000105600000000000 0000000000004100000000000000000000000000000000000000FFA2AA1000000000000000000003 03820020000008400200800800C00000000000000000008800803408002000600000000000000000 0000004094000000000000000000000000000000000000FFC3BE000000000000000040000001E146 82100142204204000040000000000180000000000000000001010135600000000000000000000000 4000000000000000000000000000000000000000FF761B0000000000000000000000018000000000 00000200000000000000000000000000002000000400000100600000000000000000000012000400 0000000000000000000000000000000000FF51900800000000000000000000818000000000000002 0000000040000000000000000000200000000000000060000000000000000000000A410000000000 0000000000000000000000000000FF3E2C0000000000000000000060018000000000000002000000 00000000000000000000000000001400000000600000000000000000000000408400000000000000 0000000000000000000000FF50BE0000000000000000000000018000000000000002000000000000 00000000000000000000000000000100600000000000000000000100600800000000000000000000 0000000000000000FF0FE80000000000000000000800018880480200000000000008020000200000 00000000000000000408000010600000000000000000000000200400000000000000000000000000 0000000000FFBDDC00000000000000000008406188C00E02C07401001800081A4018200000000000 11007019800008000000E00000000000000000000000410000000000000000000000000000000000 0000FF115B0000000000000000400000958400000080000002050000004000000000000000000500 00028000008003600000000000000000000000E000200000000000000000000000000000000000FF 7D860000000000000000000001038000200000000002000000004000000000000000000010000500 00010000000000000000000000000000C000000000000000000000000000000000000000FF203400 00000000000000000200018000000000000002000000004000000000000000000000000000490000 000000000000000000000028002100000000000000000000000000000000000000FF8AF100000000 00000000400060198440000040140102050000004000000000000000110500000200000000146000 000000000000000000004900400000000000000000000000000000000000FFB8C900000000000000); SDR 8000 TDI (00000180000000000000000000000040000000000000000000000000000000000060000000000000 00000000004000000000000000000000000000000000000000FFBC33000004000000000010004000 00000000000000020000000040100000000000000000000000000000000000000000000000000000 00282000000000000000000000000000000000000000FF4331000000000000000000000000600000 00000000020002080040000000000000000000080000000000000000000000000000000000000040 00000000000000000000000000000000000000FF1C07000000000000000000000001800000000000 00000000400043480002880000000002005004300000008060005004000000000000000062000000 00000000000000000000000000000000FF3581000000000000000000000003800000000008000028 00000040400002982800000002A00002E00000800062280000000000800002004044000000000000 00000000000000000000000000FF39BD0000000000000000000002000000002002000000800C3000 049000030000000000041050040C0000010060005004000000000000008820040000000000000000 00000000000000000000FFA02B0000000000000000000003E00000002002003EA080080000028000 00000080200000080000000000000060000080000000000000000060000000000000000000000000 00000000000000FF99A6000004000000000010004002000000000010000050000000051000050851 00400005300005240000800060480100000001000004008040040000000000000000000000000000 00000000FF43BD000000000000000000000000000000000000014000000000400000000000000000 00000000000000000064000000000000000000000040000000000000000000000000000000000000 00FF53D7000000000000000000000001800000000000000000000000000000000000000000000000 0004000000006000000000000000000000000004000000000000000000000000000000000000FFBF AF000000000000000000000001800000000000000200000000000000000000000000000000000000 0001006000000000000000000000004000000000000000000000000000000000000000FFE23F0000 00000000000040000401A1000400000A000200800800C00000000000000000008000000401012020 6000000000000000000000004004000000000000000000000000000000000000FFE6F80000000000 00000000000005A24040080140004004000020400000000000000000001001004010000008600000 0000000000000000004000000000000000000000000000000000000000FFD9000000000000000000); SDR 8000 TDI (00000000000000000002000000000000000000000000000000001080000001000000000000000000 000000029500000000000000000000000000000000000000FFA0B30000000000000000000002AA00 000000000000020000002A8000000000000000000000000102000000288000000000000000000000 000202000000000000000000000000000000000000FFF59F00000000000000000000000080000000 00000000000000000000000000000000000000000800000000842000000000000000000000C42800 000000000000000000000000000000000000FF8F3200000000000000000000000000000000000000 00000000804000000000000000000000000C80000000804000000000000000000000888880000000 000000000000000000000000000000FF319A00000000000000000000002180000000000000000000 0000400000000000000000000000000000000008C000000000000000000000006000000000000000 000000000000000000000000FF731E00000000000000000000060480000000000000000000010020 000000000000000000000010000000010020000000000000000000014A3110000000000000000000 000000000000000000FF031E00000000000000000000048000000000000000000000008040000000 00000000000000000800000000900000000000000000000000E08800000000000000000000000000 000000000000FF619B00000000000000000000000280000000000000020000000020000000000000 000000000000000000000040000000000000000000001C2008000000000000000000000000000000 000000FF8C9C000000000000000000000004000000000000000200000028C0000000000000000000 00000000000000086000000000000000000000000000000000000000000000000000000000000000 FF1B6E00000000000000000000004800000000000000000000000200000000000000000000000000 00000000216000000000000000000000000110000000000000000000000000000000000000FFD2E4 00000000000000000000002000000000000000000000000000000000000000000000000000200000 00000000000000000000000000006000000000000000000000000000000000000000FF11F2000000 0000000000000002A200000000000000020000009440000000000000000000000008400000008800 00000000000000000000A06810000000000000000000000000000000000000FFC48B000000000000 00000000000980000000000040000000002100000000000000000000000000000000004060000000 0000000000000008E000000000000000000000000000000000000000FF3587000000000000000000); SDR 8000 TDI (03800000000000000000000000001000000000000000000001002200000000400000000000000000 0000006102000000000000000000000000000000000000FFF4770000000000000000000000000020 00044000000020000002004000000000000000000000002800008000600000000000000000000000 0000000000000000000000000000000000000000FFB4510000000000000000000000000000000000 00010004000000000000000000000000000000000000000000600000000000000010008002000000 0000000000000000000000000000000000FF6AEE0000000000000000000000008000000000000000 10000000000001000000000000000001000004001000400000000000000000000000200000000000 0000000000000000000000000000FFCFA70000000000000000000004010000000000000000000081 00000000000000000000000000100000000100000000000000000000000000100000000000000000 0000000000000000000000FF9D700000000000000000000004008000000000000000000081000000 00000000000000000000100000000100200000000000000010000000300000000000000000000000 0000000000000000FF886B0000000000000000000000018000000000000080020000000000000000 00000000000000000000000000400000000000000000008002600000000000000000000000000000 0000000000FF4D2500000000000000000000000100000000000000000000004C0000000000000000 000000000C8000000080400000000000000000000014088000000000000000000000000000000000 0000FF53290000000000000000000000008000000000000000000000000000000000000000000000 000000000000042000000000000000000000202000000000000000000000000000000000000000FF 15580000000000000000000002AA0000000000000000000000108000000000000000000000000000 000000288000000000000000000000008200000000000000000000000000000000000000FF1B6600 00000000000000000000000000000000000002000000000000000000000000000000000002000000 000000000000000000000000008002000000000000000000000000000000000000FFBEB000000000 00000000000004AA00000000000000000000002500000000000000000000000002000000002C8000 000000000000000000300000000000000000000000000000000000000000FF0A5800000000000000 00000005540000000000000000000000550000000000000000000000000C00000000D50000000000 000000000000D40A80000000000000000000000000000000000000FFF98500000000000000000000); SDR 8000 TDI (80000000000000000000000000000000000000000000000000000000000060000000000000000000 00404000000000000000000000000000000000000000FFC2EE000000000000000000000015800000 0000000000000000448000000000000000000000000C840000008420000000000000000000000C4B 04000000000000000000000000000000000000FF61C7000000000000000000000041800000000000 00000000000000000000000000000000000000000000000060000000000000000000002140000000 00000000000000000000000000000000FF5EF7000000000000000000000281800000000000000000 000108000000000000000000000000100400000028A0000000000000000000000070040000000000 00000000000000000000000000FF47E0000000000000000000000001800000000000000000000000 00000000000000000000000009000000000060000000000000000000000448000000000000000000 00000000000000000000FF3FB0000000000000000000000555800000000000000000000040000000 0000000000000000000084000000D520000000000000000000004364040000000000000000000000 00000000000000FF09E90000000000000000000004D380000000000000000000002A800000000000 0000000000000000000000A8E0000000000000000000002842000000000000000000000000000000 00000000FF0A6E00000000000000000000020180000000000000000000000D000000000000000000 00000002000000000020000000000000000000000840800000000000000000000000000000000000 00FF91B500000000000000000000008180000000000000000000002A800000000000000000000000 04000000002C8000000000000000000000016100000000000000000000000000000000000000FFFB 66000000000000000000000011800000000000000000000100000000000000000000000000080000 0000804000000000000000000000436800000000000000000000000000000000000000FF8A7E0000 00000000000000000045800000000000000000000000000000000000000000000000048000000004 6000000000000000000000084300000000000000000000000000000000000000FF1C6A0000000000 000000000000018020000000000A0020000002008008802000000000000000000800000800200000 0000000000000000006040000000000000000000000000000000000000FF896C0000000000000000 000000038000000440000A001000180000C808002000000000000000000004010000000000000000 00000000000060A0000000000000000000000000000000000000FFED090000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000008000000008004000000000000000000080 000000000000000000000000000000000000000000FF80C000000000000000200000200180000000 00000000000001800000000000000000000008000000000000004000000000000000000100000000 000000000000000000000000000000000000FFE09B00000000000000200000040180000000000000 00000001000000000000000000000008010000000010004000000000000000000000010000000000 000000000000000000000000000000FFE8D300000000000000002000020180000000000000000000 00000000000000000000000000000004008000004000000000000000000008000004000000000000 000000000000000000000000FFBD4A00000000000000000000000180000000000000000000000000 00000000000000000000000006000000024000000000000000000000000002000000000000000000 000000000000000000FF98D600000000000000000000000180000000000000020000008000000000 00000000000000000004000000404000000000000000000000000004000000000000000000000000 000000000000FF18940000000000000000000000AB80000000000000020000000000000000000000 0000000000000400000008C0000000000000000000002A8000000000000000000000000000000000 000000FFC0AC00000000000000000000000180000000000000020000000000000000000000000000 000000060000000000000000000000000000000A8006000000000000000000000000000000000000 FFA0B70000000000000000000000AB80000000000000000000000000000000000000000000000000 040000002AC0000000000000000000002A8000000000000000000000000000000000000000FF98FC 00000000000000000000015580000000000000000000000000000000000000000000000000040000 00550000000000000000000000400004000000000000000000000000000000000000FF761E000000 00000000000000000180000000000000020000000000000000000000000000000000040000000040 00000000000000000000000000000000000000000000000000000000000000FFBCCD000000000000 0000000000AB800000000000000000000000000000000000000000000000000200000028E0000000 000000000000000A4002000000000000000000000000000000000000FFD968000000000000000000 00000180000000000000000000000000000000000000000000000000040000000220000000000000 0000000000C004000000000000000000000000000000000000FFC9B7000000000000000000000001); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000AA00000000000000000000000 0002000000000000000000000000000000000000FF3B6D0000000000000000000002010000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000FFB29F0000000000000000000003558000000000000000 00000000000000000000000000000000000000000015600000000000000000000000050000000000 0000000000000000000000000000FFC6ED0000000000000000000000AA8000000000000000000000 0000000000000000000000000000000000002AA00000000000000000000000028000000000000000 0000000000000000000000FF1CC70000000000000000000000010000000000000000000000000000 00000000000000000000000000000020000000000000000000000000000000000000000000000000 0000000000000000FF0C6C0000000000000000000000AA8000000000000000000000000000000000 0000000000000000000000002AA00000000000000000000000000000000000000000000000000000 0000000000FF1E8E0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000400000000000000000000000040000000000000000000000000000000000 0000FF35AE0000000000000000000000000000000000000000000000000000000000000000000000 000000000000006000000000000000000000000080000000000000000000000000000000000000FF CC0B0000000000000000000000018000400A00000020000000000110080200000000000000080100 220010004000000000000000000000000000000080000000000000000000000000000000FF6DCB00 000000000000000000000185400000400012000280A0000000008000000000000000048208000000 004000000000000000000000000550000000000000000000000000000000000000FFD56000000000 00000000000000018220000020000200000000000000000000000000000000020008000000004000 000000000000000000000000000000000000000000000000000000000000FF782300000000000000 00000000018000200A000000200280A0000008088200000000000000008200010000004000000000 000000000010010008000000000000000000000000000000000000FF239A00000000000000000000 00018100000000000800000000000100000000000000000000080100420010004000000000000000 0000000004A0000100000000000000000000000000000000FF18F900000000000000002000400180); SDR 8000 TDI (80800000000020000040000000000000000020060000000020840060000000000000000000000001 08000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FFCFE9000000000000000000000000000000001001000000 00000000000000000000000000008040008040008000000000000000000000000000000000000000 00000000000000000000000000FF64AD00000000000000002000180080082488080880000020A000 A0000000000000000030020020880020020020000000000000000000000002A80000000000000000 00000000000000000000FF051B000000000000004000010001000000000000000000100000100000 00800000000008000000000000008000000000500000000000000000000000000000000000000000 00000000000000FF3BD7000000000000002020008800800822840800818000208000A00000000000 000077674306208101A0020060000000280000000000000602A80000000000000000000000000000 00000000FFBA4A140144004010000010103C218018018110050000004D0000690000000000050001 50060160005060160060000000000000004000001100000000000000000000000000000000000000 00FFD2AA000000000000000000001101000000021001000180400000000000000000000000480000 0000000000004000000000000000000000000000000000000000000000000000000000000000FF87 A71400A4002010000010100C00A00800810802800000230000210000000000030001200201200048 2812002000000000000000400000110000000000000000000000000000000000000000FF13260000 000000000000000020A0200000000000200000000000000000000000000000000000000000080000 0000000000000000000000000000000000000000000000000000000000000000FF97E20000000000 00000000000000000000100010200000004000000000010000000011014000001200000000000000 0000000000000000000000000000000000000000000000000000000000FF05440000000000000000 00000200000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000080000000000000000000000000000000000000FF5D460000000000000000000000 00000000000000000000000000000000000000000000000000000200000020000000000000000000 0000000402000000000000000000000000000000000000FF3C2E8000000000000000000004AA8000); SDR 8000 TDI (41100000482000306000020000001C00204104007005405486806000040440000020000000080004 000000000000000000000000000000000000FFB3DD00000000000000000048180180100100000020 04003000806000000000000000004004007004004002406000000000000000000000000004000000 000000000000000000000000000000FF3A3D000000000000000000241E0182100180100120000000 08806000000000000001800004006402007006A06000000000000000000000008002000000000000 000000000000000000000000FFF29600000000000000000010182182180180020000008020080040 00000000000000002004006004806006006000000000000000000000000004000000000000000000 000000000000000000FF739E00000000000000000000182180100180000000000020000040000000 00000000000007002005006004006000000000000000000000000004000000000000000000000000 000000000000FFBA6A00000000000000000800180B88180180000400000038000060000800004000 0010200600200400E000006000080000000000000000000004000000000000000000000000000000 000000FFC72000000000000002200C1219EB8F505181011A11C061660001F1200900003C01800045 845801001080040060004D0000400000000000800010040000800000000000000000000000000000 FF521300000000000002204002980180100180200000000461302240200000000000000140460000 00000100006080000000000000000001000000000001000000000000000000000000000000FF8B01 000000000000000200001801809801004000080002614024500000000004000008E8440040000808 06006000010000200000000000000008020000000000000000000000000000000000FF0635000000 00000000000001180180180100000040000060000040000000000000010060060040000000060060 00000000000000000000000000000000000000000000000000000000000000FFD2C3020000000000 000444131821A05051818100004081E0100069000100000000000044044009000001840261004400 0000000000000000008A000000000000000000000000000000000000FF5F29000000000000000000 0018018018018000002000806000004800000000000000004006000A020000040460000000000000 00000000000002000000000000000000000000000000000000FF6B8C000000000000000000001841 C0180180000000000160000040000000000000010030048004008028040060000000000000000000 00000000000000000000000000000000000000000000FFBD82020000000000000000031801801801); SDR 8000 TDI (00A0000042C680220602100000102000008A8060280008A000100000000000000000000000002800 0000000000000000000000000000000000FFAC4D000000000000000201801801800201825901B480 80400600613600048802000000644400020001600400000000000000000000000000000000000000 0000000000000000000000000000FF31DD000000000000000001C01801800001801901A000206086 0860060001A00282002246C4000460AB6C2509820028002000802008000000005000000000000000 0000000000000000000000FF1104000000000000000401801801A000008458019500006546006556 04041004004000611200080C0068A600000000080000000000000000000400000000000000000000 0000000000000000FFDE28000000000008000021801801A00088801801A200404206006286000000 04002004604000100480680E00200040080000000000000000000400000000000000000000000000 0000000000FF76A9000000000010000001C0180180021080180581008044060865060000B0410040 0145021060404A004309200010000001004010000000000000000000000000000000000000000000 0000FF8DA20000000000000000218018018001000018019450006106006006000000000400404000 006004000012002400000040000000000000000004000000000000000000000000000000000000FF D04A0000000000000000018018018000008008008000006006002006000000000000000000006000 006002002000000000000000000000000000000000000000000000000000000000000000FFC82500 00000000000000018018018000008018018010806006006006000000000001000000806005006003 002800000000000000000000000004000000000000000000000000000000000000FF2D3800000000 0000000101801809A280040008008200406426002006080800000800000108006004406002002000 000050000000000000000004000000000000000000000000000000000000FFA21C08000000000000 0005923845A0014000D915890014F006546006020800010A00420004016404806282002800020200 000020000000100004000000000000000000000000000000000000FF92A300000000000000000001 1801901001801001028100110000600000000000000100000D00E00001E006006000000000000000 000000000000000000000000000000000000000000000000FF8F7900000000000000000206382B88 902100940308010292A0026000080000008000020004006604006002806000000008000000000000 010004000000000000000000000000000000000000FF4F1B100000000000000700109801821105E0); SDR 8000 TDI (80008C200200200200000000000084200280A80084280A8020000000000000000000008008000000 00000000000000000000000000000000FFC4D00000000000000000010012013002532002000000A0 8004CB0004000000000000D0CD0C800C00888924800000000000000000000000000A000000000000 00000000000000000000000000FF6C05000000000000000001801801900081049801800002641600 600600000000000000402C4061080260341060100000000000000000000001000000000000000000 00000000000000000000FFA4F5000000000000000400A10840800404C84CD0800121300748200600 000000000033650712320130A50702A0000000000000000000001114000000000000000000000000 00000000000000FF1F4400000000000000000800302030020024030000008000089A020000000000 00010F0880D00980DA88110200100000000000000000001309000000000000000000000000000000 00000000FF9DB7000000000000000000A0080B8001008A88A0800060200220200200000000000150 24022020002130020020000000000000000000000000000000000000000000000000000000000000 00FF8B6F000000000000000000280440000000016052000000000040800000000000000000824004 041004072C284080000000000000000000000680000000000000000000000000000000000000FF88 61000000000000000000200400000000100000000000000000100000000000000000102000000200 0800158000000000000000000000000002000000000000000000000000000000000000FFE8800000 000000000000018318018000A4801009000007469600488600000000000000691E0A02200000C400 0000000000000000000000000000000000000000000000000000000000000000FF41910000000000 000002098A3A018002A1A13205000082528E8AC30600000000000084C08A900820C0820CA0010000 0000000000000000020A00000000000000000000000000000000000000FF0BBD0000000000000000 0180182B80000194195180002040064060060000000000001064442402810A00C412800000000000 0000000000000100000000000000000000000000000000000000FF24F30000000000000002018018 01800001801801800000780680600600000000000000480080000000000400000000000000000000 0000000000000000000000000000000000000000000000FF9D1A0000000000000004018018018000 01800804914000400600200600081040080001304610600080020000880000000000000000000000 0000000000000000000000000000000000000000FFEE410000000000000000018018018000018008); SDR 8000 TDI (00000100000000000000000110020000010400000100000010000000000000000100004000000000 000000000000000000000000000000FFD34900000000000000008000000080000C00094482000022 0A00004200000000021000221820204014200200200200001000000000000020A000040000000000 000000000000000000000000FF117000000000000000040040040100040040040018010010110010 00000000000001001000081028681009001010000000000000000000001000000000000000000000 000000000000000000FF0164000000000000000480400400800410400C0082010033070010060000 0000020100341649302A103013003006000000000000000000413002000000000000000000000000 000000000000FFD0B400000000000000000000000180000000180100000060060000060000000001 10026006006200006106006006000000000000000080006000000000000000000000000000000000 000000FF35B100000000000000000000020120000022432500002800048000040000000000009400 04800C00800008800004000000000000000000800A00000000000000000000000000000000000000 FF46CB000000000000000000200000800000110808800005200200000200000000000000A8020320 0000A522002002000000000000000000002000000000000000000000000000000000000000FF3C01 0000000000000000000AA0AA0AA0AA04014000000108002A80000000000000003112A83C00002B08 402A8000000000000000000000000000000000000000000000000000000000000000FF1386000000 00000000000000020000810000000000003400004210000000000000002511280000001001080000 00000000000000000000000400000000000000000000000000000000000000FFA123000000000000 0000000AA2AA0AA0AA08200A00004210002A80000000000000012002A82082002A12082A80000000 00000000000000000400000000000000000000000000000000000000FF3EE2000000000000000000 1541540840323543540000811000110000000000000000900400D50C00C50C20D510000000000000 00000000800800000000000000000000000000000000000000FF5D8E000000000000000000400000 40000040840000000808010000000000000000000200010010010001010008000000000000000000 01001000000000000000000000000000000000000000FF88F80000000000000000000AA0AA048080 0AA0AA00000000000008000000000000000008202A00002002002A80000000000000000000000000 00000000000000000000000000000000000000FFF0F6000000000000000000800A00824000A00A00); SDR 8000 TDI (00600601000600000000000001400204200000401200400600000000000000000000400000000000 0000000000000000000000000000FFE0B50000000000000000AA6AA2AB8000A008500480002AE2AE 0802AE00000000000024404228B0002842122AC00600000000000000000000500000000000000000 0000000000000000000000FF41730000000000000000002000018000200010018004016006000006 00000000000000400201680000400401400600000000000000000000480000000000000000000000 0000000000000000FF04210000000000000001541543558000140C10A88000556556090556000000 0000004164124C601445454455400600000000000000000000601400000000000000000000000000 0000000000FFD0B00000000000000000AA0AA4AB8000080A98A280004A62AE2C02AE000000000000 29430428402028E2AC2C600600000000000000000000400000000000000000000000000000000000 0000FF828B0000000000000000000000018001400110008000006006420006000000000000084084 014000086004006006000000000000000000004000000000000000000000000000000000000000FF C30B0000000000000000AA0AA0AB80010408709000000042AE2102AE000000000000044074240000 2462A2006006000000000000000000004040000000000000000000000000000000000000FF429E00 000000000000000040020180003400180400000440060200060000000000004040040A88000B600A 046006000000000000000000006800000000000000000000000000000000000000FFA10600000000 000000000000000180010004983080003160061080060000000000000CE50E000040006000314006 000000000000000000006020000000000000000000000000000000000000FF8FB800000000000000 00000000058221020110808000106016100006000000010000006006400000006008084006000008 000000000000006000020000000000000000000000000000000000FFDB1200000000000000000000 20038A00C0023000804048620E00829E180000000010006016002050244000004006000000000000 000000006080000000000000000000000000000000000000FF913000000000000000000000400988 000002304C80000562260482C6000080000000006006082300304300004006000000000000000000 006100000000000000000000000000000000000000FFFB1700000000000000000000001000202001 001000404280400A0000000080008000000000300290000488080000000000000000000000000000 000000000000000000000000000000000000FFF82900000000000000000000000000000000000000); SDR 8000 TDI (00860000000000000002800140048001014C40250060000006000000000001000160000000000000 00000000000000000000000000FF1CFF000000000000000400401809801800001001820200000600 100000000000028000600202000C8030030060000000000000000080002040240000000000000000 00000000000000000000FFFDE7000000000000000000201801801800001105000200000600000000 000000000000400A0500000020020060000000000000000000000041000000000000000000000000 00000000000000FF25B6000000000000000000001A01801000401429000000000600000000000000 00000060030061080020B28060000000000000000000000062080000000000000000000000000000 00000000FFC5870000000000000000000018AB8010000AB90180002A82AE0042A80000000000002A C3A23862102AA2422AE2A80000000000000000002AE4100000000000000000000000000000000000 00FFDC6B000000000000000000001801801000015901800000800600000000000000000002000402 6020084094006000000000000000000000004040000000000000000000000000000000000000FF24 150000000000000000000018AB8010000AB81380002A82AE0002A80000000000002A822C22E0802A C2042AE2A80000000000000000002AC000000000000000000000000000000000000000FFEBC00000 00000000000000001955801000141821800034055600455000000000000049054A50E30644844254 6550000000000000000000356286000000000000000000000000000000000000FFF5AB0000000000 00000000001801801000001841800000000600400000000000000000000200640000211200400000 0000000000000000006100000000000000000000000000000000000000FF768C0000000000000000 000000AB80000000389480000062AE0002AE0000000000000042062062002842862342AE00000000 0000000000004200000000000000000000000000000000000000FFE59B0000000000000000000000 01800000041808000044400600000600000000000041400601610401404601400600000000000000 0000004004000000000000000000000000000000000000FF085D0000000000000000000000018000 0011184580000960060000060000000000000C40CC1440400460160840060000000000000000002D 4140000000000000000000000000000000000000FF8B180000000000000000000000018000080338 D500040040064200060000000000000C633400501003614600400600000000000000000000701000 0000000000000000000000000000000000FF262A0000000000000000000000018000040018008004); SDR 8000 TDI (5748C0000000000000005045464063004464D6556000000000000000000000556010000000000000 000000000000000000000000FF37250000000000000000000AA8AA80080002488280000002AE2AA0 0000000000000008E2AE22A08040220E34A000000000000000000000042420000000000000000000 000000000000000000FF35FE00000000000000000000000000000000000000020010000208000000 00000000030010130008088000000800000000000000000001000480000000000000000000000000 000000000000FFDA470000000000000000000AB8AB97480010284080020002AA2AA0000000000000 004422003024421CA3000020000000000000000000005A2102000000000000000000000000000000 000000FFFBD100000000000000000000000008200004000400000000000040000000000000004500 081082200200281540000000000000000000000100C0000000000000000000000000000000000000 FFA27300000000000000000000000000800008813000000000000000000000000000001000A00400 80400080400000000000000000000000400400000000000000000000000000000000000000FFDBB0 000000000000000000001821821800021029000034001631000000008000000008604A0080002020 0200E000000000220000000000004010000040000000000000000000000000000000FFDB82000000 00000000000008180590182000510305400104C60005280400000280800060021005000120821060 00000000000000000000006480400000000000000000000000000000000000FF7395000000000000 000000001801881830001083020000000604000002000000000000400E00829018E0164860001000 00000000000000006000000000000000000000000000000000000000FF0B80000000000000000010 08180182100802180D80200204A60002A80000000280800140260801104040860060000000000000 00010100406240000000000000000000000000000000000000FFEF56000000000000000000201823 80180000384100802904162B100000008000000008200400600840480D2160000800004400000000 00006090200020000000000000000000000000000000FFE94F000000000000000200001809801020 029001020000000600000000000000000000200404600004401400604000000000000000020004E0 00000000000000000000000000000000000000FF4A92000000000000000000021E01801810001085 0000001C8600000000000000000000400400000010404C0060200000000000000004000260000000 00000000000000000000000000000000FF3443000000000000000010221C0186104E451C81800000); SDR 8000 TDI (00400000000000000000400000000100080000000000000000600000000000000000000000000000 0000000000000000000000FFA577000000000000000000800000800880880802800000208A12AA02 20A0000008020028020020000220020020020020022AA00000000000008000000000000000000000 0000000000000000FF3D240000000000000000140010000400000400100000000001000800080008 00080400000000000080000000000000000000000000000000003000000000000000000000000000 0000000000FF2CF100000000000000020084080082080082084A80020024EB08A00600A000000006 01360660200000300600600600200228A00000000000000000000000000000000000000000000000 0000FF5F620000000000000000019418018219012211010002806806047546024000440046006404 006100006006006006006006016000000000450010000000000000000000000000000000000000FF AC6200000000000000000A0010000006010010010000000200000004104008000004100004001800 000004004004000000000000000000000028000000000000000000000000000000000000FF5A3100 0000000000000200A40800800880840A8080008028020232C2002000440022082402002080002002 002002002802012000000000250008000000000000000000000000000000000000FF6EE100000000 00000000002800000000000002000000800800000000000000000000000000000000800000000000 000800000000000000000000000000000000000000000000000000000000FF867A00000000000000 000004000002010010004000000000000404005A0000000000010000000000840000000000000000 040000000000000100000000000000000000000000000000000000FF09F100000000000000000000 020000000000000000000008010000000000000000000A8108088490028029000000000000000000 000000000400000000000000000000000000000000000000FF86C900000000000000000020000000 00000000000008000000450000000000000000000040020000000000000000000000000000000000 000090000000000000000000000000000000000000FF174A8000000000000000004AACAA8AA8000A A8AA80020002AA0820000000000000002022022020002822832AA0000000000000000000002AA000 000000000000000000000000000000000000FF996300000000000000000000140100000001001000 02001004005000000000000000004004000000010024001000000000000000000000808000000000 000000000000000000000000000000FF949F000000000000000000155B5595580015595580000015); SDR 8000 TDI (40178060000000060422002063404840460060068020070060000800002081000000000000000000 00000000000000000000FFFC48000000000000000001001840007008800800800000000400400600 600000000600200204408403C03E0460068020060060000000000A049C0000000000000000000000 00000000000000FF7610000000000000000400001800280009800880C00000000610680610000000 00060138100060100220060060060020060060000000000A00000000000000000000000000000000 00000000FFAF9600000000000000804C02188204000A802A0088480200C601400680000000000600 200388400002A00E0060860028060060000000000004000000000000000000000000000000000000 00FF8DE2000000000000068028D058E19088088CBB3181020108841060070720100700060141C409 600292A84E01608E102006006000000000000002000000000000000000000000000000000000FFA4 DF000000000000000000801801C0CE80089821840220100C00400600200000004610441400601100 3006006016002806006000000000000000000000000000000000000000000000000000FF7E7C0000 00000000000005E21802021B04801A01904082085280B00601200000800608500600600810402600 E006082006006000000000000200000000000000000000000000000000000000FF21D00000000000 0000000180180008180004190980200080020020460020000000071440C644615100400600600600 2406006000000000000208000000000000000000000000000000000000FFC09D0000000000000000 0110502192D082841911850041600612628600401000084721445409600000080E20600E00400400 6000000000288880000000000000000000000000000000000000FFA9C60000000000000002010010 09801000801801800080606680400600400000080640480400600000080640600600400400600000 0000000800000000000000000000000000000000000000FF4B340000000000000000012010480215 00841B1120000068060461460000000000060040424460A880000600600600400400600000000000 0208000000000000000000000000000000000000FFE6E50000000000000000010010001090028008 00004001600600440600000000000614408208400000000E00601600440400600000000029010000 0000000000000000000000000000000000FFEE6C0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000600000000000000000000000 0000000000000000000000000000FF28610000000000000000010000000010002000000001000800); SDR 8000 TDI (2E4262882A10E02AE2A43A46A110F10002E08E2A600A02E000000000000400000000000000000000 000000000000000000FFA56D000000000000200001801800000840005B0011103504465564B70C64 500305101045560168CC006010046006204013000000008000000004000000000000000000000000 000000000000FFFC9C0000000000002000018299FC1018028A1AC021C000000600200600E1200480 00006004004804006808047206006A02046000000000000004000000000000000000000000000000 000000FFC0F8000000000000000041801800200A84A418009400D48816056006126020491050846C 4602401480800601609654440A008000000000000004000000000000000000000000000000000000 FF2FD100000000000000000183180002180810191400100002C610245600E4080004803160844844 C400030E206406006002006000000000000004000000000000000000000000000000000000FFB46F 00000000000000000180180180080000100080000060060040060060000000000040000060040060 06006006004006000000000000000004000000000000000000000000000000000000FF247D000000 00000000000180180180080000180020110070060020070060000000000040008040040068060060 06006006006000800000000004000000000000000000000000000000000000FF4BA4000000000000 000001801A01821A0200100002120460060400460060004000200060000040149060360060060040 06040000000000000004000000000000000000000000000000000000FF7D21000000000000100111 825A0989389002588220C2C06C0E501006216400110080107150B542240460870070060060060860 00800000000004020000000000000000000000000000000000FFDF13000000000000000000001801 80800080005280000060060040070060000000060000008060000170860060060060060060000000 00000000000000000000000000000000000000000000FF7EF7000000000000000088023809822208 C20088800020600A084816206000080027040C280C440CC2F02E8068060070060240001000000000 04000000000000000000000000000000000000FF9F82000000000000100000001801900103202A40 8350046406426026014400410086103904A564218868060060060068071060000000000000000200 00000000000000000000000000000000FF1BB7000000000000000000001841880001000900800010 60020860060840000000068120142040281060060260060060060040000000002082000000000000 00000000000000000000000000FF485F000000000000000001001800001000800200801008000400); SDR 8000 TDI (4060000000000060A410643000632600600600600600C00000000000010000000000000000000000 0000000000000000FFEBD1000000000000000150A08C00C20D22D40CC2804120253710B406096000 00084131200744300134B01281681700311250600000000000141000000000000000000000000000 0000000000FF780700000000000000031001020220820C2002000000C00A00800120D80000000000 C00120868C1890000100100080080080000000000000090000000000000000000000000000000000 0000FF5510000000000000000221A038009828008C880882C000288A00A403002000000000122842 602000412003003002002133000000000000000000000000000000000000000000000000000000FF 9A010000000000000000802A80A400010300405100000000004050C0200000000800018808080040 20941009000800000059E000000000000410000000000000000000000000000000000000FF98EB00 00000000000002082000000000300000840000000040220000010000000000200080100000000180 800A30000200806000000000000088000000000000000000000000000000000000FF476F00000000 00000000418018000410C090392080200E651619600E006000000040086206006080040040226006 004004006000000000000000000000000000000000000000000000000000FFBB3100000000000000 0151901B22301A48A8BAC002A092688E80B116B060000000008AEC06C56910808880046226806824 080000000000000890000000000000000000000000000000000000FF2DCA00000000000000000185 3801C0B884001810000380620632602600600000000120693408600040000028600E007205008000 000000000000000000000000000000000000000000000000FFE1B2000000000000000201A0180180 18000018008006006006002006006000000000006004006000000000006006006004006000000000 000000000000000000000000000000000000000000FF9AC0000000000000000441A01A0400080000 10409440080886086006906800008410006022084010000D06407006206802006000000000800000 000000000000000000000000000000000000FF2BF400000000000000000180180000080080100080 01400406453C5728740000010800508A00420000100E006006807002000000000001000200000000 000000000000000000000000000000FFAFD3000000000000000001801801801A2080390010800488 26006106826050040240086A040140B0106100027807006012000000010000000000000000000000 000000000000000000000000FFED71000000000000000001801A018A188840180A40002A8BAE0AA2); SDR 8000 TDI (02800810892112A90810810010011111102E04010000000801002010000000000000000000000000 00000000000000FF92BD000000000000000400C00880840C02C10C0080000032A311744700010028 110910748B0830814071030070062020430060000800005010000000000000000000000000000000 00000000FF0F6B000000000000000033805823801801801801810040601600608602020800022022 402602604800C02600600608600E0240000000000000000000000000000000000000000000000000 00FF484C0000000000000002120012102223403022000004908C0084400509000000000080494000 0800804800004004880800804000000000000810000000000000000000000000000000000000FF26 50000000000000000020A008428108148488C480000020D201200202000000000001200A00200014 A002002002002002002000000000000000000000000000000000000000000000000000FFE5FA0000 000000000000800AA0800C40440501180000220011280AA82000000002A82A0200AA80082012A8AA 8AA82282A82A8000000000000000000000000000000000000000000000000000FF652A0000000000 0000004204000004008802201000000800C00200000400000000000A810800000882000000000000 0091000000000000000000000000000000000000000000000000000000FFD8980000000000000000 C84AA0A808809008000000002A8020208AA82100000002A82B0200AA80002302A92A92A82202A92A 8000000000000008000000000000000000000000000000000000FFCE860000000000000003105103 403102003103440000C50C01510D50400000000551400C40A48800508D51551550C40C4055000000 0000000808000000000000000000000000000000000000FF67B20000000000000004040004024004 0040444200030015001200010C00000000018010A800101188000080080108900000000000000000 1000000000000000000000000000000000000000FF9E3C00000000000000008A2AC09408C04C0000 8800062202908002A83980000002A82000001000082202A82A82A83382202A800000000000000800 0000000000000000000000000000000000FF139A000000000000000200800A02A22A00B0CA408000 81283201300204200000000000AC0284A80009280200200280280280200000000000080000000000 0000000000000000000000000000FFF82E0000000000000002410052302002C22202040000900804 AC08050040000000008C094CD0080080080000400488088880400000000000080000000000000000 0000000000000000000000FF495F0000000000000000018018038818118038118000046006206146); SDR 8000 TDI (00000000002406034800016002006006412002026000000000000800000000000000000000000000 000000000000FF7F59000000000000000155B5591004D95415415580425565540565565500000000 0055650E5560044064225565565524CA510000000000000004000000000000000000000000000000 000000FFF95B0000000000000002AB4AB8818010108A0031C0802A62AE02E2AE2A80000000004A01 462060003042AA2AE2AE00233228E000000000000000000000000000000000000000000000000000 FFC9EC00000000000000000180180188180080000160000060060060060000000010000020060060 000CC012006006002002000000000000000000000000000000000000000000000000000000FF7FE2 0000000000000000AB2AB88000500B81080D00002262AE0062AE2A80000008002180121060002482 042AE2AE1C222A0A8000000000000000000000000000000000000000000000000000FF7CFC000000 0000000000018018021118218488C1000400E0042460060000000000000424424048001000840060 06002002006000000000000800000000000000000000000000000000000000FFAC50000000000000 00000100184984508110280580801060021160060000000000000801080AE0000440280060064340 84206000000000000000000000000000000000000000000000000000FF4157000000000000000001 881811809809000081002000600A00628620800800020000E00800640009401000E0060040140000 80080000000000208000000000000000000000000000000000FF0C99000000000000000001851800 0C580B18008900204D60025060160004000100100405820D420002442000602600400C1000000000 00000000000000000000000000000000000000000000FF742E000000000000000001803804081805 008831110008642604E0061000200001000060220840A82240200060260040040060000000000000 00000000000000000000000000000000000000FF19B0000000000000000000120008028000010040 000044E0485304901000480082100284480501284102080080000000001060000000000000002000 00000000000000000000000000000000FF7BED00000000000000000A100100040001011000000020 60040000800200100004400500000200100140C00101080002300460000000800800000000000000 00000000000000000000000000FF34E80000000000000000A081582480480280080091A000240A08 20024104002001000820020020203020020820020020020001001000000000000100000000000000 00000000000000000000FF04C40000000000000005005020020004004004001E400012A100922100); SDR 8000 TDI (00100001602600628000D12600700600209202600000000000000000000000000000000000000000 0000000000FF9A620000000000000004000018120010140010488000000012806006006000000001 54209000600414200F00600600200240000000000000008400000000000000000000000000000000 0000FF9B740000000000000000AA0AB8E00AB0800AB80081102AE0022AE2AE006000000000042240 2AE0002022162AE2AE2AA22208E000000000000600000000000000000000000000000000000000FF 4BA30000000000000001000018218290000058890122000412006006004000000000226044006084 00608E006006006086000000000000000004000000000000000000000000000000000000FF2FBF00 00000000000000AA0AB8918AB0AA0AB92D80302AE4B22AE2AE0040000000002862042AE2802362A6 2AE2AE2262AE28E000000000000000000000000000000000000000000000000000FF6B2300000000 0000000034155901885150151844000055014255655600600000000009648454640654E446556556 4CE456530000000000000506000000000000000000000000000000000000FF532A00000000000000 0000001803801000001800800000600200600600600000000000E114006000086006006006116006 046000000000000080000000000000000000000000000000000000FFCC2D0000000000000000010A B89D88108C00000880A22AE0022AE2AE0000000000000042940160002A22062AE2AE2AE2260AE000 000000000000000000000000000000000000000000000000FF0A4600000000000000009500180380 5042010084800200401200600600000000000043000410640400A046006006006086000000000000 000004000000000000000000000000000000000000FFDD990000000000000000210018418490000A 4021801000654200600600000000000010005425608200211600600600600E206000000000000282 000000000000000000000000000000000000FF417000000000000000000120184982100000080180 4011400011600600000000000000004C006804042106006006006086200000000000000804000000 000000000000000000000000000000FF4B3600000000000000020100180210D00100000080100060 0024600600000000000000410000600009200C00600600200A006000000000000000000000000000 000000000000000000000000FF368D0000000000000000AB0AB8C40010AB0AA8AB20002262A85062 AE2A80000000002AC2402AF0042023242AE2AE2AA2220E8000000000001004000000000000000000 000000000000000000FFFCD90000000000000000018018521298C2002101000000E0002860060000); SDR 8000 TDI (00000400300000010800000000000000800000000000000000800000000000000000000000000000 00000000FF80E80000000000000000888AB8808008A881880C810048A2022AA2AA2420000000002A 22022AA4002222AA2AA2AA22A2220880000000000000000000000000000000000000000000000000 00FFC5BC00000000000000000100002A00000100200000A042604800000005000000000000408000 0100010000000000100008006000000000000100000000000000000000000000000000000000FFEE 910000000000000000420000001540020C0142000000608000000008000000000000803000040008 0000000000000080226000000000000200000000000000000000000000000000000000FFC1D50000 00000000000001101804081831003004810010630200611609000800004000000203600020000600 6006004004006288200000000000000000000000000000000000000000000000FF19100000000000 0000000101180004380512110092404100120064260004200000880003524860300A000E00600600 4204010000000000000000000000000000000000000000000000000000FF1A110000000000000000 410018018238030910008A0024806E51600E04C2200000800000A200652801058601600600400400 8000000000000000000000000000000000000000000000000000FF84430000000000000000210818 0398102902B882848002620600602600401811000850021228648002824E00610600430400600001 0110000000000000000000000000000000000000000000FF84E8000000000000000400809800001C 00801C000022106886A96D0712200000004000001003640230200680E00600200200651040000000 0002000000000000000000000000000000000000FF240F0000000000000200008099040010248010 00000008811600610E0020400000400000C00060900024060168062CA45200000000000000000000 0000000000000000000000000000000000FFE76B000000000000000001E01801801C4B8514008000 00022D00600600202000000840400600600800C20E01600640200200000000000001000000000000 0000000000000000000000000000FF5A00000000000020040201883839D2100982980080E0016324 81E9260020000008C890414600610006D00F00680600200200600000000060800000000000000000 0000000000000000000000FF58BF0000000000200004011158A4221801001000830410100200782F 00000808808000600E0062040040270070861324D200000000808800000400000000000000000000 0000000000000000FF51250000000000000000010018000018210010838140006542006006000000); SDR 8000 TDI (00000000001000000800000001000010000800040000008200000000000000000000000000000000 000000FF1F12000000000000000800810800806D0080084080630030160030060170860F288A00A7 7640300100240600680600200A40E000000000000000000000000000000000000000000000000000 FF1538010004000100001841803951831D058411018002007006806416004004C040068070049160 02046006006006806006004000000400000002000000000000000000000000000000000000FFC716 000000000000100110700000000200201001600190008C01004400D00400480400000C2000400002 04004804000000204000000000018200000000000000000000000000000000000000FFBCF9008002 000100000840800950808904820A80800000200200240A0020032020020020028120008420020020 02002002002000000200008000000000000000000000000000000000000000FF54D9000000000000 00000000000000000020020000080000000118200010008000018000008800408000000000000008 00000000000000000000000000000000000000000000000000000000FFF4A5000000000000080088 09240002010011004000000808000000000000000100000009000000020000000000000008001400 00040000000052000000000000000000000000000000000000FF2F5B000000000000000420200008 00024C0000B400C00000080000000C00000000010901300005000208010010000000000000000000 00000100000000000000000000000000000000000000FFA4F0000000000000000000000002000000 00000000002201210008000100000000000000008000001080000000001000100400000000000004 00000000000000000000000000000000000000FFDF618000000000000004CACAA8E48AA8848AA800 80020CA2032AA2AA2020000000002222022AA0002122AB2AA2AA23A2A228A0000000000000000000 00000000000000000000000000000000FF8FE80000000000000000004010420CA440424031002204 080D0048041040000000000000800040008400050048041081102240000000000004000000000000 00000000000000000000000000FF137B000000000000000101955909955D5195580501005164CCD5 755654C000000001496507556500447556D575564C64563540000000000004000000000000000000 00000000000000000000FF52230000000000000000CC8AA89080088A900880800008AAA22AEAAE20 A0000000002B222A2AE08028A2AE2AEAAE22222208E0000000000000800000000000000000000000 00000000000000FF8B9C00000000000000000A400000000200400148004000000000000000000000); SDR 8000 TDI (2050C40060240A400600600600200200680000000000000400000000000000000000000000000000 0000FF9B14000000000000080820800800081801800801200040190780600600A006000145805806 086004A84006006006002802100800000000000004000000000000000000000000000000000000FF EAAC0000000000000838298118028D108B812819A9801160060060DE108005383486046400006000 A9C00688E0060028020A6000000000000020000000000000000000000000000000000000FFDFAA00 0000000000043A1180180AC038937028058C200000360161060404144030161060C0206200024007 136006002042040000000000000048000000000000000000000000000000000000FF4AB500000000 000000080081081182D001A002050040A00006012806000209800836026502500000042006026006 002002000000000000000008000000000000000000000000000000000000FF215000000000000000 0A00800811C218210000090080087006422006080000000207046082410100002006006006002002 006000000000200000000000000000000000000000000000000000FFA22B00000000000004180980 1801003001918881840011615608F046144000006404104044820608820006006006004044006000 000000000220000000000000000000000000000000000000FF85D00000000000000018018018A120 1801800A03A020008E0600608620400100700480C90400000020019E006006004004000000000080 000080000000000000000000000000000000000000FF5EAE000000000000001801801B31005841C0 089501410000065441064800000004040460074101012000060060060040040000000000802000C0 000000000000000000000000000000000000FF2C1800000000000000100900100102180100880100 0010E00600C00600000000000400E006020410020006006006004004006000000000000400000000 000000000000000000000000000000FFC00A00000000000000000000000000000000000000000060 00000000000000000000000000000000000000000000000000006000000000000000000000000000 000000000000000000000000FFF18600000000000000000000000100020000000000008070008000 00005004000000000000000000000800000000000000006800000000000000000000000000000000 000000000000000000FFD6C7000000000000000800800A00A00800888A0020000021020020020020 8308410900A0028020028020020020020020020A800000000000002A000000000000000000000000 000000000000FF40B500000000000000000000000020000000020020000000000010000000000018); SDR 8000 TDI (48044050042468060060060068420060060000000000040000000000000000000000000000000000 00FFEE07000000000000201A01201800214A01A00108842000102002444600632740814E12224480 000541200402604649600A000006000000000004000000000000000000000000000000000000FF96 B7000000000000001001001000001801000020011020629031609602600E00200640200404008C00 222C006006006002006006000000000006000000000000000000000000000000000000FF426E0000 00000000001001001000000801001800800000000600600600600600400000600600400400200600 6006006006000006000000000004000000000000000000000000000000000000FF41230000000000 00001001201000200C01001800001000680600700600600680480000600480400400200600600680 6006806806000000000004000000000000000000000000000000000000FF6F330000000000000010 0102120200182132D8002000900006086006004C2600601701600400E00C08A00C04600600680E44 0206000000000004000000000000000000000000000000000000FFE11E0000000000000010011012 300D1913201830042000690602604700680E00694650604C14612440230500708600600680680600 0000000004000000000000000000000000000000000000FF47EF000000000000041801C018200050 02800821C18000600600700600600750600E00600C00E000246007006006006006B2600000000000 0000000000000000000000000000000000000000FF991A0000000000000218018018062AB22C0081 0980208014060E2046006026006026B160248960CE0AE00E00780680600E00000000000000000600 0000000000000000000000000000000000FF383F0000000000000008008A0A10601080925801E411 90610780604600620E506084914000046024007A8604688600600610620000180000000400000000 0000000000000000000000000000FF5BB10000000000000008008008100010000010018000100086 08300600700600600442408040600551601610600600600700000000000000000400000000000000 0000000000000000000000FFE979000000000000001801811A0D0110008008010110406206006806 10680380580E81400C00800080200608600600210200600000000000000000000000000000000000 0000000000000000FFBC660000000000000008008688010090048989090080200806046047086002 00400E14402E40000443201600600600308200000000000000000400000000000000000000000000 0000000000FFC06A000000000000001801801C002018018818114000086106106006002006000004); SDR 8000 TDI (00A20900801521201000808800000000000000000800000000000000000000000000000000000000 FFC7840000000000000008008088009A08408208028E200020224025032000020231004020024024 80A1200300300A802002000802000000000080000000000000000000000000000000000000FF2FF8 0000000000000440000000C100010000440100000CE0000310280400290000802800000000100042 840801002001B119E080000000000210000000000000000000000000000000000000FF7830000000 00000002800800400000009E0421800048006080189000010411E80240008190000000948018830A 30800001006800000000000000000000000000000000000000000000000000FFF1B8080000000000 001883991903009021811818800000600600408680400600280016060E1C20000A40020060060662 04806046000000000040000000000000000000000000000000000000FF581B000000000000255A15 AC1A492A9B41AA1A100A208109069548D60C55060400C0B10A069428004AC84242622E4468A40000 06000000000A00000000000000000000000000000000000000FF5E0A080000000000001881811903 00380B803A820001080046204806A04056D0740804110E20008080450A9068060162041081060000 00000082000000000000000000000000000000000000FF567E000000000000001001001001001801 00180080000068060060060040060058000000060000020040020060068068040060060000000000 02000000000000000000000000000000000000FF579F000000000000001801801800804801800160 A4000260008040060040060020468028040828000004400060070060420060060000000000000000 00000000000000000000000000000000FFABAE000000000000601801001800800901B00400900040 080014450644404600250E4030A48031094000800060060068020000060000000000280000000000 00000000000000000000000000FFD117000000000000201201A01001801A01204000200010830841 584F01448E00C0278142144060208440310870460060028408160000000000000000000000000000 00000000000000000000FF3ECF000000000000001001001001C01801200008200020F2A8A9E08E02 67AFA0C08E0AC225E261C802C00802602728E00A0460060000000000000000000000000000000000 00000000000000FF5B9C00000000000000180180180100090190424010002B0510546556C5685600 855040C54E10480C24694E08602700680300100E00000000002C0000000000000000000000000000 00000000FF612D00000000000000100780100100980100020020A081600002522680680600280121); SDR 8000 TDI (00E0080060061060160C6086014000000020000000000000000000000000000000000000000000FF B82E0000000000002482402102282002402012000120840800C0C8040B40A480C000800080848800 900804004000084888044800000000000C00000000000000000000000000000000000000FF588100 0000000000084894884800800804934800800020200202200280201200200200285210220002A002 002002012002402000000000000000000000000000000000000000000000000000FFBED500000000 00000040140340960AA09C0440AA00000882A90C12A8200A112A0AA92A82102000002002A8AA8AA8 A30221888000000000000400000000000000000000000000000000000000FF1BEF00080000000002 20000500000000920080400000200000040000000001000020000008000000020000000000808081 000000000000000200000000000000000000000000000000000000FFCA5200000000000002002014 00A00AA0A00800AA00200882A84002A9241220200AA82A92A02280002502A92A92A8AA02204A8000 000000000000000000000000000000000000000000000000FF2F3200000000000021021430435424 42202443080120950D50D10D51548D504C8D08D30A40D28800D01551550D50540C48330000000000 000800000000000000000000000000000000000000FFC0C500080000000051050040040040040041 04000081221000110000088100150000000001101201081800800000801088801000000000001000 000000000000000000000000000000000000FFB2DA0008000000001021400000881100021800A400 000882A82002A8AA02A02082082201002004002102A82A82A82202200A8000000000000000000000 000000000000000000000000000000FF547B000000000000348B08A50A04AC0AC0A40A088100C028 0292300200B002802842802C02922A00882002002802012882002002000000000800000000000000 000000000000000000000000FFFD0500000000000020024230224021421020C20400288200008108 040040148C41048880C8808802854000004004884808204004000000000C02000000000000000000 000000000000000000FF049F00000000000004580190D90180595185590184000068062065069060 16004904226D06126500004416016096006106884006000000000000000000000000000000000000 000000000000FF4657020000000000408C08C00C40CA0C02C00C3080A102320308A006037C0628A0 2310B00B2030080AF88280680602700A016026000000001048000000000000000000000000000000 000000FFEFBA0400000000002122102202282462002800400100800C00A000011A12801150288110); SDR 8000 TDI (70002A22C62AE2AA2AE2AA0AE2A8000000000000000000000000000000000000000000000000FFFC C300000000000000080100002900280182280000200400020000060040068040861420060CE00002 200E006002006002000000000000000000000000000000000000000000000000000000FFF33C0000 0000000000B9098638CD8018068CC18400000882201402AE0142AE1E238E2200162040022A620E2A E2AC2AE2226882A8000000000002000000000000000000000000000000000000FF1E464000000000 00001803900801915800800010000000610002000610C00620A0460002460A480000E02600600400 6002006000000000000800000000000000000000000000000000000000FFCB030000000000000A11 210110430210A904482580A022601251000642400600400411608E00E00000610600600400611402 6000000000000000000000000000000000000000000000000000FF4FF40000000000000010018218 01821003000829800000010000010614453600640400E0060061480160960060040060040A009000 0000000008000000000000000000000000000000000000FF90A20008000000000010018A38138270 C30449218D405800905C00460040060001840223445420004A620E01640040600400004000000000 0000040000000000000000000000000000000000FF80F90000000000000010409048458011111108 05900000E42201000E41400600201404220400A2000A640600600000600400600000002000000000 0000000000000000000000000000000000FF532900080000000000000000000800004004408A0340 4160484280304B02A00000100080C015028801008001000040000000604800004000000002000000 0000000000000000000000000000FF8B560000000001000890000A0000081081000040008041600C 08400040051028002812044021003000400000000002800000E00000003000000000000000000000 0000000000000000000000FF2F370000000000000008C080884082881091A8808220082602022102 00001200260200A00240204048A00200248220200A14010000000000001000000000000000000000 0000000000000000FFD91140080000000000000000000600000040040A1840001021109021081001 0050010110080010010210090811094906F100100000000000100000000000000000000000000000 0000000000FF4F29400000000100000880840800850900C02CC08100413023013047487407003003 00300A4030410AB00F00700300600300700000001000100000000000000000000000000000000000 0000FFD06000000000000008980189180188180181100B840010640E02400600611648444E146226); SDR 8000 TDI (003802AE2AE2062AE2A20AE002000000000010000000000000000000000000000000000000FFF8AA 0000000000000210C408804402000480484100C20200CC0060061120040140860460080061200040 02006016006006020006000000000000000000000000000000000000000000000000FF72FB000000 0000000830110430AA0890A00480C8801028E2AA2A62AE2AA2AE2262AE20E2A822610820C2AA2AE2 362AE22E08E006000000000080000000000000000000000000000000000000FFC746001000000000 1110080440881101300D011300005102045565564065562A645650E4C44262045545525564C65565 56110006000000000304000000000000000000000000000000000000FFF497800000000000001045 09100000500000400080800460020160060060060160060860040964000440020061060060864460 06000000000400000000000000000000000000000000000000FFBC9E00000000000008C001001083 08C0A808088B80200AE0202AC2AE0662AE0062242042843982002A02AE2AE2062AE22648E0000000 00000060000000000000000000000000000000000000FFA53C000000000000020020040001020000 00100180024004880040064040060CE01403404C0200040100060061160060160000000000000000 04000000000000000000000000000000000000FF2B1D00000000000000410B10B02900400204A821 81100060000040061160062041040840060041400000060060420060864260000000000004800000 00000000000000000000000000000000FF7567000000000000000000000029028000041001808040 00020000060060061040940840061048000900160060020061162000000000000010000000000000 00000000000000000000000000FFC686000000000000001001001001085000002800003000611000 00060060060420040340040080000040060060020060020460000000000000000000000000000000 00000000000000000000FF19DD4000000000000AB0AA8AB8838010AA0898AA00004A82202A82AE2A E2AEA082242042AC2210002242A62AE2AA2AE2220882A80000000010000000000000000000000000 00000000000000FF8536000800000000110013001001120111000800002000610200800600600640 201410214404A0000100160060040060020060000000000008000000000000000000000000000000 00000000FF18970000000000001541549559038C815511095401001104D2550556556556D4843441 25544020044905465565545565525305500000000000040000000000000000000000000000000000 00FF62C400000000000002482109508901482188882801004CE2284002AE2A62AE81422624A40628); SDR 8000 TDI (080014000000000100426080000000000000000000000000000000000000000000000000FF4DCB80 000000000012812C0AC0400C010002814201084060100000000002300A0000000480000080030000 0000000000000060080000000004C0000000000000000000000000000000000000FFC05A00000000 000000180880081102090480C910844814622250634608008C02210600E006000010502014006006 0060840060040000000000000C0000000000000000000000000000000000FF947400000000000000 1801841845105850900040810800808A0060160282264800360064861402400320C4006006006004 000004000000000000000000000000000000000000000000000000FF25A500000000000000180180 1803003800000804800000008A05608E420024016086046080038000000000006006006004000064 010000000000000000000000000000000000000000000000FFC6430000000000000410110110090A 102080A8C8802010E2222066264082962A6426446400000100030080006006046004006004040040 000000020000000000000000000000000000000000FF5B11000000000000001809821C4180188C08 002202800A600013700628000C00A01602E402080248D0A835006006006102006802008000000000 080000000000000000000000000000000000FF3D4F00000000000800D001803831829800120A8010 200102200060160492C62080CE00608A48000848242401690EA1600A000002000000040000000000 000000000000000000000000000000FFF38D00000000000000180104504088100084010088000000 0A00700602442410011601610020600130604001611614E002000002000200000000000000000000 000000000000000000000000FFF7C180000000018004119103159088100000804A804011688A00F4 1680501608004608E000006010006C01007006086022006002000200040000000000000000000000 000000000000000000FF79C280000000000800B800800C0004880011040C8000000B2200E80620F0 8420820632620E08608400F007807007406052001002020020000004000000000000000000000000 000000000000FF252180080000000005181300B00001103283002480204060022260060060061020 060D600404610204E80600604600600A006002000000000482000000000000000000000000000000 000000FFD91A0000000000000050408A0C0104280010480180800000061160070070040440060060 06010010000006007116006002400002000000000008000000000000000000000000000000000000 FF50170000000000000D11810010AB0C109410008C80500AE2AA0062AE2AE2AC30C2AE2462AC2802); SDR 8000 TDI (E006206807806006004006000000000040000000000000000000000000000000000000FFFCBE0000 00000000000601001041200600601005000100180040400C90480400508D81400400400900004000 400480000000C000000000008028000000000000000000000000000000000000FFB3270000000000 000028008208888308A0804900A00000200200A00200210220300214302210210005200200200200 2002002002000000000040000000000000000000000000000000000000FFF18E0000000000000000 001000000000000000020480000000400000800010000000000A00000002000001C0000000080000 0000000000000002000000000000000000000000000000000000FF85440000000000000001000000 201800001080040001B0000040000008004005004000811000000180002000010000080054000000 0000000400000000000000000000000000000000000000FF455B0000000000000000320284301504 0040000000A02001500000011100000500010000880900800A080080000100008000000800000000 0490000000000000000000000000000000000000FF3E131000000000000000000820000000000001 14000000040080000000000000000000000004020801012000000000001000008000000000000000 0000000000000000000000000000000000FF43C58000000000000AA8808008829028AA8AA8208000 0AA0022ABAAB2222AA2C3AAA2AA22220200020220A2ABAAA2AA2226EA22200000000000000000000 0000000000000000000000000000FF05470008000000004000101080004404101000010000440C8D 0050040050440040040044C404040100100080400480411004400000000000000000000000000000 0000000000000000000000FF92E610000000000015582584BD11A23D55D558130120316035556556 504556484557556504456300D0F50755655755655611444600000000040000000000000000000000 0000000000000000FF16170000000000000A090480088A88C8A280C88080A008A0432AE2AE2AF00E 0D22AE2AE00E20A0A02222AA2AE2AE2AE22228E22200000000022000000000000000000000000000 0000000000FF77430000000000002000900800440102000000C00008041280000800030000010000 00003010001002104880000080000000008800000000009000000000000000000000000000000000 0000FF70818000000000000148408448C88028088C2854800808A0022AA2AA2A25004062AA2AA022 3020003122A22AA2AA2AA22A088332000000000100000000000000000000000000000000000000FF 88D200000000000000200000000501004500100800400264A00000000140804080000000100A8240); SDR 8000 TDI (1000700700200A00648A000000000800000000000000000000000000000000000000FF62E3000000 00000001080180180188188180880180018200000160470060210070D610600C0118400480200060 0E022C82400012000080001000000000000000000000000000000000000000FFF794000000000000 001C01801940821003A1002122000C000829700600204004E08600780200200001782E00700E0052 02400202000080000000000000000000000000000000000000000000FF380D000000000000029841 891A00901831844001008000688108610600BB004861060060CA0021201460164060060040020060 02000000000000000000000000000000000000000000000000FF4A720000000000000133918038A1 1010418408038008806A460062460840068070660460144140000402200060060441040660040000 00000200000000000000000000000000000000000000FFE874000000000080201041A21A03003A01 800821A020800C060060061248070060069A70142A40000084400060060040040000040000000000 00000000000000000000000000000000000000FFFB73000000000100043401925904083809A40841 00400001071060060285005060460061064C60C08088002060060000040400040000000000000000 00000000000000000000000000000000FF8A7F000000000000011081811840000821004803010000 60060065060000000061060260460060000C00100060060000040060040000000004000000000000 00000000000000000000000000FFC00A000000000000000000000000000000000000000000600000 00000000000000000000000000000000000000000000000060000000000000000000000000000000 00000000000000000000FF8B49000000000000001400000200000000000000000000680000000000 00000000000000000000000010000000000000000060000000000000000000000000000000000000 00000000000000FF10D20000000000002008808048002008008A0800000090200228200300200400 A0028020020020008020020020020020022A00020000000002800000000000000000000000000000 00000000FF3B9D000000000000200000001001208000000100000000000000000000000000000000 00000000100008000010810005000000000000000080300000000000000000000000000000000000 00FF260B000000000000000C00802800B68800820884A00000300208601600204204615600617660 6000002002006006002282016002000000000080000000000000000000000000000000000000FF50 7F000000000000005801941B11949941815081848040600601600680510C40600694644410410004); SDR 8000 TDI (2C6406006002006000000000000000000000000000000000000000000000000000FFBA3400000000 00000010000018018000010010010000000006006006006004006004006002000000006004006006 006006000000000000000000000000000000000000000000000000000000FF2F5600000000000000 1400001801A010008008008000006806006007007006006005007002000801006804006006007006 006000000000000000000000000000000000000000000000000000FFB84B00000000000002100000 1C01804245201001520000000610600600600440600200E002004004096206007006806006140000 000000000004000000000000000000000000000000000000FF596100000000000000100040180592 1100AC88048040506CCE05704E05640610700682604304C84000600600600600680E00E008000000 200040000000000000000000000000000000000000FF88310000000000001A0401801A018B142180 4803800224600600F00760F20688650610F00002C000006006006006006006486006000000000000 000000000000000000000000000000000000FF993B000000000000004101B01A41A49003019001AA 60080406007026027406007387086021D14024886007007806006106220006000000000004000000 000000000000000000000000000000FF9784000000000000000601801803805081942801C000027B 5614601780400640600602600000000001620600600600201701600E000000200020000000000000 000000000000000000000000FF1B0104000000000003001182BC09801281025401A0020400270070 060040070160160160000000004D6017086006082006000006000000000000000000000000000000 000000000000000000FF64D9020000000000049101805840821201810A01008002624080600600A0 0600E10E007804004000006006006006002083006002000000000000000000000000000000000000 000000000000FFBB4E00000000000000506194180081B10100582900C00800983A600600AD861878 0680601ED16000507086106807102002000082000000000018000000000000000000000000000000 000000FF1E0B000000000000400209C11E10803E0182084900001060804468060008000070070160 04004001028110006006004002006102000000000000000000000000000000000000000000000000 FF6449000000000000000001881880809A010808410100000109A060860200010060060060068060 06800000006006804013840082000000000006000000000000000000000000000000000000FF66CA 0000000000000009118998418490C58C081984801068C0106686E3E60005700E0C70054000208008); SDR 8000 TDI (8AE80A076101E000000000000080000000000000000000000000000000000000FFA7D20000000000 0000000025002A0800040000104000186081000800000116A0033010120140000002800080080100 0001446200000000000000000000000000000000000000000000000000FF6B6B0000000000000058 211018000308009AC824B0000065060060060060060568442C01441460004100C400600680600408 6000000000000000000000000000000000000000000000000000FFA7D5000000000000329AB1101B 10221B4CAD0A088800900886A264D680EA86406444A00C34C06810D40C0428E0060A688480800000 0000000880000000000000000000000000000000000000FF155F000000000000003A03255C238918 00A028A48000000A0400600644600E04E0848C89058882008089440064B601622408029000000000 0000000000000000000000000000000000000000FFA9670000000000000010010018018010008008 00800000680400680600600680780000000400000000080400680600600400600000000000000000 0000000000000000000000000000000000FF01B4000000000000001910801A140018000000440500 226004027006000007406042000004102000202004C0740640680200680000000000000000000000 0000000000000000000000000000FF477C0000000000000010008018000010004000006002100414 4162463004060060B300021444228900200500602E00600200000000000000028000000000000000 0000000000000000000000FFB578000000000000001C01E01801801800804A00A5028100A6006896 03014E8C680600112101002004440600610648610A01000000000002000000000000000000000000 0000000000000000FFAC43000000000000001001809A01C09400C0080880206EE2A62AE2464006A6 02E08A2A80282006A006C02E0070A608E8A202680000000000010000000000000000000000000000 0000000000FFE9170000000000000018010018000008008048008500108556256516150156126150 0065524560D42042060070D630608A00800000000002020400000000000000000000000000000000 0000FFA1BE000000000000001817013BF02118008008C4880000600610702E080006006800046082 9240000040060A6006406002006000000000000000000000000000000000000000000000000000FF 7518000000000000001000405804000201A01A09A5208300062060161005070160D25040B6046400 0520060060C6096142040000000000000000000000000000000000000000000000000000FF5B6100 000000000000108000180000100080090090004862A60562460000462260060140064040C0002056); SDR 8000 TDI (02802012042800000000000000000000000000000000000000000000000000FF7A9B000000000000 0800AA0AA4800060AA0400AA40086882212A8AA8A20201AA8AA82A9300280008218240AA8AA92002 21A89220000000000000000000000000000000000000000000000000FFD9B0000000000000042000 00042008008800C40441280200080000000400410000000010480200000080000008000000010200 00000000000000000000000000000000000000000000000000FFAAB70000000000000A80AA0AA0C2 0080AA0880AA01000C82282A8AA92C82282A8AA82A82002200003202012A8AA82282284882A80000 00000000000000000000000000000000000000000000FF628B000000000000310354354114232242 3401100000D10CC0550D50D00C90550D50D50280A08840D40D31550550C88D503105500000000008 40000000000000000000000000000000000000FF98680000000000000044004000104C0400404400 00490011000000000011008000010000491090110010908008000811008400000000000010100000 00000000000000000000000000000000FF53AB0000000000000880AA0AA0A80000000020E0200808 82202A82A82182002A8AA82A80801800002002002A82A82E02200882200000000000000000000000 00000000000000000000000000FF396B000000000000200A00A00A04A80A82A48A02802080280A00 3002842942002002802C42C028008828020020028029020020000000000008000000000000000000 00000000000000000000FF08F10000000000002222000012002542313012110100A4090080500410 080800400400080C84C82085093000400480C8082248900000000008400000000000000000000000 00000000000000FF4B7F000000000000001849B018018159010030812048006006006406C060B600 601621620440400013612601600600E00614C0000000000000000000000000000000000000000000 00000000FFCC7D000000000000444D04832D50C40C0CD30C3490090D3302106047033002C4FCA38C 20D60C7001403202806826007342C060000000000010200000000000000000000000000000000000 00FF35640000000000002422C24000102402822420800048810A00120C2005828000000101801828 8800980801210000818800000888000000000840000000000000000000000000000000000000FF9C 8D000000000000028800A8198080481880094A8008002002202A4A40204280A40000200200200A24 2603002802002082100000000000000002000000000000000000000000000000000000FFFAE50000 0000000008011D02E4400081200104004800046001000080A2080EC208804254A500020000012008); SDR 8000 TDI (2A83220A8000000000000000000000000000000000000000000000000000FFD28D0000000000000C 18018018108218118C8001000202601000000600E00200604A14E00A046840080022006006000002 406000000000000800000000000000000000000000000000000000FFEC9A00000000000000D02500 10251090030008498080206046000006106000000000006004208000048008006006004094006000 000000000040000000000000000000000000000000000000FF16E40000000000000018018838010A 984980000180002880260803060260842800140062840108101102000060860040040000080C0080 000808008000000000000000000000000000000000FFC6B100000000000000180585198002B90D82 48931C020480164182160060A000422C01602204900802812218600600402C100400000000001000 000000000000000000000000000000000000FF28C40000000000000018108018000028008C090500 4A00630604002600602C00434404604A0014C022002200600600402C006080000020001000000000 000000000000000000000000000000FF1C0E0000000000000000001520000800A000400002024864 5008004002600E0800000004900204A0500200000080000000106500020040000000000000000000 000000000000000000000000FF96EF00000000000000412400000008000000110000C20460000000 A02264562402000200100000A02882002502B02C0008006000000000020000000000000000000000 000000000000000000FFD32600000000000000881C82288B008806980812024024210244031200A0 0248010025A022002008002122002002002002000010100100000010010000000000000000000000 000000000000FF6C250000000000000004004005000104004005001C000000810810010010011010 81491201080000100089081001108631001000000000000000000000000000000000000000000000 000000FF99C1000000000000014C84C00C00800C00C00C0081282020830814070132030030830834 4F10294001248B10711700A003007000000000000800000000000000000000000000000000000000 FFB9BA00000000000000183184380B881803881803800802600600014644602E2262060460040060 1040604642E246446026004000000000040000000000000000000000000000000000000000FF19E7 00000000000005420020022D2002002B020100888209108000040088000040048009048508008208 400040040B0880004090000000000810000000000000000000000000000000000000FFCD6C000000 000000000800800800948800802800A02800200200000210214A00200200202A00200008208A0020); SDR 8000 TDI (62260AE006000000000000000000000000000000000000000000000000FFD1500000000000001040 8C1541538D100814192000405104560065565565505224164280A04560044965545565564CE44E53 0006000000000004000000000000000000000000000000000000FF58890000000000000000030000 0180111200180001002060060060060064060A610600C00C02600000600400600600601620600600 0000000000000000000000000000000000000000000000FF4A200000000000000090210010898030 89010091800208E2260002AE2AE2AE2062A62020202060002062042AE2AE20622E0AE00000000000 0000000000000000000000000000000000000000FF298D0000000000000050041450018000200400 23800204010600000600400200201209600814E00402610400600610600600000000000000000400 0000000000000000000000000000000000FFA90D0000000000000A10910090459510051140118020 40600E0000060060060B400404228400600010E04800600602E10640600000000000000000000000 0000000000000000000000000000FF89C50000000000000010020012258140480B08D18058240006 00000609480200012400210411680C05600000600600609622000000000000080C00000000000000 0000000000000000000000FFB6910000000000000010510010108A11050040050082006000000006 00600600641601605404600010000600600600200200600000000000000000000000000000000000 0000000000000000FFA4AC0000000000000AB8802AB88084400080000100120882A82A82AE2362AA 2AE0022A62062070042002AE2AE2AE2AA22208800000000000100400000000000000000000000000 0000000000FF90C3000000000000005001C01410823881010801000000600000000600E006000000 02000409080002610600600600000204600000000000084000000000000000000000000000000000 0000FFE420000000000000155944D55B048008C890814D0000150550550556546552550350548556 4C000C446556556556550452530000000000000014000000000000000000000000000000000000FF 269000000000000002908B0AB0A3909049024149808A4CE3282A82AE3272AE2AA24228E2B0040020 28E22C2AE2AE2AA22A48E000000000000000000000000000000000000000000000000000FF695A00 000000000000101180123190980304280180CA20000000000600600200600600600000800008E004 006006002082000000000000000000000000000000000000000000000000000000FFC78200000000 00001018C92AB8808030A5902087006A0882802A82AE2262AE2AA3922062A24860002002822AE2AE); SDR 8000 TDI (0400E22E000000200000000000000000000000000000000000000000FF05EC000000000000000041 94900188D952941942840002040651630600032E0940962464100001080340020061060060040000 06200000000000000000000000000000000000000000000000FF58A10000000000000000218A5081 80380000188202007B816E24600615622E04008600410E4184C04041000160460060040002062000 00000000000000000000000000000000000000000000FFD6250000000000000141410010238A9008 0A1810808014628600628E0061800A020E2442600801006341100060960060040060060000000100 00000000000000000000000000000000000000FF2B3F000000000000000400A128118018C4000040 00200060011370464A800641600614608622443000808600F0270060020160560000004000000000 00000000000000000000000000000000FFA1B80000000000200000018C0821801802804082012020 849000604624003088220EC0640004405000440700E4064AE5220000060000000000000000000000 00000000000000000000000000FFA5BF000000000040002500521849901010800000948010000000 6026046140016096205B060000004160010163070060020000060000000000000000000000000000 00000000000000000000FFDCFF00000000000039020140180B8870080000300A0240601101E80600 660730B0868840841C005000640080709600604A6060060002000000000000000000000000000000 00000000000000FFAFD1000000000000000041801003801802004122002203048180700620600920 040792202200208400608A0078062B63120000060004000080040000000000000000000000000000 00000000FFB35200000000000000025500100584D014800000808020601000680600600600000E40 209210A0000520928060060061020260060000000000000000000000000000000000000000000000 00FF2A6B000000000000400001C00031881820800000000000010000600600600128EC4613200002 600410402600600610E002000006000000000004000000000000000000000000000000000000FF6D 250000000000000AA1D10AA0D18510C00AA0AA00000AE2300062AE2AE2AE43648600226020600030 42162AE2AE33632A28E006000000000000000000000000000000000000000000000000FFC48A0000 000000000480200000018050A2003804800004010600600600600001012608020810600402200400 6006006086000006000000000004000000000000000000000000000000000000FFC48E0000000000 000AA0010AA0839030000AB8AA00000CE3260062AE2AE0AE00404E2A028029600022A3242AE2AE22); SDR 8000 TDI (002000000120000020000000000000000000000000000000000000FF641500000000000000000800 01002000000000000A80000040000100000000020880800000020002000000040000800000000000 000000000002100000000000000000000000000000000000FF23E400000000000008000000020000 20000002000000001050000000000400850809020111000001280880000000000000000000000000 000000000000000000000000000000000000000000FFFD6700000000000000001400440000020002 040000220400100008000002200010000A04C8100000200041000000000000001000000000000000 000000000000000000000000000000000000FF14BC00000000000000002024000000000000400001 000001008000000400004C80000080000300020D0108000000800010040000000000000002000000 000000000000000000000000000000FFAE640000000000000000808888AA8AA8AA8888AA80022CA2 332AA2AA28A08A1032AA602013A420000022422ABAAA2AA2A228A2AA000000000000000000000000 000000000000000000000000FFE09200000000000000000004000101000040402000424000100050 04004040004004100104008000080001005004004100004004000000000000000000000000000000 000000000000000000FF3C76000000000000000045D49D55955D55915D558122116446557D565545 5604655604E40440600054E407556557556456155556000000000000000000000000000000000000 000000000000FFE8F100000000000000002A88A8AA8428AA8C888080020AA3222AE2AE28E28A3322 AE22A0262A200023224A2AE2AE2AE22A4AE2AE000000000000000000000000000000000000000000 000000FFB0FC00000000000000008800200000000044000000022001000000000000002080000801 20108000000090800800000080200000000000000000000000000000000000000000000000000000 FF13F40000000000000001008888AB9A0800888816812208A2222AA2AA2C808A2002AA2024122A20 002023822AA2AA2AA2A20882AA000000000000000000000000000000000000000000000000FFAAF6 00000000000000009004500000001100000900024061000000000464060000000104080140000000 20000000000000006000000000000000000000000000000000000000000000000000FF5A17000000 00000000002400000000A12202214000820460100000000060260B00000C01400000001480080000 00000010246000000000000000000000000000000000000000000000000000FFBF9B000000000000 0000008010B5821800801800814000600E00604E2000004042061060261400000040020060060060); SDR 8000 TDI (0200000000000000000000000000000000000000000000000000FF6F520000000000000408220558 21E51810001000004208680121404600910602A08200F02B30220000482600E08602400600600000 0000000020000000000000000000000000000000000000FFE5A0000000000000085808041A098110 A2AA30A0A30202614E0473C62C620015401C00120406208028080800600601408600612000002000 0008000000000000000000000000000000000000FF13240000000000000018840018818078000000 00A882900A86004006006C1F01600600008605A02000800000600600400620000000000000000000 0000000000000000000000000000000000FF3722000000000000041880045D11A49B14A812000140 00028680C006000106041109010084880002C0104001610604000600000000000000004200000000 0000000000000000000000000000FF503A0000000000000810280118418018408420A0920002600E 4042C629000000200200024E20054008801000600600010640604000002000001000000000000000 0000000000000000000000FF046B0000000000000000000000000000000000000000006000000000 00600600000000000000000000000000000000000000600000000000000000000000000000000000 0000000000000000FF8DD20000000000000002000000000002010010010000806000800800006006 00000100000080000000080080000000000000600000000000000000000000000000000000000000 0000000000FF3A55000000000000000800001801A00800885800800000200A10A002000802026006 00000200280080200200200200200200800000000000002800000000000000000000000000000000 0000FF78AC0000000000000000000000002000200000004000001000000800000A00001000000000 000800000400801000000001000000000000020000000000000000000000000000000000000000FF 2E87000000000000000C00000800800D208E2900E7800020424CA00600600241317A002116802000 002202006006002066006060000000000028000000000000000000000000000000000000FF65B801 000000000001185400594184594180104580C08460278265161540470044CC024044446010286C57 036806006006804000000140000000080000000000000000000000000000000000FFB97900000000 00007006006014012000806014801401800000221804004000244084005804010001801100804004 80000400C000000000020040000000000000000000000000000000000000FF2ABD01000000000001 08240048208208A0800042A02004200304240A132022002223002042C0A01000224A012002002002); SDR 8000 TDI (06000000000800000000000000000000000000000000000000FFFDD8000000000000200001001C01 8A1900029881110220920E0020164064001062260060C40820040220068060061360060000061000 00000004000000000000000000000000000000000000FF0F61000000000000200001445A13811C04 901821C4000869462C654708610680690784640C04A002B1200E0860068060162160060000000008 02000000000000000000000000000000000000FFE42800000000000000180040380980D400081024 020006608608600E00600607623E00600840E04000E00600600600700620E0000000000000000000 00000000000000000000000000000000FF946D000000000100001900501943803000401490680000 800E026226E0680101F0070170C04260044A60070064060AE00F0000000800000000040000000000 00000000000000000000000000FF335A000000000600000E000418018A11040280042081B0722620 790788630610410404044028602040600E0860060038060060000000000000000000000000000000 00000000000000000000FFE1CA000000000000082802009805881080844220808001021602E00600 620000400C08001008608C0464461460060120070001000000000000240000000000000000000000 00000000000000FF1452000000000080009880001801801620001044091040700004E40625640600 200208602400208020400600620600A0060060000000000001000000000000000000000000000000 00000000FF977A00000000000010C860331945801120BC8092886020043000420602E000A1081087 6A1641A01404D0479460060020060001000000080000C40000000000000000000000000000000000 00FFE75E000000000000001802041801881C0000C480000100E04000400600600640200280040408 600000A400006006004006806000000008000000000000000000000000000000000000000000FFB0 F0000000000080000800601811801808008000600001041040FC06006000C0044020024681400408 2000006006004006000400000000000004000000000000000000000000000000000000FFF10A0000 00000080005800047801823048529000004020E84034E34705600715500420720C08E08089A00081 F086012006006100008000000000000000000000000000000000000000000000FFA91D0000000000 00001880001801A2D8024210080101A20100004006206000004014026014946121002A0100610680 2006240000010000000000000000000000000000000000000000000000FF2C290000000000000009 000018118010249010108022040C10084807408000C03C4382704200002080420600700700400744); SDR 8000 TDI (000000200000000000000000000000000000000000000000FFCCE9000000000000020211C43A1025 1B41A902018040808886CC441208084612003090082688C800834A20810236C00880048806000000 200C30000000000000000000000000000000000000FFF8CC0000000000000900418818A1901A1380 30238A0108100600A842206116416B064000944242A0404110A4408690D00430100C800000000000 000000000000000000000000000000000000FFE23A00000000000000060100180180180180100180 00006806002002006000004004000004004000004800804806804804006006000000000000000000 000000000000000000000000000000FF34AE000000000000000001801814004811810041050020E8 00406010100806002002406807044000004002005006004405006204000000008000800000000000 000000000000000000000000FF9B97000000000000000001801800600C01A0820120018403200060 1000000000209204600601400000480220410E004804000005000000000001000000000000000000 000000000000000000FFD4DF000000000000000001001801831801C2310182C01000083575242B73 50D05044117335C26B485124B4082C0620A152800056040000000140000000000000000000000000 000000000000FF899B000000000000000001001801821801803201A0002AE0A90D66840266E628C2 A408E2AC20A40808E01400262E02A022A06006040000000140000000000000000000000000000000 000000FF17A9000000000000000001801A00048A01054301A5402A94D15061543569105009501504 D6456156A8E34450411641414C00022E000800008006000000000000000000000000000000000000 FF208F0000000000000060290A1BF4041A618A0481B86040600002600400E8060221020100040070 000060047E5006004805006806000800000000000000000000000000000000000000000000FF9675 0000000000000000519018000048100120018100930008442284116140D490001060368480070940 02002016032422000006000000000006000000000000000000000000000000000000FF76DD000000 00000000000102180000180094014184000060A01060140462060024224064844040100000020022 46002002406006000000000000000000000000000000000000000000000000FFAAC1000000000000 00000100180180080000100100000000060060020060000040040000040060040060060020060020 02000006000000000004000000000000000000000000000000000000FFA07F000000000000000001 00180180080080180180020060060060020068068048040000040060010068060020068028020060); SDR 8000 TDI (0000000202000000000000000000000000000000000000FF6AA50000000000000020000AA0AA0AA0 AA0202AA00800A82202A92A92882A82802A03282002C82002C82202A92A83082A84A800000000000 0080000000000000000000000000000000000000FF1A010000000000001100001543542002043542 D000C0910CC0A80D51550D30251100C51050048C00D00D30D51550C20D5033080080000000090000 0000000000000000000000000000000000FF05AE0008000000004300002004004004005100000041 00111100000084100085101100182100108100110100080102100080100100000100100000000000 0000000000000000000000000000FFF9A00008000000000400000AA0AA1C00400AA00200002A8228 000AA82880A8000A082000002081002002202A82A82282A828800000000000000200000000000000 0000000000000000000000FFAD3B000000000000014000800A00A22AA0A00A008000802803002002 00280221200288229280280080A88280200288280204280280000000080000000000000000000000 0000000000000000FFD17A00000000000034000000100021020C2012B00120800900D50004044C00 0C40A484C020940C80940808000004801000004000000000000C8000000000000000000000000000 0000000000FF309B0000000000000800019018A1901911843841940002644E08E90401400610CB04 00404600600010612E40600640610680400E00000000020000000000000000000000000000000000 0000FF6710000000000000024400E08E12C10C42D1040C8101493083403406C07112C4202A323C93 0D3001213003812817143412437002480000091000000000000000000000000000000000000000FF 2B250000000000002000000224042002002012000200800800CA0901000830055281001420900A80 900801601000848800000000000000010828000000000000000000000000000000000000FFF2EE00 000000000000800090189082090280001481200121021022030000028031270001C224A000602102 003002702002000002000000100000000000000000000000000000000000000000FF2E9900000000 00000040202101000000F001C060000014649001800840608EB004001400080000000002A0030280 0800812B6018500000000600000000000000000000000000000000000000FF5DE10000000000000C 00080000401080040420020C00086000200020A96006808000280010000020008000000838000101 44E000000000000000000000000000000000000000000000000000FF6F7900000000000012000188 1828091009180001900040E046004C020001004A285A4000060B4000034058008006000410806004); SDR 8000 TDI (00000400000000000000000000000000000000000000FF8F7F0000000000000000000038018818B0 80B800902022800404608400600E00609644622602440203008400400E0041240800042164000000 80000040000000000000000000000000000000FFDF7200000000000000000200380601588082B91C 88201801800A60A60100AE28040000E2840140022002141180061000166100160060000004020000 00000000000000000000000000000000FFD2A60000000000000000020218000408008C1800840000 624050E22C4400C054204210E0860040283022040000060000040260040460000000200000000000 00000000000000000000000000FF62FC000000000000000000040000094028000002020042E00001 021000E0060204B03260200302500B00800000001000A00CE0080162000000000000200000000000 00000000000000000000FF2D880000000000001100000000021200820200C0044000E41001002054 60060100D008608001400000020832802000028810E0000061004500000000000000000000000000 00000000000000FF170E000000000082002008002800840800980900800022244462200044020A2A 220200200200200820A0121022920020120000024420000005400000000000000000000000000000 00000000FF18BF00000000000000040048940000240040840008801810810010815481A100540500 10210010800000810015082294210000000000000010000000000000000000000000000000000000 00FF4446000000000084004408408C04900C00C40C40890022310923710700600354311310304700 7080202103003006213053096002002000401000000000000000000000000000000000000000FFF9 A7000000000000110000083801843903089901024001620600604601443601402400610400C01001 62162CE056026106004006006080028000000000000000000000000000000000000000FF0AA50000 000000003100000014002002012520010080820904804004004A2001485480890C88CC8094085080 0004928800004800800000800C82000000000000000000000000000000000000FFF7C70000000000 00024200000800800800880800802020201200280202200210210214202200200001210200200200 2002442002002000000000000000000000000000000000000000000000FFA48B0000000000001004 006AA0AA0AA0AA0042AA00004882202A82A8A88089A202002003102200022002102A8AA82002A988 8000000000000400000000000000000000000000000000000000FF7DA70000000000000040004000 0000A110000004000024000803000000000108023008030148000204800000000010800100000000); SDR 8000 TDI (004004000000000000000000000000000000000000FF35B00000000000000000000AB88180100088 9880800008E0062AE00628E4AE0060062AE0C02B200014420A20E2AE26E01608E0262AE000000000 000000000000000000000000000000000000FFF1F000000000000000000000180182C01500580100 8040044600628600600008604600441000A0040B400214600600640E000006004000000004000000 000000000000000000000000000000FFC43C00000000000000000000185588114084185280320261 1600604E0264062542940060400020002040A60020061020A6426296006000000000000000000000 000000000000000000000000FF1DA100000000000000000040182D840001045801008040010450E1 1400640011409400400002288422C09610A006002056400006004000000C04000000000000000000 000000000000000000FF8FAD00000000000000000000180008B008A0000080340268080260260460 468028420C6004102400100042022006082006006006006000000000000000000000000000000000 000000000000FF7BB10000000000000000AA0ABA800008F38880AB800008822000625428E0882203 0021E2AC20B0060002022422AE22A2860E82AE006000001086000000000000000000000000000000 000000FF8D16000000000000000054201A1014110CD30004808000710000600602604640200210E4 26006900054054024006084106006516006000000900000000000000000000000000000000000000 FF7C26000000000000000554555B0C0C2902D0815480001314C03064045563314084084065561464 845465445045564244D6510556006000000484000000000000000000000000000000000000FF0A65 0000000000000000800AB88380D00080011080222AE2242B622C28E08F02D2B422608C3542003062 802822AE20A22E2CE046006000000200000000000000000000000000000000000000FFB835000000 000000000000001841811000822000814020001402E0840060000C502414600641400001600800A0 0610A006000006006000000000000000000000000000000000000000000000FF2BFA000000000000 0002002AB8E00018602240420000088A3020632628868890280A28E0002200002022222142AE2442 840880A4006000000080000000000000000000000000000000000000FFDEFA000000000000000100 001A1013188008A0000000406008046014000006412402006402080C0010A0820240060540040060 04006000000800000000000000000000000000000000000000FF231300000000000000002A001805 8050148018C880C004610410E0860460200C40C40460D400C08004001410C0060840562262160060); SDR 8000 TDI (6000000000000000000000000000000000000000FF09AC0000000000040010498618230C300A8088 2183A02E62AC00829600E01010418E00E2060B610004000408430601410661600600605004400020 0000000000000000000000000000000000FFFA5F0000000000000018018018018488000800110000 0060002A00363200A604202008000620A22802208620C1160040C40960044560C000200800000000 0000000000000000000000000000FFD9AD8000000000000018098819018008000808810000080500 04040644014020200000008404200800232E30CA4E54445400040400000000000000000000000000 0000000000000000000000FF3FF7800000000000081011E018018218088040018400008084000006 4460104040001060040264104044064D202600220E00800600000000600000000000000000000000 0000000000000000FFCF658000000000040A7041A43D27801C08B1A20B820010E404048836006006 10410809E01C00620024414682300601284602640600600000400000000000000000000000000000 0000000000FF639200000000000002080190382180100080010B01000200000084260060C000000E 00608400C08400400E0055164C410644000600002802600400000000000000000000000000000000 0000FF367C000000000000001001A0182D85102CA4001100002260200008060060060B2016006104 004004044016804006044006006006006000006004000000000000000000000000000000000000FF FAF4000000000000000801801C01882501802B05014000009000000602620000004600602C080000 102024142806012806440006000000004000000000000000000000000000000000000000FFF82C00 00000000000010018AB881800010888161001008E2002A82AE2CE4AE2022862AE20426800430A3C4 21A2AE2C22AE08E2AE2AE000004004000000000000000000000000000000000000FF358F00000000 0000000001801801828001000923810000000400028600600002400600620600000000600C04A006 10A026000026000000004000000000000000000000000000000000000000FF2D5000000000000000 10018AB88392012288C00180B04CE22E2AC2AE28E08E2242262AE29421000424620C2C22AE20A2AE 2AE2AE2AE000004004000000000000000000000000000000000000FF698800100000000000000195 59558820D5154011804035054E55405653613049633655609454000421652450655640630655050E 550000004004000000000000000000000000000000000000FFDFF300000000000000100180184980 A00084000D8000006106004006006026116096006024080004016004006006106006006006006000); SDR 8000 TDI (50000000000000000000000000000000000000FF051A000000000000130000200000240008400000 00804001002200000000400101100000008000080D00000080000280002200000200000000080000 00000000000000000000000000000000FF187D080000000000004200000000010104000000002004 00511108000404001400000400001280000000000C00001000000000004000000300000000000000 00000000000000000000000000FF03608000000000001008AA8AA8AA8868208AA8AA800008A20300 22AA28A08A20232228A2AA3020002122AA203AAA2022AA0CA2AA08A0002820000000000000000000 00000000000000000000FFFD1A000000000000000001201001004001000001002020044500400400 40401040000000010000400400800010040084084044100000004400000000000000000000000000 00000000000000FF4110000000000000055D55F55955D3180355595580805564164555565545564A C446556557C260104065564165564D65563145565160000560100000000000000000000000000000 00000000FFBB170000000000001248AA8AA8CC8A892A8C88A480000CA0002AA2AE28E08A00A2AA2C A12A2B200031224A20A2AE2220820CE0822AA00008A0200000000000000000000000000000000000 00FF66AA0800000000000000010000010000A800000000200000A488000000000000001000000000 80000A00000A1000000000000000020000280000000000000000000000000000000000000000FF21 640000000000000128AA8AB88808880080689001000AA1182AA2AA2E868A46622228A4022AA00020 22023422AA30A06228804208A000002000000000000000000000000000000000000000FF3E5E0000 0000000010000000000004100403100000800062200040000060064800080262800040020800900C 0000000008006000446000200042000000000000000000000000000000000000FF5E798000000000 000280000000440020C808002C002020608000000000602601010000603000002004804000800014 04800262D00060000A8000000000000000000000000000000000000000FF47040000000000000008 0182180104B00A89082903401060A01501362100800520964800061162000C000620008E00008408 E004236040006000000000000000000000000000000000000000FF91FB0000000000000018018058 01081000844901100022841000020608005600044602828E42602801001610020600004622000600 0100002008400000000000000000000000000000000000FF5F9E0000000000000018118038450010 00822081880000800440000604600E00E20622608E00600008870C01400600400402000400000000); SDR 8000 TDI (000000000000000000000000000000000000FF9B870000000000002980019A1001801A00201801CC 0000000601400A0468269400060670840200008A000E006016144084000004000006000400000000 000000000000000000000000000000FFDA24000000000100102011841101C1580085585108024012 86145512000046000C009081071420000B2416006006000106080006800006000008200000000000 000000000000000000000000FFBA4A00000000000000000180900388082080180100A200600E0040 0228800020800200000E202010202006506006000004046044006006000000000000000000000000 000000000000000000FF36B100000000000000000000000000000000000000000060000000000060 06000000006000000000000000000000000000006000006000000000000000000000000000000000 000000000000FF4C4700000000000000000000000000000120040020000060000000000060068000 00806000000001000800000000000000006000806000000000000000000000000000000000000000 000000FFF02E000000000000000001800201800A0280082008000120020080020000020010020020 028020000020020020020020022C00020020020002A8000000000000000000000000000000000000 FF8D1900000200000208000061529000020000220800200010012810000002008100040100000018 02080800408140000100008000401400000002000000000000000000000000000000000000FF8DBF 000000000000264000800880800A02E10820890000250700E0460060020020020027671660000020 06006006002092006703003006000280000000000000000000000000000000000000FFF201040000 000110050015941829955911851815A1010C7D3714FAC44D4216415844807414504000D062160060 06416006044006006006000000080000000000000000000000000000000000FF373E000002000002 28400160B00900000000A50104A0010A8428402580410180C00405800401445008000420C0A40000 0802C080800214000000000000000000000000000000000000000000FF26E404000000010805000A 9408208C8B08A10802C08084240B13300253240A21304200221250200050200200200240A0020420 0200300A000000000000000000000000000000000000000000FF7DAE000000000000000000000010 00200000010822000000000000A00000000000000000018002280004000000018000000000008008 00000000100000000000000000000000000000000000FF3436000000000000006000000000000000 02021000000980A00002000004800000000289001080000000080000000000005000004000000000); SDR 8000 TDI (0000000000000000000000000000000000FF4086000000000000418011D81801A010844019018000 00600E02600604600608603600600500408008520700600600620628640600600600000000000000 0000000000000000000000000000FFC6E6000000000000022009C21C059700021938198080208106 00402602600083788E00E90500402400601600688600602600000602000E00000400000000000000 0000000000000000000000FFAB8D0000000000002000C58018C5811000631E81E4241460A640F406 48600700000580780414400421784602600600380604620E00600600000400000000000000000000 0000000000000000FF3C77100000000000000001C01801A000108058458004B50026526286006001 00001411600C9152801164C650601601200720000600000600000000000000000000000000000000 0000000000FF3E2E08000000000020000181180390300810A0030282C26007886014006006006402 00600000488008803631601601200680600680780600000000000000000000000000000000000000 0000FFE1AC00800000000200200B809E0185280280005102A210004E40790D0676002A6A10006310 11440060050600E006002006000006800006000000000000000000000000000000000000000000FF 7ACD008000000002002013A01801801002400001004400E10E0464000060064B0002116402002005 006006006806004006206007006006000004000000000000000000000000000000000000FF7EDD00 0000008100010011801821802810080001004008000E206800806000500240026823802084806006 006006404006000246800006000004000000000000000000000000000000000000FFA87D00000000 808000000180580188106C086001D1204461C60468111160070E7004227014008000856006066106 102807406006B06806000800000000000000000000000000000000000000FF85DA00000000001000 00218218098810000106018000000C0781400000782000E004486006013800206006006006003406 040006401006001000000000000000000000000000000000000000FFF17900000000000001004984 5821803800808001680010020E00401408082001742208084C00408024A006007086404205440444 000006000000000000000000000000000000000000000000FFCF37000000000000000009A0188380 5C00010051048000690602D0040000068C720308800710600000A2064060160A4004106024006006 000208200000000000000000000000000000000000FFC234000000000090202001809011A8902482 38018120646A4E4D42822BE000E0800400600C200008202006086006104006026006106006000000); SDR 8000 TDI (00000000000000000000000000000000FFF65A000000000000001801A01001C01200A00801A00000 60060060040060000008040060040020000060048078060040040060060060060000000000000000 00000000000000000000000000FF20C4000100000000001111A01940010800500045904204600608 68522000060070028008020828000060040060068040050060040060068000000000000000000000 00000000000000000000FF1E57000000000000201001801A00400A0000020180020C14278174C200 00104065130810A200300080600400604600C0050080040000070002800000000000000000000000 00000000000000FF5062000000000000000801A01C01A01800822C05810240800E8460120AEA4109 604444E20484A4A94A355214610E002536A005060010860008080000000000000000000000000000 00000000FFDF190000000000006008018018038A38A2008881800228F2AE23E2822A62AE22E2AC6B E2AC2AA0E832A02208629E8A25BE61650E0061060005100000000000000000000000000000000000 00FF463F000000000000401A0180180000100024480481005504531464D054E450510D5014654613 6514C4052C8A6146014044000006000006001004000000000000000000000000000000000000FF63 E40000000000001FBA23809818151000A00848B680006002086000046006000002006404C06004C0 0784866006204105026816006006000004000000000000000000000000000000000000FFA1440001 00000000005801A09904200080101D0080000C144230E09620710005704808608E08400002400208 650E50204E420006000006000000000000000000000000000000000000000004FFD8F20000000000 000018AB80184000204401080C00B041610804624610623640650225604404C0CC00C04200600604 2006006006006006000004000000000000000000000000000000000000FF5D4E0000000000000018 01801801800000801000800000000200600400600000000400600000200000000200600600200600 0006000006000000000000000000000000000000000000000000FF1811000000000000001801A018 01800000000800A01000600200600500680600000400600100280400000200600680200680600700 6006800804000000000000000000000000000000000000FF2832000000000000001801841A81A200 002410100000548800006C0600600012702601700000604600000600608600622604000602001600 0006000000000000000000000000000000000000FF665B000000000000445945801823A0808010C8 0024C0006948456046286007006106006000144884511427047006806006D0601680600680080400); SDR 8000 TDI (000000000000000000000000000000FFE74A00080000000060000040040041040000000000010010 01001080041001001009020110101009001001001001151000821001000000001000000000000000 000000000000000000000000FF1AB70008000000000000AA0880AA0700380C808000280882A8208B 20A88088A008082880080180000202A82A82A82600902880900A82A8000000000000000000000000 000000000000000000FF3458000000000000000C00C40A00A88A82A00A008082C22803082012042A 42042242842C42C42A40883003003002883042002802C03002000C40000000000000000000000000 000000000000FF54E500000000000000040140340020420024302D00028000040441040048001141 04800084100800A15001005004810A10024A50801004000800000000000000000000000000000000 000000FF44770000000000000058018118818219418010810048406A94006884C1400E84488C1060 9404648053440650600600600601400E406006000020000000000000000000000000000000000000 FFB837008000000000420D20C80C22D02C12C80E088A090D3002C4623200710348B223002C278930 41007003007407493482C27003082486001480000000000000000000000000000000000000FF1E3B 0000000000000E03492002042003003A009010028008004011C8010800800814901409010C00800C 20900800C00980200880C00A00000800000000000000000000000000000000000000FF5E52010000 0000000008208A100892482A808900800240261A84200280000201002220300222A20A49A0026220 02002202000002002102000002000000000000000000000000000000000000FF8BDC000000000000 0000001181600430050002200A0201600088000080609E4200480060001401000040000006080B00 014DE01820E400000148000000000000000000000000000000000000FF4A65000000000000004000 0020000000D0002002004214E180A014202060063C0300006B100800403200080880201004018060 00187000000400000000000000000000000000000000000000FFBEB4000000000000001881801080 0810008008088400006002026810C00100800C020000C60060000460000060060000240260040060 06000000000000000000000000000000000000000000FFAE28000000000000281D21CC5320305280 2CAB518400808C16006108000886000228A0008C836A01016821237026800AA442088E808C060008 08000000000000000000000000000000000000FF7897000000000000021809811009841032800C03 F000000906526024206016CA00060062062800082A680C90640E0C40040890044808060000000000); SDR 8000 TDI (0000000000000000000000000000FF8C1D00000000000000102180184A0000008038858000006206 41602200000030000210000625248010028600600600000603200400600600000000000000000000 0000000000000000000000FF614A000000000000000042000000020028000000020004E088020040 0860060C000002608002002032000000000000000020600000600020000000000000000000000000 0000000000000000FF705F0000000000000200200000020000210801100D000C64100A0080116006 2481000060005004480105002C014000002000601000608002000000000000000000000000000000 0000000000FFE7C100000000000000888180A8E08008088109028000202402402202650002480012 1AA02202248008210201A00A00200200851201200200000000000000000000000000000000000000 0000FF1C5500000000000058140049140040040040040010201010A12010291306A9001204001281 0010010010210012113A9049000020001000001000000000000000000000000000000000000000FF 53E2000000000000430D00C00C04C00C00C00C008482003133107457206083103402003123043101 093047117107203007006022003006001000000000000000000000000000000000000000FFB06100 00000000000010418838A1801849901893802222620624608404402E44C084156206286230006286 42624602E01601400E006086040000000000000000000000000000000000000000FF3F8200000000 00002012014012004342000400000100A40801004934004820894014840000150800811004805005 001004404800800804000800000000000000000000000000000000000000FF6B2800000000000000 0800800800880800804800802000200200200284200204294200200A00220014200200200204A002 002002402002000410000000000000000000000000000000000000FF9F7E0000000000000004AA0A A0AA1400AA0882AA00000C82A82A8200288288200200288AA0A104082102A82A82A82802A98A82A8 0E92A8000000000000000000000000000000000000000000FF159500000000000000000000000000 40A00000220120040000208000800000040330000040140200020000000000100281020000040000 000000000000000000000000000000000000000000FFD5CB0000000000000000AA0AA0AA0020AA0A A2AA00C02882A82A8228A884A83282C02892212200003202A82A82A82002A82882A82882A8000208 000000000000000000000000000000000000FF511800000000000040035435435428020231231000 00D10D508C1450550B30C90800D50D08A00840D10D50D50D50C10840310AC0D10D50000C20000000); SDR 8000 TDI (00000000000000000000000000FFF85B000000000000050801801815821880023821800804611600 61120262260A001402628C2163000460060060060800060064B60060060000800000000000000000 00000000000000000000FF7388000000000000040801801A45A25800801849C1200000260060A204 62201100540461141060080060160060060100062000060000060000080000000000000000000000 00000000000004FF4EAD000000000000012801A01808010000130104000020641000600400600602 680200602400E8000040C60060060800060460064260060000000000000000000000000000000000 00000000FFA6BB000000000000480AAB8AB8800800AA80200040400A80802AE20C2CE0C820639028 E2442250102AC2062AE2AE2602AE0882AE0882AE0018000000000000000000000000000000000000 04FF20A4000000000000000801801C20400004000004208000610000608C04624600000200641604 300001200600600610E10E00610E006006001000000000000000000000000000000000000000FFEA 2A000000000000104955D5594015215403210400003104505564C451611041044051641650200448 2406556556416556350556510556000014000000000000000000000000000000000000FFD5A70000 00000000093CABAAD8858A98800A40D000282CE4082AE22428E08E22F1542AE0A42800422A22562A E2AE2002262AE2062AE2AE000002000000000000000000000000000000000000FF4B2A0000000000 00031E0180180D801800100050010802008000600C00620012700402610605200002A0D600600610 0006000006020006000000000000000000000000000000000000000000FF035D0000000000000C18 ABA8989008E05081200800820A80402AE2002A8088386E0A28800C0160002A43062AE2AE24E20E08 C0E40882AE000040000000000000000000000000000000000000FF472E0000000000004138018458 1004012A108004404200624800600800020600608200044613684000C0C600600600600600200444 6006000800000000000000000000000000000000000000FFB43E0000000000000418018018458018 0082192180022060860060C20060200300440460842020000000160060060C60C622621600600600 0040000000000000000000000000000000000000FF833B0000000000000018038018018098500298 01800200000E04600A22E03604004604600400201002000600600600600620020400800640000000 0000000000000000000000000000000000FF407600000000000000100180180A0480008238038400 7D010600E18A10002E00063000016620A0C840020601600600000602C11660060600000000000000); SDR 8000 TDI (000000000000000000000000FF1B47800000000000011809905944031800120033114002450280E3 164102C0004042200044004000B042168440B6016446006044200006400000000000000000000000 000000000000000000FF3BD6800000000040001811805801C01C0080010584000042A60064064165 0020412C40E03600604800001600200E44E006200126401006000000000000000000000000000000 000000000000FF1EAA800000000000001C01801C09841A66840001804000C82601611600600625C0 8C046008000028000C07442C060260460A6086006886400000000000000000000000000000000000 000000FF4897000000000000011C0190194C009800880049111025480F2860040460481040000060 820020052A2007095146006416140006080B06080004000000000000000000000000000000000000 FF281A00000000000000180180181401180082402300C040410E00608E0060260841120060061363 001428060050060C6006406006006006000088000000000000000000000000000000000000FF5E8F 000000000000003C01801C00023C0180000100180440060060260060000540000060000000140160 07002006016006000006440006000204000000000000000000000000000000000004FF7D69000000 0000000A98AB8AB8F00D58AA88C0C9000008C2262AE3062AE28E3042622AE2AC3040002162AE2AA2 AE2462AE0AE2AE08E2AE000000000000000000000000000000000000000000FF9862000000000000 02180180182580B82504002380900000100060060062001460240260C008000402E0060020060160 06000026000006000404000000000000000000000000000000000004FF85440000000000000AB8AB 8AB8858818AA8C808B80C02AC22C2AE21628E4AE22E2842CE2AC24C2082A62AE2AA2AE28E2AE2AE2 AE28E2AE000410000000000000000000000000000000000000FFD11C001000000000111955955911 94191111211180523104405565565561304163165162084204C44065565565564A65565503065505 56000004000000000000000000000000000000000000FFC2D7000000000000001801801801801800 800001800200408400602602600600600E0060000001000060060060060060060060060460060000 80000000000000000000000000000000000000FF90D50000000000000848AB8AB881889802089889 800A2CE3262AE22628E08E20620628E0240140003062AE2AE2AE2262AE08E01608E2AE0001400000 00000000000000000000000000000000FF7E30000000000000004801801821803850001803814A00 000600600600600001612600600412404408E00600600600E0064400064400060002240000000000); SDR 8000 TDI (0000000000000000000000FF94A68000000000000888AAEAA8808AA8008000AA80024AA0032AA2AA 2AA08A2AA23228A002002001AC22AA203AAA2AA2AA4AA2AA08B2AA00000000000000000000000000 0000000000000000FF0E330000000000000004014010080014810000210002000081004500004040 00000400005404400000900490100400500400424804100400040000000000000000000000000000 0000000000FF747F100000000000133F559559119558C500015580001564C6556556514156556424 53650440C1004875564D6D5755755615455655655600020000000000000000000000000000000000 0000FFE13B00000000000008A8AA8AA8A48CA82280008080002AA2222AE0422AE28A2AA2AA28A006 10E4802A32AEA2A2AE2AE2AE0AE08228A2AE000000000000000000000000000000000000000000FF 73660000000000000000012010440004100000000000000009000000040200000080000048120400 010000000000000800000000001000000080000000000000000000000000000000000000FF728E00 00000000000C08AA8AA88088909080009400002AA2322AA2122880AA2220062EA5024020002A22AA 2022AA2AA2AA4A800208A2AA000100000000000000000000000000000000000000FFF4B000000000 00000020000000000040040000000000004000000008046406000100006420410200014000110000 000000206040406000000000000000000000000000000000000000000000FFFD3A80000000000005 000000002C0400480000540000006108000140006006110230006088140100000000040000000000 006490026000000280000000000000000000000000000000000000FF7C5800000000000000080980 18000110208A0053000000413609600400000004E34A0800AE006040040026200026246006008204 02E006000000020008000000000000000000000000000000FF4BAD00000000000008080190180000 100C80A00114A00D44064061465400B6206000010406346010400406010006006406146026000006 080000000000000000000000000000000000000000FF1A9200000000000000000180180580100080 00018AA04840060464840060062060064C6004004408100006004006006046000024028016080000 100000000000000000000000000000000000FF62F900000000004008000188180180902882A10984 006040B670E2242C603814622C07E1AC0240002E020651C406406036486006106406100000000000 000000000000000000000000000000FF8C58000000000000001A09801802201C04100043000404C2 0A0A600604008602C08220020650642000404640504642640603040400680E0000000C0010000000); SDR 8000 TDI (00000000000000000000FF0C800000000000018000018018000018A1800001008200004201600608 04000821000000200020002284060060060460044000040065060000000000000000000000000000 00000000000000FF18D7000000000000000000000000000000000000000000000000000000600600 00000060000000000000000000000000000060000060000000000000000000000000000000000000 00000000FF2C2E000000000400000000000000000000000400000000000080080000680600000080 60000040000000000008000000000060008060000000000000000000000000000000000000000000 00FF87F8000000000001000001800803000802A20000200080220220200200000200602800200000 2000802002002002002002010802003002000000000000000000000000000000000000000000FF82 670000000000000001200010000211000012000042801000810A0000000000000050800800000000 0000000800000000000000000000000000000000000000000000000000000000000000FFEA420000 000004188100008008409208029000008422803B9A00E04200601A01282B00206007200000200600 6006006512806063402006000000000000000000000000000000000000000000FF855A0501441000 0D000155929895955815915901A04450E45740648651400655454401620001601115610700748608 60C6004006106806050010000000000000000000000000000000000000FF38680000000004010080 A1001401681080601605170000010004587000400000400428800800100080005400400404420000 4000000004000000000000000000000000000000000000000000FF9C9D05014210000280012A830C 0092880A9109048040C0AA3200200A48A00334A2C201200000A8080C21120024030820A300200208 2002030010000000000000000000000000000000000000FFE71B00000000000000000008000C0000 000040000A801000002200A000000080000000040000000000002000008082000000000000000000 0000000000000000000000000000000000000000FF953B0000000002080000000000C40020005400 000000000080C0060000100001080000000001000100800080080000011001100040000000000000 0000000000000000000000000000000000FFE9C310000000000002440000003400002C0000000002 00013080000000044000001000042041010004800004000000000020000002080000028000000000 0000000000000000000000000000FFB3620000000000000000000000000000800000000006200400 00000000000000008002010814020000080011000080080000000040000000000000000000000000); SDR 8000 TDI (000000000000000000FFBD55000000000205020081901909821841041823A210C0700620620E40EC 1600C0000462018040080178160A6006407A86016007006006000020000000000000000000000000 000000000000FF21A1000000000001400121809B2182DC45053515804040610E01724E0060008040 28106500044004C56006006006086006200106021106200004000000000000000000000000000000 000004FF048F000000000000A000018018008819118080C300300072878060000060069021160062 0002004002600600600600610F806106046886000200000000000000000000000000000000000000 FF33FD00000000040083815B831C0C815845AC003149800820120960C08060000A0AC60261381907 A449602E0C6006006086400006A00206480004000000000000000000000000000000000004FF2FC8 000000000400040003841930821801D0200108104820001064900060060424000C60200040051001 4E116006116006006006406C06080004000000000000000000000000000000000000FF3699000000 000008090021B018128018018800096080006B04046801906000C000100062000040040000060060 0600640E800506000006000004000000000000000000000000000000000000FFBD0A000000000004 88E101C618038018018812058280186A8600700000617711540E0062606C641080018604600641E2 0F11E006006006000000000000000000000000000000000000000000FFEBCB000000010200800001 801841801881241001840024202200608002600004502680608010608104024610E2060060060000 06000006080000000000000000000000000000000000000000FF64C7000000008010000001881A08 801A81C2060100048020420260000C0000C124460009000023080060060A62060060040062840010 06080000000000000000000000000000000000000000FFC61800000000020002000190180C849801 020001000004204200E00000020600A0068000411120000065061060063560440800042065060000 40000000000000000000000000000000000000FF05AB0000000000070001618018610038A380309D E080446886A061060861101C42008A6001042200060C460160064060063060060060060000000000 00000000000000000000000000000000FF3C54000000000001000041821881015A01A05103802000 280AC062BE20E00F00608801F00002200020882600E0065060040000040000060000000000000000 00000000000000000000000000FF1D230000000004038400018C1B54021805840215004284008A00 652621000E01040914000013240080012611600600E0260860064000060000200000000000000000); SDR 8000 TDI (0000000000000000FFF431000000000000801801801801801C00C000014002445083004C03000800 00340600004000604000300640600600640000700600022600000000000000000000000000000000 0000000000FF2546000000000201001E01801801A0180230108181000042283140AA00625014C136 23650800650810C2D600F4960160A80100460010060000A800000000000000000000000000000000 0000FF353600000000020100180180186180182200900380004AF2E032682A28F28E0EC2A62AE2A0 22E24818425602E486086049816046136006000150000000000000000000000000000000000000FF 34F6000000000001801C018018018018041002812104827511A56B480064509104D0C56D50006514 814506C1611680E511000006000446000004000000000000000000000000000000000000FF06C300 00000003E5803801801841C218042845C92BB081400208E080406806002000C0600008600080408E 886106806000006006006006000000000000000000000000000000000000000000FF834700000000 0001801821801801801810808005000010420414700600631104808605685080E40C00200600E006 086010000006020006000004000000000000000000000000000000000004FFCB9900000000000180 38818818018A182008001112500460C441612E10E0061024460863002C600008248E0A6006006000 006006006006000000000000000000000000000000000000000000FF3C0500000000000180180180 18018018008010018000006004006004006000004000006000006004006006006006006000000006 000006000004000000000000000000000000000000000004FF5AB1000000000001801801801C0180 1800001801A010006806004804006806004000006000006002006806806006006001006006006006 000002000000000000000000000000000000000000FF134B00000000020180190980180182180022 382B8202416104806006006001006006826028006004906006007006006400450216C50006000004 000000000000000000000000000000000000FF25C3000080000005801805CC98D1C01840211E0181 5208620CC06C5730EB1615785600630001641040E8168C6006286100006006006006000020000000 000000000000000000000000000000FFEB450000000003F9850001C09A01C01801A01A09A0B28860 060060060068E602602E00602000C004206006006006086007226206006006000004000000000000 000000000000000000000000FFEF5500008000000180800B821825901D1180B801800200EE8E0070 2788600088700680608801420788610605680601601600000EA28006000406000000000000000000); SDR 8000 TDI (00000000000000FF652B000000000200800A00C00A20800A0CA448048042842822002802002C0248 2882802800002C00882802003002802808802802C028020008000000000000000000000000000000 00000000FF06AD0000000000200014010010030012A0309029010280891400489402482004504484 000080C800820804005004004880204B34820004000C000000000000000000000000000000000000 00FFD2A20000000002A1809921801A018018418099058402106006486004D04006A8448450605010 6000506006806006006400004006456006000000000000000000000000000000000000000000FF60 BF000000000400800800F00930A10C92CA221091032033288264D200715202B00300A08005708104 A08600740690600891600F08288E001080000000000000000000000000000000000000FF454E0000 000000080092002095900823203405801800C00A88000840100809050C008000089808009C000000 08A0000C00008A008C1108000800000000000000000000000000000000000000FFFFCC0000000000 00C00C21800823001800811414048020200548050200000280600000A18120200043A10200200200 2000000002403002000000000000000000000000000000000000000000FF0E610000000004000101 400A0000408003020000000018010090009100E01642008008604006000020120108860922002108 608830E000000108000000000000000000000000000000000000FFAF4A0000000001600020002004 406200040842000120000010009001006006B883001160108081200010A922000188000181781000 6A10000000000000000000000000000000000000000000FF53690000000000018018899038090118 D8808003020200C462864020C001C000200040000001600000000680600610E01810000601602600 0000000000000000000000000000000000000000FFFEC2000000000211A09AC98A5AD302BA42AA81 031282A048520C4820000886421000888000326800B4088E22F28E09600008620E90023600080000 0000000000000000000000000000000000FFF9A7000000000241803801809801081B100010018020 08C48480C10401600E096500006091016020008226106026226028808086C0800600000800000000 0000000000000000000000000000FF5890000000000001801801E01E01001800801001C000006004 00400400680180400080600000600200000600600600780000600680600600000200000000000000 0000000000000000000000FFD5EB000000000004801D419018219018104040410002004800024002 80000600280680001000600000280600700600600000080608F00600000000000000000000000000); SDR 8000 TDI (000000000000FFA2D2000000000000024000004110000000110000050003040401402000E0560200 16416040100208040000200500100010046020006500000000000000000000000000000000000000 000000FF058A0000000000008018088108200039F8800870000000208208200245018239A0020020 82102000012032002002002202288002002002400000000000000000000000000000000000000000 FFF12F00000000046844440140940140040040045A19602C102D2212812A07010050800810092090 21009009429101021001001000001000001000000000000000000000000000000000000000FF122D 000000000400C00C08C0CD10C00CD0D10C04800049304B15720310604B40309211314B00F0230030 57047007127413127002003106001002000000000000000000000000000000000000FFB7BD000000 00000980180180182180580100180182000062842040C44540061540062060062844100360060162 06006006414026006206000000000000000000000000000000000000000000FFECFB000000000202 00100100120100120121400100A02408A4004814004A000140808400009049021408040050048050 00804800800004000902000000000000000000000000000000000000FFBF6D000000000020800800 80081280080084080080001024008021028020220428420020020020000120028020020020020020 02422002000000000000000000000000000000000000000000FFE2D500000000008C2000AA6AA4E4 2AA0AA0D02AA00001085182A82312A80C9A80308288800268001A012A92A82A92A82A92A82A80C8A A8000000000000000000000000000000000000000000FFE95D00000000000A000400000020200088 01000000480000200010890000010880000000010080000090010000010002510000200210000004 00000000000000000000000000000000000000FF9AF50000000000A82000AA0AA0902AA0AA0804AA 00A04300212A82202884882402202A88002800802A82A82A82A82A82A80A82A82892A80001000000 00000000000000000000000000000000FF646800000000032040015435451415424424452C0080C4 0C09550440550D30440CA8D10800540C00C40550550D50550900550A10D105500008000000000000 00000000000000000000000000FFE25D000000000400000000000000200400404200000000100000 11000410008910110000018110020000000010000010002010010000000010020000000000000000 00000000000000000000FF335800000000008A2000AA0AA0880AA0001000800000390300AA8220A8 80880082082C80002A00003082A8AA82A82A82200A81000882A80000000000000000000000000000); SDR 8000 TDI (0000000004FF8C37000000000003801A0180180180180002180181100060D4006016006046002046 00600400408000600600600600600640600644600600008000000000000000000000000000000000 0000FFB28A0000000002A1AAB8ABCABAABEAB8AA8808ABA0022AC2002AE2462AE08820020E28E006 2AD2042162AE2AE2AE2AE0060A82AE0882AE001004000000000000000000000000000000000004FF 8D76000000000001C01801801C01C0180ACA082900820050000060C0006047402016006004006800 140006006006006006006006006006000800000000000000000000000000000000000000FF930500 0000000115D55955955955955954D24955014255745055641051613154840E536004556004540556 556556556006150556550556000004000000000000000000000000000000000000FF5FB500000000 028B8ABCABCAB8AB0AB901813883C04025620C34C20A28E28E0242262AE0042A84802002AE2AE2AE 2AE0062AE2AE28E2AE000300000000000000000000000000000000000000FF0CDC000000000021A0 1C01801C010018018088018000004104004082046200004146006004002280000006006006006006 400006000006000480000000000000000000000000000000000000FFC59F0000000000E18AB8AB8A B8890AB84182088180A010C1E40002022E80A811A30E2880062A80002962AE2AE2AE2AE0040AE2AC 0E82AE000000000000000000000000000000000000000000FF6306000000000003801A01C01A4540 1803A918258000104804080002000406CC2106000006000A00006006006006006004000004006006 000800000000000000000000000000000000000000FF466600000000001100180180180180195180 301100002464142300B4006000004046026004004100048006006006006006206006206006000300 000000000000000000000000000000000000FF7CEA0000000000011458018018018818AB80200100 0000C0080002842262063362060062060062000A0006006006006004040004000346000010000000 000000000000000000000000000000FF3EB900000000000182380B9059258A1803808893054002C1 042002881000060000EE60000604606021018600600E026186026586180006400008000000000000 000000000000000000000000FFF28800000000000180180B81182184380081094300000A42205280 1001010000211600000610E10820001600600E026004000004006006000080000000000000000000 000000000000000000FFB12D00000000000008000008410400400000200003401005480B00000864 064204060062000282901200000000000000000064000062A0000080000000000000000000000000); SDR 8000 TDI (00000000FF5276000000000000801A1220B801C2380482386180800804050D004000614601413E50 62050040104071E7647006C0601E2C60460068060000000000000000000000000000000000000000 00FFCF9A000000000041C01C00015901C038008231010C2008000080040045620810022600E40E08 6084027007097807006006101206001806000004000000000000000000000000000000000000FF45 54000000000001801C000018018018A490180100900004C000803004622600200604600410400013 6006006006806006406006426006000000000000000000000000000000000000000000FF84440000 00000001801800401801A0180984100180200000080A408000600010000600600502C00400700700 6006006006000006000006000004000000000000000000000000000000000004FFAE6D0000000000 AB8AB8AA0AB8AB8AB91084B8AB80102A800020430028E08E26A2AE28E2AC2040042062AE2AE2AE2A E2AE4AE2AE08E2AE000004000000000000000000000000000000000000FF83440000000000218018 0000180380180900100900005000040060A600620008400600600A00600400E00600600600603600 0046020006000004000000000000000000000000000000000004FFC81E0000000000AB8AB8AA0AB8 AB8AB8420058AB01502A831631622E2AE2AE2042AE2AE2A82840042A62AE2AE2AE2AE2AE0AE2AE2C E2AE000004000000000000000000000000000000000000FF77D20000000001119559541559519558 85955145804005055655640E5361304465565565404CC0044C655655655655630655050611055600 0004000000000000000000000000000000000000FFE90F0000000000018018000018018018009118 01800000002604600600600611600600600004C00200E00600600600600600600600600600000200 0000000000000000000000000000000000FF95900000000000858AB8AB8AB8898AB8600818898180 0062AC2A628E28E08E0162AE28E0040040022062AE2AE2AE2AE0060AE03E48E2AE00000000000000 0000000000000000000000000000FF3EE70000000000058018018018018019008018018040056004 01604600600008600404600C08400408600600600600600E40000600000600000400000000000000 0000000000000000000000FF0C220000000000318018018018438018120358430012286000002004 0262262340060062C425000002E0060060060064A600628622600600000200000000000000000000 0000000000000000FF15AE000000000011801801A01801801800A0D8010040006800002124006400 954084026004000804156006006006006006000006000006000C0400000000000000000000000000); SDR 8000 TDI (000000FF2193000000000155955800555D55D55843155955810000048654C44651411654C5545564 04556001556D57557557557556154556537556000400000000000000000000000000000000000000 FFDDD100000000008A8AA8000AA8AA8AA88A8408CA80200012C8AA62A22AE28A04228A28A0A60220 002AE2AEAAEAAE2AE2AE0AE0020AAAAE000000000000000000000000000000000000000000FFC0FC 00000000000020140040000020108800000000400000240000080004000040000000A80004000000 00000000800000400000000000000000000000000000000000000000000000000000FF8B4B000000 0000C08AA8000AB8AB8AA8009068A001800000002322322880AA50228828A4124021002AA2AA2AA2 AA2AA2AA4A800A08A2AA000100000000000000000000000000000000000000FFA605000000000002 00000000000000000400000000000000101000000460064C00060064084800800000000000000000 00206240046000000080000000000000000000000000000000000000FFFEBD000000000030000000 0000000000B013000A00400004A00101100064060100260260C00500000000000000000000000061 00406000000000000000000000000000000000000000000000FF04920000000000010018040018A1 8098248010010A004500104024060000884020081281060D602000600600600608E00600000410E2 06000000000000000000000000000000000000000000FF3B3F000000000001001880001801945800 80384100800004C000212623000604830040044440450042E02E1065160060962264064000460000 00000000000000000000000000000000000000FFB71A000000000001841880001881801800911901 00800000041520A602640602624600E01600600018612E00628600600E0200140480060400000000 00000000000000000000000000000000FFF88000000000004182181000180183184298B921080022 002422224665E09805C00641623630E33206600618600E00608620604E2060260000020000000000 00000000000000000000000000FFF48000000000000080180400182188B820001881820200829008 C00000020640212832010A0C608020E8860070071160060012041272060200000000000000000000 00000000000000000000FFD358000000002000A01A00001901A0180281180B924044044825450010 0520082300140020C1404040600682E0062160060262040000060000000000000000000000000000 00000000000000FF066E000000004000801802601801849E40089815810222003450008008600002 400602602520C0200060060060060160064000060000060000000000000000000000000000000000); SDR 8000 TDI (0000FFC67D0000000000000000000000000000000000002000000000000000006807000006806800 000000000000000000000000006000806000000000000000000000000000000000000000000000FF 7CA3000000000020800A21801800801800A022000000C0300200300210000200EAA8402082002000 002002002002002002280042002002000000000000000000000000000000000000000000FFE6A100 000000000100100400000000000008000000A0800001900010000000400800040008008000000000 000000000000000000009000000000000000000000000000000000000000000000FFD2BB00000000 0020800820800918800801842960A00020251600200A00700324A0AB202082006000006816016006 106056086012003006000000000000000000000000000000000000000000FF9B0C00000000000181 18118119018CBCA392D8918000447D064058CC10412711444C00651649610045648648628E006496 414006807006510430000000000000000000000000000000000000FFA40100000000000100100340 10800010110A100121018102CC0D440440400006400412000984C45180481404C004084024104020 050004000100000000000000000000000000000000000000FF886D000000000000808810A0888093 0D00A02A8080002224824030424020C314A05200229200A080052002402492002302292002052002 310210000000000000000000000000000000000000FF90F300000000000000000000000000002A32 020800800100200302900000000000000000005202280000800A00018000080000000000000000A0 000000000000000000000000000000000000FFDED600000000000000040000000000200040850041 40000800000000180000000600081000000000200218000000000010400010010800000000000000 000000000000000000000000000000FFE45000000000000420000000000000005000000000000000 00030010040000020040020108000001000000800800000000400000200000000000000000000000 000000000000000000000000FF291800000000004000000020020020010400000001000000481000 80000200100000000000000200000000000000800800000000040800000400000000000000000000 000000000000000000FF8B40800000000088CAA8000AA8AA8AA8008AA8AA80200002922023222CA0 EA20A28A28A2222AA0002ABAAA2AA2AA2AA2AA0AA2AA08A2AA000000000000000000000000000000 000000000000FF08C4000000000000201400201001401041008001000000080480400000404000C0 440400041100020050048048050040040044C8400804000002000000000000000000000000000000); SDR 8000 TDI (04FF8A78000000000001801801801804003809A81840A110216006046016806016A1051600680000 628008E026006026106486416806086086000000000000000000000000000000000000000000FF2C 4D028000000001841801A11850183909807806C0601C674E7061060060401E000640609858E05000 650E01600600620620811E040006000600000000000000000000000000000000000004FF9C110280 00000001801C01801800011845841000041200600F00000000600600204700608001600404700E10 6106016006086006006006000104000000000000000000000000000000000000FF0E7B0000000000 0180380BE01820029E11809022242001600600000000608190200610602042600400600604600600 6006040006000006200004000000000000000000000000000000000000FFE1E40000000000119D39 8381D801829969C29A01B3A200E806DE235B16E01609640E08682022608000614641600681606600 6006A06006200800000000000000000000000000000000000000FFB7940000000000018018018018 09801805821801800180600700220200E44000580E01708000610200E8060060C704620E00000640 0206001002000000000000000000000000000000000000FF5C510000000000018018118038400018 01801C2090000050064020030801008024000009000060008160260260A6006206006005000A0600 0000000000000000000000000000000000000000FF4BB3000000000009901901841804001C2BA018 40800002402601208210140610010000000009600020682E2A620600640E20000400610600000000 0000000000000000000000000000000000FF5D20000000000011851801801A11A039058892056AA0 206A8600494C82E470034026036286A062000AE386416006056097846006AA702600000000000000 0000000000000000000000000000FF9D62000000000011801A01801A01A21801811081000000600E 80422480680700624E806166966000106C1644600E00600600000440004E00000000000000000000 0000000000000000000000FF0618000000000001901801801800021C4180150010C040690E011330 14844610020800120641620104602600621600620E20600700000600000000000000000000000000 0000000000000000FF43C900000000000180190182180400580B8810200200046226000000000000 02210004000600600040E10608600600610600000414611600000000000000000000000000000000 0000000000FF30D40000000000000000000000000000000000000000000000000000006006000006 00600000000000000000000000000000600000600000000000000000000000000000000000000000); SDR 8000 TDI (FF5E8E00000000040180180180180190188380382580002AEBEE63CC2A2160A62BE2962AE2AE0EE6 A802EA962A62862AE0E618E05E806006000440000000000000000000000000000000000000FF48E4 000000000001801A01801800001A01812000014000641600415004655014254680755601613448E1 4640E526206296000A0600051600008C000000000000000000000000000000000000FFC9A1000000 0000038018018159D00B5A21B8438007911060070C460040620640200600600620641608680640E0 06006206006006006006000006000000000000000000000000000000000000FF1EB3000000000401 801A01801C04101823800840C000236286506106056B008211072960A60360800164060864064465 46081017000006000000000000000000000000000000000000000004FF6FA9000000000103811841 801800021881800812903000605601602E00604611022E0264164860242A608603608608E0060160 06006006000004000000000000000000000000000000000000FF5DB2000000000001801801801801 80180180100100000020060040040060000040060060060060000060060060060060060000060000 06000000000000000000000000000000000000000004FFC366000000000001801801801801801801 80100140100020070060050060070048060060070060040070068070060060060060060060068000 04000000000000000000000000000000000000FF7A6E00000000000184190184180D801821841841 800090600600600600602802600600601600600404E02600604600600600000690000602000C0000 00000000000000000000000000000000FF9FD20000000000019138059018C1891C01D05E118812A0 E106027416126006D16D46327546126205106416B562163460C60860060060069000040000000000 00000000000000000000000000FFFB1C000000000041801813801A81881C01803901801000600700 600F0061A602603600600700600100702E0072060064060560070060060000000000000000000000 00000000000000000000FF589A00000000002184B881C11835801C45B018418C014451C7046A0600 600821E5070A680648644408E00612E1060263061201060800060A00040000000000000000000000 00000000000000FF01EA0000000000018A1E11941A0D8118418A10D1001028E00602400412780610 430EC063360264058462064860562861261160060060060000140000000000000000000000000000 00000000FFEBC2000000000001801801801821811C81A21001408300D00708411500602920402E40 70060061081564A601602610E0060008060A00860000800000000000000000000000000000000000); SDR 8000 TDI (255B000000000201A01849805881805801901005910008690605600C004046084004006446006000 006006026006106006014146106086000000000000000000000000000000000000000000FF5C6300 0000000480C00E80900C4CF50A41E08A48840101340AA862A285700A84AB0B012006907001487406 80740600790A907003032406001340000000000000000000000000000000000000FF7B6E00000000 022220008128520012500200A4040080800200090108040800091400880E40200820980C00000800 000000000808941008000820000000000000000000000000000000000000FF43C300000000000180 1820800816802800800C20082830241210000280001A80700000280200200040200280200280203A 010042003202000000000000000000000000000000000000000000FF998300000000008000025800 81C044048022000811080010A0A61220816006A20386006009008088020000A40480B2100108E000 0061A0000780000000000000000000000000000000000000FF224800000000010000200060000000 060019024200000080014094D080604690880600600188000000828080020000820180610003E000 000040000000000000000000000000000000000000FF302B000000000001AA9B0390180001986980 009004080B410680400020800004201021000610620020600E026006006184100204086406000000 000000000000000000000000000000000000FF7B4C0000000004A18AD943809A8244D82DC1000408 488C4B262ACA00210816020080A80C0E486A4112748E007286C2EACE006A0E900B0E000840000000 000000000000000000000000000000FF2FAC000000000003801A11881801801901D454B1008040E0 0400615400600649740600600600E10820F006226006806804110004028026000500000000000000 000000000000000000000000FF97D6000000000001E01801A01801801A0180100100088060040060 04006000804006006806806000006007806006006006006006006006000000000000000000000000 000000000000000000FF0581000000000101811841C15854015C01800814904880200E0041020508 0700105000080700600040600E007006006204000204806806800000000000000000000000000000 000000000000FFE061000000600001801801801800001801E00800E080006C262048A20011400030 C180042E00602050682600648600600408600400110F0002A8000000000000000000000000000000 000000FF418F000000000001801C01801A0190180180D805A02080208680E20A04EC089342160068 86056488016086217047407156000056800206000000000000000000000000000000000000000000); SDR 8000 TDI (8E00000000040042040249006844440240051C04A30A92A902920144028160500830102910100120 1029101421211089000000001000209000000000000000000000000000000000000000FFC5270000 00000400500D00D00808C80C03C48C0088030B34B303320310615304B41240343300710154700300 7027427483006402003006009000000000000000000000000000000000000000FFC6130000000000 8005181584180580991190180181224040044040C400420608400404608600E20000E33622608600 601654404628E206220000000000000000000000000000000000000000FF4E5D0000000000000012 010002242002014010092042805004124884824C0084404480088080480080500000500480480080 4800820804000800000000000000000000000000000000000000FFF7C30000000002002008008008 10800800800840808000200280200200204210A00204201200220000200200200200200240200220 2002000210000000000000000000000000000000000000FF2A6F0000000000AA0AA4AA6AA0C40AA4 AA0AA28240002A82A9209238288488200A882883202A80182A82A8AA82A92A92A80A82A80C92A800 0400000000000000000000000000000000000000FF22E30000000000000000000000420004002040 04000000800084900080000002802000008100000200000080000100000100014000000000020200 0000000000000000000000000000000000FF4AC30000000004AA0AA0AA0AA0880AA0AA0AA4880100 2A82A83202002A80892A12A82A82282A80002A82A8AA82A82A82A84A82A80882A800000800000000 0000000000000000000000000000FF79750000000001543543543543083541541205280040940D50 5004C8550D31481510D50C50550A40D50D50550D50550D50150C08D30D5000084000000000000000 0000000000000000000000FFA95C0000000000004000000004004000006002440021001000808121 00104001080100100100140100100080100000000100100140000000100000000000000000000000 0000000000000000FF87C50000000000AA2AA0AA0AA0A00AA0AA0900800100400AA82002802880A8 0082882882202A80002A82A82A82A82A82A84A80200882A800000000000000000000000000000000 0000000000FFD900000000000000800C00A00A08A00A00822800808080200204A80A842802C82002 802812802A41002802003002802802802C8AC03002000A4000000000000000000000000000000000 0000FFEAD200000000000100100140120400100100902D0020D28000104844004A00044044840904 004801005004005004804000204800820804000800000000000000000000000000000000000000FF); SDR 8000 TDI (00000000040000180180005000000182100100120480004000100460469020060260000060200060 04006006006006406416026006000040000000000000000000000000000000000000FF2179000000 000354155955D54140354155933145210230055055048055211052A53655655055600C5565545565 56556556550556510556000014000000000000000000000000000000000000FF3CF60000000000AA 4ABCABAAB081CAB8AB8938ADA0403002B604A2C228E28E0062AE28E2A82AF0022AE2AE2AE2AE2AE2 C60AE12628E2AE000802000000000000000000000000000000000000FF57B4000000000200001A01 801003801801801809A0200480060020020024208040060060000060000060060060060060060000 06040006000000000000000000000000000000000000000000FFD12F0000000000AA0AB8AB8AA884 2AA0AB8A1081018028020210220228808845A2882882A82AE0202AE2AE2AE2AE2AE0140AE2040882 AE000000000000000000000000000000000000000000FF5333000000000000401801A00020000001 81104100400000020A214A0040060C004000000000680000600600600600640C0000CC0260060008 00000000000000000000000000000000000000FF514900000000000000180100100D801801805815 800004812C2140040462204040060460060060000060060060060061262060062060060000200000 00000000000000000000000000000000FFEEB60000000000000018090010018098A1823809800020 002400422C0822260060061062260464004260A608E12E0060040300040A04864000C82200000000 00000000000000000000000000FFA3C70000000000000019030000C20E001590B14914283484A000 028063021E00040000001E10602030648600600600623650E5060100060000000000000000000000 00000000000000000000FFA24D000000000000001805020104080001809003002201008832808004 400049213004010600E0B000E0060060060064440000040060460000000000000000000000000000 00000000000000FF3FEC000000000000000008040040008094020022020204020822000801602630 84061065400301100884400080A80000103063000562002000000000000000000000000000000000 00000000FFBC0D0000000000800000880080040C00080D0100120200400000012048602E0A04060A 63000905001105004C03000102000060405164000400000000000000000000000000000000000000 00FFCC6F00000000000008990102080080A8C0900102100230200231204212000200A15004200210 24000620021020020220022E0202102142000150440000000000000000000000000000000000FFF5); SDR 8000 TDI (0000000001A01801C2B804240001800001001200008E0A20000042040C2006006009006090804806 006006006806204006006006000100000000000000000000000000000000000000FF5AC700000000 020180180180182000C40180080101224D080601608E224004008026006000004400004007007006 006006004006440806000010000000000000000000000000000000000004FF0E100000000000018A B8AB8858CC0800AB8AA8AB00100042362062360CC4AC2002CE2AE3A02AC0002AC2AE2AE2AE2AE2AE 0AC2AE08E2AE000600000000000000000000000000000000000000FF217D0000000000018018218B 1803801801835005804000002602E08404000000C00600600600600000000600600600624E000006 020006000220000000000000000000000000000000000004FFA3200000000000018AB8AB8A18818A 38AB8AB0AB80922482062CE30408C08C22428E2CE22E2AE2082A82AE2AE2AE2AE2AE0AC2AE28E2AE 000088000000000000000000000000000000000000FF673D00000000000195591580195192D95590 1949800255449650644E5103304C65565364D655640455455655655655610655032E110556000104 000000000000000000000000000000000000FF1B3000000000000180180181180980980180180180 521040C6006046204024116006006006006080004006006006006006404006046006000000000000 000000000000000000000000000000FF5DD00000000000000AB8898058818818AB8A188981102AC2 0620620628E08E00E28E28E2262AE1602AE2A42AE2AE2AE2060AE00668E2AE000220000000000000 000000000000000000000000FF675C00000000000000182180980182580180380180020040D614E0 0E02240008600604608600640400600400600600600E00004E000006000004000000000000000000 000000000000000000FF2A2C0000000000000018038A583580980181184580B20000040040A40060 2622404600600E00608000600C0060060060A6206506026006000100000000000000000000000000 000000000000FFCDCA000000000000001A01801825A0180180184580221280040040940220401440 06026006006000006004006006006006000006400006000010000000000000000000000000000000 000004FF5F75000000000000001801A0000000000185300101122040020060260062060080260060 00006008006004006006006006406006026006000800000000000000000000000000000000000000 FFE8830000000002AA6ABCAB8AA0980AA0AB88108920020002AA2AE25628A089A0028E28E2A82AF8 002AE2AC2AE2AE2AE2AE0A82AE0882AE001000000000000000000000000000000000000004FF0CE5); SDR 8000 TDI (0000000040000000100202000002000000210000000C810040000004404002000000048111000000 1001000000000000021000000090000000000000000000000000000000000000FFAE1B0000000000 AB8AB8AB8AA88C8148AA8A08E000002AA2AA2AA2022AA2AA45A2882CA2222023020822AA2AA2AA2A A2AA2AA2020CA2AA000302000000000000000000000000000000000000FF2F570000000000000000 0000000000400000000000000040000040080040044A004600600000008040800000000000000000 40880060000000A0000000000000000000000000000000000000FFFAB10000000000000000000000 440B000000C00C00C00000000001200060060000060461080C802004000000000000000000602024 6000000000000000000000000000000000000000000000FF85D20000000000018059098098C40000 4380000100000401260002800A428400202808000E00450000200E0260060060060840C400600600 0400000008000000000000000000000000000000FFB6A60000000000018018019418080241019400 81000031020621003001402C3201000004C601402008804600608640E00605440600044610008000 0000000000000000000000000000000000FFB5850000000000018018098A18098030018010018000 00001614402C00402400648609E28E0042A008000640600620600600420418010600024000000000 0000000000000000000000000000FF4CBD0000000000018459018018418210618A50818100200136 1AC08404C0544D443E11600600440014800E0060C601E00603440600622610000000000000000000 0000000000000000000000FFD385000000000401803901C098C4000083800801000013030E400202 14428C440200000040814000002846A2680700600608C1240060860800A000001000000000000000 0000000000000000FFED7A000000000001A018098D18082808018A08B31442110206428142414004 00214000045000415080204630E3160262460A400400082620000000000000000000000000000000 0000000000FF0D5A000000010001801F01C09841D0161181193580C208842600002250400410C0A6 0078800060A00470070071170060264AC00600000640000000000000000000000000000000000000 0000FFD9C3000000008401A01C03B43801A2140984D801840260102614010A0942840860060064D0 806010806847116C07006806204406007006000000000000000000000000000000000000000000FF E26B000000000401C45A13803810020041900001100200008E20A01004452C22220E08E001006205 08600640602684E406004006001026080004000000000000000000000000000000000000FF07DB00); SDR 8000 TDI (00000000001000020020000020000020008008008010008009000008004500000800000000000000 00800000000000800000000048000000000000000000000000000000000000FFC3F2000000000000 80080898081E9808E0054806800014600008600A006082802293282096000001C1201A88A0060020 02172146582006000000000000000000000000000000000000000000FFF579010100000041901851 8210439099240B585584000D6151496D2405544C354044017114040000456D4E0060460064C60865 16006C06000000000000000000000000000000000000000000FF38C9000000000001001620001110 40000000A101100068402000401400400400580CC2800C0100401010008018058010100000A40000 04000028000000000000000000000000000000000000FFC0A0008100000040800828800844800920 0028B0900000A04000250204A00228A04200A0930480008022220020020034220833120034020000 00000000000000000000000000000000000000FF7F25000000000000100000000010110002008004 04002A0100310000000450040000C000008000400300800000000000000008000008000000000000 00000000000000000000000000000000FFB84A0000000000000000000200802000001E0400000004 0008800028040800840040000C001000006908090400300000C81100004000000000000000000000 00000000000000000000000000FFA61A000000000400200400400044000200000000002130100100 80104004000000000000080000100008000008000010002000004000000000080000000000000000 00000000000000000000FF4E1400000000000000000000001002400004200000800300000A00C000 00000280200201000000801200010000000000000000000000000000800000000000000000000000 00000000000000FF61598000000000AA8AACAA8AA8C08888AA8888AA80011422AA2022020AA0AA38 228A28A2222AA20020A2AB2AA2ABAAA2AA0AA2AA0ABAAA0002000000000000000000000000000000 00000000FF6970000000000001201001001010040401021009000100400400401400000010400400 00008400011080050050050040040002100010040004400000000000000000000000000000000000 00FFF5A4000000000555D55955D5591190DF5590B155808240D55740445415655640C5145164D655 6008447556D57556557556556556516556000200000000000000000000000000000000000000FF8F F60000000000AA8AA8AA8AA8A08808AB88A88480A22AA2AE2B62A22AA2AA0022AA28A2AAB0A42022 22AE2AE2AE2AE2AE2AA12228A2AE000000000000000000000000000000000000000000FF40BE0000); SDR 8000 TDI (0001801841802088120020120009000000E008416001040000010A06006904000000044906002006 00600E006406006006000000000000000000000000000000000000000000FFD6A100000000000180 1800820002002000008003000080601000620002004000040E08E42400000481600680A026026006 006006020406000004000000000000000000000000000000000000FFFC0518000004016199B84982 114198001000023387C1006640206922E2D197496106686210010100906043084036829094004806 126006000000000000000000000000000000000000000000FF0683000000000001803A11809001E0 008404002188002A61002470220140060860268061000A000040710212450721010400508E000006 000000000000000000000000000000000000000000FFB5D900000000000180184080182400380000 9C1190002A60800062030040064072800010100B008081688281000E20101000608E080206000000 000000000000000000000000000000000000FF944A000000000001801A0082340000000000000182 00406051006022204C278C6120A20220010028206082000106000000206026207546000200000000 000000000000000000000000000000FFCAA8000000040101801889A101A182A39606A20308400068 5126610408205821085E81694628000050404A2C05060040000040060870060000A0000000000000 000000000000000000000000FFF4E9000000000001801921A0020380030008028100000A600000E2 8C80A000448006C060860000400E4800800006004000024006420006000400000000000000000000 000000000000000000FF7A8D0000000000018018418040000100020A0101040054684004E31050A0 41008950040C02510009004080100086000000426026020026000100000000000000000000000000 000000000000FFAB280000000000018018090400A202400001200308000060084060400024080800 00000122000000486008400006000000006006106506000040000000000000000000000000000000 000000FF5A4200000000000000000000000000000000000000000000000000000000000000060060 00000000000000000000000000000000006000000000000000000000000000000000000000000000 FFA11600000000000000000000000000000000000000000008008000008000000000068060000000 00001004804001004004000000806000000000000000000000000000000000000000000000FF9B5F 000000000001801840800A00A00880300A004000C0204008200A022800040AA01022820000008020 020AA012002022002002003002000000000000000000000000000000000000000000FF7A00000000); SDR 8000 TDI (01843B118423E01510041000C90A001460004684A44B4A060000260068028060000260060BE0CE10 6002046006006006000000000000000000000000000000000000000000FF8BC50000400000118038 01C04000403000250001080000E0000061301443150B608E50E306306144D0C00640600741642000 6006001006000004000000000000000000000000000000000004FFA29100000000A0058098018800 1400102000408D05402064D009600000404640642602603601620804012E14648E00600000600600 6006000000000000000000000000000000000000000000FF866C0000000000018018018018018018 01001801800000600000400600600400000600600600600400200200000600600600400600000600 0004000000000000000000000000000000000004FFE708000000000001801A01801801A018018018 01800000680000500680600600000680680600600000600300100600600600400600600600080000 0000000000000000000000000000000000FF1DF90000000000018018218018038039018418018000 00602010E01603608445600602600608608454231203208700680640400600040600000400000000 0000000000000000000000000000FF536800000402052D831815805849A41E05801813D08000E908 20644610701710710E0868D625642800A00280244ED56C4610420600600600090000000000000000 0000000000000000000000FF264C00000200048B80980985180380180000180BC000046000007006 00700F00640608648200000000004200700620201600400600600600000000000000000000000000 0000000000000000FF38CB000000020021C21B01C41C01801982011841808102602008E26E82F006 31E40600621308028C6A000302E0A600200728400700020600000400000000000000000000000000 0000000000FFBF9400000000000180182484CA51E23C0042180170000161082060040820800C1C96 04602EC300408083320064170AF22A00420680600600010000000000000000000000000000000000 0000FF755E0000000000059018008009458A1A00281A05012000614040E10424301104002604E026 0100041300028060060070028042060000A6200084000000000000000000000000000000000004FF BEC700000000000380188180102000008001020180D00060A1887806A0405694601602E824010500 A8C8060020071060060078060460A6200480000000000000000000000000000000000000FF155500 0000000001B01820BC300C00002002604D800080E00808615E80462600704F006894000284004886 00200608600E006006020006000204000000000000000000000000000000000004FFBE9900000000); SDR 8000 TDI (48B2384902803800603000002208400000148009308280280000819200000800C80888828000900C 00801200B18000000800000000000000000000000000000000000000FFBEC7000000000009800C01 804800810801030830000810240043310240202240080000200220200021A022C068020420000230 02002002000000000000000000000000000000000000000000FFE51B000000088200100000000002 00008000040204010880808814C000080903088610619C0C0220000114300AC04300480005200070 88000008000000000000000000000000000000000000FF94DF000000000420000306022040008002 0884C409010100000002100101118084060064011000000204000408098800200400880C65200000 00000000000000000000000000000000000000FF33DF000000020053A41881800134001000000001 1000246000200802006004000A1800002001E00010420001200620618400E0060060060000000000 00000000000000000000000000000000FF9EDE00000002822D80B955A042C22812222B02210000B1 610125000AA0EAA60504908114C0C8E840824A1082200E48700C826AA68010AE0008000000000000 00000000000000000000000000FF5B63000000100201881801AA00018091010006838A0000600008 42820068174800060060080062014940A02162860260A400C8162880060000080000000000000000 00000000000000000000FFE7E9000000000001E01A01800001801001000001800000600180480200 60060000060068000060000040020060060078040040060060060000000000000000000000000000 00000000000000FFE135000000010015811D01940014145000100045410100680000280008424700 6800001090806900008942C01006E160008060068860068000000000000000000000000000000000 00000000FF2E2A000000000001801801801A00001E80001C0100000175100120A842400704708800 0411207500D0400340000E1060210060070000470000000000000000000000000000000000000000 00FF0EE6000000000601801801C004059010011041158200046000D024040140D640E44654602013 604804244A0C508600E10A085456020006008030000000000000000000000000000000000000FF34 A800000000000182180980040580902302A005A020AAF2A829324D24C9CE2AE28E2AF3A028E268A9 E80A044226887262024006147006010000000000000000000000000000000000000000FF3ED50000 00000001801A01A00000301100304491040005751130150D514A14450556346452D5649452645650 6116D1709208622E00004600002C000000000000000000000000000000000000FFCEC60000200024); SDR 8000 TDI (188180188381180000184B880030600E00600404C04C00C0B400622620E20000602620400E286004 406206006086000000000000000000000000000000000000000000FF7FCC00000000120120132222 822030000020A201010000400500488C8240B405404480088080080088080404400402890C800804 C01004000880000000000000000000000000000000000000FFA30100000020080080080080080481 48000C0800804000200200200200A00208280204200A00210001201210A002902042002002002002 000400000000000000000000000000000000000000FF2CDA0000000004AA4AA00C09208802400001 04AA00022A80002A9220380A41A102882C83610006003203A0A50AA82012402A92A84E82A8000100 000000000000000000000000000000000000FF92AB0000000000000000000A200000200010840A00 80000000801040090801048820000000000202100481000800008010008000021000000482000000 000000000000000000000000000000FFF08C0000000000AA0AA0200A00A00880001220AA00202A80 002A8200231288220AA8288200000080228228A00AA93482882A82A80882A8000400000000000000 000000000000000000000000FF63510000002003543542D42083082B000024414000415508005504 10C40550400510D50CD0800900A28850540550D40D40D40D50D10550000800000000000000000000 000000000000000000FF3B0D00000040000000051040441244000040000001008000018001310000 00900001001008001001001000100800000001000001001000001000000000000000000000000000 000000000000FFBD480000002002AA0AA0000080C40A000008008000882A80002A83002A0200300A 88288220000202000A802B02A82A02A02002A80882A8000002000000000000000000000000000000 000000FF6CEA000000000000C00B08A04A04A14800A40A00800A0030000028430028420420028029 0280290093201281200280300280B002C02802000C00000000000000000000000000000000000000 FFBCF100000000000120124312022820000120A22D00288040000049140109101140448200140048 00A0082080400480C80C920804840804000880000000000000000000000000000000000000FF8EBD 00000000000188180180580181184180980DA50242600049402CD06016014C0400688C0060004860 06504006326026046286116406000000000000000000000000000000000000000000FF02BD000000 000228C2088AE08CD4C80C005008209000096201842487013102C0200B10B2060CF00100B4920568 46017307002007043106001000000000000000000000000000000000000000FFB10D000000000000); SDR 8000 TDI (AB0818C18098A81238A9C0002AF0062B62A22B20062862AE2AE2A62AE20022A0262062AE2AA20430 42AE0AE2AE000200000000000000000000000000000000000000FF5095000000001801A018018A38 41801810009801E0800060060C60AA00200600E0060220B600608000A08600E00600200400400602 0006000000000000000000000000000000000000000000FFC6D5000000201AAB8AB8AB0558A10258 0601188581402A80062062222225462162882882A62AE1002821863922AE2AA2602962AE0882AE00 0000000000000000000000000000000000000000FF697C00000000180180180190D8050159400418 41802000000610E0021020A604600000400E00680000224680200600010002E00604600600080000 0000000000000000000000000000000000FF9CF800000000180180180102181188181010B80D0100 00600604609401441011002602600200250003400E03600600201200400640600600028000000000 0000000000000000000000000000FF94190000000018018018018018818098880038210280106286 02602410420800000600A20020800023428600E22600200200600603020600000000000000000000 0000000000000000000000FF4C2E0000000018038018018618158218840439A302000400EE106118 24802814040008002000012000401E1E208674210A52410600800600000000008000000000000000 0000000000000000FFD5FF0000000018058018018058418238400018030000400016016400410020 4001102C40A000043210400600208E00242A02600600600600000200008000000000000000000000 0000000000FFD6780000000000000000000000AC00C0240400000000040400128000040400140406 4365000001082B04000002100C04A008000004620000000000000000000000000000000000000000 0000FF74A60000080000000880C000114901102000102408002802100480000A00300284A60A6424 4344000000404000505040002A0400006080000000000000000000000000000000000000000000FF 558A0000000018A0800800884800800810000808012050008600254230A08048011000200A492488 00A1020120C200200A402102002202000000000000000000000000000000000000000000FF6E7600 000040040141140050801200040800058000410294210910A1001101101008009081041020021089 085201061000001000001000001000000000000000000000000000000000000000FFF8EC00000040 0C00C00C40C10820800C50000C0080010331270C714330300302340212B09308313002B0970874C7 00300E123006003206001000000000000000000000000000000000000000FF121600000800194188); SDR 8000 TDI (0AB8AA0AB8000AB8AA01522002A82AE20620023623428E4CC22E22E0043242AC3062AE2A02062AE2 AE08C2AE000004000000000000000000000000000000000000FF867A0000000018018018C3001801 80180000182B808204000000400400610E12E0060000020060060860064000060000860C40060400 06000006000000000000000000000000000000000004FF46700000000AB8AB8AB8AB0AB8AB8AB800 0AB8AB80102B02A82AC28C28620628628E08C2222A600422E2AE2082AE2A02062AC2AE28C2AE0000 04000000000000000000000000000000000000FFB826000000155955955801155951955800155901 804049055055654644642640453655002A50600445455004A55655044E40C5565105560000040000 00000000000000000000000000000000FFF64D000000001801801801001801801800001801800200 00000060460560C604402600409200E00400400404200601012E0040060440060000040000000000 00000000000000000000000000FFC9F20000000AB8AB8AB8330AB8058AB8000AB88180802062AE2A E21E31E20620628E28E72A07A0022262AE3022AE00622602E2AE08E2AE0000020000000000000000 00000000000000000000FFFD95000000001801801801001911801800001801800002600600610600 60060460260020020020040160060420065160860060060000060000040000000000000000000000 00000000000000FFFC15000000001801801889001845801800001855003008E0060060241440C809 000604610248200010600611000602400E5060064460060000000000000000000000000000000000 00000000FFF77F000000201801A01A0102181100180400B80120C000680613608C00400009000600 2012002D0404E00E800006004006006006000006000A840000000000000000000000000000000000 04FFDF81000000001A01801801005825801830041801801000000600600600600604604602604200 20003020060A6006006100006006446006000000000000000000000000000000000000000000FFED 11000000001CAB8AB8AB0898858ABAC00818AB80002A80062062262AE2AE20628E28A2822AB00444 22B624C2AE2AE2282AE2AE0882AE001004000000000000000000000000000000000004FFB0350000 00001C01C0180180180B941C00001801000000000600601000000804000600600A00280010240F04 600600408C046006406006000900000000000000000000000000000000000000FF33E90000004019 55D559558099119559020C5955002055000641640055055054055651240255240410244748455655 44CC556556510556000484000000000000000000000000000000000000FF89360000004018AB8ABC); SDR 8000 TDI (9804031800001800004000000004004000000400004600440C000000000130000000006000028000 004000000000000000000000000000000000000000000000FFC01600000000000000000022200010 20000B203400000000000800000900080B00060060800000000200000B0000000000100000006000 000000000000000000000000000000000000000000FF04F2000000001801801801C818A242110040 1914100010052823000822E00814C500004010016100002016002006800006006106024006000000 000000000000000000000000000000000000FF5FAB00008000180182193180100001181000500004 404480001000401060C000402804C00044621000A506482346020106406006004006000020000000 000000000000000000000000000000FFB25A00000000180180188184180380180C00180182202200 0000C10400648442400E524500006200002002086006000086104006604006000000110000000000 000000000000000000000000FF7D5A00018000180180182100185180580201195181004802A82341 0C0060040040262CC20200608800A142016706030106054106104046010000000000000000000000 000000000000000000FF54EB000000001A01A41C118A18A002990000591408000100000821225484 5028E2800050922560000064942008A6000006487086044806000020088000000000000000000000 000000000000FFF40A000000001849841841101800029800003800084015001034240A0800805264 A001428250E500546A0402002EB00216486406014006000000000000000000000000000000000000 000000FF6F6D000000001841C4180180380180180000D80B80C18800004A20120000000360060042 83A862000244000040461000062A400600D006000000000000000000000000000000000000000000 FF7AB2000102001C01C01843123811981800001843820141001101210202806050E40665403A0061 6001C905044907001416005406005006000000000000000000000000000000000000000000FF0244 000002001E09801C0382182003380000190012020200008004000C80820060A60050460160044850 2600F21740808600F886084826008004000000000000000000000000000000000000FFD08B000000 001801801801801800001800001800000211000000012808810A0160464441060860061140061360 06008036006006204006000006000000000000000000000000000000000000FFAC88000000001801 C0180100180000180000180001428400000060060200061040060040060060040050050068070009 06006006044006000004000000000000000000000000000000000004FF11130000000AB8AB8AB8AB); SDR 8000 TDI (5193194994D805940010893648630C4250354CC5040D41570C6042B162170064860061160160CE00 7286006012000000000000000000000000000000000000FFDBEA0000000000011000080040004026 0060160160010004058040A410400C00401D404A0080010004004400180040824000440400400400 0080000000000000000000000000000000000000FF8CF1000000000000800840800900B088289148 02840080001210200200200234231204A00A14304089300300240240211201202200200200200800 0000000000000000000000000000000000FF063A0000000000000001000000300000000000001000 008240000A804000400080002808C000090282080000000000082000028980050000000200000000 0000000000000000000000000000FFEE6D0000000000000801000A200002008003004000000C00C0 710C084A0808800000C0000000100220123801008000084001010000080000000001000000000000 0000000000000000000000FFD08A00000040000000000040002020000000004C00800000000A8148 0110000000202000808000000002C005100080000000000020000000000000000000000000000000 0000000000000000FF65BC0000000000004000000000040000002000000000000000000000080010 00000000080800000001000810000000000000000000000000000200000000000000000000000000 0000000000FF10C38000000AAEAACAA8AACAA88CCAA8000AA88080200000002022022232A22AA28A 0AA2222AA0002A20122422AB2ABAAA2ABAAA0ABAAA00000000000000000000000000000000000000 0000FFAC210000004014014010022804022000004A0001010000080089410C100014044004000851 0040001008000048048040040A1004001004000000000000000000000000000000000000000000FF 55E9000000755B55B55955955949955800755949800000000050C50444641455655415754F556000 456946495556556556556556556556000000000000000000000000000000000000000000FF15DE00 00000AA8AA8AA9088528D08C08000088888020001000A022022322A62822AA2AAA822AE00022220A 2A6AAE2AA2AE2022AE2AA2AE000000000000000000000000000000000000000000FF9E1B00000000 100100000040040020000000000401400000000400300900A0000000400001000000100200004001 000000000800000800000000000000000000000000000000000000000000FF24B00000000AA8AA8A B8608008A8C148004048C4008000000024A2CA2222A22102882AA0222AA00029A3422122AB2A82AA 2122AA2AA2AA000000000000000000000000000000000000000000FFACEA00000000000000009208); SDR 8000 TDI (80D12DB4100180001000860400149A708600E2A664024600C50026B046B8220625204800600600F0 06000000000000000000000000000000000000000000FF6746000000000001801804C01101AA1421 C110C5800040008610000520E08480DD4E000C0610500001200E002C4E00201008E1060860060000 00000000000000000000000000000000000000FFBADE000000000011C008098A1800001804880101 8000201006000810012042D0201002104680030080624E80684E0AA2C100E0060878060020080000 00000000000000000000000000000000FF1E90000000000001800801801800241820800031808040 000690012000304080014000000E4110200068568460860820200960060560060020000000000000 00000000000000000000000000FF742A00000000000180192D2810019CD1012DB245000010800614 400048520400480E02680210500228E8060860060060041063262860860000000000000000000000 00000000000000000000FF62C7000000000001821841301801803A01415283002008080E80C11830 400F00E00621EA2000408A00680700E6060060041064060071060020020000000000000000000000 00000000000000FFF5EE000000000001841811001800005801000155402048000601100020040001 0800402449410100C1600E04E8868860200160060160060060000000000000000000000000000000 00000000FF90720000000000018010010018000C982108000100800080161000400000320020A802 20000000501060461060060060000060465460060060000000000000000000000000000000000000 00FF6898000000000000000000000000000000000000000000000000000000000000000600000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF2E 07000000000000000201000000000001000400000000000000000480000000000600100400400080 0000005000004804000000000000000000000000000000000000000000000000000000FFF8260000 00000001800810A00800800A00A8110000008000AA084002282012006A1029208A20202000A48A01 2002202122002002002002002000000000000000000000000000000000000000FFE2910000000000 000000003000000022002002000000841200000200800004000800000C0000100000100000080000 0800000080000000000100008000000000000000000000000000000000FF2FD9000000000000800D 068808008008008F60C6800000028E41015E08200200220208E08A20202018A28600218221248201 6006006006002000000000000000000000000000000000000000FF1FE50000000000018019419219); SDR 8000 TDI (18400010418AA04004261200CC02202002640642604600E00421414410E35614000600E006006006 000004000000000000000000000000000000000000FF66CC00000000000180000100080180080000 10010000000006000004004004002006006002004000002006006004006006006006006006000000 000000000000000000000000000000000004FFF76B000000000001801001000A01800800401A0100 00000007000006804004003006806802004004002806006805006806006006006806800004000000 000000000000000000000000000000FFBE9B00000000801180020100180188181000185180000000 46120886007016102006006088004104A44002006200006006036086106006000004000000000000 000000000000000000000000FFEC55000000000125C5123104385582590002180180003000164000 4ED0602640A336CD6202134014104D2A4C485489694740620F006806800004200000000000000000 000000000000000000FF14CB000000000001C09800001003801000211A0580000000068260060060 2600F22608A20208600029200E00018C060002006006006006004000000000000000000000000000 000000000000FFD4330000000180A1801920003029801000021A6981000011062070BE00681E2460 4600208A10E00480A416040004001022826087806006005004000000000000000000000000000000 000000FFC8A7000000000015840C100214018C31080118030000500036906003D040059040962260 0382708C8225464A144411410621640E106006004004200000000000000000000000000000000000 FF3085000000000011800A100910118210004054011224001056045082104B040040064560120070 B410200628800430524E00E086426006005004000000000000000000000000000000000004FFCAE9 0000000100098018010290080010000020C181401000A6104016002840001C4600400A0021028042 5649400600000E006006256006004002000000000000000000000000000000000000FF5EC7000000 000001980901121E000C18004E008794000800170C510612252008020600500210205402C0A60448 0610048600610680E006006004000000000000000000000000000000000004FF1279000000000001 801810201000081601080001400000180780000604001212200622C0020020040C80860000074041 26816006006006004004000000000000000000000000000000000000FF3C9C0000000000018088A0 0458040098110000010001800006000006020842302006004002013005A004062008063045060060 0600E006006014000000000000000000000000000000000000FFCD12000000000011BE9830903083); SDR 8000 TDI (080084480000080C400400202008010C51160040281500104208880002002800C90E12810A808000 0010000000000000000000000000000000000000FF65E90000000004800900000080800000200004 0400000001002106100A0100101086800A1080000220000002040840943100140800040000000200 0000000000000000000000000000000000FFB6140000000000418428898110000210400302111200 100806000804000662000C0000004202400000684200C03600420620E00620601662000000000000 0000000000000000000000000000FF9BA1000000000301B05A91A51A8424182024410114801002A6 080024820A80AA000041020214490084E0028CE8168D4826A268AEA8F096490C0000000000000000 0000000000000000000000FFBFF60000000C0003811805883A498018101114130000000006200206 30C02600808E0808CC20E00020628E00622020430E10E20604600602108800000000000000000000 0000000000000000FFC40E000000000201801001001A018018004010010000000006000006004004 00200600080400600080600600700100400600600600600600000000000000000000000000000000 0000000000FFE9480000000005418019018108140008001004458000080006400005002200083040 0000069A400088604002600608000680600700600600000000000000000000000000000000000000 0000FF046E000000000001801801000800600F004005019001800006090424282002402300008106 004400007C880071470000074260A62060060002A8000000000000000000000000000000000000FF 36D5000000000001A0100180180180180000005182A00404B644000F0460B405205654024C20E8A8 25404040421000A34E006407006A06008000000000000000000000000000000000000000FF9DF200 00000000018010014018018A38A0000001C0002A90AE0F82CE42E2AE2AAA8F0A9286C0E2B9284209 22E22C0A240648E026006006010000000000000000000000000000000000000000FFD03D00000000 00018008018008002009006001311540141556500C140C0D525565564D25529565454D4CD4446D57 8921560463464074060012AC000000000000000000000000000000000000FF481E00000000200186 10218119F434180010039D0AA000020600002461000200600620202A82700400C884084886002006 006006006006000004000000000000000000000000000000000000FF325B000000000001A008A120 0800002880001001C0000B0116411206002C8850E0CF10ED16146548104214A26006000006106026 006006000000000000000000000000000000000000000004FF42190000000020C180100100180000); SDR 8000 TDI (830A00808000000204200A88205208A8021020021222008820028128028220020020020020020902 00000000000000000000000000000000000000FFE77E0000006004AA0040940AA0E00AA0800864AA 0041000AA8280220200311A11288320A20210001360AA83402A83183412A92A92A82A82000000000 00000000000000000000000000000000FF7295000000000000224000022000004004004408000000 10000010080008000210000000000000010110000001000000000000010010000804000000000000 00000000000000000000000000FFAE3B0000000000AA0A00A00AA0800AA08C0900AA0000000AA824 82C0200A402202A8208A282C0000200AA82112A82002082A82A82A82A82284000000000000000000 00000000000000000000FF50A40000000001541085503103522283103301440140000550C90540D4 8530D00530D48A30D50A00540550D48C48D48D40D50D505505504508000000000000000000000000 00000000000000FFC69200080000000060840040040C000420440000010000000010100915000010 00010200810014000080010000010210000000000018000810000000000000000000000000000000 00000000FFC9530008000000AA00008E0200801280C800228800000002A80402A8A00000010A8822 01002A0000A20AA8AA02A82A0AB02A82A82A82A80800000000000000000000000000000000000000 00FF1A3C000000000000800A40A00A14A80A04200804814000080288080210AD02C0A00280282281 2A00002002002802812002803002802002040A00000000000000000000000000000000000000FF50 C600000000020134C2003122202022202B10410000000004A5000484485412002408CD1480480088 8004810800804814804804804004C10800000000000000000000000000000000000000FF8A930000 00000001841901813801891820005B418000000046000C0608448C0C680404400448640010600400 600640600E006006006006200000000000000000000000000000000000000000FF65090000000000 20C0AC40D40D04C4091443000A9440100C8603109602A04381231380623604F049202A2F00350A04 E346146286087A16001008000000000000000000000000000000000000FF37020000000800022043 4028220C24021428600208C0000000800901158014200008808C0088CCC090801080090081080010 0100101008888A88000000000000000000000000000000000000FF2AE60000000000018088009208 0290080004118004000012A208000100288203A0002C2886E0000000360208200286010200202300 2002000000000000000000000000000000000000000000FF76C70000000204000000020441200101); SDR 8000 TDI (08C100000002AA00400A20000200E2882A039EA020002042301962823222A82AC2AE2AE2AE000020 000000000000000000000000000000000000FF7F87000000400000081A8191400414180182002500 00000002004202008D00206000000046102800144100206012080000004006006006000800000000 000000000000000000000000000000FF185200000000000003583182182180500188D81180C00000 040061241440340A604601600203202000C01405602200A002006006006006000000000000000000 000000000000000000000000FF275E00000000000000188180180180188180B10182002000042260 142040160862061062024100C008440420608222200A02C0C6006026090000000000000000000000 000000000000000000FFDCEE00000000000410184586014000184780A88102402D02402262003801 0044E00006630604809001008400E658002022386006016416000008000000000000000000000000 000000000000FFCDB700000000000000180180801204B801000849108010028008E24003040200C1 1000600E1000000200840160000020A2204006006006000290000000000000000000000000000000 000000FF720800000000000210012400804403400000000808400501200100100500884C04060001 082400280C82002000C0400000028020000410108280000000000000000000000000000000000000 FF291B0000020000200840240080201400D0000028054000000050002022440821000E53020C0140 40244510290084014020088000110000000000000000000000000000000000000000000000FF8AD3 000000000000021888800992802940880040010220808A1220C20824820A23101020021220880020 2002200224231200218201204A000000000000000000000000000000000000000000FFD9FF000000 40040050040508200000000240140001430A13210090190090250010A10011916810010011011412 01021089101201001000209000000000000000000000000000000000000000FF73E2000004400440 442CA08949008A4928C0041080010C145301310301714B5032134534031031534470370070030232 1700B507007016409002000000000000000000000000000000000000FF64C1000000000000001811 80182380180390182184004100043460244C420404E14408600604E00000420620E28640E1440060 0608E006000000000000000000000000000000000000000000FFFA80000000000200231225200210 00025220100100208000040089040349040400248101108108000140040A400008092C8008048050 04020800000000000000000000000000000000000000FFA2D8000000000000104808800804800800); SDR 8000 TDI (AB81200062262A821224E2242AC28E22E2222A02002222262AE2A82A82262AE2AE2AE2AE00028800 0000000000000000000000000000000000FF035600100000180195515415112384C02202B94D8040 00648E44050A54610602E55645654020C4465424D655649051054E50655655655600050600000000 0000000000000000000000000000FFB1B60000000018018010010010358000050218018000006086 00014210608600604600600201408010200600600000008600600600600600000000000000000000 0000000000000000000000FFBBE00000000000000AB8AB881899901002803081800000020622E206 2A600602628E3262B42621002B22062AE0460662260062AE2AE2AE00000000000000000000000000 0000000000000000FF21BA000000000000001801801821885080041001808000004E00604E006446 28C04600601408244400A00600603600600600E00600600600040400000000000000000000000000 0000000000FFA70B00000000000000180184B805849030911033804000010408608401610C006006 10E00000A10000212E00630629408E3260060060060000A000000000000000000000000000000000 0000FF78C600000000020010D801831849841000023001A1040000050060040D69048840260060A0 002008082006006004104006006006006006000008000000000000000000000000000000000004FF 490F000000000000021801884004115000A100010024000002006006002030006006010810006800 02611000630E016000006006006006000000000000000000000000000000000000000000FF6F6500 00004000AA2018AB9000800010000800AB00000002AA0062AE20220023C28E2A02002AF00020E220 2AE0262262A82AE2AE2AE2AE001800000000000000000000000000000000000004FFB83F00000000 0000085813920004109801800001004600000080650009244220E0060010001270001121022060C4 024004006006006006001040000000000000000000000000000000000000FF69DA00000000055403 1D55840142105801314155000200055000655048AD025445564804C9556014422432556304454554 55655655655600000C000000000000000000000000000000000000FF65450000000002AA20182180 B8D1801001A9588BC0800002AE00405222488E8A62AE2A842621202024422204620A20A2AC2AE2AE 2AE2AE000000000000000000000000000000000000000000FF91B800000000020008380180B81182 980182100180C000000600400202402C00600605000600200008C082006032082004006006006006 000000000000000000000000000000000000000000FF871E0000000000AA05190380008804D001A4); SDR 8000 TDI (020021602642022414200204A08000620200612003000600680089020000E0060062060082000000 20000000000000000000000000000000FF3E3A0000000018018018A1921840004045830040110008 609609000C00A50020041041608200620020034E1165504400D044612600E0060000084000000000 00000000000000000000000000FF14490000000018018018018A180588002182101180800C600600 000E00629600604600608410200000C02640E00000002400600604E0060000000000000000000000 00000000000000000000FF4071000000001801811001001033808003009181800003E0B623820402 E01C2144B620624448220061420E18669800074C2260360360061000002000000000000000000000 00000000000000FFC4280000000018018018C380B80002210180402C0A0020701608002610000102 82088080020061200441062060202A808100F087006C060082080000400000000000000000000000 00000000FF629C800000001A858038B19019040000858200100A804C650624048E2004422420A030 000A10E4C01042562460000408002960860060060000000000000000000000000000000000000000 00FF73D3800000001D0580D089081041800011020011800021628600801600008410C00711020C00 6200084016426000000004296006006006000000000000000000000000000000000000000000FF55 F3800000001C018812070010359A2509000001800014700644150640008648614600920692604000 4846806061018805007006806806000000000000000000000000000000000000000000FF85EF0000 000018019018408018800222048001000D0000780E00000400043304241640082625008420A40608 62080412A300711700F006080004000000000000000000000000000000000000FF913C0000000018 0180140105300400004D002000000000608E0000260B014200200600810688810000280E80601000 880A006006806006000088000000000000000000000000000000000000FF1255000000001C018018 00801820000000831000004200604600100600400800000608004E0004000D610600600080014280 6806006806000400000000000000000000000000000000000004FF5D790000000018018AB0AB0C50 880AA0810950AA00820062162A828E2042102A82AE3203162200182163362AE2A02A02122AE2AE2A E2AE000000000000000000000000000000000000000000FFD9D90000000018018010000030018000 88101001808000602610802201625430400600600210000000200600600000000605600600600600 0040000000000000000000000000000000000004FF87E40000000018018AB0AB0890818AA0A90818); SDR 8000 TDI (009120220122AA233202432A53402092022200D12C0A012032002022202012002022000000000000 000000000000000000000000000000FFAB1A0000000000001000000001400100100220420540C200 08000000080120000000850200080010000000040000010008080021800000000000000000000000 000000000000000000000000FFCEE200000000002010002828000A08220000004000004400400B00 000000484400110100008010000204C0000280041300000000000000000000000000000000000000 000000000000000000FFD1381000002002000000B200004000001000800C00208008000000100880 00000020108028040010100800000000000808000000000000000300000000000000000000000000 000000000000FF2CAD0000000000000000000000120000C400204000000000000000000400880200 000001010902808500008008008000A0800800800000000000000000000000000000000000000000 000000FF58118000000AACAA8AA8008AA8848000008A488080802AA2AA0003A220232228A28A2222 032024002022AA2AB2AB2AA2022AA2AA2ABAAA000008000000000000000000000000000000000000 FF8F4D000000001001402400044004000024021009010000400400009080400400C0041008250002 0100C005004804804010004805004804000000000000000000000000000000000000000000FF9A88 080000555955955A0195593180002590191180015575560004465044244AC53455644CC460014555 57556D56D57417557557556556000008000000000000000000000000000000000000FFE5FB000000 0AA8AA91094A9088A88001089120A280002AE2AE000022AA62B20C22AA22A4062AA1002A62AE2AE2 AA2AA2A22AEAAE2AE2AE000100000000000000000000000000000000000000FF95C1000000001001 4000AA00000000008802902200C00000000000080300080000000009000881091000008000000000 A0000000800800000300000000000000000000000000000000000000FFE0120000000AA8AA860820 80088080000082808000602AA2AA0004022320064062882221162A20422A22AA2AA2A92A82A22AA2 AA2AA2AA000442000000000000000000000000000000000000FF9C26000000000000002014080002 000090104000000200000000044000004044800600040801428000C00000080600600C0000000000 00000000000000000000000000000000000000000000FFD276800000000000110100052030000042 00004A01020000000001081103081000461080A00000400000000000000000000000000000000003 40000000000000000000000000000000000000FF9D2100000000180180180480B8000A8080804084); SDR 8000 TDI (02040620800680600300C00004384650E00823680000420600000080E00680600600020000000000 0000000000000000000000000000FFADEE0000000018018098038230081030119018014D02021006 42011603608300C0402220064862A000603508529600881042F00601600600002020000000000000 0000000000000000000000FF510D000080001941801004A0813003591322FA83C440A8E01680EE47 286227024C1601A50E82680882A0820140041C014400605712608E00020000000000000000000000 0000000000000000FFD11A0000000018018E3BB9A00010249801A01A298000806086806806006006 00400609019600ED00982E46A0C82610018404400605610600800000000000000000000000000000 0000000000FFC8280000800018019018258040200918139298510500101006442516026B46008800 12100753602004600A48E2A600800CA0E80600600601004020000000000000000000000000000000 0000FFFA8A000000001801813801850000005800803083080025010600A006296006020020400004 00601000E106006014000004006006006016000400000000000000000000000000000000000000FF 68980000000000000000000000000000000000000000000000000000000000000006000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF6B7000 00000000000004000000000002000000000000000000800000000000001006805000801000004000 800800005000801000000000000000000000000000000000000000000000000000FFF59400000000 1800800800800A04000808C00800010082880200A08200202222A2880A2002022000012802002002 8A2088002002002002000000000000000000000000000000000000000000FF8F5D00000000000110 03000002800000840A06000000800930880000001001004040008010800000000000000000000000 880000000000000000000000000000000000000000000000000000FFA42200000000080080088681 88800008828049C0808040A80600648200300300F2820A3006006000903DC300218388200E083006 006006000000000000000000000000000000000000000000FF61F100400000194184590D8D50A805 1B43B35953904011604E01455655750640C454407104146408556416036AD601704E486016006046 000000000000000000000000000000000000000000FF33760000006016011000404016067044186A 2001650044488D9C5A00000050045024050C1D024000088100000000800C04000044004004000000 000000000000000000000000000000000000FF998000400000090084288282A80004094490890890); SDR 8000 TDI (00068060040060068020060068008040040010040070060000048060060060000000040000000000 00000000000000000000000004FF6A6A0000002018018100A0A0184180182412182180000008AE00 604680640603200600E0500000450000840060080220104820060065000000040000000000000000 00000000000000000000FF044D000000281C0190080081390B913910011C11D158010C0690608608 6106102546546900800504C800144D48240124808021045460080000040000000000000000000000 00000000000000FFC3AF00000000180180109880380A261821001805881AC6602E4066250C400400 220608A00610628004000C08640400E0860640160060060000000000000000000000000000000000 00000000FFC395000000101A01941040A0580004348400516BA00A04E48620600610620682B42622 20960860040218040262060260062860860063860000040000000000000000000000000000000000 00FFDDD5000000101801909020008940111A0B1518018140207C0610708602610608008600202B00 602130090641682E0064160078162A600E000000000000000000000000000000000000000004FF6E C0000000001811803300100820405890121201804000E00710600701610600900F03220614600001 04D6806024116147486086086006000088000000000000000000000000000000000004FF218C0000 00081841805200821108040809081A85E08000800690000680608380600684621300615010C08080 68260038A0806086006006000088000000000000000000000000000000000004FFD8610000000018 3394184892D08800010404140380C09C042E03898613606A2964160861A204E0AC8E405400620E01 200050600610600E000004000000000000000000000000000000000004FFC8A30000000018038010 91A08020404801805821001000002E02000604701248200609682691600080440600420E08280200 600600610E000000000000000000000000000000000000000000FF872D0000000818058019318000 40000800E0508100000818A6400016A0602200200600608A01609000400600484600220300602610 6006000000000000000000000000000000000000000000FF3E7E0000020018418012088293105218 13001AA10C0809E4A618404EA060BB00600618240E06608219298C01402600424260460600600600 0002000000000000000000000000000000000000FF113800000200190184100584900242D0858C1C 49082184600F80C40600790201641603202728780124300C004A060C410300C00E00600600020000 0000000000000000000000000000000000FF57E2000000081803821F40C01C421018011418110002); SDR 8000 TDI (1600604012600801400000011644608000604E004006032026000184106200000000000000000000 000000000000000000000000FFA498000000001C11A23B09A0820820330B08590100000811060061 08A8EA10B04A10820886A569108C6C40A0688ECC283680088EA46400000800000000000000000000 000000000000000000FFA04C00000014DB23889843A201410A0001009C218040010216B168248460 A400C00628804A00600000A00C0D640200E20628CA06086000000000000000000000000000000000 000000000000FF609600000000180180080080000100100100180180040000060060040060040040 06800002006000002000006002006006004006006000000000000000000000000000000000000000 000000FFF206000000111811801C41940190A1310180181500420808061061020063009040010040 0682A000886006206004004802024006006800000000000000000000000000000000000000000000 FF33EC000000001801801900801800C81003901A11700200914F00F4830060000240000044072022 11406C1000480C0050420050B6007130000400000000000000000000000000000000000000FF87C7 000000001C01A00C01400005A11240A038C10100C404064860524A60B430C2365408B20020A00120 84146540046092504004006200020020000000000000000000000000000000000000FF0FC4000000 0018018208000000018A500A881A2102002293AF22622A20622D82C28E08822228A2982AAA2C1C6A 042AE262304046006000040440000000000000000000000000000000000000FF72A9000000001A01 801101A00084910044105949310054845650ECD0546552552C56D42554C54544D0CD164065560409 14A2210E006D50000004000000000000000000000000000000000000FF5AC4000002023A239C09D9 840016811200001801489809000600E0500AE1022020072220CD00410400488620E1A60100040020 04006800000004000000000000000000000000000000000000FFEC08000000001821A01000C00000 A21101201C058480C2120730730604604B516A163069140082150540260044045048214020060060 00000004000000000000000000000000000000000004FF03590000040AB80B800800880100901015 10183188401000D604E00651640204610602E4043000044845125160440444000020060060000000 04000000000000000000000000000000000004FF1A7F000000001801800000801801800800001801 80000000060060040060060020060060000040040000040060060000040060060060000000040000 00000000000000000000000000000004FF0A25000000001801800800801801801800001801800000); SDR 8000 TDI (91002002004102900000034000000000800000800000000040880000000000000000000000000000 0000000000000000000000FF44340000000AA0AA0AA0A00900000881004AA4AA00A02482A83092A8 2A82282082882A84802A80012500282A82A82092202A82A82A82A800000000000000000000000000 0000000000000000FFCFBC0000001541542445042822000A42004405100040480D50440C10B08A10 400530910810D50810D40D00C40D30D40CD0840550D5055000080800000000000000000000000000 0000000000FF6CD20000002004004004004404004004000002000001101000000001001100001040 00100100101000100100100112010000180100000000101000000000000000000000000000000000 0000FFBFE10000000AA2AA0882980000000200002000A000842402A8A20100000120308288440220 2A80002A02583000002B02003002A82A82A8000000000000000000000000000000000000000000FF 0EE2000000000800A40800B00A00B0CA088008008042828802102802B03402802802822802802800 8128A280AC23012942812003002000000800000000000000000000000000000000000000FFA88400 00002012012042440340012012C2355013000210100400CB4C854910940824C8D090800810800800 9408908040088C4800805000000810000000000000000000000000000000000000FF709000000004 1841801901801805809911801905800040041692628400608E036404004026006030026006006406 304516104126106000000000000000000000000000000000000000000000FF0424000000004C80C5 0C02E54828D22C44801A00908092900600603230F4033020822CF28B2D300148B4432A308A04F822 4274024062000010B0000000000000000000000000000000000000FF3D8700000000102129820040 80C42022802084800100048801008910814C20000100858800000818888C00C40C00809010900208 000800000850000000000000000000000000000000000000FFD1E900000040080080088080080100 1000C80C00100000020200200360A21244200148200222A000002002122002846203282402022000 000000000000000000000000000000000000000000FF491E0000004A248006002205402001000F00 20000020C0040818048008018510500E12406500404007402000829068000404D041680400000100 000000000000000000000000000000000000FF5E7F00000020800A0001000004100A000000032000 00080081A41828000000289606200488110000500200280108100548400001000000000000000000 000000000000000000000000000000FF0FC600000004594180300D82000814415120180500001100); SDR 8000 TDI (40C200601200600600200200200000224430E02210600000A2040060000000000000000000000000 00000000000000000000FFEA610000000018018010118018038AD091029883802000602601402200 600208624220010020220008208420600600E0000022040862002404100000000000000000000000 00000000000000FF756B00000000180380104985D9420A20270A185307004061124042AA0F609A69 62200200200980A068006618E4464021202900406560000000080000000000000000000000000000 00000000FF8BFE00000000180580108190180000002108180100001260060A429208208202611404 82201401400000060360000424205401000060000000000000000000000000000000000000000000 00FFEC560000000000000001000C20400001080080D001202C014852800001000001000E21000000 0000000100400200028100048200050400020000000000000000000000000000000000000000FF31 E0000000000020009020005044120025002000120010008844022C0901004104CE54450410408012 440020400000808C04C104000000100000000000000000000000000000000000000000FFE7720000 2A029881822843800908818000800820000000200200808200220A0C610000250246242820A02204 20E2422402002362102080400400000000000000000000000000000000000000FFD0440000004004 0001059842840040108040040814210212210C10010214110210010090292092010000880A820138 5001081001001000001000000000000000000000000000000000000000FFFB39000010400D40804C 40C50C24D40920C01C0080210C74234870930430070CF11305325300B11120A04254A04344700310 3027007100001000000000000000000000000000000000000000FFABFF0000240498018218038058 11809805805829800000610E01624609610420622448608634624012628E00630601410E03648400 6000080000000000000000000000000000000000000000FFCFF600000020140120022D2082002012 5000100100A50350008948008008149348448889010008000108A880080084C00880080500400000 0800000000000000000000000000000000000000FFD16C000000000800800880800800804884A008 0080001020020420020020020020020022120020088C240200200210280200200200200000000000 0000000000000000000000000000000000FF17AD0000004AA0AA0AA0140A60000EC0540AA2AA0000 2002A92402A82A82A13402892200702A80003005002A82A82002B12A82A82A82A800000800000000 0000000000000000000000000000FFD1E60000004002001080200280004080AC08C0220081008000); SDR 8000 TDI (00444006002044016006008000000082006234100106010116006000000080000000000000000000 000000000000000000FFC8600000000AB8AB8880AB8AB8858898A80AB88180002AE2822460062062 2E2AE28E24A44200600000620401640C0222A20062A22AE000000000000000000000000000000000 000000000000FF35DF000000001801800001801801841800001849800000600208612E0561060060 4202203208E004006044156146082002006002006000000004000000000000000000000000000000 000000FF5FDB00000000180184200180182D803802001803800200602C0562040860060060060824 824262824D608840620621000E52E00E006000000502000000000000000000000000000000000000 FF9768000000001A0192A0118B1841801808001801800200600400608400614610E00214A1021448 04004040006106028156084006006000000804000000000000000000000000000000000004FFB8DF 00000020180180028380581210C80100180100000060020000060060088460460060260060000564 1600400E086006056002006000000000000000000000000000000000000000000000FF64F7000000 4ABCAB800025801A842208A30AB8AB00000062AE2A826E2AE21030628A20620E20F0042860862AE2 25B542162062AA2AE000001004000000000000000000000000000000000004FF27C8000000001801 809409801800400800001811000000600600200C00600500602601600600480000404E00600E8020 06004012006000000800000000000000000000000000000000000000FF48A2000000155955903101 8019502A4908155955000000655655248C55640541655252E40650400449401655402E4004065145 52556000000004000000000000000000000000000000000000FF95AA0000002ABCAB943883881A8B 88B8AC8AB88580000062AA2AA2A22AC2A42AE28E2A22B22A20002A248432E2A62862A82A20042AE0 00000000000000000000000000000000000000000000FF03AF000000001A0184984992B801A09844 80180180000060020020030040C402600200213202A0000422A40062868060A00420040060000000 00000000000000000000000000000000000000FF9E830000002AB8AB8008C98558E80C88898AB8E1 00000062AA2A820A2AE2B0AA62A82A22A22B20002B200E00620427E2A42B25642AE0000000000000 00000000000000000000000000000000FF5F61000000001801802801905800000801801801000400 600200000080600000E00400A00A01280001208604608E00601400208C0060000008000000000000 00000000000000000000000000FF748600000000180193104583180584304300180B800000600200); SDR 8000 TDI (0060800BE4440AC20030814801014808018600600806800400600000010000000000000000000000 0000000000000000FF0B4E0000000018018010B908101380306790182197C020434600C0A0306400 2460C40045300000302B808260200C0260800004DC02600004020000000000000000000000000000 0000000000FF2E5000000000180180180180190014089182B811900000203750200010E249006434 20110410030300042205244601220110044651640000010A00800000000000000000000000000000 0000FF382F0000000018018098218898000A4801801911800011240E002420006128306294928044 0001001400AA0D20CE492120000106806400000000000000000000000000000000000000000000FF 1E8B000000601E0182081380180D801E01E8180B90224C781600A0898C780400600D083005920081 200002022126003880000006006000000000000000000000000000000000000000000000FF1AEF00 0000401C23832843901803945801801803800223744620A088026144446005002444AA0001340612 012016802000001107007400000000000000000000000000000000000000000000FF863500000000 1823802000811800001023801901850400008740022000621710252402A08A40000C0080A6302006 49402300022D006000020004000000000000000000000000000000000000FFF2AA00000000180180 000180184002304980180180100003161000102960C6000204082002008500010036002426824082 000004006000000000000000000000000000000000000000000000FFD5B8000000201C0182500080 18020100058018018000003026006000006002006024800096800004800086006116010036000835 007000000284000000000000000000000000000000000004FF5A030000000AB8AB8D90AB8AB88809 00818AB8AB80002AA10622E2A002621A2AC08C2283262A00002B02562AC1062802462A82842AE000 000000000000000000000000000000000000000000FFD15C00000000180180000080180184200180 1801800000409608C00808608600000020600211000404012208610420400E108004006000000004 000000000000000000000000000000000004FFAC280000000AB8AB8820AB8AB8B18A008B8AB8AB80 022AC4362B42A808E2A62A828C2A622A2A04802A02022AE00622C20E2A02442AE000000400000000 000000000000000000000000000004FF45F000000015595595415495594991013595594D80005564 4640632044E44E55255010E11644050651041224604E0B0546420556556000000506000000000000 000000000000000000000000FF34A500000000180180000180180380404180180180000060060060); SDR 8000 TDI (0400081A203000008001026600400800000000000008004000000000020000000000000000000000 00000000000000FF4C4C000000400000008020000000430000400200000010880000880000002808 00001001310005000008101000009480808000000000000002800000000000000000000000000000 00000000FFEAAD00000000020000000A200002002000000000000004000008000000088000020001 10000000000000000080000008000000010000000000000000000000000000000000000000000000 00FFBEF98000000AA8AAEE28808AA8AC8808AA8AACAA80002022AA2322AA2AA24222A0AA2232022A A001AAB2A23222AA20232B2AA2AB2AA000000000000000000000000000000000000000000000FFDE F7000000401401204400400032040200201001000080400409500410000080400108480100400080 4241200020000814804801004000000080000000000000000000000000000000000000FF1FA70000 00555D55901A51F55921D13955D5595580024055564A5556557506504156446527556000556456C2 6557407404556556556000000500000000000000000000000000000000000000FF95770000000AA8 AAAA88AA85288088CAACCAB8AA80022A22AE2222AA44A2AACD62AA236AB22AA100AAA00A10A10A2A A2A62AAA322AE000000200000000000000000000000000000000000000FF933900000040040100C1 0200000804000000000000008B000000080000001002C4010880110002800000800100000C884880 0000800000000000000000000000000000000000000000000000FF06EE0000000AB8AA8888889008 A88888808AA8AA80002122AA2022A80022A20022AA2002A32A8600AA83822424022A22A22A83022A A000000080000000000000000000000000000000000000FFEE940000000000000010401058020210 10000000000000000000100609000452000404000C00600000602415022000401400604000000000 0400000000000000000000000000000000000000FF056D0000000000000420022300000040440000 0000000B00000A800044000800800609000000010000001000008800800080011000000000000000 0000000000000000000000000000000000FFDD4E0000000018018010204018040410090138098C00 20015620084011645000201400414080040110040002E22C0165008800564C620000000000800000 0000000000000000000000000000FF0F4D00000000180180110110390010D1250418418100100406 08829020610034208453440040801044001048600602601000848600E00000020800000000000000 0000000000000000000000FF8C9E0000000018018010110038018090018018018000084086004208); SDR 8000 TDI (472060020A6F26E060002A600427060410698A042D14006106000000000000000000000000000000 000000000000FF5F71000000000081905191801801041D01885800802010280200C004A060860860 00B46006C8E28880C00D014004106822006186006006000000000000000000000000000000000000 000000FF06880002000002C1C51245A31A0C301855901820014083630B2140400174921070000050 441163100534C8002900846016087006006006000080000000000000000000000000000000000000 FFE56800000000000180100110180000380000988088000060020040003460022460002044040460 00302000226200006146000000004006000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFAD3E000000 00020000120000020000020000100000000000000000050008000008048008000040008000040000 04804004000000000000000000000000000000000000000000000000000000FFB347000000000000 A00800800800020882C0A80A8100002A0000004200A2028020120020101031022020221130020020 02003002002002000002000000000000000000000000000000000000FF87C7000010000010200000 1040090002000400000401008008280000000004000000040A80420800005000240C008002000108 00200008000000000000000000000000000000000000000000FFE224000000000400800C00883804 9248F2800902A08018B00680612300F00600640210206E0820019DF80208A042002A120420020020 06000000000000000000000000000000000000000000FFCCF40140020000299498498A9A89C89801 F1190393400AE55414E0062D4025C5451680641654603253432F04640651600E01600600E0860000 02000000000000000000000000000000000000FF2C5F00000801000800470000104D244050026008 000200000C28508000450490424846028522050080480072032100040802900000040C0000000000 00000000000000000000000000000000FF978F012004010200D40820828800888828D12D00804284 20A211200204A88222A08A80200A2C2480082103222482282A0280A0028022020000000000000000 00000000000000000000000000FF3E14000000000200200000100100000000000202120090841000 0000000C400008008404000000480084500018010080088000008080800000000000000000000000 00000000000000000000FF355200000000002800A08800002E126010010100248100040082080028); SDR 8000 TDI (3230060430462CE80E22E80AC4700680608E00608800600600000600000000000000000000000000 0000000000FF9AAA000000000200B00191823811821A03824311A010006104006202003003202802 02680500000008000290500600000000400400400600080000000000000000000000000000000000 0000FFFAFE00000000000082020B889841A0A800200001800032408400602200A16B54202A906A44 020404B0B6A20242470810401AE906006006000004000000000000000000000000000000000000FF B0EC000000000014888440A01C098009098040CD8080006454097117D020000A6003006046288014 04200E285816004148007116006006000004000000000000000000000000000000000004FFE8F800 0000000400A52014883901C10CA0015401C44000CC0412621601200900700220648644812CA2312E C2408702D08000E00430E086001024000000000000000000000000000000000004FFAEFF00000800 00008A1009A11C02A01801E028018201842813844006002146104006312043935840906226112042 128044006006106086000420000000000000000000000000000000000004FF1B440000080005A388 120080DC0281191A03086188C013740B004C160A201644D08680A91A48450401E1064CE30A080004 114B06404006000204000000000000000000000000000000000004FF20A100000000004480C00390 192080182382080188910040011060060CA00280C10680240200401424201600740B004104006406 00E006000004000000000000000000000000000000000000FF933E00000000001188211088380081 18000098258000204020406446402002084C16002042004004042006806002004024006086006006 000004000000000000000000000000000000000000FFEFE9000000000264460A658A1C21844005D0 48100001087002A1E2200148440F0022006900D23610024400805015012232806846006006000000 000000000000000000000000000000000000FFA7A3000000000000410801821831A8015184080064 2008B00300780000401420082300620004200080402004C30408250202E216006086000000000000 000000000000000000000000000000FFCD43000000000211809E88805808A4832DC8480300204068 42004000A1400D208A0A806040107011006C2080209001201600C026004006000000000000000000 000000000000000000000000FF7B3C000000000241881828849E14A82089801801808080E0820040 401148150200020068008460010062A000E8808C2006906806006006000100000000000000000000 000000000000000000FF2887000200000004B2F007A8180112582385B8F00C000B220A204004026A); SDR 8000 TDI (20880004A20072029024D035600600608E04624600E1060002000000000000000000000000000000 00000000FF43A7000000000001801000801001001801001801800200600780000380200600200000 20038060028020020060060060060060060060060000020000000000000000000000000000000000 00FF8BF4000040000044804001901912801A00401909950300000610444644400600081400284020 4C0002E852616006006806086802006006000000000000000000000000000000000000000000FFD2 23000000000400A00410801E00E11800111A21800112048640D106044404D0348400308002540000 7002047D060074060070520060AE000000000000000000000000000000000000000000FF68410000 00000201800801C0080182192062380592A040E0460C404AC840D704A834CB244C086130486D4A01 604E4461362263022062060002C8000000000000000000000000000000000000FF19F20000000000 01A00800800805801A20001A0180412AEB0F10408A08C2AC19A0946A228502E1A83E62024A62AE66 648E686403486006000550000000000000000000000000000000000000FF44C1000000000000A000 11A00200A49940155855B500550C4644A9545444D6C46542156CD45454544145560565568061560A 68D5006556000004000000000000000000000000000000000000FF658500000000005981C1998021 76A81840423819C030800086863414804006A6722240700C88400400CC8644600680600600600400 6006000004000000000000000000000000000000000000FFDEFB000040000202C00800A012008818 0102180180005491161061440C44A60865468460D014C4A454C01610609602610600700008600600 0004000000000000000000000000000000000004FFCB1D0000000000018008008830008018010039 0194A000020600600420C00E41600E08640000400E00414600E42620600E48600000600600000600 0000000000000000000000000000000004FF73B50000000000008010008000018018010018018000 00600000200000600400200200200600600400600200600600600600600400600600000400000000 0000000000000000000000000004FF0FC30000000000008010008004018018018018018000006801 00300000700500200280200680600400680200600680600600680400600600000400000000000000 0000000000000000000004FFBE9E000000000005809A008140018098118418418000406410016020 00604600204E0024060068048864C300640E10602612E00000600600000600000000000000000000 0000000000000000FF41B7000000000411E218448C0001C43E85C01805E090046040106B10516016); SDR 8000 TDI (A0D00C00D40A00C00540C50D50D50D50C20800920550000800000000000000000000000000000000 000000FFF5C300000000040040040C0002421544144020000000D410000000110010019201000000 080114010490012310410C1001100490000000001000000000000000000000000000000000000000 FFC2C50000000000820880040AA0880880002A820200004202002202A82202002204802002002A00 00040AA03002A02A02A00284800102A8000000000000000000000000000000000000000000FF5697 000000000250A40A10A00800A42A04804810800801295288280280284200AA2280A90A802A00C020 02812802802802C02A0B422002000800000000000000000000000000000000000000FF68FD000000 0002002032C42000252013492013410000D040040108000889101008088A00448108020A88109408 08808808880820915004000C02000000000000000000000000000000000000FF4D6D00000000000D 8A910395190180980180188D8000406444C06026D5610600600644680440E00080E0060060464060 46006206006006000000000000000000000000000000000000000000FF71E9000000000540802C08 C00A12CA1D2C541820800012A88F0D300300320BCCB4830930C714340928330B4334830235032A31 4A286286001500000000000000000000000000000000000000FF9977000000000222301200080490 2082002A02060000DA9000000808908400250C00C00928A10A01000800A40900CE0A008008408008 00000820000000000000000000000000000000000000FF3734000000000010C0000C800C030A0841 0008088000A1101026200209200A0020220220020024100920020020A200240200201200A00A0000 00000000000000000000000000000000000000FFF4D900000000000405C0B240B020000030048020 00000406610040640410B102C08C24C08010000000022C4380000001400046240000000003000000 00000000000000000000000000000000FFE859000000000008200000050300140006002440000080 09085000004203004000000102004400881000100000000000281001815A15800000000000000000 00000000000000000000000000FF5B5F0000000001C10A1901101004013988301B91800200000601 808600200610010010084200C00060258008644E00E08646400E0060060004000000000000000000 00000000000000000000FF7AC8000000000225901A8330B024483A220B38918002040456A288D682 2816C20820A5000AC14890A028008069368B6C2680688E92680E0008200000000000000000000000 00000000000000FFBF75000000000291829249A01101029909001825800048E80600080211234601); SDR 8000 TDI (05820009C00010600210606612619608668210608000000020000000000000000000000000000000 0000FF2B7E000000000001941821001008004820823801004050E34601040200E22240600C200020 20400000242200600604E00600414200E080000040400000000000000000000000000000000000FF EA0400000000000014C0D002003000204000011010202103000100C02004800102D0420008000000 008280088000410010208040110000008240000000000000000000000000000000000000FFA00E00 00000200100000010CB08000000A0000880C4000000000C0B420450440402020C044000040240010 088300400148200004000240000000000000000000000000000000000000000000FF8F4200000008 2020022802800808000801054822050004009222241210A01A02A0080020424620C810A053021021 1A100000A202002080100010000000000000000000000000000000000000FFBF8F00000000041149 80005404014A040442050404010210010010010010210012010A12810892010812A0100008000240 001001001100001000000000000000000000000000000000000000FFA967000000000400C00802C0 4D10C40C08401C20904102708320311300B54302B00F0A308309311150B0A6022532102402013203 007000001000000000000000000000000000000000000000FF617E0000000C202192380181180188 1801821809800200400604E02620601620424620E22604622002620C01400424408C206006006220 000000000000000000000000000000000000000000FFDF4C00000000020920434420000508421102 9009000021490080084101080880C80C080808920800830924808820840900C00D10804000000C00 000000000000000000000000000000000000FFEDE90000000000C0810808800810840884B0082480 0010201200211200208208200201210200220008200A22611601602E12A042002000000000000000 000000000000000000000000000000FFF68E0000000000020E00004AA2A000812000228000008202 212A82002B03302302A1A302213080003003100823022823024000012A82A8000400000000000000 000000000000000000000000FFA4D10000000000320000100000200040B004048000010200400C80 080000C10010100500B00100001108080000000000000880A8400000000200000000000000000000 000000000000000000FF7A240000000000B408A1200AA4900000400D04D200010083282A93402A02 40200A302A12A02200002002401002082082500490402A82A8000000000000000000000000000000 000000000000FFDC0A0000000005003523203545123502043140520000110D08C00D40CD0C105480); SDR 8000 TDI (60A602600410404600601600E0860060D60060000000240000000000000000000000000000000000 00FFBA5A000000000005040802000045830915801801800011020200E4C414E0020101064C640600 A34002C40E32E24622624E4B6404006000000400000000000000000000000000000000000004FF04 2B00000000012900280C048225801821001801800000810808E04408E00211005600400400280008 408E50E11694E24E006084006000001000000000000000000000000000000000000004FF7EAC0000 000000010208A0001010801011001801000212600602608600600200008001610E00400000C00002 6826406806006046006000000000000000000000000000000000000000000004FF8DC20000000004 034898100C70848ABA830AB8AB000021622620620E2262AA2202003A62262A900023423280620604 61862AC21E2AE2A8001000000000000000000000000000000000000004FF332E0000000000110408 11020000800C10801801001200E0160060061060220000020C401400400000602F00685704654640 6014006000000800000000000000000000000000000000000000FF60B40000000000431559251003 5095490015595500005065564064044D755244040245440455000544254612631650644655644455 6550000004000000000000000000000000000000000000FF8C580000000000838928A388CA8B8AB0 A20AB8AB80003462A62A82A222E0861262A200A2A235700032A28643610641680E0162A22AE2A800 0000000000000000000000000000000000000000FFE72F000000000309A008018088018010520018 0180000460061300B200680608E0AA00213200600008600640E02601600E00608200600000000000 0000000000000000000000000000000000FF34A80000000000618818888898C88AB8008AB8AB0000 20E2262A02B02264166122B0682222204002AA600230E4861AE2061442A22AE2A800000200000000 0000000000000000000000000000FF1AD3000000000103851800821A008019080018010000006096 00001008612600201001200A08480000602200620E20609650600000600000080000000000000000 0000000000000000000000FF4EF600000000000980282300302500184300180180000C600600C002 0164120B600404208204E00001048A0A604600604604E00A00600000000000000000000000000000 0000000000000000FF8CB20000000000018039130230010018030098838282046006104082206082 0AE00400220A0A602001408B00F00720700650E00200600008821000000000000000000000000000 0000000000FF437F000000000001811803003040000802981873100008603608005210E0322A6544); SDR 8000 TDI (8848A0A04024D200E31612628754EC50C16800040340400000100000000000000000000000000000 FFB47600000008010B8C2001A019008080A20018008020496026C2A04804A21610C880CC00302925 2000500A30608E0160460C6000006000100000000000000000000000000000000000000000FF8C39 000000100014841808801803E0410060184980000060072438104024060841201404280062C04014 02486006016037324001006000000000000000000000000000000000000000000000FF3609000000 000020A089A8A0381B83200440182981C0006186012E40202016404E20400300916000245292006E 0698710E206000006800100000000000000000000000000000000000000000FF5F4C0000000000A1 90D821C03920820040001C00080048E04600000004800300F00D00000020600400610600610E0060 06007000087000000004000000000000000000000000000000000000FF1F7C000000000000841812 A4580485402000180000101062460A801000002210608E00001141630A4C602632EA46A2624E0040 10006800000412000000000000000000000000000000000000FF7250000000000001C14801811820 88001020180080000160960068000061020470040100000A200000691600601600E8860060000060 00000000000000000000000000000000000000000004FFC7C50000000000AA9C08E0881888800096 0AB8AA80002260063062A02AE31A20C3242B02A000200050C2060464C61C65462AE2A02AE0000000 80000000000000000000000000000000000004FF83E30000000000008448008038038220C0001841 00000860AC00400800C0020060AC0301281460200002024263264A62A60B60800060000000200000 00000000000000000000000000000004FFF04A0000000000AA8028828AD8819320C10AB8AB000022 E08C2342A82AC2222D62362A02A822620804022A48E10E40600E2AE2A82AE0000000080000000000 00000000000000000000000004FF7D02000000000154910950951951910001155905800044E40455 64200465525444065004004164045360521160160060164064505560000002040000000000000000 00000000000000000000FFD27A000000000000810810801833800001001801801010624600600000 600200400600000010C08000C08200600600E0060040000060000004800000000000000000000000 00000000000000FFF05E0000000000A908008C0880898010350AB8B980102200042A21067042AE2B 420600E00E2861002041860060860960060040062AE0000001800000000000000000000000000000 00000000FF19B9000000000001014040042001903001001805800000014800200E00600600402E00); SDR 8000 TDI (140100220008000010008080800000000000000210000000000000000000000000000000000000FF FF0C80000000000880082C8AA8848000000AA8808001AAA2AA3622AA2022A22ABAA22AA2AA202000 0432B20060860960062ABAAA2AA000000000000000000000000000000000000000000000FFAF6E00 000000000000024C401001000001401043000000445081500490D00081040500500408C040000528 000000008000448804804000000000000000000000000000000000000000000000FF907100000000 0143805809F559418005437559410000556556415556535D4E5565455575564C45080864C6114014 004015556557556000000010000000000000000000000000000000000000FF15640000000000A28C C8808AB8A88000AA8AB88880002AE082A822AA2222AAB220B22AA2AA20628022200248A10A40200A 082AAAAAE000000420000000000000000000000000000000000000FF8D500000000000080A82A000 000800000800000C00000000000008008000000000110008000100002100004203204A02A0000000 000000000480000000000000000000000000000000000000FFA4B80000000000908808808AA88F00 00AB8AA88080002AA0022422A82832AA002002AA8AA80420201922820404C01C05400022A82AA000 000100000000000000000000000000000000000000FF4A9200000000005401400000000000000100 000000000004801410060000064C010400600600810004802C000010008080304806000000000240 000000000000000000000000000000000000FF2E1B00000000000004002A00004000000000004A00 000000480100000280000082500000002A0200200000328240220248030000000000000080000000 000000000000000000000000000000FFAA8400000000000184180584190209204200984410000064 06000A002C114E10E3110012002120202062A8006006106006224C2830E000020290200000080000 000000000000000000000000FF9D3900000000000188182180580004000004390804C02461160880 1000020624402022810004210012C00011654E2064CE116100046048000020100000000000000000 000000000000000000FF582500000000000102793900381900000002180900A021620E4041880142 06026008120010122000006000086006246006006000026028000008080000000000000000000000 000000000000FF2BEF0000000000000808800018C30A8002001823120000600600420008408E60C2 300001000020000EE00200602600612E006080186000000000000000000000000000000000000000 000000FF8A3100000000000180100582180080204000BB00880003608630A00042A0270841004902); SDR 8000 TDI (04A055000E08422D20C2262C4A06026000400200000000000000000000000000000000000000FF5C E300000000000900088880888804A001803801800000602000604611405400644020434000000000 008621400410410600C106004000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF50B90000000000 00000200000000000000400200000200000400400400080080000480000400400100400500080000 0804801004000000000000000000000000000000000000000000000000FFA2870000000000008008 00A00808A00204802000802080200200200300201200300208C81200200000200200200240200200 2002002000000000000000000000000000000000000000000000FFA4D80000000000000040002000 04011200300000000000144900030080000080000044080101101000000000888000088080080000 0000000000000000000000000000000000000000000000FFAB6E000000000000802806864800F008 11858818800001A00600200210210287204220640340200801E00304208200280200200200200000 0000000000000000000000000000000000000000FF559F014110040001901B55843945811829935B 51854052ECC4A96056506906556936857056486C4094C45704434603635703600610600045031000 0000000000000000000000000000000000FF729D0000400005000004000100022411090810007021 00123C041F80001800801C2102460820810140400012000010008040100000000000000000000000 0000000000000000000000000000FF605300A148040000A80B548408C480080080AB3080A00D2443 2CA52200200222A30A02B2022024400220220C6B4288AACAA0A00210200023011000000000000000 0000000000000000000000FFDABF0000000000002000000040000280A00A02000A00200090800000 48010008004000002990010230040800080080000004000000000000020200000000000000000000 0000000000000000FF2EF800000000028000000000C01011000C0440000001800800000008100110 01000091000000000080800081000042000000080000000000000000000000000000000000000000 0000000000FF287A00000000012400C00240000400042040004000000000001108000B0010000011 00080000820811080032824022024800000080000000008000000000000000000000000000000000 0000FF287900000000000012008000005000010C0000120000000000000000000800000000000000); SDR 8000 TDI (8440A01800212E006048406500006000000044000000000000000000000000000000000000FF3773 000000000090801141091101849801C80C0180028062450018098441140A60D20C40064B22003030 402C40072B6101157414006000000000000000000000000000000000000000000004FF6E38000000 008000840000102091804891A01001400001740400008850400480603228C50600A2811022000342 262C7290096024006000000000000000000000000000000000000000000004FF2925000000000001 8210010011000018018C1800A00200C00144410408620680414E20E0022CE210C0741452BC253440 54084490006000000420000000000000000000000000000000000004FFBFCB000000000410801880 804812209B13819A21980218640828501440718666E60794652B02610816E0A5283104004104C148 08004000000200000000000000000000000000000000000004FF8162000000008001801121081002 30B803C01021000200781090500400402401600200503600200100A0A40060048042040048440060 00000000000000000000000000000000000000000000FFF406000000000008801800804800021801 B11101100200E0000044040342A400600229400600200E2321040060040040048444440060000000 06000000000000000000000000000000000000FF71FF000000000001801001203001925945A0F814 80028061E627A0031AE026105504806004A0406022481AE52C8E15695A19620A0060000000000000 00000000000000000000000000000000FF1FA9000040000001A40001009141800811800A40810220 4003202002007816824025006204405800005423003137007202A070920060000000000000000000 00000000000000000000000000FF6A73000000000200801801C0182000190B800C94888320F00000 62060064960440444162000040080148A60280041044A62540220040000000000000000000000000 00000000000000000000FFD791000000000010B0090180180020280180090084C200610804640680 6006824A8448E080C2C04010C00600004C40D3461352020460000000000000000000000000000000 00000000000000FFCCE300004000001386120909918B9ADAE1903A60A00008402080200A8ACA0C98 CD0890622808000020460200C4468F700200618E0860002000000000000000000000000000000000 00000000FF5693000000000001801801801805901A03A0180BA10032400000A0A2A448A4B0682086 600014028082548A2842060460022060161060000002000000000000000000000000000000000000 00FF62F3000000000205921C01901800001143801D2C8440246891056B0E40448445410809481041); SDR 8000 TDI (00910E406806086806820806000000000000000000000000000000000000000000000000FF321B00 0000000001000800801800320901811A08800102C10788E0060060274000CE942446007280080007 207046007007005006000280000480000000000000000000000000000000000000FFF5AF00000000 0001801805801000201A01821C0204C000424E02794E896C8E134006C02096046030C00086016116 00250E804026A00000000000000000000000000000000000000000000000FFEDC000000000000140 1A01801400241821805C0000012AC08622E02E2AE2AE28C28E2AA0BE28E7A8228A0F4AE0A622A036 000046408000000400000000000000000000000000000000000000FFEC79000000000201820A0300 0C00101501A5180D054045654E15614E1565565561564D6D4643683428A116016956884D06024804 000500000084000000000000000000000000000000000000FF2DB6000000000001901A0100115E00 1011D17967080000630600720600640686601700620602680008200600680E084806005004000000 000000000000000000000000000000000000000000FFD53800000000020920080000080020000180 1A01C200B0E4069464368168260060263268360D64412CE10F116087054046804006808000000000 000000000000000000000000000000000004FF2B1D00000000000100180000100000004180180089 4004600620E0062A608E50E50600E506406110006406226056504006004006000000000000000000 000000000000000000000000000004FFF41200000000000100080000000000000180180100000060 06006006006006002006002006006000006006006006000006006004000000000000000000000000 000000000000000000000004FFF27E000000000001000800401000400001A0180100008060070060 06806006802006002806006001006006006006000006006004000000000000000000000000000000 000000000000000004FF1453000000000203001A2802008800000190380000000060060060060161 06016046802046006204006006446006041007006096000000000004000000000000000000000000 000000000000FF55E3000000000011015900011022250049811812000002644E8870A64472468463 064A289753610028F14701701611091692E226000000000000000000000000000000000000000000 000000FF996E000000000101803001121023A0182980998A800002600C00049000E216104016A140 8600600100309010A0464068000060A0004000000000000000000000000000000000000000000000 FF928B000000000013808248200009900C01B4300000038070040C0220A0646600C30604C02E5060); SDR 8000 TDI (02A02002982182A03282A0060000000000000000000000000000000000000000000000FFCCA30000 00000340B08A08A08A02200A00C00A00800290302280280284A80AA0280282A80280280080280A94 2802842802802812400000000820000000000000000000000000000000000000FFF3AD0000000002 0C2003022822502504014552480002A0810C80C8088008C08D080890081080880001480081082090 0810880800908000000800000000000000000000000000000000000000FF95C50000000001118019 01949840101801941809800A54600613600600620600640600624604600040C00600600612603600 6106000000000000000000000000000000000000000000000000FF8B40000000000402C52C30C009 00432C95805CC4800B003A2E4074230031035031434A300300301194745348B34300348334344210 0000001010000000000000000000000000000000000000FF5FD60000000002042142802002602002 8E20C3680008801010840A08A20920908940008800808800140800918C40800D1084082080000000 0810000000000000000000000000000000000000FF5DD700000000000080283098088A0148009008 80800854200A00A02200A00202220A16200A00200201200248200210200200220200000000000200 0000000000000000000000000000000000FF96740000000001000000410581000810000000100002 0000200900000800004040214044002A0010A0442002010026C24060040012000000008000000000 0000000000000000000000000000FFB2C200000000001004000002000014000040000000020280C1 40048000000828048000024004000008028020022800000812818800000000000000000000000000 0000000000000000000000FF82DA000000080001821109002800021111A638078000086606306046 0064860000060800A600600042005600600600608608604400000000000000000000000000000000 0000000000000000FF9011000000000201A41AD120381222151580DA2880008B54D6A16CB682680E AC089684080E88E8012208C68A6826A2EB068D68C400000000088000000000000000000000000000 0000000000FF97110000000800018058010B18A0081001821905C00080400710600630E0A7008226 0902A644600008020620E21600200E40620C04000000000000000000000000000000000000000000 0000FF9F3A000000600001001801001000001001A018008000004006006006806806000006803806 006000000007006006002006006004000000000000000000000000000000000000000000000000FF 2460000000000011920A00801940000811D13900854020400610700682680680004600A00620E800); SDR 8000 TDI (50008000140040108088020000000000000000000000000000000000000000000000FF7BC1000000 0000000400C30100CB10000109200000201000084840480400102A00280003402881082100A03500 20424040404504000000000000000000000000000000000000000000000000FF3C3A000000020020 8028088208008088808600008A0002200200329100122050B0802310090402101830091414000033 00002442500000000500000000000000000000000000000000000000FFDF5B000000400000000000 00040150050040040000806010010080100080000500014840400200014002001102890C80090090 00000200000000000000000000000000000000000000000000FF49B30000004000008408A4850C40 C00C00C54C00848000300711212200A45200213308600A512D0108200A40208B49244B0133020004 00000800000000000000000000000000000000000000FFF02A00000002002180380980190B011801 901801904014600E20640402400450600404630404400800E3440242240060042060060000000000 00000000000000000000000000000000000000FF2751000000200220230200200241210200481500 000080090C0A08088008008008808048408008008489208408008009010008280000000008100000 00000000000000000000000000000000FF964200000000008A90084C80880A14280081484C800000 224280214600600600200600211614600800201608E0060020460020820000000000000000000000 00000000000000000000000000FF312E0000000001500020801A20900000AA02000400082A840021 83122AA2AA2A823B2A834221A0002802422422AB2A821A2A82002A80000000000000000000000000 00000000000000000000FF970F0000000000100C00000400000200000C2120000800002000000010 80100000011000080000000100100400000000000100080080000000200000000000000000000000 00000000000000FFF68E0000000000000A81200400800000AA0D408000002A80A8B402402A82A82A 82802A82082C00002202883002A82A83402A92082A80000000080000000000000000000000000000 00000000FFD27A0000000002222002A828C34031035421020A0000AA8D10D50D50C40D00B48D5042 0D40D50820D40D40C90CC0D40D48C20D405000000008000000000000000000000000000000000000 00FF9B3900000040040440240A40C44252A400400448000900100000100100100100104000100100 10110890010090000010010000A0000000001000000000000000000000000000000000000000FF1F 4B0000000001000360240200940860AA080082000A0202002A02A02802400002A02102A02A00202A); SDR 8000 TDI (40E24E04602E40400400000000080C000000000000000000000000000000000004FFF9A000000000 00010C500100C80104180100084D800000200600684E00E00E006806006106806000096106926906 10E40610E006000000000000000000000000000000000000000000000000FF087F0000000000AB00 18930114000838AB8AB01100002AE2AE2AE206A06006206607BA6046087004246006006006204886 0262AE000000001014000000000000000000000000000000000004FF89AC00000000001195100011 08000458010018318000554006005247427016004A06AA524612E8000050870070260050A6006044 000000000800000000000000000000000000000000000000FF17E500000000015580190204300035 3955155101800055455655414E12E40654411645450642600C48C1461263464844A6084554000000 000004000000000000000000000000000000000000FFAC3E0000000000410050AC8248000898AB0A A88000000022AE2AA08E00E2262A602E00E08E8060202B64064361062A240E2B230A000000000020 000000000000000000000000000000000000FF4DE40000000000018CB02088080020180100084280 000020060024062060CE01604680600E09600000621620E00E02A00E22A002000000000000000000 000000000000000000000000000000FF441B0000000001070018898038000890AB0AA88E800028A2 AE2AA0061061062BE1060860266060002A60DE30E61E2B2006220282000000000000000000000000 000000000000000000000000FF3B1A000000000109955801809C0002300180080080000020060000 1602640E006016206006006800006046006006012296000000000000000800000000000000000000 000000000000000000FFB77B0000000000410010430A080000080100082100000220060024C65160 C60044C605650E12E0200142061460C600204608A04A000000000020000000000000000000000000 000000000000FF0FBE000000000001801801003804020803829803000004608602B02F0270160450 0E0872A70068000850070270060530860022222C0000000D00000000000000000000000000000000 000000FF71AF000000000001845889143800030801080803802022202612A3264360661044664940 060870B041404620603E008046122112000008001000000000000000000000000000000000000000 FF50840000000000018019090010B0004809905809844021605600220610640640C1060040060CF5 4000440E316446080006052002000010001000000000000000000000000000000000000000FFBA88 0000000000000240000A00CA01201201201002000080880800802902080504884004A00084002102); SDR 8000 TDI (60470080C6000000000000000000000000000000000000000000000000000000FFEDC50000020A18 27085911145821803D018A6800904009680F14938E05651641718E2C500748E46100568600610640 1286501100000180000000000000000000000000000000000000000000FF70AA0000000218019014 0080100000200385110901004A000E00000E20602714400740230E08600583600602640E0A040E00 0000000000008004000000000000000000000000000000000000FF6BB70000000018010010550830 120018018C5821000001000600000E0060260044C600242E42E00000632E03611600814600800800 0000000000000000000000000000000000000000000000FFDB770000000018018000008481400444 01809001800030300700082601651600700E00680680600400680610604600101600080000000000 0004000000000000000000000000000000000004FFDC180000000018AB0AA0810440040898AB8008 8A80001622AE2A83866A60462AE4562AE0860860002AA0062062062A02462A02A000000000000000 0000000000000000000000000000000004FFA81B0000000018010200201200018220838430030000 0040060084D624603600432E12000600600400401600600602002608000000000000000400000000 0000000000000000000000000004FF1D960000000018AB0AA0A50000A98A98AB903089800000E2AE 2B04560460962AC1062A80060060002AC0960AE0AE2A008E2A82A800000000000000000000000000 0000000000000000000004FF849F00000000184908A1120021559100518909300000554556140006 08E30648E00640A2AE2060044941263561565001164304D000000000000400000000000000000000 0000000000000000FF4C3B0000000018010000091100018058018488448000206006000006116406 0060060025564AE00000424640620601020600000000000000000000000000000000000000000000 0000000000FF5BC50000000001050010A80108AB08188300080180000022AE40E28E2A600624E006 2040861D600026640620660603640602600600000000000000000000000000000000000000000000 0000FFA23A000000000009081000048001021801000825800045000630602601651602600E034006 00600401600610604600E216516046000000000004000000000000000000000000000000000000FF 79CF00000000012303300208480000B8490D508980001060060240060060261044C610442E42E000 08432E036116306146004294000000000000000000000000000000000000000000000004FFDD6300 00000000010110301200000118010011018000004006004106126D2614C136014A4E22E814024A2E); SDR 8000 TDI (00804001004804000000000000000000000000000000000000000000000000FF8B16000000555955 943801D559018C1B55805825800024E55755600408C3045560044442AC2040000861243541545565 15D56556000000000000000000000000000000000000000000000000FFF0840000000AA8888AC84A 88AA809508C48488A8800048A3222AA4520420922821022A60020020002820920AA0AB2AA28A2AB2 AA000000000000000000000000000000000000000000000000FF9EFD000000000000008284000028 00000012008000001008008004D02400300003281000000000002280100000000000200000000000 00000000000000000000000000000000000000000000FF94360000000AA84688A800888880802888 88400000000022022A838068006024A45020E080080000202000200200AA80402A8AA80000000000 00000000000000000000000000000000000000FF07850000000000100010B4025002040000000100 00000300890060200105101000080000000000000200001000400060100060060000000000000000 00000000000000000000000000000000FF425000000000012004000000004809002404C052000030 00400000080200000404C01204284280000903280301100003408000000000000000000000000000 00000000000000000000000000FF27CC00000000180180511082308A04800902982394004020A480 02460264060040861423060461000262860260068002074214402000000200000000000000000000 00000000000000000000FF506400000000180184102189102000180310080081400062044C008610 614610C24E01202E1160005020460165561000561100000801000002000080000000000000000000 00000000000000FFD89000000000180182102188902190784180598380A00020140200964160364E C28E00602608E05020400650600E4D000E0081000800000000000000000000000000000000000000 00000000FF1D1400000000180100100903108B82980B8AA8008A000420A408020E0465D620440600 E4064260280E00360060A61000164801200000000102000000000000000000000000000000000000 00FFE23C000000001801804881802800101821A00820800020621420004633640F00602614450E00 610100630632E406A28446220480400080040000010000000000000000000000000000000000FF36 97000000001801804C898A480040188381091094A041620414000650E0063560268540CE00631021 20460B62CE430026100000000000000000000000000000000000000000000000000000FF44A40000 04101841001801011841C01E01D008008200007C0780820608600600624E10C0460160884040B611); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000FF832E00000000180000 00000000000004012000000001000000004004004000004000800800800000800000004800004004 804000800000000000000000000000000000000000000000000000FFF04100000000080000000080 B80280A882880408202000080200204200280202A012002002000000202202002002022002002802 000000000000000000000000000000000000000000000000FF708400000060000000010500001040 00000000202000800A10000001000800000000000480810000800050000000008000800000800000 000000000000000000000000000000000000000000FF5D7D000000000800000080808A0A8088908D 8984800006000600202340200280A003102002006000106006002C02006012002002000000000000 000000000000000000000000000000000000FFE832104000001800014105C11903AB5A91F53B4585 002A00C710735640E14654700E116B4714E109556146106046114546296806000000450410000000 000000000000000000000000000000FF8F0200000000000000000300100000000000102900600006 0C800000001C008000080C021040000008102C850100444008001100000000000000010000000000 000000000000000000000000FF080F102000000800014084800B0080C808AA0B4080C04400020835 2A01220252300A08AC13056100016002053002002342012002000000428408008000000000000000 000000000000000000FF887C00000000000000000000000202008001220002000802800000000000 000000018408C010000A0A0040800000241800880100000000000002000000000000000000000000 000000000000FF5E5A00000000000000000020C00008401404000600000000200000006000A00400 00000100210000E00C800814A00D8000A00800000000000000000000000000000000000000000000 000000FFA01B00000040000022A08001203005200008408200000200008000000200000004C01104 28428000240328030110000340000000000000000000000000000000000000000000000000000000 FFC86F00000000000000000824000200000004802800002100000000200105100000080400000000 02000000100041000010801000000000000002000000000000000000000000000000000000FFDB48 0000000AA0AAC808728808848948AA81081080000822AA2AA28E2860262AA0062120861D600008A4 062066072AA0062AB2AA000000000000000000000000000000000000000000000000FF50BD000000 00100000050004025200441010100500000408110040001104000100000145504A80000282404002); SDR 8000 TDI (6885046004000000000024000000000000000000000000000000000004FFF4C400000000180010A0 01A01E09801020A010C28A00020446006206081B0410F85600600601000000608608022402A40080 6004008000000000000000000000000000000000000000000004FFBF1D00000000191E0EA00B8618 61803000C4BE0000A001819700714E41802D08608604E10F00054C146806E5000C00232005600400 0000000444000000000000000000000000000000000004FF540400040000180000000D8018011550 0100B00100A000080600200A00502E00608400C00C54200800680600408E28304C00600C00000000 0000000000000000000000000000000000000000FF655400000000180000000380180D2011010030 00000010000E08200201401610682420410408A02451610600405600200400620400000000000400 0000000000000000000000000000000000FF60F600000640180000400380780B409C91A418418000 49014E2040C554B04408CCA70070866C2121246036C12F0E404C0290028600000000000000000000 0000000000000000000000000000FF6313000000001800008001801801011C018008038020020006 245884002105834116026017803A100070470230020850B322810600000000000000000000000000 0000000000000000000000FF06D8000000201800014001801801001001E408458000A51006084004 08200000020FC2780602028800E016202026A8432A00080600000000000000000000000000000000 0000000000000000FF17A1000000201940020101901911009003850C019000040006104004902810 50010E00602E2000208864260A212610C0B208002600008000000000000000000000000000000000 0000000000FF080C0000000018022000018018028218918858818040000346240AE844E1D6060A24 00421409C88034690685690002500655C00400000000000000000000000000000000000000000000 0000FFD9D2000200401800208001803820801819C03829800000048E000C0000602600100402C084 024A4012E00E307002844006204004000000000000000000000000000000000000000000000000FF 633200000000194205010190582D001101845A29900100008E10000008681210044D0248B4404402 02F21724608400014E490846000080000002000000000000000000000000000000000000FF3C2200 000000180000000180190102900389188180000400062000B00160C224008400C2040D4100206046 006026108006000006000000000000000000000000000000000000000000000000FF42BB00000000 18000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (AEA8400A000000000100000000000000000000000000000000000000FFB2B7000000001800001801 801801800801C40820800008E20E04409E02620E20C18F3EE39E2AE2F82A60B202A6A708A2B674C4 12000000000100000000000000000000000000000000000000FF5878000000200000401801801800 42000501508800C08A6906012446116ACE443457214446D1628650E84481002728CD470048240000 0000002E000000000000000000000000000000000000FF3158000000401C000038018019E0040B01 161A5180008670B603A026286C2608200600402680640010F00400004E0250060040040000000000 00000000000000000000000000000000000000FFF928000000000000001801801800000005201080 00001160260460D615614F50E2D6206C0E30E10E0460510448060000A64010040000000000060000 00000000000000000000000000000004FFA28100000000180000B801801804000801010800904040 65060064064060060460060AE0C604602040E48000C3160C82060080040000000000000000000000 00000000000000000000000004FF6041000000000000001801801801800001001000000000600600 20060060060020060040060060040060040000060040060060000000000000040000000000000000 00000000000000000004FF7C1C000000001800001801801801800001001200000000600680200600 60068020068040070068000060040000070040060060008000000000000000000000000000000000 00000000000004FF2125000000000000021C2182184180081128088080009060060260060460C602 625614724605642504E8010810061100060071400000000000140000000000000000000000000000 00000000FF70EA000000401800001901909C1190180500C804900000621628F15650E20601600640 E806086902886AC880004600128E48E8088000000004020800000000000000000000000000000000 00FFB140000000401800000001809C01801A42009AC0800106000600680608800018620700600600 601000620E0C0007003A88082006000000000000000000000000000000000000000000000000FF44 DD000000001000020621821811001828003860040000064E2AE10E20050100E06F20602606E32400 700605080240A01021209601000000040C000000000000000000000000000000000000FF7DEB0000 0000180060008188183110180010080490000810078021420444A202200495440408610992E0A702 4046106004017854000000000400080000000000000000000000000000000004FF18270000000010 80000401C018010A9C40241104900002080E002A4250400300A00C0440842962440C61061043460B); SDR 8000 TDI (80C820000000000880000000000000000000000000000000000000FF67AF00000000900000580180 1943801101805805800014650644640600610608E40640E046086000046026006496406286124046 000000000000000000000000000000000000000000000000FFA667000040000000000A14A44C08C0 8C142A0928800041700F0931430C30232230130A320384300140BA835230238C3042407302000000 001100000000000000000000000000000000000000FF08BC0000402310080010184032002A32A21C 01140000140B308A0800800880C98810C20800000A20A00440C40820E00800800840000000000880 000000000000000000000000000000000000FF824F000000000000400C01C4080080080102804000 0100200220200200200202200208208200200000200A102042002002C22102000000000000000000 000000000000000000000000000000FF06B900000000180000020602000600010040040800000084 800440603C00403440801104209C00000D10840844801845000C04A4000000000100000000000000 000000000000000000000000FFD47C0000004038002022000041500000086044800000C000005005 88008108000228240208220000008100220210020028B00000000000000000000000000000000000 000000000000000000FF5FDE00000020180000D801A098A801881400180380002160060182060262 0600040600C04600600042602600610604E24600220E000000000000000000000000000000000000 000000000000FF45B700000000000800181380DA142D4B51000A0D800020F446B2882E826916AC0C 4EA0CD2EC26C40C068C6C46CC6B0EC4E442C16000000000800000000000000000000000000000000 000000FFD9F600000004580000BA018419418008020A9C80800000608600028648E4060090860A40 0608600012E00E1070060260060820A2000000000080000000000000000000000000000000000000 FFE6C0000000000000001801801E0180080100080080000068068000060060060008078058060060 00006806006006006006002002000000000000000000000000000000000000000000000000FF497A 0000000000000118018018040401041109119040407006004406816106044CC6286286A060008064 1280F206002006000826000000000800800000000000000000000000000000000000FF008C000000 00180000180180180002000284088080000A6006804007006017A040060060470878110068230060 4600A406041406000000001029000000000000000000000000000000000000FF2A14000000000200 201C01801801A00A0181281080C000608604C24E11654682424E02E80E01654051600A0030065020); SDR 8000 TDI (2402040020000000000000000000000000000000000000000000FF1E200000004014044004014054 0048241140046000010010080005100302010042012000402092800B11012004C900002100100000 0000001000000000000000000000000000000000000000FFA477000000C00400400C80D40C40D44C 24450C00800100301200204252252B0162033124020534A04A301300209340644300300200004000 1000000000000000000000000000000000000000FFC8B60001018810000818038018918018018018 0588A001600609600400400434403402408C2040080044262B60040B608C00600600000802000000 0000000000000000000000000000000000FF27B30000000010002010010014030012012D00130001 0008008C080083082910C80100480089080280100081089092491084080000000000088200000000 0000000000000000000000000000FFB38C000000A00200000800A0080080084C8048C08000002002 01215600610600200600200600610000600208222600204611200200000000000000000000000000 0000000000000000000000FFBC2A0000004AA0000002AA4AA0F82AA0C441021000000002A8300302 2922023202AA2A82AA3226022AA2A92304432082022412A800000000020000000000000000000000 0000000000000000FFB5660000004000000000004004882200420005300000000000000000000020 00003000801002020000000000800000001000004000000000000000000000000000000000000000 0000000000FF51930000000AA4004002AA0AA0822AA0800A240000000012A82082482202C82082A8 2A82A82280802A82A82400082D02402002A800000000000000000000000000000000000000000000 0000FF312E00020015400040055415404410A3002A40020000800D50D48D50D50D10D40C80D40C40 C88900D50D50D40CA1540D40D48C88000000000880000000000000000000000000000000000000FF 44BA0000000000002002000004002004080000C40001000001041001101001041001001001001001 001000101080001091110000000000001300000000000000000000000000000000000000FFD28200 00002AA0000000AA2AA0000A209001000200000002A82A02A02A02002B02002003002202022A82A8 2A00102B02A82A0200000000000602000000000000000000000000000000000000FF2EE900020000 0000000800800A10800A24A00A00800080280281280280282301280300280280A900802802802C22 802802802892000000000800000000000000000000000000000000000000FF4A2300000020100000 10010013442092110B52B100000050048008108088908008C88C8928080801000000808910010800); SDR 8000 TDI (04000000001006000000000000000000000000000000000004FF181F000001801800401C01801A15 A1185010182D00000020060024B634640E0028060001068869010060060060060069160040040000 00000800000000000000000000000000000000000000FF1B54000001954400555B55955913B218C0 0290A3000055255645200612608648215655004604648433640440421642620642450C0000000004 04000000000000000000000000000000000000FF44E00000018AB8000AB8ABCAB0C1885400003100 80002AC2AE2AD00680E8262A422E32500E42620030E2AA2A29262AE0462222A20000000002000000 00000000000000000000000000000000FF2023000001C0000000180180102180B404103000800000 400610440620620F00C00600450E29600000608A0020C600E08E0020420000000000800000000000 00000000000000000000000000FF506E000001A2B8000ABAABAAB0818411AE0D10A280002AE2AE2A 40060061062B41862144460160000462A02B04962A64063362B20000000001000000000000000000 00000000000000000000FF1940000001880200201801801003A29200001800800000600600420E00 628E80401600408604E80000600000000E00620E08E012000000000C000000000000000000000000 00000000000000FF235B00000180000000180180182988580104D01080000060060100C64B604600 E4260CE22E30648032E00A00A22600E0A60020020000000000800000000000000000000000000000 00000000FFA59600000180184000B801801821901801129089800000640602120700710600700604 F0170060034860020C300642F0860021020300100000000004000000000000000000000000000000 00FF09B70000018000000038418019018039E00038CE91800462D61101060062BE04219610410610 643A04E18201200E006006056098008000000002000000000000000000000000000000000000FF2A E9000001801800001801801801823812005801800000E10600005655622600202600420600E12001 6402002416006456106440000000000000000000000000000000000000000000000000FFC76E0000 000018200080200000A00C000802800010000400101102500C000002003013030811020028020004 80002202000C8040000008000000000200000000000000000000000000000000FFD8510000800018 000000820C2020020050040002000000C0040040A03001003080000CC5500200102102D414C02035 0510004004000008040000000000000000000000000000000000000000FF20C00000008800020818 0080008980100610884008A00120420CB30941902802302800300100012104000210360001315000); SDR 8000 TDI (000000080004000000000000000000000000000000000000FF53AC000000081801801A01A0180180 182180090380001040069063562A600601230600801603600402E00000854E802426014010000000 000004000000000000000000000000000000000000FFADDF000000000001801801801801801C1380 08298000002006017007016126086006000146086000086810000006002117100000000000000000 000000000000000000000000000000000004FF41B70000AA02B8018AB8AB8AB8AB8AB8918AA84180 0022E2AE26640600620E37446E2A03062060042062B02A00062AA0062602A0000000000004000000 000000000000000000000000000004FF3E3800004000000180180182180182180102188180000040 0600620644610602223600808600600005622820000600600600C010000000000000000000000000 000000000000000000000004FF89E50000AA0AB8018AB8AB8AB8AB8AB8C10AB88380002262AE28E0 AE44E1062020162A802E00E0040562A02A808E2AE28E30C2A8000000000004000000000000000000 000000000000000004FFE6FD00008C0D400195595591595591593500D84D800042C55654A1560962 2E412086524256096004086080048136552536540300000000000004000000000000000000000000 000000000000FFAF01000000001801801801801801801803001011800008E0060020061064560001 06004406326004306000000246002046000000000000000004000000000000000000000000000000 000000FFB7790000210AB8000AB8AB8898AB88982190108880003A42AE2A600600620E30202E2022 0664600060600E1864062AE0062A804E000000000000000000000000000000000000000000000000 FF7F1F00011580000000180182580182181184104000000040060060060161260C20060021460860 0408610604E006006116000106000000000004000000000000000000000000000000000000FFB8BE 000001801800001801801801805903913005800000E0060123562A600600830613201603600002E2 4440454E006426000226000000000000000000000000000000000000000000000004FF8B28000001 800000201A01A01C29C43A250810C180000060060A200690680602009600280E04EC8401612C04C2 2611742E020096000000000884000000000000000000000000000000000004FF71C3000001901800 00180180180390190104B00C800000000601682E00E1160860460020460060009060060068960460 8610C046000000000400000000000000000000000000000000000004FF06B000000182A0000AB8AB CAB88180981900101100002A82AE2063D623626624EE062AA286A870062262463D60063060463142); SDR 8000 TDI (0000000000000000000000000000000000000000000000FFF1120000000810010004010000000000 24000000000108900012020044010008423004008000000805000100000109000080100000000000 0000000000000000000000000000000000000000FFE15900000002A0AA8AB8AA8C90AB8C90509288 AA80000400002A24000002080024482AA300200040000AA82A80002A20002A22A800000000004000 0000000000000000000000000000000000FF97950000000018000000000200000200401000000000 030A1600400001012001000000414008002208000600600000411001400600000000000200000000 0000000000000000000000000000FFC66400000010180000000000200000408C0040000000300140 0083302A00002C032000001003000022800080054801042000080000000000002000000000000000 0000000000000000000000FFE88500000004580180180180194182188C8808018400046A04000416 01628604840620600E00E0C004700104000621000608F0A800000000008000800000000000000000 0000000000000000FF93180000000000018819018118058038418529419140006086000126326026 2000AE10630654640000640041040614044640640010050000000000000000000000000000000000 0000000000FF00A20000000238018018C1801803903800801811880000200440408622E00620E08E 25E0C60A623010610010810602C32604E00040020000000004000000000000000000000000000000 0000FFED620000000000018018218018018A180B9E190182A00022140040261062A6114006086246 4560401261502D07560D4406066000080080100000000000000000000000000000000000000000FF 3327000000000001D01C018090A18010C000A8D1800002688620040E10600602622602202E20E108 086300820086C04086302B50200000000100030000000000000000000000000000000000FFF74300 0000001801801841A81101801002808801882000600602801620E00624602E52A096106280056400 100006504146402000000000000000000000000000000000000000000000000000FFA95000000000 0041C45C45801001801001041801800180601784040E4060D780600600610E006400107800080006 2040A6202000000000000000000000000000000000000000000000000000FF7B8B00000000182182 3A03A0910198121D1119019600003086A012E70360AF014186116646506041057411650006915007 002000000000018000000000000000000000000000000000000000FF47E1000000000001801801D0 9801801801800801804000588620E0860C6006AC205644000602E1048060A18002AF022A06025000); SDR 8000 TDI (00000000000000000000000000000000000000000000FFF10D000000001000200000000000200020 20020400008201200104090800000000000004400000020480400B00000048008008000000000008 12000000000000000000000000000000000000FFCE760000408009008000000018008EE98C8C4810 800000600200A202083013006082607883806000C02D9A4028038660020828020000000000000000 00000000000000000000000000000000FF3629000101A010018000504B394594584590D82D100032 604E32655635605420C42E2864AE4B60A002EC5681610E22408612E00E0201000000000000000000 00000000000000000000000000FFCDA101004000101000000020361000012060B50B000102408000 1801800404105101054A000044101289200E84401050400004400000000405580004000000000000 00000000000000000000FF42270100808008108000001488C48C08008028048000C230520C252A4A A84200A492802112252300852102012AA28820220828020000800200000002000000000000000000 00000000000000FF507E0000000000000000500020000001241100B01000080801C00000000A08C0 00404D00001000480004000400004010000300080400000002A80000000000000000000000000000 00000000FF8B900000600001000000041000080020040402000000000040000011010010C8180000 02708000004804284010084200800002200000000000000000000000000000000000000000000000 00FFC3910000000000000004000000000000A400000000002110000203302A000004832008001003 0010228001000548008421011000000000000000000000000000000000000000000000000000FF83 78000000100200200000000000000008032000000012000090800001012008000084014008000008 08000000010C0110120000000000000010000000000000000000000000000000000000FF0B748000 0002A0AA8AACAA8AAEAA8AA8008C0EAA80000022AA21200600620E20200E21A2066460000062AB2A A4072020072022AA000000000000000000000000000000000000000000000000FFB6130000000010 0120120100520100300004300100010052248000001004500A410100440032000010100480424100 C001000804000000000000000000000000000000000000000000000000FFC45A000000055555D559 5595595595588990B155800022755740615409422C42C085D04254094000485D5655613444455452 F556000000000010000000000000000000000000000000000000FFFC690000000AA8AAAAA8AA888A AA8888828108AA800048A10EAAA0AA44A10220E0122B202A00A0002522AA2AA08A2A62AA2AA2AA00); SDR 8000 TDI (000000000000000000000000000000000000000004FF9C7500000080180100002000184000580990 1E44000000600C0020022070C408400808E80E0021040062520A6002002020106210000000000004 000000000000000000000000000000000000FF8180000000C1020100800000180002080192180000 000062050033420079041242208460CE00200400604A006002002880416040400000000004000000 000000000000000000000000000000FFE96E000001801A00808000001C6180181FC35811A0000C63 E24342140A424000818328648AA0A10880602A000916044A463000A6800000000000000000000000 000000000000000000000000FFE7F9000001C00000800000001801E09841800001C0001060130250 042D441000800230700242A0112AFA02491046004406000107000200000000000000000000000000 000000000000000000FF45D0000001809800000000201800031821D144088000006006010094A080 02100026026242020080312C0488880802410008C006200200000000000000000000000000000000 000000000000FFD23A000001888020000040101A0000180180000880404060160900042881020C00 C628600280002940608423000008C0000A4046080080010000000000000000000000000000000000 000000FF7ACF000001A0000000000000B8898238A1A8980302000C68326240E002035E84640E80E8 02204A010E8000404344A068E6200000000000000080000000000000000000000000000000000000 FF4C1F000001C1180000000A40190188D80FA31A81008002E282504201000936A0E0160276000048 00044F280440A4006100000080000000000000000000000000000000000000000000000000FF532D 000001800001000014105800009811121910014005753603020000000634210684E0000040304020 012090C1083026040000080080008000000000000000000000000000000000000000FF8DFF000001 1018410000200098101208C100180202002860060000C053022600A04650600020440008E0280002 004120005000A0000000000100000000000000000000000000000000000000FF42BB000000001800 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFFAFA000000001800000000 00000000000040040000000000040040040050010008040008040000000010040040048008000048 04000000000800000000000000000000000000000000000000FF0CC3000000C00000A00002082800 C88808890000800100200200200201200220208200208A8000000020028028022020031020020000); SDR 8000 TDI (00A4000000000000000000000000000000000000FFF89F000041801B0020000385A1401140019612 51800000E096087026806810A0600600567234600400601E00600211600204480400000000000400 0000000000000000000000000000000000FFB79F00000180000000000188000A201281A038019101 0A64060360160A608449641680E0070140B088EA2504E29102680248849400000000000000000000 0000000000000000000000000004FFE4940000018018040000058020000010038088818000416086 10644641624402608654608620440422600010600000643200000400000000000400000000000000 0000000000000000000004FF03F40000018000000000018000018010018010018000006006006006 00600000200600400200600000600600600600400400000400000000000000000000000000000000 0000000000000004FF5709000001801800000001800401801001A018018000006006006006006000 00200680500300600400600600600700600400000400000000000400000000000000000000000000 0000000004FF39FE000001810000000405A000018010018424098000007086046106806220082A06 102482006006016804002086444806C3108610000000000600000000000000000000000000000000 0000FF227F000001001800000001A00001D41151800B4580010C6C1731601684601020A116C4A802 416405086504203A46004146000026208000000404000000000000000000000000000000000000FF 3F18000000801801100000001A01A0102591980380000062E080600643612000300800E04210E000 00400600289E002006002606000000000000000000000000000000000000000000000000FF293C00 00008000010D0202041A01840141A03029800088600020600E006008202400046202086004105A86 002327802CA6813886000000000204000000000000000000000000000000000000FF3FF800000080 98000000000018018C150BD408810001026010157883A122840965042C6122206205894006406004 C21001456840310000000004000000000000000000000000000000000004FF400C00000080000000 0020001CA1C00A01953811008010750080600225209448704400602200F0B00452C6036C4C300100 006280000020000080000000000000000000000000000000000004FF332200000080180100000060 98880418C1C09A0888800068840020060278020049218264478008400A008400E422206407406086 000020000080000000000000000000000000000000000004FFADCB0000008000010500001C980840 280F845A22880097E40D00206601603241C48808E38F01001100400C08611210692629600E000000); SDR 8000 TDI (08000000000000000000000000000000000000FFC53D00020402D220000102000210240210320220 0000438A80A088D0C40A10280900100881008808800800800E80C08820820800000000000A000000 00000000000000000000000000000000FF56FF00008880000000000980010898302C8D6100800004 204201220228200202200221260708000202208A11312000208A1020A20000000000020000000000 00000000000000000000000000FF886800000044180000000058400002C0000080C0000120000840 050000044480422080000800000000842000404822044400C0480000000000800000000000000000 00000000000000000000FFBEE9000000413800000404048002010000000406000018000014002800 00880504090280201206D01001102A80001001006000100000000001100000000000000000000000 00000000000000FF32480001018018000002818000E00009810018118000006C2608600600602610 0056840100A041204C60060008140942100C62060000000000000000000000000000000000000000 00000000FF2336000201A08000000011800282204B01410B218001436496C16806886A3682304E04 302828CB20826802AA8024926AC0B56946000000000A000000000000000000000000000000000000 00FFB47D000111A458200000839100298D182992380380001060260862B6207906A8040620C48502 400911713600048CC0C00C002214000000000100000000000000000000000000000000000000FF8E 7F000001800000000001800201801801800A01800000600600600700600600280600600400400100 6002000004004004002004000000000000000000000000000000000000000000000000FFF23D0002 4180010C000001908154410201D14D518000006006006806046416001407000A07014000206A8C00 509812680000E006000000000000000000000000000000000000000000000000FFAC100000018018 0000000180020050040180084180000178060064070074060124464210B72042A1006000C0400011 7000026826000000000280000000000000000000000000000000000000FFE076000001C000000000 01800001A00A01E04813952000610600680E02E0B340289708A0060C601012E04581100300654E08 7086280100000040000000000000000000000000000000000000FF48050002018018000000018300 0188288380084188802B620E02EA1E2CE0A20AA08E6BA08E0A67E86BEE240A828212E22E3EE38E50 0100000400000000000000000000000000000000000000FFFE290000018002082000018000001000 01805215954080610600640680E550C0F5568C4B523460141260CE41608A82ED2A00C84400000000); SDR 8000 TDI (000000000000000000000000000000000000FF181700000180100000008B84188581180180180184 000A603610400400400621620600600628608041410440620428E206204006000080000000000000 000000000000000000000000000000FFC28E00020020123400000100122930920042100000000000 80830820808140800888804804000C1080881484084C91134880C910000000000810000000000000 000000000000000000000000FFA9A5000004800800000200800802842800892A5480000020021060 0600680A10204200208A90A0002460A2092002002002142042000000000400000000000000000000 000000000000000000FF9D520000A85AA0840004002AA0C00040AA0400840000AA9A7830228A3A33 102382002A82212200000D22002002C0220401200200000000000000000000000000000000000000 000000000000FF8C1300000840001400000000000008800843402400000000000000080000000000 008001000000400801500010A00A0040008010000000000020000000000000000000000000000000 000000FFC6FB0000AA02A0880000004AA0800280AA0100900000AA82802082202002002002C8AA83 202202084003402002082880282C9350000000000208000000000000000000000000000000000000 FF36320003001541400002003543502423040803080000D50D40D50D40D50D40CC8D48550A40C10C 00C50C00D48400C00C91540D40000000000C00000000000000000000000000000000000000FFBD9E 00040000044000000000040A48040048444000000000010411110500211210000010081110011010 09151081021100000000000000001000000000000000000000000000000000000000FFEBC6000044 02A0800000000AA0840020C000008000002A82B82A02A02A02102202A82A80103600202002002A02 902B0020AA0200000000000000000000000000000000000000000000000000FF1D98000204A8082A 000400A00242AA8A02B20A40800080280280280A80280A80280280328A8028008930AA80280A8028 02002902000000000C00000000000000000000000000000000000000FF8881000350201200000001 20020820125041340D00008048048088008088C0090804004844094C00840800808845008B088088 50000000000820000000000000000000000000000000000000FFA20B00008180B000000105880001 95180D84190D800000600620615600624E9064061040848060504065061161061162265460060000 00000000000000000000000000000000000000000000FF1238000404840800000000824550C04500 D1284180012CF2470CB20342300302B0CE8572060872810C301300223720309300302A0000000011); SDR 8000 TDI (0000000000000000000000000000000000FFFFA30000018AB8000000AB00188129088B9338AB8000 2AA2AAA0604E40E2A634A2AC1362A62A20220162C42A02860002922AC20E00000000004200000000 0000000000000000000000000000FFF819000001800000000001001C21008C019038018000002002 20E09600E00A08200400E01600201040621408000E00003200400600000000000800000000000000 0000000000000000000000FFE2D60001F5A2B8000002AB0012A80C40818818AB80002AA2AA0C64A6 2E62B60222A800622E2020001062042A4250F5826A2A424600000000002000000000000000000000 0000000000000000FF3A1A00000188000000000100100202C2138098018000002000006006006006 40000048E00600A80002604400400000000000400600000000080000000000000000000000000000 0000000000FF688200000B800000000001801801001041825801800000200224E40E01600C08A004 02608614202030E0960080AA14408201414800000000000000000000000000000000000000000000 0000FF52FD000001915810000009809001001109909809810000014300F20F006050000024056106 0100092062062000A04C442A034000008000000000220200000000000000000000000000000000FF 983B00000180000000000180982109000180D94384000420B274E04E02E10467A08032E0C4000048 0060420584020101025803901C0010000000000000000000000000000000000000000000FFABAC00 00018418000000018211410C0023841805900000200200608614E4000800884064140A040004E082 100000000002000440000000000400000000000000000000000000000000000000FFEC1C00000000 18080000080000800100C40800A004800000101203200800A8100010080020148420220120200000 220220020020000010000400000000000000000000000000000000000000FFA3EB00000100180400 00C0080142000000100000020010425401002008010040C5240202105140884402D0104020414004 40C004000100000000000000000000000000000000000000000000FF536100000095400000000A06 000004101284481090000620030A120120040208204220241400220101040634A54A132112492012 050000000000440400000000000000000000000000000000FF05C200000040100000040140041940 840041E40000A1001000210488029301121001009001021000009400031211081261001000008000 009000000000000000000000000000000000000000FFB37B000000C00002000440D00C40C00404D0 1C0081210034024220CA35340304312343340F03341004304E123047043003117002010000009000); SDR 8000 TDI (00000000000000000000000000000004FF7B800000AB82B8018000AB8A90900970AB8AA88C80002A 02A00064060064C43342062AE2AE2360000162863062022322B02E02020000000006000000000000 00000000000000000000000004FF29CC00009180000100000384A8B3813001801003000008000010 620600601610800C00608610E00400E02400422C00202000E1260000000002240000000000000000 00000000000000000004FFAEDF0000AB8AB8010000AB8AA8838A18AB8AB8A900002A02A012E02E08 600622024C2AE2AE3262882063042042342822A020630E0000000000800000000000000000000000 00000000000004FFB19100004395400100015188180190194B95415180004285202560D610E54244 054455641620652442650C54E0865562085464120000000001040000000000000000000000000000 00000000FF707A000001001801000001801841801801800801800001001040610623610A00008400 60060060000C602C04E1060260000960220000000000100000000000000000000000000000000000 00FF6DEB00008902B8000000898208818E10818AB888000000E0360060064462260822AE2AE26426 20201062022A22862A610E2AA226000000000220000000000000000000000000000000000000FF59 9400000180000000000190280300500B801800000008650E25625632600E40200600611408210408 604A002006006026002086000000000004000000000000000000000000000000000000FF77430000 25901800000023808849011021001824000022600408610601610602A00600600401220044E08000 E02C00E504006010000000000080000000000000000000000000000000000004FFF42D0000018000 0000000180080D023001001800000000600492F52F14E00600A00604600400300015610800601400 6104006000000000001000000000000000000000000000000000000004FF5D520000019018000000 018008212010010C980180000040060060060060C608600200E9360060000062060B610200600E09 2006000000000008000000000000000000000000000000000004FFA3540000AB82A0000002AB8000 810890AB0138AB80002AC2AE20600634630E2262AA3862462AF008A069262462232AE2263222AE00 0000001000000000000000000000000000000000000004FF13250000018018000002018008330000 21001801800000400410E88690600600600240680C00E80144681201600400200400208000000000 0800000000000000000000000000000000000000FF9E59000155B5400000035580010D1241550419 5580005545540C644620644245655244650455600414E02240E54455250443255000000000000400); SDR 8000 TDI (000000000000000000000000000000FF0B2300011010188200000011200009200200200000008060 0625025032000000403000010000008008010001400411000610800C000000000200000000000000 000000000000000000000000FFBDAA00000400182000000000004400004012804C00000008000801 000100880100800000100004004480500A00D0440000020000000000000000000000000000000000 000000000000000000FF29E40000019418810400018040080000018C180000008112000360064264 0A00E00650600602609000E00600008002D080004008000000000000220000000000000000000000 000000000000FF4ED00000018000018000018000020D210980C90A034000000808612E1160020460 3604E446016020006116400440504410024120000000000000000000000000000000000000000000 000000FF972F0000018A58810000018000018A308180184300000000000860A600610E10600C0260 26006000006008104004006040004004000000000000000000000000000000000000000000000000 FF11A60000018020018200058020418090098C08C1000010800002610E0266860864043862060360 38006484194464214320004024010000000000000000000000000000000000000000000000FF2444 00000180000180000180100C000000052C50852080121001600649600083702600E00401608000E0 0640030012B08804008C000000000000440000000000000000000000000000000000FFC5B1000041 80380180004990190000000008080080000402400960065068884560162563441265001161164000 10442028800004000000010000000000000000000000000000000000000000FF4D16000001800001 00064980100180000011084181005414400860A60160110A20040260242862400860018820260061 00002004000080008000000000000000000000000000000000000000FF0D41000001801801020085 D0900780000004880180E120900103722EC0E000492C1501681C2061206771014130160160408028 04000080000000000000000000000000000000000000000000FFCDC8000021802001040101810120 000001801400000100880002620E087304001006D06B0602E00C006A0E0022022430110020020080 00000004000000000000000000000000000000000000FF95A9000001881801800001804000020001 801040000000800808610601600C00800600600601620044E04601201208A01100A9120000000000 88000000000000000000000000000000000000FFB939000001800001000001C01034011001801804 8001000001256A56B264240848D600600608611408600A8A69420020000000220000000000040000); SDR 8000 TDI (0000000000000000000000000000FFB1050000000050000100518038558D184502584583000082CE 10628605410444E13645614E2364311162AE0460B640680D02C10600E00000040000000000000000 0000000000000000000000FF675C0000000010000000010010036810191237AB60001002A0280000 48102C001EA8380488200000441200400080A4114410444000000000000000000000000000000000 0000000000000000FFA9E9000000000800010028804824950812844844850001030A882D03036082 C5214640A80201225101200280282A42280208200200A00000000000000000000000000000000000 0000000000FFE8340000000000000000000000080000001000800000100020000000200000800000 1001404400000C045044080080010004002000000000040000000000000000000000000000000000 0000FFE8CD0000000020000000441000000001200000000000000000040000400C00040208020208 0000006509C0000490000428848280000000000000000000000000000000000000000000000000FF 7E220000000800000004000040080300041000140000001000080100010011040000000001000400 4480010B08480210000080C0000000000000000000000000000000000000000000000000FF8AEB00 000000000000000000804200404004804000008000002502503200C0090000000000000080080480 000000088000101008000000000300000000000000000000000000000000000000FF964F8000AA82 A0AA8000AA8A088488088881288080002AA2AA0060064462022022ABAAA2AA2AA00010602A203282 2132AA233252000000000000000000000000000000000000000000000000FFC85A00051000108200 000100100000100140104300010050044001002300148010210040048041000C0010800000C20804 884804000000000480000000000000000000000000000000000000FF870300015595515580055592 B149955955B039118001D575562540D410C545CB6D5655655755648042442751640E486556446504 000000000200000000000000000000000000000000000000FFA9D000000082A8108000AA80C8B280 C0AA92088880002AA2AA12A02A0822A62AA28A2AA2AAAAA200202222A8A28A80A2AAA26AB6000000 000000000000000000000000000000000000000000FFFB9D00040000100000000100000000000102 002200000010001002000000080000010000000000000080880200A0020800080000000000000080 000000000000000000000000000000000000FF3BFA00006492A0488000AA96088896108801408000 002A82A80004000002222A22022AA2242AA000010302242242102AA82102A2000000000080000000); SDR 8000 TDI (00000000000000000000000000FF2D11000000403806000001001809961871403801800006832028 A00C78604C1041824120260500111109060060869900842041920460000000400000000000000000 00000000000000000000FF37210000000001000040010018058058010818018000408028C0304C00 6004045002002C0400602002401600690504090402502200E0200002000000000000000000000000 00000000000000FFB528000000001800004001001823805811901A01800000001000600100388600 00000038061520310B788C4000144204160140208240200000200000000000000000000000000000 00000000FF8A2200000220000000000910180582581120184D80000101000064A000220601000008 040E44204109622E010846030C470040000060000000000000000000000000000000000000000000 00FF61C50000000001000082818018A1B89A238898818020C0092CA2A44008206C1C600447A42608 4200202006806006A9600E264036016000000500000000000000000000000000000000000000FFAF 00000008001802000001801809A01A01201A01800000024400200830288482608400208600C00013 64968A000E046006004006806000000000000000000000000000000000000000000000FFA08A0000 0040000201021180195590980D8118118041011408C463484025540420840D110E2504208271440D 600F006802800000004000000000000000000000000000000000000000000000FF2CFE00000C0018 000000818818018238210818C5800000010001600000200411200400022408000040200400004450 E42A440040004000000000000000000000000000000000000000000000FF42BB0000000018000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFE57C0000004018000000000004 00400000000200000100000400400400100400000000400400400100080080080000080080400500 0000000000000000000000000000000000000000000000FF4E0C00000000100020002B0A28028208 A080082080400008028020020020020220000028020020000A210242A00200220200200200200000 0000000000000000000000000000000000000000FF673C0000000000403001000000000000000420 840800800A80A8001028085000104028089020000080080080088020000C80000080800000000000 0000000000000000000000000000000000FF1AC0000000400820080088823C18D20830819C118820 00004284280A80640200351600280200200049245AA2A41200200E04600200A00000000000000000); SDR 8000 TDI (000000000000000000000004FFD59F00000000180000000001180180180580100282004360064044 060464C224601640620E50600029040202E502400006006006404000000000000000000000000000 000000000000000004FF92C300000000000000000000180180180180100180000020060000060060 06002006002006002004000004000004006000006004006000000004000000000000000000000000 000000000004FFF5C000000000180000000000180180180180100180000020060000060070060020 06002006802002000804004805006003006806006800000002000000000000000000000000000000 000004FFA3A4000000000000020000001803801821A03209000103300A4000065162860020260020 0600284402004400230E006804046004006000000004000000000000000000000000000000000000 FFC7EE000000401810088004001801805801821001800088282210009702605602A51631249090AC 81210404056806886516016A26006800020040200020000000000000000000000000000000FF9D5D 0000000018000840038018018038215B180984000001A200004700508A9208060022060060050049 1E60600060620110200601E000000000200000000000000000000000000000000000FFD9B3000000 200000028005801845941C0440B80180005A000200009646611208802E05240E00620600E8B61460 1E006408043006006000000006000000000000000000000000000000000000FFF0D0000000001810 604601801803801801001E01820181101650004B30F2420022873120860920A0244A068285010870 820D6226006000020020000020000000000000000000000000000004FFE393000000000000000001 809801815C000018018000000046200202086002B3300628208600240D406286008320A4E9021170 0608600000000C000000000000000000000000000000000004FFC4CA000000001800000001821801 8418018098018800000026C0588F2830D20A400121620600402080600E80E8840082840AA0040860 00000008000000000000000000000000000000000004FFDBA200000000002000000183384591583D 22BC238E005188068044A60420224041801061060044341AE4261068564410240020840060000000 04000000000000000000000000000000000004FF8B52000000401840000003803801801820423825 800000000600404680680100E00202600600600022E1260204040010200029000060000000000000 00000000000000000000000000000000FFB585000000002000000001801829801800005E01800000 040688D2060060900070020460260800040020042000162004104120000040000000840000000000); SDR 8000 TDI (0000000000000000000000FF28070000000018000200004004002000804100D800004000140440A0 00125C0450004140006040400204100000044804D900040025400000000000000000000000000000 0000000000000000FFC70E0000000538000000004000000000200484200000000400088008020080 11021000814000000084800041009000020000030000800000020000000000000000000000000000 0000000000FF6969000100201800000002041A01A09841801A018000002000206046246420008466 08001008000010620608804000E00005400402600000000000000000000000000000000000000000 0000FF58160000000000000001142A1891889B33A1388880008A4880A26AC6826880C8A906888816 D0090042688288AC80806D048A48C4824000000A40000000000000000000000000000000000000FF C779000000045800040000001801801801801440800000000C08A00E20622C020C2E003526002020 09621400402590E00A80620648C000000000000000000000000000000000000000000000FFD49000 0000000000000000001A018018018010008000004004002006006004802006002006002002804800 006004806006006006006000000002000000000000000000000000000000000000FFD7ED00000000 0000000000011C018019458478118000412500006146446040200016828A0E90000125E19EA00808 000818006A04004800000000000000000000000000000000000000000000FFB54E00000000180000 00000018018018218490838000006000006006006400842046102102002400004843005000009042 004006005000000000000000000000000000000000000000000000FFE44B00000000000000000000 1801801A01901021912082242000228EA060B401210E00204400A12882200400280600088580E004 806000000000000000000000000000000000000000000000FFDBAB00000000180000000000180180 1801841041820004244022221E4062842028E6BB2EEE82A6A06142242AE22602807601680E204000 000000000000000000000000000000000000000000FFABF1000000000000000000001801801821B0 D48408C0002806004506006D52C5611682610E81614C0408CE40000A010080004204004000000004 000000000000000000000000000000000000FFCD80000000001800000000001801801D4180199200 0082242608400608680B0A620684E80424610008080600489A210812006006004000000000000000 000000000000000000000000000000FF3D27000000000000000000001801801801C2300000000031 261240AEB0600A1065460961430162250400AE502022820045006014806000000004000000000000); SDR 8000 TDI (00000000000000000000FF67AF000000900800000800800000A00B00800800800080290202200602 68121221060020020020802020028C22920821020020020000000000000000000000000000000000 00000000000000FF049900000002A0002000AA4AA0AA0AA0060AA0AA00000003083C026A3032B024 8222A302A84800004002A97401002382182202202A80000000000000000000000000000000000000 00000000FF4DF800000000000040000000000040020000040000000000100000000C000801002084 82083008010484200900001000000088804000000001000000000000000000000000000000000000 00FF89A00000000AA0004000AA0AA0AA2AA2A80AA0AA00010012002083002102A02002A8A202A810 01000202A80100003202A02402802A8000000200000000000000000000000000000000000000FF9E FC0002005540000003521543541540C83541540000800D40D50D40A10D40C40C9000092080840048 0890840AC8C50CA8D40430128000000C00000000000000000000000000000000000000FFECEC0000 00400000000400000400000000400400000000002900101102000111100090100103100308900000 1449001001109049000000001102000000000000000000000000000000000000FFA92A00000022A0 002000880AA0AA0AA2040AA2AA00000002A02A02B00002003082A05000200C098082800040008022 02A02A8200008000000000000000000000000000000000000000000000FFBE020002000808000004 02000A00A00820C008008000802812802802C028430028022A2C12802400402A02882C1289281280 2802002000000880000000000000000000000000000000000000FF25520000000010000004202010 0100149320040100000008008088091481108C0808808900C308009048A8C30840801000800948CA 0000000C00000000000000000000000000000000000000FF5EEB000000229000000000001801A418 01851821800001600602605600681612E14628641620612048448E11601640601613604601600000 0050000000000000000000000000000000000000FF8E4C000104000800002080021E04800921D028 90800140324B0131034434432032130331430CB40005704320344300322320348304200000100000 0000000000000000000000000000000000FFDF080000044200000003080A000C00020A1043000000 0208C0830900800000C80108840C089409208108C0800A0080080050086088000000084000000000 0000000000000000000000000000FF87BB000000401000004080000880AC0D00802800000009200A 0022124020022220821022A2012480E8210A1024220020020A208200200000003000000000000000); SDR 8000 TDI (000000000000000000FF46B300000182A800001A010AA0AB8AB8AB80080280000122A02A800E45E2 B80F440601E0E60860000022001463C622684244E084000000000000000000000000000000000000 000000000000FF716500000188100000180100000180180180B91080000300000004461060000042 062860162068000C2000086044086402006024100000000A00000000000000000000000000000000 000000FFE822000001800000001801800001801801920840800050200A00008644600240E0AE0262 0605648040C0D623600A0161544A4414230000000080000000000000000000000000000000000000 FFE0A600000180180000180980000180588180082984000020000011270060821472062160064460 000C600001620610620408644C008000090000000000000000000000000000000000000000FFB079 0000018010000018098000018618438208A488401220126800AE5D626240201600C30633600002C0 061C600A0BE00E246120540418000000000000000000000000000000000000000000FFF03A000001 90080000180180000180180393190190800420020802160064020120C60844300060102120904060 CA0260D6414000000000000000000000000000000000000000000000000000FFEA78000000101800 00000000000000014000001202000800100000002281004C850800000011000030008024E5200063 00020288300000008000000000000000000000000000000000000000FF9C26000000001802000008 000001000008000000020000428400442011022C5082400002D000402001004804E0081061300000 04000000020000000000000000000000000000000000000000FF9D70000000801000000801000000 8248029B8000016008A00220B4810000020070C07AC15202A01020209208220220A0423120220504 00100000000000000000000000000000000000000000FFAF9A000000400000400400400400400400 40040000811611200800081010810000095500001810810300111000A04110410010800000000410 00000000000000000000000000000000000000FF6675000000C00800400C00C00400C20C14C20C00 81010034020824320131431164CB0065120530834060030225320030134030860000000010020000 00000000000000000000000000000000FF94FD000001801004001809800001801801911801842000 E04641608400420E4040040060460060400241460160060861060060440000000000000000000000 00000000000000000000000000FF0121000000201000001401200200001051401401000000004081 090089000100481008C800C3080292C80001084080082090890C800000000A820000000000000000); SDR 8000 TDI (0000000000000004FF83E20000AA0AB0000AB8AB8018A80AB8AB82880180002B02A024600600E2A0 2040262AC4062AE0000240162AE0B42AE3242C422E00400000000000000000000000000000000000 0000000004FFC3A30000D01540001559138019501559558C204580004484C85460060163005440C6 4D441655200412040455002655010650E55600000000000400000000000000000000000000000000 0000FFAF0F000000001000001801801804001801800905800000001000E0862A600015410E004146 00600040040400600600600E016106000000000000000000000000000000000000000000000000FF 3C9100000102B8000AB8C98000AA0AB8AB80288080001060062BE12654601E21A0162041A02AE002 0260A62AE01E2AE2060002A2000000000000000000000000000000000000000000000000FFCFDA00 011180000000182180000000180180800C000040644E0060860062060020C60D4016006004206406 004026004004400012000000000004000000000000000000000000000000000000FFAE1900002390 18000018038000000018018A0841800012C08600220E55614412021600420600600008E010006484 0061360AC006000000000002000000000000000000000000000000000004FF39C6000001A0000000 1801800000001801801013000015404603252E82600410852688440E016804286130054114004156 004006000000000C06000000000000000000000000000000000004FF2E8A000001901800001A0180 0000001801801800800000608600600630E05600600E00602608648004E406486046086202002002 000000000100000000000000000000000000000000000004FF7BAE00000182A0000018018AA0AA0A B8AB8AB8A1800025624E286806016286A2691622E18623700400600600630623E1022A82AA2A8000 001004000000000000000000000000000000000004FF3A24000001C0180000180180000000180180 B005000034400601609600600700312E28400048E9001140084060060060821022C2400000000D00 000000000000000000000000000000000000FF1C3C000001954000001A0195415415595595508B00 0020448E4561561264355424464C40364464042CA04044640A447022552552550000000504000000 000000000000000000000000000000FF36600000018AB800001A010AA0AB8AB8AB8C08A880000022 A82A52269062A230400702630E02620022032601620E32E2120160140A8000000000000000000000 000000000000000000000000FF1BBB00000180000000180100000180180180082080000820001044 0640608280C00600E40008608000248E096024106210004004000000000000000000000000000000); SDR 8000 TDI (00000000000000FF46FA000000001000001811801A098A1891805815800100090002028601680054 421641410488200001400E01623000E0004880063040A00000000000000000000000000000000000 00000000FFDCA0000000001080001801801805805843920881840001042020804650629000C10600 403640A0A03465024401005405000404460060100000000000000000000000000000000000000000 00FFD97B000000005004005801801801801803818801824000800000403628606800E04E16600600 E020006086120024080014004126016000000000000000000000000000000000000000000000FFB9 C600000000108000380180180B80180190088180000004A022430644E2004860362C60A660258269 401248E05C666304424446004000040002000000000000000000000000000000000000FFA32C0000 000050020018114018018A5AA98C5815802000040100809600610144648601600F10400003641440 630000E08A31048450E150000000000000000000000000000000000000000000FF607F0000000010 00001801003C21C09801824821804054088805021609651008600689640614C0400C61040B088008 000A000004806000000000000000000000000000000000000000000000FFADE60000000010000158 01005C05C01D018C0801802000110050C1064178404060870060042A400010C0440400C210005600 6004004000000000000000000000000000000000000000000000FFB67500000000100000B801401A 03C11881A18A018800108C112C4816006C3001E0F6B5746680045800622011601200602740740400 6060018000000000000000000000000000000000000000FF7E73000000001000001801C018200018 0180504188004508010022060A608108400620400780808422230E20100222008080202500200002 0004000000000000000000000000000000000000FF2E5B000000081000001801801C00001801A410 01800001000010AA0E55600004421680548600000049245200620A00608810210C00200000000000 0000000000000000000000000000000000FFE38B000000001000001801A01804401801889A838000 0000090420860070100960C600602E00000404000400012600000200A84400000000000400000000 0000000000000000000000000004FF75580000AA02B0000AB8AB8018A80AB8AB90787980002A02A0 3024760062B02064062AE0162AC0041121C42AE4062AE22222220400200000000000000000000000 0000000000000000000004FFC884000004000000001801801802001801811089800000000000622E 0060400042060040260060062140B600048400042C02400600400000000600000000000000000000); SDR 8000 TDI (000000000000FF25910040000400209528849528A0828950CC080C800048A0520AA4D22B28A250AA 32083012812080802A4201300A022252802482000020000000000000000000000000000000000000 000000FF46F900000000000800001000000000000200A0200200820000000800000400000080A000 00000228000100000800810000000000000000000280000000000000000000000000000000000000 FF649F00000000020000000410000000001400008000009002800108100001010200010000C00610 006A8008150020801040240048000000000000000000000000000000000000000000000000FF6B54 0000000800002000002000020004000402000000000000050208550800000210000800C004800400 082000C8220021010000000000000000000000000000000000000000000000000000FFB568000000 00000000000000020020000008800000008000008000800000000000C00000001480001000000408 00001108040000128000000280000000000000000000000000000000000000FF0DC980000002A800 0AA8AACAA8A88AA8AA802CAA80002ABAAA2C21265462AA2AA0162AA2AA10200020A3E208A20208B2 432822AA202000000000000000000000000000000000000000000000FF45CF000000000000401021 00140020120111500100010048048000802A10041441081340410100020100080040000200200008 10110000000002000000000000000000000000000000000000FFDD5B000000055800555955955F53 D55D558519558001D5655740E0040155565560C455755724E40040621635550E1564064C65564060 00000200000000000000000000000000000000000000FFB01E0000000AA8004AA88A8AB8AACAAAAA 8208AB80002AAAAAAB220200A2AA20E02220620A2A20803222A22AE2CA08A2822223222020000002 80000000000000000000000000000000000000FFEE22000000080000000001000000000000082000 00000000000802280008000042000000008000800D00000000404001080090000C80000001000000 00000000000000000000000000000000FFA37A0000000AA8000AA8880AA8A88AA8AA80A0AA80012A 82A82A20700002A820040020412222200000220208820248A2123122220420000000000000000000 00000000000000000000000000FFE35B000000001000000020000201800000100000000000680601 44800008060900C00B000481610000010004600420600C0CC0101080000000000000000000000000 00000000000000000000FFAC86000000001800000002000002000000020000000000000000000855 00000202100002881000002D00302060C80260A00000804200000003000000000000000000000000); SDR 8000 TDI (0000000000FFC6530000000000018118018038018038019040018001806204086808104146092000 00640E08022102C12C02001208000300080180800000000000000000000000000000000000000000 0000FFFC94000000000001801901801801911825A000059000006404086001324026100280006026 20001002C4C442612220EC062A0120000000008000000000000000000000000000000000000000FF 755200000020000190980380190FA01A0DAB92A980802268442020C440880E82A024030BC6400800 50080608E44C486C6610C10E000020000020000000000000000000000000000000000000FF0EC400 0000200001811829801801A03A01B012118000C8608400200484080680000400080E008880880808 00020406004E004806800000000000000000000000000000000000000000000000FF2B6F00000000 00018018318018039058558010459100107084503100488054102B048005260000880A84922414A6 110812CA0136000000008000000000000000000000000000000000000000FFC3B300000000000180 1883801809811801829081800002640400200000000403004402001641000000004009600E406402 010006000020000040000000000000000000000000000000000000FFFE4C00000000000000000000 00000000000000000000000000000000000000000000000000000000000000006000006000000000 000000000000000000000000000000000000000000000000FF6E3000000000000000100100000000 00000010000000000000004005004800804000004000005000004800006000006001004800800000 000000000000000000000000000000000000000000FFD71C002000000020800800880800880802A0 0802A0000028000020020020800028008020228420000020022A8410802800002002000000000000 000000000000000000000000000000000000FF265100000000000000000000040000000030200020 00230C104082880000042008280900001001090408A8001080020000800800800000000000000000 000000000000000000000000000000FFBF70002000000020800804800800800810A0080280001220 0600200200200601200604600380208950280220620F00204605A042018000000000000000000000 000000000000000000000000FF33C5004000040451935915955B41851953931935840030E2D71145 2ECD7D465164CE40511601630A0C64CE01480604E02E00650E000040000000000000000000000000 000000000000000000FF3482000000000001000600001001081000086601000024820CA442818000 05A4902C9AC0040C00414B00A98040D4021C05400000000000000500000000000000000000000000); SDR 8000 TDI (00000004FF56FC000000000001801801801801801A01A01001800000400300600000600000600600 68000060040070050068060068060008028060000000040000000000000000000000000000000000 04FF1700000000000001801801C01A038258010250C9800000280A04280080A00202640204648941 604481604E000486210006A06006006000000004000000000000000000000000000000000000FF80 D8000080000021801801841A01C01801891001800005080241222020308241710A49684014650C04 6106546826086016096C0E806000000004000000000000000000000000000000000000FF761F0000 00000001801801801841819B04AA8801800000600798F81E1CA08400200608800600600018600701 6014006806006006100000000800000000000000000000000000000000000000FFDBE60000000000 21801801A05853A21A8381080D800010E00E002026403C4420A81E0110A680F30501792214009C01 041E906106100000000004000000000000000000000000000000000000FFDAD70001000000018018 01841C41E05800805D21800184400622240642600504250724620E34613405690D32E44651600631 440E080000000004000000000000000000000000000000000004FF7A170000000000018018018018 01911D0C401B51800042400681280608681532228722628604E20100602001130632008621401602 0008001000000000000000000000000000000000000004FFF5300000000000018018218018018098 93800829800000420400200230620E0860000402161282C000C00712EA8800E0C60061000C000000 0000000000000000000000000000000000000004FFC0B500000000000B8018A1861A01927821CE29 05800050422467260300E04604611009092E08082122410A00000014183611601000801000000000 0000000000000000000000000000000004FFCC2700000000000B80190180382982182188B8018000 044026802002016004207A03280026006005442054007802406A0520200001000000000400000000 0000000000000000000000000000FF1F140000200000018098018018098058018118058000004086 82389200600402688A000007916044002140400C0A80040001280001000000000400000000000000 0000000000000000000000FFF72E0000200000018018018018098018019000A3800088E0C61260C4 50000602208A0E6D0600E481512816206002C0600682AB0000080000002000080000000000000000 0000000000000000FFFFC7000000000001901801805905801805A021418000096406006004000126 10A0021170562078820230020400220800460C240080100000004200100000000000000000000000); SDR 8000 TDI (000000FFC9EE0000000000818C1801901881A0981100889180000000060380060002428040000440 0040420002039460618600600C008060206000000000000000000000000000000000000000000000 FF5A49000000000081A11A01C0BC81889A41A10A818000C24836C00C368885120C49008040888248 00CB08B6008006A1090C90E808C14000000A00000000000000000000000000000000000000FFDA8E 000000000009881823801801A018938A2801800008A9070AC8822040472052044042002862880002 042014A7080C27440442024000000100000000000000000000000000000000000000FF216F000000 000001801801801801801801800A0180000060060048020040060040040040000060000000068060 06006806006002006000000000000000000000000000000000000000000000FFDCDD000000000001 801801801805801801814C01800001210281000700010500510485080000E01105240D006C060060 06000884004000000000000000000000000000000000000000000000FFC15A000000000001801801 801801801901800881E000020102000406000C053045552094208060A00420060200860000848000 040060100002A8000000000000000000000000000000000000FFEE18000000000201801801801801 C01801840001800008A8060809130010B40260040C20914064090041248002260204160068060040 00000000000000000000000000000000000000000000FFB988000000000001801801801801801C01 8001038080052804A202020880242CE86428208042E2812C40EE0AE806026306A06A860040000000 00000000000000000000000000000000000000FF019D000000000001801801801A01801901220001 8000104106106494006D5330650AD32D488164B500490A0405460202140000800040100002AC0000 00000000000000000000000000000000FF1245000000000401801801801A0180180BA70001800022 4A260C70AC02600202624B00282868600601404300608698E0060008000060000000060000000000 00000000000000000000000000FF6661000000000001801801801803801A110008018000410442A0 E15404E9062C500A2B0150826090482A02101006048206C060040040000000000000000000000000 00000000000000000004FF96D8000000000001801801801801801803802805808004408210620410 602600C48200000010E40404211204E4860060060065040040000000040000000000000000000000 00000000000004FFDFDA000000000001801801801801801801001001800000600200600000600000 60060060000060000060040000060000060000020060000000000000000000000000000000000000); SDR 8000 TDI (0000FFD25D0000000000000000002000000001100000000001028000000008008010009028008000 0A80020000A82000884000000B0080000000000402000000000000000000000000000000000000FF 44F40000000000AA0AA0AA0AA0AA0AA1100900AA00002A82A8008A002002A83202282002A9288200 2800208A82A8488008210220000000000410000000000000000000000000000000000000FFA79600 00000001543543541543543542003543540000400CB0D50D40D40D014A0400CA1550C00841530A01 150C20950D30C00C50800000000820000000000000000000000000000000000000FF477500000000 040040040000040040042044000000018010010001490D1001001000149000001009051000801001 041401001001000000001000000000000000000000000000000000000000FFB4850000000000AA0A A0AA2AA0AA0AA0C40A80AA00003282002A82A0AA82408083A0220AA8280400A00080088220088220 2A0220000000000200000000000000000000000000000000000000FFC9DF000000000000A00A0080 0A00A00A00A04A0080000028B280281200291202280A802000802800012C0204280A84280280A88A 802000000820000000000000000000000000000000000000FFE49500000000040120020020100120 122A2000010000880000000800800044B04804094000830A40920850204104A00890800800000000 000800000000000000000000000000000000000000FF2CDE000000000001815801841A2184182190 1801800000E816C86006206004316014006800006130416016004126206016046406006000000000 000000000000000000000000000000000000FFC347000000000080C40C8AD00C84800C94C22AC980 0100324305344B0028C6046346B360014032010C3342A56C1704334311304B552000001500000000 000000000000000000000000000000FFB34D00000000020020833600250404030020410000008800 20800810800000A70691600A00800808A18861000020840180880C10468000000A00000000000000 000000000000000000000000FFF074000000000000810800808800A008A4940800800020A4820024 2220208718000201000028210000200280880200260200200A102000000000000000000000000000 000000000000000000FF84BF000000000100001801A4004048004A001240000003104024424448D1 204011440000880004405C440C056C50487020230204014000000180000000000000000000000000 000000000000FF55E80000000006080040000000000000000A240000000000185800880018080010 01100000020090000000806A0020E050140000000000000400000000000000000000000000000000); SDR 8000 TDI (00FFC353000000000000001801801801801855815801800000655601000600008400C01404400600 000002433620600404610C036086246000000020000000000000000000000000000000000000FF89 FD000000000000001800801801801801815801900020E0020A004E00010C00404C0060860802002C 608400000408830640620A304200000000000080000000000000000000000000000000FF553D0000 000000000518618018018258800C3039820020E7160A03A625262021440C40E08E01801002240678 0440020286014004054000000000400040000000000000000000000000000000FFAD5B0000000000 0000180080192182990A10102502800060020002062020404C408405402E04004000A00405610004 6044144144006000000000000000000000000000000000000000000000FFBFFF0000000000000280 0000004001400C040000080000011000000803010012810022002012043031048000654000E0202A 84A0288000000000200020000000000000000000000000000000FFB9750000001000000018098000 0104100000000000400C050C00C4445002241200000484B028C2804100140062C400620040000000 4008030000000000000000000000000000000000000000FF44710000800000000008008009008808 02011004810000202202200200201200064800200202200002202205000210202202201204240000 0000000100000000000000000000000000000000FFB8270000000004000000004204204004014064 0000010010010910890290592190012910515011210802412A900020100000000000801000100000 0000000000000000000000000000000000FF1D11000080000400000808C00C20C40C00400C008041 1475130A30CB4C340304720F10330705302134620353750240340204200201200004100000000000 0000000000000000000000000000FFAE4D0000001000000018018418019018058018018000006046 00620600C00630600642600600640000C00E00402600604620600600600000800000000000000000 0000000000000000000000FF5F7E00000000040020020020120020028120120000008048008C0030 9048008048148800041208109348D000481084080880880080000000080000000000000000000000 0000000000000000FF933D000000000000000800800800800834804800800000200221200204A002 1020820128028124000024020421020024C200209200200000000000000000000000000000000000 0000000000FF00DA0000000000AA0AA0AA4AA0AA0AA0040AC4AA00002A82A8540A802002A8238321 2202A8240000200510E882202881403E033000000000020800000000000000000000000000000000); SDR 8000 TDI (FF2D3D00000000000180080000180400000100100100000042041160B40801260060020060060061 1010000600600E006006010106002000000000000000000000000000000000000000000000FF129C 0000000000000AB8AA8AB8A80A80A908488100002AE2AA2A62A02262B23062060402AE32E3000140 4628E2062CE000002002006000000200000000000000000000000000000000000000FF54FD000000 000000001800801804004001002831800000600600600010A00A05604E0000060860040100060400 4E000000092042006000000104000000000000000000000000000000000000FF0CB0000000000000 001801801800000003050803800000600600A0140040060861063540060060A03203540060840464 B422628E4D6000000040000000000000000000000000000000000004FFA6BE000000000000001801 801800000001042801800000608E12A00C08002E00608E00400600700002008C0000044200044120 A6006000000010000000000000000000000000000000000004FF6674000000000000001801801800 000201200801800052E0220060A002C90600000410A00600600010C0020460060060020860060040 00000000000000000000000000000000000000000004FFA2460000000000AA0AB8AA8AB8AA0AA0AB 0888AB80000062062063002002062A83342320062AF0182042222882AE0882AA02620A2AC0000018 00000000000000000000000000000000000004FF54A3000000000000001801801800000000029801 00000065420060040050060020060800060208400500420060020065082060060460000000000000 00000000000000000000000000000000FF8EA6000000000154155955955954154354151955800050 648655642450D5165524265420065500044A85521505523305522045245540000000140000000000 00000000000000000000000000FF58EE0000000000AA0AB8AA8AB8AB8ABA0AC858AB800028600E2A C2AA2A22C03222B62460063000023062862AE2AA08E0061062860840000010020000000000000000 00000000000000000000FFE700000000000000001800801801801800803801000002E02A00401204 204000200600600600000000600440000200000614A00A0040000000000000000000000000000000 00000000000000FF50670000000000AA0AB8AA8AB8AB8ABB408818AB80000560062A02A22BAA1021 02A42940062B60202020160882A84C804405425C4160000000400000000000000000000000000000 00000000FF527D000000000000001800801801801880821801800052E0060000120020480C000400 E00600E80008A00404600040644628202610C0000008000000000000000000000000000000000000); SDR 8000 TDI (0AB4000000000001A00A00001801801804021041002000600420400E0424200080001140860060C0 00644000802400046E026190052200000010000000000000000000000000000000000000FF7C9600 000000000180080180584180380108980B02802662060842662A229041036221C0166260004160D0 44600620655600C000202000000000000000000000000000000000000000000000FFA99E80000000 0001801A00001A21881803201121000001600E80808300E008201088106056116240100A2A546404 0D648050742E12A120100410420000000000000000000000000000000000FFE65F000000000201A0 1800001803A01841001A01080020C00610030A116080020002244446106230040082010CA6510000 014416806000000000000000000000000000000000000000000000FF70FD00000000000180180060 1C09801885041403100000610545582644203408410A1261060C6509A020AC409144008048406206 002420000000000000000000000000000000000000000000FF5BA3000000000401C01C00401C49C2 188322140300000560AF22D016A2202508460A8954C74260C084200404641E026001216006002220 180000000000000000000000000000000000000000FF304D000000000401E00C01A0580262002040 1001000020605608250188C10624F026C0600E0060040130040000024C0480003011006000000004 000000000000000000000000000000000000FF8DC30000000000018018C180180200202020100100 0000643408A14800400610600600600600628094A014206082406008280550002000000008000000 000000000000000000000000000000FF7AAE000000000401800A12001C0000001205540100000041 0704280004401680600614C806916000400002040042040141012006002000000100000000000000 000000000000000000000004FF5D5B0000000000018AA8418AB8A80AC0950D18AB00002AE1042022 0068C2A632E2AE3042AE2760080002A208E24A08E3000620462AA000000600000000000000000000 000000000000000004FFAB88000000000001A00C0180180000002803114200000060060160000800 0200200A00600602E20020000E200024400246004200002000000200000000000000000000000000 000000000004FF5B520000000000018AB88D8AB8A80A80A00830AB00002AE02E24620003020A2322 AA2362AE28620022832E4AE2842AE22E2842082AA000000088000000000000000000000000000000 000004FF523B000000000001B54B54155954152105101011000055655654655443054645654230E5 5640604414050615050E1101162B014E52A000000124000000000000000000000000000000000000); SDR 8000 TDI (9400000020000000000010000800000009000000000008010208184104088410C0C0150009804002 00A0000000000000200080000000000000000000000000000000000000000000000000FF96330000 000000000522C0000200404124400480000000080083108081082010000000100100029000880040 0800020008041089220000000000000000000000000000000000000000000000FF7FE40000000002 0020001200000400001000003200008000000000200A009084100800000000000110015004011020 0000110040110000000480000000000000000000000000000000000000FFFB368000000000AA990C 00EAACA88A8E000AAC1080002AB2AB39220A21234221B2A22AA2AA2AA40022320208B22208A3A220 2203002000000018000000000000000000000000000000000000FF923A8000000000014002002012 0040000100C0010000840A0080080401100800014000480480400010080020500020009000000100 0000000040000000000000000000000000000000000000FFDC81800000000555E45911955951D539 115558010001556556407505407C175064C6557557D56001446456354C56356446447406B5600000 0400000000000000000000000000000000000000FF84860000000000AA8AA88CAAA8A88A88AA8808 AB800089202AAAB2A22A22A22A2212046AAA2AE3202022AA0AE0920AA22220A2222AA00000030000 0000000000000000000000000000000000FFA9D90000000000000002240002044000220001220000 0008000400300A000004001000000000008808908000008000000809014800000000010000000000 0000000000000000000000000000FFF3880000000000AAAAA8408AA8AEAAC8AB8408AA8000402102 2A22BA2A22A22B20225102AA2AA0002D220208844208A2A21423122AA00000002200000000000000 0000000000000000000000FF13460000000000000018138002018038010210010000224106014004 01400C00C00C0800000000C000C04404610420600000000400400000048000000000000000000000 0000000000000000FF5A658000000000000006C00000000000000940000000088C30000000000000 0003004280000004000200884064300460104B012800000000000000000000000000000000000000 0000000000FF11B7000000000001C00C00001A01A01800081001028002D20C0804062161002004C0 40602600640008600054640400E08649440008608008020024000000000000000000000000000000 0000FF40AA000000000001C0180180184190580102991300204060062100AE08603001000A004096 34E10000609000802652000E046040406240000000000000000000000000000000000000000000FF); SDR 8000 TDI (000041801803801811801D2980D8618C180180000102060942820140E68AE0923282860AC4483024 1688622460614640EAA6000000000008000000000000000000000000000000000000FFDCDA000001 801801801801801801C11803801A09800060800600400000C0469064000C452680400100A2048204 42800006006806000000000200000000000000000000000000000000000000FF71D1000401801801 809941801841843C55D41808000001014714450244880200713290702600654002244E03010C4202 9428000C210008100420000000000000000000000000000000000000FF410C000001801803801801 801809801801801800000800020600401000008244E00040C00632C0102121043060040060040104 C4000000000012000000000000000000000000000000000000FFFE4C000000000000000000000000 00000000000000000000000000000000000000000000000000000000000060000060000000000000 00000000000000000000000000000000000000000000FF140A000000000001001001000000400000 00000000000000000000040040010008048000000040000040040060008068008040000000008000 00000000000000000000000000000000000000FFFE3B00020080080080080088080080088080A881 0000000800000803012A02022022022A020228000020822085021020020028020000000000000000 00000000000000000000000000000000FF441D00024000000000000040404001201214000C000040 0809280108A4000C000000C00100000C403400010000080000008400000080408000000000000000 00000000000000000000000000FF4FC8000000818800A00800800900C008008028E0000018000600 600200600700601A00601E1320008120E234EAC308304201A0020000000000000000000000000000 00000000000000000000FF05F1104001805801951855B01815815851933931882000042600689603 581455448700540E4860801160C6D345565470D70468960000000000000000000000000000000000 00000000000000FF6EC70000214010002000000036A160B08B0A160B0000A0110C3C408042000C00 50400248050D06006E9C018A4028010020C318000085200000000000000000000000000000000000 00000000FF01551040008028008D084A900802812830810900904000020200210202E8022D342200 240AC223008920023028B254A8A202A0120002800000000000000000000000000000000000000000 00FF489D00000000000000000000000000000002205000008000C008080020000080000000000000 0000400400050400000010000000000000000000000000000000000000000000000000000000FF61); SDR 8000 TDI (0001A03001805801801801813C01C01F010000106006A56000A160C020A846036806056410486040 00644602608400E836000000800400000000000000000000000000000000000000FFB0BE00000180 1905801809805801823803C05801000140800600608280A02A10612272E1C68040088C6907046107 18660680600E000000000000000000000000000000000000000000000000FF50F0000401C0380380 180580190D801A0181D941004039000640E462012082A0E00A81615E0042948066072000D600894E 006006000000000304000000000000000000000000000000000000FF92EA00000180188180580380 5C03911811843D010000800086C47A0A4462009060820860268340004260AC046436046106A16046 000000000004000000000000000000000000000000000000FFB9B600000180180180194180180181 3801841C05000004022600600350640010E23350640602C204C8E8852000860A000602604E028200 000004000000000000000000000000000000000000FFE7F60000018018018018B380188180980182 1803000092028480425608A056C808068D4A360245000C200200602E02602602412E040200000004 000000000000000000000000000000000000FF43BF000201A01801807809801A2598198780190900 402100CC58408E46302E22088602480700409402240248110210000F00C086000000000104000000 000000000000000000000000000000FFCF6E00000180180180180180184180380180BC2800004000 0E00608600320283034E40488601400040E10208600700608E008006010000000000000000000000 000000000000000000000000FFC58A00000180180180180180180180181180180000002080060C60 4E01200222020E30400689600580E802088004800404100004000000000004000000000000000000 000000000000000000FFC1430000418638018018018279138198479078108000260086236C224041 440A70228562162040C000546688E19284620648A206000800000100000000000000000000000000 000000000000FFEB0800000180380180180984180580380184180080001000864060838058040860 22007426C0430012410D0408422088A6012406001000000000000000000000000000000000000000 000000FF2910000001801801801801801A11A018099018088000080006885512404085407A03A568 2E88E00082810604102E028004000004000000000100000000000000000000000000000000000000 FF8A75000401801801811921801801825C09C4180080000001460240102440042062480060064065 2004013421610E046C8E300016408010080020000000000000000000000000000000000000FFF8B1); SDR 8000 TDI (41B01D21801C29801A03809803821E09800010200EA012A6006A06A8800D10620400220851680702 0806880104026406040000000000000000000000000000000000000000000000FFBE360002018018 01801801801801801801801801800180200600080780600400000480600600200000600680680600 6004006006000000000000000000000000000000000000000000000000FF4FF50004118018018018 01801801C41851805900000000641401100675601651400100081400000036E03701668000660EA0 00A8808000000000000000000000000000000000000000000000FF7CCA000001C010018018018018 01801801801800000000600600001600621408452800149600180080740601001140080200600100 0000000040000000000000000000000000000000000000FFC056000001801801801801801C03C138 01A0580880000160544842040070A74240024248044A455188608222084082194680000200000000 0000000000000000000000000000000000000000FF9FBD0000018018018018018018A1801C01801A 00800000600688420C00622600004A2CC0A426C1A03062C26665B002E12688E24200000000004000 0000000000000000000000000000000000FFC7CE000001A01801801801801805A15C01C058082000 01204ED06410406D56CC2A9240650C50444C42CC8000802022024A20008880800000000400000000 0000000000000000000000000000FFA0D8000021819A01801A03801801A018018019002000000026 8264B0006804822AA281620605400100E420086C0800600680600080000000000000000000000000 0000000000000000000000FF3553000031C01001801805801841821829803C010000006446116946 15620205240008728C00204414502532809100884610800400000000000400000000000000000000 0000000000000000FF4EA70000018018018018018019018018018018010000006016026006206052 30215040604420208020E11400602004640600640400000000000400000000000000000000000000 0000000000FFFDCA0000018018018018018018018018018018010000002004002000006004006006 00600600600400400000000600000400000600000000000400000000000000000000000000000000 0000FF37C10000018018018018018018018018018018010000002006802000006804006807006806 006000006001006806006004806806000000800004000000000000000000000000000000000000FF D7C6000001A0180180180D80180D94180D849801000081608600652884640C80200E006016806105 004410400016810814200006000000000004000000000000000000000000000000000000FF1A7900); SDR 8000 TDI (3543543543541543543541541543040000800CA04808C0D50C804C0300820D50AD0C00C50920550D 00D50B28C80A10000000000000000000000000000000000000000000000000FFB655000400400400 40040040040040040000000400000010000010010400010011010510000010000011004011410010 01001001000000001200000000000000000000000000000000000000FF097C0000AA0AA0AA0AA0AA 2AA0AA0AA0AA0AA0800000000200A000002A0230AA0A200002A80800022200008880080880002080 40000000000802000000000000000000000000000000000000FF8AAF000200A00A00A00A00800A00 C00A00A00A00800080280208A8028128820020028228028130008028220028428028028228020000 00000000000000000000000000000000000000000000FF84D5000201200200200200401401001001 4012350000000150020ACC00080801488CC8C000C20D00888A8C444C80A40CC8900CA80000000009 00000000000000000000000000000000000000FF8E41000041801911801805801901A81A21841801 8000026206926004C16106844016124C460064400161248040262460260263060200000000000000 00000000000000000000000000000000FFB918000000C40C22C80C20920824820880901C80000100 B8532032D70230124073460070032C31091220060C701300B5030030224000000010000000000000 00000000000000000000000000FF74CE000000000210208200200208008000240201000000803004 0A44200090A00A200800008208208488A80808088108008008200000000008000000000000000000 00000000000000000000FFEA8D0000088808408008688088808008008A880200000824C20221A200 210280200024200250A3500128028000020024420420020400000000000000000000000000000000 00000000000000FFE95A0004804400A58018058000005005C210200000000008010040108F12004C C14100086400400828000490E06046E0800086440200000000000000000000000000000000000000 00000000FF47BD000460000000000000440746440400400128000001000820040040800000009112 06002004000200000060900861080801000000000000200000000000000000000000000000000000 00FF5A26000003801101901801901801821A21801880800026000658000A00600C80040C00E00604 0000104B46866006006000220008400000000000000000000000000000000000000000000000FFFE 4D00030BA01A01A11A01A09911A41941A95AC20000C328A6941012D2E88E001344C2E824A2884082 62CE1088CE828808A88850000000000840000000000000000000000000000000000000FF9A5D0000); SDR 8000 TDI (005180981580188984190190982B828038610E40469200608A02609671429E4402B01001061B0084 08020601E434108000000000000000000000000000000000000000000000FFAA8000000082080180 180080588180180381383304A000000E004100126110156006044484100042000404006090126046 006044048010000002000000000000000000000000000000000000FFC8E700000004003200001400 400002010400400008200084000080102002203000201200202D0010330100006448046080020208 0A0008000000000000000000000000000000000000000000FF78E600000300108180180180000102 0000100000002002000402022420000C100334000410080220204000506200106020200004000020 200000000000000000000000000000000000000000FFED0F0000008008008008008008A480080090 8800800000210A6800831C80222320122120022020800A26BA43808A00A042002002000400010000 400100000000000000000000000000000000FF39A100040041810800000040040040040040040000 010010011010080010010014410890A10210090010010001700300C0020200000000001000000000 000000000000000000000000000000FF4104000400C00808800800C00CC0C40C00D09C0080010430 0B40704A113043527007213143223051203203126402042102442202000000001000000000000000 000000000000000000000000FFAE2000000380180180180180180180180180180180200060060462 8620401600608C10620E0864800C6136214006086006006006000020200000000000000000000000 000000000000000000FF9F3200020020020020020040120040140120104000000008000049088880 2880C88CCC8800000880100808044A50C20800800800800000000800000000000000000000000000 000000000000FF272900000080080080080080080080080080080480000020028020020060820020 0200200280240084A082A0200200200200A002000000000000000000000000000000000000000000 000000FFF5410000AA0AA0AA0AA0AA0AA0AA0AA0AA4AA09800008002A92A82202223103B02200002 A82A80002002300880800882A83E02A8000000000200000000000000000000000000000000000000 FF7DB200000000000000000040000000040040002800000000090282100000208088502900000001 02080410800050000000030100000000000902000000000000000000000000000000000000FFA389 0000AA0AA0AA0AA0AA0AA0AA0AA0AA0AA0A000010002A82A82B02882402202302802A8AA82812B02 208A84082A82A82102A8000000000000000000000000000000000000000000000000FFE5FF000354); SDR 8000 TDI (0D801800801804001801801821000000600610E00A41640200600008604002400401608042020402 0006006004000000000004000000000000000000000000000000000000FF82D200000080A0418018 01801800001801801801800024E0060464C214611200601000E28431600010624C00612A40600E01 6346000000000000000000000000000000000000000000000000FFA4FC0000008000018018018018 0000180180184100000360061260420162020D60080A6004026C0400600402000004055641608C00 0000000804000000000000000000000000000000000000FF26240000018000018018018018000018 018018158000006006010096A0612600610400600208610000612A20608600600004000200000000 0200000000000000000000000000000000000000FFF16E0000AA8AA0AB8AB8AA8AB8AA0AB8AB8ABA 8100002862AE2002060E701E20622424E2AA30F0042AE20248833C28800008022200000000100400 0000000000000000000000000000000000FF1A95000001800001801801801800001801801C018000 0040060021162C602600E01010620800690022000044608202601004011200000000080000000000 0000000000000000000000000000FF302D000154954155955955955954155955955D45000048E556 4AB4260060863164C040455240210455050213044031023005042A00000000000400000000000000 0000000000000000000000FFC0B00000AB8000AB8AB8AA8AB8AB8AB8AB8AB94D80002CE2062B2202 8065122A620222E0063160001002B608E22648E22010820600000000008000000000000000000000 0000000000000000FF2CB0000001800001801800801801801801801A11800002400200208A48E422 02600A10E00605440000002E00000402010030008600000000040000000000000000000000000000 0000000000FF1E5C0000AA9760AA0AB8AA8AB8AB8AB8AB8AB80380000061762A024A01E20A2AE36E 22434424E4000B62A408823A08832848024400000000000000000000000000000000000000000000 0000FF97BE00000089000180180080180180180180181180001460060109200A700000608610612E 02688020600E00608040600020002C000000000800000000000000000000000000000000000000FF 0D0F000001800001801801801801801801801941800041230E0040022060C2006006016004082400 010004446006026106056106000000000100000000000000000000000000000000000000FFB38C00 000180000580980080180B801801801801900020E20600C0014062404060C600602600E48044800E 420222000506046006000200008000200080000000000000000000000000000000FFAC5200000180); SDR 8000 TDI (800800201C05C41C01A018A404001060063000804964800862A40C60CA01428008654E0465080961 4600E00440E300000008000000000000000000000000000000000000FF32AF000231001800221A00 001801801901801800000000620E88033003601120222440084088414004E8842504001004841040 94004080000000000000000000000000000000000000000000FFC8BA000001801800800802401821 C01801809800000000603450A08C00600802E04002608200C00002C0060301400001060878460060 00000000000000000000000000000000000000000000FF9260000241A01C00C01C02401C21A09B01 A09800100000642602280519620012B1000AB6C316C141007326006080006066C060360060000000 00000000000000000000000000000000000000FF440C000411001C00E20E01A01E00011C01C01800 000020600704222202620120640A50F00F20600C28342A4004000A84020021020020880000040000 00000000000000000000000000000000FF49D8000243801840800831801800001801A01800000034 60160021021460900060020040240060030081264061080060008001120000000000020000000000 00000000000000000000000000FFC2C1000109201D0C801802001804401C01801800000000E32610 880B41600000302200310723400400281600000044000A0120020020000000040000000000000000 00000000000000000000FFAE820000418ABC00CAB8858AB8A80AB8AB8AB8AA000000604632022205 62302AA3DA2AA31E1860043A02040AE27008E2A22A22220020000000040000000000000000000000 00000000000000FF1AEB00000114181080080180180000180180180400000AE00600E00602E02800 600444411000400608209602020E02000C0040940040000000060000000000000000000000000000 00000000FFA6A40000950AB8B28AAA098AB8AA0AB8AB8AB8AA000008648E2262A62062A02AE2042A C20002C00020028628E0860AE22422422E0040000000040000000000000000000000000000000000 00FFD87A00015500DD44B54B541559521559559558A8000040655654654640640055655609404432 40044302463101465104404C0244000000000004000000000000000000000000000000000000FFAD F00000010018008008C0001800001801801800000042E00401600E08600000200600002440600405 002E046406406088110106000000000000000000000000000000000000000000000000FFAC610000 AA8000018AB8AA8AB8A80AB8AB8AB88B80000842AA2060121061222AE2A022640801600222600008 E00608E3A62B600E000000000002000000000000000000000000000000000000FF166D0000009201); SDR 8000 TDI (22020000000000002000000000800000008040010000041010200008000000000020400100000040 010000040000000000000000000000000000000000000000000000FFFEDC8000AACAA8AA888980CA AEAC8AA8AA8AA80000012AA2AA223A821060000132020224022AA00032238A08A2220AA202222222 202000000202000000000000000000000000000000000000FF32380004002004004004C040120240 12014010000000005000005010080800801010480200294000804330004008420080000800140000 000000000000000000000000000000000000000000FF2EC6000555955D55E89E31B55951F55D55D5 5800000055755654E42640400114653650E10E55610044C04653444E1165465074D6556000000200 000000000000000000000000000000000000FF2B970004108AA8B28AA8088AAAA88AAAAA8AB80000 002AE48A32E2A22028002AA2C20020320460808AE0020AE32208A04A40A432012000000100000000 000000000000000000000000000000FF57A400000020040002200200000000000040000000000008 00001088028001400800040020000000000410000100220008050800000000000000000000000000 000000000000000000000000FFB815000144CAAC00CAA8848AA8A88AA8AA8AA80000002AA0422002 A20500002AA20205A30220000040200248822208A40214210A40A000000000000000000000000000 000000000000000000FFF9D200050980180D801A038002038000000000000000000B260000040100 000040040A0040100000008228006100006090000244000000000080000000000000000000000000 000000000000FF11F20000440000C040003000000000000000000000000000101480103400000001 302001080301002C00804260104262203301002A0000000000000000000000000000000000000000 000000FFC117000401201A02C00A00001A019018B1803822008008682E3040880060001021400402 001064000022A204628610E484014044204080000000000000000000000000000000000000000000 FF5957000001801CA0801E01801905841801821900044000640601444052E40800A2100820A60160 10122010088016000046206404016008000000000000000000000000000000000000000000FFB808 00000180180080180000188180180180180000000060060040040261000420086020120061004320 06000046000006206206006408000010000000000000000000000000000000000000FF46F5000001 801CA0C018018018018818A982380010A040622E41C22C00600812A11000021448601870A01008E0 66056204404026004010000000000000000000000000000000000000000000FF2025000001001C02); SDR 8000 TDI (01811821810051C558D180400063070414464D4C9685400304404008451092644250001642032610 60C6000000000000000000000000000000000000000000000000FFAF510000018018118000098018 0988000188180180004C403601010600000410403211401000604000E00202630600600640400600 0000000000000000000000000000000000000000000000FFFE4C0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000600000600000000000000000 0000000000000000000000000000000000000000FFAC110000000000010000010012000000000000 00000000000400400000080000400500480080400080480000700080700080400000000000000000 0000000000000000000000000000000000FFEE59000000800800808000800800000000822A818000 0A200220202600210280200202200000200000220228000200200200228200000000000000000000 0000000000000000000000000000FF8D2F00000000000000400000000C0000081082400000200090 000008000000000000C9080080010803000800080000080000000000000000000000000000000000 0000000000000000000000FF42DE0000008008008080008008408000058018148000282082202006 10201B00605A20607600200818200205600200218200208600000000000000000000000000000000 0000000000000000FF2359110051811811900055811915954115C159458D2008653631714653694E 12C4B644C4365160A1206CB6114416C164AE40710604000045022800000000000000000000000000 0000000000FF204E00000100100000200000064B00000B1EB02B000000000800040D000080404001 0AD00404001004920182D04080080000004400000000000000000000000000000000000000000000 0000FFBF7A088030C10808900032810890D50012A008A48C409023524030A288A012042242202002 30210080240A112A32212232203102020000048000000000000000000000000000000000000000FF 35040000002000000000000000022021000CC00000808000008102002400A0290881010000000028 00010000000080080000002000000000022A000000000000000000000000000000000000FF98F500 00000000000000000004600000000001000000040000880040100000000848020A38028103260830 500000000081000400000000200000000000000000000000000000000000000000FF98AB00040020 040000003020000420020000000000000008001000083400013080A0108540000080090000020010 400110101110110000000000000000000000000000000000000000000000FF7F0F00000000000022); SDR 8000 TDI (801801900041C05805800006014682F0462040A0C03C020A800514E00424702300044716982F4464 46000000000004000000000000000000000000000000000000FF211A000001881801804001821805 8080098419318000012006A02216056C11806A02003042A46044016A06046216886886A240060000 00000004000000000000000000000000000000000000FF9E42000401821801804001821801000501 801949800030C40621210652600000602232280E40608410602B0200060080060840060000000000 04000000000000000000000000000000000000FF0223000201801801802001801820000281841821 8820206204C0E2478049023422023000442540028000040060200260002423460400000001060000 00000000000000000000000000000000FF5F1000000188180586000580182013A007A25915882000 4046006B0644C0EA0A21DA04802410C1049400D00D840101060010A0860200000000840000000000 00000000000000000000000000FF12D3000001B4180180000184180082404180180180000AE08600 280608D00C00200201100800600400210408680008600000A0060000000000040000000000000000 00000000000000000000FF6221000001841801800001821910000051805801800000400620200600 40060825020000A404400410281000080008000000200E0000000000040000000000000000000000 00000000000000FFB0AC000001821809800001809849800001903801800006E00724400700600609 C21684E2860244008C60060060084D682080600E0000000000000000000000000000000000000000 00000000FF8293000001801811800001815801840001841801800010F88300400640780600400310 E40E00400920E8820500100000413040060000000000400000000000000000000000000000000000 00FFDBC9000001C01801800001803881800011901801800090600680500700600000408602604200 600020E10E850000228800206006000000000000000000000000000000000000000000000000FF14 9C000001801801810001821809800049803809800025641604510604200A10500A02622E2240A102 6026446000406CC0404006000000000000000000000000000000000000000000000000FFC4220000 01A218098020098418408C0041AC18218001086186048026E0020482C032B8C09400661804EA0700 6A8E00600E106006000000000040000000000000000000000000000000000000FF388B0000238018 018000018498208080018298818020016024000207088086004802404D004C400208680208080602 08160840A6000000000002000000000000000000000000000000000000FFBD99000043C2180180C0); SDR 8000 TDI (5C4180190190190180004440065000041068004064454028124820000660220068E022E80200C006 000000000000000000000000000000000000000000000000FF5C10000001801801800001E0180180 180180180180018040068000040065200068842234B400020140700E2A8000000407006006000000 0002A8000000000000000000000000000000000000FF4D6200040180180180000180180182180180 B8099000C0402604114C096014C8C03480280204A8B000A8020010000018D2004006000000000000 000000000000000000000000000000000000FFB54700000180180180000180180180180180581180 0040400682000402E8044A48844027830D222144A2260662C000E006004006000000000450000000 000000000000000000000000000000FF46E4000001801801A00001801A01A41A01A0900190010020 4604015210E5561168C902405608535401603128890022853400C006000000000084000000000000 000000000000000000000000FFDB82000009801803808201A0184180180182182980000822260003 9A30600680E00808C86007E00428600C206840806006006006000000000004000000000000000000 000000000000000000FFEA8C000011801805C10003803C01C01C01CA100980000064261044060460 061550A8094002806200A8F008400500001006004006000000000004000000000000000000000000 000000000000FFA50A0000018418018000018018018018818018A180004A60064440064160062044 0020429650602604624404600000E006004006000000000006000000000000000000000000000000 000000FF4C0B00000180180180000180180180180180100180000020060040020060020060040060 04002000002002000006000002006006000000000004000000000000000000000000000000000000 FFC56600040180180180000180180180180180180180000020070070020060030060048060040020 04002806006806806002006006000000000004000000000000000000000000000000000000FF0516 000001801809800201801821801A0184100180000060064260060068060068041440088020048120 22040206020806206006000000000004000000000000000000000000000000000000FF5BC6000205 901801802201801803831A098818D18000006006016216256C4604641480C02424E044502A062068 AE4960D6026006000000000004000000000000000000000000000000000000FFE0C2000001801809 818005841821820001881801800005200200700600411002206E00000D0060010860062060A62060 06006006000000000000000000000000000000000000000000000000FF62D4000003801805800007); SDR 8000 TDI (820000AA0AA0AA00000200002A02A82200282A02A82883201000002402208882200882204002A800 0000000000000000000000000000000000000000000000FFE94C000200A00A00A00200A00A00A00A 00A00A008000A12C4A80A802882A82812802802882882A00822902002882C02802A0300200000000 0800000000000000000000000000000000000000FF65C60004010012000002002004310012012000 010000904900804800808800000804824010C3080090881022480884090895000400000000080000 0000000000000000000000000000000000FF35A7000041883801810001821801801801841A018000 08C50650E126006146926424104C0E486440446406A8C10608612600640600000000000000000000 0000000000000000000000000000FF256D000480E20C3488042AC12900820854C008008001423003 00120345321320A00E22712304311111303200702B21340B40A82600000000100000000000000000 0000000000000000000000FF9FFB0002C04022481022502002000000480024000000D44F00880000 840D00C10800400420800800850890000900800808C0048800000000080000000000000000000000 0000000000000000FFE14B0000008C8800800004810D00A00A00840C23800002200200420A092002 2024022022424020000A204220024208200200202200000000000800000000000000000000000000 0000000000FF42820000081040218000218C7800080416480008000008400E611024000024064025 0E500800811000020151E02050E14000D00000000000000000000000000000000000000000000000 0000FF9FED00000002000000000000008804820000000000000100001204000200D0101209008100 2A04C20004210860100162B0211840000000000002000000000000000000000000000000000000FF C6F5000101801815810001801A03A2188180120180000000060001C060E20008C854100090144000 50C002826086206404006006000000000000000000000000000000000000000000000000FF4E9700 0491C0BA21804241A018018A1811A818238000880A0E880890886A00D44400C2082AD148808A4CC2 290C26B088248040D6000000000800000000000000000000000000000000000000FFE02B0002018C 1809800401D0590B8098838038118000020006224A4022E0A000C04808850202600080C807020087 00028EA14806000000000008000000000000000000000000000000000000FFBAA700000180180180 0001801A018018018018018000000006004000006000006000800000006000004006006006006004 006806000000000000000000000000000000000000000000000000FF350C00000184180180000580); SDR 8000 TDI (042014122001804003001040000800020000800820810005000001040000E2901064083000000200 00000000000000000000000000000000000000000000FF7849000005001011805001801803021001 02101180000041064003404200000043501540004040802440102060240060100440000001000000 00000000000000000000000000000000000000FF9F8700008884080080486880082C900802888844 808000600A0220070C01062AA40230222210A0184CA06250800A0CA0422425120000000000000000 00000000000000000000000000000000FF5993000410400000400000000400400400440400000102 00010010000010291110010010080811000006C10A03901200800010000000000000000000000000 00000000000000000000000000FF5A5F000404C00810C04850800C14C20C00C00C00810104208340 35064030072230230C344A48300200A00B5462420220820030060000000008020000000000000000 00000000000000000000FFE291000101801801801801801821801805889809800000401604604414 402C00628E41600601601052608601400601600E4260060000800000000000000000000000000000 00000000000000FF05630002002002004002002002402002002002000000A549008B0804D0882480 88A80009488008008008504248008009089088040000000008000000000000000000000000000000 00000000FF8ECF000000800800800800800812800800800800800010244A00200204609200200281 20020024000122028020824420020020020000000002000000000000000000000000000000000000 00FF8B690000AA0AA0AA0000AA0AA0840000AA0AA0AA00000400102402A81423002A02412A06002A 80002A04810C82280882202202A8000000000000000000000000000000000000000000000000FF34 660000000000000000000000AA00000000000000002A00080090000410C800000008800000040000 00090000080000000A0000000000000000000000000000000000000000000000000000FF45290000 AA0AA0AA0000AA0AA0A80000AA0AA0AA00000082203002A80102482080082B00082A820032802028 82204A82B02202A8000000000400000000000000000000000000000000000000FF77E20003543543 542003543542002003543543540000810CC0D40550D08200D48D50C20C30C30800D08D40550CC0D5 0D50808D50000000000800000000000000000000000000000000000000FF7CA50004004004004004 0040040040040040040000015011010110014010011214800010A100100100109000111100100109 1000000000001000000000000000000000000000000000000000FF4DCF0000AA0AA0AA0000AA0AA0); SDR 8000 TDI (000000000100000420060A614100E15200640400A20614680000E492400016240226006006000000 000804000000000000000000000000000000000000FF72EF000000800801A0100180180000000000 020180001060060040162C680600412800212C012010106024046086006108004006000000000004 000000000000000000000000000000000000FF69CC0000AA8AA8AA8010AB8AA8AA0AA0AA0AA0AB80 00A0E2AEA0CA060062442AC1002A20042030002660000882260880102AC2AE000000001004000000 000000000000000000000000000000FFF6BD000000800801C0100180180000000001040180000020 0641680AA2700A40600204250C314020102004046108046210516006000000000800000000000000 000000000000000000000000FFC42700015495495480115595595415415415415580004425564AE4 B20365025564225425340440144820281504D0110420554556000000000004000000000000000000 000000000000000000FF97710000AB8AB8AB8010AB8AA8AB8AB8AB8018AB80012A42AF0A42A60862 A40CC2AE2060260050002302A648E22008E0C00042AE000000000000000000000000000000000000 000000000000FFCAB9000001800801801001800801801801801801800189400600400628600E0040 1600E00248C000008482200000240080004006000000000000000000000000000000000000000000 000000FF152A0000AA8AB8AA8010AB8AA8AB8AB8AB9478AB80002B42AE0042A401E2A60062AC39E0 060400202242362882244880080462AE000000000000000000000000000000000000000000000000 FFA51C000001801800801001800801801801889801800000400610C0140260160260040061022208 0008400600608C04614000C006000000000800000000000000000000000000000000000000FF2B33 000001801801801001801801801801841801800001000624600628600649600202645410A0000121 16026002406406546006000000000000000000000000000000000000000000000000FF8BA3000001 8008018090018008038818018A380180000200061064C744600608C00A0860840820101222220880 0A02021602408E040000000000000000000000000000000000000000000000FF625C000000845881 80D00380180185D80180184188400102160862B021E00A2A40024060280500200920824205201000 0640C006180000000000000000000000000000000000000000000000FF962D000000800880801043 80080180180B801805880000020640600000628A42420200E0480000402021020260200060260964 06000000001000000000000000000000000000000000000000FFFD10000000002000000000000000); SDR 8000 TDI (03811E018000107C020064020070160858C7A420060020D001000200042220040400600400000000 0000000000000000000000000000000000000000FFEE08000449C03C03808401C02009815A11A09C 01810000685F05701210E00309CC071024C70160208C400241620600634680680400000000000000 0000000000000000000000000000000000FFCB34000601405604000400C018004000000002058021 05400608790000E0072060020020962A00045004A810008808000300500000000000000400000000 0000000000000000000000000000FF1581000011021029800001831800000404200001800012C806 0040500360060060020124460044101264300060CC04608080600200000000020000000000000000 0000000000000000000000FF5785000103505104000200C000040000000020018000004006802084 50602B00515100200B00808100210024000000000000680000000000000400000000000000000000 0000000000000000FFDDC20000650090018AA0AB8878A80AA0A80A80AB80002052AC2A8244006282 2AC2002A21822F411024E00048E20428E2282AE2AA00000000000400000000000000000000000000 0000000000FFA9CB000001801800000400801800000000000001800000400604200804600E006144 00200002A10008210C0000A200000600E00600000000010400000000000000000000000000000000 0000FFAD75000009083AA20AA0AAB298A80A80A80A80AB80002342AE2AA3002CE2062AE3242A2450 2062002862A40AE2AE08E2B42AE2AE000000000204000000000000000000000000000000000000FF 2352000155955554154354D5415215015215015580005475565124A05160C6346410552542502026 45244413040A550552222556000000000006000000000000000000000000000000000000FFFE9F00 010105100800180080000400400200400180001060020000100060D200601000A00208600000E014 006006446000002006000000000000000000000000000000000000000000000000FF19BC0000AA8A A8AA8AB0AB8AA8A80AC0A80AC0AB80002B62AE2242200064000162202AA21420640022622668E206 08E2261062AE000000000000000000000000000000000000000000000000FF300100000180080080 1001800800002002002001000000600610410050600004608000205400E28408608200002E000016 086006000000000004000000000000000000000000000000000000FF48E900000080180080100180 1802000000000001800000A0060160100362B249600C00208612602001601602610622608642E006 000000000104000000000000000000000000000000000000FF7F0400000180180080100180180000); SDR 8000 TDI (4000000001040900020008000001400001004000800100810420405000400001408C080000000000 80000000000000000000000000000000000000FF6645000155955EC584BD4BC31951D55F55D53955 8000D5648640654651544FD56407C4645602E10004644E5348A613644E50F4560000000002000000 00000000000000000000000000000000FFA2AC000010A02822A208AA928AA88AA8A88A88AA800028 2A0230A2A22CA2AA02A2C22AE202AB2400AC20020AE2A20AA0220A28C20000000000000000000000 00000000000000000000000000FF25D700020000000000020050200040000040000000000000280A 80000400800000C80881003004101081000002082000810400000000000000000000000000000000 00000000000000000000FFF83F000064808A008092AA8868AE8A88AC8AC8AA800023A0520022A200 02AA1022322A835A22A0C200219208823208A51200A20A0000000000820000000000000000000000 00000000000000FF6509000503805885801801801C01C01A01C01801800000040E00801410000405 40000060401000204202104060004464800400040000000000000000000000000000000000000000 00000000FF4F790000102A002834240022800000400200200180001009202C000023000048008880 00800004000880400461100060482801400000000000000000000000000000000000000000000000 00FF1EC4000401201200200404A00201A05A01A058A480001068060064060A60420040030020A620 A130110246486002126324014004000020008000000000000000000000000000000000000000FFB9 DA000001011C41880001C018018098A1841808800000704610402E01641242C2CA40A40E08200042 0116010402410006004496020000000000000000000000000000000000000000000000FF05C20000 01801001800001A000018018A18018018400016C040F602608600A30428210E20208600800000604 0202200226506084030000000000000000000000000000000000000000000000FFDAFD000041801A 0180020180180181380180382B824009602601C41600600248650204602A34E08028403400601658 610428E006008000000000000000000000000000000000000000000000FFF70E0004018118401002 04C00201A09801841880800001620600321602E44602E05430210600202005450A54E00604E08700 6216000040010000000000000000000000000000000000000000FFE035000081201A000000008000 01803813801804810094624612208610700A80602448242E21610842C2C249014600004600500600 0000000000000000000000000000000000000000000000FFD7D7000109801001808001804411801E); SDR 8000 TDI (00018000000000000000000000000000000000000000000000006000006000000000000000000000 000000000000000000000000000000000000FF395100000000000100100100100000000100100180 01005004000001001000001004804004004000805000806800006000000800000000000800000000 000000000000000000000000000000FF4552000000800800800800800B08202000900800900020E0 0A002002002002022022082802002800082002208002002022082002002000200000000000000000 000000000000000000000000FF923100000000000000001005000405001202808C0000100A400000 80000004110800800801000800800230800008100000000808000000000800000000000000000000 000000000000000000FF1B7E000000800800800800804808002000800800880100A0020060830070 06622026482003402000012002146782002002086006006000200002000000000000000000000000 000000000000FF4D5E140001801801905905901854054011955951812004C01648F51608748E5460 A4507247056040406806005846506547016006086000300100000000000000000000000000000000 000000FF2EC600000100100000000802808202800A0A808A00004842200448418040440884040508 00500510198C298AC0080C0010004404004000841C00000000000000000000000000000000000000 FF30470A000080080080488288080202201082C8C0814104200200210A00340212200202A4030020 48082202002842302442013002002000100080000000000000000000000000000000000000FF6D9E 0000000000000800000000100080000800100000A080000A84001000A82003018000001082808008 00000000000000000A00100000A40200000000000000000000000000000000000000FF66EE000000 0000000000000044204000000000000000400018200020000000000020680020620000A084004000 000200C8800010000000000000000000000000000000000000000000000000FF82D8000200000028 1422D044800440000240001000000001200301402314400000508100904902802C80000000882000 00020910000000000000000000000000000000000000000000000000FF6A94000000000284000000 00000000420000000000000004080000081001108000800C00200000080000104402200201500900 00000000000200000000000000000000000000000000000000FF95D68004AAEAA810F08802882EAC 8A88A88AA8A280002AB802283A120060022AA2022022020220004022A208A00208A2022023220000 00000000000000000000000000000000000000000000FF1D73000300350508295400400200400400); SDR 8000 TDI (0D800141320040600720F006D4610882428401629091080231044600001200620600600100020400 0000000000000000000000000000000000FF68B5000221801801809821001A020080018898038000 856084006086C0604684601422228008014800040608E80600781600600610600000020000000000 0000000000000000000000000000FFA29F000029A01851909C0D00180000A00184581180005A609C C160C61B632611610408A0204D0024110010C00C4600018601E00608600000010400000000000000 0000000000000000000000FF7583000013841801801809001808002001C018018080803400006004 04620620700008A04500240100400400600600600600641600600000080000000000000000000000 0000000000000000FFCCAB00000B8018098118010018000441018D38018000002004286216007C06 00680008200400200010400C0002440000040A60A600E00002000400000000000000000000000000 0000000000FFF6B400000B8118058078010010602200D1829811800000C4202C63A6246006604404 660246A6800081E00615E30E1260030A60A602E00082040000000000000000000000000000000000 0000FFEB05000001801801801801041800010001E0180180000AC020806044B16006004825800416 48840102628240001624808A006006146001000002000000000000000000000000000000000000FF 20D30002018018118098010218004040018038080001144000026016016206004040004016084200 0A20865400C4000081806006006000000200000000000000000000000000000000000000FFB65700 000180180180180100182004008181180808004AC290846046AD640600C081084056D0C28020A242 03600E00602A2A6416006000000AC0000000000000000000000000000000000000FFCEF100040181 1807801A01001088210059901283800000042080680614608688640C328A4202002800441E206086 716096006086106000000000000000000000000000000000000000000000FF7E5A00002180180180 3A01001006200001A21021820000010488E80E00600E036034900012010000824002000606000007 406006006000000100000000000000000000000000000000000000FF816600000180180180580100 19100400018312400200550C280D604E0564170C68402410428C050025421204801440000C14630E 006000000440000000000000000000000000000000000000FFAFDA00004180180580180100182000 011180110A1000000004006004486106006104008402400050004022406104006144006006006000 000000000000000000000000000000000000000000FFDC3400000000000000000000000000000000); SDR 8000 TDI (94000AC02500614D80654E08412208621200444001200A8010048108074060060000001020000000 00000000000000000000000000000000FF7B96000001801801801A01800401801001841801800004 401500608C28660628C427067E7322409988AAF21AE0042E648E0862260000000020000000000000 00000000000000000000000000FF3EAB000001C01801811801901911801901814001940011204400 60D6006956D360D2300005402524154003440A1029000C206006000000A860040000000000000000 00000000000000000000FF00A8000001801801809801801801801201800201800088A00600A10700 68AE80620A88000600A00402600200688200E1140060060000008020040000000000000000000000 00000000000000FF649E000001801801811801801A0180180980002580000060068140463462C654 E112084A0234214C8C2028040102D208000860460000000060040000000000000000000000000000 00000000FFF3C4000001801801801801801801801001800001800028E00642441600600E00642203 402201200401250010E0020160000064060000000020000000000000000000000000000000000000 00FF55B4000001801801801801801800801001801801800000200400600600600600600200000600 6004006000000006000004006006000000000004000000000000000000000000000000000000FF61 A7000401801801801801801800801001801A01800100200480600600700700600200080600680000 7000006806806804006006000000800004000000000000000000000000000000000000FFF69C0000 01801801801A01840000041081A81801800000680402E80600650608740210200281610481208801 0006000240006016040000402004000000000000000000000000000000000000FF02F10202818458 11811821808002115031A0195190004AE854806306216006C26936422806C26C0004680004684E8A 6800407026008000802000000000000000000000000000000000000000FFD7340000018018018018 21009840000021800A818001026804006204107006016004A0619002E00118000680600600600600 700E106000200000000000000000000000000000000000000000FFC6010200018018118098050018 26080089844A01890008E00403E8C60071060B602448600864600400849002000600000200601600 6000000104000000000000000000000000000000000000FF5C2D000101C23811801C01021A0004C0 01900849800020205100780651650640FA9002400400628104101600E02E14622220602614E00100 0000000000000000000000000000000000000000FF8E9F000403821841901A41001808000001910A); SDR 8000 TDI (008048010048200048048100008448108B08088108000448C8840CA0004004000000004800000000 000000000000000000000000000000FF7CE200002580181181190180590180580190184580000C43 0600424E006006046A1600C2064064005160460240560160C6016026000000206000000000000000 000000000000000000000000FFEEF8000480CC0C22C44C00D08C0CC88C04C44C0080012030025371 03C8610720302254304B04B041043302B07283483413A42816810001083128000000000000000000 000000000000000000FF6F2900032C00020421432021002000428030020000009689008008488200 04A00230A30880858840800C08080C20808A11009009000000100800000000000000000000000000 000000000000FF27F9000080800840820800806806920800844820800000640B0C253220A0020020 8290204A02242004A302800002002102423002000000000000000000000000000000000000000000 000000FFD07D0000004600018818018818800180258A18458000404000000000101208000C0C4404 00684088020044C4E0004A600C0100600100004081D0000000000000000000000000000000000000 FFBD1D00004010003004000000810000000000000180000800000200008011800800400002200000 00480000806310116080200880008000000000000000000000000000000000000000000000FFBC8E 0000018038818018019018198038018018000000200224F1620040600644600280A0140040001140 061060C4006442046216000000006000000000000000000000000000000000000000FFBCD3000481 C45A21A81A41A15AA1A29A21A01A200000800A3610280C036886B06C02032C1482C940924A060009 26800A8303622600800080E800000000000000000000000000000000000000FF2B3A000049A01881 82180190180DA05C81941C018001330004A26446A062160040AA2060A230400800A00C0882021480 0A20610E000000006100000000000000000000000000000000000000FF6CB1000001801801801801 801801801001801A0180018000060060020060060050020060020040000020040060020078020068 06000000002000000000000000000000000000000000000000FF1D31000001801801801801800001 8018118018440000404004446446046006044102A368069068408068320062062862070070060000 00006000000000000000000000000000000000000000FF3125000001801E01801A01F00101C01801 801A00000000400C00200600600622D2170060254071100A40022C081604000E0060060000002060 00000000000000000000000000000000000000FF1EA0000001E01801811801800009801081833801); SDR 8000 TDI (2020140020620024822C20A200201200200010261A14010208220241204201002000000040010000 0000000000000000000000000000FF508800040040000004000C0484004080040001820001081001 10000908100D4010410090C118900022051102022000100100100100000100100000000000000000 0000000000000000000000FF2FCC000400C0080080280080CC04C00810800800800148B001406403 00341700301304B08745704042202304642200300300700700004100100000000000000000000000 0000000000000000FF8DA100012380180180180980180980980180980B880000600600402E106086 10E10620641400600810600600608E10640413600600040800800000000000000000000000000000 0000000000FFC57F0002002002002002002000000002002022000000840C84004800800804000128 0211540AC810900808C24800A2108400480400000000080000000000000000000000000000000000 0000FF1119000000800800800800800800A00800820808800000A012802002002002802A02102002 002000032522002002002052002002000000000000000000000000000000000000000000000000FF 5A400000AA0AA0AA0AA0AA0AA6000000AA0C80A200003800202A82A92A92A82A8010A08310B00000 2000104882A8088610AA82A82A8000000000000000000000000000000000000000000000FFFAB900 00000000000000000020000000000000000000000000000108001000000000028800110000110540 C20000400040800800000000000000000000000000000000000000000000000000FF79DA0000AA0A A0AA0AA0AA0AA0002000AA08C0A200002302892A82A82A82A8AA8880290220A100082C82C00882A8 0A80A0AA92A82A8000000000000000000000000000000000000000000000FFB04800035435435435 43543082002003543143540000D50D51550C40D50550C48D50C80540C20810C40810110850951088 550550550000001000000000000000000000000000000000000000FF94E800040040040040040040 00000004004004100001001040001000000000000441041800841001001001841001401800000800 000000001000000000000000000000000000000000000000FF82DA0000AA0AA0AA0AA0AA04200000 00AA0C80A200002A02A8AA80802A82A83202A82002B02000002200000885000884082A82A82A8000 000800000000000000000000000000000000000000FF0AFD000200A00A00A00A00A10A00A00A00A0 0A008000812802002C0A80280288280288A002003000882AB2402A02C02002802002000000002000 000000000000000000000000000000000000FFE8FC0004012012002002002A000000020024421000); SDR 8000 TDI (62AC1060062AF2AE2A82042421442274046203204882000882042AE2AE0000000010040000000000 00000000000000000000000000FFD5D70000008008018018000018258C9000821801800000700001 60060040060400040A20000068004A00840060004060000060060000000008040000000000000000 00000000000000000000FF47FA000155955955955954145935955154911944800044655020641655 65565500944124004461040804541304D05504005565560000000400040000000000000000000000 00000000000000FF01840000AA8AA8AB8AB8AA0B28898038AB88A0A38000AA64222C620E2AC2AE20 C2AC20015222E00000A20628E0200AE2AE2AE2AE0000002C80000000000000000000000000000000 00000000FF7518000000800801801800010C01C01801824010800001600004E0A600400600442408 000A10E00002A0060000000000AE0060060000002884000000000000000000000000000000000000 00FFC0BE0000AB8AB8AA0AB8AA0808A38218AB8880B200002B611A2063462AC2AE3242AC2144AE30 60000022560C87902882A62AE2AE000000220400000000000000000000000000000000000000FF5B 62000001801801801800048A11A81801820001000000620002E00E00500601400408400601680022 2086046040006006006006000000010800000000000000000000000000000000000000FFA6510000 0080080180180000380181300180580980000160C610614400600610600405020612600010E05220 600E046016006006000000080400000000000000000000000000000000000000FF7A330000008008 0180380000590180100180B840802020600420E28E0060060060042C009648E10028620A04001628 0006216026008000000000200080000000000000000000000000000000FFB6D20000008008018038 0800384180790180980002200060921AE00620C47E00E1040100C628E20802600251012E2080021C 600E060000000000000000000000000000000000000000000000FF0A720000008028018018080018 0380180180180102001141020220244D410605600600000600641004400200602603600200601600 0000000000000000000000000000000000000000000000FF9B5C0000000040000000000000A20001 00000021800031000040028812010000010033002000008020000041600014600002000000000000 0000000000000000000000000000000000000000FF2C8C0001010010018018018018000000098018 09800001000028020400020000C00C24422C2200280800A40061080060000C800000020801000000 0000000000000000000000000000000000FF16D800002280080082280282280A80080280C8008800); SDR 8000 TDI (2E0020C680740609102084000908600450420000442000400610780E000080400004000000000000 000000000000000000000000FF558C000021031040801889803801845801801809000000200E10E0 060060060080000008088060010861040440104240A6806006800000000004000000000000000000 000000000000000000FFB70B000111D01D04C00A41849801000D45C258010000007046C260040068 060008000C412400608400C042204080004016006006000000000404000000000000000000000000 000000000000FF2567000007043408CABC07C818AB0CCA0CCC98A300002AE2C60062AE2AE2AE2A02 A830C3142AE20022424E08C2200CC2062AE2AE000000000000000000000000000000000000000000 000000FFE8EA00000180181080184380180080980184100000000A22260060060060061084000160 1000610412600000000620000E006006000000000004000000000000000000000000000000000000 FF5E930000B19118B28AB8418918AA88988088B0AB00002AA2162B62AE2AE2AE2A82A82362002AE0 002A63060CC22E08C20E2AE2AE000000000204000000000000000000000000000000000000FF7858 000155955B44B54C89D0B954140B55D13154000041608E55651632E55644012850654255640640E5 40550456150526556556000000000406000000000000000000000000000000000000FF66C9000001 005000800911843800000850801001000000610600600400600600000000604200628001600E4040 86404146006006000000000000000000000000000000000000000000000000FF69E60000AA8AA809 8AB8038680890868AB88B8A3800000600C2240460042AE2200042462A02AE0000042B008E32608E2 022AE2AE000000000000000000000000000000000000000000000000FF0AD7000001801905801840 000801000800841800800014600400402650E0060002041260080060844940084400960400020060 06000000000004000000000000000000000000000000000000FF6924000001801841801888085825 028801801811800020E4A408C48E0240061100B40140000062020240040060064061300060060000 00000406000000000000000000000000000000000000FF0E1A000001801801801800003843000800 80380880000460044A42060060060000AC14C420106B0400400C2000264200080060060000000C88 04000000000000000000000000000000000000FF5DA1000000800801801800049001801001821801 800008E80401613600600600000400209400E0001100800461100060A40060060000002002000000 00000000000000000000000000000000FFE82C0000AB8AB8AB8AB8AA0810898AB0AA8898A28000B0); SDR 8000 TDI (32E1122AEAAE2A6AAEA4E2C22AE00000A8022AA2222AA2AE2AEAAE00000000020000000000000000 0000000000000000000000FF4EF00004002004004002000000010214024200000000010000010000 00000480800000104000040000028000000040000100000000000000000000000000000000000000 0000000000000000FFE99C0003068428888AAAAACAA8800C0CAA88A8AA80002AE0922222622AA2AA 2B12A81022022AA1804221922AA2322AA2AA2AA2AA00000000000000000000000000000000000000 0000000000FF4015000131D01A05A01801801822030001A41801000000420001008000000000E006 03002000000029402000408000400000000000000000040000000000000000000000000000000000 0000FFD2C30000000300400000000000080040000000018000000028100008000000800000280088 000200000208006010006000000000000000000000000000000000000000000000000000000000FF DF1B000401401200A08A01A01803801A11A0A8011020220006204030106107437040400082006000 006120094086424006006406008000000100000020000000000000000000000000000000FF263200 0001001650E01C0BC01801953C03C2089502800000460542022564360065081024521362B0284008 42404E00404640E006000000000010000000000000000000000000000000000000FFAD0C00000100 100880080980180188B003A00849020001000600400220E2A600600000022E0060200D4004024006 13441614E006500000000000000000000000000000000000000000000000FF563000004500102090 9A03C01803801509802803008002802422C20202600E00602020011608E21020E09401412E24C22E 526216000100000088000000000000000000000000000000000000FFC178000401801C00C00A0180 1801841401C298A1082020400600603608680642F51010408704610A024028514080084006287006 290000000002000040000000000000000000000000000000FF4C72000001821810010801A1188980 500180180100A0A0C21640608C0060062861104C64265564000CF4A4144440104827006006000000 480000000000000000000000000000000000000000FF9D4C000405601008900C0180190100000180 18010200014406206417806026406080002206006108005028034090025107026006000000100000 000000000000000000000000000000000000FFE0E8000441241400C02A01C11801000501C0980102 01085026806227006A2606F63151A946C56480A5410410400811C0C6C27006800000000000000000 000000000000000000000000000000FFF12F000201801C00C0D801E01809803C01C0980100C1A820); SDR 8000 TDI (A002002A0A080812082002A220020C20020522820022AA00200A2020020000020000000000000000 00000000000000000000FFF50B0001000000840000040800001020C0024000000000002000000040 0000000001000000800800200C300008000008000000000000000000000000000000000000000000 00000000000000FF543E000018800802A00810C00820C28A08800C20800040601E00F00780600A00 280B49280200200008600250208200208A00300A0030020000000000000000000000000000000000 00000000FF9F2B000109801813851801811955951955955C150480147C362B644E02C50E4CEC4744 60C601613352600E4962040060A40864070061060000220000000000000000000000000000000000 00FFFDEC00048100108020000A0810016820A00A20410000204024004104F0400580490000881040 40002142292A8104000014004044804014100000000000000000000000000000000000000000FFEB F2000080800814848800808890800AC889084A820002300A45205200A21242200284200320A00890 200220200200200200200200210A080000000000000000000000000000000000000000FF38DA0000 000000000000000000440D0004044000010088020090030020180009010040010880002041180800 8000000080100420000000000020000000000000000000000000000000000000FF40590002080000 0000000000000000040440020000009000208000000A148010022040002044008206000088068000 0468000000400000000002000000000000000000000000000000000000FF04890004002004004502 00000004008080400000000012000030800100080080000004808080000000020800000020000000 0800000000000200000000000000000000000000000000000000FF93CF0000000000001020002000 40044444024080000080800002010800000000800000003000030000004040008800080080000000 0000000000000000000000000000000000000000000000FF6BAE8000AA8AA8AA8008AA8AA8888808 0888882A80002022AA0022222AB2AA2A3AAA2823022AA001AAA0820AA3220AB2AA2AA2AA00000000 0000000000000000000000000000000000000000FFC28C0004004044804004004000450014004040 00000000C000005400004805004804805015004400140A4000008000000500480400000000000000 0000000000000000000000000000000000FF53F9000555D55D55D53D55F55955913529D158D58001 544556344CCF5565575465564AC40DD5608055603655644E15655755755600000000040000000000 0000000000000000000000000000FF1E8F0000509108328AA8AA8AA88888A8AA8C88AA80002A2542); SDR 8000 TDI (1E1025660260634300420160942460000062040100A410600E026006280204000000000000000000 000000000000000000FF01CD0000018018098038010018018018C1843800800080414600E8864068 060441020420020060049060044860000040C000600F006006500004000000000000000000000000 000000000000FFE6BA000201801801809801003801801841809904800002600780E08680620E0040 8A00200388600400600400602022C800106006006006000004000000000000000000000000000000 000000FFBEC80000218018218098410018018810200010C1800050649600E086A063260060060000 06096020087046E0602602F006806006806006800000000000000000000000000000000000000000 FFD59F000221801821801801001825895E8404300180000060861060064060460460020A80060078 280CE00608600608622F406007006007000000000000000000000000000000000000000000FF72B6 000001A0180180180100184580130380500080001248060070068030060061160040060060090170 2710600610682E006006006006000000000000000000000000000000000000000000FF439B000005 801801801805005801C03001805000800184652604634E0022260060231542060CE0000162472062 2635610F10E02E006006000010000000000000000000000000000000000000FF102A000229C0B821 809841005A098350018D1866800140A41E10E8062029162CE00A35002EA1620004608A00600EC024 26506006006006000280000000000000000000000000000000000000FFC65B0000118058018038A1 009A0180908182900088000060060860060628CE0262028000869060000864021A60068028060060 06806006000000000000000000000000000000000000000000FF63D900042580982180594500D801 A4D3018D5803880004550E04694740240E0244420C8496046400106002A004224CA08B01600E0060 06000000000000000000000000000000000000000000FFD9D2000001801801809801001809801001 801021000001204610E41600010650C00A40004620E00000E0D20200120020420860460060060005 08000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF94F2000000000001001001400000200000001400000000 00000008008000000000040040040008000008040010000048000008000010000000000000000000 00000000000000000000000000FFEBC1000000800800800800800820828A0AB00821800008080200); SDR 8000 TDI (45655708604481055285600C40080E80010840414490600600600000000400000000000000000000 0000000000000000FFBA99000019001801A05801801801801401021801800000661D04600EE06006 08680608000284600410880680000000608400600600600000100400000000000000000000000000 0000000000FFE4BF000020801811801801C01C01A02023821A03880002602400E25412740E346135 30404A30644C02408E10000C91600100600602600000000400000000000000000000000000000000 0000FF7B5D000001801801801801801901800001801801800008600440610600E146016004024002 016106414206410104006080006006006000000004000000000000000000000000000000000000FF 53660000018018018018018018018018010018018000006004006004006006006006000002006004 000006006000002000006004006000000004000000000000000000000000000000000000FFA63100 0001C01801801801801A01A018010018018000806004006006807006006806800802806804000806 006800002800006004006000000004000000000000000000000000000000000000FF58F900000180 1801801809A05815800A01803D418000206016036004116006806006202002406006002106226102 802100006104206000000006000000000000000000000000000000000000FF182700010022583180 3801A51A01940A41911805810002780610600604632E80680610A80290684C00280E006802006000 096004006000000006000000000000000000000000000000000000FF28B100001980182980180900 1801800901881021800003400640644600702E00400600E002006000106080006003000082006006 006406000000000000000000000000000000000000000000FF461C000001C2180180180500DC1180 5800001243800080C0073267078A6086014002006152516024146040006042000802006006006006 000016000000000000000000000000000000000000FFFA74000501805801805801045815920CC181 59018100205016116026816406004002287803B0781408601444610080400008E106206206000004 000000000000000000000000000000000000FF184A000115901811801801001C05840D2382191180 000470A721604650629720409251600200640C006314D0600000C000086007006026001004000000 000000000000000000000000000000FFEA640000018A1801801801013803821801801E0080002260 06506026003816A1600A08010A5063004064A8806444800004006006846026000C0C000000000000 000000000000000000000000FF5236000315A21807803805009811C1D80400315080602060060064); SDR 8000 TDI (282E20B00202302300721040A047042C23002C060830229020000010000000000000000000000000 00000000000000FF0B2400438023830020023414208220922720031A0000C886010C14312810C882 08088008000008090808408001088012201800001081000009100000000000000000000000000000 00000000FFA328000048800800840980C04900C02A00000C01800000300100A00200283325224209 A00200200100308A402892012C020020020020000000000000000000000000000000000000000000 00FFC1F1000000180043801801C804000340000E9804000002096800008054800008000442004708 0610000220040A002C0145200881201080000008000000000000000000000000000000000000FFE1 060000200400180020002004403001400042800000310000300200010A00C00481200200408000C1 0C10008C401208990201690A0000000000000000000000000000000000000000000000FF77EC0000 02001801825801821801881A09801801800000680080600400000600603684200602600002200600 6002004006806006006000000000000000000000000000000000000000000000FF7B95000291D01A 03A23AC1805B05803831A318018001036028406C26D06406006C2442AC07026A100C2096816292D4 452E0468A6C46080000800000000000000000000000000000000000000FF327F0000438498098018 018A1801929A03901A958000306C0688E10680E12E32788C08600210E00280642600400600600648 6014096000000010000000000000000000000000000000000000FF24FF0000018018018018018018 01A01801801801800000600400600600280600600600600280600200600600400600680680600400 6000000002000000000000000000000000000000000000FFE36F0002418018118058018018018058 45001805800094600408604E10711645610CE0680301600004611690600EB0300300600680600000 0000000000000000000000000000000000000000FFCC8D000000801801801801E01801A01C010018 01900108620402E00700600600744702701204600820601600610701000210600700600000002800 0000000000000000000000000000000000FF79C600040100180180180180184190CA23001F018080 007093806446A4E3569060840163220165410260072060060020A600600400600000080000000000 0000000000000000000000000000FF23F6000001801801801801801C818008010018018800106022 26E29602F22600653C46602A2A67E82C620660E08F01A00600600402600000005000000000000000 0000000000000000000000FFD741000001801801A01801A01841B15045001901910000631410E424); SDR 8000 TDI (130420031470274CB081083016113012043003123007003400480800000000000000000000000000 000000000000FFDD4200000180180181180180380184382180B811820004600650420600604600E0 A600420E00640820648620604641610C006006026000000000000000000000000000000000000000 000000FF2D5300020020020020020020040130202D20020900008448040050008880008009288248 04004802801004800900900084800004000000000802000000000000000000000000000000000000 FF996E000000800800800800800800850800800824800051200280200204200200200208200A8022 000020C202204202200A002002002000000400000000000000000000000000000000000000FF89AC 0000AA0AA0AA0AA0AA0AA0AA0406940AA08000000002A82A82A8200AA82A82402582A02A80002A82 082C8208208A302A8AA9AA82A8000000000000000000000000000000000000000000FF7EC3000000 00000000000000040008242A00800000000800000000004A00000000000200010004000000000901 00000080001000000000000000000000000000000000000000000000000000FF122B0000AA0AA0AA 0AA0AA0AA0AA2880200AA0AA00000302A92A82A82412A82A80083002A12A80002A82202102203012 802A8AA82A82A8000200000000000000000000000000000000000000FF1274000354354354354354 3541542081003445340000A20D51550D50810D50C80D51511550550800D51550C00C50D41428D505 50D50550000800000000000000000000000000000000000000FFB811000C00400400400400400400 00230040040000015010000010010900010012810010100014010019111011090288410008000000 00001000000000000000000000000000000000000000FF0CE90008AA0AA0AA0AA0AA0AA2AA040000 00000000002B02A8AA82A80002A82502A8A00AA8AA80002A82A02482802B02202A82A82A82A80000 00000000000000000000000000000000000000FF3C84000200A00A00A00A00A00800A00920A48A44 80010030020028028828028328020020020028008020028A28428021028020028020000008000000 00000000000000000000000000000000FFE6520004004012002002002010012D5215304309000001 40040040004500050848008B4800004A0200480C80001480800C0040000048000008020000000000 00000000000000000000000000FF1EC3000141921901801911905B4181504182190B8000906C0690 680EC5600602642E40C006C0600080441620611412E1348068860061000001100000000000000000 00000000000000000000FFDC8A002400C10C50C44C02840801880882C04800800140A0C604720308); SDR 8000 TDI (5545544804105560044845564544844C450055255655200000000400000000000000000000000000 0000000000FF13140000240AB8AB8AB8AA0AB8AB88B0B10AB8AB80002AE0062AE1243062AE2AE286 2942A82AE0002062AE21634E1462A62AE22E2AC00000000000000000000000000000000000000000 0000FF313A000020000800801800001801A010010018018000006006006004256002006006034020 00600002600608604E00E006002006006000000000000000000000000000000000000000000000FF EB090000000AB8AB8AB8AA0AB8AB8890850AB8AB80002AE7D62AE4960142AE2AE05A26C2A82AE002 2D62AE24E2A64262BE2AE2062A8000000002000000000000000000000000000000000000FF7F9F00 0080001800801800001801801A11001801800000602600604E016006006422004000006800006006 02600600E006002006002000000800000000000000000000000000000000000000FF5DB300003400 1801801800001001823045801801800000600E0064042A200400208410000000600002A006106012 282006006156004000000000000000000000000000000000000000000000FFC9F000000000080188 182000101380980180B8018C000062060060040064060A200000002000640000208632600230220E 026086004000020000000000000000000000000000000000000000FFB64700000000190181382001 100184901190184980400960162560063B610E69A00440060844E0200B200609600206204241E006 014198000000000000000000000000000000000000000000FFEB1B00000080080080380200000180 180182180981000860262061064400480020000CC1081160200A200600600A002002102006000000 001000000000000000000000000000000000000000FF8EA30000000001000900040100080400100A 20000AC00102000500000002800200003100A02A02000100802300000800202A0000008000000000 000000000000000000000000000000000000FFCBD602000100100180180180104000902000381008 000800002043200000000340A00AC4AE04021000400000800402C030104000040000000000000000 000000000000000000000000000000FF68B400000080080080882080280E82080001884182000220 5200A10209206200200204200000200002220A00203A602492022102002200240000000000000000 000000000000000000000000FFD13400040040000000000040041440241900040000810010010A11 417010090000010111012890812C1080281000001041001001001000080000000000000000000000 000000000000000000FFDA27040400C00800800840C00C20C10C00800C0091011030030570030030); SDR 8000 TDI (700520300000608082480600610301404550600684E8000000040000000000000000000000000000 00000000FF9B2B0000AB841457A44C018400AB8AB8ABAAB8AA80002A82AA3A42AE00E0C621642447 B2A82AE0003842AE2AE2022642044162AE0960000000040000000000000000000000000000000000 00FF8E1D00014180180002280180000182100200180100000060060001061460A601400400600000 600000400608400400E08000400600E000000004000000000000000000000000000000000000FFD5 A50000AB8898800808A188A0AB8AB0AA0AB8AB80002AE2AE2502AE05620E2C410C0862A82AE21025 42AE2AE32420E2200242AE206000000204000000000000000000000000000000000000FF04290010 0B955554508D4193415590B931D55155000055455455045601621654452C552D5055620455455644 C55054644A554556426000000004000000000000000000000000000000000000FFDC2B0000018050 0001080B800001801801801001800000000400000650608600404400600000610000400600601008 608A1040060C6000000000000000000000000000000000000000000000FF93E10000000AA8AA8018 158A90AB80B0A18AB8AB80002AE2AE2A02846000002A02042AC2A82AE1C02A02AE2262A02A020A2A A2AE180000000100000000000000000000000000000000000000FF473200010400080092B9020010 0194101180180180000060060000040C628600001400400000600400000601601000800200200604 A000000004000000000000000000000000000000000000FF964B0000280018008018480030018010 05001801800000600600803400E02E00C0A60040000064200140060860040040C000200620200000 0084000000000000000000000000000000000000FF0FEC00003000180080180000100180BA01001A 01800000600E00000400200400400609414800700012400600610C42410000200600200000080400 0000000000000000000000000000000000FF6E7A0001000008018018000010018210018018018000 00614600000653600600000400000000600001000601400009002C00600600400000000400000000 0000000000000000000000000000FF88F80000020AA8AB8AB8AA0AB0ABE810AB8AB8AB80002AE206 2A82AE0042AE2A82AC2203002AF0002102AE2A42200002542AE2AE2A800000100400000000000000 0000000000000000000000FFF924000110000800800000000001A41401001C018000006006004006 04600200400400000000680010400610400400C00000210600600000080000000000000000000000 0000000000000000FFB9D100011215495495595415415592BD5515595580005564D6554556086556); SDR 8000 TDI (1A0132AA2AA40008A2AA10226220230A4122AA2AA000000000000000000000000000000000000000 000000FFA34F00040193392182BA01C0180003000024984000004104100140004080000800400400 06000040240000090100004001506000000000000000000000000000000000000000000000000000 FFBDD680000020060808000000200000203400210C00000A00000000001000000480804880000002 800000004200101480C0048000000000000080000000000000000000000000000000000000FF8050 000201C03402200A05C40021801809A0100980800800000260A642000E00E506034C100460000260 0E00628408600B0AC216006000040000000000000000000000000000000000000000FFB152000001 801809C10E01800011801825F25801002000240A30641608E0064060162050C00964004164C64460 36004022406006086100000000000000000000000000000000000000000000FF9274000001811249 800801820005805821821001002008000608600600654E04400600202000605020C0861060260841 86006006086000000000000000000000000000000000000000000000FF504F00000180B813A08801 800001801803881809808040220E42622628622600420601B21003600041430611600C4064060060 0E006180000000000000000000000000000000000000000000FF2837000001801820000C03A01A33 8030084034000000006002C0608E03610622E11444710891645002604E2A62860050565544070060 00040000000000000000000000000000000000000000FF0172808011A01A01800801801803823004 0210108C009424A2006246482106CA6C140040A03460500252464260B408600681600600E2000000 00000000000000000000000000000000000000FFB83D810001841010600801841C01805000521010 000008408440200608788730400E2020900A602800421632600610400E0040060064000000000000 00000000000000000000000000000000FF87F4800401C21C01A00C01A21CA1841000281002840040 2C0680A8C600680E00542722300100600084504E01634740400F0170070170000000000000000000 00000000000000000000000000FFA3EE000211C01600000C01C00143801004001C04080104482180 848620601602704604D04120E00420F08600440A0052010048070060800000040000000000000000 00000000000000000000FFF5F4000001811088200049882001801000001800800000400000800600 605612E50E08600100621201600600402810608804C0062060000002020000000000000000000000 00000000000000FFE0E5000001D2302192AD03A30401801801C0100000000000020048064C6C0600); SDR 8000 TDI (08700600600008200A00200600200A00A00200200080000000000000000000000000000000000000 0000FF63520000018059019059518110559359559154559340216026A0C00414F4C72868B650E146 0D62B043715701620690E005006006006000000000000000000000000000000000000000000000FF 39070000010002800000A808B0014A00AA0291A800A00050A498400508888825D6AD84500DC04001 8282200E9ACC000114024000008000800200000000000000000000000000000000000000FF344300 00008048808008D0810C4494A84C804C048D0000204241280201208240200A32208200200820B003 022202002003002002802000000000000000000000000000000000000000000000FF412F00000000 000008200000020000000000003000200000000008001402001403200080203082C2000110008020 008000000000800000000002000000000000000000000000000000000000FFD7A700000000000000 000000000820408008C08010002088000804408000208488000008001200000200200000000804C8 000000000000000000000000000000000000000000000000000000FFEF8D08040000000800040000 240000003440000400001081301008002090000000004A10000004800000000000408000C0000000 000000000000000000000000000000000000000000000000FFD8C500000040032000000040000000 00000000000000400000008000140000000000008000800010000000000100000010800000800000 000000000000000000000000000000000000000000FF89CF8000AACAA802EAA8AACA88AA8AA880CA A8A88000062303A222AA0032AA2AA2AA1422AA2AA4002ABAAA2AA20A2AA3032ABAAA2AA000000200 000000000000000000000000000000000000FFF42300040020440021040024020120105124420100 00801140804004040005100000C01000804101081004010C11220014900804004000000000000000 000000000000000000000000000000FFD63C100555955F01955D55935D559559511559110000896C 4650D556506556D56556C07557556100556D5655640F556444D56557556000000200000000000000 000000000000000000000000FFF0AB0000AAC00880A808AAC8AAAAA8888090088C80000AA00AAAE2 AA28A2AA22A3221222AAAAE0204322AE2228820922220222AE2AA000000080000000000000000000 000000000000000000FF667E00040000002A00040000000000000240042400002000100400000280 000000000090000000108000000000A1000010000800000000000000000000000000000000000000 000000000000FF287F0000AA950856A448AA8A88AA8C508509084100004024A22A22AA0222AA2022); SDR 8000 TDI (60060060060060060040060040000068040068000000060000000000000000000000000000000000 00FFDEC2000041801801801881824825B81825003403800000604606600600540666660611604601 E000BA4F06406806006006807004007000000400000000000000000000000000000000000000FFDE 2F000001821803EA1903E00801801E41F250018000007806217A06005006086006226016127A2944 F02608708640E147016128006000000008000000000000000000000000000000000000FFD54E0000 01843805841801A11C01C01815841001880040604720640680482408708642684E0C620800C0C410 6006016026016104004000000408000000000000000000000000000000000000FF06A20000018099 01811821801915801803C0510180010074064464960344270071460461061070000464042070C600 6206006005006080000008000000000000000000000000000000000000FFB4E90002418018019038 0D827A2582118999912900C000610E89680200248602600611702682E26880C886C2310640210620 6056002000000080000000000000000000000000000000000000FFBC190000A18118018858419818 0180B001001001800000E006806802A8480608620608E14E80600008690444200E00208602600680 6000000000000000000000000000000000000000000000FFC8C90004C1801901889801A43B01A148 13C850018001006A165024042560068C750610E00E0C744095620680212E00250202680600400000 0008000000000000000000000000000000000000FFD8430000018018018018118018538208818089 29808001600602408808034400602604600601601000600400200600200220600200010000010000 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF02CA0000000010010010000000004002014010010000000000 00080000100000000000100080000000400000400000400000000000000080000000000000000000 0000000000000000000000FF967A000000800800800800A21A008028008238008000002803002202 00220202200288201200280008200A00200300222A00200200200000040000000000000000000000 0000000000000000FFB9650000000001000001503122002802282101120920000B00080021088900 0014A880000088080004824014829000000002800001000080000000000000000000000000000000 0000000000FF81F9000000800A008008008208188409048008428000602246807003002212412002); SDR 8000 TDI (862150001140165270800A80C4006002006006000006000000000000000000000000000000000000 FF31E80001018018018018018A000180301580A00180400020021440C400E4464140860A44361240 4002400600600800000E402006006006000000000000000000000000000000000000000000FF2C5B 00000180180180180180180180100180000180000020060000060020020040060000060040000000 06006004004002000000006006000004000000000000000000000000000000000000FF69C7000001 801801801801A01801801001C0000180000010020028048020060040060000060048000000060060 04004002002004004006000000000000000000000000000000000000000000FFCB17000201801801 A01841820A41A850038000258000002006824006006083104486103206014444002106056A900000 07004022006006000004000000000000000000000000000000000000FF6668000241801841841C01 800A938011418080818000052002C0480610382644D0360028060048000A240600600008000E4400 0E004206400000000000000000000000000000000000000000FF5305000001A01801801801010801 C818208410B1800000700600200200460400E02E0160060060000940060000060C040200600A0040 00200100000000000000000000000000000000000000FFC2E5004061801841825A11420809903801 A4500980000060070220038041C6826847006456046224004416000CCE0600039260260161000000 84000000000000000000000000000000000000FFFF7C000001A01841801841809943C00905C51005 800004E00640200608704630728610E20601600004C3060342078052104060060062000000000000 00000000000000000000000000000000FFEE67000001809801901825A41801823801801005800020 E02680A40B00720624631604600600600034410614401600480820E0060062082002040000000000 00000000000000000000000000FF0148000001801801803843828001801045C0D201800000600E00 A002406507C0708E42600600650049408608044603000420E00400C2902002000000000000000000 00000000000000000000FF963C004041871841D61811C08001A49022849205800001664E7A258238 401C0CE406A0E01624629804C0760481960081948060840040000000040000000000000000000000 00000000000000FF32EC000001801801801801801201C8A001801001800040600682201600602609 682601622640600000620600C0060040001070800060000000000000000000000000000000000000 00000000FFD0A7000001805801801801851041801089809285882040608600200200604780610780); SDR 8000 TDI (252000202A020020CA002002012006103002100000000000000000000000000000000000000000FF F4900000000418418418A420C4400280318880160000181021080B48200101661008848001004008 0C0400480004085380020088004000000002000000000000000000000000000000000000FFF18800 00E000008001A4501100021000000004000000C00000000000048080001081020800000001028008 000020120048008000240A00000000000000000000000000000000000000000000FF99D200000180 1801801801A41801883883800041800000200E04608600225008600640200602E400412886006002 012400000400004006000000000000000000000000000000000000000000FFF318000449A11A81A1 1A41841C01A43A8B8902A58000156C44946C06802B06886906852426D36808CD23070A6C42852888 B22800814006000800000000000000000000000000000000000000FF4762000083801801803A8990 90AB911841A000118000407008A0609641602E42420E20608680620000600E00E08A30242201408B A0620E000000000000000000000000000000000000000000FF12A200020180180180180180100180 10018000018000002000006006002806004806006006004000006006006002002002000002006006 000000000000000000000000000000000000000000FFB8FC000511805805801801901809C0180580 410180000004C254600600284609740624600642E02820708624E00700684428600800D006000000 000000000000000000000000000000000000FF4481000001801801801C01801E01801101808001E1 0000000250600680220640605782FACE0044800062060064260060040160010040860002C0000000 000000000000000000000000000000FF18D2000001801801801A01A00801A01801E20051822044C0 138064D608614E04E506086007C0680013700E826007007116006002005006000000000000000000 000000000000000000000000FF230D000001801801801801800803A010818000018A2000200A10E0 AFB8A20E02702E2872AE03C5704AE10E6870860AE08E216002004006000040000000000000000000 000000000000000000FF82B5000001801801A018018012098019018500498541C53096406D560043 525565563504B624600415041704E44480491028200E00E106000284000000000000000000000000 000000000000FF42B3000001805801A01801A21005C03909C0810180001A60068160041040862860 8600800688600060000600600C804802002006804006000000000000000000000000000000000000 000000FFA8FC000011801805801A01800401801001800001940002244E20700EC0409214523620D0); SDR 8000 TDI (0800001004954004024084004A08A00004000800000000000000000000000000000000000000FFA3 3100000080080080080082A800A048148028008000002002D2235251200200280280280200200800 200200200290A8420020C0152002002000000000000000000000000000000000000000FFC9A60000 AA0AA0AA0AA0AA0D00AA1880000640AA00012A82A90100100202A8AA82A92A82A82A8000AA82A825 0AA9211208AA8100010000000000000000000000000000000000000000000000FF713C0000000000 0000000004000021004403250A000000000000008080829000000100000000000001008001100000 1080000080420000000000000000000000000000000000000000000000FFCA2C0000AA0AA0AA0AA0 AA0800AA2040C40900AA00002A82A82000202502A92A82A82A82A82A80012A82A82812A82802A12A 8200220000000000000000000000000000000000000000000000FF1C6500035435435435434C3123 541203083000400000D50D50AD0C50520840D50D50550D50D5084088145154055155044955045088 1000800800000000000000000000000000000000000000FF24E60004004004004004004044000284 1040040000000010000A130110100000100000100100101000100100000082001080105110080000 1000000000000000000000000000000000000000FF84D30000AA0AA0AA0AA08008A0AA2840000200 0800002A8AA80002008000002A82A8AA82A82A80006E08002A0AA82A0A802A822009000000000000 0000000000000000000000000000000000FFDBF8000200A00A00A00A50A00A00802A14C023428000 802002C828120B2C430028020028028028008024C280200200204200200284200280080000000000 0000000000000000000000000000FF97F70004012002002002030410012283203082010000004000 048120A0088C800004004004000820814814814000810010000914A0800400080000000000000000 0000000000000000000000FFAE3A000021841841841843A411019018499100358000416C06D06856 01612640684612400690600003428600600611684601629408600610000000000000000000000000 0000000000000000FF2FDA000480C08C88C1081090AE40C10C048000008001883023043283343013 14A086C0AA2F02B40050200320383300330380300304A01200100000000000000000000000000000 0000000000FF0E090002002103102002080211A82102042002000000828400620410910800010200 111220180A00900900829210A0802128091081801800080000000000000000000000000000000000 0000FFDDAF00010A808800800800A808008008489100A8800021024210200240202C1021422034D2); SDR 8000 TDI (0000C00600600E00E0C60A6130002006006000000000000000000000000000000000000000FF5A43 0000AA8AB8AB8AB8AA2818AB8E50AB8010AB80001060064D640600215E2062AC2062AC0860402442 AE2AE2A62AE0260562900A02AE004000000000000000000000000000000000000000FFC5A7000000 80180180180000D801803001C0100180000361462360043022860060040060040068200840060060 06006016046008002006006800000000000000000000000000000000000000FF1934000001800001 801800040001809801801801800050640E0064B402E02015600413600424E00003400600600E0065 0629604020E006004000000000000000000000000000000000000000FF1EEF000001811821845800 04001180180181380182200A600602E2040160AE046024006404116A4020400600600608600E0060 00202006406C00000000000000000000000000000000000000FFC02F00000184B821823810000003 840877863805922000E00662601478260652212400607C04700000440E04610E00610A1160400040 06007000000000000000000000000000000000000000FF7A73000000803801801820000005808801 801889800001400600612400600000A00E51610600510804E00E0060160060020060000000060070 00000000000000000000000000000000000000FF9335000000000000000050020010010010010090 00000C00000082D00000B04101100903000502502400000001000800800880000000002000000000 00000000000000000000000000000000FF82A100000100180180188110908B000001800000004002 04903403000100402000141000C44404484040401501100080080100000000000000000000000000 00000000000000000000000000FF3E6F000088840800882820802820841000801004900000200000 20022122821020A260200A10210001240A0420020020020020C84020020024000000000000000000 00000000000000000000FF6AC400050000000800040040040040A000400420000100100100102100 50010091010092010880010012010012211B10810110000010000000000000000000000000000000 00000000000000FF6E7C000410800800800C00D00C12C00800C00C00804100341710340301720300 B00300F40355282100300708F0470471030031100030020028000000000000000000000000000000 00000000FFE0BB00000180180988394181394180B80180182180000461064261264040A620404E48 60AE00620820623602629600600C0060000060060060000000000000000000000000000000000000 00FF6804000200200200200200200200041320509201000080080401080080480000400000400080); SDR 8000 TDI (080006004006006024006006056000080004000000000000000000000000000000000000FF6FFF00 00432248AA8AB88A8A88AB8118AB8AA0AB00002AE2AC2AE2AE2262A62062A82AE2A82AC0082A82AE 2AC2AE2AE28C2AE0060562A82A8000000000000000000000000000000000000000FFA32A0001552C 8D54D54955950955930D5590395500001064D455600642620650E3105561502C4044450556550556 55650C556006286550010004000000000000000000000000000000000000FFFFEA00000111080080 08008008018C0800801801000000600400600400C014106000006000004000000006000006006006 006006506000000000000000000000000000000000000000000000FF57E20000AA8818AB8AB88808 80AB8818AB8D18AB800001422622600608200C2022242AE0040060000042AE2AE2AE2AE2022AE000 0802AE444000000000000000000000000000000000000000FF51FC00000080580180180000200183 1801801801800040600610602400240602200400624400C0440C4006006006006042006000442006 214004000000000000000000000000000000000000FF5E4E00000084980180182402000180200184 B00180000B611601651622A12610810C00610C3260002140060060060061100060000140060C4000 000000000000000000000000000000000000FFA9B4000000801801801800014001A01001C0100180 0004E40600600410211400000412600400480010400600610E1460D02960B0006006004804000000 000000000000000000000000000000FF2EEC000001801801801801A4000180180180180180003060 2C0CC00445240600400401600400600004C00600604600E004046400004006004000000000000000 000000000000000000000000FFCD130000AA8AB8AB8AB8AB8800AB8AB8ABC018AB80000460C42042 AC1008662AC2AC2062AC2AD0083042AE2AE2062062040068002A82AE005004000000000000000000 000000000000000000FFAC3D000001801801801801808001890001A01001800002431410410402B4 0604000401600411680010400600600600E020107100104006006800000000000000000000000000 000000000000FF0945000154955955955955B54155955155801155800030E20C44C5540023065505 544D655455400C444556556546546410416200554556006004000000000000000000000000000000 000000FF6D8B0000AB8AB8AB8AB8AA2C38ABC010AB8010AB800020E02600602E48600628E2AC2A62 AC22600020C2AE2AE2AE2A650E20622024A2AE004000000000000000000000000000000000000000 FFCBBD0000018018018018000018018010018010018000004106086007A2E0160060040060040060); SDR 8000 TDI (0000000000000030000108000000000000000000000000000000000000000000000000FFEDA20004 01400C80A00A01C21C09003D03901800080011600600E10E424504106810086C4001644122002E42 240609600000E046200000008000000000000000000000000000000000000000FF16150000018008 41C018A1801841801851811911814004602608604600600644E32020601040600800050600202620 6008206016006010000000000000000000000000000000000000000000FF32FA0000019108018008 2080082184120100F885800000E0260C600600621602E28005612810600000000600202620600004 6006006000040100000000000000000000000000000000000000FFF0A1000001A18281D418008218 4580306588580880A010600446602E22600600601010604028400810009620220601E00824602E00 2108000000000000000000000000000000000000000000FF674E000001080C20801A808008118211 1580000308000A600600E10600610E4860284B6D0001642024044E04680610600003600740700003 0100000000000000000000000000000000000000FFDCAE0000092008808018008218018090098882 01840000602408E0A60044AE026C0004E410C4400800000720600610620000600600600000000000 0000000000000000000000000000000000FF992A000601800911F40800840E4181465190A4010200 006026106004006404027208086209106000001806006107C0600200600500600000000000000000 0000000000000000000000000000FF0C5C000401C10C09A01820801A858022012002018000906804 4561040060576068008471C14C4010800006986886A1641A9CE00600600000000000000000000000 0000000000000000000000FFF0A9000009600C00800C218019018018038000010000006006006046 00608600600000F80080600408001720500608600401600600708000000400000000000000000000 0000000000000000FF851E0000AD848801A00825821A0180BA01C002010000806806006006506144 08E80080600000600900000680400680600400600601600000000000000000000000000000000000 0000000000FF0E5D000401004C00800801802801880800801801800000600400600604C417026000 00600000400000000600080600615500600644600000000400000000000000000000000000000000 0000FF05D1000111880CABAAA8C888C8AB824AAB8AB8AB80002AE2AC2AE2AE1060062562A82AE2A8 2AC0002A82AE2A82AE2AE2462AE0060862A82A8000000000000000000000000000000000000000FF 6C23000001004800801801802801803801800001000024600400632E08E0AE02604000620000C000); SDR 8000 TDI (A418818D800001004004004000000000000000000000000000000000000000000000FF766F004040 812832942AA482A8C0832852B40900894002202A482002432C0200A00204210230A0C80024020132 A2002403002002002040000000000000000000000000000000000000000000FF53AB000000000000 0002000802000003002082200000300480820028100821C00540800C008000020800C81008080400 80000000000000000002000000000000000000000000000000000000FF1AB9000000000000240100 00004808000000220A00004000008093C04004C84A08482808288108014008000404000000000000 80800000000000000000000000000000000000000000000000FF3E97000200000448124224440000 00A0B20420D400008000000000000000008008000010008000010000000100000000000000001000 00000000000000000000000000000000000000000000FFF36C000000200000000108012200040400 00800000000000008000000000000000008000000000080010009210008008108010002300000000 02000000000000000000000000000000000000FF909B0000AA8AA982E08C00C808AA880C00880810 80002AA2AB2AA2AA2AA2AB2AA2AB2AB2AB2AA0012AB2AB2432AB2AB2A22AB2AA0020000000000000 00000000000000000000000000000000FF87C3000400510400200200200400011200045304000000 40000040000000000050050048041000008048050008050040050040100A08000000000000000000 00000000000000000000000000FFB347000555F55C499058A5881F5591505594B2C5800155655655 6556556556557556556556556000556D5640655655654D55655600E0000000000000000000000000 00000000000000000000FF273E0000428248AAAAA8AA8AA88A8A2D2A88082880002AA2322AE2C251 24CA2AA2AE2AE2AE22A0402AE2AA2B2AAF2AE08A2AA32200A8000000000000000000000000000000 00000000000000FF4E9900020000040202821042A000020100001000000000000000000000000000 08010010000000090000009080000000010000002A00000000000000000000000000000000000000 00000000FFF885000318A80AAACAAAAA8AA84088980089000080002AA1022AA0120420022AA2A82A AAA80020002A82AA2A22AA2AA4422AA0024020000000000000000000000000000000000000000000 00FFFC48000001805801801801801D01800001800082000000004000043040025000100600000610 400000600000C000000284000244530000000000000000000000000000000000000000000000FF70 FF0000A44484000000002000320446B202A03000000004900001000C808000000000000044802080); SDR 8000 TDI (006403124142086027006000000000000000000000000000000000000000000000FFB32600005180 18010118018088050238019519018081804046304813096006826006422106006080006206004000 042903086026026000000000000000000000000000000000000000000000FF04E000000580180140 1803843901003811801811800054431684E08F04708630610620024600700010714E1140A1208013 40E326006008000000000000000000000000000000000000000000FF3540000001801801081A1580 0B3B909AC382900582A100003600462428710500E52A1360968AA40831B0068628101B6024016006 016000000000000000000000000000000000000000000000FFEE020000298018010018A580180182 58218072078000008006A8500440E00E00620299C00EA02E0000200600220890401408610E18E000 000000000000000000000000000000000000000000FF6C0000000D801801301B21800C09841C25A2 101180A04A814C25445100600030628200248E2820022820B6848D48212807516446006008000002 000000000000000000000000000000000000FFD4FE00004180180100180184592380989100900182 0000020410408614E11000E02A44004604A010012006080000040044006016016000000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF913900000000100100000000100000120100000000000040008010 00800000000004800000004000804000800004000800001000000000000000000000000000000000 000000000000000000FF1591000000800800800888800A21200800A008008000282000002040242A 2B20202200280200A00002200A02320208A002002002002000000000000000000000000000000000 000000000000FFF4E001000000000004000100000020000423000000010440100484080000000002 00040800080080200540100089000800000000000000000000000000000000000000000000000000 000000FFB5DA000000800800800808800818804C61924801800108200600210302200A0463025820 1E00208002200F01200308A002003002002000000000000000000000000000000000000000000000 FF5407004021815855945945155B49955955129153912112452EC4E40F4D6B14B56536CA642E1161 40107536016A34046486006107006040000000000000000000000000000000000000000000FFAD6A 00800100000040100100020100220308F0010000C2400C129B4C804044025080A201044810100002); SDR 8000 TDI (6006006006006006006000000004000000000000000000000000000000000000FF842F0000018018 01800C01001801801800800201800000280600200600200400600400300680400080600600600600 6006006006006000000004000000000000000000000000000000000000FF891B000001811A01A000 00825A01800003A208418000006006802A2600604810604C80200610444400E006AA60C614600600 400E004000000004000000000000000000000000000000000000FFE3AC000001841A41A082010819 0B844141804A058001106516452817226000006084002236A3408A80708600600620700790112400 4000000002000000000000000000000000000000000000FFFA0D0000018218010498008808008018 019B3811810001704600A20610600000600018700600888000000600601600710400700600600000 0000000000000000000000000000000000000000FF0A07000001801911001800802A8E801883E458 09800080700F102466B2641A44640091600E22026C1489068060A40A708410600645600000000400 0000000000000000000000000000000000FF6E36000001811841441801840A000450418088458081 1125262420139060421071348064461048000040875438162060071060B600600000000400000000 0000000000000000000000000000FF9102000011849801001A31833828055C018018918000B13086 A1210622612200700444640610428821404E84200480F22500610E00600000000400000000000000 0000000000000000000000FF7C1C000081821801001A00000AC382BA41801801800008600640FA44 047AC5A0600090380E080208021886016004812020106007C2601000000400000000000000000000 0000000000000000FF87E2000091801811201840050891801827A44967800000600F16601C41E016 09E41844242E02804050005604C00420240000610600600800000400000000000000000000000000 0000000000FFE1E2000001809881001811004801001801C00C11800020A10F0060829060020A6005 00802603410000C00600200440000280601601600000000000000000000000000000000000000000 0000FF45310000118018012158010099010C1241A208038000002006087806297C03886024C00016 00C10488400602012C01000020F80600E000000004000000000000000000000000000000000000FF 03D2000041801801003814800861001819A01821800100400680406226627C0C643E1468661AE401 016C066062A280603A206006846000000000000000000000000000000000000000000000FF1B3000 0001801801201800800813005A019118A1810000403640441600610600608680D107846000007006); SDR 8000 TDI (11210000800000000000000400000000000000000000000000000000000000FF06E0000001845803 81381182380D00588190388980001480468820060060B280602440600600600000E8063000060061 862CA004004000000000000000000000000000000000000000000000FFB99A000409A01A03A11B0D C95A0DA09B53804C898000800906448D160A6A2A0C60B490640681680084E046920246C072A648AC 84816000000800000000000000000000000000000000000000FF5B30000325903801903821841881 881A01930841800013040710202640608221740620E09642603008610E2161060B600E02200E2A60 00000000000000000000000000000000000000000000FFC9CF000001801801801801801A01801801 00180180000000060020060078038060060060060040008060068060068060068020060060000000 00000000000000000000000000000000000000FFCD6B000001801801801901841A21801810945801 8000504404003184D0000600600680AC7680620944600680000680689E0260860060000000000000 00000000000000000000000000000000FFDA3D000001A01801801801805801801800A00A01E04180 400440240548824640654F00329600400008620E02024E006006A020060060200000280000000000 00000000000000000000000000FFE710000401801801801805801A01881C0C910A0184000AC01400 F83600408E15600608080610E1204461068060860960260040040040002400000000000000000000 00000000000000000000FFB0AC000001A01801801805801801801C01A00AA1820002408C2A632E02 50A62262EF2A0006AAC40008E08628600E00E9060000040060000400000000000000000000000000 00000000000000FFD545000001801801801800805821900015B100018440152816412456C93554AD 651411253611614ECC6516040D5691684EA2688600404020002E0000000000000000000000000000 00000000FF0759000001801801819808801A69802021C4805F840000210600210680A24C88E40400 208600600880602E0028068060060068040040000000000000000000000000000000000000000000 00FFA912000001801801801800801809803C4988050180004C720E842A361561000CE91688342604 C0122260AEC8001600E816800006006000000006000000000000000000000000000000000000FF4F D800000180180180188904180180180180D801800000600628200620640840602644209650400009 6006002006006006002006006000000004000000000000000000000000000000000000FF3F920000 01801801800800801801801801800801800000200600200600200400600400200600400000600600); SDR 8000 TDI (2103202A8AA8AA8000000202000000000000000000000000000000000000FFD15E00000000000000 00000000081000000220000000000080201148000800000800000001000322010000088200008028 000000000000000002000000000000000000000000000000000000FF62970000AA0AA0AA0AA28209 00A80AA0AA4820AA00002202A82A00282A8B002A82082482A8200210B102A82A8AA83402282A92A9 2A8000000000000000000000000000000000000000000000FF985A00035435435435435235430224 02C83103540000D49450850200D50509550548B31550540800D41550C410290A1500D51551550000 000880000000000000000000000000000000000000FFB09C00040040040040004844240040040004 040000000110010084010000300011011010010D1000001001000801801801000000800000001200 000000000000000000000000000000000000FF85140000AA0AA0AA0AA0880AA0C00940840880AA00 002A8A001000002A8040AA82A0000AA82B00802A0AA80003084000002A8AA82A8000000002000000 000000000000000000000000000000FFD829000200A00A00A00A40A00A00A00A00A22A0080008021 02A0280A80280200280A912002803020802003042042002502802002002000001000000000000000 000000000000000000000000FF1E48000001200200200204201054254235001401000080484894CA C00052C9004804C20004810A0080C804A88884CAC82C004000000000000880000000000000000000 000000000000000000FFE4D20002018119018118818018918318010C98A1800010400602C08E40C4 46006056046206046410406006486006216406006016006000000400000000000000000000000000 000000000000FF1CD90004C0D42C10D22C4CD4AE44C048C4A02C01800142335240740284700A4061 0320294730300014E30704A54E103096A57803812000001080000000000000000000000000000000 000000FFE1A600012821021010800030400020014003C2200000804100A08A984208088008808000 00C288008C00088201A0820809031299020000000900000000000000000000000000000000000000 FFD815000040902900804882800882800A008800008000002413472022A420034230400028022024 30013022082802002032C00002002000000000000000000000000000000000000000000000FFD3B8 000482081801A803090C0351059C0E40010000000050800001010904440803182C0EC80000080211 0040944058860000000429C000000000000000000000000000000000000000000000FFA420000000 00000004006401800008002064004000004A0200000400800200208800008900140001500480050A); SDR 8000 TDI (0006246446046000000800000000000000000000000000000000000000FF1F5100000180180000D8 3300194A04D80191180180000040862141360020160060A008C00652610000200608800600400611 608E516000000080000000000000000000000000000000000000FF77480000018018000418090018 1000180188B809000010432E00410604001620608008401620610208202600000623402E00600608 6008080010000000000000000000000000000000000000FFE5410000008218000018010018041078 018C994D10C00940AE2440067801060460A800E20612400200A11655000608008E01E10600600000 0002000000000000000000000000000000000000FFF6350000008418200018210418200019358018 01830000600631425600800601642820E32602C25004A00600012608408600242E00600000000000 0000000000000000000000000000000000FF1AE30000000000400200480200541000420201201440 0102000A04800300002302005000483105200A00001300C002002000021000000808000000000000 0000000000000000000000000000FF5A460000010018818130010010010058250400000400504000 10008008400800805420020050010040404000C30040400008400800000000000000000000000000 0000000000000000000000FF25F202800880080A8008228888008809908848048000002002012072 00211202200208210202001000A15242200241200202A14210202000001000000000000000000000 0000000000000000FFFD030004000000005E04444004200084004004000001105601001609001021 0010800214A100120102108109100100100100100100000000100000000000000000000000000000 0000000000FFEEC0040400800800C00C00C00C00800C44C40C008201203007103003003023057092 0231470A340105312708310720700305300300204000100000000000000000000000000000000000 0000FF9AF500801180191381380188982190D901881801800000400600615610600E006024506006 20608020600604440600400608600E006000000000000000000000000000000000000000000000FF 65FF0002002002002002002802242002003202000000044804910C04800904004814890804804A08 8510048CC005014814800004004000000802000000000000000000000000000000000000FF9F3000 000080080080084480A80080080080C80080000080020020D20020220021420020020CA080102002 0020120A2102002002002000000000000000000000000000000000000000000000FFE9730000AA0A A0AA0AA08802008C0AA0AA0100AA00003802A82211002A8209AA82402202A82001002402A8200AA0); SDR 8000 TDI (56556556556000000004000000000000000000000000000000000000FF27D7000001000931800801 801804843804001801800000000400400600400600600400000200400400C0060160060460060440 06006000000000000000000000000000000000000000000000FF39310000AA8AB8418098AB0AB8A0 0040A800500580000142AE2262AE0022AE2AE08628C2AE2040002A02AE4062AE2AC2AE2AA2AE2AE0 00000000000000000000000000000000000000000000FF17C4000001801820005801001812050802 103101800040C0060860064220060062440240060140040000060040060040060060060060000000 04000000000000000000000000000000000000FFE7E300000080188C0A1801001800105800049035 800014400601600608A00600600C0040060C404001400654E0060000060060060060000000000000 00000000000000000000000000000000FF4DBA0000018018000018B3001A0004D880013801800010 400600600602010E00600410400600430000400614C006000006006006006000000C040000000000 00000000000000000000000000FF08EC0000018018000058010018000018520C1801800004C00613 600608202600600601600600600800000600400600400634E0060060000000000000000000000000 00000000000000000000FF8FE80000AB8AB8AA0A9A010AB8AA0850000118AB00002042AE2062AE20 82062AE2AC2262AE2AF0022A82AE2042AE2AC2AE0062AE2AE0000010060000000000000000000000 00000000000000FF3DE9000000801800011941001C01802950001801800000400611600600000600 61440860061440400040060240060000064024160460000008800000000000000000000000000000 00000000FF12DD0001559559541358A5155955950812041955800150C55648E5564485365565544C 65565545045545565145565505561265565560000000040000000000000000000000000000000000 00FF023E0000AA8AB8AA0A1C030AB8900A980388B8AB80002AC32E2462AE32A2AE2AE20222C2AE21 60002AE2AE0022AE2AC2AE00E08600E000000000000000000000000000000000000000000000FF37 96000000801800001E090018000018A1883801000004400602600608000600600200C00600600800 6006022006004006212006006000000200000000000000000000000000000000000000FF099A0000 AA8AB8AA0840910AB8440818298618AB0000AA42260262062222A62AE2102062AE0067002AE2AE53 02AE2A82AE146046506000000000000000000000000000000000000000000000FFB3A40000008018 00041801001800001905805801800001401610600611000600601004600600E82000600620000600); SDR 8000 TDI (006016206000000000000000000000000000000000000000000000FF7DE5000001801A0188080002 1804003809888020802004000E0A620E40402600602400A08E00601000610600E086008086406406 006000000000000000000000000000000000000000000000FF7FA0000001A8182381C80000180222 1801863802880004040600609612428604E04C08225640C0280064060C620E2400263C604E206000 010000000000000000000000000000000000000000FF276D000001400801800900001D10C0188180 1401040012020640E0462048160C60062068041264800C64C600704690000601630600E000000000 000000000000000000000000000000000000FFF23C0000010108B380025003190084180380080100 0100000E14C02600404EA0E20614620410600A50E02E4862A600080E40700E806000000000000000 000000000000000000000000000000FF03B3000601001E0181480060180082180384190180000000 160060060050262C60A420640608C011A27C16106246003006005006006008000000000000000000 000000000000000000000000FF144E000401481A01A80810401800C07A01801C8180008404060461 8700400688749C24698680C00112700600691E042007147016806008000000000000000000000000 000000000000000000FF3905000001D0892B880C40031C81C01800001E01000100000608A0368840 1700E00610502820600400C82642700700400CC06027006000008004000000000000000000000000 000000000000FFE687000001001A8DCA080000180100580400180100008000060020060040068060 1600480280401408C006006006304006004006806000000000000000000000000000000000000000 000000FFE5E500030DC00821804800401812441C0000180100000000060020060060060070060000 0200600080600601680602C00454E806006000000004000000000000000000000000000000000000 FF6F6F000071CABC058188AA0AB8A00898A80AB8AB00002A82AE2AA2AE2AC2AE2AE2A62A82AA2AC0 142262AE2A62AE1062AC4162AE2AE000000004000000000000000000000000000000000000FFA533 000001800803808800001840C11802021801800020000608C00602400600608C1340001440200040 06094006004006006006006000000006000000000000000000000000000000000000FF0536000103 0AA8018A28AA0AB8C88918A80AB8AB80002A82AE2AC2AE2AC2AE2AE2AC2AC2AA2AC0042C42AE2A62 AE2142AE0862AE2AE000000004000000000000000000000000000000000000FF4B29000155D54C89 944954155912B21950111931800014055644455649455655622440055240C0045545560445565545); SDR 8000 TDI (0088800000000000000000000000000000000000000000000000FFB3FD0000002000080000024000 220002002000000001200A20800840C10010E2006042001000002080800000000040040002080000 0000000000000000000000000000000000000000000000FF7A8600040052C0000000900000004002 04108002000000000000800000000100000102800100000000000000000000000000100100000000 0000000000000000000000000000000000000000FF6CB40000000000002000242002120000000040 00000000000010000080100000000008001000000800100000080081080000000000000000040000 0000000000000000000000000000000000FF8AAF8000AA800EAA8AAE008AACA08AA8A88208A88000 0002AA223AAB2AB2AA2AA2AA2022A22AA0002AB2AA2AA2AA2A22ABAAA2AA2AA00000000000000000 0000000000000000000000000000FFFABC0004004002005002014403044004001150300001001000 0208048C900500482000905411002081500480100508491084080480400000000000000000000000 0000000000000000000000FFEC3B000755D53955F55915F55B13D55D519339318000000556556D56 5565575565574C6555556000556556D5755754D55655755755600000040000000000000000000000 0000000000000000FF479E0001028AAAAA822A8A8888308AA8AA84088280010003424922AB4022AA 2AAA8A2A20822220002A22AA2AA2AE4128028822AA2AA00000010000000000000000000000000000 0000000000FFEA180000004000000000200000404002040000020000001000000000001000800000 01100000001080080000080100000000080080000000000000000000000000000000000000000000 0000FF8F13000070AAA8AA818A41004A80AAA8A888008080000000120022AA0222AA2AA2222A2422 0020002002AA2AA2AA0424424122AA2AA000000000000000000000000000000000000000000000FF B16A00050D801801805825901803801A0180802A000000000023000008C00000001000C110044000 04000000600034423554E000000000000002000000000000000000000000000000000000FF79AF00 000040060032009025402840000402400000000002A8080000400000000100000400490020108000 006000008100000000000000000100000000000000000000000000000000000000FF0ADC00040148 0C43C08A00441510401A818300020A0000020600E05600448604600E4022040A64C0084026106026 28000690C08600E000000000000000000000000000000000000000000000FFDB2700000100180190 090000180004580988284000400800164C650604403611602608A09600E000044206016516008126); SDR 8000 TDI (0A08E000006200000000000000000000000000000000000000FFFB99000421C11801A2B800221800 A01805C11109800000400680620EA16006A260760C6EB6A040080000924860260C00070845062060 00084000000000000000000000000000000000000000FF44D70000118018018018100038018A1801 901A01800000C20640E88690680600EA060044068068800000021080471000261062865060000064 00000000000000000000000000000000000000FF4926000021801805C21804453851D43849809041 800010CC1700E24604601700651680309601614095441002800E010226024C0E0160001060000000 00000000000000000000000000000000FF9910000001809801815800001804011801820009800000 400614410E2061062320260900263060102041400063060001060160860060000060000000000000 00000000000000000000000000FFC87A000000000000000000000000000000000000000000000000 00000000000000000000000000000000000060000000000000000000000000000000000000000000 00000000000000000000FFA4A4000000400000000001201000000400200000000000000080000100 00040040010000000008010000000060008040008008008000000000000000000000000000000000 00000000000000FFDA07000000800800880800800800800800810920A00000290200208220200280 302A20208200200008240A10200A242A0A0020000020000020000000000000000000000000000000 00000000FF207900002000040000000400400005025200240A200100080040941002820091000010 000004090A4201004085408800809008008100200000020000000000000000000000000000000000 00FF7E48000000C00800880802800964800800C0080180000026030020C300215246A40A00209600 280009A00A06200A02308A002806006000002000000000000000000000000000000000000000FF86 F8044001D01AAD915911C4193595581584DACD8B404064CE0078A714614E1469568B515632E290AB 628E44755714C02600608E006000006000000000000000000000000000000000000000FF3A170000 2100100104000400228222956A00A6AB000000108034861C425AA1490604084C040200C922028039 82A48840040D000404C020000000000000000000000000000000000000000000FFAFC20440008809 42B4A888A409088B080C84091494200021120222022A213208308A0023428028002430022CB4CA14 202280A003022000002000000000000000000000000000000000000000FF98860000000000002000 0000020020414021404001000000009000B0000000008A01890010CC8288100C9000000000800080); SDR 8000 TDI (016000000006000000000000000000000000000000000000FFD82D020021801803841002880A01A0 9C000032498100006AC400482601450690004EA1688610481408604600610680600600608E006000 000004000000000000000000000000000000000000FF9BD7000001841801801000081811005C0101 102180000060010E600E006206EC200600600680400C09240618648600608608608C10E000004000 000000000000000000000000000000000000FF5D7D020021801803841004001809001C0391A80380 4084708400742708E08600302E4064668A401486B247610016005006006014046000004004000000 000000000000000000000000000000FF24E1000001C41801841104401B01215811A8100981004862 40206106046046042006217106805801800022817206004006046006106000004004000000000000 000000000000000000000000FF56A502002B823801A01040211801043D058244839100006C429260 0E2AE14F0020C70161064140000915020A0A2712404E00E106106020004004000000000000000000 000000000000000000FF4B3C000091805801A01820081A01A03803A41A4188A00440008C600E0060 A6026006C1229600404C00609402610682612604E080026020004104000000000000000000000000 000000000000FFCFBE000081A018019C980C087801801801805921800000405C606CE68162160A68 1E1E284E4341A010644C1000D6104A86227020106000004084000000000000000000000000000000 000000FF0D6D020023821801809810011801041A8188980380000044008061064C74061039468028 0602600503400020E206004416406032006000006804000000000000000000000000000000000000 FF0C81000011A09801801801801805045801889201800080400E0068064060964CA02E10220E00E0 0423421009003600410780E402006000006404000000000000000000000000000000000000FF0628 000021C01811801800101383801905805501804100EA6C0036060164CEA020060460460CC1809831 0600680E24A0C600C002006000004000000000000000000000000000000000000000FF9B34000021 801E01801800001001001C01E00801800004F2051020060860070020060071060868410020064011 06412006024100006000006000000000000000000000000000000000000000FF3A3C000211A01809 80180008180184390190500180400248000820064864261530079001260248204574841101268000 46026802006000005200000000000000000000000000000000000000FFF28800000981180380180C 01124D00D849CD044180001040122A702614609600211601001611682052E25404629600848702E0); SDR 8000 TDI (E000000800000000000000000000000000000000000000FF27A6000221889A218A0D00800881021A 80002A21800000F10A20390720644740208705610628600824100600000F09620E02640E10600022 0028000000000000000000000000000000000000FFBA3E000001801801A008008018018018000018 01800000600200600600400600200600600600400000000600680600600600600600600000000000 0000000000000000000000000000000000FF36CE000001811801801804A01021C818000018458000 44620210644E10601680700600281628720010800650700600600600600600600088080000000000 0000000000000000000000000000FFF340600001801C01A01800881101801C00011901880000784A 82600650404608E20E3434960440488018468000160068060260060060410012A000000000000000 0000000000000000000000FF786C000401801901891100A02201C4992C02160385400C6102D0F146 04629604314601202600708104208600008610644640654600600000000000000000000000000000 0000000000000000FFDAB1000001801801801000A01001C0188002300D800000E22AA2E08E22C226 AB246E6726B62AC2F000218E82F02E206A0E4475C600600010014000000000000000000000000000 0000000000FF4D38000001A01B01910901904921951B54051D0195400C635454D14E54655714290E 106946CA6B0084C02600011610644600700600604000020400000000000000000000000000000000 0000FF023F000001801819880A04A0081986981A199881800008609400400681600600208688E806 81680403C006106206806006006006006000000004000000000000000000000000000000000000FF E241000001A09C01800000800A01C09C82004923800020684083610E2442064A29364244160044A1 08490E23144E406016006106006000000004000000000000000000000000000000000000FF848500 0001801801880000800801801800021811800015650430624610403600200608C1264A4000044006 006006006406006006006000000004000000000000000000000000000000000000FF25B100000180 18018018008018018018000010018000006000004006004006000006006006004000004006000006 006006006006006000000004000000000000000000000000000000000000FF63E500000180180180 18008018018018000014018000806004005006004007000006807006004801006006006006806006 007006006000000004000000000000000000000000000000000000FFDBFE00000180180180110080 0A81A018141010058000306800C8410E0C4026000006006047024000024006408006006106126006); SDR 8000 TDI (002A8200000000000000000000000000000000000000FF0989000354354354354204228310354444 34C3540001440880B01550D50D50550550A90D50A28840D10D08D50550A90D502811485500004408 00000000000000000000000000000000000000FF887A000400400400400400400400400600610400 00008011111100010010015100000410000010090101112018000000008000000000000010000000 00000000000000000000000000000000FFBD840000AA0AA0AA0880800000200AA0080000AA000030 0018000AA82A82A82A82A80002A80800002002280882A82402A80500002A80000080000000000000 00000000000000000000000000FF19C9000200A00A00A44A20A44A10C00804034A00800000AC82D0 2002802802802802C02802A2A800803002802002942802422A0A0020001408000000000000000000 00000000000000000000FF06D000020120100120120A29028400034030000100008A482485080400 080080000412C00480082092C884C2100501400490C144004000C008000000000000000000000000 00000000000000FFA730000041801801809809801843A0180001180180001060440060AE10644608 6C0E4149060064001041060060060068064160160260000000100000000000000000000000000000 00000000FF1C3C000000840A34D24C40C90C88CA0882540B11800140F51322220380301344A0878A 721340304803244710322234E5560468268020000010000000000000000000000000000000000000 00FF39520004020080023882202082001002082001020000B00AD0809500000800819019519100C0 0880800C80800800800810C60000000000800800000000000000000000000000000000000000FFBF 35000400A00A008110008009088488020028A0800001250600324210200270332208220220221000 286200200290300280300B00200002000A000000000000000000000000000000000000FF837A0000 802804300200D188001740100004041800000000000200012006A60400000440100240082642001A E0000184800008908C8000000020000000000000000000000000000000000000FF18F60000000000 0024000011000002008403860000000080082400800A0010020400A000800800010188080062484C 0140818A40200000000000000000000000000000000000000000000000FF72820000618618458058 008008C1883900100801800040602040601600604608208602640600644010010600640682622E20 6026006000200010000000000000000000000000000000000000FFC3E6000303A41A05809A20B11A 0DB1300C2318938001206A20856A069468868B2A4E287206826B0080832E8A94060268A620E0A6A0); SDR 8000 TDI (000000000000000000000000000000000000000000FFCE7500000180080984190004188D8018E180 385B000050650011222A0C47D60360120521940060501A401600002600020040600E000000000080 000000000000000000000000000000000000FF2C5700000080080180182411192180B8018C190102 0000602000208200C00610600000244420E300044006406226000300006046000000001100000000 000000000000000000000000000000FF10960000000000000421400C80440540120000400CA04803 405101004500102102082500002284C8000420206200000088000000200000000000000000000000 000000000000000000000000FFC89800000500100100900180500310200000000108000000940000 004004064D00081084C008008A22008000609004000000C0A0000100000000000000000000000000 000000000000000000FF8D1A02800082284080080480080080082396892080002000020AA00802A0 4210422200245200220001A212022022082002402042000210000000000000000000000000000000 000000000000FF55C80004004004004000080000004004045C140002010810000110A10400A10010 91221101221011081100049001001001001009000000000000000000000000000000000000000000 000000FF156C000402C00C00C10800804804C80C01C00C00820150700210302F4121031131230830 0344340108300200B027043003007043000000000800000000000000000000000000000000000000 FFFC6E028001823801801809801801805821809841900000611602610600642644620422E2261061 0045620600610E106006014116000480000002000000000000000000000000000000000000FF0BD8 0002002002002002CA2002C02012012212000000004C30C000048008008AC8048008000008088208 A4C21004800000004804000000000C00000000000000000000000000000000000000FFF5A4000000 800800800800800814800800808800800000210212280200200240200208A00280210000A0020020 02012802802112800000000000000000000000000000000000000000000000FF39270000AA0AA0AA 0AA1400AA0400AA0AA1860AA00002A80000482A82A82A80002A82202A82A80003C12080882A82B02 A92A82302A80002A8000000000000000000000000000000000000000FF382B0000000000000000B0 08202200010800000000000082200480000000010010000400000800000200200008000000008002 00000000088000000000000000000000000000000000000000FFDB400000AA0AA0AA0AA0120AA112 0AA0AA0200AA00002A82204012A82A82A8020AA93102A92A80802002200A82A92A12A82A8AA12A80); SDR 8000 TDI (0000000000000000000000000000000000000000FFB2750000008018019400100920000018018018 00000001604440200600400608602610603232420000200600000603604600000600000000000400 0000000000000000000000000000000000FF70AA00000180180180C0420400040018018018000000 08610615608609400602E10600E08001411002800604600640229600800600000000008400000000 0000000000000000000000000000FFB5D9000001801801A5004A1040000018018118000000006006 08200600400600600600600000401000000604000600200600000600000000080400000000000000 0000000000000000000000FF2ED4000000800801804000040000001A018418000000004C8444A004 00600615600208800600410201600640600600600200400600000000000400000000000000000000 0000000000000000FF96970000AA8AA8AB88188000D8AA0AB8018838AB00002AC02C0022AC2AE2AE B062AA2202AE2AD0642A62AE0882AE2AC2A82AC2AE2A800000100400000000000000000000000000 0000000000FF370B000000801801800000000100005C0180180000000050A0012004444006002002 10000410604010400640600600200200000600000000080000000000000000000000000000000000 0000FF8B93000154955955953805841954155801821954000055442832A554554556C52552450554 556112544556150556550550550556550000000004000000000000000000000000000000000000FF 011E0000AB8AA8ABCA20AA0880518898018818AB00002AE2042C62AE08C2AEB262AE20E2AA224408 4022AE0AE2AE2AE2AE2AA2AE2A8000000000000000000000000000000000000000000000FF1F4300 00008018018000B0088001801801C93801000000608000600600400680600608600200600200A006 400006006006002006000000000002000000000000000000000000000000000000FF65760000AB8A A8AB8918AA0CD8058618018F58AB80002AE2342062AE0042AE2362A82622AE0140000562AE0882AE 2AC2A82AE2AE2A8000000000000000000000000000000000000000000000FFD8CE00000180180182 9800003881901801A0B80180000060000D200622400600400000A006446812126006006006004000 006006000000000800000000000000000000000000000000000000FFB66E00000180080180200004 0033813801801801000000609400400211400610E00608600010C220210006246006002006006006 000000000000000000000000000000000000000000000000FF7E8B00000080084980380000181184 1895803805114000600020643228400622640440600004600000822600000600200E006016200008); SDR 8000 TDI (00000000000000000000000000000000000000FF0898000201801804801A1000D8C584982B801821 120100000242A926206006283520A869464560C81240460C6446206000116C270060000000402001 00000000000000000000000000000000FFA884000001A0B0008498800018A1801801809821800000 010200040620C94422200000E1470861002849064291270070008461060060000000000000000000 00000000000000000000000000FF045F000001009E01820800000E01E01809801E05000000010040 70060060A64041060260B60060C9A360060080270070020071060060000000000000000000000000 00000000000000000000FF9856000401C01401800C00408941C03841811C42004000000022749F1F 501F04509E1B2C0E01E02800E53604690EE0700205E01F0060000000000000000000000000000000 00000000000000FF240D000401403800811C81A09800003801801200800100000202212620780600 10230010073260040850264010160AE0050060070060000000040000000000000000000000000000 00000000FFEA40000041003C0180C80204080000180180004880000000C20860060060060140120D 50860064040A60060470068CE04C0860060060000002000000000000000000000000000000000000 00FFE4E2000515529000941A3009380440180180180280000000044371150040068C092200002E00 60A400C006400006007084046006806000000004000000000000000000000000000000000000FFAF 350001011050AB814BC01008A80AB8AB8AA9C080002A825C0062242ACAAE2442023042062AE01820 62AE08E2AE20620621E2AE006000000004000000000000000000000000000000000000FFD5140000 0180180090A8A0080800001801001008800000000812600600C00401422609604420600400600600 0006086004006006006000000104000000000000000000000000000000000000FFEA480000038118 AA9008020288AA0AB8AB0AB00180002A84801062AE2AC2AC21428E22E2442AE0003262AE2AE2AE28 62242A62AE006000000204000000000000000000000000000000000000FFC814000155155954820C 0C052952155955155120800045054421654E4A4D542C408E44651413630445655635055643655455 6556006000000004000000000000000000000000000000000000FF49870000510410008408100048 00001001001012800000000443600600400408402600611400654001600600600605610E00600600 6000000000000000000000000000000000000000000000FF5EAD0000AA8AA8AB8000800000A80AB8 AB8AB8AE000032620C00422E2242AE20620E2262020040103822AE28E2AE0860062A02AE00000000); SDR 8000 TDI (000000000000000000000000000000000000FFF66200000000000434001049200000000000404200 000000404D0040000800400080000000000000080000000000800011000000000000000000000000 000000000000000000000000000000FF9E3D8006AA8AA800C00880C00CA88AA8AA80080080000002 0200220A2AA2AA1222024A22AB2AA2003222AA08BAAA2AA2A32ABAABAAA000000000000000000000 000000000000000000000000FF46C400025044040020041020020050020024040000000010001000 0404100001411400C000004000021004001004004034804804004000000000000000000000000000 000000000000000000FF0761000155D55D45A21C0D853951B55955B0584B800000154604650E557D 5603441409455655620044755615655755754C556556556000000000000000000000000000000000 000000000000FFA0BE0002028108AA8AA802CAA8AA854A8A8848CA80000002A225222600A2AA2822 222A632A2AE2000122AA4AA2AA2AE202AAB2AE2AE000000080000000000000000000000000000000 000000FFC13800000020020810A2A008040200000002848000000010083080400000002040A00400 00000000008800401000000000000000000000000200000000000000000000000000000000000000 FF536D000100B04CAA8AA9C0AAA8A88208C88928208000000A1200231050300224200A2022A22AA0 007022AA08A2AA2AA1022AA2AA2AA000000000000000000000000000000000000000000000FF6FE9 000515929801A0183180180180000000000200000000461201002300060300001080000000001080 00006000000144000000000000000000000000000000000000000000000000000000FF33BB000040 00200000020200020410A04203011000000001084100480814C81003200200080002000400004260 00000410000000000000000080000000000000000000000000000000000000FF9AEE000401421200 A01A00295C45891801811843044048100A44A0220070865080804D012600E2900000260864262060 8000E006006000000100000080000000000000000000000000000000FFAE5A000001801003811D08 001811845801902800108004000208201229624600043200420E4C604010051644010E0060101060 46006000000000000000000000000000000000000000000000FF1156000001001001801A00001901 801955803803008000004408650E06E00606000C00200608600005A08600008E0060080464060060 000000C0400000000000000000000000000000000000FFAA4C0000018210018088800808098838D1 88980000602A002C0062460852A600C04602A60E44620004261E2060061560800260060060000000); SDR 8000 TDI (0000000000000000000000000000000000FFA02D000001C01905809D0B141A03841908A41C000000 09085631514E51600C03400D08310684610082630C10000620210620610E00000000000000000000 0000000000000000000000000000FF3FB20000038018018058210010118018428918408000022206 04400602612400022401000600641001600420620E00600604E00600000000010000000000000000 0000000000000000000000FFC87A0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000600000000000000000000000000000000000000000000000 0000000000000000FF676B0000000000014000010010000002000000000000800001000000000801 00000000000000400000400080600000400000400000000000000000000000000000000000000000 0000000000FFCA17000000A00800800800800A00800000A80A02800000200200200200A40609200A 22A00200200000200220200200208200200200000000000000000000000000000000000000000000 0000FFAEC700000020000000C00000030C0002400320300000509090008048200080800000080029 0000800C0008008000000000000400000000000000000000000000000000000000000000000000FF 2E69000000800800C02800800800A50A00C00800800180200360600230A20208A00A00A003802000 01E103042506002486006002000000000000000000000000000000000000000000000000FF6F2B11 004D805831849955C059458D590590194D0D00286CD642C0464CF93408E4CE4053364460412D4296 51605651640608408E000000410000000000000000000000000000000000000000FF40EA00000100 100400920000008A0090200AA029000028908900C5210004044010001140240001800A4008268684 000244444240040000000000000000000000000000000000000000000000FFACF710804480484880 08ACA048A4B2AB048009549280882532042942352002802443502282A42080242912CD302A40A002 00280A020000408000000000000000000000000000000000000000FF3D4400000000000004020000 00000000000002000000400000000800000220910108800050000000100C00800A001000200A0820 000000000000000000000000000000000000000000000000FFBE3D00000800000200800000000004 00000806040000000800A08210900988200800548810000020808100000000000200200080000000 000000000000000000000000000000000000000000FF9BCF00000020032800C24204040200000015 01080000001108000100000000090030208000800000009000220000000800000000000000000200); SDR 8000 TDI (00000000000000000000000000000000FF54FD000011C11803905823AC1000A042208013058000A0 240661B204001A06886A0600E12600C017440C465401260030070000040000000000060000000000 00000000000000000000000000FF0D470000338258218158018018008004048C1225800000220410 61460521464260360460062A4200440A8EA2620E41205602030C0018000000040000000000000000 00000000000000000000FF4F43000001803801801841809CA0880030C25001800080A00400710690 204E8561464C620628420509000E0010062230062283040000000000040000000000000000000000 00000000000000FFFE5C000001801801803801811A01602800A01A018000802002C0608480621680 60040039060040082C820E8068860020060001060000000000040000000000000000000000000000 00000000FF4AC3000011A118019098018C7001108A1280990980006725A28B622460EAC600614C10 200612C0640000C61400665CA0068500060000000000040000000000000000000000000000000000 00FFE645000201A0580181182190194180902485301380010030420C644608E08204E00CA4220625 640100408620600600A006404406000000000000000000000000000000000000000000000000FF57 60000001841801821A01801911885004849085800040A002A0610614601290204402200600602C00 40060A8006002086104006000000000004000000000000000000000000000000000000FF28410000 01801801807891819A8BC0006B901A138000006146B06000C2340706702601640E384008E0656680 7606402047006804000000000000000000000000000000000000000000000000FF22D4000001C018 01809A818018038010118018018021886806003A200070A600630E30603640620108E0072000B600 200601700C000000000000000000000000000000000000000000000000FF21CB000401821801A218 11A01201D00001141C0100002160A61062A32824D608730501004600442008A40610115620200709 200E000000000000000000000000000000000000000000000000FFBFD0000003C019018159018032 09801105131C01800001680604601240210F00E08411128F0AE08002241608600644200632301600 0000000000000000000000000000000000000000000000FFE1F9000001801803C11A0B02182380E8 08A119B0004018602628482608F824000236F4640600420800E1A465620E0021C600F00400000000 0080000000000000000000000000000000000000FFA641000001801801801821A9D8418358208019 00800082620E00C08602600482010E40441611600000604400000604200610608400000000000000); SDR 8000 TDI (000000000000000000000000000000FF996D000001C0180581180080184184180980585100001464 1600244E5062048860408061C684E000006106016006017026806006000000000000000000000000 000000000000000000000000FF2D6E000001801801803E00601E0188100180180460800064060020 0640600D00F84822E007106081814C0604000600E007206086000000000000000000000000000000 000000000000000000FFF2BE000001001801809800801221803A23A0B111102043200E24A2068440 04C26902006006424000407906000006207806006002000000000800000000000000000000000000 000000000000FFBBAB000001801801801C00001041E0102381140002A000200720A00600C0243A62 426EE20F28C20022C007206086016046406002000000000000000000000000000000000000000000 000000FFCD6E000001801801815801801801D05C4D8049159140456C16452C0E446C1245708C80E8 8754E904C16500020006406006006080000000000004000000000000000000000000000000000000 FF166F0000190018018218198010418018859FC9908040E1E4A68A2C1E02728A10E0848068060048 00006B28836006007006006000000000001000000000000000000000000000000000000000FFECA2 000001801801809A00201A01801081A00A2180000A70A601202689634884E1242B64060060050042 46440106006006006004000000000004000000000000000000000000000000000000FFBBB6000001 80180584180100100182104180180082800060164C200444600240640400614E2AC40042C0160060 0600E006006004000000000004000000000000000000000000000000000000FFA8F3000001801801 80180180180180100180180180000040060020060020060060040060060040040040000000060060 06006000000000000004000000000000000000000000000000000000FF4EE4000401801801C01C01 801801A01001800A0080008000070028068028068068070060060048020048010068060070060060 00000000000006000000000000000000000000000000000000FF7C7D000043801801809800A01A01 801001901809800000080640220601202C08E01400600620C0040041060001260060060460800000 00000004000000000000000000000000000000000000FF3EA5000211005843805A22101203801505 8458448000200C068028CEA22206446246A470120C4C00444216C86C0640E0260062080000000000 00000000000000000000000000000000000000FFA10A000001841801C018018010028600C0803009 800000200611200C38010E00E00621704E0040040008060C60960030160000040000000000000000); SDR 8000 TDI (0000000000000000000000000000FF03E30000AA0AA0AA0AA0080080800840800802000000040240 2282E0200238320200080AA80A01002A02200882A8AA82A82A020000000000080000000000000000 0000000000000000000000FFDF7E000200A00A00A00A44A00A2AC10A14A149108000B52082802812 8AA902808822402002803000812802C4300200200280288200000000000000000000000000000000 0000000000000000FFAE540002002012002013003222010242412410240000800854884800800004 88488C84C000A08C8000089080080480000401483400000000090000000000000000000000000000 0000000000FF6B6B0000418018418118C18018158C1881921123800000610E40C00E4A683601628C 10E80611610091600604600648614680602400000000000000000000000000000000000000000000 0000FF9A4D000500800D00D20C12C30C40E00C24804E10800144B22604748300B302522022203003 243449003423513503002812126106000000001020000000000000000000000000000000000000FF 036C0005200002800A82402382A60002432082000000C20800000A00801544C04818111008C00B60 208880800120E003800A0808000000000840000000000000000000000000000000000000FF722900 0080A009008009128408008008808628868000092202832012512080872802002202002000002002 04A002002002002002000000000008000000000000000000000000000000000000FFCA5000004020 0041C020880820105A102800401000002001008885800E00001887056000241A0009100660497600 10E8610083E4000000000020000000000000000000000000000000000000FFA2C300000802000004 00040000400000007000400000040010200000000000000821808080018410020000206008001009 141000000000000000000000000000000000000000000000000000FF21B700000100982191180000 020984B90580192900000064C644002E206232006040026006046000096000106006086016206806 000000000000000000000000000000000000000000000000FF8421000231A09A81CD5B0B2B1125B0 9CB5805A830000A4708680ACB6806A42826408226A46856C20D0EA20A11006886C8EC06286000000 000810000000000000000000000000000000000000FF79B9000101821821801800405009A4380184 9829800110620634600654690411602001611610601002608090043620E04612E056000000000020 000000000000000000000000000000000000FFDA7E000001A0180180180100000180100180180080 00006006006007806806006000806006004002004000806006006006006006000000000002000000); SDR 8000 TDI (00000000000000000000000000FFF89C0000000000220301020C4010092010002020032000001008 01101104304280282200000002005004202060000C00000002000800000000000000000000000000 00000000000000000000FF3F8C0200210010018011010030010000010A4000002000030020402048 010400402804048040024000000014E3200060240200000004000000000000000000000000000000 00000000000000FFE229000000820800808820800882800820800900008000240A01228A44A1222A 208211202A09A0D000A10A20200220000A4120020000000000000000000000000000000000000000 00000000FF2789000400440000400000004500400440400400004060100100110101111900105128 90010210010006700110014810012010000000000010000000000000000000000000000000000000 00FF6E4C040440C00800C00900800C04C00C00C80C00800000308740301300300340300741300B13 3083002002003083107017407006000000001002000000000000000000000000000000000000FF31 59000001801801811821801801801801843801810000640C00644650604612610614454620642001 60064A6226006044046006000200000000000000000000000000000000000000000000FF2DD90002 002002002002002002402A5240200221000089080CA1080CA08920C08004084004804902814800C0 0804A9400400C004000000000C02000000000000000000000000000000000000FFB4AA0000008008 00800800800804808802800804800004210210210204200A10200204A80200200008200204200204 2802902002000000000000000000000000000000000000000000000000FF7C170000AA0AA0AA0AA0 AA0AA08C5100880AA08C0000300220461230480200421AA9A102A82A80003202A80882A85002A926 0AA8000000000000000000000000000000000000000000000000FF3FE00000000000000000880000 2C04004400840000002808080088800C800001108112000108000100010000000100080100100000 0000001000000000000000000000000000000000000000FFEE870000AA0AA0AA0AA0AA0AA0A80220 AC0AA0A800002502200882201212000082A82212A82A81002082A80A92A80292A8288AA800000000 0400000000000000000000000000000000000000FF5B9000035435435435424434C3003103103441 340000810500D40410C00CC0C40428209550430C00548C50D50D505505505484D000000000010000 0000000000000000000000000000000000FFF4F60004004004004004004004000004004004000001 0019090001010080C912000088000100100304100120000100080000000000000000100200000000); SDR 8000 TDI (000000000000000000000000FFB5120000000008000000338018018018018B5840000002800610E0 0681403600600E006006006A040060002000060000000060A6000000000A06000000000000000000 000000000000000000FF32A30000000018000000818C580000180180181580003060060460061040 86002006002546006100006156046006000004006006000000000000000000000000000000000000 000000000000FFC26E0000AA0AB8AA0AB8018080AA0AB8AA80188180000062AE2062AE224A062AE2 A62AA00E2AF0042AE2060882AE2A82AC2AE20E000000001004000000000000000000000000000000 000000FF310E000100000800000001901800021801821805800000600644E24700420600640E0020 06006800116000406006000000006006000000000800000000000000000000000000000000000000 FF34770001541549541558158A1954155D5588B845800001655640655644C4C755654655240E5561 04556450150556550550556426000000000404000000000000000000000000000000000000FF08F8 0000000AB8AB8AA0C58220AB8158AB88A880800022C2AE00608E22D0AE2AA0C62AE2AE2060802262 2E0AE2AE2A82AA2AE2A6000000000000000000000000000000000000000000000000FF023A000000 0008018000C181200180180182088880002C40060AE00608580E00600E0061460064000060864000 0600000200608E000000000000000000000000000000000000000000000000FF9B4D0000760AB8AB 8AB8318100AA1218AA8800D180003222AE106026304206AAE0062A82AE15E60000E3860882AE2A82 AE2AE2B6000000000100000000000000000000000000000000000000FF10DC000110000801801803 800001885A01822809800000600632E0060040060064460000060068000060562460060000060060 06000000000800000000000000000000000000000000000000FFFB0B000000001801800089935801 809801811022800010E0000064960D41560020960060062A60803260000060060000060060160000 00000100000000000000000000000000000000000000FF19F50000000218898038C5908111905801 829002804000E22008640620430604A00604404602E2004060800000061200060064060800000000 00000000000000000000000000000000000000FF108B00000002788D8538218098820319A182D043 800020E0240063261560060862164026BE0261D01660000B80A600018E0060260000000000000000 00000000000000000000000000000000FFB4D1000000800841801801822004021848801081848020 600C01605600604E3062461100860060000062202A612600000E40E0460000000000000000000000); SDR 8000 TDI (0000000000000000000000FFD863000001801001800801801421801E518118018500022106202086 41408610600620780E09600020400620000780000600600600000000000000000000000000000000 0000000000000000FFEDA1000401A01C03B00C6BA010098058AD80D8038060082006012006204406 0E6016087006C4C00104440620680680080690600600000000000000000000000000000000000000 0000000000FF0B42000001E4340440180A801811401901820815000048304608642400601720D123 10222600600400209000150608100722F00600008000000400000000000000000000000000000000 0000FF97D1000001801002252C0091389300182182080B800009604E0060040060062240020A2007 0060000021300068068008AE806006000000000000000000000000000000000000000000000000FF 46C3000201909A00101801A4104100190B001841000040208600600000600611600200B006004005 002006400006000006006006000000000004000000000000000000000000000000000000FF59AE00 00AB927CA80008AA9058410AB8118CA8D100005222062AE2A82AE2AE0062AA2122AE2AC0042AA206 0AE2AF2A82062AE2AE000000000004000000000000000000000000000000000000FF6D4800000180 1002110800893821801801821911000000200620E004114222000006026006004004006000000006 000016006006000000000004000000000000000000000000000000000000FF763F0000AB8010A80B 08AA8118890AB92188D883800000E20E2AE2AC2AC2AA0CC2AE3062AE2AC0002AE28808E2AE2A82CE 2AE2AE000000000004000000000000000000000000000000000000FF190D0000C595555004295582 111195595588D843000052A55614655644408255455650E5565540045564B6550557550546556556 000000000004000000000000000000000000000000000000FF8A0B00000184900400480084100300 18050018018000042146006006004002404006026006004002006046446006000006006006000000 000002000000000000000000000000000000000000FF5C3C0000100AA8A80000AB8000040AB8AA80 180000002002262062AE2840142AA2AE00E2AE2AE0002AE20608E2AE2A82A02AE2AE000000000000 000000000000000000000000000000000000FF932600014000080208000184004180180181391200 00040016106006004546006006106006006004006006000006000008006006000000000004000000 000000000000000000000000000000FF4E250000140008000520019138920018018C184080000880 8602C006034016006006226006006000006130226006000000006006000000000000000000000000); SDR 8000 TDI (00000000000000000000FF44C8000400240200400400440402201404004010000000000902100400 50048810040548050000030000400008048010048048040000000000020000000000000000000000 00000000000000FF8BC3000555955951C43E49D55D55F55D558518018001016556CC6C0454C54614 6C24405557556500C064365575565565575575560000000002000000000000000000000000000000 00000000FFC9770000AA8088AA8AA8AA8108888AA92088882280002AA22249228A2AA03222A29228 22AA22208022220A0AB2AAAAA2AA2AE2AA0000000000800000000000000000000000000000000000 00FF815000040020040451010440040000020000011000004A00000100A8001008C0808808880080 00000A8000000000000800800800000000000000000000000000000000000000000000000000FF66 FF0002AA926AA8CAACAAB048408AAA108C090080002AA32200226222650428204200A2AA1120003B 230248A2AAAAA2AA2AA2AA000000000000000000000000000000000000000000000000FFC4E50000 01D0180180180184184180010B800100000000410023000010004000813010000004400000000000 6000006000000000000000000000000000000000000000000000000000000000FF777A0000000104 0200000011229200002002A02A000000000810008801028804020024000031008001013024600100 0000000000000000000100000000000000000000000000000000000000FF068C000401C03401A01A 04C094C9001C8104100881000AA50424C28622005400600004000604E0002260A00C600F0B000600 6006210000000000000000000000000000000000000000000000FFE88D0000018018018138809018 050058019010A3804000201400605610040610603228A14628648000620000850640004E11600600 0000000000000000000000000000000000000000000000FF91B80000019018018098998010A38018 11807028800002200C20620608038641650C28C40600625210200000800600002640E04600000000 0002000000000000000000000000000000000000FFA7DF000001883A018008008098098018818E50 80808000A00401E0E621000620E0C60066663840AA00220000630690800E45600600810000000200 0000000000000000000000000000000000FF54390000018012018038059012018058098010038020 102D0604201604403608724004010604E0005441460A609634000630602640000000000000000000 0000000000000000000000000000FFD54F000001A23801B0180180102140380300101182804460C6 50250600450EC0E088A0000E424000444296000A0600080690680600000000000000000000000000); SDR 8000 TDI (000000000000000000FFC87A00000000000000000000000000000000000000000000000000000000 00000000000000000000000000006000000000000000000000000000000000000000000000000000 000000000000FF8E9400000000100100000100040000100000120000000000008000050010008010 00000800804001004800806801000000000000000000000000800000000000000000000000000000 000000FF6078000000800800800800A00801040A00800800800000280200200640400A0022888800 1240280000200211200222A280022222000000002020000000000000000000000000000000000000 FF84A000000000000000000002004411020C1420900001C10A340004000008000008204040001008 20800000420A90000000480000008020200000800000000000000000000000000000000000FF58C4 000000800800800800800800800801800C01800000290200200210200B706203003602A820001021 9B802043222212002002008000062020000000000000000000000000000000000000FF7E2F140423 80184180D901B2190195580582588D8CA000E204D4E2D40060A64CE2975574060861124D6C461060 5645600F2B61260080400A6082000000000000000000000000000000000000FFC6A3000011000004 0010044200230A810B0B2489000060CB2C000204304001885004A0400C841C40080000AA87880041 0C284004000000600000000000000000000000000000000000000000FFEF000A0000800800802880 88090082C902C4291293000120021425428021023421122B280204211043202210208A44A0830320 A2008020202000000000000000000000000000000000000000FFD66000002A000000000000000000 0800002100000040200201C080088000000102000002001002209000000000000008085000000000 00020100000000000000000000000000000000000000FFF2D7000200000022008002220400000000 00020000000001800000011800200009501000010000408002000002600109000404400000400800 00000000000000000000000000000000000000FFD3BB000400200400452024400400000200030024 0000A080001101101001080A01400C00000001000100304010000000008010000000000004000000 00000000000000000000000000000000FF9EE3000000000000080300000000200000082110000014 00000000200080004100100088008004000000800400000010000000000000000000000000000000 00000000000000000000000000FF4AB08000AACAACAA8008088AA8AA8AA8AA90484480000022AA22 22022222220022022422AA2AA0002A230208A2ABAAB2AA2AA2AA0000000000000000000000000000); SDR 8000 TDI (0000000000000000FF5E80000001821801C0180180192910184D8C9801800080F00204400048E005 12700690F40E20C04002C0A600800640601720602600000084400400000000000000000000000000 0000000000FF21DE000001803805A019098008038118458210018000016007826004006806446004 08600600C04002428200F002207814A4601608000004404C00000000000000000000000000000000 0000FF2FE300000180B803801801800A51141111805809842040606018487C90665430E1C5006526 40489808504A0000228061040060C6000000006024000000000000000000000000000000000000FF F7A6000001851801841C01804101801801911A518020006806006004416007016805816056086105 09600E006026946004106886000000004804000000000000000000000000000000000000FFFF6000 0001801801801801820A81801801801801800000601200600480604445680400A006006004446006 310006006005846006100001006004000000000000000000000000000000000000FF333100000181 1807801801C01401001901801801800000650610620000600600640E12600E00420003C2020A6442 006006006106000000000000000000000000000000000000000000000000FFDD9D00000180182190 18018010010C0801821811800000600000430480600608601622784F807A03806492040002026286 406006000001040002000000000000000000000000000000000000FFFED4000001811841801801C2 0001121901801C01800000741600600080204640E20451202600400040408A410203046004227086 080000043000000000000000000000000000000000000000FF3C3B00000180180181180392514B01 4D41889C519100156003104028002016246504803406106520296082016202246094086426000000 0020A0000000000000000000000000000000000000FF6649000001801801B018818019010A1C0186 38118020006B0F12E30008480714680602502E224000024A0E826046006706026006000000800000 000000000000000000000000000000000000FF6AAB000001801801821A2180981100104384184180 000160026440C480000608E46608C00600E000006006A0000600600600600E000001002000000000 000000000000000000000000000000FF7328000001801801C11941808045035905803C0191201470 120160041050165071048304262362A0AC68862000062265040C6236000000006040000000000000 000000000000000000000000FF3D0000000180180184180594210108100189181180000062061045 1400000403600408000E10600000E20E02E206006014006006000000006100000000000000000000); SDR 8000 TDI (00000000000000FFF1CA000001801801801801801810811C2190188180000468560570524A04A642 602E24784E04C04000202E4085020963168062062002008000000000000000000000000000000000 00000000FF0D77000001801801801801801800801801801D0180004269062262060A02130EE24632 E2AF20C0B00CA0D600E28A00E84642E0060200004000000000000000000000000000000000000000 00FFA9AC000001801801801801A418118118419018019040044056056554546546416C144442CE45 62C4486106C50530334D1410640641051002628C000000000000000000000000000000000000FF90 23000001805801819A01801801801801801801800000416404E08440686E8060E488501680400612 600E586020234205006006000000004006000000000000000000000000000000000000FFA34B0000 01801801801801A01800801801821C03800022C80600608103620E03708442640644E0200520A700 8110004804046006020000806004000000000000000000000000000000000000FF1C290000018018 01801801801845801841801801800000400621640408600650640411614600408400201200622022 420C00E006000000004004000000000000000000000000000000000000FF4B710000018018018018 01801800001801801801000000600600600400600600600600400600400000600600000000600600 6006000000004004000000000000000000000000000000000000FF82A50000018018018018018018 01001801801C01000000600600600400700600700680400700480480680600680000600600600600 0001004004000000000000000000000000000000000000FF54390002018018018018038018008038 018419038400026007004000B36006A0600600600600400402000200001010641601600600000000 4004000000000000000000000000000000000000FF9C510002018018018C18118018358298018138 518000006016005124006D0490680600F504A4480480A05222EC0043780602702612000080400400 0000000000000000000000000000000000FFEFCA000001801801881A0180022B821801909CA98000 00600E106400A062068C610610704600480040C0022262020060060060060A000000400000000000 0000000000000000000000000000FF65290000018018018619118058050589018858418600407000 8848A48860540260C700718630400422442000000114610E14E81610000000401400000000000000 0000000000000000000000FF8C7D000001801801801A158000018058018238058001026006007200 03690620700609622604400400400E01701634E20604604600000100400400000000000000000000); SDR 8000 TDI (000000000000FF2E6800040120020020120028C24D214401211001000000484C808004080CA00000 05101000C20C40800A48800CD000412C804804000000840800000000000000000000000000000000 000000FF11210000C18118518118018439350018018A980380008061064064248062060AE2061060 06016100006016006226006006006096000000206000000000000000000000000000000000000000 FF4DA8000000C40C02820D10C80C00C10888800A3080002C721300290B2D310B80294B2234A34834 314532A350B0128528B3002006000001143000000000000000000000000000000000000000FFD386 00022024821000A2002602512902822810280000800820820200090811008310828988818880C008 A0890808201081001020000000A00800000000000000000000000000000000000000FFB99E000000 800844800810800808800A28800A8000008000040028460025020020085020022020000024420022 0300120000300200000040A000000000000000000000000000000000000000FF7D9A000100001803 C00001801020001810112200000018008000081D2080200514400400001006400001041060650501 60000100000000020008000000000000000000000000000000000000FF27B400040A020000610000 1041040023004000040000E00700600D804200003218000004200000102902006060008008108088 10000000100000000000000000000000000000000000000000FF054A00004181180184198380B000 021801849A51000004601E00602614600E00600400424642610804E01E02E49200400400600E0000 00046000000000000000000000000000000000000000FFF03E000221A11A01809A83A2B2202A58AB B038D1000008693680622A94E846806004854CCA816A88C96D06828C8A0040C4016006000000C168 00000000000000000000000000000000000000FFA3EB00000B821805803C01801808801A01811801 8000206206226883C07816254A0F004802426000006036280022206A0600602E0000000420100000 00000000000000000000000000000000FF6358000001801801801801801200801801801801800000 60078060060060060040060040020040000060060068020060060060060000000000000000000000 00000000000000000000000000FF42B8000001805801801801801C44001841841805000041618600 60064100064060040062860468000A20464060060040140060060000002020000000000000000000 00000000000000000000FFF131000001801801801E01E41800001801801801084020680600628700 301600F405886006407289A0210604082E2240443060060100900222880000000000000000000000); SDR 8000 TDI (0000000000FF01480800008008008048008089088088028A082080002021124D203A4820C2020440 4820A202201023204240200201010001240200020000245000000000000000000000000000000000 0000FFEE5B0004020000004000004004000104004004000001001005201101301029209081209608 0091200404800010811110010C1000000001080000000000000000000000000000000000000000FF 5015000400840800C00804C40C00800D14C00C00800108300700720320B0B348F50340B05250B030 2020A24230830031031030020004010C2800000000000000000000000000000000000000FFD5A508 0005801801801901909811801801921841800045601430605600600604600608610604600000E006 01642E0260060060060200A0006000000000000000000000000000000000000000FFEFA500020120 02002002002112002040010002010000004835004800A28000004804909004800810800800A20890 0048040040040000008A0800000000000000000000000000000000000000FF01EB00000080080080 0800882800948A00800800800000248200209210200280200240200200220000212A002002002002 002002000000012000000000000000000000000000000000000000FF46F20004AA0AA0AA0AA0AA12 00AA0100AA0AA0AA0000AA81002A8660041AA82A82A81202A82A80102A8200488220AA92A8AA82A8 000000210200000000000000000000000000000000000000FF06B400040000000000000000A00810 820000840000010000102300000000880010880010000800020201004000080000D0001000000000 0B0002000000000000000000000000000000000000FFDDD50000AA0AA0AA0AA0AA0540AA1224AA0A A0AA0000AA80082A80080102A92A82A80002A82A80002A82800892012A82A82A82A8000000280000 000000000000000000000000000000000000FFFCB500015435435435435432034024415422415400 00551320900D50D48A20D50440D48550C30A00890C50930D41551400D50550000000A00800000000 000000000000000000000000000000FF9D3000000040040040040040040040020000040000000014 418011015000000010014290010014010010310400A8800801800000000001041400000000000000 000000000000000000000000FFB8CB0000AA0AA0AA0AA0AA0200040000AA1000AA00002A82002202 A8220008AA8280228AA80000406A00002880002A82002A82A8000000000000000000000000000000 000000000000000000FFC690000200A00A00A00A00C00A80B40800AA4A00800080290210280280A8 02002852802002912800812882822802002002002802000000D0A800000000000000000000000000); SDR 8000 TDI (00000000FF9C9E0000AB8AB8AB8AB8AB8ABA000AB8AB8AB0AB80002AFAAC2AEA022281062AA2AC2A E0062AD0183900360882262AC2AC2AE2AE0000002070040000000000000000000000000000000000 00FF36BE000001801801800001801801801801801051800000680200680680000601600401601650 6040404006006016004004006006000000404800000000000000000000000000000000000000FF20 32000155955955954155955AC4155955B5515580005565525560924480165525555564D655400444 4006550506554554556556000000436004000000000000000000000000000000000000FFB8DF0000 AB8AB8AB8AB8AB881A8B8AB8AB8AB885800022E4C42462AA4481263262A628620603700214E2AE2A E2A23462162AE2AE000000004002000000000000000000000000000000000000FFCB400000018018 01801801801A0980180180180180000068040062420802460060060060060060000062A400002E00 6006006006000000084000000000000000000000000000000000000000FFAA370000AB8AB8AB8AB8 AB8758C00AB8ABAAB88980003A601E3162A2180416206214A4616E0040200062AE0882A62B43442A E2AE0000001D6000000000000000000000000000000000000000FF436700000180180180180180B8 00001801801821800001620604E00224010410601400E5062008000A600600600C0040C400600600 0000406800000000000000000000000000000000000000FF7E9D0000018018018000019018338018 0180100380000060A610601201043604C0A60A200614E00040A00244600600E00E00600600000005 4000000000000000000000000000000000000000FF6DF40000018018018018098218018099098810 8188400061262960024400060060460D208E00608800A00200842600602644620600040000655000 0000000000000000000000000000000000FF112500000180180180000181190D80588D8410818C80 00602604658211000631600400A0C640440008244254023647413421609600020000608060000000 0000000000000000000000000000FF132E0000018018018040218818300018018010018100006016 0060520002B640628C20200610402032208A00610608440400608600000000700000000000000000 0000000000000000000000FFA3F00000000000000000501500440140021400000420000000080220 0B05080901101400482804C024031015609030041002001000000000000000000000000000000000 0000000000000000FF77230000000218018010838C00010018900000000000148008000504014000 08040000000048009000C22042E2280C810002000004012004000000000000000000000000000000); SDR 8000 TDI (000000FF78FB000601E00800A01001C05001001C41C00001800000421648704620010A42600600C0 0609600C00350600100C124080806000000080046004000000000000000000000000000000000000 FF757E000001801A01849201801021A01A01A0000180000040560062260902528160061060062262 8108A006426004004000006800000000002200000000000000000000000000000000000000FF487A 00000180080090380180191300100180040100008041060071162000864A600600D00708E0100260 8E000135004004006000000000004004000000000000000000000000000000000000FF64310000AB 8ABAAA8010AB8AB801CAB8AB8AA0AB80002AC2062AE0460624465062AE2262AE11600020623608E2 042AC2AC2AE2A80000002A8006000000000000000000000000000000000000FF59E3000001800800 905001801011001801800001800000602600600600402220608608400640E0C001208620003604E0 400060000000002A2084000000000000000000000000000000000000FF87040000ABAAA8AB9252AB 8AB0B10AB8AB8AA0AB80002AE2AE2AE30E09410A0462AE2A62AE4263083022260AE0A62AE2A82AE2 A80000002AA204000000000000000000000000000000000000FFD525000155B54D54841B55955143 354955952155800055650E55655655048A13642E45455602640454404E1505065065105565500000 00012004000000000000000000000000000000000000FF3BC7000001800800809001801005001801 800001000000600600600640000200E00600E0060060000561024064160060000060000000000020 00000000000000000000000000000000000000FFF5960000AB8AB8AB8100AB8AB8000AB8AB88B0AB 80002AE2042AE2AA2AC0020022062242AE10E0002A040608E00620E2062AE2AE0000000840000000 00000000000000000000000000000000FFBB6B000001801801903801801912001801801001800000 60440060020001460220361140060A648400024644002E0060460060060000004440840000000000 00000000000000000000000000FF92A1000001801801848001801820001801841001800000608E00 600600020E30A10600400620604000C10E00648612611600600600000000C0040000000000000000 00000000000000000000FF4A19000001801801800001801840001801801001800000600600600700 01060020060040CE00600000430E2000160060060060060000001248040000000000000000000000 00000000000000FF3FF000000180180180000180190D80180180100180000060040060D208023600 20040062060068000480060461060040040060060000000140040000000000000000000000000000); SDR 8000 TDI (0000FFE9F50004AA8AAAAAB24A4AA8C830A208AA800088800022E22B2AA2AA0922222AE282002AAA 422280B522AA0CA2123022AE2AA00000000024A000000000000000000000000000000000000000FF 6CF000000004401200000000020000A2000000000001000100001000008080000000000000000000 000280000000000011000000000000220200000000000000000000000000000000000000FFE05D00 00AAAAA8AA800800842A80C968AA80004080003202222AA2AA8623222AA2421922AA3120400022AA 48A3082182A22AA000000000200080000000000000000000000000000000000000FF4CF900000000 1A01D038D190001380980000002200000000080008062060000000000400000881000A0004226080 000004000000000000010002000000000000000000000000000000000000FF95D000000040000004 860203002004000000009000001080800000000901080001304080000204202100000060400C0008 0000000000000A0000000000000000000000000000000000000000FF573C000001C00A00AC548910 13013410018081210400246402086A0F01021244600A4A401629601000220600600400400604E4A0 000000026200020000000000000000000000000000000000FFC80C000001805E21801001801845C0 1851844005880000604242E0C60800C20162420064260062003120362100C4104106486000080400 206088000000000000000000000000000000000000FF1CF4000001803820801A0981181980502182 2003800012623222E0260C002610E1200861260060082421061400860460C600600008020003E000 000000000000000000000000000000000000FF51BE000001A01800881081805821C238498180A188 0028600200600602048E2E644000628630E20009A2060260360461060A6200000100002088000000 000000000000000000000000000000FFD8FD000201800801845801909105100C01C0000182000060 1410630E00820400648E24600E0840000260B628E804144046417140000000206200040000000000 000000000000000000000000FF095A000001A00801C01801C0180100180180000104202064144069 1601001428600620620E406488006806000004084007046400100400046000000000000000000000 000000000000000000FFB19B000001811E01C01E01801001E00801810001820001600400650E1004 0410E086206506206100446006400026006003087000080200002000000000000000000000000000 000000000000FF3AD1000401C09A01C01A01801801A01A01A00401804140E18408722629008480E4 C600F09706E40123629E2060270060028C6C00000000002000000000000000000000000000000000); SDR 8000 TDI (00FF7063000000000800800800A00800800800811002800000000000200A0020000020A22C800200 200000210210200200200220200A000000000000000000000000000000000000000000000000FFAE AB00000200008000001028212042C3520A4020000000000000000000000040000080000022000088 8220020280000030001000208000000000000000000000000000000000000000000000FF6CDF0000 00000800A00800840C00800800800300800000000600206A0020600020A220A19219A00080200343 385A00278205300A200000000000000000000000000000000000000000000000FFC0160001000018 05809801C11D15A41911915855820040020E10E1362865500D6016236C4651651002611654600641 600F00E086100000000000000000000000000000000000000000000000FFEC9D0000020040800001 090A30A102B0AB0AB1220000040004000000000000200045924018260000D988E00882E004146842 C444008040000000000000000000000000000000000000000000FF7414000080000800A00C008009 1084081090CA44840044041210281290342800201200A42A8A24100AA11228280220A80300200208 0020000000000000000000000000000000000000000000FFC7D00000000000040002800100026001 0020001000018000000088808008000B00202C0000C080800008000000000000282082A000000000 0000000000000000000000000000000000000000FFD1E40000000020000080002002000000002001 80000000100000102020008000000010000000000020042042002002020040000000000000000000 0000000000000000000000000000000000FF5FB60000001341000000000000000500000000000000 00000800100010800000000000000000028804000004000000094000000000000011000000000000 0000000000000000000000000000FF75090000002000200000000004000002000000000000000100 80000084013080011000080000000000815000000000000000000000000042000000000000000000 0000000000000000000000FFF5AE8006AA800E0AEAAEAA8AA8AAF828AA8000AA80002AA2222AB2AA 2022422AA2222AA2AA2AA000393A4268A2AA2AA30BAAA00000000000220000000000000000000000 0000000000000000FF4BCC000201400200208280200284280401000404000080408080480140000C 00401044080400000080000000002402400480500000000010408000000000000000000000000000 0000000000FF1D93000155F11921955955955D55841D558003558000556457556557D4641555654E 55755655649044601615655655742455680000000011600000000000000000000000000000000000); SDR 8000 TDI (FFDD37000000001801881801809805A61805C01041000000068601E1C60B64701364860440A61061 08802000108102806192006006000400000100000000000000000000000000000000000000FFF0A8 000000001C01900301901801A11809C01001800000110600600714600002680600408400E00800F0 40007006006006006826000000000000200000000000000000000000000000000000FF9BA0000000 001801A21881801A21801809801001800000000600600600640082640610400E0060000062000000 06007937826006000000000000000000000000000000000000000000000000FF2180000000001801 C200A1843C1188182984181500001000040064460120114161164C6204206C00D020022660024560 A2026186000000000000000000000000000000000000000000000000FF97ED000000001801800041 80380190184180000100000000040068060220400060060164044070000020D2A0008A0062021060 0E000000000000000000000000000000000000000000000000FF7DD0000000001801800401801A11 C01A01841005800010000480704602220084751621400E00600110200600009280E40200780E0000 00000000000000000000000000000000000000000000FF0AA30000000498018100038A982B80D809 880001800008000410611612228801601615412605401008A00E8460220051021061060000000000 08000000000000000000000000000000000000FFCA55000000001809A01801843C41821C01809819 0000001286006C0601685041608684620C80660040655200E00E4470161070060000002282000000 00000000000000000000000000000000FF325F000000001A01821805851841811821806821000000 800720E00620E0210160160064068060801068820008061860061061060000000C00000000000000 00000000000000000000000000FF6989000000051801C20001805815843821D10011800000848610 7116D4895000400692C04603651000E1120500168061060060060000004900080000000000000000 00000000000000000000FFB1E2000000001811810001901801801809800041800010000621600600 240000408600410E0060000060020060260060060060060000000004000000000000000000000000 00000000000000FFC87A000000000000000000000000000000000000000000000000000000000000 00000000000000000000000060000000000000000000000000000000000000000000000000000000 00000000FF465C000000001001000000000400000400000001000000100000080000000000000080 08000000010000048068000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0573000000001801801A01801A03801841C008018540400040106442046556906432004900116410 00E13608024602E04F006286000000000000000000000000000000000000000000000000FF830C00 0000001801801803801021801801800803800000000000608A06606688660280498C00600080E006 006006806006006006000000000000000000000000000000000000000000000000FF745500000800 1881801C01801C21881901800801800028042800E8D051630E017152084048C3622008600A800446 00A20E006406000080000000000000000000000000000000000000000000FFDE5700000000180180 180580100180180180080B81000400004440020060060A6002244004102010016402006006002006 006006000000000000000000000000000000000000000000000000FF2B8B00000000180180180180 18018018018008018000000000006006006006006002006000006000006006000006006006006006 000000000000000000000000000000000000000000000000FFE6F4000000001801C01C0180180180 1801A008018000000000006006006006006002006004006000806006806006806004006006000000 000000000000000000000000000000000000000000FF07D6000000001801809801A01801A2184188 4801800000000000680408600628600232600800280000E500028006040024046026000000000000 000000000000000000000000000000000000FF7B67000000003801A21809A43025A0181180883380 0000000008640E02608F02F042016084412800006002D060B6C8A084096406000000000000000000 000000000000000000000000000000FF758A00000000380182040980180180180180922100000000 0600400000608822E00600E08404600000201008608200E082486206000000000000000000000000 000000000000000000000000FF1DBC000000001801805801807823C2182180304380000000064068 4409640188680600600530200080800050004042600000F066000400000100000000000000000000 000000000000000000FF74AE00000000180180800184180180181188101180000000060864170260 0000782652600C83600000628825604E486046246006000000000000000000000000000000000000 000000000000FF1D5D000000001801A018838A184D809815801201800001000604600680600908E2 4E04600400E0C0016050000106026016007006000000020000200000000000000000000000000000 000000FF6F9A000000001801A0380584D85180180180100100000100064278060060000060D78040 44006020802008216022A46002006006000000020000000000000000000000000000000000000000); SDR 8000 TDI (26000000510C10920F08CC0CA0940AC8802820800010011100304B02321230212624342300200153 300B08302B20308200A902000000000000000000000000000000000000000000000000FF81570000 003002042080202223C2124000401220000030011080083080C0008001000508C09C800086080092 88288E0981008000000000000000000000000000000000000000000000000000FF12FD0000000008 00900900800800800900C0080880000100000020420A000280304200001E00200001221200200200 2023282002000000000000000000000000000000000000000000000000FFBC6B0000000918418862 0404902C450210041000000000100020C10451020014101100010463400000800808645040000810 1200000000000000000000000000000000000000000000000000FFA26D0000000000304400100000 00400460006440000000060000000000001042882128020000000020002000600000000083180000 0000000000000000000000000000000000000000000000FFD3A7000000001801801A019912018818 8198888380000200004A660A244486A0608850C4040060005060C600638620660600610600000000 0000000000000000000000000000000000000000FF4DC7000000301A41B0B801AA5935B21A01A00A CB8000200400C96C22C070860460A8A0D10CA56000C0ED2E940956B46B4603620600000000000000 0000000000000000000000000000000000FFDB9B000000001801801821A112018018C18958018000 0400000470088CE40621600208620108600002600600840700601628600600000000000000000000 0000000000000000000000000000FF4B96000000001801A01A018018018018018018018000000000 00600200600600700200600400600000600600600600600600600600000000000000000000000000 0000000000000000000000FF8C4F000010001901C01C018018019018018008118000540050456042 514516006106844020016000004012086402802C0300600600000000000000000000000000000000 0000000000000000FFB2970000000018018018018018018018018018018000400000806403004046 08752708580480644000604200002600340E02600600000000000000000000000000000000000000 0000000000FF1D61000000001801801801C01403801841A0080182C000004110604202648E00600A 00608009611084E5128004054520C780650620000000004000000000000000000000000000000000 0000FF4DCB000000001801801801801801801881801801808000020000600200600602F12B386064 AA63680C260200602640A50E046206400080000040000000000000000000000000000000000000FF); SDR 8000 TDI (000000000800C00C00C00C2CC00C00C00C00800100300710340B04B22302F00308300A1020004520 42422002113103013002000000000000000000000000000000000000000000000000FFB259000000 00180580584180380184384180100180000060060160064061163045262060262064200060160960 06006006006006000000000000000000000000000000000000000000000000FF19D9000000200200 2502002002000002002410010000800005000AC88108010048050008008080008C08408208B08008 A4804804000000000000000000000000000000000000000000000000FFA062000000000800902800 80080080080088A200800000200200200214200200200200200208200000A10A00200200200A0020 02000000000000000000000000000000000000000000000000FFAB290000000AA0AA0100AA0AA0AA 2AA0AA0400AA00010002A82A84002000002A92A82A82A83200002002102882002A92012A82A80000 00000000000000000000000000000000000000000000FF18C6000000000000028000000000000000 49213400000010804C81200000010008000001000A00000A80000002A00014A90010000000000000 00000000000000000000000000000000000000FF065A0000000AA0AA0200AA0AA0AA2AA0AA0004AA 00000002A82A80C82080002A82A82A82A80480002803200A82C82A82C02A92A80000000000000000 00000000000000000000000000000000FF3324000000354354304354354354354354000400000080 0450800C08D28800548550CB0828810000A00D48D508109100005505500000000000000000000000 00000000000000000000000000FFBFA3000000400400502400400400000400514000000000000100 10011410010000010010014000010510012010010000100000000000000000000000000000000000 00000000000000000000FF71BA0000000AA0AA0280AA0AA0AA0AA0AA04022000000002202002A802 0000A08AA82204004800000002A00882004402002A82A80000000000000000000000000000000000 00000000000000FFE0C8000000200A00A04A00A00A00A00A00A128028000800810882802D0280200 2002902802802000AA2802C0288280280A8028020000000000000000000000000000000000000000 00000000FFA6EF000000200200281001400001201001321311000000088083080080C00492400481 4CD4C30000810810840848B309408040040000000000000000000000000000000000000000000000 00FF2CE2000000001845805803811A0380D801921001800001040040630651600602680C10E11454 E000006046006506046206086006000000000000000000000000000000000000000000000000FFAD); SDR 8000 TDI (0000155955955955954155954955200955800000600655654555655655450E5501461060000A652E 11012644E2D6556556000000000000000000000000000000000000000000000000FF94330000000A B8AB8AB8AA9038AA8AA0AB2AB0AB80008040062263242B62AE2AE2463082AC2AE0000C202228E4AA 00210E2AE2AE000000000000000000000000000000000000000000000000FFDDE800000000180180 1800800000800001151001800000400600400C80600600604600040622E00020A00204000A102006 006006000000000000000000000000000000000000000000000000FF86320000000AB8AA0AB8AA87 98AA8AA0AB2AB0AB80000040061160140062AE2AE2062822AC2AE00001A3120880027520462AE2AE 000000000000000000000000000000000000000000000000FFDEA800000000180180180080180080 0001001001800000400604401420600600604602200600600020200A006002002116006006000000 000000000000000000000000000000000000000000FFAE9E00000000180180180190580180180180 180180000040042964A413600600208E01000400600014612642632E156446006006000000000000 000000000000000000000000000000000000FF37E60000000018018118408540148038C18018C180 0020403400400422612600401602040620600000600600002608E0064A6046000000000000000080 000000000000000000000000000000FF3DF000000000184180192380186982380380083185602440 0C40600410648644E00611010604E68074659600868600640E20600E180000000200000000000000 000000000000000000000000FF9A5500000000180180180480010082180580080180000840040260 0C00600E1144064000060160A800E00620E106026056016116000000000200000000000000000000 000000000000000000FF098800000000004001010005200200012000010003001200204200103202 30140000420200240010010400206000040420088120000000000000000000000000000000000000 000000000000FFC0CD00000000180180108100105500100000000000000000000002340444044501 48084024400200220010116000000000008000000000000000000000000000000000000000000000 000000FF7301000000000802802820802900820820800810800000200808200200208A4026123121 0200206014203220204211A082042002000000000000000100000000000000000000000000000000 FFF7FF00000000000040050040040040240040140000010010110090412090210810110010080800 00008600020000081001001000000000000000000000000000000000000000000000000000FFEF4E); SDR 8000 TDI (00400802801B01009001441C01010C01800000600004600000000200600401000615600004E00E00 405604E006806006000000000000000000000000000000000000000000000000FF8EFC0000004AB8 048AB8158310038CB8AB0858AB80002AE2A82862AC2A82AA2062AC2302AE20600020620608C20620 22AE2AE2AE000000000000000000000000000000000000000000000000FF148F000000000A028018 0180D801801801800801800000E00000620200000204E00608A0040860002AE0860204AE0AE00600 6006000000000000000000000000000000000000000000000000FFCD180000000AA8888AB9218058 AD8898AB8A98AB80002AE2A834E2AE2A82AA0AE2AE2A22AE12600032220648C32A3462AE2AE2AE00 0000000000000000000000000000000000000000000000FFCA27000000554B309559550211551539 5513295580005465504A60D255055248655644253445600000245611000220255655655600000000 0000000000000000000000000000000000000000FF2F5F0000000008408018010C10010058010018 01800000600000600600000240600600200621600001213604400201200600600600000000000000 0000000000000000000000000000000000FFD8D30000000AB8018AB8AA9200AA8820890888AB8000 22C2260140062AE2AE0862AE2060040020002020026AE2020022AE2AE2AE00000000000000000000 0000000000000000000000000000FF1D2D0000000018038018008080008400410008018000004006 4CC0560060060460060064340D00000A808000008020000600600600000000000000000000000000 0000000000000000000000FF9542000000001931801801883801808803042801800008408E004286 0060062160060AE10420200000642E00604E15600600600600000000000000000000000000000000 0000000000000000FFBD460000000018018018018018018008011088018000004006004906006006 0061160060A430600040E10620012610621600600600000000000000000000000000000000000000 0000000000FF2B03000000001801801801800001800001240801800080600600000E006006006006 00280C01600010202A04620A04A04600600600000000000000000000000000000000000000000000 0000FFB2370000000AB8AB8AB8AA8AA0AA8AA0AB0068AB80000060062A82262AE2AE2AE2262AA214 0260000222024884022020862AE2AE000000000000000000000000000000000000000000000000FF 014F0000000018018018018000018008010008018000006006007006006006006096020806006000 206206026006006406006006000000000000000000000000000000000000000000000000FF0C6E00); SDR 8000 TDI (2AA804A32C14820C028AA9428AA8AA80002AE0002AA2270222022AA2400A22AA0120002020122AA2 AA2AA2AA2AA2AA000000000000000000000000000000000000000000000000FF0F68000000001C03 811901901901800120001000000000000000008000E90600002800400600C0000100100040040040 00000000000000000000000000000000000000000000000000000000FF980C00000000012810002C 20A03000001000000000000000000000083000480001004100062A00001403200060000000000000 00000000000000000000000000000000000000000000000000FFCC64000000200B00A01501421405 00180108081580880460000060032C088200E00410010600E0500360AE08C0460060064D60161000 0000020A000000000000000000000000000000000000FF3F30000000401C008418018918018C5943 001821900800610051601600022A00600C40805614648048620620420E0364260061060000000000 02000000000000000000000000000000000000FFB383000000001C00821811081101083821001801 800040604000E00600000210604600808608608000608600C00E02613600E40E0000000000000000 00000000000000000000000000000000FF50790000002018008018C982984380180108182B888020 602000601A0200C008E02608011E00E62818620600403600E2060460860004000000000000000000 00000000000000000000000000FF7D45000000400900801A01401C81221C85C00801800004608148 600228144A00600C201046046000454034304406006096326A061000000002080000000000000000 00000000000000000000FF9457000008000C00081801081801003801000801800000600034700604 8282A461044A244720410044600640C0060260060060060000000000000000000000000000000000 00000000000000FF3F74000008441C00F01801081021005C05811E01800001600142611210121350 64C620200640608033600605400E0060078070060000000000000000000000000000000000000000 00000000FFEC45000000221A20801C0120BC01401B83009C01800000E0000060A60C200A0C6A2610 244601E00000E8064240066460070468060000000000000000000000000000000000000000000000 00FFD0DA000000000820801C41C0B601C0180140080180000060001070400080A200600402108F00 6200006806004006006006006006000200000000000000000000000000000000000000000000FF2A C2000000001D3080182DC830B1801801025801800000600001600400000214E80408000600600008 6146444086086006007006000000000000000000000000000000000000000000000000FF98390000); SDR 8000 TDI (0000800000800C00800C00C00824800000008000000200600225260A102003DA2080452262002402 1C2C0301200308A000000000000000000000000000000000000000000000FFBE7800000001270180 010B805C339459158158559140000000210017006507297406CC6106514510D0612F12650E406057 006416406000000000000000000000000000000000000000000000FFA2680000000000810100011A B00103908B08B08102A18082000002202250000C00A02000008040000A88888A00A906082840C004 004000020200000000000000000000000000000000000000FF534B000000010480800010800C088A 090A812832912000000040000A0028828130035020820024081020D214240200200A00240A202000 000000000000000000000000000000000000000000FF031F00000000200060800208202200C00000 00000000000001810000000400420200820000410000A00800000110000020200000000000000000 000000000000000000000000000000000000FFE37F00001000000000008000000010000000000400 000000400000008000010D1000100100480080C01000001400E20400800110040000000000000000 000000000000000000000000000000FF02D600000051220040040000020040000020A20000010000 00000500000800000001000001000000208000001448500000001000000000000000000000000000 000000000000000000000000FF963A00000000000000000020000000000010000000080000008000 21000001000000000000000000120000000081050800800000000000000002000000000000000000 000000000000000000FFB3DF0000004208AA8AACAA8AA8AA8AA8AAC208AA80002AA0012AA05B2AA2 AB2AA2AA2AA2AA2AA0000022AA2AA4034032AA2AB2AA000000000000000000000000000000000000 000000000000FFA5D70000002004405042004404002010020004010008004000004884A515200050 0C90D000100000000000000000001005005004000000000002000000000000000000000000000000 000000FF929D00000010DD55D55955F55D55D55955811F5580015560005560845575565565575545 5755600041655615710E14ED57556556000000000000000000000000000000000000000000000000 FF5C790000000AA89084092088C934CAA8088AA8AA80082AE0002AA22B08200A2AE282A432AA2420 004CA5222AA2AA2AA2AA2AA2AA000000000002000000000000000000000000000000000000FF47C8 0000004202004004000002000000000A20000000000000000A000008000008000000000000000A00 00200020000001001000000000000000000000000000000000000000000000000000FFF9AC000000); SDR 8000 TDI (21800081801A01881821A21803000010000000000600600022608650201202000080E04400610600 602E006006406000000000000000000000000000000000000000000000FF2F6E0001000000219004 19901C05881805C219810000000000000446006009208804A4404E0A48601020068C680600612600 600600E000040000000000000000000000000000000000000000FFDC170000000000018000058418 01809889811809008000000000000604601000C23400630210520084710310D02E09600600E00601 6000080000000000000000000000000000000000000000FF21EE0000000000018004058018058018 03801801008008000000040600600104380E1060260000008368C601608600E00600E80620600014 0000000000000000000000000000000000000000FFCDDF00000000204180844380BC85801801C038 41100000000040800600600010622690600A40024000E0060C200615454611610600600000000000 0000000000000000000000000000000000FF44E8000100000001902101B41C018119D181181D8000 000000000246046801800544042D000A640030600604627E10691680600680600000800000000000 0000000000000000000000000000FF4055000000004043800045805805803801AA58118000000000 010C0E00E80002CC46E0288400E00080619E806006206006206E0680600000000000000000000000 0000000000000000000000FFBC54000000000001804401C018018018018C1841100000000040000E 01600015600610210014E0004068061260164AF54748608600600001000000000000000000000000 0000000000000000FF8E1E0000000000058100018118818058818018010000000000000006006002 00600600201440644001600600644600600600E00600600000000000000000000000000000000000 0000000000FF40750000000000000000000000000000000000000000000000000000000000000000 00000600000000000000000000000000000000000000000000000000000000000000000000000000 0000FFAA250000000000000000000000000004004000000000000000000004000004000804000007 004000004000000004000805000000000000000000000000000000000000000000000000000000FF EFC30000080000008000008008008808008008200000000020000002006002A02012802002006000 8028028028420020020020020AA000040000000000000000000000000000000000000000FF9BF200 00000004800000000AC40003011210C08005200084800002204400001000C0400080020080080310 8C0090200828000089000000000200000000000000000000000000000000000000FF949900000000); SDR 8000 TDI (800008089801880009883C8980000001500C000609610640E0A70021000260001330065009461060 07006002006000000000000000000000000000000000000000000000FF2734000000000001800000 001801808001801823800000000000010644600608600640A0260060500020060004060060064060 02006000000000000000000000000000000000000000000000FFA3FE000000000001800000001801 80000180180180000000000000060060060000040020000060000060040000060060060060000060 00000000000000000000000000000000000000000000FF8B46000000000001800000001801800401 801801A0000000000000060060060000040020060060000068008008068060060070000060000000 00000000000000000000000000000000000000FF6C06000200000001A000A0003801800001801801 8000000800000106006007002030806C2028600080E00C04000E0022060020000260000000800000 00000000000000000000000000000000FF7100000200000001A10402141943848021801809A00000 0820000006006546302004026006002040526204A00A0611212E0021101160800000000000000000 00000000000000000000000000FFBA22000000000001800403801803909801A01809800000000000 00060460000001048321060440000029840160620060021070060060000000000000000000000000 00000000000000000000FF7003000000000005800021C01C71861A01811801800100100000004601 604198008480A8420A4000A8A80C04601A81651608600700E0000000000000000000000000000000 00000000000000FF61B7000000000001810101945901E81841A01801800000004000010602754040 0034003CC6200020826A0422E20210E2B68061161461000001000000000000000000000000000000 00000000FFB9CA00000000200180000180B8818018218058018001001200050086006801000204C0 248221020022E54C30E0060060060060060860000300000000000000000000000000000000000000 00FFC3D9000000004001800001801801801809801801800000000001000601600000220420200620 4000C56006A0E90680E28E806006086000028000000000000000000000000000000000000000FF44 BC000000000005806063A25A1188184983180180200000001C015E60618012207E02254219400818 6016946E9688600600E006806000000000000000000000000000000000000000000000FF82430000 000000018000058319419418018458010020000200001006006020046005022006000208006B2500 600608600600E006006000000000000000000000000000000000000000000000FF26EB0000000000); SDR 8000 TDI (4180000D00800000800808800000020000000280600220C043402002002000412002002002002042 40A002802000000000000000000000000000000000000000000000FF4D3800002000002002004048 028820240204000000000000000004068000064001080180866240000403240C40A0004200084378 848000000000000000000000000000000000000000000000FF190400000000020000000000C02208 00444000440000080000000010800100010020AA00060000000004C0200648250090300400800000 000000000000000000000000000000000000000000FFEC3D000000000113900020001A1190018188 1A8180000001000801C60460C61864061040061CE00010E00441600602600E0260060A6000000000 000000000000000000000000000000000000FFFF6F0000000200038200A0409801922481A8180980 0010000008080600EA86926C8E5228888C6000A36D20806B06A8EC86A8E806106000000000000000 000000000000000000000000000000FFEEBB00004400004180000014192B800045C01C8180000002 0000008610600620E02681200621600008600430204E02601602724C036000000000000000000000 000000000000000000000000FF5261000000000001800000201E0180000180180180000000000000 06006006806006002000006000006004802006006006007800006000000000000000000000000000 000000000000000000FF181200000000000180041051180191001180195580000001401008064461 06005306306410406000044014C0210200600400602E006000000000000000000000000000000000 000000000000FF0E78000000000001800000001801800001801801800000000000120600680E8440 2700600600600000680000200624600600600200E000000000000000000000000000000000000000 000000FF6E9000000000000180040000188980000190982980000400000100160562060050060062 0005600000E084902044006016806004046000000400000000000000000000000000000000000000 FF6C95000000000001800000001811800001801801800000000802008608EC1608406662E0A60260 2809E8040A320600A006002050006000000400000000000000000000000000000000000000FFA21C 000000000001800000001881800001911851800004000001041604E007846A06806C008560000028 8608002644601600600602E000000000000000000000000000000000000000000000FF6828000000 000001800000001801800001A83801800000000000000600600620E806142C16C060000021F68400 26096006206806006000000000000000000000000000000000000000000000FFB996000000000001); SDR 8000 TDI (012002014012012000010000004005000801000804C34804908800808000810D00940C0080080880 4000004000000000000000000000000000000000000000000000FF2E810000008000008008008008 00800800800800800000200200000200000208200200240200200012204220215200254200200200 2000000000000000000000000000000000000000000000FF0D900000000002AA2002AA0AA4AA0AA0 AA0AA0AA00000000000002A82A82A94012A82200A82A00006101081080102A80002A8AA8AA800000 0000000000000000000000000000000000000000FFC7D30000000000000004000000002000000000 20000100100000000000001000102008000000000000008008000004000100000080000000000000 0000000000000000000000000000000000FFCB870000000002AA4004AA0AA0AA0AA0AA0AA0AA0000 0000000002A82A82A81202A82A04A83100000200404200202A82002A8AA8AA800000000000000000 0000000000000000000000000000FF87F70002000003542001543543541545543543120000000000 000D505514C0D30510C50D50CC8000D50C20A30D50D10D50550D5055000000000000000000000000 0000000000000000000000FF30C80004004000000000004000006004004000000000800001001001 00100001000101100104000110121101128100115100000080000000000000000000000000000000 0000000000000000FF67DC0000000000AA0000AA0AA0AA0AA0AA0AA28200000000000002A82A8880 2208000002A82A00002A82180002A80002A82A82A82A800000000000000000000000000000000000 0000000000FF13E9000200000400C00200200C00800200A008108000000800000802002002812142 C4280280200080280280280281280280280200200000000000000000000000000000000000000000 0000FFCCB40000000004010004000010010002014014410000000000000800004A48884A08914800 0080008008A0D28800AA0801001000004000000000000000000000000000000000000000000000FF F548000000000001800044001901900003801805800000010000000680600610648E2D4006406000 25610602600600600600602E026000000000000000000000000000000000000000000000FF747B00 0000080112882080742A48A105208C2CA080000000002015522270D321304200300392A001103453 20B443433153483302802000000000000000000000000000000000000000000000FF561B00000210 02000002041600400300203043000000000000400800488A10820A90844809010000AA0810800800 C88900800800000000000000000000000000000000000000000000000000FF40BC00000002040480); SDR 8000 TDI (80080180180180180180000060060000000000060022061440000040000061060020040220040062 32006000000000000000000000000000000000000000000000FF33220000018000AB8018018AB8AB 8018AB8AA8AB80000068060002A82A82AEB00336A860AA2AE00011E2262A240E2AA2C62AE2062AE0 00000000000000000000000000000000000000000000FF3BA1000001800001801801801801801801 800801800000600600000000000600208E0260040060001461160121060020060061460060000000 00000000000000000000000000000000000000FFFDB2000001800001801801801801801801800801 80000060060000000000060B400600C20000200040600600642600602A00600A0060000000000000 00000000000000000000000000000000FF0E23000001800001801801800901801829800801808000 60060000800000460162060860060020200061060160A622600200622A0060880000000000000000 00000000000000000000000000FF227F0000018000018D18018018218A980991684D808018600E00 001801008602E20604E0A421A1201960062460060064120C60060660000800000000000000000000 00000000000000000000FF417100000180000190180382A8438B188180081180000060160000000A 05060C612600E1424022104264262060060060820861040060000800000000000000000000000000 00000000000000FF0A7600000000000002800404A0820000A0088042000000000000008000020008 00A01200060001082501200280002205100200800000000000000000000000000000000000000000 00000000FFDDC900000000200000000A009000004008000000000000000010000600040E2082D001 040608000008C4082080000000A02501000000000000000000000000000000000000000000000000 00FF8FB4002000800000800880800800820800820800000000200200000235804008200222200200 2400002402022142082002002472002110000000000000000000000000000000000000000000FF9A 17000400400400400404400400400400400400000100100500000100100102500108002912008000 01B0400028020601011001000000000000000000000000000000000000000000000000FF36E00044 00C04400C00C10C08C00C02C00C00C0080010030070800030114170832C324201302208000200200 A032122023403083002000000000000000000000000000000000000000000000FFECFE0000018000 01801881801801841811841801800000600600000640000643400E08E22600600011622604600600 6086026046006000000000000000000000000000000000000000000000FFB6B10002014000010010); SDR 8000 TDI (180180180002A80000000000000060060060062260064AE000156000006036206406026206006336 006000000000000000000000000000000000000000000000FF59780000AB8018AB8AB8AB8A18AB8A B8AA1208AA00002A82A8006AAE0062AE22E2AE2AE0AC2AE0000262862822AC2C62262AE22E2AE000 000000000000000000000000000000000000000000FFCEDA00015580195595595595515595595410 09540000550550006D3600755610E5560061502020005525060A2154516156556006556000000000 000000000000000000000000000000000000FF3F4900000180180180180181500180180000480000 00000000006006006006006006006404006000006036002004006086006106006000000000000000 000000000000000000000000000000FF4FA40000AB8000AB8AB8AB8AA8AB8AB8AB8A388980002AE2 AE0000040002AE0082AE2A44AE0A60002AA20409A2060020062AE0022AE000000000000000000000 000000000000000000000000FFBFDD00000180000180180180080180180180180580000060060000 1600000644200600400000600000613020004650000600640A006000000000000000000000000000 000000000000000000FFB37500000180000180180180180180180180982180000060060004C40000 0608000600C20640E00000600602611602E52E006122006000000000000000000000000000000000 000000000000FF879F00000180000180180180180180180180180180000060060000060000060121 062A4001006000086426046016106006406092006000000000000000000000000000000000000000 000000FFB22500000180000180180180080180180180100100000060060000060000069002160144 0632E00000611400212622A00610E046006000000000000000000000000000000000000000000000 FF7AC70000018000AB8018018AA8AB8018AB8AB0AB00000060060002AEAA82AE2220260060A80060 0033E00428A2060022AE4262062AE000000000000000000000000000000000000000000000FF88C5 00000180000180180180080180180180180100000060060000050000070480064840068060004060 04006026006406006016006000000000000000000000000000000000000000000000FF30CC000001 80015580180195495580195595595500000070060005565505574D21374165502D60004464544AE3 3630E55612E106556000000000000000000000000000000000000000000000FF597B0000018000AB 8018018AB8AB8018AB8AA8AB80000060060002A82A82AE20022604C2AE2AE00004632E2AA0962AA1 162AE3422AE000000000000000000000000000000000000000000000FFDA50000001800001801801); SDR 8000 TDI (0000002004000000000000000010000018000000001100060400004000400000202801480C800000 0000000000000000000000000000000000000000000000FFF45F000001801801801801C010098018 1100100008080002000070060071462060060C40242064000464AA00E00602A0160460A62C600000 0002000000000000000000000000000000000000FF6AD20000018018818038038899018C18050010 10000830000000600620600602E11601400C0B60D04960020460060024C650601600600000000A00 0000000000000000000000000000000000FF1F5D0000018018018018038010458018000000000000 00000000600620680620640608400C00E0A008E0AA5060060022A608440600600000000000000000 0000000000000000000000000000FF9CD900000180188180180180180B8A18000000000800080200 0070160064260262861641240A620010600249650600201633420600600000000800000000000000 0000000000000000000000FF7755000001801A01805801889941801C150010080000400000006806 00710601600E016004404010445206A5600204C00E00414E54600000000000000000000000000000 0000000000000000FF4A1C000001801805801801A01A218018214012000000000080006007016086 10632E40645441644040644602601704610600400600600000000000000000000000000000000000 0000000000FFBA09000001801801801801801001803800400000000000009000600601630640640E 2D600DA0E20020608730E20600600580400780600000000000000000000000000000000000000000 0000FF2E71000081801C05881A01A01C41C03C40200000000000000820700680700620690600E044 806041006086086816086906805007006000000000000000000000000000000000000000000000FF 1FC5000081801C01881801C01401801C01801400000000000020700F007006086026006484006000 88724404608712600E88A806806000000000000000000000000000000000000000000000FF416B00 0001801801801C01C25001801801C21000000000000000600600600601680600640411600028E404 0C6806106916002126006000000000000000000000000000000000000000000000FF5A8600000180 1A01801801911201C01C0190300000000000000068168070060860060060048060000460D600E006 00E006002016006000000000000000000000000000000000000000000000FF2BEF0000AB8018AB8A B8AB8010AB8AB8AB8190AA00002A82A80062A6006AAE3262AE2AE0AC2260005160062562AE236236 2AA2062AE000000000000000000000000000000000000000000000FF4A9C00000180180180180180); SDR 8000 TDI (00962048A002000008800402012D8140800802353A40BDD11101A802A82B46AC8A00482040040200 00000000000000000000000000000000000000000000FFA13D000400880042800802840880A8080C A420209420000022500C022829020B309294114202280002208200A032422502A03022A020080002 00000000000000000000000000000000000000FF795B0020000041000A80C009004A048100008000 00000000000001080008004000400008105000900008000002000800208000008000000000000000 00000000000000000000000000000000FF7F7B000000000000000000010000102020000000000000 01000000001382200100002000000182400408000000000000000000000000000000000000000000 00000000000000000000000000FFA6AA000200200200200200400400200010400000000000000080 10008010010010000000000080002480114203000900000890008000000000000000000000000000 00000000000000000000FF9E9F000000000000000000000000000040042000000800000000000000 00000000000000004400000000801100200000000000000000000000020000000000000000000000 00000000000000FFCFEE0000AA8AA8AA8AA8AA8AA8AA8AAE8288880000000000002AB2AA2AA2AA2A B2AA2AA2AA08200008222250200A3222AA2222AA2AA0000000000000000000000000000000000000 00000000FF2363000201001201401401414201201400000000000900100000480000500000500408 00000000008000000002284402011000048040000000020000000000000000000000000000000000 00FF8099000555D55D55D55D55D55D55D55911D09800000000000155655755755755655655635624 60004564C702E326446556CC7557556000000000000000000000000000000000000000000000FF86 F70002AA8AAAAA8AA8AA820AAAAAA8A888880000080000002AA2AA2AE2AA2AE2AA2222AA12A000A0 A22A2AA0020020AA2222AA2AA000000002000000000000000000000000000000000000FFE3440000 00000000200400400000000422022000000080100000100000100000080000000009000008000800 0010008000008001000000000000000000000000000000000000000000000000FF332F0000AA8AA8 AA8AA8AAB808AA8AA88E8CC80000000000002AB2AA2AE2AA2AE2AA2322AA6820001423022AA10213 A0022122AA2AA000000000000000000000000000000000000000000000FF390A0000000000000000 0001180000000100300000000000000000060000060000000000040100000D009000430800020000 0000000000000000000000000000000000000000000000000000FFC5970000000000000000000240); SDR 8000 TDI (280100000B808010000600000400212600602400A31609702008E02601610E00C11612600640D288 000000000000000000000000000000000000000000FF4E93000001800001801A0500180180001082 00018080080006000805402804007824012116026A0800E0570070CE01504E80520E28E208000000 000000000000000000000000000000000000FF8C7C000401800005801A01409801800900C4005180 0011000640004408200620E00400204E0C61004060042A6006114014205006006000000000000000 000000000000000000000000000000FF860C000401800001809840C9180982404848009580000000 0600004400A0240A628008EC06916040126B8E006006006107067006004140020000000000000000 000000000000000000000000FF640D000001800001801C0390181180080090000180000000060010 02302006016020126006A0700004ED16006206006226006006006000000000000000000000000000 000000000000000000FF5EFE000001800005801805811801801900840051800001000640000480B0 4614744000704640608001600650620610E436204006006000000000000000000000000000000000 000000000000FF870900000180000180980180180182180880008100000800060000222020064060 800360160C6000206006046006006006026006006000020000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FFCD8A00000000000000000000000000000000020000000008000000000000000050040008000040 00800800000000800000000000000000000000000000000000000000000000000000000000FF133D 0000008000018008000088008A080080000080000000840008028800020024020824028030400020 0200200200200A800002002000000000000000000000000000000000000000000000FF296D000000 00000000004300002001102009020000001088000208488001002000200240508008001081480A52 908C1020000000000000000000000000000000000000000000000000000000FFF146000000800000 800A00800800820800804004800000000200000207207A31201A40330201200144A4024020420020 22582002042000000000000000000000000000000000000000000000FF9205004401904145831925 841943D331358340418C4000004650140C52652634F8C4424146046408046886006857546D06C070 46406010000400000000000000000000000000000000000000FF0281000000000001101223111031); SDR 8000 TDI (00000000000000000000000600600200600600400600000000600600400600200600000400000000 0004000000000000000000000000000000000000FF16C2000001800000001800800401A000000000 00000000000000000600680200600700480400000000680600400600200680400400000000000400 0000000000000000000000000000000000FF69870000010000000018008301058884210400000000 0008000008060060A2907046404032A288C440601602001624604640008404000000000400000000 0000000000000000000000000000FF2116000001800000401800C000018020130000000000000A00 00090330E002006506094802000C1003684630012610608602400440008800000000000000000000 0000000000000000000000FFBBA9000001000001C01A00C01C038000090000018000000006000000 00100400601700E10E00000000650620608620601E18600600400000000000000000000000000000 0000000000000000FF091C004001900001801800C21D05A087211041050000000006000000801004 406A071860460186A420C28300600602600280608620400000000400000000000000000000000000 0000000000FFF773000601800001801A00811901C840040400018000001C06000106490145086152 2040C7C418100460561460360860C644580604408800000400000000000000000000000000000000 0000FFC46A0000018000018018008018118002000000110000000006488016A01004916222015106 020000006006A06107086306284006024000000004000000000000000000000000000000000000FF 64B10000018000018018008018898000010020898000000024210204826004206806006906030201 806006416086892086804007804000000004000000000000000000000000000000000000FF2C9800 0001900001801801A01A01A0010180000500000800240002104AE005176CCE8760070000081A60AE 00E00602A006D04006006000000004000000000000000000000000000000000000FF287900200180 0001801A00801803800801080001800008000610000708E00600690A0860260000080260B6806806 046206004806044000000000000000000000000000000000000000000000FF9E30000481800001A0 1801801A03808A01800001000000000600000220600E006002007806000005846406006046006006 80E00600600000000C000000000000000000000000000000000000FF3610000080800001C0184401 1C0B80825104000180000000060000450020AC00600460200604741002631600E00618504688E416 104840000008000000000000000000000000000000000000FF709900040180000180180000181180); SDR 8000 TDI (0000000000000200000068020408000AA00004600400801000200808100804884102000100000001 00000000000000000000000000000000000000FFF5DF000101800000051A0180C10180A800800000 0000000000000002206206006046016A0202200004C45E046006448B16A040060000000000000000 00000000000000000000000000000000FF8CB50002C180000412194B808409B2BA00800000000000 00500008C1006D14806486D46286D0288894C8C690601681010E304AC60280000008000000000000 00000000000000000000000000FF8C8600040D8000000098019000C3801834900000000000040000 021143600420E03681603202002040440E4162868C042604800E0000000000280000000000000000 00000000000000000000FFADC2000001800000001800800001801000000000000000000000000080 60040060060040060000008040060040060000060058040000000000000000000000000000000000 00000000000000FF6A25000001800000101C05010411800D048100000000500050010486D9608605 710600F01400C000C0691286300600C8071080060000000000000000000000000000000000000000 00000000FF4E13000001800000001C01000001800800000000000000000000000200780600604E00 60CC0042802060072020070044160040040000000000000000000000000000000000000000000000 00FF1218000001800000001800000401800401800000000000000000080600642600700788580440 403004E084001006104047800806000000000140000000000000000000000000000000000000FF9E 9F00000180000000180040000180000100000000000000002200221060060060261AC0042BC7000A 79060482AE024806024004000000000040000000000000000000000000000000000000FFD7140000 01800000001801C00201A0080180020000000000008000860062C600605600E152200054C3600640 600688A44E008006000000000084000000000000000000000000000000000000FF76BD0000018000 00001878800201A2A101800200000000000080000617661E20601E60528400000000680619400680 2006104806000000000000000000000000000000000000000000000000FFC4BA0002018000000018 05800009834803008000000008000842884320600222614685650A33040088600602252E04600684 0004000000000004000000000000000000000000000000000000FF1FBB0000018000000818008080 01800001000000000040004000020200600201600610400600000044611600000600600600400400 0000000004000000000000000000000000000000000000FF8AC20000010000000018008000018000); SDR 8000 TDI (00AA00000002A80010102302A82A82103202A82A00802A80012A82A82600202A82A8AA8000000000 000000000000000000000000000000000000FF7A9E00004800000020000000040011008A00002400 000000080010900104A80000000A0000010322200280001000000120089000220000001002000000 000000000000000000000000000000FF659B00000A0000AA0AA0020AA0AA0924A00000AA00000002 A80000A12A02A82A8A002292A82B00102A82002A82A82082402A82A92A8000000200000000000000 000000000000000000000000FF3F6D00030400015415435235415400442040008000000005400004 414C0800D50D48C08D50D410008D0830D50550D50C11220550108000000080000000000000000000 000000000000000000FFC8F400054000000020011000040040020400000000000000000002000010 010000C1000001001281001150001001081111801800000000001000000000000000000000000000 000000000000FFB6DE0000000000AA0AA0880AA0AA0400202000320000000208000880A200002A82 A02002A82A08000000002A8AA82208002082A8000000000082000000000000000000000000000000 000000FF0D33000250800000000A00C0020092080080000800000000400000120032C280280290A8 02802000882802802002812002082002248000000800000000000000000000000000000000000000 FFDED400030400020020102300020120D2920003000000000900001220894810800814041004808A C0A28B28000804904CB4024000880000000800000000000000000000000000000000000000FF089F 00008B800000041A15800001801001800000000000000000028E00602600600644650C0064000060 561260160AC016914406010000000000000000000000000000000000000000000000FF5BFD000400 800000010840A84520CACC34800000000000000000104340B20340204380A0230430214C3503C020 03402282403822000000001080000000000000000000000000000000000000FF5E380002BE000200 00004A4000423502020002000000000800000890808880800801280810880C208208801090889008 20000440800000000800000000000000000000000000000000000000FF2336000000800002220821 00000880180080000000000000080000020020020028024231020020480022024030020030028A20 2A008000000020000000000000000000000000000000000000FF1FC8000001800000400490080420 02407C080000000000002000070041004060E00804808820600068010120020003400090C8840200 00000008000000000000000000000000000000000000FFC28F000001800000288404100080080000); SDR 8000 TDI (00000000000000002600052600600484620404EC2100401600E00600200600641600000000080000 0000000000000000000000000000000000FF245A0000000000000018218018018000938018000000 00000000050600600E00600031400010610010612600400600E00600608600000000008000000000 0000000000000000000000000000FF2BAA0000010000000018018018018000019018800020000000 02000600604E08601000E00001614000614E00602644600600630600020000000000000000000000 0000000000000000000000FF97D100000000000000180182190B88010180188000A00100002A0206 01002622604050E08846E00024E0A650A1160064160260A611800000000000000000000000000000 0000000000000000FF6EDA00000100000008180984180B8800418218000080080000300406080086 2460000260B008640A31600603200608600602604600000000000200000000000000000000000000 0000000000FF46F20000018000000800100000800000000C00000000110000000000010108000048 54002040048002000032000032020800000008020000000000000000000000000000000000000000 0000FF98690000018000400000001020020000000000000000000020100280000008006044040104 086040000044120508100020400000000000010000000000000000000000000000000000000000FF 1A93000001800000000808800880882148800800000000000020800A1A20023AA002082002302050 10A012002172002202002402000080000000000000000000000000000000000000000000FFFF8E00 04000004404004004004245004004000000000001000001001001000001089209128121201000201 009001001081401001000000001000000000000000000000000000000000000000FFD7CC00040080 0400400C10C85D00C02410C00800000000100010920700300202300B00B04A04340100A00312B433 0032C3003003000080001000000000000000000000000000000000000000FFD2AD00000100000000 180180184180000180180000000000202000960A400E48E1242A6004206020006226006086086006 006006000000008000000000000000000000000000000000000000FFF20800020900000000104200 14012020450010000000000000000D4401480480092C888004808C11000840800804888B04804804 000000000C00000000000000000000000000000000000000FF403D000144000000000B1080080085 0000800800000000000000001290200200200200280200200000249200200200200A002002000000 000000000000000000000000000000000000000000FFCB250000000000AA0AA4400AA0AA0C029800); SDR 8000 TDI (0000000000000556426550D5454C5145475560244165525265560845525545560060000000040000 00000000000000000000000000000000FF24DB000001800000000001000001801001800000000000 000000000602E0000040040040040060000160120160060AC0020040060060000000000000000000 00000000000000000000000000FFABDF0000AB8000000AB8E98AB8AB8000AB8AB800000000000000 02AE3062AE2AE2A60042B62AE0220822AA0042AE40A2AE2AE2AE0000000000020000000000000000 00000000000000000000FF417D000000800000001805801801800001801800000000000000000608 E0060060061240060060044520021040060000060060060000000000040000000000000000000000 00000000000000FF1E68000001800000001801801801800001801800000000000000000602600600 601220C00A00600000600622C0065260060060060000000000000000000000000000000000000000 00000000FF148F000400800000001AC9801801892041801800000000000000000E00610600600200 441210EA0000652E0940060C6006056006000000000A040000000000000000000000000000000000 00FF0424000001800000001801001801A40011801800000000000000014600204600600600400600 6000006002804006002006506006000000000000000000000000000000000000000000000000FFE2 670000AA8002000ABC030018AB80008380180000000008000002062AA20E2AE2AE2AC0A62270892A E0062242AE20A2AE0062AE000000001004000000000000000000000000000000000000FF7F600002 01800400001805001801928001801800000000100000040600011600600204614200E84010601704 6006016006006446000000000800000000000000000000000000000000000000FF416D0001548000 00155811001955A3214180180000000000000000D65504265565535560124C640C55613741655654 E556116556000000000004000000000000000000000000000000000000FFEA890000AB8000000ABC A98018ABA0208B80180000000000000001062AC2062AE2AC48C4142A62002260264042AE2A22AE2A E08E000000000080000000000000000000000000000000000000FFABAC0000008000000018A38018 01880013801800000000000000040600408E0060040063240160800062060C600600200622600600 0000000200000000000000000000000000000000000000FFEBB90000AB8000000ABA898018ABA080 41801800000000000000005E2A80462AE2AC0040AC20610023E706BB42AE2A22AE2AE02600000000 0000000000000000000000000000000000000000FF3DBF0000008000000018038018018A40218018); SDR 8000 TDI (000C000003000600002602614E50E32100E000046096036084216026006000006000000020000000 000000000000000000000000000000FF481800000180000000000183400181080981008200000A00 000080062060240060862460A084E090016006006004002026002040046000000000000000000000 000000000000000000000000FF440400000000000000000308402180804180000002000001400201 0600E00510644E40C01A04640008648600608C608006400000006000000000000000000000000000 000000000000000000FF5F1E00000001000020000080C00180088192802000002000000000060000 011268401264008A603004E03604E006802087502134026000080040040000000000000000000000 000000000000FF43DC00000180000800005080004180080180000000000000000004268000002140 100CE00040E0000B6026006006102026002C84006000000000000000000000000000000000000000 000000FF51D700000000001000000000060380A001800000000000000000004E0004104450242140 0500E000006046007906001D47408004006000000000000000000000000000000000000000000000 FF836A00000180020046000040444380A041800000000000004000040E380209034C04145034C064 0025648700F086400286009404006000000000000000000000000000000000000000000000FFD85C 000000000000400029A0000180080180000000000000800001072000010860100068400260044861 06016007086006007102006000000004000000000000000000000000000000000000FF29F3000001 80000000000100000180000180000000000000000000060800000068280041200060020060061060 06044006004002006000000002000000000000000000000000000000000000FF2F53000100000200 40000180020180080180000000000000000000060260010060040060108060081365570568060860 06007006006000000004000000000000000000000000000000000000FF985800012B8000000AA0AB 0AA0AB8000AB8AA00000000000000002AE20E2A92AE3D42AC2462AE0103060062462AE20C2AA2AC2 AE006000000004000000000000000000000000000000000000FF5A22000000000000000001000001 80100180000000000000000000060160000040000440020060020C600601600602C0060040020060 00000006000000000000000000000000000000000000FFE54D00002B8000000AA0AB0AA0AB8010AB 8AA00000000000000002AE3062A82AC2002AC288AAE0002263222862AE2042AE2AC2AA0060000000 04000000000000000000000000000000000000FF653E000154000000154115154155801155954000); SDR 8000 TDI (0000000000002881201408008000080082C000800041008824088000000000000000022A00000000 0000000000000000000000000000FF071A0002000000000000000000004400000000A00000000100 00000000000000000886014119080101000000000000000080000000000000000000000000000000 0000000000000000000000FFC86A0000800000000000240004000022000000000000000000000000 0C00010008410000288005100000290000000810800308B000000000040000000000000000000000 0000000000000000FFD3750000000000000000000000000000000000000000000000000800000100 00008000008000000080028000000005045010000080000000000000000000000000000000000000 0000000000FFA79880002A8000000000888000AA8A88AA80000000000000000012AA24A22A2AA20B 2AA3422AA0002ABC022AA2AA2020022023022AA00000000200000000000000000000000000000000 0000FFC84F0000010000004000494004011022014000000000000000000804084801281104420905 000000005000005000440800820804004000000000000000000000000000000000000000000000FF 01A1000155000000200115000755915D55800000000000000000055650C4C7557C24556215556411 55613755655650F44E517405556000000000000000000000000000000000000000000000FF655800 00AA0000000000028000AA828CAA80000000000000000012AA222A8A02222A112A422AA0202AB2AA 2AA222002AAA90A2B22AA000000000000000000000000000000000000000000000FF77BF00000000 00000000204000000200004000000000000000000000000011000088000000800100004000001000 020100020830000000000200000000000000000000000000000000000000FFB66000002B00000000 01018000AA8808AA80000000000000000002AA21A2630122220020122AA5002AA2AA2AE3321122AA 4022A22AA000000100000000000000000000000000000000000000FF6F0000000180000000012000 000000000000000000000000000000000800000860040841200062C0000004000108448004490014 000000000000000000000000000000000000000000000000FF3B2600010180000000000A00000002 A0000000000000000000000000020109430108248210800000000000000000100000040000000000 000100000000000000000000000000000000000000FF36F40000018100000000018000418008018C 00A00200200000000006210007086006006010886140106026006014006106286088006000080000 020000000000000000000000000000000000FFE72600000000000000000392000180090980000400); SDR 8000 TDI (000001000444600E04E0054044962064204054061061560060040040960000060002000000000000 00000000000000000000000000FFBFBD000410000041801D4D880C01002011965901000000000010 042E08E0860050D152010600408A9340560254062069007A02040000040000820000000000000000 00000000000000000000FF678C000021800041801831801801801001C01801800000000000000600 62062040000C800608C00200C08600610608E8000400060000060004020000000000000000000000 00000000000000FFD9D100000000000182182190100180141182180080000000000100560D621601 410051021290634881490610604E08E00000000E0000060000000000000000000000000000000000 00000000FFCD06000041800001801801801881803803801800800000000000000640610622600000 01064160002242060260062060002803060000060001000000000000000000000000000000000000 00FF40E3000001800000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF2F F0000001800000000000000000000000000200200000000000000000000080100400400000080000 4000005001000004004800800804000000000000000000000000000000000000000000FFFAE00000 00000801A00800800801A22000A028008000080000000024002002002002802802002000002A0602 200A002012802002000002000000000000000000000000000000000000000000FF805D0000010000 002840010000001090012081002001000088000200030140200148A208010208010808102005400A C2C0000000040800001000000000000000000000000000000000000000FFAFF2000200A008008028 00800800802800802C04800008000010002200208300300200214291280041296200300740200A00 2003000002000000000000000000000000000000000000000000FF34B40080011019018238118118 514C5813811835900080001000004E0AF4CE5065541543564460D245604600608E026105C1481700 000600080A000000000000000000000000000000000000FFB6A90040010000011911010004010890 01009182000000000808020442C0242400AC204000130400280E8C6306AC6BC2A400400002000000 0440000000000000000000000000000000000000FFA6CA014000A80880800808C08C30AC48108088 0A88000000080000320432124032A20924A344201024242200220200B00241201300000200000000 0000000000000000000000000000000000FFFB890000000000000AA0802000000000020006000000); SDR 8000 TDI (0000002600602610C0A6006204006004046020446A1600E14600C004104106080004000000000000 000000000000000000000000FF7E8E00060180000181184581181480010180040100000065400400 170363060040064460144869049148028160060264060C4004245006020004000000000000000000 000000000000000000FFA14600000180001FC01901A00801000001841C0100000008200000070060 8600700701E34428604480C10600490E007087006044021004000000000000000000000000000000 000000000000FF90DE000010000005809933A20801530011C01801000000068006004602F006C1F0 062274AC84704410400660C00680E06600E004090004080004000000000000000000000000000000 000000FF2E8D000001800001801881808C15000101841841000000000000184F0064460861220020 038061248A50C6044D06027C02122024200104040004000000000000000000000000000000000000 FF2028000000000001801801A0080340002180180100000010000000068160460070C30230060070 00004006114117016013002084000004008004000000000000000000000000000000000000FFB7AE 000001801001801801800C0108800180180000000000000000040160060840068460060060360850 0788408680E026807845808004010006000000000000000000000000000000000000FFB3C3000000 0010058079018188A5821041A01800800000000004005C006BC608600608F4062463880040060770 1600601618612C200004000004000000000000000000000000000000000000FF9717000011801001 801809801741040009801800000000020000000400640621614288A0064064040040062048060060 02002016400006000004000000000000000000000000000000000000FF642D000100001201801801 801003801001801E00800000008000040C04780640600208208E807004004006086026037802023A 06000006000004000000000000000000000000000000000000FFF8C5000081800C19801C11C04800 220001C01801000000009810000C02600603C1D444C8068CE6087049468040060060650242240000 04000000000000000000000000000000000000000000FFF6E0000010000841801925801800040009 92394902000000000000040060060A780401404628F01002D0170445160862842840461000062000 00000000000000000000000000000000000000FFDC96000001800001801E11C04C02801001E01830 8400000000000004006006304805025032A460000441061279560CE2050040040800044000000000 00000000000000000000000000000000FF2696000400000041841801801900A0140D801800800000); SDR 8000 TDI (0000060272268268A00268A68068A08168A685120628E0CE02EC16D0F08600080000000000000000 0000000000000000000000FFBC3D000041904001801A018858018A084380002480000060C00004C6 00600630E200A8E21602640020600E08010604780628600602624E00000000000000000000000000 0000000000000000FF9CE00000000000018018018018008000018002000000006000001806006006 00400000600400600000400600000600600680600400480600000000000000000000000000000000 0000000000FF78A8000040040001C01905809841000C518042148000006000410107406006547044 0C600703600001610E01490601604600082600720680000000000000000000000000000000000000 0000FF444A000001800005801801801A00000001802000000040600000008600780600400500640E 00E00800420623505612E006801016006007000228000000000000000000000000000000000000FF F45A000000000001C01C01801E01000C018000018000006000000817806006107804006004886480 526886004C8640744E884004804026000000000000000000000000000000000000000000FFDDCE00 0001800001801801809800000001C0000100000060080A002602E02E00400C28F0048D63804C462E 04400E20600610404C004446000010000000000000000000000000000000000000FFE0C400000000 0005801801809801800801C020018000406800000096006006107002106417106C0C10610EC13556 2CE456000016006006000224000000000000000000000000000000000000FFCA0500000184000180 1805833A4782280180000180000068000012070860C6106282006A0C016904004806082206426806 800005004006000004000000000000000000000000000000000000FFACBD00002000000180180182 380080202980200B000000600834842604E0060240CE50E41610600008648690E28E05604600400E 006006000004000000000000000000000000000000000000FFE1B500000180000180190180180082 0001800001000000600000008628608E40440604600400640201404E006006006006004004004006 000006000000000000000000000000000000000000FF3D2000000000000180180180180080000180 00000000006000000006006006004002006004006000006006002006006006000004004006000004 000000000000000000000000000000000000FFE537000001800001C01801A0180080000180000000 00006000000006006007005003006804806800804802802007007007000004004006000004000000 000000000000000000000000000000FF3EF500000000000180180182180084000180002100000060); SDR 8000 TDI (02A82A92A82A82402C00082A80082A92A82A82A82A82402402A80002A80000000000000000000000 00000000000000000000FFBAD500035414A3543543542A04CA2921541544D2000000100000054055 0550100D40D50480C00821550D50400D50D50D48D408008011500008000000000000000000000000 00000000000000FF4FCD000400400400000000400000400400400042000000000000000000000180 10810002C10010010000018010000000910910010010000010000000000000000000000000000000 00000000FF462100002A0800AA0AA0AA0202080000AA2AA00200000000000002202A82A84002B0AA 02003080002A82A80202A82A82A02A04100000000000000000000000000000000000000000000000 00FFE33A000280010200C00A00D08940B14A00800310800000280000011280280230280A0128428A 282080280240280280280281280A802902000800000000000000000000000000000000000000FFF7 58000201222201001001205005241201000240000000400000000400400485080480489080480080 080088D004004814804B20000A4C000800000000000000000000000000000000000000FF3B380000 29000001901A01801A018090019000058000106000000A2600680640600400600602644010601608 408E20612600400620E446000000000000000000000000000000000000000000FF1FED0004008004 00A408828A4912C20C40A04500800000200000000290340310348220300A40301121328322340694 A00A483093123002001010000000000000000000000000000000000000FF064C00022220020B1020 263005092410615043800000000000000040021400B28820800808C00840C09080D00D1090488092 8A00000E00000810000000000000000000000000000000000000FF1701000001000000800801801C 00010880800000800000208000100600220240240262221300208010200200200284302220200202 A026000000000000000000000000000000000000000000FF56E40000018020804A04880860200004 0000202000000000000010210000000800040000000002000060000442806A80504840004C000000 0000000000000000000000000000000000000000FFDD3700005180000060040044009408A0020000 0E00011000200006818000000003018880800600222004300880008001090001182100C800000200 0000000000000000000000000000000000FF00EE000001880021841B01A21A038218098800008000 00600000080610602600608000602600641001610E02000601680680600610600600000000000000 0000000000000000000000000000FF2C9800020200034D92394D8218ABA14A918823108000806000); SDR 8000 TDI (000360260860000C600E08605002000600600600E00611000E000006408000000080000000000000 000000000000000000FFD1CC000001000001801844847839801889805809864000020640002002E1 9E48600008634E40E080110096026056106006000486080106180000000000000000000000000000 000000000000FF888F00000080000180181080988580080D80181180000000061000201060060060 0800E20600E4800000C604E006406006000106100006001000000000000000000000000000000000 000000FF283E00000180000180004400008002000000C08008400000004000000000204000100300 20280408020020010020308000110010000080200000000080000000000000000000000000000000 FFE8C500004180000180004404010002000000400000000100000080002000080000240004540000 28406000090128020088044004004000000000000000000000000000000000000000000000FFBBF1 000001000000808819852824000825820800800000000430000010202200200200A1860000401B00 9200221208A02208A602002002010000000000000000000000000000000000000000FF0390000440 00040042240048D40140140240040000010010000010210010010010810010012210D100D0011010 01001201101401009004000000000000000000000000000000000000000000FF9AB7000400000400 C00C14D28CC0C00C44C40C00800100100600100100300300308301312322308313310300B04310B1 2302B00300B002000802000000000000000000000000000000000000FF84C300000100000184D841 001801821001805801800001000620804040605600604400620C0060002060060065160262160040 06004006000000000000000000000000000000000000000000FF57E50002012042002010012B5045 2CD201401001000000000400000080400480480488C13500480080480100500080080080C8008048 04000800000000000000000000000000000000000000FFF0FB000100840000800800800A00800800 80084880000000020008000028020020CA042A020020100020020020020020C20C20020020020002 00000000000000000000000000000000000000FF3FC900002A08C0AA4AA0AA0000880000AA0AA292 00000000000012A92A82A82A82102110002A80002A82A82A82A92A92082002A80002A80004000000 00000000000000000000000000000000FFE74700000000000000000000A000020400400000000000 00000000090008010480000008500280000000009480000000000081200002000000000000000000 00000000000000000000000000FFBB4A0000AA0A80AA0AA0AA0CC4AA1340AA0AA480000000000000); SDR 8000 TDI (2AE2AE2AE2B62AE3A42020202A80062AE2042B60042A60842B62AE00008000000000000000000000 0000000000000000FF35E40000000000010019310018409080018018018000000004000000006006 00600E00600C00A00400009600611400600401643400600600000400000000000000000000000000 0000000000FF866C0001018000018018050018028240018018018000000014000000006006006002 00600014248000022600602600E33400200400A00600000400000000000000000000000000000000 0000FF6C0C00000000000100180100182AA002018018018000000804000800006006006002006800 0021100008460C6006006004002004002006000804000000000000000000000000000000000000FF FB03000101800001801801201A808C2001801835800000000400000000600600612E006004002800 00050E006006006004006004006006000004000000000000000000000000000000000000FF901600 022A0006AB8ABAAB0AB801C088AB80188180002A80040002A82AE2AE2AE2062AE2AC2AB0002A8046 20E2AE2AE2AE2AE2AE2AEAAE001004000000000000000000000000000000000000FFF5E000040180 0401801C0080180281440180180980000000040000000060060060020070200040000090A6016006 006004082404083006000800000000000000000000000000000000000000FFF5CC00055400015595 5954D558D5822955801905800055000400055055655655652255655055411555048E4CE556556556 42A556553556000004000000000000000000000000000000000000FF252C0000AB8000AB8AB8AB4A BCA85200AB80188180002A90060012A82AE2AE2AE2A42AE2842AAA400A000E2A62AE2AC2AC224014 24C2AE000000000000000000000000000000000000000000FF7BF2000200000001801C00A01C0008 8401801831800000000600000000600600600C006004006000000006006007004004084004004806 000000000000000000000000000000000000000000FF302C00002A8000AB8AB8AB0ABA89282AAB80 186780002A80060002A82AE2AE0062B42AE0182AA0004004062A62AE2AC2AE23C1460242AE000000 000000000000000000000000000000000000FFFBCC000081000401801A0180180300080180180180 000000060000000060060160040061000068209080940060068040060044AE094006000800000000 000000000000000000000000000000FF886100000000000180180100184082900180189180000000 0600000000600634600800622600240022024600E006006004080004200006000000000000000000 000000000000000000000000FF5FCF00000180000180180080184182190181188190000004060000); SDR 8000 TDI (60062040240A048E3D62A10800000B60860065060240502100040200000000000000000000000000 00000000000000FFD158000001001800481800409041000C83803803942100000000000481640E12 6917002406006008008436C1702E00812E30E1040042064802000080000000000000000000000000 00000000FF471F000001001A02001A02043103000801801801800000000000090400700E00404600 000680634802809604610E0000260060040251060000000000000000000000000000000000000000 00FFB539000001001805901900443880010841801801800100000000010700F00E01602440202E10 600180000E036047815857804004005084000000000000000000000000000000000000000000FF69 50000021001C01C81A90009800008C21A01801800000000000000700F00600D20D2080AE00655084 100680693680D50F00C004015004000000000000000000000000000000000000000000FF775A0000 41001C01C01C04011805800E01801801800000000000100080680600720F01630702E00401088700 700600000601602A042806000004000000000000000000000000000000000000FFFE2C000001001C 01801C2A001824892801A0180180000000000000000060060060040061364CE40880000400600700 000602C002122004000400000000000000000000000000000000000000FF477E000101001801A019 0000190184080180180180000000000000000060060048D680400600610000000480700600480688 6006016006000004000000000000000000000000000000000000FFA4CE00012B0018AB8AB9100AB9 489408AB8AB8AB80000002A80000002AE2AE2AC2442AC206106100AA82AC2AE2AE2AC2AE2142AE20 62AC000404000000000000000000000000000000000000FFBEC40000000010018018800010049248 0180180180000000000000020060060040040040160260400002040060860002060044C200200400 0104000000000000000000000000000000000000FFD03000002B0018AB8AB8220AB0008088AB8AB8 AB80000002A80000022AE2AE2AC20C2AC3262564082A82AC2AE2AE2A82AE2042AA2AA2AC00000400 0000000000000000000000000000000000FFC5BD0001540011559558121559508009559559558000 00055000000255655655454455444648E4855500B25564564C415654C01654655400000600000000 0000000000000000000000000000FF81270000010018018018000018148048018018018000000000 00000200600600408400400E0060000000020060060040060C400600600400000000000000000000 0000000000000000000000FFC21900002B8000AB8AB8410AB8888100AB8AB8AB80000002A4000000); SDR 8000 TDI (008000000010008000080000A8000801010000000088908000000200000000000000000000000000 000000000000FFD2B800000000000000000000008000000000000000000000000000090000000000 00110000000280000200800000140000800040040000000000000000000000000000000000000000 000000FF885B80012A8AA8A2EAA8000AA8008028AA8AA8AA80000000000002A32AA2AA2AA2AA2232 AB2AA001AAA1022AA2AA203AAA2ABA022022AA000000000000000000000000000000000000000000 FF0F260000000000004010004200230412012014010000000000000014805004A008010010040042 4080020480400400400540100D00C850000000000000000000000000000000000000000000FFEECB 00005595594595580015580B851555D55D558000000000000554D57D5755655642ED565560085560 47557557444557556515D14556000400000000000000000000000000000000000000FF8EF50000AA 8AA8AACAA80008A888884AAACAB8AA80000000000002A22AA2AA05208A10A2AA2AA080AAA082AAA2 AE2AA2AA08B2A22A2002000000000000000000000000000000000000000000FFBDB3000000000010 0000004000A0104001000200000000000000000000000100080108000000048000021000000010C0 01000020021000000000000000000000000000000000000000000000FFBC200000AA8AA8A28AA800 0808890918AA8AA8AA80000000000002042AA2AA3224424422AE2AA2032AA07C2AA2AA2222AA0422 AA2A2582000102000000000000000000000000000000000000FF4094000001001801800000024020 04000000000000000000000000500000000045004400000000000062000000000040003540040040 00000080000000000000000000000000000000000000FF8E6600000180181180000001000400A000 00000000000000000001000000001080301100000000C10000800000000900000000000082280000 00000000000000000000000000000000000000FF0B45000001021800101800001081900105845801 824000000000000600600650600612600600603101042E00602600E0B60860804000060402000080 00000000000000000000000000000000FFD9EA00000100180001184201102182105190980D900001 000000800614640E02621641654E3064804800004CE0864860060360100004164000000000000000 00000000000000000000000000FFA08B000001021801801820001001805801889809800000000000 00040B600600634620A02600600020000400601628600640660800000E1000000000000000000000 00000000000000000000FF40A60000010018018098120010808A3829821801800000800000800400); SDR 8000 TDI (806406025024886000004C060A700680600E0A7026006A0600000000000000000000000000000000 0000000000FFC8C6000001800504088091912941801D21D018818000000036804004007006116806 1240443462C800600404400600600614620600640600000000000000000000000000000000000000 0000FF5DFE000001803000000023800801801809801801800000000600410410E00600604640608C 00E00042E00E08608640E21600602E006006000400000000000000000000000000000000000000FF 5B3B0000000018018000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF31AC00 00012018018000000000000000000010002000000004005000800000004800804801004000004800 000000801001000800800800001000800000000000000000000000000000000000FF7ABB00000080 0A00800001800800C00A00800C22800000000200200200280200200000200208280080204280204A 20200E002002002002000000000000000000000000000000000000000000FF271E00000000000004 000000000202020110C10020004004018000144008800C0010110010800800B10400021080000080 800004200808000000800000000000000000000000000000000000FFB8D7000200C00C0080000180 0800900800A00822800000001200300700200200390366376208200024211A10200F00700A003003 002002000002000000000000000000000000000000000000FF9D48020009805809800155805905B5 5943801B33848010015620704C44E0A600641714634645655000FAB60C790E14645600E006006406 300000000000000000000000000000000000000000FF1A1A0100040000000206010000420A000128 A681000020020000040C2004844A014C0880881000001A02814B04E4414084000004004001000400 000000000000000000000000000000000000FF9A1205021480481080015280490290494080095482 800800CA4020324524420024128A20424220B011300222214214A04A002002002C02100000000000 000000000000000000000000000000FF687B00000000000000000000004001000000000000000000 000004018000800000A0000D00108000000400090208200400000000000800400200000000000000 000000000000000000000000FF16AC00000000000000000000000002000200000000000000100008 000000002009000008000002000100E9800800400000008000400010801000000000000000000000 000000000000000000FF0AE800010000001000000000002C14820040020000000000000000000010); SDR 8000 TDI (480118463406400002418820223650E0060240060060240000000000000000000000000000000000 00000000FFBDF7000001800801800089B01A1D8031018A52418400000082806D0302400643480862 490C844004C04002882C8640604E0050060060040001040000000000000000000000000000000000 00FF71B2000001A0B811840641C41801801045C130558001000043004140814086B0440300F00620 4010505A2004A00E2A60060140A690E00C000000000000000000000000000000000000000000FFF8 F1000001800A01800005C05841D01421A41011800000000200480001409610409202E2061040A010 6002A83156006006104156006404080024000000000000000000000000000000000000FF56980080 01801801800003801821A01281821029820100000108680200C00688400A00C08410408000400288 2A062060260040A68078041004A0000000000000000000000000000000000000FF32600080018008 0180602990D8958670418050038000000000086502006216406906D8482604604410428640615608 6006106816006406000204000000000000000000000000000000000000FFB2FC0000018018018000 298119018818018018038000000001004000004486015802044244804000207C8000280608600600 4006806004000000000000000000000000000000000000000000FFB97600000188080D8402898018 01801801801801800000002000410180600600601620622624710000E20E80E14684601600684600 6006000004000000000000000000000000000000000000FF26ED0000018019019804898050014610 51881003804008050641609E19460705C1029E490420460008404114242708688E14400600600420 0000800000000000000000000000000000000000FF409B0000418008018000019110011018019218 05800010000600640624411600404200401100D00832500200201610F10600CA0614602440040300 0200000000000000000000000000000000FF19630000218818140200018012015010118010018020 00024600C40421610700600700530A82608002E244817A1603600690E82700684600020000020000 0000000000000000000000000000FFAA98000001802904000011881141421D019019018000010026 004084087006006C2600600A02E54821620600610740640600640600600600020000000000000000 0000000000000000000000FFBCBC000001800301800223B1CC01401041A41001800080010E406024 84C0168CC1526848C421401042401914210600E00704440E14600400000000000000000000000000 0000000000000000FFA3D3000001801001888281C028010418298198018001010006004044806006); SDR 8000 TDI (02004800000001802004006007802006006002002004006000000000000000000000000000000000 000000FF070500050100000000040192385D9000598001118000410006015044586046504084A020 0610800001600C01600600200682E804004806086000000000000000000000000000000000000000 FFE55500040120180800400180180180000180000180000000070170040040060060060028864002 C8007004086C8E20240F007006007006004000000000000000000000000000000000000000FF51FE 000001800201800105800801A00001800401800000000600600201600600000100200A0800004120 04806846142086406000000004004040000000000000000000000000000000000000FF7A6D000001 801801800001804811800001800001800002000622400210420F02232B0AA0A22085C822228C226A 6F44240E4DE282202004004040000000000000000000000000000000000000FFD389000001000011 804283820801C010098000018000800000015004816006000800206112D0A00C40A81608728E1001 0E006000800006086004000000000000000000000000000000000000FF4C44000101001A01800201 90320180B09180000180008002A800600482E00600A8826066020620000120060460062040060060 02C02004004004000000000000000000000000000000000000FF5E2C00000100000180000180200B 911921A00001800020833000E020024006D2203283680300E084C2348EC1605740600E0960020020 06004004000000000000000000000000000000000000FF21F5000001001801800001801041805801 800089800002000044400050C22E0125020860C25060080000060064060060060065020020040040 00000000000000000000000000000000000000FF7926000001000001800001800801800801800001 80000000020040040040060000000060020020040020060060060040060060000000040060040000 00000000000000000000000000000000FF038D000001001A01800001A00201800801800001800000 00020060048040068020028068020020000020060060060060060060020020040040040000000000 00000000000000000000000000FF371500040100C081C00009840011800005804001800000002300 6C42024006400C0002600280200480224615702604400E0060000100040040040000000000000000 00000000000000000000FF73F2000201001811A2010180000180402184844D8000000012004082C0 C34694201241604240200854201740630601600605612210202C0040000000000000000000000000 00000000000000FF1A4B000000A01E81800041801801801001901001800000010A00620220422600); SDR 8000 TDI (00010800100100104120000100000100000100100100100000000000000000000000000000000000 0000FF22F30000AA0AA0A20000AA0880800020AA0C20AA0000000220200210200AA8200200100100 0800180000000802A82A82A81082A82A8008000000000000000000000000000000000000000000FF D88C000400A00A08800000A02A24820A00A00000800080080205290282200289280AA42802A53000 952A12A0A802802802842802802802002800000000000000000000000000000000000000FF1C4300 0201200200000201241209291201250001000000090890504C911004820940888B30804800A008C0 844004005004A85001000AC0000800000000000000000000000000000000000000FFB0E500010180 984180804188384180103180000580000204060062464462860060461465260D400010E50E106006 21410640601610600E106040000000000000000000000000000000000000FF80E3000444C00C0280 0010C30092930C82800210800000102254308308200348308B20300B40325140300225788F80244A 0AB40324B103023088000000000000000000000000000000000000FF69870003A520020000008120 03882C83072800860000040C4880CD80A28A08800A00800800C0C810800C00840820818C0CF30818 990830100918000000000000000000000000000000000000FFDDAC00000000086681021081920080 1088800200800008000280000444280212210202A0020020006021A301200200302280A082022002 042040000000000000000000000000000000000000FF7A1B00000001180180040002204001207002 021000000000062E02401005004080000002F0024040090000100100480080000600400084004000 000000000000000000000000000000000000FFDF5B00000800180180024A04420642000000022000 000000000000000000802800C8540000000080000018420890000300840020000208000000000000 000000000000000000000000000000FF0ECC00004100180000000198081190000180000180002000 0650400008600600403400450435040012E20220620602285600600424C106006000000000000000 000000000000000000000000FFFDBE000441200204000115AC910DA4C2B19000C38000280806A24C 80CA6816C02D52844881228800822C8682622682A04E426A8A912A86806810000000000000000000 000000000000000000FF435E000111001821800001804401900003C20201800000000E11500200E2 860D400400D24400008150E83440610608230600E024244036006000000000000000000000000000 000000000000FFA6B2000001200001E0020180100180000180000180000000070040020040060038); SDR 8000 TDI (64004040900A40823460061160061241060060060002100000000000000000000000000000000000 00FF142600000004180180000000005012209408000000C00000000002302800400200A00A030820 0040050040400408200080080000110000000088000000000000000000000000000000000000FFB4 90000010001801800002000000020000000002000000008E0000200045004000D002405413000002 0280040080014204408400014000000000000000000000000000000000000000000000FF5BC40000 01000800800030140800800820800850800000600209018028A00208240221200200208020040218 20021520220C2002082042100000000000000000000000000000000000000000FF8B5B0004100000 0040041C401400403400000400000100000100110500100100130108168100100908900100920108 1401001001001200001000000000000000000000000000000000000000FFBC05000400800800C004 20400C00C00C20800C02800100200300104308310340322B00314300301154B30314B00308300341 3003103002001000000000000000000000000000000000000000FF3DC30000018018018000000010 01825801801801800000610E0800062164060860064C600E0AE08000600400630600E04610620601 6206000000000000000000000000000000000000000000FF05AC0005052002002002002012000012 00200001000080480800000C80080480488C000400000809004A94A2880100080080080080080480 0800000000000000000000000000000000000000FF3F9C0000509008088000000048008008008008 00800000200200000200200200242280295200200000200210200200200200200200200200000000 0000000000000000000000000000000000FF6CF300000002A0A20000AA0A80AA2AA0AA0AA2AA0000 0002B1AA82A12A82A82A90412A8000AA80002A80300412A82A92A82A82A82A82A800000000000000 0000000000000000000000000000FFEE9D0000000000080000000440223420001002000000000088 2200004088012C08A840020032000105022052000000000022800000088000100000000000000000 0000000000000000000000FF86260000D212A0B20000AA08A0AA2AA0AA0AA4AA00000002A02A82A0 2A82A82A80082A92412A80082A83000882A82A82A82A92A82A82A800000000000000000000000000 0000000000000000FF22B00003543543440001543103080103542121540000800C40110D40920550 010400828830808800500890808D50D50D50800D50D5044800000000000000000000000000000000 0000000000FF98990004004004004004004404002004004002000001001000000010001001000480); SDR 8000 TDI (4A00E0000B630600002628422E036084416006000406000000000000000000000000000000000000 FF9CC7000001080009800000340801001801001801800080600A00000C00600602612610400A006B 044B600C0000063448060074D4086006000804000000000000000000000000000000000000FFA05E 00000100180180000000900022580000100180000060008009020040064064060142408C60000043 46002006004004002004434006000200000000000000000000000000000000000000FF0A930002AB 02A0A38002AA0120AA8898AA8010AB80000062A02A82322AC2AE18E00E22508025F0040041062AA2 AE00E2AC2AB4040442AE2A9004000000000000000000000000000000000000FF2BCC000001001801 800400500000001800001001800000600100010C04400644E026004001006C801040040020064A50 04006806504006000804000000000000000000000000000000000000FF3D480003550D414DC00154 440154B55954801155800000654155050455455640614744401148600431440055255630F5565560 36106556550004000000000000000000000000000000000000FF4B8200028982B8B38000AA0138AB 28B8AB0010AB80010062262A920040E2AE08609622C2AA2AE0004062D22A82AE0142AC2AA0840342 16000400000000000000000000000000000000000000FF796D000201800001800600283801001C01 001001800100600E00102000400603620E10CD2200628002602A0000060440040020862140060004 00000000000000000000000000000000000000FFE24B0000C512A8A22000AA0610AAAC18AA8010AB 8000006336800A6C3062AE02E626324226AA620005C2222A82AE0062AC2AA47C00C1465780000000 00000000000000000000000000000000FF7895000023001000000000011000815A00801001800080 60063001040260064060068841160068800040020040064A68060030064060060808000000000000 00000000000000000000000000FF2102000011100011800000085801041801001001800000610E05 000209600608608E00C00200C0004C610A00200601400400648414434E4004000000000000000000 00000000000000000000FF97440000010218018000000008018A3811881001810000624600032A50 428600640624401200420000604200610642640400600604C0260800800000000000000000000000 00000000000000FF4C1A000001001000000012007016809920821003804008E22618000000628E00 604E2061000042C809448203A4960063040060867240060002000000000000000000000000000000 00000000FF81A5000001000800000002140020811822841053800008E00601000000402E04610E11); SDR 8000 TDI (20604840E006B06026106102004146007005006000000000000000000000000000000000000000FF 080E000011901001810081000F01885801801843800000582010204000608E0140864D21138A6020 2060045070060860A304208E406004004000000000000000000000000000000000000000FF5AFE00 0401801001800281000801801A05A01A018000404F2080008000748F64400700A26B41E011016004 02518681F00242104E816004004000000000000000000000000000000000000000FF27E700000100 1001800C11100811801C01811C018000024008004080007046806026800206806000846007046A26 007002006806007003006004000000000000000000000000000000000000FF5AB400000110101180 080104104D801820C01C0180000048010061400060060040060001240040000060560C6007006006 08E006006002004204000000000000000000000000000000000000FFC6F8000401001001800A0108 C001801C14801801800000400200200000680400600600000C00448400640600E006006806004007 004006006004000000000000000000000000000000000000FFF23F0000AB02B0A38008011510818A B8908AB8AB80002AD2BA0002082AE2AE2AC2AE2A82042AC1002AE0862062AE2AE2AE2242AE2AE2AE 004000000000000000000000000000000000000000FFCE3100002308000180180184091180180182 1801800000608E00401000E00600400610000C0845000860360060060160B208C02E0A6002004004 000000000000000000000000000000000000FF8B6D0000AB0AB0AB8018018020CB8AB8A28AB8AB80 002AE2A60062A02AE2AE2AC2AE2A82042AC2002AE2264A62AE2AE2AA20C2AE2AE2AA004204000000 000000000000000000000000000000FFD81A00011105415580180191204595594C91395580005574 440024C05265565545564484C64560064264065164C6526002044306416556004406000000000000 000000000000000000000000FF3A7300000100100180180180000180180080180180000060040000 080060060040060000CE0060000060960160060060020C4006006006004000000000000000000000 000000000000000000FFE30300008102B8A38000000818010AB8010898AB80002AE22A0002020042 AE2AE2AE2042022260002161262620140044844020240042AE000000000000000000000000000000 000000000000FFF67E00002308000180000000194500184100180180000060020001321140060060 060CC08208630400600C10A48E04C00450240C144006000004000000000000000000000000000000 000000FF050600000900180980000002C80900189502380180000061020000044260060060060040); SDR 8000 TDI (20002AA2222AA2AA2AA0122022AA2AA3022AA000000000000000000000000000000000000000FFF3 19000001000000001040001000201020040201000080480001400080480090100481490450400800 40A0440004805004080005111014040000000000000000000000000000000000000000FFDE860001 55855955951155805955955855955D558000D5644654C00155655655755655602E0960095564CE55 7557D57544357556557414556000000000000000000000000000000000000000FF3A1C0000908AA8 AA8D488A82C08AAAA88888AAAA80002AAA420A2000AAA12A00A2AAAA225200A2002AA20A0022AE2A A2AA02A2AA2222A2282200000000000000000000000000000000000000FF32270000010800000030 000C0000000000000000000000408800000000100100100000520424048000000000000000100000 0001001020000200000000000000000000000000000000000000FFA7AD0000C40AA8A28A20889030 C88AB88C8A88AA80002203B240C0002AA4026422AAAA80000441882AA20219A2AA2AA2AE4822AE00 22AA012000000000000000000000000000000000000000FF83FB0000220010018000000900200000 20000000000000001620000000049002000000600020800000008040000000000440000000000442 0000000000000000000000000000000000000000FF63CE0000080018098080420400020000040020 0000001098001200000000200880000002A80A020000004804000000000003000034800010820000 0000000000000000000000000000000000FFDFE10000010030800008010108010858000010018100 00520010010020601600600744202A04201044E08A20643620E10204601603600800601000008000 0000000000000000000000000000FF03060000010010000008830010010519480090B18C00004000 00800000E20620608E0020840144A010624210610600600248244610600001610000000000000000 0000000000000000000000FFCF8B0000010030118008010060190218A80490058840004800008000 00610600648E00200002402000620200600614608208600600600000608000000000000000000000 0000000000000000FF259500000110100180088300100110D8040210A9808044410000004000E20E 0042466021A814400004600200640602604240002641E00000400800000000000000000000000000 0000000000FFEDCD000001001088000801011801883C01801C058220004200104100207086406006 02200600E30A54E15648733650E802C262160C601401600200010000000000000000000000000000 0000FF8B94000011001000008A09081891801801811823800000400808600000644602E106142006); SDR 8000 TDI (0028404620008204450640E016004006206400000000000000000000000000000000000000FF591B 00000000000180000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFCAAF000000 000201A0020000000000000000000100000000050048050000000000008040040048008010000008 00800000000001000000000000000000000000000000000000000000000000FF1B65000001000800 800800801000801001000A00800020200200200200688000300000200280200220A0020120020020 02006002002002002002000000000000000000000000000000000000FF0B3F000000001000000000 4000240404000A404308000480A00002004008144002900800001008009004414400A82302C03200 208900200A0000000000000000000000000000000000000000FF4401000000800C00C00C04E00980 A10C00810C0088000020020021838620420020030620020820002821171026831020020020020820 02002000000000000000000000000000000000000000FF6E7F140001C01001901901901801955D01 101D410D0000641685720E005146517916156014086552556D57016A5628E0070864860060060060 AA000000000000000000000000000000000000FF51830000010010004000040010620210010AA023 000042C880000200A04C0C20028D480004001800800AAC2E08282282A42B40250081601200000000 00000000000000000000000000000000FFB5A1140000800800800800900800802900900880128000 221204AC1200210221308A0A300310221054A54A81204AB1200200A2020020820820000000000000 00000000000000000000000000FFEE410000000000001001000000000A8000000020000020080080 0000000020080001010800800000800800020C008000000800800000000000A80000000000000000 00000000000000000000FF74D5000000200000200006200020210200000200000040004080100000 03400000002000090000A20100000100001000008000008000201000020000000000000000000000 00000000000000FFFB6700000008001004000000A0000000C0000200000000000012000100000000 08000000085404880001000010008004A00200000000800004000000000000000000000000000000 00000000FF24A500000000000000200010000040000C000000000000001000000000000000000000 04A00100010000100000000008101108000008500000000000000000000000000000000000000000 00FF4E758000AA82A8A28888AA8308AACAA9008AA8AA80002ABAA220A0002AA2AA2AA2ABAAA10200); SDR 8000 TDI (14681600F0063021465161072021210C4006000000000000000000000000000000000000FFC80700 00010818018038058A1945050000801C0180000061480C0007092046002004007332026300B16207 0A600E80200749701624100088400C000000000000000000000000000000000000FF249C00000100 0811E05801A00021801905800801800080602808000690200E0038060060078044A4806006006016 0120068868060A282008408C000000000000000000000000000000000000FFBD2C00004730000181 1801818005C11E83800C018000806001240086002E4E1C007E30615664400000640E547E26002406 406436802006004004000000000000000000000000000000000000FF931700040100080180180392 5101C21401001801800000608040510600800600200640640208400455600F016026006006017046 212000006004000000000000000000000000000000000000FFAEE1000001200801A4185180500180 1001001801800000600000420600200E02202610600200680400600E1064460161060A6006200006 206004000000000000000000000000000000000000FF98E1000001C01847C01021B0000180620004 1C008000506004101206D0E00E122006026104005008046907016A04C03006026026202400004000 000000000000000000000000000000000000FFE1C8000001841801809101800001A00000003C2488 000060A40000040178064039078460044040308070264460940A60464060C600000002E000000000 000000000000000000000000000000FFF6B9000001021040021891E80201C00400005A4080000060 A4001007A02006306024086004004020826017327127343086006006006006004000000000000000 000000000000000000000000FFCCEA00000108180840180180010190000008180580000060010000 0620B106406204506104146080927006407006046006086126104026406008000000000000000000 000000000000000000FF984A000001001801C118A188680182880004180498005060041002071022 048A29A4824B2840C2002043660320128122C670E30E80A480454200000000000000000000000000 000000000000FFC4860001A1101801801949D60C01A42802001808800000678480040601600C8074 0C00401020402100448E00208200E026006846014006086000000000000000000000000000000000 000000FFFE4B00040100180000100180490180A404101C128000006004000806002B00542015544A 005244C0045096840803016046106487082146086010000000000000000000000000000000000000 FF548A000041001010000009000801880000001801880000600000000640200C0060A40061200160); SDR 8000 TDI (608214702600620608200600400F000020000000000000000000000000000000000000FFB1760000 01001801A01201A00201801A018002000000006002005005C054060068060042440A6000808006A0 600B816005013006804006200400000000000000000000000000000000000000FFDDCA000001001A 01801001A00001811A01800000000020608308F00C004006006A8E208004BAE5D820902A00E0A232 E6A401302E204006500040000000000000000000000000000000000000FF15520002000008018008 01801001801C8080140100000068220072062022060000068064520560042D6106546A5623600608 2006006016008A04000000000000000000000000000000000000FF73C4000008000A01880807A014 01811980881001000080680680600702A0D665800646400A14601508600660600254400420600600 4006000804000000000000000000000000000000000000FFEED1000400000001A00A018018018058 0BA0180180000062A208E0060A8804084C0700A20E00E08001684281504E80E32601704E80400600 0004000000000000000000000000000000000000FF9CC10000100008019008018018018218018818 01800020600600601600410600414E00004640600048620A00408200600440600620400600000400 0000000000000000000000000000000000FF70C60000000018018018018018018018000000008000 00600200600600600600200600000200600000000200600200600400200600600600000400000000 0000000000000000000000000000FFE3A6000000401801801801801801C010004000008001006802 80600600600600200700100280600080600200680280600400200600600680000400000000000000 0000000000000000000000FF7624000000001A81821801A21801801011800A000000106006026806 12680640600600004600604604081308608201602410208620400600000400000000000000000000 0000000000000000FF5BD9000000201021C01801011831901401A408220000056886006847002047 007406C402168CE00490008204E01228608424A0060040A68A000600000000000000000000000000 0000000000FF88BB0000010010A58218018019818008000250008000406684022016407006142006 02710E0040046076860860CF06200600600606200000400000000000000000000000000000000000 0000FF3FC5000041401A11A11801A05801800C000038208000A2E004002026A26006A42A06307006 1AC064047007C3602701A406026406110040004104000000000000000000000000000000000000FF D866000001001803801801A29851680010801C0480001060040018161030460A20040064C2006004); SDR 8000 TDI (028A2802832802002802A02802800800000000000000000000000000000000000000FF4F0C000445 2012082312130002002004032052010000000800820CC00C4080A840848008148C48028048008009 30900800004804910944CD0802000000000000000000000000000000000000FFC454000081021005 88B02990B8218438230C18050000006006016016A2C00E2D45064060842060403040060860062160 0EC0C10648640E120000000000000000000000000000000000000000FF79F4000400D00C50C20D04 E20D00C80890C108308001C130033234421038A300284B0D300310351002B4C30032AB0A35430032 13033002201080000000000000000000000000000000000000FF8CB50002012202002E4204084200 3422532E02A00001010800CF8AC0019048A11410858900A08840804020800800A002A0000108800C 14900900000000000000000000000000000000000000FF2CC70001089038168018091489C0808B08 80141D00002020AA202032A060120068021020020026002504820022424021420060024020024080 20000000000000000000000000000000000000FF22800000000000419100E0220020001000000002 0000428000100000900000000208000084400080401000380020061000CBD4100140000400000000 00000000000000000000000000000000FF57680000000400018021000020000800A4000040000000 00000000000A03800E0940020200120101000200008010190410000A800880282000000000000000 00000000000000000000000000FF9FFE0000A0001020001011811000805800910000000000420000 440EC4602650008648600888601012014400258E00E0060020261662860A00000000000000000000 00000000000000000000FF28A50004A8241A20301289A21200B03A4CA20320000084694C934C8602 6C06C2400E8C6C00486C008468A4C828348868A702A4068250CE4A08200000000000000000000000 00000000000000FFF9DC000000003C03845841895140811900D0080A000141620040404ED170AE08 6C8600E10802E10020020601248624E2060828B608C4068080000000000000000000000000000000 00000000FF78EB000200001801801801801000A01800800800000000600400600600600600600600 08000060020000038020020060040020060040060000020000000000000000000000000000000000 00FF2E2B000400801A00001C01A0100105DC94C00000000000646200520610605614404600744500 6000000406006A173A6007012006006006088000000000000000000000000000000000000000FFF7 93000000801000001C01801001201000C000000000006002006002006807804007802014017AA82A); SDR 8000 TDI (00821400C5240000D0000004000000000000000000000000000000000000000000FFA67400000080 088A90580080580080281500093082002024D20120862A200212244252A40A0001200042B2122082 022002002002042402012050000100000000000000000000000000000000FF502800050058601040 24004005844005804604000001000000001101101001001009001001209001401001240121001009 085201021021000000000000000000000000000000000000000000FFBF2A000404C40900C44C10C0 4C00C04C40C00C0084014021120034030135430934130230B3413401003423406023013003083013 003043002800000000000000000000000000000000000000FF8A8F00004180184580104180100184 1801001841800000600640605622600602610428E20400604010611601620E0443340062A6046006 006000000000000000000000000000000000000000FFCE4A00020022021020920003520120000322 02C40000800D1083080400892083080400000C80480280480080480082C004804000404200804C02 000000000000000000000000000000000000FF5EF60000008048008C4800800800844A2080080080 00002002002002D4220200200200204200200800200211201210200200280284A8A2002000000000 000000000000000000000000000000FFC4870000AA0C80A21040AA2804AA08808C08A00800002A81 203802A80000482C02A8AA9A802A80012A82A92303A0240AA82A82A95C10482A8000000000000000 000000000000000000000000FF4B7900000000800000008020044201020202800000000000000809 10200008080028020000010021008001110000080000000000480089020000000000000000000000 000000000000000000FF2E1C0000AA08A0AA0000AA2A00AA08A4A80840B200002A82082202A8C200 800082A8AA82402A80102A82A82A0228408AA82A8AA80003002A8200000000000000000000000000 000000000000FF6D3B0003542A23543322501321003421303043540000D50D50C50240948D40C28D 00C08D48B20800440D50400C50A50D50D50D51030A40110800000000000000000000000000000000 000000FF157A00040040040044840021400044020043040000010010410118001112112810000000 89001000001000001001100001000000010009001000000000000000000000000000000000000000 FFC69D0000800220A208200408A0920800800280AA00002A82A82800000082200082081082A00000 003282A82483002002A8AA82A8020208400000000000000000000000000000000000000000FFC62F 000210B08A00A00AC0840A48A54850B00A008000802802812012A02812842822D228032128208828); SDR 8000 TDI (6100006006006006006806006004000000000000000000000000000000000000FF7FFB000281AA98 AAEAA0AA8A80898AB883288A8980002AC0A22AE0060062AC0A42AE82C3062AF0000240862260202A E2AE00E2AC2AE2AE007004000000000000000000000000000000000000FF44930000099018098209 03800001801804801805800021600610600710600680C00280400A00400104E00601600010240300 6006006006006800000000000000000000000000000000000000FF9416000525D15944930955B001 55955928953B5380005542065564475465560065524244425541150AC0464C63305525530A655655 7556006004000000000000000000000000000000000000FF8EA20002A3C2B8A3C93A08AD38D1A114 91288A808000084326004A4624044E2C42AC4AC2A42AEC2048624E2C60B003400C2AE2AE22EAAE00 6000000000000000000000000000000000000000FFAF76000011821808A03801833001801403000A 0080000040D600408E00B0064B400410C00C00600020628E00E00000400441600600600600600000 0000000000000000000000000000000000FF00FE0002818018A20A1060A810859650C20C58D08000 0642366DC31E2969062042AC0042A42AE0020263042064004041442AE2AE1062AE00600200000000 0000000000000000000000000000FF0406000001B01801015883851001801211051808800000400E 0040068520C60460042140040068008040D404643040443480600609680600680000000000000000 0000000000000000000000FF293100005583581180180800505590C041002845800028E0860260A6 00641611400012601000444050C00408E10214810000600624600400600000000000000000000000 0000000000000000FFC9B10000018938228058010150018800051008498040014306006106404106 20421000E02002440009410620611015008800600612620401604000000000000000000000000000 0000000000FFF23200000180B820101861861001820011045801958060E04638467E04400620C008 0441201341506066D405644A0080880C624620601408620000010000000000000000000000000000 0000FFE0A900000180180100100180111382000100190380000040162140061040061160A0504210 004000004004106002200000106206406006107210000000000000000000000000000000000000FF 183E00000188180580000001008C1000000C40241420000080000080520080000100048110110250 0900404504A04C0000040020100008000000000000000000000000000000000000000000FF11A500 0145841841820028004004020020001000000000000C2002280082A0114284484344000400300008); SDR 8000 TDI (0400701681D01E006046000000000000000000000000000000000000000000FF9C74000004080881 008800000001843010081811820000608601601400200422702000100F08002400210E4064AE2064 0700782700620600E004000000000000000000000000000000000000FFD7B6000001801811002854 0000018210C8049A43800100621610600401200C0040410001160003120030060060060B60268040 06004006004402000000000000000000000000000000000000FFF879000000000801040081003001 801000001801800000702681700410600400401000084680600000644600600600500E0060060040 06006004000000000000000000000000000000000000FF9B820000AB8AB8A30888100A90AB8CF146 08388980002AE1D62262AC2223A42AC2802A82562AE4002AE48E2AE2AE2443862AC2AE2AC2AE2AC0 04000000000000000000000000000000000000FF241C00000000080000182B021801801800000929 80003160060060040820A200E00401000604002010202600600E0060060040060044460040840000 00000000000000000000000000000000FFAE8B0000AB8AB8AB08B8250AB8AB8898080A48AD80002A E2062A62AC08A22A2AE20C2A82062A80802AA1162AE2AE28E2262AC2AE2AC2AE2AC0040000000000 00000000000000000000000000FFECE6000154154954111901095955953954154805800004655649 655644641054454C4205464962844423165562C65565465545565560165540040000000000000000 00000000000000000000FFD642000001801801041080001801801801010801000000600600E00644 60000041460000860060100020440060060060160040060060060044000000000000000000000000 00000000000000FF41EF0000AB8AB8A38650808000AB8880808AB80900000062AA2C22AE09200200 42A63042B62862000140062AE0002A62BE2AE0062AE1062AE0000000000000000000000000000000 00000000FF7D2E000001001000801800840001802001801845800004600202200640A09250C00E12 400603600414C4420062000060060060460063260060040000000000000000000000000000000000 00FF422800000180180988B82C90A001820034801901800048C00200A00602642204600201401200 41204061160060A800A00200628E00600E006104000000000000000000000000000000000000FF6E 1600004D001000801800802001800229803805800000440600203682E00240E002084142004800B0 C406006208002002B46006006006006804000000000000000000000000000000000000FFD6DA0000 01805801800A00A00045A018010408218000006012006B0648600680400640400E00611000405611); SDR 8000 TDI (55755755755655655640E400000000000000000000000000000000000000FF4FCA00002A8AA8AA84 28888AA8AA88A8AACAA902800000A2AA4AAA82022202342022AA2AAA2020A02A20032AF02AA222AA B122AA2822AA28A100000000000000000000000000000000000000FF23B300008010000000112002 12000000A1002000000000100000000000410900108000000030008802C000000000000800000001 0010010A0000000000000000000000000000000000000000FFF31B00012A8AA8AA91088C8888AA88 88AACAA85880001432AA0022025022120025092A42AA34A0002BA7122AA0022922AA0222AA0502AE 002080000000000000000000000000000000000000FF8C3000000180180113402404400000400100 1845000000400601412050010814444000E00014000000404400001000000000C000020000100000 000000000000000000000000000000000000FF58F000008180180180000000000004000000010000 002D00004C00100280204081000000000002C0000088000520048000280000308000430000000000 000000000000000000000000000000FF9DE300000180108100500080500380104444184380000249 0E21629409200220603088204640045010034620640E08640650E20600600E086200000000000000 000000000000000000000000FFB06D00000010000110181085104180110000190182400160060860 04000102084300402496110100050006006086426016006146124006006040000400000000000000 000000000000000000FF7EE8000001801005001800802121801022119821820000E06608608406A4 100442800020860002A860001639606E0B604E00600648400E002100000000000000000000000000 000000000000FF7018000000004083081800800001801140001881800000608600400C0021805840 4800223608C04000813610E0564062062840C6044006010000000000000000000000000000000000 000000FF07C40000001008010058090500838011000C1803804002601620E40408220A2268204830 162060000A050E00628640E02680EC262460061024C0000200000000000000000000000000000000 FFCF140000059418250110810000018C5008001809920000608E00E02420240A0044801125069020 80000006456486006556006086806246002000000000000000000000000000000000000000FF3D97 000000044843001804000001F01040001801880000600E0064C40462800842020022860061000000 060360060060A6004106047806000000000000000000000000000000000000000000FF10AB000001 801881001902000001801100081A018000807006E0728C4260700241031130070060000190061060); SDR 8000 TDI (1000004000800800004800800000000000000000000000000000000000FFC6310000008008018018 00801001800000880A00800000228000200200100A00200220200300640000200280200200200200 2002002000002000000000000000000000000000000000000000FFE7730040100000804000010141 2002914223303202000200000801408000800089000880808100000C00A0080940000B00300014A1 0800000800800000000000000000000000000000000000FF59FD002000800800A04C00C608008018 00800C00800002220369201207808A00200200200206200181261200260319A26204200200200000 2000000000000000000000000000000000000000FFDD5E000501801A01241101001043109A038354 3580000860060460064008D643614E1064A65162C0154C96B2704654E02600600E10600000600000 0000000000000000000000000000000000FF815400000800008120100100B0A14290B202B22A0000 0000040000B000040400848068809100DA104AC0E00804A00010852E050C20C00000050001040000 0000000000000000000000000000FF6B52000300800C00800A00A00800C00A00A0080A8000902003 04200200012AC42092C83112112421512C8A302822AA280200250310200000200000820000000000 0000000000000000000000FF18560000000002000402802000401102002120000000800000800000 400200810820800A0020009004080000000080000004000080000000028200000000000000000000 0000000000000000FF181A00000000000000400000000200000A1200200400000100010018000000 000A0100002080000000003002020000802080000800000000000000000000000000000000000000 0000000000FFF82A0000001001000420000102000002280244000001001000000000120101000000 0008000081010888008000000000000000000000000A000000000000000000000000000000000000 0000FFB5B60000000000000000140420000000804000000000000000800000010000000100000000 320408040000000000000800800800000000010400000000000000000000000000000000000000FF 39C18000AA82A82A8888A08808AA8AAC02CC88AA80002AB2AA2AA2AA60222A2AA22BAAB2AA002000 2022AA2AA2AA2AA2AA2AA2AA2ABAAA202000000000000000000000000000000000000000FF724800 000000000000102000120104000120000000004008000008500140C1011014814804014200004020 805280901004840004804805040000000000000000000000000000000000000000FF216B00005585 595595501590D555955813111D55800155655755655613444755644C556556054201505557556556); SDR 8000 TDI (26304826006000004500000000000000000000000000000000000000FFB34B000418408018200812 803808507181008E0D000080204610404621010608513672231641640008617E2060C64164060860 0E8C6420026204000000000000000000000000000000000000FFA7EB000001C11F00900940945828 001041008411010040200522641440000E4C704600E402806000082406405486102806014A161060 40824000000000000000000000000000000000000000FF4905000004000040824820801800801001 000A0100000420040260040000060060060020862A600608228620604E0060472460060060000060 06000000000000000000000000000000000000FFA845000003801821C01821401041041803000000 800080600461480400080600480644205A01600141484200492AC4A0062046271060000042200000 00000000000000000000000000000000FF42AF000000040001801811041001801805000240800000 614C1042040C1006026027803A0200600002400204400309228700C14620608100C4400000000000 00000000000000000000000000FFCA02000201821C01623808201021820A01000800800184600605 7004100806845046406A07006000415C82807106B474C684F00720608000E0000000000000000000 00000000000000000000FFBF4500000000004D801810201401830801000800800004610621620420 00860161061363060060A1C041020060820A608601708F29604008E0000000000000000000000000 00000000000000FFE552000000000001801000842821802821223061800000695410440484022620 40068441607FE80014004246400600AA06205106126280024AA00000000000000000000000000000 00000000FFF1ED000201861A458A3022860A4388084F005AC1800020600C89440C821407016A0404 000C006A000882220068068061260A60160160000468000000000000000000000000000000000000 00FFE831000000200001A41045A04805010C094418018000C4700C20400C0200C64061069149344A E4A1080AC080200615500704E10740612000E000000000000000000000000000000000000000FF12 06000001801811085009800801924801000881800000610410400440000600620600420600600041 0004026106004426286006146200106540000000000000000000000000000000000000FF42C30000 01801800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF2CEA000001801A 00000400400000000400400000000000000080400100000000100080000000000080480000100080); SDR 8000 TDI (40E207802000404000000000000000000000000000000000000000FF7DB5000200200000800A0080 08008010016010298000002105002006086006087103006843021844016B165162960AE44680600E 0000000860A4000000000000000000000000000000000000FF9190000101801800A0020086080080 1081001205800060200400281601600620600202680219030000600640680699C006086006004000 804000000000000000000000000000000000000000FF6D5B00040240000000080080100880102380 9001840080200610A44600600620410602C0B60040000173068064CE046017146006806000006006 000000000000000000000000000000000000FF258300000180180080080080100100108180100180 0000200600608600614E00402200400604420002600600E00600400600E406006000004000000000 000000000000000000000000000000FF12FC00000000000180180080080080180000000180000020 06006006006006004002004002000000006006006006004006006006004000004004000000000000 000000000000000000000000FFAAB5000001801C01A01A00C01A00A0100000000180008060060060 06007006004806004803000000006006003007004006806006006000004000000000000000000000 000000000000000000FFF94B000200200001801800000021001804801201800000601702E0860860 0641400608410600400495690E1021060040C6406306104200014004000000000000000000000000 000000000000FF27B8000001841A010110002400010C1F00801001800004E00640201604E0461045 06404856C04020406006412226484416906026006020004000000000000000000000000000000000 000000FFE72B000001801801005800A0080000000180000180007041060260040210060040620020 2A3E600080760E24482421A006004006006000004000000000000000000000000000000000000000 FF80F8000000000001E41A00800A4098000180000184008850C6B0C08C09815609C0820920024064 14C8610602480680222E614046006400004004000000000000000000000000000000000000FFDD1F 000001841801815C00A40840C21305800001800104C816006805800026404402402083006040C321 06094B061021079042C7087A2000C000000000000000000000000000000000000000FF8FA8000000 0001259018B0920800C41021800005808050408E24642C0012062440920820B2036020002C060244 46292246005206026000004084000000000000000000000000000000000000FF7FC2000001801E44 820C028018000212010002010200102117806806000A460140078260230260282068060440060020); SDR 8000 TDI (600E804000056000000000000000000000000000000000000000FFFF70000422C00C00D00840E08C 04C00C10D22C10800101210240348324280B0134132034120C320912309340B10B112412082C232C 2001083000000000000000000000000000000000000000FFA5A600020022C24127743E4103800012 003022280000844500880800621000A08D00A20890308800810920820A40A002009010400800008C 0800000000000000000000000000000000000000FF769D000066802800800D8180080A8020250010 40800001224000608200200A0420B200A00A80600040204248202201280200320E00200022200000 0000000000000000000000000000000000FFD4AD0000018419080000000000014000880201810000 0A10200002001844100A40000004050C440004021004C1001008A028041100800000000200000000 0000000000000000000000000000FF26800000018018021000001E80401880000C80000000201001 4300100110204002084D000000000018000800008008841100882040000011000000000000000000 0000000000000000000000FF6DF30000018018910812408048248210120040138000008004104506 04C88601600000626081601020A40611641C02280600608614200000600000000000000000000000 0000000000000000FFD539000244244201A01800A00AB024132028AB090000C0EC04804802CAE10E A468C0926A20016800812C56836C968821068864568020008C280000000000000000000000000000 0000000000FFE484000001809A8DF45B54B51802915012840C2380010A6044125486006026916214 20E110306000B06807107042A5624640E08611200140200000000000000000000000000000000000 0000FF3F94000000000001801801801A000010008008018000006004006006007806004004004000 006000004006006002804806806006002000000000000000000000000000000000000000000000FF 69B10001040000018018018018000018440102258000002006806457096006086140806114060000 02662448E7822EF01724600E002000286000000000000000000000000000000000000000FF71B500 0001A01801401801C01A008018000000098000006007006006006007005804004005800281207084 00680A006406006006802000006080000000000000000000000000000000000000FF1E7E00000040 0401801401802020001800001001800000610400600500600600690700602480404001400E206042 804056006006002000004040000000000000000000000000000000000000FFAC2400000180180180 1800804048001800001201820000600508C0840060AE00400700C02400C58046C0C600E86A404016); SDR 8000 TDI (8D000000000000000000000000000000000000000000000000FFFCA60000C0880C02C00C00400C20 C01C04C00C4880010834030030430131030830C302300300A80104205204210300342B0031130020 00002800000000000000000000000000000000000000FF4621000001805901005044001801901801 801901800020614640408C04400E00640C01421604648000600600621623408600E0460042000060 00000000000000000000000000000000000000FFE340000280280205243000205200245200280224 00008008008040048040048049048449200008108C4808A88840A448000048048040008008000000 00000000000000000000000000000000FF8753000000800800800A40040800810800852800800010 200200200200280200200210A0128020000125220221121120028020020020000020000000000000 00000000000000000000000000FF7E6500012A12A0A808C09E0880AA0800AA0000C800002282A92A 82A80002A82A82282503402A80002000501002004502A82A82A82A80002A80000000000000000000 00000000000000000000FF67B600010000000800000000000040000400200000000080212A000000 00010802080902200000410000000080400080000100000000000800000000000000000000000000 00000000000000FFD38800002A02A0880884A00AA0A80A80AA08808A00002202A82A82A8000AA82A 8220000008AA80002282002081280002A8AA82A82A80002A80000000000000000000000000000000 00000000FF8BA100025435428233413435430A1543102403540000CC0C08010D20800D502508C0C4 0910D50800550D50B20D10D20D50AA0D50D50000C308000000000000000000000000000000000000 00FF8F35000400400444440000400402404400444400000110900000000100000100110950140000 1011101101021401101000801001000001001000000000000000000000000000000000000000FF60 EA00002A02A0420880A80880622A80C811008800002203280002300002A88002002280002A8000AA 02000000002002A80882A82A8000000000000000000000000000000000000000000000FF125E0002 00A00B00A40804A40B00804A04A0AA048000802802C131028030022428228028A280280000290281 290290A802203002802000802800000000000000000000000000000000000000FFAADB0002802802 31203001004208001241341240000090C8848C481000000491088C900C0C004840808828B20C2884 0004844004004000B50800000000000000000000000000000000000000FF5EF60000018258B10332 8B0A3921A81803801941800004444608C00E09640642608404E02481400040E4260C624600680600); SDR 8000 TDI (104000444800000000000000000000000000000000000000FF99B1000054154152D3015013190855 5910111955000142455514251055055655642655042E4440145445562A64A6448556556D56100000 146004000000000000000000000000000000000000FF07AE00002B8ABA8B8892A20818840898B040 9909800028020002220228E2AE00E22220E2A42A40205462862AE0062422AC2AEAAE242000084000 000000000000000000000000000000000000FFB05600010000020180320260382520182442380180 0008800020A02280600600611200600408C00001600600E00E08200400600620A00020C000000000 000000000000000000000000000000FF5A1D00012B82B84122509009184100188000184500008002 72C162040242AE1062100C22A6A240000122042AE1160122AC2AEAAE09200001E000000000000000 000000000000000000000000FF97BD00000000002580300004D92A05181429180580000200821060 445140062B610A42600E10480004600C00609601200400600640A000026800000000000000000000 000000000000000000FF7F92000100100091891834001000905020045950800030801042A08A0060 0600604200C0040140202941440064462A2006006006042000504000000000000000000000000000 000000000000FF84FC000001801801911004101041001000011808804040000010210210E00E0060 1200002630482000400440610614A0C600604608202020E890000000000000000000000000000000 000000FFBF290000000080018090600418010450180019C007802981800A440020402600E4022002 0625F1204442802060B602200620E006012100007068000000000000000000000000000000000000 FF59B600000181180102180000980000100414180000000C001022602040012600E0825404860070 1000430014E246402006216016002000007400000000000000000000000000000000000000FFD8E5 0000018018000C00020A80200000000B005000200000000004C01080080005100001200401084000 000B00003080C0000028010000000480000000000000000000000000000000000000FF589A000041 82188000200200002100000500110800002040842000800000000082000004000042A00000080045 104480A0008000000200000000000000000000000000000000000000000000FFC44E000000802801 801820020000845004800820800004223240220A02A18A0820AA1CA00A1220000400222224120020 02002022102140412000000000000000000000000000000000000000FF45940000860C0402400400 44140048040040040600010810010654210050010110011210011880410200004000611812090010); SDR 8000 TDI (6001006000000000000000000000000000000000000000FFD4B60001000000000000000091218000 01801801000000E09414A01000200600213412400680000488605600600240480680080505400000 4004000000000000000000000000000000000000FF9E7A00002B82B88A8888000710498AA0AB8AB8 ED00002262263123000022AE2AA0142042AA2A80002262862AE2AA1842AE2A82AC4860002AC00000 0000000000000000000000000000000000FF6CF80000000000218238000018318000838019210000 2A60A402409002A0060022040160120800040340840060020140060000040D600008C00400000000 0000000000000000000000000000FF64A90000AB8AB88D88B8000058938AA0AB8AB88980002A6234 20420822A2AE2AA22412E2AA2A800000E3442AE2AA20C2AE2A82AC0460002AC00000000000000000 0000000000000000000000FF1E090001540D4115891800103905954051955815800000E416500440 4025565521564C450241000448445655654A4C455655255420600042400400000000000000000000 0000000000000000FFE4C00000018018410210001018018010018018018000016086020040102006 0021064040020000004C601600400204400600200411600000400000000000000000000000000000 0000000000FFB9CB00002B82B8010810000D08088890008AB80180000022820122063062AE2AE004 2060442440002062062AE0060862262AE2AE08E00000C00000000000000000000000000000000000 0000FF9A97000000000001811000020920041004001801800008802244200E00600600624400E404 01400400E00E00600E00C006006006004000084004000000000000000000000000000000000000FF 89BD0000818818D58430000148050050C8001933800044000A0960A61320060060940A00AC0A4000 0A01260062C622608E006006246000444000000000000000000000000000000000000000FF32A500 0100000005823108304800001220211801800002200242E05600200600602400008C0248040C0006 00E0360440060060062C4000044804000000000000000000000000000000000000FF54D100000190 1840A0002001192A801804021801800040E006882304004006006516006024804010016006046104 096006006806016000114000000000000000000000000000000000000000FFD9D900002A02A68808 8602020A00AAB888083AAB80000842AE0020052AC2AE2AE0022AE30728D0042062AE2862062062AE 2AE2AE046000207004000000000000000000000000000000000000FF1955000001801800A4000044 5A10445C040A5A01800005610510215004000622610610000C80C80000402E006226084006006006); SDR 8000 TDI (00000000000000000000000000000000000000000000FFDA3000002A82A9908618890888048AA8E0 D9291300002AA0023960000022AA23224200221A2A800000A20301A2020022324104024020000020 00000000000000000000000000000000000000FF308E000101881854000004044049001001021800 00008060400000000100000000003041000060000001205260D03281080304444500000C80000000 00000000000000000000000000000000FF5DD800000180180009204000008400000A008148000000 05100500004A00000881500300208000003200100000000000004801081000004000000000000000 00000000000000000000000000FF1FD6000001809809001000801801800041501831014080614404 020010008E04220420010554A2000020A68464060220540160062060000860080000000000000000 00000000000000000000FF2A8A000000000001801800801803000001801103920000600611010800 24060020D400223400215000A4065161045160040041060064400060000000000000000000000000 00000000000000FF97CC00000180180180184580180181400181D801820000600400028800204600 608631420600208800228608E0760064044040060060000060000000000000000000000000000000 00000000FFDF1400010000000180180394180311800180182180000060A605004000201600621E00 400221A00000200642600A38C0040481040064600040000000000000000000000000000000000000 00FFFAE400000000800980182100080180202188391408C00060040B400008652E04402008F15694 2220012046206506046257206886406200106008000000000000000000000000000000000000FF76 05000005925801001089004A218000018010008A0040600410400000680720404002600E10255001 243600E42A004A46002204006100004000000000000000000000000000000000000000FFFEFB0000 00000005801910041823000001801E00904000600410212180600640402E14614B10222800A20791 6046086416287406006000006000000000000000000000000000000000000000FFD3D30001018418 03801800001803110001801800802000600504208800680601C0862842A301210080204648608200 500F2C3004806101004000000000000000000000000000000000000000FF353B0000021040008008 00105401800001801801040040600481401000301700210420740600000400000E00650E00704700 6086006220006004000000000000000000000000000000000000FF1DE80000018818408428000830 05800001801005000010600600012053280600220401600200000000C00600600603600600400620); SDR 8000 TDI (2A0000000000000000000000000000000000000000FF046400000080080080880480080080080084 0A008000802063007052E0200AC0080200208382200100200380B803642062022082002002000000 000000000000000000000000000000000000FF891B00000180592180190190180984DB498A594593 4008743600411441709604E826956D363565410560A615612750714624408740E006000428000000 000000000000000000000000000000FF93710000200000020010010AB0011214A20A80A002A08082 8400448C0200045840A8084000A040002A02A82208A80D860C80460C260000400000000000000000 000000000000000000000000FF789F000000802900800800880800034140882B4294A01024020024 12A0A10A8128030B2D4A08240102210294A082902102042002C42002200200000000000000000000 000000000000000000FFA59100000000002000010000000808000004000000000000000000000000 000C00408008000200A2000020000000000240C0028001000000002A000000000000000000000000 000000000000FF2CAE00000000000000000400000000020840000000000008280000C00008006004 00000000208000008000000020268800100001000040540000000000000000000000000000000000 000000FFDF3F00008000004002202004840022020000000400010000000000000108001280090101 50000000200000800028080000280000000000000000000000000000000000000000000000000000 FFDFC200000010000000001400400001000000000000000000002280001000000001201404000000 02010000000100028000000000000000000002000000000000000000000000000000000000FFE434 00002A82A88A8C88808808AA8828AAEAA8A880002AA2AA0820002322AA202202202003AAA0000E22 AA2AA2026022AA02BAAA2AA0002AA000000000000000000000000000000000000000FF8A9A000000 0000410030010002000004002000010001000A0000400054080500400040410080C0000440290004 904200008C4800000000000000000000000000000000000000000000000000FFCF95000155955951 11514514BD55C09F5595591180015565560C4000447556D4441745429655600008C5575560060A65 56206556556000556000000000000000000000000000000000000000FF6C030000AA92A8048888AA 8AAAB08AA912A4482480002AA0AA22200000AAAA2A231212A222AA20003122832C204210A2A28020 CA0AA000352000000000000000000000000000000000000000FF0EF5000000000005000008000000 12200000002200010008002100000800000100A01000200040004000000002A80080000B10000000); SDR 8000 TDI (0020000000000000000000000000000000000000FF675D000008000601A01801805841E018010018 0100000002060C040C8840864090040160040060040060A482E45603600600380602604600000400 0000000000000000000000000000000000FFF870002001811801C118019018018018018178518040 0061170862000040860040163260260B6180504C9740600A50B04620404600402680000000000000 0000000000000000000000000000FF9F210020001000018018018019038019418018018000006006 4060428140060050262460AE4A600001500600710700248644C09600428700000000000000000000 0000000000000000000000FFD0B5000011881801801801881CC18019418018010000006106424016 11200600402708E00701600008C8060564425072470040AE00400600000000000000000000000000 0000000000000000FF11320000801440019218018038018018018018030000206156804804034026 84522710F0060060402460C60860260260474050C604602604000000000000000000000000000000 0000000000FF928300000001002981188BA8588D809A00811ED02060026C16A2C8C8204A8669E015 226190E0E20048C65640210204A90707000624450600002000000000000000000000000000000000 0000FF1E3A00000180181384981192D8238138808019282000006206C15020404C0680604C006A28 8A6000004006002A1EF96006040806404006080000000000000000000000000000000000000000FF D24C000000140001101905A51855803C0080180C002044754E04415004A146456A062462A4296002 824D06000006005026200126044026100002000000000000000000000000000000000000FFC97000 0081805845009801801881801880801820000000600600400000200610000E116014026440316026 100244044006000006006006020020000000000000000000000000000000000000FF42C300000180 18000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFAC0600000180180000 00000000000000000010000000005001001000004000001000000000800000805000800800801000 004000804000000000000000000000000000000000000000000000FF5D40000000800800C0980080 0801800800A00840800000200600600000200A000003006802002800082202012002002002002002 002002000000000000000000000000000000000000000000FF7EDF0000400000022000010AD00004 14C409068002C0010B000001040200000842A80800802248004409484200A8088A100A0490440020); SDR 8000 TDI (00000000000000000000000000000000000000FFFE90000200000000001801801801021A01809A23 000000053600224020200002C84608620400600E4C34C710601680700E4064068020060000060000 00000000000000000000000000000000FFB5D9000001801800041801801080081801801801000000 000600200000601008641600E0CC4060000020020064860020061060060020060000040000000000 00000000000000000000000000FFC21E000000000001801801801000801000801801000000200200 40000060000060020060040060040000060060060020060060060000060000040000000000000000 00000000000000000000FFF037000001801A01801C01801000001200801A01000000300200400080 60000060020060050060000030060060068020070060060028068000040000000000000000000000 00000000000000FF2ADA200000000021D0D801803040101820001805000001228241301000200100 C8020060440162048800025428261020061472468000060000040000000000000000000000000000 00000000FFE56520000194180124180580100004390004184100001428439028400862000C4C1314 E08C0861020529320164120430A600610E12A08E8800020000000000000000000000000000000000 00FF656900010580180180BC01981801881801801A21800088200600200100404600600202600F00 601002402E00698241A0870160060040C6000000000000000000000000000000000000000000FF54 B700000002060584184180590192780180180185001520366C202241410683620A8CE42705E044C1 415728680288280703F836C14806000004000000000000000000000000000000000000FF0F2F0002 83901841941805805E41801D41841805800084BC8601181610242711680300610690628811690683 6A4A223826102A8E15602E101004000000000000000000000000000000000000FF6E540000040544 21803801829801801801805B018000002346800004004016A86232816126306284026006106142A8 A217282226007026400804000080000000000000000000000000000000FF6E72000201809801E218 218018018018010418A10000100226C0200040C016442C4404608602603000488000600280200608 E00F80C846200004000080000000000000000000000000000000FF601900000000004189D8018419 7993DE89025C39050005011605A00200416612200429604651600C40405006600241601600604640 4784098024000000000000000000000000000000000000FFD4B7000003823805901801813A018219 09001801000000000600080600200780A00CD0620480628102C000087947902206C0220600400608); SDR 8000 TDI (000000000000000000000000000000000000FFA6F00000068008B1800980900885040302000A6000 000020AA00401000200048240A18620202204021A40241224202200200200248280A000000000000 000000000000000000000000000000FF72DC0000018218082200720822402080C800180800004477 40B000A808084000004120000C1400000802040000880500880140C0000200000000000000000000 000000000000000000000000FF1F3200000180180240A00402002248000010000000000000000C82 000000000201210001400002000600800081106004001698080304A0000020000000000000000000 000000000000000000FFC060000001801901215801001919831200041A8180000060040000400240 801042000064060980001041460E202410C006206006344006000000000000000000000000000000 000000000000FFC9D9000202220241049AA3209A0B2211102098318000A06804D20488806280926A 04A86B0E820A00C12906A42CC48C7096D2C48E92A886000840000000000000000000000000000000 000000FF3308000001801915803A011458A1895002001F038000006CAD00A82032E000A0C0340060 0508E0080A4A0E10A00CA0E80600480620442E000000000000000000000000000000000000000000 FFD5FC000000000601E0180100100000100000180180000060040020000078000068068060040060 00002006002804002006004006002006000000000000000000000000000000000000000000FF5360 00010000000184580100180194140001184580000063660044096060085168131068164860001041 260E68A63E6006186007005006000000000000000000000000000000000000000000FF521A600001 A01801081801001801601400001C01800000600600400000600008600600600680652840700600C0 070170A6006086006006000020000000000000000000000000000000000000FF15D4000200000201 801C01A8B000001A0000184180000078040010010060A0C06802006004056000030006A00C168020 0E007807001006000010000000000000000000000000000000000000FF9952000001A01801901801 915000001800001841880000620C0000300060189062A700E8848161082222261C438E44304E2062 06002006000050000000000000000000000000000000000000FFDA71000000000400A01801801801 E01801001801000000022700400020214040400100600614642E42882641622E10E0960870868000 06000006000000000000000000000000000000000000FF0700000101981800C05801C01080001801 00180110000008060040000060014261000062248060000020060468667420660060060020060000); SDR 8000 TDI (0000000000000000000000000000000000FFA8DE0002802002010002000010000002042002400000 8088008048B0224000108800804004800A02805248808A10A20804904000804004000C0200000000 0000000000000000000000000000FF76E9000000900800800800A008008008208008028000002002 00200290280244201200214200208000210200214201200205280200200200000000000000000000 0000000000000000000000FF775600002A02A0AA2AA0AA4AA2AA2AA0C80AA08800002B02A82A8241 0092A99502B12A9A082A85022A80002A01001802A82002A82A9AA800000000000000000000000000 0000000000000000FFD4760000000800200000004000000000020000100000088000000121000000 20004800002000028284800808004000080000000025020000108200000000000000000000000000 0000000000FFB5650000AA0AA0AA4AA0AA0AA4AA2AA0880AA0A800002A02A82A13082A02A8000320 2A82002A80002A81282280282482A82492A82A82A800020000000000000000000000000000000000 0000FF869D0003542543043543541543543543503543400000C40D50D48C10548D50950D01550C90 D50800280C40C40C08D08550D50D50880930000000000000000000000000000000000000000000FF 5EF60004004004000004000000000004044004020001001001010000010000401000000149001001 801201101401001001080001000000001000000000000000000000000000000000000000FF395D00 002A0AA0900AA0AA2AA0AA0AA0880AA08400002202A82000008082A8000228AA82002A8000080320 210100248AA82A02A8200020000800000000000000000000000000000000000000FFC793000300A0 0A10A00200800A00A00A02A00A108000882802842A00102800912902002822802882042802802C52 942002802802943002000082000000000000000000000000000000000000FFED8400020020022300 1000400001201221200223000080800010C8B0A20000A20800804890000A00C088908D4900800004 808004808D14000800000000000000000000000000000000000000FF348000000584182920BB2980 180B80984104190180000068061260200160002060460060260AE040006106004136416806446826 00E006000000000000000000000000000000000000000000FFB867000440C00C80800C04C80EC08C 1900D008298001543543C020110228C908351210328B8030015532432530030A320308A003542202 001000000000000000000000000000000000000000FFADFB00024024024000140020800010320120 83130000B00000421000A58310A08810000891000808C00808A00800881000C81200808800000800); SDR 8000 TDI (00000000000000000000000000000000FF7155000100080401400A01A01A15C01801800001800000 E00704280214E0060044000060000460004862AC02400A22E0060040042240060002000000000000 00000000000000000000000000FF7CA000002A82A801AAB881057803885A918AB0AB8000336246B0 400600600680E85C2AE05AA060000062AC0062360262AE0042AE0042AE0001000000000000000000 00000000000000000000FF5BC6000001101203801811901901A1180380140180000860D6154006C8 600640410400620002690021600440E01600E00640C0060D40060008000000000000000000000000 00000000000000FF889A0000800000D1800023029831025029800001800000E00600200002E00614 62400060C60902000C60041441023040060C00044000060001000000000000000000000000000000 00000000FFF2E70000018018018108098018010011218400A5802001604601208003608600408400 E0C404000201604E2260064460160100460000064801080000000000000000000000000000000000 00FFF2BD00000100108190080180784109901D880003812020E00604002018600619607C54E01C19 00125867A409268C096286600126000186010002000000000000000000000000000000000000FFDD A70000008008B1000001821805141001882011820040608600003000600602400400640400008000 600410212E10232600000E080036000000000000000000000000000000000000000000FFF9E50000 018018201080080200400000A40240C005000001400500800280000401002C022004011021000003 0000448048008090000010208088000000000000000000000000000000000000FF83C90000018018 0000002800010004000102180100003260840000000801000202240001501000080C03144280400A 8128004014004000000000000000000000000000000000000000000000FF8DCA0000008208118028 00800804840800800810800000220200001A0261020120822AE1000120202020124020CA00200208 2082322042100000000000000000000000000000000000000000FF8A1A0001800C040242C4004234 00440400000400000000106118D08100100104104100124100900140100108071004104112100100 1000001000000000000000000000000000000000000000FF5E42000000880C04C00C00C22D00C00C 00800C00800014300300308300310300330350310301300110350B04200211300304300300300200 1000000000000000000000000000000000000000FF9E9F0000018018010498298018018018018418 01800020650600E0160A600600600602E20E08605004600629602600610E00410E44400600000000); SDR 8000 TDI (000000000000000000000000000000FF271500010000000980080480180000180183380480000860 0609208400608600600400641608600000421022210200200600422600A006000006000000000000 000000000000000000000000FFB1BB0000AB02B0A98A08AA8AB8AA0AB8AB8918AC80002AE2AE2922 CE2AE2AE2AE2842AE2A63240002AC2A820245200A2AE2042AE2222AE000004000000000000000000 000000000000000000FF78C00000540D4125904951955954955955D019500000C545564424565564 562965545560C6454004554020092022332556554116546556000004000000000000000000000000 000000000000FF0DC300000100100380880080180080180180180000000040060420040060060060 4C006016014000004000032102042006114006106006000000000000000000000000000000000000 000000FFC9B800002B82B8010518030AB8898898AB8838AA00002222AE20A2222AE2840462A82AE0 8E2A60002AE1240044920062AE2A60042A62AE000000000000000000000000000000000000000000 FFDDA300010000000102184100184184180182180000000920061220020060140A40000062460160 0400610428C002016006006004006006000004000000000000000000000000000000000000FF3C4D 0000018818AD89589100180380580181180000000020060041160060262160000060060060000064 1404445232600600A34C012006000000000000000000000000000000000000000000FF216B000100 080005801801401853801801801800000000A10610C0068860060040A0006002086A042170040841 0241600600200402A006000804000000000000000000000000000000000000FFED41000001801A20 A0180100190180182380000000000008068400022460068060108060060061000462C440C0221060 06006004206006000200000000000000000000000000000000000000FFDF3000002A02A0CC8AB8AB 0ABA018AB8898AA4AA00002A022E20180240E0062AE2042AE2AE22F00608600C03624E0262AE2AE2 AE0862AE001006000000000000000000000000000000000000FFB2F9000001801802001851A01D45 801845800804000000101600480714600748E0010062040268000268044A41020C60061020043020 06000800000000000000000000000000000000000000FF7039000054054110155B55D55CC1955B53 954954000054054E50C00700600755515455655548E50404E0043063060865565525560925560000 04000000000000000000000000000000000000FF710100012B8ABCA9CAA8830818098A98818AA0A9 800022628725200220E0060264802AE08228E28048E2AC0142222162AE22C2AC02C2AE0000000000); SDR 8000 TDI (0000000000000000000000000000FFF1310000018018020000000000080000224000540000900150 0000A80000000000000000004105000C000000045010002809000001000000010000000000000000 0000000000000000000000FF9DE6000001001011001801801904801C01C23C01800092104000202C 08603604602001624602600810729000E4162145044060060000A622000000000000000000000000 0000000000000000FF4F8900000104104110580090D8109138418019058081000108006484016006 1165100C601601602044600032602410401401624600001600000000000000000000000000000000 0000000000FF5AC50000010010018D18068C38008438019018430080C300000060A4406026086208 02E30618602020600022E18620600E00602640040610000000000000000000000000000000000000 0000FFBDB70001051210218498008018008818214018A180002080A010600400E00E026100006086 02601000400008200208A08604420600000E000000000000000000000000000000000000000000FF EFB5000001001009A430018499148518018C5801800110001000240C30600601614488702E00E010 12628800645600620620E8062043462C0000000000000000000000000000000000000000FF693F00 0001041003815100855800803821A0184180801002A000A03620600600600400628E0041000A4000 252112496116A0600E004006000000000000000000000000000000000000000000FF94A300010110 10050150018238008058418018011000000240006446006006006104006036004000047800006446 10380F00C006005806000000000000000000000000000000000000000000FF232F00002500100140 1220A11C00A8180140380188013611000062148A738602602689E5268AC121004008042222013106 88C806804006000000000000000000000000000000000000000000FFF820000041041000C4012080 1801881801E0382080814000061120042A62060260250870060AE02C88601040E08E40600652700E 002006000004000000000000000000000000000000000000FFD272000081101004842000C01801C0 1801833802800000000602614E0060060064040064C600400000600008E2160D200680400682A006 000000000000000000000000000000000000000000FF1D26000001001040A10400801A0180180180 18000001013000112006806806006154806016814000004000022082406806046806006006000004 000000000000000000000000000000000000FF74FE00002B12B0888840AA8AB8AB8AB8AB2C58A880 00AA22A82062042AE2AE2AE0042AE0062A40002AC2A83020225022AE2CC2AE2962AE000004000000); SDR 8000 TDI (00000000000000000000000000FF90A60000012000010010234390340230210A820D000080C60010 010102C0A000500021C1280098202802A8A2C1A92880240100004000040405000000000000000000 00000000000000000000FF61B8000480800D00400904D00CC0B0090A9009409320442AC302200A44 24525501021428532A2140C32A120028AA0C204AC42A420024020000100000000000000000000000 00000000000000FFF151000200120008208000008200000040000000000080080000090000000000 0041C108000080008001000008000000800008000000000402800000000000000000000000000000 00000000FFB4DE00010000000000000000040E03A20000000A0000000140380800880000C0084900 0380000200080000001400A400010180102000004000000000000000000000000000000000000000 00FF80D3000000000044000490000002000400000200000100005082000100100080000100100000 0511000001290320040001000000801000000400000000000000000000000000000000000000FF5E BB000000000000002040200020400000200000000011010029000000000000009000000000000000 1000040000110000001000050000000000000000000000000000000000000000000000FFF90D8000 AA8AA88C8A88028AA8C8CAA8AA8AACAA8000223A020022AB2AA2AA2AA2222AB2AA2AA0012AB2AA00 200A2022AB2AB2AA2832AA000000000000000000000000000000000000000000FF87510000000000 41005000201015001500400202000100081000001500400400521500400400000080080400024813 1100800805005004000000000000000000000000000000000000000000FFC4DC0000558559311555 13D55911955D55F55951800154654F256556D57557556CD755655655610055655745654604E55655 6557C94556000200000000000000000000000000000000000000FFE08F0000AA8AA8828888AACAA8 808AA84C8AA8A880002A2AA22AA0A22AA2AA2AA0222AA2AA34A4810AB2AA2AA10220224208AAAA2A 22AA000100000000000000000000000000000000000000FF62A70001000800010000400000030014 00000204000100800008000000400000000500000000040800000010001048080080000002100000 0000000000000000000000000000000000000000FF94E20000AA8AA8988C90AA8AB8C20AAA00CAAC 008000212A022AA4042AA2AA2AE1002AE2AA002040402AAC2AA08220A2924622AA2B22AA00000000 0000000000000000000000000000000000FF990D0000010010400240010000200000918019018000 05600600440000000000035000000014002221400600400004000040400000400000000200000000); SDR 8000 TDI (000000000000000000000000FFF12F000001801001841801C1102300180000180082010420060060 060160071462070068020840010568070162A6144406C80004026086000000000000000000000000 000000000000000000FFD937000001A01801CC1C4180900101188000180900000061070440060150 20005286822886D040A0045006006227C05006847435406006000080000000000000000000000000 000000000000FF23FE0004C58A1841C4180180920100180001094100000040460060069000461040 8E0140260860485040B654600620C006844524056016000040000000000000000000000000000000 000000FFCA7F000401C0388180982180104D243822801100840095100622600E4600868060665100 02024200D06E020469041C6C26302004044306000080000000000000000000000000000000000000 FF52020000019418418818818012B13998008000008000A6029A41E08620820700E0470942CA84C0 0002240210608490600608400C004406020000000000000000000000000000000000000000FF8276 000045805901CD18C1C010A100180001120000000003028068170023460149061051061044292C50 3242700001684680221600400E020020000000000000000000000000000000000000FF0C2B000101 801001801801811001005822000140000040004202608455600008400E00420E0160000041020060 80406006544142036006000100000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FFCEFB000000001000000000 40020000000000120000010000000000040000000050050008008040000010010000008008000000 00004800000000000000000000000000000000000000000000FF6BB9000083800801800800801000 8088000008000000004002002802204002202022400002002000102082002C020020828030020020 02000000000000000000000000000000000000000000FF5596000000000400000025048020042021 0D00B1000081042000000183014000400000C03081002221043042C1085008242002080000002000 02000000000000000000000000000000000000FF08C3000002800C00800800800804980A00800EA0 800000210270200238200200200200170298200000A803982043052082A122020030020000000000 00000000000000000000000000000000FFCF56000101D21C91811883B01921D2B9358818B18AC024 40A72468164A423754C8AE34622E54E540556A960060363460B6446A460064060000100000000000); SDR 8000 TDI (0000000000000000000000FF81DD0000018018018018018000018018000000000000002004006006 00200600400600000600200000600400600400200200200600000400000400000000000000000000 0000000000000000FF4C77000001801C01801801800201801C00000C000001002006806007006006 00400680000280200500680400280680200200200600000480000400000000000000000000000000 0000000000FF95AF000401801841801A01400001A098000019108000006004006016042006844424 1050060028062A600431012400240220640625000400000600000000000000000000000000000000 0000FF4F3A00000184180182184120005380188000180080000160140C7046003146C0400420688A 8D2C0C80E544002C16922142086096080084800404000000000000000000000000000000000000FF EC45000001821401925801801021805A0080100090010080040A700601800020201680280208C000 00620400620E4B603600208E806006000000000000000000000000000000000000000000FF208B00 0245801001883A41805A41A4D800811110800000200C80612712498702266600210600500C086804 286086016006000206026006000004000000000000000000000000000000000000FFBBC900000180 1841801841C01815C05900000111080100600480401600602600300848211202620524E125016047 20E297502006296086000204000000000000000000000000000000000000FFE0F500040188180181 1811C01800901A14000005000110484410C00E45601601281040B437426028D0E09620628E406006 A80006806086110284000000000000000000000000000000000000FF572B000201F01E0180980980 1A2100180B8002820000000806812116006006008006490040A841400AE006406A96016006402006 007886080004000000000000000000000000000000000000FF03C100000580180182184180121B21 9C21870630000001A046106007D02110EE04C78E01000C488042660682682680600E102006206006 010404000000000000000000000000000000000000FF5ABF000041801001A41801C0340314584100 0441000010700300700785000608111600440A00401400608E04602640680E002006406006000104 000000000000000000000000000000000000FF2580000001E0120180180180100105580300001100 000040820060064400070000A6094903806124004306006806406006020406106006000944000000 000000000000000000000000000000FF3C3C000001801C01901C41C0120100390200190080011100 0684600600765E0A6807442062464618D0E0869CF00680407E203055486006001020000000000000); SDR 8000 TDI (00000000000000000000FF3C5B0004820200002220001824000001A0008108000008000808000002 02003080500300200001010281100801002810480402A00884800000000000000000000000000000 00000000000000FFE6BD000001851941801903001101802800082001000010000400000010400606 60A60001040CA00080640600600200402020000C0061060000000000000000000000000000000000 00000000FF3519000221C05C1388BA0320B205A529402B2CAB000080C896D4A8B4804916C36CCED4 88050928000B6922C26A428A68A8AC0ACCA2E8060008800000000000000000000000000000000000 00FF211000008B921881821AA91004118808104000010000D0020480240654820680400600022140 2480006406897112206000008006086116000000000000000000000000000000000000000000FF1A 18000001801801801801400001800800000A01000000400480200600000600400600000000200080 6004006002003800000007800004000000000000000000000000000000000000000000FF757C0004 01A0180195580180020184104000044100001010042C60071D400647744450714302200110609602 692220600000CA06006006000000000000000000000000000000000000000000FF5DA90000018018 01801801401001801100200901000000000600640620440620600580608200A2A808600500701200 6120005016002806000228000000000000000000000000000000000000FF01ED000401801A01801C 01800001801800000205800008000480600400202700702400680208200003601648600280240040 4806045004000000000000000000000000000000000000000000FF15D7000401A018018018010002 01801800200801800080080410600580200F4C600402E80A8FA0F800E20460E2620A21E001C41706 0004000050000000000000000000000000000000000000FF2624000401801C01A01801201801A019 0000050400009000062064062844460068460001040822848D6096126010206402A0200600600600 0204000000000000000000000000000000000000FF0A90000001801801805801000A019998002008 00000000420680600600402600600600070424604402602600600460200208200604400400000400 0000000000000000000000000000000000FF7D53000001801801C01801200801C218000000008001 0800060260070AA02690CC04044822C8E0808D640440E8A692612700680680200600000400000000 0000000000000000000000000000FFAE8A0000018018019518010008018018200008208000004406 00600600201644402450E01200601400605400640600200610E00600000400000400000000000000); SDR 8000 TDI (000000000000000000FF79570004AA0AA0AA0AA4AA4AA0720AA08810408200002000000102A80611 102B0241440400AA8010D583202A82002A82A8180040AA82A8000000000000000000000000000000 000000000000FFA59800040008040000040009400000001002203400000000880008480410000808 00848110128000000200000108101000440050208000000000000000000000000000000000000000 000000FF82870000AA0AA0AA0AA0AA0AA0800AA08802009000002202402202A80880402A02080800 482A80010002282A82002A82A82002002A82A8000000000000000000000000000000000000000000 FF2EAD00015424A1543541542403523541443103000000CC8C40A20500D104B0C204D0480C008008 00D28910D50C40C48550911500820D50000800000000000000000000000000000000000000FF59B5 00000040040040000000040440044441044400011110891018014004010011000111010012000010 01001131001801051111001000001200000000000000000000000000000000000000FF0C5C0000AA 0000AA0AA0AA0000880AA0800A80800000000220990000A00000230A000082404004400002402A82 A02282A80202203202A8000000000000000000000000000000000000000000FF69D5000200240A00 A00A00C54A20A00850200A108000A0A88A20250204282280A10A802902B428008CA88A8028128820 02A0280B112802000800000000000000000000000000000000000000FF2B80000201293001001200 30120500020420224500000C480083082810CB0C880820B44850814A20C048408008048000049148 80801000000800000000000000000000000000000000000000FF78F9000001809801801803949815 8018000058850000006106086106D4E0AE4CE0460862A641400020641620E22400E1040844064064 06000000000000000000000000000000000000000000FF6C8F000020CC0F40B24D40800920EA8880 550C018001D5340324B04B00200300300B00B00304308000B0830C3103422C4322B00310B1020010 00000000000000000000000000000000000000FF1C2700004930300A5040040102461B8200370224 000125CA00C10830A1889C800A00800840C04880800800A00A808205009A8C00D008000008000000 00000000000000000000000000000000FFD333000000800881C00868A09008840808004881800000 000230220244500201200218C00200200201628240A4020520060020022320020000020000000000 00000000000000000000000000FF083B0004200804000C8481240010200000001802000040058406 81C80801404000082006002142004800201700684010844140000000080000800000000000000000); SDR 8000 TDI (0000000000000000FFD337000201A01C01801B05A440010418000008218000900904016056046806 80400E80610700684080000E08450209680600E05620600600080000000000000000000000000000 0000000000FF21270000018008018010098010008158000B3011000000C20224600610E0060CE086 14605000000000004604600202400E00410612649400000000000000000000000000000000000000 0000FF982F00000180184580180184000C941804080105000004400A21600600E486006016206000 0544800000162060824060260440060064A6000000000000000000000000000000000000000000FF 35A90000018010219E180580180080D84A001093008000010008E60E04604608634620618C08C090 11030E01601C21E606204156106006100000000000000000000000000000000000000000FF63CA00 000180000180182190182080980800002104C0000000086096406006084406016234104020000424 146004106016514006206006001000000000000000000000000000000000000000FFE24E00000000 000000004214005212402000005002200400882001004083000000500084200000501100C02B0100 000020020128080220000000000000000000000000000000000000000000FF75A300000000000800 200000200000000002180001000041000000880202000A42000A00A0488240084084240000024090 010200000004480000000000000000000000000000000000000000FF345900000980080480880180 0800800800100800800020A00002200604804600210220A00406040000202A08A2A218A012112086 602102100000000000000000000000000000000000000000FF7FD000041042040141440042940040 0400000400000100100500D101085001001079005009015001020001011400641205021001485000 000000000000000000000000000000000000000000FF9F9B000400C00C00C00C00C28C00C00C0004 0C00810100300301300308300300300300302B1434410A2083423102003013003503083002100800 000000000000000000000000000000000000FF4BA800000184181180180180300180180000180180 0041610604601603640612640634E106206000006036106046116306036006006006200002000000 000000000000000000000000000000FF68F200020140040120020120128020120029220000008C08 24C4C80500C914800824484C04004A10280800800850801004831404004800000A00000000000000 000000000000000000000000FF4B71000000800800000800800810800844040830800000A30A0820 0248244201210A84A152002000022112002082002002402152002002000000000000000000000000); SDR 8000 TDI (00000000000000FF2E5C000155833955951155802103155801B5513580004D44C655455454A55600 655655644C50E0244061141524A653255654A55655642E0000040000000000000000000000000000 00000000FF2959000001915801801001800041001801811001000010400E00400400600600400600 61064160000060040020160020060020060060060000000000000000000000000000000000000000 00FF2A260000AB8010AB8030AB8000838AB80008908980002202022AE2AE2A42AE0062AE2AE28426 800023220640620E0262AE22E2AE2AE004000000000000000000000000000000000000000000FFD1 83000001801801841001840001801800041001800009013200600601400654E00600600400020400 A01620600610600600600600642C000084000000000000000000000000000000000000FF002A0000 018B380189100190C049801800002045800000000400600600400600400600604E1021200820A615 6126416006086006006084000004000000000000000000000000000000000000FFB2E7000201A01C 018012018000018038000120018000880004086A2E0C400680400680602652201080201604634608 E846046806356004000804000000000000000000000000000000000000FF30FA0000018010018010 01932001841800041005800040E002006106C0400600600611610401000000254631601604608E08 6006006004000004000000000000000000000000000000000000FFE06B0000AB8AB4AB8AB8ABA000 AB8898000812A980000262AA22E00700CAAE2AE2AE227A0D5018002AA00600600620631620E2AE80 62AE001004000000000000000000000000000000000000FF8A3A000001801A01801101C400018018 00011445800100E00440701680C80700602740E82600680000020641604634600601608709604400 0800000000000000000000000000000000000000FF8B6A000355B55955955955A81955931A001485 518001306554C4E50650CD5755655752612E00601455031709655608642644655715655600000400 0000000000000000000000000000000000FF3E6C0002ABAAB8AB8AB44B88D0AB8A38000208918000 2A424002E2462262AE2A62861263162AA0232A80060062820072AE2A720602600400000000000000 0000000000000000000000000000FF2806000001801801801401832001803800002A03800004D000 88604E026006006006016A0602E001000046C2600244F00608E006A0600400000200000000000000 0000000000000000000000FF29CD0000AB8AB0AB8AB8218898AB091A00104883800022013C186386 B062AE21423620E2062AA0002A83D634E03A2162A62A625640E53600000000000000000000000000); SDR 8000 TDI (000000000000FF12B000000180180190190D84100181080140102480C00000240140125000064080 C20960404C64000000D2104008106086006016006000080000000000000000000000000000000000 000000FF9F07000001801933801809820030960841000132000040400C0445040182462080864060 042062000800020040040440C6004006006000040000000000000000000000000000000000000000 FF2B86000001801989861083805000008821200088108022400601400424000618001608E0244160 0001000223400400027E240006016040008000000000000000000000000000000000000000FF5CE4 000001A01801B0180180040C88100120080000200048C413429410202600604C4060021260404101 4E1021162A6006054056006144520000000000000000000000000000000000000000FF454C002209 821801801001800000901001021900800001400400402A00204601610453644A8460104000260023 2E28B206104006006004010000000000000000000000000000000000000000FF6B25000005841E01 801E01800400001801040840080000104604402C0238060060A442E12F006009A0000404A0161070 07840006006084008000000000000000000000000000000000000000FF5230004433A01B19C41201 80100020188140082000606102A61A50040820470050341064874460000006C5022506002C461000 07006884000000000000000000000000000000000000000000FFB183000441C01801C01801804001 901881400100000000650401400408200691600600600000E00400E10600202641400E00600600E0 22000004000000000000000000000000000000000000FF5F4B000001949A01801801801001201801 09100080000060240040020020060060060060904261000060060020060040060020060060020000 00000000000000000000000000000000000000FF16A8000201C05801C0120194C821801801204000 00000D610E00480400200600680600604080E2140060068021260010060060070070060004040000 00000000000000000000000000000000FFB9C60000AB8018AB8AB0AB94088B0AB8011600AA000020 62462AC2AC2AA2AE2AE2AE2AE2420865002AE2AE2AA34E2A82AE2AA2AE2AE2AE0000040000000000 00000000000000000000000000FFD1090000018818018030018C8829001801A01001800000401400 40040020063360060060840062840A622400200E0020060020060060820000840000000000000000 00000000000000000000FF3C940000AB8218AB8AB0AB80C88D0AB8018030AB800022C2842AC2AA2A A2AE2AE2AE2AE20C1260082AE2AC2AA2062AA2AE2AA2AE2AE2AA0002040000000000000000000000); SDR 8000 TDI (0000000000FFE4C60000000080100000000000000400000100000800800000000008000900000000 000000800040A2000080010820000008080800000000000800000000000000000000000000000000 0000FF47D30000100000000402040000504080000000000000880C80008800000028000A40820098 800080080620480000020218030000000800400000000000000000000000000000000000000000FF 5D4300040000000000000010404C0000002102200001001000001080031000100088800100000000 800000100080030000548000800100000400000000000000000000000000000000000000FF802400 00000002000002000500000200000040000000110000000220480000000040000048000200008108 010020300800001000000050000000000000000000000000000000000000000000FF194D8000AA6A A8AA8AA8AA80088088A8AA8A0C8A80012222ABAAB00A0022AA22A2022AA203AAA0812A223222220A 0122AA0032AB2ABB02000000000000000000000000000000000000000000FF935B00020100120100 0401001110400002400000000090008100101000500540D001004094004100805000000011000804 041004805004000100000000000000000000000000000000000000FF03E2000555955D55955D5592 1955B11955C0D951800053755655690E005556546D17D56506556080546CC644E446007556116556 556414000000000000000000000000000000000000000000FF64BB0002AA8AACAA8028AA8A28248A 28A88AA88A800022A2022924822AA2AA0A02B22AA0222AA4002A22022AA2A228AAAA28A2AA2AB2A2 000000000000000000000000000000000000000000FF6DF000000100000100040100B0000220002A 000200010000010004202AC80500802000002C00440080C000080088AA0004241000800020000200 000000000000000000000000000000000000FF29BB0000AA8AB8AA9708AA890008890888A8886080 0022205204204A2222AA00C22A2AE4002AA0812B035A2222222622AA2022AE2AE2B2000080000000 000000000000000000000000000000FF29CF00000000000010800001004204404200180100000964 8404C22401000044000000044000020000E10000000800000014800000000C000000000000000000 000000000000000000000000FF2C1B00000000000000400004410001000004409200008000504800 80080000080100000108000000000040088100088000000000000000000000000000000000000000 000000000000000000FFD853000001801845841801800025800801200000000104008C0860020002 0608001200600000602149000244408020640E44E026006140210000000000000000000000000000); SDR 8000 TDI (00000000FF996000000400400001192305190180200120B41400000070C600684414400204730600 610645400843640E2244040231062472061060060000000000000000000000000000000000000000 00FFF98900008000042C0411010C1820008058804025000000C00208644000400408500622634284 02A0816140886008442026894004254206080280000000000000000000000000000000000000FF5A CC00010400000000180110380A024010800044002020430E006A4020C08C00C00640E42A00001000 603200601080200610480600540E000000000000000000000000000000000000000000FFC0700000 00004050011941851B40820000000411804041480E006400AC408E14C50403680740000144E02314 64000030C7024406884016000000000000000000000000000000000000000000FF1A2F0000000000 0000180380580C808000014000000000424608600201400400400600613603054000420220600004 2006406006406006080500000000000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FFCFFC0000000000000000000000 00000000000400000000000000400400400000000400000000400000080080080480400080400000 0000000000000000000000000000000000000000000000FF22E8000008000000200800001A00A000 01001001800000200202200200200280200200280200290000200200204200600208200200000200 0000000000000000000000000000000000000000FFBBA70000000000002840014000000500000500 2000000010900010042000808005200080000508102C052800081014004080022102000420000000 0000000000000000000000000000000000FFDC88000000000000040804800C50904000800C208000 00246200200220266200200200301240200801B8035829836026128F222200200200000000000000 0000000000000000000000000000FF4A66000000080108001813A89C458340058114111000086C26 007C4404E4261261273564C63343504AE4260C60150242064B620E80700600041000000000000000 0000000000000000000000FFB4170000000100000824010010000AA0010291010000001188030014 00019000168000D01022D880AA00A8000D6CCA503480080002410440000000000000000000000000 0000000000000000FF7DC1000000100080000814910C24802002800C908000002422002222032C02 14214250AA224CA40801280282224200280240A20200208220040000000000000000000000000000); SDR 8000 TDI (000000FFF6CD000000011841801801001803821000000025800000700600710C0520031162A61060 04006004202026C1423600280E802C04006006000004000000000000000000000000000000000000 FF4EEB0000100018018299011098019010400100010000206416146C41106002C0600E0061048068 2010208614408288A00610215440E806000000000000000000000000000000000000000000FFE501 0000000000000296000819C3880020C00402800000200E00680A8040060060060068040460000020 8402300640A7C60050A410E006000000000000000000000000000000000000000000FFC446000000 004000001081045A21D200048088400000802D164B600682680608F8B6086586106027C021046121 3E602806004304C06006000006000000000000000000000000000000000000FF4E70000010010040 001001011801800601401840000120640600652611400620620E00600402200428304510A2831030 36086014284006000004000000000000000000000000000000000000FFA5D8000008080000029001 081B21A10001081200000010684600705680C00600F00620680702A415012A04886042002C0710E0 0408400E000084000000000000000000000000000000000000FF466C000020000000001001101A41 880000C00200800100088E0064040040060060062064048B63140020840060264060068040858040 06000084000000000000000000000000000000000000FF12B0000020100000091201001801820004 800800800001840641620009408600601600716E0060844F201F51600680E0071040060040061800 04000000000000000000000000000000000000FF376C0000080040000A1801045D01848001281A40 800010604600702910408600E00400601600200010620400608B8164060140045040160000000000 00000000000000000000000000000000FF810C00000000000C601801001A11940001003014000000 28260060500840048860040060A6002004006A8600E00200241612780E8060060000040000000000 00000000000000000000000000FF336B0000000000080510010598498A0040000181000006711481 60060040072F681E006006044000C06054D660040428260040250469060002000000000000000000 00000000000000000000FFA659000000000040001901001A018000100008010000006005046C0600 C80640700600680E00400110E8050060C420A04600C04408E0060004000000000000000000000000 00000000000000FFD72E000000000240011001001841800001001C09000000615603601611500601 600600780E00400050620E49612501340E0C40169079060000000000000000000000000000000000); SDR 8000 TDI (0000FF96C0000000401A01903B29C01A30A818000800350000B0E80094600ACCC8031460A6C00A4E C40A30B02C80A20A568C6810882C06808A2E000808000000000000000000000000000000000000FF 5118000100081805C418018B3904C35B50024101000004653400654000254A01620E120006100001 83302408408640C520042056120086000000000000000000000000000000000000000000FFE05200 0000201801A018010018008010006002010000004002006800006002006006000004000002002804 004006000000002004000006000002000000000000000000000000000000000000FF7A9300005040 1805C019018018E19538400003110000107042107400A5026450640600401750400002AE26206016 2A621E02A027004006000000000000000000000000000000000000000000FF8CF100060000180180 1801001A019018000000018000026002006005004004007806004806004401002006056046806006 006006004006000000000000000000000000000000000000000000FF66AB00000000180180380180 1E018010002020059080007106006006004010006006804035014000002086806007000006206805 804006000000000000000000000000000000000000000000FF723B00000000180180180100190180 560000C00100000072040070070844000060060848D400448020A4060472E7001296036044004006 000000000000000000000000000000000000000000FFABAB000000001A01805801801821101C0000 0605110002708200600120083600680700280601200402A1262100062A6206222006002006000004 000000000000000000000000000000000000FF9E6D000000001A01A0190180184120100041000180 00006082006028004002106C06002234002000086406980806662116002004002006000000000000 000000000000000000000000000000FFBCB3000000001801801801001A010A980000000180000865 0210724A0AB022206006106CC6086004C068060040A7004806022806806004000004000000000000 000000000000000000000000FF75B900005000180580180100180100102000008900000060420060 0600600200600600600420610408E006004416000406002004006006000004000000000000000000 000000000000000000FF5AF000000000180180180100180180100000000100000060020060060020 02006006002004002004002006000006002006002004002006000004000000000000000000000000 000000000000FF9ABC000000001801801A01001A0180100040040180008060020060060070020070 06002804802806802006001007002006002004802806000006000000000000000000000000000000); SDR 8000 TDI (00FF4B7C0000000000004AA0024AA48A40008A49202800002083002A82A02A80482A82A82A8A202A 02013082A82202484D0AA82A82A82A82A8000000000000000000000000000000000000000000FF19 6200020020000020C3225543102001103044840000D10540D514C0528800D50A90D50A80D4090000 0C20948D48D50D50811008B08550001100000000000000000000000000000000000000FF03270000 00400000000440000000000200000004000110002100180080150100100100009100900282100111 1101000001001000001000001002000000000000000000000000000000000000FF42550000000000 001280822AA08000008200000000002202002A80000002882200002A80102B00000800802082A02A 82A81408000402A8000800000000000000000000000000000000000000FFBCBF000400400A00A84A 50800A02A008502B0294800089281280210A112803002B52802D42803100052C3290280A80280288 2023032002000000000000000000000000000000000000000000FF952C0000000010012012000012 5000020020402100008008C4800444A44820894804004810814800A04800840800000000C4CB10A8 4800000880000000000000000000000000000000000000FFB4F7000000081841901801A018838418 00000301800023630C046AB450C04602609608400640411004450608600652622640405600410600 0000000000000000000000000000000000000000FFECA8000100400800804D10D00C08C008100040 428001002043503003023413202403A434D30A320049302B04B0C380380214320350300200120000 0000000000000000000000000000000000FF9B210001000010402202A048120A0822004864200000 8208DC800EE8814808860D00160808820808B148A081088080000880084140008800080000000000 0000000000000000000000000000FF4620000000000800C008089009808008000004030000002602 00200400228200200200200200201082A00200200220260214601200200200040000000000000000 0000000000000000000000FF30A000008010000000200002800000802000008000004940204A6000 00840000000148460404440044451036002C1408A00A400418522000000000000000000000000000 0000000000000000FF30410000000004023841100000140400900003000000009100100100660050 48980820011078032000000008034000800100060802010000000800000000000000000000000000 0000000000FF566700000008180180180180382082180802004D00002460000468161800260062B6 0000660000000822400000064A604040202600800600000000000000000000000000000000000000); SDR 8000 TDI (FFCAB10000018018018018018018C4811001001840000010600605620C0064040060080020162104 800260063065020060040C4002006008010000000000000000000000000000000000000000FF3EED 00000180180980184188182280B00100181B960008600610610028E10A06614041608E3400900260 6604E24264C4C4004002066080180080000000000000000000000000000000000000FF9BAE000001 8018098018038A1810803003001803800000625600404028E00E1060000A65260000000060160160 0208C114004006006100000080000000000000000000000000000000000000FF82DB000000000000 00004404000000000400182008000004201285000004800000205500400C02080000005400201402 30040000000000008000000000000000000000000000000000000000FF25E4010000004080000080 002000000000009801100000000014600003000010000C0841000A42002080840002800000100000 80200000000000000000000000000000000000000000000000FFB2E3000080801808820800801910 802800822800800000201E00205408600210211202260201208802601A00212A0020221020020020 10000000000000000000000000000000000000000000FF4AF100040140451044A500400583400421 40440100010016000010090006012010010010010010010C02003810110096810013090010000010 00000000000000000000000000000000000000FFF3D4008400C00C00C08C00C00C00C00C01C08C00 880100300A0A300B04200330301310340314340350208240340301308B0030034030000010020000 00000000000000000000000000000000FF843C000081801801805801805803005821041801000000 600400600610E00600600402608600409001621600614600604600620C0060000000000000000000 00000000000000000000000000FF55330000012010010002500012012000050042D10000D4888480 0444804810804804800100844C02104910A00910D08000800004804000000C020000000000000000 00000000000000000000FF181D000000000800800884A00824800830830804800000224A00288A00 254200200200204A10200003200214A0420220020020020028000000000000000000000000000000 00000000000000FF15C50000000000002AA1100AA0C80000C02C050000000410102A80112A80002A 82A82A8A00208000A00220000200000AA82A8AA92A82A80004000000000000000000000000000000 00000000FF2A78000000000400020010000044000224030030000002100800000880055000004000 0040000000CA80882000000000002005400000000000000000000000000000000000000000000000); SDR 8000 TDI (97540000AB8AB8AB8310090AB8010C98828AB800000000622A0060062AE4022AE2A62AA2102A6000 2AE2AE0660062263A63260042AE000000002000000000000000000000000000000000000FFFD0B00 000180180190100100180302182080109000000461061060D40060A0006006002148016004006006 0120160960060060CC006000000004000000000000000000000000000000000000FFE22600000180 180180B1230018C9005810001822000028E006456404006212006012002000002000006006506326 00600E096200006000000000000000000000000000000000000000000000FFF27100000180180180 100140180180180040100080000062060064044B6110006002042000102A06C0E12E116016006086 CA6000037000000A06000000000000000000000000000000000000FFB7C0000001A0180180100100 1A25801A00801A0000000061440068CC80604200600608A0060260000C600600634652E016016000 086000000000000000000000000000000000000000000000FF69BB0000018AB8AB8AB0AB0AB8C9CA B800C018AA00002AF8482AE0040462002AE2AE3022AE21F0041062062264068462260062A82062A8 001404000000000000000000000000000000000000FF7DFE000001801801801801A0180180180020 1C04000001480200600508610200600200E00600280100600E01600710E106006002006840000900 000000000000000000000000000000000000FF8C66000001955955955955955B15955A00001D5400 0155610255754501604C55655244655648240524655652E0A650655602E5564A7550000004000000 000000000000000000000000000000FF96B8000001CAB8AB8AB1310ABAC988BA018018A100002462 442AF2C425622A2AE2AC2A228C2A40002AE2262A62AE2022272AE12C2AE200000000000000000000 000000000000000000000000FF821B000401C01801801C01C018018018018018010000806A0C0068 0C48630000600400A00402400000E00600600C01200648600600E800000000000000000000000000 000000000000000000FF0124000201AAB8AB8AB08F2ABAAD841A01001A1B80001061162AE214A062 A22AE2AC2A20462B41002AE3262262AE2C223E2AE6042A61B8000000000000000000000000000000 000000000000FF629E000001801801801A01801801C0180140188180005064C600614C0C60100060 0400601600C80080610E004006022086006016006400000800000000000000000000000000000000 000000FF16DE0000018018018010410018048B5001001820000002E00E00600400E0060060000123 460000800060061160020160040040A0016000000100000000000000000000000000000000000000); SDR 8000 TDI (3D00000000190002B80102382182988C00182980A00A2002C2018E60600200408000E02E00200202 40A612E00610600600408E006706000002000000000000000000000000000000000000FFFBC00000 004818000018018098138818020000038000004052B0000610000413422EA0608700402000E00E00 692620E006006006126036040000040000000000000000000000000000000000FF2B230000000018 280218010018018018100000458200904002000006006024A0480C04710600622082E28602610600 644EA06B06C26006000000000000000000000000000000000000000000FF2C11000000001E506018 01E0180180180000582380000000064004060040402040224072A700040004E0460A70C608601700 6486006006000000000000000000000000000000000000000000FF855900000000B9000418012018 09801800003801840000020700130A806000025020A4622E80204020612600702680740680606604 7066000000000000000000000000000000000000000000FF75390000004138000018018018098018 0C001801800110440300000C200007045017006016000005206406006806006826207007206A8600 0004000000000000000000000000000000000000FF21720000000018000018018018438018000018 01800000403200000480621200400B10E08602A00000600623608E10600600650E00600600000000 0000000000000000000000000000000000FF701900000000180000180120180180180200180D8000 00248680104C00000200494400601710200400600600600680E00680600600600600000400000000 0000000000000000000000000000FF1BE80000AA0AB8AA0AB8AB0AB8898AB8A80AB8A180002AA103 2A82C42AE1A22AC2406662262420042AE2AA0862262362AE2AE0262AE00600000400000000000000 0000000000000000000000FF6B2800000000100002184100180180182800184980004040AA120084 0000CA0060000060A600000600200620600402600600600600600600000400000000000000000000 0000000000000000FF60B00000AA0AB8AA0AB8AB0AB8AB8AB8AA0AB8C180002AC22A2A82042AE20A 2AE31008E2AE2820042AA2AE01622E2A62AE2AE20E2AE00600000400000000000000000000000000 0000000000FF3E4F00015415515410590D155933915902155883800013240741044C554002556550 5564065500045525521145344964564564AE55600600000400000000000000000000000000000000 0000FF2DDE000000001800001801001801801800001815800000200600010C002042006000006006 0120020020023461060060060060A6006006000002000000000000000000000000000000000000FF); SDR 8000 TDI (00000000000000000020000000000000840000000004088004002003080000900008001400001010 20000000000800001000800000000000000000000000000000000000000000000000FFB317000000 00000040000000040020000000000000000C81400001509480200004008000000084000103000000 00000000000000000800000200000000000000000000000000000000000000FF53B08000000AA800 4AA8AA8AACAACAA8000A28AA00002120422AA0020020022AA0222AB2AA20200022200A2AA2AA2AA2 AA2AB2AA2AA2AA000000000000000000000000000000000000000000FF6499000400200200001050 401001001000001401000000C00500000480411080C9210000051400031050001400001000040000 04804004000002000000000000000000000000000000000000FFB641000000155800155955F55955 9558001555558000406505556457444546556107D5655684E40045712E5565565575565565575575 56000200000000000000000000000000000000000000FF9FB90000004AA8000AA9048AA8AA8AA800 0AACAA80002220322AA2AA3322222A2A0A2AA2AA2020802322AA4122AA22A2AA2AA2AB2AA2AA0000 80000000000000000000000000000000000000FF07AF000400000200000000000000001000001001 00000A40088000849140090002300000003000008812000000000000000000000000000000000000 00000000000000000000000000000000FF0EC50000000AA8000AA8008AB8AB8AA8000A20AA800030 050EAAA2A000222A2200032AA2AA0120002042AA0822AA2022AA2222AA2AA2AE0000000000000000 00000000000000000000000000FF08BE000000001800000130000000000000009800000002010000 600014C1000084000060001100000910060000060D00001000000000000001000000000000000000 00000000000000000000FFE60E000000001800000002000000000000001800000010822100001020 00001001280000004400800200004300060000000100000000000000000000000000000000000000 00000000000000FFF5A100000000180001380181188B80180000000380C00000230400061020060C 40AF00602610400002715605610600C0060A40160C640E0200000200000000000000000000000000 00000000FF2993000000001800041801805801829894000031880000041009009620400A01440600 E0960020004160062060462044060040860060060800000000000000000000000000000000000000 00FFEDE30000001018000018018418C1901800001801880014220240800600000A00400646600608 40402040063860060062060A4006006046080000000000000000000000000000000000000000FFC2); SDR 8000 TDI (0001A01C4180100980180180100180180400000041862260089C400C8000060070A6806000004186 40610600002E006607000000000000000000000000000000000000000000000000FF83A500010190 0801941D51901815800811804000000014480625540040650444000E1000265260000A2806106810 00001028602E010020010200000000000000000000000000000000000000FFDD2200000180088180 18018438218018018000080000004006000012000008000026024116006010004026006000100024 046006000000000000000000000000000000000000000000000000FFE1B400000000180000000000 00000000000018000000000000000000000000000000000000000000000000000006000000000000 000000000000000000000000000000000000000000000000FF61CB00000000180000000000000000 10000018000000000005001004000000000004000000800000000000000006004800800000800000 000800000000000000000000000000000000000000FF76CA000000800800800800800801808800C0 00000000202802002002002002000002006022006410042002002002402042042002000000000000 000000000000000000000000000000000000FF0DCC00000100000002000100101002000025300200 000088008000440004004800C0410308020000288245220408000810A00000800000000800000000 000000000000000000000000000000FFF76F00000080080080080080084480080080080000003028 0201B61A00210201080280200360200020201B002042152422222002000000000000000000000000 000000000000000000000000FF7DB1000001C05801801D55805CA183394980115405000A65360064 4D3562CE0000360540171562CB4D628E0260C715402E00600E020100040082000000000000000000 000000000000000000FF1F7A00000120000102000100102B22060002B00200004080000000240002 802109A0B0D38C4042080A82240142006AC608000004000000400050000000000000000000000000 000000000000FF0AED0000008048008009528049408548D08009520500002AD2802202CB2D320001 0204300A88A0208822020020422AA00200200A020100220000000000000000000000000000000000 000000FF056B00000000000000000000000020000000000000000000008008480008000000100001 002402880209000400000000400000000000000000A8000000000000000000000000000000000000 FFF5BF00000000000000020000020001000000000000003A00000008000000001180200880400400 002088084480D0800208000000000000000000000000000000000000000000000000000000FFDD39); SDR 8000 TDI (019818498C5981803801800001101C0000000066064020E242A01400000324600600600001240601 621E01609E08E006088000000000000000000000000000000000000000000000FF05AB000001809F 0580BA09801A01801201441800040000701600F80620601E0082230070860060442D0A4741608610 2806006006010000000004000000000000000000000000000000000000FF5C6B000001A01B418218 0181181180164911190000000069162060160060C610000202200640E10401215608E04620F04704 634E000000080004000000000000000000000000000000000000FF4E1C0000018018418018098818 01800821401800000008604611601650650600000300200610600420020600600642F00620600600 0100080004000000000000000000000000000000000000FF0BD6000001A018418010018018018010 01001800028010600600600428621580010202440781602450380600600621200640780780010008 0004000000000000000000000000000000000000FFAC6D0000018019058070A39018238218034418 0A0081006096116A9102202407808603CA8602E60409044680718604200E80600E02000066000400 0000000000000000000000000000000000FF54CD000001801801801933801845821043A0180A0001 0071460025000260A700000200010714600402280620E00608601200601605000000000400000000 0000000000000000000000000000FF4D4D000001809809901801A09E018810019518140000106006 00640020620600000620000620600420008780641600608200600690000000000400000000000000 0000000000000000000000FFBA91000001981841801801D61845A1E805081800008000A106047366 80621400848201760620600124201654614641141755501709800000000000000000000000000000 0000000000000000FF7388000001801805855851801809801141805800010003280600001610E006 2901220870078060020822060060060A000600428600000000000200000000000000000000000000 0000000000FFAADF000001810A118C1001891801C0182540400C0000082004046816410014100006 01080600600110701610648821040733500680000000000000000000000000000000000000000000 0000FFADA00001018008018014418838158000118000000000002806014804C0430640002E04000E 3070000C5047006008100806524036010020000200000000000000000000000000000000000000FF F561000001A818E58B50D182187590010105380A00010E4106006300926000420442586006027008 0425076C68C6140116006516000000008000000000000000000000000000000000000000FFD0CC00); SDR 8000 TDI (001801E01801801801800A0180180000008048060040040040060020060058058040008040018060 06006002806004002006000000000000000000000000000000000000000000FFA7F2000000200001 841801801801801305C10044800088600402500244610410403C45445230200080680600E0008060 07006002002006000000000000000000000000000000000000000000FFCB8D000000000201801801 801801801001C0000080002068060020020068040008040040060062880070040060210468020060 07002006000000000000000000000000000000000000000000FFB3D4000000001801801801A01801 801805A0180000008041360050064160560000060040021460000040020040063060068068040020 06000000000000000000000000000000000000000000FFD3DB000000201A01801801801801801801 821800000000400600400E40E85600089600400600E71800C22921E2AE3CEA2A0062250020060000 00000000000000000000000000000000000000FF8471000000001801801A01C01801800803801A00 80002800CE02500200E0040020200060022A2004006006006846A060040060020000060000040000 00000000000000000000000000000000FF4FA1000000001A0180BA01809801800801C01800000018 008E09A602006006A026200840826060268040820060060068040068040040060000060000000000 00000000000000000000000000FF7E40000000001801829801809801800901841C22800080091600 400620E0042801202A620E0820040160CC8174174160508064228060060000040000000000000000 00000000000000000000FF6BCC000000001801803801801801800805809800000000000610401604 61060040100140A601622C0044004060C60862000060040060060000040000000000000000000000 00000000000000FFBA6F000000001801801801801801801001801800000000600000400200400400 60060040060020040040000060060060000060000040060000040000000000000000000000000000 00000000FFD12F000000001801801C01801801801001C01A00200000600200200600600400200700 40060060050040008060060068010060040060060000040000000000000000000000000000000000 00FF5C72000000001809891801015801A01011811800000000409201411680600400822600480600 2004485090006AC60060A0006010114006000004000000000000000000000000000000000000FF80 0E000000011D01801811001C09A01C41801900200100400200500202C12410400640490620E08480 40208860062060009364A4006006080004000000000000000000000000000000000000FF070B0000); SDR 8000 TDI (000000040000040040800020040000011010010000000011100011002098000010014A0001001001 001101000001800000001000000000000000000000000000000000000000FF02680000AA0AA0AA08 00AA0AA0AA0922000A20000000A280909080000000400002A82082A82A80000002A82A82882A0A20 2282A8000000000000000000000000000000000000000000000000FFF72C000000200A00840A00A0 0800A28814810800800008282A082812C228228028028C200280280080280280280281208A802802 002002000800000000000000000000000000000000000000FF23D000020020000120D00000100120 02A10010010000804A00A20CC4910D10000804800004000800D50800000820804804884000004004 000800000000000000000000000000000000000000FFF5AE000000101A09841915801A0590984382 1021000028614600E28C10E0265264A40068048060000064060162060C642600E806314006000010 000000000000000000000000000000000000FFFF25000000400820800E00B05881C42880A04D0280 0005320B24204322330300B003213443023091313103B030020020820430A3002012001100000000 000000000000000000000000000000FF29670002003004022005200041233202454C20010000A04E 908A1090C10C00110980C80841008808801001108880800900801108000000000800000000000000 000000000000000000000000FFE9F7000000000C20A00808C83C8C800880C0108080011000020036 0600226A20206602A00800201001200200220A002481002002003002000000000000000000000000 000000000000000000FF0EAD0000000018500480944084000C000000196200000100204441001400 800A0000000200200100220108230406040040098220400000000110000000000000000000000000 000000000000FFC3BE00000000180002000022020000042022180C00000801400100280A80004000 000100A00600001084204000071018000400C0330800000000000000000000000000000000000000 000000FFCEB700000000020188380190180181E3038040018000C4600C20A0442001040424082064 00002000406206086000A8620E02600208A016000080000000000000000000000000000000000000 FFA82F000000200001A01A818838ABAA808580020A8000086C26AAA800A028568C2904A36848A068 00C06856CA6C1010600684EA06942006000880000000000000000000000000000000000000FFAF49 000000001C258B38318518018038219458A0800040508E0055500AE5074020560844800280090362 0601608620751610614AA0A006000000000000000000000000000000000000000000FF36C5000000); SDR 8000 TDI (01800083909840003801800040020000410E00602609401050000008041600700001204640002000 E014104006006100009040000000000000000000000000000000000000FF96990000000018080000 018D0008000008001840040020000000005012000004029028020800000020012014022E40032004 00A0000000000240000000000000000000000000000000000000FF7B010000400119000000018000 9000004400980000000000002100004480000803400084401100001000044000A620C0A800420000 0000000000000000000000000000000000000000000000FFD2030000000008008000808008440008 4182202400200081120660040920DA50204206204240200020220200210213200020200210200001 0000000110000000000000000000000000000000FF1F430004400004004004004004004014044954 00000120400118100100001100900900508160000140900100000100100100100100100000000000 0000000000000000000000000000000000FFBDAA000400010D00C00480C00C00400C00C40C000001 0020030130030C208311328B04B28300A80111300340212341301300340300300000080000000000 0000000000000000000000000000FFB3820000000018018000018019100010419010200020416006 44600420E00600602600402608600000440600400604614640400600600000000000000000000000 0000000000000000000000FF9BF90002002000002002000004002012010112000000884800A04C44 21080880085004D00400080082400080480080082480400480400000080000000000000000000000 0000000000000000FF1D59000000008A008000008008000288000008000000012002142092142502 00210250200280240040200200200251241200280200200000040000000000000000000000000000 0000000000FFBF1D0000AA0A20AA4AA0AA2AA0AA1864AA6A200000002202A8058000850061000640 0002A82A8000099AA82A82E80700802A82A800000000000000000000000000000000000000000000 0000FFDA640000000000000000000000000C201041000000000880A0211000020200000000040800 000002220000000000008000011000000000000002000000000000000000000000000000000000FF DDB20000AA0B24AA0AA0AA4AA0AA0400AA0AA00000002282A82812A8A802000000080A02A92A8200 0002A82A82882802282A92A8000000000200000000000000000000000000000000000000FF7C4800 01543543541543543541542005441440000000C40C008404D0D10910800D50C88550D50800908D50 D50D50D40D30D40551000000000800000000000000000000000000000000000000FFE99A00040040); SDR 8000 TDI (0000018130000D2001801800000010628600601408420E00600600E00645608424E24601600604C0 08100006006000000084000000000000000000000000000000000000FFE377000000010801000001 001400000401A11800000001400600E48402C006C0628600212E04E80400440E0060060040C00002 C6246000000804000000000000000000000000000000000000FFCDEA000000001801800001A01000 0220018018500000104116CA605410400610684E80640650600400688400602600620800000E1160 00000004000000000000000000000000000000000000FFFA460000000A28AB8AA0AB8AB4AA0884AB 8A38860000236226007804A142AE02A0462AA0078070042AE1242AA28E2AE0002A80060062A80010 04000000000000000000000000000000000000FFC259000000001801000001801A00020A01C01814 000010E40314680101402600611614400E85680008400409600600400C0001065160000008000000 00000000000000000000000000000000FF2DE6000400144955154155B559540A8955D558C0000054 45464B65104A4556302016D5020609600455080655651655400455040E1065500000040000000000 00000000000000000000000000FF09980000000A38AB8AA0B3AAB0AA08A0AB8AB8A0000022408C20 E22604408F337226A042A6306002032D0C0062AE2AE2A22AE20E0262A80000020000000000000000 00000000000000000000FFDD77000000008801800401801800404801801E10000100600C00684600 400602E2860040CEC240000024540060460062AE0060A624E0000000000000000000000000000000 00000000000000FFB9920000000B20AB0AA081AAB0AA0000AB8A2002000028E0460063B250440420 628E8942262A60006028644C62882AC2A22AC0460062A80000000000000000000000000000000000 00000000FFB929000200011001000215801C0024CC01A1010000008044064A600242402600600600 810600680000209620E04000400600444640E0000008000000000000000000000000000000000000 00FF8240000000001801800041801000100001801850000004415600E00A09451213404022600E00 E00013240404000600601000608E0C6000000000000000000000000000000000000000000000FF4D B1000000000811800001801908040909801800000000402402601204400602400020200608600000 20040104962C64A4446146086000000200000088000000000000000000000000000000FF5B350000 000000018000838418840238C1800004000040402601E1860040460005500441C648600040A10434 800002400C29C006006080000000018000000000000000000000000000000000FF26630000000010); SDR 8000 TDI (9801881821801801850001800041600C92C20208600C1160020004AE00604050604200E100A0C506 02A016003000080000000000000000000000000000000000000000FFB1B6000001841001C4188070 1805801081851801002000E024054402216006006002010406106020004102006407444224002006 003000100000000000000000000000000000000000000000FF63C9000201801201811C81C01A13A0 1881801803002000681400480220E086006D02009157286000406EC3014206834104013016002000 000000000000000000000000000000000000000000FFAB08000001801401801800001C21801C0190 1803800020600508600208611610E00600000640600408600208608600400F044806000000000004 000000000000000000000000000000000000FFEA14000001801235801801C01A01A4380180180100 0000740C00692A00612611681608800600620023600608E00600430C004006004000000000000000 000000000000000000000000000000FFB9BD000201811081801C0000180181180181180180000061 24006002006214226006440807006004086806C44047004006010006006000000404000000000000 000000000000000000000000FF00FB0000018A31158018AB8AB8018818AB8B380100002AE0542AE2 022AE0460062A60102AE2AE0064162AE40428E2AC1242A02AE2AE000000006000000000000000000 000000000000000000FF3B37000001008001801800001801801801801801000024E0A40060021060 860060060300062A600400600A08604608C104016006004000000004000000000000000000000000 000000000000FFC0D30000018AB0018018AB8AB8018B18AB8A380100002AE4842AE28A2AE4864963 2E2A02AE2AE2040462AA02E2AE2AC0442A62AE2AE000000204000000000000000000000000000000 000000FFF39000000114415580195414D801835955955801000010641655655244E45654E54E4805 560161045564C2454516204434502556554000000104000000000000000000000000000000000000 FF61E700000180104180180180180180580180180100000060060060440060140260060000060060 0010600210400600441400A006006000000000000000000000000000000000000000000000FF503E 0000000A38808000AB8010001000AB8A3800000002C0042AE2A02060062262262862AE0060000060 042262AE0C62822422AE2AE000000000000000000000000000000000000000000000FF3A6F000000 008803800001141000000001809800000040605400600004E0C610E10E04200610600410410C1020 06206022052006006000000004000000000000000000000000000000000000FF6028000000001851); SDR 8000 TDI (AACAA8AA8AACAA8A288280002AA2AA22A2022AA2AA2AA2020002ABAAA2002AB013A0228A2AA2AA22 22AA402000000000000000000000000000000000000000000000FF67D00000000000010010000010 01008201001000000001001080010C00404000408000080400400001100412400100040111080480 4000000000000000000000000000000000000000000000FFA9DE000155855955D55855955D559559 559550B3800055655644624D5565575565060015565560005562844A4557557556D2755610C00000 0200000000000000000000000000000000000000FFE54A0000AA8AA8AA8AA8AA8AB8AA882CAA8AA8 8A80002A22C22B22422AA5122AA222000AAA2AA1005022AA20228A2AA0C22032AA82A00000010000 0000000000000000000000000000000000FF8AA60000000800000000800000000000000000000000 00000089008400000000002800000000420000102000800080000001000004000000000000000000 0000000000000000000000000000FF80710000AA8AA8AA8AA82A8AB8AB8608AB8A30408000222202 2220022AE0222AE2320002AA2AA0000C22AE0122CA2AA01A2422AA58200000008000000000000000 0000000000000000000000FF962A00000180100000000180000000800000980400000100401000C8 00040800000800000000000200000440400600642408000040000000000200000000000000000000 0000000000000000FFAD3C0000018018000001018000000840000018A80000080108008200000100 0000800000000000802500000C804680010002800005000000000000000000000000000000000000 0000000000FF9BF300000180100180180180180181580180000080000040041020B200E0040060C4 2C020600E00008608A02800150400600602600200800801000000000000000000000000000000000 0000FF3CD30000018011018018A00818258018B380000D840000404401200230609654600401008E 22610000640240211004442601600E00A040000000000000000000000000000000000000000000FF 182D000001801081801801801801841829801801800000410400260A046006086080000006106400 00600220400E08401E00400600A000000008000000000000000000000000000000000000FF5EF700 00018410018018A008183180B003901809020000404400200220608602652002800E226080006202 104006204054004006002020000000000000000000000000000000000000000000FFC76C00000180 1201801800001A05821B0180000380000060A410C12212E016406002300486096200086112056080 02424680A056002010010000000000000000000000000000000000000000FF50D3000001801001C4); SDR 8000 TDI (800001888001800001800800022A0062860060440220242040040060104061060060000060020000 56006000000002000000000000000000000000000000000000FF9BE6000001800000000001800000 00000000180000000000000000000000000000000000000000000000000000060000000000000000 00000000000000000000000000000000000000000000FFFAA5000001800000000201A00000000000 00180000000000008010050000008008040000000000008008000008060000000048000000000000 00000000000000000000000000000000000000FF084E000000800001800800800800800000C01022 800000080200200200100200200200A00200610008200A5060021020824120020020000000000000 00000000000000000000000000000000FFCCA60000000010004010040011120200000D2110000003 040400000820C0302004CC500000200000C002200002082284280008880401000800000000000000 00000000000000000000000000FF676A000000800800E00C00C00800800000880820800000110240 200200200204300200A00200208008200200314208200200208A0020000000000000000000000000 00000000000000000000FFB3B5050001801801801001C51001900041A411018D00000415C16A8605 4C472365440CE0C6006500116A8E0864560070140950860260080005400000000000000000000000 00000000000000FF22E200000040100100120200128A02000042B0890000029344100008605038B2 0A2C2800000040106442686152086242AD0444044240800000000000000000000000000000000000 00000000FF5854030000C00800A00800A08800880000C00880930000000B4125034022224522C204 284200228109250200A8020028028130020020000002A00000000000000000000000000000000000 00FFBB5E000000000000000200040200000640040000000000040000080085001010080000890000 0010A200102802102000100A0280200010000000000000000000000000000000000000000000FF0D AF00000000000000000000000000000000000400000009A048080101080100010008000040000000 0020100160010000410000020000100000000000000000000000000000000000000000FF5C8F0000 000004000000002000000000000080200000000000000041000000000100000000000000000B0008 8040800800089000440000000400000000000000000000000000000000000000FF65070000001000 00200000000200000400000010000000000010011000000080003000080000000000003002000000 0000000000110000000000000000000000000000000000000000000000FF4D518000AA82ACAA8AA8); SDR 8000 TDI (180110000304184980000000020068564902B6004254006016416004006454157146026006012226 146280000004000000000000000000000000000000000000FF0B55000000801881A01A0000180500 000100180180000802320560060484070950044A610600608C0471040060D600E10D0030A7006000 000004008000000000000000000000000000000000FF21C900000180100180100180110100000102 1A018000101C1381600440214609400C02608781611400688400600E02610280E806007800000404 008000000000000000000000000000000000FF25FE000000801301C01020221005860001801A0184 000001C2147186A420040041C401600400E0046C601C206806016A12006106006000000224000000 000000000000000000000000000000FF3219000001811001A0004184100100000100180180000008 020060060102060068043040060060000860264060A6006400082056006000000020000000000000 000000000000000000000000FF7FA300000080110180100060101188000192184180000400038060 060500172068040040061060040060078060360C6100003906406000000004000000000000000000 000000000000000000FF9031000001C018818400018754010C408540181180000000060040161065 460E418500606600600001640417650E416086044086106000000000000000000000000000000000 000000000000FF36D200000080180581400000140100010101180180000000060441460060071060 0D08608603602000604E006006006026514026036000000000000000000000000000000000000000 000000FF69C9000001801203C02001A010118242018100298000041002006086004A8C4040048860 0403602081602400E10045602214C046406000000000000000000000000000000000000000000000 FFE86D000000B0100BC00400001021800009A10001940100000200620641411701609400E0862060 0052640E24E0014060C2404106006220000000000000000000000000000000000000000000FF395A 000000201C81851800014201088005141803800120080E84285695404708003420610612608900EC 94106466106002480026156000000000000000000000000000000000000000000000FFBD87000021 509815801A81C000198000218018018000000A260060868852360222048141060860200160064060 0602600210000E006000000000000000000000000000000000000000000000FF6EF3000040001001 A0080000044180023181000592004000010070064963061125140060064C6120146C16036040C461 42400086006220000000000000000000000000000000000000000000FFA2FC000001011081800881); SDR 8000 TDI (01001801000001800100700500080200620600600600200600600022780600600000400200C28600 6000000000000000000000000000000000000000000000FF3649000000001801A01A000018014018 01801801800000680480200200782600600200404700601000600600600600480740400600400000 0000000000000000000000000000000000000000FF2C22000001A01C01A018018098010018014018 01888000602600A0078060064A600200604702E22046600600600600402742440600400000000000 0000000000000000000000000000000000FF01E8000000001401801800200801001801C01A018000 00600700200300644600720600028700600C00600600600600600000A88600600000000400000000 0000000000000000000000000000FFB167000001801001801A01A008010018818018058000007106 08000200600600E20200C00E00600000600600602600600008200600400000000000000000000000 0000000000000000000000FFB7B3000200001001A01800000881009941001C019100206046012082 2270A601640600600E01604422E00E206A2608E84304680600600000000400000000000000000000 0000000000000000FF89CB000001801001801801888801001801001881800000600608200200E006 14600200E00604640400600600600600600210600600400000000400000000000000000000000000 0000000000FF54890000000018018018000000010018010018018000006004006002006006006002 00600600600400600600600600600400200600400000000400000000000000000000000000000000 0000FFB91D000001801801A018018000010018010018018000007004004803006006006802006006 806004006006006006806007002007004000000004000000000000000000000000000000000000FF 70A7000000001805821848004001001805009841900000600700601200E20600E002406006106005 00620600E806006044046006044200000004000000000000000000000000000000000000FFDDC700 0001E01801805805D0000C501851421811800001600E0464C20C6016006A0B84640EC06000106056 1464B6C46016006426104080000000000000000000000000000000000000000000FF777D00000180 1803820A0B88180B000181401801800000900E006287C0214490484600600409600000600400600E 00610F016007406000000000000000000000000000000000000000000000FFBDFB000000811C01C0 18006039012000290498018C0000000692700602214608C054236206006004886044006A062470A4 136017206000000004000000000000000000000000000000000000FFCAFA00000180180180482180); SDR 8000 TDI (800A008108008000800842042D4B042112492C2282210A0030008028A2002802802A0A8028028020 00000800000000000000000000000000000000000000FF4FBD0002004230010222804052C10012CC 0010010000004A10894800804C20840908B0CA20004880804A140048200009448040040000000009 00000000000000000000000000000000000000FF78E600000190180180B805881101809843823085 800010608E20C51600E2064060CE51600E00604048600E006006C0612400C0860160000000000000 00000000000000000000000000000000FFAA68000400C10A02E40C00C00C10800C00A00A08800001 30031430424A300302300304300280340100252288328310340328284B8820100010000000000000 00000000000000000000000000FF583300020820040100022C28020900020204348C0000104098A0 4980000820880808900828008861208C98084880008800C010088000000008000000000000000000 00000000000000000000FF68B4000000801404814800809800021800800402800000210242200288 60020022420D028200640000290200240A4020420030020120000000000000000000000000000000 00000000000000FF8444000001918000282001800110010088401910000000102419800494060044 019020000120000010026100800720002000C1E02002100000200000000000000000000000000000 00000000FFCEDB0000018802800000018220024080246A5A000001008200000028E1008800800040 80118800004808018001061001801B0A101880000000000000000000000000000000000000000000 00FF3079000001801003869801901801A81841800021800081600404445200E00622602402000000 60000060063260000A660A200006006000000000000000000000000000000000000000000000FF3D 7B000208409005A03A402B3A0D031A2B8001138000016887524892086C0682690CB3094008680130 60862C6910CA692AA40026886000000800000000000000000000000000000000000000FFB6C10004 018818819298098018010819019458218000006A3481602240E0D628F424004412C0E02001645600 F00600E202890296416400000020000000000000000000000000000000000000FF26EF0002000018 01801800001801001801601801800000600600680200600600600000600000600000600600600600 6802000006004000000000000000000000000000000000000000000000FF4813000000401001A010 001019014118418001058000C0610400210345714620620600028600600041601640640011500200 4006006000000000000000000000000000000000000000000000FFECA00002018010018010018018); SDR 8000 TDI (0088001800000002010000000C14028000000000C040000080240004200046044014304020044300 008000000000000000000000000000000000000000FFF56300000090000880B80090080000880095 A044080000E0120260420050036D815440245611602000250200005A302082102042002000000000 000000000000000000000000000000000000FF4BA60000005014114000004204184014014B540000 0101110928000134012C015001001001021001081001000001009001401001001000001000000000 000000000000000000000000000000FF4977000000C00C04C04804C20C00410C00C00C0090010030 0324200340200A30300300B0430231014A3003200003033013003043003100009000000000000000 000000000000000000000000FFADFA00000180180181180180180000190994100180000460161060 16004444004006006006006040006006000036406106104006044200000000000000000000000000 000000000000000000FF714E000200401001201300022200001001011201000080482080C80000C0 00008805000004004C00804800800840800849014804804000000A00000000000000000000000000 000000000000FF354600000080080094A800800800000A00000800800000210A3220020020069060 02002002002000002002000002002082142002002000000000000000000000000000000000000000 000000FF2D570001AA0AA2AA00012A6C80AA0000AA6A20AA00000012010002A82B1AAA2322A82A9A A9AA80012A82A92A82882A83002002A82A8800000000000000000000000000000000000000000000 FF245D00000000200000200000010020041040000000010000C0048028089000C110000411090000 03000008000000000210011000000000000102000000000000000000000000000000000000FFC4F4 00002A0AA4AA02202A0880AA0002AA0AA0AA00000002402A82A82A02A8AA02A82A82A82A82002A82 A82A82A82A82082482A82A9000000000000000000000000000000000000000000000FF39BE000354 32055453035435404C0001441545540000000C11500C80C404C0100350C90440550880550C20550D 50D50940D40550D50000001000000000000000000000000000000000000000FF6CFF000400400200 51040000240020000020060000010001100010000008000010010008008010000010000010010010 21101001000000001200000000000000000000000000000000000000FF98F50000AA0900AA08802A 0880000000000A20AA0000000080A000002880108400000000002A80022A81002A82882A80002A82 A82A8000000002000000000000000000000000000000000000FFDEE4000200C08800A00A00A2080C); SDR 8000 TDI (01A018010000006804886496002A4600612440410600600000600480000600610600600600600000 0200000000000000000000000000000000000000FF52EE00002A2AB4ABAAB82A0AD0600ABCABCA38 AB0000AAF2AD226006AAA18E08E60400CA26AAF0042AE2AD2A828E2AE2462062AE2AE00000100400 0000000000000000000000000000000000FF512C000001801201C018018018A8001A15A118010001 006B0483600700041609610405410600688000600600000611200C01200600200000080000000000 0000000000000000000000000000FF2AA5000054155155D55954151C803559559559550001556554 5460AF55004EC8E92C30454655600455655655055655249440A55655200000000400000000000000 0000000000000000000000FF54730000ABCA98AB8B38ABAA90022AB8C18A38AB80002AE0160062AC 2AF107206A240854472AE0002AE2ACAA82CE2260A62A42AE33400000008000000000000000000000 0000000000000000FFFD62000080601801A01800601A120018018018018000806004016206807406 02600404D80E0062000060060000060060060A400600400000020000000000000000000000000000 0000000000FF1FE500002A8850AB88182A88D0002ABA01AA20AB80002AE8E6D862AE2AC0660462B4 40421E2AE0002AE2AC2A82882224042A42AE00400000000000000000000000000000000000000000 0000FFDE63000001011401801801003900001831808001800000620E00E00600480680680C104106 00680000600700002000200400C00600C000000800000000000000000000000000000000000000FF 87B7000100043801855900021052001885801801800000600224600600429632E00642C046006080 00600400000608E2D60000062C0000000100000000000000000000000000000000000000FFC1E200 0001901801801801801800001901941801800000600000600600501704614628420600E150006006 010026106016400006040000000000000000000000000000000000000000000000FF914500000101 90018018611038260018A1800001800000608248600E026046596406004116406000006406008180 406244240006080000100000000000000000000000000000000000000000FF221E00000080100188 180080384000184181004580000060880960560B608600601600E046106002206106000010026406 080026100000000002000000000000000000000000000000000000FF25A100000180000010000180 000000000000180000000000002100001081480002000900802000A8200000000006220028040000 040000080000000000000000000000000000000000000000FF0D5500000190000400000580000000); SDR 8000 TDI (819A0100000040040250240A000600E86601623700600080E014906106C06004C0680480E0660000 00000000000000000000000000000000000000FF5F9C00010B001005845001009801408001801E01 800000710240382741023608600000640700E02400F0020060160020250060020060060000040000 00000000000000000000000000000000FF583E000001001001801001001801000001809801800000 400200600600000E10E80600600600600200600280600681200412700300E0060000020000000000 00000000000000000000000000FF18D6000001001401801101001801800001801801000000609600 20060083460460000060068060050060060060460C60050160060C60060000040000000000000000 00000000000000000000FF13F20001AB0AB0AB8AB02B0AB8018AA0AB8A38AB00002AC3262AA2AE2A 00066062AE2AE2AE2AE0042AE2AE00628E2062AC3062AE3460060000040000000000000000000000 00000000000000FF67170000000038018018000A1801800001801821000000428200000E00040620 608610E00600600600620A00604600200400600200E0060000060000000000000000000000000000 00000000FF4E5800002B0AB8AB8AB82B0AB8018AA0AB8AB8AB00002AC2262AC2AE2A84260A62AE2A E2AE2AE0042AE2AA0062AE22A2AC22E2AA20E0060000040000000000000000000000000000000000 00FFD13D0000D4149955955854005801954155955915000055402E5525465500CE14644644655655 600455614600651655628C54E556546006000004000000000000000000000000000000000000FF72 11000001001801801901001801800001801801000000401200600600011600E00600600600600000 6006006006086004006006006006000000000000000000000000000000000000000000FF60A00000 2B8818AB8AB92B8310000AB8AB8A388980002AE0042AE0062020062162360042AE2AE0022AE00400 02AE2AE2462A62AE2A6000000002000000000000000000000000000000000000FF69AF0001000018 01801800109000001801809801800000605400604603234604608648C00600600400630C00000600 60AE00E006016000000004000000000000000000000000000000000000FFF3F00000018538018019 01803000001801801845800000630600628E08000E10E00E04400600600000604400000600200400 2006002000000000000000000000000000000000000000000000FF5A2F000080001C018018000030 020018018118018000006006016046000006C4680E0A400E006C0400600400004600202C15200600 2000000804000000000000000000000000000000000000FFF620000001801001801901A01108201A); SDR 8000 TDI (503380005562540945460000CC1440C6D57D565560015574D5556517457557557554557556000000 000000000000000000000000000000000000FF32D60000AA8908AACA88AA8AA8808000AA8AA82A80 0008212A2920020004220A20822AA2AAAAA0802AB2A22AA28A2AA2AAAAA2A22A22AA000000000000 000000000000000000000000000000FF97CB00010000040002008000100040040000000000008001 00A44808000404204208000004000401000000004001001000001000800000000400000000000000 000000000000000000000000FFC74C0000AA8850AB8888AA8AA8A48000AB8A308080004020062421 020000006002522AA2AA2AE0002AA2A22AA28AAAB2AA2AA2A22222AA000080000000000000000000 000000000000000000FF00D200000105000000400100000000000000980000004100000501100003 40040008000000000000000004000026006006000004000000000000000000000000000000000000 000000000000FFCF5A00000180200002000180001400000000184A00000C02B00804200000081080 A0000000000100000010000006000000000010090000000000000000000000000000000000000000 000000FF17E300000111100180000100180190000184400080801062040120420080060060B040E0 06026020006200406001007284006000204006080000000000000000000000000000000000000000 FF0AE000000100100180000102185182C001800001804000600440200224000640640004610E1060 080060100963500A6004216000004006010000000000000000000000000000000000000000FF7CEF 000001089845801041021805800011821905802008600600250202011635620610E00E4060081060 48006086026004046040004006000000000000000000000000000000000000000000FFD071000001 00182384100100180D8A8001803803008000420620A0226104460A600E0360962860401060202060 26006044016020004006008000000000000000000000000000000000000000FF0926000001001001 801021001843A020098002818000007004002A8680808E016146486007046040106C050962080824 84236804406006100000000000000000000000000000000000000000FF7906000115001021805001 011881808001800001000120610640600600010E10650604600600E10000600C086290282004A260 04006006000000000000000000000000000000000000000000FF772F000001001E01801001041883 900001801801800140400604000612008601628602604600608188600500620608600402F0040160 06000000000000000000000000000000000000000000FFA617000001001A43801001021861880001); SDR 8000 TDI (01000000000080500000400080400080000000000000000400000600080080080000000000000000 0000000000000000000000000000000000FF15DA0000000008008410008028018008008000008000 0062A200200200200220600040280200200002200240240300202200200200200000000000000000 0000000000000000000000000000FF3B170000000010800000000484A002910210B0040000108000 8004341094400814048C80040512201002010000A00C008002001000000000900000000000000000 0000000000000000000000FF127C000000000800800C06C02804800800800800800000A082802102 40300308380200300200202000218300281200200371300280200000100000000000000000000000 0000000000000000FFA72E000040001801801041801E01801801C030938000206006156A04206226 32434E50600E00608A2D608600600694E80720600600620000002A00000000000000000000000000 0000000000FFFC100000000010804210100282A502908208B0020000084004000A2D090230204205 2A90400782400856000446F84A408012800C84000001000000000000000000000000000000000000 0000FF40080000400008018008408008008008008029088000402002882002402C424C2422282006 002000532002002C02042003002002002200000000000000000000000000000000000000000000FF C4D500000000000000000000000000000000000000000000000408000108080001010010280500AB 800000020010288000000000000000010028000000000000000000000000000000000000FFB25C00 00000000006000080000060000002000020000000440008300C10000000808000000001002040A80 400020000040380000020000010002000000000000000000000000000000000000FF688D00000000 000001000020000000040000800000000002B00301100000081083408008000004008010B0800041 051001000930001000000400000000000000000000000000000000000000FF180F00008000040002 40000000000000000000100000000000500000000340040000000000800002000000000000080000 000000000000000000000000000000000000000000000000000000FF762F80002A8AACAA8908AACA A8AA8000AA0A29A280002AA00200222200000621600B2AA2AB2AA0002AA2022AA2CA3022AA2AA202 2AA2AA000002000000000000000000000000000000000000FF83A900000004120120400000105040 02010010800000850405004C5000011000820100500480400100500C00402100100080500D010004 000080000000000000000000000000000000000000FF387E00005595595590585595595580055595); SDR 8000 TDI (880008700780490E04600608401400E00780604688640420600610E0060068060040000000060000 00000000000000000000000000000000FF620D000000001901800201865401A4FA41801801800000 61065140071077846040A514202641602408611E0060660062A68060070070000004040000000000 00000000000000000000000000FF48DF000000001841C00421801803801801001905800000600602 24020060568049240060360068040160048070868065462060060840000000040000000000000000 00000000000000000000FF1A91000000001801A00005801E0BE01901B01801800000600780CC0282 58068040440078060060040060C6006006006036A061064068000000040000000000000000000000 00000000000000FF42E8000000001811D45069825001961821411801890000600600510651640643 44051140060060280464141D68461062069E64968010000000000000000000000000000000000000 00000000FFB98C000000001841801011851801801849021801900008E08600400E80414E04410420 40260060D188E00400608602650600E0070082080000000000000000000000000000000000000000 00FFB784000000001831920005803015901881810201810008E08600241225608440450409200600 708012E4370071010C608EC0640E20A008000000000000000000000000000000000000000000FF0B 33000000001801800041801845801801810055800002600630C012085016095CA4A4600700600001 6006006050086404107086002020008000000000000000000000000000000000000000FF00460000 00001801C0480181100180181114180180000862878149221066D603504E40684E020022006B0C05 6046026046034006800400000002000000000000000000000000000000000000FF37900000000018 01800A8B801809809801811881800000640602408210497660400608F0A6882202006406006A8600 6006044006022000000002000000000000000000000000000000000000FF334E0000000018018018 C380180381180180050180000460060528460060061544AE42409604620001681600655014600680 5107006020008000000000000000000000000000000000000000FFE5FA0000000018018018118018 2980180080002B000010610650210C00440400400609004608004000600600600000620608400602 6000000000000000000000000000000000000000000000FFE3940000000000000000000000000000 00001800000000000000000000000000000000000000000000000000000600000000000000000000 0000000000000000000000000000000000000000FF5BFC0000000000004002002000000000000018); SDR 8000 TDI (0102E2A600600640628740480680702648200104641100602E206046106002006006000000000000 000000000000000000000000000000FFB80C00000180000180180180180188100180180180000068 07804003806807007800007006004225406002006006006806206000006006000004000000000000 000000000000000000000000FFE93F00000180040188180180182580B001821A018000006006004F 8200700660600000600E30200402600209E006026006606802006006000004000000000000000000 000000000000000000FFAAB1000009C00001C83A008218B1831203D2380300010374A600C04A0062 0600C0008060AEA2400402E22288684E0AE806806000006006000004000000000000000000000000 000000000000FF49F000000180000180180080980188300180180100000060060040024061260240 00026006006006006002006006406006006002006006000006000000000000000000000000000000 000000FF429600000180000180180080180180180180180100000060060040020060060060020060 06004004006006006006006006006000006006000004000000000000000000000000000000000000 FFB38B000001800001801800801801801801801C0100000060060050020060060070020068060000 04006006007006806007006002006006000004000000000000000000000000000000000000FF4D9C 000051800001805804843A01801821801809000001629600450280E806154002C064560040442060 82002006206056046000006806000014000000000000000000000000000000000000FFA140000001 800001E01810809809801891F41841000000602604482A04609700488208688650000C0260025060 2E80F10688E003006086008004000000000000000000000000000000000000FFBFB7000000001841 B01809009001981881095A07800080E00601408218E8856064060D200620600010600400658610F0 066A611601C000000000000000000000000000000000000000000000FF1472000000001941803803 007001C01829421A01800000610654C10210404718500730723E406024016104486A0700608E0060 0610400000000C000000000000000000000000000000000000FF241A000050401841901801841011 801C01015851800080754E04225704600E02C50682E10608601452710440705648602700E88F0041 00008004000000000000000000000000000000000000FFFDDF000000011801C25831201005841841 401B05880008600601541702501700500E05700600E005006A0400688710E0064060068040000004 04000000000000000000000000000000000000FF76A9000000411801844209A01001811801001801); SDR 8000 TDI (20608620E32402E006036824006A0611620000614CA2600640620E006C1628600600000000000000 0000000000000000000000000000FF0DEA000000A10440CA0C28C02B08C00CC0800C8C8001002002 10201220332300300B253023203100C9340308B48380312304300205320200100000000000000000 0000000000000000000000FFE853000020080080220200200402082200042220000128D000D01010 804888800A84A01000C00821088820880D00800BC0800008B000A000080000000000000000000000 0000000000000000FF3628000400800000807004800A01940940A01090800000302300400E050102 00200000200220208000200600220200241200208280200200000000000000000000000000000000 0000000000FF082E00000422240004000010000042000120184E0000400300000040020020000040 48066000050041005446808640802808100006020000000000000000000000000000000000000000 0000FF477C00020000002209805008E2100000840A18000000000080019081800640020010028008 11800380020021000E000000060200010400000002000000000000000000000000000000000000FF 82040000018100459019AB0311A580882B00010080000060068265226820060D8806056086080000 12650810600008600400C434C8E006000080000000000000000000000000000000000000FFD07100 00018A2321C40A532550C5A10B2BA0030B8001216AA6026802122C068D0006B0EA868828000C7420 B2E80908E80C804AA2447226000880000000000000000000000000000000000000FF927A00004180 0003914081081A018A3801945C2180001060060171322000AE00050402682E40E0A000E010006306 006AA412D00C08E106000000000000000000000000000000000000000000FF7C5400000180040180 0200001801801801E01A010000006006006800000006000004006006006000006000806006006004 004002006006000000000000000000000000000000000000000000FF405D00001180000180400185 1905DC18058040058000806006016857604046057005046106240000016648004000116006286804 006006000000000000000000000000000000000000000000FFDEF9000001800401A0120080180180 18018002010001006006006007004006206004006006000221C26000806000007026007006006006 000000000000000000000000000000000000000000FFDBB5000001800201C01801801C01C01A0180 18018000006006006006006006004006807006802000006000006806006006806002006006000000 000000000000000000000000000000000000FFBED4000001C00001C01C00801809801801C8180100); SDR 8000 TDI (10010A166118000562525000C4050000010010010000210014050810010010000000000000000000 00000000000000000000000000FFA9E7000400400800C00C00C0AC00D00C00C40808950108300300 30130120030030020121034028030030034020430430130830030030020008020000000000000000 00000000000000000000FF0FAD00000002181104580180100180180191500180000060064A400604 601402440440403400600001644611641600600400600600600E0000000000000000000000000000 00000000000000FF2A5300020020120000120020100020130B011200000100080428484080000080 4805400800020C010048008048010048040048009040000008000000000000000000000000000000 00000000FFA15B000000000801A32800800800800040800800800000200282A09200200600200211 6006D120000020020020020020028020020520020002000000000000000000000000000000000000 00FFD5140000000AA4AA8840AA0AA2AA4AA0546A20AA00002A92A85103002A9AAA2A82A80622AA41 00002A82A82A82A82A82A82A82A8200000000400000000000000000000000000000000000000FF6E 5F00000020040000200000000020040240000000000010002881080012A090880015000040000100 0409000001001221000000008000000000000000000000000000000000000000000000FF71820002 002AA0AA4A80AA0AA2AA0AA0800AA0AA00002A82A90002282A82A82A82A82912A91002002A82A82A 82C82A82A92A82A82C8000000000000000000000000000000000000000000000FF29C40000001541 543502B23443541541301542CC0000D50551020C40CB00082404D0C01550930800550920550D3055 0010550D514C0800000800000000000000000000000000000000000000FF83920000002000000004 00400000000400200400000100000004100100080180180100000004100100100100100100100000 1001800000001000000000000000000000000000000000000000FF138B0000000AA0AA0880800100 AA2AA0000A200000002A82A88000000000000002202002A80200002A80002A82A8AA8100A202A800 8000000000000000000000000000000000000000000000FF32F4000000800200C42A04A0CA00800A 00810A08800080280202A812952022422103102802D1280080280280280200280200280240280200 0800000000000000000000000000000000000000FFE1B10000010000000012302C00012002AC2012 A40000804804A84CA4A04C88910014848000800800004D54000800004CB091000092400400080000 0000000000000000000000000000000000FF2E6D000005800205A0D0838918038A18038210218000); SDR 8000 TDI (0700345600C086000040406106006800007002026006006082086086004004000800000000000000 000000000000000000000000FF8327000154201811943853554955B45D55D558A980015565575534 D6C4094E4C255008E3260560045564C60AE556557552556206556556000004000000000000000000 000000000000000000FF03410000AA201829C800898C24AB08D8058B392B00002AC2AE2AE086204A 4F2AB28F0AF20E8240002AE2A848E2AE2AE22822E42E2AE2AC000000000000000000000000000000 000000000000FF76790000002018A5C11081A00C01009801801803000000400600600600820700B0 07207006286000006010206006006000006084006004000000000000000000000000000000000000 000000FFC3780000AA0019018F00E90B00AB2C9B09AA20018000AAE2AEAA2806364086A00A048068 665940002AE2A60062882AE2202260062AE2AE000000000000000000000000000000000000000000 FF809A000000001905A0D003800A0100182381014580000060060124168108060821042060160068 000060060160000068000060C6006006000800000000000000000000000000000000000000FFB799 00000000182980080180C00084588180180900000040060060C61042560360340AE2864540000060 08526046006108096416004004000000000000000000000000000000000000000000FF9ED0000000 001C03804885850800883801801845940008E0060020062015065060050171060040002060040060 46006010006006404006200000000000000000000000000000000000000000FFC746000000001819 8428618298008018058000A1800000600600200610C01621C1FE0066562080182060860160000064 00006006004166080000010000000000000000000000000000000000FF25A9000000001801800800 0038B0809801952081800000600600630603000602440604600649100000610630608022600028E0 06022006101000000000000000000000000000000000000000FF29300000000000020201020040A0 0920041418040A000000000005003202801400000200800000000000000100C62400085080002200 80000000000000000000000000000000000000000000FF653400000000400C0B000000A000080000 021808040000000020000000800000005000025040000000004040000600000C0000000000100000 00000000000000000000000000000000000000FFEF74000020020C00002000800810800800814000 880011200200600A0230180024052110D210200000A20258A20A0226020020020000024000000100 00000000000000000000000000000000FFE46F00044040500451158040140040146148B000008108); SDR 8000 TDI (0B000610E10E10C006026126006000806C2E00600600602E00480440A00000000000000000000000 0000000000000000000000FF5581000001801311900951008C038018018118018001006004406007 40624600600C3070060B640400600700602600610600400410000000040400000000000000000000 0000000000000000FF7F750000018AB04594C9010820C98AB8AB0B38AB80002AE2AC5062AE026406 3362A640E64E2160042AE4862AA28E2AE2062AC2AC0622A800000400000000000000000000000000 0000000000FF6AB3000001801923801001104001801801001801800008600600000200420600E096 24622604E0040060A60060060060060042162200C000010400000000000000000000000000000000 0000FFC6AE0000018AB90180100B0A80898AB8AB0A38AB80002AE2AE02C2AA28C0A62262AE046086 2A62042AE12E2AE28E2AE2B22AC2AE0122A8000204000000000000000000000000000000000000FF 34170000019558099518C50281519559551558C5800042E55655650A53414E50644608E106486106 55640E552556556550556104110410000006000000000000000000000000000000000000FFCE4800 0001801811811841002005801801001801800000600600200204401600600411600E006000006006 002026006002006004482000000000000000000000000000000000000000000000FFEC440000000A B80188C81900008D8AB8AB8A389100000242AE20024402400606E20200E21E0040002AE2802AE28E 2AE2A22AE046006004000000000000000000000000000000000000000000FFE68F00000000191180 1801810041801801809805000048C00605400C40024608613230600604E104006000006046006002 00650622E444000084000000000000000000000000000000000000FF9E8F0000000018258458C50C 2003801801801851000000400608612410C10E20400002612628600400605000600600601600602E 104094000004000000000000000000000000000000000000FF470D000000001845B0183180020180 1801811811000000400600208C1000560060108AE92E4368040068402B6006006006006016004004 000804000000000000000000000000000000000000FF7E1600000000189183480180000184D801A0 18030000804006806804014B0680280220620608400400610A006046006002006286004004000004 000000000000000000000000000000000000FFDD3A0000AA201A01800A832AA0AB8818AB8A38A180 002AE2AE2AE2243260062AA2A20460168050042AE20600628E2AE2AA2AE0762AC2AE001004000000 000000000000000000000000000000FF0A50000000001A05805A05C00801801851C0180100010040); SDR 8000 TDI (40080A82044200202442240000008000000000008010800000000000000000000000000000000000 00000000000000000000FFE44C0000AA8A10441E08810198AA8AA8008A318080002AE22054230222 24000620E24086482AE1022AA3222AA28A2AA1220401520920000001020000000000000000000000 00000000000000FF6E58000000008110004014100000000048009810000000008044410810024008 04003000000000000000880040060000800201444000000000800000000000000000000000000000 00000000FF86FC000000002024008020042000000102001824000000000809004001010820800802 01200001000000000000260002105102100480000000000000000000000000000000000000000000 00FF149C000001801011801041005901809821800021000000600600220601240E00040000E40600 6020036014406040206006006046084008000000000000000000000000000000000000000000FF7F 12000001801001801001021801801801810000800000600600005604208612200614600614E00000 600400E10002E02650C004002000300000000000000000000000000000000000000000FF81BB0000 01801801841005020841945801941800800000604600410E02600609435200607E02E00000E00400 E00602601608451C004000010000000000000000000000000000000000000000FF781B0000018018 19841823800041801801021800850000600600612410E2060264A606650608603044641420610600 60060142C4002000480000000000000000000000000000000000000000FF2E170002018010018410 00004CC18ABC21908020800000702600050600610E00A01211640600600084680E0060A040E03641 6027105010408000000000000000000000000000000000000000FF74F80000458010019030040008 01803841800028800004602601040620600628610040E03608624000610600621000602608600404 6000000000000000000000000000000000000000000000FFA49B000445801801901800800021801C 01155808800180704601600650600640210620651600642902750E00620795600600E00400200000 0000000000000000000000000000000000000000FF4299000001A01C61845800800401A058010ABC 00816104700F00600686E18700601E007006006000C068070060168AE04600680400200000000000 0000000000000000000000000000000000FF1903000001801011800005000C01801821801A218200 00681480048601600688420604E02610600400600600608680600610602702100020000400000000 0000000000000000000000000000FF3C70000001A01025822003040021C018010018018000006004); SDR 8000 TDI (0082001028011540000000800030080002012152C1280A08809209040A8000000000000000000000 000000000000000000FF7B0800000080000080080080080A800800C0080080000021821020020028 0200200200200280200200200200241200000240A002000002000002000000000000000000000000 000000000000FFC07B0000010804210018018819239239230C1129932000620400600E4164CE0060 042564C61160000160864163068060CF00E006100006000450000000000000000000000000000000 000000FFEFF00002010000090000090AA0000804BB0230800A2000C30C1144403600082810893010 008881003C90802EC2F83EC4AC0A04A40A0084488100000000000000000000000000000000000000 FF887A000000800040800800B00800844840C208C88C4000300200200240AA220020064CA5420820 0000A802212082002002802002080002000430000000000000000000000000000000000000FFDFC1 00020008000000000020072208000430000000800008000800288001080010000010000000800000 000000000A0290008200000000400080000000000000000000000000000000000000FFDE65000000 00020000004000000000028800000000001402801082008A00000000018010010080000A00800202 28000020400000000000040000000000000000000000000000000000000000FF9CBD000200000024 02002004200000000000810000010000000900801001081000A0020120800000000000B400408004 20000000050000000200000000000000000000000000000000000000FFE690000000000110002002 00800000000000000800000000004400000402404204003000000004008000000100000001100008 00200000000000000000000000000000000000000000000000FFB94F8000AA8AA801888888880EAA EAA8AA8A286280002AA2AB80222A20A00610A01A00E21E2AA0002AA2AB00228A2AA4022AA2AA1920 00000000000000000000000000000000000000000000FFEEA3000001449010001115141001401488 00102200000050840044481000103004001100080040010040088000008050288840004400000000 00000000000000000000000000000000000000FF5ED2000555955809151113915155955955955011 800155655601454640614C00E30608C10555640155655654E55755604E5575562460000002000000 00000000000000000000000000000000FF38130000AA88290080A8208048AA8AA8228AA81080002A A22A00A00222A0A20121120420822AA0002AA222AAA2AA2AA402A122021020000000000000000000 00000000000000000000000000FFF11000000020012200502004000120120000008400000008002A); SDR 8000 TDI (044009006044106CD631200004608210608600620E04400600004600080000000000000000000000 0000000000000000FFD4E00000200000000010018018018018008018018000005804404007906000 00580502688780E00400600980600640402644600600000600000400000000000000000000000000 0000000000FFC389000401040401801001980D9D0052400158010000000006004106087405436604 02600606E00001C0225569C61040162240061A000600000000000000000000000000000000000000 0000FFC5BD000501010401881001800821141000081801888000010600442440C0CE042045006206 1020023042C200720E00C08610C0AE050226000002000000000000000000000000000000000000FF E79E000101000001001001801C41245420D140010880004106804226206345016004802204004000 08408690644011400E00C90E000A06001000000000000000000000000000000000000000FF992400 0040000001011001849843821050840041804000C406014004156806442004456027046000084224 096000444416046046008006100280000000000000000000000000000000000000FF058E00064085 0201921001000805501402001881000000200240492281629548624C006B8E30E08840649A45601E 40414610504E211046000000000000000000000000000000000000000000FF5B5B0000008004AB00 1001201801801000801901800080600200404605650010E034097146586200006005006006404016 00C016400006000000000000000000000000000000000000000000FF5DC700000080000904180105 10450410448400018000016402814805006006430445424406806410106152086000004206044026 010006000500000000000000000000000000000000000000FF2D0900002180014580980100100100 1011800020802000400200400010400200000408000C03010000640400E008024006016006000006 080000000000000000000000000000000000000000FFE39400000000000000000000000000000000 18000000000000000000000000000000000000000000000000000006000000000000000000000000 000000000000000000000000000000000000FFA54500000000000000100000000000100040180020 00000000000000000000000004000000800000000800000006000000005001000800000000000000 000000000000000000000000000000FF5B7900000000000000082100080080080180000080000A00 02000002A0200200200200280208200001208230A00200000600A042000002000000000000000000 000000000000000000000000FFF03F0000010006110000100AC00A1000B2023080344001440C0040); SDR 8000 TDI (600600600E02628E0020040060040060060060060020060060060000040000000000000000000000 00000000000000FFC5E8000421000C01001801C8B00182194100980180000028A6008A2E206A0620 60C6887286206424016D1430648E0260B60220060060060000040000000000000000000000000000 00000000FF009500008100080100B801801001801805001809000000041600010600603602641602 60160060800060440060060064060020060060060000000000000000000000000000000000000000 00FFDB13000000001001801801801001801801001801000000000400000600600600600600600600 4004006006006006006006002006006006000004000000000000000000000000000000000000FF8B A0000400001001801801A01001801801401801000000100400000600600680600600600600600480 6006006006006006002006006006000004000000000000000000000000000000000000FF7B422000 00041C01885801821041801801003841000000000640020700642600620680602608600420600C04 602600E02EC0A80608600E000004000000000000000000000000000000000000FF50332000001018 21801841801001C01801041901008004024C04000688E0165360164474060080008862043060974C 60060A202642E006000000000000000000000000000000000000000000FF7F350002058102008000 01801801801000121801000000110800400200400400600E00300404000000600200640700610600 5006000006000000000000000000000000000000000000000000FFB907000101880320800021C018 01201450401881000014001006400600620485E3444262760060140075000066060461D6A0500604 1006000004000000000000000000000000000000000000FFBCE20000038500000840018418410010 001058210080040B4040440610E034547804407806136000486213B460D733605615602735001600 0000000000000000000000000000000000000000FFA3C6000001800014002005A019110918004018 43080000000000C08A02622C00600C00600648E02405700000602E88620602608EA0014600028400 0000000000000000000000000000000000FF5F1C00000000000A800005801801A0D0400018010000 00080400401600610440E08D84600600602800E0020062160A780600408602000600028000000000 0000000000000000000000000000FF0041000700000200808021C81911B03210C198050000144064 0541660064C42440054A22840040040064600860C600614600481641890600000400000000000000 0000000000000000000000FF74E6000000000100014041C81801801C00201821880100000C004006); SDR 8000 TDI (00850928800820800908C08810080800904000C00060100800000800000000000000000000000000 000000000000FF051F000200041401000801180800810804C0008280000020020002021020422222 02022002002000306042A0200200A0060028028428060000A0000000000000000000000000000000 000000FFBE0900023008000801808000002A08800040180C00000813008000900000280000002800 00270000000025020086081280221388008280000000000000000000000000000000000000000000 FFA58C00028042008010403206600400000822181000005110001004200203005000004483484000 618A0608108007001108000C00A10400000008000000000000000000000000000000000000FF6D5B 000000800A41863801019A419438E0804121800000680640000E64609608E0961060861800000061 8680631864600618E006026906000000000000000000000000000000000000000000FF1905000000 B22811A49AC134D835A0BA858002CD8000C02006000A0E906D06B2ECAEB26906886850446AB440E8 009068168C2226406006000840000000000000000000000000000000000000FFE582000140C00944 C83C030018018A1829D41801800008B30E00014725605600600601625622600008E00412630E20E2 8640E11602E506000088000000000000000000000000000000000000FF9772000000800800801801 00100180180100180100000000060010078060060060060078060040000060040060060060060020 06006006000000000000000000000000000000000000000000FFC550000040800400211C01917801 851941C1001180000035D2180046406046C061471060064060000060464061800468460060060060 06000000000000000000000000000000000000000000FF7069000000800000001C01809001801E01 400001800000200240100600640E00620600E0160062008060042060000070260060060060060000 00000000000000000000000000000000000000FFC5F4000000800400001801801801A01AC1801801 10008010120000061069060060078C64061120800068040460060060060000060060060000000000 00000000000000000000000000000000FFE80B000400802400201801815001801901001801000000 010210008600620E8266060060061066A080E28C48620F0062CE0220060060060000000000000000 00000000000000000000000000FFC662000001400800401C01A01801C01841C01801900100201640 080608648E00600612EA0E00E1040060060260870060060020060060060000040000000000000000 00000000000000000000FFDAEE000080004800003801801801811A03801801000000000610820E80); SDR 8000 TDI (04401411420400600000600600622600400600620605600000000000000000000000000000000000 0000000000FF7C090000042012012AC201231001200211211223000091480C000A08800891008801 020800140800800A8400082080400400080080080000080000000000000000000000000000000000 0000FF0B1C0001300008048018008048008008C480081080004221020020C6006006446006516006 802000002042802002002802802002002000000000000000000000000000000000000000000000FF 3ED00000000004AC4008AA0802AA0AA0000A208000005412302A91422AB3620822AA0032AA208000 2A80482A82882A82A82A82A80002A8000000000000000000000000000000000000000000FF342D00 000220040040000045200A0880404102200000041008001008009050000C890A1080020800090210 000000000000248000000000000800000000000000000000000000000000000000FF70F100002A00 00A80220AA0204AA0AA0900AA00000000002202A84112A8000020AA80202A80A00002A83002A82A8 2A8AA92A82A80002A8000000000000000000000000000000000000000000FF868E0001300000B414 03521003402442941441120000D10540D504414C0480C28020408440A90000C41140D50D50951550 880D50800550000000000000000000000000000000000000000000FFC0BE00010040000009040051 40004004446007520001010100000000000411490001508001409001001011001001000000001001 001000001000000000000000000000000000000000000000FFCE7600008A20020009C0880A820008 00000A200000000002A02A81000000801000002000100808002A08002A8288400AA80002A80002A8 000000000000000000000000000000000000000000FFC7E7000020800950A02A44A00902A0CA4481 082080008828128008C291280B082CCA80A812C02000802242802803102002B42802802002000800 000000000000000000000000000000000000FFEC3200000100100524020120222924131000129200 00A34004000C08C20A20A508008A0D2083080080C890004840C2C804808804005004000800000000 000000000000000000000000000000FFD016000089821A0100991190380592190182108180001048 0480010E0461060060160060060261000064B6086006046106106406086406000000000000000000 000000000000000000000000FFDDD1000200800040CA4C00C30C40C08C42A04C0C800140A0825012 434830533531033230A348B02050300280309250200320214204A102001000000000000000000000 000000000000000000FF8FFF0001010024222803002002012203020C12000000A0C08C0009408888); SDR 8000 TDI (71374070064164002A822E2AC2AE2A82AE0062AC2AD2A80002000000000000000000000000000000 00000000FFACC000040C221801881801C01801801921000801800008100E006A0700E85620E00620 70074040000028060060028000060860040050000000000000000000000000000000000000000000 00FF08760002A80CBAAD801889800AAB8AB8052A2013800002A906006446A0645EF26C0697691E94 E0002A81062AC2882A82AE0862AC2AC2A8000000000000000000000000000000000000000000FF8D 86000004001805903A05A84801801A0101100180008024CE8060160062A608E2C600600644680000 6086006004001007006006006800000800000000000000000000000000000000000000FF22450000 0004100182982105000180192B0018A980002800060044A614E00600601630E2A608640000444E00 4046000006434004004000000400000000000000000000000000000000000000FFF5DE0000000410 81C0188100002590188100488980000020864850272A700704710F28700E24600000610620600244 810600400C214000000000000000000000000000000000000000000000FF73510000000010999218 0100100188587900A02590000020060462260062861264C605670610601000604E04614020048601 4024004000000000000010000000000000000000000000000000FFE1FD0000000010018518010210 89841801851041800000600600640600650641600600604600C00010601600E20408000E0040C600 6008080000000000000000000000000000000000000000FF1A030000000200000000800200020401 0004188A10000001002400002A00002902004D00802A00081000C044050604800801008000800808 0000000000000000000000000000000000000000FF649800004000204000000000A0800090400138 0001000000080080082804000002080C044008000011000000445620401009040400C00000000000 0000000000000000000000000000000000FF1A4B00A000080002D100010009518048000210208A00 0020061830A10090810010512010500120000020020320C210640200201242220020000000001000 0000000000000000000000000000FF84EA0004005014CD0004084114004004014104060001005001 10020402400402400444C04D00100120100500800100102500100100100000100000000000000000 0000000000000000000000FF78EF000400400C00800C08C02C00C00C00C04C40840100300B01224A 00240200240200200B08300148B00302A11340304B10B00300340040100000000000000000000000 0000000000000000FF5AF500A04000591180100180108181184184100190800040060060842D4104); SDR 8000 TDI (062466062AE0000462AE2AE08C2862AE2AE2AE2AE004000200000000000000000000000000000000 000000FF28A8000000009000045800021001800841000001000048400602020E0060264462064262 060460040260060060000060060020CE086004000004000000000000000000000000000000000000 FF22BF0000000AB8AA8CD8AA08D0AB8120030A30AB00000C42AE2A80A62A60864C60A648E0862AE2 042062AE2AE08C2162AE2AA2AE2AE004000004000000000000000000000000000000000000FF03FD 000000125154111952113155954009154155000003455651014654630610E14E11612E5164065165 564D651054E5564C2406446004000406000000000000000000000000000000000000FF76DF000000 001800801800001001900051001001000000400600000600E40E0160160060560060000960060062 44146006002006006004000400000000000000000000000000000000000000FFAFB20000000898AB 8018898898AB8AA90C0A38AB80002002AE2062060162362062062062060040000242AE0042CE2A22 AE236004014000000000000000000000000000000000000000000000FF53D6000000001801855801 8238018018C1008801800000000611600644600E04E00600600E01600450400648402200A0060061 34104000000004000000000000000000000000000000000000FF260C000000023001901845800801 801805001801800012800602612E1161061060CE12E1464C640600C00604C0060020061162062360 00000206000000000000000000000000000000000000FF53DD00002204500D941A01800801801A91 010801800000880E006116006C0E88E00688E80E086C040040060040020030062C60060068000008 04000000000000000000000000000000000000FF7AD9000110001A41801801801A01801803201801 80002A0086006226526106226CA62063064560008040060040460060060160040040000004000000 00000000000000000000000000000000FF2D78000000289881A0B8AB8AB8AB8AB8250A28AB800001 222600695684E02600605E0264660070042AD2AE2AC28BAAF2AF0062AC2AC2A80010040000000000 00000000000000000000000000FFFFA4000000405041845C05800801801801401805800004801600 610651610604E0060064260048050060060060068028063560040040000008040000000000000000 00000000000000000000FF97030000A051532D82BD55954B55955A115549558000C4254700700650 7506926C868AE10E0D64045565565565525525564565565565500004040000000000000000000000 00000000000000FF674F0000AA091A89D098A9933CAB8ABAA90AB8C18000300A4600700F02700700); SDR 8000 TDI (0000080004000101000000040800000045004804D000020000000000000000000000000000000000 0000FFC38800000000184A10000004200005004200180C00001200000001481101201000A8128140 000000080030000006000000008028048000000000000000000000000000000000000000000000FF 6AFA0000000018018418208018219320418090A2800004600620800655620E006406106216206020 00640E08608400600600010E00E086020000000000000000000000000000000000000000FFF79D00 0000001841001800801901800803845000920000E00600022600600600E14620614604E410006146 01600C32E10E008006446016000000000000000000000000000000000000000000FF646300000000 1821005801801885800003801011800000E0061002260061460460162462060060000160A600E0CC 08600E10800602E006000000000000000000000000000000000000000000FFB53A00004000180180 380180104182080100702102401240060101060EE38602600609610602E22040E206006064006006 080096006004400000000000000000000000000000000000000000FFC3B100000000180104182100 1A2391404182908B880000600629000640602E0162B604612E20600A00481610600422C086001016 20710E040002000000000000000000000000000000000000FFB84C000000081801811809003101A2 0021821109808000628E00041620600601608628600E006080884106A06405014416008006806004 000000000000000000000000000000000000000000FF6D4D000000101905011801003C01C0004100 1001000008420600820E05608600E206426006006040205084406055005A4E000004004006000000 000000000000000000000000000000000000FFC19100204000B883C01801001041A000011C902101 0000400600010608E006006B2E12600600612012400700640C0148270B1006007004580000000000 000000000000000000000000000000FFD8D800200001580000180800188182000181515180200060 8E00000628600600605601609600600504600780600400600614300F007006000004000000000000 000000000000000000000000FF45B300000000180090180000B801D4801300100100000040060001 2E1161261060CE12E14600620422600600640402E006002006006006000004000000000000000000 000000000000000000FF552100000000180045580000100180412181100180005560060000064460 0E04F00600600E006004096006006024007006806806007004000004000000000000000000000000 000000000000FF3B820000000AB8AA8018AA0E10AB8401010B30AB00004142AE2A86160062462066); SDR 8000 TDI (604744608A556017006C1408608411501480610000000A0000000000000000000000000000000000 00FF37B80002000000012010890210990B00CC0880010100088005000404A2C0A4400020668A2831 80600040A000922C2BD4C442C204804000000000000000000000000000000000000000000000FF27 65000100200C00800800840880800A908008409120810002C010020820120AA80690A04344A0004A B013002C0A00200200A812002080000000000000000000000000000000000000000000FF25A10000 0000020000000000001061200000000000000000000202000000000008280000001000A800080000 00008002A0200000000000000008000000000000000000000000000000000000FF3C530000000000 00000000000000020066000400000000000000010010800020000022000010000200000010000088 8800480000000000000002000000000000000000000000000000000000FFDAB10000000000001002 0200020000000008000200000000000001481101001000A812814100000000000000020000080010 0000000000000000000000000000000000000000000000000000FF17D90000000000020540480000 00000000000048000000000000000024000804800000000800020000000000000000000084000000 0000000000000000000000000000000000000000000000FFF18A8000000AA8A88018808AA8AAEAA8 AA82A88080002ABAAA0002060162362062062062062AA0002AA2ABAAA0AA2AA2AA24A2AA2AA2AA00 0600000000000000000000000000000000000000FFAAE30000000002410000411002014001480004 3000004210040000000084080100100000500040000010208040011008040150310A000000000000 0000000000000000000000000000000000FF9D87000000155955111541155D55955955855B558000 55655600014414430410C14C11412D556000556556D56556557557404D5655655600000000000000 0000000000000000000000000000FFB4AD0000000AAC088CC88C8228AA8288008AA900800000A2AA 0000A24A20822C20A248A0822AA20022A0922AA2AA2322AA2A208220200A00000000000000000000 0000000000000000000000FF874E00000000000004400D000200400000080000000000100000020C 40402444420442420400420000080000000080100409400100000000000000000000000000000000 0000000000000000FF21330000000AA90500008A8108AB9048048AA82480001022AE000610000240 0006002406002AA0003226022AA2AA22A2AA2A240201254200040000000000000000000000000000 0000000000FF820B0000000019000540411080001031080011000000410000000000240008448000); SDR 8000 TDI (06002000266006184FA40E6244442004006800000000000000000000000000000000000000000000 FF601300000000081101080180180180020100508380000000460405240048250040828040160A20 0040E00200F044106504002004027008000000000000000000000000000000000000000000FF2DC5 000000001909B00401809E01803C31805E01800008000604008408400C4074800A40948200000060 06014005007044422004806288000000000000000000000000000000000000000000FF2461000000 440A110848C180190182808190590581001000060402048048441071020048040002884061144060 04106004312004006000080000000000000000000000000000000000000000FF87D1000080000003 810801861821840800B010058000200246D000C00121440412460A4AA61260000166060042804161 00802700464000000000000000000000000000000000000000000000FFFA74000200201005064943 841801802202801C0180000000270001002822040000060441062065000064140060000060000024 00004000000000000000000000000000000000000000000000FF715B000100040401300001801D41 823904C038058080500046040001502444000504004C06C06010006006006000106000B020008440 00080000000000000000000000000000000000000000FF72F7000000001011800005801801810000 88188180000002060004000020041000040860240260002060842062800060000120000060000000 00000000000000000000000000000000000000FF42BB000000001800000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF9241000000001C00000000000000001000000000000080 00000000008000040000000050000000008000000000040000040040048000000000000000000000 00000000000000000000000000FF5E52000000000800221001800800800800800A01800000008A02 00060000020028020020020030020061021032020860022020020000000000020000000000000000 00000000000000000000FFC9940000000000010001100411110A01001080000000810000000000CA C0A4000024248C484108208100400100484000800542000000000000000000000000000000000000 00000000000000FF6665000200200C00A20800800801800A54800800800010008A02010200200200 300200280210200000A0020020020520020020028020000000000000000000000000000000000000 00000000FF3F5C000100001801201801821901843909801821884100800622100511600C15602D11); SDR 8000 TDI (006004006406006006444006006002004006000006000000000000000000000000000000000000FF BEA60000000000018000010018008018018000018000004006000006004006006006006006006004 006002006002004006006000006002000004000000000000000000000000000000000000FF2B7000 0000001801800001001801001A01800001A000004006000006005004007006002806806004006002 007002005006007002806002000004000000000000000000000000000000000000FF8B5000020000 0009A09811043800C13841800005800002400620280624C004026106406026006006006406046026 00440600E080044006080006000000000000000000000000000000000000FFED3C000000001C0180 1801001C08841801804041A000004156010B4708404C10E84E00220680600600704E50648649400E 4A600A10C2A6000106000000000000000000000000000000000000FFA273000400001A08A691C183 1C01801821801001800000008E00020600E40400400604401C40600000600600520600E10620B006 006200000000000000000000000000000000000000000000FFEEC3000000400A0030182D81B841A0 4A0180105384001111264000B6026805085406605C04006007017E05025526007E06002006806400 000104000000000000000000000000000000000000FF363D000000001A0080100180180983580180 3041800004000641000750625402E14C02444420400400604E30408248610A1429120AC0C0100106 000000000000000000000000000000000000FF16E9000000200808005801801801840549C0100180 0000100600050680624D006116025005204484047015004002007002402002804000200204008000 000000000000000000000000000000FFD684000000001800800601E41801E41241A0102182001000 16000114006024004402044206806104026006004106006007A06806804200200004008000000000 000000000000000000000000FFE130000000000800200019831807808003819811800006000E4004 2500600678491240C02C006404816484204C06606006006006004180000104000000000000000000 000000000000000000FFAF95000400001E10902005801841813C9580120180000100860000250064 1400600001402E204004006116406002806A02006002004000000404000000000000000000000000 000000000000FF0A9A000000004900680001831801A00049801801800010050600000400E00D2462 2284400400400400620400600220E002003B02406500000004000000000000000000000000000000 000000FFEB07000000003801800C01801D81C45001119081800000028650020490470418500211D1); SDR 8000 TDI (00012400840A868459C320010700054204000000000000000000000000000000000000000000FF0D A200010000186609000020200A0000000442000000400A00600A802002400801804202200A000100 0018010010000808400028000000000000000000000000000000000000000000000000FF76E50000 080018018630018198318019119018018000006046002126084014406006040006406000806600C0 60480464C6086084286000000080000000000000000000000000000000000000FF6C5F0000002004 01C25295881B34B31A81A008898000A0608E908406884804A8E84EC84A07086880286D40036840D0 E286886C82CA4A00000880000000000000000000000000000000000000FF0720000010403844C892 0184D8010058499088418000136206242127424244006D0683604F22E00200E00808630800604E40 E834014080000000000000000000000000000000000000000000FF0AD70000002002008010010018 00A01A01A00001800000400600000600400400600600500780600200600180600000400600600280 4000000002000000000000000000000000000000000000FF9FB8000104000400841001811A44505B 51A408418000006546002006854004416006202516006000C0680414680404600601400480600480 0000000000000000000000000000000000000000FFCDDE000000201800A01001001C018018018008 01800000600602000608428400E00700700E00600900600400700400600680400600400500000000 0000000000000000000000000000000000FFF372000000000200401C01801A00801A018000018400 00400600200620400400700600A02600600000600480600400490600D00280480400000000000000 0000000000000000000000000000FF409F0004000018008018010018018018018000018000004006 000086C044040070064070460A603000EA0400628428402683420200400400000000000000000000 0000000000000000000000FFABB4000400000000801001A01800A01801800A018400006806822006 08408400E00680F00E00600480600200600200708600600000700200000400000000000000000000 0000000000000000FF6157000000221800A01001801A000019518080038000024007020006004024 0060AE88200620600400600200600A00400600600200400200000400000000000000000000000000 0000000000FFADFE000082040401801801209822A83C01828A23800002688600208702C024217006 086286AA604520E0068A650E08604602E40080400600000400000000000000000000000000000000 0000FF98B7000000001801841801001800801801800001800000424602000600600400612E00600E); SDR 8000 TDI (00000102802952002082822042002000000000000000000000000000000000000000000000FF23AE 00000012A0A80882AA4AA0AA0040EE0AA2AA0000000AA90013202302A82222222A82AA2202002A80 102A82002A8209048200AA8000000200000000000000000000000000000000000000FF92CE000000 0000020000002002000020200A200000008008000000000002900000080300000800000002080000 08000000000000000000000000000000000000000000000000000000000000FF38C700000002A0AA 0884AA0AA0AA0880880AA0AA0000000AA80002202A02A82A82B02A92A82284002A84812A82C82A82 10510250AA8000000400000000000000000000000000000000000000FF4251000200354350324554 1541541303142003540000000550801450D40800D48940A814C8C28800550920C31540D50D48D50D 40AB0000000800000000000000000000000000000000000000FF21D9000400400400444200200600 44040040040000010008000008090010010010010000011010010010400018010010C00010800000 00001000000000000000000000000000000000000000FF08630000000AA0020100AA0AA0AA000080 0120AA00000002A8000320A300402004000000082800002A80001002A02A82A02A82B00000000000 00000000000000000000000000000000000000FFA70B000200200C80A80800800800914A10B08A00 000080200280200210AC030CB04AD02943002800002902C5200A80280280300AA220020008000000 00000000000000000000000000000000FFD0F600000020043122B000201000241245241001000000 0004000914004954800280850C0084C802004C549048050008140008001100040008020000000000 00000000000000000000000000FFD1C90001000018230A10018018418218299050A1800000600608 6086804044216A860260160060008862040860944CE48680610E0060840000000000000000000000 00000000000000000000FF5DF0000000400D08C14E54851E08C00C80C20E00800140282320A01302 300B0030234830A340300004310B21344300202320B403A530020010080000000000000000000000 00000000000000FF0D460000002022010054C20400002E22002012A8000002800000080486080080 9000A0080080C8801848009009008008008088114281000008000000000000000000000000000000 00000000FF15B000000000090090081CA01800800800808801800000280211300200602601204200 A01200200000A1220020222028022020020020820000100000000000000000000000000000000000 00FF66940000000018104080004A02C10080E808014000002808880AC01000400420062818014820); SDR 8000 TDI (2A82A42AC2B60422AC2A00160462A0000002000000000000000000000000000000000000FF498800 0001801140A11901C018018000018418018000846006016806D24140006006042016806800000004 00400E5160048060C6156000000800000000000000000000000000000000000000FF1BA100000088 000D82003380193580000090900100002060064A60060124040C628E288286006000000010000006 02000000C216406008000000000000000000000000000000000000000000FF842D00000080180184 0001801801850010885801800012608600E00621000D00700600300E0060000004000000A6044000 106016146080000008008080000000000000000000000000000000FF864C00000080100180086581 58098A0000861811840000600600600608000200659659E18620601000004000001600421820E106 016010008000000040000000000000000000000000000000FF378D00000080080180080180181190 2040801821800000602E0260161420022A6026044446407200000000010406086200436006006020 091000000000000000000000000000000000000000FF32E400000000180002000000400000A04808 204004000800480400104080105402482000480000100002000080081200000A0100128040080000 000000000000000000000000000000000000FFCB6500000012180000000400012002200004000002 400000000040004000200A0140080400000000000244024490228004080080000000000000000000 000000000000000000000000000000FF66A200000180080080180481180180000088081080000463 020120020E400300120206340000640022804200254200200A002012002110000010010140000000 000000000000000000000000FF945A00040804041942040140040040042A40040000010010010210 0500104020451C148005000201001001009011081001001001001000000000000000000000000000 000000000000000000FFEAFA000400800C00C00C04C01D01C00400C20C0080010034030030034030 022420420120030028010114230131034AB003103003003000000800000000000000000000000000 000000000000FFB92400000910180104100180182182202B90180184200060060460061460061040 04006204006200440004044206006014006106006000000000000000000000000000000000000000 000000FF8C2600020130020522100120120124020020000000010040048008049048010910108008 01114802800A5400400480082428090C000000000802000000000000000000000000000000000000 FF64AE000000800800802800800800914000800800800000200200208A0120020060860020060020); SDR 8000 TDI (628E2862AE08020A2862AA2AE000000204000000000000000000000000000000000000FFB0730001 0305405394195595595480190D89011580005565565565560C600028614604E34655600400654454 E55601055030E556406000000004000000000000000000000000000000000000FFA9900000018010 01801801801801001800800001800000600600400600604050600608840600600000400401600641 0080036006006000000000000000000000000000000000000000000000FFDA6B00008182B8010838 AB8AB8AB80008180100100002AE2AE2AE2AE01600C0062064060062AE0000002A62A62AE0822A604 42AE026000000080000000000000000000000000000000000000FFA07E0000539001058018018018 01800001891115000000600600600642E0842A600601620600600400000600600604A00652C00608 6000000004000000000000000000000000000000000000FF06BB0000018018318298018018018000 2D843021000000600600600610644400E1562C615600608400000A01200620201200400621600000 0004000000000000000000000000000000000000FFCA1E000001800031A15801A019358000018410 01000080600680680680600402612608602680680400008200204E80200280412600605000080400 0000000000000000000000000000000000FF4402000001101800821A01801801800001A952010000 00600600600600600428620603630E00600400004600610600200600400600600000000400000000 0000000000000000000000000000FF889F00020102A0828818ABCABA018AA0AB811CAB80002AE2AE 2AE2AE2AEAAE80E80E2068062AF004AA820E2AE2062AA2AE2AC20E2AE28000100400000000000000 0000000000000000000000FF801C000201801940803901801D018000018012010001016006006006 00E00454E40644643600680100001200200741600311600610600800080000000000000000000000 0000000000000000FFA731000001854150941B55955C959541559419558001556556556D56D56556 246106006246D5600555050255255655655355614E55645000000400000000000000000000000000 0000000000FF75B50000018AB80ACB1A2BCAB80B8AA0AB52D0AB00002262AF2CEAAEA272C4806806 08B006AAE0002A82A42AC2A60822AC22032620E2A000000000000000000000000000000000000000 0000FFDC7D000001880402C0B801801A218000014050010000006006006006007801897A4E2B310E 006000800054004006006004002206004080000000000000000000000000000000000000000000FF F0F200000182AA00883A018AB8418AA0ABA03AAB800018E2AE0062AE10401C20E1760029262AE002); SDR 8000 TDI (AE006086006046006000096080000000000000000000000000000000000000000000FF2E38000001 90100090190180984180188580484391001060060040062A41060060161105464160000060040560 06284006406000006440000000000000000000000000000000000000000000FFEA9D000001881001 861811841800045800800803800008600600600602609000E04600608E1060000060040260460664 06106000046000000000000000000000000000000000000000000000FF783F000005811001803813 80180A803880802121800011610600410600600000612638E0260160800060041064060502062060 0002E000000000000000000000000000000000000000000000FFBE0B000001801000081909849C20 1218058408118880017406906006A8620A40611600440748E00101695600F1263068441060051073 20000000000000000000000000000000000000000000FFFA8B0000018010040018018018012C1C01 808A01810000600620500623704834E056020096206040204224A061072060A402E0A40460000000 00000000000000000000000000000000000000FFFACF000001811002001801E01802081C00800101 800000710721701700702240605611401600602001603440730640802444E1140260000000000000 00000000000000000000000000000000FFFCF0000001981080001A11C01C03219800810401810001 720600C00E41681005600704C10600600140E40C00700704090520684C0060000000000000000000 00000000000000000000000000FFDF3A000005801100801801A01C00421801800C01800008640600 608602400408608600600740E0050070070868070050060068030070000000040000000000000000 00000000000000000000FF5B2A000005801000805801801C00201843800001800000600600400610 F48000E15600C15600600200608408E0065508060860020060000000020000000000000000000000 00000000000000FFD39F000041881043801A01801800001800800C01800000680600600600400C2A 60070C22060064048040540460068040D14160060060000004040000000000000000000000000000 00000000FF5FA800008992B0C98E98AB8AB8AB00188C8AA0AB80002AE2AE2AC2AE23603005660620 20162AE0040062442462AE0402400262AE2AE0000000040000000000000000000000000000000000 00FF4CEC00005110008080D80180180000184182204180000060060060062062B002E21610600E00 610400600E00600654000200600212E000000104000000000000000000000000000000000000FF29 BE0000AB82B08A88B8AB8AB8AA0018A98AA0AB80002AE2AE2AE2AE2A62800060B62240A62AE20400); SDR 8000 TDI (003002002002082002802802000000000000000000000000000000000000000000FF20AC00000000 02000000000200000800800002080000000080000400000011880000000000500202000000000000 000800000080000800100282000000000000000000000000000000000000FFAFC100040040020A20 000000002200002000002200000000210800E0000020000268000440001000000000020018020000 200040000000000000000000000000000000000000000000000000FF8F6C0000000000C240000000 00102002200004000000000000000000000000008150040130000000001000800000320000000920 800000000200000000000000000000000000000000000000FFF35000000008001000040000030000 009412C00000008000008008000000A02A0000400200000200000000000000000120000010000000 000000000000000000000000000000000000000000FFD9F28000AA82A8008AACAAEAA8228AAC0084 0CAA80002ABAAA2AA2AA2AA20A00620608A007AAA0002AB2AA2ABAAA00A20BAAA3032AA000000000 000000000000000000000000000000000000FF6E2200000000000000140140130000100014900100 0100500510500400044050000040040100400000141080500410101000480C004000000000000000 000000000000000000000000000000FF68860001558D5849D55955B55C81D5583580315580015565 57D5755655620628414404E344D56000556D575565564C650E557434556000000400000000000000 000000000000000000000000FFBCF40000AA8AA88A8AA8AA8AA8008AA8AA8028AA80002AA2AA00A2 AA0420820020B200A0A22AA100282082AAA2AA02A2022AA2A22AA000000100000000000000000000 000000000000000000FFD3FF00000000008200140100022A00008008800100008050000010000000 B002C21448000C004200000000000800009020001000000000000000000000000000000000000000 000000000000FF792E0000AA8AA8C88AA8AA8AB8768AA8AA8018AA80002AA2AA4442AE5320120506 001C20102AA0000520422AA2AA4023422AE2A22AA000000000000000000000000000000000000000 000000FFD3640000018010020000000001010000011440000000000000C260000080282A00004002 0000000044011400000009002000000C000000000080000000000000000000000000000000000000 FFE65A00000180182000000000001000000001000000000000000880002802800081500301300001 00108220000000420108000000000000000000000000000000000000000000000000000000FF1076 000001801001805805801814101801821811800000E20688600600440641608640000E00608000C0); SDR 8000 TDI (50CA0878868C20C6106006000000000000000000000000000000000000000000FFC135000000A010 01804801D019518004818C38058001007004046000006402807C0724602600602000641640600324 6106043016004046200020000000000000000000000000000000000000FFC0C5000001A018018090 270099512AC021841825800020620408688008202201610708DA8E06230032210652480344607621 601600A144000000000000000000000000000000000000000000FF950F000061C898838110018018 01000019801805800000680410600000008220686A50204604200000200600600200700640600600 4006000040000000000000000000000000000000000000FFAF01000000801001802045D119515284 419218418000C0640400700090204480041604640600204044241644680240614680701601202620 0000000000000000000000000000000000000000FF71D50000009090838000018018010001018058 01800000600402608000048420000000809600040000000600600204600602400600400600000000 0000000000000000000000000000000000FF40E30000018000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF7E09000201C000000000000000002000000002000000000000 00000100000000080000000000100000000000000000080000000000000000000000000000000000 0000000000000000000000FF40DA0000008010008000008018008000018018088000002004005020 00208200202280200200200008200200200210200200200200200200000000000000000000000000 0000000000000000FF61FC0000000000000940000000201420001400010000005C41000800008000 0004082512340000802405004810A840004042832000000000180000000000000000000000000000 0000000000FFAC4D000000A00800A08800800800E20000810C0E8000002802802619802082002803 B0200210200000200200200200340200A00280200200000000000000000000000000000000000000 0000FF04D4000001801881801003841C239280A180182B80000060060862802A428E146A0E436807 006000006006007814026006106086006006000080000000000000000000000000000000000000FF ADD20000000010140830000010202820010A9201000000436400404000C040000A480A944CD80580 2A02842C00A4284A24620284000000100400000000000000000000000000000000000000FF002C00 0000A00900800804800A008500000008000000002803002001542502042002C53222002080002002); SDR 8000 TDI (06006002004006002004000000000000000000000000000000000000000000FFBE08000201C01801 801940103801A11800801C8180000040170060C20860861065048160120420040860060D41040070 2900408E406204000104000000000000000000000000000000000000FF86D8000001A018C1843804 051801A01801823A03800000412680380202600E00E80C0C688200000040E80600444E40E4820340 47016004000000000000000000000000000000000000000000FFF7C50004018008A1E03801021801 800041803801800000608E00402040600A00E8448060870060000040060040AE00E0860020260021 84000400000000000000000000000000000000000000FF26AF0000019058018018C1083A11C08005 8218018040006406045080F9651200618603600E02600421E006004014207A0780A0078080040000 84000010000000000000000000000000000000FFB7EC000001801801041043411801800021801B05 8000007046006800027103106C3610F80600600010600612C2060060560461164022040002000000 00000000000000000000000000000000FFD28E000001801C05501201001921C40101C31801800002 600680600004684208604F08600E00620400600600500500722704F0074000840000040000000000 00000000000000000000000000FF4D42000001801201900A21001801802101A41A01800000700480 6001C2E00300600610610600600000600780480E8060160028060020840001000000080000000000 00000000000000000000FF7A8200000180100180080128194180A061801801804004700404618010 644406071506609601E00400400608402601E04E0520260820060000840000000000000000000000 00000000000000FF532D000001B05005800001901811850005809801800000640000600080008B08 602201200680640000E006106844006A060060463020040000000000000000000000000000000000 00000000FF9387000001801001804003801809E08001801801804020604000600000000400001300 208600600600608600600020603610E0060000060000060000000000000000000000000000000000 00FFC703000001801801C038090178418005E1849801800020712400600000200300680E0870BE10 F30170A006114142046106002156022004000000000000000000000000000000000000000000FF5C 5E000001801801801811801901802401E09803800000721400E48000200201612710704703740000 A22644600A1060060220060C00A4000000000000000000000000000000000000000000FFB7CC0000 00801001C00801009801810001801801802000650C00E50180600200602400600608600100442603); SDR 8000 TDI (106124286006008006000000000000000000000000000000000000000000FFB4E1000280001345A0 1130013B2CA88AAD889B008000826006C862812841368C6886A06906B04800C47006C16C32106AC2 D26906A00B06000800000000000000000000000000000000000000FF3F6600000180500182500012 1801023800A25834800010600484E04204C20601642E12EC1400C00010E2260A610280680C00EC0E 0A8016000000000000000000000000000000000000000000FF361F000001801001C0100000180180 18018018008000005804002002004806006006006804004000006006804002006003804007800004 000000000000000000000000000000000000000000FF188B00001440180180180000184181440180 18038000006444086081047407006805006014AB2000146446926802046014046006004006800000 000000000000000000000000000000000000FFC4C3000000001801C01800001800800D0180180180 00006024006A21006006007024006205000480006006007002007006005006004007000080000000 000000000000000000000000000000FF986F000001C0180180180020180100180140980180000048 8680700400480700600580600600600000600600480300610002E006004004000000000000000000 000000000000000000000000FF49FC000001801801801800001801801003011C0180000040068060 8420400600706400628654400000600604420B20E0020D4006005004020100000000000000000000 000000000000000000FFFFC5000001801001801000401800001900A0180300000061440862A00040 06006006007A00002484006806006001006900006806803006000004000000000000000000000000 000000000000FF8D1700000188108180100200180080180180998300000050050066604040860068 06006000006000006086004004406002006006002004000000000000000000000000000000000000 000000FFDAF300000980188180180200182100B804A09A030000006224006082006A060060448064 8A0080060A682608680E02E80A124806806006020006000000000000000000000000000000000000 FF2D4A00000588180180180000180180180180180100000040040020020460860060040060020040 00006286004406006002004006006004000000000000000000000000000000000000000000FF65D8 00000180100180100000180080180080180180000040060060020060060060060060000020040060 06004004006000004006002004000004000000000000000000000000000000000000FF48BA000001 801001C01000001A0080180180180180000050060060028060060068060070008020000068060040); SDR 8000 TDI (0000048001280A80000000000000000000000000000000000000000000FF27AD0000A22300AA4820 AA0AA0AA0000AA4AA0AA00002A92482A88002200902800084282A8228000A082A82A80A02A82A828 02A82402A8000000000000000000000000000000000000000000FFB3470003541083085041541543 502001543545540000550C40410000B08A90AB0000840D50B00800440550D102A0550D5110055003 0020000800000000000000000000000000000000000000FFA8740004003044000004004004004004 00000200000000000000080010104100114110180110100012000000020100100184900110180000 1000000000000000000000000000000000000000FF97630000AA0C00840800000AA08A0002AA0AA0 AA00002A82A0B200000200000002801002A80080000902A80400102A82A84002A800001000000000 0000000000000000000000000000000000FF9033000200830A00A50810200A00A00800A008008000 00280A11200341280342280320A002D42800802002822C8A80280240A002A0244A00080000000000 0000000000000000000000000000FFE91B0002000032532052C40012400000010012000001000804 800005084D549108288A0804800800A55004A908440040008A00048D488000080000000000000000 0000000000000000000000FF0FF000000188990180580010188D805B01801821800040602602E20E 00620641604605609422E00020E40620630424684614600600C04600000000000000000000000000 0000000000000000FF0037000400A00C488B0804244C40D40C20AA2D02800108250B20204328B12B 02311330220310300000300309304290330B01291310301200100000000000000000000000000000 0000000000FFEB2A0002000012214062204482820001801230080000C00140870620900A60830810 84968088080089CC00800A400010C8821008890A0800080000000000000000000000000000000000 0000FF12F5000000A00082D0000040183C9008034888428000003004002884008102042002002804 30200080200248242A802002002002002002000000000000000000000000000000000000000000FF 904B000001B0000000008808004004422844050000001010000840102204800082001B0000010002 000020100081440200110310204054000002000000000000000000000000000000000000FF675C00 0001A021500600002020000A20402040A400000A0010408840400818400168600118000000220200 028000880410049080120080000000000000000000000000000000000000000000FFF64400008001 10018110041259008098018018008000006C06206000094006086086006006448000406006216102); SDR 8000 TDI (A8006000006336000000000000000000000000000000000000000000FF3989000000800901044000 045801841841813851800000010E0160104C404340624D0560560068000960001160160064000060 00006046000820000000000000000000000000000000000000FFE874000000008801022010021811 038021843801844000008640E18022401609602020602600318000E4100020660060801060001861 0E001000000000000000000000000000000000000000FF7621000001110801000004001883100101 80180180000004060060000041060C60005065061110480060000024860061282260900060160010 00000000000000000000000000000000000000FFAE9100000190008000000400008A080000008048 04400000102000000001282084000880080000201004080881000002280A00800000A00000000000 00000000000000000000000000000000FF8DD7002001800008080000030000020004002040000020 000C0001042000844000900C84000000000000000000080B000C0200000001000000000000000000 00000000000000000000000000FFC507000000880822802018004801001900840800808000040200 421612000304803304050A1920180822002026120020024020100020020000400000000000000000 00000000000000000000FFFA400001804014C4400400401400400401400441000100100100900104 10200250441450140002012054010090010010010010010010000000000000000000000000000000 00000000000000FFE4B7000000D00C80C80C10448C00C20C00C00C00800100101301310340308244 300200300200281140300101300B10B00B0430010030020008000000000000000000000000000000 00000000FF59CD004001801011803000001801801005805801810040000600640400604601410C01 42061062001060004064060460040060000060860000000000000000000000000000000000000000 00FF91E200020002520020500020120120120120000100000000800040048550094A893511080480 0800824000800504804804924800A94004000800000000000000000000000000000000000000FFF1 89000000910800810800000800800800000800800000085280200208212200600224600211200001 2000002052002002002000042802000000000000000000000000000000000000000000FF5F340000 BA2000AA0F02AA0AA0AA0000AA0AA6AA00002A83012A88012106000526000022A82200002802A92A 80102A82A82082A80102A8000000000000000000000000000000000000000000FFA6B40000002040 20050000400002000200000000000000008904080004002000132841000005000088000000100100); SDR 8000 TDI (006004006006000000000000000000000000000000000000000000FF9CDE0000A38CB8010898000A B8810800AB8090AB800000001422623E2062AA1262260062AE0060002AE0003242AE2AE2A62AE000 2AE2AE000000000000000000000000000000000000000000FFE81600000080191100580000180301 4001845001800000000810600600600228608608600629600400600008400600600E006000006006 000004000000000000000000000000000000000000FF474200000984084504000000182902000188 100180000004A00160840B600200E01644E00602600000600000C006006002006000006006000000 000000000000000000000000000000000000FF88E400000080080100000040188D224055A0100180 000000004261140060020A600622600E0968040060000043060060B2006000006006000804000000 000000000000000000000000000000FF7F16000011A0100100180000184101030180120180000000 00104046006002A060029168064460000060000040560064060060000C6006000000000000000000 000000000000000000000000FF63FB0000A28AB0AB0AB8000ABA010800018AB8AB80002A8AA980CA 062AE2AE00E2AA0062A6007004AAE2A82AE0062AE0062AE2A830E2AE001004000000000000000000 000000000000000000FF4B5D000001C2800100000020182548240180100580000009010040440CC0 021060020071060068010060000C4046006082086000016016000800000000000000000000000000 000000000000FFC399000154D5415595440035592D4324B59559318000D515525445045545570C75 5304754E506005556550556556556402556550406556000004000000000000000000000000000000 000000FF0FB60000B38850AB0838000ABC11821081CAB4A980002202062AD28A2042AB00E2AF0D62 262B60002AE2A800400E2AE02C0462A82A6326000000000000000000000000000000000000000000 FF924D000000801400001800001801901001C01403800000000680D84A00400221680629600602E0 0080600000400600612C00600004E006000000000000000000000000000000000000000000FF18A1 0000AA2A32AB0D18002AB9018112F58ABA8980009182562AC2022062AAC66202C06A1E0060002AE2 A84365062AE40449E2A82A6006000000000000000000000000000000000000000000FF4541000001 001001001A00001831A01003A0180180004808360041220A600208600220604640680000600000E2 06006004246000016006000800000000000000000000000000000000000000FF15AF000001810801 03400000188392D809801043800004008600601001400220E1341560860A800000600050414E0064); SDR 8000 TDI (0046400006000000000000000000000000000000000000000000FF8ECE0000010818018620019510 61821089081800888000006420400222608600600E00642660402008600000601002408210000C00 0006000000000000000000000000000000000000000000FF8D6800000100100180180DA418158898 0180980300000000120A400000602C20610652650603600104724000611030620A43552620401605 0000000000000000000000000000000000000000FF5745000011001011801801801883881881A018 01800000800B00412000611402E02608E00402600000600008600100620A00402601500600000000 0000000000000000000000000000000000FFF02E000041001E018218018111040859011018018000 01005000608200780401602611600242600100600008600110400A0D503581400600000000000000 0000000000000000000000000000FF7035000021001801801809B41041803A014A1D818000800000 0062420661143C609E0068860060000070000062008E480202C80C00400600000000000000000000 0000000000000000000000FF8F3C000009001011800011C01800800801C218018000000003000200 00600440610000630600400400780000640800640000200600300600000400000000000000000000 0000000000000000FF2BA6000001003043808001C0100180480100180180010004A2000000006144 00E10A44F00210600000600000600000480400280400200600000000000000000000000000000000 0000000000FF58A9000011051111045801801800828A01C01A018000000008000010006416286004 0860042040040060001360008060D600600600600600000400000000000000000000000000000000 0000FFE49A0000A30810018918018AB0AB8C08AB0AB8AB80000000402A82A02AE0064762261062AE 06C0002AE0002062A82AC3462AE0042AE2AE000000000000000000000000000000000000000000FF 392D000008005843800001801022000801009801800000002608A04202600622E016086006234004 00600022600000400C002004002006000004000000000000000000000000000000000000FFA6C800 00A30B58AB8A20018AB0AB8948AB0AB8AB80000002862AA2B22AE4CE00628E2262AE0960002AE000 2A62A82AC20E2AA0042AA2AE000000000000000000000000000000000000000000FFEE7700014411 191194D80195511015495514595580000005044425025165560064C644E556104004556000016550 554544556004556556000004000000000000000000000000000000000000FFF8EC00001100180180 1801801001800801001801800000000E002002006006086026016000404000006000016000004006); SDR 8000 TDI (00000020400000000000000000000000000000000000000000FFD787000080000040030200000142 01000040000200000001000000110000000084005082400000000000000000000005209200010110 00000000000000000000000000000000000000000000FF1919000000000014004000000008022000 00004000000000080081400000002800280001080000028000008000000000100100000800000000 02000000000000000000000000000000000000FFC41E00002A8AA880880CAA8AA8008808AA8AA088 80000002222A22022AA2AA1261920260022AA0002AA0002AA0002AA0022022AA3222AA0000000000 00000000000000000000000000000000FFCC1A000000011100001001200000101400001281000000 141400504400504408050005110050000100400000500101100500400080D0040000000000000000 00000000000000000000000000FFBC7F00005595589594D155955845911155D55915800000055455 4447556D5600400642C54E556001556001556000556A4D5145574155560000000000000000000000 00000000000000000000FF18230000AA8C48528CA8AAC2884A80282A8AA82880000010222A230A2A A28200204220222200A0002AA0002AA0000820CA2AA12B2A22AA0000000000000000000000000000 00000000000000FF937D000080000040000001000108023400000440000000000400508C00000022 C2400848000000010000000008008001010200000208000000000000000000000000000000000000 00000000FF93870000AA8810008800AA9049808709008AB80500000003002102802AA21847003A12 00120620002AE0002AA0004424022A24022A22AA0000000000000000000000000000000000000000 00FFA5890000010400140240001420540001400000C000000000A800004000000028040008050821 0000000000000000548520004400004000000000000000000000000000000000000000000000FF66 AD00000180A14000800000800009400C00000A00000000001500080000A000810040802008000000 0000000000000008008148010000000000000000000000000000000000000000000000FFA0770000 01011000000001801848810801881812910000003600600400610C40602053640000400004602000 608800600200029600000E020000000000000000000000000000000000000000FFFC1C0000011010 010000058258038C082384980082200004065160040060440465140061464160401063001064202C 620A428006000006008000000000000000000000000000000000000000FFDF000000010098010440 11803800001933821808822000020404C18244600602622200E00604400000608008622000610200); SDR 8000 TDI (006040000000000000000000000000000000000000000000FF352C00000180198041218140180084 33A19000000000000024056000046010046014114104086000106006407002006046004104006006 000000000000000000000000000000000000000000FFCB3700000180184400040101190480104580 00800000200804406400016440A14403446C4500608200604600654208640600480200E006000002 000000000000000000000000000000000000FFC40100000188180000400980180080B00180000000 00008024006010286000104000004014316040006206006002226016006004006006000000000000 000000000000000000000000000000FF409B00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FFD29900000000000000000020000000020000000000000000000000 00000001000000000001000000001000800804800000004800000800000000000000000000000000 000000000000000000FF257F000000800800000420000800A8100180000000000280020230002120 0200300200280200000000200210220E002002002002006002000000000000000000000000000000 000000000000FF04DD000001001000020201000008220000150010000020000000080000020040C9 0021082C00C048014044200840C00040000000000800208000000000000000000000000000000000 000000FFB960000000800800000020800B40880C0080000000000281020024000020030020120024 0200200080300300200A002002003002002002008000000000000000000000000000000000000000 FF621E0000018058804005552038019238A381015400A000048E00620053602E04401620620C5260 0020600700700C2C6006006006006006040000000000000000000000000000000000000000FFBB75 0000010010000200011000480316110A8008000020000040420180D7002080C921882C00C06880C0 24204424200021000000004040000000000000000000000000000000000000000000FF8662000000 802900400152904A008408000101540140000C022024002CA0420070020024022820002020030030 02022002002002002002020000000000000000000000000000000000000000FF568C000000000000 00000020000000000000000000000008000000000010098008494108018400220000000002098000 00000001800000000002000000000000000000000000000000000000FF5917000000000000000200 20016008A0AA00000000000001880400004002800200000004090000000000001004002800008000); SDR 8000 TDI (6146120282000000000000000000000000000000000000FFD5B900000180181000014A8012818058 01840000000002018600600002E0040060CE00480600600000601760600220420404400300602008 0200000000000000000000000000000000000000FF3BAB0000018818800002008152018898158200 20000010081600680008600D00E0462A608E00E01C09600E00600200412410410010688000010C00 0000000000000000000000000000000000FFE31D000001801808040140001011803A318000040020 0004263060010061060852260160260262442065471563520B50040AE10210600004010400000000 0000000000000000000000000000FFA16D00000180980000002000130D82D8018900000000000006 00600130600E027506096A2E00640400602700602200480400E00100601000000400002000000000 0000000000000000000000FFB960000001801800000008801001813A018000000000001801806080 486004402007C0604440410C00602600604600400401588280600000009400002000000000000000 0000000000000000FFAD5800000188180040000A815805801C1596000800001000B001E680006234 A4300326400420448401600601E20600600F20401A30618000000C00000000000000000000000000 0000000000FF0CDA000001889800000042001091C41A0180800800000011420060000064460002C4 116C1500400000600600640600409448400240600E00000000000000000000000000000000000000 0000FF64F2000001921834000400001801801B018000000000000002006080106006203001026104 00400488E026106042226846006000106806000004000000000000000000000000000000000000FF 3E4900010180182800601BC91001023801800080000000040401608000702500A066434228364109 0061968069030048AC21548A487000000000000000000000000000000000000000000000FFD3B000 0001801800040403C812050238018020820000010004506021A260C4113487006451A04210206206 03600A004314484110006026000000200000000000000000000000000000000000FF36970000018A 1800000001001801001B0180400400000100060060000C610780048620D00008428020600710F84B 006406815A06206000000000200000000000000000000000000000000000FF760300000188184400 0401009B030318038000000000410006406010017A464D30160C7088004120106406006282546426 006004016006000000000000000000000000000000000000000000FF8FCA000101801804248009A1 1004C01001880080000000040453E2406A7008507206A0E32420E00011647624612244400D104082); SDR 8000 TDI (16000000000000000000000000000000000000000000FF8B4F000001800001801800201001801200 80180000000008028060060040060060040060000060000060000000060040060060040068060000 00000000000000000000000000000000000000FF447A000001800001801800001001801881801800 0000510801006446006006047104046D164260000061008060048030060068070068060000000000 00000000000000000000000000000000FFC0EC000001800001801920201001801A01801800084000 008800600780600E00600480620640602800600000220D4060060060040060060000000000000000 00000000000000000000000000FF50B2000401C00001801E02001201801801001854000000000200 60065348270068068060060960000060018060041430060060070060061400000000000000000000 00000000000000000000FF63EE000001800001801800001001801C01081800020000020328600E00 C20600680E886C2604602808E2082024AC20600E226A0C2060060000000000000000000000000000 00000000000000FF27F6000001000001201D25001001801881801854104000008C00600655404E00 700000600651602E00600000680E5460060060060060060A00060000000000000000000000000000 00000000FFD7320000010000012018010294018819A1901800080002009C50600600400E28600000 640600E0000060010040060060060060060060060000000000000000000000000000000000000000 00FF437E000001000001001801829001881C218018000A002A8C85006206006C0620608A9060CF20 E02611600800094640600602640C406006000006000000000000000000000000000000000000FF55 FF000001000001001801801001801801801800000000000400605601601614600202600600600C00 650040000E006016406004006006000004000000000000000000000000000000000000FF07960000 01000001001800801001801801801800000000000600600600600600600000600600600400600000 0006006006006004006006000004000000000000000000000000000000000000FF8A730000010000 01001800801201801801801800000000000600600600600600600000680600600400600000000600 6006006005006006000004000000000000000000000000000000000000FF116E000001080001041C 15801081801A218018200000040C2620600600601600611249614600621400640009209620E04680 6004007006000014000000000000000000000000000000000000FF9CB00000010001014018018000 1188981180180400200000061070060B608609720304681604E0423060C10222260C620611608410); SDR 8000 TDI (000800000000000000000000000000000000000000FFE01800000040040040000040000040040040 00000001001000800800000900000301001000001000000001000A01001001000000001400001000 000000000000000000000000000000000000FF14100000AA0AA0000000000000880880AA00000000 000002002A80002A82600003000102302200022A82A82A82A88100000008082A8018000000000000 000000000000000000000000000000FFF5D4000000800200C00950B00A04A00A00A0080000008008 D200200200208A80B02302288280300080200100200220340A90A043002C02001002000000000000 000000000000000000000000FF6F2300020020000000000323522122540000100000000008040040 040048004C090CA91008914900004000804800950924A24C80004924000900000000000000000000 000000000000000000FF99C700000180004190182B00B82180190188380000000002840260060060 0601644C00E256006400006800506146016086106106006006000000000000000000000000000000 000000000000FF1243000400840400C04E80D40810C48C20800800000000100A802143A2350BD221 0344310242300084A00001320B28225222B04BA42302001400000000000000000000000000000000 000000FF6EE100020024000002245020322128020002500000000088A40880002008114408948208 11000800049001008010800940E00A102C0984000800000000000000000000000000000000000000 FFD7F00000A080808880C801840410801080C0080000000000028028020005822032000420030062 00806001400002002803002002007002000400000000000000000000000000000000000000FF9C8E 00000000004008000612C00A0001021000000000000004A601208002080A8100000088468400AB00 00121020128000110080C00008000000000000000000000000000000000000000000FFC41A000000 0000000001A80900000100400080000000080210800A00040000010040410040280000800000A905 48000CB8840168020020000000000000000000000000000000000000000000FF3FBD000001880001 901800001AC1843008883800000000050000604640402610642620E5208060000060A00062064920 0600E006006E06000000000000000000000000000000000000000000FFCCDF000201880201B4DA14 223811A01204B0B80000000814A000E2072048A6906A26A26888296800006080324A0E8A005620E9 170C64A6000800000000000000000000000000000000000000FFC3F7000321A10091801B40091145 88511084180000000110022C6046004416A561040160410462002B60200140260140860062262060); SDR 8000 TDI (0002000040000000000000000000000000000000FF25560000000000019018500018218040008018 00000000610420600E21000601610E00644C02600000408000601620610640600601600600000000 0000000000000000000000000000000000FFF7DA0000000000000000500280400021100200000000 01610000000802000000851041012804000000008001000001000002000010020800000000000000 0000000000000000000000000000FF9C920000000000200020040000040000000000001000006020 4200300000204800100A031002400000008010000000800800008008001400000000000000000000 0000000000000000000000FF07F7000000000011D001A80210008000008008000000022002102282 29900940000524002220200011244000205614618220210220200210000000004000000000000000 0000000000000000FF8EE30004004004000004104004004015E040000000010012010010110202C4 00509040D0010090A10012211010A100110100100140500000100000000000000000000000000000 0000000000FFAAD0000400400440804C02400C02C00C00C008000001003043023003040012103002 10300304B0C10034C10030C301301300310300300200100000000000000000000000000000000000 0000FFC50C00000000000180114002180180180180180008000462062065462902844041040544CE 20600000600000600600600640600610600E000000000000000000000000000000000000000000FF 08380000002002014002042012002012000000000000801010004804000008800A0D000808000C02 000000804C2D004804800B0C005110000800000000000000000000000000000000000000FFFD5D00 0000000000801800000842800800A0080000000020820020020000860860C2006082802000002000 002082002002002042002442000000000000000000000000000000000000000000FF04EC0000AA0A A0000008A80AA4880AA0AA0000000000000320AA90002A8A3223B0102AA2302A8000AA82A82A9110 2A82A82A9040AA8000000200000000000000000000000000000000000000FFA3C200000000000000 00020800040000000000000000000008800800000000020200000000080082000000001000040010 040208000300000082000000000000000000000000000000000000FF90FF0000AA0AA0000004AA0A A0AC0AA0AA0000000000000228AA80002A92212A00202A83212A8400AA82A82A80202A82A82A8288 AA80C8000400000000000000000000000000000000000000FF35890001541542002000B024A35033 23542000000000800CC0550000551509508830D20D40C48800D50550D50551300CC0A89140D50820); SDR 8000 TDI (04000000000000000000000000000000000000FF403C00000000000188380000304D04480880B000 00000061040060060000060061104461064160002960000060060060061460060060460000000000 00000000000000000000000000000000FF6AC3000000000001935850249001000802801000000000 40140060060000372060102A6016006A04006000416006056006006006806006000A040000000000 00000000000000000000000000FFCC9D000000000201801804103201000840001000000000600600 600600080612E80280E0868040008060000C68064860060060060060060000000000000000000000 00000000000000000000FFCF680004AA0000ABA01A800010ABAAAA882AB80000000062A62AE2AE2A 86860062A30072262AF0062AC0000062AE8062AE2AC2AE2AEAAE0010060000000000000000000000 00000000000000FFF953000000000001A05C00409001444C40C01000000000608E00600600020E88 610800601400680000600020608700600600608E0070060008000000000000000000000000000000 00000000FFD0B0000154200155845D54481355D54950D558000000006D4E556556551016006D5000 E4CCD56204D56000016D570465565565565575560002040000000000000000000000000000000000 00FF526E0000AC0002AD8C988A0832AB0898888AB00000000062242AE2AE2208C600EA06906226AA E080AAE000096A2E4262AE2AE2472AE2AE000100000000000000000000000000000000000000FF5A 81000000000001889A00053001201804A0100000010068040060060008A74CE0064C680600600000 70002C6006A8E006006007006806000000000000000000000000000000000000000000FF86BE0000 A82000AB8038C00C12AB8A88848AB80000000062042AE2AE31000E666A44476326AAE000AAC00004 6A2631E2AE2AE0262AE2AE000000000000000000000000000000000000000000FFA3EE0004000000 01801804249001800802801800000080608C00600604032688610508600600690000680020601610 600600648E806006000800000000000000000000000000000000000000FFCB910000020000019498 50005001004051801000000000602400600611000600E04C40E09600600000600015610602600600 6006006004000100000000000000000000000000000000000000FF581A000000000001C019000510 01808001801928000000600409600608100700604524610420E00200E2200060260A601604600600 6414080002000000000000000000000000000000000000FF2F0E0000000000118018000018018081 708478AE000001600420E0062C000640642601620638E00210600001600621600E20610610E00400); SDR 8000 TDI (000400000000000000000000000000000000FF7D1C00000000180180980200520190180000180000 000008000168260000A604645414600200600004E020404106086054406006006006000000000000 000000000000000000000000000000FF2AED000000001801811820091403881800001800000000E0 0B94E0042101464464560C61021460000264C01042824460AC206406407006000000000000000000 000000000000000000000000FF920600040040180180190C009001803A0000180200000060430A60 04A080063061060062020A6000817201085002326004806206A06006060000000000000000000000 000000000000000000FFC6DB000000001001001808003001803A0040180200000070040070440000 0600600001640F00E00500680040200C007007006007006006000004000000000000000000000000 000000000000FF5ED000000000100100380013100185384400180000000060040060040000060060 00406006006000006000003006006004806007006006000000000000000000000000000000000000 000000FFEA38000200401001011801003001801808001800000000600480600700015615600A1260 02006004806001006004006004004006006006000004000000000000000000000000000000000000 FFED930000000010AB1A18010010AB8C18D00AB80000002AE2AC2AE2AE0002062462A200E2AA2AE0 042AE0002AE2AC2AE2AC2AE2AE2AE2AE000004000000000000000000000000000000000000FF595F 0000000010010C980182100580182A00380000000060060060060000060260000060220560060060 00002000006006226006006006000006000000000000000000000000000000000000FF2CA6000000 0010AB0438018890AB88D8820AB80000002AE2AE2AE2AE00008E08E2A82062AA2AE0042AE0002AA2 AE2AE2AE2AE2AE2AE2AE000004000000000000000000000000000000000000FF5EE7000000001155 00580190D14991390015180000005564565565560003361164CA48E50A5060045260005565505565 5411655655624E000004000000000000000000000000000000000000FF1FD0000000001001011801 84200180100080180000000060060060060004462060021360020060000060000060000060040060 06006006000000000000000000000000000000000000000000FFA2750000000000AB829800088001 0C88A280100000002AE3242AE2AE00020660620204E0260060000140002AE2AE2AE2AE0062AE2AE3 06000000000000000000000000000000000000000000FF960C000000000001801800041101000800 941000000000401400600600015615602210640E1260040460000060060060064160060061160000); SDR 8000 TDI (0000000000000000000000000000000000FF8CB98000000AA8AA881880820CAA8AACAA8AA0000000 28A2AA2AA2AA0002066062A204E0822AA0002AA0012024022AB2AA2AB2AA2AA2AA00000000000000 0000000000000000000000000000FF70E8000000000400010005001001000100001000000000400D 0050C400044020000413000080410000400101502500514040080500480400010000000000000000 0000000000000000000000FFC54000000015595580512D033955D55955D558000000555545556556 00033411455448D4D7556201556000454145556D56556557D5755600020000000000000000000000 0000000000000000FF617B0000000AA8AA8428A88B28AA8308008AA80000002AA2422AA20200008A 08A2A22022AAAAA0002AA0012A20832AA2120AA2AA2AB2AA00000000000000000000000000000000 0000000000FF587E0000000004000C8000081000000000000000000000400D001000000004024000 00400000400000000008101400400000080000400000000000000000000000000000000000000000 0000FFA67E0000000A88A89000890800AB9048568AB80000002883022AA2180002002402140082AA 2AA0002AE0002A24122AA0020022AA2AA2AE000000000000000000000000000000000000000000FF 717C000000004004010004010000113001000000000002604C000000000150150028100004000002 000000014420000004450000000000000082000000000000000000000000000000000000FF9E9200 00000000000A20400240000401480000000000006080000120000000000080440000000100000000 0000880002A8100000000000000000000000000000000000000000000000000000FF996500000000 180180185380180184189000180000000000005060040000C608E5564062060A6020006000000000 00602608600600600E000000000200000000000000000000000000000000FFA27D00000000194180 180188B82181180001180400000000000165042080064060061561420060000060400C009612E084 046026006046088000000000000000000000000000000000000000FF45600000000018A180192884 1021901800005840000000601A00620400000600628C02E0164160000060000A008008601C086416 406006000000000000000000000000000000000000000000FF9E6500000000180180194290100580 1808001820000001605220600420802630610409613A036000006100000410006104006206006006 000000000000000000000000000000000000000000FF9FB600000000180180190013500194988040 B802000000000008E08600008611602440648348E02100602000400A02E94702604F207036110000); SDR 8000 TDI (00000000000000000000000000000000FF2562000001801805941804001800804801801801000000 000600600000000404008000600400600010400000400E0060802060800020000000000000000000 00000000000000000000000000FF6EFD000000000000000000000000000000000000000000600000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF9876000000000000000000000000400000000000000000600000000000 00000000010050000000000000048008008000040000040000000000000000000000000000000000 00000000000000FF03D5000000800800801800000800800881801A01800028C00300600000000080 80020020020020008020020020020020430020020000000000000000000000000000000000000000 00000000FFCC8E00000000100040040000100C22040010C288000004020C00002000000000023080 000000400200800082080032C2900000100204000000020000000000000000000000000000000000 00FFC5D9000000800800C00800000940906801800840800028A20200203800000200898201200200 2000002002022003002002002002002000000000000000000000000000000000000000000000FF08 79000001801901801800009881949B01803801022000520EA8E0000282260A828F00E82E00620100 6004006006006004807004006000000280000000000000000000000000000000000000FF5F060440 0000100000100000102A0200010CB189000002400C004000400004800A68401000004110D1800400 00002AC22C01400D024200000050000000000000000000000000000000000000FFC02C0440008009 00800800000880B40900800900844000201351000040044200000301200A00200000B00200280200 2002002002002000000000000000000000000000000000000000000000FF90000000000000006000 00000000200000042000000000000080000000800080005000002000028800080000080000000000 00000000000002A8000000000000000000000000000000000000FF2A570000000000000004000081 001081000000400000000A000000000200010A828021080000000128000000000000010000880080 0000000000000000000000000000000000000000000000FFE18C00000000000002A0080000004002 0000000000000200000000000000000000004002208004008000010A010880000000080000100000 0000000000000000000000000000000000000000FFD6FE0000000000000000221122000000002000 00000000080080000000015015000812081000000000000001024000080000000100000000020000); SDR 8000 TDI (000000000000000000000000000000FFB36B00000500190905180800380180100580180100004064 2E007000308246020146044096A0611400221240244400E092016002004200000004000000000000 000000000000000000000000FF4D9D0000010018010A1810001C0180B00180180100010061060070 00010007440807005006006004002002003004086002206012404000000004000000000000000000 000000000000000000FF1D4300000100180114181000180102380380380000008060061060818100 06000816004006886005806006806910086006007C16004000000004000000000000000000000000 000000000000FF4D23000001201801201800103981121851A43804000000600688608000004F0180 6620C00400600400680680608A006826406306804000000004000000000000000000000000000000 000000FFEB8800000100180100180000380101180180180000008061060060000000144400074150 06006005006002086000006042026802204000000004000000000000000000000000000000000000 FF9C2E000001001801001844001A01001B018038840200006517A060000000040204060054460060 04006002006002006082806082007800000004000000000000000000000000000000000000FF709C 000001801901C11D82001C01811C61863801020000600622660000008400000500420634618000A5 0500314405620500607410E040000600000000000000000000000000000000000000FFE140000001 801801C05800101845803805881801000044602604600000012400888C10D11640E0002120040222 0C00644402E404836008000000000000000000000000000000000000000000FF434D000001801801 A05C200818458118818819010000440A8E0060000000068494860040140A60000061050072AE0368 0404780C806048000000000000000000000000000000000000000000FF179C000001801805815800 141C018058218018010000800007006000088006041316C840D600E1000060040260160161044261 04806000020100000000000000000000000000000000000000FFAAB40000018019A1C11820001CA2 E2480F801805000000604700680080086420003613E146096001482400A428000061400167001440 80000000000000000000000000000000000000000000FF22500000018018018B5802001804800815 8018010000007006006000000004000C468049561060000020004020020060000074000040000000 00000000000000000000000000000000000000FF9FFD000001801941801840141920820841801801 800000000600700089084540000C55600600E0800060010468060170000460008041000200800000); SDR 8000 TDI (0000000000000000000000000000FF3A64000000000001801001800001C018018000000000000044 00604401000100E8820064060062A000600600400600400600680600500400020000000000000000 0000000000000000000000FFBE19000000000023801801800201A018018000000001086106006004 00010800680511700600001000600681600600640600600600600400000000000000000000000000 0000000000000000FF8157000000000001A01801800001901C0D800008008000E04700E084000801 05660C4AE4062264E000E0065840AE02402600680648400400040000000000000000000000000000 0000000000FF6E86000000000245A00001800001801009A0000000011063070060CC81011000608A 91600600609400600601680600640600600600600200000400000000000000000000000000000000 0000FF7989000000000001A00009818009801001808100000002680600600402800001680304622E 800004806006006006006006006006006002000004000000000000000000000000000000000000FF D65100000001040181080B800291A01401A102300000016286006005220020A0609220E22E4460C4 0160069052B6044046006006904006000004000000000000000000000000000000000000FF81F400 0000000001880801800001801009800000008002600614E084008010046402106006004004006006 004006004006006006004006000004000000000000000000000000000000000000FF7F5600000000 00010000018000018010018000000000006006006004000000006006006006006004006006004006 004006006006004002000004000000000000000000000000000000000000FF380E00000000000180 00018002018010018000000000006006006004000800006806006806802004006006004006004006 007006804002000004000000000000000000000000000000000000FFE07800000000020140280190 8001A01001802000000001600600600520024081610700604634600640600E20422600400E006416 004006000006000000000000000000000000000000000000FF799E000000000111810851804001A0 104380810A00010072160460001088000060560064160004CD10720611408E05410610E106014206 000004000000000000000000000000000000000000FF219F000005001C0104180000180180102180 1883000140E04600600000000684800E84412500600008300608208C006006007086806000000000 000000000000000000000000000000000000FF857C000001401801603820189E01901055C4B80D00 00006807026000800046000816805A061A6224A0300610A0040270060C630E80E000000004000000); SDR 8000 TDI (00000000000000000000000000FF7C49000204000200800A00A00200800A00800240000080280200 200200091080281280252A80280010A80240220A00280A8028028120020008000000000000000000 00000000000000000000FFE69000020020020200100020024322100120020C000082480480400400 0040000884890801000800A048048C89448008040048044800040008000000000000000000000000 00000000000000FFF63D00010000000182D0018041018018018000A0000008C00400650600000809 61344064062060000160C600601608610E0360864460840000000000000000000000000000000000 00000000FFE39C000000000450B00C22800050D48A518000000001003482003022208C0120340300 B08B15320828340320A4A30024229024239134020012080000000000000000000000000000000000 00FF63870002002002020E10002002102000212082000000B0C50100000020100001082C898A0080 0800880800820D20008B09100921140100000800000000000000000000000000000000000000FF8B B0000000008010C00000800009881200800008000000000F00622C40000000240200200202208200 200240280200280280280220A002000002000000000000000000000000000000000000FFE7780000 08000001C080A20040821002000000A200000070200200000104107003100200007D000000074800 00088200100404C00A0404000000000000000000000000000000000000000000FFFBA00001000800 01B1204C08262001220000004000000962002881000802880088804005380084311000A0280A4030 0C80888A004100A0000410000000000000000000000000000000000000FF01B30000800000C18058 01808141849051800100000000008200644600000002004200608600000063600601E09600606601 600E006200000000000000000000000000000000000000000000FF50C50000100002018052B19020 21A910218080C80000800D3680EA04400300A3034A90694680E900C8702EB4E056C0620E00652682 6800000800000000000000000000000000000000000000FFB95000010009010595100381010DA038 018004040001D170062A605408000880000602E20F54402104648600628603614610E00F50E2A000 0000000000000000000000000000000000000000FF79100000000000018018018006018018018000 00000000600600600580000000080600600600600080600600400600400600600600400000000000 0000000000000000000000000000000000FFB3DE000000010001D1100580010188180B8001400000 00070414608C40105047630B60700600200080600628640600600600600620680400000000000000); SDR 8000 TDI (000000000000000000000000FF77A600000001002990000000000200000000000200005162000900 000084800004800804204000800C0088280010010408020000000000020000000000000000000000 000000000000000000FF975500000180018080B42212080180000086200480000040820060502300 080400230010000120000584020020C2100022002302002410000000000000000000000000000000 000000000000FF07C100040040040042004441840040040040040100014210010010010C14312050 0802C0CD000001001001005001081001001409001000000000000000000000000000000000000000 000000FF10D2000400C00400C88800C00C02C00400C00402800102330308300111110340304A0821 0320280112308340310B11100B003003003000040800000000000000000000000000000000000000 FF3364000001810151845001041801800001844001800008C00600E00040004600650604C20C0061 0201600E10600600024604600E006000000002000000000000000000000000000000000000FF1D37 0000012002004012002004012002002000210000844800004800800804804800800000800C010048 94904824000840000810810000000800000000000000000000000000000000000000FF9515000000 800000800801800844844000800004800000200280000000000200254A0060060020000C20220421 12800082002142542800000000000000000000000000000000000000000000FFB2FE0000AA0AA0AA 0AA0008AA08C0880AA0AA0C800002892A82A80000002A90000102AAAAA2A80002082403082002A82 08AA8200000000000200000000000000000000000000000000000000FF18B5000000000004000000 00040002200000048000000000010000000000010000401000280000002290000092800000000000 10028000000000000000000000000000000000000000000000FF2F3F0000AA0AA0AA0AA4000AA0A8 08A0AA0AA08A00002A82A8AA80000012A80000412A82A82A82003502882102282A82212A82C80290 00000000000000000000000000000000000000000000FF2DED000354154350554400354114110354 1540540000D30D50550000001550000D11230A80D50801080540940048550D40D50D40D000000008 00000000000000000000000000000000000000FF1B10000000400400600000400400440400400000 00010000000010010000000015000018010010018010018419010010880010015000000014000000 00000000000000000000000000000000FFB0B50000A80AA0A80AA0000AA0C808A0AA0AA080000028 82A8AA80000002000002202200002A80000202B84000002A82B02A82A80200000000000000000000); SDR 8000 TDI (0000000000000000000000FF3DEE000001800001801011801801A000012000018000806044006200 00000680000E80600600600400000600600680000400400400400000000400000000000000000000 0000000000000000FFE1FD0000018000ABAA91838018AB8AA0AB000201800028E20C2AE800000006 22027610604678D0042AC2AE2AE2AE2A82AE2AC2AC2AC30000100400000000000000000000000000 0000000000FF3786000201800201C440038018018004010000018001007086007080000004014082 0068060C680000000602600700000400600605600000080000000000000000000000000000000000 0000FFD5A1000001A00155D54053A01D559545550000018001557146556020000004D4C50722F50E 02E004556557556557550556556556556450000004000000000000000000000000000000000000FF CFE70000018000AB8084818014ABAAC0ABA0040180002AE24D2AE021000004B2620514610E40E000 2AA2AE0862AE2A02AC2AC2A81042A8000000000000000000000000000000000000000000FF693300 0001800001A000018010018000018006018000006216006308000004007000006007806002002006 006006000004006002006000000002000000000000000000000000000000000000FF9098000001A0 00AB982059A010AB8800AB0000018000A882042AE418000004AA427E4164460840002AE2AE4162AE 0102AE2AC2A84242A0000000000000000000000000000000000000000000FFE22200000180000183 002380120181020100000180000408C6006080000004004806A86886406800006006C2E006908006 006002006010000800000000000000000000000000000000000000FF96A100000180000180090180 1001824001800001800000601400644000000600E08604E256036000000006106006240004004000 50C000000000000000000000000000000000000000000000FF0CFA000001800001840C1180105182 2001880005800002E04600600800008605600748748640E05002C00600601608000600E002006108 400000000000000000000000000000000000000000FF65BE00000180010182190180902981204108 801183000280260061000D000410441406604600600040400614600E008006186066016400000000 000000000000000000000000000000000000FFBD390000018000018018218A900188000104802182 0000000602604010000400402000E016025000006406006126030126006106046000001000000000 000000000000000000000000000000FF654900000000000180014804000014802000005001000060 000401000400800882482902D0240050200000140080040120008000030080200000000000000000); SDR 8000 TDI (00000000000000000000FFB712000000281801C03805A01801821401A09800000038682700614244 600440264F006007086410507004002007007004C0ED940040060000000000000000000000000000 00000000000000FFB385000000081000251801801881821C01001800000004600700600200214400 20968165460060050260060210068060260070022070060000040000000000000000000000000000 00000000FF7A57000000001001841821A01801801C01001800000002600700600200600408A02620 E20600600010E0060020060060070070420040060002000000000000000000000000000000000000 00FFBCF000000020100000388D801801801801201800000000680600600200200604648E10611700 6000447004000004007004006096006006000004000000000000000000000000000000000000FF7F 820000AA0010AB8998018AB8AB8018AB0018AA000028E2AE2AE0020062AE3561060260662AE60444 62AC2AA2AE0062AC2AE2062AC006000404000000000000000000000000000000000000FF02CC0000 00001000001801801801801825801800000000621600600200200E00612604602600600024600400 00060062041262AA044006000004000000000000000000000000000000000000FFD8440000AA0010 AB8838238AB8AB8018AB8018AA00002AE2AE2AE0020022AE2060362C628E2AE00400E2AC2AA2AE00 62AC2AE2222AC006000004000000000000000000000000000000000000FF82160001540011541558 CD93395580191180195400005561265560000024A652641650E5164C608408E55455055600613441 600610C006000104000000000000000000000000000000000000FF3BED0000000010018419118018 01801801801800000000600600600000600600640601600600600008600400200600600400609600 4006000000000000000000000000000000000000000000FF56240000AB8000AB8898018A90AB8000 818000AB800028E00C2AE00000020E2362020260260140000022AE2AE2AE00000402402C40400000 0000000000000000000000000000000000000000FFA79800000180000180588D8010018000218000 01800002654400600000000600601610611600600401200600600600005441440434400000010400 0000000000000000000000000000000000FF771A0000018000018418218030018000138000018000 00600400600000014608E12620E20654E10434000600600600048410408400C00000000400000000 0000000000000000000000000000FF310F000401800401805A218012018002018000018000046904 8060C880000608E10633733602680400000600600600000400400400415000080400000000000000); SDR 8000 TDI (000000000000000000FF23190002001559551558CD155F55911955D55A0000005545565565561545 5650D55650C514416401556D5650E557557556556504557556000400000000000000000000000000 000000000000FFB5C40000000AA8A28AA8228AA8AA8AA8848AA80000002AA2AA2AA30A00222222A0 822C228A2320A02AA0820020CA2AA0B22AA2AA2822AA000000000000000000000000000000000000 000000FF703700000000000000100000000102400000000000000040010000002000000000000440 240A0010000001001000000000000030000000000000000000000000000000000000000000000000 FF44660000000A88338AA8000888AA8888D28AB80000002882AE2AE2625462102264520200601020 002AA0721520022AE0022AA2A20222AA000000000000000000000000000000000000000000FFDAE3 00000000000180008C000000004048000000000002600000000001000800044C1001100101000004 00080010000504000004408000000080000000000000000000000000000000000000FF1F2C000000 00211180002002200004000000000000000060000000883401201081002082002A00400001084282 A0000030000010100000000000000000000000000000000000000000000000FF1CBF000000001801 801801811001890801049880004000000600600240400401010C00642E2200000064160144964060 2610E00024610E000000000000000000000000000000000000000000FFF61A000000001800141889 901001820801005840000040000650600208652C0404061461060020000860060020460060060261 00106006080000400000000000000000000000000000000000FFE64A0000000018000A1849841005 8008058018A400003060060060060040A602C08608600611E1000060660040A60060060060002860 86000000000000000000000000000000000000000000FFDF4D0000000018018118A18010018A8801 823800002004610600600601620E00430602604601400010620400A00E2060440864900040060000 00000000000000000000000000000000000000FF6F580000000018018018018C9805801203011804 000010000650600250400400200E00652E32608088600E0044060060460560040460160800002000 00000000000000000000000000000000FFFADB000000001800021803801901801001001800080000 000680614A2240AC322026496296006208246044326A260070042068044068060000000000000000 00000000000000000000000000FF1D0C000000001800005801801E0180100181180010004060C600 600A00E0140A200630601610E0000078264822260070078160040040060000000000000000000000); SDR 8000 TDI (0000000000000000FF9EFD0000000002018000000004000014000000000001006000004000000000 00000000000000080080000400480400000000000000000000000000000000000000000000000000 0000000000FFB6A60000000008008000000008000008008018000000204002002006002000000000 00200289000000200288200200200A00200200200600000000000000000000000000000000000000 0000FF79B900000000004400000114813400020040A01000200C050002122800450000800D528000 200020020000200880000020520000000000000000000000000000000000000000000000000000FF DC4900000000082280080080080280095684080400210120420032020022820020020828030C1001 00200208200200200A002002002002000000000000000000000000000000000000000000FF153900 0000001801801809801801811881A01822000000400610700700601612600F48600600000002E004 08600400E006006006006006000000000000000000000000000000000000000000FFB9C200001040 00000010010B80A900000002B01A00000AC28400002C00500500D048A68010000000025004200084 0040202A4000000004000000000000000000000000000000000000000000FF429F00001000080080 0800800800810A00800800000000200208200000100A842006502802000000002002003002002002 003003002002000000000000000000000000000000000000000000FFF3EB00000000000000000800 80000002800000000000000000000000000000100028020000000000000000080800001800000800 800000000000000000000000000000000000000000000000FFD34F00000020040000000000040000 015000002A0000400040040800800000000801000008450040028801000000008000000000000000 000000000000000000000000000000000000000000FFCA2400000000000840002000000000000000 00000000020000000110088000001000208200010200000000250000000000000008001000000200 000000000000000000000000000000000000FFA94800000000010000008C00020004400040000000 000000000000402400001080001001100C0008800000100000800801000140000000000000000000 000000000000000000000000000000FF027B8000000AA822CAA8018AA8AA8888AA8AA800000028BA ABAA82020022AA2622AA0260262020002AA2AA0422AA2AA2AB2ABA022AA2AA000000000000000000 000000000000000000000000FFF10C00040000000100111000040100000000140000000040050040 00014104104000010000000000005401201400004400004004028004000100000000000000000000); SDR 8000 TDI (00000000000000FF4CD2000000001601801801201901801811801800000100600680400600600604 6145C46203040C0100600600480600E8128060838040060000040000200000000000000000000000 00000000FF5C6F000040001000001C41001803801A21801800000106608600620620605600601511 418408020000602611438606610A0060000060060000040000000000000000000000000000000000 00FF47AF000000001511A01801001825C05841A01C00000080608600440642600420580400605210 000010E042004402806002086042004006000000000000000000000000000000000000000000FF81 EB00000000100000190100180180184184B8400000406007C0600620608400404444600200000C00 608A006202006890226002106006000004000000000000000000000000000000000000FF863D0000 0400180184100180146180001D809C0C0000006846204F0624648400461521484E3C8000006C0400 5044016803007002004006000000000000000000000000000000000000000000FF43330000000018 80001001811001840001801C0800C008640608501600E04400410408711641000004F0240B400C04 60000864A2014026000000000000000000000000000000000000000000FFB22B0000040019000011 01809001020825E2182000A00812260860960260040040C59248840400100464140CD04D01680708 7006086026000000000000000000000000000000000000000000FF47D6000000021809A411018212 2500084184580000008800A6006006406004104D042460040104000070044060A400608400610604 6006000000000000000000000000000000000000000000FFE3B70000000018018410018010010002 00805C0400004060060240060B644600E03601204200000081614002C400066312446D4221408600 0000000000000000000000000000000000000000FF9F2F000000001A00001101841001000000C458 0000000061060062060062060064060C402600000100600009400000740400600640600600008000 0000000000000000000000000000000000FFC6CB000000001800041001001041200C200018000000 08002604640614640408508680682200040000700054414004610200688204610600010000000000 0000000000000000000000000000FF2FAE0000000418118010010010030008008018000000000006 00600620600400C02648000000800000600000600000600400600600600600000000000000000000 0000000000000000000000FF777D0000000000018000000000000000000000000000006000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000000000FFFC4F00000180000180180180180180184582D801000000E0AC0864070000040012 0780600600416000600800022400582204500E004006000000000000000000000000000000000000 000000FF2C58000001000000011801001801821801001801000100E0460060260400040000270060 06804204026000082802806000003006002006000004000000000000000000000000000000000000 FFF3C2000001000011801801001801881B5D051801000008600690700600000C00082600620E0240 00006080002002004003002006002806000000000000000000000000000000000000000000FF2CF5 0000010000000410010298A18A980100180300000163540062A70800260001060A620E8440000862 91006C268A484208600E806006000004000000000000000000000000000000000000FF108A000001 00000180100100180180180100180100004860040060064400160002260060060040400060000060 06004002006006006006000004000000000000000000000000000000000000FFDA72000001000000 00180100100100180100180100000060040060060000060000060060060040000060000020020060 00002006002006000004000000000000000000000000000000000000FFDCA3000001000001801801 401801001C0100180100000070048068060000060010060068060040020060000030020060020030 06002006000806000000000000000000000000000000000000FFC2E8000001000080001801111021 A018A9001801000040600410620608000608004684600604408C0060800024262040082961460062 06000004000000000000000000000000000000000000FFC0FF000001000001801C01201801A21801 401842000100630482E926000146000006106C5628C22000604810A11610410200680721600E0008 00000000000000000000000000000000000000FF6AD2000000001081801001001001A20081901900 00002570C6004006006406C0613601400000000001680680500608600200E0223040060000000000 00000000000000000000000000000000FF955F000440401000001041089141800201E01802000000 60060050860460960879964BE00402000C10E02611408600610010600280C0060000060000000000 00000000000000000000000000FF5ABE000000001001801001001441200451881EC000010564260A C247907446406016006453288D2100690A10E45220691250610208420E0000040000000000000000 00000000000000000000FFA58B000400401110001001201401004009C01800000000600700500600 682722704614622A0400000160028070020160010060A20040060000040000200000000000000000); SDR 8000 TDI (0000000000FF1246000101840085801941811841805811805809800008C006086286008006200446 09600E02C40010600044450C8160060940164CC08600000000000000000000000000000000000000 0000FFC7D7000400880450C80C00C00D00C40D24A40D248001003892223812800002941113442103 0830C92024510130032A344B803283002402001080000000000000000000000000000000000000FF 290E0000002002002002802102002412040090380000B0C10088D289009080000050A0089C080800 A00810C88A00540801108E00F40880000900000000000000000000000000000000000000FF016B00 0088800010980040800800002801000801000000000322200600102000030204A00200642008A008 006002002022022002003006000000000000000000000000000000000000000000FF8C0C00000000 01838001280019A000809242000400000070805405200100016C1020500000024350500640264005 2BC0800840000A4420000000000000000000000000000000000000000000FF1A0100000000000180 800008184000006060408000000960200000000000000080000113201000000200800105B8000458 200010010300000020000000000000000000000000000000000000FFBE490001019E006580100180 18010A590904194180000000160060160000041204060A6006054000004000000000006204010186 000806000000000000000000000000000000000000000000FF2C9D0002098202A42012B1A01A2122 3A8B049A1100008008C6AA742E010844228A46A2E80E822820824409220B00884902A41206800006 000820000000000000000000000000000000000000FF898F000101900000089001881901091C2180 18A1000051600701608600008408000608632610440028C900088828434254910886341346000000 000000000000000000000000000000000000FF203D00000180000180100180180100180180180100 01806004006806000004001806006006004002004000000000004002000007800006000002000000 000000000000000000000000000000FF89D700000180001184100185194105196780380500004004 068075465400460001071460060042A0126400000004146004104006004006000000000000000000 000000000000000000000000FF0E59000001800000001001801801021A01E0180100000080050062 06020006000006006006004000006000080004004806025006004006000000000000000000000000 000000000000000000FF5219000001800000009801801801801C0180180100008060460068260000 04000026006006004000007000801004004001804006804006000000000000000000000000000000); SDR 8000 TDI (00000000FFD2B3000401400400490401401400440400410400000100100100100500108103040400 50010010010010010410E10010010010090010000010000000000000000000000000000000000000 00FFFA41000400C00C00C00C00C14C04C00C00C01C0080014030830030231114810020020A348B44 300300308300310B00301300320B003002001002000000000000000000000000000000000000FF3B 9F000001881801901801801081805801801001800004400648600E04000004614400400600600000 6046406004116004006004406006000000000000000000000000000000000000000000FFC6CA0000 012012000012012012012242002012010000844800800804000000804000110A8000080A80094080 0814800C94804054804000000C02000000000000000000000000000000000000FFD8650000008009 10800800800800800844800800800000200200200000000000200644602A0025000020120020C200 2042002082002002000000000000000000000000000000000000000000FF52380000000AA0220AA0 AA0AA0AA0880884AA00000002882A92A92A82A82A92A8AAA8030108000112A82002A83002A84002A 8A002A82A8000000000000000000000000000000000000000000FF71300000000000800200120020 4800010000000000000000000C80000000010400000000000000200000000A00000004C000010004 8000001080000000000000000000000000000000000000FF8A230000000AA0AA0AA0AA0AA0AA0880 8A0AA00000002A82A82A82A82A82A82A92A94082008002802A83282A82402A80202A95002A82A800 0200000000000000000000000000000000000000FF2D6E0002003542543123403503043482525542 000000D30D50800D505505305114C12A0D48800C00D50D40A10D40D50809550A50C80D5000000000 0000000000000000000000000000000000FF95C70000004004000004004004004424402004000001 00100000000000000000080094014000100200100100101100110980004900000000100200000000 0000000000000000000000000000FFEB4E0000000A80220880800880800840820AA00000002882A8 4202A82A82002202300100000001802A82B02802B02A82282A80800002A800008000000000000000 0000000000000000000000FF2FF5000200A04200A00A02A42A00A00A00800A008000802802881000 00000290008A52A81280282080280880280280280200284304280200080000000000000000000000 0000000000000000FF33BB00000020028822325020025524D2310010010000824000C0C004000954 010800800B44004C0080080082C80C000880004C14B0D00400080000000000000000000000000000); SDR 8000 TDI (000000FF44BA000001A01881801805001801801241C0040100010062160060060001000044062870 04C54400006003016002006014006002006806000800000000000000000000000000000000000000 FF900B000155801C4C155955155955D55155D544830001556556D5755600055000412712755632C4 045560004C641255608044E55254E556000004000000000000000000000000000000000000FFB89D 0000AB80182B8AD8A98AB8CB8AB8898AB80B00002AE026AAF2AE0002500048068162AC0840802A20 022A62AC2040422B62AC2A62AC000000000000000000000000000000000000000000FFB2D5000001 801880001801C018018018018018310000006006006807000000005206C068048040880060020140 24006002086004006006000400000000000000000000000000000000000000FF0A640000A9801822 0830A9AAB8812AB8A7AABB410000A88106AAE2AE8002000049D60C62AC0040602320062A62A415C7 2A2AE2AC2B62AC000100000000000000000000000000000000000000FFE7A8000405801A81811401 801815001801801801000004020E00600600000000400622E00404490010600400E0044060020060 04006006000800000000000000000000000000000000000000FFAFFA000001801809841005801841 00180800113500000060A600400600014800624E0060045142000120020060100A40820060000160 04000100000000000000000000000000000000000000FF003A000001801840141009801801001802 801041000000600601600643000000700F2062040040C00864040060104060020060C011604E0000 00010020000000000000000000000000000000FF0D5A0000018018000B7061061881001800961031 102008802600E00608000001474601E14604C00000621A0860480861A20264100060060800000000 00000000000000000000000000000000FFCCB5000001801805801001005921001800801003804008 804608400608000010400600601609441044600414E40014E04A0560000060061000000000000000 00000000000000000000000000FF80D700000000004180800800182000000000000C000000600610 00002080000080400001401201402C00000302202280080002280880200000000080000000000000 00000000000000000000FFD831000000000001810000003880000000000000000020600630003010 82000004001205104000000040800200140040000004044000000000000000000000000000000000 00000000000000FFF3B900000088180480000000C802022804909801100002408200200206000010 91B340041202241000202220200208A00A0121020020120000000000400000000000000000000000); SDR 8000 TDI (0000FFA5F10000000010018000010018018000458018230000026006006006800000004406406006 08400008602C0040340065240020A4002000000000000000000000000000000000000000000000FF B2B2000000001110000001000001C00001A01901000000600080600600000000612E116006054008 007486005086004017006014006000000004000000000000000000000000000000000000FF0D9400 00AA0AB0238AA0AB0AB8AB8AA0C98AF909000028E2AE2AE2AE0000002AE0060262AE24400072E504 2AC2042AC0462AE2042AE2A8000004000000000000000000000000000000000000FFAAE200000000 110000C00300004300080182B8D1000000600000600600000000600600622600C00200602430E004 40C004002004002088000004000000000000000000000000000000000000FFDF730000AA0AB0AB8A A0AB0AB8AB0AA88B8A982300002AE2AE2AE2AE0000002AE28628E2AE20C0100560242AE2242AC006 2AA20C2AA2A8000004000000000000000000000000000000000000FFF8E300015415504414015115 4111950133901801000055655054655600000054E50E53609654404455640402455414454C55654E 556440000004000000000000000000000000000000000000FFF31C00000000100180000100180180 000180181000000060060060060000000060360460061040000060140040940045160060C6006000 000002000000000000000000000000000000000000FF7E630000AB8AB83388B8810AB8818AF00188 0804000028E2AE0142AE0000002060460260A42260002AA1122862A600400E2AE2A62AE084000002 000000000000000000000000000000000000FF2FFA00000180180004184500180180100385080300 0002600404600600000004612E11601400604400208000601650C104006016006404000004000000 000000000000000000000000000000FF22290000018018918010110018550011318020C900000060 0631600600000011640640640409200200243204E00204422600600200604C000000000000000000 000000000000000000000000FFCA4C000001C0180800100100180100140180005100000460040048 0600000000622621600451240200200000E0420044D40D6002047004000806000000000000000000 000000000000000000FFE18C000001801801801801001801801001A00B0300008060068060060000 0000690E9060040440800020020C609600400600600610E004000000000000000000000000000000 000000000000FF715A0004AB8018A20ABCAB0AB8AB8AB0AB8AA801000028E2AE2AE2AE0002A80060 16036AAF8050082AA000A063062AC4562062AE2062AC001204000000000000000000000000000000); SDR 8000 TDI (00FF1449000000200089000001000000000000001021000000440000000000000000000400400000 4010200000000001000020000800028000000400000000000000000000000000000000000000FF13 7C0000000A88228000841328800808888AA90000002880AA2AE2AE0000002000000202AE2A014001 81021027220024122AA5402B2000000000000000000000000000000000000000000000FF9F650000 00004009800040001814005000000090000002640600000000000000012811000001048030020014 C000000488004028014000000000000000000000000000000000000000000000FF4BA10000000001 0180001408984002804200002400000060060000000000001304004000000000200400A820011035 0040000480000000000100000000000000000000000000000000000000FF83640000000018018000 81011811040800829801800024000008E0360000200042860060C60060200242060061060420C204 02861000000A0000000000000000000000000000000000000000FFB0A900000000190001000D0200 0500084080588514201000060060065001000040064D600E15610050208614C42E40641208800C04 0110010000000000000000000000000000000000000000FF28180000000018000000098001090008 00801881002009601608610604000000600602600E00E03A00408600C28639628A00028400000000 0002000000000000000000000000000000000000FF33CF0000000018818000019098810608008198 0108001060081060062800600060062064660E600220610408404402400200000408048000800200 0000000000000000000000000000000000FFAA300000000018018080838218032018410458030200 4300070170D602010000450610F10680608012640682705600E0230D480E82400814000000000000 0000000000000000000000000000FFA9A300000000180000200182408100B8012018010800000000 40602600000024409620600620600020620600420608408222400640480000000000000000000000 0000000000000000000000FF947E00000010180000000192000582100100D8011000016001006006 1000004244162061260060000142C40440358C608224500620400000000000000000000000000000 0000000000000000FFCF1E000000089821800001801803A15001403801000002F007407006888040 00430600E08604600142E8251A4C0D03C00280400600500000000000000000000000000000000000 0000000000FF3CA0000000011040002001004081C00001C0180100000C6800087846010000004006 017207204004826007807006806001002007003A0000000400000000000000000000000000000000); SDR 8000 TDI (FF2B9200000000010000000108C00000008111008012200000002800008280080080400880014000 00080001840020000000050000000000000800000000000000000000000000000000000000FF820B 000000000884800800800A0080085480080080000D20820020120024030024120020030020000004 02B8A88A002002002003003002000000000000000000000000000000000000000000FF30B4000000 001801801801C01801801C01821C818A000040060060062862A4006007A0F89610E00040000620EC 8E00600680600708400600008A000000000000000000000000000000000000FF59C9000000000000 00120128A0000011A90890830A2002C000080008028A05000628848C002008400810008608210040 0002C000004004000040000000000000000000000000000000000000FFC711000000000800800800 800A00800A0084030094000020020020020020020028024121020020004000020424028020028030 02802002000000000000000000000000000000000000000000FF9F4E000000000000000200000000 00000000000000000000000000002008000008000000000108200000002080880000008008000000 000000A8000000000000000000000000000000000000FFAB21000000000004000000000000000484 00000000004000004000000812B0810200120208081000001C000000000000000000000800000000 00000000000000000000000000000000000000FF777D00000000000000000010000042000440012C 00000200410000000000000004004000000004900300000000001005308200001080000000000000 00000000000000000000000000000000FF5489000000000010000000010000000040000000000000 02000008000000000001281108000000004800008000002300000880008400000002000000000000 00000000000000000000000000FFAF258000000AA8A28000AA8228AA88A888CAA804800028A08A2A 82A80000002AA0460262AA2AA0000022AA2AA2AA4120022022AA2020000000000000000000000000 00000000000000000000FF5246000400400009000001000001000004001001000000404000500400 000000403004000400C0034042000088410101050048048040000000020000000000000000000000 00000000000000FFF66300020015584500015594D955D539539559098000554157557D5600000055 650C5355565565000CE557556556146495CCC557D040000000000000000000000000000000000000 00000000FFEEED0000000AA8A28000A88228D48AA8A88AA84A80002AA28A2AA2AA0000002AA28228 A2AA2A02010A202A24280A3420222B20122A20000001000000000000000000000000000000000000); SDR 8000 TDI (5B3F000000001081A01843C45801811A010018418000006006107006006003004206006006004004 00000440400483600C004204202006000004000000000000000000000000000000000000FFA37E00 0000001002001801800001C0190B2018018001146041C16006056802806006806007806024400007 806D4400604E00E106002006000004000000000000000000000000000000000000FF85CD00000006 1901801801801900001801415845800000601628E8650250660CC04B422906047000200104005096 0062247E6804004006000000000000000000000000000000000000000000FFBF0100000000181000 1801800020401801001801800141600012700E40608691609205300E00620802000401400410ED04 00700C004006000002000000000000000000000000000000000000FFE1E7000000001A8C40180180 0000001115003821800041003000400D4048020240A2806800004428020804014C2780E886006886 804006000000000000000000000000000000000000000000FFC5EC00000000180180180180181200 3201001841880000000E32600600E00200502222220000788029000610600605680F10629614C106 010080000000000000000000000000000000000000FF320B00000000180180180188994080102101 188D80001460000462042941060072044141160EC000021104004036107015014014200006000000 000000000000000000000000000000000000FFD9FB000000001B80001807B0000480504100181180 000060060068060060068040850468800168000000042050C5006206004006800006000000000000 000000000000000000000000000000FF9E4D00000000180000180180000880100100194180000000 162060062970020064060064060A40804C000420408600E41610520E110006000080000000000000 000000000000000000000000FFA88800000000180180180181180080100180180188000000000C44 06006002006126406080006002008006086004026006006106420086008000000000000000000000 000000000000000000FF5DA800000000000180000000180000000000000000000060060000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF9F7000000000000180000000180100000000000000000060060000000008008000 01000800000800000004004800000004800000805000000800000000000000000000000000000000 000000FF18B600000000080080180080080080020000180580002841020020028020020020020020 0200200000080220A08A002002000002002002000000000000000000000000000000000000000000); SDR 8000 TDI (A2000000001801801001801881001B85843801800122608600600680E18280A00E18000E40E00600 000600E006006102006006004006000006000000000000000000000000000000000000FFD2EE0000 00001A000510010A200101180980180180A020E2C808400610CA0E2924AE20020E02F0104000B642 64264AE00E806086804006000004000000000000000000000000000000000000FF9CE70000000018 01801001001901001841803821900002600600428600402602200600800600600000040600A00600 6006006006004006000004000000000000000000000000000000000000FFA7E20000000018000010 00800001001001801801800000600000400600400200600600600600600000000600000000600200 6006004002000004000000000000000000000000000000000000FF60A5000000001801801000A01C 01001001801801800100680600400600400280680680680600680000000680600680680280600700 4006000004000000000000000000000000000000000000FF5D5A000000001800001200002101001B 21821A01810010600025400680610600400600640600600000094600400222600604620600600200 0004000000000000000000000000000000000000FF034B000000401801845240001851001803811A 01820000694608408E01701601610608605600600C1000060000208860A600E10E00600600000400 0000000000000000000000000000000000FFFB4D0000000010018018018018000018020098018000 49600628400410D00404600461E00600000400100400400408601450600500600600000000000000 0000000000000000000000000000FF9392000000201000001841A00284001A81041C018001006000 02600488500482E884086A0600284410000400500400611CA0608540600600000400000000000000 0000000000000000000000FFA46F00000000100184584180582880124102180182804170A6016115 0040948060050060360000080800A70068264461440D441400200600000400000000000000000000 0000000000000000FFF00D000000001100005805852008801001001849800100680008608540C084 00421409208E8220100000972861065460040042A400A00600000400000000000000000000000000 0000000000FFEB56000000001601803801809803001A010218818000046006006104414082804014 10E016824925A0008C08400590780580400400E40600010400000000000000000000000000000000 0000FFE6A5000000001000001801800011009801019A918001026180004004004802004005866106 00689030000501C10440F106004146806206000084000000000000000000000000000000000000FF); SDR 8000 TDI (0000002002442202002042002002200092800000B08800A50E10800C08918824980928B008000008 00814BAD020D88800840820008000800000000000000000000000000000000000000FFF938000000 001802888800802880800018C0080080000040020A20070040120020820020020060000010021000 024020020B2803000002000000000000000000000000000000000000000000FF10710000800200A1 80010B14190200400048202000000060864000401880000800080582140004400002002084000882 24200480340A00000100000000000000000000000000000000000000FF01C6000000000001800004 0A18201E00000600000000086006009188810200001000000000008000208C890600003100504008 38C004A0000000000000000000000000000000000000000000FFFE300000080839018018F0809841 801180A0580100000201000060062020222023064224444A62004800760848100060000062060920 00000000000000000000000000000000000000000000FFFB87000100223A00231B02A20245AA1300 895A010000820806CC6896286822A02AA6808A27256A00288036AC60270068810460CE0A4AC40008 00000000000000000000000000000000000000FF2B4B00001010192210182888A1018010308418C1 000051610601620601621210E01614601410600000048601028A2AE248A864064040100000000000 00000000000000000000000000000000FF4DA4000600001801801800801801801000001801000000 60000048060060020060078060040060000000060000000060000060060040040000000000000000 00000000000000000000000000FFECF30000000018018518001458018110D5801801804101041620 70260842545029064828070068080008068600021160040068070060028000000000000000000000 00000000000000000000FF1761000000001800001800000001801001A01800800020000000408620 580400200600300600724000100720A0864060040870070060070000280000000000000000000000 00000000000000FF4618000000001800001800000001801801801810800100600000600602E90400 60060060075561000000060040021460A48060060060021400000000000000000000000000000000 00000000FFCFAE000000001801801800001C01801C01A218208880406026084286186205024A2610 E2062260582002AE20422222608C8060870060061400100000000000000000000000000000000000 00FF7DA9000000001A000010018004010018818018118000806000206126A5630200200600200655 6B04000006228082546142086006006002000024000000000000000000000000000000000000FFF3); SDR 8000 TDI (0005809801844001801801803801813808000041400608610610600E146306246106006100206016 046046016006146306006080000000000000000000000000000000000000000000FF4D1600020000 02800002002882012012300000000000844801004800004914800814821301004811004800800000 801000004804801000000800000000000000000000000000000000000000FFB21800000080081080 0000800800800902A00800000000202200200200002200210251200A102100002002002802002002 8020020D2000000000000000000000000000000000000000000000FFC3EF0000000AA0220AA0AA13 20AE0AA0540AA0AA00002882882A82A82A82102A92200001303380000002A92A82A82A82A82A82A8 3002A8000200000000000000000000000000000000000000FFC55000000000008000000000000202 003000000000000400000200010200001210801404C8000020000000000108000200420200008000 000002000000000000000000000000000000000000FF6F6F0000000AA0A20AA0AA0220880AA0004A A0AA00002A84882A82A82A82002A82200280402200900002A82A82A82A82A82A82A82482A8000000 000000000000000000000000000000000000FFA81F00020035425415435424C34830C30435415400 00D10B30C90CD0201550C10448C00800D30800800CC8CA0A20D50911090920D40550000800000000 000000000000000000000000000000FF295A00040000041000040040044040050000000000010010 21001000001921000109481201001001001000001001001001801001001000001400000000000000 000000000000000000000000FF05860000000A80220AA0AA12208A0800280AA0AA00002880A80200 001182200002000100000000000000000102A02A80402200382A02A8000000000000000000000000 000000000000000000FF4CD5000200200A00800A00A00A00A04A00A008008000842803002812C420 92822802842C0B502801000912942802802802003402812002000800000000000000000000000000 000000000000FF0D320000002053102002003102202493042012000000804C00A88B24884804B149 34D0C920854820000C24C0C80C004D4C114904804000000800000000000000000000000000000000 000000FF3A90000000001941801801901801801901841801800008410644E0360160040041061340 2E10624000040610E00481609480600E096806000000000000000000000000000000000000000000 FF041A000000400C04C00D2CC24CC0D44C10802C00800100300300228210341310A0034035032030 0040005204351348344320A442243202001100000000000000000000000000000000000000FFF15A); SDR 8000 TDI (018AB9238AA0820B38AB8939038AB2AC0000AAE48E2272AC2062A6056AAE2B642F2AE0000062AB10 600E2AC2B42AE2AE4022A0000002000000000000000000000000000000000000FF2D7E0000018018 80000600000001801803A018100000006001006004A8604E00E00602E005006010806003244A0C00 6004006006282008000000000000000000000000000000000000000000FFED8C0002018AB82A0A80 D00220A98C12018AB08A0000A880881162AE25E236006AAE00AA06AAE6200062AE6461462AC2A62A E2AE126230000000000000000000000000000000000000000000FFFD8A0000018018018000281018 0580100580184000000400068C600608609654600648200600680000600491640400601600600640 6000000800000000000000000000000000000000000000FF47EA00000180188180400480980184D0 D0801000000000622020E00404600600A00604612A0060000060020260D600400400600611208800 0000000000000000000000000000000000000000FF377C0000018018300000008000118010208019 08040000600602602642610600200610220600605050602404600600600600620604650000000000 0000000000000000000000000000000000FF168D0000018018000000008000098410000058080000 00040640640628604660602602400E30600006621201601E10605600610610601800000000000000 0000000000000000000000000000FF2D3F0000018018018100008238219010008118000000080000 08610608620608604E04205041630000640428642021600608600600600008100000000000000000 0000000000000000000000FF0E2C0000000000518000000238001200200000800200106406500280 0204800000101004001085302800080B02203000080801000A030000000000000000000000000000 0000000000000000FF5FFD00000000008180010112D9000020800000000000006286328080080000 0404C00281004000000C808044008040000012840000410004000000000000000000000000000000 0000000000FF591400008288080083200080084180000081E80800002A800204204200204A102006 08204200608020604A40202209A04220248200200010000000000000000000000000000000000000 0000FFE0C5000500508400400400000400400400400400000114400100500100D001281001201201 0090010010010890011210A1401021001000000000000000000000000000000000000000000000FF 6EAF000400C00D00C0048092CC80C00C80C00C000001002303253003013003403043113403413001 0B310350B1034230C300B043003000020800000000000000000000000000000000000000FFB0CC00); SDR 8000 TDI (8AA02380008903B8AB0AB8CD0AB80000002CE08E2AE2AC2A82AC2042AE0000162AE0002AE0062A81 062AE2AE2AE2AC404006000006000000000000000000000000000000000000FF93C4000001800000 000000800000821001009800000000622000604400000400400611400600600000602620204222A2 06006004004006000104000000000000000000000000000000000000FFCFDC0000AB8AA02B80008A 8A38AA8AB0890AB800000028E0AE2AE2AC2A82AC28E2AE2260062AE0902AE08E2AC00E2AA2AE2AE2 AC0CC006000004000000000000000000000000000000000000FF67E30001539521540001540CC154 11592D14580000005561105561145505544D655644644E55614455630E08A30A1060D65565545540 06000004000000000000000000000000000000000000FFDB63000001800081800020001800001801 00180000000064060060040000040260061165260062000062460004200060060060040040060002 00000000000000000000000000000000000000FFE97A0000A90A90238000800238AB881801801000 000028E08E2AE4042AE2AE2202AE00E1002AE4002AE2022462240040842AE2AE2AA0000000000000 00000000000000000000000000000000FF317B000001001010000014008001801801909000000002 600000602400600600800608608600624400610008600C20C4040060060020000000040000000000 00000000000000000000000000FFCA3500000500308180004088180184B153823000000000622600 650C00600608000644625600610000602A0560840A402C0060060020000000840000000000000000 00000000000000000000FF968800000140140040000490040180100580100C000004604000600430 E016010006156002006000006000C0E3240040440060060823000008040000000000000000000000 00000000000000FFFEC80000010010018000010118018018418010C000008062060060040461460A 28060040068061280060021260060040040060064320400000040000000000000000000000000000 00000000FF96570000010AB0AA0AA0A90220AB8AB889AAB200000028E4882AEAAE8162062422AE20 42AE2AF0008062A800680E2AC29E2AE2AE0160080010040000000000000000000000000000000000 00FF04E2000001201209A00001801A01801831C01800000000604600600508600650600600408400 6021006002017404006004006006052000000800000000000000000000000000000000000000FF35 FC00020115504C154135954155955D31D558A40000D56130556557046506486D56486D5655612500 65501171245564C6556556046540000004000000000000000000000000000000000000FF33D90000); SDR 8000 TDI (008180000500180D0041400000000000026006000040000010010000500000000022000500080410 004000000004050000000102000000000000000000000000000000000000FFE60500000000000980 00280898400480000000000000006026000280000120420000030000000000000028248120008000 000340080000000000000000000000000000000000000000000000FF888200000180004180400480 190480100190180000000000004C62260080420460260024963060D20060260C0000040016216406 006006000000000080000000000000000000000000000000FF796700000180000000001080001080 1081805810090048020600610600008240409620002600E00042601600408E2900460C6106146006 0A0000000000000000000000000000000000000000FF0C9C00000180000000000080000091100180 1800080021620600620644008400608E30602608E6A82160060024400800060060460A6616000000 000000000000000000000000000000000000FFF47000000190000184010A80180A80100108180010 0000600023658403800410600600620E20600002600E46244202802640600400400E000000000000 000000000000000000000000000000FF3760000001800041804400001880111081C0380800800900 061068262000464440460800870060000170461062B22048174B6CA60060060A0000000100000000 000000000000000000000000FF2D9600000380800208800015410000100300180000000884000060 161201460070260230060464000CE0260040040040860060AE006006080000000000000000000000 000000000000000000FFA9FC000001F00000004040000004001803C0180000004462100062040500 0614545600400702E000127004046203814006007014044006100000000000000000000000000000 000000000000FFD22D000005800001C42520001B1A001809461A00000032600E08601400000E0243 8E2CC00608E00201704680604100D10600E145025006000000000000000000000000000000000000 000000FFA129000001810002288601934001801811A01800080000E00008F08610014E0060065130 06086400006006200002003007216006006006000004000000000000000000000000000000000000 FFCD8F000001800011800041881C01801805801C0000000060460060040000060AC0064A80CE0061 0C00650E80400E00300600600450C006000400000000000000000000000000000000000000FFC112 00000180008000000500000100184100180000000464000060060000040040060004060062000068 26000344806006006006846806000004000000000000000000000000000000000000FF95770000AB); SDR 8000 TDI (01801801811885801D01801801880000440600600E0860072A600E2853072AC00080600F04708C80 688720600E006000000000000000000000000000000000000000000000FF07B40000004010000110 010802000010A10010010000284008000080000C00800000A648D4A04001540044004C0402C20024 4000004100000000000000000000000000000000000000000000FF41000000008508008000008089 02800A00800000900000200200201310200214200200200200A00100200B00200200200220300200 2080000000000000000000000000000000000000000000FF87450000400000006080000002000001 00600000000000020000000080080000000840000044000000002000029000088002080000000000 0000000000000000000000000000000000000000FF5E810000002000000000004000000004140000 0000000400004400000002002100000B12E80804502A000002040000080080100800000000000000 0000000000000000000000000000000000FF7FA30004000000000004400002400000002000000000 02004000000000000000100009100000000080000002000008000000100000080000000000000000 0000000000000000000000000000FF3FE70000000000900000041100040000000000000000000201 0000000000300000000200008000080000003002D085000080000000000000040000000000000000 0000000000000000000000FF22078000AA8000228000888228C88AA8AA8AA000000028A08B2A82AA 0002822AA2AA2022AA2AA2122AA2AA40A502203AAA2AA2AA2AA2AA00000000000000000000000000 0000000000000000FFA0EC0000010000110004000002000111040010000000004041004011001014 08100401400480403100401000404400400500489114000400010000000000000000000000000000 0000000000FF8518000555800045000515955D15955955D558000000554356D56556000C04557556 42555755600155655600C045414557D57556D5755600040000000000000000000000000000000000 0000FF17DB0000AA8001228000AA8B28C28828408AA80000002AA08A2AA14200022202A2AA0222AA AAA0022AA08230200A2AA2AA2AAA2200A2AA000000000000000000000000000000000000000000FF 03BE00000100008800044000020000000000100000000040000040008000B0000800088004004201 004000120010120000000000000000000000000000000000000000000000000000000000FF482400 00AA8000238000808228908C001A8AA800000028868A2AA40A0003024822AE5022AA2AA6082AA442 0565062A22AA2AA00A6022AA000000000000000000000000000000000000000000FF3E7500000000); SDR 8000 TDI (C41841801809841801A51841806100600709C804006406006006D040860840010060071270024068 02006000006000000000000000000000000000000000000000000000FF3422000001801800001C01 800021801841C0180181001460001070B600602601628E00434E4260010061060060020060000060 06006000000000000000000000000000000000000000000000FFE8DA000001C01800603821000005 801101011C018081140200004094006406016104496C08004400006086106007006C060068000060 00000000000000000000000000000000000000000000FF235E0000018018A1801829001851841013 053801800000000600610600654E30708609601012641008710E12602214E8240060060860000000 00000000000000000000000000000000000000FF37F9000041801A11C41801001841841045045849 80004060008240440A604600E4140000C2644000003006A06000C063028270802060000000800000 00000000000000000000000000000000FFAA2E000001801800001851000001801021041831800000 600620620E0460060069048220028060000020064060C20064040060065060000000000000000000 00000000000000000000000000FF272D000001801C40001801000029841041013841800000000720 6086906534D040061328000A621008200E8461068468028461060060000000000000000000000000 00000000000000000000FF397300000180190180180100180180100D001801800000000004621600 60060160040021104060000020860860000960440060060060000001000000000000000000000000 00000000000000FF5DA8000000000001800000001800000000000000000000600600000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF6EA9000000000001C00000201800000000200000000100600600000000400400480080 00000000000000008010010000008000000000000000000000000000000000000000000000000000 00FF0386000000801800800800000800800200001820800042810A00200208A00200200200280080 2001002002002286002082002802002000000000000000000000000000000000000000000000FF47 9E000000000004001000100000000000000001080008400022008000010000800023012440400000 0000800800051400204000004000000000000000000000000000000000000000000000FF33F30000 00800802C0080080081E800954C60820880100A08200200208A0820030038020030025D000200200 2082002083002002002000000000000000000000000000000000000000000000FFFEE60000418518); SDR 8000 TDI (38018018010018048010358000026406006006006006042002004006006000004006406202006002 002006000000000000000000000000000000000000000000000000FF305600000000100000180100 00008010008018018000006000006006006004006000004004006000006006006002006002000006 000000000000000000000000000000000000000000000000FF5470000000001001801C0100180080 1000A018018000006007006006806006006001004007006000806006006806006006002806000000 000000000000000000000000000000000000000000FF05D5000000001220001841A000000A180080 18558000406400106106286007006002084006004404026006006002006002000006000000000000 000000000000000000000000000000000000FF3DA3000000001001C0580180194400180484390180 0100610604604680700A08602204C45481601080601700E80200608000A806000080000000000000 000000000000000000000000000000FF1299000001001C21801801C01821001863D818038000A560 06004094007046046004C84A2E008008006006006002006002106000006000000000000000000000 000000000000000000000000FF1130000001001800301821800041001801821C2980008062008850 25106007C66104804006002004007007807003456000086001106010000000000000000000000000 000000000000000000FFB3EF000001001801805C01001903541401205901800005608604400C3040 3608682422800600040002601600E006006102017000006080000000000000000000000000000000 000000000000FFA465000001001800001C11000211401201109C8180000062000852050060270160 06908C064020000A600600650B007000006891006000000200000000000000000000000000000000 000000FF76D1000001001E01801841801A09001801A1180180000060060840040040062568860140 0000401003400600600E006812006080006008000000000000000000000000000000000000000000 FF1052000001001980001C3180004100183F80190188008060000040040060460060060060180060 0800C80680690644600A006000106000000400000000000000000000000000000000000000FF144A 000001201801881801801801001821901A0188000062060064070840070060071002052000000840 0600620680E002006016006000000000000000000000000000000000000000000000FFFB58000001 001840005C0180000D00190380580180004064008060078060078060048120040864040040068268 02006481806006006000000000000000000000000000000000000000000000FFA03E000041801831); SDR 8000 TDI (220C580515010040800000000060566500D81200000400C80280000244203580081004080E80C818 0010000000000000000000000000000000000000000000000000FF6D98000000000001E000000219 420880800120000000096187820800A18000000100100400080000020000800140400520009D0000 0000000000000000000000000000000000000000000000FF96B40000800018038418090018008010 0394082380000000001062264062A622A40604600440600000210600E0B000601041400600000000 0000000000000000000000000000000000000000FFC157000010201A22013A8B324202A8B22328CC 05800080089620620E416A8EA82C84A8ECA6846929242B06327486B168AE82A40E20000000000000 0000000000000000000000000000000000FF80420001001018882018212000808014818008218000 5160060A612604602605685302580610600110A80E00E02A04600228408680000000000000000000 0000000000000000000000000000FF9D6C0006000018018018012018008010008008018001806000 00600600600680680180480400600080280780600000600200280600000000000000000000000000 0000000000000000000000FFF1E4000000001801851901001900001017911C0180000104168C6006 C5634524204445214E0960880A6046406606C0700604480600000000000000000000000000000000 0000000000000000FF01A60000000018000018010000000010008018018000000001006087006004 00200400200640600080600600600600600400600600000000000000000000000000000000000000 0000000000FF4315000000001800401801800000001801A01C018000406000006006006006004004 00200600600000600600601700780600000700000000000000000000000000000000000000000000 0000FF1548000000001801801801801800001804801889800028608610602F006405004284002206 42610014620E0060A6086006002006000000000000000000000000000000000000000000000000FF 4CFF0000000010000018018002018018018010018001C0600000608700600620200600600E08680C 00400600620A007002000006000000000000000000000000000000000000000000000000FF977300 0000001181883801801819821B91C61023800002600600600600600699A11C406106016000004006 006006006006002006000000000000000000000000000000000000000000000000FF91A800000000 1000031881800281021800889101800048E10802605622E0A600242282D226047000804436006142 284000022006000000000000000000000000000000000000000000000000FFA58200000000100190); SDR 8000 TDI (91080080080080080000000020020020020000020020020220C220209000200200201200202A0021 02002000000000000000000000000000000000000000000000FF02F60000AA0AA0224AA0AA0220AA 0AA0AA0AA0AA00002880882A8AA82A82A82A92A82402501101012202A92A80002A80102A86002A80 00000000000000000000000000000000000000000000FF3DDD000004000000400004000000010020 00000000000204010202800480884304082000205288220088010002280015400004010000000000 00000000000000000000000000000000000000FF60080000AA0AA12A0AA0AA0A20AA0AA0AA0AA0AA 00002A80A82A8AA82A82A82A82A82883002002082A82A82A80102A83402A80C02A80000000000000 00000000000000000000000000000000FF11AC00015015434C1543483543543443123543540000D1 0930210848C014209009208A8D10800400CC0550550900D50010D508105500000000000000000000 00000000000000000000000000FFB669000400400400000400410400400400400400000100120100 00010010010000010010010410000010000013410010010010100000000000000000000000000000 00000000000000000000FFA3800000A80AA0220AA0800220A80800822AA0AA000028808810008890 00000200080082000009002A0AA82A80002A8A802A8140AA80000000000000000000000000000000 00000000000000FF5B42000002000A00A00214A10A04A00A40800C000000802802C230004C0C0A81 2C42902802A0A4A0812002802B2B0020030028220000000000000000000000000000000000000000 00000000FF43DD00020020030800122128020022B2102004010000844A20914C448148C0B04880C4 11510C0800804804005005000855000D140000000000000000000000000000000000000000000000 00FFAFB900000000181580184180184D809805841801800008C00E0060064860160841460AE03640 E300406026006014026414406016000000000000000000000000000000000000000000000000FFEF DE000000400C20A40C04D32C80CC0C90C88C8080010030A232A45201310322340B20320314300112 A1038835233020A310A302800000000000000000000000000000000000000000000000FFC4840002 002002180002842122802002240002000000B0C800804C00800910C00A10E00A8090090080508082 0A00B00804A20A88A00000000000000000000000000000000000000000000000FF6AEC0000000808 2480B840100810802010880901800000000A08300700600A18202209207205208848124228200600 3002002002000000000000000000000000000000000000000000000000FF86670000080000C1C000); SDR 8000 TDI (20A7881041AA9AAB8000A880A8AAE2AEAAE92620000225A2C60004A02322AE2AE1044065460962AE 006000000000000000000000000000000000000000000000FF994E00040000200180180300180180 5003801801800004000600700600600E01009200280208880108A006006416006256006007006000 000000000000000000000000000000000000000000FF25970000000000898018310098118310D080 380180000062000060060063060C44460C402C4464000020060061444D6106456006006000000000 000000000000000000000000000000000000FF191300000000000000180110000581102084180180 0000600600600610600620400A044044006500000206006004016006516006006000080000000000 000000000000000000000000000000FF188A00000000000005984100401182100001384380002000 064060860D600601A00448611008E28000201610601400600600E0061EE008000000000000000000 000000000000000000000000FFEF9500000000008190180900188184109280380580004000000061 0600600602224611600011600A40200600600604630602604E016010000000000000000000000000 000000000000000000FFCB3900000000010180003010381000009400800000000060064000000100 00040428240148000008400200000010028280320010000000000000000000000000000000000000 000000000000FFE93B00004800002390400810590A0000000000000B001060061100800480800000 800800C810014810400004002C000000000000000000400000000000000000000000000000000000 000000FF22CF00000000000094080000090581006A8C0841800022C0020060062C200260202A0120 0200200000A092102002002006082042002000100000000000000000000000000000000000000000 FFE11A00040040040042541006841442040040140010011000810112010050051810010010112790 11001001009201089001005001004000000000000000000000000000000000000000000000FF9A33 000440400400C00C0080CC80C40C04C00C0085010021031035034131030030030030435031411030 0300B44B08B003003003002000000000000000000000000000000000000000000000FF971E000008 00002594180190180180185188180180004540060060060A60064041560860860060000161060460 06006006106006006000200000000000000000000000000000000000000000FFC000000200200300 2012012002012012004014010000844A40804005004804804800910808930C00890804804D40804A 85004830004000000000000000000000000000000000000000000000FFEB7B000000000010800800); SDR 8000 TDI (AB8AB08D0AB8AB80002AE0AE2AA2AE2AE2AE2542162B442C2C60042AE2AC2AE2AE2AE2AE2AE2AE2A 8000000000000000000000000000000000000000000000FF238500000180114415593594C1559059 0595595580005561305565565565564260144D445440400432E55655640E55455455614E55000000 0000000000000000000000000000000000000000FFBEC30000018010018018018018018018018018 01800000600600000600600600608600408401400C00600400600600400400600600000000000000 0000000000000000000000000000000000FF260E00000000002B8AB8818238AB8998018AB8AB8000 28E0AE2AE2AE2AE2AE0061A620422620A0620202AE2AE0242AE2AE2AE4062AE00000000000000000 0000000000000000000000000000FFF79C0000000000000018018000018018018018018000026000 00600600600610440600408610200401000600610400600600600E00600000000000000000000000 0000000000000000000000FFB09D00000000010180182B08980182514B8018018000006206006006 0060062360160CC00E0260004800060064160060060064C600600000000000000000000000000000 0000000000000000FFCB6600000040001000180100802180108B8438018000046240007006006006 014092084006002280008006006C4E00645612600600600000000000000000000000000000000000 0000000000FFCE20000000000001A01801901A01801841A01A0180008060068060068062A6022042 00400600600010200600610400610620E00600600000000000000000000000000000000000000000 0000FF92090004000AA2A20AB8AB82208B8AB801C89CAB800028E0892AF2AF2AF10E28020222C2AF 2AF0192202AE2AE0042AE8068062AD006000000000000000000000000000000000000000000000FF 8F0D00000020000180180190984180180DA41A018001006046806806806056002042006296006000 102006006414117007406006006000000000000000000000000000000000000000000000FFCAFB00 0000154054355955944131955933953955800155635055655655644E412C8E4C75565564844D0556 5564A65574CF34E556006000000000000000000000000000000000000000000000FF0C4E0000000A C4B3AAB8A9823C898AB90188B8AB80002AE28E2AE2AE2AE2062AC49228200632A1402202AE2AF024 02600E1262AE006000000000000000000000000000000000000000000000FF843700000000008000 180180800380180180180180000060000060060060060A482601200280200000000600600C006806 806006006000000000000000000000000000000000000000000000FF3C130000000A80222AB8850A); SDR 8000 TDI (8110050A3811850011000040024640E00601002200004612A15004610000624600600601620E1000 20000000000000000000000000000000000000000000FFCB5E00000180180000190D024080801001 011801800000000600411600608600020208A00E2024000160040060061340A42060440000000000 00000000000000000000000000000000000000FFA4310000018018600018890080C6909101001805 800008E0060060060060861803264CC40C22600040E0164060060040040460040004000000000000 00000000000000000000000000000000FF2E60000001801801801813003830801003009809808000 60402160862060060404060240240961482260820460260841040260240801000000000000000000 00000000000000000000000000FFCB0B000001801801C01801021C11101101145803820000000700 622E00E0040100822022020102A000600C20640604E14620E4160002400000000000000000000000 00000000000000000000FF6B370000098A18100A5841112021001131001C0180000200000A080680 E00409008A30000B20000000712480620608C0040060060000000000000000000000000000000000 00000000000000FF08C9000011801800525821800409041841801C01804040600004600600E04601 02160060022100000071440262160040840078060000000000000000000000000000000000000000 00000000FF9576000001A01801A01801801841021811A01C0181A028604610600700722504000650 6392000000006804E0600F0140048060068000000000000000000000000000000000000000000000 00FFD8BF000001921008001811892001801901801801800012600100B00700640610410200020700 60A4006007006006106006006006000080000000000000000000000000000000000000000000FF72 78000001C01009A01801801801801803A01801800002622600600600600600E0421020AE10E00600 6804806006004004006006000000000000000000000000000000000000000000000000FF9C820000 01801100001801800001801841801A0180000060000000070070070A448200200442600800600600 6004804004806007000000000000000000000000000000000000000000000000FF2B2D0000018010 238AB8AB9BB8AB8AB8C98AB8AB800028E48E2AC2AE2AE2AE30604822A2040060042AE2AE2AE2AE2A C2AC2AE2AE2A8000000000000000000000000000000000000000000000FF27680000018010100018 01000001841029001801800000640000600600600410C2260060840AE0020060060060A600600600 6006000000000000000000000000000000000000000000000000FF8C560000018010AB8AB8AB0238); SDR 8000 TDI (0A008008008000402002802102400002403002003002800800220002802002002002003000000000 000000000000000000000000000000000000000000FFD42F0000000000002221042002A000020000 00000000000000800000000000000800000200400002000000000000000000000000000000000000 000000000000000000000000000000000000FFE4BC00000000000000000000000000000000000000 00010001440200040000808080088080000400000000000000000800080000000000000000000000 000000000000000000000000000000FF37DA00000000010000000000004200000040000000000204 004880000000000100A81081080D0000000108800000001001001000000000000000000000000000 000000000000000000000000FFC46700020000001040000001000000000000000000000000200000 00000000800000040000000008800220000000800000000000000000000000000000000000000000 000000000000000000FF6BEA8000AA8AA9228AA0AA9A28888AA8AA8AA6AA800028A0CA463AA9AA82 AB2A22022022222020002AA0022AA2AA2AB2AA2AB2AA000000000000000000000000000000000000 000000000000FF2B0B0000010000092010410002000010032012010000004041000805004C001540 04004088008000804801004C41000951004090800000000000000000000000000000000000000000 000000FFF943000555955845555955855955955955D559558000554516906556D56D5654C5244445 564D6001556117556557556557556556000000000000000000000000000000000000000000000000 FF07480000AA8AC822CAA88A8B2AAC8C2888CAA8AA80002AA08A2322AA2AA0AA2020AA0A22022820 202AA12A2AA8822322022AA022000000000000000000000000000000000000000000000000FFCE43 000001000008000000000000000000000201000000000001080400000000000C110000000010804A 41000001000800800001000000000000000000000000000000000000000000000000FFC92D0000AA 8A89238AB8800228888900C20AB8AA800028C68A1022AA2AE0020024024122422420002AA4022AA0 121820022AE402000000000000000000000000000000000000000000000000FFD952000000002001 80000000180000801000000000000260260400000004000040400000280100000004100004000041 0C000554000000000000000000000000000000000000000000000000FF48D6000000000109800034 10982202202000000000000060064900000000D05503082A80800A00400001400000A84284400000 00000000000000000000000000000000000000000000000000FF977D000001801801801801009810); SDR 8000 TDI (41A01C018001050200007086006106802004B0600080004000000601600600400600022000000000 0000000000000000000000000000000000000000FFA9BA0000000001098498A50018018010258018 0180000000060060060160860020040440800802100011065060C608648602604000004000000000 0000000000000000000000000000000000FFC210000000000001A4180100388180510084DA018080 42600002020400600C00602620620602008014000600601660602608820002000000000000000000 0000000000000000000000000000FFC1FA000000000000051941000121801044C018018000046006 00648600600469E606C8602210800200010600660640610600640000000000000000000000000000 0000000000000000000000FF5A71000000000100201805000041801200809A018000000006006086 006014802840006C2705040800100600600610604610600000004000000000000000000000000000 0000000000000000FFCE83000000000011801801005801801000801801808000000004000600E104 0820040C610200010000000628612600420605602004000000000000000000000000000000000000 0000000000FF5DA80000000000018000000018000000000000000000006006000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF86B70000000002018000002018000002000000000000006006000004000000800800000000 000000000000000000800000000000000000000000000000000000000000000000000000000000FF BDF3000000000000C01800000C00800120A038028000208002802002022000002000802002000020 000802002002002002002000000000000000000000000000000000000000000000000000FFC99E00 00000000400500000000010002002A00010000004300000010004110000040010001800000000000 000000200000208000000000000000000000000000000000000000000000000000FFC60300000000 0420800800C00800800834800902800034200244200200208B002003802002000538001002002002 202002002000000000000000000000000000000000000000000000000000FFDEDE000000000001A2 3883811A21801801801801800020400600608640600700480608E206200002000006006006807006 087000000000000000000000000000000000000000000000000000FFD9E700000000000002900120 010100108A0A308100000A4280000408004004414124809101001080440005004000000004208000 000000000000000000000000000000000000000000000000FFD60A000000000000C00800808C0080); SDR 8000 TDI (80100100010060060060040060060070048060060040000000060060040060008060000000000000 00000000000000000000000000000000000000FF7045000001C41000009901800001A41801881001 00005060000060040060068060040268068040042000060061030060000060000000000000000000 00000000000000000000000000000000FFB903000041801085D01801801D01A11955843401010001 612601400C00F006006D04202C160044040080260060060060800061000000000000000000000000 00000000000000000000000000FF3284000000000001C01A01801C05801821801C0180002CE00600 E0041060060040062060070000040000060060060040860000000000000000000000000000000000 00000000000000000000FF1350000000200190015801A00503801C87801C01808100600004600448 605701400780600E011014110016146006C060468001000000000000000000000000000000000000 00000000000000FF4DC30000400200059119010019018310118A580180000460C600601400E00600 4D06047407000A002100260061060060060001000000000000000000000000000000000000000000 00000000FF3B55000000000002001C03084001809401805A2180010060000060A40060075240572D 50C72002800010860060360060063080000000000000000000000000000000000000000000000000 00FF45BA00000000000581180590380180180100180180000460060078458078060028480220A600 004E000887926004006126401800100000000000000000000000000000000000000000000000FF56 F9000000000510005C01800301801805001841800102600004610640705710200000600601002000 021620638400429E0100000A0000000000000000000000000000000000000000000000FF9BAD0000 00000001A01801801801811801003A018000006006006004006004253000B1700620030408840640 644C206406106080040000000000000000000000000000000000000000000000FFACCE0000000000 00001801830001803805001801800040640180600680600400280420600600004400000680680480 6006006000000000000000000000000000000000000000000000000000FFD63E0000000000018478 01801C01C19803841801800100602638690500E10560600600500418800010000700701700600600 0800000000000000000000000000000000000000000000000000FF68B90000000000080018018000 01C01921805801800003604040600401600500680708500401000004000600E00620600600722000 0000000000000000000000000000000000000000000000FFD4B70000000000104018010284018012); SDR 8000 TDI (1803800000000000400E00600400C202206000006000000A06026000006080086080000000000000 000000000000000000000000000000000000FFC499000203A21A20031A812C0101A212A1A89A8580 0082088EB46D46A06D14880882B36800006B00000216436A00CA6100A04100000000000000000000 000000000000000000000000000000FFB05D00001181181200380500200988B0098438318000D160 0601600E116044436C0E0062B080600800014600609201620008C000000000000000000000000000 000000000000000000000000FFFBAD000201801A01801801001A0180160180100100000060000040 04006004806006006000006000000006006802006000004000000000000000000000000000000000 000000000000000000FF8EAA000401801A05D01C01001C41801001A0180180000400460064060075 06654413047280004A9A000107006802007040007000000000000000000000000000000000000000 000000000000FF7C91000001801800001C0100000180102180100180000000000060060070068040 02007001007000000806006002006000006000000000000000000000000000000000000000000000 000000FFF8B5000001801800401801800201801A01C01801000100604080602C8060040060270060 04006800000007006042007000007000000000000000000000000000000000000000000000000000 FF0C86000001801801801801801801801801881001000100600600605400600400686608E5AC0060 00000A26006002006000006000000000000000000000000000000000000000000000000000FFA8A1 0000018010000018018000018018218018018000006040006007006004A0400280780400428C0000 06006024006800806000000000000000000000000000000000000000000000000000FFA540000001 801005801801801C098018A380980B000000620680602C00600444018205600400501400000600E0 04006000006000000000000000000000000000000000000000000000000000FFAEE9000001801000 081801800029801AA3911009800100622000622E00640701024A8060A00040000004A60060020068 20806000000000000000000000000000000000000000000000000000FFD7A5000001801001801801 801801801801801003000002600600600400608600000208600800400000000600E0060060000060 00000000000000000000000000000000000000000000000000FFCDC9000001801000001801000001 80100180100100000060000040040060060060040060060040000000060060000060000060000000 00000000000000000000000000000000000000000000FFAC41000001801201801C01401801801001); SDR 8000 TDI (00000004020008002000100001012040000800000000000080000101100040100000000000000000 0000000000000000000000000000000000FFAEC80000000000220AA0AA0224AA0AA48A4AA0AA0000 2A80A80482A82A92A83080A00404200000900002A8AA82A82A82A828800000000000000000000000 0000000000000000000000000000FF868D00000020034435432035455432C3103543540000D10930 840D10D50520D40C08950D40800840000D50550D4834055001000000000000000000000000000000 0000000000000000000000FFF4F80004004004100004004102004000400004000001001401301001 00000100100950110100100000100080000100000002100000000000000000000000000000000000 0000000000000000FFC89B0000000000320AA0820220AA0800A80AA0AA00002880A8490800AA8218 2202000002280000000002A82A82200082A814000000000000000000000000000000000000000000 0000000000FFA8D8000000A00B00C00A08A10800210C04A00C0080008428028421020009028928C2 C02802802800000802002802D0280041280000000000000000000000000000000000000000000000 0000FF7E8D0000010002100012412802012452014004000000804A00C10A50004844804814948904 00484000000400488C825000940000000000000000000000000000000000000000000000000000FF 42B4000001801803A01801901805801825805801800008408610610E80608601602C146226406410 00080E00608410650010E080000000000000000000000000000000000000000000000000FF627300 0400C00C408C0D22C44820C40900D00C80800100300340340250200B103103013002011100000482 843042402001422000000000000000000000000000000000000000000000000000FF9BE400000100 02420293842600002403A02083A00000B28800828E8080D080880848800C08400810000188000B00 D00B00F10000000000000000000000000000000000000000000000000000FFFCC100000A820800B0 0800080C458000018008008000004002082102003000220112002045004480000432A0A006002400 002000000000000000000000000000000000000000000000000000FF90B8000000000009A0000210 3C8008A008080008000000618E5040001801281000801640A00003000010008400880A0000044100 000000000000000000000000000000000000000000000000FFBA32000000000005800040001A0002 04000260000000086006200031600210010000098200810008001000800041208000008000000000 000000000000000000000000000000000000000000FF9211000001809821A4380100580980104590); SDR 8000 TDI (80000060204B20460060B611600600400E1402400000000060CE0060060000060000000000000000 00000000000000000000000000000000FFA004000000001800001801020001911001809001800000 60060060061460060060B61443060000000000060060060060060001060400000000000000000000 00000000000000000000000000FFDE3800000000184001D9250040198010198091C1800000000640 601662600400200608A0D600000006000206600E0060060082060001000000000000000000000000 00000000000000000000FF12240000000018018018490818C580108188500B800005000000000600 60044020060100060A820821000040620E0860060904060000000000000000000000000000000000 00000000000000FF9AC6000000000021800114041844000100080012000005600640000800000040 004802042E0004002080000000000800000800800200800000000000000000000000000000000000 00000000FFB218000000000001840000021920000000082000000000600600010029030000004000 01464000000000B01080040000081000000000000000000000000000000000000000000000000000 00FFBA0E000000000800804880104900910020824849828028C02200200610600000238200220A15 2010000002402402022002000002000000000000000000000000000000000000000000000000FFD5 40000400580401441508098441400401540400000102020108100900100160140900140100100000 1001101081001001001000000000000000000000000000000000000000000000000000FF19680004 00400C00C00C00880C80C00C00C04C10800100244308301350328300303300305320300200108301 310300300B081002000000000000000000000000000000000000000000000000FFD0080000000018 01001811841801801841801801850055400600608600E00600410600410600600000004E00600604 6006000006000000000000000000000000000000000000000000000000FFE1240002002002012012 012000012010050004010000844821010005004804914840805100800810000800004001004004A0 8004000000000000000000000000000000000000000000000000FF3A810000000008908008008108 00800840200800800000220210280200000204210254A44200210000000200200200200212000200 0000000000000000000000000000000000000000000000FFB3450000000001224AA0AA1A22AA0AA2 880AA0AA00002880882202A82A82A82406080100180000000002A8AA82A82A82A900080000000000 0000000000000000000000000000000000000000FFAE5800000000000000000A0000000000440000); SDR 8000 TDI (0000642604E006006006022006016006026500000030006030006000006006000000000000000000 000000000000000000000000000000FF6DA90000000A902B8AB88182B8AB8818AB8898AB800028E0 8E01C2AE2AE20600C00000C2AE2246000000062AE0622AE2AE0002AE000000000000000000000000 000000000000000000000000FFE64700000000310000180180000180980184180180000260000060 0600604602650A10400410C004000506006216006006000006000000000000000000000000000000 000000000000000000FF857100000000100180185308180184300180380180000062263460060060 962860224240060040C0000056006084006006000006000000000000000000000000000000000000 000000000000FF114400000000108800180108840180100180180180000462408060060060060261 122260D400400000000600684E006006000006000000000000000000000000000000000000000000 000000FFC7E5000000001001A01801801801801A01A01A01800080600600680680600650A0260820 06002110000006006402006006000006000000000000000000000000000000000000000000000000 FFDE310000AA0AB0220AB8AB9224AB8AB8AB8AB8AB800028E0882AE2AE2AE2AE01220604AA06AAB0 000002AE2AE0822AE0062A8006000000000000000000000000000000000000000000000000FF548E 000000001001801841811A01845C01C01D4180000060471350070060040420160021061264000000 06006014006006080006000000000000000000000000000000000000000000000000FF3837000354 35534C355955844155955D55D55D558000D5615055655755655434240E2885165561140005565562 94556007550006000000000000000000000000000000000000000000000000FF60CE0000AA0A98A3 AAB88B8A38AB8898AB8A88138000AAE48E00602E2AE2AC28E2A62AF22F4040200002AE2AF2A62AE0 06400006000000000000000000000000000000000000000000000000FFBBC4000000001800001801 81000180180180080180000064000040060060040061260078260040000000060060260060068000 06000000000000000000000000000000000000000000000000FFFB880002AA2ADA322AB88102A0AB 8832ABA07A218000A88088406506AAE2042022262A82262100000002AE2AE2062AE0062780060000 00000000000000000000000000000000000000000000FFE537000000003909801805101C01801001 90191180000402060062960060040420960021060088000000060060060060061000060000000000 00000000000000000000000000000000000000FFCF48000000001801801849001801851001828005); SDR 8000 TDI (10600602600601600600800612200608000000000600600002601000604600000000000000000000 0000000000000000000000000000FF72790000018018010918010018818810298898018000006200 71600600610600000601E08650802800000610621008600800E0A600000000000000000000000000 0000000000000000000000FF25B600000180180124380114584D8010018058018480100006006546 C1600600628808200040010005102608600080640082620600000000004000000000000000000000 0000000000000000FF7B910000018818010058010042018012018018018080000200806086006006 20E44C02210004000000008400648000600002600600000000000000000000000000000000000000 0000000000FF6BAB0006018018010158018000018018118018018100556010046006006086406003 84E00640600000000388608001600002600600000000000000000000000000000000000000000000 0000FF9EB4000001801801201801801C01801809A01A0180002AE00E027106806006016012006006 10600000086280640000F000006006000000000000000000000000000000000000000000000000FF 9520000001101801401801802601801C01801801800000620128E007006006006244006106026000 001084006009006001006006000000000000000000000000000000000000000000000000FF9CB600 0001001909201801801801801801C01A01800000604620700680600610E00C10C00602600C001081 006080006000006006000000000000000000000000000000000000000000000000FFA2D900000100 180100180191000180180192D801800004640010E006006006022004024006100300000034006210 007000006006000000000000000000000000000000000000000000000000FF9DDD0000010AB8230A B8AB8238AB8AB8AB9018AB80002CE08E5262AE2AE2AE3123B42442AE2180100006042AE5202AE2A8 0062AE000000000000000000000000000000000000000000000000FFCA8E00000100390800180300 0001809001801801800000620000600600602609220228E006006040000406006280006000006006 000000000000000000000000000000000000000000000000FFDA3F0000010AB92B0AB8AB02B8AB8A B0AB8098AB800028E08E0062AE2AE2AE2022263062AE2860000000842AE0002AE2A80062AE000000 000000000000000000000000000000000000000000FFC87700000115184415593194C15592595593 595580005561304C65565565164220D60465564CE100000156556008556550006556000000000000 000000000000000000000000000000000000FFABC300000100180100180190180180180184580180); SDR 8000 TDI (00000001800400000000002200000005004000000000000000000000000000000200000000000000 00000000000000000000000000FF4B83000000200080000000008400000400000000000002004100 00010000000804C01000201280200004210000000000000010000000000000000000000000000000 00000000000000000000FF801B000000000000000000080000000000200200000000020000000000 08000500102100000000100000880000008000010000000000000000000000000000000000000000 00000000000000FF03CD8000AA8AA82AEAA0AA822CAA0AA8AA0AA8AA000028A08B2A9AAA2A82AA20 200202228A2422000001022AA0002AA0012AB2AA0000000000000000000000000000000000000000 00000000FFAD7D000000001000201041000201041201001401000000402000500480400400001400 00041300080000110050008050000050040000000000000000000000000000000000000000000000 00FF711A000155D55855955955845955955D55D55D558000554156556D5755755651645609655440 604800004FD56001556000556556000000000000000000000000000000000000000000000000FF18 1F0000A88AA8AAAAA88A8B2CAA88A8AA8AA8AA80002AA08A2AA2AA2AA2AA32A22212A2AE20204000 00222AA0002AA0002AA2AA000000000000000000000000000000000000000000000000FF72420000 00001080000000088000000400001400000000420000000100000004008022000408820000020000 1001000800004800000000000000000000000000000000000000000000000000FF84230000AC8AA8 AA8AB88002A8AB8800AB8AA8AB80002886AA2AE2AE2AE2AA22230040228A28A4000005022AA0002A A0002AA2AA000000000000000000000000000000000000000000000000FF72A60000020000010000 00101800000000000000000002600600000000000010800020004600020800040800000000000000 0000000000000000000000000000000000000000000000000000FF362E00000000000180004A0018 0004C00000000000000060060000000000000001300C800602002000014000000000000000000000 0000000000000000000000000000000000000000000000FF7FA600000180180100180110D9118110 11811801810000000040612600600600C10401210000015002802000640010600001610600000000 0020000000000000000000000000000000000000FF9DD90000018018011419050200018010418059 01840000040602620640600600441402400029000000000008600002640002620600000000000000 0000000000000000000000000000000000FF8E2B0000018018610058830080459090019018818000); SDR 8000 TDI (0010EF1400604604664428742E000000407207006C06406086480600000000000000000000000000 000000000000000000000000FFDF1F00000180040180180000000100180080000180000060460260 060060060A64044160465100800064560060A6006106100400000000000000000000000000000000 000000000000000000FF5136000041800005911840200001001920A0004180000000161170860060 86104004106010000900406106106827087006000000000000000000000000000000000000000000 000000000000FF34E400000180010180180004180100180180000080000002004264460060060441 04006000000028006006006106006046000000000000000000000000000000000000000000000000 000000FF97E700000000000000000000180000000000000000000060060000000000000000000000 06000002000000000000000000000000000000000000000000000000000000000000000000000000 FF579600000000000000000000180000020000000000000060060000000000000000000040060000 00804000800000000000000000000000000000000000000000000000000000000000000000FF5058 000000800000801800000C00000800C2082080002880020020020060020000000020050022800020 02002002002002000000000000080000000000000000000000000000000000000000FFAD86000001 01010100000000020802000110A00800000440000040A0030200410000000000000000800000A000 20008020000000000000000000000000000000000000000000000000000000FF8766000000808080 80080020080099EDE0820800800008A00200202210A002202002002006802050C020020020020020 02000000000000080000000000000000000000000000000000000000FFCFAE0000018000238218AA 00180180980120582B800001400610604628E006006007046084A860000060070060060A60060000 000000000A0000000000000000000000000000000000000000FFD2C5000001100001111400200009 02074108A528000002410000410008420500D00440000400002800000420402400C0240000000000 00000000000000000000000000000000000000000000FF5649000000900000400354000800800880 8028548000002102080022500003003003002002D020008020030020021420020000000000000000 00000000000000000000000000000000000000FFFD090000000000222A8000000000000000000000 00000100000000000080000000000001000000000000000000000000000000000000000820000000 00000000000000000000000000000000FFD0E0000000000000000000000000008020000280000040); SDR 8000 TDI (04414600600601614601790612E10000022E03000640600600600000000000600000000000000000 0000000000000000000000FFC8D500000180000180180000580380110460380100002A6016106084 00700600600600A00600640000600F00600606606600000000000000000000000000000000000000 0000000000000000FF4D5A00004582A52D8538280040118010B2809AC900018062C124E0244A6106 14600688209608639002615610F00608600600000000000000000000000000000000000000000000 0000000000FF441E000015800005841800003811205210801841008000600E146005006007816546 04500603000000624702610720621600010000000000000000000000000000000000000000000000 0000FFBDB6000001800009801808080001009000A01D01000000620008600480602600604E024926 100222126006826286806046000000000000000000000000000000000000000000000000000000FF 8BE8000001800101801804003809A01200801A290000006046086104426006006046416146106088 046006006006006406000000000000000000000000000000000000000000000000000000FFC9D300 000580620181180200000381101081990900808061808462E402610700700620A00663E401006146 146C06006246000000000000000000000000000000000000000000000000000000FF0B1200004180 001584181048180580100080180180800062060064060060460C401404700E04604208680E006106 806806000000000000000000000000000000000000000000000000000000FF3553000001800001E0 1820000001815050A818118000056240016016046406004004004007806005806047806246206006 000000000000000000000000000000000000000000000000000000FF2E3A00004180001185180800 5801981824C65905018100601610F40420F08604440400E4060064200040061C6006016116800000 800000000000000000000000000000000000000000000000FF1388000001810605801E0800000D84 1A0080180180002860000060A620E0AE00402400E00600E022216006206006006407200441000000 000000000000000000000000000000000000000000FF8BD2000001808211801800000011035814B0 1809000110023000704402720E004006006000008C0201782624604700F316000020000000000000 000000000000000000000000000000000000FFC641000041800085801820001801001B2080184180 000002365060C600608600410600E0002900504060B7086007107046000000000000000000000000 000000000000000000000000000000FF6C890000418000058D984002580500180080410500004560); SDR 8000 TDI (6116016026104026426D0E04708124040602010628630E08E00000000004E0000000000000000000 00000000000000000000FF1083000000601801E01801801801000800A01801800000600000400600 78060040060060068060000000060000068068068060000000000060000000000000000000000000 00000000000000FF76DD0000000019118418018018010C92A1341811800004000604680600600681 7004514001006000B000069000070070070060000000000260000000000000000000000000000000 00000000FF27A8000000001801801801A00001001401001F01800000000000500780600700600400 40000060800000070000064060060060000000000860000000000000000000000000000000000000 00FFC3B2000000001801801901C0000180100100182D800080600000600653600600400480400651 600000000600820E086026006000000000006000000000000000000000000000000000000000FF26 11000000001801801801801A01C0100140182182A0A0E08600408702E206004884004A8600E100E0 0086000616006046006000000000006000000000000000000000000000000000000000FFAF780000 000010018019012000018898A1C01955800100600000600655600600400400600651600000000600 80065068068060000000000A6000000000000000000000000000000000000000FFC2A30000000010 2180380120B8019819819498C1880008600600600600600600402502600600600000010600040600 6006006000000000006000000000000000000000000000000000000000FF9C980000000010018218 0100A001A21801809889882002610002408705640600E12620E00600E80090000610000600680700 6000000000006000000000000000000000000000000000000000FFECEB0000000010A98038010018 01801801801801848028E00600400600600600600614648600600020000600000600600600600000 0000006000000000000000000000000000000000000000FF3FD10000000010018018010000010018 01801801800000600000400600600600600600600600600000000600000600600600600000000000 6000000000000000000000000000000000000000FF4484000000001001801801001801001801801A 01800000600600400600700700700600600600600080000700000600600600600000000000600000 0000000000000000000000000000000000FF3C1E000000001001801A110000118058418019018101 4462004140060A60060062070A600600600004000600008610620E00610000000000600000000000 0000000000000000000000000000FF16A1000014035035845A41001805801811C158298000086106); SDR 8000 TDI (C0D51550C28D48830D50CD0040548550550D50D50D50800000000000000000000000000000000000 000000000000000000FFA95800000040000000040041040040050000444400010010000010010000 01001000241001100000000001001001001001000000000001000000000000000000000000000000 000000000000FFFDA40000AA0000AA0AA0000220C00A800208838000002880882A80002A82A82882 08400A882800000002A82A82A82A82A8000000000000000000000000000000000000000000000000 000000FF9F24000200000A00400800B00A00A00B10C0200480008028028030430008030430029120 42802040108802800802802802802000000000000000000000000000000000000000000000000000 FF7A9300020000020100100020824B2022402212490000824A20000B14004005005144C2000484C8 00C40004800004005004004000000000004000000000000000000000000000000000000000FFC602 000000001801A018018018418899218218A3800008C44E11608641600E01640620688C0560000808 86080006006406286000000000002000000000000000000000000000000000000000FFCAAF000000 400820880C80C20D00C00C008808008001003103C0340A902803403133003006403000000002001B 52913102002000000001002000000000000000000000000000000000000000FFBD4F000200000041 1010002C028020020220B2090000B0C840030F15081000C00900800900800A00808009020020120C 20020000000000020000000000000000000000000000000000000000FFA5A5000000080800800880 80080011080090080080000000020820024070020000004020050020000010020000020820028820 0000000000E000000000000000000000000000000000000000FFF8A9000000000400400020021908 0000080401E0000000611F3040881080100900402000066A80800A1320100CD12083085080000000 00000000000000000000000000000000000000000000FFC81500000000040248A1000018000001C0 40040400000B600640002101080000000808829E8100002000000008018100800000000000000000 00000000000000000000000000000000000000FFEF260000080218A9A21801801843080820A81A03 80000004A000600620622E0044B40268000460001000060001060060060060000000000060000000 00000000000000000000000000000000FF7199000000221AA9825A21A80201200A8C809949800082 0826887226A8620F00508C90E00048EA0008884E00002604F0268260000000008060000000000000 00000000000000000000000000FFE0890000101018038899018402931008208858038000D1609642); SDR 8000 TDI (12600600400400E0A030600002000E00600600218600200018000000000000000000000000000000 0000000000000000FFA0E30000018000099058800098010018018218018000050000084006006006 00408401600400640804000E0060AA08200A00200000000000000000000000000000000000000000 0000000000FFA7EA0000000000140880800519000400000000000000006006500000200020000000 0000061002101000000000C808000800000000000000000000000000000000000000000000000000 0000FF81A30000000000100000000018000000480000000040016006000000028110000240020006 0402000002A0150424084204004000000000000000000000000000000000000000000000000000FF BEDF0000008000008008800008280A584086182980002E40820421061060223C810000220C002100 020002202482002002002000000000000000000000000000000000000000000000000000FF024E00 04004004034015021804104005804824000001000021089081001001411001001011280001081101 401001001081000000000001000000000000000000000000000000000000000000FF1D56000400C0 0408C00C02000C00C00C40CC4C00800111212308308301308300322304340728240104104308B123 083083002000000001000000000000000000000000000000000000000000FFE0C300000180000580 1800001841941811801851802044400601600604604E106006006004026000080406026206006406 006000000000000000000000000000000000000000000000000000FFBA8200000020020100120030 02012012302052010000844840800805004805005004424845024010800004004800800800800000 000000800000000000000000000000000000000000000000FF6DFC000000800000A0080000080080 09048400D4800000200200200000000200200291200200A020000002802002002002002000000000 000000000000000000000000000000000000000000FF1A110000AA0004AA4AA00012A0AA0AA04048 810000002886892A82A82A82A82A82A90002882800412A82A82A82A82A82A8000000000000000000 000000000000000000000000000000000000FFBCD800000000040000000000800000000202042000 00020200000008000000100000100000000000001001000000000000000000000000000000000000 000000000000000000000000000000FF719A0000AA0000AA0AA0000220AA0AA00A0A801000002A80 A82A82A82A92A82A82A81082A82300082A82A82A82A82A82A8000000000000000000000000000000 000000000000000000000000FF3A4F0003540001543540003443123523503120140000D10930D50C); SDR 8000 TDI (60060060060060220060000000060060020060020060000000000000000000000000000000000000 00000000000000FFBE7900000100000180180001184500184100180180000060060160060060060A E0CE0060060060000000060060020060020020000000000000000000000000000000000000000000 00000000FFAC7A000001400001A01800088001401843001801800004624000400700600600600600 60420060000000060060020060020060000000000000000000000000000000000000000000000000 00FF4E8B000001000201801800001801805801201A01800080600600600600600600600600600600 6000000006006006002006006000000000000000000000000000000000000000000000000000FF2E 990000010AA0AB8ABCAA0220AB8A98C98AB8AB800028E089AAFAAE2AE2AE2AE2AE2AEA8A2AE00000 02AE0062AE2AA2AE2AE000000000AA8000000000000000000000000000000000000000FFAC720000 01200001801800001821A01805001801800000604680680680600608404401700600600000000600 6002006002002000000001000000000000000000000000000000000000000000FF45CA0002011543 559559540C4155915D13B55B558000D5655055655655655655455455655255600000055600655255 6552556000000000550000000000000000000000000000000000000000FF79530000018AA2ABCAB8 AA02B88B8898A92ABAAB8000AAE28E0262AE2AE2AE22C20C2A62CE2AE0000002AE0062AE2AA2AE2A A0000000002A8000000000000000000000000000000000000000FFA0CC000001800001C018000100 01821801001801800000600080680600600600400400600200600000000600600200600200200000 0000000000000000000000000000000000000000000000FF68680002018A82AB8AB8A81A20810CDA 8BAABAAB8000A880A85162AE2AE2AE2063842262882AE0000002AE0062AE2AA2AE2AA0000000002A 8000000000000000000000000000000000000000FF3ADD000001800001A01C040118150018018018 01800004000628600600600600600400604400600000000600600200600200200000000000000000 0000000000000000000000000000000000FF84930000018040018018000018410458210018018000 00640002C0060060060B402E10E00600600000000600600600200600600000000000000000000000 0000000000000000000000000000FFEDC40000018000018018020000010458258018098000006006 2060862260460A40060060A220608008000600620600200600600000000000000000000000000000 0000000000000000000000FFBFC40000018000058138020401190018038018098000008006046006); SDR 8000 TDI (16004104106284016000046000306925206004404200000000006000000000000000000000000000 000000000000FFF7D5000000001801A018319410418A1001A0180100000000010060060071062040 0400620500600808688000E02E204806804000000000806000000000000000000000000000000000 000000FFF9CE000000001C018058298010118C1001C01801810054600100790580F10E0843040062 050060100061000460CC406004004000000000006000000000000000000000000000000000000000 FF74AF000200001A01A0388180104980100180188100802A60070060850070060840850060040060 00807000837007004806004000000000006000000000000000000000000000000000000000FF0406 000000001805C418818C1001001801821C8180000062000060060060064040040061140060000870 00807805907005006000000001006000000000000000000000000000000000000000FF20D6000000 001A0180180180100100180180180180000262260060040060060040040060240060000060000064 C408684C204000000000006000000000000000000000000000000000000000FF0581000400001801 C0180181100180180180180100000060010060068070060060070060040060008070000060164344 86136000000000006000000000000000000000000000000000000000FFE9E80000AA0018AB8AB801 9A30AB8AB8AB8AB8AB000028E48E2AE2AC2AE2AE2AE2AE2AE28C2AE0000062A82AE4464440060460 00000000006000000000000000000000000000000000000000FF272A000004001801801801800009 00190180180100000064000160040060060860360060000060000060000060040060040060000000 00006000000000000000000000000000000000000000FF03620000AA0018AB8AB8018230AB0AB8AB 8AB8AB00002AE08E2AE2AC2AE2AE2AE2AE2AE2AC2AE0000062A82AE08C08E22C08C0000000000060 00000000000000000000000000000000000000FF1F6500015000195595580194C105955829955955 000055613044655455655644E5065565505560000065505565545565545560000000000060000000 00000000000000000000000000000000FF7F5B000000001801801801811001801801801801000000 60260060040060060060060060040060000060000060040041042040000000000060000000000000 00000000000000000000000000FF94310000AB0000AB8AB8000238C18AB8050AB8AB800028E0AE10 42AE2AE2AE2062062AE28E2AE0000002AE2AE2AA2AA2AA2AA0000000000000000000000000000000 00000000000000000000FF3C7700000100000180180010000980191300180180000264004C600600); SDR 8000 TDI (00000000000000000000000000100000000000000000000000000000000000000000000000000000 0000000000FF1A448000004AA8AA8AA0AA82A8AA88A8AACAA0AA800028A08A2AA2AB2A82AA2AA2AB AAA2AA2AA001AAA0012AB2ABAAB2ABAAA0000000002AA00000000000000000000000000000000000 0000FFBDDB0000000014012010010000412000042014000000004040004880804804034005004001 004000004801004800800920A00000000000004000000000000000000000000000000000000000FF 9A78000000155D55D55D558D59559519559559558000554557556556557556556556556157D56000 556000D56556556556556000000000552000000000000000000000000000000000000000FFC8D600 00000AA8AAAAA8AA8AA882C888C8AAA88280002AA28A2AA22B2AAAAA2822AA2AA2AA2AA0002AA800 2AB08A8AA00A8AA0000000002A8000000000000000000000000000000000000000FF1BAB00000000 04000000010000000020000014000000000000000800000000000000800200000000000000000000 001000000000000000000000000000000000000000000000000000000000FFFCE70000000AB8AB8A B8AA8AA8900CC8888AA850800028C08A2AE0822AE2AA2202002AA2AA2AA0002AA0002AB442402402 0020000000002AC000000000000000000000000000000000000000FFBA6300000000000000000000 10440000420000340000026006000400000000010010000004000000000000000017417487116000 000000000000000000000000000000000000000000000000FF5BF200000000000000000000180804 200000008000000064260000500000000800A00000060000000000000004C00C0028240000000000 000000000000000000000000000000000000000000FF9ADD00000000180180188D80110100090500 58C1804000000040608610600E004404006114006400006000087005005105204000000000006000 000000000000000000000000000000000000FFAC3800000000182180180184900101080100180580 0054000602600E4060060041040A62040060000460802060A6404006004400000000006000000000 000000000000000000000000000000FFB3AC00000000182180180380909110E80101180190000964 061A60060D6406006006006004016000006080006006004006006000000000006000000000000000 000000000000000000000000FF96B30000000018058418898010010008830418A3002000E4000060 0C03601600660602611C006200006000006106104086006000000000006000000000000000000000 000000000000000000FF75CB000000001C0180180182101188100180DA0188002202062061064162); SDR 8000 TDI (702684600E0060A81060414160000262060010060000000000000000000000000000000000000000 00000000FF8893000001800001841801801800801801803811840000000000604600600600610610 60061064000060000060000060060000060000000000000000000000000000000000000000000000 00FFE456000000000000000000000000000000000000000000600600000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF26 B5000000000000000000000200000000000000000000600600000000000000000100100000000000 0000000004801000000000000000000000000000000000000000000000000000000000FF8F6E0000 00800000800801801800A00802800800800120C04200600600600600208200200000200000200000 2002002002002002000000000000000000000000000000000000000000000000FF4E310001000000 010411000000000000800030A10000140200000080000000000000000000000000040020000000A2 0048000000100000000000000000000000000000000000000000000000FFB7940000808000008008 068009FEDF0800910880800020A02200208201200200200300200200200000200040201200300200 2002000000000000000000000000000000000000000000000000FFEDEF000003820441803801813E 098298218058018A0184410640600700E00E00602600620600600000600000600600600600600600 0000000000000000000000000000000000000000000000FF60C80000000001010111010010000080 8209302100000A5A0000440400C00400408440400400400002410020400022502C00000408000000 0000000000000000000000000000000000000000FFA424000000800040000800810C008408008048 00140102208240000200000200200200200200200000208000200200280300300200000000000000 0000000000000000000000000000000000FF25C300000202008000A0800020000080200000000000 000001801C00008008000041A0040000000000000000000000000080080000000000000000000000 0000000000000000000000000000FFD96B0000000002000401000000080000000180000000000000 00000080000000000000100000000000004000001000000000000000000000000000000000000000 0000000000000000000000FF40770000000002004002000800000400000000000000020200000000 80000000000000000100000000000080000000100000000000000000000000000000000000000000 0000000000000000FFB1D40000004000000000000000000000004000000000000040800000000800); SDR 8000 TDI (062160260060000460000060008471868C5006000000000000000000000000000000000000000000 000000FFBC33000001000005801C01905C11801001045C41808011640E0C63560060060470161160 04416000016110106220006006040116410000000000000000000000000000000000000000000000 FF3B15000001000401805801C01881A01001401B0180010062800061060060061068960060140060 21006001026080006006004006080000000000000000000000000000000000000000000000FF32AF 000001000201805801A41809A0100122182180000064860460860060061461160064560060408260 00806080046086042006080000000000000000000000000000000000000000000000FF3B29000001 000041B01A01821A0180101900180180000860003260060860060060060062260060000060001C60 00006806002806000000000000000000000000000000000000000000000000FF4E9F000001000001 8018018058A180180180190180000860064060161060060060060160040060000060000060000060 06002006000000000000000000000000000000000000000000000000FF408C000021000601801801 801885955A1181180180010060419060078160060060062060041060000060000160200860068021 0E040000000000000000000000000000000000000000000000FFC24B0000018A611D81B951801C19 029409089841980004611640E4060060060060060160450160009460000060108060074864060000 00000000000000000000000000000000000000000000FF0CF70000018B0041805803801801001801 921801800148E2000361260060060060060064140060010060000060000262161060060080000000 00000000000000000000000000000000000000FF712F000021808201801801801D03103201201801 80005402A042610600600600600621600500600012600000E0410068062022860200000000000000 00000000000000000000000000000000FF248B000001800001811801901C41403805801855820000 00060161362060061070460060140061501060010160200464060070060000000000000000000000 00000000000000000000000000FF00330000018005C5801955801802821001049841800001683010 64460160060060068264561962000060202062101474160040160100000000000000000000000000 00000000000000000000FFEBF4000001800101821801801800801C01813801800000680619610600 60061060860860066060000060000064400060060040060000000000000000000000000000000000 00000000000000FF265E000001800001811801881A24A45805C01825800000004600600E20600600); SDR 8000 TDI (01600000200010600044600800501600700600000000000000000000000000000000000000000000 0000FFB329000000001801841801801801201001A018010000000000002006006286006026006000 002000006000006000004006006006000000000000000000000000000000000000000000000000FF 9560000000001801801801C01801201001C01C01800080608000200E80600600E007006000004480 006001006000004206006806000000000000000000000000000000000000000000000000FFA36900 0000001801801801C01A01021001C01881002000E2270002160864060162E60A6208208001006020 00E011004006006006000000000000000000000000000000000000000000000000FFAC2C00000000 18018218010018AB8A18018018018001006100006007006086006806006000006480006000006000 006206007006000000000000000000000000000000000000000000000000FF0BEE00000000380182 38010819C9BC1821A099018000026006006006006006086106346000006000006000006000006006 006006000000000000000000000000000000000000000000000000FF500700000000580180180148 1A098018218918290040016008806406086006006C2E20601000600100602045600100400E806006 000000000000000000000000000000000000000000000000FF8B4800000000188182380100180180 180980580100002A622600600604600608E00601620040E000106000006000006006006006000000 000000000000000000000000000000000000000000FFCE1400000000180180180100180180180180 18010000006000004006006006006006006000006000006000006000006006006006000000000000 000000000000000000000000000000000000FF3B52000000001801801801001C01801A0180180100 00006006006006006007007006006000006000006801006001006006806006000000000000000000 000000000000000000000000000000FFE97F00000000180180182310180180180180180101000860 0004622E106006006016116000006000006010006200004006006116408000000000000000000000 000000000000000000000000FF099F0000AA0A1901821811415A118118018238411041A4645650C0 86006206046006406420416000006880906040004006046006000000000000000000000000000000 000000000000000000FF58650000010000858218018019E78010010018018000A1602600E0060060 07007006006206006000016000006000006106100066000000000000000000000000000000000000 000000000000FF14AD0000AB0A0041D0182BA0D85180920104184188200260003060160862060460); SDR 8000 TDI (82A02A8000AA80002A82A82A82A82202A80000000000000000000000000000000000000000000000 00FF5761000002200800800A00A00802A40C02A008008000842A0300300100000300280300200100 2000002000802802002802902802000000000000000000000000000000000000000000000000FFB1 740002000012012012004012202102C1001000000080482100100480480400500500481080000080 4000004800000004814004000000000000000000000000000000000000000000000000FF7C130000 00001801801801945881813945A03821800008C08640600600600640600600600040600000600089 604600E506286906000000000000000000000000000000000000000000000000FFEB28000000400D 00844C40800C10CC0800950E82800100301300344228300290B40340200100200108200000300394 2853002012000000000000000000000000000000000000000000000000FF123B0002000810200002 402002003422C20004020000928808E08C44184808200800E0100008000000000110080000001098 1100000000000000000000000000000000000000000000000000FF90D2000000000901885880C218 10820C05801800800000400200208200200608240A002000002000102001002002002A0200B02200 0000000000000000000000000000000000000000000000FF56E60000000002002000001400200841 0840000400000061860002014002A1000200000080E0000088000020020682886040021800000000 0000000000000000000000000000000000000000FF1DBB00000000000A6020282060000000005221 600000296006000001008001830000080000028000220000080040250D0820008000000000000000 0000000000000000000000000000000000FF7295000080009881869801889980818A01ADD8818000 000210080006A0600650608600600000200080E00081600010400600680600000000000000000000 0000000000000000000000000000FFC928000000281CA1941A41889A00A84909805A818000820C86 8832862868960C7097006000A0000040E000106C0282E20749602E00000000000000000000000000 0000000000000000000000FF204100010001180B80B909A23CC08308058D1845800051600E20E006 0164462064062861000AA000126000C0600020404F00650600000000000000000000000000000000 0000000000000000FF1899000000001801801801801800A008018018010000806000004006006007 80780600600000000000600000600000680600680600000000000000000000000000000000000000 0000000000FF1DFD000000001901801801801AEB0A1011905C518001500016000006046006016017); SDR 8000 TDI (00000000410000080000040040020000000000000000000000000000000000000000000000000000 FF95050000000000000000018A200800000400A00008000060065000004200000002B01080000000 00000040104006020224000004000000000000000000000000000000000000000000000000FF38B5 00000000080080080080081280080180080180803A80820164061020400200022620000120000021 00022302102102002002050000000000000000000000000000000000000000000000FFACD8000400 40040142140040141148040040040012210142010010010050010410410010090000090000010004 01201001021000000000000000000000000000000000000000000000000000FF6642000400400C00 C00C00C04C04C00C02C0AC0082210020030830030430010032830130090020090020010420034234 03043002000000000000000000000000000000000000000000000000FFF65A000000001801841801 941801881801801801810054430620600620600000600E5460000060000060200860060060460060 06000000000000000000000000000000000000000000000000FF2296000200000401201200201201 2002012000010000844C010040048048008050050048000040008040008008008048000B48000000 00000000000000000000000000000000000000000000FFF144000000000800800800800044800800 000A0000000020420020020000000020020020000020000020000020020020024020020000000000 00000000000000000000000000000000000000FFC30B0000AA0000AA4AA0AA4AA0880AA4AA0AA4AA 00002880882A8AA92A82A92A82A82A82A82A80012A80002A82A82A82A80502A80000000000000000 00000000000000000000000000000000FF8BDD000000000000000000400242000004000400000000 02000000000000000000000000880000000000000000008000008100000000000000000000000000 00000000000000000000000000FF8F110000AA0000AA0AA0AA0AA0AA0AA0AA0AA0AA00002A84A82A 8AA82A82A82A82A82A82A82A80002A80002A82A82A82A82802A80000000000000000000000000000 00000000000000000000FFB60A0001522005545543541541102D03483541540000D50930D50D50D5 0550D50D50D50420D50000D50000D50D50550D504C0D500000000000000000000000000000000000 00000000000000FF9F86000400000400200400000600400000400000000100100100000000100000 10010010000000000000010010018010000010000000000000000000000000000000000000000000 00000000FF5AB80000A80002AA0AA0AA0AA0880860080AA2AA00002880882A82A82A82A82A82A82A); SDR 8000 TDI (156000006000006006006006006006000000000000000000000000000000000000000000000000FF 48AA0000000010018018018018418038018010018000806006016006006800006006006000406000 006000002006006002006006000000000000000000000000000000000000000000000000FFA1F900 04000AB2ABAAB8ABAAB889CA98AB8AB0AB800028E0882662AEAAE2A82AE2AE2AE0000060002AE000 2AA2AE2AE2AA2AE2AE000000000000000000000000000000000000000000000000FF31A600000000 1401C01A01C01803803C01C01C218000006047157006006000004006006000006000006000006046 056002006002000000000000000000000000000000000000000000000000FF0044000000355555D5 5955D55953913D55D55D558000D56150507556556550554556556000216000556000556556556552 556556000000000000000000000000000000000000000000000000FF95F60000000AB8AB8AB8AB8A B8C98888AB8AA08B8000ACE28E2062AF2AEAA82AC2AE2AE0002A60002AE0002AE0164862AE2AE2AA 000000000000000000000000000000000000000000000000FF38E6000000001A01A01801A01C01A2 0801800801800000640000E0078060000040060060000C6000006000006006006006006002000000 000000000000000000000000000000000000000000FF99630000002AB8AB8AB8A98AB8898C88AB8A A0018000A880A80262AE2AE2A82AC2AE2AE0000160002AE0002AA7062262AA2AE2AA000000000000 000000000000000000000000000000000000FFD9AB000400001801801801801A03800A01A00A0580 0004000640E8060060000040060060000C6000006000006146016006006002000000000000000000 000000000000000000000000000000FFE6D10000000018018018058018218248018010B180000062 0008600600600000600600600021600000600000600E086006006006000000000000000000000000 000000000000000000000000FF13FD00000000180180180180188191080180D801800052600600E0 060860200060060060400061001060800860860C6046046006028000000000000000000000000000 000000000000000000FF126500000000180180184190780180A8958099D1810022802600600E0060 00004006006420006080486000002006006002006002000000000000000000000000000000000000 000000000000FFAE1200000000180180980182983182310180180180000100200064160060000040 86036000016000016000002006006082006002000000000000000000000000000000000000000000 000000FFC1EA0000000000000100419501200A000A00203000800060060000000000000001000084); SDR 8000 TDI (0041806001006006084206300004000000000000000000000000000000000000000000000000FFCF F8000001802401C01C01C01801001003A01201800020E01684700681F04700680700640700002100 6001007507041006011004000000000000000000000000000000000000000000000000FFF9880000 01C00401E01A00401811901401801801800010600000700700700700700600600680000000600002 7006005005001006000000000000000000000000000000000000000000000000FFC0FD0000018000 01801801801801831001A4300180000260470060068060060068060060060000000060000CE00600 4004000084000000000000000000000000000000000000000000000000FFCA3E0000018004018018 00401801905001801A01800000600000700600680700600680600600000100600140500700155400 1416000000000000000000000000000000000000000000000000FF7E880000018AA0AB8AB8AB8AB8 AB8050AB8890AB800028E28E2AE2AE2AE0062AE2AE2AE0062A80002AE000414AAE2AC4442A802600 0000000000000000000000000000000000000000000000FF47020000018000018018000018018AD0 01809001800000620000600600600601600600600600000000600000600600600600000600000000 0000000000000000000000000000000000000000FFDE320000018AA0AB8AB8AB8AB8AB8290AB8AB0 AB80002AE08E2AE2AE2AE0062AE2AE2AE0062A80002AE0000A62AE2AE08C2A828C00000000000000 0000000000000000000000000000000000FF3E5D0000019521559559541559558011559451558000 556130556556556006526556556006550000556000556D5655655655055600000000000000000000 0000000000000000000000000000FF4C620000018000018018018018019010018010018000006226 00600600600600600600600600000000600000400600200400002400000000000000000000000000 0000000000000000000000FFCACC0000000A90AB8AB8AB8AB8AB8038AB8010AB800028E0AE2AE2AE 2AE0002062AE2AE0002AE0002AE0002AA2AE2AE2AA2AE2AA00000000000000000000000000000000 0000000000000000FFF9A70000000030018018010018018518019150018000026000006006006000 00E00600600000600000600000600600600600600600000000000000000000000000000000000000 0000000000FF9FA800000000100180180180180190180182100180000064060060060060000A6006 00600000600000600000600600600200600200000000000000000000000000000000000000000000 0000FF8984000000001001801C01001805801A01A012018000046240886806006000006006006000); SDR 8000 TDI (01004001001001000801000800000000000000000000000000000000000000000000000000FFA7D3 000155800555955955D55915955955D55D5580005545565575565565575575575575560000015560 015575564B6556000556000000000000000000000000000000000000000000000000FFD6360000AA 8000AA8AA82A8AA8C88AAAAA9208AA80002AA08A2AA2AA2AA2AA2AA2AA2AA2AB0000002AA0000822 AB22A88A0000AA000000000000000000000000000000000000000000000000FF188A000001000200 20000040122000100100020100000040010008048000000010008000000000008000008010000000 01001000000000000000000000000000000000000000000000000000FF22850000AA8000AB8AB92A 8AA8888000AA8108AA80002884AA2AE2AA2AE2AE2AA2AA2AA2AA0000002AA000C522AA3224420004 02000000000000000000000000000000000000000000000000FF715F000000000000000081800002 0400000C90000000026006000000000000000000000000000000000000446006000D560014160000 00000000000000000000000000000000000000000000FF88A000000000000000000180002010C000 00400000000062060000000000000000000000000000000000000898001100000000A00000000000 00000000000000000000000000000000000000FFF4070000018000118018018018A0801001801801 80000080000060260060060060060060060000000060008250160028040010440000000000000000 00000000000000000000000000000000FFCCE700000180000381590C00D80888382380180B800008 040644601644641600600601600600004001600000420600E20C00040C0002000000000000000000 00000000000000000000000000FF7F7300000180000380188B84B8A685183380180B800040600620 6006106006006006006446000000006000106A060021060100060000000000000000000000000000 00000000000000000000FFD5B7000001800009809800021808809801801001800010E00000600620 600600600600E26600000000600000610E00600E4102260000000000000000000000000000000000 00000000000000FFB5DB000001C00001C058002018010A3409C01801800048020604604F12720E00 700680600600002000E0008A700600C28681000C0002000000000000000000000000000000000000 00000000FFD613000001800201801801801813101001801801800004000804700600602680610610 64060000000060000242060C0A041008040000000000000000000000000000000000000000000000 00FF7B35000001802001801800001803001005C01001800045600000600600600600610710602600); SDR 8000 TDI (000000000000000000000000000000000000000000000000000000000000000000000000FFA5FA00 00000000000000018000000000004000000000006006000000000000000001000000000000004000 000000001000000800800000000000000000000000000000000000000000000000FFAA2300000000 08008818008018008008038018008000000002002003002002002000002002002000002002002002 002002002002002000000000000000000000000000000000000000000000FF2D3600000000102500 00001040010025502080140800404000320008000000000010290008000000041000480080000820 480008000000000000000000000000000000000000000000000000FFA97200000000080080098480 0840A02800800980880014200200200A00200200200300200A002000023002002002002002062002 002000000000000000000000000000000000000000000000FF076200000000180180180180180180 3801801C01800004430708700680608700E006007006026000006006006007006007006006806000 000000000000000000000000000000000000000000FFA16E0000000010230810000814212000A901 910A00006A400088000040040440404C38C004004140000144284084004024284000000000000000 000000000000000000000000000000000000FFA172000000000800800800C00A00800800800A0080 000423020030022020030020020820020020800020A2002002002002002002002000000000000000 000000000000000000000000000000FFAD8800000000000000000020000000200001000000002000 00080000000280208020000000000040000000000000000000000001800000000000000000000000 000000000000000000000000FF0DC500000000000000000400400000040400008000000000004400 00000000000000000800020000000000000000800000801010000000000000000000000000000000 000000000000000000FFF1A700040000020020000000002200040000040000000202408008000000 00800801000800000000000000801000200000001000000000000000000000000000000000000000 000000000000FF532B00000000000000010020000000000020000000000000000000010000000000 000000000000008000000000000D0000000000000000000000000000000000000000000000000000 000000FF33CF8004AA8000AACAA82A8AA0888AACAA0AA8AA800028A08B2A82A92A9AAA2AA2AA2AA2 AA0000002AA0002AA2AA003AAA0012AA000000000000000000000000000000000000000000000000 FF838100000100040140100040120400120100240100000040210048050040040048048040048000); SDR 8000 TDI (200602700F006006006006006000000000000000000000000000000000000000000000FF02410000 00001801801801A01E01800801911801000000600603600688400600600400600680600000000602 6806806006006006006000000000000000000000000000000000000000000000FF2A330000002018 01A41800001801E00801801801800100E01050E90600400640700450600609600000000680600600 6006006006004000010000000000000000000000000000000000000000FFEF370000000018018018 81803823881821801901000000E20600400400600600600400600608600000000600601610602690 6004006000000000000000000000000000000000000000000000FFB7E0000000001811E01800011E 01E018A3881901802010614000680601600600E0040060060060000501060060C604601604605600 6000000000000000000000000000000000000000000000FF25DC000064061B0B8119879098519608 01845A01000005660620E80700C10600641E186006606000C2E00600680600600600E82C80400000 0000000000000000000000000000000000000000FF09FD0000800158038058000059018098098118 010000406000CB40AC22600600608603601600600100600600700648E1261160052A400000000000 0000000000000000000000000000000000FF5E1E00010000DC01A05801805801890011ACDD018000 4500A00C612724410600680405601600600000680600602682E80F0C78042A400000000000000000 0000000000000000000000000000FF685A0000000018018098000018018010018498498000010006 C0E00420600E00608408700600610002600609600600600601608400400000000000000000000000 0000000000000000000000FFAC73000004001B018118001019518029C5C018010040106200006016 02C00601650680F00E80600040710600610758714600620600600000000000000000000000000000 0000000000000000FFC32A000000001801C018018018018818218018018000016006006006006006 08600610600608E00000600601600E10600600640600400000000000000000000000000000000000 0000000000FF5D3E000000001A01801800001801881041821851800000000640E006206016006886 80E01710E08002600610600600600600690000600000000000000000000000000000000000000000 0000FF835D000000001801809801801801805901811800800000020000400404E006106006006006 006000006006006016006006016000004000000000000000000000000000000000000000000000FF 9C5C0000000000000000018000000000000000000000006006000000000000000000000000000000); SDR 8000 TDI (06816006007026807806804000000000000000000000000000000000000000000000FF9DAC000000 000C01001801800801800C458018018000C0600620220608600E0060060862AE20E00000008E2360 06006046006006002000000000000000000000000000000000000000000000FFE068000000001001 801800001011801801801A0180010060000070070060060068040050060060000020060060060068 07026004004000000000000000000000000000020000000000000000FF299E000000021001001807 C01001A00823881983800000600608600600608608E80400C00601600000200700E0060060060060 05004000000000000000000000000000000000000000000000FFB5CF000000001C01801A000A1821 801C89833C45800002E08040602E08600600600C22C40E08600000210E4C60060068260068040020 00000000000000000000000000000000000000000000FF30FF000000021801001801801901800823 901811800000600608640600608E0B65241040A640600000200600E0060060060060040020000000 00000000000000000000000000000000000000FF1C93000000001001001800001001800801801801 80000060000020060060060060040040060060000020060060060060060060060040000000000000 00000000000000000000000000000000FF14BD000000401001001C01801001A00801801A01800100 60068020060060060070040048060060000020070060070060060060040040000000000000000000 00000000000000000000000000FFA9BE000000009D01005800101809844891881801800010600000 204600600602601600E00600600001324600600600600640E0068040000000000000000000000000 00000000000000000000FF7675000010145809001281809C018008218118018C0020608650248608 608600620604683600600008208600E2268060070060142080000000000000000000000000000000 00000000000000FF492100000042980D81188184DD41800A01809D8100002D60070E400400400600 6206006006006000002007006216006106106C440040000000000000000000000000000000000000 00000000FF97DA000400481A01C098000858C5800841C11801020002600010600600400600600600 E0060160000028270060061060469862078040000100000000000000000000000000000000000000 00FFA249000010005905805801845851C24B5188180108010179064072C408410604600C04605600 600010A30600E03600610641682CA16000000000000000000000000000000000000000000000FF2E 64000400001801841880401801900801C81901000100620822608688400640600448600700600000); SDR 8000 TDI (0048050040048048C8A00000000000000000000000000000000000000000000000FFD04300001001 1203A01801821201911A01901913800008C106014146286006006406006286146000246006106006 086486046006006000000000000000000000000000000000000000000000FFBAB40000004C0D40C2 0C4AC10C82C00810840C00800100304B2C3403043403402842A8200220200100B903C0A203423822 0030C3482000000000000000000000000000000000000000000000FF43B000000022200428820003 220020000100A2220000924800880C00940808C00000400008840000840081001000C40041000880 800000000000000000000000000000000000000000000000FFA31D00000000180080080080180080 0A02A81808800000000200200620648220A00000080288200000200211200200220200200220A000 000000000000000000000000000000000000000000FF745C000010081340000005A8908C08B40020 00000000006106500280400000001001200F000000004172000002A81809A82C00685A0000000000 000000000000000000000000000000000000FF379F0000001100A000203384010000020012000400 00296036078140088000001801100000700000020000081400820401028200000000000000000000 000000000000000000000000000000FF16E700000204800B8618418000011118B184199100000080 C820000600600602646600600680E00008092642E80620E006806104000000000000000000000000 000000000000000000000000FF666F000002208201AC1A04284211283801A8BA0D000082888684F0 0701708F42E026A06A0E3160008C01070060064574A608ED048B2000000000000000000000000000 000000000000000000FF9D030000001240CBA0DC218301012118A3841921000150602E4865062860 060060060060068060000002260AE52E106816226056402000000000000000000000000000000000 000000000000FFE32400000020000100180000000120080180180100000060000060060060060060 06006006006000000006807806006006806007802000000000000000000000000000000000000000 000000FF2A68000000400C0180180014094180191185585180010501060020568060060465544440 06106000000007106006006047026006004000000000000000000000000000020000000000000000 FF647700000000080180180180081180180380180180000000000020070060060060040040060060 00000006006006006006006804002000000000000000000000000000000000000000000000FF6168 000000000C01401800200801A0082180180180002060000028068060060060060068070060000000); SDR 8000 TDI (2002022022002002042400000010000000000000000008000000000000000000FFB7180004004004 0059008240458140040040140000011004010A900500100100100100100108000020100100910110 1001000001000000000000000000000000000000000000000000000000FF375F000410C00C00C008 80C10C00C00C00C00C00900100200B0D340300300100300B50100308200040300301300300310308 A003002000000000000000000000000008000000000000000000FFA2C90000018019030018038018 01801805805801810044C00640602600600000648604000601642000648614600E04604640600600 6000000000000000000000000000000000000000000000FFDB2C0000010002012012800012010200 012012010000844C0080080400400100400500080480000081000480500480080080088000000000 0000000000000000000000800000000000000000FFEA67000000A00800800800800800B148008008 92800000200200200000000000200200000200200000200200200200200200203280200000000000 0000000000000000000000000000000000FF7D470000000AA4AA0AA02A6AA0AA4402AA0AA1200000 2880A82A82A8AA82A82A82A82A92A82A80002A1AA92A82A82A82A82A82112A800000000000000000 0000000000000000000000000000FFB77F0002000000004000002004000920002004000000000400 0283408800000000880000000000001010000010000000000004402A000000000000000000000000 0000000000000000000000FF00300000000AA0AA0AA0AA0AA0AA0022AA0AA00C00002A82882A82A8 AA82A82A82A82A82A82A80002A82A82A82A82A82A82A83002A800000000000000000000000000000 0000000000000000FF54B10000003543541543541541542003541541340000D50910D00808450550 D50C00550D50D50000C50551550550D50D50D5091081000000000000000000000000000000000000 0000000000FFC73F0002004000004004002006001100004006200001001021001000800001000001 00000100000100000080100100100100104000000000000000000000000000000100000000000000 0000FFECEE0000000AA0AA0AA02A0AA0AA0400AA0AA00000002880C80000000802A82A82402A82A8 2A80002202A82A8AA82A82A82A8000020000000000000000000000000000000000000000000000FF BF9B000000200A00A00B00800800A14A002008008000842802C0B0AA400003003032003002802000 902802002002802802802C02892000000000000000000000000000000000000000000000FF22CF00 00004010000002002010003400012012AA0000804A408C4C04835005004104004805004000810004); SDR 8000 TDI (AE2AA2AA2A82AA006000000000000000000000000000000000000000000000FF3FF0000201A01C01 255801A01C01C01A01A01A4580010060464160060060000060060000060000000040060060060060 02000046004000000000000000000000000000000000000000000000FFE336000001955D551558D4 151D558219559559558000D52150094D565565505565565505565500005545565565565525525505 56006000000000000000000000000000000000000000000000FF98930000018930D29018AB8A98CB 8AB0AB8AB889800028E28E026AAEAAE2A82AE20E3402AE2AE0002B22AE2AE2AE2AE2AE2A848E2840 00000000000000000000000000000000000000000000FF1037000001A01A0080180000380188DA01 A0180180000022002468060060000060060000060060000020060060060060060000062AC0000000 00000000000000000000000000000000000000FF2CB70000018E100082182B8858898AB0AB8AB8A9 8000AC80A81042AE2AE2A82AE3462302AE2AE0002A22AE2AE2AE2AA2AA2A80020760000000000000 00000000000000000000000000000000FF019D000001811914901900001A45801801801801800002 440654E0060060000060060080060060000020060060060020060001460060000000000000000000 00000000000000000000000000FFFB2700000180504000D800053801801001001803800000600000 200600600000612E08000600600001200600600600600600020E30E0000000000000000000000000 00000000000000000000FFE25E000001801808005941801805841811041801844008200622600610 60000060060000060060080220060060060060060400060260000000080080000000000000000000 00000000000000FFDC5800000180182C001880001803821863021821800000028601200608601800 600616008664608800200E0164060060020000060000000000000080000000000000000000000000 00000000FFF4FA0000018418C0001801945801805885011841800000450000050640600000640640 010600610000A0161060060020020020000004080000000000000000000000000000000000000000 00FFEA640000000400040000418C0000002008008000022000600602028000000000040048000004 0000048000000200000000020000000010000000000000000000000000000000000000000000FF11 8D000000000083008001808000000002000000080010E20E00044000000000009010000001404000 610012011010410430C000000000000000000000000000000000000000000000000000FFFD470000 09800901805800807800800901002801808032400261200240600000220222000200220000220211); SDR 8000 TDI (00580480600E006000000000000000000000000000004000000000000000FF908F00000000180580 1001801801000001A01801000002400609600600600080600000600680000001000680680610E0CC 00640600E000000000000000000000000000004000000000000000FFB42D00000040180180180020 1C01800A018010018000004200026004006800006001007006010000001006006006C044040060A4 126000000000000000000000000000004000000000000000FF21C00000AA0AB8A98AB9AB8AB8AB8A A8AB8AB0AB800028C0AE2462AE2AE0002AE2A80062AE2A00002B02AE2AE2AE4261042AE04C306000 000000000000000000000000004000000000000000FF31F700000000984380100000180101100380 10018000000000414006006000006000006006000000808006006006004006006206326000000000 000000000000000000004000000000000000FF7ABF0000AA0AB8A98AB02B8AB8AB0AB0AB8AB0AB80 002AC08E08E2AE2AE0002AE2A80062AE2A00002A02AE2AE2AE0CC02C2AE11622E000000000000000 000000000000004000000000000000FF5CA600015412591195595415595594591195515580005505 30146556556000556550006556548000D405565565565545564B6096016000000000000000000000 000000004000000000000000FF470C00000000180380180180180180180180100100000044262040 04006000006000006006010000000006006006004404006204006000000000000000000000000000 004000000000000000FFD7690000AB8010A18AB82B8AB8AB8010C98AB8AB800028E08E0002AE2AE0 002AE2AE0002AE2A00002262AE2AE2AE2AA2AA020042004000000000000000000000000000000000 000000000000FFFA86000001835001801800001801809003801801800002200004E0060060000060 06000006008000006006006006002006480046236000000000000000000000000000000000000000 000000FF493B00000188100B0018818018018C304180180180000064265000060060000060060000 0600000010E006006006002002008316106000000000000000000000000000000000000000000000 FF285D000001803001401800401A01A4100180180180000422204120060060000060060000060000 0000600600600600200600000620E000000000000000000000000000000000000000000000FF8621 00000180100180180180580188100180180180000060060460060060000060060000060000000040 060060060060020000060C6000000000000000000000000000000000000000000000FFEF3D000201 EA92AB8AB8AA0A98AB80B6ABEABAAB8000A8A088084AAEAAE2A82AE2AE2A82AE2A80002AC2AE2AE2); SDR 8000 TDI (B02AAAA2322AA0000000000000000000000000002A2000000000000000FFDEE00000000004000000 00000200020001400000000020020000100100000100000000100081000000080000100000000000 0000000000000000000000000000000000000000000000000000FF55090000000AB8AB8838AA8AB8 8181F8AA90090080002AA0AA7020022AE0002AA0002AA2AA2A20012B22AA2AA2AAC021022AA0022A A0000000000000000000000000002AA000000000000000FF08AC0000000000000010018000090400 00144040000000440600044000000000000000000001600000600000000040740600640000000000 0000000000000000000000000000000000000000FF0EA00000000000000280018000220800000100 9400000060060A81080000000000000000008000010080000000001280A88000D000000000000000 0000000000000000000000000000000000FF6DC30000000418218000119058000050018019010100 08440040414420E00000640800640709640100201600600700480500600400600000002000000000 0000000000006000000000000000FF25030000000018038021000098501010238018219000024006 02600600600010600051608600602000A00620600600640410600400608000000000000000000000 0000006000000000000000FF1A0F0000000018018020018498080010118018218000404006026006 00604000600000608600600000A0060160060060060460044060D000000000000000000000000000 6000000000000000FF5A420000000018218000080058700038018010818880004200044086006000 14620008620600620100210600600640600618601400600000000000000000000000000000600000 0000000000FFA4260000000418038008803258008814358018018000544006406826C16020906008 20E007116040003016A0E806004A0602600620602800004000000000000000000000600000000000 0000FFBA2E0000002A1881800801801880A01001A29001800020400000600400E000006000046006 006000802006006006894005026204006000000000000000000000000000006000000000000000FF C7850000000018018008104058808018018118010000354040006007007801006040007806006000 002006406006306017126406006000000000000000000000000000006000000000000000FF3BF100 0000541C01C00809C01C10801C01A4300180000AC026006006007000806021047006806001003006 A0680701700F006004006000000000000000000000000000006000000000000000FF4D2700000040 1B01A01000001841400401C05801800000400002700600E000126000006007000001801087007007); SDR 8000 TDI (02002002003002000000000000000000000000000000000000000000FF0A2C000000000411000000 0414000000A040000411200000000800040008200400001000000000008048000201500000001000 00000000000000000000000000000000000000000000000000FF6C69000000800A00800806800C00 80080080080080210420020020120020020220030820020020000020031820020020020620020020 02000000000000000000000000000000000000000000FF2421000001801A01A01801C01401801001 E0180180000060060060070860060060060060060060000260060860860060070060060078060000 00000000000000000000000000000000000000FF88F30000010002830010A00210010014A1001002 088002000128000C4440040100000000000100011040040240A80040040840000000040000000000 00000000000000000000000000000000FFF95B000000800800800800C00C00800800000000800080 20028030010000020020020020020020008420020020830020020020030020020000000000000000 00000000000000000000000000FF010A000000000000000000000000000000000000000080000000 08002A00000080000000000000000800000000008000000000008000000000000000000000000000 00000000000000000000FF2AD2000000000010000400000000000200200000000000000000000000 00400000000000000080000000000800000000008000000008000000000000000000000000000000 00000000000000FFFE39000000400000200100200000002000000000000000002000000080000000 00010010000080000000000000000000000000008000000000000000000000000000000000000000 00000000FF1EAD000000000200004000000200000000000000000000000000000000000080000000 00008000008008000008000010000000000000000000000000000000000000000000000000000000 00FF9A970000000AA8AA8A882ACAA8AA8ACEAA0AA8AA80002AA28A2AA2AB2A80002AA0002AA2AB2A 20002AA2ABAAA2ABAAB2ABAAA2AA2AA0000000000000000000000000002AA000000000000000FF96 7E00020000140140108020120D101001400402000000004004084100400100500000500500000100 1005005004800C00800100004000000000000000000000000000010000000000000000FF7E6A0000 00555D55F53155955D53111155955B558000156156556556556001556801557556546001D57556D5 7556556556556557556000000000000000000000000000556000000000000000FFF5B10002000AA8 AA8CC82AAAA8A08208AA82A82880002AA28A01228A2AA0002AA0002AA2AA2AA0002A22AA2AA2AA8C); SDR 8000 TDI (006006184806000000000000000000000000000000000000000000FFCADE000001801001A01801C2 08018010039018010000844006086026906006006007016007006001006006006004006806006006 006006000000000000000000000000000000000000000000FF9F92000001901881801840028A1188 1209801801800088C400006816006406006006006016006000006106006214806416006804807806 000000000000000000000000000000000000000000FF2BF8000101811005987921804D0D800D0181 1881000000620615F2060060060561E614618E05E0000240060061C510600E946007004006000000 000000000000000000000000000000000000FFCE8600000184104184180010080180080180188100 0000600080640610600600680600A0060860000A000E0060040060270068260A6006000000000000 000000000000000000000000000000FF8F7A000001B21845C218018C2805A8080181180180000060 0010600708620600E00600600608600000608E8064461074060060460C4006000000000000000000 000000000000000000000000FF4379000001801801D05800004C21880C018018059000006006C062 0608600600680600200604600000C0860061260060060D6086006006000000000000000000000000 000000000000000000FF6D50000101811101801900010901C0851B80180100001102000460160060 068C6086156006046000104806006014006846946006024006000000000000000000000000000000 000000000000FFB42B000001C0180180180182484181001580180180000060060260060060060060 0E086006806000064006806046006006006006004006000000000000000000000000000000000000 000000FFCC42000001801801D05800240C0180000180180188000004060260060060069061168060 060460010170860060840070068AE106044006000000000000000000000000000000000000000000 FF80B800000180180180180180100190000180180580000000004004061060060060061060060060 00004006006006006006006006004006000000000000000000000000000000000000000000FFB23A 00000000000000000180000000000000000000000000060000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FFA687000000 00000000000180000000100000000000008000060000000008000040048000040040010010010000 00000000000004000000000000000000000000000000000000000000000000FF02DC000001800904 C01B4080080180180180180080000020024020020060020020020020020020000000020020020020); SDR 8000 TDI (6005006000080000000000000000000000000000000000000004FF461E000001801001401801801C 010A18018098A9800080600600600600600800E00600280600600000000698704600600600600400 6000000000000000000000000000000000000000000004FFF243000001A01801801A0020B8018A18 23809A0981200240008260860A700000E09600A1060C600100000600600E00600480600400600000 0000000000000000000000000000000000000004FF2E080000018010018018018818018018818019 21800000644600600600600800600600200600600008000602600600600600600400600000000000 0000000000000000000000000000000004FF95910000018010010018000018010018018018018000 00600000600600600000600600200600600000000600600600600600600600600000000000000000 0000000000000000000000000004FF9F76000001801001001801A01C010018018018018001006006 00600600600000600680000600600000000600600600600600700400680000000000000000000000 0000000000000000000004FF2C5D200401801031805A00021801C118A58058018000004200106106 10600000680600600680601080020604602610600400E04680600000000000000000000000000000 0000000000000004FFA4672001019450018410419010058018119518418000A540D622604E026420 44694601628600600080810611610601611502600404680000000000000000000000000000000000 0000000004FF8EB50002C1883005801D81820C03841801823821000020C00600600E406206026003 00408600600080C08600600400600610600700400600000000000000000000000000000000000000 0004FFB92C000201841003C138000C0801E01845C0980100000260000C60C6226036016004040206 40600010000602600408600E886806407006000000000000000000000000000000000000000004FF C1A1000221841449841841C00801849155901801000100432F226046086006406146014007006008 006206896145016106056046026006000000000000000000000000000000000000000000FF832800 0009801001C01800200841C41001C01D41000080400090E006006006006006808006806000004006 007004006006006026026006000000000000000000000000000000000000000000FF2A6200000180 1001801801800841841821801A01000000400600780600600E016006A06006006000002006806804 046046006046444006000000000000000000000000000000000000000000FFDBC1000011841A0181 18004008019818018819418000026000056006086006006006242007406000902006006004826026); SDR 8000 TDI (02422900000000000000000000000000000000000000000000FF6040000020200208200200210001 20101520320C000085080880048C804000820E00C40D00C00000218001030800000009100820D400 00000000000000000000000000000000000000000000FF9B1C000201820801842800820800C00800 C0080180002821022A200200208001208328200A04200008000A1020028220230120028020000000 00000000000000000000000000000000000000FFE01A0002800580910880658C048B00C280008080 000002003600100008120000602610800600600100101020C318E488D00003440010A00000000000 00000000000000000000000000000000FF9A5B00021008604400400190A0202800020A0102000000 0006019A015200000400008000000000000201200010009801000280802200000000000000000000 00000000000000000000000000FF1676000101801822021813801840001A09A01821800000008050 01060060000061060142260060001004060860A600600420601C00E1000000000000000000000000 00000000000000000000FFBA0E000001A2DAA0205A20249A0811180994BC29800090290E80E08E84 6200806D2628CC268060000C100688E89604E8D6C568AC84E0200000000000000000000000000000 00000000000000FF310800034188180A131C038859240019058019058001226026346A0610608002 600600700E00600120882E2262263060048064062069000000000000000000000000000000000000 00000000FF75B4000001801000001A00001800601801801801800000600000600780600000600600 60060060000000068060060060060060060060000000000000000000000000000000000000000000 00FFD202000001C01800C01A00315800801945801801800004400600600604600000600601200600 60003000260C6016006004026006006000000000000000000000000000000000000000000000FFBB FB000001801800801801801800801801801801800080400000600608600180600600000600600000 0006826006426004006004006000000000000000000000000000000000000000000000FF4B2E0004 01E01200E0180020BA00801801801B01800100200008700641600000600600600641600804180680 4886006005006006807000080000000000000000000000000000000000000000FF05CE0000018010 00801801A15800C0180180180180A000222712608608700000608F0060860A600040000604612600 6004006006006000000000000000000000000000000000000000000000FFF782000001801C010018 00001801401801801901800000600000600649600000600700200641600804102608600644600682); SDR 8000 TDI (003000000000000000000000000000000000000000000000FFC3D300805580580180100581100581 1801845881810001608600600600600000610600E00600600002E126006006406006006006016000 000000000000000000000000000000000000000000FF37C100040020120000120034100100120100 14010000C48840A4080480400080490090C800800000C40800804804800800800800800800000000 000000000000000000000000000000000000FF25ED000000800800A0090080CA00A0480020080080 00102202092002000800002452222002002000012002002002002002002002002000000000000000 000000000000000000000000000000FF4DED0000AA0AA0AA0AA02A0440AA0AC0AA0AA0AA00000000 880012A92A92A82A80000402A82A80004802A92A92A82A82A82A82A82A92A8000000000000000000 000000000000000000000000FF8A0200000020000000000000800001040000000000000002400000 01000000800011080000000000008001001000000000000040200000000000000000000000000000 000000000000000000FF11370000AA0AA0AA4AA0AA0884AA0A80AA4AA0AA00002204A81282A82A82 A82A82B00082A82A80000102A82A82A82A82A82A82A82A82A8000000000000000000000000000000 000000000000FF1B1400035412A3543542D42443545001545543320000A00910CA8D50550550550D 40450D50D50000AC0D50550520D50D50D50D10910550000000000000000000000000000000000000 000000FFF38B00040060040000040040000040040000040000011090014000000000018010013010 01000001121000000001001001001001000000000000000000000000000000000000000000000000 FF83800000AA0220AA0AA02A1002AA2E42AA2AA02200001500A80002A82A82A82A80002A02A82A80 000082A82A80102A82A82A80000402A8000000000000000000000000000000000000000000FF492C 000200810A00A00A00B4C800810800800C000000A22802803000800000002C528128028020009008 02802802802802802842C12000000000000000000000000000000000000000000000FF0585000001 2800010003002002012030010012890000910A00CC8005004000800900804800800000C40004000A D4004000804A908C4000000000000000000000000000000000000000000000FF061900000184BA21 205813851801003805A01803800004600E21600640600000640654400640600010090E0960062A60 1600602E106000000000000000000000000000000000000000000000FF62D8000288C00C14C40C40 C80C20800E10800C808001013103102D0208280103310200B5030420000114038021128038A20931); SDR 8000 TDI (6000000000000000000000000000000000000000000004FFF0F50004AB3018C90288AB8888918AB8 AB8AB8AB800032408E0872AEAAE0002AE2AE0862AE2AE0000062AE1262AE2AA02E2A80862AE00000 0000000000000000000000000000000000000000FFA300000601801801800900000A01A018018018 01800012400008E80600600000600600E00600600000600600600600600600000600600000000000 0000000000000000000000000000000000FFED380000AB2018A710482B8208E18AB8AB8AB8AB8000 0164884542AEAAE0002AE2AE4662AE2AE0000062AE4062AE2AA1022A80062AC00000000000000000 0000000000000000000000000000FF8CEE000001901A01C00800202811801C01A01C018000046006 20600600600000600610E00600600100600624600600650600032E00400000000000000000000000 0000000000000000000000FF6D9C00000105580912A080090003801801801801800050E4200B6006 00600000600620600600600000600609600600605600000000600000000000000000000000000000 0000000000000000FF2E3B0000018018018140418200118419018018098000006096206006406020 00E00630600640E00044600611600600A0060004B000600010000000000000000000000000000000 0000000000FFE8BA00000180180184800010008980780190180990200040460162A6106000006006 20621634E00010600600E00600610200020200618000000000000000000000000000000000000000 0000FFB61C000001801821800005808141801801801801804000020000455604E0000860060064A6 00604800E09640600E002002008000104000000000000000000000000000000000000000000000FF 187B00000000002004004194804000008008000008000002CE400000290000000000100148140000 150088100000000100008148000000080000000000000000000000000000000000000000FF1F3A00 00000001080110018230000000000080000000020106000010000000006106000006006008044044 0A0020204004024020004000000000000000000000000000000000000000000000FF279500802A80 1800805806809802848800823880888008A00A01201204204011000200A00200205040A082402212 01200200200210A000000000000000000000000000000000000000000000FF9D9600040040240040 20004044014014014004010000100000001005005001000001000000000011001001001441001081 000041001000000000000000000000000000000000000000000000FFA51D000400C00D10C12800C2 0C00C00C00C10C00900004201200300B0030010020030020020020010030030A3003003083022003); SDR 8000 TDI (06000000000000000000000000000000000000000000FF28340000AB8AB8AB0AD9AB8AD8AB8AB8AB 0AB8AB800005668E2AE2AE2AE0062AF2AE2AF2A12A80002A02A02AE2AE1063046442262AE0060000 00000000000000000000000000000000000000FFD24E00005180100B021800001801801801001801 800012E0000060060060068060060060000000000000000060060060062241060840060000000000 00000000000000000000000000000000FF5F4A0000AB8AB0AB0A982B8A98AB8AB8AB0AB8AB800008 60AE2AE2AE2AE0062AE2AE2AE2A02B00002A02A02AE2AE24E00C0842342AA0060000000000000000 00000000000000000000000000FFB99B00010395594110D95412B955955955155955800040053015 6556556006D56D5455754154000054855055655655655610C2260340060000000000000000000000 00000000000000000000FF5C0C000001801801001801801001801801001801800040000600400600 60060060020060100000000100100060060044240140840020060000000000000000000000000000 00000000000000FF28040000210AB8090A182B8818AB8AB8AB8AB8AB800020E0AE4042AE2AE0002A E2AE2AE2B02B80002A02A02AE2AE2AA2AA2200364840000000000000000000000000000000000000 00000000FFB81300011100180100D90005580180180180180180000C600020600600600000600600 600000000000801000600600600600020E2540000000000000000000000000000000000000000000 00FF815D0000050018C500100180100180180180180180000062060CE00600600000600600601000 0000000000006006006002088086006000000000000000000000000000000000000000000000FFDD 60000001001A01401000201005801C01A01C01800000E44000680600600000600604600000000000 0000006006006006000006006000000000000000000000000000000000000000000000FF0D7E0000 01201803001901801801801801801801800000600643600680600000600610E00000000000000000 6006006002000006006000000000000000000000000000000000000000000004FF6B350002AB0AB8 AD4AB82A0ABEA9EABCAB8ABCAB80002A60C80C42AE2AE0002AE2AE2062A82A80010002A82AE2AE2A A2AA2A82AE2AC000000000000000000000000000000000000000000004FF620C00000184BC01A010 01C43205A01A01C01A01800000604600600600600000600601600000000000000000E00600640200 0456006000000000000000000000000000000000000000000004FFE50A000155B55D519550545551 55955955D55955800040E510206D56D5600055655652655055000000055055655655655255655655); SDR 8000 TDI (000000000000000000000000000000000000000000FF468100000000511000000188200000011000 0000000020040628000000000048754642400600600080680E00000044680600640C004000000000 000000000000000000000000000000000000FF4E6500000002804200008184000000002200000000 000480060200000000000480080110098100000100000000000880B0288140310000000000000000 000000000000000000000000000000FF6CBE0000018000018118A182180580182180184190000000 1034410600600680480E0050C702600082680600E0070048050C4024206026000000000000000000 000000000000000000000000FFD4720000018000A180380408390180188181190180000061060060 5648E0070071060C6006496008416006086006096104004004106406000000000000000000000000 000000000000000000FF6CE20000018000A180381982188180180180180180000000060064060460 060070860BE0168AE00020E01640600608400600442625E116400000000000000000000000000000 000000000000FFA14800000181000100D88000180380182100182188000061980862860460068060 06006826206000026106206006016096104206026206000000000000000000000000000000000000 000000FF1CCB000401800801801822083801801881C09A81800000000642602EB3600600600E0060 8E80601000600E09600600E0061440040860CE200000000000000000000000000000000000000000 FFA094000085800A01921803841A01A01A818098018B001000200060060060068068860060060060 080068069168A6804004004804A06006000000000000000000000000000000000000000000FF1771 000405808801001800001C01805881009C0194004004000058070260060070060078070060100060 060160C600E017804004006006000000000000000000000000000000000000000000FF4AD8000301 800C01405801881C01A03A01401821810020031600680680700F2069060068068060000070068060 06804807005004407006000000000000000000000000000000000000000000FF6C71000001801401 921802121801E01C01E01841800008604000600680600FA068060060000000000018811070070060 04107007004806000000000000000000000000000000000000000000FFA967000401801001005801 803801801A01001801800021602600500600600600600600681000000001000080600708E8B40AD1 0C002006000000000000000000000000000000000000000000FFD863000001801A01A01800001C01 80180180180180000A00000060060068060060060060008000000000100060064440050040060060); SDR 8000 TDI (0000000000000000000000000000000000000000FFA03A000000003801801001801881801C018098 01800000600600600780600680480400600690600000600700600600600600700680600000000000 0000000000000000000000000000000000FFE72700000001000B0010000920180001AA0214010021 004000A0820000400010400400000020D080004004C4029000820020800400000000000000000000 0000000000000000000000000000FF152E000000000800800800800900800A008102000000802002 00200300000200280200200200280000200200200200200280200300200000000000000000000000 0000000000000000000000FF387500000000A0000000000080080000000000000000000000800000 00000008080000000000000000000000000800000080000080000000000000000000000000000000 0000000000000000FF27EB0000000000004000004000000000800000000000000000000000000000 00000100100008040000000126000000000000080000000000000000000000000000000000000000 0000000000FF20EE00040040000040010000000000000000020000004D0000000000801000000808 80001080800000001100100000100000100131080000000000000000000000000000000000000000 0000FF36A10000000040000000000002002000000000000000000220001000000000800540000000 000000000000000000000000800000000000000000000000000000000000000000000000000000FF CA828000AA8A88AACAA82A8AA8AA8AA8AAEAA8AA800005208A2AB2A82AA2AA2AA0022ABAA32A2001 AABAA32AA2ABAAB2AA2AB2AA0222AA000000000000000000000000000000000000000000FF8FBA00 00014010304010004802014012144014010000400020481004804005401100940800808000800809 005004800C21010040840004000000000000000000000000000000000000000000FF7B4E000555D5 3155B55955955D55D55955955F558000506116556557D57557D574C7556556546000546546557556 556557D56557127556000000000000000000000000000000000000000000FF7A7B0000AA88A8828A A8AA824AAA8AAC208AA8AA800000228A0122AA2AA2AA042232802AAA2A2000AAAAA22AA2AAA4A00A 0822824922AA000000000000000000000000000000000000000000FF879A00000120100000100020 00004000002010000000000220001000004000000810000000810000008008800800001000000000 C10000000000000000000000000000000000000000000000FFFB940000AA8C08008AA82A8188AB8A B9008AA8AB80001D20AA04A2AE2AA2AA912002492AA22A20002A22A22AA2AB102302C620120222AA); SDR 8000 TDI (00000000000000000000000000000000000000FF82A8000000001103C0090381F091000801011805 8000204787204804C160024064662260860460000560668060564400C08071074040000000000000 00000000000000000000000000000000FF133700000000100B800A0000110100182100180180A04A 400008C0A500605602600622609600782000600E0060060003002960060040000000000000000000 00000000000000000000000000FFE927000000023911A00801821811800A41811805808014400108 B82641600204700E00600F0060000060061060068040400468064000000000000000000000000000 00000000000000000000FFF0AE000000001853800800001811801855801C21800084410640600610 600610E00640E0065460000060268060060045108060370042000000000000000000000000000000 00000000000000FFB37E000000001001C82300101001000805041801804001C200004106006172C0 6C0600600644E44025E01E00655745640051310608E0000000000000000000000000000000000000 00000000FF1FD3000000001801904001869801821801801801800001400601C00610600231660602 600600600041601608C0060068000060068160000000000000000000000000000000000000000000 00FF850E000000001855800400009801801A01801C41800000440600480400604280700641600604 E00000600600600600200800600E106200000000000000000000000000000000000000000000FFF7 F500000000180180000180180882182A801801800002608040000400600240600602600630600000 604608E006002280002046002000000000000000000000000000000000000000000000FFB23A0000 00000000000001800000000000000000000000000600000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FFA0E70000002000 00001001800000001000000000000000000600000000000400080000400400000000080080400400 0004000000000000000000000000000000000000000000000000000000FFF982000000000A05A008 00A00800800804800801800000000200200300200280000280280200200000200200200200200200 2002012000000000000000000000000000000000000000000000FF1AFD0000000002100010000020 080000D0021000002000400000840000400000000004000100850000000002028001040020800100 0000000000000000000000000000000000000000000000FF0B110000004008008009809008008008 00800800800000200240200200200200200202200240200000300200200200200200200200A00000); SDR 8000 TDI (000000000000000000000000000000000000FF190400000000100180181181180100180100392980 00004006006004006000006002006006016000006006106000006000006006006000000000000000 000000000000000000000000000000FF2A3000000000100180180000180100100100180180000040 00004004006006000002006006006000006004006000006000000006006000000000000000000000 000000000000000000000000FFFECF000000001001C01C01801A0100100100180180000040068060 04006006000000006006006000006004806000006000004006006000000000000000000000000000 000000000000000000FF73CD00020000120180180000180B001801001801880000400000C0040068 0600000601600608608010640400608080E000082006006000000000000000000000000000000000 000000000000FF52E200024A001041A41911801021051C01003841800020C1060840041060001005 060C614600600000600412601000610100F506086000000000000000000000000000000000000000 000000FFD49E000000101001801881801021000C0100180180002400870800060060120000000060 2606600009600603640600200000E066002000000000000000000000000000000000000000000000 FFDAEE00000A001031841A0000100102C805001801800000441001610640600E0800800860861060 0000600700E00E006100807B16046100000000000000000000000000000000000000000000FF5448 000040081001841011801015000C01005841880002C0060120060860060004000560061060800162 06906306017100106106082000000000000000000000000000000000000000000004FF0C30000000 001001801000211201400A0100180188000440202062060060063408002060060060002060062160 07006800906006006000000000000000000000000000000000000000000004FF3C17000000001011 801801A01201202801001801800000400E0042860060024868060860061060000160060060068040 8088600E106080000000000000000000000000000000000000000000FF4FFA000000001C01841800 001C0180880180180390000044404120660070020060060BE00600600000E0074660070040000069 060C2000000000000000000000000000000000000000000000FFFD3B000000001001801001811001 011805001805800082400600400620600604680644600680600020600600E0060010000060060060 00000000000000000000000000000000000000000000FFDC45000000043801A012040C1801801803 821801800000C00040200600608600600E00600620620000600608628600C0000448068020000000); SDR 8000 TDI (0000000000000000000000000000000000FFBEF10000000040000000058210000010000000000000 00013E128061440006A090400060062900010110080A01966800062510E004000000000000000000 0000000000000000000000000000FF60190001000803200640018800000020000200000000000006 09029080000081101010010000000080000180824000024000190112000000000000000000000000 0000000000000000000000FFCA2D00001012B887801801947905940109A019018000446080200006 1061304C6E0400600640600008E00624600002E08000000648E00000000000000000000000000000 0000000000000000FF0747000048301909C01A042A5B09A00229801CC18000A9690EC8EC2E0868A0 4A608CA0E80E88600000E806206C00A86D02808436C4600000000000000000000000000000000000 0000000000FF0C89000000233843AA3C018018218AC005CC18038000806046024086816000016206 00600640600008601714E10005600028208690E00000000000000000000000000000000000000000 0000FFB347000000001001801800001801000001201E018000004000004004006000006806006006 006000006006806000806000802806006000000000000000000000000000000000000000000000FF 641C000400001801801802111801800945C51911A000606006806006006006807002446106406000 00720772650885E001403006006000000000000000000000000000000000000000000000FFB39800 0000401001801801801A01800801001801C001004001006026006000006000006006006000006006 006000006000002007006000000000000000000000000000000000000000000000FFEE5800040000 1801C0180000180B0008038018018000006000806005806006006806006006016200007006006080 206280002806006000000000000000000000000000000000000000000000FF12DC00000000100180 1805801A15000805001C21802048400600604400600080600600600600600100700646E110006500 002006006000000000000000000000000000000000000000000000FF3F6F00000000180180180000 1801801201801801800000600000600700600600600200600601640000620600600040E000005006 806000000000000000000000000000000000000000000000FFA33E00000000180180180980180900 1001A03801800000600600200400600600680200600600E000006006406000006000004006006000 000000000000000000000000000000000000000000FF3AD2000000001001801A00081809801AA303 1C01804028400080600600600000600222608620600100700685628002E000202007006000000000); SDR 8000 TDI (00000000000000000000000000000000FF96A40000008008008028008009408048CA200800000050 20020800020002021021020020020020000020020020020820022D20024220000000000000000000 00000000000000000000000000FF0E0B0002000AA0AA0A812A0AA0104003000AA0AA000003808806 02A82A81202202202A82A82A8001AA9AA9AA82A80182A80002A84000000000000000000000000000 00000000000000000000FFDDAD0000000200000200800200D040014800000000000A000120008100 00000080880000000000010010001010000000000000000080000000000000000000000000000000 00000000000000FFA4D70002000AA0AA0A802A0AA04208A2000AA0AA00000000A82082A82A80482A 82282A82A82A80002A82A82A82A80002A80282A80880000000000000000000000000000000000000 00000000FF76C200020031435430C2543042041542043543540000810D50150C08550D50D40C40D5 0D50D50000550550C30550CD0D50A30D50CC00000000000000000000000000000000000000000000 00FF81E900000040040040240040048002004C400400000154140110100100140100110100100100 0000800800001001341001281001040001000000000000000000000000000000000000000000FFE9 760000000000AA08802A0300000AA0000AA0AA00004800880002402A82A82202A82A82A82A80002A 82A80002A82A02A81002A8228000000000000000000000000000000000000000000000FFA7200004 00300A00A40A00A00A08A00C28A00C000000C4280280282280080280280280280280200000200282 2802812802C02802802000000000000000000000000000000000000000000000FFFC7300000022C0 012052802922A42012840012010000810C40B3090800480010C004800800004000804800C8C80080 480094C004884000000000000000000000000000000000000000000000FF1CA10000000839258218 41911809803101A01801800040608E0CE036026106216C0410610650E00001600600608E20604630 40B6346000000000000000000000000000000000000000000000FFC3F8000088420A00C82C02C22C A4D20C10C00C808001043003403002A830128220334034028020001031020534220CB00305280200 2000000000000000000000000000000000000000000000FFA43F0000282404492822402002402AC2 32400483000088080084080808C800020088A00C08900000000100800C0091080098C218A0000000 0000000000000000000000000000000000000000FF7E98000000000C009018028108B88018008818 20800020A00240200280208280000240A00280200110200201200284200240200200200000000000); SDR 8000 TDI (000000000000000000000000000000FF31B5000001A02AAB8AB82B8501008A18078AB0AB800000C4 888AE1462AE1262260442AE2AE2AC0002AE33E2AE2AA2AE02EA002A82AE000000000000000000000 000000000000000000000000FF136F000001900801801800020904809A11A0180180008460060061 268062060862260060060040000060860060000065060C8000006000000000000000000000000000 000000000000000000FFED1D00000184880100108010C0488058C180100180002864202062160061 1600E10A006006000000006006004002002006006006006000000000000000000000000000000000 000000000000FF6F8500000180080180180180080082180188180180000060060064360960064000 0204600E00000000600604E11008601600000648E080020000000000000000000000000000000000 000000FFFDFF0000018018C184180400188580194184180188000061860062060060860164061364 06000000006086126020012006106000006000000000000000000000000000000000000000000000 FF99B000000180110180180182190901581180182190000840280060060261060001160060860C80 20096116006040006086000100006000000000000000000000000000000000000000000000FF4ABE 00000000002002000582000C0200A012000000000800360000100200004004081083080B00201100 08110088008088100100200000000000000000000000000000000000000000000000FF48B7000040 0040C000000185000000000004008010000402064201200000460040040060060140000000101240 06020016024004004000000000000000000000000000000000000000000000FF7F30000009801802 800800801801815891800840820008A08200204611608201210A0820220020000822020022083020 0200A002112100040000000000000000000000000000000000000000FF012A000412400404400002 40040240040040242100212004010050410000010012000000090000010010010490014800010910 01000000000000000000000000000000000000000000000000FF9AD4000420C04C40C00800C00C02 C00C00C20C00902142200304300300204300320200201300200100300B08300302200B0430030020 00000000000000000000000000000000000000000000FF5232000005801101801803851001001901 8058C184001161062061060060860060160860460160001064060164160860061060060060000000 00000000000000000000000000000000000000FF1F4D0000012012002003002012132C9001000401 0000800A20A14805004910810810800800800000004004000804C208008008008880008000000000); SDR 8000 TDI (0000000000000000000000000000FF77640000AB8828AB0AB82B8858890AB8AB8AB8AB80002AE0AC 2AE2AC2AE2AE0A62202A82A01280002AE2AE2AE2AA204AAE5260A42AE00000600000000000000000 0000000000000000000000FFE34F0001558009050219541518091559559019558000506310556554 556D5614400154154855600055655632F42254555624414E04E00000400000000000000000000000 0000000000000000FF06160000018008010010018010450018018018018000004404004004006006 00400000000020600000600600600202400600C01400600000600000000000000000000000000000 0000000000FFE35F0000AB81081103102B8000288AB8AB8250AB80000040CE2AE2AE2AE2AE200500 2B02A02060002AE2AE20E00A2022AE01000810400000000000000000000000000000000000000000 0000FF9D2D000001800941109000040080801801911001800000E400006006006006100040000000 056000006006026402002006508406056000000000000000000000000000000000000000000000FF 663D0000018B2813005081894004801801805001800034604600600600600602E488010008084000 0060060860A2148006046120306000000000000000000000000000000000000000000000FF35A300 0001800801001000000000801A01A01001800000604041600680611608610A000000004000006006 00600200000622E006006000000000000000000000000000000000000000000000FFC6C3000001A0 0A01001101A002008038018010018000006006146006006206000042000000004000006006006002 000006006006006000000000000000000000000000000000000000000000FFB3800002018AA8ABAA B82A0AA0AAAAD8AB8AB2AB80002AC288106AAE2AE0262282022A82A82A80002AE2AE2AE2AA2A82AE 0802AE2AC000000000000000000000000000000000000000000004FFE1D5000001C24801001101D0 4C00851C21C0180180005160460A700700640600030600000000000000600600600000005610E000 006000000000000000000000000000000000000000000000FF5AF3000001D54B5595585415495495 1D55D55955800155615100E5575562165404D6550550550000556556556550550556046556556000 000000000000000000000000000000000000000000FF7FD1000401908AAB4AB02B80002AC838918A B4AB800002608E21640E2AE04E2B60082AE2AE2AC0002AE2262AE2AA2AA4862402A82AE000000000 000000000000000000000000000000000000FF071D000601800801601100000800E01801801E0180 000064002460060060C6010002006006004000006006006000002007310000006000000000000000); SDR 8000 TDI (00000000000000000000000000FFDA38000001801043801801801901841801815801808000400430 420609700F204A0732704E90820010601600F00031680E8250040860800060000000000000000000 00000000000000000000FFD71E00000190180190182811180B811903801801800000641402600620 600604610E00E2062000080262060062000070262060040060000060000000000000000000000000 00000000000000FF3CB3000001880919845829881801825801801811800000600C02404620604602 408E00E30600000802620E14E8000060060041460064000060000000000000000000000000000000 00000000FFED2700000180088300180000980100988184B805800001420408602400E906006206A2 688E0002000060060A600240D0060060060062000060000000000000000000000000000000000000 00FFE9B20000018008218C380020190BA03803C01A09810000600420620608603640600608602730 800088600600720150704E224124106100006000000000000000000000000000000000000000FFAB 5F000001802801809903801801001801801801808004600420600500680E00600800600600000000 600E026042004056404804806000006000000000000000000000000000000000000000FF5FDB0000 01800E01601800001801C01801801D01804052E10440400700601600400780780600000000600780 612020700E204014006000006000000000000000000000000000000000000000FF828A000001800A 01401801801801401801A41C81802028608418600500710600600080E80E80000080681700728A00 480600500C006000006000000000000000000000000000000000000000FFCAA00000018048018098 84401801A01801C01805810000600400600600780600400E01001100000100600604741100602600 7007004000006000000000000000000000000000000000000000FFAE6B00000180C8010018818038 11801801801801800000602400400600600602C00E8088014A000100680600600004E00604612400 4000006000000000000000000000000000000000000000FFEB22000001840A01C018000518050018 01A01C01800000620400600480600610414600000001000000600680700248500610CC0600400000 6000000000000000000000000000000000000000FF3D0E0000AB8D08AB0AB92B8D18A10AB8AB8AB8 AB80002AE08C2AC2AC2AE2AE6143172A12B80000002AE2AE2AF2AA1142AE20640E2AC00000600000 0000000000000000000000000000000000FF75A90000018A48210858000039230018018318018000 02C00000600400680620E02E00000000000000600600609200C00610620620600000400000000000); SDR 8000 TDI (000000000000000000000000FFBBD2000000000A00800800A00800C00A0080080080808020020020 02000002002002002002002000002002002002002802002002002002002000000000000000000000 000000000000000000FF59A400000000000800000020860020000000802000008200018080000080 00000208000000000000000000008000000000000000000000000000000000000000000000000000 000000000000FFBD3E00000000000001000000000000000000000000000000000000000808000000 00000000040000000000000020001001000000000000000000000000000000000000000000000000 000000FF9BDB00000000000000000000000000020020020000000004000000008000008004880100 08880000001000001000000800001000000000000000000000000000000000000000000000000000 FF523700020004400000010000000040000000000000000000010008000008000000400000000500 00000001000000000000000000000000000000000000000000000000000000000000000000FF7C46 8000AA8888AA8AA82A8AA8AACAACAA8AA0AA80002AA4AA2AA2AA2A82AB2ABD03AA3AA2202001AAB2 AB2AA2ABAAA2ABAAA2AA2AA0002AA000000000000000000000000000000000000000FFD087000401 0090100020000000A04014010012010000090000800840805000800A808108110000008048050050 40001000C09011000000000000000000000000000000000000000000000000FFC58800055590B155 955955955955955B55D55D558000556157557D57557D5655600654E5475560005565565575565575 56557556556000556000000000000000000000000000000000000000FF73D00000AA8228A48A08AA 8428028AA8AA8AAAAA80000222AA2CA28AAAA2AA082802AA2AA22AA0002AB2AA2AA2120CA2AA9220 A222A0002AA000000000000000000000000000000000000000FFE8C9000201041000000000000000 40100100100000000000010000000000008000280000108000010000010010000008000010008000 00000000000000000000000000000000000000000000FF1E210000AA98080281282A9108188AA8AA 8AA8AB800040A2AA0220022AEAAA652052AAAAA22020002AA2AA2AA12A4032AA802C0A3220002AA0 00000000000000000000000000000000000000FFD83D000000048148100001820000000000000000 00000C000410404400000712684600600705600000000000000640400650E4061000000060000000 00000000000000000000000000000000FF2DBB000000002000030081912142000000000000000020 0006408308001000008489001010080000000000001A800D00000401200080000060000000000000); SDR 8000 TDI (0000000000000000000000FFA511000020401D10801801841E05801841001C010001114002007804 00680610680610604610600010600600302782684D88600800640600600000000000000000000000 0000000000000000FF592D00002000184080D880109841C099018418018000106215036006006106 00610600600700600000600600000604600629620400600700000000000000000000000000000000 0000000000FFA4400000140018040018602230494219010458210000024402086004087106016016 80600600600001604604281650612600600220E00700000000000000000000000000000000000000 0000FF509E0000000018400158018018138118018018418000006582316086106006022226006006 886000006006001006007042806008016006006000000000000000000000000000000000000000FF 1B50000000001800001940545A458418018018018000006002A26906006106007127006006086000 006006000007026004106402006006000000000000000000000000000000000000000000FFD55600 002000180000180181180180188182180180000C6010006006006006022406006006006000006006 00000600600040C010406006006000000000000000000000000000000000000000FFA76D00000000 00000000018000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000006000000000000000000000000000000000000000FFB65300000000000100 00018000004000000000000000000000000000800000004800001000000000004000004000000000 804800000000006000000000000000000000000000000000000000FF32BF000000000800808A0080 0800801800800800800000200200200200A002002002002003002000002002002002002802002002 002002004000000000000000000000000000000000000000FFF02200000040140100100000000000 00840010000000000000004000804000000001000800000010000000000001000000008001000001 000000000000000000000000000000000000000000FF2F84000000400C00800800800800C0084080 0800800000200200200200A002003002002002042000002002142003002802002002002003000000 000000000000000000000000000000000000FFB4ED000000001801001E0180180180180180182180 8000600600E00608F00600600C806006806000006006006006006006006806806006004000000000 000000000000000000000000000000FF6AFB0000000014110012000100000014A201100000000400 000040000040040004040040040040080000040B0040004000008000004000004000000000000000); SDR 8000 TDI (00000000000000000000FF1A86000000401801001A01800001801801801801800000600600600600 40060060040060060060000060060000020060060040040060060060000000000000000000000000 00000000000000FF3CFA000004005801001800000001801825C81801800010608640600680481601 620600600600E0000060060008064070060820140060060000000000000000000000000000000000 00000000FFCB940004000C98D10819018C0001841901809901800000604608500680480600600641 601600600000600608001712E0160000042060040060000000000000000000000000000000000000 00FF3B150004024AB801881A818A1001001883049801000000408008600400610E04220600600E00 E00001600641200400E000004400006004006000000000000000000000000000000000000000FF13 8B000000011D89C05A00051001021841221801000000450635680410600600200400600700600000 F01620A005A0680B006005006006000000000000000000000000000000000000000000FF21D40000 00001821001801801001001C41101881000010404400600400608602E00121600600600000600608 3014146004106216206007006000000000000000000000000000000000000000FFD1CA000000041A 01091A00005041011B0900194300004140060060240060060A602000600600600000608600200501 6006806006006806000000000000000000000000000000000000000000FFD1500000000418018018 01841021041811001841000030C00200600400610600200200600600600000600E00300600780010 7802006807006000000000000000000000000000000000000000FF58AB000000011801B018000158 198A1841001801000008440265600400608604204280601E80600000690600300618600008600080 6006000000000000000000000000000000000000000000FF5729000000201A810138018010011118 81801885800000608408604610600610200200600600600000600600000681600000400600600600 6000000000000000000000000000000000000000FF0AFC000004001801001800001801801A11E238 01800000600600600600608600200200604600600000600600000614605010644680640680000000 0000000000000000000000000000000000FF11E30000100619208018439C1441181C09001C010001 104002807004006006006016006006006000006006182846006007006A2100600700600000000000 0000000000000000000000000000FFD7FA00004000182C8018040010030018A1801801800000E405 00600600600609200608600608600009602604001640608200501400600600000000000000000000); SDR 8000 TDI (000000000000000000FF373A000100101841801821888201841909AA180180008060B000C02E002C 06266026006906006000046A0600804C006604000064006226006000000000000000000000000000 000000000000FF61AC000000013B0BCA5A000200C3889A4B821881800040688EB2F106826006A86A 572060864D6000886006888A10A56A2E804846C86A26800000000000000000000000000000000000 000000FF2911000000001821A11823890001841881885845800012644680622F50600E02608610E0 260060000062060000240060864D2496806006116000000000000000000000000000000000000000 FFCA75000000001E0100180000020180180180180180018060060040060040060060060068060060 00007806001004806806006006006006000000000000000000000000000000000000000000FF0083 00000000180180180000040180185190180580000061060060060060060060440070060660000060 06018001406005006804006006000000000000000000000000000000000000000000FF6292000000 00180100180180000180180180180180000060040060060078060060040060060060000060860010 00006806004004006006006000000000000000000000000000000000000000FF3589000000001A01 C21800000001801823803801800000600700680E0040060060060060060062200060060000040068 05203007806006000000000000000000000000000000000000000000FF17B8000000001801041C01 800001801841C0180980000060060060160040062070860070070464400060AE0100040060064060 06006006006000000000000000000000000000000000000000FF04E9000000001801801800000001 801A0380580180000060060060060060060070040060060060000060860000000060060000050060 06000000000000000000000000000000000000000000FFF694000000001C01801801880001801801 821801800020600600700680400600600C2060068460000060060800000060060000060060060060 00000000000000000000000000000000000000FFB212000000001801001A00080001801A01C81803 800020608600600600600640612C20700600600000614E0800060068060000040060060000000000 00000000000000000000000000000000FF111A000000001801001801800001801849821809800000 60060060060040060060040060060060000060060100062060060000060060060060000000000000 00000000000000000000000000FFEBE2000000001801001800000001801801801801800000600600 40060040060060040060060060000060060000020060060060040060060000000000000000000000); SDR 8000 TDI (0000000000000000FFC97D0002000000220000000A80082000080000200000048201000040000000 0000080000000000000000014A00808000800204A000029000000000000000000000000000000000 0000000000FF57A30000000AA0A80AA02A0AA0AA0AA0AA0AA0AA00002A81002A92A82A92A8220220 2A82A8AA80002A82A82A82A82A80802A88082A82A82A800000000000000000000000000000000000 0000FF62320000003543083542D42043401542C45544940000C80900551290D50550D51440D50D50 D50000D50D50010C48550C41210810550040D50000000000000000000000000000000000000000FF E3730006004004024004004004006004004002000001001420000800000001100101001000000001 001001001001801209800120000001000000000000000000000000000000000000000000FF7CC800 00000AA08A0AA02A0200040AA0002AA00000000000502A80002A82A82A89002A82A82A80002A82A8 0202A82A80101002002A80000A8000000000000000000000000000000000000000FF364A00000020 0A00A00A00A0C252800D48000100000142082A802440802002802082802802802000802802D02802 002C8A402882002052A00000000000000000000000000000000000000000FF494C00000040122000 130028028100120500122D000088CA80800894001004800A4C005004004000800804810800804840 930830804A80804000000000000000000000000000000000000000FF7C08000000043801A0180193 0125801901A01805800048602E006006006006006016806006C860000460060260C6006056106006 0060060AC000000000000000000000000000000000000000FF424B000088090C40CC2C10802000A4 C8408008408000003003083213B0A4131320C320254200200148248348300A143503413452083003 000000000000000000000000000000000000000000FFE05A00000021322210520020420440C2C140 02820000984808180A150008108000414008C1220000800500D80810208900800808000800890000 000000000000000000000000000000000000FF1E0A000000200888880800930403C11802C01C0180 0120220220200220280201210020200200200000300200200200204A032002002002004000000000 000000000000000000000000000000FF09DF00000004C00044A0138400E00A000000202000000000 4100040043000818720000840058800000700004632100001478060108000000E000000000000000 000000000000000000000000FFD74800001020000002000180010020042000024400004200000200 801800000010980810218000005800000000011600A0008091300000146000000000000000000000); SDR 8000 TDI (00000000000000FF1AF100000180008400000000080000180180180180000064A240600612400000 614E0060060040000060060061060061062262040004280000000000000000000000000000000000 00000000FF2B28000001800000008049800800005801809801800000600000620600600000614600 600600C00028600621610600620640600E1200400C60000000000000000000000000000000000000 00FF8B6D0000018000001280210018440118858899A1800000E00200607E02600020608605600600 418800600400E406016086226004400000000000000000000000000000000000000000000000FFA7 26000001800020040000821000001921901843800001600000E10604E00040600610610E10401000 E00400600610610E0CE004000000406000000000000000000000000000000000000000FF87530000 0000004010001180004401002400000400000000000081000080000000400A009011000041000020 0300088200080010400020406000000000000000000000000000000000000000FF43C30000000A10 4100103180000500000208202000000A020001010000000010600000400400400000640008600000 8040000004000100006000000000000000000000000000000000000000FFF3B30000008018808018 00860800804801800801800020E08220240200202002220201208200200018200220000202201203 A002140000140000000000000000000000000000000000000000FF9C480004034024414000004014 0540142040140000010000010050050010000010010010010000000010214010010C100100100100 0001004000000000000000000000000000000000000000FF9B6D000400D00C00C00810C00C00C00C 02C84C2080010A200300B00300300000300300300300200000300310300301304300300300010100 0000000000000000000000000000000000000000FF891F0000058450810010218410010018418018 0180004165064060860060400C620600610600600008622600600610600605600600000000400000 0000000000000000000000000000000000FFEED20004010012012013002012012014010012010001 004C08804004000000C4002C800800800000801000804800804A5080400000000080400000000000 0000000000000000000000000000FFD778000000A0080280080080080080080020000080000000A2 00000280200008208200200200200000200200200200210200243200000040000000000000000000 0000000000000000000000FFE7ED0000000AA0A80AA12A0AA0AA0AA0AA0AA4AA00002A80112A8AA9 2A8AA8019A102A82A82A80002A82A82A82A82A80402A8C802A82A80A800000000000000000000000); SDR 8000 TDI (000000000000FFF60900000180180180500100100180180180180180000062140060060060060020 06000000106000010006006006006016004006000000006000000000000000000000000000000000 000000FFB0940000AB8A18918C582B8088818AB8AB8AB8AB80002AE4002AE2AE0040002AE2AE2AE2 A02000002A03062AE2022AE00E2AE3060000000AE000000000000000000000000000000000000000 FFA3EC00000180580580180008484D80180180180180000060040060065340000060060060000D00 00000046006012006046006116000000000000000000000000000000000000000000000000FF5D76 00000180902904D101820801001801801801800000652E0060060040000060060060100000000081 16006126006286006026000000406000000000000000000000000000000000000000FFF5EB000001 801001001080000A0100180180180180000060160060060040000060060060000040000000060062 56006006256006000000000000000000000000000000000000000000000000FFEE6B000201A01A01 A01801800801A01A01A01A0180008064C2006806AD40000060060060000000000000060068860060 06086006000000406000000000000000000000000000000000000000FF6F8A0000018AB8AB8AB82A 0008AB8AB8AB8AB8AB80002AE4002AE2AE4062A82AE2AE2AE2A82A80002A82AE2AE1062AE2AE0062 AE2A82A88A8000000000000000000000000000000000000000FF6EAE000001801411001001800801 001801C0180180010060060360060040000060860060000020000000060060A60060060C60260000 01006000000000000000000000000000000000000000FF2661000001D55155155154000955355955 D5595580015560565565560C655055655655655055200055055655644E5575544D65565505515500 00000000000000000000000000000000000000FFF517000401CAA8A2CAA92B800CAAAABCAB8ABCAB 80002AE1280072AF0842A82AE20E2AE2AE2AC0002AE2AE2AEA062AE08220628E2A82002AE0000000 00000000000000000000000000000000FF9ACD000401800C00C00800400C00801C01801C01800000 608500700700C0000060060060060040000060060060060068020060060000008000000000000000 00000000000000000000000000FF4279000201AAAA00AAA82A8008AAAABAABAABAAB8000AAE4005A EAAEC562A82AE2462AE2AE2AC0002AE2AE2AE21C2AE4560960062A81500AE0000000000000000000 00000000000000000000FF49FB000001800850800881200A00801801801801800000600C80600640 E00000600600600600400000600600604400625600E1360001002000000000000000000000000000); SDR 8000 TDI (0000000000FF750E000001801800021881001820103001801821800000600600600600600600A096 08208E08E000826016C0620C08600A4CE00610000052E00000000000000000000000000000000000 0000FF4CD000000180582000187100908A08108180380180000260861A640604620600600E00A016 02602000600E206004006002026016200000000000000000000000000000000000000000000000FF C654000001C01808803801041800A0182582180180A000600400602E04E007006002220006806280 80600600610500E020206307110000500000000000000000000000000000000000000000FF02B800 0009881800891801029400801A018018098820A2E00400E80600608E046000200806216020006906 00622400F280204006000000006000000000000000000000000000000000000000FF6A8B000011D0 1840E09811001810801801E01E01900020600608600600780E00200380000E006000007087806045 00601220600E000000000000000000000000000000000000000000000000FF2CC7000001C01C22C0 1841011008C01821C018018040016007016406806907046002C010074060410070068A640500600B 006007000000006000000000000000000000000000000000000000FF6440000001A05A0310180104 1C01401C41801809800102600480700602600700200200780100E001000006146006017506806007 000000000000000000000000000000000000000000000000FF753900000180180100180104D80100 1801801801800000652600600600680600200280600003600000000680608E00600E006006000000 006000000000000000000000000000000000000000FF0B0E000001805803C05901001001C01801A0 18018000006004006007006007002006004009006000809006006025006122004006800000400000 000000000000000000000000000000000000FFF7600000AB8A98AD8A982B0C10AF8AB8AB8AB8AB80 002AE00E2AE2AE2AE006AAA2AE2AC2B02D60012A02AF2AE3162AE2062AE2AE0000004AE000000000 000000000000000000000000000000FFEE3400000182184100180008100900180180180180000060 0400600604600600600200200008600000802600600C006208006206000000000000000000000000 000000000000000000000000FF5F690000AB8AD8A90A98AB08B0A90AB8AB8AB8AB80002AE0C42AE2 AE2AE0062AE2A82AA2A04060002A02AE2AE2262AE2A42AE2AE0000000AE000000000000000000000 000000000000000000FF3AC400015591590591195402D145955955955955800055612C5565565160 0755255655054845600154040F55654455412255604E000000550000000000000000000000000000); SDR 8000 TDI (00000000FFF16E000000000000000000000000000020000000000000020088001000000000000800 08000000000000208010000008000000000000010000000000000000000000000000000000000000 00FFBC00000400000000000100000004000000400400000080000100100100000144801100880000 0000801000000000800108000000000000200000000000000000000000000000000000000000FF53 9F000000200200000000000000000000000000000000080000000000000008000000001000000001 0000000000000400000800000000000000000000000000000000000000000000000000FF7BE18004 AA8AA8AA8AA92A8AAEA88AAEAA8AA0AA00002A82AA2A82AB2ABAAA0022A22A22A3AAA0002A22ABAA A2AB2AA0222AA2AA0000000AA000000000000000000000000000000000000000FF2F160002012014 0148000001024120020120120100010043108048040040050014A50010010040010080048000C480 0105111004000000004000000000000000000000000000000000000000FFE158000155D55F533558 55955951355B55D55D5580015575575575565565574C641544754ED5600155755655655655612455 7556000000554000000000000000000000000000000000000000FF321C0000AAAAA8CA80A8AA882A 9288A8AA8AACAA80002AA042AAAAAA2AA2AA2AA0122322AA2AA0002A22AAAAA00A84A2020232AA00 00000A8000000000000000000000000000000000000000FF5D950004000010000000000000030000 0120000100010040000040000000010090A109080000000080000000000000020D00000000000000 4000000000000000000000000000000000000000FF068D0000AB8AA8A18408AA8608808C88AA8AB8 AA80002AA08A2AA2AE2AE2AA2AA00A3022A22AA0002A22AA2AA4047822524022AA0000004A800000 0000000000000000000000000000000000FFDFD50000000000050240010000050440000000000000 00000400000000000080602010601600000000E00000644002414824800000000020600000000000 0000000000000000000000000000FF83BF00000000000809000190A0300000000000000000000220 00000000000000050084880000000180000180008801000010000000000000600000000000000000 0000000000000000000000FFF5760000018018200458410519040010018038018000006004146016 04640680208482B00604E00102600700620401600800448600800005600000000000000000000000 0000000000000000FF36890000018018100019010018500031238418218140046106006046016007 8160045021160862C000600600608C08604010E00640000000000000000000000000000000000000); SDR 8000 TDI (000000FF2C8F0000010C0001091801001881C0590100088180008061061041062060801060060060 06006000406006017006026046046004000006800000000000000000000000000000000000000000 FFE3F2000001800001801801C4581580180180080180000068060060060260000060060020060260 40006006006006046006006004000007006000000000000000000000000000000000000000FF0F1D 00010190030191588381190180190180088180008165061060062260810060460060464560010060 0600600400E046006804200006000000000000000000000000000000000000000001FF23E0000001 80000180180180180180180182102180000260064064060060000060060060060060000060060060 00004006006000000002006000000000000000000000000000000000000000FFDF67000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000006000000000000000000000000000000000000000FF31A5000000001000000000 00000000000000040000000000000000000000008000048008000000000010000008000050000040 00000000006000000000000000000000000000000000000000FF6FFC000000800800801800801800 80180080080080000020020020060060000020020020020020000020020020020020020020020000 02004000000000000000000000000000000000000000FF555E000000001000000000000001000000 00100100000040040000080000000000000008000000000000010000000008000000000000010000 00000000000000000000000000000000000000FF8F0D000000800800800800800800800804800C00 80000020020020020020010020020020020020000030020020020020020020020000020000000000 00000000000000000000000000000000FF61D7000001801001821C23801801801821801001802000 640608600F00E0002860068040860060000060078070060070060060060000060040000000000000 00000000000000000000000000FF0B77000000001000001000011001001002101001000100400500 00444040000040104450040040000040440048000000040000000000000040000000000000000000 00000000000000000000FF82B8000000800800800C00800800800A00800800002080200200200100 00000020020020020020000020020020030020020020020000020020000000000000000000000000 00000000000000FFCBD5000000000000020042008600000200080000000000180000002820800028 00002200800000000000000000008000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000FF1727000011A21831CD1901845903021801001001880000600648C004000006286016006017 10608040600740610600E02410E026000001006000000000000000000000000000000000000000FF 5F8A0000012118052A1881001803821C01400841800000600700C60600600000600E002006016000 00600710641000E406086080000804006000000000000000000000000000000000000000FF054D00 0081021873209A01501841801851050801800000600600401601608029600640200780E000006206 106216007006006002000006800000000000000000000000000000000000000000FFFC2C00001120 B011201801043901C09D0100084188000061064840060060000060060060161060802060065060AF 006246016046000006406000000000000000000000000000000000000001FFF25800020100D00508 5801015909A01A010008018000026006084326006040046006006006006000007086006006106016 257086000806000000000000000000000000000000000000000000FFD309000201005805045E0110 9E1180181104088188000060060040CE00E000006006000006086000006807806816006006406804 000006006000000000000000000000000000000000000000FFEC03000001801811121801A6584180 1881190881880004618610440600600001600640000E886180006106006806906B96016102000006 200000000000000000000000000000000000000000FFBE86000001009021801801001901A0192180 08018000006806006006006040046006004016806000006006086000006406026004000006406000 000000000000000000000000000000000000FF8D03000001841015801A01F0180180380180080180 00006206006106006000006016004006006001A06006016806C06006006C06000007000000000000 000000000000000000000000000000FF92E3000401000809051C99001883801D0118088180000060 0700500620600050600E056046406000006007187515016006147204000006206000000000000000 000000000000000000000000FF0475000001004801801881009905801801A0088180000061060860 07A06000006006106007006000026006006040006026006004000007400000000000000000000000 000000000000000000FF5B33000401804A03021801A91801E01C010008018000007A070050060060 004060060D6026406000046007006D36216006106802000006006000000000000000000000000000 000000000000FF04F900010180090181590583580D801901A4084180000563063062060060010060 46006026416021006006006006016046006002400006000000000000000000000000000000000000); SDR 8000 TDI (00FF6E810000018838C184000380184182588B821801800000650610610600020602620640610020 600040600682608E236214016816000000116000000000000000000000000000000000000000FF47 E8000201A01801800001A01801001801001001800000600200400400000600600680400200600000 6006006806806006006006000000000000000000000000000000000000000000000000FF966F0004 01D01801800801C01811C51901915801800004700680680600040600000600400000600080600604 700720640600E006000000000000000000000000000000000000000000000000FFFAE30000018018 01820E018018018018018016018000026007005006000086000006804003C0600100600600600600 6004007006000000006000000000000000000000000000000000000000FFAFFE000001A01801A00A 0B8018014898A1001905800000700480600450000600400600400210628028600780600690E02602 6006000000080000000000000000000000000000000000000000FF1E90000001801C01800801C018 0111194100100182200C722400402C0000AE20400E20400200E50040600E20600641E04401600600 0000106000000000000000000000000000000000000000FFFAA6000001C01C01821415C01801A018 01801905800000600600600650008600000600400250600010600600600710600602600600000000 0000000000000000000000000000000000000000FFDAD3000001803801C010018218010018030018 01808000600608600400800600000600400200600000600700E02600600600600600000000600000 0000000000000000000000000000000000FFF6D7000001801801801801821809A2988188B0018480 0A684688404E0002CE00201600600200E00000600E40602600E00400600600000000000000000000 0000000000000000000000000000FFEABF0000018838018018018018010018030010018020006406 00400400800640200640600200600000600602E00600620600600600000000600000000000000000 0000000000000000000000FFB4920000018018018010018018010018010010018000006006004004 00000600000600400600600000600600600600600600600600000000000000000000000000000000 0000000000000000FF0692000001801801801201801801001A012010018000006006804004000006 00000600400600600000600600600600600600600600000000600000000000000000000000000000 0000000000FFCF22000081A038018018018018010098810010018000006106004004000106006006 00600600600000640600604600600600608600000020000000000000000000000000000000000000); SDR 8000 TDI (FF8C2F0001103083543544903541541540B42205540000D50550150D50550800D50D51440D50D500 01550D50D50820800D50D50808000C00D50000000000000000000000000000000000000000FFF937 00020040000000060040020060000050060000010000010010000010010010018110010000018000 01001001001001001000000031000000000000000000000000000000000000000001FF6923000044 0AA2000AA0200AA0AA0AA0200000AA00002A82A80002A82A80002A82A82A02A82A80002A82A82A81 200402A82A85200000A00A8000000000000000000000000000000000000000FF999E000022A00804 A00900A00800800B04A308008001002802B13002800802802802002802802000002803002C02B528 02802A82000800A00000000000000000000000000000000000000001FFC2590002892012B100120B 40100020120828440100010048008200010000048048000090048040000050050049148050008008 0C000C08804000000000000000000000000000000000000000FF077A000003805903A01005841A41 80380D88180580000C640609600600000610400621610401600001600E0060260964060060860000 000AC000000000000000000000000000000000000000FF9B7A000008D50C00CA2848902C08D48CA0 C409488001403083243C1232101300344380245208200090230320250B2431434424020000110000 00000000000000000000000000000000000000FFAFD30002042092250012093032401F13082A8291 0000C48400801400C00200100881080868200001080810A00E888808208008800008308900000000 00000000000000000000000000000000FF2A54000401840888844A02A04800800840800C40800000 602240200204000620000201300202200010300200304220A2024020020000000040000000000000 00000000000000000000000000FFC92800008000000040900002800040601400002A00000012881B 821020000082800600401481000020010000002010010C00E1080000000060000000000000000000 00000000000000000000FFBEE70000020B20001202240C00A8000082002200000012000000008010 00000806000008818800010000A04000004600C000180000020014E0000000000000000000000000 00000000000000FFDFCD000211905B038800D1A01811801820941905800000610024202608003680 60466245001060000364060269160164040664260000000060000000000000000000000000000000 00000000FFB197000105C4980DA900C994BA89D01A21B158D38001036848C56A2628084630E8868A 402A1260009268C72062271068A68460A60004208000000000000000000000000000000000000000); SDR 8000 TDI (201E0000018018B580188F840003841801813901880021E0060860062060060062060C20064AE080 00600200E00630C0020C6022480406000000000000000000000000000000000000000000FFE46D00 0001801841801801880045805821805841900048600610600600600E00A406100406146140086002 016004014002106042100006006000000000000000000000000000000000000000FFDB3A00000000 00140000000280000200A00001400080080000000020000000000000050320400020080200000000 080000040000200400006008000000000000000000000000000000000000FFCE1700010004000000 0000001000022020000000008043001020010020000400400600401400440008020C40028C020004 006004000000006000000000000000000000000000000000000000FFD2FD00000080088180080190 18638048018188048000006086006002112012012002002002002010012002002002002002082002 040002414100000000000000000000000000000000000000FF5DC700040144040040040240040041 940040040101010010010010054050010000010010010000210010010811210C1180001000000001 000000000000000000000000000000000000000000FF149F000400C00C00C00C00C00C00C22C40C1 0C00800142B003403003003003002003003003002021083003003033003002003002000003000000 000000000000000000000000000000000000FF10EC00010180188180180580104580180180180180 0000610E00608600600600600600400E006200006416506406106006106006000006004000000000 000000000000000000000000000000FF166700000120200120020120120120120122020100008048 04805004004800800800804800800000004001004A20800800800AC0000000804000000000000000 000000000000000000000000FFBAD3000200800A0080080080080080080090C80080000020020020 00000002002002352002002000802002002012002002002012000352400000000000000000000000 000000000000000000FFCA740000AA0A80AA4AA0AA0AA4AA0AA4AA0400AA00002A92A82A82A8AA80 002A82A80402A82A80002A9AA82A81802A82A82A84000000000A8000000000000000000000000000 000000000000FF800700020002200000004200020020040009200000000010012000010000000000 00110000000000000000000408310000000040000128000000000000000000000000000000000000 000000FFFCD30004AA0AA4AA0AA0AA0AA0AA0AA0AA00A0AA00002A82A82A82A8AA80002A82A84802 A82A80002A82A82A84282A82A82A80A80002802A8000000000000000000000000000000000000000); SDR 8000 TDI (06000001803001911001805801801801909001800000600600600600600000200622600600600000 6050006456086006006006000446000000000000000000000000000000000000000000FFFFCB0000 018C9001821001829001801801821001800000600600600600601000200600E00600600000608000 610640C002006002000086406000000000000000000000000000000000000000FF91000004018010 01C01401801001801803801001800000680640600700700010200600610600600000600000600600 6006006006000006000000000000000000000000000000000000000000FF5A59000001A012018030 01A01A01801A51801001800080629695680600600000E00600200600600000600600600600600200 6002000006C06000000000000000000000000000000000000000FF02010004AB8AB0ABCA94AB8AB8 ABAAB8818ABCAB80002AE0260062AF0062A82262AA2AA32E2AE0002AE2AE2AE2AE2AE2AA2AE2AA00 00060A8000000000000000000000000000000000000000FF941A000201801801A01A018010018018 0180300180000070865060C680680000200601208E00600000600600600600400200600200000600 6000000000000000000000000000000000000000FF2A2E000155B55B55951955B55355955825D559 558000D570A6086D5600655048255655244655600055655655655655655255655200000655000000 0000000000000000000000000000000000FFBC200000ABAAB2AB88B0ABAAAAD1CABD2B8290AB8000 AAE22E82E8060062AE32E2AE4824262AE0002AE2A82AE2AE2AC0CE2AE2AE0000072AE00000000000 0000000000000000000000000000FFE3E9000001801801803801800801E01C91A01001800000620E 44E00600600602A00600200E00600000600000600600400600600600000600000000000000000000 0000000000000000000000FF237F0000ABAAB2AB8C10ABAAAA0D8ABA019038AB8000AAE206006C96 0062AE2062AE0422062AE0002AE2AA2AE2AE2AC4022AE2AA0000060AE00000000000000000000000 0000000000000000FFA563000401801801C05C018009038018C1901C01800000685648640F006006 14200635008600600000600200600600400600600600000620000000000000000000000000000000 0000000000FFCB0800000180100182900180002180180D8510018000006106036026006006016006 00204E00600000600000600600652E00600600000600000000000000000000000000000000000000 0000FF7E2D0000018018818019098100018019018018058100006006006046316006006006010146 016008016400006006206006006006020006416090000000000000000000000000000000000000FF); SDR 8000 TDI (000001A00A09A41800A0092588B92180180180C0006406416086006006004C06906002082080C068 060071060028A6006806200000100000000000000000000000000000000000000000FF9190008401 800801801A08800801801801821A0180012262062060260068860060860070028020000860068260 06922004006004000000006000000000000000000000000000000000000000FFA762010401C00C01 C01852800801E0102180100180003440061040460071060041060460000000010060060460280050 07887006000000000000000000000000000000000000000000000000FFF36C000001A00821C01880 C00C09C0100184128180008854060FD007006207007006037001000001107006C060009048068060 06000000006000000000000000000000000000000000000000FF0677000001801021A01C81401009 801801801C8180010068064060060062008050070078070060080070071070070460040060042000 00000000000000000000000000000000000000000000FF435D000001C01001801801003001801001 801201800100400600400600600020448E01600600600000600600600080422C8061240000002060 00000000000000000000000000000000000000FFC3E7000001801801801801C01C01A01801801800 80000060060070068060080AE8040820070060010069168060060030040062140000000000000000 00000000000000000000000000000000FF413C0000AB8AB8AB8AB8AB8AD8AB8AB0AB8AB0AA80002A C2AE2AC2AE2AE2A04064263322AE2AE0002AE3262AE2A82AC1852AE4440002A80AE0000000000000 00000000000000000000000000FF7EF9000001803001853801001001801001901001800000400600 400600600000400612600000000000602600602E0460060060060000080000000000000000000000 00000000000000000000FF23A30000AB8AB0AB8AB8AB0A90AB8AB0AB8AB0AB80002AC2AE2AC2AE2A E2A008494E2262A82A80002AE22E2AE2AE2AE20C2AE00C0002A82AE0000000000000000000000000 00000000000000FF52AA000155901955901955935955955155829155800055455655455655655055 55562125505500005565165561064925575565560003205500000000000000000000000000000000 00000000FF8D7D000001801801801801801801801001801001800000400600400600601005400400 20000000000060060060000000440060840000000060000000000000000000000000000000000000 00FF73540000AB8510AB8030AB8818AB8AB8AB8070AB80002AE2AE2AE2AE2AE2A02AA2AA0862AE2A E0002AE2002AE4060242AA2AE2AA00000C0AE000000000000000000000000000000000000000FF74); SDR 8000 TDI (00000040002000000020000004000001080000000000000000001000000001308000008000800000 000080400000000800000000000000000000000000000000000000000000000000FF0A278004AA8A 88AA8AA8A8EA8CAA8AA8AA0AA80080002ABAAA2AB2A92AB2B3AAA2AA013A2A2220002AA2AA2AA702 02A2ABAAA2AA0000000AA000000000000000000000000000000000000000FFD10D00020100120100 12012212012104010404000000809004C21005004809051001000801010001005004805000011240 801080000000004000000000000000000000000000000000000000FF2301000355D55555D55D5115 1155955F55955951800055655655655655654655755794644744E001557D5755605642F556557D56 000000554000000000000000000000000000000000000000FFA6560000AA8A2CAA8AA8C2A828AA82 28AA80A88880012A22AA0822AA2AB2A308214A2AAAA22820002AA2AB2AB08A0A200A8CA00A000000 0AA000000000000000000000000000000000000000FFCB9B00000100000100020300320040000100 02040000000804800804804000000800400108900000800000000000080800000000000000000000 000000000000000000000000000000000000FF37200000AA8918AA8AB8908908AB9008AA9208CC80 000022AA0122AA2AA2A2C034A22AAA1AA420002AA2AA2AA442402BA34024420000004AC000000000 000000000000000000000000000000FFDF7100000000100000004501500010000008004000004080 0000000000080E0AE00600400604E000000000000210008006247216000000406000000000000000 000000000000000000000000FFFF9500000002A00000001004000002A00001200200001200003280 000000002014080001400800000000000000C04C0008110120000000006000000000000000000000 000000000000000000FFE8D1000001800001801884100101801805801881000010600620E0064868 0700540600E80300A42030E006106040401004C04804000000416000000000000000000000000000 000000000000FF63A200000180008180180002C04588B92180181100200164060060960060060060 060A6052302000006006006080044105006004000000000000000000000000000000000000000000 000000FF609600000180009184180002A00180180180180F01000EE00600600600600600600602A1 A824010008600600600000404600644645000030E000000000000000000000000000000000000000 FF788E0000018000018018C6080001801043801080000000400600400E2860060070060160000282 3000E006586070224007306226428000000000000000000000000000000000000000000000FF08D5); SDR 8000 TDI (01821941851A10101801901901C85801800002600602E40E00604110641701601600600008610608 600E406120006106000000000000000000000000000000000000000000000000FF757A0000018008 01801800001821801801809801800841620410608200600000600600600602600000600600600212 4000002004000000006002000000000000000000000000000000000002FFDF670000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000006000000000000000000000000000000000000000FF5F5C0000000002000000010000 00000000200000000000000000000000080000000400000000400100100000000000400500000000 0001006000000000000000000000000000000000000000FF4FED000000C00800800801800801C008 01801800800000600200600300200000200200200200200000200200200200200200200200000000 4000000000000000000000000000000000000000FF4A480000000000000000000010000010000000 01000000000100000000480000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000002FF3D81000000800800800800A00800800800C008008000 00200300200200200000200200200200200100300200200200200200200200000000200000000000 0000000000000000000000000000FFC4B8000401A03A01801801003801A81C01803821800000608E 08600680600000600600602600600000600700600600600680600600000000400000000000000000 0000000000000000000000FFC0670000000000100101112014110110010110010000444000404400 10400000501100400401000000400400500000001004000000100000400000000000000000000000 0000000000000000FF56D4000400A00800800800802A008008000040000000000002000002080000 00280200200200200000200300200200200200200200000000200000000000000000000000000000 0000000000FFCC530000002020080080880000080080000080200000221889A80000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FFBB350000000000000000000000000802000000000000000000000200000000000008800020 008000000000000800000008020000000801000000000000000000000000000000000000000000FF 092F0002002004000002040002000000000000420000000000000800800010000800040080880000 000801000050080800000000000000200000000000000000000000000000000000000000FFBB4D00); SDR 8000 TDI (40100120500D801805C01E5181180180001560050060040460000060039560064060000060070060 020840C0003004000001000000000000000000000000000000000000000000FFC37C000001001001 001001001801801801823801808100600400600400600800600201600E0060000061060061020040 40086004000000006000000000200000000000000000000000000000FFE1A7000021403001001011 085831809C01881811800080628420708C28620000600200600600600000600600628A0240004068 04000101000000000000000000000000000000000000000000FF48C1000641001001005001805801 841801801801800004600600690C10600000E0000160060060000060060060040060008020060000 00006000000000000000000000000000000000000000FF936E0000014018018010E5801841A31881 8618018000006504D8600640640000E1809460064060000060068065002440018022040000000000 00000000000000000000000000000000000000FFB5E9000001805001001911101813801949909809 800010E0060060048260000060000060060060000060060060154060204024060001010060000000 00000000000000000000000000000000FF4F7D000001801801805A01701801801801801801800000 62058060060060000060000060060060000068069460000040060020040000000000000000000000 00000000000000000000000000FF4119000001401001019400801C01801801801801800000600600 60040060000060060060060060000070070360140860100040060000000060000000000000000000 00000000000000000020FF19D9000001801001001800801811801801801801820000600600600400 600000600600600600600000600E0060041060800008060000000000000000000000000000000000 00000000000040FF73A6000001401801801000881C01801801801801800000600400600700600000 60060060060060000060060068080040080050040000000060000000000000000000000000000000 00000000FFE870000001801921821828901C41C81D01D13801800042700404E31600600008640601 60060060000860860060202440400040040000002000000000000000000000000000000000000000 00FFC08100000100100100D202009C19C01C01801801840000740600600400602080600E80600E00 6000006016116006086380006086000001000000000000000000000000000000000000000000FF24 E5000001821801801844011991801801801801800000E20608600600600000600600600602600000 600608684E806400002006000000406000000000000000000000000000000000000000FFD2170000); SDR 8000 TDI (1801801801801901801C018118418000106006806006000000006000006006006000026006106006 006002004804000205000000000000000000000000000000000000000000FF483400060000140180 18018018010018018018018000006007006006000000006000006006006000006006006006006002 004004000804006000000000000000000000000000000000000000FFA143000000001801001C0180 1889801001801001800000600600680E000001806000007816006000006006806C06006202806004 000005000000000000000000000000000000000000000000FF2B92000000001001001C01C0191100 100180308180A000E00600600620000008600000600E00E000006006006026006002006004001024 006000000000000020000000000000000000000000FF8F2D000000001801801C01801801A0180180 18018000006806006016000001006002007016006000026007006404006206006004000200000000 000000000000000000000000000000000000FF72260000000018030018018838098010A382500180 0000600600620600000000600200600600600000600602E006006002006004080000006000000000 000000000000000000000000000000FF9D88000000001001801801C838892018A38298A180C00968 06006A06400000106002006016016000006006026826006002804004000840000000000000000040 000000000000000000000000FFA0D100000000100300180180180100100180100180000060060060 0600000000600200600600600000600610E006006002006004100000006000000000000000000000 000000000000000000FF960500000000100100180180180100100180100180000060060060060000 00006002006006006000006006006004006002006006000000000000000000000000000000000000 000000000000FF984500000020100120180180180140100180100180000060060060060000000060 02006006006000006007006006006002007006000001006000000000000000000000000000000000 000002FFB86400020000100100180180180100140180100180000060060060060000008060020060 06006000006006006104106002884006000000000000000000000000000000000000000000000002 FFB0B400020000100100181180180100100184500180800060060060060010088060030060060060 00006106006006006122004806000000006000000000200000000000000000000000000002FF1CCD 000001001001001001801801C0180180180180000060040060040070000060020160160060000060 07006002004000002004000001006000000000000000000000000000000000000002FF2954000001); SDR 8000 TDI (020020800AA0AA0AA0AA0AA0AA00002A80202A80002A80002A82A02A82A82A80002A82A82A823001 00102282480000000A8000000000000000000000000000000000000000FFD97500000C100A08A00A 20A00A00A00A00200A000001002810800A0200080080280200280280200080280300288AD0A80A80 2802000002A02000000000000000000000000000000000000000FF33420002A02302C02B120B2012 002000010002010001004A848048CC800000804811004804800001004805004800840AC08808C000 0000804000000000000000000000000000000000000000FFF257000012085809843805801825805A 4188180380004064061060A620000010600601600650600050610600640600600600648600020608 4000000000000000000000000000000000000000FFB2EE000100428CC2D008C0850C00D20C02E309 40800008310200A40A10010024314320210300200100200320308B11302354B04200100300000000 0000000000000000000000000000000002FFBC780003022042042242010280020C62470421040000 D20C84014808000000000900A00120800000800080A0090080080083080000000088400000000000 0000000000000000000000000002FFAB61000000180800901840841800820800800A018000006002 80A0260000008422C240300220200000210202200200200204200200040200000000000000000000 0000000000000000000002FF3E8900001002010008A0064002084080003104400000280228900551 500001088006000A0000600008100000000C3860466001C800000000E00000000000000000000000 0000000000000000FF2A5E0000840020000404004020C40000000000200001000000281A80000000 D0000001000840000060120008041001000010820000000010600000000000000000000000000000 0000000000FF8CC50000000598D18019A9A91821901A81881A81800000E106006006080100006008 00688610E0001068064060A602608208440600002000600000000000000000000000000000000000 0000FF870E000004209B01D13AC9909A45A81903A018018000A3748690E106080000106A914064A6 A06001006107326826C46882A4EC0E000820800000000000000000000000000000000000000000FF E4CD0000800C3A01841A0584389182D8018858C1800008603620624E00000081600000680E00E000 286206006116086002906106000000116000000000000000000000000000000000000000FFF40000 00000010010018018018010012018010018000006006006006000000006000006006006000006007 806006006002806806000802000000000000000000000000000000000000000000FF6C0D00000000); SDR 8000 TDI (08000000401200008000004000001000000000000000000800000000000400480080000000000000 00210288008000206008000000000000000000000000000000000000FFFC01000000020020001009 04000900114400000008000902080C02004000800040060000040060000040000001240060060080 04000000006000000000000000000000000000000000000002FF9EE8000022809814800840890800 801844800800800000200600614200001200200210200210A1004020122020020020221C20020400 00044000000000000000000000000000000000000002FFB5E6000481410401421401400401400401 40142200012050010094010010010000010010000000010010014880000000C00000000001810000 00000000000000000000000000000000000002FFE633000480C40C40C00C00C20C08C00CA2C00C00 900148300312B0030011030020030030020020010030030020A20021020120020000010020000000 00000000000000000000000000000000FFD16F000025801801041011101801001001801845800000 E4160060062000060060060060060160020060061160060060061060060000000040000000000000 00000000000000000000000000FF429E000001209201201205000201401001401400000100500400 4C01000004800810804800800000800005004800800AC08408000008008040000000000000000000 00000000000000000000FFE2720000008C4800800800A00800800800000000800000000000215200 000200200200200200200200200200240200200A0820020000004020000000000000000000000000 00000000000000FF26A90002AA1000AA4AA0AC0AA0AA0AA2AA0AA0AA00002A82A8AA80102A80002A 82A02A82A82A80002A9AA82A81B82A84002082A80000000A80000000000000000000000000000000 00000002FF9B35000408220028040022000000000400400000000000120900020000100000010000 00000000000010000000002003000102000000000000000000000000000000000000000000000000 02FF01A90002AA0020AA0AA0A84AA0AA0AA4AA0AA0AA00002A82A92A82802A80002A82A82A82A82A 80002A82A82A84002A81200002A80000002A8000000000000000000000000000000000000000FF12 300001440923023123103543543541541543540000D501205508C8550000D50C51550D50D50000D5 0550D50CC0940840CC0908000000D50000000000000000000000000000000000000000FFDA940002 00650400000400000400400000400400000100100000102100000100100180100100000100000100 1041001009551000001001000000000000000000000000000000000000000002FF1EAA0000000020); SDR 8000 TDI (10010010010010018018010000006807006004000006000006006000000000000006006002006200 006006000100000000000000000000000000000000000000000000FFF40200000180180000180180 1201A018018018010000806006006804000006000004006000000000000006006006006008006006 000010406000000000000000000000000000000000000004FFB54D000001AABEAA0ABAABAAB8AB8A BAABAABAAB00002AE2AF2AE2AE8000062A82AC2AE2A82A80002A82AE2AE2AA2AE0B02AE2AE000220 8A8000000000000000000000000000000000000004FFCF9B000401C11A04C0100100140300500185 58018000006006806004000006000014006000000000000006006406006000106006000111006000 000000000000000000000000000000000000FF2936000401D55954D5515515595515515595595580 00D56556556556000006550554556550550000550556556552556006552556000551550000000000 000000000000000000000000000000FF2F440000018018200AACAACAB080CB0CABC81CAB0000AAF2 AE2AF2AD0000062AE2A22AE2AE2AE0002AE2AE2AE0262AE2A80262AC0000402AE000000000000000 000000000000000000000000FF481E000001A01A00800E00E01600C00E01E01E0180000070060060 05800006006002006006006000006006006006006340006006000000800000000000000000000000 000000000000000000FF9CAB0000019679100AA8AA8AB850A008AB8218AB0000AAE2AE2AE2AE0000 062AE2A22AE2AE2AE0002AE2AE2AE1122AE2A84162260006000AA000000000000000000000000000 000000000002FF6124000201909940A0080080180085480181180180000068070060060000060060 0A00600600600000600600621200600000E106000110204000000000000000000000000000000000 000002FF54A900000180180C0000000010B408000188380100000060060060040000060060020060 06006002006006006126006000344016000020000000000000000000000000000000000000000002 FFE1EF000001801800850000041800100001801801800000600600602600000E0060020060060060 00206016006086006000016514010000046010000000000000000000000000000000000000FF128E 0000018058C18280000A5800080101801841860000600618600618000610600200E00E00E0020060 0600E08668E000006006180000404000000000000000000000000000000000000002FFDA1F000001 80190B88002010980A00004380180180001060060061060000060060021160160B60B000E0060160 021160004A4006020000002000000000000000000000000000000000000000FFCB4A000000004020); SDR 8000 TDI (01E01881001ED5821801800100600620780600610180780300780780600000740704608610F05002 6006000006004000000000000000000000000000000000000000FFB881000081840820801A01401C 01401C21A01C018101006006996005006080806803006806806000806807026007086C2810600600 0006004000000000000000000000000000000000000000FF98A2000101801000C01C018018018018 01811C01800020700700608600600000000000600000000108000611740580400600600400000600 4000000000000000000000000000000020000000FFD1D2000001801040805801801C030018018018 01800000600680600600600081080800680080800001000600625600600009600400000640400000 0000000000000000000000000000000000FFB0D2000001801804801C03401801A05C01C01C018000 80600600600480600000000100601000000080080700610400484844600400000600400000000000 0000000000000000000000000000FFE1090000AB8AB8988A98AD0AB8A90AD8AB8AB8AB80002AE2AE 2AE2AC0062A82A0AA02AE2A12B00002A02AE2AE0062AE6801462AC0000064AC00000000000000000 0000000000000000000000FFD5DF0000018011048218110018010098018018238000006006006044 00600000001000400001000000000600600480430000402600000620000000000000000000000000 0000000000000000FF1A9C0000AB8AB0A48AD8A90AB8AB0A98AB8AB8AB80002AE2AE2AE2AC0062A8 2A02A82AC2A02A00002B02AE2AE2B42AC90000E2AE0000060AC00000000000000000000000000000 0000000000FFB8E400015595583091594514594D1459559559118000556556556314006550549540 554551540000540556556554D5502055610600000615000000000000000000000000000000000000 0000FF1D0D0000018018008018010018010018018018018000006006006004006000008000004010 000000000006006004004048404006000004004000000000000000000000000000000000000000FF 6CAE0000AB8AB8200A18818110818818AB8AB82100002AE2AE2AE0040002AE2A02262AE2A02A0000 2B02AE2AE2AA2AE2900064160000000AE000000000000000000000000000000000000000FF0C4100 00018019000018419010118118018019010000006006006434000006010016006000000000008006 00600200604800624E000000400000000000000000000000000000000000000000FF867600000180 181400D01504D02502500180180B0000006006006104000006000106006008008000000006006002 00600032E106000000006000000000000000000000000000000000000000FF975E00020180180020); SDR 8000 TDI (00140C20120120100100090050048040500048010008008010008000010010050052412088480008 00000040000000000000000000000000000000000000000000FFFC49000555D5114B155955D55955 955B55D55D558000556D57D56557556001546556D57546556001547557557D57D570275565560005 56356000000000000000000000000000000000000000FF488C0000AA8A2880AAA9208AA880CAA8AA AAA8AA80082AA2AA2AA2822AB0002B2AB22322AAAA20002A22AA2AA0921221020332AA0000122AA0 00000000000000000000000000000000000000FF8374000200403000001200001200001000001001 0001004004004000000000808000000808000000801000800000000B000000000000000000000000 00000000000000000000000000000000FF5D8E0000AB8908418AA8168AA8488AA8AB8AA8AA80002A A2AA2AA00A2AE0012A2AA2322AA2ABA000AB22AA2AB002882C0250A22200050A2AA0000000000000 00000000000000000000000000FFEC9D0000000150C0000100000122000000000000000000000000 014000000001601600000600600001600000010600E04E0441100000400040000000000000000000 00000000000000000000FFFF39000000020014000030000000000000000000000000000000020000 00000000001080110000000000000002314402803000000002800060000000000000000000000000 00000000000000FFD5BA000001800001101801841801801801841801800000600600600600600100 68021170471062011560160068050048005460060000065040000000000000000000000000000000 00000000FF92FC0000018000058018899058A38A1801801901902800640605600640600004700202 641640E08800600600602620F0080060060800060040000000000000000000000000000000000000 00FFD1AF000001900002801809883801805811801801800000600600E00610600002600200620E20 600808600E006026006000006556040006284400000000000000000000000000000000000000FFE0 29000001800000801801021801003819861801880840600642610400600000680208602688620010 6006116106816800186226000006004000000000000000000000000000000040000000FF68950000 01880800D01C818018A38A1801801A81804080720600600630600000600205600601610102E80700 680421480822608E0A0006004200000000000000000000000000000000000000FF1B850000018208 00809801001881801883809801810000600701600400600000600300600600600000620600620480 4400046006000006004000000000000000000000000000000000000000FF87950000018008408118); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF62DD00000000040000000000000000 00004000000000000000800000800000000000000000004000000000000004004000000001000000 000000000000000000000000000000000000000002FF80EB00000000080180080180000000000000 08000000006006000000000000000002002000002000002000006002002002002002002000000000 000000000000000000000000000000000000FF3B7B00000000000000100000000000000000100000 00000000800000800000000000000000000000000000000000000000000000004000000000000000 000000000000000000000000000000FFC8CA000000000C0080080080000000000040080000000020 02000000000000000002002000002000002000006002002002002003006000000000000000000000 000000000000000000000000FF677F000000001801C01881800000000000001802000100E0260000 00008000000026026000006001006000086006007086006006006000000000000000000000000020 000000000000000000FF68A300000000000100100100040000040000101000000444040000000000 00000004004000400000004001004000000800000000004000000000000000000000000000000000 000000000000FFA80C00000000080080080080020040020000000000000100200000000080000000 02002001002000002000002002002002002002002000000000000000000000000040000000000000 000000FFA15100000000000000000000000020000000000A00000202000000000000000000000000 00800000000000000000000000000000000000000000000000000000000000000000000000000000 FF2F6100000000000020008000000000000000000000008000000000000000000000200200002000 00800000880000000080000000000000000000000000000000000000000000000000000000FF7FE9 00040000000000000040000000000040040000000000008000008000008000000008000080008108 00000000000280800000000000400000000000000000000000000000000000000000FFAA64000000 20204440000000000020000000000000000010000000000000000080000000080000000000008008 00801048000000000000000000000000000000000000000000000000000000FF766C0000AA8A8888 CAA8AA8AA8AACAAEAA0AA0AA0009AAB2A82A82AA2A80002A3AAA2AA2A3AA20002B22AA2AA2AA2AA0 122AA2AA0002AA0AA000000000000000000000000000000000000000FF4862000201401013201400); SDR 8000 TDI (00000000011A0000000060060080200A000000000600600000000000600080608210610600E00600 6000000000000000000000000000000000000000000000FFA5130000000050158058058000000000 0000180002001060060080480A000000000600600000200000600000600600600600400410600000 0000000000000000000000000000000000000000FFC6C6000008001981801A018020580200C00618 00000008600600020000000000800620600800200000600000610540660201400408600000000000 0000000000000000000000000000000000FFDFE70000300810018218219040000401020118000000 20600628040000000001000640601000200000600000700608690620400400600000000000000000 0000000000000000000000000000FF538A000000001801E018018000002000000018000000006006 00000000000000000600600000200000600000600400600600400480600000000000000000000000 0000000000000000000002FFE25A0000000010018018018000004000000018000000007006000000 80000000000600600000000000600000600600600000600700600000000000000000000000000000 0000000000000002FF71520000000010018018018000000000000018000000006006000001000000 00000600600000000000600000600600700000600600600000000000000000000000000020000000 0000000002FFDAA90000000018018018018000000000000018000000007006000000000000000006 00600000200000600000600600480000400400600000000000000000000000000020000000000000 0000FF85DD000004003C41C01C0D80000C1041404018001000106426300000008080000016116000 042000106100406082006008044004006000000000000000000000000000000000000000000000FF 136A0000000010018018018080000002004018000000206006020A00000000000006A06000004000 006020006006006006086006806000200000000000000000000000000000000000000000FF7A1300 00000018018018158000040000000018000000006006040000000100000006006000004000006000 006806006992106006006000400000000000000000000000000000000000000000FFF64500000400 1C01C01C018100001003000018000000006246400C00008000000016806000046000086140006106 006006004005006000000000000000000000000000000000000000000002FF6DA800000000382180 1801800010002020001800080048600608000000000000000648E000006000006000206004006002 024004006000000000000000000000000000000000000000000000FF409B00000000000000000000); SDR 8000 TDI (001804000001800000000640000000000000F807C0600000600080E0000060060000060000000060 00000000000000000000000000000000000000000000FF6BC0000000001800001805001000001800 000001800000000400002020002000600E00608020E0200060200040060080060000000060000000 00200000000000000000000000000000000040FF5DEF000000001800501801801800001804000201 80000000064000000000000170074060000060010160004060060000060080001060000000000000 00000000000000000000000000000000FF9CF3000000001800001801801800001802000021800000 000E0000000080400060060060000060000060000060060008069001000060000000000000000000 00000000000000000000000002FFA3DB00000000180000180108100000188A008283800020000400 004000800000600E00608040E0400060200840060100060000000060000000000000000000000000 00000000000000000002FFC726000000001800001801001000001800000029800004000C00000040 00000060060060000060000060002060060000060000000060000000004000000000000000000000 00000000000000FF622D000000001800001801001000001800000001800000000400000000000000 60060060000060000060000060060000060000000060000000000000000000000000000000000000 00000000FF2ACD000000001800001801001000001800000001800000000400000000000000600600 60000060000060000060068000060000000060000000000000000000000000000000000000000000 00FF18F1000000001800001801401000001800000001800000000400000100000000600600600000 6000006000006006000006001000006000000000000000000400000000000000000000000000FFC2 1E000000001800401801001000001800000001800000000400000000000100600600600000600000 6000004006000006000001006000000000000000000000000000000000000000000000FF02F40000 00001001C01801800000000000001800000000600600000000000000000600600000000000600000 6006006002006806006000000000000000000000000000000000000000000000FFF12F0000000010 01841C41A00040000044001800040040600650001080000080000600600000000000600000600240 6002406806806000000000000000000200000000000000000000000000FF4F03000000001001C018 01800000000000001C00000000600600000000000000000600600000000000600100600600600600 6806006000000000000000000000000000000000000000000000FF654400002010300DA058059000); SDR 8000 TDI (100020000100008008000000000000000040040040008A4001004000800950C00910890810004000 000000000000000000000000000000000000000000FF5D4400000002190021184180180000580008 00418000000506000000000000406806906000106000406000506086000006000000006000000000 000000000000000000000000000000000000FFCD7D000000000840000C80C4080000080002000080 005010020000000000010021020020004020001020010030024C1522080000806000000000000000 000000000000000000000000000000FFDC3F00000026138020026000000002100008004100000212 80000000000000000100908000928000800001400880840888808800200000000000000000000000 000000000000000000000002FF4DE600000020080040980080080040880000000080000000020000 00000000003002802000402000102000002002008002020008006000000000000000000000000000 000000000000000002FFBF0D00000000000001000002000000000050000000013800000000000000 00201000080000000000088000084106400404280001020000000000000000000000000000000000 000000000002FF140600000000000000200A08200020000006042000004004000000000000000000 00000001000001000000100008180060100001880000000000000000000000000000000000000000 000000FF564C00000008B862281901841880005800000003800000010E0000000800004060860060 0020600040600020C006020306000080006000000000000000000000000000000000000000000000 FFBAC40000002AD82000DA01B21880009800100223800002088E000000080001006886906000A460 0088600089689600088E120088246000000000000000000000000000000000000000000000FFC94E 00000000188208182D805800021800040001800050020600000000000040680680E0000160000160 002040060D1427210000106000000000000000000000000000000000000000000000FF436C000000 00180020180100100000180000000180000000040000018000000060060060000060000060000060 06000004001800006000000000000000000000000000000000000000000000FFFE6B000000001C00 40180190180000191001011580004400060000000000000060060060000060000060005060060000 06100100806000000000000000000000000000000000000000000000FF6AAD000000001800001801 00100000180000000180000000040000000000000060060060000060000060004040060000060080 01086000000000000000000000000000000000000000000020FF73A2000000001C00281803801800); SDR 8000 TDI (00001800840000200210000000002008000200200001008000200008000A00200204200250000004 0000000000000000000000000000000000000000FF7CA40000004004014004004004014000004044 01002108500400000100000100100100000100000100000100001000000100100100000000000000 0000000000000000000000000000000000FFB7C2000000400400C00C00C00C00C000A0400C208121 10300200000100004100100300200100000100210100010200200B08300300000000000000000000 0000000000000000000000000000FFFC460000000000018018018018018000000018018000006006 00001000000010000600600000010000600010000602600600600600000000000000020000000000 0000000000000000000002FF2A880000000002010010012010010000002010010000005004000000 800000000800800001000000004000800910800CA080080080000000000000000000000000000000 0000000000000002FFAF24000000000000A00A008008008000000002000000000000000000000000 00000200200010800000200000022200200200200200000000000000000000000000000000000000 0000000000FF85D10000000AA4AA4AA0AA4000000000000AA40000002A82A80000000000000002A8 2A80002200002A80002A80002A80192A82A82A800000000000000000000000000000000000000000 0000FF86500000000104002004004000000000000004000000001000000000000000000000000000 100000000000000000000000008088000000000000000000000000000000000000000000000000FF AA150000000AA0AA0AA0AA0000000000000AA00000002A82A80000010000000002A82A8000220000 2A80002A80082A82802A8AA82A8000000000000000000000000000000000000000000000FF98F300 00001441541541540004000000003540000000D50550000000000000000D50D50000440000D50000 550810CC8CD0D40C00550000000000000000000000000000000000000000000000FFF9A800000000 000020040000000000000040000000000018000000000000000010010000011080000000010012A1 001040000001000000000000000000000000000000000000000000000000FFCF4C0000000000AA0A A0AA0002000000000AA20000002A82A80000000000000002A82A8000210000AA80002A8540088220 2002402A8000000000000000000000000000000000000000000000FF1A44000000100A00000A00A0 0800000800400000800100000200000000000000280280200000A000002000002A02820802840920 002000000000000000000000000000000000000000000000FF180300000024D40000140000000000); SDR 8000 TDI (201AAB80000062AE0000008000002A82A82A80002A80002AE0002A82AE0042A80040042A80000000 00000000000000000000000000000000000002FFA093000000000201A01811821801800000001801 80000064060000000000000000000000000000000060008400060044800040040000000000000000 00000000000000000000000000000000FF4D3C000000154001955B55B55801B54000201B55800080 6556000000000000550550550000550000556000550556004550004004D500000000000000000000 00000000000000000000000000FF93770000000AA0018ABAC3A918018AA000201AAB80008070B600 00008000002A82AE2AE0002A80002AE0000102AE006026006006AA80000000000000000000000000 00000000000000000000FF7D4F000000000201A01A01A01801800000201A01800000700600000000 00000000060060000000000060000000060060070070060000000000000000000000000000000000 00000000000000FFFD7A0000000AA0018AB801805801AAA0000018AB80008060060000000000002A 82AE2AE0002A80002AE0005082AE006010004004AA80000000000000000000000000000000000000 00000000FF5CEC000000400001801811831C018000000018018000006C1600000000000000000600 60000000000060004000060065568048040000000000000000000000000000000000000000000000 00FFE3240000000000018018A588380180000000180180000060C600000000000000000600600000 00000060000C0006006006006006000000000000000000000000000000000000000000000000FF1D 17000000000009801801801801800000001801820000600608000000000000000600600000000000 6000000006006006006006280110020000000000000000000000000000000000000000FF6CE90000 00000009901801801801808000001801800000600600800000001000000600601008006000600000 0006006020014004010088200000000000000000000000000000000000000000FF9DDE0000000000 81823801829821810028001821800000600601000000000000000600E00010800000600000000608 60402A4004000000400000000000000000000000000000000000000002FF82BC0000000000801400 00028040000028000020000000000000000000000800000001000800000000000000000010000029 0000010000000000000000000000000000000000000000000000FF73520000000000000000000000 00000140004020008000000000000800000000000400400000000000008000008604000808000000 0000000000000400000000000000000000000000000000FFCFA60000000000008058018018008000); SDR 8000 TDI (18018000000406000000006001200000000001806000000001404004005024006007004000000000 000000000000000000000000000000000000FFE25600000000000180180180180000000000180180 00001006000000006000000000800000006000800000004806804044006006004000000000000000 000000000000000000000000000000FFBE2B00000000040180180180180000000040100180010000 06000000006000000810008000006000000000804004002284006007004000000000000000000000 000000000000000000000000FFF8120000000000AB8AB8AB8AB8AA0000000AB0AB80002A82AE0000 000060000002A02A00000060002A8000004AAE2AA01C2AE2AE004000000000000000000000000000 000000000000000020FF315900000000000180180180180000000000100180000000060000000060 0000000000800000600000000000600201408612E08E006000000000000000000000000000000000 000000000000FF34AB0000000000AB8AB8AB8AB8AA0000000AB0AB80002A82AE0000000060000002 B02A00000060002A80000062AE2AC0062AE2AE006000000000000000000000000000000000000000 000020FF097A00000000015595595595595400000015515580005505560000000060000005485400 00006000550000005552544456406406006000000000000000000000000000000000000000000002 FF4D7000000000000180180180180000000000100180000000060000000060000000000100000060 00000000004006000326006006006000000000000000000000000000000000000000000002FF9B05 0000000000AB8AB8AB8AB8AB8000000AB8AB80002AE2AE0000000000000002A02A80000000002AE0 000002AE22E0002062C6000000000000000000000000000000000000000000000002FFA8D6000000 00000180180180180180000000180180000060060000000000000000100000000000000060000000 06006056006006000000000000000000000000000000000000000000000002FF6F96000000000001 80180180180180000000180180000060060000000000000000000000000000000060000000061064 800AE036000000000000000000000000000000000000000000000000FFD41E000000000001801801 80180180000000180180000068060000000000000000000000000000000060010000060060060060 06000000000000000000000000000000000000000000000000FF0CF7000000000001801801801801 80000000180180008060060000000000000000000000000000000060000000060040000040048000 00000000000000000000000000000000000000000000FF87570000004AA601EABAABAABC018AA000); SDR 8000 TDI (AA80000002AA0000002AA0000002A22A20002AA0000000002A28020A22222AE2AE24200000000000 0000000000000000000000000000000000FF35AE0000000002000010012012000000002002000000 80100400000000000000080080000000000080000000000803000000400400000000000000000000 0000000000000000000000000000FFD9060000000000AB8AA8AA8AA8000000001208AB80000002AA 0000002AE000000AB2AB20002AA0000000000028120022222AA2AA33200000000000000000000000 0000000000000000000000FF7F260000000000000000000000000000001020000000000000000000 00000000000E00600000000000000050020610800000000010000000000000000000000000000000 0000000000000002FFAB580000000000000000000000000000000100000000000000000000000000 00000001000000000000000003014824009000000001000000000000000000000000000000000000 0000000042FF341E0000000000018018018018000000001018018000000406000000406000001007 00600000600040000000489401004600602600400000000000000000000000000000000000000000 0000FF9C1800000000000380180188184C0000820018818000000006010000006000000006106008 0060080200000A700600200610E016004000000000000000000000000000000000000000000002FF E63300000000000190180180180A0000000018018000000006008000006000000006006008006000 010000004006002006006006506140000000000000000000000000000000000000000002FF0AD100 00000000018018018018200000000810018000000206000000206000400006086000006000200000 00680E00A06608600E006000000000000000000000000000000000000000000000FF2F9200000000 0003C818018818002000820018818000000006000000006001000806006001006010030000146102 004006016046A840A0000000000000000000000000000000000000000002FFA93500000000000180 18018018000000020010818200020406000000006000000006006000006000000009086006083006 006006004000000000000000000000000000000000000000000002FF0B8900000060000180180180 1800000004001E818000020006000000006000001007806000006001800000085C06404006006006 006000000000000000000000000000000000000000000002FFF412000000000401C01C0380180000 00004010018401001006000000006000000806806001006018800011206A06B02006006007006000 000000000000000000000000000000000000000000FF3544000000000001E01A0580180040000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF5E98000000000000000000000000000000000000000000 00000000000000000000008008000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF032D0000 00000000000000400000000000000400000000080000000080000000081080000100000000000000 0108008000000000000000000000000000000000000000000000000000000002FF3BB00000000000 00200200000000000000000000000000000000000000000000000001000000000000000000022050 0000800000000000000000000000000000000000000000000000000000FF91730000000006AA8AA8 AA8AA8000000000AACAA00000012AA0000002AA0000002B22A20002AA0000000002ABD420222AA2A BAAA2AA000000000000000000000000000000000000000000000FF69470000000004012014014012 000000002444010001001004000000004000001001000000004001000000010AA020811000400400 0000000000000000000000000000000000000000000040FF1D0A000000000155D55F55D558000000 00155955800000055600000155600000154754E00155600000000055600650655755655655600000 0000000000000000000000000000000000000000FF75E30000000000AAAAA8AA8AA8000000000088); SDR 8000 TDI (00000380000000000000000008000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFC16700000000000000002000000000002000000000000000 00080020000000000010200000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF409B00000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF1A9B00000000000000000000000000000000000000000000000000000000000000 01800000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF20C500000000010400004000004000000008000000000000000000000000000000A01000001400 08000000040010000000110010010000000000000000000000000000000000000000000000FF44BB 00000000800000A00800000000000000002800000000000000000000000000000080000000000080 80200000000000000000000000000000000000000000000000000000000000000000FF7277000000 00000001401000000000000000005000000000000000000000000000000100000000000100004000 00000000000000000000000000000000000000000000000000000000000000FF67A0000000010000 00000000004000000010000000000000000000000000000000001000001400080001000000000000 00010008010000000000000000000000000000000000000000000000FF433E000000000082000020 00000000000000000000000000000000000000000001400000000000000000000200080000000800 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF5E98000000000000000000000000000000 00000000000000000000000000000000008008000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF3ED30000000000000000000000000000020000000000000000 00000800000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FFCF360000000000000000000200000000820000020800000000008008 00801000000000000000800000000000000000800000000000000000000010000000000000000000 0000000000000000FFD65C0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000010000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FF409B00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FF4C7600000010000000 00400000400000400000000000000000100040000040000000400000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF409B00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF904E00000000000000000000000000 00000200000000000000000000000000000000088000000020000000000000000000000000000000 000000000000000000000000000000000000000000FF3F7000000000000000000000000000000000 00000000000400000000000020000000110000000020000000000000000000000000000000000000 000000000000000000000000000000000000FFA9A800000010018000000000004006000004000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FF409B0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000FF409B0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000FF30980000000000000000 00040000000100000004100000000000000000000000000000000000000000000000000000000010 0000000000000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF0DAB0000000000000000000000000000 00000000000000000000000000000000000000000000000000000008000000000002000000000000 0000000000000000000000000000000000000000FFA07D0000000000000000000000000000000000 00000000000000800000800800000000000000800000000010000000800004000000000000000008 0000000000000000000000000000000000FF409B0000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000FF217900000000000000000000000000000000000008000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF409B00000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 FF409B00000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000FF409B 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000FF409B000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000FF409B000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF409B000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000FF409B000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000FF409B0000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000FF409B0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000FF409B0000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000FF409B0000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000000000FF 409B0000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000FFA0F200 00000000000800000000000000000000000000000000080000000000000000000000000000000000 000000000000000000000000000000000000000000000000200000000000000000FF409B00000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000FFB23A00000000000000 00000800000000200000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000FF732B00000000000010000008 00000000200000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000FF9B7F00000000000000000000000000 00200000001000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF015B00000000000000000000000000000000 00000000000000100000000000000000000000000000000000000000000000000000000000000000 000000000000000000400000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FF58BB00000000000000000000000000002000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FF409B000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000FF409B000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF7BB4000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000004200000004004000000000000000FF40 9B000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000FFA6AD0000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000400000000000000000000000000000000000000000000FF81620000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000200000000000000000000000000FF33800000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000200000000000000000000000000000000000000000000FF409B0000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000FF409B0000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000FFD2FF0000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000400000000 0000000004000000000000000000000000FF409B0000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000FF409B0000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000FF409B00000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000FF409B00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000FF0DDA00000000000000000000000000000000000000000000000000000000000000000000 00000000020000000000000000000000000000008000000000000000000000000000000000000000 FF6F2400000000000800000000000000002000000000000000000000000000000000000000000800 00100000080000000000000000008000000000000000000000000000000000000000000000FF4838 00000000000000000000000000000000000000000000000000000000000000000000000800000800 00000000000000000000008000000000000000000000000000000000000000000000FF5888000000 00000000000000000000000000000000000000000000000000000000000000000000000200000000 00000000000000000000000000000000000000000000000000000000000000FF6DF7000000000008 00000000000000002000000000000000000000000000000000000000000000000000000800000000 00000000000000010000000000000000000000000000000000000000FF201B000000000000000000 00000000008000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF201B000000000000000000000000 00008000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FFDAC0000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000002000000000000 00000000000000000000000000000000000000FFC97E000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000004000000000000000000 00000000000000000000000000000001FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000); SDR 8000 TDI (8000080800000000800C00880800F08880000000008800000088800300880000C00880800C008808 0000000000000000FF972A0001061080061061080001065080000003181060419420000000C20008 41842000041846041841846041800002000041942000841942001800006041801806041841842000 0000020000FFDE8C0004020800004020800004026800000000004001009A00000000000001008200 001008201001008201000000200001009A00001009A0000000000000000820100100820000000000 0000FFD10A0000C04400010C04400000C04400000404280C10301100000101000000301100000301 1203043011A0304001200000301180000301100004001020D04001120304301100000001000000FF 008D00004D0C400C04D0C000004D0C000004003404C0114300000100010000114300000114310110 1343D01300002000001343D0000134310030000010110014310110114300000000000000FF57D900 00000620020000600000000600000000220020000180000000080000000180000000188008000188 008000080000000180000000188008000088088000188008000180000000080000FF949600000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000400000000000000000FF40B100000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000200000000000000000000000000000FFE14E00000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000400000000200000000000000000000FF409B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000FF8A9C00000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000200000000000000000FF409B00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000FFE11A00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000200000000000000000000FF409B00000000000000000000000000000000000000000000000000); SDR 8000 TDI (10010010010010010010010010010010010010010010010010000010000000000000000000000000 00000000000000FF6265000000400400400400400400400400400400000100100100100100100100 10010010010010010010010010010010010010010010000010000000000000000000000000000000 00000000FF409B000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00FF409B000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000FF07 FF000400400400400400400400400400400400000100100100100100100100100100100100100100 1001001001001001001001001001001000000000000000000000000000000000000000FFF6244004 00000400400000400400000000000000400100000000000000000100000000100000100100000100 0000000001000000001000001000000001001000001001000000000000000000FF41CB0000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000001000000000000000000000000000000FF409B0000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000FF8F9D4000000004004004004004 00400400400400000100100100100100100100100100100100100100100100100100100100100000 1000001000000000000000000000000000000000000000FF5BA000014C40C00814C40000034C4000 0000040C3480D31000000001000000531000000531030520531030D20000000000D31000000D3103 0020000030520030030520531000000000000000FF0DC72000103440100103400000103400000004 040100040900000001010000040900000040910040040D10040000500000040D10000040D1004000 0010440040110040040900000000000000FF6A170001907800101907800001907800000004201900 601800000001010000601800000601880600641E80640000600000641E90000641E0004000008000 0000080600601800000000000000FF905200020830A00820830000020830000000031A2080820C00 000000C18000820C00000820C48820820C68820000400000820C10000820C28020000448A2002044 8820820C00000000400000FF263600002000C02202000000022000000000023C2220880000000000); SDR 8000 TDI (00000020000000020000000020000000020000000020000008020000000060000008060000000820 000000020000FF203900000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000800000000 000000FF1E5D00000010000000010000000010000000010000000004000000004000000004000000 00400000000400000000400000000400000000400000000400000000400000000C00000000400000 FFF37500000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000080000000080000000000000000080000FF9C09 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000200000000000000000200000000000000000000000FF5D4D000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000200000000000000000200000001000000000000000FFFD54000400400400 40040040040040040040040000010010010010010010010010010010010010010010010010010010 01001001001001000000000000000000000000000000000000000000FF409B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000FF409B000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000FF60B3000400400400400400400400400400 40040000010010010010010010010010010010010000010010010000000000010010010000010000 00000000000000000000000000000000000000FF07FF000400400400400400400400400400400400 00010010010010010010010010010010010010010010010010010010010010010010010010000000 00000000000000000000000000000000FF409B000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000FF409B000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000FFA267000400400400400400400400400400400400000100100100100100); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000800B4D001800000000006F11 110000000000000143FFFFFFFFFFFFFFFFFFFFFFFFFF891F00000002000000002000000002000000 00200000000080000000080000000080000000080000000080000000080000000080000000180000 000080000000180000000080000000080000FF605800000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 1000000001001000000000000C0000FFC03F00000040000000040000000040000000040000000010 00000001000000001000000001000000001000000001000000001000000001000000001040100001 040100101000000001080000FF6DC700000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000008200000000040000008240000 000000000000000000FF080500000000800000000800000000800000000800000000200000000200); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D00040000000000 6FEF7000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00006FD3950000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D0014000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000800B4D000C00 000000006FF5C9000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000800B4D00 1C00000000006FC0BB00000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (0000000000000000000000000000000000000000000000000000000000000000000000000000800B 4D000200000000006FE6E70000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 800B4D001200000000006F7EC8000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000800B4D000A00000000006F589400000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D001A00000000006F6DE60000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000800B4D000600000000006F4BBA000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000800B4D001600000000006F775F00000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000800B4D000E00000000006F51030000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000800B4D001E00000000006F6471000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000800B4D000100000000006F422D00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000800B4D001100000000006F88670000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000800B4D000900000000006FAE3B000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000800B4D001900000000006F9B4900000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000800B4D000500000000006FBD150000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000800B4D001500000000006F81F0000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000800B4D000D00000000006FA7AC00 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000800B4D001D00000000006F92 DE000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000800B4D00030000000000 6FB48200000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000800B4D0013000000 00006F2CAD0000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000800B4D000B00 000000006F0AF1000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (1B00000000006F3F8300000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (3C0E0B0182C8FBB23CCC1E6F278CC1FB3DD91F67BBD991C5FBBD988C8E47D9EEC8F671992C67BB19 EEC8E47239BC9E473793C9E07078CC1E332183C8E4317EEC9E27DD8AF7623DDD8C96432393C976B1 991C660F378CC67BB19EEF664BDDECC8F67199BC9E073793C0E6F2781C1E432791C976B2388C4647 1191ECE2323D9C46471188C46231188EDE330390F764B23D8ECFBB1188C46231188C46231188C8E4 7B3CCC46231193F664327EEC8E4F218EC863BDD91C9FBB23ECC97BB238CC9E43DD91C9E43B7ECC87 BB2393C8633DD91C9E43B7ECC9FBB2393C87BB3798C8E4F0183C67BB2393C876FD991C964FDD91C9 E4319EEC8E4F218CF76472790EDFBB3798C8E4F0183CCE4727EECDE632393C060F1991C16332391C 16672393F76472790F76472790F76472790C963B1983EDE6B3191C864B2790C966F2599C864F2591 ECE4F1193C9647DD93C8E67219BC8E4F219AC966F2193F76231188C8E4FDD91C864FDD91F7647279 0CD64B3793C8F639991C1E070580C1E070580C1E070580C1647DD91C9E43DD91C9F671993F764727 90EC66B259BC9F6323DBC67BB2393C8647B388C46231188C46231188C46231188C8FB32591C76031 980F66231188C464B3388C8E4B1D81F663B1DECC4643198EC66471D8EC66330399C66031190C7647 2391C663319ECC96471D80C66031990C063B3592C8E0B1D92C166B258EC163BD988C960BD988C8E0 71D92C46431D91C8E47238CC8E471981CCE330192C46431D92C764BD98EC663BD988C763BD988C8E 07198CC66331981CCE231991C67B31191C0E6B258EC76470588C46231191CD64B1192F6647118CC0 E3319ECC764B23ECC8647D988C66031980CD64B1188C963B018CC06332580F66471D8CCC6432380C 8E33238EC763B21ECC464B0588C4623258CC96431190C066B258CC46231198C860B1190C66071991 C7643198CC67B32388C6607338CC064F2591C864F2392C46431D90C67B3258CC8E47198CC863319C CC8E0F0382C060F0382C060F0382C0633279AC9E47078CC6607338CC164F2193C964F2390C962311 88C46231188C46231188C46470393E66470183C0E0B0182C8FBB2393C87BB23EEC8F67DD91F67BB2 398C660FD993C87BB23EEC8F6719EEC8E6FB192F7647DD91C9E4B21D9C0E4FD991F76472790F7647 27D9C6643DD91C9E4319EEC46231191C9E432192C4623B388C8FB3DD91C9E0305EEF06432190C864 3C19CCE64FDDEEC8F67DD88C46232792C8E23B390C464799CCF6633279BCFE77D9EECE647B3ECC8E 231993E9E47A3ECC86471182C6643A193E9E47A39CC8F4723D1CE6470781C16030580C1E070580C1 E070781C160BDD91C46231188C46231188C46231188C46231188C86432190C864321EC00800B4D00); SDR 8000 TDI (590C56471188C46231188C46231188C8FB3DD91C9FBB238CF76430393F76472790F76471983F7647 27DBF764727DAECFBB23D9F7647DD91ECFBB19EEF7647B38CF7647DD91ECE332593F77BB23D9F764 7DD91ECFBB23D9C9FBB1993F77BB23D9C9FBBDD91EDF67019AC976BDD88F77BB2393ECFBB2393ECF BB2393ECFBB2393ECFBB2393C864BB3DBF76472790ECF6FDD91ECFBB23EEC8F67DD91ECFBB23EEF7 647B3EEC8FBB23D9F7647B3EEC8FBB23D9F7647B3EEC8F67DD91ECFBB23D9F7647DDD8CE6732788C 46231188C8FB3B3DBE662323DBF67BB2393F6647B38CC1E6307EEC9E071990C9FB323D9C660F2783 F764F2181F6647B38CC1E4707EEC9E430392C87332383C0E0B0182F7647B38CC46231188C4647D9E EC8E4FD991ECE330793C1FBB2193C0E3327ECC8F671983C8E0FDD93C86072590E66470382C060BDD 91ECE331188C462323ECF76472193F6647B38CC1E4F07EEC864F038CC9FB323D9C660F2383F764F2 181C96439991C0E0B0182F7647B38CC46231188C8FB31193C0E3B339AC8E4FD991ECE330783F764F 2181C664727ECC8F671983C8E0FDD93C8607D991ECE330793C1FBB2790C0E4B21CCC8E0F0382C060 BDD91ECE332788C46231188C8FB32788C76672393F6647B38CC1E0FDD93C86071991C9FB323D9C66 0F2783F764F2181F6647B38CC1E4707EEC9E430392C87332383C0E0B0182F7647B38CC9E231188C4 62323ECF7647B393F7647D991ECE330793C1FBB2193C0FB323D9C660F2583F764F2181C87332382C 060BDD91ECE332788C462323ECC476F21EEC8F6727ECC8F671983C860FDD93C860727CCC8E0305EE C8F671988C46479991C17BB23D9C9F6F1993C1FBB1191C8F332381C16030781C1603058EC9E4BDD9 1C663B2191F7647218CC1E031982C1FB32191ECE4FB591EC7BB2588C46231188C476FB391C4623B3 91E6783D990E66470781C16030581E760F2791C1E3301EEC1E232383F66471992C864F2388C4623B 5D8C462323CCF66472388C9F33238EC760F1199C8E4B198EC164F2388F664FD991E6647198CC1E47 118EC9E232393F664723D9C1603DD91C9F6721ECC8E47B382C064F19EEC46473793C064F11DBC8FB 327EEC8FB3DD91F664FDD91F66633599C664B278EC9FBB238CC9E4F079BC964FDD91C664B278EF76 4F2383CDF6B27EEC8E4FB390C664327ECC8E47B382C060F0382C060F0382C160319D8EDF6BDDD9C8 64B1188C46231188C46231188C8F672388C8FB32391ECE0BDD91C9E43B58CF7647B7D9F7647B3EEF 7647B3EEC464723D9F6647DD91ECFB3238EC97B311EEC8FBB2393C860BDD88CD64F079AC1E6B2792 C8E0F05ECC464705ECC76472583C664F3182C8E4F3791C0E6F039BC8E4F0383E66470183C0E0B018); SDR 8000 TDI (1993C9E43258EC760F21ECC9E233793C77332383C0E0B0183C0E0B0183C0E0B2380C164B1D8CC0E4 FD991C1E070580C1E070580C1E070582C06471793F6643D993C6633198CC67BB278CC0E4325DBC8E 432381C964F0788C964FB5D9C664F0388C66330791C96432188C46231188C46231188C46231183C4 647D991F6623DD91C9FB31D83C763323EEC9E071990C9E0F23ECC8E23218EC460F1183E66470183C 0E0B0182C8E33078CC1E332781C66032588C46231188C46071191F664F3793EDFB33591C9667D992 C664F119BC77B32788C9F6F1388C9E4F2788C1F671D92C964B11EEC8E3B2793CDE6F2781C1E33238 8C4623119BC9667278CC87631D90EC63B3599C76673391CD63B3793C0E0FDD91C66672383C0E3B27 88C8E472190CDE4F0183C766F278EC4E4F2783C760B2789C9E471182C8FBB238CCCE470781C76472 793CDE4F0383F664F198EC9E47D98CC9E471D92C67BB238CC8E0F2791C764F2388F76472790C8E4B 1993F764727ECC764F23EEC0F332391C0E0B0183C0E0B0182C664F23EEC5623238CC1E23078CC9E4 B019BC8E4FB38CC9FBB1188C46231188C46231188C8FB32388C466B2588F7647118EC1E3B2391C76 472393F7647199BC9E4707CCC8E0F0382C060B2388C664F038CC4647078CC9E332381C46330590ED E471188C46230388C8F332393F664FDD99C8E43238EF766F2783F666F2781C1E632590C963BDD9BC 9E0FD993C9FB3278CCDE4F2583CC64F1DEEC0E473799C8E4F2783E66472383C0E0B0182C9E33DD9B C9E670791C6633258CC964B038CC86231188C46232381C664FD992E66470591C060B19EEC8E4F21D BC67BB2393C876F1991C9E4F1992C8E0F1991C9F67279BC9E4B0383C664BDD90C462F2788C462323 CCC8F332382C060B1192C8E33DD92C0E4F2192C86231188C8E3307CCC8E6F2399C8E0B038C00800B 4D000700000000006FE7D4C8E6F2781C1FB3078EC1E47DD88C0E3B0382C76071D90C46232383E664 71180C164F23CCC4647278CE66472788C664F2580F664F1992C76330591C864F238CC1F3323CCCCE 6F0383C66472781E663B1999C0E072793CC64F9999C9E6F0393C0E6F2781C1F332382C060F0382C0 60B23EEEDE43B38CF7767B7EEF76232388C46231193F76232388C462311EEC46471193C46231188C 46231188F76232388C8E231193C46232588C9E231188C87BB2591C47671193C4623DDEEC46231188 EC6231188C8F6F23D9E66232388C8E231193C464F23DBC8E4799ECC8E23B38CC9E4B07D9E67B3238 8ECE332792C1F679991E66479991ECF3323CCC764721ECC464F9991C8E030781C16030781C160305 EEC8E23B398C47B3DD90C8E3B1D8CF6623219BC0FBB238CC76331988C762307EEC864F2392EC64FB); SDR 8000 TDI (47338CF6647D991C564F199AC16332592C96332793C666B0790C8E632791C86331981C56671D93C5 667278ACCE331992C6633059AC8E4B2190C8E4F2393C06332781C660F1382C464F198EC86630398C 864F2392C67B31DECC863BD98EC9E231DEEC8E432188CCE471993C66332783C76472390C466F278C C666B2583C166F079AC96672391C8603038CCCE470581C66071180C0E431992C66431993C8633218 CC4E4B2182C6607078CF7647D98CC660F2590C9E472190ED76303ECC9FBB238CC664FDD91C462311 88C46231188C46231188C9E4B1191E66470182C4633DD90C46232791F663B27ECC8F332380C163B1 D93F76230791C1E23DD81C1E0FD988C8E332783C660F19EEC46470783C67BB2393C86331188C4647 D988F66471593C660F078CE66470580C1E070591C060B238AC9E33279AF76233781F662307ECCCE4 B19EEC0E3B2788CDE330792C863B3588CDE0F338CCD6672393C664F0781F66231983C764F0791F66 471988C1E4B1982C66071991F76431188C46231188C9E4F1191E66470182C4633DD90C46232791F6 63B1191CDE03379BC96470581C77BB0383C8E333793C8E0F11ECC46670788CDE633183C8E3BDD93C 9607338CCCE47078CCC63BDD91C1E0711ECC862B278CF67BB0383E66470382C060F0382C060F0382 C060B2390C564F1981C66333793C8E0F038CC8E0F1992C864F2390C66630183C06332790C1E33018 CC87BB2588C964F1190C46231188C46231188C46231188C8FB325ECC464B9991C060F0581C8E0305 88C462B1188C462307EEC8E23DD93C0E470183C664F078CC1E3325EEC46470783C664BDD91C8E4F2 18CC96231188C46231188C8FB323CCC8E0BDD91C9E332388CDE231981C46330193C0E672391EDE33 DD88C46231191C4647D988F766F2793C0E0F1D93C1E3B27ECC97B3258EC9E3B238CC1E3BDD91C9E4 31D93C1E331D92CD60F3592C8E4F2390C67B31D82F664B1DECC764BDD91C964B1983CCE4F198CC8E 071D92C9E4F2580C0E3307EEC46073793C862307EEC46471988C66672380C0E630199C8F67259BC9 E4F2781C1E333793C0E0F1983C460F0792C66471991C0E3323ECC963B2392C664F1D93F66472391C 8E3B2793C9FB3238CC9E4F2793F664FD991C466F2591C464337ECC8E4B1993C764FD991C96331983 C9E332581CCE4719D9C96430383C9FBB1188C9E4F1993F66472791C8E471D92C67B31193C6647199 1C66272193C0E330781C664BDD91C1E4F2593C464F1992F7607238BC96332393C66472791C8E3327 88C9E332781C9E4B19ECC663319ECC9FB3278EC660733ECC97B32390F664F258CC66331981CDE4F2 3D9C964B2191C8E4F1D8BC8E4F2390C863B278CC0E672390C9633218CC664F0399C8E43278EC466F); SDR 8000 TDI (64BD992CC6332191C464F198CC9E332388C66331999C9E431990C9623218CC8E33258CC96472398C 66332392C9E332791C96332592C8E431992C86332191C976BD993CDE071191CDF33238CC8E073381 C064F2593ED7332399C17BB1191C8FB31991C17B32391C8E3321ECC864F9988C663B238CC9633258 0CC6073393CCFB3278EC8E47238CC8E073381C76471D91F66472193C66470399C0E332191C8E3321 80CC647038CC86471992C0E4FB5ECC8E3B2781E66471993CC7332380C1E070580C16471DEEC96472 790F66431998CC64BDD91C8E33DD93C46231188C46472188C8FB31199C066333ECC9F331D88C9E67 0599E66332793C9633D988C9E670599E663327ECC5E4F998CC9E639991C766F2382C1E6B37ECC9E3 323ECC9F33238EC064719ECC8E330599C9FB327CCCCE33038CC9E6F9991C060B238EC8E330793CCE 0FDD88C86231191F664F9999C660727CCC463B1D8BC9E072798C764B0393E663327ECC9F331D8B00 800B4D001700000000006F4749C9E07278CC960727ECC8E3B1D93C9E6F079BC166F9991C9E3323CC C8E3B238CC9E4F3783C0E4FD993C9E331181E66332798E663B1793C0E4F27ECC8E3B9991C660F199 0CDFB327ECC8E3B0593C7733238CC0F3323ECC8E33998CC1E4FD992F7647DD91C762F2183C764F07 88C46472590C464F9991C060F0382C060F0581CCE0305EEF7647278CC9E3BDD92C8E33DD91C96332 190EDE4FB3D8C67BB2588C46231188C46231193C86471191CCE471191E66479991C060B03EEC4647 DD8CC460FB188C8E339991E6607B78CF663BDD92C8E4B258EF7647B792F7647278EC9FBB2393F664 31191C476F9991C1E070580C16471D92C964B19EEC8E4F118EF76432390C862323DBC96232388EDE 231188C462323ECC9FB3278CC9FB31D90C863B2793C0FBB2791C87BB2393C664F1DEEC96073793C8 E4B1593C66231793C4E4F1593C464F9991C0E0B0182C8FBB1DEEC96472592C664FDD91C97BB2388C 8F6FDD8CC9E431993C5FBB2393C66472193C46231188C9E479991C1603058EC9E4F1190C1E6FDD88 C8E432588C462323ECC8E23B7CCC8E071D93C1F672588C8F671191C476FD999C863BD99BC8F67D99 3F664FD993F664FD993F664FD993C9E6F2399E66470799C8E679980CDE4F21D8C66431998C864F01 91C66330591C664727D8C964FB58CEDF3323CCC0E672393EDE33278CC9E3327ECC9E4F1D91C9E4F2 78CC164323D9C76471D93ECF332393C9E3327ECC9F332383C0E0B0183C0E0B0183C0E0B2380C163B 27EEC8E233793C0E0F139BC9E070788F76232383C56330789CD64B1393F6643D993C9E472192C864 7B7ECC9E27378EC67B31398C8633218EC1E6F0792C8E4F3193C5E27239BC6633DD98CCE4F238CC8E); SDR 8000 TDI (C8633059AC97B32788CD64BD993C8633059AC97B32788CD64B9991C0E0B0182C8E332393ECFBBC18 CC8E4FB38CC8E4F21D9F77831991C9E4B2388C462311D9C8FB32391ECE0B01EEC8FBB1191ECE4F21 90CD62323ECC8F6727ECC8F67278CEDFB323D9C9E33B7ECC8F671993C9F333393C0E6F2781CDE4F0 383ECFB323ECC8E4F21D9C664FB78CEC623B788EDE23B7ECC760F1193C1FBB23EEC8E331999F67BB 23ECEC76F23DAC0623378CC4623319BC8E3327DBC664307DBE66470183C0E0B0182F760F3791C9E2 32591ECE0FB38CC46231188C46231188C9E47B7CCC7607B583EDF333993CFE232388C8E07B788EDE 23B788EDE23B7ECC47331D83F66731188CCE47B38CC8E07B18CC0E73219FC760F19D9C9E7F2793C0 76B9999CCE0707DBECF331D91C0FB31181C9E4F3391ECE3B018CECE4B0790ECE73D988C9E4F0788C 1E6F07CCC664F078CC1E0725D8ECF6F11DAEDE47D988C46671181C0E332793C0E0F998CC8E332783 C964FB1D8ED76F1993C0F6F998EC5E472782C8F6FD988E66470580C1633DD92EC6231191C4623238 8C8E232388C46231188EDE231188C8E6723ECC47332382C060B19EEC97631188C8E231191C464711 91C46231188C476F1188C46473391ECF331D93C1767B7CCCCE4F039BC9E073793C0E0FB3CCC8E0BD D88C46231188C46231193C46479991C060B23EEC46473790C9FBB1188C8E4F2192C8FB321EEE6647 0182C66072188C4647D990F77332391C060BDD91C66072188C4647D991E66470599E763307DBC67B B1191E66470382EDE031DCEC760FD991C160319EEEC6231191E66470580C1647DD91C664F9D91C66 0FB7EEC46472188C962323CCC476F11DBE6623B7ECCDE470798C86433199C9E030398C8643319BC8 E03079BC9E4F3799C860F039BC9E4F3798C8E0F019BC9E4F3799C860F039BC9E4F3783CC64F0198C 86433180CDE4F0198C86433191C0733238ECDE4F0399C8E473381C8E4B37DAC666F3392CCE4B238C CC64B219AC9E47B5ECCDE4F2781CCE473393C8E0323CCC8E333392CDE4FB5CCC8E473391C9F33339 9ECE473799C8E4B37DAC9E479991C8E672393E666733D9C8E6F3391C966FB593C8FB3DD88C8E47B3 CCC476F9988CCE4FB799C8E0FB3CCC8E0BDD88C46231188C464B2788EDE431191F664FB790C97332 380C164719EEC46231188C46431188C962323CCC8E0BDD88C46231188C464B1191E66470182C8E33 DD90C462323CCC8FB32788C67B32588C0663218CE6647239AC8E33199AC86632799C664F2192C9E3 B3791C4633D998C9FB33399C8E4F1993C766B2788C67B3238AC1E332788C9E331D93F664F3393F66 673391C9E33278ECD64F118CF66431D99C5E073392C96672592F66471D92F6647238EC97B32391C6); SDR 8000 TDI (0CC6673191CD6632591C9E6F2393CCE432390CDE672598CC66B318CC9E332590C8667DD91C97BB23 CC00800B4D000F00000000006FE1C1C8E0B0183C0E0B2780C16473598CC66F3793F76471993C4623 378CC6667278CF666F319BCCE6B2599C8E43D990C4623198CC9E67DD91C97BB23ECCC7BB2388C466 F198CCCE4FD998C4623378CC6673198CF66431188C67B32598C4623378CC66332390C9E4B2188C46 231188C462323ECC8FB32591E6623118EC9E672198C8E433793C8E47359ACD66B3391CD66B338CC6 6331D8CC7633198CC86632791C966F2392F6643219ACCE47358CC9E070590F6647D98BF6643D990C 86332180C764F218EC863B2790C764721ECC97B32188C9FB32591F66231DECC464B3383F6643118C F664F1180CC63335ECC862319ECC96333799CC64F1993C664F1991C9E3303EEC8E232393C9633059 1F6643118CF664FD991CCE471993C764F2188C67332381C16030781C16030781C16030599C463319 8EC1E0F1193C1E4B199BCCE431180C664B278CC8FB30191C964B1990C764B278EC97B321EEC9E472 590C8E032391C664B1D92C664B198CC97B32591C764B1992F664B1181C963B2793F6647338EC9623 2581C764721ECC8FB323ECC8FB323ECC8E3B19ECC862B198CC16470788C6633258CC6633258CC664 B0182C8623258CC06332188C86431990C9E33238CC8E4F1980C9E0B278CC9E07DD88C8E332783CDE 031193C660F2790C1647DD91C66470399C6633198CC1E232782C8E4F2191C8FB32188C6633D992C8 64B2790ED7632791C664B2390CDE331188C46231188C46231188C46231191F6647DD91ECF332382C 060F0382C060B23EEC8F67DD91C9E43B3EEC8E4F21D9F76472790ECE431991CDE6FDD93C8E4321EE C8E4F2192F764727EEC8F67DD91F764727D9EDE3327DBC96332590C8E4F1188C46231188C4647D99 3C0E6723ECC9E233391F664723D9C060F0382C1603DD91ECFBBDD99CD66B319BC8F67DD91ECE47DD 88C8F6F1993C97BB1188C8F6FDDE0F7647B3EEC8F67DDEECCE6B3598CDE47B3EEC8F6723EEC4647B 78CC964F25EEC46332188C8E232380C4647B388C8F671191C46231188C476FDD91ECFBB23EEC4623 1188C4647B393C9E431188C8FB321ECC8FBB2393C666F238CC1E6F2198CC6632193C67B321ECC8FB B2393C666F119BC86633198C864F19CCC8E070580C1E070580C1E070591C060BDD91F76472790ECE 33B392C9E472390F776BB7E0F7647B5EEC8E4F21D9C8633B791C96472193C864B1188C46231188C4 6231188ECF6B1188C8FB327ECC8E4B1999C0E672393C9E6F379BC9E4F19ECC9FB32388CDE4F2793C DE6F3793C9E339991C8E03058CC96432392C9F6BB180C0FBBC188C46332591C9E431188ED647D993); SDR 8000 TDI (26928ED6EB15AAA34939389EA8F46AFD2AA3D9E8772B1476FF6F9BCC693119DC2E575389D2EE30C0 2020000FC3E2F0B8EF6BA8003E5109862B15E05090404FE3F2F87CDE2F2783CEE372B85CCE272381 CF63B2D86CD62BA5C14E7359984A4B4571809D0380C41412BD96C91409DC6C32185D4AF331995502 771B0CF61752BCCC6654404C66BB6198550BE3632CDCEC6D379BCDE6F3B4F66176379BCDE6D2A0F6 D76DBED72DA6F379BCDE6D85DB6026F379BCDA5412C7643218ED4ED96D379BCDE7692D96176DA09B CDE6D328B48269029CE134116842522D965CA6C659210C99362A026AE76394D88034B21DA257630C 045A243B4C2EC401C5022341321DA217620042F55404D044876984D8D73E92D6ADA6F379BCDE6D98 58CDE2F379BCDA6B139040B6594C042829A0916CB29809002E270988C7B3D92CCA020010C04A6030 2C9E024110C96FB412980C8B2780904003686DA6A75389C04D7411B10CFD3D3E8F47D41208D88641 1F5FA827D208046C541B13EFD3D2290482011B1506C41008FA027EA08046C60A092AE72DB9CF6257 D89D328213B6C04217D90CCE8030B6C04217D89CCE634129D04A54009DB6C37384CA675299DCB6E3 4129D04E14018DB6E761BEC04954005DB693339EC04954999CB6802186D861713924001B619B45E8 20984CCE5B57A5C4E492983DDA130105DB68B2998CF6284B86DCE130109DB68013A09AE1713924CE 131D90CCE171392400570139C2E0231B6DAE1713924766D6BA78CE93299DCB6D325A5C0A0005A00C E531994C2EC90B92C000773A4C16FB218094C612B985C60021A5DAA0B1880086D745ACC1682458C4 16FD45ACCAE820CB95001B43098C2001DA5C4E493384C2E272482CA63E13A79C60F0119C044B32A6 D2E272480036820DB9C2E492939CA4A81D9ED36CB01325A6282D000B6FB0B83CAE530BA09EE97412 081E8241218A6074112CC265010001C0233B84CA02292E80402290080C280015D4ED94014C66FB53 994003A11AA07617010CC96215D1EC2E021992C42BA3D8159643012CC96214994CC2803DA55E6270 13EC049773A09B6955414C0E0251BECF6657D99C0A3A25A09664B10A9D4E274010C004311AEC7423 5409D260219AE8A68201148F6526598526335DB2CA4DA6F379BC82763EC32EC6F379BCDA400380C0 279808F6732B944F61178ABCF66B49B9C391583E540F96C01CCCCE67339BCCE472790C9E473791C8 E47359BC8E47239ACDE472391CDE4B2592C97333399CDE6F3592C964B379AC8E432391CCE6F3592C CE472391CDE672391C8E67239BECE6F2792C9667B3ECCDE67359BF664F2392C664B2790C764F33EE C8E4BDD91F666F239ACC66B3591CD64BD988C463B3598C964B218ECCE4F2198CDE63219ACCE4B339); SDR 8000 TDI (82C060D02824020E03028040C02020001802000643C7969B65D2D36CA4C26E71385D041309B9C4E1 30104C26AE13B9C040A07B0CA6D94999CA6823D24CCE4B010A09402030090ED94014D04002580800 02010181ED26594896522594800522EBB5C4526C7B185760A6811D3A3F729C95019619511C25FFDA 36503ECD3B2936F65EF4310E55770F28B97967F8EAA70E33BBB0FDA599DA3F4215A13DBB06C872EB 2820B2343FC4A942736406AE1A28CF2C809214BEFD13AC0D4DB00A5898E79EEAAE1C18DE32ADF497 6E6C7D28467E8BEAD849FFB4CCB407B779D1CD3DD5FC2C4B91635C8B9E8454F821A470550F5CE564 606D826D5B881F44B48819B87E520CDD258410559E64DF4A7E742CC43FAB77D6CEBC151C5C738D69 99E92FDCF8AE0AB1FA906DEDBDC8364697E01D2B4EEC60E22CA2F314AF8C8D507A6084EF3AB88708 929B103CBC333C4569A2035C1AA6BE7AE6380AD7362FB5B7FE24593A4F7A09ABF8D9B790DEBD0335 38F15D75F1EE254F13227C1BD6A046F1252631759F14C17669690003D164D648B9546C7407F375DE CCFB757CFC60C0EC122A884CE03224E2FD1AAECA6DF0BA5259A0B479A1D82A57167BB1BCFDE3F93A DF714828701B90C0A611356A39789FD2E1B6994B1506E75035124F658F3717EFD477335FEDE8048E 2332040AC323AC269F2BB6462BD3ABDA9DC285612D9E09469EBFD38DE56FBF19CEF98C4A41031C86 8500BDAE5B49875EA79588C7B355CEC4FF777DFCC39144C640BD566D74A4A2DD0AA6CE6FF1BAE080 CC02228C4EE132963B91ACF5E7FB3BDFD21980A471A5DA2B57B52A196897D6E3B799F10808601394 C2A7118F7737FFDC73315EED4B5526F75831104E652C66BF3BBE4229D2AB6844AE333A0008C2231E FFF39DED6BBD18CE5ADDE29569299C08463DEE7B598F5AA5948879CC6A510B188484000005D82003 B99CF66B3998C1C9643200EA653C9A4E261072590CA01008040201008040406030180C0603018084 0201008040201005000000000000000000041008040201008408042030180C060305088408040200 402010050804020100A04020102C5904D40B0503E858E0C861D801FF3F00402030E674D8EC360B09 80D7EAF1FADD4E275D8741AD52AA5780C01008180205AB4F197D004342D0070B65121104AFE7FDFA FE7D4031F198CCE47C5A1E3723619ADFF80ED849C5448DBAD84424132DF87C5E0F1B85CB9871D86C 5674D984C4664DE8745A0D246C3022860804666E298B8440FCBF8048B8EEF67D3F1F8F47C3C1FBE7 BDD8EFB75BCDC6FD66BD5CAF964B4582FE773D98CFA6DFC9C4FC763D1C8F864341C0EC8C17484582 191EFF87C0E8602FF9DA0D778134C8656DE12B65D6B17938D84C866156E546B4D169B41B2D5ABD40); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D001F00000000006F503D0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000003380080500FC1E0B4005C0E034004C7A29C0054720B200447C3620058742E200 487836A00507024A00407F1B800F45A0200064123080018742380088181C00010102E000003F1283); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (2298E2E431FA002E5B8BF15463FB1912063FE240C7E9770F5003D42298D289722087A8E1E8805035 11FA00466BE2F8603D72020C810571A0F803F0B910AE97888450083405032941AA21548C4C8C4523 C5F125E2FC2FD15C0A8271F02871FA18FD001771C2E0C79EBB0180C06050281400BD10C7C0418010 17B9DC0DB303E0576060401349A4D26954AA552A9148A492493AF0185D3E1F2FC571C2E0C7C2B901 0100807038040E004A2492C914AA4D2E94492412C900925820200AA452292492412400410086C004 104084121010801F8210080A3E487E86C004104084126204104120709820420810824260B0298291 080080082010580042090898C1208208242603C410E924B2482416028C8269448B012010007E8042 64B240814000000000000403813E001008412601092C97490A86415493082690080A040421F7FBFC 8640002011209403F41048848640209003FC0A0825916160708864020900224120004100000BA5D2 E9748A452C964B25924924A251289048000209449259229549A5D209449259229549A5D200000000 000000000000800B4D000080000000006F1048000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (82C025F0C040124824304126010D2E90080802090C10498432634E82C50C32482010100552A9548A 452492482464C02106083C1D810180182170CA14BE5C4B97C80010380A211AB042A20C100D2E904A 2492A91608882C91493002020A07E8002008A45249248249003E5D0286C838B24104BE4905900020 34084401188592E904908848924804041FA030002C10110AA6A323C24815160B8AC5C7E1D0A07006 1C7E82022034FC7C56002CE3C385F0381180090498092486082402630430012093012492004030C9 2010C864B6012484010FC8C30428FC60871F91860831FD050842333008020230C1003CDFE191F826 01006085B330081A018119088FC1360803041205308057A1300300120908D26954AA552A9148A492 0924810D8AC5606158A0A1A25D249649259229549A512412608412010C004824C0487E804060300C 21FA09009818209303F182093030C920804981FA0060824C0FD0085A28FC2208400FD0080C064811 92CEE9F159DC56774FA54062B143F00E0F1E3F73A02818A65D1F0F8AC061F3FA3C567F159FD1E9F1 58A02009A552A954AA452292492412400210007CBE1F4F98C50FC10801F8207F43000207F15B9208 003041263CB45F10218430B5A0ACF9BD7D9F3FA74362B1407C512D808AA031F8408A170811C20470 81140422008040A0263C743F3E3F01C20102384081FA10100041263CF9FD3E573FA7CAE7F4F95CAD 0080404054281170BE032F83C6A5F078C8BE002FD76BD5CAE17C878918800420104984C021259229 549A5D20944925924100930044944825801FD008430422030065A28087E80410C1083F610C109624 0600608043601303F610C10880C0788608043601303FA10C10880C00C10F814060B2492710C10086 C02607E7AA010860844060244304021B0042182010F80CC0C10F814260B2693C3E8B043043E05018 2C924B4B80C93948580C930F05A21821101801820101801FA1D0184C310795926C21D0640A050280 C06061D078341E1F0584BFE13258240AE87E82C021D0187416070587C061F058118749A412416002 080C02082084082110580C3E030F81C1580080269349A4D2A954AA55229149249209008208041600 108240A620442082110380AC21D0187C3AFF05A0F10410482C0008B1D209449259229549A5D28924 B2412010FF0B8340E5703951FE4D271309A020B1791A0C77171FA8C863F0BF07CA235D103371F61F 0E17065CF5C2FC1AD102770341F74863F2240F03D4C0F52B7C1EA72C8A648215CF6442A114C9042B E147E972215C7E1781C5C48840BF07B4409DC0E76FE3D10E870B830E7AE800BF07C680C1A007E63C C00C7E17C190C7E1781C5FC6DCC197E870B8305E7701D18FF29038A114C90542208AF944A4502900); SDR 8000 TDI (4844904BC43F4021B00B8E10FD0086C02E33780DFE1E8E82C0622CF83D7EDF4F9FD3A031188F1200 7E824900B01928924804044001004924904920804060841804520B0C864164A24920151F240443E7 F479BD1E3B1DE200800B4D001080000000006FBC90C067F4F8EC70FF2122492E8419247F975FAA41 E3C8E82E93480592020082C920960100040B20300620221F0012D0E03018F006030787B2EFB1783C 02030E87C9011000443E1D25AA7F60D0D92022090E82C723D0D87C1608089AD3E6D15A7C567F4F8A C50100552A9148A4924904900304060100C218201003F1FA410110A814321801FA410110A8143203 F482022040A8143209088540A1901FA41011020540A180C8241011020540A190A00FE8082082A2A1 80286407E108924B245258549A5D24120004B80225F0117C055CAEAECBA9B57B0D5E9808104104D7 147DFE0327B00204104135C51F7F80C9EC008800220008825E811000471208003F6260008024034A A552A9548A452492482410410010882620FC208040B0045C21F81D0182C504104828127A84C4A3E0 B1810605028140BC1010080C110BA4D2E904A2492C914AA4D2010FC6084410C10DA21FE0924821FA 090582182018F8A0020900781821104B83C0C104B81820060825C0FE843F1820970441820060825C 1090580000C104B81820060825C0C104B8410018580000C104B8410006082422E3258AC2E2C01920 00C104805C0C104805C0C104805C0C104805C0C10486C060170B8182090D805C2E060825C0C10030 412E060825C0C1003F182097030400C104B8182097030400C104B8182097030412E060825C0C104B 81820060840C09F019229549A5D2010C100800205F01801F8C104861FA093047C7EC32410412435F 80C00FD049823E3C85920820B00901FA093047C790B2410416012082430100452292492412182093 188E904A2492C90087E30412007E824C51F1E82C9043008248113003F412608F8F216482082C0241 048602008A4924904860824C220A55269748043F1FA0B04801FA093147C7A0B2410C02092044C00F D049823E3C85920820B009041218080229249241218209308829549A5D2010FC2B87C980B0586D3E 007E824C11F1F920820B0090C2203003F412608F8F216482082C02407E824C11F1E42C9041058048 2090C0401148A4924904860824C63F01D2094492592010FF0E138160F4F801FA093047C7E482082C 02430880C00FD049823E3C85920820B00901FA093047C790B2410416012082430100452292492412 18209318FC0748251249648043F182093082182107E824C11F1E82C90430082480FD049823E3D059 20820B00904301004924904860824C43F015269748043F0BE21703041261043F412608F8F4164820); SDR 8000 TDI (92592112087E4141209054240649A5D20924B2512010FD0004010487E82411050017C380D079201A 0F2587C9E094587C07287FD28924B2482C90087E901FA1B7E8747E400FBFC459F7E3F600FD81A7DF D930104C43887E83406034FBFC441A46BC4262D3EA4C1EB30783320FF07921FA030E00013087E805 E2124FAA2169E8CC3DDE2E48C4C0A0C8192C90992400892BF05A7C3A4B2400C920EB9128366F4789 C4E0F1783C1EE08187C3EFD0052C589F3FA7C5E2ECF8BC812F20BF41EFFC7BBC4587003F4E308F49 C43EEB4FBC1FAA8B4A24107B5FA7C10FCB59E406BF4F821FE1C7EC203E010EC2037A9003F63270B4 867F20000804E19B8C8FC1D090E8A42AEA8D382010325925D0022492406717F801FB0181863D18BB C9CC3003218020E0087BBA3C037680C5D1F1750113087E82483010040C860144C21FB4100804E39F 01BA23E03747A3169B0000C068F0188602714C00F3398F43FC30FC8CA341EAF063F400FF01801FE0 D39865160B04AFC1E9F0F3860100804060301C7C3C1A030180606988D83D5E0F4D804E28F01A701A 1F5783D3E0300C613E0CCDA640601014763E26823F2309F07A6E301004D269349A552A954AA45229 249089209302C583C7E1C7E0269349A4D2A954AA5522914924124920101801FD0401862D20B05FCE 1081018244D0580F8603008157401032012A2E0EF142BFE031290E381F1380C051905D2094492452 A97482512C93492552C90087E801FB507E80410FE35903CA08843F412514F40206A08E3F40751018 7AA651A9900200AA4522924924124029F5167C86FF0188D124904524964BA55269148A4021F918EC 46300FD07AB5E6107EA4D36002185C18FF0190C3E0241E3D7E9F0E00D5E0234AC42290203F4009F5 FA7CCE7F4F88C459B01D06814221854261481B9C0E0AB381C00695482CD60F07ABC201F3FA7C4620 7E80D126945884419F76A0B5D86D367CFE9E9188F3EFF0C87506BF4C48EDD437E00C2602A088210F D00622D18B1048F3E035FA7CFE9F11881FE037E02C06007EE2C06024484BF0FD0046402508044D09 1884161FA0889402020A45801FA01003F516017420440100487A954AA45229249241241601742000 00179A7C40592440C02092F87C1E8B004AC00FF241609449259229549A5D2010FD01D02821108D01 FA12A03ECA1190180FDA0300821FA104FBFC3EAB580401148A4924904900D06FEAB59666860D2166 3D10D0190692692482C010B25D2A9348A452010110F801FE887E805D20149E21FA195D921FE7F4F8 8C42017880525887E86576487FAFD38FF5F84CFE9D7988401F9C43F252010C403D2B88590020090E 52292492412C02087E865510B246E91B0F008343603143E41648A552E934805929FE007E80020092); SDR 8000 TDI (A0900E2210FD00801FA182F80EBE2008022914924920920248AC52213043F40202AC601FAE100804 055880484005F01D7C424B25D209448043FC00FF01A0C00FFC0B8402BF5FA2450FD0082400FD0480 30603483F4223F0F822020305803060905AA416A905AA416600802292492412400FFC82056201488 4E16007E80400FD0157C06207E80C02E3BF80810FD00801791905AFA9748A4D2D100808024924825 DFD7E800E80496107F924020105D2A9348043F4055F10045D24DCFBFC9E230117C1E802F80CBE207 F83D0E987F87C1E7C7F871FE1C7F871FE1C7F871FE1C7FAFD3E1D74870221F54835120803964329B 03B8CCE02D441DCAA75783CF91757854D6175FA0C2E8B71FAC101100045521D4587DC77F0126C01F F003FDFE1D4F83D7E9F0EC5D5E0307B853600F580C10110FAFD157F003F4001004D269349A552A95 4AA452292490C920948B001F414933FA7C4622499FD3E2310140FA1101884229F1145C260289801F A007EC0A3B018140A0502E03FC051F0880E10FE8084402150227D7E1F2947A1E028380A3D1F5584D D5E000804D2014BFED5E8F0F651FA007F83C1E1D0BBEC45635BA5C3C1F5FA723E071640406050184 C021F478C41E11478741C130E8382166C78052E171B80C190300404020301804968F019203E4A88D 2C960301255C2031E9B5061F5187D00FE0A3F4000C01A2C034A041F412E10023C0E8DBF806071F7F 8F9120B064513205479C606774A8EC721D1B812060F07BB2064F1FA3CDE8F1F8F11E3F24CFC92EE8 BBB32E010280DED0F01C3816F7018FE1E3F24A20FA0C0042D324A8B41A020100C0A15E2A400210FD 0564311083E42E904A2492C914AA4D24964BA4124121A2402020092412082883E82E934904021FC0 B003F4001004920928905801FC835E80C92403E8F4864800104019F7F8827E00C43F082012592B10 FD04824150B2492C90087ED01F9008180AD65F247D0200AA552291492482490488040C038904840F D430E901FB41203F422B3841F4921F7950C237B2140A02190950DDA43015BD7EAF098743998D7920 07428F90C3EFF2080001034950C82197C90D1122C4420FA0AA4D28964824924111BA402020092412 082883E82E934904021FA880E82C0E3F0785DEE0F29927107D249423AFF07BF20653A83FAA11F281 5C3D050195316880081C12288EBFC31A3557FC30083E824A349A83F4011301621F8FD289402009A4 D26954AA552A9148A49249049008022603B094B3898FC46D79AF24A3DFE5000C06050280815CA032 5944A61F7E80C678119224107E8B92412082B46094492592297482592A934A2492010FD003F08200 0802A91492452422482550E81008120086435C1F40A407E81471EAA45273EFF14CFC1489043F0920); SDR 8000 TDI (92007E80D06000E84C3E5F0000C921104925D44804044BE032F800215F003FC7CAF2385D0EE7130B D7E2E2385D0EE7138F95E2F2F85D3EFF1F0BD4E2E2F85D3EFF1F8995E2F2F85D3EFF1F0BD4E2E2F8 5D3EFF1F8BC4EBF2385D0EE7138BC4EBF2385D0EE71383C58111FE2C5EBF2785D1EEF178A4161505 B86320F07804168F5DD8C26148042C060B703FC5EBF4FABC2E8F17A7D7E29040443E230D85416037 004552893EAAD10113EBAC1A8B3FBBD56173F82D568808AA5127D55A20227D75835167F77AAC2E7F 05AAD100001924100970048BE0009134161F34824064F0004010484192E934AA452E96091D924061 92402102390186C08100492092013420C9749A5522921BA4D2C16480404010484192E934AA452E96 0B2402020092412402684086C92480404420FF0E075F8FF0A0524100857D020090842C02AD918120 60B0482B3E1F0182C21330282012E87E42C10FF0682C1E015783246030E075F8FD0402C4EFF0402C 06E84B801FC0385821FE0D0583C02AF0648E1E1C0EBF1FE0F33E9E2F2F83C5227E481C21FE0F4A40 1FC0307843C0FE0183221E00180C1500F082016037465C071504025D10F8F83DC61D59842060B002 1C1B9480459C4030780D4D120078E029380023C47481C0829E10878E220F8938221E07F87C3E2425 81C38110FA3DDE2F0B89C92030B80DC0100480090FF2482010FD0B80C50FF07BBC1E00F03FC06080 8164356F07043C510F04822E3D0587410FF0EA3406EF07825D2290B8FD1A02C280002030187C1EEF 1785C788F01BBC1E077389C2A1F1EA3C0203C385C560B703F43D0F058A0220344BEC101005522914 9249209203C43F422010D82002037881A02087E80210087E464914AA5D2C921904D2010FC0782241 1B023FC00134203C3E0B1786026970F80C4DF87E03C3E0B178602287003FE3E1C08A7C16080887E3 E1F078DC7E1B0400C0687003FC38110F61C5E0D8200C37171782C00FF0E0443E8F1F87C120808024 9049017A4111F14BE402487FD241649A4021FE1C0887D1E3F040403E9D87C7C3E390D87B1E1F1F85 02687043FC2810C7C700800B4D000880000000006FDB4AC3E390DE3C3E3F043FC1B17CFAFD3E171F 86C7E080887C018F00044388D05A7D7E9F078EC52187F874320C0F8E0229F05820218F8F87C721B0 43F417040880D3E2B05B9410FF0C3F415971F87E28110123C5011003F4161C08A7C52F87E841FA00 7E8010701019673EFF2C110B6030186CB60008026954AA552A9149245258248243F1FA010062C029 40145400087E80A1C1282C0245028D60B10FD0A92C914AA4D2E964A2481432092442391002402022 00080249049103F202C87F47C962100920108808800223F00621FF9000AC4029108C21FA0100801F); SDR 8000 TDI (21FA007E82420100552A9148A49249049003F412107E82416A1083F412075C841FA090BA9426918E 42C3E147E8041602843F4121B01421FA09083F412107E801FA090484222FC81844327D0086216022 492C9748A552690087F87C9E1B4E3FC384F0DA71F8090484A9148A492092487E82420FC0080C06D3 08B0412F47E82421087F17C0640C380410FE2E17C06407E281FA09083F412107E004060369845820 97A3F41210843F8BE032027C0601043F8BB86D017C065F01924BE0F0117C1E082F80EBB5EAE570BE 407E82420FD003F09449A592C920908822121BA492010FD003F210FD048433EEA8687CBE1344885C 20171A8408FD003F210FD0E8433EE82F84D122170805C6A0020401349A4D2A954AA5522914924834 90487E851FA0909804248988C4A390280801FB1280281FA16883F4121300847368A8943A2901006E A0A0825124964B24D2E904A2492A2500A552010FF0E3FC1E15073B89C0A4FAFD3E3F7F80DFABC023 FC38FF06164129F5FA7C7EFF01BF57D04080242A482563221030180C0108D992490FC5092C918F0B 80C02BBA4D2D60087F87402172B82D38FF0E15C169C7F87402172B82D38FF0E15C169C0802292492 4124049F0780D50FC50A7C1E0355E7C1E0101B51F8A24F83C02B88492C904A25B5010FC048242049 243F400FF24824220B0C81C3248043F41211543F41211557AC00FD0484555EB003F41210BE82C001 13FA749E7F4E93CFE9D2793C80FD023F4120302846161F3D02CC45F0097C065F003FA7E532987CA0 FD023F4361CC79F1F8010400A21108080492495F20C92494582C021B0F9EA32092F800200AA45229 24924121FA3F0782DFC4F0E824264F006A81049A5D2094492592C380B0E04F1E570197C00104F9FC 855F0057DDE5F4157C035F01D7C005F003F08013CC9300099AA03C1E0F0183DDE40C161C9880FC90 E324F0D805F2437F81CAE0008B04124F2F80C0011C680C9803AA8BDFE1F0783C07072781C060F27B 9C06407F53DFE1F2611C7E17260443EFF2242CB24F0BA0C0200AF80D06007E5501218231548B0B7F 874864408E3DD91F7F95202188180D02010FBBCBE800867E120B0F97C3E407F10020092492093887 E804845C2F80CBA5F5517D505F55D76BD5CAE17C864A24920120B003F88010049249049C43F40242 2E17C065D2FAA8BEA82FAAEBB5EAE570BE432512490090583C6011CF87CBE2300044FE9D279FD3A4 F3FA749E4F2004010487F92E934AA452C924BA48289008080249049003F03A0B0E82C10FD2592412 030586010FD003F020092412B12210592490087E801F8100480490487E80112210592490087E8002 00824B003E1F2F809100324020180A2E12C024B840783E4000020924A84004064924020200924920); SDR 8000 TDI (008C7A3D6DA4C46820DA4C46BD0DA4C6E9309800260E1709580330109D76C013A094EBB7F0ED8413 6189D80060106576D30BA08CEBB6005D3C53000B826A72126880136DA4C36833CB3432800009CC60 203A5C340B31B2C26A74A828A4336704C26CA4DA0884E14003D14A741009C2A3000080006200380C 000D83C26800990D761308B0046BB600E8F46373BEDF6E81D9E8C6E77DBEDF45344AEC4E2513BEDF 6E80D80C801705A002E8333B4C965371B0CF6C00DA6D46FB7380942270129D744313A9DF6FB73098 0C00098004EFB600ADF6C01D9094E8B1D19D468A430084E3B7D8E8F6BB0DA9C345E4F2793CAD1992 CDA9E4F27934800793D06274395D045747AA012367B2A026E54CAE030181C06030000044160D7580 412037FBAC7ABF5FA3D9EFF07AFD1ECF7F83D7E8F67BFD56976BADD10110E82DEE0701BDC6EBF5F8 15160164BFC16BF0B80C1A8964BFD7A0901A3D9EFF07AAC161F01A5D9EEB063FD2CB4C1871FE1600 40B0E0301824FE01080042A0800851FEB6005C541974082221007F120900AB09DD2990DB618060F0 2435B9E3F19DC3E9770682060CE18B2E118C9AD47E7F59A78C18F5FC0CC4B700A83298080DFC0307 0040C1210008541001020400800B4D001880000000006FF4630154AA452292490A9209202DA9F546 970F800021A0D808904B7E4251EFF02250067D51A5969830183C06087E808904B04FFC0210008541 0010A3F568010312096FC8523DFE147EAD8984F7C43F10014A61002022612C180280A809C4F74431 2B98874520D190552E94492592293480400C00FC81000244422A3D7E63525BD09A136AED3C0C8BF3 226170683C2FCB059A53D773CA5AF91ACF88306754DA1F46774FEE006008185C3400DA1DC024B23C 21FA007FC61FEA47E42D499B4394702EB0100C060501B860313003FC00FD0792C38FF005A1F800F0 3F0BA1301941FA0000B81FE1C0B89C21F7003F40001703F4132B078040601558267E009583C198B2 41F3D24908874229128C41FA0000B81FE0C7F83C3E0111832461D00005C01004D26934AA552A9548 A452492482480003E306A7C7E4B2587C92179183C3A000194DC61300C23D00328C45E210C18010E0 10101C0001041F43203004262653005AD1E01438000E013A41C0003005A30E0303801FA132494C29 8700801F96B01EB4264B0B9433E03003F2D0FCB43F2D0FCB43F2D29C8E00400017785C7E0324005C 3070141AED0701DDA0E031B922064B0A61C6B830192C290742404011900C6402E6038D4064B00AAC 16483E924121F7F8FC06372585F32370180C96083E8261EEF178003F1C37C7C6E4B0B92402030180 2000100005C51C00C4605028081623E0814ADF2168D422103B2452A934BA4128924B2452A934BA40); SDR 8000 TDI (F85C36130E05030100F0583412319ACCE6F309A4CA6D311A8CC6E301A0C86C1588C5E27148845A25 150885C261408058242393C864B22934824923138844A2213080480781C160306814120107018140 2060101000000988D800F4BA1D368B49A392C46200352A854CA25228E4B118C06030180C06030180 808040201008040201080402010080402010000000000000000000082030180C0603098488004020 1008040A05081008040080402010100804020140A04020400840000008068040040241000F87C400 C1603C1E2F078BC1E0F0783C7E3F178FC7E2F1F87C1E3F178C0582C0603018000001A0E200205000 001808038080402030380C00040180406070081C06050180402060201C0A07020080207028100A07 0081C0A070301C0A01028080607028000A07028040C02020100E030269C09A702808000002018040 40000804000000004000100004000201804060100004060100004000000008000100008000101804 060100004060001004040100008060300A4022010100225108940A230080002070081A4120904824 D22924824D20914824D209048241209349A4524914880C0402000040401010440401008080200008 0800030180C0001005C2E170B81C0E070381C1D0D3007C2A2000402001A0E0409FA7D5E8F5BA5D4E 875DA6D568B59A4D46835EA755A8D5AA554A92DCA65E5494928A05D9A80793D32250590C76801D8E CCEA71D80504CB5BA00763B33ACC76014132D6E82000ED763B1DA49842D0BA195A9A2F2793C9E432 6D766D4F2793C9A4005CB6131D8EC345E4F2793C8256385D8DE4F27934800DA08AE9B4583C269A2F 2793C865D9BD1689363793C9A5404842D310808320111A0926EE56344DAA12906CCCED400A510AD1 2AB5000B2421972AD5404D468843294DA80059091612042192AED400E492C00C804108642AB51E19 53B4C345E4F2793C825636D84DE4F27934A813199869706865003631B0D2E3B0CA002C2E03008EE3 B0D808C28011B650C866B89D42CA6D9CD1E9123118AE2750B29800647A0DA6136103D960216A6CBE FD6EB75FAFA610B5365E651E8743D613085A80168E9843D7EAE8040216A005A02610087A3D010085 A991284DAE3D0995C26570992814CB413CCF6D70D94C8003213CCF6D70994DA62709B0C268009A4D 468273A094E8013A4D262709B0C76001D84D4E2373A6D26C009B4D000753A6D26C003A4D001B4784 D84675DB001E536F14CBCD32101D26930139D76FE53A794E5E49B4D003B6B89C924B499F84E9E49A 4D00136189D84E75DB004E824BA5D04275DB00762D73BF83C3B09AEC04E75DB5D46D33BA9CA64213 A4D36270109D00130005D04C21382CA68009A0006E70994C662701809CAD75DA9D80230180804DB4); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000800B4D000480000000006F5D1B00000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000017C0000000B05830000B05830000B058A0000B058E00 00B058D0000B05850000B05850000B058D0000B198D0003319890003319890003319890003319890 0033198640033098900000000000000000000000000000000000180C001F0E5526709AE4CE13540E 95C2761808503A5709DCE02540E9043B2120880120B89C26AE03A0C04271701D2E82600E8940F418 4D268001808001741300040007A484E210DA8436A10DA00369869100463BBEEE27DEA760A55E735A 9C1EC2292786CFBFDCDF3F52E143B4D6B738AD064E6F049747799FFEAF9A8571ADDA317B8C96860B 368E4BFDFDCFB716C352BC52F519BD8E0A4D159FC33ABE6E67FEB768A15C725A1C5EE2392F82CDBE DC5F7F72F14BB0D4B6382D466E7F0C9345789F7EEFBA9579A9D8307B0CD6A61B3E8A49FCFD4FF736 D35AB850F4193DCE2A5D1D9BC11B2EA603CCAE64271F53CAD43AD02023048E9F4C971B40E8473697 97A8E5225C66001506590FB68B888C752F9B11EBC4B29402320C0ADD6D879304CA563E13D589F5AA 1844111D821A2E2643ECBE6C231D52CA547AF0302B008C9E4C175B60F84F329596A865627C760811 04580F36CBA89C7D2B9910EB44F2B4123A0808DC6D07D324DA5E3A11D48975EA38541919803C1C0F 8743D1C8FC763C9C4FA753D9CCFE77180E0683C190E86C3E188E46A3D198EC6E3F2E150B0502F158 B4522E954B2512F95CB6530A07020180B078241A0A87422190B87C261B35188DC6634180D8643598 CDE6734984DA65110A84C2E100A0482C118AC4E2F108A44A2D2711894422611090402791C9643269 14924103038040A0203000080383C060B028340209389E4EA7D399ECEE7F381E0E87C391E8EC7E1C 8C47A351D8CC7E371C0C078341D0C87C362A974A2592B97CA65B2A170A0582B178A45A0E85432110); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (08006601C58007601000000001008008001C0800620000004000D008F88001C68007A000000072D1 688001B3B8D8107E010F10003B0FF2040089000000204168061C210204C02260800072D1688001A3 B0D9C2400C11B45A20006CEE367040C1CE18060CADE00C900DC0000020FC000002CC203018040205 F018005221000000000000005612D584A4080902FFC00F17F405FFB2060142217280220A01588AC6 0088204800007A031FC2A0000254BB0001C000C00AC44E70820200000070F00422090C8142A0D0E8 0C260B0D8002A004A8002518468020700004011A40005222F38817FC080080818209520000006E16 9341A751A9542A652582C8627027160F7FBC43EF117EF0003844240426148081007110E5828E7D18 E7FE0049580A0CBB13E000011CCD40239C0598F4FE032E8C4A3CD439FF0A8FC225F39FF438068890 7FC438EFF4051120848440389447FC43A7303FC02037F8E70160503F9F8FAA47F81404008E666001 08E68092572485FAA2FD803FA744378DF993020400A9B0262C8E800984C035C01B76D60404C51121 004250210804E2516060A20428840E21FE883888408AFD502A1CFFC2801FF8F30C22230C90A20428 9046069E0186C7A170F97E20FC0A008E643FF1010020810304070DFDCA23020124E27204014201BE 28C08C5222104C0613091C4842238C05C44207400E1B4A23038754BF440100239988008CF43B138C C3A228A3003E223E804B1B13F9DF601F2C6CCBE000300020080C010280C0E008240A0D400FF78885 FE210000802889880120BE5D17008807F0D1B0584C061D068540A09894660501621000001C1A1D01 84C161B2010C00950012C204E838008900EB172017880003A89500128204F88802045E0822000002 7A00A5028020100000220034002C0012A002EC620000814009C108010204493282C86124A9020100 0A92C0027020038100800601051000000000000000100808009C4886800A8580C102010083120010 00400E00002FC02813800804001E8840001D788402D1110044001DB88442B100B4420011A0047801 50858003200100040010040600814060700412050680C160707822013E8F4BA1D22814F2392D86CD 62B398CCA64300000000000000000600800B4D001480000000006F5AA60000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00D8680027060001E10000FC1C0E00804040064121201040019000040004E08000E89450080E2C0C 0100800A030500C4229400107421400804020018270600110E344401008040030530C00201008000 00C1C01048141A0C438002A32098940A21017AE48401FF810A0040201000C16C0018885E881D6888 020100800608418004020100000080814060702318000A848480410007C7E12010010E043C010080 400305200062217A2075A220080402001826860010080400000202050181C0FC74002A1212010400 1F4E7140805E570B8900038B07004020018258600108BD10041D0808020100800608418004438D02 0040201000C1643000804020000030700412050682F00004A8806413128144202F6E8164BCC92400 0E2C1C010080060861800422F440107422000804020018260600110E344401008040030510C00201 00800000C1C01048141A0DC64012A201904C4A051080BCF0E46C010005C03890D0040201000C1740 0188877A220080402001824060010080000041406070A51A004A880480410007D284002FE4D8A002 01C188002010080060881800402000001030384A8B80054082000C00040C11616008B00200000010 080000380004000802030040A030397A24500AC878049620402CA750100884229518800190400002 58009D001140008200D0A81424000010E32090000300003851000018380209028350080402008080 408304888061010007002911D814020042320980000250280A00E08000500A000201019CC02F1289 0502053B8050201000D50397400000201398000A517B8840205002F81200000C020A91580002004A 02438001804402545020002F1158A800100003F45804F41744A096E1300A89AE5222108867012016 7601070DF9BFC0E00E41E800A6826681201672FB03250072000004C862000004A4400084E0341C00 100406008140607004120D028920000000A0008040098640510818741A150284A840020026029140 907000632400000000100C0C4C00002C42401DD2E468004A204200E00EB800A31F00774AA8A60769 480D34E180000000602E58BC4204578315E2090C3490805C5AC501E1D5921A4007CAC302701C0847 E7108114E0C53882430840200014141A030581C1E00844121920004D3008052241783E7782661EF0 03BEC0D40139A96A04C01A4A8480114C0810526A56421F208F8844227108A017079673E3AF801C00 200500C0E0A024280D0A02C0087940806000001CCC0954126924A501E0219E6D002E038380201388 425A7108434E2109A45100706C22800013A9D1027102F44E23C009C0FA0100804020102004020104 0D4123800000041C761B1582C66129241241880180000BC402007FEA10200128000000824040B1F0); SDR 8000 TDI (8048044204803ED30190D7007529140A04EB95407C082F57840F20017883002F17B8241281648F80 19148BFC8255DD86C0A09047C4E21135BAAECC178AA52274F8902E0C149AB802975700592CD389C5 62F0909340A7108975BB9F19805E2117E80C05F1344221109048A422BD3E81D91FF00BC411094EBC 42AFF48BF902491E807420A807C22243619C80209049C422ED0EEB162513920043B3382004197105 5776010030400810453A4108A8E1202012693812F620E540001C1810028047A0000030001048141A 030581C1E80982804994402FF018042031020C40201388048001013474CD1001B1582C6613128144 200F000148925923528E8402D17A824E8807FB50808100EC4020338BFB2250000106008140607021 009DB4211029C50228807FC08210C803E2010010208C840240220824018020040E444399288FC6A4 102E75E2E11CEACE21100A05227F1AA040F8F7884473B1148A732210092422811AB23FE05D64D402 F1247FB21811C0000A001802050181C3FC0B8178643A23940BD564C15A8008201398019048482002 00704B4903A6200001021000406201CA9FC68A00080706470A30002F240BFC32710035C6A7355827 FE093884182556A818438100BD400FE40240200E0000000081004062947F20400BC40A046A010080 100900803DA61400804E2095884452A93800800B4D000C80000000006F6879304E2112CB674A0102 0C500BA68A04EA611080C0203002002007000000AF00C0E0009000BC1200102004000138AC1FC0D0 00E1FEB1208DD6AFF40171F20102800000000945AA25289C4FE7F040040E3138BFDFE81408C40001 78845E20108A04E21120B000004100406008140607080181000001002F80041C4E75201324805E20 002E6D2021648040201D7A4042C858804020148B24022954E552013243C402F002A4520816434402 29540076C2102BC002003880403A24C2A050C824001201040878000600004E081383C4A2D1049C41 2100082410004882D600158BF90200000011A155800562FE388000000200008001007D000080081D FC01C6BD96000010003038020902834060B0383C4983C000088B3F28A77F4940A6F54E8CE280880C 110310EBBAAAC903958A21E47041C0FE58000A0000000400840C3A0D8AC1633098940A00F6829184 78090900C48083900C880438020CC1E04010280402000DC611E000000222000C41C291A0062E0196 0D43C01020F41C230D005E200400A00E24000DC1C2F020000218008003AF07F0880A0800800142D0 B00000315A80E0016280580E2A080001E3C080000224010001210080000A270D0104000000F47A34 26000002B0F0000E0E0B8E8002F01000020F9C0C430000C8380A2E000D464000E8380604000CC7C0); SDR 8000 TDI (40FE7F00001001E80629010080C03BB00360B89C0E3B0D8AC1604904CC250C400920600008181C80 403BD00200203003E95E821DB240000C0A0D406F210C9DE261000E4A399008E0701D002840209308 15AA078CBC400301C81640301C80400D00A210178B28EF082F020BC41030A800018280C0E0082480 0506881782045A0164ECDE2C900EF5A211D79452207C20C402FF78BC32A28403FC0AF178BC430C95 9B359AFF7F81B2250180D4A2551C81DFE28000C80205008A201911841D120700EAC00A814251084C 0A0C400C80500008181C80403B900200203003E82AE314054402F128BFC6A281C80F70391C80421F 17F8045231D79249228F892292488064408BA8040702C93852523508954403B7808607251D2205E0 814CE561E010C000140412050680C16070780211048660020BC083530880A0170FFA44A03900BFC5 2027F201FC0100845E031148C40E80708240E89008072E0018800720100171381C761B1984A412B0 5892090375C21D5800C000070687426038002C3700804024978B24A161DE4E4A31880403003C1C81 C10650334C0201CC3D008301C8140311000C0720100241A02A651382C864B0271CD0000306B1A080 C4000138944020018804002100804E24100004071C680C1A0841C140178F28C35E2FE9A404120704 9840621DD0874CA103886EC2182B540B2680C01A20340B532A377FBC5FE9170A050100E88171EB40 0E99FE901B81C031500BFDFE04807C502010080A03D9C080400FE100C4AC105A0C401F140A00A020 591C401F078814621100A0262014C86000FF6EBFDF881984040E7108563B2CED8BD362097E804060 701B54E8F1C5842052104803020720ED411810481DE60904BE715417826412097EE9503A5C0954B2 01C08F42259C9C0583D1FF949FC2C7DB04A6030000C020100545FE04001D008101080164F0382B48 2527FEC820D0807FA8175605C00EF47F9C9E20308B4462FC5374401011C80403038086160FE7FBD1 FE0500EA402014A904E0C0E09C06130FF507E0117A285E0A702345839A08E6AEFD9DA80731FF6A8C 4FDF1CA087083A7AE6C02C0B9A2C1207007C5028000340E8040000022376BA000B016A8120DFF189 FAE1803AB046075008CD0200B8A00080083803E102C01D008013B8DA0181CC604A1F0C0670000A1C 01048141A030581C1E0084700090C8C2770180503BE050E008240A0D0182C0E0F004221904C02F40 0E7B001B96D543A4D2A81868AD017FB00FE003F874F5183E0020078463FC00009D9F101009DD6100 1D3D402006C171381C362B1984A492085813003B01BB640EE4A3330040742F7045459A01C9404020 4403FCA201C100422350192432F10200008101802050181C1040A1101814E0410041C0201000A190); SDR 8000 TDI (002317F8C00004080C010280C0E40203D5BFC0100800E00248C8944038300804078B000A09090403 2402000801F7A0938404E2F1D700002F758A05E20178005EAFE00BFCABA758A05E20178005E001C7 B5D00011880460010080D628100804E27002004E001C5A0002010380502B0188040201780072E800 0944020168805A0000206070010BBFDA2017F940638A40801A01003EDD0001288040200008046E03 3BA05FE811881D0201000040201CD80002073B00800B4D001C80000000006FC5EAA05FE8100A0402 01C9A0406030C865E20138804E001000046000008040E810086432F17F80503A740A040271000046 201180040E7740BFD0201D3A05EC000080402D17FB476E01DDA040E01409D80001028000001DBA04 000168805FFA37FEC1FFA87F9DDEE8084ADDFD11144640080907C1FC000604060081406070240224 02835D1ED06000F81220C80FF205DFAC7F414098008000FC000080F02000C3A0D0A8143210895008 020014C46C1004C05001000004040620FD095D038B002041C000803C0400400041C0100EFC049704 20412FF02EC928000BE406021268071C102AECA0274608000000060E008240A0D4020304825FE4BC 9000014903EF5FCFF7F14200800005CE87F00000288464131280BD020760E17804736037FBFC0E19 0C38760807014770E040BC0624FCBA0402900818000F05481890F0883C210F08C3C4040002020501 81C3FF62021A82102097FBD1FFAE7F0BF00FF38200038B7B0C5FE524014714EC0081402010C24100 48088600C00020A03039698241251400C423A8683F80200402402007CE3FC000000BFC12B77F8400 08138A00027008940038318A04079D38817FF9306E2C239B33E1C179703E3C1FA704824A28158004 020128A056201008C4821200B50220958BFC227F10ACC0601178C40208008DC10017B00000000080 4A2811B004A0FF7A2B4A8FFD6BFC0237208241281288000236009D95A7600000020104824A0FFDF0 20000A1C01048141A030581C1E0084500090CDE421DE405E2710886532F138844D2E928C3DE23968 804023100AC102F07EED003847F40100FE000000001D6204A229038175A0108002010102804D3310 050001F020944E21114C46A40B94BC15909BA82412E880EF0438340BC40A01588C3620904BF4AA09 04804E2004C1D52011483BC0A0334805E233402C5E28044BC5E20853945AAFF38A00E8D048280080 0004E5ECFE9A8023200807D1FF117BBFCE2FF08B850281688175EADDD3FC24337A0820207DA405FE FF009C502747F404020300BAD028100AC5A280BB41DA21100A05A200A83FDDAFF7E202620102AC42 2596C86D617558425FA03018D9E2D608BEC6C751B6C5F8A768814013900E7200290380231FE8C2C0); SDR 8000 TDI (81402140000018181C01048141AEEC1EF004B056A810F004480101001E028641312814428E8174A0 0BDC50010C00002034000CE0C138BFC1001000040001000040801CB54002F5140C406F1288C41801 02BFA4001388A2067E01BDC52020084002FF40860000028BC472040000002F20081012F100BFD02F 106005EE050200402390800003A378BFD022978805E22800805FE2178864520C0000002700000103 BD44984A2F500815E2FF404E4080102A0402FF0810418000000002052082000013BADD0221008000 3874A0001020080C4038A40004EA7440944E21138824E2190080402010200100900803CE84DC3A50 0008100406201D520002753A204A271089C412710C8040201008100080480401E750500002771080 0000000944222D288441A51088D428000000873906823018F43A2D06880123500400040406201CC8 0002510000778104000002010003F0E81D60001010188040200400401FAB40E58000840040638028 8140200400401F8E4000010302880402100081044800700012301800022030081C2024040C022001 80010010070001020080C4038258BC0A2010080410000F204020008BF9200E00B40025000004A001 DC980220118905FE6078845FE0118905FEF130044FE0178905FE60188457E0178905FE31300447E0 178905FE6018845BE0178905FE312FBC4220118905FEF14FBC4220118905FEF10880002FF69BC422 0138905FEF17FA043ED000815A2B40FAC582C0995C43CE1683FC0001D1BC41209009C4823108845F E8000800E2510FB40000000824125108840025138FC4227158844027000864300104824A21108004 A271F8844E2B108804E0010C860002C408D81C0000940000128BC52D877A20440000000870305823 018F43A2002AFE5A00400340108DFC010080000020C0E5FE10072C1180C7A1D40080080D16802000 0870345823018F43A20068B401000101018BFC203700200200E004073A8104B471A8104403E03168 00015013800400B578014E201448D5FCFF00403EE5140AC5A3AB388075EF178BF80201002DBE2817 CB47724178E15A28178035A2F204E280A7100ED5E2F17F00402005FFC502E168EEE02B35ADFE0379 C0605680018E9DFE8E08E180AFE834475CD57F4024004068C2010940BC01AD179040028130B40020 31862401F080200600D029FD1008004116AFE188020000A0012000C06606C400229FAFD008440001 14814E00393059C4027140B50020100884027100800A238000000008280C774814003F6E705A8071 6937F81A0141CF044000178804660A824820122809C40271408D706412906DFE0700904027140958 1A56040C8000920804460138904681B7F81C0241009C50281291401A031C8040001D3805AE810000); SDR 8000 TDI (04BE302D140BE40389304C5700900BC4E2D16AAC5EA5378ACC020078606E281407E6E2817C090008 138A3002D569004032100E4803B283EBC13A2808240209004C280169A0BDA85AFD4D44037C604742 0078BFF240881E45D2C9DA9C4422900E7502A964E35023100BC592F1DEA0552C9DFC05EA1138BC00 2010095002F57F802001189420E20100C04020110EAD02A964EEC038B409C100717F3DDFE8154B20 0002040A03038020902834060B0383D1480599010180060F1400C400F1089C5023100B2442008242 03E010887DC13219B58101F5A2B84E01CD4040008808840010C0AC1FEB407AD1EE33593382C50A0A C92EB013E2C40B100905AC002AE321071028816241008C9FC55C24172911C64873909C1605AE3019 90562C901805003174B25641B758D564C719AC8EE00180C9624104A02603618A0402D47F0BCA05B2 80CDF6D5000586001008002394380C40A2100CC500F1408D400FE3A0C40396188144201F894D5AF5 3AA01E2801831018B46A000528178B25D02D98CE008A48000000FF7F544020100B4404302C26030E 8362B058CC26250288401EC903210000000041004060081406070018E8B803231D40480018D88A01 4000CDC6901200050207009425397004010201C8402000100E320201898D8039500CEC3100000042 20000805A0010080000A8143210048480400F8740802E241C7A05617120CE81A0E000607004120D0 2B21100074C1F2A2C462492A803EB2D0800403973A20001F00080742753A200030600CFC1C018888 003961F95162312495401F58E8B80201DB9D10001143F80201D89D40E413A204E0FE189C5FC0938B F802707F80402010081003231B0074A018D1312828420C434010080400C80A02F6681CC607673300 803318108804614178BA022814040F5681CC607710300802D21118505E2A808A0501020003000200 80C010280C0E00824800506B2687E646601800039801FF700000040E40004000CD21C01D380C0300 005039800FF70000812080400584C06108E81432098940A00080685402F5681C7A05007044004C24 104825A20878A050203C3A07028138B44820904B4560F140A040800028003039097FA20000020000 00180477400280C42610002048080080000FA140A04E200D89072281386C483B140A04E200D89076 281386C48000040004010188052EAA00AAF70014BAA802AB499500000AAE4802972A004820008200 9090AA03F10090E0006011DF80718810A0040201008C0200FC18100279C58600229780072E080094 5E081CC8400251003F80251088B4A2110694422350A0070E2BCB8002A2A00BC402FB0200408012A0 040801C584C6AF5408D7053FC943C020126E192C100E000001400041A2D502041E2753A055EA017D); SDR 8000 TDI (1319A2DD6574126DD01E5F2F9761B6188C768D4F2F97CA009854401950055C4AB190A5108D02A195 013672318CA0059214CA15328002521D9658CA0018AC643B22B194001290DC26B26D9158CA00CA94 0009212C9B655632801663379203CBE5F2F97CAD02BB1BCBE5F2F940063B29884C2758802CA33310 984EB70018ACC203009047701AA5C0072D0996CA225BEC0688058E876460328896FB01A00364263A 682E8B4DAEC444654031B43D7EBE9FAE2032A018DE01289FAFA0101940065EBFC3AEA01009C40650 0197AE271009C402010194011238802EA74000DC00370014C62553BEC400373A000E2513BEC40037 1A000E876988C40031DBCC0E13618AC400B1DB800E876989D00074DB8006AF09A9C40071DB8026AF 09A9C40135DB802EA23D99D66C37007976675F01D0E7E49AEDC00749B0DFA0B2DA7806271DB80262 213AEDBA1B7134D86231DB800ED311A9DE6C37004D862B759CD66C37005D46E3310CD8E9B7B80DE6 C37E86D7C031F01D7C8B1DB9C041705980360009A9D2E0279A4CC0133000D44C7512086E020D985A 61B0180016A269A042EC005ACD86176000DB2576000DB6576000C66D70004D9E0250B002E1B59B0D C013618CD86E0098F84ED3118001EB7798CDAE330BA4D86E0099DD26C0012CCD01A030800E5B4130 CAE851112C40000D16D4E5361288B6BB3D8EC1ECB54018362F1128C661319A0492E0051482627409 25C000010000C000783D4007210EDC01A258DC04414002CF6200D18D36FB5986C401A35B6DF6B30D 8A0267A5134C22DB5986C401B5DB002E5B5002CC6E71395D46BB3DA6C000F398ED76370190844A50 9B2036732DACC36200000000132004DB62003BEC40073994D36A8051BC642E0300866074405CEE13 011A03CBE5F2F94CB3498997C1E5F2F940082905C06A77988DD67360044C6890002CB2B610000000 000000000009C562F0788C0828140BFD027140A0582B13890502F1589C582817FAC4428104820025 138BC5E0B140A0502B128A008281189C5625010AC4828107944E01160A04E20178005600910A04E3 FFD27C262F118E82000100BC0000540951F25011404000B00E8AA000889431289404C007AEB05C20 1891CA0302F90074402FE049C251811C9C501C8FC5C451D07F5C591817CBFCE1F9405C102F800442 60011842411311A3E4100002A14A00A8080076000000800B4D000280000000006FEF650104010180 2051000C0E4015108943E2500200A01F440403E2508081C62FF0008C2230B84C4E00118015038600 6A22101281E4A004808006A01D45405500F8545A10102AC5FF8296BC402B5008010201020F80200A 8800100166BC40235008140A0100804020048201502864120200610007640000007136102A026281); SDR 8000 TDI (60A024360565B5988D967B4980DE080343E00D16FF5BB3BED82E56CD16FF5BB3BED82E56D67B4980 DE080343E020A024360565B5988DBBCD92ED68D36EF53B5D1EFB59B2BE586E76C6734D82DF088303 C030A82034046535D8ADABC596EF69D3EEB51B6BC596EF69D3EEB51B70A82034046535D8AD86734D 82DF088303C01D1EFB59B2BE586E76E6634586DD098383803D0EF35DB0BF58EE36CBD59EEB6BD2EE 355B50B8283006643558ED90B8283006643558ED8BD59EEB6BD2EE355B7D0EF35DB0BF58EE36E663 4586DD09838380000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000133D9001E573396CD65331959CCC006954CA5934944C2567 33008040001008040201008080002010080402100804020100804020000000000000000000100000 20100804120910000040201008140A1008101809008040202010080402014080400002E0504DC662 313096400423265001BF9F8FCBE00F7BBE008341A0DFEBF7FB7D3E9F77E0107D7EBB5DAE570B99C4 E47038AC0600004862819CC865123128985FD7EBF5F9FC7E6F6380086170008C8E47403FDFE7B12B 158A3644A150A5602BE531793CAE5CC391CB99B218D326532A60CBA5D22663119520614A2412F178 9C48022292F87C3E77000444E271391C8E07039ECF63B1D96C361B359ACD62B2592C960B05822E67 89994CA6130998C46232190C86030240C7A251C864020020D46630A0D0C2612484D323428A3D6E67 4783C1EEC0371A8D62AD4AAD59ACD4AB35AAF57CBC5B2917AB551AD546A0526BA051E8233A0B0F8D C1325028AC3E0F1789C46371B85C4E07038FC00000000000000000000000E5007DDC200AB54000C1 2141FFEFEBF9FB7EBE9F8FBBEDEAF97B3E9E8F87BDEEEB79BB5EAE97E579ECEAA93F1F14C445001A 39008225B7DA2C401B3D8CC26E20C814566B1006CF6330BB89B205159AC50000B9DC261B538000CB 30D8B8901E5F2F97CBB09B6D8CBE0F2F97CA00D888E697011203CBE5F2F97CAD0DBB53CBE5F2F940); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000800B4D001280000000006F4003000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000018E000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0A8A02E1B1405C362009089764259A0024225D9094620090894ED321A800E020B86C441359808800 209ACC2A400D1802417098ED801321100265520009401207A8800177005D40176005C9A0A6002000 B02C320764B518CD9BDD9AE96AD26E757B6D06F75FB1BFD8AE16F66B4184DC0903C3A0366B4184DC 0903C3A02D06F75FB1BFD8AE16DBDD9AE96AD26E757B40B02C320764B518CDBBCD92ED68D36EF53B); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (007C00000001008040201008040003000140005800080680014000F8280000000003E14000380008 06000000A00000000003000300C0000000000000020000100028000C030000000000240000000000 20201008000A00000000201000040D8003E0000000001400000000000000000C0E8000C140A00028 000000000000A00000000007C00000100000000E87C001E06044001F00000000C04000101F000000 0000007400000403C100C078001E0806000000000000000000000000000000000000000201F0F87C 3E1F0F87C3E1F0F87C3E1F0F87C3E1F000000000000000010000800B4D000A80000000006FD1A700 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (000000181200000000C00048000000000000000000040B0580000000F87C000C0907C38120F80038 1207800040000000001F0007024000807C000000000381200000001F0E0002400000000002090000 00000000000200034000000000000000000000000000000000000040000000000000000000000000 00000900000000F8480002000000A000000004000A808040005008001105008000A000083E000B80 0141C0005C00170001C000000054000000000000000000000000000000000000001F00000000F0B8 0000000000000000007C000000000000000000000000020100804020100804020100800020000000 00000080003C10000F8201E00000202E010007C00160E000000000060000C0000000000000000000 000000100000000000000000180000030000C000300F020000000000002000080000004020602004 0780008100E00000000000400000080000010080000000003C0001008000203000042E0000840020 10080402010784000140005038000000010080402010080402010080E05C000000000001F0780000 0E00000000F0002C0E0000038000F0003800000000024000E000001F000780000000002400060000 01F000780000000580002000483C1E00048000C000001E1000000000000000000A00030000005000 1800000380002000483C1E00000220E0000800120F07820000F04000000F00022000700000000700 000000F80000000005C0000000000000000000000000003C000F04400110F800001F000403212000 001C000004400000F00000110700000000907C14000005020000B000240200038001100000001E0F 0783C1E0F0783C1E0F0783C1E0F02034000A000380C0600000000B0001800000001C000887C00000 001828140003C001E0F0783C1E0F0783C1E0F0783C1E008743E1F0987C001F0F8000000000000000 000000E000F87C3E070007C001F000003E1F0000000000000000000B800201F00000001F0F87C0E1 F0007C001F0F86C00000F800361F0000000070001C0E000F8001E000F8003E1F000003E000807C3E 000807C0000000000000000003E000F8003E1F0007C2E000F87C0E00000000000000000000000000 0000005C000000000000F0780000000000000000000000000387C000000000000F0F87C3E1F0007C 1E000000000000000000000007C00000F8003E1F0B87C3E00000003E0000000001F0787C00170000 000000000000000000000000000000000000000000000000000400000000F80008100803C3E00040 000000000000000000000000000003E000803000100807C001000000280000000000000000000000 0000000000083E000007C000000000000000000000000000001F0000000000000000000000000000); SDR 8000 TDI (0020F87C000000000000000000000000000000000000000000000000000000000E00000040008008 00170380020000000000000380000000000000070000000000000000000000000000B80020000000 000080000000000000000000105C0007000000000000001E16000000000078000000098083E00000 00000000000000000000000F00000000E09800000008000000F0003826000000020000003C000000 00000100000000000F87C001F08000000000000000000000000000000000E0680000000807C1C1F0 987C3E000F80000000007800000F80020100F8002016000000000000001000000000000000000000 0000000000F87C20130184026000380000000D80000000803400000000000000804C060000020060 004034100300074001104074000004034101D0000000000A0203A0004034101D000603A000001000 1F020603A0000010300D000000000020000800020601A00000601A00000101A00000101A00000102 A15000000000020542A00000000805000101A04028000805000501A0F0A01400140685032000A064 00140685032000A02400140480028090005012000A0340C000607400100804020100785804000000 0000F0784800000787800000000000040000000000007C3C000000000000200000000F8680000000 0000040000000000000000000000000000107800000000000000007C1E1E0007C3E1E00000000000 050000000000001F0D000000000000180000000000000000000000000241E000000000000003E0F0 080000000F838000000000001C0000000000007C34000000000000E0000000000000000000000000 0503800000000000000F87C00000003C0000000001E1600000000001000000000000001F07000000 0000002400000003E0E000000000000480000000000000000000000000000C0E0000000000000000 000F87C00000780000000785800000000014000000000000007C34000000000000D00000000F8680 00000000001A000000000000000000000000000070580000000000000000003E0F0F068000001000 3E1A0000000000001800000007C34000000000000B000000000000000000000001A0000000000000 03E1F0083C20000D000001F0D0000000000001C000000000000000000100500000000007C0008040 4014000500000000005010000B800000000000000000000001F00000100D0007C000004028000000 000000000000060000028000300040000000000000000000000A00000001F000003E000000000000 0000000000000000000000001A000000000000000003018000000000000000000003E000F8000000 00000001F0F800000000000001F000000000000003E0000000000000000001F0000000000A000140); SDR 8000 TDI (20000000000100400020000002000070001C0000000000E000F80000000F87C00000F87C00000000 0001F0F8000E0000000000000000000700000001F0F84000000000000000D8000000000000000000 0000000802800000C00000000B8000000080001E0000010001F04000100000000001000030000006 00016000000020100007C18000180000000006000000000000100000000000000020000000020000 8040000F0003C3E0F0007C000F0003C00000F8000000000000000000000000000000000000003E1F 0000000000007C3E000F800000000000000008000000000000000F00000200000000001F0F800000 F0000000000F8000000000000000000000000000000000000003E000000036000000000000000000 0000000000000000001F07800001B0806030180004030180F80020000000000000000000000587C0 0000000000000004000000000000000000000000000000000000000000007C1E000F8001E000007C 3E000F80000190000000000F800001F00000001F0000000000000000000000000000000000000000 0000000000000000000000000000001F07800001F0007C0000000003E000000000000386C0000040 200010000000000080202E000C00000010005C04000000000000000000000000000000000000100F 8002E1F0403C00020780000000003C00000000022000000000000003C00000000004000000000000 78003E1F0000000000F80020000F80000000006400000000000000F810040000000000007800000F 000001E00000003E000007400000000000000F80000000280000040C000000001800001F0F800001 00000000000000000000000000000000000080000020000000000000000000000400010000003400 000000000000000000000F87C00000000000000E800001F0007C001F0F80000000380000000F8000 0000000000000000000000000000000000000100C00000000000000000000000000000000000F800 00000F80006000C000000F0D80000000780000000000030000003C3600000003E000007C00000000 00000000603E070000000000C00000000000000000000000000F8002E00000000000000400010000 000000000000000000003E00040003E0000000000000000001B0006C00000006C001B00000000008 00000000800000050107C0000000000804000003E00000003E00000003E0000000000000000001F0 000014000000000000000000000F8000000000000000000000000000800B4D001A80000000006F87 5C000000000007C001F0000014000007C00000F8003E00000003E000000000000000000000000000 000000000000007C00000007C00000F8003E000000000000000000000000000000007C3E000007C0); SDR 8000 TDI (001E00080003E100003C00000080000000003C1E000003C3E000E07C3E1F0F8003E1F0F87C3E1F0F 87C3E00000080002000000000000080000000003600000002000080003E000000000140002000000 D800000000000000007800001B0000020000C000001F080403E000000000000004036000F8603E00 0000000000000000070000000000000000000000000000000000000000C000500000000000000000 00000000000380000000000000000000000000F8003E1E00800200000000001F00000001F0005C00 0000000001F0000000000000000000000000000800010020006000000000000000B8003E00000000 0000000000000F86000000400000000000800000F8201000000003E0000000000000000001000000 3E00000000000000000000000203E000200000000007C001F080003E000000000000007C3E1F0803 C0017000002E13000403E000000000100000000000F8000000000000000000000000000000000080 003E1F0000000100000000000800000000004020000800020000F840001000000200002000000806 8001008000003E1B00000201000000001C0001400000E0002A000000000000000000000000000000 0000001F000000000000001A0000000001F0F87C001F0000000000007C3E000A8000000000000600 0000000000000000000000000030000000000000400000004000000007C1E000F800000000000000 00000000000000000000000000000000000020380000000F800000F0000000030007C30000000000 000F87C0400000000400000003E1F0000000000800020000F8600000080000000000000000080002 00005800000000000000000000001F00000000000000360000000001F0F87C00000000000000C000 00000785C00000000004180000000170000000000000004000007C04000000004000000000000007 C360000000001F0000000000F8040000000000000000000000000000000000000000000000000000 40001F0000000080C000001F0006008000000800000000000000000000100003C000000000000000 00000000000000000000000000F87C001F00000000000000000000000000000000000000000000F0 00002200000000000000000000000400011000000000080002600000000010000000000000000000 0F87C00000000026000000000000000000000000000080000000080400022000000000000007C320 00C8003000000003E0000054001F0005400150005400000002C2200000001600000003E100007C00 000000000000007C3E000F8401E000580016000807C0000000000000000003E00000002000000000 0020000000000000000020000020000800000000000000000D80020000F800000000040000000000); SDR 8000 TDI (00000000000000000000000000000000000780000000000004000A07C00000402000080005018000 80201000000001000000000000000003E0000800001F0407C02000000000000007C0008000000000 000000000000003E0000000300000000000000000001F0000000000F8003000000003E000007C000 00007C00000000000000000000000000000020000000000007C3E000007C0400000003E000005C04 000F80000000F80800000003C0000000000000000001E000F800000007808001F00000001F010000 0000F8001E000F80000000000000000787C1E00078003E0F0003C001F00000100000020000000000 00100000000000000020020000000000000000100F8400000000003E0208000000000000001F0001 000000F87C00000400010000C0003E1F000000000000000000000000000000003000000000002000 5C00000F85C00000007C3E100F800000F0000000000007C3E000000000000000000000007C001F00 0403E000000000000F8003E000000000000800000000004000100F80000000000000000000000180 0000001F0007C0000000000010000000000000000000000003E170F8000000000000002000000E00 000000E000000000000000000000F87C000000000001F000003E00000000000000003E000F8003E0 000000000000000001F0F80000000000000000F808000000000000000000001F00000001F0000000 000000000000007C000001000000000000000000000001F0F8000010000003E0000000001F0F8000 0020000000000007C3E1F0007C00000F800000000000001F000003E1F000800B4D00068000000000 6F620F007C000000000001F0007C3E020000800000000000000000000000007C000001000041F000 003E000000000000000000000007C3E000F800001F0007C00000000000100007C001F0007C00000F 800000000000001F000000000000401E1F0E8403A100F87C00000F84000000001000000004000000 000000000000000000000000030980000000007C1C1F0000006100B00002000784000000002C0000 00000000000000000000000000000000001F00000000000000200B080002E000004010000F800000 00004010000787C1C00000003E1F0D840041C0D800001F0006C00180F80000000003C00000000000 00000003E000007C000700000001F0D840201F00000000F0E0000000078000000000003E1F0007C3 E000003C3E100F83C04000005C00000005C0000000003E0700000000000000001F00000000000000 00000000000000000000000803C3E0800000001F000402E100C03C20000003C1E000000000000007 C00000000000020000000000007C000000000001F000000000000003E00080000000000003E1F080); SDR 8000 TDI (000043E000087C00010F80002100080402010083C0E0D00074000700000000000034000000000000 00F87C000F0000C1A000000000000000000000000800000007C000F0004C1A000000000000000000 02000000000000000000000000000000000000000001E0D05834000000040001F000000000008000 2000F834000B06800000000040001F0000000000000000000000000000000000000000400000F87C 000F00000000000000000000000000200000001F0007C00000000000000000004000000000000000 000000F80000000000000000002400000000000000000000000007C3E000000000000007C0000000 003E000000000000007C00000000000000000000000000014000501400000500014000A800001502 80000150000000000000000150F814000D00000000F00014000D000000000000003E1F06800001F0 680000000107C1A000000000150680000000E0000000008000001000000201078542815068002800 00020000000020100804020100F0F8201000040342A0D0680000000F848000000000000800000000 00000000000000010000000010080000000000000000000E87C00000002000150002010000000000 000000000000187C28000F8201008040003A000E8000000080001E0804020100804020101F000003 E08000741010000301000080001E00040743E1D0F820000800030000004020000001020100804000 3E0004000100000000000C0407C1000040001000040303E080000010000800010000004000000402 0180F040200008078003E00000001000040000000040200000000002000000301008078200000000 3C001F0F80000000103C3E01000000000000002E0007804020000804000100004000100804020107 80000000F800001F00800000000000000F0003C02010000402000080002000080402010083C00000 007C000C000003E00000080400000000200000040000008041E00000003E00000000000000000000 0007C000804020001F0780000000405410080002000000B87C00170000000000000000000007C3E0 00B8000000000001E000000000000007C3E0000000000000000100800070001F000001000040003E 000F820380000000000204000001F000000000000003E00000000000000201002000000000080003 E000402010080002010170000000000004000000007C00000004000000007C00000004000000007C 00000004000000007C00000004000000007C000000040001F00000000000040001F0000000000004 00000000003E1F00000000000040001F00058000000000001F0000000000105800000F800001F000 0000000000000000007C00000000004140000000000000000000000000000000000000003C000000); SDR 8000 TDI (4070581C0403038040407000280E0B0101C0000000000E000381C000B0380014070180C000A0380C 1E0F038081E00058080403000381C0E0702C0407058081C0E0700010060102C16030582C06000303 412000382C020000000000000000000000000020100000000F800000000000000000000000000000 00100000000000000000000000804000000000020000000000000004000000000100000800000000 01E00000080000000003E07000000002078000000000000000038000400000000000078000000000 000000010002E000003C000000000001F010003E0200000000001000000200000001F0000000000F 8000000000000000000000000000000410000200000000081000000200000000800B4D0016800000 00006FC28B00000000000000000000000000000000400020000000000000000000003E1808000000 0000000002000001E0000000000000008080000010001F0005000000000000000007C3E000000000 00000000010080000000000200000000000000000000000000000000000000000000003E000003C0 00000000001F000000000000000000000000000000080000010000400000003E000F800000000000 0000000000000000000002000000010000000000038000E1F0F80836000000000000380000070001 C001F0380000070005C00000F81C00000180006170000004000F80000000F800000000000001F000 00001700000040000000000000000001F0000000030000000000000000000780000000F8001E0001 000001F0F87C000000000000000000000000000000000000000200060000B0000000000000020020 000000000000000100006000000F80030000B800001F0002000110000000000000000000007C1E00 0200000080000000000780000000B80000000005C00000B80004170000000000B87C00170005C001 70005C00170005C00080000000140000000000005000140802000100A00000000000000000000000 0000000001F000000000000400000000000000000000A00000200000000000000000003E00000000 A000400000000402010080000000000000000000005000000000028030C0000000000003E1F00000 000000048000000000000000000000000000001F0F8003A0300000000000000000000000001D0E80 03A1D00000001D0E80000000E8740000000000000000003A0000000000D000000000028000003068 0032000187400000000000000000008000001000000000000000007C1E0000000001700000000009 8001A0000000000000000161D000141C0001000040008000161D000000A010003C20000005402010 003C360005834001B0E8002A1E00008000200040001B068000015008001E080F800000D008000001); SDR 8000 TDI (810080003E140A05028140A01000000201000180C06030000C06000000000030180C06030180C000 00180C06030180C06030180C06030000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000140000000000000000000A0000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000040 20100804000100000000000000000100804020100804020100804020100804020100804020100804 02000000002000000000000000000000000000000000000000000000000000000000000000000001 C000783800060000018040003E1F0783C2E170381C361B0582C26130180C3A1D068342A150282832 190504822120080800140600814060B0380014070101C16020082C0E000501C040703808020B0380 0000B0100816000002C1E0B030001C0E07038040C0382C040E0703800030182C0403000381C0E070 380C0B030381C0E0700006030583C160B058001C0E0700818070582C0C0E07038000004800140005 0080E03058200C010580012080682C00010102C120B00020060E0602C00070380C1C0C0580010030 10280E0E0602C0001048001E0203838180B0002C0E05000381C0E070380C0B068381C0E070000606 0701C06070000C0C0E0380C0600040180C06030240407048001009030280C030382800070082C0C0 A0300C0E0A00020180B0100C06070180416000683C1A0D06834040B00034040A0682804020580016 0A010340402050081600058341A02068080402058000A070000C06000580016000082C060B038001 60B0000C020B0380016030000C0E0301800060D0001C0E03038000E0D0000C0E03078001E0D0000C 040B038000E0D0000C040B03800060D0000C0E0B0180C16000682C06020583806030680016030580 01E030100C0E0D0001C160301800060D0380C060D0001C06030580C16000380C160B0180C1600068 2C1C0E0383C1A000580C16000380816020180C0E0D0002C160B0001C000B0782C160B05800160001 81C0603038080E03030080E000000C06030281C00030181C0E00018180E00018180E000581C04000 380004060002C0603058000E030182C00070581C06020000816030381C00030182C000E0181C0002 0580004060003806030180C14010380000080181C06030181C160B0101C06000701C14020383C060 30282400080300C06050480000000003C0002010001C0305800100B0100C06000581C000A0582C16 020380014070582C04070002812050100416020380006030002006000582C14070181C160F010001); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000003200 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000002010080402010080402010 080402010080783C000009000080E000101C000B0101C06030002C04070180C000B0101C0E070000 80C020380006020280000030101C000A0001C0403038001C05000380E00040001E0A030000200048 001200008000E00000281A01834281A01834080A09874080A0987418020D85418020D85438120581 438120581410060F84410060F844301607804301607804201E03824201E03824000E0B864000E0B8 6434140680C34140680C14040E84C14040E84C040C0A86C040C0A86C241C0282C241C0282C0C0808 87C0C080887C2C180083C2C180083C3C100481C3C100481C1C000C85C1C000C85C060D0A068060D0 A068261D02028261D0202836150600836150600816050E04816050E0483E11040183E11040181E01 0C0581E010C0580E09080780E09080782E19000382E19000381A030D0501A030D0503A13050103A1 3050102A1B010302A1B010300A0B090700A0B09070221F03020221F03020020F0B060020F0B06012 070F04012070F0403217070003217070000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000014070003C0E070582C0603030180 00D028141209008040C0600000080000000000000000080000000000002010080402010080400000 00000000000000401000000000000010201000000000000010201000000201008040402010080402); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000800B4D000E80 000000006F3A4D000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000000000800B4D00 1E80000000006FED4200000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000000000000000000000000000000000800B 4D000180000000006FCB1E0000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (800B4D001180000000006F0154000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 0000800B4D000980000000006F270800000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000800B4D001980000000006F127A0000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 8000 TDI (00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SDR 7608 TDI (FFFFFFFF0000007A3426000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000000000000000000000000000000000000000); SIR 8 TDI (FF); RUNTEST IDLE 100 TCK 1.00E-02 SEC; SIR 8 TDI (C0); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SDR 32 TDI (00000000) TDO (00000000) MASK (FFFFFFFF); SIR 8 TDI (26); RUNTEST IDLE 2 TCK 2.00E-01 SEC; SIR 8 TDI (FF); RUNTEST IDLE 2 TCK 1.00E-03 SEC; SIR 8 TDI (3C); SDR 32 TDI (00000000) TDO (00000100) MASK (00002100); ================================================ FILE: src/litex_linux/top.v ================================================ //-------------------------------------------------------------------------------- // Auto-generated by Migen (cc6e76e) & LiteX (275932f5) on 2020-11-11 09:43:42 //-------------------------------------------------------------------------------- module top( output reg serial_tx, input wire serial_rx, input wire clk25, input wire rst, output wire sdram_clock, output wire wifi_gpio0, output wire [12:0] sdram_a, input wire [15:0] sdram_dq, output wire sdram_we_n, output wire sdram_ras_n, output wire sdram_cas_n, output wire sdram_cs_n, output wire sdram_cke, output wire [1:0] sdram_ba, output wire [1:0] sdram_dm, output reg user_led0, output reg user_led1, output reg user_led2, output reg user_led3, output reg user_led4, output reg user_led5, output reg user_led6, output reg user_led7, output reg spisdcard_clk, output reg spisdcard_mosi, output reg spisdcard_cs_n, input wire spisdcard_miso ); reg main_soclinux_soccontroller_reset_storage = 1'd0; reg main_soclinux_soccontroller_reset_re = 1'd0; reg [31:0] main_soclinux_soccontroller_scratch_storage = 32'd305419896; reg main_soclinux_soccontroller_scratch_re = 1'd0; wire [31:0] main_soclinux_soccontroller_bus_errors_status; wire main_soclinux_soccontroller_bus_errors_we; wire main_soclinux_soccontroller_bus_errors_re; wire main_soclinux_soccontroller_reset; wire main_soclinux_soccontroller_bus_error; reg [31:0] main_soclinux_soccontroller_bus_errors = 32'd0; wire main_soclinux_cpu_reset; reg [31:0] main_soclinux_cpu_interrupt0 = 32'd0; wire [29:0] main_soclinux_cpu_ibus_adr; wire [31:0] main_soclinux_cpu_ibus_dat_w; wire [31:0] main_soclinux_cpu_ibus_dat_r; wire [3:0] main_soclinux_cpu_ibus_sel; wire main_soclinux_cpu_ibus_cyc; wire main_soclinux_cpu_ibus_stb; wire main_soclinux_cpu_ibus_ack; wire main_soclinux_cpu_ibus_we; wire [2:0] main_soclinux_cpu_ibus_cti; wire [1:0] main_soclinux_cpu_ibus_bte; wire main_soclinux_cpu_ibus_err; wire [29:0] main_soclinux_cpu_dbus_adr; wire [31:0] main_soclinux_cpu_dbus_dat_w; wire [31:0] main_soclinux_cpu_dbus_dat_r; wire [3:0] main_soclinux_cpu_dbus_sel; wire main_soclinux_cpu_dbus_cyc; wire main_soclinux_cpu_dbus_stb; wire main_soclinux_cpu_dbus_ack; wire main_soclinux_cpu_dbus_we; wire [2:0] main_soclinux_cpu_dbus_cti; wire [1:0] main_soclinux_cpu_dbus_bte; wire main_soclinux_cpu_dbus_err; wire main_soclinux_cpu_latch_re; wire main_soclinux_cpu_latch_r; wire main_soclinux_cpu_latch_we; reg main_soclinux_cpu_latch_w = 1'd0; reg [63:0] main_soclinux_cpu_time_status = 64'd0; wire main_soclinux_cpu_time_we; wire main_soclinux_cpu_time_re; reg [63:0] main_soclinux_cpu_time_cmp_storage = 64'd18446744073709551615; reg main_soclinux_cpu_time_cmp_re = 1'd0; wire main_soclinux_cpu_interrupt1; reg [63:0] main_soclinux_cpu_time = 64'd0; reg [63:0] main_soclinux_cpu_time_cmp = 64'd18446744073709551615; reg [31:0] main_soclinux_vexriscv = 32'd0; wire [29:0] main_soclinux_soclinux_ram_bus_adr; wire [31:0] main_soclinux_soclinux_ram_bus_dat_w; wire [31:0] main_soclinux_soclinux_ram_bus_dat_r; wire [3:0] main_soclinux_soclinux_ram_bus_sel; wire main_soclinux_soclinux_ram_bus_cyc; wire main_soclinux_soclinux_ram_bus_stb; reg main_soclinux_soclinux_ram_bus_ack = 1'd0; wire main_soclinux_soclinux_ram_bus_we; wire [2:0] main_soclinux_soclinux_ram_bus_cti; wire [1:0] main_soclinux_soclinux_ram_bus_bte; reg main_soclinux_soclinux_ram_bus_err = 1'd0; wire [13:0] main_soclinux_soclinux_adr; wire [31:0] main_soclinux_soclinux_dat_r; wire [29:0] main_soclinux_ram_bus_ram_bus_adr; wire [31:0] main_soclinux_ram_bus_ram_bus_dat_w; wire [31:0] main_soclinux_ram_bus_ram_bus_dat_r; wire [3:0] main_soclinux_ram_bus_ram_bus_sel; wire main_soclinux_ram_bus_ram_bus_cyc; wire main_soclinux_ram_bus_ram_bus_stb; reg main_soclinux_ram_bus_ram_bus_ack = 1'd0; wire main_soclinux_ram_bus_ram_bus_we; wire [2:0] main_soclinux_ram_bus_ram_bus_cti; wire [1:0] main_soclinux_ram_bus_ram_bus_bte; reg main_soclinux_ram_bus_ram_bus_err = 1'd0; wire [10:0] main_soclinux_ram_adr; wire [31:0] main_soclinux_ram_dat_r; reg [3:0] main_soclinux_ram_we = 4'd0; wire [31:0] main_soclinux_ram_dat_w; reg [31:0] main_soclinux_storage = 32'd85899345; reg main_soclinux_re = 1'd0; wire main_soclinux_sink_valid; reg main_soclinux_sink_ready = 1'd0; wire main_soclinux_sink_first; wire main_soclinux_sink_last; wire [7:0] main_soclinux_sink_payload_data; reg main_soclinux_tx_clken = 1'd0; reg [31:0] main_soclinux_tx_clkphase = 32'd0; reg [7:0] main_soclinux_tx_reg = 8'd0; reg [3:0] main_soclinux_tx_bitcount = 4'd0; reg main_soclinux_tx_busy = 1'd0; reg main_soclinux_source_valid = 1'd0; wire main_soclinux_source_ready; reg main_soclinux_source_first = 1'd0; reg main_soclinux_source_last = 1'd0; reg [7:0] main_soclinux_source_payload_data = 8'd0; reg main_soclinux_rx_clken = 1'd0; reg [31:0] main_soclinux_rx_clkphase = 32'd0; wire main_soclinux_rx; reg main_soclinux_rx_r = 1'd0; reg [7:0] main_soclinux_rx_reg = 8'd0; reg [3:0] main_soclinux_rx_bitcount = 4'd0; reg main_soclinux_rx_busy = 1'd0; wire main_soclinux_uart_rxtx_re; wire [7:0] main_soclinux_uart_rxtx_r; wire main_soclinux_uart_rxtx_we; wire [7:0] main_soclinux_uart_rxtx_w; wire main_soclinux_uart_txfull_status; wire main_soclinux_uart_txfull_we; wire main_soclinux_uart_txfull_re; wire main_soclinux_uart_rxempty_status; wire main_soclinux_uart_rxempty_we; wire main_soclinux_uart_rxempty_re; wire main_soclinux_uart_irq; wire main_soclinux_uart_tx_status; reg main_soclinux_uart_tx_pending = 1'd0; wire main_soclinux_uart_tx_trigger; reg main_soclinux_uart_tx_clear = 1'd0; reg main_soclinux_uart_tx_old_trigger = 1'd0; wire main_soclinux_uart_rx_status; reg main_soclinux_uart_rx_pending = 1'd0; wire main_soclinux_uart_rx_trigger; reg main_soclinux_uart_rx_clear = 1'd0; reg main_soclinux_uart_rx_old_trigger = 1'd0; wire main_soclinux_uart_eventmanager_status_re; wire [1:0] main_soclinux_uart_eventmanager_status_r; wire main_soclinux_uart_eventmanager_status_we; reg [1:0] main_soclinux_uart_eventmanager_status_w = 2'd0; wire main_soclinux_uart_eventmanager_pending_re; wire [1:0] main_soclinux_uart_eventmanager_pending_r; wire main_soclinux_uart_eventmanager_pending_we; reg [1:0] main_soclinux_uart_eventmanager_pending_w = 2'd0; reg [1:0] main_soclinux_uart_eventmanager_storage = 2'd0; reg main_soclinux_uart_eventmanager_re = 1'd0; wire main_soclinux_uart_txempty_status; wire main_soclinux_uart_txempty_we; wire main_soclinux_uart_txempty_re; wire main_soclinux_uart_rxfull_status; wire main_soclinux_uart_rxfull_we; wire main_soclinux_uart_rxfull_re; wire main_soclinux_uart_uart_sink_valid; wire main_soclinux_uart_uart_sink_ready; wire main_soclinux_uart_uart_sink_first; wire main_soclinux_uart_uart_sink_last; wire [7:0] main_soclinux_uart_uart_sink_payload_data; wire main_soclinux_uart_uart_source_valid; wire main_soclinux_uart_uart_source_ready; wire main_soclinux_uart_uart_source_first; wire main_soclinux_uart_uart_source_last; wire [7:0] main_soclinux_uart_uart_source_payload_data; wire main_soclinux_uart_tx_fifo_sink_valid; wire main_soclinux_uart_tx_fifo_sink_ready; reg main_soclinux_uart_tx_fifo_sink_first = 1'd0; reg main_soclinux_uart_tx_fifo_sink_last = 1'd0; wire [7:0] main_soclinux_uart_tx_fifo_sink_payload_data; wire main_soclinux_uart_tx_fifo_source_valid; wire main_soclinux_uart_tx_fifo_source_ready; wire main_soclinux_uart_tx_fifo_source_first; wire main_soclinux_uart_tx_fifo_source_last; wire [7:0] main_soclinux_uart_tx_fifo_source_payload_data; wire main_soclinux_uart_tx_fifo_re; reg main_soclinux_uart_tx_fifo_readable = 1'd0; wire main_soclinux_uart_tx_fifo_syncfifo_we; wire main_soclinux_uart_tx_fifo_syncfifo_writable; wire main_soclinux_uart_tx_fifo_syncfifo_re; wire main_soclinux_uart_tx_fifo_syncfifo_readable; wire [9:0] main_soclinux_uart_tx_fifo_syncfifo_din; wire [9:0] main_soclinux_uart_tx_fifo_syncfifo_dout; reg [4:0] main_soclinux_uart_tx_fifo_level0 = 5'd0; reg main_soclinux_uart_tx_fifo_replace = 1'd0; reg [3:0] main_soclinux_uart_tx_fifo_produce = 4'd0; reg [3:0] main_soclinux_uart_tx_fifo_consume = 4'd0; reg [3:0] main_soclinux_uart_tx_fifo_wrport_adr = 4'd0; wire [9:0] main_soclinux_uart_tx_fifo_wrport_dat_r; wire main_soclinux_uart_tx_fifo_wrport_we; wire [9:0] main_soclinux_uart_tx_fifo_wrport_dat_w; wire main_soclinux_uart_tx_fifo_do_read; wire [3:0] main_soclinux_uart_tx_fifo_rdport_adr; wire [9:0] main_soclinux_uart_tx_fifo_rdport_dat_r; wire main_soclinux_uart_tx_fifo_rdport_re; wire [4:0] main_soclinux_uart_tx_fifo_level1; wire [7:0] main_soclinux_uart_tx_fifo_fifo_in_payload_data; wire main_soclinux_uart_tx_fifo_fifo_in_first; wire main_soclinux_uart_tx_fifo_fifo_in_last; wire [7:0] main_soclinux_uart_tx_fifo_fifo_out_payload_data; wire main_soclinux_uart_tx_fifo_fifo_out_first; wire main_soclinux_uart_tx_fifo_fifo_out_last; wire main_soclinux_uart_rx_fifo_sink_valid; wire main_soclinux_uart_rx_fifo_sink_ready; wire main_soclinux_uart_rx_fifo_sink_first; wire main_soclinux_uart_rx_fifo_sink_last; wire [7:0] main_soclinux_uart_rx_fifo_sink_payload_data; wire main_soclinux_uart_rx_fifo_source_valid; wire main_soclinux_uart_rx_fifo_source_ready; wire main_soclinux_uart_rx_fifo_source_first; wire main_soclinux_uart_rx_fifo_source_last; wire [7:0] main_soclinux_uart_rx_fifo_source_payload_data; wire main_soclinux_uart_rx_fifo_re; reg main_soclinux_uart_rx_fifo_readable = 1'd0; wire main_soclinux_uart_rx_fifo_syncfifo_we; wire main_soclinux_uart_rx_fifo_syncfifo_writable; wire main_soclinux_uart_rx_fifo_syncfifo_re; wire main_soclinux_uart_rx_fifo_syncfifo_readable; wire [9:0] main_soclinux_uart_rx_fifo_syncfifo_din; wire [9:0] main_soclinux_uart_rx_fifo_syncfifo_dout; reg [4:0] main_soclinux_uart_rx_fifo_level0 = 5'd0; reg main_soclinux_uart_rx_fifo_replace = 1'd0; reg [3:0] main_soclinux_uart_rx_fifo_produce = 4'd0; reg [3:0] main_soclinux_uart_rx_fifo_consume = 4'd0; reg [3:0] main_soclinux_uart_rx_fifo_wrport_adr = 4'd0; wire [9:0] main_soclinux_uart_rx_fifo_wrport_dat_r; wire main_soclinux_uart_rx_fifo_wrport_we; wire [9:0] main_soclinux_uart_rx_fifo_wrport_dat_w; wire main_soclinux_uart_rx_fifo_do_read; wire [3:0] main_soclinux_uart_rx_fifo_rdport_adr; wire [9:0] main_soclinux_uart_rx_fifo_rdport_dat_r; wire main_soclinux_uart_rx_fifo_rdport_re; wire [4:0] main_soclinux_uart_rx_fifo_level1; wire [7:0] main_soclinux_uart_rx_fifo_fifo_in_payload_data; wire main_soclinux_uart_rx_fifo_fifo_in_first; wire main_soclinux_uart_rx_fifo_fifo_in_last; wire [7:0] main_soclinux_uart_rx_fifo_fifo_out_payload_data; wire main_soclinux_uart_rx_fifo_fifo_out_first; wire main_soclinux_uart_rx_fifo_fifo_out_last; reg main_soclinux_uart_reset = 1'd0; reg [31:0] main_soclinux_timer_load_storage = 32'd0; reg main_soclinux_timer_load_re = 1'd0; reg [31:0] main_soclinux_timer_reload_storage = 32'd0; reg main_soclinux_timer_reload_re = 1'd0; reg main_soclinux_timer_en_storage = 1'd0; reg main_soclinux_timer_en_re = 1'd0; reg main_soclinux_timer_update_value_storage = 1'd0; reg main_soclinux_timer_update_value_re = 1'd0; reg [31:0] main_soclinux_timer_value_status = 32'd0; wire main_soclinux_timer_value_we; wire main_soclinux_timer_value_re; wire main_soclinux_timer_irq; wire main_soclinux_timer_zero_status; reg main_soclinux_timer_zero_pending = 1'd0; wire main_soclinux_timer_zero_trigger; reg main_soclinux_timer_zero_clear = 1'd0; reg main_soclinux_timer_zero_old_trigger = 1'd0; wire main_soclinux_timer_eventmanager_status_re; wire main_soclinux_timer_eventmanager_status_r; wire main_soclinux_timer_eventmanager_status_we; wire main_soclinux_timer_eventmanager_status_w; wire main_soclinux_timer_eventmanager_pending_re; wire main_soclinux_timer_eventmanager_pending_r; wire main_soclinux_timer_eventmanager_pending_we; wire main_soclinux_timer_eventmanager_pending_w; reg main_soclinux_timer_eventmanager_storage = 1'd0; reg main_soclinux_timer_eventmanager_re = 1'd0; reg [31:0] main_soclinux_timer_value = 32'd0; wire main_rst; wire sys_clk; wire sys_rst; wire sys_ps_clk; wire main_reset; wire main_locked; wire main_clkin; wire main_clkout0; wire main_clkout1; wire [12:0] main_dfi_p0_address; wire [1:0] main_dfi_p0_bank; wire main_dfi_p0_cas_n; wire main_dfi_p0_cs_n; wire main_dfi_p0_ras_n; wire main_dfi_p0_we_n; wire main_dfi_p0_cke; wire main_dfi_p0_odt; wire main_dfi_p0_reset_n; wire main_dfi_p0_act_n; wire [15:0] main_dfi_p0_wrdata; wire main_dfi_p0_wrdata_en; wire [1:0] main_dfi_p0_wrdata_mask; wire main_dfi_p0_rddata_en; wire [15:0] main_dfi_p0_rddata; reg main_dfi_p0_rddata_valid = 1'd0; reg [2:0] main_rddata_en = 3'd0; wire [12:0] main_sdram_inti_p0_address; wire [1:0] main_sdram_inti_p0_bank; reg main_sdram_inti_p0_cas_n = 1'd1; reg main_sdram_inti_p0_cs_n = 1'd1; reg main_sdram_inti_p0_ras_n = 1'd1; reg main_sdram_inti_p0_we_n = 1'd1; wire main_sdram_inti_p0_cke; wire main_sdram_inti_p0_odt; wire main_sdram_inti_p0_reset_n; reg main_sdram_inti_p0_act_n = 1'd1; wire [15:0] main_sdram_inti_p0_wrdata; wire main_sdram_inti_p0_wrdata_en; wire [1:0] main_sdram_inti_p0_wrdata_mask; wire main_sdram_inti_p0_rddata_en; reg [15:0] main_sdram_inti_p0_rddata = 16'd0; reg main_sdram_inti_p0_rddata_valid = 1'd0; wire [12:0] main_sdram_slave_p0_address; wire [1:0] main_sdram_slave_p0_bank; wire main_sdram_slave_p0_cas_n; wire main_sdram_slave_p0_cs_n; wire main_sdram_slave_p0_ras_n; wire main_sdram_slave_p0_we_n; wire main_sdram_slave_p0_cke; wire main_sdram_slave_p0_odt; wire main_sdram_slave_p0_reset_n; wire main_sdram_slave_p0_act_n; wire [15:0] main_sdram_slave_p0_wrdata; wire main_sdram_slave_p0_wrdata_en; wire [1:0] main_sdram_slave_p0_wrdata_mask; wire main_sdram_slave_p0_rddata_en; reg [15:0] main_sdram_slave_p0_rddata = 16'd0; reg main_sdram_slave_p0_rddata_valid = 1'd0; reg [12:0] main_sdram_master_p0_address = 13'd0; reg [1:0] main_sdram_master_p0_bank = 2'd0; reg main_sdram_master_p0_cas_n = 1'd1; reg main_sdram_master_p0_cs_n = 1'd1; reg main_sdram_master_p0_ras_n = 1'd1; reg main_sdram_master_p0_we_n = 1'd1; reg main_sdram_master_p0_cke = 1'd0; reg main_sdram_master_p0_odt = 1'd0; reg main_sdram_master_p0_reset_n = 1'd0; reg main_sdram_master_p0_act_n = 1'd1; reg [15:0] main_sdram_master_p0_wrdata = 16'd0; reg main_sdram_master_p0_wrdata_en = 1'd0; reg [1:0] main_sdram_master_p0_wrdata_mask = 2'd0; reg main_sdram_master_p0_rddata_en = 1'd0; wire [15:0] main_sdram_master_p0_rddata; wire main_sdram_master_p0_rddata_valid; wire main_sdram_sel; wire main_sdram_cke1; wire main_sdram_odt; wire main_sdram_reset_n; reg [3:0] main_sdram_storage = 4'd1; reg main_sdram_re = 1'd0; reg [5:0] main_sdram_command_storage = 6'd0; reg main_sdram_command_re = 1'd0; wire main_sdram_command_issue_re; wire main_sdram_command_issue_r; wire main_sdram_command_issue_we; reg main_sdram_command_issue_w = 1'd0; reg [12:0] main_sdram_address_storage = 13'd0; reg main_sdram_address_re = 1'd0; reg [1:0] main_sdram_baddress_storage = 2'd0; reg main_sdram_baddress_re = 1'd0; reg [15:0] main_sdram_wrdata_storage = 16'd0; reg main_sdram_wrdata_re = 1'd0; reg [15:0] main_sdram_rddata_status = 16'd0; wire main_sdram_rddata_we; wire main_sdram_rddata_re; wire main_sdram_interface_bank0_valid; wire main_sdram_interface_bank0_ready; wire main_sdram_interface_bank0_we; wire [21:0] main_sdram_interface_bank0_addr; wire main_sdram_interface_bank0_lock; wire main_sdram_interface_bank0_wdata_ready; wire main_sdram_interface_bank0_rdata_valid; wire main_sdram_interface_bank1_valid; wire main_sdram_interface_bank1_ready; wire main_sdram_interface_bank1_we; wire [21:0] main_sdram_interface_bank1_addr; wire main_sdram_interface_bank1_lock; wire main_sdram_interface_bank1_wdata_ready; wire main_sdram_interface_bank1_rdata_valid; wire main_sdram_interface_bank2_valid; wire main_sdram_interface_bank2_ready; wire main_sdram_interface_bank2_we; wire [21:0] main_sdram_interface_bank2_addr; wire main_sdram_interface_bank2_lock; wire main_sdram_interface_bank2_wdata_ready; wire main_sdram_interface_bank2_rdata_valid; wire main_sdram_interface_bank3_valid; wire main_sdram_interface_bank3_ready; wire main_sdram_interface_bank3_we; wire [21:0] main_sdram_interface_bank3_addr; wire main_sdram_interface_bank3_lock; wire main_sdram_interface_bank3_wdata_ready; wire main_sdram_interface_bank3_rdata_valid; reg [15:0] main_sdram_interface_wdata = 16'd0; reg [1:0] main_sdram_interface_wdata_we = 2'd0; wire [15:0] main_sdram_interface_rdata; reg [12:0] main_sdram_dfi_p0_address = 13'd0; reg [1:0] main_sdram_dfi_p0_bank = 2'd0; reg main_sdram_dfi_p0_cas_n = 1'd1; reg main_sdram_dfi_p0_cs_n = 1'd1; reg main_sdram_dfi_p0_ras_n = 1'd1; reg main_sdram_dfi_p0_we_n = 1'd1; wire main_sdram_dfi_p0_cke; wire main_sdram_dfi_p0_odt; wire main_sdram_dfi_p0_reset_n; reg main_sdram_dfi_p0_act_n = 1'd1; wire [15:0] main_sdram_dfi_p0_wrdata; reg main_sdram_dfi_p0_wrdata_en = 1'd0; wire [1:0] main_sdram_dfi_p0_wrdata_mask; reg main_sdram_dfi_p0_rddata_en = 1'd0; wire [15:0] main_sdram_dfi_p0_rddata; wire main_sdram_dfi_p0_rddata_valid; reg main_sdram_cmd_valid = 1'd0; reg main_sdram_cmd_ready = 1'd0; reg main_sdram_cmd_last = 1'd0; reg [12:0] main_sdram_cmd_payload_a = 13'd0; reg [1:0] main_sdram_cmd_payload_ba = 2'd0; reg main_sdram_cmd_payload_cas = 1'd0; reg main_sdram_cmd_payload_ras = 1'd0; reg main_sdram_cmd_payload_we = 1'd0; reg main_sdram_cmd_payload_is_read = 1'd0; reg main_sdram_cmd_payload_is_write = 1'd0; wire main_sdram_wants_refresh; wire main_sdram_timer_wait; wire main_sdram_timer_done0; wire [8:0] main_sdram_timer_count0; wire main_sdram_timer_done1; reg [8:0] main_sdram_timer_count1 = 9'd390; wire main_sdram_postponer_req_i; reg main_sdram_postponer_req_o = 1'd0; reg main_sdram_postponer_count = 1'd0; reg main_sdram_sequencer_start0 = 1'd0; wire main_sdram_sequencer_done0; wire main_sdram_sequencer_start1; reg main_sdram_sequencer_done1 = 1'd0; reg [2:0] main_sdram_sequencer_counter = 3'd0; reg main_sdram_sequencer_count = 1'd0; wire main_sdram_bankmachine0_req_valid; wire main_sdram_bankmachine0_req_ready; wire main_sdram_bankmachine0_req_we; wire [21:0] main_sdram_bankmachine0_req_addr; wire main_sdram_bankmachine0_req_lock; reg main_sdram_bankmachine0_req_wdata_ready = 1'd0; reg main_sdram_bankmachine0_req_rdata_valid = 1'd0; wire main_sdram_bankmachine0_refresh_req; reg main_sdram_bankmachine0_refresh_gnt = 1'd0; reg main_sdram_bankmachine0_cmd_valid = 1'd0; reg main_sdram_bankmachine0_cmd_ready = 1'd0; reg [12:0] main_sdram_bankmachine0_cmd_payload_a = 13'd0; wire [1:0] main_sdram_bankmachine0_cmd_payload_ba; reg main_sdram_bankmachine0_cmd_payload_cas = 1'd0; reg main_sdram_bankmachine0_cmd_payload_ras = 1'd0; reg main_sdram_bankmachine0_cmd_payload_we = 1'd0; reg main_sdram_bankmachine0_cmd_payload_is_cmd = 1'd0; reg main_sdram_bankmachine0_cmd_payload_is_read = 1'd0; reg main_sdram_bankmachine0_cmd_payload_is_write = 1'd0; reg main_sdram_bankmachine0_auto_precharge = 1'd0; wire main_sdram_bankmachine0_cmd_buffer_lookahead_sink_valid; wire main_sdram_bankmachine0_cmd_buffer_lookahead_sink_ready; reg main_sdram_bankmachine0_cmd_buffer_lookahead_sink_first = 1'd0; reg main_sdram_bankmachine0_cmd_buffer_lookahead_sink_last = 1'd0; wire main_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_we; wire [21:0] main_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_addr; wire main_sdram_bankmachine0_cmd_buffer_lookahead_source_valid; wire main_sdram_bankmachine0_cmd_buffer_lookahead_source_ready; wire main_sdram_bankmachine0_cmd_buffer_lookahead_source_first; wire main_sdram_bankmachine0_cmd_buffer_lookahead_source_last; wire main_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_we; wire [21:0] main_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_addr; wire main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we; wire main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable; wire main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_re; wire main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_readable; wire [24:0] main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_din; wire [24:0] main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_dout; reg [3:0] main_sdram_bankmachine0_cmd_buffer_lookahead_level = 4'd0; reg main_sdram_bankmachine0_cmd_buffer_lookahead_replace = 1'd0; reg [2:0] main_sdram_bankmachine0_cmd_buffer_lookahead_produce = 3'd0; reg [2:0] main_sdram_bankmachine0_cmd_buffer_lookahead_consume = 3'd0; reg [2:0] main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr = 3'd0; wire [24:0] main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_r; wire main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_we; wire [24:0] main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_w; wire main_sdram_bankmachine0_cmd_buffer_lookahead_do_read; wire [2:0] main_sdram_bankmachine0_cmd_buffer_lookahead_rdport_adr; wire [24:0] main_sdram_bankmachine0_cmd_buffer_lookahead_rdport_dat_r; wire main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_we; wire [21:0] main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_addr; wire main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_first; wire main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_last; wire main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_we; wire [21:0] main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_addr; wire main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_first; wire main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_last; wire main_sdram_bankmachine0_cmd_buffer_sink_valid; wire main_sdram_bankmachine0_cmd_buffer_sink_ready; wire main_sdram_bankmachine0_cmd_buffer_sink_first; wire main_sdram_bankmachine0_cmd_buffer_sink_last; wire main_sdram_bankmachine0_cmd_buffer_sink_payload_we; wire [21:0] main_sdram_bankmachine0_cmd_buffer_sink_payload_addr; reg main_sdram_bankmachine0_cmd_buffer_source_valid = 1'd0; wire main_sdram_bankmachine0_cmd_buffer_source_ready; reg main_sdram_bankmachine0_cmd_buffer_source_first = 1'd0; reg main_sdram_bankmachine0_cmd_buffer_source_last = 1'd0; reg main_sdram_bankmachine0_cmd_buffer_source_payload_we = 1'd0; reg [21:0] main_sdram_bankmachine0_cmd_buffer_source_payload_addr = 22'd0; reg [12:0] main_sdram_bankmachine0_row = 13'd0; reg main_sdram_bankmachine0_row_opened = 1'd0; wire main_sdram_bankmachine0_row_hit; reg main_sdram_bankmachine0_row_open = 1'd0; reg main_sdram_bankmachine0_row_close = 1'd0; reg main_sdram_bankmachine0_row_col_n_addr_sel = 1'd0; wire main_sdram_bankmachine0_twtpcon_valid; reg main_sdram_bankmachine0_twtpcon_ready = 1'd0; reg [1:0] main_sdram_bankmachine0_twtpcon_count = 2'd0; wire main_sdram_bankmachine0_trccon_valid; reg main_sdram_bankmachine0_trccon_ready = 1'd0; reg [1:0] main_sdram_bankmachine0_trccon_count = 2'd0; wire main_sdram_bankmachine0_trascon_valid; reg main_sdram_bankmachine0_trascon_ready = 1'd0; reg [1:0] main_sdram_bankmachine0_trascon_count = 2'd0; wire main_sdram_bankmachine1_req_valid; wire main_sdram_bankmachine1_req_ready; wire main_sdram_bankmachine1_req_we; wire [21:0] main_sdram_bankmachine1_req_addr; wire main_sdram_bankmachine1_req_lock; reg main_sdram_bankmachine1_req_wdata_ready = 1'd0; reg main_sdram_bankmachine1_req_rdata_valid = 1'd0; wire main_sdram_bankmachine1_refresh_req; reg main_sdram_bankmachine1_refresh_gnt = 1'd0; reg main_sdram_bankmachine1_cmd_valid = 1'd0; reg main_sdram_bankmachine1_cmd_ready = 1'd0; reg [12:0] main_sdram_bankmachine1_cmd_payload_a = 13'd0; wire [1:0] main_sdram_bankmachine1_cmd_payload_ba; reg main_sdram_bankmachine1_cmd_payload_cas = 1'd0; reg main_sdram_bankmachine1_cmd_payload_ras = 1'd0; reg main_sdram_bankmachine1_cmd_payload_we = 1'd0; reg main_sdram_bankmachine1_cmd_payload_is_cmd = 1'd0; reg main_sdram_bankmachine1_cmd_payload_is_read = 1'd0; reg main_sdram_bankmachine1_cmd_payload_is_write = 1'd0; reg main_sdram_bankmachine1_auto_precharge = 1'd0; wire main_sdram_bankmachine1_cmd_buffer_lookahead_sink_valid; wire main_sdram_bankmachine1_cmd_buffer_lookahead_sink_ready; reg main_sdram_bankmachine1_cmd_buffer_lookahead_sink_first = 1'd0; reg main_sdram_bankmachine1_cmd_buffer_lookahead_sink_last = 1'd0; wire main_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_we; wire [21:0] main_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_addr; wire main_sdram_bankmachine1_cmd_buffer_lookahead_source_valid; wire main_sdram_bankmachine1_cmd_buffer_lookahead_source_ready; wire main_sdram_bankmachine1_cmd_buffer_lookahead_source_first; wire main_sdram_bankmachine1_cmd_buffer_lookahead_source_last; wire main_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_we; wire [21:0] main_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_addr; wire main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we; wire main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable; wire main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_re; wire main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_readable; wire [24:0] main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_din; wire [24:0] main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_dout; reg [3:0] main_sdram_bankmachine1_cmd_buffer_lookahead_level = 4'd0; reg main_sdram_bankmachine1_cmd_buffer_lookahead_replace = 1'd0; reg [2:0] main_sdram_bankmachine1_cmd_buffer_lookahead_produce = 3'd0; reg [2:0] main_sdram_bankmachine1_cmd_buffer_lookahead_consume = 3'd0; reg [2:0] main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr = 3'd0; wire [24:0] main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_r; wire main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_we; wire [24:0] main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_w; wire main_sdram_bankmachine1_cmd_buffer_lookahead_do_read; wire [2:0] main_sdram_bankmachine1_cmd_buffer_lookahead_rdport_adr; wire [24:0] main_sdram_bankmachine1_cmd_buffer_lookahead_rdport_dat_r; wire main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_we; wire [21:0] main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_addr; wire main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_first; wire main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_last; wire main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_we; wire [21:0] main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_addr; wire main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_first; wire main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_last; wire main_sdram_bankmachine1_cmd_buffer_sink_valid; wire main_sdram_bankmachine1_cmd_buffer_sink_ready; wire main_sdram_bankmachine1_cmd_buffer_sink_first; wire main_sdram_bankmachine1_cmd_buffer_sink_last; wire main_sdram_bankmachine1_cmd_buffer_sink_payload_we; wire [21:0] main_sdram_bankmachine1_cmd_buffer_sink_payload_addr; reg main_sdram_bankmachine1_cmd_buffer_source_valid = 1'd0; wire main_sdram_bankmachine1_cmd_buffer_source_ready; reg main_sdram_bankmachine1_cmd_buffer_source_first = 1'd0; reg main_sdram_bankmachine1_cmd_buffer_source_last = 1'd0; reg main_sdram_bankmachine1_cmd_buffer_source_payload_we = 1'd0; reg [21:0] main_sdram_bankmachine1_cmd_buffer_source_payload_addr = 22'd0; reg [12:0] main_sdram_bankmachine1_row = 13'd0; reg main_sdram_bankmachine1_row_opened = 1'd0; wire main_sdram_bankmachine1_row_hit; reg main_sdram_bankmachine1_row_open = 1'd0; reg main_sdram_bankmachine1_row_close = 1'd0; reg main_sdram_bankmachine1_row_col_n_addr_sel = 1'd0; wire main_sdram_bankmachine1_twtpcon_valid; reg main_sdram_bankmachine1_twtpcon_ready = 1'd0; reg [1:0] main_sdram_bankmachine1_twtpcon_count = 2'd0; wire main_sdram_bankmachine1_trccon_valid; reg main_sdram_bankmachine1_trccon_ready = 1'd0; reg [1:0] main_sdram_bankmachine1_trccon_count = 2'd0; wire main_sdram_bankmachine1_trascon_valid; reg main_sdram_bankmachine1_trascon_ready = 1'd0; reg [1:0] main_sdram_bankmachine1_trascon_count = 2'd0; wire main_sdram_bankmachine2_req_valid; wire main_sdram_bankmachine2_req_ready; wire main_sdram_bankmachine2_req_we; wire [21:0] main_sdram_bankmachine2_req_addr; wire main_sdram_bankmachine2_req_lock; reg main_sdram_bankmachine2_req_wdata_ready = 1'd0; reg main_sdram_bankmachine2_req_rdata_valid = 1'd0; wire main_sdram_bankmachine2_refresh_req; reg main_sdram_bankmachine2_refresh_gnt = 1'd0; reg main_sdram_bankmachine2_cmd_valid = 1'd0; reg main_sdram_bankmachine2_cmd_ready = 1'd0; reg [12:0] main_sdram_bankmachine2_cmd_payload_a = 13'd0; wire [1:0] main_sdram_bankmachine2_cmd_payload_ba; reg main_sdram_bankmachine2_cmd_payload_cas = 1'd0; reg main_sdram_bankmachine2_cmd_payload_ras = 1'd0; reg main_sdram_bankmachine2_cmd_payload_we = 1'd0; reg main_sdram_bankmachine2_cmd_payload_is_cmd = 1'd0; reg main_sdram_bankmachine2_cmd_payload_is_read = 1'd0; reg main_sdram_bankmachine2_cmd_payload_is_write = 1'd0; reg main_sdram_bankmachine2_auto_precharge = 1'd0; wire main_sdram_bankmachine2_cmd_buffer_lookahead_sink_valid; wire main_sdram_bankmachine2_cmd_buffer_lookahead_sink_ready; reg main_sdram_bankmachine2_cmd_buffer_lookahead_sink_first = 1'd0; reg main_sdram_bankmachine2_cmd_buffer_lookahead_sink_last = 1'd0; wire main_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_we; wire [21:0] main_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_addr; wire main_sdram_bankmachine2_cmd_buffer_lookahead_source_valid; wire main_sdram_bankmachine2_cmd_buffer_lookahead_source_ready; wire main_sdram_bankmachine2_cmd_buffer_lookahead_source_first; wire main_sdram_bankmachine2_cmd_buffer_lookahead_source_last; wire main_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_we; wire [21:0] main_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_addr; wire main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we; wire main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable; wire main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_re; wire main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_readable; wire [24:0] main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_din; wire [24:0] main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_dout; reg [3:0] main_sdram_bankmachine2_cmd_buffer_lookahead_level = 4'd0; reg main_sdram_bankmachine2_cmd_buffer_lookahead_replace = 1'd0; reg [2:0] main_sdram_bankmachine2_cmd_buffer_lookahead_produce = 3'd0; reg [2:0] main_sdram_bankmachine2_cmd_buffer_lookahead_consume = 3'd0; reg [2:0] main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr = 3'd0; wire [24:0] main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_r; wire main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_we; wire [24:0] main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_w; wire main_sdram_bankmachine2_cmd_buffer_lookahead_do_read; wire [2:0] main_sdram_bankmachine2_cmd_buffer_lookahead_rdport_adr; wire [24:0] main_sdram_bankmachine2_cmd_buffer_lookahead_rdport_dat_r; wire main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_we; wire [21:0] main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_addr; wire main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_first; wire main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_last; wire main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_we; wire [21:0] main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_addr; wire main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_first; wire main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_last; wire main_sdram_bankmachine2_cmd_buffer_sink_valid; wire main_sdram_bankmachine2_cmd_buffer_sink_ready; wire main_sdram_bankmachine2_cmd_buffer_sink_first; wire main_sdram_bankmachine2_cmd_buffer_sink_last; wire main_sdram_bankmachine2_cmd_buffer_sink_payload_we; wire [21:0] main_sdram_bankmachine2_cmd_buffer_sink_payload_addr; reg main_sdram_bankmachine2_cmd_buffer_source_valid = 1'd0; wire main_sdram_bankmachine2_cmd_buffer_source_ready; reg main_sdram_bankmachine2_cmd_buffer_source_first = 1'd0; reg main_sdram_bankmachine2_cmd_buffer_source_last = 1'd0; reg main_sdram_bankmachine2_cmd_buffer_source_payload_we = 1'd0; reg [21:0] main_sdram_bankmachine2_cmd_buffer_source_payload_addr = 22'd0; reg [12:0] main_sdram_bankmachine2_row = 13'd0; reg main_sdram_bankmachine2_row_opened = 1'd0; wire main_sdram_bankmachine2_row_hit; reg main_sdram_bankmachine2_row_open = 1'd0; reg main_sdram_bankmachine2_row_close = 1'd0; reg main_sdram_bankmachine2_row_col_n_addr_sel = 1'd0; wire main_sdram_bankmachine2_twtpcon_valid; reg main_sdram_bankmachine2_twtpcon_ready = 1'd0; reg [1:0] main_sdram_bankmachine2_twtpcon_count = 2'd0; wire main_sdram_bankmachine2_trccon_valid; reg main_sdram_bankmachine2_trccon_ready = 1'd0; reg [1:0] main_sdram_bankmachine2_trccon_count = 2'd0; wire main_sdram_bankmachine2_trascon_valid; reg main_sdram_bankmachine2_trascon_ready = 1'd0; reg [1:0] main_sdram_bankmachine2_trascon_count = 2'd0; wire main_sdram_bankmachine3_req_valid; wire main_sdram_bankmachine3_req_ready; wire main_sdram_bankmachine3_req_we; wire [21:0] main_sdram_bankmachine3_req_addr; wire main_sdram_bankmachine3_req_lock; reg main_sdram_bankmachine3_req_wdata_ready = 1'd0; reg main_sdram_bankmachine3_req_rdata_valid = 1'd0; wire main_sdram_bankmachine3_refresh_req; reg main_sdram_bankmachine3_refresh_gnt = 1'd0; reg main_sdram_bankmachine3_cmd_valid = 1'd0; reg main_sdram_bankmachine3_cmd_ready = 1'd0; reg [12:0] main_sdram_bankmachine3_cmd_payload_a = 13'd0; wire [1:0] main_sdram_bankmachine3_cmd_payload_ba; reg main_sdram_bankmachine3_cmd_payload_cas = 1'd0; reg main_sdram_bankmachine3_cmd_payload_ras = 1'd0; reg main_sdram_bankmachine3_cmd_payload_we = 1'd0; reg main_sdram_bankmachine3_cmd_payload_is_cmd = 1'd0; reg main_sdram_bankmachine3_cmd_payload_is_read = 1'd0; reg main_sdram_bankmachine3_cmd_payload_is_write = 1'd0; reg main_sdram_bankmachine3_auto_precharge = 1'd0; wire main_sdram_bankmachine3_cmd_buffer_lookahead_sink_valid; wire main_sdram_bankmachine3_cmd_buffer_lookahead_sink_ready; reg main_sdram_bankmachine3_cmd_buffer_lookahead_sink_first = 1'd0; reg main_sdram_bankmachine3_cmd_buffer_lookahead_sink_last = 1'd0; wire main_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_we; wire [21:0] main_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_addr; wire main_sdram_bankmachine3_cmd_buffer_lookahead_source_valid; wire main_sdram_bankmachine3_cmd_buffer_lookahead_source_ready; wire main_sdram_bankmachine3_cmd_buffer_lookahead_source_first; wire main_sdram_bankmachine3_cmd_buffer_lookahead_source_last; wire main_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_we; wire [21:0] main_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_addr; wire main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we; wire main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable; wire main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_re; wire main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_readable; wire [24:0] main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_din; wire [24:0] main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_dout; reg [3:0] main_sdram_bankmachine3_cmd_buffer_lookahead_level = 4'd0; reg main_sdram_bankmachine3_cmd_buffer_lookahead_replace = 1'd0; reg [2:0] main_sdram_bankmachine3_cmd_buffer_lookahead_produce = 3'd0; reg [2:0] main_sdram_bankmachine3_cmd_buffer_lookahead_consume = 3'd0; reg [2:0] main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr = 3'd0; wire [24:0] main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_r; wire main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_we; wire [24:0] main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_w; wire main_sdram_bankmachine3_cmd_buffer_lookahead_do_read; wire [2:0] main_sdram_bankmachine3_cmd_buffer_lookahead_rdport_adr; wire [24:0] main_sdram_bankmachine3_cmd_buffer_lookahead_rdport_dat_r; wire main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_we; wire [21:0] main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_addr; wire main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_first; wire main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_last; wire main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_we; wire [21:0] main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_addr; wire main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_first; wire main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_last; wire main_sdram_bankmachine3_cmd_buffer_sink_valid; wire main_sdram_bankmachine3_cmd_buffer_sink_ready; wire main_sdram_bankmachine3_cmd_buffer_sink_first; wire main_sdram_bankmachine3_cmd_buffer_sink_last; wire main_sdram_bankmachine3_cmd_buffer_sink_payload_we; wire [21:0] main_sdram_bankmachine3_cmd_buffer_sink_payload_addr; reg main_sdram_bankmachine3_cmd_buffer_source_valid = 1'd0; wire main_sdram_bankmachine3_cmd_buffer_source_ready; reg main_sdram_bankmachine3_cmd_buffer_source_first = 1'd0; reg main_sdram_bankmachine3_cmd_buffer_source_last = 1'd0; reg main_sdram_bankmachine3_cmd_buffer_source_payload_we = 1'd0; reg [21:0] main_sdram_bankmachine3_cmd_buffer_source_payload_addr = 22'd0; reg [12:0] main_sdram_bankmachine3_row = 13'd0; reg main_sdram_bankmachine3_row_opened = 1'd0; wire main_sdram_bankmachine3_row_hit; reg main_sdram_bankmachine3_row_open = 1'd0; reg main_sdram_bankmachine3_row_close = 1'd0; reg main_sdram_bankmachine3_row_col_n_addr_sel = 1'd0; wire main_sdram_bankmachine3_twtpcon_valid; reg main_sdram_bankmachine3_twtpcon_ready = 1'd0; reg [1:0] main_sdram_bankmachine3_twtpcon_count = 2'd0; wire main_sdram_bankmachine3_trccon_valid; reg main_sdram_bankmachine3_trccon_ready = 1'd0; reg [1:0] main_sdram_bankmachine3_trccon_count = 2'd0; wire main_sdram_bankmachine3_trascon_valid; reg main_sdram_bankmachine3_trascon_ready = 1'd0; reg [1:0] main_sdram_bankmachine3_trascon_count = 2'd0; wire main_sdram_ras_allowed; wire main_sdram_cas_allowed; reg main_sdram_choose_cmd_want_reads = 1'd0; reg main_sdram_choose_cmd_want_writes = 1'd0; reg main_sdram_choose_cmd_want_cmds = 1'd0; reg main_sdram_choose_cmd_want_activates = 1'd0; wire main_sdram_choose_cmd_cmd_valid; reg main_sdram_choose_cmd_cmd_ready = 1'd0; wire [12:0] main_sdram_choose_cmd_cmd_payload_a; wire [1:0] main_sdram_choose_cmd_cmd_payload_ba; reg main_sdram_choose_cmd_cmd_payload_cas = 1'd0; reg main_sdram_choose_cmd_cmd_payload_ras = 1'd0; reg main_sdram_choose_cmd_cmd_payload_we = 1'd0; wire main_sdram_choose_cmd_cmd_payload_is_cmd; wire main_sdram_choose_cmd_cmd_payload_is_read; wire main_sdram_choose_cmd_cmd_payload_is_write; reg [3:0] main_sdram_choose_cmd_valids = 4'd0; wire [3:0] main_sdram_choose_cmd_request; reg [1:0] main_sdram_choose_cmd_grant = 2'd0; wire main_sdram_choose_cmd_ce; reg main_sdram_choose_req_want_reads = 1'd0; reg main_sdram_choose_req_want_writes = 1'd0; wire main_sdram_choose_req_want_cmds; reg main_sdram_choose_req_want_activates = 1'd0; wire main_sdram_choose_req_cmd_valid; reg main_sdram_choose_req_cmd_ready = 1'd0; wire [12:0] main_sdram_choose_req_cmd_payload_a; wire [1:0] main_sdram_choose_req_cmd_payload_ba; reg main_sdram_choose_req_cmd_payload_cas = 1'd0; reg main_sdram_choose_req_cmd_payload_ras = 1'd0; reg main_sdram_choose_req_cmd_payload_we = 1'd0; wire main_sdram_choose_req_cmd_payload_is_cmd; wire main_sdram_choose_req_cmd_payload_is_read; wire main_sdram_choose_req_cmd_payload_is_write; reg [3:0] main_sdram_choose_req_valids = 4'd0; wire [3:0] main_sdram_choose_req_request; reg [1:0] main_sdram_choose_req_grant = 2'd0; wire main_sdram_choose_req_ce; reg [12:0] main_sdram_nop_a = 13'd0; reg [1:0] main_sdram_nop_ba = 2'd0; reg [1:0] main_sdram_steerer_sel = 2'd0; reg main_sdram_steerer0 = 1'd1; reg main_sdram_steerer1 = 1'd1; wire main_sdram_trrdcon_valid; reg main_sdram_trrdcon_ready = 1'd0; reg main_sdram_trrdcon_count = 1'd0; wire main_sdram_tfawcon_valid; reg main_sdram_tfawcon_ready = 1'd1; wire main_sdram_tccdcon_valid; reg main_sdram_tccdcon_ready = 1'd0; reg main_sdram_tccdcon_count = 1'd0; wire main_sdram_twtrcon_valid; reg main_sdram_twtrcon_ready = 1'd0; reg [2:0] main_sdram_twtrcon_count = 3'd0; wire main_sdram_read_available; wire main_sdram_write_available; reg main_sdram_en0 = 1'd0; wire main_sdram_max_time0; reg [4:0] main_sdram_time0 = 5'd0; reg main_sdram_en1 = 1'd0; wire main_sdram_max_time1; reg [3:0] main_sdram_time1 = 4'd0; wire main_sdram_go_to_refresh; reg main_port_cmd_valid = 1'd0; wire main_port_cmd_ready; reg main_port_cmd_payload_we = 1'd0; reg [23:0] main_port_cmd_payload_addr = 24'd0; wire main_port_wdata_valid; wire main_port_wdata_ready; wire main_port_wdata_first; wire main_port_wdata_last; wire [15:0] main_port_wdata_payload_data; wire [1:0] main_port_wdata_payload_we; wire main_port_rdata_valid; wire main_port_rdata_ready; reg main_port_rdata_first = 1'd0; reg main_port_rdata_last = 1'd0; wire [15:0] main_port_rdata_payload_data; wire [29:0] main_wb_sdram_adr; wire [31:0] main_wb_sdram_dat_w; reg [31:0] main_wb_sdram_dat_r = 32'd0; wire [3:0] main_wb_sdram_sel; wire main_wb_sdram_cyc; wire main_wb_sdram_stb; reg main_wb_sdram_ack = 1'd0; wire main_wb_sdram_we; wire [2:0] main_wb_sdram_cti; wire [1:0] main_wb_sdram_bte; reg main_wb_sdram_err = 1'd0; wire [29:0] main_interface_adr; wire [127:0] main_interface_dat_w; wire [127:0] main_interface_dat_r; wire [15:0] main_interface_sel; reg main_interface_cyc = 1'd0; reg main_interface_stb = 1'd0; wire main_interface_ack; reg main_interface_we = 1'd0; wire [8:0] main_data_port_adr; wire [127:0] main_data_port_dat_r; reg [15:0] main_data_port_we = 16'd0; reg [127:0] main_data_port_dat_w = 128'd0; reg main_write_from_slave = 1'd0; reg [1:0] main_adr_offset_r = 2'd0; wire [8:0] main_tag_port_adr; wire [23:0] main_tag_port_dat_r; reg main_tag_port_we = 1'd0; wire [23:0] main_tag_port_dat_w; wire [22:0] main_tag_do_tag; wire main_tag_do_dirty; wire [22:0] main_tag_di_tag; reg main_tag_di_dirty = 1'd0; reg main_word_clr = 1'd0; reg main_word_inc = 1'd0; wire main_wishbone_bridge_flush; wire main_wishbone_bridge_cmd_valid; reg main_wishbone_bridge_cmd_ready = 1'd0; wire main_wishbone_bridge_cmd_last; wire main_wishbone_bridge_cmd_payload_we; wire [20:0] main_wishbone_bridge_cmd_payload_addr; wire main_wishbone_bridge_wdata_valid; wire main_wishbone_bridge_wdata_ready; reg main_wishbone_bridge_wdata_first = 1'd0; reg main_wishbone_bridge_wdata_last = 1'd0; wire [127:0] main_wishbone_bridge_wdata_payload_data; wire [15:0] main_wishbone_bridge_wdata_payload_we; wire main_wishbone_bridge_rdata_valid; wire main_wishbone_bridge_rdata_ready; wire main_wishbone_bridge_rdata_first; wire main_wishbone_bridge_rdata_last; wire [127:0] main_wishbone_bridge_rdata_payload_data; reg [2:0] main_wishbone_bridge_count = 3'd0; wire main_wishbone_bridge_wdata_converter_sink_valid; wire main_wishbone_bridge_wdata_converter_sink_ready; wire main_wishbone_bridge_wdata_converter_sink_first; wire main_wishbone_bridge_wdata_converter_sink_last; wire [127:0] main_wishbone_bridge_wdata_converter_sink_payload_data; wire [15:0] main_wishbone_bridge_wdata_converter_sink_payload_we; wire main_wishbone_bridge_wdata_converter_source_valid; wire main_wishbone_bridge_wdata_converter_source_ready; wire main_wishbone_bridge_wdata_converter_source_first; wire main_wishbone_bridge_wdata_converter_source_last; wire [15:0] main_wishbone_bridge_wdata_converter_source_payload_data; wire [1:0] main_wishbone_bridge_wdata_converter_source_payload_we; wire main_wishbone_bridge_wdata_converter_converter_sink_valid; wire main_wishbone_bridge_wdata_converter_converter_sink_ready; wire main_wishbone_bridge_wdata_converter_converter_sink_first; wire main_wishbone_bridge_wdata_converter_converter_sink_last; reg [143:0] main_wishbone_bridge_wdata_converter_converter_sink_payload_data = 144'd0; wire main_wishbone_bridge_wdata_converter_converter_source_valid; wire main_wishbone_bridge_wdata_converter_converter_source_ready; wire main_wishbone_bridge_wdata_converter_converter_source_first; wire main_wishbone_bridge_wdata_converter_converter_source_last; reg [17:0] main_wishbone_bridge_wdata_converter_converter_source_payload_data = 18'd0; wire main_wishbone_bridge_wdata_converter_converter_source_payload_valid_token_count; reg [2:0] main_wishbone_bridge_wdata_converter_converter_mux = 3'd0; wire main_wishbone_bridge_wdata_converter_converter_first; wire main_wishbone_bridge_wdata_converter_converter_last; wire main_wishbone_bridge_wdata_converter_source_source_valid; wire main_wishbone_bridge_wdata_converter_source_source_ready; wire main_wishbone_bridge_wdata_converter_source_source_first; wire main_wishbone_bridge_wdata_converter_source_source_last; wire [17:0] main_wishbone_bridge_wdata_converter_source_source_payload_data; wire main_wishbone_bridge_rdata_converter_sink_valid; wire main_wishbone_bridge_rdata_converter_sink_ready; wire main_wishbone_bridge_rdata_converter_sink_first; wire main_wishbone_bridge_rdata_converter_sink_last; wire [15:0] main_wishbone_bridge_rdata_converter_sink_payload_data; wire main_wishbone_bridge_rdata_converter_source_valid; wire main_wishbone_bridge_rdata_converter_source_ready; wire main_wishbone_bridge_rdata_converter_source_first; wire main_wishbone_bridge_rdata_converter_source_last; reg [127:0] main_wishbone_bridge_rdata_converter_source_payload_data = 128'd0; wire main_wishbone_bridge_rdata_converter_converter_sink_valid; wire main_wishbone_bridge_rdata_converter_converter_sink_ready; wire main_wishbone_bridge_rdata_converter_converter_sink_first; wire main_wishbone_bridge_rdata_converter_converter_sink_last; wire [15:0] main_wishbone_bridge_rdata_converter_converter_sink_payload_data; wire main_wishbone_bridge_rdata_converter_converter_source_valid; wire main_wishbone_bridge_rdata_converter_converter_source_ready; reg main_wishbone_bridge_rdata_converter_converter_source_first = 1'd0; reg main_wishbone_bridge_rdata_converter_converter_source_last = 1'd0; reg [127:0] main_wishbone_bridge_rdata_converter_converter_source_payload_data = 128'd0; reg [3:0] main_wishbone_bridge_rdata_converter_converter_source_payload_valid_token_count = 4'd0; reg [2:0] main_wishbone_bridge_rdata_converter_converter_demux = 3'd0; wire main_wishbone_bridge_rdata_converter_converter_load_part; reg main_wishbone_bridge_rdata_converter_converter_strobe_all = 1'd0; wire main_wishbone_bridge_rdata_converter_source_source_valid; wire main_wishbone_bridge_rdata_converter_source_source_ready; wire main_wishbone_bridge_rdata_converter_source_source_first; wire main_wishbone_bridge_rdata_converter_source_source_last; wire [127:0] main_wishbone_bridge_rdata_converter_source_source_payload_data; reg main_wishbone_bridge_cmd_consumed = 1'd0; reg main_wishbone_bridge_wdata_consumed = 1'd0; wire main_wishbone_bridge_ack_cmd; wire main_wishbone_bridge_ack_wdata; wire main_wishbone_bridge_ack_rdata; reg [7:0] main_storage = 8'd0; reg main_re = 1'd0; reg [7:0] main_chaser = 8'd0; reg main_mode = 1'd0; wire main_wait; wire main_done; reg [21:0] main_count = 22'd3125000; wire soclinux_start0; wire [7:0] soclinux_length0; reg soclinux_done0 = 1'd0; reg soclinux_irq = 1'd0; wire [7:0] soclinux_mosi; reg [7:0] soclinux_miso = 8'd0; wire soclinux_cs; wire soclinux_loopback; wire [15:0] soclinux_clk_divider0; reg soclinux_start1 = 1'd0; wire [7:0] soclinux_length1; reg [15:0] soclinux_control_storage = 16'd0; reg soclinux_control_re = 1'd0; wire soclinux_done1; wire soclinux_status_status; wire soclinux_status_we; wire soclinux_status_re; reg [7:0] soclinux_mosi_storage = 8'd0; reg soclinux_mosi_re = 1'd0; wire [7:0] soclinux_miso_status; wire soclinux_miso_we; wire soclinux_miso_re; wire soclinux_sel; reg soclinux_cs_storage = 1'd1; reg soclinux_cs_re = 1'd0; reg soclinux_loopback_storage = 1'd0; reg soclinux_loopback_re = 1'd0; reg soclinux_clk_enable = 1'd0; reg soclinux_cs_enable = 1'd0; reg [2:0] soclinux_count = 3'd0; reg soclinux_mosi_latch = 1'd0; reg soclinux_miso_latch = 1'd0; reg [15:0] soclinux_clk_divider1 = 16'd0; wire soclinux_clk_rise; wire soclinux_clk_fall; reg [7:0] soclinux_mosi_data = 8'd0; reg [2:0] soclinux_mosi_sel = 3'd0; reg [7:0] soclinux_miso_data = 8'd0; reg [15:0] soclinux_storage = 16'd125; reg soclinux_re = 1'd0; reg [1:0] builder_refresher_state = 2'd0; reg [1:0] builder_refresher_next_state = 2'd0; reg [2:0] builder_bankmachine0_state = 3'd0; reg [2:0] builder_bankmachine0_next_state = 3'd0; reg [2:0] builder_bankmachine1_state = 3'd0; reg [2:0] builder_bankmachine1_next_state = 3'd0; reg [2:0] builder_bankmachine2_state = 3'd0; reg [2:0] builder_bankmachine2_next_state = 3'd0; reg [2:0] builder_bankmachine3_state = 3'd0; reg [2:0] builder_bankmachine3_next_state = 3'd0; reg [2:0] builder_multiplexer_state = 3'd0; reg [2:0] builder_multiplexer_next_state = 3'd0; wire builder_roundrobin0_request; wire builder_roundrobin0_grant; wire builder_roundrobin0_ce; wire builder_roundrobin1_request; wire builder_roundrobin1_grant; wire builder_roundrobin1_ce; wire builder_roundrobin2_request; wire builder_roundrobin2_grant; wire builder_roundrobin2_ce; wire builder_roundrobin3_request; wire builder_roundrobin3_grant; wire builder_roundrobin3_ce; reg builder_locked0 = 1'd0; reg builder_locked1 = 1'd0; reg builder_locked2 = 1'd0; reg builder_locked3 = 1'd0; reg builder_new_master_wdata_ready = 1'd0; reg builder_new_master_rdata_valid0 = 1'd0; reg builder_new_master_rdata_valid1 = 1'd0; reg builder_new_master_rdata_valid2 = 1'd0; reg builder_new_master_rdata_valid3 = 1'd0; reg [1:0] builder_fullmemorywe_state = 2'd0; reg [1:0] builder_fullmemorywe_next_state = 2'd0; reg builder_litedramwishbone2native_state = 1'd0; reg builder_litedramwishbone2native_next_state = 1'd0; reg [2:0] main_wishbone_bridge_count_litedramwishbone2native_next_value = 3'd0; reg main_wishbone_bridge_count_litedramwishbone2native_next_value_ce = 1'd0; reg [1:0] builder_spimaster_state = 2'd0; reg [1:0] builder_spimaster_next_state = 2'd0; reg [2:0] soclinux_count_spimaster_next_value = 3'd0; reg soclinux_count_spimaster_next_value_ce = 1'd0; reg [13:0] builder_soclinux_adr = 14'd0; reg builder_soclinux_we = 1'd0; reg [7:0] builder_soclinux_dat_w = 8'd0; wire [7:0] builder_soclinux_dat_r; wire [29:0] builder_soclinux_wishbone_adr; wire [31:0] builder_soclinux_wishbone_dat_w; reg [31:0] builder_soclinux_wishbone_dat_r = 32'd0; wire [3:0] builder_soclinux_wishbone_sel; wire builder_soclinux_wishbone_cyc; wire builder_soclinux_wishbone_stb; reg builder_soclinux_wishbone_ack = 1'd0; wire builder_soclinux_wishbone_we; wire [2:0] builder_soclinux_wishbone_cti; wire [1:0] builder_soclinux_wishbone_bte; reg builder_soclinux_wishbone_err = 1'd0; wire [29:0] builder_shared_adr; wire [31:0] builder_shared_dat_w; reg [31:0] builder_shared_dat_r = 32'd0; wire [3:0] builder_shared_sel; wire builder_shared_cyc; wire builder_shared_stb; reg builder_shared_ack = 1'd0; wire builder_shared_we; wire [2:0] builder_shared_cti; wire [1:0] builder_shared_bte; wire builder_shared_err; wire [1:0] builder_request; reg builder_grant = 1'd0; reg [3:0] builder_slave_sel = 4'd0; reg [3:0] builder_slave_sel_r = 4'd0; reg builder_error = 1'd0; wire builder_wait; wire builder_done; reg [19:0] builder_count = 20'd1000000; wire [13:0] builder_csr_bankarray_interface0_bank_bus_adr; wire builder_csr_bankarray_interface0_bank_bus_we; wire [7:0] builder_csr_bankarray_interface0_bank_bus_dat_w; reg [7:0] builder_csr_bankarray_interface0_bank_bus_dat_r = 8'd0; wire builder_csr_bankarray_csrbank0_timer_time7_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time7_r; wire builder_csr_bankarray_csrbank0_timer_time7_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time7_w; wire builder_csr_bankarray_csrbank0_timer_time6_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time6_r; wire builder_csr_bankarray_csrbank0_timer_time6_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time6_w; wire builder_csr_bankarray_csrbank0_timer_time5_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time5_r; wire builder_csr_bankarray_csrbank0_timer_time5_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time5_w; wire builder_csr_bankarray_csrbank0_timer_time4_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time4_r; wire builder_csr_bankarray_csrbank0_timer_time4_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time4_w; wire builder_csr_bankarray_csrbank0_timer_time3_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time3_r; wire builder_csr_bankarray_csrbank0_timer_time3_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time3_w; wire builder_csr_bankarray_csrbank0_timer_time2_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time2_r; wire builder_csr_bankarray_csrbank0_timer_time2_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time2_w; wire builder_csr_bankarray_csrbank0_timer_time1_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time1_r; wire builder_csr_bankarray_csrbank0_timer_time1_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time1_w; wire builder_csr_bankarray_csrbank0_timer_time0_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time0_r; wire builder_csr_bankarray_csrbank0_timer_time0_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time0_w; wire builder_csr_bankarray_csrbank0_timer_time_cmp7_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp7_r; wire builder_csr_bankarray_csrbank0_timer_time_cmp7_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp7_w; wire builder_csr_bankarray_csrbank0_timer_time_cmp6_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp6_r; wire builder_csr_bankarray_csrbank0_timer_time_cmp6_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp6_w; wire builder_csr_bankarray_csrbank0_timer_time_cmp5_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp5_r; wire builder_csr_bankarray_csrbank0_timer_time_cmp5_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp5_w; wire builder_csr_bankarray_csrbank0_timer_time_cmp4_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp4_r; wire builder_csr_bankarray_csrbank0_timer_time_cmp4_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp4_w; wire builder_csr_bankarray_csrbank0_timer_time_cmp3_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp3_r; wire builder_csr_bankarray_csrbank0_timer_time_cmp3_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp3_w; wire builder_csr_bankarray_csrbank0_timer_time_cmp2_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp2_r; wire builder_csr_bankarray_csrbank0_timer_time_cmp2_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp2_w; wire builder_csr_bankarray_csrbank0_timer_time_cmp1_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp1_r; wire builder_csr_bankarray_csrbank0_timer_time_cmp1_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp1_w; wire builder_csr_bankarray_csrbank0_timer_time_cmp0_re; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp0_r; wire builder_csr_bankarray_csrbank0_timer_time_cmp0_we; wire [7:0] builder_csr_bankarray_csrbank0_timer_time_cmp0_w; wire builder_csr_bankarray_csrbank0_sel; wire [13:0] builder_csr_bankarray_interface1_bank_bus_adr; wire builder_csr_bankarray_interface1_bank_bus_we; wire [7:0] builder_csr_bankarray_interface1_bank_bus_dat_w; reg [7:0] builder_csr_bankarray_interface1_bank_bus_dat_r = 8'd0; wire builder_csr_bankarray_csrbank1_reset0_re; wire builder_csr_bankarray_csrbank1_reset0_r; wire builder_csr_bankarray_csrbank1_reset0_we; wire builder_csr_bankarray_csrbank1_reset0_w; wire builder_csr_bankarray_csrbank1_scratch3_re; wire [7:0] builder_csr_bankarray_csrbank1_scratch3_r; wire builder_csr_bankarray_csrbank1_scratch3_we; wire [7:0] builder_csr_bankarray_csrbank1_scratch3_w; wire builder_csr_bankarray_csrbank1_scratch2_re; wire [7:0] builder_csr_bankarray_csrbank1_scratch2_r; wire builder_csr_bankarray_csrbank1_scratch2_we; wire [7:0] builder_csr_bankarray_csrbank1_scratch2_w; wire builder_csr_bankarray_csrbank1_scratch1_re; wire [7:0] builder_csr_bankarray_csrbank1_scratch1_r; wire builder_csr_bankarray_csrbank1_scratch1_we; wire [7:0] builder_csr_bankarray_csrbank1_scratch1_w; wire builder_csr_bankarray_csrbank1_scratch0_re; wire [7:0] builder_csr_bankarray_csrbank1_scratch0_r; wire builder_csr_bankarray_csrbank1_scratch0_we; wire [7:0] builder_csr_bankarray_csrbank1_scratch0_w; wire builder_csr_bankarray_csrbank1_bus_errors3_re; wire [7:0] builder_csr_bankarray_csrbank1_bus_errors3_r; wire builder_csr_bankarray_csrbank1_bus_errors3_we; wire [7:0] builder_csr_bankarray_csrbank1_bus_errors3_w; wire builder_csr_bankarray_csrbank1_bus_errors2_re; wire [7:0] builder_csr_bankarray_csrbank1_bus_errors2_r; wire builder_csr_bankarray_csrbank1_bus_errors2_we; wire [7:0] builder_csr_bankarray_csrbank1_bus_errors2_w; wire builder_csr_bankarray_csrbank1_bus_errors1_re; wire [7:0] builder_csr_bankarray_csrbank1_bus_errors1_r; wire builder_csr_bankarray_csrbank1_bus_errors1_we; wire [7:0] builder_csr_bankarray_csrbank1_bus_errors1_w; wire builder_csr_bankarray_csrbank1_bus_errors0_re; wire [7:0] builder_csr_bankarray_csrbank1_bus_errors0_r; wire builder_csr_bankarray_csrbank1_bus_errors0_we; wire [7:0] builder_csr_bankarray_csrbank1_bus_errors0_w; wire builder_csr_bankarray_csrbank1_sel; wire [13:0] builder_csr_bankarray_sram_bus_adr; wire builder_csr_bankarray_sram_bus_we; wire [7:0] builder_csr_bankarray_sram_bus_dat_w; reg [7:0] builder_csr_bankarray_sram_bus_dat_r = 8'd0; wire [5:0] builder_csr_bankarray_adr; wire [7:0] builder_csr_bankarray_dat_r; wire builder_csr_bankarray_sel; reg builder_csr_bankarray_sel_r = 1'd0; wire [13:0] builder_csr_bankarray_interface2_bank_bus_adr; wire builder_csr_bankarray_interface2_bank_bus_we; wire [7:0] builder_csr_bankarray_interface2_bank_bus_dat_w; reg [7:0] builder_csr_bankarray_interface2_bank_bus_dat_r = 8'd0; wire builder_csr_bankarray_csrbank2_out0_re; wire [7:0] builder_csr_bankarray_csrbank2_out0_r; wire builder_csr_bankarray_csrbank2_out0_we; wire [7:0] builder_csr_bankarray_csrbank2_out0_w; wire builder_csr_bankarray_csrbank2_sel; wire [13:0] builder_csr_bankarray_interface3_bank_bus_adr; wire builder_csr_bankarray_interface3_bank_bus_we; wire [7:0] builder_csr_bankarray_interface3_bank_bus_dat_w; reg [7:0] builder_csr_bankarray_interface3_bank_bus_dat_r = 8'd0; wire builder_csr_bankarray_csrbank3_dfii_control0_re; wire [3:0] builder_csr_bankarray_csrbank3_dfii_control0_r; wire builder_csr_bankarray_csrbank3_dfii_control0_we; wire [3:0] builder_csr_bankarray_csrbank3_dfii_control0_w; wire builder_csr_bankarray_csrbank3_dfii_pi0_command0_re; wire [5:0] builder_csr_bankarray_csrbank3_dfii_pi0_command0_r; wire builder_csr_bankarray_csrbank3_dfii_pi0_command0_we; wire [5:0] builder_csr_bankarray_csrbank3_dfii_pi0_command0_w; wire builder_csr_bankarray_csrbank3_dfii_pi0_address1_re; wire [4:0] builder_csr_bankarray_csrbank3_dfii_pi0_address1_r; wire builder_csr_bankarray_csrbank3_dfii_pi0_address1_we; wire [4:0] builder_csr_bankarray_csrbank3_dfii_pi0_address1_w; wire builder_csr_bankarray_csrbank3_dfii_pi0_address0_re; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_address0_r; wire builder_csr_bankarray_csrbank3_dfii_pi0_address0_we; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_address0_w; wire builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_re; wire [1:0] builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_r; wire builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_we; wire [1:0] builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_w; wire builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_re; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_r; wire builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_we; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_w; wire builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_re; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_r; wire builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_we; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_w; wire builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_re; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_r; wire builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_we; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_w; wire builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_re; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_r; wire builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_we; wire [7:0] builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_w; wire builder_csr_bankarray_csrbank3_sel; wire [13:0] builder_csr_bankarray_interface4_bank_bus_adr; wire builder_csr_bankarray_interface4_bank_bus_we; wire [7:0] builder_csr_bankarray_interface4_bank_bus_dat_w; reg [7:0] builder_csr_bankarray_interface4_bank_bus_dat_r = 8'd0; wire builder_csr_bankarray_csrbank4_control1_re; wire [7:0] builder_csr_bankarray_csrbank4_control1_r; wire builder_csr_bankarray_csrbank4_control1_we; wire [7:0] builder_csr_bankarray_csrbank4_control1_w; wire builder_csr_bankarray_csrbank4_control0_re; wire [7:0] builder_csr_bankarray_csrbank4_control0_r; wire builder_csr_bankarray_csrbank4_control0_we; wire [7:0] builder_csr_bankarray_csrbank4_control0_w; wire builder_csr_bankarray_csrbank4_status_re; wire builder_csr_bankarray_csrbank4_status_r; wire builder_csr_bankarray_csrbank4_status_we; wire builder_csr_bankarray_csrbank4_status_w; wire builder_csr_bankarray_csrbank4_mosi0_re; wire [7:0] builder_csr_bankarray_csrbank4_mosi0_r; wire builder_csr_bankarray_csrbank4_mosi0_we; wire [7:0] builder_csr_bankarray_csrbank4_mosi0_w; wire builder_csr_bankarray_csrbank4_miso_re; wire [7:0] builder_csr_bankarray_csrbank4_miso_r; wire builder_csr_bankarray_csrbank4_miso_we; wire [7:0] builder_csr_bankarray_csrbank4_miso_w; wire builder_csr_bankarray_csrbank4_cs0_re; wire builder_csr_bankarray_csrbank4_cs0_r; wire builder_csr_bankarray_csrbank4_cs0_we; wire builder_csr_bankarray_csrbank4_cs0_w; wire builder_csr_bankarray_csrbank4_loopback0_re; wire builder_csr_bankarray_csrbank4_loopback0_r; wire builder_csr_bankarray_csrbank4_loopback0_we; wire builder_csr_bankarray_csrbank4_loopback0_w; wire builder_csr_bankarray_csrbank4_clk_divider1_re; wire [7:0] builder_csr_bankarray_csrbank4_clk_divider1_r; wire builder_csr_bankarray_csrbank4_clk_divider1_we; wire [7:0] builder_csr_bankarray_csrbank4_clk_divider1_w; wire builder_csr_bankarray_csrbank4_clk_divider0_re; wire [7:0] builder_csr_bankarray_csrbank4_clk_divider0_r; wire builder_csr_bankarray_csrbank4_clk_divider0_we; wire [7:0] builder_csr_bankarray_csrbank4_clk_divider0_w; wire builder_csr_bankarray_csrbank4_sel; wire [13:0] builder_csr_bankarray_interface5_bank_bus_adr; wire builder_csr_bankarray_interface5_bank_bus_we; wire [7:0] builder_csr_bankarray_interface5_bank_bus_dat_w; reg [7:0] builder_csr_bankarray_interface5_bank_bus_dat_r = 8'd0; wire builder_csr_bankarray_csrbank5_load3_re; wire [7:0] builder_csr_bankarray_csrbank5_load3_r; wire builder_csr_bankarray_csrbank5_load3_we; wire [7:0] builder_csr_bankarray_csrbank5_load3_w; wire builder_csr_bankarray_csrbank5_load2_re; wire [7:0] builder_csr_bankarray_csrbank5_load2_r; wire builder_csr_bankarray_csrbank5_load2_we; wire [7:0] builder_csr_bankarray_csrbank5_load2_w; wire builder_csr_bankarray_csrbank5_load1_re; wire [7:0] builder_csr_bankarray_csrbank5_load1_r; wire builder_csr_bankarray_csrbank5_load1_we; wire [7:0] builder_csr_bankarray_csrbank5_load1_w; wire builder_csr_bankarray_csrbank5_load0_re; wire [7:0] builder_csr_bankarray_csrbank5_load0_r; wire builder_csr_bankarray_csrbank5_load0_we; wire [7:0] builder_csr_bankarray_csrbank5_load0_w; wire builder_csr_bankarray_csrbank5_reload3_re; wire [7:0] builder_csr_bankarray_csrbank5_reload3_r; wire builder_csr_bankarray_csrbank5_reload3_we; wire [7:0] builder_csr_bankarray_csrbank5_reload3_w; wire builder_csr_bankarray_csrbank5_reload2_re; wire [7:0] builder_csr_bankarray_csrbank5_reload2_r; wire builder_csr_bankarray_csrbank5_reload2_we; wire [7:0] builder_csr_bankarray_csrbank5_reload2_w; wire builder_csr_bankarray_csrbank5_reload1_re; wire [7:0] builder_csr_bankarray_csrbank5_reload1_r; wire builder_csr_bankarray_csrbank5_reload1_we; wire [7:0] builder_csr_bankarray_csrbank5_reload1_w; wire builder_csr_bankarray_csrbank5_reload0_re; wire [7:0] builder_csr_bankarray_csrbank5_reload0_r; wire builder_csr_bankarray_csrbank5_reload0_we; wire [7:0] builder_csr_bankarray_csrbank5_reload0_w; wire builder_csr_bankarray_csrbank5_en0_re; wire builder_csr_bankarray_csrbank5_en0_r; wire builder_csr_bankarray_csrbank5_en0_we; wire builder_csr_bankarray_csrbank5_en0_w; wire builder_csr_bankarray_csrbank5_update_value0_re; wire builder_csr_bankarray_csrbank5_update_value0_r; wire builder_csr_bankarray_csrbank5_update_value0_we; wire builder_csr_bankarray_csrbank5_update_value0_w; wire builder_csr_bankarray_csrbank5_value3_re; wire [7:0] builder_csr_bankarray_csrbank5_value3_r; wire builder_csr_bankarray_csrbank5_value3_we; wire [7:0] builder_csr_bankarray_csrbank5_value3_w; wire builder_csr_bankarray_csrbank5_value2_re; wire [7:0] builder_csr_bankarray_csrbank5_value2_r; wire builder_csr_bankarray_csrbank5_value2_we; wire [7:0] builder_csr_bankarray_csrbank5_value2_w; wire builder_csr_bankarray_csrbank5_value1_re; wire [7:0] builder_csr_bankarray_csrbank5_value1_r; wire builder_csr_bankarray_csrbank5_value1_we; wire [7:0] builder_csr_bankarray_csrbank5_value1_w; wire builder_csr_bankarray_csrbank5_value0_re; wire [7:0] builder_csr_bankarray_csrbank5_value0_r; wire builder_csr_bankarray_csrbank5_value0_we; wire [7:0] builder_csr_bankarray_csrbank5_value0_w; wire builder_csr_bankarray_csrbank5_ev_enable0_re; wire builder_csr_bankarray_csrbank5_ev_enable0_r; wire builder_csr_bankarray_csrbank5_ev_enable0_we; wire builder_csr_bankarray_csrbank5_ev_enable0_w; wire builder_csr_bankarray_csrbank5_sel; wire [13:0] builder_csr_bankarray_interface6_bank_bus_adr; wire builder_csr_bankarray_interface6_bank_bus_we; wire [7:0] builder_csr_bankarray_interface6_bank_bus_dat_w; reg [7:0] builder_csr_bankarray_interface6_bank_bus_dat_r = 8'd0; wire builder_csr_bankarray_csrbank6_txfull_re; wire builder_csr_bankarray_csrbank6_txfull_r; wire builder_csr_bankarray_csrbank6_txfull_we; wire builder_csr_bankarray_csrbank6_txfull_w; wire builder_csr_bankarray_csrbank6_rxempty_re; wire builder_csr_bankarray_csrbank6_rxempty_r; wire builder_csr_bankarray_csrbank6_rxempty_we; wire builder_csr_bankarray_csrbank6_rxempty_w; wire builder_csr_bankarray_csrbank6_ev_enable0_re; wire [1:0] builder_csr_bankarray_csrbank6_ev_enable0_r; wire builder_csr_bankarray_csrbank6_ev_enable0_we; wire [1:0] builder_csr_bankarray_csrbank6_ev_enable0_w; wire builder_csr_bankarray_csrbank6_txempty_re; wire builder_csr_bankarray_csrbank6_txempty_r; wire builder_csr_bankarray_csrbank6_txempty_we; wire builder_csr_bankarray_csrbank6_txempty_w; wire builder_csr_bankarray_csrbank6_rxfull_re; wire builder_csr_bankarray_csrbank6_rxfull_r; wire builder_csr_bankarray_csrbank6_rxfull_we; wire builder_csr_bankarray_csrbank6_rxfull_w; wire builder_csr_bankarray_csrbank6_sel; wire [13:0] builder_csr_bankarray_interface7_bank_bus_adr; wire builder_csr_bankarray_interface7_bank_bus_we; wire [7:0] builder_csr_bankarray_interface7_bank_bus_dat_w; reg [7:0] builder_csr_bankarray_interface7_bank_bus_dat_r = 8'd0; wire builder_csr_bankarray_csrbank7_tuning_word3_re; wire [7:0] builder_csr_bankarray_csrbank7_tuning_word3_r; wire builder_csr_bankarray_csrbank7_tuning_word3_we; wire [7:0] builder_csr_bankarray_csrbank7_tuning_word3_w; wire builder_csr_bankarray_csrbank7_tuning_word2_re; wire [7:0] builder_csr_bankarray_csrbank7_tuning_word2_r; wire builder_csr_bankarray_csrbank7_tuning_word2_we; wire [7:0] builder_csr_bankarray_csrbank7_tuning_word2_w; wire builder_csr_bankarray_csrbank7_tuning_word1_re; wire [7:0] builder_csr_bankarray_csrbank7_tuning_word1_r; wire builder_csr_bankarray_csrbank7_tuning_word1_we; wire [7:0] builder_csr_bankarray_csrbank7_tuning_word1_w; wire builder_csr_bankarray_csrbank7_tuning_word0_re; wire [7:0] builder_csr_bankarray_csrbank7_tuning_word0_r; wire builder_csr_bankarray_csrbank7_tuning_word0_we; wire [7:0] builder_csr_bankarray_csrbank7_tuning_word0_w; wire builder_csr_bankarray_csrbank7_sel; wire [13:0] builder_csr_interconnect_adr; wire builder_csr_interconnect_we; wire [7:0] builder_csr_interconnect_dat_w; wire [7:0] builder_csr_interconnect_dat_r; reg [1:0] builder_state = 2'd0; reg [1:0] builder_next_state = 2'd0; reg [7:0] builder_soclinux_dat_w_next_value0 = 8'd0; reg builder_soclinux_dat_w_next_value_ce0 = 1'd0; reg [13:0] builder_soclinux_adr_next_value1 = 14'd0; reg builder_soclinux_adr_next_value_ce1 = 1'd0; reg builder_soclinux_we_next_value2 = 1'd0; reg builder_soclinux_we_next_value_ce2 = 1'd0; reg builder_comb_rhs_array_muxed0 = 1'd0; reg [12:0] builder_comb_rhs_array_muxed1 = 13'd0; reg [1:0] builder_comb_rhs_array_muxed2 = 2'd0; reg builder_comb_rhs_array_muxed3 = 1'd0; reg builder_comb_rhs_array_muxed4 = 1'd0; reg builder_comb_rhs_array_muxed5 = 1'd0; reg builder_comb_t_array_muxed0 = 1'd0; reg builder_comb_t_array_muxed1 = 1'd0; reg builder_comb_t_array_muxed2 = 1'd0; reg builder_comb_rhs_array_muxed6 = 1'd0; reg [12:0] builder_comb_rhs_array_muxed7 = 13'd0; reg [1:0] builder_comb_rhs_array_muxed8 = 2'd0; reg builder_comb_rhs_array_muxed9 = 1'd0; reg builder_comb_rhs_array_muxed10 = 1'd0; reg builder_comb_rhs_array_muxed11 = 1'd0; reg builder_comb_t_array_muxed3 = 1'd0; reg builder_comb_t_array_muxed4 = 1'd0; reg builder_comb_t_array_muxed5 = 1'd0; reg [21:0] builder_comb_rhs_array_muxed12 = 22'd0; reg builder_comb_rhs_array_muxed13 = 1'd0; reg builder_comb_rhs_array_muxed14 = 1'd0; reg [21:0] builder_comb_rhs_array_muxed15 = 22'd0; reg builder_comb_rhs_array_muxed16 = 1'd0; reg builder_comb_rhs_array_muxed17 = 1'd0; reg [21:0] builder_comb_rhs_array_muxed18 = 22'd0; reg builder_comb_rhs_array_muxed19 = 1'd0; reg builder_comb_rhs_array_muxed20 = 1'd0; reg [21:0] builder_comb_rhs_array_muxed21 = 22'd0; reg builder_comb_rhs_array_muxed22 = 1'd0; reg builder_comb_rhs_array_muxed23 = 1'd0; reg [29:0] builder_comb_rhs_array_muxed24 = 30'd0; reg [31:0] builder_comb_rhs_array_muxed25 = 32'd0; reg [3:0] builder_comb_rhs_array_muxed26 = 4'd0; reg builder_comb_rhs_array_muxed27 = 1'd0; reg builder_comb_rhs_array_muxed28 = 1'd0; reg builder_comb_rhs_array_muxed29 = 1'd0; reg [2:0] builder_comb_rhs_array_muxed30 = 3'd0; reg [1:0] builder_comb_rhs_array_muxed31 = 2'd0; reg [1:0] builder_sync_rhs_array_muxed0 = 2'd0; reg [12:0] builder_sync_rhs_array_muxed1 = 13'd0; reg builder_sync_rhs_array_muxed2 = 1'd0; reg builder_sync_rhs_array_muxed3 = 1'd0; reg builder_sync_rhs_array_muxed4 = 1'd0; reg builder_sync_rhs_array_muxed5 = 1'd0; reg builder_sync_rhs_array_muxed6 = 1'd0; reg builder_sync_f_array_muxed = 1'd0; reg builder_regs0 = 1'd0; reg builder_regs1 = 1'd0; wire builder_latticeecp5asyncresetsynchronizerimpl0_rst1; wire builder_latticeecp5asyncresetsynchronizerimpl1_rst1; wire builder_latticeecp5asyncresetsynchronizerimpl1_expr; wire builder_inferedsdrtristate0__o; reg builder_inferedsdrtristate0_oe = 1'd0; wire builder_inferedsdrtristate0__i; wire sdrio_clk; wire builder_inferedsdrtristate1__o; reg builder_inferedsdrtristate1_oe = 1'd0; wire builder_inferedsdrtristate1__i; wire sdrio_clk_1; wire builder_inferedsdrtristate2__o; reg builder_inferedsdrtristate2_oe = 1'd0; wire builder_inferedsdrtristate2__i; wire sdrio_clk_2; wire builder_inferedsdrtristate3__o; reg builder_inferedsdrtristate3_oe = 1'd0; wire builder_inferedsdrtristate3__i; wire sdrio_clk_3; wire builder_inferedsdrtristate4__o; reg builder_inferedsdrtristate4_oe = 1'd0; wire builder_inferedsdrtristate4__i; wire sdrio_clk_4; wire builder_inferedsdrtristate5__o; reg builder_inferedsdrtristate5_oe = 1'd0; wire builder_inferedsdrtristate5__i; wire sdrio_clk_5; wire builder_inferedsdrtristate6__o; reg builder_inferedsdrtristate6_oe = 1'd0; wire builder_inferedsdrtristate6__i; wire sdrio_clk_6; wire builder_inferedsdrtristate7__o; reg builder_inferedsdrtristate7_oe = 1'd0; wire builder_inferedsdrtristate7__i; wire sdrio_clk_7; wire builder_inferedsdrtristate8__o; reg builder_inferedsdrtristate8_oe = 1'd0; wire builder_inferedsdrtristate8__i; wire sdrio_clk_8; wire builder_inferedsdrtristate9__o; reg builder_inferedsdrtristate9_oe = 1'd0; wire builder_inferedsdrtristate9__i; wire sdrio_clk_9; wire builder_inferedsdrtristate10__o; reg builder_inferedsdrtristate10_oe = 1'd0; wire builder_inferedsdrtristate10__i; wire sdrio_clk_10; wire builder_inferedsdrtristate11__o; reg builder_inferedsdrtristate11_oe = 1'd0; wire builder_inferedsdrtristate11__i; wire sdrio_clk_11; wire builder_inferedsdrtristate12__o; reg builder_inferedsdrtristate12_oe = 1'd0; wire builder_inferedsdrtristate12__i; wire sdrio_clk_12; wire builder_inferedsdrtristate13__o; reg builder_inferedsdrtristate13_oe = 1'd0; wire builder_inferedsdrtristate13__i; wire sdrio_clk_13; wire builder_inferedsdrtristate14__o; reg builder_inferedsdrtristate14_oe = 1'd0; wire builder_inferedsdrtristate14__i; wire sdrio_clk_14; wire builder_inferedsdrtristate15__o; reg builder_inferedsdrtristate15_oe = 1'd0; wire builder_inferedsdrtristate15__i; wire sdrio_clk_15; assign main_soclinux_cpu_reset = main_soclinux_soccontroller_reset; assign main_rst = main_soclinux_soccontroller_reset_re; assign main_soclinux_soccontroller_bus_error = builder_error; always @(*) begin main_soclinux_cpu_interrupt0 <= 32'd0; main_soclinux_cpu_interrupt0[1] <= main_soclinux_timer_irq; main_soclinux_cpu_interrupt0[0] <= main_soclinux_uart_irq; end assign main_soclinux_soccontroller_reset = main_soclinux_soccontroller_reset_re; assign main_soclinux_soccontroller_bus_errors_status = main_soclinux_soccontroller_bus_errors; assign main_soclinux_cpu_interrupt1 = (main_soclinux_cpu_time >= main_soclinux_cpu_time_cmp); assign main_soclinux_soclinux_adr = main_soclinux_soclinux_ram_bus_adr[13:0]; assign main_soclinux_soclinux_ram_bus_dat_r = main_soclinux_soclinux_dat_r; always @(*) begin main_soclinux_ram_we <= 4'd0; main_soclinux_ram_we[0] <= (((main_soclinux_ram_bus_ram_bus_cyc & main_soclinux_ram_bus_ram_bus_stb) & main_soclinux_ram_bus_ram_bus_we) & main_soclinux_ram_bus_ram_bus_sel[0]); main_soclinux_ram_we[1] <= (((main_soclinux_ram_bus_ram_bus_cyc & main_soclinux_ram_bus_ram_bus_stb) & main_soclinux_ram_bus_ram_bus_we) & main_soclinux_ram_bus_ram_bus_sel[1]); main_soclinux_ram_we[2] <= (((main_soclinux_ram_bus_ram_bus_cyc & main_soclinux_ram_bus_ram_bus_stb) & main_soclinux_ram_bus_ram_bus_we) & main_soclinux_ram_bus_ram_bus_sel[2]); main_soclinux_ram_we[3] <= (((main_soclinux_ram_bus_ram_bus_cyc & main_soclinux_ram_bus_ram_bus_stb) & main_soclinux_ram_bus_ram_bus_we) & main_soclinux_ram_bus_ram_bus_sel[3]); end assign main_soclinux_ram_adr = main_soclinux_ram_bus_ram_bus_adr[10:0]; assign main_soclinux_ram_bus_ram_bus_dat_r = main_soclinux_ram_dat_r; assign main_soclinux_ram_dat_w = main_soclinux_ram_bus_ram_bus_dat_w; assign main_soclinux_uart_uart_sink_valid = main_soclinux_source_valid; assign main_soclinux_source_ready = main_soclinux_uart_uart_sink_ready; assign main_soclinux_uart_uart_sink_first = main_soclinux_source_first; assign main_soclinux_uart_uart_sink_last = main_soclinux_source_last; assign main_soclinux_uart_uart_sink_payload_data = main_soclinux_source_payload_data; assign main_soclinux_sink_valid = main_soclinux_uart_uart_source_valid; assign main_soclinux_uart_uart_source_ready = main_soclinux_sink_ready; assign main_soclinux_sink_first = main_soclinux_uart_uart_source_first; assign main_soclinux_sink_last = main_soclinux_uart_uart_source_last; assign main_soclinux_sink_payload_data = main_soclinux_uart_uart_source_payload_data; assign main_soclinux_uart_tx_fifo_sink_valid = main_soclinux_uart_rxtx_re; assign main_soclinux_uart_tx_fifo_sink_payload_data = main_soclinux_uart_rxtx_r; assign main_soclinux_uart_txfull_status = (~main_soclinux_uart_tx_fifo_sink_ready); assign main_soclinux_uart_txempty_status = (~main_soclinux_uart_tx_fifo_source_valid); assign main_soclinux_uart_uart_source_valid = main_soclinux_uart_tx_fifo_source_valid; assign main_soclinux_uart_tx_fifo_source_ready = main_soclinux_uart_uart_source_ready; assign main_soclinux_uart_uart_source_first = main_soclinux_uart_tx_fifo_source_first; assign main_soclinux_uart_uart_source_last = main_soclinux_uart_tx_fifo_source_last; assign main_soclinux_uart_uart_source_payload_data = main_soclinux_uart_tx_fifo_source_payload_data; assign main_soclinux_uart_tx_trigger = (~main_soclinux_uart_tx_fifo_sink_ready); assign main_soclinux_uart_rx_fifo_sink_valid = main_soclinux_uart_uart_sink_valid; assign main_soclinux_uart_uart_sink_ready = main_soclinux_uart_rx_fifo_sink_ready; assign main_soclinux_uart_rx_fifo_sink_first = main_soclinux_uart_uart_sink_first; assign main_soclinux_uart_rx_fifo_sink_last = main_soclinux_uart_uart_sink_last; assign main_soclinux_uart_rx_fifo_sink_payload_data = main_soclinux_uart_uart_sink_payload_data; assign main_soclinux_uart_rxempty_status = (~main_soclinux_uart_rx_fifo_source_valid); assign main_soclinux_uart_rxfull_status = (~main_soclinux_uart_rx_fifo_sink_ready); assign main_soclinux_uart_rxtx_w = main_soclinux_uart_rx_fifo_source_payload_data; assign main_soclinux_uart_rx_fifo_source_ready = (main_soclinux_uart_rx_clear | (1'd0 & main_soclinux_uart_rxtx_we)); assign main_soclinux_uart_rx_trigger = (~main_soclinux_uart_rx_fifo_source_valid); always @(*) begin main_soclinux_uart_tx_clear <= 1'd0; if ((main_soclinux_uart_eventmanager_pending_re & main_soclinux_uart_eventmanager_pending_r[0])) begin main_soclinux_uart_tx_clear <= 1'd1; end end always @(*) begin main_soclinux_uart_eventmanager_status_w <= 2'd0; main_soclinux_uart_eventmanager_status_w[0] <= main_soclinux_uart_tx_status; main_soclinux_uart_eventmanager_status_w[1] <= main_soclinux_uart_rx_status; end always @(*) begin main_soclinux_uart_rx_clear <= 1'd0; if ((main_soclinux_uart_eventmanager_pending_re & main_soclinux_uart_eventmanager_pending_r[1])) begin main_soclinux_uart_rx_clear <= 1'd1; end end always @(*) begin main_soclinux_uart_eventmanager_pending_w <= 2'd0; main_soclinux_uart_eventmanager_pending_w[0] <= main_soclinux_uart_tx_pending; main_soclinux_uart_eventmanager_pending_w[1] <= main_soclinux_uart_rx_pending; end assign main_soclinux_uart_irq = ((main_soclinux_uart_eventmanager_pending_w[0] & main_soclinux_uart_eventmanager_storage[0]) | (main_soclinux_uart_eventmanager_pending_w[1] & main_soclinux_uart_eventmanager_storage[1])); assign main_soclinux_uart_tx_status = main_soclinux_uart_tx_trigger; assign main_soclinux_uart_rx_status = main_soclinux_uart_rx_trigger; assign main_soclinux_uart_tx_fifo_syncfifo_din = {main_soclinux_uart_tx_fifo_fifo_in_last, main_soclinux_uart_tx_fifo_fifo_in_first, main_soclinux_uart_tx_fifo_fifo_in_payload_data}; assign {main_soclinux_uart_tx_fifo_fifo_out_last, main_soclinux_uart_tx_fifo_fifo_out_first, main_soclinux_uart_tx_fifo_fifo_out_payload_data} = main_soclinux_uart_tx_fifo_syncfifo_dout; assign main_soclinux_uart_tx_fifo_sink_ready = main_soclinux_uart_tx_fifo_syncfifo_writable; assign main_soclinux_uart_tx_fifo_syncfifo_we = main_soclinux_uart_tx_fifo_sink_valid; assign main_soclinux_uart_tx_fifo_fifo_in_first = main_soclinux_uart_tx_fifo_sink_first; assign main_soclinux_uart_tx_fifo_fifo_in_last = main_soclinux_uart_tx_fifo_sink_last; assign main_soclinux_uart_tx_fifo_fifo_in_payload_data = main_soclinux_uart_tx_fifo_sink_payload_data; assign main_soclinux_uart_tx_fifo_source_valid = main_soclinux_uart_tx_fifo_readable; assign main_soclinux_uart_tx_fifo_source_first = main_soclinux_uart_tx_fifo_fifo_out_first; assign main_soclinux_uart_tx_fifo_source_last = main_soclinux_uart_tx_fifo_fifo_out_last; assign main_soclinux_uart_tx_fifo_source_payload_data = main_soclinux_uart_tx_fifo_fifo_out_payload_data; assign main_soclinux_uart_tx_fifo_re = main_soclinux_uart_tx_fifo_source_ready; assign main_soclinux_uart_tx_fifo_syncfifo_re = (main_soclinux_uart_tx_fifo_syncfifo_readable & ((~main_soclinux_uart_tx_fifo_readable) | main_soclinux_uart_tx_fifo_re)); assign main_soclinux_uart_tx_fifo_level1 = (main_soclinux_uart_tx_fifo_level0 + main_soclinux_uart_tx_fifo_readable); always @(*) begin main_soclinux_uart_tx_fifo_wrport_adr <= 4'd0; if (main_soclinux_uart_tx_fifo_replace) begin main_soclinux_uart_tx_fifo_wrport_adr <= (main_soclinux_uart_tx_fifo_produce - 1'd1); end else begin main_soclinux_uart_tx_fifo_wrport_adr <= main_soclinux_uart_tx_fifo_produce; end end assign main_soclinux_uart_tx_fifo_wrport_dat_w = main_soclinux_uart_tx_fifo_syncfifo_din; assign main_soclinux_uart_tx_fifo_wrport_we = (main_soclinux_uart_tx_fifo_syncfifo_we & (main_soclinux_uart_tx_fifo_syncfifo_writable | main_soclinux_uart_tx_fifo_replace)); assign main_soclinux_uart_tx_fifo_do_read = (main_soclinux_uart_tx_fifo_syncfifo_readable & main_soclinux_uart_tx_fifo_syncfifo_re); assign main_soclinux_uart_tx_fifo_rdport_adr = main_soclinux_uart_tx_fifo_consume; assign main_soclinux_uart_tx_fifo_syncfifo_dout = main_soclinux_uart_tx_fifo_rdport_dat_r; assign main_soclinux_uart_tx_fifo_rdport_re = main_soclinux_uart_tx_fifo_do_read; assign main_soclinux_uart_tx_fifo_syncfifo_writable = (main_soclinux_uart_tx_fifo_level0 != 5'd16); assign main_soclinux_uart_tx_fifo_syncfifo_readable = (main_soclinux_uart_tx_fifo_level0 != 1'd0); assign main_soclinux_uart_rx_fifo_syncfifo_din = {main_soclinux_uart_rx_fifo_fifo_in_last, main_soclinux_uart_rx_fifo_fifo_in_first, main_soclinux_uart_rx_fifo_fifo_in_payload_data}; assign {main_soclinux_uart_rx_fifo_fifo_out_last, main_soclinux_uart_rx_fifo_fifo_out_first, main_soclinux_uart_rx_fifo_fifo_out_payload_data} = main_soclinux_uart_rx_fifo_syncfifo_dout; assign main_soclinux_uart_rx_fifo_sink_ready = main_soclinux_uart_rx_fifo_syncfifo_writable; assign main_soclinux_uart_rx_fifo_syncfifo_we = main_soclinux_uart_rx_fifo_sink_valid; assign main_soclinux_uart_rx_fifo_fifo_in_first = main_soclinux_uart_rx_fifo_sink_first; assign main_soclinux_uart_rx_fifo_fifo_in_last = main_soclinux_uart_rx_fifo_sink_last; assign main_soclinux_uart_rx_fifo_fifo_in_payload_data = main_soclinux_uart_rx_fifo_sink_payload_data; assign main_soclinux_uart_rx_fifo_source_valid = main_soclinux_uart_rx_fifo_readable; assign main_soclinux_uart_rx_fifo_source_first = main_soclinux_uart_rx_fifo_fifo_out_first; assign main_soclinux_uart_rx_fifo_source_last = main_soclinux_uart_rx_fifo_fifo_out_last; assign main_soclinux_uart_rx_fifo_source_payload_data = main_soclinux_uart_rx_fifo_fifo_out_payload_data; assign main_soclinux_uart_rx_fifo_re = main_soclinux_uart_rx_fifo_source_ready; assign main_soclinux_uart_rx_fifo_syncfifo_re = (main_soclinux_uart_rx_fifo_syncfifo_readable & ((~main_soclinux_uart_rx_fifo_readable) | main_soclinux_uart_rx_fifo_re)); assign main_soclinux_uart_rx_fifo_level1 = (main_soclinux_uart_rx_fifo_level0 + main_soclinux_uart_rx_fifo_readable); always @(*) begin main_soclinux_uart_rx_fifo_wrport_adr <= 4'd0; if (main_soclinux_uart_rx_fifo_replace) begin main_soclinux_uart_rx_fifo_wrport_adr <= (main_soclinux_uart_rx_fifo_produce - 1'd1); end else begin main_soclinux_uart_rx_fifo_wrport_adr <= main_soclinux_uart_rx_fifo_produce; end end assign main_soclinux_uart_rx_fifo_wrport_dat_w = main_soclinux_uart_rx_fifo_syncfifo_din; assign main_soclinux_uart_rx_fifo_wrport_we = (main_soclinux_uart_rx_fifo_syncfifo_we & (main_soclinux_uart_rx_fifo_syncfifo_writable | main_soclinux_uart_rx_fifo_replace)); assign main_soclinux_uart_rx_fifo_do_read = (main_soclinux_uart_rx_fifo_syncfifo_readable & main_soclinux_uart_rx_fifo_syncfifo_re); assign main_soclinux_uart_rx_fifo_rdport_adr = main_soclinux_uart_rx_fifo_consume; assign main_soclinux_uart_rx_fifo_syncfifo_dout = main_soclinux_uart_rx_fifo_rdport_dat_r; assign main_soclinux_uart_rx_fifo_rdport_re = main_soclinux_uart_rx_fifo_do_read; assign main_soclinux_uart_rx_fifo_syncfifo_writable = (main_soclinux_uart_rx_fifo_level0 != 5'd16); assign main_soclinux_uart_rx_fifo_syncfifo_readable = (main_soclinux_uart_rx_fifo_level0 != 1'd0); assign main_soclinux_timer_zero_trigger = (main_soclinux_timer_value != 1'd0); assign main_soclinux_timer_eventmanager_status_w = main_soclinux_timer_zero_status; always @(*) begin main_soclinux_timer_zero_clear <= 1'd0; if ((main_soclinux_timer_eventmanager_pending_re & main_soclinux_timer_eventmanager_pending_r)) begin main_soclinux_timer_zero_clear <= 1'd1; end end assign main_soclinux_timer_eventmanager_pending_w = main_soclinux_timer_zero_pending; assign main_soclinux_timer_irq = (main_soclinux_timer_eventmanager_pending_w & main_soclinux_timer_eventmanager_storage); assign main_soclinux_timer_zero_status = main_soclinux_timer_zero_trigger; assign main_reset = (rst | main_rst); assign wifi_gpio0 = 1'd1; assign main_clkin = clk25; assign sys_clk = main_clkout0; assign sys_ps_clk = main_clkout1; assign main_dfi_p0_address = main_sdram_master_p0_address; assign main_dfi_p0_bank = main_sdram_master_p0_bank; assign main_dfi_p0_cas_n = main_sdram_master_p0_cas_n; assign main_dfi_p0_cs_n = main_sdram_master_p0_cs_n; assign main_dfi_p0_ras_n = main_sdram_master_p0_ras_n; assign main_dfi_p0_we_n = main_sdram_master_p0_we_n; assign main_dfi_p0_cke = main_sdram_master_p0_cke; assign main_dfi_p0_odt = main_sdram_master_p0_odt; assign main_dfi_p0_reset_n = main_sdram_master_p0_reset_n; assign main_dfi_p0_act_n = main_sdram_master_p0_act_n; assign main_dfi_p0_wrdata = main_sdram_master_p0_wrdata; assign main_dfi_p0_wrdata_en = main_sdram_master_p0_wrdata_en; assign main_dfi_p0_wrdata_mask = main_sdram_master_p0_wrdata_mask; assign main_dfi_p0_rddata_en = main_sdram_master_p0_rddata_en; assign main_sdram_master_p0_rddata = main_dfi_p0_rddata; assign main_sdram_master_p0_rddata_valid = main_dfi_p0_rddata_valid; assign main_sdram_slave_p0_address = main_sdram_dfi_p0_address; assign main_sdram_slave_p0_bank = main_sdram_dfi_p0_bank; assign main_sdram_slave_p0_cas_n = main_sdram_dfi_p0_cas_n; assign main_sdram_slave_p0_cs_n = main_sdram_dfi_p0_cs_n; assign main_sdram_slave_p0_ras_n = main_sdram_dfi_p0_ras_n; assign main_sdram_slave_p0_we_n = main_sdram_dfi_p0_we_n; assign main_sdram_slave_p0_cke = main_sdram_dfi_p0_cke; assign main_sdram_slave_p0_odt = main_sdram_dfi_p0_odt; assign main_sdram_slave_p0_reset_n = main_sdram_dfi_p0_reset_n; assign main_sdram_slave_p0_act_n = main_sdram_dfi_p0_act_n; assign main_sdram_slave_p0_wrdata = main_sdram_dfi_p0_wrdata; assign main_sdram_slave_p0_wrdata_en = main_sdram_dfi_p0_wrdata_en; assign main_sdram_slave_p0_wrdata_mask = main_sdram_dfi_p0_wrdata_mask; assign main_sdram_slave_p0_rddata_en = main_sdram_dfi_p0_rddata_en; assign main_sdram_dfi_p0_rddata = main_sdram_slave_p0_rddata; assign main_sdram_dfi_p0_rddata_valid = main_sdram_slave_p0_rddata_valid; always @(*) begin main_sdram_slave_p0_rddata <= 16'd0; main_sdram_slave_p0_rddata_valid <= 1'd0; main_sdram_master_p0_address <= 13'd0; main_sdram_master_p0_bank <= 2'd0; main_sdram_master_p0_cas_n <= 1'd1; main_sdram_master_p0_cs_n <= 1'd1; main_sdram_master_p0_ras_n <= 1'd1; main_sdram_master_p0_we_n <= 1'd1; main_sdram_master_p0_cke <= 1'd0; main_sdram_master_p0_odt <= 1'd0; main_sdram_master_p0_reset_n <= 1'd0; main_sdram_inti_p0_rddata <= 16'd0; main_sdram_master_p0_act_n <= 1'd1; main_sdram_inti_p0_rddata_valid <= 1'd0; main_sdram_master_p0_wrdata <= 16'd0; main_sdram_master_p0_wrdata_en <= 1'd0; main_sdram_master_p0_wrdata_mask <= 2'd0; main_sdram_master_p0_rddata_en <= 1'd0; if (main_sdram_sel) begin main_sdram_master_p0_address <= main_sdram_slave_p0_address; main_sdram_master_p0_bank <= main_sdram_slave_p0_bank; main_sdram_master_p0_cas_n <= main_sdram_slave_p0_cas_n; main_sdram_master_p0_cs_n <= main_sdram_slave_p0_cs_n; main_sdram_master_p0_ras_n <= main_sdram_slave_p0_ras_n; main_sdram_master_p0_we_n <= main_sdram_slave_p0_we_n; main_sdram_master_p0_cke <= main_sdram_slave_p0_cke; main_sdram_master_p0_odt <= main_sdram_slave_p0_odt; main_sdram_master_p0_reset_n <= main_sdram_slave_p0_reset_n; main_sdram_master_p0_act_n <= main_sdram_slave_p0_act_n; main_sdram_master_p0_wrdata <= main_sdram_slave_p0_wrdata; main_sdram_master_p0_wrdata_en <= main_sdram_slave_p0_wrdata_en; main_sdram_master_p0_wrdata_mask <= main_sdram_slave_p0_wrdata_mask; main_sdram_master_p0_rddata_en <= main_sdram_slave_p0_rddata_en; main_sdram_slave_p0_rddata <= main_sdram_master_p0_rddata; main_sdram_slave_p0_rddata_valid <= main_sdram_master_p0_rddata_valid; end else begin main_sdram_master_p0_address <= main_sdram_inti_p0_address; main_sdram_master_p0_bank <= main_sdram_inti_p0_bank; main_sdram_master_p0_cas_n <= main_sdram_inti_p0_cas_n; main_sdram_master_p0_cs_n <= main_sdram_inti_p0_cs_n; main_sdram_master_p0_ras_n <= main_sdram_inti_p0_ras_n; main_sdram_master_p0_we_n <= main_sdram_inti_p0_we_n; main_sdram_master_p0_cke <= main_sdram_inti_p0_cke; main_sdram_master_p0_odt <= main_sdram_inti_p0_odt; main_sdram_master_p0_reset_n <= main_sdram_inti_p0_reset_n; main_sdram_master_p0_act_n <= main_sdram_inti_p0_act_n; main_sdram_master_p0_wrdata <= main_sdram_inti_p0_wrdata; main_sdram_master_p0_wrdata_en <= main_sdram_inti_p0_wrdata_en; main_sdram_master_p0_wrdata_mask <= main_sdram_inti_p0_wrdata_mask; main_sdram_master_p0_rddata_en <= main_sdram_inti_p0_rddata_en; main_sdram_inti_p0_rddata <= main_sdram_master_p0_rddata; main_sdram_inti_p0_rddata_valid <= main_sdram_master_p0_rddata_valid; end end assign main_sdram_inti_p0_cke = main_sdram_cke1; assign main_sdram_inti_p0_odt = main_sdram_odt; assign main_sdram_inti_p0_reset_n = main_sdram_reset_n; always @(*) begin main_sdram_inti_p0_ras_n <= 1'd1; main_sdram_inti_p0_we_n <= 1'd1; main_sdram_inti_p0_cas_n <= 1'd1; main_sdram_inti_p0_cs_n <= 1'd1; if (main_sdram_command_issue_re) begin main_sdram_inti_p0_cs_n <= {1{(~main_sdram_command_storage[0])}}; main_sdram_inti_p0_we_n <= (~main_sdram_command_storage[1]); main_sdram_inti_p0_cas_n <= (~main_sdram_command_storage[2]); main_sdram_inti_p0_ras_n <= (~main_sdram_command_storage[3]); end else begin main_sdram_inti_p0_cs_n <= {1{1'd1}}; main_sdram_inti_p0_we_n <= 1'd1; main_sdram_inti_p0_cas_n <= 1'd1; main_sdram_inti_p0_ras_n <= 1'd1; end end assign main_sdram_inti_p0_address = main_sdram_address_storage; assign main_sdram_inti_p0_bank = main_sdram_baddress_storage; assign main_sdram_inti_p0_wrdata_en = (main_sdram_command_issue_re & main_sdram_command_storage[4]); assign main_sdram_inti_p0_rddata_en = (main_sdram_command_issue_re & main_sdram_command_storage[5]); assign main_sdram_inti_p0_wrdata = main_sdram_wrdata_storage; assign main_sdram_inti_p0_wrdata_mask = 1'd0; assign main_sdram_bankmachine0_req_valid = main_sdram_interface_bank0_valid; assign main_sdram_interface_bank0_ready = main_sdram_bankmachine0_req_ready; assign main_sdram_bankmachine0_req_we = main_sdram_interface_bank0_we; assign main_sdram_bankmachine0_req_addr = main_sdram_interface_bank0_addr; assign main_sdram_interface_bank0_lock = main_sdram_bankmachine0_req_lock; assign main_sdram_interface_bank0_wdata_ready = main_sdram_bankmachine0_req_wdata_ready; assign main_sdram_interface_bank0_rdata_valid = main_sdram_bankmachine0_req_rdata_valid; assign main_sdram_bankmachine1_req_valid = main_sdram_interface_bank1_valid; assign main_sdram_interface_bank1_ready = main_sdram_bankmachine1_req_ready; assign main_sdram_bankmachine1_req_we = main_sdram_interface_bank1_we; assign main_sdram_bankmachine1_req_addr = main_sdram_interface_bank1_addr; assign main_sdram_interface_bank1_lock = main_sdram_bankmachine1_req_lock; assign main_sdram_interface_bank1_wdata_ready = main_sdram_bankmachine1_req_wdata_ready; assign main_sdram_interface_bank1_rdata_valid = main_sdram_bankmachine1_req_rdata_valid; assign main_sdram_bankmachine2_req_valid = main_sdram_interface_bank2_valid; assign main_sdram_interface_bank2_ready = main_sdram_bankmachine2_req_ready; assign main_sdram_bankmachine2_req_we = main_sdram_interface_bank2_we; assign main_sdram_bankmachine2_req_addr = main_sdram_interface_bank2_addr; assign main_sdram_interface_bank2_lock = main_sdram_bankmachine2_req_lock; assign main_sdram_interface_bank2_wdata_ready = main_sdram_bankmachine2_req_wdata_ready; assign main_sdram_interface_bank2_rdata_valid = main_sdram_bankmachine2_req_rdata_valid; assign main_sdram_bankmachine3_req_valid = main_sdram_interface_bank3_valid; assign main_sdram_interface_bank3_ready = main_sdram_bankmachine3_req_ready; assign main_sdram_bankmachine3_req_we = main_sdram_interface_bank3_we; assign main_sdram_bankmachine3_req_addr = main_sdram_interface_bank3_addr; assign main_sdram_interface_bank3_lock = main_sdram_bankmachine3_req_lock; assign main_sdram_interface_bank3_wdata_ready = main_sdram_bankmachine3_req_wdata_ready; assign main_sdram_interface_bank3_rdata_valid = main_sdram_bankmachine3_req_rdata_valid; assign main_sdram_timer_wait = (~main_sdram_timer_done0); assign main_sdram_postponer_req_i = main_sdram_timer_done0; assign main_sdram_wants_refresh = main_sdram_postponer_req_o; assign main_sdram_timer_done1 = (main_sdram_timer_count1 == 1'd0); assign main_sdram_timer_done0 = main_sdram_timer_done1; assign main_sdram_timer_count0 = main_sdram_timer_count1; assign main_sdram_sequencer_start1 = (main_sdram_sequencer_start0 | (main_sdram_sequencer_count != 1'd0)); assign main_sdram_sequencer_done0 = (main_sdram_sequencer_done1 & (main_sdram_sequencer_count == 1'd0)); always @(*) begin builder_refresher_next_state <= 2'd0; main_sdram_cmd_last <= 1'd0; main_sdram_sequencer_start0 <= 1'd0; main_sdram_cmd_valid <= 1'd0; builder_refresher_next_state <= builder_refresher_state; case (builder_refresher_state) 1'd1: begin main_sdram_cmd_valid <= 1'd1; if (main_sdram_cmd_ready) begin main_sdram_sequencer_start0 <= 1'd1; builder_refresher_next_state <= 2'd2; end end 2'd2: begin main_sdram_cmd_valid <= 1'd1; if (main_sdram_sequencer_done0) begin main_sdram_cmd_valid <= 1'd0; main_sdram_cmd_last <= 1'd1; builder_refresher_next_state <= 1'd0; end end default: begin if (1'd1) begin if (main_sdram_wants_refresh) begin builder_refresher_next_state <= 1'd1; end end end endcase end assign main_sdram_bankmachine0_cmd_buffer_lookahead_sink_valid = main_sdram_bankmachine0_req_valid; assign main_sdram_bankmachine0_req_ready = main_sdram_bankmachine0_cmd_buffer_lookahead_sink_ready; assign main_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_we = main_sdram_bankmachine0_req_we; assign main_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_addr = main_sdram_bankmachine0_req_addr; assign main_sdram_bankmachine0_cmd_buffer_sink_valid = main_sdram_bankmachine0_cmd_buffer_lookahead_source_valid; assign main_sdram_bankmachine0_cmd_buffer_lookahead_source_ready = main_sdram_bankmachine0_cmd_buffer_sink_ready; assign main_sdram_bankmachine0_cmd_buffer_sink_first = main_sdram_bankmachine0_cmd_buffer_lookahead_source_first; assign main_sdram_bankmachine0_cmd_buffer_sink_last = main_sdram_bankmachine0_cmd_buffer_lookahead_source_last; assign main_sdram_bankmachine0_cmd_buffer_sink_payload_we = main_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_we; assign main_sdram_bankmachine0_cmd_buffer_sink_payload_addr = main_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_addr; assign main_sdram_bankmachine0_cmd_buffer_source_ready = (main_sdram_bankmachine0_req_wdata_ready | main_sdram_bankmachine0_req_rdata_valid); assign main_sdram_bankmachine0_req_lock = (main_sdram_bankmachine0_cmd_buffer_lookahead_source_valid | main_sdram_bankmachine0_cmd_buffer_source_valid); assign main_sdram_bankmachine0_row_hit = (main_sdram_bankmachine0_row == main_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:9]); assign main_sdram_bankmachine0_cmd_payload_ba = 1'd0; always @(*) begin main_sdram_bankmachine0_cmd_payload_a <= 13'd0; if (main_sdram_bankmachine0_row_col_n_addr_sel) begin main_sdram_bankmachine0_cmd_payload_a <= main_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:9]; end else begin main_sdram_bankmachine0_cmd_payload_a <= ((main_sdram_bankmachine0_auto_precharge <<< 4'd10) | {main_sdram_bankmachine0_cmd_buffer_source_payload_addr[8:0], {0{1'd0}}}); end end assign main_sdram_bankmachine0_twtpcon_valid = ((main_sdram_bankmachine0_cmd_valid & main_sdram_bankmachine0_cmd_ready) & main_sdram_bankmachine0_cmd_payload_is_write); assign main_sdram_bankmachine0_trccon_valid = ((main_sdram_bankmachine0_cmd_valid & main_sdram_bankmachine0_cmd_ready) & main_sdram_bankmachine0_row_open); assign main_sdram_bankmachine0_trascon_valid = ((main_sdram_bankmachine0_cmd_valid & main_sdram_bankmachine0_cmd_ready) & main_sdram_bankmachine0_row_open); always @(*) begin main_sdram_bankmachine0_auto_precharge <= 1'd0; if ((main_sdram_bankmachine0_cmd_buffer_lookahead_source_valid & main_sdram_bankmachine0_cmd_buffer_source_valid)) begin if ((main_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_addr[21:9] != main_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:9])) begin main_sdram_bankmachine0_auto_precharge <= (main_sdram_bankmachine0_row_close == 1'd0); end end end assign main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_din = {main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_last, main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_first, main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_addr, main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_we}; assign {main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_last, main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_first, main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_addr, main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_we} = main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_dout; assign main_sdram_bankmachine0_cmd_buffer_lookahead_sink_ready = main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable; assign main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we = main_sdram_bankmachine0_cmd_buffer_lookahead_sink_valid; assign main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_first = main_sdram_bankmachine0_cmd_buffer_lookahead_sink_first; assign main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_last = main_sdram_bankmachine0_cmd_buffer_lookahead_sink_last; assign main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_we = main_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_we; assign main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_addr = main_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_addr; assign main_sdram_bankmachine0_cmd_buffer_lookahead_source_valid = main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_readable; assign main_sdram_bankmachine0_cmd_buffer_lookahead_source_first = main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_first; assign main_sdram_bankmachine0_cmd_buffer_lookahead_source_last = main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_last; assign main_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_we = main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_we; assign main_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_addr = main_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_addr; assign main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_re = main_sdram_bankmachine0_cmd_buffer_lookahead_source_ready; always @(*) begin main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr <= 3'd0; if (main_sdram_bankmachine0_cmd_buffer_lookahead_replace) begin main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr <= (main_sdram_bankmachine0_cmd_buffer_lookahead_produce - 1'd1); end else begin main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr <= main_sdram_bankmachine0_cmd_buffer_lookahead_produce; end end assign main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_w = main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_din; assign main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_we = (main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we & (main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable | main_sdram_bankmachine0_cmd_buffer_lookahead_replace)); assign main_sdram_bankmachine0_cmd_buffer_lookahead_do_read = (main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_readable & main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_re); assign main_sdram_bankmachine0_cmd_buffer_lookahead_rdport_adr = main_sdram_bankmachine0_cmd_buffer_lookahead_consume; assign main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_dout = main_sdram_bankmachine0_cmd_buffer_lookahead_rdport_dat_r; assign main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable = (main_sdram_bankmachine0_cmd_buffer_lookahead_level != 4'd8); assign main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_readable = (main_sdram_bankmachine0_cmd_buffer_lookahead_level != 1'd0); assign main_sdram_bankmachine0_cmd_buffer_sink_ready = ((~main_sdram_bankmachine0_cmd_buffer_source_valid) | main_sdram_bankmachine0_cmd_buffer_source_ready); always @(*) begin main_sdram_bankmachine0_req_wdata_ready <= 1'd0; main_sdram_bankmachine0_req_rdata_valid <= 1'd0; main_sdram_bankmachine0_refresh_gnt <= 1'd0; main_sdram_bankmachine0_cmd_valid <= 1'd0; main_sdram_bankmachine0_row_open <= 1'd0; main_sdram_bankmachine0_row_close <= 1'd0; main_sdram_bankmachine0_cmd_payload_cas <= 1'd0; main_sdram_bankmachine0_cmd_payload_ras <= 1'd0; main_sdram_bankmachine0_row_col_n_addr_sel <= 1'd0; main_sdram_bankmachine0_cmd_payload_we <= 1'd0; main_sdram_bankmachine0_cmd_payload_is_cmd <= 1'd0; main_sdram_bankmachine0_cmd_payload_is_read <= 1'd0; builder_bankmachine0_next_state <= 3'd0; main_sdram_bankmachine0_cmd_payload_is_write <= 1'd0; builder_bankmachine0_next_state <= builder_bankmachine0_state; case (builder_bankmachine0_state) 1'd1: begin if ((main_sdram_bankmachine0_twtpcon_ready & main_sdram_bankmachine0_trascon_ready)) begin main_sdram_bankmachine0_cmd_valid <= 1'd1; if (main_sdram_bankmachine0_cmd_ready) begin builder_bankmachine0_next_state <= 2'd3; end main_sdram_bankmachine0_cmd_payload_ras <= 1'd1; main_sdram_bankmachine0_cmd_payload_we <= 1'd1; main_sdram_bankmachine0_cmd_payload_is_cmd <= 1'd1; end main_sdram_bankmachine0_row_close <= 1'd1; end 2'd2: begin if ((main_sdram_bankmachine0_twtpcon_ready & main_sdram_bankmachine0_trascon_ready)) begin builder_bankmachine0_next_state <= 2'd3; end main_sdram_bankmachine0_row_close <= 1'd1; end 2'd3: begin if (main_sdram_bankmachine0_trccon_ready) begin main_sdram_bankmachine0_row_col_n_addr_sel <= 1'd1; main_sdram_bankmachine0_row_open <= 1'd1; main_sdram_bankmachine0_cmd_valid <= 1'd1; main_sdram_bankmachine0_cmd_payload_is_cmd <= 1'd1; if (main_sdram_bankmachine0_cmd_ready) begin builder_bankmachine0_next_state <= 1'd0; end main_sdram_bankmachine0_cmd_payload_ras <= 1'd1; end end 3'd4: begin if (main_sdram_bankmachine0_twtpcon_ready) begin main_sdram_bankmachine0_refresh_gnt <= 1'd1; end main_sdram_bankmachine0_row_close <= 1'd1; main_sdram_bankmachine0_cmd_payload_is_cmd <= 1'd1; if ((~main_sdram_bankmachine0_refresh_req)) begin builder_bankmachine0_next_state <= 1'd0; end end default: begin if (main_sdram_bankmachine0_refresh_req) begin builder_bankmachine0_next_state <= 3'd4; end else begin if (main_sdram_bankmachine0_cmd_buffer_source_valid) begin if (main_sdram_bankmachine0_row_opened) begin if (main_sdram_bankmachine0_row_hit) begin main_sdram_bankmachine0_cmd_valid <= 1'd1; if (main_sdram_bankmachine0_cmd_buffer_source_payload_we) begin main_sdram_bankmachine0_req_wdata_ready <= main_sdram_bankmachine0_cmd_ready; main_sdram_bankmachine0_cmd_payload_is_write <= 1'd1; main_sdram_bankmachine0_cmd_payload_we <= 1'd1; end else begin main_sdram_bankmachine0_req_rdata_valid <= main_sdram_bankmachine0_cmd_ready; main_sdram_bankmachine0_cmd_payload_is_read <= 1'd1; end main_sdram_bankmachine0_cmd_payload_cas <= 1'd1; if ((main_sdram_bankmachine0_cmd_ready & main_sdram_bankmachine0_auto_precharge)) begin builder_bankmachine0_next_state <= 2'd2; end end else begin builder_bankmachine0_next_state <= 1'd1; end end else begin builder_bankmachine0_next_state <= 2'd3; end end end end endcase end assign main_sdram_bankmachine1_cmd_buffer_lookahead_sink_valid = main_sdram_bankmachine1_req_valid; assign main_sdram_bankmachine1_req_ready = main_sdram_bankmachine1_cmd_buffer_lookahead_sink_ready; assign main_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_we = main_sdram_bankmachine1_req_we; assign main_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_addr = main_sdram_bankmachine1_req_addr; assign main_sdram_bankmachine1_cmd_buffer_sink_valid = main_sdram_bankmachine1_cmd_buffer_lookahead_source_valid; assign main_sdram_bankmachine1_cmd_buffer_lookahead_source_ready = main_sdram_bankmachine1_cmd_buffer_sink_ready; assign main_sdram_bankmachine1_cmd_buffer_sink_first = main_sdram_bankmachine1_cmd_buffer_lookahead_source_first; assign main_sdram_bankmachine1_cmd_buffer_sink_last = main_sdram_bankmachine1_cmd_buffer_lookahead_source_last; assign main_sdram_bankmachine1_cmd_buffer_sink_payload_we = main_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_we; assign main_sdram_bankmachine1_cmd_buffer_sink_payload_addr = main_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_addr; assign main_sdram_bankmachine1_cmd_buffer_source_ready = (main_sdram_bankmachine1_req_wdata_ready | main_sdram_bankmachine1_req_rdata_valid); assign main_sdram_bankmachine1_req_lock = (main_sdram_bankmachine1_cmd_buffer_lookahead_source_valid | main_sdram_bankmachine1_cmd_buffer_source_valid); assign main_sdram_bankmachine1_row_hit = (main_sdram_bankmachine1_row == main_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:9]); assign main_sdram_bankmachine1_cmd_payload_ba = 1'd1; always @(*) begin main_sdram_bankmachine1_cmd_payload_a <= 13'd0; if (main_sdram_bankmachine1_row_col_n_addr_sel) begin main_sdram_bankmachine1_cmd_payload_a <= main_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:9]; end else begin main_sdram_bankmachine1_cmd_payload_a <= ((main_sdram_bankmachine1_auto_precharge <<< 4'd10) | {main_sdram_bankmachine1_cmd_buffer_source_payload_addr[8:0], {0{1'd0}}}); end end assign main_sdram_bankmachine1_twtpcon_valid = ((main_sdram_bankmachine1_cmd_valid & main_sdram_bankmachine1_cmd_ready) & main_sdram_bankmachine1_cmd_payload_is_write); assign main_sdram_bankmachine1_trccon_valid = ((main_sdram_bankmachine1_cmd_valid & main_sdram_bankmachine1_cmd_ready) & main_sdram_bankmachine1_row_open); assign main_sdram_bankmachine1_trascon_valid = ((main_sdram_bankmachine1_cmd_valid & main_sdram_bankmachine1_cmd_ready) & main_sdram_bankmachine1_row_open); always @(*) begin main_sdram_bankmachine1_auto_precharge <= 1'd0; if ((main_sdram_bankmachine1_cmd_buffer_lookahead_source_valid & main_sdram_bankmachine1_cmd_buffer_source_valid)) begin if ((main_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_addr[21:9] != main_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:9])) begin main_sdram_bankmachine1_auto_precharge <= (main_sdram_bankmachine1_row_close == 1'd0); end end end assign main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_din = {main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_last, main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_first, main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_addr, main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_we}; assign {main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_last, main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_first, main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_addr, main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_we} = main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_dout; assign main_sdram_bankmachine1_cmd_buffer_lookahead_sink_ready = main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable; assign main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we = main_sdram_bankmachine1_cmd_buffer_lookahead_sink_valid; assign main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_first = main_sdram_bankmachine1_cmd_buffer_lookahead_sink_first; assign main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_last = main_sdram_bankmachine1_cmd_buffer_lookahead_sink_last; assign main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_we = main_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_we; assign main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_addr = main_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_addr; assign main_sdram_bankmachine1_cmd_buffer_lookahead_source_valid = main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_readable; assign main_sdram_bankmachine1_cmd_buffer_lookahead_source_first = main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_first; assign main_sdram_bankmachine1_cmd_buffer_lookahead_source_last = main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_last; assign main_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_we = main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_we; assign main_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_addr = main_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_addr; assign main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_re = main_sdram_bankmachine1_cmd_buffer_lookahead_source_ready; always @(*) begin main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr <= 3'd0; if (main_sdram_bankmachine1_cmd_buffer_lookahead_replace) begin main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr <= (main_sdram_bankmachine1_cmd_buffer_lookahead_produce - 1'd1); end else begin main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr <= main_sdram_bankmachine1_cmd_buffer_lookahead_produce; end end assign main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_w = main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_din; assign main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_we = (main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we & (main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable | main_sdram_bankmachine1_cmd_buffer_lookahead_replace)); assign main_sdram_bankmachine1_cmd_buffer_lookahead_do_read = (main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_readable & main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_re); assign main_sdram_bankmachine1_cmd_buffer_lookahead_rdport_adr = main_sdram_bankmachine1_cmd_buffer_lookahead_consume; assign main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_dout = main_sdram_bankmachine1_cmd_buffer_lookahead_rdport_dat_r; assign main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable = (main_sdram_bankmachine1_cmd_buffer_lookahead_level != 4'd8); assign main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_readable = (main_sdram_bankmachine1_cmd_buffer_lookahead_level != 1'd0); assign main_sdram_bankmachine1_cmd_buffer_sink_ready = ((~main_sdram_bankmachine1_cmd_buffer_source_valid) | main_sdram_bankmachine1_cmd_buffer_source_ready); always @(*) begin main_sdram_bankmachine1_req_wdata_ready <= 1'd0; main_sdram_bankmachine1_row_col_n_addr_sel <= 1'd0; main_sdram_bankmachine1_req_rdata_valid <= 1'd0; main_sdram_bankmachine1_refresh_gnt <= 1'd0; main_sdram_bankmachine1_cmd_valid <= 1'd0; main_sdram_bankmachine1_row_open <= 1'd0; main_sdram_bankmachine1_row_close <= 1'd0; main_sdram_bankmachine1_cmd_payload_cas <= 1'd0; builder_bankmachine1_next_state <= 3'd0; main_sdram_bankmachine1_cmd_payload_ras <= 1'd0; main_sdram_bankmachine1_cmd_payload_we <= 1'd0; main_sdram_bankmachine1_cmd_payload_is_cmd <= 1'd0; main_sdram_bankmachine1_cmd_payload_is_read <= 1'd0; main_sdram_bankmachine1_cmd_payload_is_write <= 1'd0; builder_bankmachine1_next_state <= builder_bankmachine1_state; case (builder_bankmachine1_state) 1'd1: begin if ((main_sdram_bankmachine1_twtpcon_ready & main_sdram_bankmachine1_trascon_ready)) begin main_sdram_bankmachine1_cmd_valid <= 1'd1; if (main_sdram_bankmachine1_cmd_ready) begin builder_bankmachine1_next_state <= 2'd3; end main_sdram_bankmachine1_cmd_payload_ras <= 1'd1; main_sdram_bankmachine1_cmd_payload_we <= 1'd1; main_sdram_bankmachine1_cmd_payload_is_cmd <= 1'd1; end main_sdram_bankmachine1_row_close <= 1'd1; end 2'd2: begin if ((main_sdram_bankmachine1_twtpcon_ready & main_sdram_bankmachine1_trascon_ready)) begin builder_bankmachine1_next_state <= 2'd3; end main_sdram_bankmachine1_row_close <= 1'd1; end 2'd3: begin if (main_sdram_bankmachine1_trccon_ready) begin main_sdram_bankmachine1_row_col_n_addr_sel <= 1'd1; main_sdram_bankmachine1_row_open <= 1'd1; main_sdram_bankmachine1_cmd_valid <= 1'd1; main_sdram_bankmachine1_cmd_payload_is_cmd <= 1'd1; if (main_sdram_bankmachine1_cmd_ready) begin builder_bankmachine1_next_state <= 1'd0; end main_sdram_bankmachine1_cmd_payload_ras <= 1'd1; end end 3'd4: begin if (main_sdram_bankmachine1_twtpcon_ready) begin main_sdram_bankmachine1_refresh_gnt <= 1'd1; end main_sdram_bankmachine1_row_close <= 1'd1; main_sdram_bankmachine1_cmd_payload_is_cmd <= 1'd1; if ((~main_sdram_bankmachine1_refresh_req)) begin builder_bankmachine1_next_state <= 1'd0; end end default: begin if (main_sdram_bankmachine1_refresh_req) begin builder_bankmachine1_next_state <= 3'd4; end else begin if (main_sdram_bankmachine1_cmd_buffer_source_valid) begin if (main_sdram_bankmachine1_row_opened) begin if (main_sdram_bankmachine1_row_hit) begin main_sdram_bankmachine1_cmd_valid <= 1'd1; if (main_sdram_bankmachine1_cmd_buffer_source_payload_we) begin main_sdram_bankmachine1_req_wdata_ready <= main_sdram_bankmachine1_cmd_ready; main_sdram_bankmachine1_cmd_payload_is_write <= 1'd1; main_sdram_bankmachine1_cmd_payload_we <= 1'd1; end else begin main_sdram_bankmachine1_req_rdata_valid <= main_sdram_bankmachine1_cmd_ready; main_sdram_bankmachine1_cmd_payload_is_read <= 1'd1; end main_sdram_bankmachine1_cmd_payload_cas <= 1'd1; if ((main_sdram_bankmachine1_cmd_ready & main_sdram_bankmachine1_auto_precharge)) begin builder_bankmachine1_next_state <= 2'd2; end end else begin builder_bankmachine1_next_state <= 1'd1; end end else begin builder_bankmachine1_next_state <= 2'd3; end end end end endcase end assign main_sdram_bankmachine2_cmd_buffer_lookahead_sink_valid = main_sdram_bankmachine2_req_valid; assign main_sdram_bankmachine2_req_ready = main_sdram_bankmachine2_cmd_buffer_lookahead_sink_ready; assign main_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_we = main_sdram_bankmachine2_req_we; assign main_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_addr = main_sdram_bankmachine2_req_addr; assign main_sdram_bankmachine2_cmd_buffer_sink_valid = main_sdram_bankmachine2_cmd_buffer_lookahead_source_valid; assign main_sdram_bankmachine2_cmd_buffer_lookahead_source_ready = main_sdram_bankmachine2_cmd_buffer_sink_ready; assign main_sdram_bankmachine2_cmd_buffer_sink_first = main_sdram_bankmachine2_cmd_buffer_lookahead_source_first; assign main_sdram_bankmachine2_cmd_buffer_sink_last = main_sdram_bankmachine2_cmd_buffer_lookahead_source_last; assign main_sdram_bankmachine2_cmd_buffer_sink_payload_we = main_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_we; assign main_sdram_bankmachine2_cmd_buffer_sink_payload_addr = main_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_addr; assign main_sdram_bankmachine2_cmd_buffer_source_ready = (main_sdram_bankmachine2_req_wdata_ready | main_sdram_bankmachine2_req_rdata_valid); assign main_sdram_bankmachine2_req_lock = (main_sdram_bankmachine2_cmd_buffer_lookahead_source_valid | main_sdram_bankmachine2_cmd_buffer_source_valid); assign main_sdram_bankmachine2_row_hit = (main_sdram_bankmachine2_row == main_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:9]); assign main_sdram_bankmachine2_cmd_payload_ba = 2'd2; always @(*) begin main_sdram_bankmachine2_cmd_payload_a <= 13'd0; if (main_sdram_bankmachine2_row_col_n_addr_sel) begin main_sdram_bankmachine2_cmd_payload_a <= main_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:9]; end else begin main_sdram_bankmachine2_cmd_payload_a <= ((main_sdram_bankmachine2_auto_precharge <<< 4'd10) | {main_sdram_bankmachine2_cmd_buffer_source_payload_addr[8:0], {0{1'd0}}}); end end assign main_sdram_bankmachine2_twtpcon_valid = ((main_sdram_bankmachine2_cmd_valid & main_sdram_bankmachine2_cmd_ready) & main_sdram_bankmachine2_cmd_payload_is_write); assign main_sdram_bankmachine2_trccon_valid = ((main_sdram_bankmachine2_cmd_valid & main_sdram_bankmachine2_cmd_ready) & main_sdram_bankmachine2_row_open); assign main_sdram_bankmachine2_trascon_valid = ((main_sdram_bankmachine2_cmd_valid & main_sdram_bankmachine2_cmd_ready) & main_sdram_bankmachine2_row_open); always @(*) begin main_sdram_bankmachine2_auto_precharge <= 1'd0; if ((main_sdram_bankmachine2_cmd_buffer_lookahead_source_valid & main_sdram_bankmachine2_cmd_buffer_source_valid)) begin if ((main_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_addr[21:9] != main_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:9])) begin main_sdram_bankmachine2_auto_precharge <= (main_sdram_bankmachine2_row_close == 1'd0); end end end assign main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_din = {main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_last, main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_first, main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_addr, main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_we}; assign {main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_last, main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_first, main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_addr, main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_we} = main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_dout; assign main_sdram_bankmachine2_cmd_buffer_lookahead_sink_ready = main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable; assign main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we = main_sdram_bankmachine2_cmd_buffer_lookahead_sink_valid; assign main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_first = main_sdram_bankmachine2_cmd_buffer_lookahead_sink_first; assign main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_last = main_sdram_bankmachine2_cmd_buffer_lookahead_sink_last; assign main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_we = main_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_we; assign main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_addr = main_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_addr; assign main_sdram_bankmachine2_cmd_buffer_lookahead_source_valid = main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_readable; assign main_sdram_bankmachine2_cmd_buffer_lookahead_source_first = main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_first; assign main_sdram_bankmachine2_cmd_buffer_lookahead_source_last = main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_last; assign main_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_we = main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_we; assign main_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_addr = main_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_addr; assign main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_re = main_sdram_bankmachine2_cmd_buffer_lookahead_source_ready; always @(*) begin main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr <= 3'd0; if (main_sdram_bankmachine2_cmd_buffer_lookahead_replace) begin main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr <= (main_sdram_bankmachine2_cmd_buffer_lookahead_produce - 1'd1); end else begin main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr <= main_sdram_bankmachine2_cmd_buffer_lookahead_produce; end end assign main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_w = main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_din; assign main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_we = (main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we & (main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable | main_sdram_bankmachine2_cmd_buffer_lookahead_replace)); assign main_sdram_bankmachine2_cmd_buffer_lookahead_do_read = (main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_readable & main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_re); assign main_sdram_bankmachine2_cmd_buffer_lookahead_rdport_adr = main_sdram_bankmachine2_cmd_buffer_lookahead_consume; assign main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_dout = main_sdram_bankmachine2_cmd_buffer_lookahead_rdport_dat_r; assign main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable = (main_sdram_bankmachine2_cmd_buffer_lookahead_level != 4'd8); assign main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_readable = (main_sdram_bankmachine2_cmd_buffer_lookahead_level != 1'd0); assign main_sdram_bankmachine2_cmd_buffer_sink_ready = ((~main_sdram_bankmachine2_cmd_buffer_source_valid) | main_sdram_bankmachine2_cmd_buffer_source_ready); always @(*) begin main_sdram_bankmachine2_req_wdata_ready <= 1'd0; main_sdram_bankmachine2_req_rdata_valid <= 1'd0; main_sdram_bankmachine2_refresh_gnt <= 1'd0; main_sdram_bankmachine2_cmd_valid <= 1'd0; main_sdram_bankmachine2_row_col_n_addr_sel <= 1'd0; builder_bankmachine2_next_state <= 3'd0; main_sdram_bankmachine2_row_open <= 1'd0; main_sdram_bankmachine2_row_close <= 1'd0; main_sdram_bankmachine2_cmd_payload_cas <= 1'd0; main_sdram_bankmachine2_cmd_payload_ras <= 1'd0; main_sdram_bankmachine2_cmd_payload_we <= 1'd0; main_sdram_bankmachine2_cmd_payload_is_cmd <= 1'd0; main_sdram_bankmachine2_cmd_payload_is_read <= 1'd0; main_sdram_bankmachine2_cmd_payload_is_write <= 1'd0; builder_bankmachine2_next_state <= builder_bankmachine2_state; case (builder_bankmachine2_state) 1'd1: begin if ((main_sdram_bankmachine2_twtpcon_ready & main_sdram_bankmachine2_trascon_ready)) begin main_sdram_bankmachine2_cmd_valid <= 1'd1; if (main_sdram_bankmachine2_cmd_ready) begin builder_bankmachine2_next_state <= 2'd3; end main_sdram_bankmachine2_cmd_payload_ras <= 1'd1; main_sdram_bankmachine2_cmd_payload_we <= 1'd1; main_sdram_bankmachine2_cmd_payload_is_cmd <= 1'd1; end main_sdram_bankmachine2_row_close <= 1'd1; end 2'd2: begin if ((main_sdram_bankmachine2_twtpcon_ready & main_sdram_bankmachine2_trascon_ready)) begin builder_bankmachine2_next_state <= 2'd3; end main_sdram_bankmachine2_row_close <= 1'd1; end 2'd3: begin if (main_sdram_bankmachine2_trccon_ready) begin main_sdram_bankmachine2_row_col_n_addr_sel <= 1'd1; main_sdram_bankmachine2_row_open <= 1'd1; main_sdram_bankmachine2_cmd_valid <= 1'd1; main_sdram_bankmachine2_cmd_payload_is_cmd <= 1'd1; if (main_sdram_bankmachine2_cmd_ready) begin builder_bankmachine2_next_state <= 1'd0; end main_sdram_bankmachine2_cmd_payload_ras <= 1'd1; end end 3'd4: begin if (main_sdram_bankmachine2_twtpcon_ready) begin main_sdram_bankmachine2_refresh_gnt <= 1'd1; end main_sdram_bankmachine2_row_close <= 1'd1; main_sdram_bankmachine2_cmd_payload_is_cmd <= 1'd1; if ((~main_sdram_bankmachine2_refresh_req)) begin builder_bankmachine2_next_state <= 1'd0; end end default: begin if (main_sdram_bankmachine2_refresh_req) begin builder_bankmachine2_next_state <= 3'd4; end else begin if (main_sdram_bankmachine2_cmd_buffer_source_valid) begin if (main_sdram_bankmachine2_row_opened) begin if (main_sdram_bankmachine2_row_hit) begin main_sdram_bankmachine2_cmd_valid <= 1'd1; if (main_sdram_bankmachine2_cmd_buffer_source_payload_we) begin main_sdram_bankmachine2_req_wdata_ready <= main_sdram_bankmachine2_cmd_ready; main_sdram_bankmachine2_cmd_payload_is_write <= 1'd1; main_sdram_bankmachine2_cmd_payload_we <= 1'd1; end else begin main_sdram_bankmachine2_req_rdata_valid <= main_sdram_bankmachine2_cmd_ready; main_sdram_bankmachine2_cmd_payload_is_read <= 1'd1; end main_sdram_bankmachine2_cmd_payload_cas <= 1'd1; if ((main_sdram_bankmachine2_cmd_ready & main_sdram_bankmachine2_auto_precharge)) begin builder_bankmachine2_next_state <= 2'd2; end end else begin builder_bankmachine2_next_state <= 1'd1; end end else begin builder_bankmachine2_next_state <= 2'd3; end end end end endcase end assign main_sdram_bankmachine3_cmd_buffer_lookahead_sink_valid = main_sdram_bankmachine3_req_valid; assign main_sdram_bankmachine3_req_ready = main_sdram_bankmachine3_cmd_buffer_lookahead_sink_ready; assign main_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_we = main_sdram_bankmachine3_req_we; assign main_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_addr = main_sdram_bankmachine3_req_addr; assign main_sdram_bankmachine3_cmd_buffer_sink_valid = main_sdram_bankmachine3_cmd_buffer_lookahead_source_valid; assign main_sdram_bankmachine3_cmd_buffer_lookahead_source_ready = main_sdram_bankmachine3_cmd_buffer_sink_ready; assign main_sdram_bankmachine3_cmd_buffer_sink_first = main_sdram_bankmachine3_cmd_buffer_lookahead_source_first; assign main_sdram_bankmachine3_cmd_buffer_sink_last = main_sdram_bankmachine3_cmd_buffer_lookahead_source_last; assign main_sdram_bankmachine3_cmd_buffer_sink_payload_we = main_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_we; assign main_sdram_bankmachine3_cmd_buffer_sink_payload_addr = main_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_addr; assign main_sdram_bankmachine3_cmd_buffer_source_ready = (main_sdram_bankmachine3_req_wdata_ready | main_sdram_bankmachine3_req_rdata_valid); assign main_sdram_bankmachine3_req_lock = (main_sdram_bankmachine3_cmd_buffer_lookahead_source_valid | main_sdram_bankmachine3_cmd_buffer_source_valid); assign main_sdram_bankmachine3_row_hit = (main_sdram_bankmachine3_row == main_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:9]); assign main_sdram_bankmachine3_cmd_payload_ba = 2'd3; always @(*) begin main_sdram_bankmachine3_cmd_payload_a <= 13'd0; if (main_sdram_bankmachine3_row_col_n_addr_sel) begin main_sdram_bankmachine3_cmd_payload_a <= main_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:9]; end else begin main_sdram_bankmachine3_cmd_payload_a <= ((main_sdram_bankmachine3_auto_precharge <<< 4'd10) | {main_sdram_bankmachine3_cmd_buffer_source_payload_addr[8:0], {0{1'd0}}}); end end assign main_sdram_bankmachine3_twtpcon_valid = ((main_sdram_bankmachine3_cmd_valid & main_sdram_bankmachine3_cmd_ready) & main_sdram_bankmachine3_cmd_payload_is_write); assign main_sdram_bankmachine3_trccon_valid = ((main_sdram_bankmachine3_cmd_valid & main_sdram_bankmachine3_cmd_ready) & main_sdram_bankmachine3_row_open); assign main_sdram_bankmachine3_trascon_valid = ((main_sdram_bankmachine3_cmd_valid & main_sdram_bankmachine3_cmd_ready) & main_sdram_bankmachine3_row_open); always @(*) begin main_sdram_bankmachine3_auto_precharge <= 1'd0; if ((main_sdram_bankmachine3_cmd_buffer_lookahead_source_valid & main_sdram_bankmachine3_cmd_buffer_source_valid)) begin if ((main_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_addr[21:9] != main_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:9])) begin main_sdram_bankmachine3_auto_precharge <= (main_sdram_bankmachine3_row_close == 1'd0); end end end assign main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_din = {main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_last, main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_first, main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_addr, main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_we}; assign {main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_last, main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_first, main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_addr, main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_we} = main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_dout; assign main_sdram_bankmachine3_cmd_buffer_lookahead_sink_ready = main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable; assign main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we = main_sdram_bankmachine3_cmd_buffer_lookahead_sink_valid; assign main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_first = main_sdram_bankmachine3_cmd_buffer_lookahead_sink_first; assign main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_last = main_sdram_bankmachine3_cmd_buffer_lookahead_sink_last; assign main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_we = main_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_we; assign main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_addr = main_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_addr; assign main_sdram_bankmachine3_cmd_buffer_lookahead_source_valid = main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_readable; assign main_sdram_bankmachine3_cmd_buffer_lookahead_source_first = main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_first; assign main_sdram_bankmachine3_cmd_buffer_lookahead_source_last = main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_last; assign main_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_we = main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_we; assign main_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_addr = main_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_addr; assign main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_re = main_sdram_bankmachine3_cmd_buffer_lookahead_source_ready; always @(*) begin main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr <= 3'd0; if (main_sdram_bankmachine3_cmd_buffer_lookahead_replace) begin main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr <= (main_sdram_bankmachine3_cmd_buffer_lookahead_produce - 1'd1); end else begin main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr <= main_sdram_bankmachine3_cmd_buffer_lookahead_produce; end end assign main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_w = main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_din; assign main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_we = (main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we & (main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable | main_sdram_bankmachine3_cmd_buffer_lookahead_replace)); assign main_sdram_bankmachine3_cmd_buffer_lookahead_do_read = (main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_readable & main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_re); assign main_sdram_bankmachine3_cmd_buffer_lookahead_rdport_adr = main_sdram_bankmachine3_cmd_buffer_lookahead_consume; assign main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_dout = main_sdram_bankmachine3_cmd_buffer_lookahead_rdport_dat_r; assign main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable = (main_sdram_bankmachine3_cmd_buffer_lookahead_level != 4'd8); assign main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_readable = (main_sdram_bankmachine3_cmd_buffer_lookahead_level != 1'd0); assign main_sdram_bankmachine3_cmd_buffer_sink_ready = ((~main_sdram_bankmachine3_cmd_buffer_source_valid) | main_sdram_bankmachine3_cmd_buffer_source_ready); always @(*) begin main_sdram_bankmachine3_req_wdata_ready <= 1'd0; main_sdram_bankmachine3_req_rdata_valid <= 1'd0; builder_bankmachine3_next_state <= 3'd0; main_sdram_bankmachine3_refresh_gnt <= 1'd0; main_sdram_bankmachine3_cmd_valid <= 1'd0; main_sdram_bankmachine3_row_open <= 1'd0; main_sdram_bankmachine3_row_close <= 1'd0; main_sdram_bankmachine3_row_col_n_addr_sel <= 1'd0; main_sdram_bankmachine3_cmd_payload_cas <= 1'd0; main_sdram_bankmachine3_cmd_payload_ras <= 1'd0; main_sdram_bankmachine3_cmd_payload_we <= 1'd0; main_sdram_bankmachine3_cmd_payload_is_cmd <= 1'd0; main_sdram_bankmachine3_cmd_payload_is_read <= 1'd0; main_sdram_bankmachine3_cmd_payload_is_write <= 1'd0; builder_bankmachine3_next_state <= builder_bankmachine3_state; case (builder_bankmachine3_state) 1'd1: begin if ((main_sdram_bankmachine3_twtpcon_ready & main_sdram_bankmachine3_trascon_ready)) begin main_sdram_bankmachine3_cmd_valid <= 1'd1; if (main_sdram_bankmachine3_cmd_ready) begin builder_bankmachine3_next_state <= 2'd3; end main_sdram_bankmachine3_cmd_payload_ras <= 1'd1; main_sdram_bankmachine3_cmd_payload_we <= 1'd1; main_sdram_bankmachine3_cmd_payload_is_cmd <= 1'd1; end main_sdram_bankmachine3_row_close <= 1'd1; end 2'd2: begin if ((main_sdram_bankmachine3_twtpcon_ready & main_sdram_bankmachine3_trascon_ready)) begin builder_bankmachine3_next_state <= 2'd3; end main_sdram_bankmachine3_row_close <= 1'd1; end 2'd3: begin if (main_sdram_bankmachine3_trccon_ready) begin main_sdram_bankmachine3_row_col_n_addr_sel <= 1'd1; main_sdram_bankmachine3_row_open <= 1'd1; main_sdram_bankmachine3_cmd_valid <= 1'd1; main_sdram_bankmachine3_cmd_payload_is_cmd <= 1'd1; if (main_sdram_bankmachine3_cmd_ready) begin builder_bankmachine3_next_state <= 1'd0; end main_sdram_bankmachine3_cmd_payload_ras <= 1'd1; end end 3'd4: begin if (main_sdram_bankmachine3_twtpcon_ready) begin main_sdram_bankmachine3_refresh_gnt <= 1'd1; end main_sdram_bankmachine3_row_close <= 1'd1; main_sdram_bankmachine3_cmd_payload_is_cmd <= 1'd1; if ((~main_sdram_bankmachine3_refresh_req)) begin builder_bankmachine3_next_state <= 1'd0; end end default: begin if (main_sdram_bankmachine3_refresh_req) begin builder_bankmachine3_next_state <= 3'd4; end else begin if (main_sdram_bankmachine3_cmd_buffer_source_valid) begin if (main_sdram_bankmachine3_row_opened) begin if (main_sdram_bankmachine3_row_hit) begin main_sdram_bankmachine3_cmd_valid <= 1'd1; if (main_sdram_bankmachine3_cmd_buffer_source_payload_we) begin main_sdram_bankmachine3_req_wdata_ready <= main_sdram_bankmachine3_cmd_ready; main_sdram_bankmachine3_cmd_payload_is_write <= 1'd1; main_sdram_bankmachine3_cmd_payload_we <= 1'd1; end else begin main_sdram_bankmachine3_req_rdata_valid <= main_sdram_bankmachine3_cmd_ready; main_sdram_bankmachine3_cmd_payload_is_read <= 1'd1; end main_sdram_bankmachine3_cmd_payload_cas <= 1'd1; if ((main_sdram_bankmachine3_cmd_ready & main_sdram_bankmachine3_auto_precharge)) begin builder_bankmachine3_next_state <= 2'd2; end end else begin builder_bankmachine3_next_state <= 1'd1; end end else begin builder_bankmachine3_next_state <= 2'd3; end end end end endcase end assign main_sdram_choose_req_want_cmds = 1'd1; assign main_sdram_trrdcon_valid = ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & ((main_sdram_choose_req_cmd_payload_ras & (~main_sdram_choose_req_cmd_payload_cas)) & (~main_sdram_choose_req_cmd_payload_we))); assign main_sdram_tfawcon_valid = ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & ((main_sdram_choose_req_cmd_payload_ras & (~main_sdram_choose_req_cmd_payload_cas)) & (~main_sdram_choose_req_cmd_payload_we))); assign main_sdram_ras_allowed = (main_sdram_trrdcon_ready & main_sdram_tfawcon_ready); assign main_sdram_tccdcon_valid = ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & (main_sdram_choose_req_cmd_payload_is_write | main_sdram_choose_req_cmd_payload_is_read)); assign main_sdram_cas_allowed = main_sdram_tccdcon_ready; assign main_sdram_twtrcon_valid = ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_is_write); assign main_sdram_read_available = ((((main_sdram_bankmachine0_cmd_valid & main_sdram_bankmachine0_cmd_payload_is_read) | (main_sdram_bankmachine1_cmd_valid & main_sdram_bankmachine1_cmd_payload_is_read)) | (main_sdram_bankmachine2_cmd_valid & main_sdram_bankmachine2_cmd_payload_is_read)) | (main_sdram_bankmachine3_cmd_valid & main_sdram_bankmachine3_cmd_payload_is_read)); assign main_sdram_write_available = ((((main_sdram_bankmachine0_cmd_valid & main_sdram_bankmachine0_cmd_payload_is_write) | (main_sdram_bankmachine1_cmd_valid & main_sdram_bankmachine1_cmd_payload_is_write)) | (main_sdram_bankmachine2_cmd_valid & main_sdram_bankmachine2_cmd_payload_is_write)) | (main_sdram_bankmachine3_cmd_valid & main_sdram_bankmachine3_cmd_payload_is_write)); assign main_sdram_max_time0 = (main_sdram_time0 == 1'd0); assign main_sdram_max_time1 = (main_sdram_time1 == 1'd0); assign main_sdram_bankmachine0_refresh_req = main_sdram_cmd_valid; assign main_sdram_bankmachine1_refresh_req = main_sdram_cmd_valid; assign main_sdram_bankmachine2_refresh_req = main_sdram_cmd_valid; assign main_sdram_bankmachine3_refresh_req = main_sdram_cmd_valid; assign main_sdram_go_to_refresh = (((main_sdram_bankmachine0_refresh_gnt & main_sdram_bankmachine1_refresh_gnt) & main_sdram_bankmachine2_refresh_gnt) & main_sdram_bankmachine3_refresh_gnt); assign main_sdram_interface_rdata = {main_sdram_dfi_p0_rddata}; assign {main_sdram_dfi_p0_wrdata} = main_sdram_interface_wdata; assign {main_sdram_dfi_p0_wrdata_mask} = (~main_sdram_interface_wdata_we); always @(*) begin main_sdram_choose_cmd_valids <= 4'd0; main_sdram_choose_cmd_valids[0] <= (main_sdram_bankmachine0_cmd_valid & (((main_sdram_bankmachine0_cmd_payload_is_cmd & main_sdram_choose_cmd_want_cmds) & ((~((main_sdram_bankmachine0_cmd_payload_ras & (~main_sdram_bankmachine0_cmd_payload_cas)) & (~main_sdram_bankmachine0_cmd_payload_we))) | main_sdram_choose_cmd_want_activates)) | ((main_sdram_bankmachine0_cmd_payload_is_read == main_sdram_choose_cmd_want_reads) & (main_sdram_bankmachine0_cmd_payload_is_write == main_sdram_choose_cmd_want_writes)))); main_sdram_choose_cmd_valids[1] <= (main_sdram_bankmachine1_cmd_valid & (((main_sdram_bankmachine1_cmd_payload_is_cmd & main_sdram_choose_cmd_want_cmds) & ((~((main_sdram_bankmachine1_cmd_payload_ras & (~main_sdram_bankmachine1_cmd_payload_cas)) & (~main_sdram_bankmachine1_cmd_payload_we))) | main_sdram_choose_cmd_want_activates)) | ((main_sdram_bankmachine1_cmd_payload_is_read == main_sdram_choose_cmd_want_reads) & (main_sdram_bankmachine1_cmd_payload_is_write == main_sdram_choose_cmd_want_writes)))); main_sdram_choose_cmd_valids[2] <= (main_sdram_bankmachine2_cmd_valid & (((main_sdram_bankmachine2_cmd_payload_is_cmd & main_sdram_choose_cmd_want_cmds) & ((~((main_sdram_bankmachine2_cmd_payload_ras & (~main_sdram_bankmachine2_cmd_payload_cas)) & (~main_sdram_bankmachine2_cmd_payload_we))) | main_sdram_choose_cmd_want_activates)) | ((main_sdram_bankmachine2_cmd_payload_is_read == main_sdram_choose_cmd_want_reads) & (main_sdram_bankmachine2_cmd_payload_is_write == main_sdram_choose_cmd_want_writes)))); main_sdram_choose_cmd_valids[3] <= (main_sdram_bankmachine3_cmd_valid & (((main_sdram_bankmachine3_cmd_payload_is_cmd & main_sdram_choose_cmd_want_cmds) & ((~((main_sdram_bankmachine3_cmd_payload_ras & (~main_sdram_bankmachine3_cmd_payload_cas)) & (~main_sdram_bankmachine3_cmd_payload_we))) | main_sdram_choose_cmd_want_activates)) | ((main_sdram_bankmachine3_cmd_payload_is_read == main_sdram_choose_cmd_want_reads) & (main_sdram_bankmachine3_cmd_payload_is_write == main_sdram_choose_cmd_want_writes)))); end assign main_sdram_choose_cmd_request = main_sdram_choose_cmd_valids; assign main_sdram_choose_cmd_cmd_valid = builder_comb_rhs_array_muxed0; assign main_sdram_choose_cmd_cmd_payload_a = builder_comb_rhs_array_muxed1; assign main_sdram_choose_cmd_cmd_payload_ba = builder_comb_rhs_array_muxed2; assign main_sdram_choose_cmd_cmd_payload_is_read = builder_comb_rhs_array_muxed3; assign main_sdram_choose_cmd_cmd_payload_is_write = builder_comb_rhs_array_muxed4; assign main_sdram_choose_cmd_cmd_payload_is_cmd = builder_comb_rhs_array_muxed5; always @(*) begin main_sdram_choose_cmd_cmd_payload_cas <= 1'd0; if (main_sdram_choose_cmd_cmd_valid) begin main_sdram_choose_cmd_cmd_payload_cas <= builder_comb_t_array_muxed0; end end always @(*) begin main_sdram_choose_cmd_cmd_payload_ras <= 1'd0; if (main_sdram_choose_cmd_cmd_valid) begin main_sdram_choose_cmd_cmd_payload_ras <= builder_comb_t_array_muxed1; end end always @(*) begin main_sdram_choose_cmd_cmd_payload_we <= 1'd0; if (main_sdram_choose_cmd_cmd_valid) begin main_sdram_choose_cmd_cmd_payload_we <= builder_comb_t_array_muxed2; end end assign main_sdram_choose_cmd_ce = (main_sdram_choose_cmd_cmd_ready | (~main_sdram_choose_cmd_cmd_valid)); always @(*) begin main_sdram_choose_req_valids <= 4'd0; main_sdram_choose_req_valids[0] <= (main_sdram_bankmachine0_cmd_valid & (((main_sdram_bankmachine0_cmd_payload_is_cmd & main_sdram_choose_req_want_cmds) & ((~((main_sdram_bankmachine0_cmd_payload_ras & (~main_sdram_bankmachine0_cmd_payload_cas)) & (~main_sdram_bankmachine0_cmd_payload_we))) | main_sdram_choose_req_want_activates)) | ((main_sdram_bankmachine0_cmd_payload_is_read == main_sdram_choose_req_want_reads) & (main_sdram_bankmachine0_cmd_payload_is_write == main_sdram_choose_req_want_writes)))); main_sdram_choose_req_valids[1] <= (main_sdram_bankmachine1_cmd_valid & (((main_sdram_bankmachine1_cmd_payload_is_cmd & main_sdram_choose_req_want_cmds) & ((~((main_sdram_bankmachine1_cmd_payload_ras & (~main_sdram_bankmachine1_cmd_payload_cas)) & (~main_sdram_bankmachine1_cmd_payload_we))) | main_sdram_choose_req_want_activates)) | ((main_sdram_bankmachine1_cmd_payload_is_read == main_sdram_choose_req_want_reads) & (main_sdram_bankmachine1_cmd_payload_is_write == main_sdram_choose_req_want_writes)))); main_sdram_choose_req_valids[2] <= (main_sdram_bankmachine2_cmd_valid & (((main_sdram_bankmachine2_cmd_payload_is_cmd & main_sdram_choose_req_want_cmds) & ((~((main_sdram_bankmachine2_cmd_payload_ras & (~main_sdram_bankmachine2_cmd_payload_cas)) & (~main_sdram_bankmachine2_cmd_payload_we))) | main_sdram_choose_req_want_activates)) | ((main_sdram_bankmachine2_cmd_payload_is_read == main_sdram_choose_req_want_reads) & (main_sdram_bankmachine2_cmd_payload_is_write == main_sdram_choose_req_want_writes)))); main_sdram_choose_req_valids[3] <= (main_sdram_bankmachine3_cmd_valid & (((main_sdram_bankmachine3_cmd_payload_is_cmd & main_sdram_choose_req_want_cmds) & ((~((main_sdram_bankmachine3_cmd_payload_ras & (~main_sdram_bankmachine3_cmd_payload_cas)) & (~main_sdram_bankmachine3_cmd_payload_we))) | main_sdram_choose_req_want_activates)) | ((main_sdram_bankmachine3_cmd_payload_is_read == main_sdram_choose_req_want_reads) & (main_sdram_bankmachine3_cmd_payload_is_write == main_sdram_choose_req_want_writes)))); end assign main_sdram_choose_req_request = main_sdram_choose_req_valids; assign main_sdram_choose_req_cmd_valid = builder_comb_rhs_array_muxed6; assign main_sdram_choose_req_cmd_payload_a = builder_comb_rhs_array_muxed7; assign main_sdram_choose_req_cmd_payload_ba = builder_comb_rhs_array_muxed8; assign main_sdram_choose_req_cmd_payload_is_read = builder_comb_rhs_array_muxed9; assign main_sdram_choose_req_cmd_payload_is_write = builder_comb_rhs_array_muxed10; assign main_sdram_choose_req_cmd_payload_is_cmd = builder_comb_rhs_array_muxed11; always @(*) begin main_sdram_choose_req_cmd_payload_cas <= 1'd0; if (main_sdram_choose_req_cmd_valid) begin main_sdram_choose_req_cmd_payload_cas <= builder_comb_t_array_muxed3; end end always @(*) begin main_sdram_choose_req_cmd_payload_ras <= 1'd0; if (main_sdram_choose_req_cmd_valid) begin main_sdram_choose_req_cmd_payload_ras <= builder_comb_t_array_muxed4; end end always @(*) begin main_sdram_choose_req_cmd_payload_we <= 1'd0; if (main_sdram_choose_req_cmd_valid) begin main_sdram_choose_req_cmd_payload_we <= builder_comb_t_array_muxed5; end end always @(*) begin main_sdram_bankmachine0_cmd_ready <= 1'd0; if (((main_sdram_choose_cmd_cmd_valid & main_sdram_choose_cmd_cmd_ready) & (main_sdram_choose_cmd_grant == 1'd0))) begin main_sdram_bankmachine0_cmd_ready <= 1'd1; end if (((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & (main_sdram_choose_req_grant == 1'd0))) begin main_sdram_bankmachine0_cmd_ready <= 1'd1; end end always @(*) begin main_sdram_bankmachine1_cmd_ready <= 1'd0; if (((main_sdram_choose_cmd_cmd_valid & main_sdram_choose_cmd_cmd_ready) & (main_sdram_choose_cmd_grant == 1'd1))) begin main_sdram_bankmachine1_cmd_ready <= 1'd1; end if (((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & (main_sdram_choose_req_grant == 1'd1))) begin main_sdram_bankmachine1_cmd_ready <= 1'd1; end end always @(*) begin main_sdram_bankmachine2_cmd_ready <= 1'd0; if (((main_sdram_choose_cmd_cmd_valid & main_sdram_choose_cmd_cmd_ready) & (main_sdram_choose_cmd_grant == 2'd2))) begin main_sdram_bankmachine2_cmd_ready <= 1'd1; end if (((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & (main_sdram_choose_req_grant == 2'd2))) begin main_sdram_bankmachine2_cmd_ready <= 1'd1; end end always @(*) begin main_sdram_bankmachine3_cmd_ready <= 1'd0; if (((main_sdram_choose_cmd_cmd_valid & main_sdram_choose_cmd_cmd_ready) & (main_sdram_choose_cmd_grant == 2'd3))) begin main_sdram_bankmachine3_cmd_ready <= 1'd1; end if (((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & (main_sdram_choose_req_grant == 2'd3))) begin main_sdram_bankmachine3_cmd_ready <= 1'd1; end end assign main_sdram_choose_req_ce = (main_sdram_choose_req_cmd_ready | (~main_sdram_choose_req_cmd_valid)); assign main_sdram_dfi_p0_reset_n = 1'd1; assign main_sdram_dfi_p0_cke = {1{main_sdram_steerer0}}; assign main_sdram_dfi_p0_odt = {1{main_sdram_steerer1}}; always @(*) begin main_sdram_choose_req_want_activates <= 1'd0; main_sdram_choose_req_cmd_ready <= 1'd0; main_sdram_steerer_sel <= 2'd0; main_sdram_en1 <= 1'd0; main_sdram_en0 <= 1'd0; main_sdram_choose_req_want_reads <= 1'd0; main_sdram_choose_req_want_writes <= 1'd0; builder_multiplexer_next_state <= 3'd0; main_sdram_cmd_ready <= 1'd0; main_sdram_choose_req_want_activates <= main_sdram_ras_allowed; builder_multiplexer_next_state <= builder_multiplexer_state; case (builder_multiplexer_state) 1'd1: begin main_sdram_en1 <= 1'd1; main_sdram_choose_req_want_writes <= 1'd1; if (1'd1) begin main_sdram_choose_req_cmd_ready <= (main_sdram_cas_allowed & ((~((main_sdram_choose_req_cmd_payload_ras & (~main_sdram_choose_req_cmd_payload_cas)) & (~main_sdram_choose_req_cmd_payload_we))) | main_sdram_ras_allowed)); end else begin main_sdram_choose_req_want_activates <= main_sdram_ras_allowed; main_sdram_choose_req_cmd_ready <= ((~((main_sdram_choose_req_cmd_payload_ras & (~main_sdram_choose_req_cmd_payload_cas)) & (~main_sdram_choose_req_cmd_payload_we))) | main_sdram_ras_allowed); main_sdram_choose_req_cmd_ready <= main_sdram_cas_allowed; end main_sdram_steerer_sel <= 1'd0; if (1'd1) begin main_sdram_steerer_sel <= 2'd2; end if (1'd1) begin main_sdram_steerer_sel <= 1'd1; end if (main_sdram_read_available) begin if (((~main_sdram_write_available) | main_sdram_max_time1)) begin builder_multiplexer_next_state <= 2'd3; end end if (main_sdram_go_to_refresh) begin builder_multiplexer_next_state <= 2'd2; end end 2'd2: begin main_sdram_steerer_sel <= 2'd3; main_sdram_cmd_ready <= 1'd1; if (main_sdram_cmd_last) begin builder_multiplexer_next_state <= 1'd0; end end 2'd3: begin if (main_sdram_twtrcon_ready) begin builder_multiplexer_next_state <= 1'd0; end end 3'd4: begin builder_multiplexer_next_state <= 3'd5; end 3'd5: begin builder_multiplexer_next_state <= 1'd1; end default: begin main_sdram_en0 <= 1'd1; main_sdram_choose_req_want_reads <= 1'd1; if (1'd1) begin main_sdram_choose_req_cmd_ready <= (main_sdram_cas_allowed & ((~((main_sdram_choose_req_cmd_payload_ras & (~main_sdram_choose_req_cmd_payload_cas)) & (~main_sdram_choose_req_cmd_payload_we))) | main_sdram_ras_allowed)); end else begin main_sdram_choose_req_want_activates <= main_sdram_ras_allowed; main_sdram_choose_req_cmd_ready <= ((~((main_sdram_choose_req_cmd_payload_ras & (~main_sdram_choose_req_cmd_payload_cas)) & (~main_sdram_choose_req_cmd_payload_we))) | main_sdram_ras_allowed); main_sdram_choose_req_cmd_ready <= main_sdram_cas_allowed; end main_sdram_steerer_sel <= 1'd0; if (1'd1) begin main_sdram_steerer_sel <= 2'd2; end if (1'd1) begin main_sdram_steerer_sel <= 1'd1; end if (main_sdram_write_available) begin if (((~main_sdram_read_available) | main_sdram_max_time0)) begin builder_multiplexer_next_state <= 3'd4; end end if (main_sdram_go_to_refresh) begin builder_multiplexer_next_state <= 2'd2; end end endcase end assign builder_roundrobin0_request = {(((main_port_cmd_payload_addr[10:9] == 1'd0) & (~(((builder_locked0 | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0))))) & main_port_cmd_valid)}; assign builder_roundrobin0_ce = ((~main_sdram_interface_bank0_valid) & (~main_sdram_interface_bank0_lock)); assign main_sdram_interface_bank0_addr = builder_comb_rhs_array_muxed12; assign main_sdram_interface_bank0_we = builder_comb_rhs_array_muxed13; assign main_sdram_interface_bank0_valid = builder_comb_rhs_array_muxed14; assign builder_roundrobin1_request = {(((main_port_cmd_payload_addr[10:9] == 1'd1) & (~(((builder_locked1 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0))))) & main_port_cmd_valid)}; assign builder_roundrobin1_ce = ((~main_sdram_interface_bank1_valid) & (~main_sdram_interface_bank1_lock)); assign main_sdram_interface_bank1_addr = builder_comb_rhs_array_muxed15; assign main_sdram_interface_bank1_we = builder_comb_rhs_array_muxed16; assign main_sdram_interface_bank1_valid = builder_comb_rhs_array_muxed17; assign builder_roundrobin2_request = {(((main_port_cmd_payload_addr[10:9] == 2'd2) & (~(((builder_locked2 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0))))) & main_port_cmd_valid)}; assign builder_roundrobin2_ce = ((~main_sdram_interface_bank2_valid) & (~main_sdram_interface_bank2_lock)); assign main_sdram_interface_bank2_addr = builder_comb_rhs_array_muxed18; assign main_sdram_interface_bank2_we = builder_comb_rhs_array_muxed19; assign main_sdram_interface_bank2_valid = builder_comb_rhs_array_muxed20; assign builder_roundrobin3_request = {(((main_port_cmd_payload_addr[10:9] == 2'd3) & (~(((builder_locked3 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0))))) & main_port_cmd_valid)}; assign builder_roundrobin3_ce = ((~main_sdram_interface_bank3_valid) & (~main_sdram_interface_bank3_lock)); assign main_sdram_interface_bank3_addr = builder_comb_rhs_array_muxed21; assign main_sdram_interface_bank3_we = builder_comb_rhs_array_muxed22; assign main_sdram_interface_bank3_valid = builder_comb_rhs_array_muxed23; assign main_port_cmd_ready = ((((1'd0 | (((builder_roundrobin0_grant == 1'd0) & ((main_port_cmd_payload_addr[10:9] == 1'd0) & (~(((builder_locked0 | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0)))))) & main_sdram_interface_bank0_ready)) | (((builder_roundrobin1_grant == 1'd0) & ((main_port_cmd_payload_addr[10:9] == 1'd1) & (~(((builder_locked1 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0)))))) & main_sdram_interface_bank1_ready)) | (((builder_roundrobin2_grant == 1'd0) & ((main_port_cmd_payload_addr[10:9] == 2'd2) & (~(((builder_locked2 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0)))))) & main_sdram_interface_bank2_ready)) | (((builder_roundrobin3_grant == 1'd0) & ((main_port_cmd_payload_addr[10:9] == 2'd3) & (~(((builder_locked3 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0)))))) & main_sdram_interface_bank3_ready)); assign main_port_wdata_ready = builder_new_master_wdata_ready; assign main_port_rdata_valid = builder_new_master_rdata_valid3; always @(*) begin main_sdram_interface_wdata <= 16'd0; main_sdram_interface_wdata_we <= 2'd0; case ({builder_new_master_wdata_ready}) 1'd1: begin main_sdram_interface_wdata <= main_port_wdata_payload_data; main_sdram_interface_wdata_we <= main_port_wdata_payload_we; end default: begin main_sdram_interface_wdata <= 1'd0; main_sdram_interface_wdata_we <= 1'd0; end endcase end assign main_port_rdata_payload_data = main_sdram_interface_rdata; assign builder_roundrobin0_grant = 1'd0; assign builder_roundrobin1_grant = 1'd0; assign builder_roundrobin2_grant = 1'd0; assign builder_roundrobin3_grant = 1'd0; assign main_data_port_adr = main_wb_sdram_adr[10:2]; always @(*) begin main_data_port_we <= 16'd0; main_data_port_dat_w <= 128'd0; if (main_write_from_slave) begin main_data_port_dat_w <= main_interface_dat_r; main_data_port_we <= {16{1'd1}}; end else begin main_data_port_dat_w <= {4{main_wb_sdram_dat_w}}; if ((((main_wb_sdram_cyc & main_wb_sdram_stb) & main_wb_sdram_we) & main_wb_sdram_ack)) begin main_data_port_we <= {({4{(main_wb_sdram_adr[1:0] == 1'd0)}} & main_wb_sdram_sel), ({4{(main_wb_sdram_adr[1:0] == 1'd1)}} & main_wb_sdram_sel), ({4{(main_wb_sdram_adr[1:0] == 2'd2)}} & main_wb_sdram_sel), ({4{(main_wb_sdram_adr[1:0] == 2'd3)}} & main_wb_sdram_sel)}; end end end assign main_interface_dat_w = main_data_port_dat_r; assign main_interface_sel = 16'd65535; always @(*) begin main_wb_sdram_dat_r <= 32'd0; case (main_adr_offset_r) 1'd0: begin main_wb_sdram_dat_r <= main_data_port_dat_r[127:96]; end 1'd1: begin main_wb_sdram_dat_r <= main_data_port_dat_r[95:64]; end 2'd2: begin main_wb_sdram_dat_r <= main_data_port_dat_r[63:32]; end default: begin main_wb_sdram_dat_r <= main_data_port_dat_r[31:0]; end endcase end assign {main_tag_do_dirty, main_tag_do_tag} = main_tag_port_dat_r; assign main_tag_port_dat_w = {main_tag_di_dirty, main_tag_di_tag}; assign main_tag_port_adr = main_wb_sdram_adr[10:2]; assign main_tag_di_tag = main_wb_sdram_adr[29:11]; assign main_interface_adr = {main_tag_do_tag, main_wb_sdram_adr[10:2]}; always @(*) begin main_word_clr <= 1'd0; builder_fullmemorywe_next_state <= 2'd0; main_word_inc <= 1'd0; main_write_from_slave <= 1'd0; main_interface_cyc <= 1'd0; main_interface_stb <= 1'd0; main_tag_port_we <= 1'd0; main_interface_we <= 1'd0; main_wb_sdram_ack <= 1'd0; main_tag_di_dirty <= 1'd0; builder_fullmemorywe_next_state <= builder_fullmemorywe_state; case (builder_fullmemorywe_state) 1'd1: begin main_word_clr <= 1'd1; if ((main_tag_do_tag == main_wb_sdram_adr[29:11])) begin main_wb_sdram_ack <= 1'd1; if (main_wb_sdram_we) begin main_tag_di_dirty <= 1'd1; main_tag_port_we <= 1'd1; end builder_fullmemorywe_next_state <= 1'd0; end else begin if (main_tag_do_dirty) begin builder_fullmemorywe_next_state <= 2'd2; end else begin main_tag_port_we <= 1'd1; main_word_clr <= 1'd1; builder_fullmemorywe_next_state <= 2'd3; end end end 2'd2: begin main_interface_stb <= 1'd1; main_interface_cyc <= 1'd1; main_interface_we <= 1'd1; if (main_interface_ack) begin main_word_inc <= 1'd1; if (1'd1) begin main_tag_port_we <= 1'd1; main_word_clr <= 1'd1; builder_fullmemorywe_next_state <= 2'd3; end end end 2'd3: begin main_interface_stb <= 1'd1; main_interface_cyc <= 1'd1; main_interface_we <= 1'd0; if (main_interface_ack) begin main_write_from_slave <= 1'd1; main_word_inc <= 1'd1; if (1'd1) begin builder_fullmemorywe_next_state <= 1'd1; end else begin builder_fullmemorywe_next_state <= 2'd3; end end end default: begin if ((main_wb_sdram_cyc & main_wb_sdram_stb)) begin builder_fullmemorywe_next_state <= 1'd1; end end endcase end assign main_wishbone_bridge_cmd_payload_addr = (main_interface_adr - 27'd67108864); assign main_wishbone_bridge_cmd_payload_we = main_interface_we; assign main_wishbone_bridge_wdata_payload_data = main_interface_dat_w; assign main_wishbone_bridge_wdata_payload_we = main_interface_sel; assign main_interface_dat_r = main_wishbone_bridge_rdata_payload_data; assign main_wishbone_bridge_flush = (~main_interface_cyc); assign main_wishbone_bridge_cmd_last = (~main_interface_we); assign main_wishbone_bridge_cmd_valid = ((main_interface_cyc & main_interface_stb) & (~main_wishbone_bridge_cmd_consumed)); assign main_wishbone_bridge_wdata_valid = (((main_wishbone_bridge_cmd_valid | main_wishbone_bridge_cmd_consumed) & main_wishbone_bridge_cmd_payload_we) & (~main_wishbone_bridge_wdata_consumed)); assign main_wishbone_bridge_rdata_ready = ((main_wishbone_bridge_cmd_valid | main_wishbone_bridge_cmd_consumed) & (~main_wishbone_bridge_cmd_payload_we)); assign main_interface_ack = (main_wishbone_bridge_ack_cmd & ((main_interface_we & main_wishbone_bridge_ack_wdata) | ((~main_interface_we) & main_wishbone_bridge_ack_rdata))); assign main_wishbone_bridge_ack_cmd = ((main_wishbone_bridge_cmd_valid & main_wishbone_bridge_cmd_ready) | main_wishbone_bridge_cmd_consumed); assign main_wishbone_bridge_ack_wdata = ((main_wishbone_bridge_wdata_valid & main_wishbone_bridge_wdata_ready) | main_wishbone_bridge_wdata_consumed); assign main_wishbone_bridge_ack_rdata = (main_wishbone_bridge_rdata_valid & main_wishbone_bridge_rdata_ready); always @(*) begin main_wishbone_bridge_cmd_ready <= 1'd0; main_port_cmd_payload_we <= 1'd0; main_port_cmd_payload_addr <= 24'd0; builder_litedramwishbone2native_next_state <= 1'd0; main_wishbone_bridge_count_litedramwishbone2native_next_value <= 3'd0; main_port_cmd_valid <= 1'd0; main_wishbone_bridge_count_litedramwishbone2native_next_value_ce <= 1'd0; builder_litedramwishbone2native_next_state <= builder_litedramwishbone2native_state; case (builder_litedramwishbone2native_state) 1'd1: begin main_port_cmd_valid <= 1'd1; main_port_cmd_payload_we <= main_wishbone_bridge_cmd_payload_we; main_port_cmd_payload_addr <= ((main_wishbone_bridge_cmd_payload_addr * 4'd8) + main_wishbone_bridge_count); if (main_port_cmd_ready) begin main_wishbone_bridge_count_litedramwishbone2native_next_value <= (main_wishbone_bridge_count + 1'd1); main_wishbone_bridge_count_litedramwishbone2native_next_value_ce <= 1'd1; if ((main_wishbone_bridge_count == 3'd7)) begin main_wishbone_bridge_cmd_ready <= 1'd1; builder_litedramwishbone2native_next_state <= 1'd0; end end end default: begin main_wishbone_bridge_count_litedramwishbone2native_next_value <= 1'd0; main_wishbone_bridge_count_litedramwishbone2native_next_value_ce <= 1'd1; if (main_wishbone_bridge_cmd_valid) begin builder_litedramwishbone2native_next_state <= 1'd1; end end endcase end assign main_wishbone_bridge_wdata_converter_converter_sink_valid = main_wishbone_bridge_wdata_converter_sink_valid; assign main_wishbone_bridge_wdata_converter_converter_sink_first = main_wishbone_bridge_wdata_converter_sink_first; assign main_wishbone_bridge_wdata_converter_converter_sink_last = main_wishbone_bridge_wdata_converter_sink_last; assign main_wishbone_bridge_wdata_converter_sink_ready = main_wishbone_bridge_wdata_converter_converter_sink_ready; always @(*) begin main_wishbone_bridge_wdata_converter_converter_sink_payload_data <= 144'd0; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[15:0] <= main_wishbone_bridge_wdata_converter_sink_payload_data[15:0]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[17:16] <= main_wishbone_bridge_wdata_converter_sink_payload_we[1:0]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[33:18] <= main_wishbone_bridge_wdata_converter_sink_payload_data[31:16]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[35:34] <= main_wishbone_bridge_wdata_converter_sink_payload_we[3:2]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[51:36] <= main_wishbone_bridge_wdata_converter_sink_payload_data[47:32]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[53:52] <= main_wishbone_bridge_wdata_converter_sink_payload_we[5:4]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[69:54] <= main_wishbone_bridge_wdata_converter_sink_payload_data[63:48]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[71:70] <= main_wishbone_bridge_wdata_converter_sink_payload_we[7:6]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[87:72] <= main_wishbone_bridge_wdata_converter_sink_payload_data[79:64]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[89:88] <= main_wishbone_bridge_wdata_converter_sink_payload_we[9:8]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[105:90] <= main_wishbone_bridge_wdata_converter_sink_payload_data[95:80]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[107:106] <= main_wishbone_bridge_wdata_converter_sink_payload_we[11:10]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[123:108] <= main_wishbone_bridge_wdata_converter_sink_payload_data[111:96]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[125:124] <= main_wishbone_bridge_wdata_converter_sink_payload_we[13:12]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[141:126] <= main_wishbone_bridge_wdata_converter_sink_payload_data[127:112]; main_wishbone_bridge_wdata_converter_converter_sink_payload_data[143:142] <= main_wishbone_bridge_wdata_converter_sink_payload_we[15:14]; end assign main_wishbone_bridge_wdata_converter_source_valid = main_wishbone_bridge_wdata_converter_source_source_valid; assign main_wishbone_bridge_wdata_converter_source_first = main_wishbone_bridge_wdata_converter_source_source_first; assign main_wishbone_bridge_wdata_converter_source_last = main_wishbone_bridge_wdata_converter_source_source_last; assign main_wishbone_bridge_wdata_converter_source_source_ready = main_wishbone_bridge_wdata_converter_source_ready; assign {main_wishbone_bridge_wdata_converter_source_payload_we, main_wishbone_bridge_wdata_converter_source_payload_data} = main_wishbone_bridge_wdata_converter_source_source_payload_data; assign main_wishbone_bridge_wdata_converter_source_source_valid = main_wishbone_bridge_wdata_converter_converter_source_valid; assign main_wishbone_bridge_wdata_converter_converter_source_ready = main_wishbone_bridge_wdata_converter_source_source_ready; assign main_wishbone_bridge_wdata_converter_source_source_first = main_wishbone_bridge_wdata_converter_converter_source_first; assign main_wishbone_bridge_wdata_converter_source_source_last = main_wishbone_bridge_wdata_converter_converter_source_last; assign main_wishbone_bridge_wdata_converter_source_source_payload_data = main_wishbone_bridge_wdata_converter_converter_source_payload_data; assign main_wishbone_bridge_wdata_converter_converter_first = (main_wishbone_bridge_wdata_converter_converter_mux == 1'd0); assign main_wishbone_bridge_wdata_converter_converter_last = (main_wishbone_bridge_wdata_converter_converter_mux == 3'd7); assign main_wishbone_bridge_wdata_converter_converter_source_valid = main_wishbone_bridge_wdata_converter_converter_sink_valid; assign main_wishbone_bridge_wdata_converter_converter_source_first = (main_wishbone_bridge_wdata_converter_converter_sink_first & main_wishbone_bridge_wdata_converter_converter_first); assign main_wishbone_bridge_wdata_converter_converter_source_last = (main_wishbone_bridge_wdata_converter_converter_sink_last & main_wishbone_bridge_wdata_converter_converter_last); assign main_wishbone_bridge_wdata_converter_converter_sink_ready = (main_wishbone_bridge_wdata_converter_converter_last & main_wishbone_bridge_wdata_converter_converter_source_ready); always @(*) begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= 18'd0; case (main_wishbone_bridge_wdata_converter_converter_mux) 1'd0: begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= main_wishbone_bridge_wdata_converter_converter_sink_payload_data[17:0]; end 1'd1: begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= main_wishbone_bridge_wdata_converter_converter_sink_payload_data[35:18]; end 2'd2: begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= main_wishbone_bridge_wdata_converter_converter_sink_payload_data[53:36]; end 2'd3: begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= main_wishbone_bridge_wdata_converter_converter_sink_payload_data[71:54]; end 3'd4: begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= main_wishbone_bridge_wdata_converter_converter_sink_payload_data[89:72]; end 3'd5: begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= main_wishbone_bridge_wdata_converter_converter_sink_payload_data[107:90]; end 3'd6: begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= main_wishbone_bridge_wdata_converter_converter_sink_payload_data[125:108]; end default: begin main_wishbone_bridge_wdata_converter_converter_source_payload_data <= main_wishbone_bridge_wdata_converter_converter_sink_payload_data[143:126]; end endcase end assign main_wishbone_bridge_wdata_converter_converter_source_payload_valid_token_count = main_wishbone_bridge_wdata_converter_converter_last; assign main_wishbone_bridge_wdata_converter_sink_valid = main_wishbone_bridge_wdata_valid; assign main_wishbone_bridge_wdata_ready = main_wishbone_bridge_wdata_converter_sink_ready; assign main_wishbone_bridge_wdata_converter_sink_first = main_wishbone_bridge_wdata_first; assign main_wishbone_bridge_wdata_converter_sink_last = main_wishbone_bridge_wdata_last; assign main_wishbone_bridge_wdata_converter_sink_payload_data = main_wishbone_bridge_wdata_payload_data; assign main_wishbone_bridge_wdata_converter_sink_payload_we = main_wishbone_bridge_wdata_payload_we; assign main_port_wdata_valid = main_wishbone_bridge_wdata_converter_source_valid; assign main_wishbone_bridge_wdata_converter_source_ready = main_port_wdata_ready; assign main_port_wdata_first = main_wishbone_bridge_wdata_converter_source_first; assign main_port_wdata_last = main_wishbone_bridge_wdata_converter_source_last; assign main_port_wdata_payload_data = main_wishbone_bridge_wdata_converter_source_payload_data; assign main_port_wdata_payload_we = main_wishbone_bridge_wdata_converter_source_payload_we; assign main_wishbone_bridge_rdata_converter_converter_sink_valid = main_wishbone_bridge_rdata_converter_sink_valid; assign main_wishbone_bridge_rdata_converter_converter_sink_first = main_wishbone_bridge_rdata_converter_sink_first; assign main_wishbone_bridge_rdata_converter_converter_sink_last = main_wishbone_bridge_rdata_converter_sink_last; assign main_wishbone_bridge_rdata_converter_sink_ready = main_wishbone_bridge_rdata_converter_converter_sink_ready; assign main_wishbone_bridge_rdata_converter_converter_sink_payload_data = {main_wishbone_bridge_rdata_converter_sink_payload_data}; assign main_wishbone_bridge_rdata_converter_source_valid = main_wishbone_bridge_rdata_converter_source_source_valid; assign main_wishbone_bridge_rdata_converter_source_first = main_wishbone_bridge_rdata_converter_source_source_first; assign main_wishbone_bridge_rdata_converter_source_last = main_wishbone_bridge_rdata_converter_source_source_last; assign main_wishbone_bridge_rdata_converter_source_source_ready = main_wishbone_bridge_rdata_converter_source_ready; always @(*) begin main_wishbone_bridge_rdata_converter_source_payload_data <= 128'd0; main_wishbone_bridge_rdata_converter_source_payload_data[15:0] <= main_wishbone_bridge_rdata_converter_source_source_payload_data[15:0]; main_wishbone_bridge_rdata_converter_source_payload_data[31:16] <= main_wishbone_bridge_rdata_converter_source_source_payload_data[31:16]; main_wishbone_bridge_rdata_converter_source_payload_data[47:32] <= main_wishbone_bridge_rdata_converter_source_source_payload_data[47:32]; main_wishbone_bridge_rdata_converter_source_payload_data[63:48] <= main_wishbone_bridge_rdata_converter_source_source_payload_data[63:48]; main_wishbone_bridge_rdata_converter_source_payload_data[79:64] <= main_wishbone_bridge_rdata_converter_source_source_payload_data[79:64]; main_wishbone_bridge_rdata_converter_source_payload_data[95:80] <= main_wishbone_bridge_rdata_converter_source_source_payload_data[95:80]; main_wishbone_bridge_rdata_converter_source_payload_data[111:96] <= main_wishbone_bridge_rdata_converter_source_source_payload_data[111:96]; main_wishbone_bridge_rdata_converter_source_payload_data[127:112] <= main_wishbone_bridge_rdata_converter_source_source_payload_data[127:112]; end assign main_wishbone_bridge_rdata_converter_source_source_valid = main_wishbone_bridge_rdata_converter_converter_source_valid; assign main_wishbone_bridge_rdata_converter_converter_source_ready = main_wishbone_bridge_rdata_converter_source_source_ready; assign main_wishbone_bridge_rdata_converter_source_source_first = main_wishbone_bridge_rdata_converter_converter_source_first; assign main_wishbone_bridge_rdata_converter_source_source_last = main_wishbone_bridge_rdata_converter_converter_source_last; assign main_wishbone_bridge_rdata_converter_source_source_payload_data = main_wishbone_bridge_rdata_converter_converter_source_payload_data; assign main_wishbone_bridge_rdata_converter_converter_sink_ready = ((~main_wishbone_bridge_rdata_converter_converter_strobe_all) | main_wishbone_bridge_rdata_converter_converter_source_ready); assign main_wishbone_bridge_rdata_converter_converter_source_valid = main_wishbone_bridge_rdata_converter_converter_strobe_all; assign main_wishbone_bridge_rdata_converter_converter_load_part = (main_wishbone_bridge_rdata_converter_converter_sink_valid & main_wishbone_bridge_rdata_converter_converter_sink_ready); assign main_wishbone_bridge_rdata_converter_sink_valid = main_port_rdata_valid; assign main_port_rdata_ready = main_wishbone_bridge_rdata_converter_sink_ready; assign main_wishbone_bridge_rdata_converter_sink_first = main_port_rdata_first; assign main_wishbone_bridge_rdata_converter_sink_last = main_port_rdata_last; assign main_wishbone_bridge_rdata_converter_sink_payload_data = main_port_rdata_payload_data; assign main_wishbone_bridge_rdata_valid = main_wishbone_bridge_rdata_converter_source_valid; assign main_wishbone_bridge_rdata_converter_source_ready = main_wishbone_bridge_rdata_ready; assign main_wishbone_bridge_rdata_first = main_wishbone_bridge_rdata_converter_source_first; assign main_wishbone_bridge_rdata_last = main_wishbone_bridge_rdata_converter_source_last; assign main_wishbone_bridge_rdata_payload_data = main_wishbone_bridge_rdata_converter_source_payload_data; assign main_wait = (~main_done); always @(*) begin user_led0 <= 1'd0; user_led1 <= 1'd0; user_led2 <= 1'd0; user_led3 <= 1'd0; user_led4 <= 1'd0; user_led5 <= 1'd0; user_led6 <= 1'd0; user_led7 <= 1'd0; if ((main_mode == 1'd1)) begin {user_led7, user_led6, user_led5, user_led4, user_led3, user_led2, user_led1, user_led0} <= main_storage; end else begin {user_led7, user_led6, user_led5, user_led4, user_led3, user_led2, user_led1, user_led0} <= main_chaser; end end assign main_done = (main_count == 1'd0); assign soclinux_start0 = soclinux_start1; assign soclinux_length0 = soclinux_length1; assign soclinux_mosi = soclinux_mosi_storage; assign soclinux_done1 = soclinux_done0; assign soclinux_miso_status = soclinux_miso; assign soclinux_cs = soclinux_cs_storage; assign soclinux_loopback = soclinux_loopback_storage; assign soclinux_clk_rise = (soclinux_clk_divider1 == (soclinux_clk_divider0[15:1] - 1'd1)); assign soclinux_clk_fall = (soclinux_clk_divider1 == (soclinux_clk_divider0 - 1'd1)); assign soclinux_clk_divider0 = soclinux_storage; always @(*) begin soclinux_irq <= 1'd0; builder_spimaster_next_state <= 2'd0; soclinux_count_spimaster_next_value <= 3'd0; soclinux_count_spimaster_next_value_ce <= 1'd0; soclinux_clk_enable <= 1'd0; soclinux_cs_enable <= 1'd0; soclinux_done0 <= 1'd0; soclinux_mosi_latch <= 1'd0; soclinux_miso_latch <= 1'd0; builder_spimaster_next_state <= builder_spimaster_state; case (builder_spimaster_state) 1'd1: begin soclinux_count_spimaster_next_value <= 1'd0; soclinux_count_spimaster_next_value_ce <= 1'd1; if (soclinux_clk_fall) begin soclinux_cs_enable <= 1'd1; builder_spimaster_next_state <= 2'd2; end end 2'd2: begin soclinux_clk_enable <= 1'd1; soclinux_cs_enable <= 1'd1; if (soclinux_clk_fall) begin soclinux_count_spimaster_next_value <= (soclinux_count + 1'd1); soclinux_count_spimaster_next_value_ce <= 1'd1; if ((soclinux_count == (soclinux_length0 - 1'd1))) begin builder_spimaster_next_state <= 2'd3; end end end 2'd3: begin soclinux_cs_enable <= 1'd1; if (soclinux_clk_rise) begin soclinux_miso_latch <= 1'd1; soclinux_irq <= 1'd1; builder_spimaster_next_state <= 1'd0; end end default: begin soclinux_done0 <= 1'd1; if (soclinux_start0) begin soclinux_done0 <= 1'd0; soclinux_mosi_latch <= 1'd1; builder_spimaster_next_state <= 1'd1; end end endcase end always @(*) begin builder_next_state <= 2'd0; builder_soclinux_dat_w_next_value0 <= 8'd0; builder_soclinux_dat_w_next_value_ce0 <= 1'd0; builder_soclinux_wishbone_dat_r <= 32'd0; builder_soclinux_adr_next_value1 <= 14'd0; builder_soclinux_wishbone_ack <= 1'd0; builder_soclinux_adr_next_value_ce1 <= 1'd0; builder_soclinux_we_next_value2 <= 1'd0; builder_soclinux_we_next_value_ce2 <= 1'd0; builder_next_state <= builder_state; case (builder_state) 1'd1: begin builder_soclinux_adr_next_value1 <= 1'd0; builder_soclinux_adr_next_value_ce1 <= 1'd1; builder_soclinux_we_next_value2 <= 1'd0; builder_soclinux_we_next_value_ce2 <= 1'd1; builder_next_state <= 2'd2; end 2'd2: begin builder_soclinux_wishbone_ack <= 1'd1; builder_soclinux_wishbone_dat_r <= builder_soclinux_dat_r; builder_next_state <= 1'd0; end default: begin builder_soclinux_dat_w_next_value0 <= builder_soclinux_wishbone_dat_w; builder_soclinux_dat_w_next_value_ce0 <= 1'd1; if ((builder_soclinux_wishbone_cyc & builder_soclinux_wishbone_stb)) begin builder_soclinux_adr_next_value1 <= builder_soclinux_wishbone_adr; builder_soclinux_adr_next_value_ce1 <= 1'd1; builder_soclinux_we_next_value2 <= (builder_soclinux_wishbone_we & (builder_soclinux_wishbone_sel != 1'd0)); builder_soclinux_we_next_value_ce2 <= 1'd1; builder_next_state <= 1'd1; end end endcase end assign builder_shared_adr = builder_comb_rhs_array_muxed24; assign builder_shared_dat_w = builder_comb_rhs_array_muxed25; assign builder_shared_sel = builder_comb_rhs_array_muxed26; assign builder_shared_cyc = builder_comb_rhs_array_muxed27; assign builder_shared_stb = builder_comb_rhs_array_muxed28; assign builder_shared_we = builder_comb_rhs_array_muxed29; assign builder_shared_cti = builder_comb_rhs_array_muxed30; assign builder_shared_bte = builder_comb_rhs_array_muxed31; assign main_soclinux_cpu_ibus_dat_r = builder_shared_dat_r; assign main_soclinux_cpu_dbus_dat_r = builder_shared_dat_r; assign main_soclinux_cpu_ibus_ack = (builder_shared_ack & (builder_grant == 1'd0)); assign main_soclinux_cpu_dbus_ack = (builder_shared_ack & (builder_grant == 1'd1)); assign main_soclinux_cpu_ibus_err = (builder_shared_err & (builder_grant == 1'd0)); assign main_soclinux_cpu_dbus_err = (builder_shared_err & (builder_grant == 1'd1)); assign builder_request = {main_soclinux_cpu_dbus_cyc, main_soclinux_cpu_ibus_cyc}; always @(*) begin builder_slave_sel <= 4'd0; builder_slave_sel[0] <= (builder_shared_adr[29:14] == 1'd0); builder_slave_sel[1] <= (builder_shared_adr[29:11] == 16'd32768); builder_slave_sel[2] <= (builder_shared_adr[29:23] == 6'd32); builder_slave_sel[3] <= (builder_shared_adr[29:14] == 16'd61440); end assign main_soclinux_soclinux_ram_bus_adr = builder_shared_adr; assign main_soclinux_soclinux_ram_bus_dat_w = builder_shared_dat_w; assign main_soclinux_soclinux_ram_bus_sel = builder_shared_sel; assign main_soclinux_soclinux_ram_bus_stb = builder_shared_stb; assign main_soclinux_soclinux_ram_bus_we = builder_shared_we; assign main_soclinux_soclinux_ram_bus_cti = builder_shared_cti; assign main_soclinux_soclinux_ram_bus_bte = builder_shared_bte; assign main_soclinux_ram_bus_ram_bus_adr = builder_shared_adr; assign main_soclinux_ram_bus_ram_bus_dat_w = builder_shared_dat_w; assign main_soclinux_ram_bus_ram_bus_sel = builder_shared_sel; assign main_soclinux_ram_bus_ram_bus_stb = builder_shared_stb; assign main_soclinux_ram_bus_ram_bus_we = builder_shared_we; assign main_soclinux_ram_bus_ram_bus_cti = builder_shared_cti; assign main_soclinux_ram_bus_ram_bus_bte = builder_shared_bte; assign main_wb_sdram_adr = builder_shared_adr; assign main_wb_sdram_dat_w = builder_shared_dat_w; assign main_wb_sdram_sel = builder_shared_sel; assign main_wb_sdram_stb = builder_shared_stb; assign main_wb_sdram_we = builder_shared_we; assign main_wb_sdram_cti = builder_shared_cti; assign main_wb_sdram_bte = builder_shared_bte; assign builder_soclinux_wishbone_adr = builder_shared_adr; assign builder_soclinux_wishbone_dat_w = builder_shared_dat_w; assign builder_soclinux_wishbone_sel = builder_shared_sel; assign builder_soclinux_wishbone_stb = builder_shared_stb; assign builder_soclinux_wishbone_we = builder_shared_we; assign builder_soclinux_wishbone_cti = builder_shared_cti; assign builder_soclinux_wishbone_bte = builder_shared_bte; assign main_soclinux_soclinux_ram_bus_cyc = (builder_shared_cyc & builder_slave_sel[0]); assign main_soclinux_ram_bus_ram_bus_cyc = (builder_shared_cyc & builder_slave_sel[1]); assign main_wb_sdram_cyc = (builder_shared_cyc & builder_slave_sel[2]); assign builder_soclinux_wishbone_cyc = (builder_shared_cyc & builder_slave_sel[3]); assign builder_shared_err = (((main_soclinux_soclinux_ram_bus_err | main_soclinux_ram_bus_ram_bus_err) | main_wb_sdram_err) | builder_soclinux_wishbone_err); assign builder_wait = ((builder_shared_stb & builder_shared_cyc) & (~builder_shared_ack)); always @(*) begin builder_error <= 1'd0; builder_shared_ack <= 1'd0; builder_shared_dat_r <= 32'd0; builder_shared_ack <= (((main_soclinux_soclinux_ram_bus_ack | main_soclinux_ram_bus_ram_bus_ack) | main_wb_sdram_ack) | builder_soclinux_wishbone_ack); builder_shared_dat_r <= (((({32{builder_slave_sel_r[0]}} & main_soclinux_soclinux_ram_bus_dat_r) | ({32{builder_slave_sel_r[1]}} & main_soclinux_ram_bus_ram_bus_dat_r)) | ({32{builder_slave_sel_r[2]}} & main_wb_sdram_dat_r)) | ({32{builder_slave_sel_r[3]}} & builder_soclinux_wishbone_dat_r)); if (builder_done) begin builder_shared_dat_r <= 32'd4294967295; builder_shared_ack <= 1'd1; builder_error <= 1'd1; end end assign builder_done = (builder_count == 1'd0); assign builder_csr_bankarray_csrbank0_sel = (builder_csr_bankarray_interface0_bank_bus_adr[13:9] == 1'd1); assign main_soclinux_cpu_latch_r = builder_csr_bankarray_interface0_bank_bus_dat_w[0]; assign main_soclinux_cpu_latch_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 1'd0)); assign main_soclinux_cpu_latch_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 1'd0)); assign builder_csr_bankarray_csrbank0_timer_time7_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time7_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 1'd1)); assign builder_csr_bankarray_csrbank0_timer_time7_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 1'd1)); assign builder_csr_bankarray_csrbank0_timer_time6_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time6_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 2'd2)); assign builder_csr_bankarray_csrbank0_timer_time6_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 2'd2)); assign builder_csr_bankarray_csrbank0_timer_time5_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time5_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 2'd3)); assign builder_csr_bankarray_csrbank0_timer_time5_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 2'd3)); assign builder_csr_bankarray_csrbank0_timer_time4_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time4_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 3'd4)); assign builder_csr_bankarray_csrbank0_timer_time4_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 3'd4)); assign builder_csr_bankarray_csrbank0_timer_time3_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time3_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 3'd5)); assign builder_csr_bankarray_csrbank0_timer_time3_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 3'd5)); assign builder_csr_bankarray_csrbank0_timer_time2_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time2_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 3'd6)); assign builder_csr_bankarray_csrbank0_timer_time2_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 3'd6)); assign builder_csr_bankarray_csrbank0_timer_time1_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time1_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 3'd7)); assign builder_csr_bankarray_csrbank0_timer_time1_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 3'd7)); assign builder_csr_bankarray_csrbank0_timer_time0_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time0_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd8)); assign builder_csr_bankarray_csrbank0_timer_time0_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd8)); assign builder_csr_bankarray_csrbank0_timer_time_cmp7_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time_cmp7_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd9)); assign builder_csr_bankarray_csrbank0_timer_time_cmp7_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd9)); assign builder_csr_bankarray_csrbank0_timer_time_cmp6_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time_cmp6_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd10)); assign builder_csr_bankarray_csrbank0_timer_time_cmp6_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd10)); assign builder_csr_bankarray_csrbank0_timer_time_cmp5_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time_cmp5_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd11)); assign builder_csr_bankarray_csrbank0_timer_time_cmp5_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd11)); assign builder_csr_bankarray_csrbank0_timer_time_cmp4_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time_cmp4_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd12)); assign builder_csr_bankarray_csrbank0_timer_time_cmp4_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd12)); assign builder_csr_bankarray_csrbank0_timer_time_cmp3_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time_cmp3_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd13)); assign builder_csr_bankarray_csrbank0_timer_time_cmp3_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd13)); assign builder_csr_bankarray_csrbank0_timer_time_cmp2_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time_cmp2_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd14)); assign builder_csr_bankarray_csrbank0_timer_time_cmp2_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd14)); assign builder_csr_bankarray_csrbank0_timer_time_cmp1_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time_cmp1_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd15)); assign builder_csr_bankarray_csrbank0_timer_time_cmp1_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 4'd15)); assign builder_csr_bankarray_csrbank0_timer_time_cmp0_r = builder_csr_bankarray_interface0_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank0_timer_time_cmp0_re = ((builder_csr_bankarray_csrbank0_sel & builder_csr_bankarray_interface0_bank_bus_we) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 5'd16)); assign builder_csr_bankarray_csrbank0_timer_time_cmp0_we = ((builder_csr_bankarray_csrbank0_sel & (~builder_csr_bankarray_interface0_bank_bus_we)) & (builder_csr_bankarray_interface0_bank_bus_adr[4:0] == 5'd16)); assign builder_csr_bankarray_csrbank0_timer_time7_w = main_soclinux_cpu_time_status[63:56]; assign builder_csr_bankarray_csrbank0_timer_time6_w = main_soclinux_cpu_time_status[55:48]; assign builder_csr_bankarray_csrbank0_timer_time5_w = main_soclinux_cpu_time_status[47:40]; assign builder_csr_bankarray_csrbank0_timer_time4_w = main_soclinux_cpu_time_status[39:32]; assign builder_csr_bankarray_csrbank0_timer_time3_w = main_soclinux_cpu_time_status[31:24]; assign builder_csr_bankarray_csrbank0_timer_time2_w = main_soclinux_cpu_time_status[23:16]; assign builder_csr_bankarray_csrbank0_timer_time1_w = main_soclinux_cpu_time_status[15:8]; assign builder_csr_bankarray_csrbank0_timer_time0_w = main_soclinux_cpu_time_status[7:0]; assign main_soclinux_cpu_time_we = builder_csr_bankarray_csrbank0_timer_time0_we; assign main_soclinux_cpu_time_re = builder_csr_bankarray_csrbank0_timer_time0_re; assign builder_csr_bankarray_csrbank0_timer_time_cmp7_w = main_soclinux_cpu_time_cmp_storage[63:56]; assign builder_csr_bankarray_csrbank0_timer_time_cmp6_w = main_soclinux_cpu_time_cmp_storage[55:48]; assign builder_csr_bankarray_csrbank0_timer_time_cmp5_w = main_soclinux_cpu_time_cmp_storage[47:40]; assign builder_csr_bankarray_csrbank0_timer_time_cmp4_w = main_soclinux_cpu_time_cmp_storage[39:32]; assign builder_csr_bankarray_csrbank0_timer_time_cmp3_w = main_soclinux_cpu_time_cmp_storage[31:24]; assign builder_csr_bankarray_csrbank0_timer_time_cmp2_w = main_soclinux_cpu_time_cmp_storage[23:16]; assign builder_csr_bankarray_csrbank0_timer_time_cmp1_w = main_soclinux_cpu_time_cmp_storage[15:8]; assign builder_csr_bankarray_csrbank0_timer_time_cmp0_w = main_soclinux_cpu_time_cmp_storage[7:0]; assign builder_csr_bankarray_csrbank1_sel = (builder_csr_bankarray_interface1_bank_bus_adr[13:9] == 1'd0); assign builder_csr_bankarray_csrbank1_reset0_r = builder_csr_bankarray_interface1_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank1_reset0_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 1'd0)); assign builder_csr_bankarray_csrbank1_reset0_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 1'd0)); assign builder_csr_bankarray_csrbank1_scratch3_r = builder_csr_bankarray_interface1_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank1_scratch3_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 1'd1)); assign builder_csr_bankarray_csrbank1_scratch3_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 1'd1)); assign builder_csr_bankarray_csrbank1_scratch2_r = builder_csr_bankarray_interface1_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank1_scratch2_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 2'd2)); assign builder_csr_bankarray_csrbank1_scratch2_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 2'd2)); assign builder_csr_bankarray_csrbank1_scratch1_r = builder_csr_bankarray_interface1_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank1_scratch1_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 2'd3)); assign builder_csr_bankarray_csrbank1_scratch1_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 2'd3)); assign builder_csr_bankarray_csrbank1_scratch0_r = builder_csr_bankarray_interface1_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank1_scratch0_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 3'd4)); assign builder_csr_bankarray_csrbank1_scratch0_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 3'd4)); assign builder_csr_bankarray_csrbank1_bus_errors3_r = builder_csr_bankarray_interface1_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank1_bus_errors3_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 3'd5)); assign builder_csr_bankarray_csrbank1_bus_errors3_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 3'd5)); assign builder_csr_bankarray_csrbank1_bus_errors2_r = builder_csr_bankarray_interface1_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank1_bus_errors2_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 3'd6)); assign builder_csr_bankarray_csrbank1_bus_errors2_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 3'd6)); assign builder_csr_bankarray_csrbank1_bus_errors1_r = builder_csr_bankarray_interface1_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank1_bus_errors1_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 3'd7)); assign builder_csr_bankarray_csrbank1_bus_errors1_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 3'd7)); assign builder_csr_bankarray_csrbank1_bus_errors0_r = builder_csr_bankarray_interface1_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank1_bus_errors0_re = ((builder_csr_bankarray_csrbank1_sel & builder_csr_bankarray_interface1_bank_bus_we) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 4'd8)); assign builder_csr_bankarray_csrbank1_bus_errors0_we = ((builder_csr_bankarray_csrbank1_sel & (~builder_csr_bankarray_interface1_bank_bus_we)) & (builder_csr_bankarray_interface1_bank_bus_adr[3:0] == 4'd8)); assign builder_csr_bankarray_csrbank1_reset0_w = main_soclinux_soccontroller_reset_storage; assign builder_csr_bankarray_csrbank1_scratch3_w = main_soclinux_soccontroller_scratch_storage[31:24]; assign builder_csr_bankarray_csrbank1_scratch2_w = main_soclinux_soccontroller_scratch_storage[23:16]; assign builder_csr_bankarray_csrbank1_scratch1_w = main_soclinux_soccontroller_scratch_storage[15:8]; assign builder_csr_bankarray_csrbank1_scratch0_w = main_soclinux_soccontroller_scratch_storage[7:0]; assign builder_csr_bankarray_csrbank1_bus_errors3_w = main_soclinux_soccontroller_bus_errors_status[31:24]; assign builder_csr_bankarray_csrbank1_bus_errors2_w = main_soclinux_soccontroller_bus_errors_status[23:16]; assign builder_csr_bankarray_csrbank1_bus_errors1_w = main_soclinux_soccontroller_bus_errors_status[15:8]; assign builder_csr_bankarray_csrbank1_bus_errors0_w = main_soclinux_soccontroller_bus_errors_status[7:0]; assign main_soclinux_soccontroller_bus_errors_we = builder_csr_bankarray_csrbank1_bus_errors0_we; assign main_soclinux_soccontroller_bus_errors_re = builder_csr_bankarray_csrbank1_bus_errors0_re; assign builder_csr_bankarray_sel = (builder_csr_bankarray_sram_bus_adr[13:9] == 3'd4); always @(*) begin builder_csr_bankarray_sram_bus_dat_r <= 8'd0; if (builder_csr_bankarray_sel_r) begin builder_csr_bankarray_sram_bus_dat_r <= builder_csr_bankarray_dat_r; end end assign builder_csr_bankarray_adr = builder_csr_bankarray_sram_bus_adr[5:0]; assign builder_csr_bankarray_csrbank2_sel = (builder_csr_bankarray_interface2_bank_bus_adr[13:9] == 3'd7); assign builder_csr_bankarray_csrbank2_out0_r = builder_csr_bankarray_interface2_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank2_out0_re = ((builder_csr_bankarray_csrbank2_sel & builder_csr_bankarray_interface2_bank_bus_we) & (builder_csr_bankarray_interface2_bank_bus_adr[0] == 1'd0)); assign builder_csr_bankarray_csrbank2_out0_we = ((builder_csr_bankarray_csrbank2_sel & (~builder_csr_bankarray_interface2_bank_bus_we)) & (builder_csr_bankarray_interface2_bank_bus_adr[0] == 1'd0)); assign builder_csr_bankarray_csrbank2_out0_w = main_storage[7:0]; assign builder_csr_bankarray_csrbank3_sel = (builder_csr_bankarray_interface3_bank_bus_adr[13:9] == 3'd6); assign builder_csr_bankarray_csrbank3_dfii_control0_r = builder_csr_bankarray_interface3_bank_bus_dat_w[3:0]; assign builder_csr_bankarray_csrbank3_dfii_control0_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 1'd0)); assign builder_csr_bankarray_csrbank3_dfii_control0_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 1'd0)); assign builder_csr_bankarray_csrbank3_dfii_pi0_command0_r = builder_csr_bankarray_interface3_bank_bus_dat_w[5:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_command0_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 1'd1)); assign builder_csr_bankarray_csrbank3_dfii_pi0_command0_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 1'd1)); assign main_sdram_command_issue_r = builder_csr_bankarray_interface3_bank_bus_dat_w[0]; assign main_sdram_command_issue_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 2'd2)); assign main_sdram_command_issue_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 2'd2)); assign builder_csr_bankarray_csrbank3_dfii_pi0_address1_r = builder_csr_bankarray_interface3_bank_bus_dat_w[4:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_address1_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 2'd3)); assign builder_csr_bankarray_csrbank3_dfii_pi0_address1_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 2'd3)); assign builder_csr_bankarray_csrbank3_dfii_pi0_address0_r = builder_csr_bankarray_interface3_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_address0_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 3'd4)); assign builder_csr_bankarray_csrbank3_dfii_pi0_address0_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 3'd4)); assign builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_r = builder_csr_bankarray_interface3_bank_bus_dat_w[1:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 3'd5)); assign builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 3'd5)); assign builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_r = builder_csr_bankarray_interface3_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 3'd6)); assign builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 3'd6)); assign builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_r = builder_csr_bankarray_interface3_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 3'd7)); assign builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 3'd7)); assign builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_r = builder_csr_bankarray_interface3_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 4'd8)); assign builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 4'd8)); assign builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_r = builder_csr_bankarray_interface3_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_re = ((builder_csr_bankarray_csrbank3_sel & builder_csr_bankarray_interface3_bank_bus_we) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 4'd9)); assign builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_we = ((builder_csr_bankarray_csrbank3_sel & (~builder_csr_bankarray_interface3_bank_bus_we)) & (builder_csr_bankarray_interface3_bank_bus_adr[3:0] == 4'd9)); assign main_sdram_sel = main_sdram_storage[0]; assign main_sdram_cke1 = main_sdram_storage[1]; assign main_sdram_odt = main_sdram_storage[2]; assign main_sdram_reset_n = main_sdram_storage[3]; assign builder_csr_bankarray_csrbank3_dfii_control0_w = main_sdram_storage[3:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_command0_w = main_sdram_command_storage[5:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_address1_w = main_sdram_address_storage[12:8]; assign builder_csr_bankarray_csrbank3_dfii_pi0_address0_w = main_sdram_address_storage[7:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_w = main_sdram_baddress_storage[1:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_w = main_sdram_wrdata_storage[15:8]; assign builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_w = main_sdram_wrdata_storage[7:0]; assign builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_w = main_sdram_rddata_status[15:8]; assign builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_w = main_sdram_rddata_status[7:0]; assign main_sdram_rddata_we = builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_we; assign main_sdram_rddata_re = builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_re; assign builder_csr_bankarray_csrbank4_sel = (builder_csr_bankarray_interface4_bank_bus_adr[13:9] == 4'd8); assign builder_csr_bankarray_csrbank4_control1_r = builder_csr_bankarray_interface4_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank4_control1_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 1'd0)); assign builder_csr_bankarray_csrbank4_control1_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 1'd0)); assign builder_csr_bankarray_csrbank4_control0_r = builder_csr_bankarray_interface4_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank4_control0_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 1'd1)); assign builder_csr_bankarray_csrbank4_control0_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 1'd1)); assign builder_csr_bankarray_csrbank4_status_r = builder_csr_bankarray_interface4_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank4_status_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 2'd2)); assign builder_csr_bankarray_csrbank4_status_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 2'd2)); assign builder_csr_bankarray_csrbank4_mosi0_r = builder_csr_bankarray_interface4_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank4_mosi0_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 2'd3)); assign builder_csr_bankarray_csrbank4_mosi0_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 2'd3)); assign builder_csr_bankarray_csrbank4_miso_r = builder_csr_bankarray_interface4_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank4_miso_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 3'd4)); assign builder_csr_bankarray_csrbank4_miso_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 3'd4)); assign builder_csr_bankarray_csrbank4_cs0_r = builder_csr_bankarray_interface4_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank4_cs0_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 3'd5)); assign builder_csr_bankarray_csrbank4_cs0_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 3'd5)); assign builder_csr_bankarray_csrbank4_loopback0_r = builder_csr_bankarray_interface4_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank4_loopback0_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 3'd6)); assign builder_csr_bankarray_csrbank4_loopback0_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 3'd6)); assign builder_csr_bankarray_csrbank4_clk_divider1_r = builder_csr_bankarray_interface4_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank4_clk_divider1_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 3'd7)); assign builder_csr_bankarray_csrbank4_clk_divider1_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 3'd7)); assign builder_csr_bankarray_csrbank4_clk_divider0_r = builder_csr_bankarray_interface4_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank4_clk_divider0_re = ((builder_csr_bankarray_csrbank4_sel & builder_csr_bankarray_interface4_bank_bus_we) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 4'd8)); assign builder_csr_bankarray_csrbank4_clk_divider0_we = ((builder_csr_bankarray_csrbank4_sel & (~builder_csr_bankarray_interface4_bank_bus_we)) & (builder_csr_bankarray_interface4_bank_bus_adr[3:0] == 4'd8)); always @(*) begin soclinux_start1 <= 1'd0; if (soclinux_control_re) begin soclinux_start1 <= soclinux_control_storage[0]; end end assign soclinux_length1 = soclinux_control_storage[15:8]; assign builder_csr_bankarray_csrbank4_control1_w = soclinux_control_storage[15:8]; assign builder_csr_bankarray_csrbank4_control0_w = soclinux_control_storage[7:0]; assign soclinux_status_status = soclinux_done1; assign builder_csr_bankarray_csrbank4_status_w = soclinux_status_status; assign soclinux_status_we = builder_csr_bankarray_csrbank4_status_we; assign soclinux_status_re = builder_csr_bankarray_csrbank4_status_re; assign builder_csr_bankarray_csrbank4_mosi0_w = soclinux_mosi_storage[7:0]; assign builder_csr_bankarray_csrbank4_miso_w = soclinux_miso_status[7:0]; assign soclinux_miso_we = builder_csr_bankarray_csrbank4_miso_we; assign soclinux_miso_re = builder_csr_bankarray_csrbank4_miso_re; assign soclinux_sel = soclinux_cs_storage; assign builder_csr_bankarray_csrbank4_cs0_w = soclinux_cs_storage; assign builder_csr_bankarray_csrbank4_loopback0_w = soclinux_loopback_storage; assign builder_csr_bankarray_csrbank4_clk_divider1_w = soclinux_storage[15:8]; assign builder_csr_bankarray_csrbank4_clk_divider0_w = soclinux_storage[7:0]; assign builder_csr_bankarray_csrbank5_sel = (builder_csr_bankarray_interface5_bank_bus_adr[13:9] == 2'd3); assign builder_csr_bankarray_csrbank5_load3_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_load3_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 1'd0)); assign builder_csr_bankarray_csrbank5_load3_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 1'd0)); assign builder_csr_bankarray_csrbank5_load2_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_load2_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 1'd1)); assign builder_csr_bankarray_csrbank5_load2_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 1'd1)); assign builder_csr_bankarray_csrbank5_load1_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_load1_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 2'd2)); assign builder_csr_bankarray_csrbank5_load1_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 2'd2)); assign builder_csr_bankarray_csrbank5_load0_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_load0_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 2'd3)); assign builder_csr_bankarray_csrbank5_load0_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 2'd3)); assign builder_csr_bankarray_csrbank5_reload3_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_reload3_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 3'd4)); assign builder_csr_bankarray_csrbank5_reload3_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 3'd4)); assign builder_csr_bankarray_csrbank5_reload2_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_reload2_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 3'd5)); assign builder_csr_bankarray_csrbank5_reload2_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 3'd5)); assign builder_csr_bankarray_csrbank5_reload1_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_reload1_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 3'd6)); assign builder_csr_bankarray_csrbank5_reload1_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 3'd6)); assign builder_csr_bankarray_csrbank5_reload0_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_reload0_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 3'd7)); assign builder_csr_bankarray_csrbank5_reload0_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 3'd7)); assign builder_csr_bankarray_csrbank5_en0_r = builder_csr_bankarray_interface5_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank5_en0_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd8)); assign builder_csr_bankarray_csrbank5_en0_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd8)); assign builder_csr_bankarray_csrbank5_update_value0_r = builder_csr_bankarray_interface5_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank5_update_value0_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd9)); assign builder_csr_bankarray_csrbank5_update_value0_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd9)); assign builder_csr_bankarray_csrbank5_value3_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_value3_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd10)); assign builder_csr_bankarray_csrbank5_value3_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd10)); assign builder_csr_bankarray_csrbank5_value2_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_value2_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd11)); assign builder_csr_bankarray_csrbank5_value2_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd11)); assign builder_csr_bankarray_csrbank5_value1_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_value1_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd12)); assign builder_csr_bankarray_csrbank5_value1_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd12)); assign builder_csr_bankarray_csrbank5_value0_r = builder_csr_bankarray_interface5_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank5_value0_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd13)); assign builder_csr_bankarray_csrbank5_value0_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd13)); assign main_soclinux_timer_eventmanager_status_r = builder_csr_bankarray_interface5_bank_bus_dat_w[0]; assign main_soclinux_timer_eventmanager_status_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd14)); assign main_soclinux_timer_eventmanager_status_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd14)); assign main_soclinux_timer_eventmanager_pending_r = builder_csr_bankarray_interface5_bank_bus_dat_w[0]; assign main_soclinux_timer_eventmanager_pending_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd15)); assign main_soclinux_timer_eventmanager_pending_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 4'd15)); assign builder_csr_bankarray_csrbank5_ev_enable0_r = builder_csr_bankarray_interface5_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank5_ev_enable0_re = ((builder_csr_bankarray_csrbank5_sel & builder_csr_bankarray_interface5_bank_bus_we) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 5'd16)); assign builder_csr_bankarray_csrbank5_ev_enable0_we = ((builder_csr_bankarray_csrbank5_sel & (~builder_csr_bankarray_interface5_bank_bus_we)) & (builder_csr_bankarray_interface5_bank_bus_adr[4:0] == 5'd16)); assign builder_csr_bankarray_csrbank5_load3_w = main_soclinux_timer_load_storage[31:24]; assign builder_csr_bankarray_csrbank5_load2_w = main_soclinux_timer_load_storage[23:16]; assign builder_csr_bankarray_csrbank5_load1_w = main_soclinux_timer_load_storage[15:8]; assign builder_csr_bankarray_csrbank5_load0_w = main_soclinux_timer_load_storage[7:0]; assign builder_csr_bankarray_csrbank5_reload3_w = main_soclinux_timer_reload_storage[31:24]; assign builder_csr_bankarray_csrbank5_reload2_w = main_soclinux_timer_reload_storage[23:16]; assign builder_csr_bankarray_csrbank5_reload1_w = main_soclinux_timer_reload_storage[15:8]; assign builder_csr_bankarray_csrbank5_reload0_w = main_soclinux_timer_reload_storage[7:0]; assign builder_csr_bankarray_csrbank5_en0_w = main_soclinux_timer_en_storage; assign builder_csr_bankarray_csrbank5_update_value0_w = main_soclinux_timer_update_value_storage; assign builder_csr_bankarray_csrbank5_value3_w = main_soclinux_timer_value_status[31:24]; assign builder_csr_bankarray_csrbank5_value2_w = main_soclinux_timer_value_status[23:16]; assign builder_csr_bankarray_csrbank5_value1_w = main_soclinux_timer_value_status[15:8]; assign builder_csr_bankarray_csrbank5_value0_w = main_soclinux_timer_value_status[7:0]; assign main_soclinux_timer_value_we = builder_csr_bankarray_csrbank5_value0_we; assign main_soclinux_timer_value_re = builder_csr_bankarray_csrbank5_value0_re; assign builder_csr_bankarray_csrbank5_ev_enable0_w = main_soclinux_timer_eventmanager_storage; assign builder_csr_bankarray_csrbank6_sel = (builder_csr_bankarray_interface6_bank_bus_adr[13:9] == 2'd2); assign main_soclinux_uart_rxtx_r = builder_csr_bankarray_interface6_bank_bus_dat_w[7:0]; assign main_soclinux_uart_rxtx_re = ((builder_csr_bankarray_csrbank6_sel & builder_csr_bankarray_interface6_bank_bus_we) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 1'd0)); assign main_soclinux_uart_rxtx_we = ((builder_csr_bankarray_csrbank6_sel & (~builder_csr_bankarray_interface6_bank_bus_we)) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 1'd0)); assign builder_csr_bankarray_csrbank6_txfull_r = builder_csr_bankarray_interface6_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank6_txfull_re = ((builder_csr_bankarray_csrbank6_sel & builder_csr_bankarray_interface6_bank_bus_we) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 1'd1)); assign builder_csr_bankarray_csrbank6_txfull_we = ((builder_csr_bankarray_csrbank6_sel & (~builder_csr_bankarray_interface6_bank_bus_we)) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 1'd1)); assign builder_csr_bankarray_csrbank6_rxempty_r = builder_csr_bankarray_interface6_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank6_rxempty_re = ((builder_csr_bankarray_csrbank6_sel & builder_csr_bankarray_interface6_bank_bus_we) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 2'd2)); assign builder_csr_bankarray_csrbank6_rxempty_we = ((builder_csr_bankarray_csrbank6_sel & (~builder_csr_bankarray_interface6_bank_bus_we)) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 2'd2)); assign main_soclinux_uart_eventmanager_status_r = builder_csr_bankarray_interface6_bank_bus_dat_w[1:0]; assign main_soclinux_uart_eventmanager_status_re = ((builder_csr_bankarray_csrbank6_sel & builder_csr_bankarray_interface6_bank_bus_we) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 2'd3)); assign main_soclinux_uart_eventmanager_status_we = ((builder_csr_bankarray_csrbank6_sel & (~builder_csr_bankarray_interface6_bank_bus_we)) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 2'd3)); assign main_soclinux_uart_eventmanager_pending_r = builder_csr_bankarray_interface6_bank_bus_dat_w[1:0]; assign main_soclinux_uart_eventmanager_pending_re = ((builder_csr_bankarray_csrbank6_sel & builder_csr_bankarray_interface6_bank_bus_we) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 3'd4)); assign main_soclinux_uart_eventmanager_pending_we = ((builder_csr_bankarray_csrbank6_sel & (~builder_csr_bankarray_interface6_bank_bus_we)) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 3'd4)); assign builder_csr_bankarray_csrbank6_ev_enable0_r = builder_csr_bankarray_interface6_bank_bus_dat_w[1:0]; assign builder_csr_bankarray_csrbank6_ev_enable0_re = ((builder_csr_bankarray_csrbank6_sel & builder_csr_bankarray_interface6_bank_bus_we) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 3'd5)); assign builder_csr_bankarray_csrbank6_ev_enable0_we = ((builder_csr_bankarray_csrbank6_sel & (~builder_csr_bankarray_interface6_bank_bus_we)) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 3'd5)); assign builder_csr_bankarray_csrbank6_txempty_r = builder_csr_bankarray_interface6_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank6_txempty_re = ((builder_csr_bankarray_csrbank6_sel & builder_csr_bankarray_interface6_bank_bus_we) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 3'd6)); assign builder_csr_bankarray_csrbank6_txempty_we = ((builder_csr_bankarray_csrbank6_sel & (~builder_csr_bankarray_interface6_bank_bus_we)) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 3'd6)); assign builder_csr_bankarray_csrbank6_rxfull_r = builder_csr_bankarray_interface6_bank_bus_dat_w[0]; assign builder_csr_bankarray_csrbank6_rxfull_re = ((builder_csr_bankarray_csrbank6_sel & builder_csr_bankarray_interface6_bank_bus_we) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 3'd7)); assign builder_csr_bankarray_csrbank6_rxfull_we = ((builder_csr_bankarray_csrbank6_sel & (~builder_csr_bankarray_interface6_bank_bus_we)) & (builder_csr_bankarray_interface6_bank_bus_adr[2:0] == 3'd7)); assign builder_csr_bankarray_csrbank6_txfull_w = main_soclinux_uart_txfull_status; assign main_soclinux_uart_txfull_we = builder_csr_bankarray_csrbank6_txfull_we; assign main_soclinux_uart_txfull_re = builder_csr_bankarray_csrbank6_txfull_re; assign builder_csr_bankarray_csrbank6_rxempty_w = main_soclinux_uart_rxempty_status; assign main_soclinux_uart_rxempty_we = builder_csr_bankarray_csrbank6_rxempty_we; assign main_soclinux_uart_rxempty_re = builder_csr_bankarray_csrbank6_rxempty_re; assign builder_csr_bankarray_csrbank6_ev_enable0_w = main_soclinux_uart_eventmanager_storage[1:0]; assign builder_csr_bankarray_csrbank6_txempty_w = main_soclinux_uart_txempty_status; assign main_soclinux_uart_txempty_we = builder_csr_bankarray_csrbank6_txempty_we; assign main_soclinux_uart_txempty_re = builder_csr_bankarray_csrbank6_txempty_re; assign builder_csr_bankarray_csrbank6_rxfull_w = main_soclinux_uart_rxfull_status; assign main_soclinux_uart_rxfull_we = builder_csr_bankarray_csrbank6_rxfull_we; assign main_soclinux_uart_rxfull_re = builder_csr_bankarray_csrbank6_rxfull_re; assign builder_csr_bankarray_csrbank7_sel = (builder_csr_bankarray_interface7_bank_bus_adr[13:9] == 3'd5); assign builder_csr_bankarray_csrbank7_tuning_word3_r = builder_csr_bankarray_interface7_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank7_tuning_word3_re = ((builder_csr_bankarray_csrbank7_sel & builder_csr_bankarray_interface7_bank_bus_we) & (builder_csr_bankarray_interface7_bank_bus_adr[1:0] == 1'd0)); assign builder_csr_bankarray_csrbank7_tuning_word3_we = ((builder_csr_bankarray_csrbank7_sel & (~builder_csr_bankarray_interface7_bank_bus_we)) & (builder_csr_bankarray_interface7_bank_bus_adr[1:0] == 1'd0)); assign builder_csr_bankarray_csrbank7_tuning_word2_r = builder_csr_bankarray_interface7_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank7_tuning_word2_re = ((builder_csr_bankarray_csrbank7_sel & builder_csr_bankarray_interface7_bank_bus_we) & (builder_csr_bankarray_interface7_bank_bus_adr[1:0] == 1'd1)); assign builder_csr_bankarray_csrbank7_tuning_word2_we = ((builder_csr_bankarray_csrbank7_sel & (~builder_csr_bankarray_interface7_bank_bus_we)) & (builder_csr_bankarray_interface7_bank_bus_adr[1:0] == 1'd1)); assign builder_csr_bankarray_csrbank7_tuning_word1_r = builder_csr_bankarray_interface7_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank7_tuning_word1_re = ((builder_csr_bankarray_csrbank7_sel & builder_csr_bankarray_interface7_bank_bus_we) & (builder_csr_bankarray_interface7_bank_bus_adr[1:0] == 2'd2)); assign builder_csr_bankarray_csrbank7_tuning_word1_we = ((builder_csr_bankarray_csrbank7_sel & (~builder_csr_bankarray_interface7_bank_bus_we)) & (builder_csr_bankarray_interface7_bank_bus_adr[1:0] == 2'd2)); assign builder_csr_bankarray_csrbank7_tuning_word0_r = builder_csr_bankarray_interface7_bank_bus_dat_w[7:0]; assign builder_csr_bankarray_csrbank7_tuning_word0_re = ((builder_csr_bankarray_csrbank7_sel & builder_csr_bankarray_interface7_bank_bus_we) & (builder_csr_bankarray_interface7_bank_bus_adr[1:0] == 2'd3)); assign builder_csr_bankarray_csrbank7_tuning_word0_we = ((builder_csr_bankarray_csrbank7_sel & (~builder_csr_bankarray_interface7_bank_bus_we)) & (builder_csr_bankarray_interface7_bank_bus_adr[1:0] == 2'd3)); assign builder_csr_bankarray_csrbank7_tuning_word3_w = main_soclinux_storage[31:24]; assign builder_csr_bankarray_csrbank7_tuning_word2_w = main_soclinux_storage[23:16]; assign builder_csr_bankarray_csrbank7_tuning_word1_w = main_soclinux_storage[15:8]; assign builder_csr_bankarray_csrbank7_tuning_word0_w = main_soclinux_storage[7:0]; assign builder_csr_interconnect_adr = builder_soclinux_adr; assign builder_csr_interconnect_we = builder_soclinux_we; assign builder_csr_interconnect_dat_w = builder_soclinux_dat_w; assign builder_soclinux_dat_r = builder_csr_interconnect_dat_r; assign builder_csr_bankarray_interface0_bank_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_interface1_bank_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_interface2_bank_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_interface3_bank_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_interface4_bank_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_interface5_bank_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_interface6_bank_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_interface7_bank_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_sram_bus_adr = builder_csr_interconnect_adr; assign builder_csr_bankarray_interface0_bank_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_interface1_bank_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_interface2_bank_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_interface3_bank_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_interface4_bank_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_interface5_bank_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_interface6_bank_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_interface7_bank_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_sram_bus_we = builder_csr_interconnect_we; assign builder_csr_bankarray_interface0_bank_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_bankarray_interface1_bank_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_bankarray_interface2_bank_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_bankarray_interface3_bank_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_bankarray_interface4_bank_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_bankarray_interface5_bank_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_bankarray_interface6_bank_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_bankarray_interface7_bank_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_bankarray_sram_bus_dat_w = builder_csr_interconnect_dat_w; assign builder_csr_interconnect_dat_r = ((((((((builder_csr_bankarray_interface0_bank_bus_dat_r | builder_csr_bankarray_interface1_bank_bus_dat_r) | builder_csr_bankarray_interface2_bank_bus_dat_r) | builder_csr_bankarray_interface3_bank_bus_dat_r) | builder_csr_bankarray_interface4_bank_bus_dat_r) | builder_csr_bankarray_interface5_bank_bus_dat_r) | builder_csr_bankarray_interface6_bank_bus_dat_r) | builder_csr_bankarray_interface7_bank_bus_dat_r) | builder_csr_bankarray_sram_bus_dat_r); always @(*) begin builder_comb_rhs_array_muxed0 <= 1'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_rhs_array_muxed0 <= main_sdram_choose_cmd_valids[0]; end 1'd1: begin builder_comb_rhs_array_muxed0 <= main_sdram_choose_cmd_valids[1]; end 2'd2: begin builder_comb_rhs_array_muxed0 <= main_sdram_choose_cmd_valids[2]; end default: begin builder_comb_rhs_array_muxed0 <= main_sdram_choose_cmd_valids[3]; end endcase end always @(*) begin builder_comb_rhs_array_muxed1 <= 13'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_rhs_array_muxed1 <= main_sdram_bankmachine0_cmd_payload_a; end 1'd1: begin builder_comb_rhs_array_muxed1 <= main_sdram_bankmachine1_cmd_payload_a; end 2'd2: begin builder_comb_rhs_array_muxed1 <= main_sdram_bankmachine2_cmd_payload_a; end default: begin builder_comb_rhs_array_muxed1 <= main_sdram_bankmachine3_cmd_payload_a; end endcase end always @(*) begin builder_comb_rhs_array_muxed2 <= 2'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_rhs_array_muxed2 <= main_sdram_bankmachine0_cmd_payload_ba; end 1'd1: begin builder_comb_rhs_array_muxed2 <= main_sdram_bankmachine1_cmd_payload_ba; end 2'd2: begin builder_comb_rhs_array_muxed2 <= main_sdram_bankmachine2_cmd_payload_ba; end default: begin builder_comb_rhs_array_muxed2 <= main_sdram_bankmachine3_cmd_payload_ba; end endcase end always @(*) begin builder_comb_rhs_array_muxed3 <= 1'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_rhs_array_muxed3 <= main_sdram_bankmachine0_cmd_payload_is_read; end 1'd1: begin builder_comb_rhs_array_muxed3 <= main_sdram_bankmachine1_cmd_payload_is_read; end 2'd2: begin builder_comb_rhs_array_muxed3 <= main_sdram_bankmachine2_cmd_payload_is_read; end default: begin builder_comb_rhs_array_muxed3 <= main_sdram_bankmachine3_cmd_payload_is_read; end endcase end always @(*) begin builder_comb_rhs_array_muxed4 <= 1'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_rhs_array_muxed4 <= main_sdram_bankmachine0_cmd_payload_is_write; end 1'd1: begin builder_comb_rhs_array_muxed4 <= main_sdram_bankmachine1_cmd_payload_is_write; end 2'd2: begin builder_comb_rhs_array_muxed4 <= main_sdram_bankmachine2_cmd_payload_is_write; end default: begin builder_comb_rhs_array_muxed4 <= main_sdram_bankmachine3_cmd_payload_is_write; end endcase end always @(*) begin builder_comb_rhs_array_muxed5 <= 1'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_rhs_array_muxed5 <= main_sdram_bankmachine0_cmd_payload_is_cmd; end 1'd1: begin builder_comb_rhs_array_muxed5 <= main_sdram_bankmachine1_cmd_payload_is_cmd; end 2'd2: begin builder_comb_rhs_array_muxed5 <= main_sdram_bankmachine2_cmd_payload_is_cmd; end default: begin builder_comb_rhs_array_muxed5 <= main_sdram_bankmachine3_cmd_payload_is_cmd; end endcase end always @(*) begin builder_comb_t_array_muxed0 <= 1'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_t_array_muxed0 <= main_sdram_bankmachine0_cmd_payload_cas; end 1'd1: begin builder_comb_t_array_muxed0 <= main_sdram_bankmachine1_cmd_payload_cas; end 2'd2: begin builder_comb_t_array_muxed0 <= main_sdram_bankmachine2_cmd_payload_cas; end default: begin builder_comb_t_array_muxed0 <= main_sdram_bankmachine3_cmd_payload_cas; end endcase end always @(*) begin builder_comb_t_array_muxed1 <= 1'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_t_array_muxed1 <= main_sdram_bankmachine0_cmd_payload_ras; end 1'd1: begin builder_comb_t_array_muxed1 <= main_sdram_bankmachine1_cmd_payload_ras; end 2'd2: begin builder_comb_t_array_muxed1 <= main_sdram_bankmachine2_cmd_payload_ras; end default: begin builder_comb_t_array_muxed1 <= main_sdram_bankmachine3_cmd_payload_ras; end endcase end always @(*) begin builder_comb_t_array_muxed2 <= 1'd0; case (main_sdram_choose_cmd_grant) 1'd0: begin builder_comb_t_array_muxed2 <= main_sdram_bankmachine0_cmd_payload_we; end 1'd1: begin builder_comb_t_array_muxed2 <= main_sdram_bankmachine1_cmd_payload_we; end 2'd2: begin builder_comb_t_array_muxed2 <= main_sdram_bankmachine2_cmd_payload_we; end default: begin builder_comb_t_array_muxed2 <= main_sdram_bankmachine3_cmd_payload_we; end endcase end always @(*) begin builder_comb_rhs_array_muxed6 <= 1'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_rhs_array_muxed6 <= main_sdram_choose_req_valids[0]; end 1'd1: begin builder_comb_rhs_array_muxed6 <= main_sdram_choose_req_valids[1]; end 2'd2: begin builder_comb_rhs_array_muxed6 <= main_sdram_choose_req_valids[2]; end default: begin builder_comb_rhs_array_muxed6 <= main_sdram_choose_req_valids[3]; end endcase end always @(*) begin builder_comb_rhs_array_muxed7 <= 13'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_rhs_array_muxed7 <= main_sdram_bankmachine0_cmd_payload_a; end 1'd1: begin builder_comb_rhs_array_muxed7 <= main_sdram_bankmachine1_cmd_payload_a; end 2'd2: begin builder_comb_rhs_array_muxed7 <= main_sdram_bankmachine2_cmd_payload_a; end default: begin builder_comb_rhs_array_muxed7 <= main_sdram_bankmachine3_cmd_payload_a; end endcase end always @(*) begin builder_comb_rhs_array_muxed8 <= 2'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_rhs_array_muxed8 <= main_sdram_bankmachine0_cmd_payload_ba; end 1'd1: begin builder_comb_rhs_array_muxed8 <= main_sdram_bankmachine1_cmd_payload_ba; end 2'd2: begin builder_comb_rhs_array_muxed8 <= main_sdram_bankmachine2_cmd_payload_ba; end default: begin builder_comb_rhs_array_muxed8 <= main_sdram_bankmachine3_cmd_payload_ba; end endcase end always @(*) begin builder_comb_rhs_array_muxed9 <= 1'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_rhs_array_muxed9 <= main_sdram_bankmachine0_cmd_payload_is_read; end 1'd1: begin builder_comb_rhs_array_muxed9 <= main_sdram_bankmachine1_cmd_payload_is_read; end 2'd2: begin builder_comb_rhs_array_muxed9 <= main_sdram_bankmachine2_cmd_payload_is_read; end default: begin builder_comb_rhs_array_muxed9 <= main_sdram_bankmachine3_cmd_payload_is_read; end endcase end always @(*) begin builder_comb_rhs_array_muxed10 <= 1'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_rhs_array_muxed10 <= main_sdram_bankmachine0_cmd_payload_is_write; end 1'd1: begin builder_comb_rhs_array_muxed10 <= main_sdram_bankmachine1_cmd_payload_is_write; end 2'd2: begin builder_comb_rhs_array_muxed10 <= main_sdram_bankmachine2_cmd_payload_is_write; end default: begin builder_comb_rhs_array_muxed10 <= main_sdram_bankmachine3_cmd_payload_is_write; end endcase end always @(*) begin builder_comb_rhs_array_muxed11 <= 1'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_rhs_array_muxed11 <= main_sdram_bankmachine0_cmd_payload_is_cmd; end 1'd1: begin builder_comb_rhs_array_muxed11 <= main_sdram_bankmachine1_cmd_payload_is_cmd; end 2'd2: begin builder_comb_rhs_array_muxed11 <= main_sdram_bankmachine2_cmd_payload_is_cmd; end default: begin builder_comb_rhs_array_muxed11 <= main_sdram_bankmachine3_cmd_payload_is_cmd; end endcase end always @(*) begin builder_comb_t_array_muxed3 <= 1'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_t_array_muxed3 <= main_sdram_bankmachine0_cmd_payload_cas; end 1'd1: begin builder_comb_t_array_muxed3 <= main_sdram_bankmachine1_cmd_payload_cas; end 2'd2: begin builder_comb_t_array_muxed3 <= main_sdram_bankmachine2_cmd_payload_cas; end default: begin builder_comb_t_array_muxed3 <= main_sdram_bankmachine3_cmd_payload_cas; end endcase end always @(*) begin builder_comb_t_array_muxed4 <= 1'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_t_array_muxed4 <= main_sdram_bankmachine0_cmd_payload_ras; end 1'd1: begin builder_comb_t_array_muxed4 <= main_sdram_bankmachine1_cmd_payload_ras; end 2'd2: begin builder_comb_t_array_muxed4 <= main_sdram_bankmachine2_cmd_payload_ras; end default: begin builder_comb_t_array_muxed4 <= main_sdram_bankmachine3_cmd_payload_ras; end endcase end always @(*) begin builder_comb_t_array_muxed5 <= 1'd0; case (main_sdram_choose_req_grant) 1'd0: begin builder_comb_t_array_muxed5 <= main_sdram_bankmachine0_cmd_payload_we; end 1'd1: begin builder_comb_t_array_muxed5 <= main_sdram_bankmachine1_cmd_payload_we; end 2'd2: begin builder_comb_t_array_muxed5 <= main_sdram_bankmachine2_cmd_payload_we; end default: begin builder_comb_t_array_muxed5 <= main_sdram_bankmachine3_cmd_payload_we; end endcase end always @(*) begin builder_comb_rhs_array_muxed12 <= 22'd0; case (builder_roundrobin0_grant) default: begin builder_comb_rhs_array_muxed12 <= {main_port_cmd_payload_addr[23:11], main_port_cmd_payload_addr[8:0]}; end endcase end always @(*) begin builder_comb_rhs_array_muxed13 <= 1'd0; case (builder_roundrobin0_grant) default: begin builder_comb_rhs_array_muxed13 <= main_port_cmd_payload_we; end endcase end always @(*) begin builder_comb_rhs_array_muxed14 <= 1'd0; case (builder_roundrobin0_grant) default: begin builder_comb_rhs_array_muxed14 <= (((main_port_cmd_payload_addr[10:9] == 1'd0) & (~(((builder_locked0 | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0))))) & main_port_cmd_valid); end endcase end always @(*) begin builder_comb_rhs_array_muxed15 <= 22'd0; case (builder_roundrobin1_grant) default: begin builder_comb_rhs_array_muxed15 <= {main_port_cmd_payload_addr[23:11], main_port_cmd_payload_addr[8:0]}; end endcase end always @(*) begin builder_comb_rhs_array_muxed16 <= 1'd0; case (builder_roundrobin1_grant) default: begin builder_comb_rhs_array_muxed16 <= main_port_cmd_payload_we; end endcase end always @(*) begin builder_comb_rhs_array_muxed17 <= 1'd0; case (builder_roundrobin1_grant) default: begin builder_comb_rhs_array_muxed17 <= (((main_port_cmd_payload_addr[10:9] == 1'd1) & (~(((builder_locked1 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0))))) & main_port_cmd_valid); end endcase end always @(*) begin builder_comb_rhs_array_muxed18 <= 22'd0; case (builder_roundrobin2_grant) default: begin builder_comb_rhs_array_muxed18 <= {main_port_cmd_payload_addr[23:11], main_port_cmd_payload_addr[8:0]}; end endcase end always @(*) begin builder_comb_rhs_array_muxed19 <= 1'd0; case (builder_roundrobin2_grant) default: begin builder_comb_rhs_array_muxed19 <= main_port_cmd_payload_we; end endcase end always @(*) begin builder_comb_rhs_array_muxed20 <= 1'd0; case (builder_roundrobin2_grant) default: begin builder_comb_rhs_array_muxed20 <= (((main_port_cmd_payload_addr[10:9] == 2'd2) & (~(((builder_locked2 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank3_lock & (builder_roundrobin3_grant == 1'd0))))) & main_port_cmd_valid); end endcase end always @(*) begin builder_comb_rhs_array_muxed21 <= 22'd0; case (builder_roundrobin3_grant) default: begin builder_comb_rhs_array_muxed21 <= {main_port_cmd_payload_addr[23:11], main_port_cmd_payload_addr[8:0]}; end endcase end always @(*) begin builder_comb_rhs_array_muxed22 <= 1'd0; case (builder_roundrobin3_grant) default: begin builder_comb_rhs_array_muxed22 <= main_port_cmd_payload_we; end endcase end always @(*) begin builder_comb_rhs_array_muxed23 <= 1'd0; case (builder_roundrobin3_grant) default: begin builder_comb_rhs_array_muxed23 <= (((main_port_cmd_payload_addr[10:9] == 2'd3) & (~(((builder_locked3 | (main_sdram_interface_bank0_lock & (builder_roundrobin0_grant == 1'd0))) | (main_sdram_interface_bank1_lock & (builder_roundrobin1_grant == 1'd0))) | (main_sdram_interface_bank2_lock & (builder_roundrobin2_grant == 1'd0))))) & main_port_cmd_valid); end endcase end always @(*) begin builder_comb_rhs_array_muxed24 <= 30'd0; case (builder_grant) 1'd0: begin builder_comb_rhs_array_muxed24 <= main_soclinux_cpu_ibus_adr; end default: begin builder_comb_rhs_array_muxed24 <= main_soclinux_cpu_dbus_adr; end endcase end always @(*) begin builder_comb_rhs_array_muxed25 <= 32'd0; case (builder_grant) 1'd0: begin builder_comb_rhs_array_muxed25 <= main_soclinux_cpu_ibus_dat_w; end default: begin builder_comb_rhs_array_muxed25 <= main_soclinux_cpu_dbus_dat_w; end endcase end always @(*) begin builder_comb_rhs_array_muxed26 <= 4'd0; case (builder_grant) 1'd0: begin builder_comb_rhs_array_muxed26 <= main_soclinux_cpu_ibus_sel; end default: begin builder_comb_rhs_array_muxed26 <= main_soclinux_cpu_dbus_sel; end endcase end always @(*) begin builder_comb_rhs_array_muxed27 <= 1'd0; case (builder_grant) 1'd0: begin builder_comb_rhs_array_muxed27 <= main_soclinux_cpu_ibus_cyc; end default: begin builder_comb_rhs_array_muxed27 <= main_soclinux_cpu_dbus_cyc; end endcase end always @(*) begin builder_comb_rhs_array_muxed28 <= 1'd0; case (builder_grant) 1'd0: begin builder_comb_rhs_array_muxed28 <= main_soclinux_cpu_ibus_stb; end default: begin builder_comb_rhs_array_muxed28 <= main_soclinux_cpu_dbus_stb; end endcase end always @(*) begin builder_comb_rhs_array_muxed29 <= 1'd0; case (builder_grant) 1'd0: begin builder_comb_rhs_array_muxed29 <= main_soclinux_cpu_ibus_we; end default: begin builder_comb_rhs_array_muxed29 <= main_soclinux_cpu_dbus_we; end endcase end always @(*) begin builder_comb_rhs_array_muxed30 <= 3'd0; case (builder_grant) 1'd0: begin builder_comb_rhs_array_muxed30 <= main_soclinux_cpu_ibus_cti; end default: begin builder_comb_rhs_array_muxed30 <= main_soclinux_cpu_dbus_cti; end endcase end always @(*) begin builder_comb_rhs_array_muxed31 <= 2'd0; case (builder_grant) 1'd0: begin builder_comb_rhs_array_muxed31 <= main_soclinux_cpu_ibus_bte; end default: begin builder_comb_rhs_array_muxed31 <= main_soclinux_cpu_dbus_bte; end endcase end always @(*) begin builder_sync_rhs_array_muxed0 <= 2'd0; case (main_sdram_steerer_sel) 1'd0: begin builder_sync_rhs_array_muxed0 <= main_sdram_nop_ba[1:0]; end 1'd1: begin builder_sync_rhs_array_muxed0 <= main_sdram_choose_req_cmd_payload_ba[1:0]; end 2'd2: begin builder_sync_rhs_array_muxed0 <= main_sdram_choose_req_cmd_payload_ba[1:0]; end default: begin builder_sync_rhs_array_muxed0 <= main_sdram_cmd_payload_ba[1:0]; end endcase end always @(*) begin builder_sync_rhs_array_muxed1 <= 13'd0; case (main_sdram_steerer_sel) 1'd0: begin builder_sync_rhs_array_muxed1 <= main_sdram_nop_a; end 1'd1: begin builder_sync_rhs_array_muxed1 <= main_sdram_choose_req_cmd_payload_a; end 2'd2: begin builder_sync_rhs_array_muxed1 <= main_sdram_choose_req_cmd_payload_a; end default: begin builder_sync_rhs_array_muxed1 <= main_sdram_cmd_payload_a; end endcase end always @(*) begin builder_sync_rhs_array_muxed2 <= 1'd0; case (main_sdram_steerer_sel) 1'd0: begin builder_sync_rhs_array_muxed2 <= 1'd0; end 1'd1: begin builder_sync_rhs_array_muxed2 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_cas); end 2'd2: begin builder_sync_rhs_array_muxed2 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_cas); end default: begin builder_sync_rhs_array_muxed2 <= ((main_sdram_cmd_valid & main_sdram_cmd_ready) & main_sdram_cmd_payload_cas); end endcase end always @(*) begin builder_sync_rhs_array_muxed3 <= 1'd0; case (main_sdram_steerer_sel) 1'd0: begin builder_sync_rhs_array_muxed3 <= 1'd0; end 1'd1: begin builder_sync_rhs_array_muxed3 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_ras); end 2'd2: begin builder_sync_rhs_array_muxed3 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_ras); end default: begin builder_sync_rhs_array_muxed3 <= ((main_sdram_cmd_valid & main_sdram_cmd_ready) & main_sdram_cmd_payload_ras); end endcase end always @(*) begin builder_sync_rhs_array_muxed4 <= 1'd0; case (main_sdram_steerer_sel) 1'd0: begin builder_sync_rhs_array_muxed4 <= 1'd0; end 1'd1: begin builder_sync_rhs_array_muxed4 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_we); end 2'd2: begin builder_sync_rhs_array_muxed4 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_we); end default: begin builder_sync_rhs_array_muxed4 <= ((main_sdram_cmd_valid & main_sdram_cmd_ready) & main_sdram_cmd_payload_we); end endcase end always @(*) begin builder_sync_rhs_array_muxed5 <= 1'd0; case (main_sdram_steerer_sel) 1'd0: begin builder_sync_rhs_array_muxed5 <= 1'd0; end 1'd1: begin builder_sync_rhs_array_muxed5 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_is_read); end 2'd2: begin builder_sync_rhs_array_muxed5 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_is_read); end default: begin builder_sync_rhs_array_muxed5 <= ((main_sdram_cmd_valid & main_sdram_cmd_ready) & main_sdram_cmd_payload_is_read); end endcase end always @(*) begin builder_sync_rhs_array_muxed6 <= 1'd0; case (main_sdram_steerer_sel) 1'd0: begin builder_sync_rhs_array_muxed6 <= 1'd0; end 1'd1: begin builder_sync_rhs_array_muxed6 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_is_write); end 2'd2: begin builder_sync_rhs_array_muxed6 <= ((main_sdram_choose_req_cmd_valid & main_sdram_choose_req_cmd_ready) & main_sdram_choose_req_cmd_payload_is_write); end default: begin builder_sync_rhs_array_muxed6 <= ((main_sdram_cmd_valid & main_sdram_cmd_ready) & main_sdram_cmd_payload_is_write); end endcase end always @(*) begin builder_sync_f_array_muxed <= 1'd0; case (soclinux_mosi_sel) 1'd0: begin builder_sync_f_array_muxed <= soclinux_mosi_data[0]; end 1'd1: begin builder_sync_f_array_muxed <= soclinux_mosi_data[1]; end 2'd2: begin builder_sync_f_array_muxed <= soclinux_mosi_data[2]; end 2'd3: begin builder_sync_f_array_muxed <= soclinux_mosi_data[3]; end 3'd4: begin builder_sync_f_array_muxed <= soclinux_mosi_data[4]; end 3'd5: begin builder_sync_f_array_muxed <= soclinux_mosi_data[5]; end 3'd6: begin builder_sync_f_array_muxed <= soclinux_mosi_data[6]; end default: begin builder_sync_f_array_muxed <= soclinux_mosi_data[7]; end endcase end assign main_soclinux_rx = builder_regs1; assign sdrio_clk = sys_clk; assign sdrio_clk_1 = sys_clk; assign sdrio_clk_2 = sys_clk; assign sdrio_clk_3 = sys_clk; assign sdrio_clk_4 = sys_clk; assign sdrio_clk_5 = sys_clk; assign sdrio_clk_6 = sys_clk; assign sdrio_clk_7 = sys_clk; assign sdrio_clk_8 = sys_clk; assign sdrio_clk_9 = sys_clk; assign sdrio_clk_10 = sys_clk; assign sdrio_clk_11 = sys_clk; assign sdrio_clk_12 = sys_clk; assign sdrio_clk_13 = sys_clk; assign sdrio_clk_14 = sys_clk; assign sdrio_clk_15 = sys_clk; always @(posedge sdrio_clk) begin builder_inferedsdrtristate0_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate1_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate2_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate3_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate4_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate5_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate6_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate7_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate8_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate9_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate10_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate11_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate12_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate13_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate14_oe <= main_dfi_p0_wrdata_en; builder_inferedsdrtristate15_oe <= main_dfi_p0_wrdata_en; end always @(posedge sys_clk) begin if ((main_soclinux_soccontroller_bus_errors != 32'd4294967295)) begin if (main_soclinux_soccontroller_bus_error) begin main_soclinux_soccontroller_bus_errors <= (main_soclinux_soccontroller_bus_errors + 1'd1); end end main_soclinux_cpu_time <= (main_soclinux_cpu_time + 1'd1); if (main_soclinux_cpu_latch_re) begin main_soclinux_cpu_time_status <= main_soclinux_cpu_time; end if (main_soclinux_cpu_latch_re) begin main_soclinux_cpu_time_cmp <= main_soclinux_cpu_time_cmp_storage; end main_soclinux_soclinux_ram_bus_ack <= 1'd0; if (((main_soclinux_soclinux_ram_bus_cyc & main_soclinux_soclinux_ram_bus_stb) & (~main_soclinux_soclinux_ram_bus_ack))) begin main_soclinux_soclinux_ram_bus_ack <= 1'd1; end main_soclinux_ram_bus_ram_bus_ack <= 1'd0; if (((main_soclinux_ram_bus_ram_bus_cyc & main_soclinux_ram_bus_ram_bus_stb) & (~main_soclinux_ram_bus_ram_bus_ack))) begin main_soclinux_ram_bus_ram_bus_ack <= 1'd1; end main_soclinux_sink_ready <= 1'd0; if (((main_soclinux_sink_valid & (~main_soclinux_tx_busy)) & (~main_soclinux_sink_ready))) begin main_soclinux_tx_reg <= main_soclinux_sink_payload_data; main_soclinux_tx_bitcount <= 1'd0; main_soclinux_tx_busy <= 1'd1; serial_tx <= 1'd0; end else begin if ((main_soclinux_tx_clken & main_soclinux_tx_busy)) begin main_soclinux_tx_bitcount <= (main_soclinux_tx_bitcount + 1'd1); if ((main_soclinux_tx_bitcount == 4'd8)) begin serial_tx <= 1'd1; end else begin if ((main_soclinux_tx_bitcount == 4'd9)) begin serial_tx <= 1'd1; main_soclinux_tx_busy <= 1'd0; main_soclinux_sink_ready <= 1'd1; end else begin serial_tx <= main_soclinux_tx_reg[0]; main_soclinux_tx_reg <= {1'd0, main_soclinux_tx_reg[7:1]}; end end end end if (main_soclinux_tx_busy) begin {main_soclinux_tx_clken, main_soclinux_tx_clkphase} <= (main_soclinux_tx_clkphase + main_soclinux_storage); end else begin {main_soclinux_tx_clken, main_soclinux_tx_clkphase} <= main_soclinux_storage; end main_soclinux_source_valid <= 1'd0; main_soclinux_rx_r <= main_soclinux_rx; if ((~main_soclinux_rx_busy)) begin if (((~main_soclinux_rx) & main_soclinux_rx_r)) begin main_soclinux_rx_busy <= 1'd1; main_soclinux_rx_bitcount <= 1'd0; end end else begin if (main_soclinux_rx_clken) begin main_soclinux_rx_bitcount <= (main_soclinux_rx_bitcount + 1'd1); if ((main_soclinux_rx_bitcount == 1'd0)) begin if (main_soclinux_rx) begin main_soclinux_rx_busy <= 1'd0; end end else begin if ((main_soclinux_rx_bitcount == 4'd9)) begin main_soclinux_rx_busy <= 1'd0; if (main_soclinux_rx) begin main_soclinux_source_payload_data <= main_soclinux_rx_reg; main_soclinux_source_valid <= 1'd1; end end else begin main_soclinux_rx_reg <= {main_soclinux_rx, main_soclinux_rx_reg[7:1]}; end end end end if (main_soclinux_rx_busy) begin {main_soclinux_rx_clken, main_soclinux_rx_clkphase} <= (main_soclinux_rx_clkphase + main_soclinux_storage); end else begin {main_soclinux_rx_clken, main_soclinux_rx_clkphase} <= 32'd2147483648; end if (main_soclinux_uart_tx_clear) begin main_soclinux_uart_tx_pending <= 1'd0; end main_soclinux_uart_tx_old_trigger <= main_soclinux_uart_tx_trigger; if (((~main_soclinux_uart_tx_trigger) & main_soclinux_uart_tx_old_trigger)) begin main_soclinux_uart_tx_pending <= 1'd1; end if (main_soclinux_uart_rx_clear) begin main_soclinux_uart_rx_pending <= 1'd0; end main_soclinux_uart_rx_old_trigger <= main_soclinux_uart_rx_trigger; if (((~main_soclinux_uart_rx_trigger) & main_soclinux_uart_rx_old_trigger)) begin main_soclinux_uart_rx_pending <= 1'd1; end if (main_soclinux_uart_tx_fifo_syncfifo_re) begin main_soclinux_uart_tx_fifo_readable <= 1'd1; end else begin if (main_soclinux_uart_tx_fifo_re) begin main_soclinux_uart_tx_fifo_readable <= 1'd0; end end if (((main_soclinux_uart_tx_fifo_syncfifo_we & main_soclinux_uart_tx_fifo_syncfifo_writable) & (~main_soclinux_uart_tx_fifo_replace))) begin main_soclinux_uart_tx_fifo_produce <= (main_soclinux_uart_tx_fifo_produce + 1'd1); end if (main_soclinux_uart_tx_fifo_do_read) begin main_soclinux_uart_tx_fifo_consume <= (main_soclinux_uart_tx_fifo_consume + 1'd1); end if (((main_soclinux_uart_tx_fifo_syncfifo_we & main_soclinux_uart_tx_fifo_syncfifo_writable) & (~main_soclinux_uart_tx_fifo_replace))) begin if ((~main_soclinux_uart_tx_fifo_do_read)) begin main_soclinux_uart_tx_fifo_level0 <= (main_soclinux_uart_tx_fifo_level0 + 1'd1); end end else begin if (main_soclinux_uart_tx_fifo_do_read) begin main_soclinux_uart_tx_fifo_level0 <= (main_soclinux_uart_tx_fifo_level0 - 1'd1); end end if (main_soclinux_uart_rx_fifo_syncfifo_re) begin main_soclinux_uart_rx_fifo_readable <= 1'd1; end else begin if (main_soclinux_uart_rx_fifo_re) begin main_soclinux_uart_rx_fifo_readable <= 1'd0; end end if (((main_soclinux_uart_rx_fifo_syncfifo_we & main_soclinux_uart_rx_fifo_syncfifo_writable) & (~main_soclinux_uart_rx_fifo_replace))) begin main_soclinux_uart_rx_fifo_produce <= (main_soclinux_uart_rx_fifo_produce + 1'd1); end if (main_soclinux_uart_rx_fifo_do_read) begin main_soclinux_uart_rx_fifo_consume <= (main_soclinux_uart_rx_fifo_consume + 1'd1); end if (((main_soclinux_uart_rx_fifo_syncfifo_we & main_soclinux_uart_rx_fifo_syncfifo_writable) & (~main_soclinux_uart_rx_fifo_replace))) begin if ((~main_soclinux_uart_rx_fifo_do_read)) begin main_soclinux_uart_rx_fifo_level0 <= (main_soclinux_uart_rx_fifo_level0 + 1'd1); end end else begin if (main_soclinux_uart_rx_fifo_do_read) begin main_soclinux_uart_rx_fifo_level0 <= (main_soclinux_uart_rx_fifo_level0 - 1'd1); end end if (main_soclinux_uart_reset) begin main_soclinux_uart_tx_pending <= 1'd0; main_soclinux_uart_tx_old_trigger <= 1'd0; main_soclinux_uart_rx_pending <= 1'd0; main_soclinux_uart_rx_old_trigger <= 1'd0; main_soclinux_uart_tx_fifo_readable <= 1'd0; main_soclinux_uart_tx_fifo_level0 <= 5'd0; main_soclinux_uart_tx_fifo_produce <= 4'd0; main_soclinux_uart_tx_fifo_consume <= 4'd0; main_soclinux_uart_rx_fifo_readable <= 1'd0; main_soclinux_uart_rx_fifo_level0 <= 5'd0; main_soclinux_uart_rx_fifo_produce <= 4'd0; main_soclinux_uart_rx_fifo_consume <= 4'd0; end if (main_soclinux_timer_en_storage) begin if ((main_soclinux_timer_value == 1'd0)) begin main_soclinux_timer_value <= main_soclinux_timer_reload_storage; end else begin main_soclinux_timer_value <= (main_soclinux_timer_value - 1'd1); end end else begin main_soclinux_timer_value <= main_soclinux_timer_load_storage; end if (main_soclinux_timer_update_value_re) begin main_soclinux_timer_value_status <= main_soclinux_timer_value; end if (main_soclinux_timer_zero_clear) begin main_soclinux_timer_zero_pending <= 1'd0; end main_soclinux_timer_zero_old_trigger <= main_soclinux_timer_zero_trigger; if (((~main_soclinux_timer_zero_trigger) & main_soclinux_timer_zero_old_trigger)) begin main_soclinux_timer_zero_pending <= 1'd1; end main_rddata_en <= {main_rddata_en, main_dfi_p0_rddata_en}; main_dfi_p0_rddata_valid <= main_rddata_en[2]; if (main_sdram_inti_p0_rddata_valid) begin main_sdram_rddata_status <= main_sdram_inti_p0_rddata; end if ((main_sdram_timer_wait & (~main_sdram_timer_done0))) begin main_sdram_timer_count1 <= (main_sdram_timer_count1 - 1'd1); end else begin main_sdram_timer_count1 <= 9'd390; end main_sdram_postponer_req_o <= 1'd0; if (main_sdram_postponer_req_i) begin main_sdram_postponer_count <= (main_sdram_postponer_count - 1'd1); if ((main_sdram_postponer_count == 1'd0)) begin main_sdram_postponer_count <= 1'd0; main_sdram_postponer_req_o <= 1'd1; end end if (main_sdram_sequencer_start0) begin main_sdram_sequencer_count <= 1'd0; end else begin if (main_sdram_sequencer_done1) begin if ((main_sdram_sequencer_count != 1'd0)) begin main_sdram_sequencer_count <= (main_sdram_sequencer_count - 1'd1); end end end main_sdram_cmd_payload_a <= 1'd0; main_sdram_cmd_payload_ba <= 1'd0; main_sdram_cmd_payload_cas <= 1'd0; main_sdram_cmd_payload_ras <= 1'd0; main_sdram_cmd_payload_we <= 1'd0; main_sdram_sequencer_done1 <= 1'd0; if ((main_sdram_sequencer_start1 & (main_sdram_sequencer_counter == 1'd0))) begin main_sdram_cmd_payload_a <= 11'd1024; main_sdram_cmd_payload_ba <= 1'd0; main_sdram_cmd_payload_cas <= 1'd0; main_sdram_cmd_payload_ras <= 1'd1; main_sdram_cmd_payload_we <= 1'd1; end if ((main_sdram_sequencer_counter == 1'd1)) begin main_sdram_cmd_payload_a <= 1'd0; main_sdram_cmd_payload_ba <= 1'd0; main_sdram_cmd_payload_cas <= 1'd1; main_sdram_cmd_payload_ras <= 1'd1; main_sdram_cmd_payload_we <= 1'd0; end if ((main_sdram_sequencer_counter == 3'd5)) begin main_sdram_cmd_payload_a <= 1'd0; main_sdram_cmd_payload_ba <= 1'd0; main_sdram_cmd_payload_cas <= 1'd0; main_sdram_cmd_payload_ras <= 1'd0; main_sdram_cmd_payload_we <= 1'd0; main_sdram_sequencer_done1 <= 1'd1; end if ((main_sdram_sequencer_counter == 3'd5)) begin main_sdram_sequencer_counter <= 1'd0; end else begin if ((main_sdram_sequencer_counter != 1'd0)) begin main_sdram_sequencer_counter <= (main_sdram_sequencer_counter + 1'd1); end else begin if (main_sdram_sequencer_start1) begin main_sdram_sequencer_counter <= 1'd1; end end end builder_refresher_state <= builder_refresher_next_state; if (main_sdram_bankmachine0_row_close) begin main_sdram_bankmachine0_row_opened <= 1'd0; end else begin if (main_sdram_bankmachine0_row_open) begin main_sdram_bankmachine0_row_opened <= 1'd1; main_sdram_bankmachine0_row <= main_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:9]; end end if (((main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we & main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable) & (~main_sdram_bankmachine0_cmd_buffer_lookahead_replace))) begin main_sdram_bankmachine0_cmd_buffer_lookahead_produce <= (main_sdram_bankmachine0_cmd_buffer_lookahead_produce + 1'd1); end if (main_sdram_bankmachine0_cmd_buffer_lookahead_do_read) begin main_sdram_bankmachine0_cmd_buffer_lookahead_consume <= (main_sdram_bankmachine0_cmd_buffer_lookahead_consume + 1'd1); end if (((main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we & main_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable) & (~main_sdram_bankmachine0_cmd_buffer_lookahead_replace))) begin if ((~main_sdram_bankmachine0_cmd_buffer_lookahead_do_read)) begin main_sdram_bankmachine0_cmd_buffer_lookahead_level <= (main_sdram_bankmachine0_cmd_buffer_lookahead_level + 1'd1); end end else begin if (main_sdram_bankmachine0_cmd_buffer_lookahead_do_read) begin main_sdram_bankmachine0_cmd_buffer_lookahead_level <= (main_sdram_bankmachine0_cmd_buffer_lookahead_level - 1'd1); end end if (((~main_sdram_bankmachine0_cmd_buffer_source_valid) | main_sdram_bankmachine0_cmd_buffer_source_ready)) begin main_sdram_bankmachine0_cmd_buffer_source_valid <= main_sdram_bankmachine0_cmd_buffer_sink_valid; main_sdram_bankmachine0_cmd_buffer_source_first <= main_sdram_bankmachine0_cmd_buffer_sink_first; main_sdram_bankmachine0_cmd_buffer_source_last <= main_sdram_bankmachine0_cmd_buffer_sink_last; main_sdram_bankmachine0_cmd_buffer_source_payload_we <= main_sdram_bankmachine0_cmd_buffer_sink_payload_we; main_sdram_bankmachine0_cmd_buffer_source_payload_addr <= main_sdram_bankmachine0_cmd_buffer_sink_payload_addr; end if (main_sdram_bankmachine0_twtpcon_valid) begin main_sdram_bankmachine0_twtpcon_count <= 2'd3; if (1'd0) begin main_sdram_bankmachine0_twtpcon_ready <= 1'd1; end else begin main_sdram_bankmachine0_twtpcon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine0_twtpcon_ready)) begin main_sdram_bankmachine0_twtpcon_count <= (main_sdram_bankmachine0_twtpcon_count - 1'd1); if ((main_sdram_bankmachine0_twtpcon_count == 1'd1)) begin main_sdram_bankmachine0_twtpcon_ready <= 1'd1; end end end if (main_sdram_bankmachine0_trccon_valid) begin main_sdram_bankmachine0_trccon_count <= 2'd3; if (1'd0) begin main_sdram_bankmachine0_trccon_ready <= 1'd1; end else begin main_sdram_bankmachine0_trccon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine0_trccon_ready)) begin main_sdram_bankmachine0_trccon_count <= (main_sdram_bankmachine0_trccon_count - 1'd1); if ((main_sdram_bankmachine0_trccon_count == 1'd1)) begin main_sdram_bankmachine0_trccon_ready <= 1'd1; end end end if (main_sdram_bankmachine0_trascon_valid) begin main_sdram_bankmachine0_trascon_count <= 2'd2; if (1'd0) begin main_sdram_bankmachine0_trascon_ready <= 1'd1; end else begin main_sdram_bankmachine0_trascon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine0_trascon_ready)) begin main_sdram_bankmachine0_trascon_count <= (main_sdram_bankmachine0_trascon_count - 1'd1); if ((main_sdram_bankmachine0_trascon_count == 1'd1)) begin main_sdram_bankmachine0_trascon_ready <= 1'd1; end end end builder_bankmachine0_state <= builder_bankmachine0_next_state; if (main_sdram_bankmachine1_row_close) begin main_sdram_bankmachine1_row_opened <= 1'd0; end else begin if (main_sdram_bankmachine1_row_open) begin main_sdram_bankmachine1_row_opened <= 1'd1; main_sdram_bankmachine1_row <= main_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:9]; end end if (((main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we & main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable) & (~main_sdram_bankmachine1_cmd_buffer_lookahead_replace))) begin main_sdram_bankmachine1_cmd_buffer_lookahead_produce <= (main_sdram_bankmachine1_cmd_buffer_lookahead_produce + 1'd1); end if (main_sdram_bankmachine1_cmd_buffer_lookahead_do_read) begin main_sdram_bankmachine1_cmd_buffer_lookahead_consume <= (main_sdram_bankmachine1_cmd_buffer_lookahead_consume + 1'd1); end if (((main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we & main_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable) & (~main_sdram_bankmachine1_cmd_buffer_lookahead_replace))) begin if ((~main_sdram_bankmachine1_cmd_buffer_lookahead_do_read)) begin main_sdram_bankmachine1_cmd_buffer_lookahead_level <= (main_sdram_bankmachine1_cmd_buffer_lookahead_level + 1'd1); end end else begin if (main_sdram_bankmachine1_cmd_buffer_lookahead_do_read) begin main_sdram_bankmachine1_cmd_buffer_lookahead_level <= (main_sdram_bankmachine1_cmd_buffer_lookahead_level - 1'd1); end end if (((~main_sdram_bankmachine1_cmd_buffer_source_valid) | main_sdram_bankmachine1_cmd_buffer_source_ready)) begin main_sdram_bankmachine1_cmd_buffer_source_valid <= main_sdram_bankmachine1_cmd_buffer_sink_valid; main_sdram_bankmachine1_cmd_buffer_source_first <= main_sdram_bankmachine1_cmd_buffer_sink_first; main_sdram_bankmachine1_cmd_buffer_source_last <= main_sdram_bankmachine1_cmd_buffer_sink_last; main_sdram_bankmachine1_cmd_buffer_source_payload_we <= main_sdram_bankmachine1_cmd_buffer_sink_payload_we; main_sdram_bankmachine1_cmd_buffer_source_payload_addr <= main_sdram_bankmachine1_cmd_buffer_sink_payload_addr; end if (main_sdram_bankmachine1_twtpcon_valid) begin main_sdram_bankmachine1_twtpcon_count <= 2'd3; if (1'd0) begin main_sdram_bankmachine1_twtpcon_ready <= 1'd1; end else begin main_sdram_bankmachine1_twtpcon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine1_twtpcon_ready)) begin main_sdram_bankmachine1_twtpcon_count <= (main_sdram_bankmachine1_twtpcon_count - 1'd1); if ((main_sdram_bankmachine1_twtpcon_count == 1'd1)) begin main_sdram_bankmachine1_twtpcon_ready <= 1'd1; end end end if (main_sdram_bankmachine1_trccon_valid) begin main_sdram_bankmachine1_trccon_count <= 2'd3; if (1'd0) begin main_sdram_bankmachine1_trccon_ready <= 1'd1; end else begin main_sdram_bankmachine1_trccon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine1_trccon_ready)) begin main_sdram_bankmachine1_trccon_count <= (main_sdram_bankmachine1_trccon_count - 1'd1); if ((main_sdram_bankmachine1_trccon_count == 1'd1)) begin main_sdram_bankmachine1_trccon_ready <= 1'd1; end end end if (main_sdram_bankmachine1_trascon_valid) begin main_sdram_bankmachine1_trascon_count <= 2'd2; if (1'd0) begin main_sdram_bankmachine1_trascon_ready <= 1'd1; end else begin main_sdram_bankmachine1_trascon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine1_trascon_ready)) begin main_sdram_bankmachine1_trascon_count <= (main_sdram_bankmachine1_trascon_count - 1'd1); if ((main_sdram_bankmachine1_trascon_count == 1'd1)) begin main_sdram_bankmachine1_trascon_ready <= 1'd1; end end end builder_bankmachine1_state <= builder_bankmachine1_next_state; if (main_sdram_bankmachine2_row_close) begin main_sdram_bankmachine2_row_opened <= 1'd0; end else begin if (main_sdram_bankmachine2_row_open) begin main_sdram_bankmachine2_row_opened <= 1'd1; main_sdram_bankmachine2_row <= main_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:9]; end end if (((main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we & main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable) & (~main_sdram_bankmachine2_cmd_buffer_lookahead_replace))) begin main_sdram_bankmachine2_cmd_buffer_lookahead_produce <= (main_sdram_bankmachine2_cmd_buffer_lookahead_produce + 1'd1); end if (main_sdram_bankmachine2_cmd_buffer_lookahead_do_read) begin main_sdram_bankmachine2_cmd_buffer_lookahead_consume <= (main_sdram_bankmachine2_cmd_buffer_lookahead_consume + 1'd1); end if (((main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we & main_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable) & (~main_sdram_bankmachine2_cmd_buffer_lookahead_replace))) begin if ((~main_sdram_bankmachine2_cmd_buffer_lookahead_do_read)) begin main_sdram_bankmachine2_cmd_buffer_lookahead_level <= (main_sdram_bankmachine2_cmd_buffer_lookahead_level + 1'd1); end end else begin if (main_sdram_bankmachine2_cmd_buffer_lookahead_do_read) begin main_sdram_bankmachine2_cmd_buffer_lookahead_level <= (main_sdram_bankmachine2_cmd_buffer_lookahead_level - 1'd1); end end if (((~main_sdram_bankmachine2_cmd_buffer_source_valid) | main_sdram_bankmachine2_cmd_buffer_source_ready)) begin main_sdram_bankmachine2_cmd_buffer_source_valid <= main_sdram_bankmachine2_cmd_buffer_sink_valid; main_sdram_bankmachine2_cmd_buffer_source_first <= main_sdram_bankmachine2_cmd_buffer_sink_first; main_sdram_bankmachine2_cmd_buffer_source_last <= main_sdram_bankmachine2_cmd_buffer_sink_last; main_sdram_bankmachine2_cmd_buffer_source_payload_we <= main_sdram_bankmachine2_cmd_buffer_sink_payload_we; main_sdram_bankmachine2_cmd_buffer_source_payload_addr <= main_sdram_bankmachine2_cmd_buffer_sink_payload_addr; end if (main_sdram_bankmachine2_twtpcon_valid) begin main_sdram_bankmachine2_twtpcon_count <= 2'd3; if (1'd0) begin main_sdram_bankmachine2_twtpcon_ready <= 1'd1; end else begin main_sdram_bankmachine2_twtpcon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine2_twtpcon_ready)) begin main_sdram_bankmachine2_twtpcon_count <= (main_sdram_bankmachine2_twtpcon_count - 1'd1); if ((main_sdram_bankmachine2_twtpcon_count == 1'd1)) begin main_sdram_bankmachine2_twtpcon_ready <= 1'd1; end end end if (main_sdram_bankmachine2_trccon_valid) begin main_sdram_bankmachine2_trccon_count <= 2'd3; if (1'd0) begin main_sdram_bankmachine2_trccon_ready <= 1'd1; end else begin main_sdram_bankmachine2_trccon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine2_trccon_ready)) begin main_sdram_bankmachine2_trccon_count <= (main_sdram_bankmachine2_trccon_count - 1'd1); if ((main_sdram_bankmachine2_trccon_count == 1'd1)) begin main_sdram_bankmachine2_trccon_ready <= 1'd1; end end end if (main_sdram_bankmachine2_trascon_valid) begin main_sdram_bankmachine2_trascon_count <= 2'd2; if (1'd0) begin main_sdram_bankmachine2_trascon_ready <= 1'd1; end else begin main_sdram_bankmachine2_trascon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine2_trascon_ready)) begin main_sdram_bankmachine2_trascon_count <= (main_sdram_bankmachine2_trascon_count - 1'd1); if ((main_sdram_bankmachine2_trascon_count == 1'd1)) begin main_sdram_bankmachine2_trascon_ready <= 1'd1; end end end builder_bankmachine2_state <= builder_bankmachine2_next_state; if (main_sdram_bankmachine3_row_close) begin main_sdram_bankmachine3_row_opened <= 1'd0; end else begin if (main_sdram_bankmachine3_row_open) begin main_sdram_bankmachine3_row_opened <= 1'd1; main_sdram_bankmachine3_row <= main_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:9]; end end if (((main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we & main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable) & (~main_sdram_bankmachine3_cmd_buffer_lookahead_replace))) begin main_sdram_bankmachine3_cmd_buffer_lookahead_produce <= (main_sdram_bankmachine3_cmd_buffer_lookahead_produce + 1'd1); end if (main_sdram_bankmachine3_cmd_buffer_lookahead_do_read) begin main_sdram_bankmachine3_cmd_buffer_lookahead_consume <= (main_sdram_bankmachine3_cmd_buffer_lookahead_consume + 1'd1); end if (((main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we & main_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable) & (~main_sdram_bankmachine3_cmd_buffer_lookahead_replace))) begin if ((~main_sdram_bankmachine3_cmd_buffer_lookahead_do_read)) begin main_sdram_bankmachine3_cmd_buffer_lookahead_level <= (main_sdram_bankmachine3_cmd_buffer_lookahead_level + 1'd1); end end else begin if (main_sdram_bankmachine3_cmd_buffer_lookahead_do_read) begin main_sdram_bankmachine3_cmd_buffer_lookahead_level <= (main_sdram_bankmachine3_cmd_buffer_lookahead_level - 1'd1); end end if (((~main_sdram_bankmachine3_cmd_buffer_source_valid) | main_sdram_bankmachine3_cmd_buffer_source_ready)) begin main_sdram_bankmachine3_cmd_buffer_source_valid <= main_sdram_bankmachine3_cmd_buffer_sink_valid; main_sdram_bankmachine3_cmd_buffer_source_first <= main_sdram_bankmachine3_cmd_buffer_sink_first; main_sdram_bankmachine3_cmd_buffer_source_last <= main_sdram_bankmachine3_cmd_buffer_sink_last; main_sdram_bankmachine3_cmd_buffer_source_payload_we <= main_sdram_bankmachine3_cmd_buffer_sink_payload_we; main_sdram_bankmachine3_cmd_buffer_source_payload_addr <= main_sdram_bankmachine3_cmd_buffer_sink_payload_addr; end if (main_sdram_bankmachine3_twtpcon_valid) begin main_sdram_bankmachine3_twtpcon_count <= 2'd3; if (1'd0) begin main_sdram_bankmachine3_twtpcon_ready <= 1'd1; end else begin main_sdram_bankmachine3_twtpcon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine3_twtpcon_ready)) begin main_sdram_bankmachine3_twtpcon_count <= (main_sdram_bankmachine3_twtpcon_count - 1'd1); if ((main_sdram_bankmachine3_twtpcon_count == 1'd1)) begin main_sdram_bankmachine3_twtpcon_ready <= 1'd1; end end end if (main_sdram_bankmachine3_trccon_valid) begin main_sdram_bankmachine3_trccon_count <= 2'd3; if (1'd0) begin main_sdram_bankmachine3_trccon_ready <= 1'd1; end else begin main_sdram_bankmachine3_trccon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine3_trccon_ready)) begin main_sdram_bankmachine3_trccon_count <= (main_sdram_bankmachine3_trccon_count - 1'd1); if ((main_sdram_bankmachine3_trccon_count == 1'd1)) begin main_sdram_bankmachine3_trccon_ready <= 1'd1; end end end if (main_sdram_bankmachine3_trascon_valid) begin main_sdram_bankmachine3_trascon_count <= 2'd2; if (1'd0) begin main_sdram_bankmachine3_trascon_ready <= 1'd1; end else begin main_sdram_bankmachine3_trascon_ready <= 1'd0; end end else begin if ((~main_sdram_bankmachine3_trascon_ready)) begin main_sdram_bankmachine3_trascon_count <= (main_sdram_bankmachine3_trascon_count - 1'd1); if ((main_sdram_bankmachine3_trascon_count == 1'd1)) begin main_sdram_bankmachine3_trascon_ready <= 1'd1; end end end builder_bankmachine3_state <= builder_bankmachine3_next_state; if ((~main_sdram_en0)) begin main_sdram_time0 <= 5'd31; end else begin if ((~main_sdram_max_time0)) begin main_sdram_time0 <= (main_sdram_time0 - 1'd1); end end if ((~main_sdram_en1)) begin main_sdram_time1 <= 4'd15; end else begin if ((~main_sdram_max_time1)) begin main_sdram_time1 <= (main_sdram_time1 - 1'd1); end end if (main_sdram_choose_cmd_ce) begin case (main_sdram_choose_cmd_grant) 1'd0: begin if (main_sdram_choose_cmd_request[1]) begin main_sdram_choose_cmd_grant <= 1'd1; end else begin if (main_sdram_choose_cmd_request[2]) begin main_sdram_choose_cmd_grant <= 2'd2; end else begin if (main_sdram_choose_cmd_request[3]) begin main_sdram_choose_cmd_grant <= 2'd3; end end end end 1'd1: begin if (main_sdram_choose_cmd_request[2]) begin main_sdram_choose_cmd_grant <= 2'd2; end else begin if (main_sdram_choose_cmd_request[3]) begin main_sdram_choose_cmd_grant <= 2'd3; end else begin if (main_sdram_choose_cmd_request[0]) begin main_sdram_choose_cmd_grant <= 1'd0; end end end end 2'd2: begin if (main_sdram_choose_cmd_request[3]) begin main_sdram_choose_cmd_grant <= 2'd3; end else begin if (main_sdram_choose_cmd_request[0]) begin main_sdram_choose_cmd_grant <= 1'd0; end else begin if (main_sdram_choose_cmd_request[1]) begin main_sdram_choose_cmd_grant <= 1'd1; end end end end 2'd3: begin if (main_sdram_choose_cmd_request[0]) begin main_sdram_choose_cmd_grant <= 1'd0; end else begin if (main_sdram_choose_cmd_request[1]) begin main_sdram_choose_cmd_grant <= 1'd1; end else begin if (main_sdram_choose_cmd_request[2]) begin main_sdram_choose_cmd_grant <= 2'd2; end end end end endcase end if (main_sdram_choose_req_ce) begin case (main_sdram_choose_req_grant) 1'd0: begin if (main_sdram_choose_req_request[1]) begin main_sdram_choose_req_grant <= 1'd1; end else begin if (main_sdram_choose_req_request[2]) begin main_sdram_choose_req_grant <= 2'd2; end else begin if (main_sdram_choose_req_request[3]) begin main_sdram_choose_req_grant <= 2'd3; end end end end 1'd1: begin if (main_sdram_choose_req_request[2]) begin main_sdram_choose_req_grant <= 2'd2; end else begin if (main_sdram_choose_req_request[3]) begin main_sdram_choose_req_grant <= 2'd3; end else begin if (main_sdram_choose_req_request[0]) begin main_sdram_choose_req_grant <= 1'd0; end end end end 2'd2: begin if (main_sdram_choose_req_request[3]) begin main_sdram_choose_req_grant <= 2'd3; end else begin if (main_sdram_choose_req_request[0]) begin main_sdram_choose_req_grant <= 1'd0; end else begin if (main_sdram_choose_req_request[1]) begin main_sdram_choose_req_grant <= 1'd1; end end end end 2'd3: begin if (main_sdram_choose_req_request[0]) begin main_sdram_choose_req_grant <= 1'd0; end else begin if (main_sdram_choose_req_request[1]) begin main_sdram_choose_req_grant <= 1'd1; end else begin if (main_sdram_choose_req_request[2]) begin main_sdram_choose_req_grant <= 2'd2; end end end end endcase end main_sdram_dfi_p0_cs_n <= 1'd0; main_sdram_dfi_p0_bank <= builder_sync_rhs_array_muxed0; main_sdram_dfi_p0_address <= builder_sync_rhs_array_muxed1; main_sdram_dfi_p0_cas_n <= (~builder_sync_rhs_array_muxed2); main_sdram_dfi_p0_ras_n <= (~builder_sync_rhs_array_muxed3); main_sdram_dfi_p0_we_n <= (~builder_sync_rhs_array_muxed4); main_sdram_dfi_p0_rddata_en <= builder_sync_rhs_array_muxed5; main_sdram_dfi_p0_wrdata_en <= builder_sync_rhs_array_muxed6; if (main_sdram_trrdcon_valid) begin main_sdram_trrdcon_count <= 1'd0; if (1'd1) begin main_sdram_trrdcon_ready <= 1'd1; end else begin main_sdram_trrdcon_ready <= 1'd0; end end else begin if ((~main_sdram_trrdcon_ready)) begin main_sdram_trrdcon_count <= (main_sdram_trrdcon_count - 1'd1); if ((main_sdram_trrdcon_count == 1'd1)) begin main_sdram_trrdcon_ready <= 1'd1; end end end if (main_sdram_tccdcon_valid) begin main_sdram_tccdcon_count <= 1'd0; if (1'd1) begin main_sdram_tccdcon_ready <= 1'd1; end else begin main_sdram_tccdcon_ready <= 1'd0; end end else begin if ((~main_sdram_tccdcon_ready)) begin main_sdram_tccdcon_count <= (main_sdram_tccdcon_count - 1'd1); if ((main_sdram_tccdcon_count == 1'd1)) begin main_sdram_tccdcon_ready <= 1'd1; end end end if (main_sdram_twtrcon_valid) begin main_sdram_twtrcon_count <= 3'd4; if (1'd0) begin main_sdram_twtrcon_ready <= 1'd1; end else begin main_sdram_twtrcon_ready <= 1'd0; end end else begin if ((~main_sdram_twtrcon_ready)) begin main_sdram_twtrcon_count <= (main_sdram_twtrcon_count - 1'd1); if ((main_sdram_twtrcon_count == 1'd1)) begin main_sdram_twtrcon_ready <= 1'd1; end end end builder_multiplexer_state <= builder_multiplexer_next_state; builder_new_master_wdata_ready <= ((((1'd0 | ((builder_roundrobin0_grant == 1'd0) & main_sdram_interface_bank0_wdata_ready)) | ((builder_roundrobin1_grant == 1'd0) & main_sdram_interface_bank1_wdata_ready)) | ((builder_roundrobin2_grant == 1'd0) & main_sdram_interface_bank2_wdata_ready)) | ((builder_roundrobin3_grant == 1'd0) & main_sdram_interface_bank3_wdata_ready)); builder_new_master_rdata_valid0 <= ((((1'd0 | ((builder_roundrobin0_grant == 1'd0) & main_sdram_interface_bank0_rdata_valid)) | ((builder_roundrobin1_grant == 1'd0) & main_sdram_interface_bank1_rdata_valid)) | ((builder_roundrobin2_grant == 1'd0) & main_sdram_interface_bank2_rdata_valid)) | ((builder_roundrobin3_grant == 1'd0) & main_sdram_interface_bank3_rdata_valid)); builder_new_master_rdata_valid1 <= builder_new_master_rdata_valid0; builder_new_master_rdata_valid2 <= builder_new_master_rdata_valid1; builder_new_master_rdata_valid3 <= builder_new_master_rdata_valid2; main_adr_offset_r <= main_wb_sdram_adr[1:0]; builder_fullmemorywe_state <= builder_fullmemorywe_next_state; if (main_interface_ack) begin main_wishbone_bridge_cmd_consumed <= 1'd0; main_wishbone_bridge_wdata_consumed <= 1'd0; end else begin if ((main_wishbone_bridge_cmd_valid & main_wishbone_bridge_cmd_ready)) begin main_wishbone_bridge_cmd_consumed <= 1'd1; end if ((main_wishbone_bridge_wdata_valid & main_wishbone_bridge_wdata_ready)) begin main_wishbone_bridge_wdata_consumed <= 1'd1; end end builder_litedramwishbone2native_state <= builder_litedramwishbone2native_next_state; if (main_wishbone_bridge_count_litedramwishbone2native_next_value_ce) begin main_wishbone_bridge_count <= main_wishbone_bridge_count_litedramwishbone2native_next_value; end if ((main_wishbone_bridge_wdata_converter_converter_source_valid & main_wishbone_bridge_wdata_converter_converter_source_ready)) begin if (main_wishbone_bridge_wdata_converter_converter_last) begin main_wishbone_bridge_wdata_converter_converter_mux <= 1'd0; end else begin main_wishbone_bridge_wdata_converter_converter_mux <= (main_wishbone_bridge_wdata_converter_converter_mux + 1'd1); end end if (main_wishbone_bridge_rdata_converter_converter_source_ready) begin main_wishbone_bridge_rdata_converter_converter_strobe_all <= 1'd0; end if (main_wishbone_bridge_rdata_converter_converter_load_part) begin if (((main_wishbone_bridge_rdata_converter_converter_demux == 3'd7) | main_wishbone_bridge_rdata_converter_converter_sink_last)) begin main_wishbone_bridge_rdata_converter_converter_demux <= 1'd0; main_wishbone_bridge_rdata_converter_converter_strobe_all <= 1'd1; end else begin main_wishbone_bridge_rdata_converter_converter_demux <= (main_wishbone_bridge_rdata_converter_converter_demux + 1'd1); end end if ((main_wishbone_bridge_rdata_converter_converter_source_valid & main_wishbone_bridge_rdata_converter_converter_source_ready)) begin if ((main_wishbone_bridge_rdata_converter_converter_sink_valid & main_wishbone_bridge_rdata_converter_converter_sink_ready)) begin main_wishbone_bridge_rdata_converter_converter_source_first <= main_wishbone_bridge_rdata_converter_converter_sink_first; main_wishbone_bridge_rdata_converter_converter_source_last <= main_wishbone_bridge_rdata_converter_converter_sink_last; end else begin main_wishbone_bridge_rdata_converter_converter_source_first <= 1'd0; main_wishbone_bridge_rdata_converter_converter_source_last <= 1'd0; end end else begin if ((main_wishbone_bridge_rdata_converter_converter_sink_valid & main_wishbone_bridge_rdata_converter_converter_sink_ready)) begin main_wishbone_bridge_rdata_converter_converter_source_first <= (main_wishbone_bridge_rdata_converter_converter_sink_first | main_wishbone_bridge_rdata_converter_converter_source_first); main_wishbone_bridge_rdata_converter_converter_source_last <= (main_wishbone_bridge_rdata_converter_converter_sink_last | main_wishbone_bridge_rdata_converter_converter_source_last); end end if (main_wishbone_bridge_rdata_converter_converter_load_part) begin case (main_wishbone_bridge_rdata_converter_converter_demux) 1'd0: begin main_wishbone_bridge_rdata_converter_converter_source_payload_data[15:0] <= main_wishbone_bridge_rdata_converter_converter_sink_payload_data; end 1'd1: begin main_wishbone_bridge_rdata_converter_converter_source_payload_data[31:16] <= main_wishbone_bridge_rdata_converter_converter_sink_payload_data; end 2'd2: begin main_wishbone_bridge_rdata_converter_converter_source_payload_data[47:32] <= main_wishbone_bridge_rdata_converter_converter_sink_payload_data; end 2'd3: begin main_wishbone_bridge_rdata_converter_converter_source_payload_data[63:48] <= main_wishbone_bridge_rdata_converter_converter_sink_payload_data; end 3'd4: begin main_wishbone_bridge_rdata_converter_converter_source_payload_data[79:64] <= main_wishbone_bridge_rdata_converter_converter_sink_payload_data; end 3'd5: begin main_wishbone_bridge_rdata_converter_converter_source_payload_data[95:80] <= main_wishbone_bridge_rdata_converter_converter_sink_payload_data; end 3'd6: begin main_wishbone_bridge_rdata_converter_converter_source_payload_data[111:96] <= main_wishbone_bridge_rdata_converter_converter_sink_payload_data; end 3'd7: begin main_wishbone_bridge_rdata_converter_converter_source_payload_data[127:112] <= main_wishbone_bridge_rdata_converter_converter_sink_payload_data; end endcase end if (main_wishbone_bridge_rdata_converter_converter_load_part) begin main_wishbone_bridge_rdata_converter_converter_source_payload_valid_token_count <= (main_wishbone_bridge_rdata_converter_converter_demux + 1'd1); end if (main_done) begin main_chaser <= {main_chaser, (~main_chaser[7])}; end if (main_re) begin main_mode <= 1'd1; end if (main_wait) begin if ((~main_done)) begin main_count <= (main_count - 1'd1); end end else begin main_count <= 22'd3125000; end soclinux_clk_divider1 <= (soclinux_clk_divider1 + 1'd1); if (soclinux_clk_rise) begin spisdcard_clk <= soclinux_clk_enable; end else begin if (soclinux_clk_fall) begin soclinux_clk_divider1 <= 1'd0; spisdcard_clk <= 1'd0; end end spisdcard_cs_n <= ((~soclinux_cs) | (~soclinux_cs_enable)); if (soclinux_mosi_latch) begin soclinux_mosi_data <= soclinux_mosi; soclinux_mosi_sel <= 3'd7; end else begin if (soclinux_clk_fall) begin if (soclinux_cs_enable) begin spisdcard_mosi <= builder_sync_f_array_muxed; end soclinux_mosi_sel <= (soclinux_mosi_sel - 1'd1); end end if (soclinux_clk_rise) begin if (soclinux_loopback) begin soclinux_miso_data <= {soclinux_miso_data, spisdcard_mosi}; end else begin soclinux_miso_data <= {soclinux_miso_data, spisdcard_miso}; end end if (soclinux_miso_latch) begin soclinux_miso <= soclinux_miso_data; end builder_spimaster_state <= builder_spimaster_next_state; if (soclinux_count_spimaster_next_value_ce) begin soclinux_count <= soclinux_count_spimaster_next_value; end builder_state <= builder_next_state; if (builder_soclinux_dat_w_next_value_ce0) begin builder_soclinux_dat_w <= builder_soclinux_dat_w_next_value0; end if (builder_soclinux_adr_next_value_ce1) begin builder_soclinux_adr <= builder_soclinux_adr_next_value1; end if (builder_soclinux_we_next_value_ce2) begin builder_soclinux_we <= builder_soclinux_we_next_value2; end case (builder_grant) 1'd0: begin if ((~builder_request[0])) begin if (builder_request[1]) begin builder_grant <= 1'd1; end end end 1'd1: begin if ((~builder_request[1])) begin if (builder_request[0]) begin builder_grant <= 1'd0; end end end endcase builder_slave_sel_r <= builder_slave_sel; if (builder_wait) begin if ((~builder_done)) begin builder_count <= (builder_count - 1'd1); end end else begin builder_count <= 20'd1000000; end builder_csr_bankarray_interface0_bank_bus_dat_r <= 1'd0; if (builder_csr_bankarray_csrbank0_sel) begin case (builder_csr_bankarray_interface0_bank_bus_adr[4:0]) 1'd0: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= main_soclinux_cpu_latch_w; end 1'd1: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time7_w; end 2'd2: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time6_w; end 2'd3: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time5_w; end 3'd4: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time4_w; end 3'd5: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time3_w; end 3'd6: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time2_w; end 3'd7: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time1_w; end 4'd8: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time0_w; end 4'd9: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time_cmp7_w; end 4'd10: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time_cmp6_w; end 4'd11: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time_cmp5_w; end 4'd12: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time_cmp4_w; end 4'd13: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time_cmp3_w; end 4'd14: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time_cmp2_w; end 4'd15: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time_cmp1_w; end 5'd16: begin builder_csr_bankarray_interface0_bank_bus_dat_r <= builder_csr_bankarray_csrbank0_timer_time_cmp0_w; end endcase end if (builder_csr_bankarray_csrbank0_timer_time_cmp7_re) begin main_soclinux_cpu_time_cmp_storage[63:56] <= builder_csr_bankarray_csrbank0_timer_time_cmp7_r; end if (builder_csr_bankarray_csrbank0_timer_time_cmp6_re) begin main_soclinux_cpu_time_cmp_storage[55:48] <= builder_csr_bankarray_csrbank0_timer_time_cmp6_r; end if (builder_csr_bankarray_csrbank0_timer_time_cmp5_re) begin main_soclinux_cpu_time_cmp_storage[47:40] <= builder_csr_bankarray_csrbank0_timer_time_cmp5_r; end if (builder_csr_bankarray_csrbank0_timer_time_cmp4_re) begin main_soclinux_cpu_time_cmp_storage[39:32] <= builder_csr_bankarray_csrbank0_timer_time_cmp4_r; end if (builder_csr_bankarray_csrbank0_timer_time_cmp3_re) begin main_soclinux_cpu_time_cmp_storage[31:24] <= builder_csr_bankarray_csrbank0_timer_time_cmp3_r; end if (builder_csr_bankarray_csrbank0_timer_time_cmp2_re) begin main_soclinux_cpu_time_cmp_storage[23:16] <= builder_csr_bankarray_csrbank0_timer_time_cmp2_r; end if (builder_csr_bankarray_csrbank0_timer_time_cmp1_re) begin main_soclinux_cpu_time_cmp_storage[15:8] <= builder_csr_bankarray_csrbank0_timer_time_cmp1_r; end if (builder_csr_bankarray_csrbank0_timer_time_cmp0_re) begin main_soclinux_cpu_time_cmp_storage[7:0] <= builder_csr_bankarray_csrbank0_timer_time_cmp0_r; end main_soclinux_cpu_time_cmp_re <= builder_csr_bankarray_csrbank0_timer_time_cmp0_re; builder_csr_bankarray_interface1_bank_bus_dat_r <= 1'd0; if (builder_csr_bankarray_csrbank1_sel) begin case (builder_csr_bankarray_interface1_bank_bus_adr[3:0]) 1'd0: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_reset0_w; end 1'd1: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_scratch3_w; end 2'd2: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_scratch2_w; end 2'd3: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_scratch1_w; end 3'd4: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_scratch0_w; end 3'd5: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_bus_errors3_w; end 3'd6: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_bus_errors2_w; end 3'd7: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_bus_errors1_w; end 4'd8: begin builder_csr_bankarray_interface1_bank_bus_dat_r <= builder_csr_bankarray_csrbank1_bus_errors0_w; end endcase end if (builder_csr_bankarray_csrbank1_reset0_re) begin main_soclinux_soccontroller_reset_storage <= builder_csr_bankarray_csrbank1_reset0_r; end main_soclinux_soccontroller_reset_re <= builder_csr_bankarray_csrbank1_reset0_re; if (builder_csr_bankarray_csrbank1_scratch3_re) begin main_soclinux_soccontroller_scratch_storage[31:24] <= builder_csr_bankarray_csrbank1_scratch3_r; end if (builder_csr_bankarray_csrbank1_scratch2_re) begin main_soclinux_soccontroller_scratch_storage[23:16] <= builder_csr_bankarray_csrbank1_scratch2_r; end if (builder_csr_bankarray_csrbank1_scratch1_re) begin main_soclinux_soccontroller_scratch_storage[15:8] <= builder_csr_bankarray_csrbank1_scratch1_r; end if (builder_csr_bankarray_csrbank1_scratch0_re) begin main_soclinux_soccontroller_scratch_storage[7:0] <= builder_csr_bankarray_csrbank1_scratch0_r; end main_soclinux_soccontroller_scratch_re <= builder_csr_bankarray_csrbank1_scratch0_re; builder_csr_bankarray_sel_r <= builder_csr_bankarray_sel; builder_csr_bankarray_interface2_bank_bus_dat_r <= 1'd0; if (builder_csr_bankarray_csrbank2_sel) begin case (builder_csr_bankarray_interface2_bank_bus_adr[0]) 1'd0: begin builder_csr_bankarray_interface2_bank_bus_dat_r <= builder_csr_bankarray_csrbank2_out0_w; end endcase end if (builder_csr_bankarray_csrbank2_out0_re) begin main_storage[7:0] <= builder_csr_bankarray_csrbank2_out0_r; end main_re <= builder_csr_bankarray_csrbank2_out0_re; builder_csr_bankarray_interface3_bank_bus_dat_r <= 1'd0; if (builder_csr_bankarray_csrbank3_sel) begin case (builder_csr_bankarray_interface3_bank_bus_adr[3:0]) 1'd0: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_control0_w; end 1'd1: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_pi0_command0_w; end 2'd2: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= main_sdram_command_issue_w; end 2'd3: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_pi0_address1_w; end 3'd4: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_pi0_address0_w; end 3'd5: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_w; end 3'd6: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_w; end 3'd7: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_w; end 4'd8: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_pi0_rddata1_w; end 4'd9: begin builder_csr_bankarray_interface3_bank_bus_dat_r <= builder_csr_bankarray_csrbank3_dfii_pi0_rddata0_w; end endcase end if (builder_csr_bankarray_csrbank3_dfii_control0_re) begin main_sdram_storage[3:0] <= builder_csr_bankarray_csrbank3_dfii_control0_r; end main_sdram_re <= builder_csr_bankarray_csrbank3_dfii_control0_re; if (builder_csr_bankarray_csrbank3_dfii_pi0_command0_re) begin main_sdram_command_storage[5:0] <= builder_csr_bankarray_csrbank3_dfii_pi0_command0_r; end main_sdram_command_re <= builder_csr_bankarray_csrbank3_dfii_pi0_command0_re; if (builder_csr_bankarray_csrbank3_dfii_pi0_address1_re) begin main_sdram_address_storage[12:8] <= builder_csr_bankarray_csrbank3_dfii_pi0_address1_r; end if (builder_csr_bankarray_csrbank3_dfii_pi0_address0_re) begin main_sdram_address_storage[7:0] <= builder_csr_bankarray_csrbank3_dfii_pi0_address0_r; end main_sdram_address_re <= builder_csr_bankarray_csrbank3_dfii_pi0_address0_re; if (builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_re) begin main_sdram_baddress_storage[1:0] <= builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_r; end main_sdram_baddress_re <= builder_csr_bankarray_csrbank3_dfii_pi0_baddress0_re; if (builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_re) begin main_sdram_wrdata_storage[15:8] <= builder_csr_bankarray_csrbank3_dfii_pi0_wrdata1_r; end if (builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_re) begin main_sdram_wrdata_storage[7:0] <= builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_r; end main_sdram_wrdata_re <= builder_csr_bankarray_csrbank3_dfii_pi0_wrdata0_re; builder_csr_bankarray_interface4_bank_bus_dat_r <= 1'd0; if (builder_csr_bankarray_csrbank4_sel) begin case (builder_csr_bankarray_interface4_bank_bus_adr[3:0]) 1'd0: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_control1_w; end 1'd1: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_control0_w; end 2'd2: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_status_w; end 2'd3: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_mosi0_w; end 3'd4: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_miso_w; end 3'd5: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_cs0_w; end 3'd6: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_loopback0_w; end 3'd7: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_clk_divider1_w; end 4'd8: begin builder_csr_bankarray_interface4_bank_bus_dat_r <= builder_csr_bankarray_csrbank4_clk_divider0_w; end endcase end if (builder_csr_bankarray_csrbank4_control1_re) begin soclinux_control_storage[15:8] <= builder_csr_bankarray_csrbank4_control1_r; end if (builder_csr_bankarray_csrbank4_control0_re) begin soclinux_control_storage[7:0] <= builder_csr_bankarray_csrbank4_control0_r; end soclinux_control_re <= builder_csr_bankarray_csrbank4_control0_re; if (builder_csr_bankarray_csrbank4_mosi0_re) begin soclinux_mosi_storage[7:0] <= builder_csr_bankarray_csrbank4_mosi0_r; end soclinux_mosi_re <= builder_csr_bankarray_csrbank4_mosi0_re; if (builder_csr_bankarray_csrbank4_cs0_re) begin soclinux_cs_storage <= builder_csr_bankarray_csrbank4_cs0_r; end soclinux_cs_re <= builder_csr_bankarray_csrbank4_cs0_re; if (builder_csr_bankarray_csrbank4_loopback0_re) begin soclinux_loopback_storage <= builder_csr_bankarray_csrbank4_loopback0_r; end soclinux_loopback_re <= builder_csr_bankarray_csrbank4_loopback0_re; if (builder_csr_bankarray_csrbank4_clk_divider1_re) begin soclinux_storage[15:8] <= builder_csr_bankarray_csrbank4_clk_divider1_r; end if (builder_csr_bankarray_csrbank4_clk_divider0_re) begin soclinux_storage[7:0] <= builder_csr_bankarray_csrbank4_clk_divider0_r; end soclinux_re <= builder_csr_bankarray_csrbank4_clk_divider0_re; builder_csr_bankarray_interface5_bank_bus_dat_r <= 1'd0; if (builder_csr_bankarray_csrbank5_sel) begin case (builder_csr_bankarray_interface5_bank_bus_adr[4:0]) 1'd0: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_load3_w; end 1'd1: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_load2_w; end 2'd2: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_load1_w; end 2'd3: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_load0_w; end 3'd4: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_reload3_w; end 3'd5: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_reload2_w; end 3'd6: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_reload1_w; end 3'd7: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_reload0_w; end 4'd8: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_en0_w; end 4'd9: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_update_value0_w; end 4'd10: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_value3_w; end 4'd11: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_value2_w; end 4'd12: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_value1_w; end 4'd13: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_value0_w; end 4'd14: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= main_soclinux_timer_eventmanager_status_w; end 4'd15: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= main_soclinux_timer_eventmanager_pending_w; end 5'd16: begin builder_csr_bankarray_interface5_bank_bus_dat_r <= builder_csr_bankarray_csrbank5_ev_enable0_w; end endcase end if (builder_csr_bankarray_csrbank5_load3_re) begin main_soclinux_timer_load_storage[31:24] <= builder_csr_bankarray_csrbank5_load3_r; end if (builder_csr_bankarray_csrbank5_load2_re) begin main_soclinux_timer_load_storage[23:16] <= builder_csr_bankarray_csrbank5_load2_r; end if (builder_csr_bankarray_csrbank5_load1_re) begin main_soclinux_timer_load_storage[15:8] <= builder_csr_bankarray_csrbank5_load1_r; end if (builder_csr_bankarray_csrbank5_load0_re) begin main_soclinux_timer_load_storage[7:0] <= builder_csr_bankarray_csrbank5_load0_r; end main_soclinux_timer_load_re <= builder_csr_bankarray_csrbank5_load0_re; if (builder_csr_bankarray_csrbank5_reload3_re) begin main_soclinux_timer_reload_storage[31:24] <= builder_csr_bankarray_csrbank5_reload3_r; end if (builder_csr_bankarray_csrbank5_reload2_re) begin main_soclinux_timer_reload_storage[23:16] <= builder_csr_bankarray_csrbank5_reload2_r; end if (builder_csr_bankarray_csrbank5_reload1_re) begin main_soclinux_timer_reload_storage[15:8] <= builder_csr_bankarray_csrbank5_reload1_r; end if (builder_csr_bankarray_csrbank5_reload0_re) begin main_soclinux_timer_reload_storage[7:0] <= builder_csr_bankarray_csrbank5_reload0_r; end main_soclinux_timer_reload_re <= builder_csr_bankarray_csrbank5_reload0_re; if (builder_csr_bankarray_csrbank5_en0_re) begin main_soclinux_timer_en_storage <= builder_csr_bankarray_csrbank5_en0_r; end main_soclinux_timer_en_re <= builder_csr_bankarray_csrbank5_en0_re; if (builder_csr_bankarray_csrbank5_update_value0_re) begin main_soclinux_timer_update_value_storage <= builder_csr_bankarray_csrbank5_update_value0_r; end main_soclinux_timer_update_value_re <= builder_csr_bankarray_csrbank5_update_value0_re; if (builder_csr_bankarray_csrbank5_ev_enable0_re) begin main_soclinux_timer_eventmanager_storage <= builder_csr_bankarray_csrbank5_ev_enable0_r; end main_soclinux_timer_eventmanager_re <= builder_csr_bankarray_csrbank5_ev_enable0_re; builder_csr_bankarray_interface6_bank_bus_dat_r <= 1'd0; if (builder_csr_bankarray_csrbank6_sel) begin case (builder_csr_bankarray_interface6_bank_bus_adr[2:0]) 1'd0: begin builder_csr_bankarray_interface6_bank_bus_dat_r <= main_soclinux_uart_rxtx_w; end 1'd1: begin builder_csr_bankarray_interface6_bank_bus_dat_r <= builder_csr_bankarray_csrbank6_txfull_w; end 2'd2: begin builder_csr_bankarray_interface6_bank_bus_dat_r <= builder_csr_bankarray_csrbank6_rxempty_w; end 2'd3: begin builder_csr_bankarray_interface6_bank_bus_dat_r <= main_soclinux_uart_eventmanager_status_w; end 3'd4: begin builder_csr_bankarray_interface6_bank_bus_dat_r <= main_soclinux_uart_eventmanager_pending_w; end 3'd5: begin builder_csr_bankarray_interface6_bank_bus_dat_r <= builder_csr_bankarray_csrbank6_ev_enable0_w; end 3'd6: begin builder_csr_bankarray_interface6_bank_bus_dat_r <= builder_csr_bankarray_csrbank6_txempty_w; end 3'd7: begin builder_csr_bankarray_interface6_bank_bus_dat_r <= builder_csr_bankarray_csrbank6_rxfull_w; end endcase end if (builder_csr_bankarray_csrbank6_ev_enable0_re) begin main_soclinux_uart_eventmanager_storage[1:0] <= builder_csr_bankarray_csrbank6_ev_enable0_r; end main_soclinux_uart_eventmanager_re <= builder_csr_bankarray_csrbank6_ev_enable0_re; builder_csr_bankarray_interface7_bank_bus_dat_r <= 1'd0; if (builder_csr_bankarray_csrbank7_sel) begin case (builder_csr_bankarray_interface7_bank_bus_adr[1:0]) 1'd0: begin builder_csr_bankarray_interface7_bank_bus_dat_r <= builder_csr_bankarray_csrbank7_tuning_word3_w; end 1'd1: begin builder_csr_bankarray_interface7_bank_bus_dat_r <= builder_csr_bankarray_csrbank7_tuning_word2_w; end 2'd2: begin builder_csr_bankarray_interface7_bank_bus_dat_r <= builder_csr_bankarray_csrbank7_tuning_word1_w; end 2'd3: begin builder_csr_bankarray_interface7_bank_bus_dat_r <= builder_csr_bankarray_csrbank7_tuning_word0_w; end endcase end if (builder_csr_bankarray_csrbank7_tuning_word3_re) begin main_soclinux_storage[31:24] <= builder_csr_bankarray_csrbank7_tuning_word3_r; end if (builder_csr_bankarray_csrbank7_tuning_word2_re) begin main_soclinux_storage[23:16] <= builder_csr_bankarray_csrbank7_tuning_word2_r; end if (builder_csr_bankarray_csrbank7_tuning_word1_re) begin main_soclinux_storage[15:8] <= builder_csr_bankarray_csrbank7_tuning_word1_r; end if (builder_csr_bankarray_csrbank7_tuning_word0_re) begin main_soclinux_storage[7:0] <= builder_csr_bankarray_csrbank7_tuning_word0_r; end main_soclinux_re <= builder_csr_bankarray_csrbank7_tuning_word0_re; if (sys_rst) begin main_soclinux_soccontroller_reset_storage <= 1'd0; main_soclinux_soccontroller_reset_re <= 1'd0; main_soclinux_soccontroller_scratch_storage <= 32'd305419896; main_soclinux_soccontroller_scratch_re <= 1'd0; main_soclinux_soccontroller_bus_errors <= 32'd0; main_soclinux_cpu_time_status <= 64'd0; main_soclinux_cpu_time_cmp_storage <= 64'd18446744073709551615; main_soclinux_cpu_time_cmp_re <= 1'd0; main_soclinux_cpu_time <= 64'd0; main_soclinux_cpu_time_cmp <= 64'd18446744073709551615; main_soclinux_soclinux_ram_bus_ack <= 1'd0; main_soclinux_ram_bus_ram_bus_ack <= 1'd0; serial_tx <= 1'd1; main_soclinux_storage <= 32'd85899345; main_soclinux_re <= 1'd0; main_soclinux_sink_ready <= 1'd0; main_soclinux_tx_clken <= 1'd0; main_soclinux_tx_busy <= 1'd0; main_soclinux_source_valid <= 1'd0; main_soclinux_source_payload_data <= 8'd0; main_soclinux_rx_clken <= 1'd0; main_soclinux_rx_r <= 1'd0; main_soclinux_rx_busy <= 1'd0; main_soclinux_uart_tx_pending <= 1'd0; main_soclinux_uart_tx_old_trigger <= 1'd0; main_soclinux_uart_rx_pending <= 1'd0; main_soclinux_uart_rx_old_trigger <= 1'd0; main_soclinux_uart_eventmanager_storage <= 2'd0; main_soclinux_uart_eventmanager_re <= 1'd0; main_soclinux_uart_tx_fifo_readable <= 1'd0; main_soclinux_uart_tx_fifo_level0 <= 5'd0; main_soclinux_uart_tx_fifo_produce <= 4'd0; main_soclinux_uart_tx_fifo_consume <= 4'd0; main_soclinux_uart_rx_fifo_readable <= 1'd0; main_soclinux_uart_rx_fifo_level0 <= 5'd0; main_soclinux_uart_rx_fifo_produce <= 4'd0; main_soclinux_uart_rx_fifo_consume <= 4'd0; main_soclinux_timer_load_storage <= 32'd0; main_soclinux_timer_load_re <= 1'd0; main_soclinux_timer_reload_storage <= 32'd0; main_soclinux_timer_reload_re <= 1'd0; main_soclinux_timer_en_storage <= 1'd0; main_soclinux_timer_en_re <= 1'd0; main_soclinux_timer_update_value_storage <= 1'd0; main_soclinux_timer_update_value_re <= 1'd0; main_soclinux_timer_value_status <= 32'd0; main_soclinux_timer_zero_pending <= 1'd0; main_soclinux_timer_zero_old_trigger <= 1'd0; main_soclinux_timer_eventmanager_storage <= 1'd0; main_soclinux_timer_eventmanager_re <= 1'd0; main_soclinux_timer_value <= 32'd0; main_dfi_p0_rddata_valid <= 1'd0; main_rddata_en <= 3'd0; main_sdram_storage <= 4'd1; main_sdram_re <= 1'd0; main_sdram_command_storage <= 6'd0; main_sdram_command_re <= 1'd0; main_sdram_address_re <= 1'd0; main_sdram_baddress_re <= 1'd0; main_sdram_wrdata_re <= 1'd0; main_sdram_rddata_status <= 16'd0; main_sdram_dfi_p0_address <= 13'd0; main_sdram_dfi_p0_bank <= 2'd0; main_sdram_dfi_p0_cas_n <= 1'd1; main_sdram_dfi_p0_cs_n <= 1'd1; main_sdram_dfi_p0_ras_n <= 1'd1; main_sdram_dfi_p0_we_n <= 1'd1; main_sdram_dfi_p0_wrdata_en <= 1'd0; main_sdram_dfi_p0_rddata_en <= 1'd0; main_sdram_cmd_payload_a <= 13'd0; main_sdram_cmd_payload_ba <= 2'd0; main_sdram_cmd_payload_cas <= 1'd0; main_sdram_cmd_payload_ras <= 1'd0; main_sdram_cmd_payload_we <= 1'd0; main_sdram_timer_count1 <= 9'd390; main_sdram_postponer_req_o <= 1'd0; main_sdram_postponer_count <= 1'd0; main_sdram_sequencer_done1 <= 1'd0; main_sdram_sequencer_counter <= 3'd0; main_sdram_sequencer_count <= 1'd0; main_sdram_bankmachine0_cmd_buffer_lookahead_level <= 4'd0; main_sdram_bankmachine0_cmd_buffer_lookahead_produce <= 3'd0; main_sdram_bankmachine0_cmd_buffer_lookahead_consume <= 3'd0; main_sdram_bankmachine0_cmd_buffer_source_valid <= 1'd0; main_sdram_bankmachine0_cmd_buffer_source_payload_we <= 1'd0; main_sdram_bankmachine0_cmd_buffer_source_payload_addr <= 22'd0; main_sdram_bankmachine0_row <= 13'd0; main_sdram_bankmachine0_row_opened <= 1'd0; main_sdram_bankmachine0_twtpcon_ready <= 1'd0; main_sdram_bankmachine0_twtpcon_count <= 2'd0; main_sdram_bankmachine0_trccon_ready <= 1'd0; main_sdram_bankmachine0_trccon_count <= 2'd0; main_sdram_bankmachine0_trascon_ready <= 1'd0; main_sdram_bankmachine0_trascon_count <= 2'd0; main_sdram_bankmachine1_cmd_buffer_lookahead_level <= 4'd0; main_sdram_bankmachine1_cmd_buffer_lookahead_produce <= 3'd0; main_sdram_bankmachine1_cmd_buffer_lookahead_consume <= 3'd0; main_sdram_bankmachine1_cmd_buffer_source_valid <= 1'd0; main_sdram_bankmachine1_cmd_buffer_source_payload_we <= 1'd0; main_sdram_bankmachine1_cmd_buffer_source_payload_addr <= 22'd0; main_sdram_bankmachine1_row <= 13'd0; main_sdram_bankmachine1_row_opened <= 1'd0; main_sdram_bankmachine1_twtpcon_ready <= 1'd0; main_sdram_bankmachine1_twtpcon_count <= 2'd0; main_sdram_bankmachine1_trccon_ready <= 1'd0; main_sdram_bankmachine1_trccon_count <= 2'd0; main_sdram_bankmachine1_trascon_ready <= 1'd0; main_sdram_bankmachine1_trascon_count <= 2'd0; main_sdram_bankmachine2_cmd_buffer_lookahead_level <= 4'd0; main_sdram_bankmachine2_cmd_buffer_lookahead_produce <= 3'd0; main_sdram_bankmachine2_cmd_buffer_lookahead_consume <= 3'd0; main_sdram_bankmachine2_cmd_buffer_source_valid <= 1'd0; main_sdram_bankmachine2_cmd_buffer_source_payload_we <= 1'd0; main_sdram_bankmachine2_cmd_buffer_source_payload_addr <= 22'd0; main_sdram_bankmachine2_row <= 13'd0; main_sdram_bankmachine2_row_opened <= 1'd0; main_sdram_bankmachine2_twtpcon_ready <= 1'd0; main_sdram_bankmachine2_twtpcon_count <= 2'd0; main_sdram_bankmachine2_trccon_ready <= 1'd0; main_sdram_bankmachine2_trccon_count <= 2'd0; main_sdram_bankmachine2_trascon_ready <= 1'd0; main_sdram_bankmachine2_trascon_count <= 2'd0; main_sdram_bankmachine3_cmd_buffer_lookahead_level <= 4'd0; main_sdram_bankmachine3_cmd_buffer_lookahead_produce <= 3'd0; main_sdram_bankmachine3_cmd_buffer_lookahead_consume <= 3'd0; main_sdram_bankmachine3_cmd_buffer_source_valid <= 1'd0; main_sdram_bankmachine3_cmd_buffer_source_payload_we <= 1'd0; main_sdram_bankmachine3_cmd_buffer_source_payload_addr <= 22'd0; main_sdram_bankmachine3_row <= 13'd0; main_sdram_bankmachine3_row_opened <= 1'd0; main_sdram_bankmachine3_twtpcon_ready <= 1'd0; main_sdram_bankmachine3_twtpcon_count <= 2'd0; main_sdram_bankmachine3_trccon_ready <= 1'd0; main_sdram_bankmachine3_trccon_count <= 2'd0; main_sdram_bankmachine3_trascon_ready <= 1'd0; main_sdram_bankmachine3_trascon_count <= 2'd0; main_sdram_choose_cmd_grant <= 2'd0; main_sdram_choose_req_grant <= 2'd0; main_sdram_trrdcon_ready <= 1'd0; main_sdram_trrdcon_count <= 1'd0; main_sdram_tccdcon_ready <= 1'd0; main_sdram_tccdcon_count <= 1'd0; main_sdram_twtrcon_ready <= 1'd0; main_sdram_twtrcon_count <= 3'd0; main_sdram_time0 <= 5'd0; main_sdram_time1 <= 4'd0; main_wishbone_bridge_count <= 3'd0; main_wishbone_bridge_wdata_converter_converter_mux <= 3'd0; main_wishbone_bridge_rdata_converter_converter_source_payload_data <= 128'd0; main_wishbone_bridge_rdata_converter_converter_source_payload_valid_token_count <= 4'd0; main_wishbone_bridge_rdata_converter_converter_demux <= 3'd0; main_wishbone_bridge_rdata_converter_converter_strobe_all <= 1'd0; main_wishbone_bridge_cmd_consumed <= 1'd0; main_wishbone_bridge_wdata_consumed <= 1'd0; main_storage <= 8'd0; main_re <= 1'd0; main_chaser <= 8'd0; main_mode <= 1'd0; main_count <= 22'd3125000; spisdcard_clk <= 1'd0; spisdcard_mosi <= 1'd0; spisdcard_cs_n <= 1'd0; soclinux_miso <= 8'd0; soclinux_control_storage <= 16'd0; soclinux_control_re <= 1'd0; soclinux_mosi_re <= 1'd0; soclinux_cs_storage <= 1'd1; soclinux_cs_re <= 1'd0; soclinux_loopback_storage <= 1'd0; soclinux_loopback_re <= 1'd0; soclinux_count <= 3'd0; soclinux_clk_divider1 <= 16'd0; soclinux_mosi_data <= 8'd0; soclinux_mosi_sel <= 3'd0; soclinux_miso_data <= 8'd0; soclinux_storage <= 16'd125; soclinux_re <= 1'd0; builder_refresher_state <= 2'd0; builder_bankmachine0_state <= 3'd0; builder_bankmachine1_state <= 3'd0; builder_bankmachine2_state <= 3'd0; builder_bankmachine3_state <= 3'd0; builder_multiplexer_state <= 3'd0; builder_new_master_wdata_ready <= 1'd0; builder_new_master_rdata_valid0 <= 1'd0; builder_new_master_rdata_valid1 <= 1'd0; builder_new_master_rdata_valid2 <= 1'd0; builder_new_master_rdata_valid3 <= 1'd0; builder_fullmemorywe_state <= 2'd0; builder_litedramwishbone2native_state <= 1'd0; builder_spimaster_state <= 2'd0; builder_soclinux_we <= 1'd0; builder_grant <= 1'd0; builder_slave_sel_r <= 4'd0; builder_count <= 20'd1000000; builder_csr_bankarray_sel_r <= 1'd0; builder_state <= 2'd0; end builder_regs0 <= serial_rx; builder_regs1 <= builder_regs0; end //reg [31:0] mem[0:16383]; reg [31:0] mem[0:10239]; reg [31:0] memdat; always @(posedge sys_clk) begin memdat <= mem[main_soclinux_soclinux_adr]; end assign main_soclinux_soclinux_dat_r = memdat; initial begin $readmemh("mem.init", mem); end reg [31:0] mem_1[0:2047]; reg [10:0] memadr; always @(posedge sys_clk) begin if (main_soclinux_ram_we[0]) mem_1[main_soclinux_ram_adr][7:0] <= main_soclinux_ram_dat_w[7:0]; if (main_soclinux_ram_we[1]) mem_1[main_soclinux_ram_adr][15:8] <= main_soclinux_ram_dat_w[15:8]; if (main_soclinux_ram_we[2]) mem_1[main_soclinux_ram_adr][23:16] <= main_soclinux_ram_dat_w[23:16]; if (main_soclinux_ram_we[3]) mem_1[main_soclinux_ram_adr][31:24] <= main_soclinux_ram_dat_w[31:24]; memadr <= main_soclinux_ram_adr; end assign main_soclinux_ram_dat_r = mem_1[memadr]; initial begin $readmemh("mem_1.init", mem_1); end reg [7:0] mem_2[0:38]; reg [5:0] memadr_1; always @(posedge sys_clk) begin memadr_1 <= builder_csr_bankarray_adr; end assign builder_csr_bankarray_dat_r = mem_2[memadr_1]; initial begin $readmemh("mem_2.init", mem_2); end reg [9:0] storage[0:15]; reg [9:0] memdat_1; reg [9:0] memdat_2; always @(posedge sys_clk) begin if (main_soclinux_uart_tx_fifo_wrport_we) storage[main_soclinux_uart_tx_fifo_wrport_adr] <= main_soclinux_uart_tx_fifo_wrport_dat_w; memdat_1 <= storage[main_soclinux_uart_tx_fifo_wrport_adr]; end always @(posedge sys_clk) begin if (main_soclinux_uart_tx_fifo_rdport_re) memdat_2 <= storage[main_soclinux_uart_tx_fifo_rdport_adr]; end assign main_soclinux_uart_tx_fifo_wrport_dat_r = memdat_1; assign main_soclinux_uart_tx_fifo_rdport_dat_r = memdat_2; reg [9:0] storage_1[0:15]; reg [9:0] memdat_3; reg [9:0] memdat_4; always @(posedge sys_clk) begin if (main_soclinux_uart_rx_fifo_wrport_we) storage_1[main_soclinux_uart_rx_fifo_wrport_adr] <= main_soclinux_uart_rx_fifo_wrport_dat_w; memdat_3 <= storage_1[main_soclinux_uart_rx_fifo_wrport_adr]; end always @(posedge sys_clk) begin if (main_soclinux_uart_rx_fifo_rdport_re) memdat_4 <= storage_1[main_soclinux_uart_rx_fifo_rdport_adr]; end assign main_soclinux_uart_rx_fifo_wrport_dat_r = memdat_3; assign main_soclinux_uart_rx_fifo_rdport_dat_r = memdat_4; reg [24:0] storage_2[0:7]; reg [24:0] memdat_5; always @(posedge sys_clk) begin if (main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_we) storage_2[main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr] <= main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_w; memdat_5 <= storage_2[main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr]; end always @(posedge sys_clk) begin end assign main_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_r = memdat_5; assign main_sdram_bankmachine0_cmd_buffer_lookahead_rdport_dat_r = storage_2[main_sdram_bankmachine0_cmd_buffer_lookahead_rdport_adr]; reg [24:0] storage_3[0:7]; reg [24:0] memdat_6; always @(posedge sys_clk) begin if (main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_we) storage_3[main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr] <= main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_w; memdat_6 <= storage_3[main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr]; end always @(posedge sys_clk) begin end assign main_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_r = memdat_6; assign main_sdram_bankmachine1_cmd_buffer_lookahead_rdport_dat_r = storage_3[main_sdram_bankmachine1_cmd_buffer_lookahead_rdport_adr]; reg [24:0] storage_4[0:7]; reg [24:0] memdat_7; always @(posedge sys_clk) begin if (main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_we) storage_4[main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr] <= main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_w; memdat_7 <= storage_4[main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr]; end always @(posedge sys_clk) begin end assign main_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_r = memdat_7; assign main_sdram_bankmachine2_cmd_buffer_lookahead_rdport_dat_r = storage_4[main_sdram_bankmachine2_cmd_buffer_lookahead_rdport_adr]; reg [24:0] storage_5[0:7]; reg [24:0] memdat_8; always @(posedge sys_clk) begin if (main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_we) storage_5[main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr] <= main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_w; memdat_8 <= storage_5[main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr]; end always @(posedge sys_clk) begin end assign main_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_r = memdat_8; assign main_sdram_bankmachine3_cmd_buffer_lookahead_rdport_dat_r = storage_5[main_sdram_bankmachine3_cmd_buffer_lookahead_rdport_adr]; reg [23:0] tag_mem[0:511]; reg [8:0] memadr_2; always @(posedge sys_clk) begin if (main_tag_port_we) tag_mem[main_tag_port_adr] <= main_tag_port_dat_w; memadr_2 <= main_tag_port_adr; end assign main_tag_port_dat_r = tag_mem[memadr_2]; VexRiscv VexRiscv( .clk(sys_clk), .dBusWishbone_ACK(main_soclinux_cpu_dbus_ack), .dBusWishbone_DAT_MISO(main_soclinux_cpu_dbus_dat_r), .dBusWishbone_ERR(main_soclinux_cpu_dbus_err), .externalInterruptArray(main_soclinux_cpu_interrupt0), .externalResetVector(main_soclinux_vexriscv), .iBusWishbone_ACK(main_soclinux_cpu_ibus_ack), .iBusWishbone_DAT_MISO(main_soclinux_cpu_ibus_dat_r), .iBusWishbone_ERR(main_soclinux_cpu_ibus_err), .reset((sys_rst | main_soclinux_cpu_reset)), .softwareInterrupt(1'd0), .timerInterrupt(main_soclinux_cpu_interrupt1), .dBusWishbone_ADR(main_soclinux_cpu_dbus_adr), .dBusWishbone_BTE(main_soclinux_cpu_dbus_bte), .dBusWishbone_CTI(main_soclinux_cpu_dbus_cti), .dBusWishbone_CYC(main_soclinux_cpu_dbus_cyc), .dBusWishbone_DAT_MOSI(main_soclinux_cpu_dbus_dat_w), .dBusWishbone_SEL(main_soclinux_cpu_dbus_sel), .dBusWishbone_STB(main_soclinux_cpu_dbus_stb), .dBusWishbone_WE(main_soclinux_cpu_dbus_we), .iBusWishbone_ADR(main_soclinux_cpu_ibus_adr), .iBusWishbone_BTE(main_soclinux_cpu_ibus_bte), .iBusWishbone_CTI(main_soclinux_cpu_ibus_cti), .iBusWishbone_CYC(main_soclinux_cpu_ibus_cyc), .iBusWishbone_DAT_MOSI(main_soclinux_cpu_ibus_dat_w), .iBusWishbone_SEL(main_soclinux_cpu_ibus_sel), .iBusWishbone_STB(main_soclinux_cpu_ibus_stb), .iBusWishbone_WE(main_soclinux_cpu_ibus_we) ); (* FREQUENCY_PIN_CLKI = "25.0", ICP_CURRENT = "6", LPF_RESISTOR = "16", MFG_ENABLE_FILTEROPAMP = "1", MFG_GMCREF_SEL = "2" *) EHXPLLL #( .CLKFB_DIV(5'd16), .CLKI_DIV(1'd1), .CLKOP_CPHASE(3'd7), .CLKOP_DIV(4'd8), .CLKOP_ENABLE("ENABLED"), .CLKOP_FPHASE(1'd0), .CLKOS3_CPHASE(5'd23), .CLKOS3_DIV(1'd1), .CLKOS3_ENABLE("ENABLED"), .CLKOS3_FPHASE(1'd0), .CLKOS_CPHASE(4'd9), .CLKOS_DIV(4'd8), .CLKOS_ENABLE("ENABLED"), .CLKOS_FPHASE(1'd0), .FEEDBK_PATH("INT_OS3") ) EHXPLLL ( .CLKI(main_clkin), .RST(main_reset), .CLKOP(main_clkout0), .CLKOS(main_clkout1), .LOCK(main_locked) ); reg [7:0] data_mem_grain0[0:511]; reg [8:0] memadr_3; always @(posedge sys_clk) begin if (main_data_port_we[0]) data_mem_grain0[main_data_port_adr] <= main_data_port_dat_w[7:0]; memadr_3 <= main_data_port_adr; end assign main_data_port_dat_r[7:0] = data_mem_grain0[memadr_3]; reg [7:0] data_mem_grain1[0:511]; reg [8:0] memadr_4; always @(posedge sys_clk) begin if (main_data_port_we[1]) data_mem_grain1[main_data_port_adr] <= main_data_port_dat_w[15:8]; memadr_4 <= main_data_port_adr; end assign main_data_port_dat_r[15:8] = data_mem_grain1[memadr_4]; reg [7:0] data_mem_grain2[0:511]; reg [8:0] memadr_5; always @(posedge sys_clk) begin if (main_data_port_we[2]) data_mem_grain2[main_data_port_adr] <= main_data_port_dat_w[23:16]; memadr_5 <= main_data_port_adr; end assign main_data_port_dat_r[23:16] = data_mem_grain2[memadr_5]; reg [7:0] data_mem_grain3[0:511]; reg [8:0] memadr_6; always @(posedge sys_clk) begin if (main_data_port_we[3]) data_mem_grain3[main_data_port_adr] <= main_data_port_dat_w[31:24]; memadr_6 <= main_data_port_adr; end assign main_data_port_dat_r[31:24] = data_mem_grain3[memadr_6]; reg [7:0] data_mem_grain4[0:511]; reg [8:0] memadr_7; always @(posedge sys_clk) begin if (main_data_port_we[4]) data_mem_grain4[main_data_port_adr] <= main_data_port_dat_w[39:32]; memadr_7 <= main_data_port_adr; end assign main_data_port_dat_r[39:32] = data_mem_grain4[memadr_7]; reg [7:0] data_mem_grain5[0:511]; reg [8:0] memadr_8; always @(posedge sys_clk) begin if (main_data_port_we[5]) data_mem_grain5[main_data_port_adr] <= main_data_port_dat_w[47:40]; memadr_8 <= main_data_port_adr; end assign main_data_port_dat_r[47:40] = data_mem_grain5[memadr_8]; reg [7:0] data_mem_grain6[0:511]; reg [8:0] memadr_9; always @(posedge sys_clk) begin if (main_data_port_we[6]) data_mem_grain6[main_data_port_adr] <= main_data_port_dat_w[55:48]; memadr_9 <= main_data_port_adr; end assign main_data_port_dat_r[55:48] = data_mem_grain6[memadr_9]; reg [7:0] data_mem_grain7[0:511]; reg [8:0] memadr_10; always @(posedge sys_clk) begin if (main_data_port_we[7]) data_mem_grain7[main_data_port_adr] <= main_data_port_dat_w[63:56]; memadr_10 <= main_data_port_adr; end assign main_data_port_dat_r[63:56] = data_mem_grain7[memadr_10]; reg [7:0] data_mem_grain8[0:511]; reg [8:0] memadr_11; always @(posedge sys_clk) begin if (main_data_port_we[8]) data_mem_grain8[main_data_port_adr] <= main_data_port_dat_w[71:64]; memadr_11 <= main_data_port_adr; end assign main_data_port_dat_r[71:64] = data_mem_grain8[memadr_11]; reg [7:0] data_mem_grain9[0:511]; reg [8:0] memadr_12; always @(posedge sys_clk) begin if (main_data_port_we[9]) data_mem_grain9[main_data_port_adr] <= main_data_port_dat_w[79:72]; memadr_12 <= main_data_port_adr; end assign main_data_port_dat_r[79:72] = data_mem_grain9[memadr_12]; reg [7:0] data_mem_grain10[0:511]; reg [8:0] memadr_13; always @(posedge sys_clk) begin if (main_data_port_we[10]) data_mem_grain10[main_data_port_adr] <= main_data_port_dat_w[87:80]; memadr_13 <= main_data_port_adr; end assign main_data_port_dat_r[87:80] = data_mem_grain10[memadr_13]; reg [7:0] data_mem_grain11[0:511]; reg [8:0] memadr_14; always @(posedge sys_clk) begin if (main_data_port_we[11]) data_mem_grain11[main_data_port_adr] <= main_data_port_dat_w[95:88]; memadr_14 <= main_data_port_adr; end assign main_data_port_dat_r[95:88] = data_mem_grain11[memadr_14]; reg [7:0] data_mem_grain12[0:511]; reg [8:0] memadr_15; always @(posedge sys_clk) begin if (main_data_port_we[12]) data_mem_grain12[main_data_port_adr] <= main_data_port_dat_w[103:96]; memadr_15 <= main_data_port_adr; end assign main_data_port_dat_r[103:96] = data_mem_grain12[memadr_15]; reg [7:0] data_mem_grain13[0:511]; reg [8:0] memadr_16; always @(posedge sys_clk) begin if (main_data_port_we[13]) data_mem_grain13[main_data_port_adr] <= main_data_port_dat_w[111:104]; memadr_16 <= main_data_port_adr; end assign main_data_port_dat_r[111:104] = data_mem_grain13[memadr_16]; reg [7:0] data_mem_grain14[0:511]; reg [8:0] memadr_17; always @(posedge sys_clk) begin if (main_data_port_we[14]) data_mem_grain14[main_data_port_adr] <= main_data_port_dat_w[119:112]; memadr_17 <= main_data_port_adr; end assign main_data_port_dat_r[119:112] = data_mem_grain14[memadr_17]; reg [7:0] data_mem_grain15[0:511]; reg [8:0] memadr_18; always @(posedge sys_clk) begin if (main_data_port_we[15]) data_mem_grain15[main_data_port_adr] <= main_data_port_dat_w[127:120]; memadr_18 <= main_data_port_adr; end assign main_data_port_dat_r[127:120] = data_mem_grain15[memadr_18]; FD1S3BX FD1S3BX( .CK(sys_clk), .D(1'd0), .PD((~main_locked)), .Q(builder_latticeecp5asyncresetsynchronizerimpl0_rst1) ); FD1S3BX FD1S3BX_1( .CK(sys_clk), .D(builder_latticeecp5asyncresetsynchronizerimpl0_rst1), .PD((~main_locked)), .Q(sys_rst) ); FD1S3BX FD1S3BX_2( .CK(sys_ps_clk), .D(1'd0), .PD((~main_locked)), .Q(builder_latticeecp5asyncresetsynchronizerimpl1_rst1) ); FD1S3BX FD1S3BX_3( .CK(sys_ps_clk), .D(builder_latticeecp5asyncresetsynchronizerimpl1_rst1), .PD((~main_locked)), .Q(builder_latticeecp5asyncresetsynchronizerimpl1_expr) ); ODDRX1F ODDRX1F( .D0(1'd1), .D1(1'd0), .SCLK(sys_ps_clk), .Q(sdram_clock) ); OFS1P3BX OFS1P3BX( .D(main_dfi_p0_address[0]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[0]) ); OFS1P3BX OFS1P3BX_1( .D(main_dfi_p0_address[1]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[1]) ); OFS1P3BX OFS1P3BX_2( .D(main_dfi_p0_address[2]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[2]) ); OFS1P3BX OFS1P3BX_3( .D(main_dfi_p0_address[3]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[3]) ); OFS1P3BX OFS1P3BX_4( .D(main_dfi_p0_address[4]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[4]) ); OFS1P3BX OFS1P3BX_5( .D(main_dfi_p0_address[5]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[5]) ); OFS1P3BX OFS1P3BX_6( .D(main_dfi_p0_address[6]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[6]) ); OFS1P3BX OFS1P3BX_7( .D(main_dfi_p0_address[7]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[7]) ); OFS1P3BX OFS1P3BX_8( .D(main_dfi_p0_address[8]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[8]) ); OFS1P3BX OFS1P3BX_9( .D(main_dfi_p0_address[9]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[9]) ); OFS1P3BX OFS1P3BX_10( .D(main_dfi_p0_address[10]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[10]) ); OFS1P3BX OFS1P3BX_11( .D(main_dfi_p0_address[11]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[11]) ); OFS1P3BX OFS1P3BX_12( .D(main_dfi_p0_address[12]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_a[12]) ); OFS1P3BX OFS1P3BX_13( .D(main_dfi_p0_bank[0]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_ba[0]) ); OFS1P3BX OFS1P3BX_14( .D(main_dfi_p0_bank[1]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_ba[1]) ); OFS1P3BX OFS1P3BX_15( .D(main_dfi_p0_ras_n), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_ras_n) ); OFS1P3BX OFS1P3BX_16( .D(main_dfi_p0_cas_n), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_cas_n) ); OFS1P3BX OFS1P3BX_17( .D(main_dfi_p0_we_n), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_we_n) ); OFS1P3BX OFS1P3BX_18( .D(main_dfi_p0_cke), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_cke) ); OFS1P3BX OFS1P3BX_19( .D(main_dfi_p0_cs_n), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_cs_n) ); OFS1P3BX OFS1P3BX_20( .D((main_dfi_p0_wrdata_en & main_dfi_p0_wrdata_mask[0])), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_dm[0]) ); OFS1P3BX OFS1P3BX_21( .D((main_dfi_p0_wrdata_en & main_dfi_p0_wrdata_mask[1])), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(sdram_dm[1]) ); OFS1P3BX OFS1P3BX_22( .D(main_dfi_p0_wrdata[0]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate0__o) ); IFS1P3BX IFS1P3BX( .D(builder_inferedsdrtristate0__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[0]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO ( .B(sdram_dq[0]), .I(builder_inferedsdrtristate0__o), .T((~builder_inferedsdrtristate0_oe)), .O(builder_inferedsdrtristate0__i) ); OFS1P3BX OFS1P3BX_23( .D(main_dfi_p0_wrdata[1]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate1__o) ); IFS1P3BX IFS1P3BX_1( .D(builder_inferedsdrtristate1__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[1]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_1 ( .B(sdram_dq[1]), .I(builder_inferedsdrtristate1__o), .T((~builder_inferedsdrtristate1_oe)), .O(builder_inferedsdrtristate1__i) ); OFS1P3BX OFS1P3BX_24( .D(main_dfi_p0_wrdata[2]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate2__o) ); IFS1P3BX IFS1P3BX_2( .D(builder_inferedsdrtristate2__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[2]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_2 ( .B(sdram_dq[2]), .I(builder_inferedsdrtristate2__o), .T((~builder_inferedsdrtristate2_oe)), .O(builder_inferedsdrtristate2__i) ); OFS1P3BX OFS1P3BX_25( .D(main_dfi_p0_wrdata[3]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate3__o) ); IFS1P3BX IFS1P3BX_3( .D(builder_inferedsdrtristate3__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[3]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_3 ( .B(sdram_dq[3]), .I(builder_inferedsdrtristate3__o), .T((~builder_inferedsdrtristate3_oe)), .O(builder_inferedsdrtristate3__i) ); OFS1P3BX OFS1P3BX_26( .D(main_dfi_p0_wrdata[4]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate4__o) ); IFS1P3BX IFS1P3BX_4( .D(builder_inferedsdrtristate4__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[4]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_4 ( .B(sdram_dq[4]), .I(builder_inferedsdrtristate4__o), .T((~builder_inferedsdrtristate4_oe)), .O(builder_inferedsdrtristate4__i) ); OFS1P3BX OFS1P3BX_27( .D(main_dfi_p0_wrdata[5]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate5__o) ); IFS1P3BX IFS1P3BX_5( .D(builder_inferedsdrtristate5__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[5]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_5 ( .B(sdram_dq[5]), .I(builder_inferedsdrtristate5__o), .T((~builder_inferedsdrtristate5_oe)), .O(builder_inferedsdrtristate5__i) ); OFS1P3BX OFS1P3BX_28( .D(main_dfi_p0_wrdata[6]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate6__o) ); IFS1P3BX IFS1P3BX_6( .D(builder_inferedsdrtristate6__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[6]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_6 ( .B(sdram_dq[6]), .I(builder_inferedsdrtristate6__o), .T((~builder_inferedsdrtristate6_oe)), .O(builder_inferedsdrtristate6__i) ); OFS1P3BX OFS1P3BX_29( .D(main_dfi_p0_wrdata[7]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate7__o) ); IFS1P3BX IFS1P3BX_7( .D(builder_inferedsdrtristate7__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[7]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_7 ( .B(sdram_dq[7]), .I(builder_inferedsdrtristate7__o), .T((~builder_inferedsdrtristate7_oe)), .O(builder_inferedsdrtristate7__i) ); OFS1P3BX OFS1P3BX_30( .D(main_dfi_p0_wrdata[8]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate8__o) ); IFS1P3BX IFS1P3BX_8( .D(builder_inferedsdrtristate8__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[8]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_8 ( .B(sdram_dq[8]), .I(builder_inferedsdrtristate8__o), .T((~builder_inferedsdrtristate8_oe)), .O(builder_inferedsdrtristate8__i) ); OFS1P3BX OFS1P3BX_31( .D(main_dfi_p0_wrdata[9]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate9__o) ); IFS1P3BX IFS1P3BX_9( .D(builder_inferedsdrtristate9__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[9]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_9 ( .B(sdram_dq[9]), .I(builder_inferedsdrtristate9__o), .T((~builder_inferedsdrtristate9_oe)), .O(builder_inferedsdrtristate9__i) ); OFS1P3BX OFS1P3BX_32( .D(main_dfi_p0_wrdata[10]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate10__o) ); IFS1P3BX IFS1P3BX_10( .D(builder_inferedsdrtristate10__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[10]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_10 ( .B(sdram_dq[10]), .I(builder_inferedsdrtristate10__o), .T((~builder_inferedsdrtristate10_oe)), .O(builder_inferedsdrtristate10__i) ); OFS1P3BX OFS1P3BX_33( .D(main_dfi_p0_wrdata[11]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate11__o) ); IFS1P3BX IFS1P3BX_11( .D(builder_inferedsdrtristate11__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[11]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_11 ( .B(sdram_dq[11]), .I(builder_inferedsdrtristate11__o), .T((~builder_inferedsdrtristate11_oe)), .O(builder_inferedsdrtristate11__i) ); OFS1P3BX OFS1P3BX_34( .D(main_dfi_p0_wrdata[12]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate12__o) ); IFS1P3BX IFS1P3BX_12( .D(builder_inferedsdrtristate12__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[12]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_12 ( .B(sdram_dq[12]), .I(builder_inferedsdrtristate12__o), .T((~builder_inferedsdrtristate12_oe)), .O(builder_inferedsdrtristate12__i) ); OFS1P3BX OFS1P3BX_35( .D(main_dfi_p0_wrdata[13]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate13__o) ); IFS1P3BX IFS1P3BX_13( .D(builder_inferedsdrtristate13__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[13]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_13 ( .B(sdram_dq[13]), .I(builder_inferedsdrtristate13__o), .T((~builder_inferedsdrtristate13_oe)), .O(builder_inferedsdrtristate13__i) ); OFS1P3BX OFS1P3BX_36( .D(main_dfi_p0_wrdata[14]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate14__o) ); IFS1P3BX IFS1P3BX_14( .D(builder_inferedsdrtristate14__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[14]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_14 ( .B(sdram_dq[14]), .I(builder_inferedsdrtristate14__o), .T((~builder_inferedsdrtristate14_oe)), .O(builder_inferedsdrtristate14__i) ); OFS1P3BX OFS1P3BX_37( .D(main_dfi_p0_wrdata[15]), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(builder_inferedsdrtristate15__o) ); IFS1P3BX IFS1P3BX_15( .D(builder_inferedsdrtristate15__i), .PD(1'd0), .SCLK(sys_clk), .SP(1'd1), .Q(main_dfi_p0_rddata[15]) ); TRELLIS_IO #( .DIR("BIDIR") ) TRELLIS_IO_15 ( .B(sdram_dq[15]), .I(builder_inferedsdrtristate15__o), .T((~builder_inferedsdrtristate15_oe)), .O(builder_inferedsdrtristate15__i) ); endmodule ================================================ FILE: src/litex_linux/top.ys ================================================ verilog_defaults -push verilog_defaults -add -defer read_verilog /home/INSTALL_DIR/litex/pythondata-cpu-vexriscv/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v read_verilog /home/INSTALL_DIR/linux-on-litex-vexriscv/build/ulx3s/gateware/top.v verilog_defaults -pop attrmap -tocase keep -imap keep="true" keep=1 -imap keep="false" keep=0 -remove keep=0 synth_ecp5 -json top.json -top top ================================================ FILE: src/litex_linux/top_bg256.lpf ================================================ BLOCK RESETPATHS; BLOCK ASYNCPATHS; LOCATE COMP "serial_tx" SITE "B9"; IOBUF PORT "serial_tx" IO_TYPE=LVCMOS33; LOCATE COMP "serial_rx" SITE "A9"; IOBUF PORT "serial_rx" IO_TYPE=LVCMOS33; LOCATE COMP "clk25" SITE "P6"; IOBUF PORT "clk25" IO_TYPE=LVCMOS33; LOCATE COMP "rst" SITE "L14"; IOBUF PORT "rst" IO_TYPE=LVCMOS33; LOCATE COMP "wifi_gpio0" SITE "M14"; IOBUF PORT "wifi_gpio0" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_clock" SITE "R15"; IOBUF PORT "sdram_clock" PULLMODE=NONE; IOBUF PORT "sdram_clock" DRIVE=4; IOBUF PORT "sdram_clock" SLEWRATE=FAST; IOBUF PORT "sdram_clock" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[0]" SITE "H15"; IOBUF PORT "sdram_a[0]" PULLMODE=NONE; IOBUF PORT "sdram_a[0]" DRIVE=4; IOBUF PORT "sdram_a[0]" SLEWRATE=FAST; IOBUF PORT "sdram_a[0]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[1]" SITE "B13"; IOBUF PORT "sdram_a[1]" PULLMODE=NONE; IOBUF PORT "sdram_a[1]" DRIVE=4; IOBUF PORT "sdram_a[1]" SLEWRATE=FAST; IOBUF PORT "sdram_a[1]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[2]" SITE "B12"; IOBUF PORT "sdram_a[2]" PULLMODE=NONE; IOBUF PORT "sdram_a[2]" DRIVE=4; IOBUF PORT "sdram_a[2]" SLEWRATE=FAST; IOBUF PORT "sdram_a[2]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[3]" SITE "J16"; IOBUF PORT "sdram_a[3]" PULLMODE=NONE; IOBUF PORT "sdram_a[3]" DRIVE=4; IOBUF PORT "sdram_a[3]" SLEWRATE=FAST; IOBUF PORT "sdram_a[3]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[4]" SITE "J15"; IOBUF PORT "sdram_a[4]" PULLMODE=NONE; IOBUF PORT "sdram_a[4]" DRIVE=4; IOBUF PORT "sdram_a[4]" SLEWRATE=FAST; IOBUF PORT "sdram_a[4]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[5]" SITE "R12"; IOBUF PORT "sdram_a[5]" PULLMODE=NONE; IOBUF PORT "sdram_a[5]" DRIVE=4; IOBUF PORT "sdram_a[5]" SLEWRATE=FAST; IOBUF PORT "sdram_a[5]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[6]" SITE "K16"; IOBUF PORT "sdram_a[6]" PULLMODE=NONE; IOBUF PORT "sdram_a[6]" DRIVE=4; IOBUF PORT "sdram_a[6]" SLEWRATE=FAST; IOBUF PORT "sdram_a[6]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[7]" SITE "R13"; IOBUF PORT "sdram_a[7]" PULLMODE=NONE; IOBUF PORT "sdram_a[7]" DRIVE=4; IOBUF PORT "sdram_a[7]" SLEWRATE=FAST; IOBUF PORT "sdram_a[7]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[8]" SITE "T13"; IOBUF PORT "sdram_a[8]" PULLMODE=NONE; IOBUF PORT "sdram_a[8]" DRIVE=4; IOBUF PORT "sdram_a[8]" SLEWRATE=FAST; IOBUF PORT "sdram_a[8]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[9]" SITE "K15"; IOBUF PORT "sdram_a[9]" PULLMODE=NONE; IOBUF PORT "sdram_a[9]" DRIVE=4; IOBUF PORT "sdram_a[9]" SLEWRATE=FAST; IOBUF PORT "sdram_a[9]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[10]" SITE "A13"; IOBUF PORT "sdram_a[10]" PULLMODE=NONE; IOBUF PORT "sdram_a[10]" DRIVE=4; IOBUF PORT "sdram_a[10]" SLEWRATE=FAST; IOBUF PORT "sdram_a[10]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[11]" SITE "R14"; IOBUF PORT "sdram_a[11]" PULLMODE=NONE; IOBUF PORT "sdram_a[11]" DRIVE=4; IOBUF PORT "sdram_a[11]" SLEWRATE=FAST; IOBUF PORT "sdram_a[11]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_a[12]" SITE "T14"; IOBUF PORT "sdram_a[12]" PULLMODE=NONE; IOBUF PORT "sdram_a[12]" DRIVE=4; IOBUF PORT "sdram_a[12]" SLEWRATE=FAST; IOBUF PORT "sdram_a[12]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[0]" SITE "F16"; IOBUF PORT "sdram_dq[0]" PULLMODE=NONE; IOBUF PORT "sdram_dq[0]" DRIVE=4; IOBUF PORT "sdram_dq[0]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[0]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[1]" SITE "E15"; IOBUF PORT "sdram_dq[1]" PULLMODE=NONE; IOBUF PORT "sdram_dq[1]" DRIVE=4; IOBUF PORT "sdram_dq[1]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[1]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[2]" SITE "F15"; IOBUF PORT "sdram_dq[2]" PULLMODE=NONE; IOBUF PORT "sdram_dq[2]" DRIVE=4; IOBUF PORT "sdram_dq[2]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[2]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[3]" SITE "D14"; IOBUF PORT "sdram_dq[3]" PULLMODE=NONE; IOBUF PORT "sdram_dq[3]" DRIVE=4; IOBUF PORT "sdram_dq[3]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[3]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[4]" SITE "E16"; IOBUF PORT "sdram_dq[4]" PULLMODE=NONE; IOBUF PORT "sdram_dq[4]" DRIVE=4; IOBUF PORT "sdram_dq[4]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[4]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[5]" SITE "C15"; IOBUF PORT "sdram_dq[5]" PULLMODE=NONE; IOBUF PORT "sdram_dq[5]" DRIVE=4; IOBUF PORT "sdram_dq[5]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[5]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[6]" SITE "D16"; IOBUF PORT "sdram_dq[6]" PULLMODE=NONE; IOBUF PORT "sdram_dq[6]" DRIVE=4; IOBUF PORT "sdram_dq[6]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[6]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[7]" SITE "B15"; IOBUF PORT "sdram_dq[7]" PULLMODE=NONE; IOBUF PORT "sdram_dq[7]" DRIVE=4; IOBUF PORT "sdram_dq[7]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[7]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[8]" SITE "R16"; IOBUF PORT "sdram_dq[8]" PULLMODE=NONE; IOBUF PORT "sdram_dq[8]" DRIVE=4; IOBUF PORT "sdram_dq[8]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[8]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[9]" SITE "P16"; IOBUF PORT "sdram_dq[9]" PULLMODE=NONE; IOBUF PORT "sdram_dq[9]" DRIVE=4; IOBUF PORT "sdram_dq[9]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[9]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[10]" SITE "P15"; IOBUF PORT "sdram_dq[10]" PULLMODE=NONE; IOBUF PORT "sdram_dq[10]" DRIVE=4; IOBUF PORT "sdram_dq[10]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[10]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[11]" SITE "N16"; IOBUF PORT "sdram_dq[11]" PULLMODE=NONE; IOBUF PORT "sdram_dq[11]" DRIVE=4; IOBUF PORT "sdram_dq[11]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[11]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[12]" SITE "N14"; IOBUF PORT "sdram_dq[12]" PULLMODE=NONE; IOBUF PORT "sdram_dq[12]" DRIVE=4; IOBUF PORT "sdram_dq[12]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[12]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[13]" SITE "M16"; IOBUF PORT "sdram_dq[13]" PULLMODE=NONE; IOBUF PORT "sdram_dq[13]" DRIVE=4; IOBUF PORT "sdram_dq[13]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[13]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[14]" SITE "M15"; IOBUF PORT "sdram_dq[14]" PULLMODE=NONE; IOBUF PORT "sdram_dq[14]" DRIVE=4; IOBUF PORT "sdram_dq[14]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[14]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dq[15]" SITE "L15"; IOBUF PORT "sdram_dq[15]" PULLMODE=NONE; IOBUF PORT "sdram_dq[15]" DRIVE=4; IOBUF PORT "sdram_dq[15]" SLEWRATE=FAST; IOBUF PORT "sdram_dq[15]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_we_n" SITE "A15"; IOBUF PORT "sdram_we_n" PULLMODE=NONE; IOBUF PORT "sdram_we_n" DRIVE=4; IOBUF PORT "sdram_we_n" SLEWRATE=FAST; IOBUF PORT "sdram_we_n" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_ras_n" SITE "B16"; IOBUF PORT "sdram_ras_n" PULLMODE=NONE; IOBUF PORT "sdram_ras_n" DRIVE=4; IOBUF PORT "sdram_ras_n" SLEWRATE=FAST; IOBUF PORT "sdram_ras_n" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_cas_n" SITE "G16"; IOBUF PORT "sdram_cas_n" PULLMODE=NONE; IOBUF PORT "sdram_cas_n" DRIVE=4; IOBUF PORT "sdram_cas_n" SLEWRATE=FAST; IOBUF PORT "sdram_cas_n" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_cs_n" SITE "A14"; IOBUF PORT "sdram_cs_n" PULLMODE=NONE; IOBUF PORT "sdram_cs_n" DRIVE=4; IOBUF PORT "sdram_cs_n" SLEWRATE=FAST; IOBUF PORT "sdram_cs_n" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_cke" SITE "L16"; IOBUF PORT "sdram_cke" PULLMODE=NONE; IOBUF PORT "sdram_cke" DRIVE=4; IOBUF PORT "sdram_cke" SLEWRATE=FAST; IOBUF PORT "sdram_cke" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_ba[0]" SITE "G15"; IOBUF PORT "sdram_ba[0]" PULLMODE=NONE; IOBUF PORT "sdram_ba[0]" DRIVE=4; IOBUF PORT "sdram_ba[0]" SLEWRATE=FAST; IOBUF PORT "sdram_ba[0]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_ba[1]" SITE "B14"; IOBUF PORT "sdram_ba[1]" PULLMODE=NONE; IOBUF PORT "sdram_ba[1]" DRIVE=4; IOBUF PORT "sdram_ba[1]" SLEWRATE=FAST; IOBUF PORT "sdram_ba[1]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dm[0]" SITE "C16"; IOBUF PORT "sdram_dm[0]" PULLMODE=NONE; IOBUF PORT "sdram_dm[0]" DRIVE=4; IOBUF PORT "sdram_dm[0]" SLEWRATE=FAST; IOBUF PORT "sdram_dm[0]" IO_TYPE=LVCMOS33; LOCATE COMP "sdram_dm[1]" SITE "T15"; IOBUF PORT "sdram_dm[1]" PULLMODE=NONE; IOBUF PORT "sdram_dm[1]" DRIVE=4; IOBUF PORT "sdram_dm[1]" SLEWRATE=FAST; IOBUF PORT "sdram_dm[1]" IO_TYPE=LVCMOS33; LOCATE COMP "user_led0" SITE "B11"; IOBUF PORT "user_led0" IO_TYPE=LVCMOS33; LOCATE COMP "user_led1" SITE "A11"; IOBUF PORT "user_led1" IO_TYPE=LVCMOS33; LOCATE COMP "user_led2" SITE "A12"; IOBUF PORT "user_led2" IO_TYPE=LVCMOS33; LOCATE COMP "user_led3" SITE "R1"; IOBUF PORT "user_led3" IO_TYPE=LVCMOS33; LOCATE COMP "user_led4" SITE "R2"; IOBUF PORT "user_led4" IO_TYPE=LVCMOS33; LOCATE COMP "user_led5" SITE "R3"; IOBUF PORT "user_led5" IO_TYPE=LVCMOS33; LOCATE COMP "user_led6" SITE "R4"; IOBUF PORT "user_led6" IO_TYPE=LVCMOS33; LOCATE COMP "user_led7" SITE "R5"; IOBUF PORT "user_led7" IO_TYPE=LVCMOS33; LOCATE COMP "spisdcard_clk" SITE "J12"; IOBUF PORT "spisdcard_clk" SLEWRATE=FAST; IOBUF PORT "spisdcard_clk" IO_TYPE=LVCMOS33; LOCATE COMP "spisdcard_mosi" SITE "H12"; IOBUF PORT "spisdcard_mosi" SLEWRATE=FAST; IOBUF PORT "spisdcard_mosi" IO_TYPE=LVCMOS33; IOBUF PORT "spisdcard_mosi" PULLMODE=UP; LOCATE COMP "spisdcard_cs_n" SITE "G12"; IOBUF PORT "spisdcard_cs_n" SLEWRATE=FAST; IOBUF PORT "spisdcard_cs_n" IO_TYPE=LVCMOS33; IOBUF PORT "spisdcard_cs_n" PULLMODE=UP; LOCATE COMP "spisdcard_miso" SITE "K12"; IOBUF PORT "spisdcard_miso" SLEWRATE=FAST; IOBUF PORT "spisdcard_miso" IO_TYPE=LVCMOS33; IOBUF PORT "spisdcard_miso" PULLMODE=UP; FREQUENCY PORT "clk25" 25.0 MHz; ================================================ FILE: src/uart_tx/.gitignore ================================================ *.bit *.svf *.json ================================================ FILE: src/uart_tx/Makefile ================================================ TARGET=uart_tx TOP=uart_tx OBJS+=top.v TRELLIS=/usr/local/share/trellis all: ${TARGET}.bit $(TARGET).json: $(OBJS) yosys -p "synth_ecp5 -json $@" $(OBJS) $(TARGET)_out.config: $(TARGET).json nextpnr-ecp5 --25k --package CABGA256 --speed 6 --json $< --textcfg $@ --lpf top.lpf --freq 65 $(TARGET).bit: $(TARGET)_out.config ecppack --svf ${TARGET}.svf $< $@ ${TARGET}.svf : ${TARGET}.bit prog: ${TARGET}.svf openFPGALoader -c digilent_hs2 $(TARGET).bit clean: rm -f *.svf *.bit *.config *.ys .PHONY: prog clean ================================================ FILE: src/uart_tx/rst_gen.v ================================================ module rst_gen ( input clk_i, input rst_i, output rst_o ); /* try to generate a reset */ reg [2:0] rst_cpt; always @(posedge clk_i) begin if (rst_i) rst_cpt = 3'b0; else begin if (rst_cpt == 3'b100) rst_cpt = rst_cpt; else rst_cpt = rst_cpt + 3'b1; end end assign rst_o = !rst_cpt[2]; endmodule ================================================ FILE: src/uart_tx/top.lpf ================================================ LOCATE COMP "clk_i" SITE "P6"; IOBUF PORT "clk_i" IO_TYPE=LVCMOS33; FREQUENCY PORT "clk_i" 25 MHZ; LOCATE COMP "TX" SITE "B9"; // iCELink-UART3-RX //LOCATE COMP "TX" SITE "B4"; // ext-board P2-7 IOBUF PORT "TX" IO_TYPE=LVCMOS33; LOCATE COMP "RX" SITE "A9"; IOBUF PORT "RX" IO_TYPE=LVCMOS33; ================================================ FILE: src/uart_tx/top.v ================================================ `include "uart_tx.v" /* baudrate: 9600 */ /* Top level module for keypad + UART demo */ module top ( // input hardware clock (25 MHz) clk_i, // UART lines TX, ); parameter clk_freq = 25000000; parameter baudrate = 9600; /* Clock input */ input clk_i; /* FTDI I/O */ output TX; /* 9600 Hz clock generation (from 25 MHz) */ reg clk_9600 = 0; reg [31:0] cntr_9600 = 32'b0; //parameter period_9600 = /* 2500 */; /* clk_freq / 2 / baudrate */ parameter period_9600 = (clk_freq / 2 / baudrate); /* 1 Hz clock generation (from 25 MHz) */ reg clk_1 = 0; reg [31:0] cntr_1 = 32'b0; parameter period_1 = 12500000; // Note: could also use "0" or "9" below, but I wanted to // be clear about what the actual binary value is. parameter ASCII_0 = 8'd48; parameter ASCII_9 = 8'd57; /* UART registers */ reg [7:0] uart_txbyte = ASCII_0; reg uart_send = 1'b1; wire uart_txed; /* LED register */ reg ledval = 0; /* UART transmitter module designed for 8 bits, no parity, 1 stop bit. */ uart_tx_8n1 transmitter ( // 9600 baud rate clock .clk (clk_9600), // byte to be transmitted .txbyte (uart_txbyte), // trigger a UART transmit on baud clock .senddata (uart_send), // input: tx is finished .txdone (uart_txed), // output UART tx pin .tx (TX), ); /* Wiring */ assign LED=ledval; /* Low speed clock generation */ always @ (posedge clk_i) begin /* generate 500K Hz clock */ cntr_9600 <= cntr_9600 + 1; if (cntr_9600 == period_9600) begin clk_9600 <= ~clk_9600; cntr_9600 <= 32'b0; end /* generate 1 Hz clock */ cntr_1 <= cntr_1 + 1; if (cntr_1 == period_1) begin clk_1 <= ~clk_1; cntr_1 <= 32'b0; end end /* Increment ASCII digit and blink LED */ always @ (posedge clk_1 ) begin ledval <= ~ledval; if (uart_txbyte == ASCII_9) begin uart_txbyte <= ASCII_0; end else begin uart_txbyte <= uart_txbyte + 1; end end endmodule ================================================ FILE: src/uart_tx/uart_tx.v ================================================ // 8N1 UART Module, transmit only module uart_tx_8n1 ( clk, // input clock txbyte, // outgoing byte senddata, // trigger tx txdone, // outgoing byte sent tx, // tx wire ); /* Inputs */ input clk; input[7:0] txbyte; input senddata; /* Outputs */ output txdone; output tx; /* Parameters */ parameter STATE_IDLE=8'd0; parameter STATE_STARTTX=8'd1; parameter STATE_TXING=8'd2; parameter STATE_TXDONE=8'd3; /* State variables */ reg[7:0] state=8'b0; reg[7:0] buf_tx=8'b0; reg[7:0] bits_sent=8'b0; reg txbit=1'b1; reg txdone=1'b0; /* Wiring */ assign tx=txbit; /* always */ always @ (posedge clk) begin // start sending? if (senddata == 1 && state == STATE_IDLE) begin state <= STATE_STARTTX; buf_tx <= txbyte; txdone <= 1'b0; end else if (state == STATE_IDLE) begin // idle at high txbit <= 1'b1; txdone <= 1'b0; end // send start bit (low) if (state == STATE_STARTTX) begin txbit <= 1'b0; state <= STATE_TXING; end // clock data out if (state == STATE_TXING && bits_sent < 8'd8) begin txbit <= buf_tx[0]; buf_tx <= buf_tx>>1; bits_sent = bits_sent + 1; end else if (state == STATE_TXING) begin // send stop bit (high) txbit <= 1'b1; bits_sent <= 8'b0; state <= STATE_TXDONE; end // tx done if (state == STATE_TXDONE) begin txdone <= 1'b1; state <= STATE_IDLE; end end endmodule ================================================ FILE: src/uart_tx/uart_tx_out.config ================================================ .device LFE5U-25F .comment Part: LFE5U-25F-6CABGA256 .tile CIB_R1C24:CIB arc: S1_V02S0001 V01N0001 .tile CIB_R1C34:CIB arc: S1_V02S0001 V01N0001 .tile CIB_R1C38:CIB arc: H00L0100 V02N0101 arc: JA0 H00L0100 enum: CIB.JB0MUX 0 .tile CIB_R1C39:CIB arc: JD7 V02N0601 .tile CIB_R29C1:CIB_LR arc: JD7 V00B0000 arc: V00B0000 S1_V02N0201 .tile CIB_R31C1:CIB_LR arc: N1_V02N0201 S3_V06N0103 .tile CIB_R37C1:CIB_LR_S arc: N3_V06N0103 S3_V06N0003 .tile CIB_R43C1:CIB_LR arc: N3_V06N0003 S3_V06N0303 .tile CIB_R49C1:CIB_LR_S arc: N3_V06N0303 JF5 .tile CIB_R49C3:CIB_PLL3 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R49C42:VCIB_DCU0 enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C43:VCIB_DCUA enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C44:VCIB_DCUB enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C45:VCIB_DCUC enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C46:VCIB_DCUD enum: CIB.JA1MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C47:VCIB_DCUF enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C48:VCIB_DCU3 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C49:VCIB_DCU2 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C50:VCIB_DCUG enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C51:VCIB_DCUH enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C52:VCIB_DCUI enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C53:VCIB_DCU1 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 .tile CIB_R49C69:CIB_PLL3 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R49C6:CIB_EFB0 enum: CIB.JB3MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R49C7:CIB_EFB1 enum: CIB.JA3MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 .tile MIB_R0C31:TMID_0 arc: G_TDCC0CLKI G_JTRQPCLKCIB1 .tile MIB_R0C38:PIOT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R0C69:BANKREF1 enum: BANK.VCCIO 3V3 .tile MIB_R13C21:DSP_SPINE_UL0 arc: G_VPTX0000 G_HPRX0000 arc: G_VPTX0100 G_HPRX0100 .tile MIB_R13C31:CMUX_UL_0 arc: G_DCS0CLK0 G_VPFN0000 arc: G_ULPCLK0 G_HPFE0000 arc: G_ULPCLK1 G_VPFS0000 .tile MIB_R13C32:CMUX_UR_0 arc: G_DCS0CLK1 G_VPFN0000 arc: G_URPCLK0 G_HPFE0000 arc: G_URPCLK1 G_VPFS0000 .tile MIB_R13C3:DSP_SPINE_UL1 unknown: F2B0 unknown: F3B0 unknown: F5B0 unknown: F11B0 unknown: F13B0 .tile MIB_R13C41:DSP_SPINE_UR0 arc: G_VPTX0000 G_HPRX0000 arc: G_VPTX0100 G_HPRX0100 .tile MIB_R1C38:PICT0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R25C3:LMID_0 arc: G_LDCC0CLKI G_JLLQPCLKCIB0 .tile MIB_R37C31:CMUX_LL_0 arc: G_DCS1CLK0 G_VPFN0000 arc: G_LLPCLK0 G_HPFE0000 arc: G_LLPCLK1 G_VPFS0000 .tile MIB_R37C32:CMUX_LR_0 arc: G_DCS1CLK1 G_VPFN0000 arc: G_LRPCLK0 G_HPFE0000 arc: G_LRPCLK1 G_VPFS0000 .tile MIB_R48C0:PICL1 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 enum: PIOC.HYSTERESIS ON .tile MIB_R49C0:MIB_CIB_LR enum: PIOC.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R50C4:EFB0_PICB0 unknown: F54B1 unknown: F56B1 unknown: F82B1 unknown: F94B1 .tile R2C24:PLC2 arc: E1_H02E0501 V02N0501 arc: H00R0100 H02W0501 arc: S1_V02S0201 V01N0001 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0100 V02N0501 arc: A5 V00T0100 arc: B5 H02W0301 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: M0 H02W0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F5 arc: V01S0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R2C25:PLC2 arc: E1_H02E0501 V06N0303 arc: V00B0000 V02N0001 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 S1_V02N0601 arc: A7 H02E0501 arc: B7 E1_H02W0101 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D7 V02N0601 arc: F7 F7_SLICE arc: LSR1 V00B0100 arc: M4 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S1_V02S0401 Q4 arc: V00B0100 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R2C26:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: S1_V02S0301 V01N0101 arc: V00B0100 H02E0501 arc: A1 V02N0701 arc: B1 H02W0101 arc: C1 S1_V02N0401 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: S1_V02S0601 Q6 arc: V00T0100 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R2C27:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0301 E1_H01W0100 arc: H00R0000 V02N0401 arc: V00B0000 H02W0601 arc: V00B0100 V02N0101 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 V06N0103 arc: W1_H02W0401 S1_V02N0401 arc: A7 H00R0000 arc: B7 V00B0100 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR1 H02E0501 arc: M2 E1_H02W0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R2C28:PLC2 arc: E1_H02E0601 V06N0303 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: W1_H02W0601 V06N0303 arc: A7 V02N0101 arc: B7 H02E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D7 V02N0601 arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02E0301 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0001 Q2 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R2C29:PLC2 arc: S1_V02S0101 W1_H02E0101 arc: V00B0000 H02E0601 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0601 S1_V02N0601 arc: A5 V00T0000 arc: B5 W1_H02E0101 arc: C5 V02N0201 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00B0100 F5 arc: V01S0000 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R2C30:PLC2 arc: E1_H02E0301 V02N0301 arc: H00L0000 V02N0001 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: E3_H06E0303 Q5 arc: F5 F5_SLICE arc: H00R0100 Q5 arc: MUXCLK2 CLK0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R2C31:PLC2 arc: E1_H02E0101 V01N0101 arc: V00T0100 E1_H02W0301 arc: B7 H02E0301 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CLK0 G_HPBX0100 arc: D7 V02N0401 arc: E1_H02E0201 Q0 arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00B0100 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R2C32:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: H00R0000 E1_H02W0401 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 H02W0401 arc: A0 H02W0501 arc: B2 V01N0001 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B5 H02E0101 arc: B6 V00B0000 arc: B7 E1_H02W0101 word: SLICED.K0.INIT 0011110000000000 word: SLICED.K1.INIT 0011110000000000 word: SLICEC.K0.INIT 0011110000000000 word: SLICEC.K1.INIT 1001011010101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0011110000000000 word: SLICEB.K1.INIT 0011110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C33:PLC2 arc: S1_V02S0201 W1_H02E0201 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0201 arc: W1_H02W0301 V01N0101 arc: B0 V01N0001 arc: B1 V00T0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0100 arc: E1_H02E0001 F2 arc: F2 F2_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: LSR1 E1_H02W0501 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: V01S0000 Q6 arc: W1_H02W0401 Q6 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0011110000000000 word: SLICEA.K1.INIT 0011110000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R2C34:PLC2 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 E1_H01W0100 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0100 V02N0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 E1_H01W0100 arc: B5 V00B0100 arc: C5 V00T0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0100 arc: D5 V02N0401 arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: M6 W1_H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: V01S0100 Q6 arc: W1_H02W0401 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R2C35:PLC2 arc: E3_H06E0103 V01N0101 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 V02N0301 arc: V00T0100 V02N0701 arc: W1_H02W0201 V01N0001 arc: W1_H02W0501 V02N0501 arc: B5 V00B0100 arc: C5 V01N0101 arc: CE0 V02N0201 arc: CLK0 G_HPBX0100 arc: D5 S1_V02N0401 arc: E1_H01E0101 F5 arc: F5 F5_SLICE arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R2C36:PLC2 arc: E1_H02E0201 V01N0001 arc: W1_H02W0501 H01E0101 arc: E3_H06E0303 W3_H06E0303 arc: B3 S1_V02N0101 arc: C3 E1_H01W0000 arc: CLK0 G_HPBX0100 arc: D3 S1_V02N0201 arc: E1_H02E0001 Q0 arc: F3 F3_SLICE arc: LSR1 V00T0100 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0000 Q0 arc: V00T0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 .tile R2C37:PLC2 arc: B5 V01S0000 arc: B7 V01S0000 arc: C4 V00T0000 arc: C5 S1_V02N0201 arc: C7 S1_V02N0001 arc: CLK0 G_HPBX0100 arc: D4 H02E0001 arc: D5 V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F4 arc: E1_H02E0601 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: V00B0100 F7 arc: V00T0000 Q0 arc: V01S0000 F4 arc: W1_H02W0601 F4 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 1100000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.A1MUX 1 .tile R2C38:PLC2 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 H06E0103 arc: A2 S1_V02N0501 arc: A3 V01N0101 arc: B2 V02N0301 arc: B3 V02N0101 arc: C2 H02E0601 arc: C3 V02N0601 arc: CE1 H00L0000 arc: CLK0 G_HPBX0100 arc: D2 W1_H02E0201 arc: D3 V02N0001 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 F2 arc: MUXCLK1 CLK0 arc: N1_V02N0101 Q3 word: SLICEB.K0.INIT 0110000000000000 word: SLICEB.K1.INIT 1000000011000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R2C39:PLC2 arc: N1_V02N0601 H06E0303 .tile R3C24:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0501 E1_H01W0100 arc: H00L0100 E1_H02W0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0501 E1_H02W0501 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0101 arc: V00T0100 E1_H02W0301 arc: A1 E1_H02W0501 arc: A5 E1_H02W0501 arc: B1 S1_V02N0101 arc: B5 V00B0100 arc: C1 H00L0100 arc: C5 V00T0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D5 S1_V02N0601 arc: E1_H02E0201 Q2 arc: E1_H02E0301 F1 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: LSR1 V00B0000 arc: M2 E1_H02W0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R3C25:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 H02E0201 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H02W0501 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0101 arc: V00T0100 H02W0301 arc: A3 V01N0101 arc: A5 H02W0501 arc: B3 H00L0000 arc: B5 V00B0100 arc: C3 E1_H02W0601 arc: C5 V00T0100 arc: CLK0 G_HPBX0000 arc: D3 H02E0001 arc: D5 S1_V02N0401 arc: E1_H02E0301 F3 arc: E1_H02E0701 F5 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0100 Q6 arc: LSR1 H02E0301 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: V01S0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0100000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R3C26:PLC2 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 S1_V02N0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V01N0001 arc: A0 E1_H02W0701 arc: A1 F7 arc: A3 E1_H02W0501 arc: A7 W1_H02E0501 arc: B0 F1 arc: B1 H02E0301 arc: B3 F1 arc: B7 S1_V02N0501 arc: C0 S1_V02N0401 arc: C1 V02N0601 arc: C3 S1_V02N0401 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00T0100 arc: D3 H00R0000 arc: D7 V00B0000 arc: E1_H01E0001 F1 arc: E1_H02E0001 F0 arc: E1_H02E0101 F1 arc: E1_H02E0301 F1 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: LSR1 H02E0501 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: S1_V02S0401 Q4 arc: S3_V06S0103 F1 arc: V01S0000 F1 arc: V01S0100 F3 arc: W1_H02W0101 F1 arc: W1_H02W0301 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0111111111111111 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R3C27:PLC2 arc: E1_H02E0401 H01E0001 arc: H00L0100 H02E0101 arc: H00R0000 H02W0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: S1_V02S0301 N1_V01S0100 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0501 arc: W1_H02W0401 E1_H01W0000 arc: A1 E1_H01E0001 arc: A4 N1_V01S0100 arc: A5 H02W0701 arc: B1 H02W0301 arc: B4 V02N0701 arc: B5 H02W0301 arc: C1 H00L0100 arc: C4 S1_V02N0201 arc: C5 H01E0001 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F4 arc: E1_H02E0601 F4 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q6 arc: H01W0100 F4 arc: LSR0 V00B0100 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V02N0401 F4 arc: S1_V02S0501 F5 arc: S3_V06S0203 F4 arc: V01S0100 F1 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R3C28:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 H01E0101 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00T0100 V02N0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 H01E0101 arc: A1 E1_H01E0001 arc: A3 H01E0001 arc: A5 W1_H02E0701 arc: B1 V00B0000 arc: B3 S1_V02N0301 arc: B5 S1_V02N0501 arc: C1 E1_H01W0000 arc: C3 H02E0401 arc: C5 H02E0401 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D3 H00R0000 arc: D5 S1_V02N0601 arc: E1_H01E0001 Q6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: LSR1 V00B0100 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: S1_V02S0301 F3 arc: V00B0100 F5 arc: V01S0000 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R3C29:PLC2 arc: N1_V02N0201 H06E0103 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0201 H06E0103 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0101 arc: W1_H02W0201 N1_V01S0000 arc: A5 H02E0501 arc: B5 V00B0100 arc: C5 V02N0001 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: F5 F5_SLICE arc: H01W0000 Q6 arc: H01W0100 F5 arc: LSR1 H02E0301 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R3C30:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0301 E3_H06W0003 arc: V00B0100 V02N0301 arc: V00T0100 S1_V02N0701 arc: CLK0 G_HPBX0000 arc: LSR0 V00B0100 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S1_V02S0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R3C31:PLC2 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E1_H02W0401 arc: V00B0000 E1_H02W0401 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0601 S1_V02N0601 arc: B5 H02E0301 arc: C5 V00T0000 arc: CE0 E1_H02W0101 arc: CLK0 G_HPBX0100 arc: D5 V00B0000 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 Q0 arc: V00B0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R3C32:PLC2 arc: H00R0000 V02S0401 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0301 arc: A0 V02N0501 arc: B2 H00L0000 arc: B3 H00R0000 arc: B4 V00B0100 arc: B5 H01E0101 arc: B6 V02S0701 arc: B7 V00B0000 arc: CE1 H02W0101 arc: CLK0 G_HPBX0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F6 arc: E1_H02E0501 F7 arc: E3_H06E0203 F4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR1 E1_H02W0301 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q2 arc: S1_V02S0701 F5 arc: V01S0000 F3 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C33:PLC2 arc: E1_H02E0401 H01E0001 arc: H00R0000 E1_H02W0601 arc: N1_V02N0101 H01E0101 arc: N1_V02N0601 E1_H01W0000 arc: V00B0000 V02S0201 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 E1_H02W0101 arc: A5 V00T0000 arc: B0 V00T0000 arc: B1 V00B0000 arc: B5 N1_V01S0000 arc: C5 H02W0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0100 arc: D5 V00B0000 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: LSR0 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F1 arc: V00T0000 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R3C34:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 V02S0501 arc: H00R0100 H02W0501 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02W0501 arc: V00B0000 H02W0401 arc: V00B0100 W1_H02E0501 arc: V00T0100 E1_H02W0301 arc: B1 E1_H02W0301 arc: B6 E1_H02W0301 arc: C1 H00R0100 arc: C6 V02S0201 arc: C7 V00T0100 arc: CE2 V02N0601 arc: CLK0 G_HPBX0100 arc: D1 E1_H02W0001 arc: D6 E1_H01W0100 arc: D7 H00R0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: LSR0 V00B0000 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: V01S0000 F7 arc: W1_H02W0301 F1 arc: W1_H02W0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 .tile R3C35:PLC2 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: V00T0100 V02N0701 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 H01E0001 arc: A2 H02E0501 arc: B2 H02E0301 arc: B3 H00L0000 arc: B4 H02W0301 arc: C2 W1_H02E0401 arc: C3 H00R0100 arc: C4 V00B0100 arc: C5 V02N0001 arc: CLK0 G_HPBX0100 arc: D2 E1_H02W0001 arc: D3 V02S0001 arc: D4 H01W0000 arc: D5 V02S0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 F3 arc: E1_H02E0401 Q6 arc: E1_H02E0701 F5 arc: E3_H06E0003 F3 arc: E3_H06E0303 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 F2 arc: H01W0000 F3 arc: H01W0100 F3 arc: LSR1 V00T0100 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: S1_V02S0501 F5 arc: V00B0000 Q6 arc: V00B0100 F5 arc: V01S0000 F3 arc: W1_H02W0101 F3 arc: W1_H02W0401 F4 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000011000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICEB.K0.INIT 0000000100000000 word: SLICEB.K1.INIT 0011111100000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R3C36:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0501 S1_V02N0501 arc: H00R0000 V02N0601 arc: H00R0100 H02E0701 arc: V00B0000 H02E0401 arc: W1_H02W0001 H01E0001 arc: W1_H02W0401 H01E0001 arc: A5 V00T0000 arc: B2 F3 arc: B4 V02N0701 arc: B5 H00R0000 arc: C2 H00R0100 arc: C3 E1_H02W0601 arc: C4 V00B0100 arc: C5 H02W0601 arc: CLK0 G_HPBX0100 arc: D2 H01E0101 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 V00B0000 arc: E1_H01E0001 F3 arc: E1_H02E0101 F3 arc: E1_H02E0301 F3 arc: E1_H02E0701 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F4 arc: H01W0100 F2 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F5 arc: S1_V02S0101 F3 arc: V00B0100 F5 arc: V00T0000 Q0 arc: V01S0000 F3 arc: W1_H02W0301 F3 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1100111111111111 word: SLICEC.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000011000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R3C37:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 W1_H02E0701 arc: H00L0100 H02E0301 arc: N1_V02N0601 H01E0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H02E0701 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 W3_H06E0003 arc: B5 S1_V02N0501 arc: C5 V00T0000 arc: CLK0 G_HPBX0100 arc: D5 H00L0100 arc: F5 F5_SLICE arc: LSR0 V00T0100 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 arc: W1_H02W0501 F5 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R3C38:PLC2 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 H06E0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 W1_H02E0501 arc: V00T0100 V02N0701 arc: W1_H02W0601 V01N0001 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 V00T0000 arc: A5 V00T0000 arc: A6 V02N0101 arc: A7 V02N0301 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 W1_H02E0101 arc: B3 W1_H02E0101 arc: B4 W1_H02E0101 arc: B5 W1_H02E0101 arc: B6 W1_H02E0101 arc: B7 W1_H02E0101 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V02S0201 arc: C5 V02S0201 arc: C6 V02S0201 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0100 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D6 W1_H02E0201 arc: D7 W1_H02E0201 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: M0 V00T0100 arc: M2 E1_H02W0601 arc: M4 H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: V00B0000 Q6 arc: V00T0000 Q0 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 1011111111111111 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1011111111111111 word: SLICEA.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 1011111111111111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 1011111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R3C40:PLC2 arc: W1_H02W0601 S1_V02N0601 .tile R4C23:PLC2 arc: S1_V02S0201 E1_H02W0201 arc: V00B0100 E1_H02W0701 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: E3_H06E0103 Q2 arc: LSR1 E1_H02W0501 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R4C24:PLC2 arc: E1_H02E0101 H01E0101 arc: S1_V02S0201 E1_H02W0201 arc: A1 V02S0501 arc: A3 V02S0501 arc: B1 V02N0101 arc: B3 V02N0101 arc: C1 E1_H02W0401 arc: C3 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D3 V02N0001 arc: E1_H01E0101 F1 arc: E1_H02E0401 Q6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00T0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R4C25:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V01N0101 arc: H00L0000 V02S0001 arc: H00R0000 N1_V02S0401 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0501 N1_V02S0401 arc: V00B0000 S1_V02N0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 H01E0101 arc: A0 E1_H02W0701 arc: B2 H01W0100 arc: B3 H00R0000 arc: B4 H00L0000 arc: B5 H02E0101 arc: B6 V00B0000 arc: B7 N1_V01S0000 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q2 arc: N1_V02N0601 F4 arc: V01S0000 F7 arc: V01S0100 F6 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C26:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W1_H02E0401 arc: E3_H06E0003 N1_V01S0000 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 N1_V01S0000 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0601 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: B0 H01W0100 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 N1_V02S0301 arc: B4 H00L0000 arc: B5 H02E0101 arc: B6 H02E0301 arc: B7 V00B0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR0 H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F4 arc: N1_V02N0301 F3 arc: S1_V02S0501 F5 arc: V01S0000 F6 arc: V01S0100 Q0 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R4C27:PLC2 arc: E1_H02E0301 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H01W0100 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0701 E1_H02W0701 arc: B0 H01W0100 arc: B1 H00R0100 arc: B2 H02E0301 arc: B3 H00R0000 arc: B4 V02N0701 arc: B5 V00B0100 arc: B6 V00T0000 arc: B7 V00B0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q0 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0401 F6 arc: S1_V02S0501 F7 arc: S1_V02S0601 F4 arc: S1_V02S0701 F5 arc: V01S0000 F2 arc: W1_H02W0101 F3 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C28:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02S0201 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 S1_V02N0401 arc: W1_H02W0301 V01N0101 arc: B0 H01W0100 arc: B1 H02E0301 arc: B2 V01N0001 arc: B3 H00L0000 arc: B4 V02S0701 arc: B5 N1_V01S0000 arc: B6 V00T0000 arc: B7 V00B0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F2 arc: N1_V02N0401 F4 arc: N1_V02N0701 F5 arc: V01S0000 F6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C29:PLC2 arc: H00R0000 V02S0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: V00B0000 H02E0601 arc: A7 H00R0000 arc: B0 V00T0000 arc: B1 V02N0101 arc: B7 H02E0101 arc: C7 V02S0201 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0501 F5 arc: S3_V06S0103 F1 arc: V00B0100 F7 arc: V00T0000 Q0 arc: W1_H02W0001 Q0 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C30:PLC2 arc: H00L0100 S1_V02N0101 arc: A1 W1_H02E0701 arc: A3 W1_H02E0701 arc: B1 E1_H02W0101 arc: B3 E1_H02W0101 arc: C1 H00L0100 arc: C3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0001 arc: D3 E1_H02W0001 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: M4 E1_H02W0401 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V02N0301 F1 arc: V00T0100 F3 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R4C31:PLC2 arc: E1_H02E0401 V01N0001 arc: N1_V02N0701 H02W0701 arc: V00B0000 E1_H02W0601 arc: V00T0100 V02N0501 arc: A5 V00B0000 arc: B5 H02W0101 arc: C5 S1_V02N0001 arc: CLK0 G_HPBX0000 arc: D5 H02W0001 arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S3_V06S0103 Q2 arc: V00B0100 F5 arc: V01S0000 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R4C32:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06E0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 V02S0701 arc: A1 H00R0000 arc: A3 V00T0000 arc: A5 V00T0000 arc: B1 S1_V02N0101 arc: B3 S1_V02N0101 arc: B5 S1_V02N0701 arc: C1 H00L0100 arc: C3 H00L0100 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D3 S1_V02N0201 arc: D5 V00B0000 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: LSR1 V00T0100 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: S1_V02S0101 F3 arc: S1_V02S0601 Q6 arc: S1_V02S0701 F5 arc: V00T0100 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R4C33:PLC2 arc: E1_H02E0601 V01N0001 arc: H00L0100 S1_V02N0101 arc: H00R0100 S1_V02N0701 arc: S1_V02S0701 E1_H01W0100 arc: V00T0000 V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: A1 S1_V02N0501 arc: A3 S1_V02N0501 arc: B1 V02N0301 arc: B3 V02N0101 arc: C1 H00R0100 arc: C3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D3 H02E0001 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0101 F1 arc: S1_V02S0601 Q4 arc: V00T0100 F3 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R4C34:PLC2 arc: H00L0100 S1_V02N0301 arc: N1_V02N0601 N1_V01S0000 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0601 arc: A3 V00T0000 arc: A5 V00T0000 arc: B3 V02N0101 arc: B5 V02N0701 arc: C3 H00L0100 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D3 H02W0201 arc: D5 H02W0201 arc: E1_H01E0101 F5 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0100 Q0 arc: LSR1 H02W0301 arc: M0 H02E0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0101 F3 arc: S1_V02S0201 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R4C35:PLC2 arc: E1_H02E0601 N1_V02S0601 arc: H00L0100 V02S0301 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0401 N1_V01S0000 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: S1_V02S0501 W3_H06E0303 arc: B5 V00B0100 arc: B7 H02W0301 arc: C5 V00T0100 arc: C7 V00T0000 arc: CE0 V02S0201 arc: CLK0 G_HPBX0100 arc: D5 V02S0401 arc: D7 H00L0100 arc: E3_H06E0003 Q0 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0000 arc: M0 H02W0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F5 arc: N1_V02N0701 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1100000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 .tile R4C36:PLC2 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02N0001 arc: H00L0100 V02S0101 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: V00T0000 H02W0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 V02N0601 arc: A1 V01N0101 arc: A3 V02N0501 arc: B1 S1_V02N0301 arc: B3 V01N0001 arc: B7 V00T0000 arc: C1 V02N0601 arc: C3 H00L0000 arc: C7 H02E0601 arc: CLK0 G_HPBX0100 arc: D1 V02N0201 arc: D3 S1_V02N0201 arc: D7 H00L0100 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M4 V00B0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V02N0601 Q4 arc: S1_V02S0201 F0 arc: V00B0000 Q4 arc: V00B0100 F7 arc: V00T0100 F3 arc: V01S0100 F0 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R4C37:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0701 arc: A2 H02W0701 arc: B2 H00R0000 arc: B3 E1_H02W0301 arc: B7 V01S0000 arc: C2 H00R0100 arc: C3 N1_V02S0401 arc: C7 V00T0000 arc: CLK0 G_HPBX0100 arc: D2 V02S0201 arc: D3 V00T0100 arc: D7 V02S0601 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q2 arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: M2 N1_V01N0001 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q2 arc: V00B0100 F7 arc: V01S0000 Q2 arc: V01S0100 Q2 arc: W1_H02W0001 Q2 word: SLICEB.K0.INIT 0100000011000000 word: SLICEB.K1.INIT 1100111111111111 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 .tile R4C38:PLC2 arc: H00L0000 N1_V02S0001 arc: H00R0100 V02S0701 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0301 H06E0003 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: A6 V02N0301 arc: A7 Q7 arc: B1 V00T0000 arc: B6 V02S0701 arc: B7 H01E0101 arc: C1 H00L0000 arc: C6 V00T0100 arc: C7 N1_V02S0001 arc: CLK0 G_HPBX0100 arc: D1 V00B0100 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0101 Q7 arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: LSR1 H02E0301 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V02N0401 F6 arc: N1_V02N0501 Q7 arc: S1_V02S0601 F6 arc: V01S0100 Q7 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1100000000000000 word: SLICED.K0.INIT 1100000001000000 word: SLICED.K1.INIT 1110101010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R4C39:PLC2 arc: W1_H02W0301 H01E0101 .tile R5C23:PLC2 arc: V00B0000 V02S0201 arc: CLK0 G_HPBX0000 arc: E1_H02E0201 Q2 arc: E3_H06E0103 Q2 arc: LSR0 E1_H02W0301 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C24:PLC2 arc: H00L0000 V02N0201 arc: H00R0000 V02N0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 V02S0201 arc: V00T0000 V02N0401 arc: A1 E1_H02W0501 arc: A5 E1_H02W0501 arc: B1 V00T0000 arc: B5 H00R0000 arc: C1 H00L0000 arc: C5 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0001 arc: D5 E1_H01W0100 arc: E1_H01E0101 F1 arc: E1_H02E0601 Q6 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00B0100 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R5C25:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0101 H02W0101 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 V02N0001 arc: V00T0000 H02W0201 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: A5 H02W0501 arc: A7 S1_V02N0101 arc: B5 N1_V02S0501 arc: B7 V02S0501 arc: C5 H02W0601 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D5 H01W0000 arc: D7 N1_V02S0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q0 arc: E1_H02E0401 F6 arc: E1_H02E0601 F6 arc: E3_H06E0303 F6 arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: H01W0100 F6 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0401 F6 arc: N1_V02N0601 F6 arc: N3_V06N0303 F6 arc: S1_V02S0601 F6 arc: V00B0100 F5 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000010000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R5C26:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: H00R0000 V02S0401 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H02E0601 arc: V00B0000 H02E0401 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V02S0601 arc: A1 H00L0000 arc: A5 E1_H01W0000 arc: A7 S1_V02N0101 arc: B1 V02S0101 arc: B5 N1_V02S0501 arc: B7 H01E0101 arc: C1 W1_H02E0601 arc: C5 V02S0001 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D5 V00B0000 arc: D7 H02E0201 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR1 V00B0100 arc: M2 H02W0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q2 arc: N1_V02N0701 F7 arc: V00B0100 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000001 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R5C27:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 W1_H02E0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 W1_H02E0601 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: A2 E1_H01E0001 arc: A3 H02E0501 arc: A5 H02E0501 arc: B2 V01N0001 arc: B3 H00R0100 arc: B5 S1_V02N0701 arc: C2 S1_V02N0601 arc: C3 H02E0601 arc: C5 H02E0601 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 H00R0000 arc: D5 V00B0000 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 F2 arc: H01W0100 F2 arc: LSR1 V00T0100 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V02N0001 F2 arc: N1_V02N0401 Q6 arc: N3_V06N0103 F2 arc: S1_V02S0301 F3 arc: V01S0100 F2 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R5C28:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: H00R0000 N1_V02S0601 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N3_V06N0303 H06E0303 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0601 H06E0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 N1_V02S0501 arc: A5 W1_H02E0501 arc: A7 W1_H02E0501 arc: B5 H00R0000 arc: B7 V00B0100 arc: C5 V02N0201 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: D7 V00B0000 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F7 arc: LSR0 H02E0501 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R5C29:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02S0501 arc: H00R0100 V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0201 N1_V02S0201 arc: A1 V02N0701 arc: B1 H00R0100 arc: C1 V02N0401 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E3_H06E0203 Q4 arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: V00T0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R5C30:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 N1_V02S0601 arc: H00L0100 V02N0301 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0501 arc: V00T0000 N1_V02S0601 arc: A3 V02N0701 arc: A5 N1_V01S0100 arc: B3 E1_H02W0101 arc: B5 V02N0501 arc: C3 H00L0100 arc: C5 V00T0000 arc: CLK0 G_HPBX0000 arc: D3 V02N0001 arc: D5 V00B0000 arc: E3_H06E0003 Q0 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: LSR1 V00T0100 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0701 F5 arc: V00T0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0010000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R5C31:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: H00R0000 H02W0601 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: N1_V02N0601 W3_H06E0303 arc: A0 W1_H02E0501 arc: B2 H00L0000 arc: B3 V01N0001 arc: B4 H00R0000 arc: B5 N1_V01S0000 arc: B6 W1_H02E0301 arc: B7 V00T0000 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F4 arc: N1_V02N0501 F5 arc: S1_V02S0301 F3 arc: S3_V06S0203 F7 arc: V01S0000 Q2 arc: W1_H02W0601 F6 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R5C32:PLC2 arc: H00L0000 S1_V02N0001 arc: H00R0000 W1_H02E0601 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H06E0203 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V02S0601 arc: B0 H01W0100 arc: B1 V00T0000 arc: B2 V01N0001 arc: B3 H00L0000 arc: B4 W1_H02E0101 arc: B5 H00R0000 arc: B6 S1_V02N0501 arc: B7 V02N0501 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0401 F4 arc: S1_V02S0001 F2 arc: S1_V02S0301 F1 arc: V01S0000 F7 arc: V01S0100 Q0 arc: W1_H02W0401 F6 arc: W1_H02W0701 F5 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R5C33:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0701 V01N0101 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 V01N0101 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H01W0100 arc: V00B0100 V02S0101 arc: V00T0000 W1_H02E0201 arc: B0 H01W0100 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 V02N0301 arc: B4 N1_V01S0000 arc: B5 V02S0701 arc: B6 H02W0101 arc: B7 S1_V02N0501 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F5 arc: N1_V02N0401 F4 arc: S1_V02S0001 Q0 arc: S1_V02S0101 F1 arc: S1_V02S0701 F7 arc: V01S0000 F6 arc: V01S0100 F3 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C34:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 E1_H02W0001 arc: H00R0100 H02W0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 H01E0101 arc: S1_V02S0401 E1_H01W0000 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0101 arc: W1_H02W0101 V01N0101 arc: B0 V00T0000 arc: B1 H00R0100 arc: B2 V02N0101 arc: B3 S1_V02N0101 arc: B4 H00L0000 arc: B5 V02N0501 arc: B6 V02N0701 arc: B7 V00B0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0601 F6 arc: S1_V02S0701 F5 arc: S3_V06S0003 F3 arc: S3_V06S0103 F2 arc: V00T0000 Q0 arc: W1_H02W0401 F4 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R5C35:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02S0501 arc: S1_V02S0501 H01E0101 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: W1_H02W0701 W3_H06E0203 arc: A7 V02N0101 arc: B0 V00T0000 arc: B1 H02W0301 arc: B7 W1_H02E0101 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F7 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0000 Q0 arc: W3_H06W0103 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R5C36:PLC2 arc: E1_H02E0501 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 E1_H01W0000 arc: V00B0000 V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0001 W3_H06E0003 arc: A0 H02E0501 arc: B2 H00L0000 arc: B3 Q3 arc: B4 H00R0000 arc: B5 H02E0101 arc: B6 V01S0000 arc: B7 V00B0100 arc: CLK1 V02N0701 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q4 arc: E1_H02E0601 Q6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 Q7 arc: H01W0100 Q5 arc: LSR1 V00B0000 arc: MUXCLK1 CLK1 arc: MUXCLK2 CLK1 arc: MUXCLK3 CLK1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: N1_V02N0501 Q5 arc: V00B0100 Q7 arc: V01S0000 Q6 arc: V01S0100 Q4 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1100110000000000 word: SLICEB.K0.INIT 0110011010101010 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICED.MODE CCU2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 1 enum: SLICED.REG0.REGSET SET enum: SLICED.REG1.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK1.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R5C37:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E3_H06E0303 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: B0 V00T0000 arc: B1 Q1 arc: CLK0 V02N0701 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 Q1 arc: LSR0 H02E0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00T0000 Q0 arc: W1_H02W0201 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 enum: SLICEB.MODE CCU2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG1.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R5C38:PLC2 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0301 N1_V01S0100 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0501 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A4 V00B0000 arc: A5 V00B0000 arc: A6 V02S0301 arc: A7 V02S0301 arc: B2 N1_V02S0101 arc: B3 N1_V02S0101 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00B0100 arc: B7 V00B0100 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00T0100 arc: C5 V00T0100 arc: C6 V00T0100 arc: C7 V00T0100 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0100 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 Q4 arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: M2 W1_H02E0601 arc: M4 H02E0401 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q2 arc: V00B0000 Q6 word: SLICED.K0.INIT 1000000000000000 word: SLICED.K1.INIT 1011111111111111 word: SLICEC.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 1011111111111111 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 1011111111111111 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R5C40:PLC2 arc: N1_V02N0601 H06E0303 .tile R6C24:PLC2 arc: H00R0000 H02W0401 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02W0401 arc: V00B0000 V02S0201 arc: V00T0000 E1_H02W0201 arc: A5 V02S0101 arc: B5 H00R0000 arc: C5 V00T0000 arc: CLK0 G_HPBX0000 arc: D5 V02S0601 arc: E3_H06E0003 Q0 arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00B0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C25:PLC2 arc: H00L0000 H02W0201 arc: H00L0100 V02S0101 arc: H00R0000 E1_H02W0401 arc: N1_V02N0101 E1_H01W0100 arc: V00B0000 E1_H02W0401 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0401 E1_H02W0401 arc: A3 H00L0100 arc: A7 V02S0101 arc: B3 H00R0000 arc: B7 V00B0000 arc: C3 H00L0000 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D3 N1_V01S0000 arc: D7 V02S0601 arc: E1_H02E0301 F3 arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0100 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0001 Q0 arc: V00B0100 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R6C26:PLC2 arc: E1_H02E0201 V06S0103 arc: H00R0000 V02S0601 arc: V00B0000 H02W0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 V06S0103 arc: A1 V02S0501 arc: B1 V00B0000 arc: C1 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: F1 F1_SLICE arc: H01W0100 Q2 arc: LSR1 H02E0301 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: S1_V02S0301 F1 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R6C27:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 H06E0003 arc: S1_V02S0601 N1_V02S0601 arc: V00B0100 V02S0301 arc: V00T0000 H02E0201 arc: V00T0100 N1_V02S0501 arc: W1_H02W0401 V06S0203 arc: A5 N1_V01S0100 arc: B5 V02N0701 arc: C5 V00T0000 arc: CLK0 G_HPBX0000 arc: D5 V02S0601 arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q0 arc: N1_V02N0201 Q0 arc: S1_V02S0501 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C28:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 E3_H06W0203 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0701 E3_H06W0203 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: A5 V02S0101 arc: B5 V00B0100 arc: C5 V00T0000 arc: CLK0 G_HPBX0000 arc: D5 V02S0601 arc: F5 F5_SLICE arc: H01W0100 F5 arc: LSR1 H02E0501 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V02N0401 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C29:PLC2 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H02E0701 arc: V00T0000 V02S0601 arc: V00T0100 E1_H02W0101 arc: A1 H02E0701 arc: B1 E1_H02W0301 arc: C1 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: F1 F1_SLICE arc: H01W0100 F1 arc: LSR1 H02E0501 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: V01S0000 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R6C30:PLC2 arc: E1_H02E0701 V02S0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 E1_H02W0401 arc: V00T0100 E1_H02W0301 arc: A5 W1_H02E0701 arc: B5 H02W0301 arc: C5 V00T0100 arc: CLK0 G_HPBX0000 arc: D5 E1_H02W0001 arc: E1_H01E0101 Q2 arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V00B0100 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C31:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 E1_H02W0001 arc: N1_V02N0001 E1_H01W0000 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 H02W0601 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 E1_H01W0000 arc: A1 E1_H02W0501 arc: A3 E1_H02W0501 arc: A7 H00R0000 arc: B1 V00T0000 arc: B3 H00L0000 arc: B7 N1_V01S0000 arc: C1 E1_H01W0000 arc: C3 E1_H01W0000 arc: C7 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D3 H02W0001 arc: D7 V00B0000 arc: E1_H02E0701 F7 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR0 V00T0100 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V02N0301 F1 arc: V00T0100 F3 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000010000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R6C32:PLC2 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A1 H02W0701 arc: A3 H02E0501 arc: A5 N1_V01S0100 arc: B0 F1 arc: B1 V02S0101 arc: B3 H02E0301 arc: B5 S1_V02N0701 arc: C0 E1_H01W0000 arc: C1 H00R0100 arc: C3 V02N0601 arc: C5 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 E1_H02W0001 arc: D3 V00B0100 arc: D5 V02N0401 arc: E1_H01E0101 F1 arc: E1_H02E0001 F2 arc: E1_H02E0201 F2 arc: E1_H02E0301 F1 arc: E1_H02E0401 Q6 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: H01W0100 F2 arc: LSR1 V00T0100 arc: M2 V00T0000 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F5 arc: N1_V02N0001 F2 arc: N1_V02N0201 F2 arc: N1_V02N0301 F1 arc: S1_V02S0201 F2 arc: S1_V02S0301 F1 arc: W1_H02W0001 F2 arc: W1_H02W0101 F1 arc: W1_H02W0301 F1 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0111111111111111 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R6C33:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: H00L0000 W1_H02E0201 arc: H00R0000 H02E0401 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 H01E0101 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0501 E1_H01W0100 arc: A0 V02S0501 arc: A1 H02E0701 arc: A3 V00B0000 arc: A7 H00R0000 arc: B0 V02N0101 arc: B1 E1_H01W0100 arc: B3 V02N0301 arc: B7 V00T0000 arc: C0 H00L0000 arc: C1 W1_H02E0601 arc: C3 N1_V02S0601 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02E0201 arc: D3 H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F0 arc: LSR0 H02W0301 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F0 arc: V01S0000 F0 arc: V01S0100 Q4 arc: W1_H02W0001 F0 arc: W1_H02W0201 F0 arc: W1_H02W0601 Q4 arc: W1_H02W0701 F7 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000001 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R6C34:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02E0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 H01E0101 arc: A4 E1_H01W0000 arc: A5 V00B0000 arc: B4 H00R0000 arc: B5 H00L0000 arc: C4 V02N0201 arc: C5 V00T0100 arc: CLK0 G_HPBX0000 arc: D4 V02S0401 arc: D5 W1_H02E0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 F4 arc: LSR1 V00B0100 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: N1_V02N0601 F4 arc: S1_V02S0401 F4 arc: V00B0000 F4 arc: V00B0100 F5 arc: W1_H02W0401 Q6 arc: W1_H02W0601 F4 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R6C35:PLC2 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02E0301 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H02E0301 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: A1 H01E0001 arc: B1 V00T0000 arc: C1 H02E0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: F1 F1_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: V00T0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R6C36:PLC2 arc: H00L0000 E1_H02W0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N1_V01S0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: E1_H02E0701 Q5 arc: F5 F5_SLICE arc: H00R0100 Q5 arc: MUXCLK2 CLK0 arc: N1_V02N0701 Q5 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R6C37:PLC2 arc: N1_V02N0701 H02E0701 .tile R6C38:PLC2 arc: W1_H02W0001 W3_H06E0003 .tile R7C25:PLC2 arc: N1_V02N0101 E1_H01W0100 .tile R7C26:PLC2 arc: N1_V02N0101 N1_V01S0100 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: CLK0 G_HPBX0000 arc: E3_H06E0103 Q2 arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R7C27:PLC2 arc: N1_V02N0701 S1_V02N0701 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0401 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: LSR1 V00T0100 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V02N0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R7C29:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0203 N1_V01S0000 arc: H00R0100 V02S0501 arc: N1_V02N0101 H06E0103 arc: V00B0100 V02S0101 arc: W1_H02W0101 V06S0103 arc: A3 V02S0701 arc: B3 H00R0100 arc: C3 V02S0401 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: E3_H06E0303 Q6 arc: F3 F3_SLICE arc: LSR0 V00T0100 arc: M6 H02W0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00T0100 F3 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R7C30:PLC2 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0401 N1_V02S0401 arc: A5 V00T0100 arc: B5 V02S0501 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: E3_H06E0003 Q0 arc: F5 F5_SLICE arc: H01W0100 F5 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 Q0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C31:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02S0401 arc: H00R0100 V02S0701 arc: V00B0000 H02W0601 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0101 arc: A5 V00B0000 arc: B5 V02S0501 arc: C5 V00T0000 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: M0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q0 arc: V00B0100 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C32:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 E1_H01W0100 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06E0303 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0601 arc: W1_H02W0601 V02S0601 arc: A5 V00T0000 arc: B5 V02S0701 arc: C5 H02E0401 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: F5 F5_SLICE arc: H01W0100 F5 arc: LSR1 H02E0301 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q2 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R7C33:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0601 N1_V01S0000 arc: V00B0000 V02S0001 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 N1_V02S0101 arc: A7 V00T0100 arc: B7 N1_V01S0000 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F7 arc: LSR0 H02E0301 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V02N0401 Q4 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R7C34:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: S1_V02S0001 V01N0001 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: A1 H00R0000 arc: B1 V00B0000 arc: C1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: F1 F1_SLICE arc: H01W0000 Q4 arc: LSR0 V00T0100 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: V00T0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R7C35:PLC2 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 N1_V02S0501 arc: A7 V02S0101 arc: B7 V00T0000 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D7 V00B0000 arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F7 arc: LSR1 H02E0501 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R7C36:PLC2 arc: N1_V02N0301 W3_H06E0003 .tile R8C29:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0501 E1_H01W0100 .tile R8C30:PLC2 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 H02E0101 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0101 arc: V00T0100 N1_V02S0701 arc: A7 V00T0100 arc: B7 N1_V02S0501 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D7 H00L0100 arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02E0501 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V02N0201 Q2 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R8C31:PLC2 arc: H00R0100 N1_V02S0701 arc: V00B0000 H02W0401 arc: V00T0000 N1_V02S0401 arc: W1_H02W0401 V06S0203 arc: A7 H02E0701 arc: B7 N1_V02S0501 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D7 H00R0100 arc: E3_H06E0003 Q0 arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0201 Q0 arc: V00B0100 F7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 .tile R8C32:PLC2 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0701 N1_V01S0100 arc: V00T0000 E1_H02W0001 arc: W1_H02W0401 E1_H02W0101 arc: A1 H00R0000 arc: B1 H00R0100 arc: C1 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0201 arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: V00T0100 F1 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R8C33:PLC2 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0601 arc: V00B0100 N1_V02S0101 arc: A3 N1_V02S0701 arc: B3 H00R0000 arc: C3 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 N1_V02S0001 arc: F3 F3_SLICE arc: LSR1 V00T0100 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q0 arc: V00T0100 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG1.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG1.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 .tile R8C34:PLC2 arc: H00L0000 N1_V02S0201 arc: N1_V02N0001 H06E0003 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: A5 V00T0000 arc: B5 H00L0000 arc: C5 V00B0100 arc: CLK0 G_HPBX0000 arc: D5 H02W0201 arc: F5 F5_SLICE arc: LSR1 V00B0000 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V02N0601 Q6 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG1.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG1.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG1.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R8C35:PLC2 arc: W1_H02W0201 N1_V02S0201 .tile R9C27:PLC2 arc: N1_V02N0701 N3_V06S0203 .tile TAP_R2C22:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R2C42:TAP_DRIVE arc: L_HPBX0100 G_VPTX0100 .tile TAP_R3C22:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 arc: R_HPBX0100 G_VPTX0100 .tile TAP_R3C42:TAP_DRIVE arc: L_HPBX0100 G_VPTX0100 .tile TAP_R4C22:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R4C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: L_HPBX0100 G_VPTX0100 .tile TAP_R5C22:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R5C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: L_HPBX0100 G_VPTX0100 .tile TAP_R6C22:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R6C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R7C22:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R7C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 .tile TAP_R8C22:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R8C42:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 ================================================ FILE: tools/README.md ================================================ # Get Start ## Install openocd ``` $git clone https://github.com/ntfreak/openocd.git $cd openocd $git submodule init $git submodule update $./bootstrap $./configure --enable-cmsis-dap $make -j $sudo make install ``` ## Setup after openocd installed, a shell script `dapprog` is written for convenient, export the path of dapprog, then we can use it everywhere, because the openocd can only support svf file, so the bit file will be converted to svf file with a little modified urjtag. in addition, the svf file is program to sram and the bit file is program to the flash. `$cd icesugar-pro/tools` `$source env.sh` `$dapprog xxx.svf or xxx.bit` ================================================ FILE: tools/cmsisdap.cfg ================================================ # # Buspirate with OpenOCD support # # http://dangerousprototypes.com/bus-pirate-manual/ # # http://www.fabienm.eu/flf/15-ecp5-board-kit/ # https://github.com/Martoni/blp/tree/master/platforms/colorlight # https://github.com/HarmonInstruments/JTAG_SWD interface cmsis-dap transport select jtag adapter_khz 10000 jtag newtap ecp5 tap -irlen 8 -expected-id 0x41111043 #init #scan_chain # #svf -tap ecp5.tap -quiet -progress blink.svf #exit # this depends on the cable, you are safe with this option #reset_config srst_only ================================================ FILE: tools/dapprog ================================================ #!/bin/bash if [ ${#1} -eq 0 ]; then echo "usage: dapprog file" exit 0 fi CURRENT_DIR=$(cd $(dirname $0); pwd) CONFIG=${CURRENT_DIR}/cmsisdap.cfg if [ "$1" == "--probe" ] || [ "$1" == "-p" ]; then #probe add -d4 for detail log sudo openocd -f ${CONFIG} -c \ " init; scan_chain; exit; " exit $? else # program IMAGE_FILE=$1 EXT="${IMAGE_FILE##*.}" echo EXT: $EXT #flash write_image erase xxx.hex; #flash write_image erase xxx.bin 0x08000000; if [ "${EXT}" == "svf" ]; then TARGET="$IMAGE_FILE" elif [ "${EXT}" == "bit" ]; then NAME="${IMAGE_FILE%%.bit}" #/home/pi/oss/ulx3s/tools/ujprog/ujprog -j SRAM ${IMAGE_FILE} > ${NAME}_sram.svf ${CURRENT_DIR}/ujprog.bit2svf -j FLASH ${IMAGE_FILE} > ${NAME}_flash.svf TARGET="${NAME}_flash.svf" else echo "illegal suffix [$EXT]" exit 1 fi echo "TARGET: ${TARGET}" sudo openocd -f ${CONFIG} -c \ " init; scan_chain; svf -tap ecp5.tap -quiet -progress ${TARGET}; exit; " exit $? fi ================================================ FILE: tools/env.sh ================================================ #!/bin/bash #CURRENT_DIR=$(cd $(dirname $0); pwd) CURRENT_DIR=$(pwd) export PATH=${PATH}:${CURRENT_DIR} ================================================ FILE: tools/ujprog.bit2svf ================================================ #!/bin/bash CURRENT_DIR=$(cd $(dirname $0); pwd) PLATFORM=$(uname -m) if [ "${PLATFORM}" == "x86_64" ]; then ${CURRENT_DIR}/ujprog.bit2svf.x64 $@ else ${CURRENT_DIR}/ujprog.bit2svf.arm $@ fi ================================================ FILE: tools/ujprog.patch ================================================ diff --git a/ujprog/ujprog.c b/ujprog/ujprog.c index a233bb7..0085bc6 100644 --- a/ujprog/ujprog.c +++ b/ujprog/ujprog.c @@ -41,7 +41,7 @@ * - execute SVF commands provided as command line args? */ -static const char *verstr = "ULX2S / ULX3S JTAG programmer v 3.0.92"; +static const char *verstr = "//ULX2S / ULX3S JTAG programmer v 3.0.92"; #include @@ -2550,6 +2550,14 @@ exec_svf_mem(char *fbuf, int lines_tot, int debug) cmd_complete = 0; parentheses_open = 0; linebuf = fbuf; + printf("//START\r\n", linebuf); + for (lno = 1; lno < lines_tot; lno++, linebuf += llen) { + printf("%s", linebuf); + llen = strlen(linebuf) + 1; + } + printf("//END\r\n", linebuf); + exit(0); + while(1); for (lno = 1; lno < lines_tot; lno++, linebuf += llen) { if (debug) @@ -4217,6 +4225,7 @@ main(int argc, char *argv[]) exit(EXIT_FAILURE); } +#if 0 switch (cable_hw) { case CABLE_HW_UNKNOWN: case CABLE_HW_USB: @@ -4299,7 +4308,7 @@ main(int argc, char *argv[]) #endif #endif /* !WIN32 */ } - +#endif do { if (reload) { genbrk();